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Document:	BA11-L Mounting Box Maintenance Manual
Order Number:	EK-BA11L-MM
Revision:	PRE
Pages:	130
Original Filename:

OCR Text

FK-BA11L ~MM-PRE

PRELIMINARY
BAll-L Mounting Box

Maintenance Manual

The information in this document is subject to change
without notice,and should not be construed as a
commitment by Digital Equipment Corporation.

Digital Equipment Corporation assumes no responsibility
for any errors that may appear in this manual.

1975,1976 by Digitial Equipment Corporation

Written by PDP-11 Engineering
Printed in U.S.A.

Page

CONTENTS

CHAPTER |
1,1

BA11=L PHYSICAL CHARACTERISTICS AND SpPECIFICATIORS
GENERAL

1e1,1

scope

1,2

PHYSICAL CHARACTERISTICS

1,3

OPTIONAL 1/0 CABLE RETRACTOR ASSEMBLY

1.4
1,4,1
1,4,2

H777 POWER SUPPLY PHYSICAL CHARACTERISTICS
AC Contro)l Assembly Physieal Description
Main (+5V) Regulator Assembly Physical Description

1,4,3

1:4,4

CHApPTER ¢
2,1

2:1,1

20101,

MOS8 Regulator Assembly

Core Regulator Assenmbly

SYSTEM UNITS, OPTIONS AND HARNESS
SYSTEM

UNITS CONCEPT

system Unjits

”

Single System Unit

210102

Double System Unit

2p1,2
291,2,1
2914242
2,1,2,3

DDIp Backplane
SPC (Small Peripheral Controller) Bus
MUD (Modified Unibus Deviece) Bus
NPG (Non Processor Grant) Line

2:101,93

2.1.2.4
CHAPTER 3

power Distribution

BG (Bus Grant) Line

H777 POWER SUPPLY

3,1

GENERAL

3,2

PHYSICAL DESCRIPTION

302,2

+35V Main Regulator

34253
3,244

MOS Converter
Core Memory Regulator

3.3

BLOCK DIAGRAM DESCRIPTION

33,1

3,3,2

AC Conlrol

Clock

Assembly

3¢343
3e304

switech fer +158V Isolation
Contrel for Console Interfage

3.4

DETAILED CIRCUIT DESCRIFTION

d=n

Page

O
O
N

{9 R

N N

W O

Control Cilrcuit for Regulating Main +5V
Voltage Reference
Error Amplifiler

Current Source
Pulse Width Modulation

W
W
9
©

(Outputs

Crobar (Crawbar) Clirecujts OvereVoltage Protectien
on +5, +B5B, and +29 Volt Regulators
Power Fall Detectors
pattery Monitor Circuits
Electric Switehling of Non=MOS Legads

WO DO WD WO O

®
®
®

for Regulating

current Limit Cilircuit 54«11597
Current Limit Cipcuit +5B Regylator

W
W

BRatterv

Keep

Alive

Detector

Power

BATTERY BACKUP

O ®

General Description
Mechanical Conflguration
Detalled Cireuit Description

W
B
»
©

Limiting

other Than +5, Maln)
Base Drive Cirecylt (Main +5V Requlator)
protection Sequenecing and Control Circults

RT-T
T ¥ U

Y
B
®

Cyrrent

Alternate Contreol Clreult

W
»
v
D
W
9
®
W

Inrush

The 555 Timer
Cloek Circuit
geries-Connected Power gswitching Stage
Flyback Stage (+15V Filter Seheme)

SRV RUSVRE
RO R R R

raw DC Cirecuitry

Circult Breaker BA

Main

Power

Control

Traln

Circuit

Charde Rate Control
Battery Output Section
Charge Rate Signhal

BA1i~L MAINTENANCE

GCHAPTER
B

GENERAL

e
fpona

®»

e dad B
R IR

N
A

~d 3P

N
W

9
9

N
9

voltage

H777
=2

)

ad Tnd

b
i

N S

CORRECTIVE MAINTENANCE

PREVENTIVE MAINTENANCE

Meehanical/Eleetrical

H777

Regulator

Checks

POWER SUPPLY
Fower Supply Removal

Removal of H777 Power SubPply Subassemblies
Powel Supply CovVer Removal

rRemoval of AC Control
Fan Removal
Fan Removal
= Loglc
MOS5

Main

Regulator

+5V

Agsembly

Remeval
Regulater Removal

Page

FIGURES

Number

122

BAile=L Mounting Box Extended from Wire Frame
BAli=L Mountling Box (Removed from wWraparound

1»3
im4
1eb

MOS

{=1

1=6

2o
292

2%
3
2m4
2w

Envelope)
AC Control Assembly
+3V Main Regulator AssemblV
Requlator

Core

Regulator

gsingle

Assembly

System Unit

Array

Double system Unit Array
DD{i=P Power Distributien

Harness

DD11=F Slot lsgage
NpG 24ignal Royting

296

Eug Grant Routing

Jwi

RA1]l Mounting Box Showing Connectors and Cables
H777 Major Fower Supply Components
Block Diagram of H777 Power Supply
Raw DC and Relay Driver Cireuits =« H777

Ie2
e}

3wd

I»5
I=p
IeT
=B

5585 Timer
H777 Clock Clrcuit

Typical

Regulator Series sSwitching Stage

Flyback Circuit Used in + or = 135V Regulator

Je9
3=l
3miy

Feedback PathelUsed in Maln +5v section of H777
Capacitor (CE) Waveform

3eil
3el4

yece

3m12

J=iB
3916
3=17

3eig
3»19

3e20

QA Current Bypass
Summary of Timling Seguence
Waveforms

with Higher

vee Charge Time vg,

Current

Levels

High Clock Time

Alternate PWM Cireuit (Used in Regulators
than Main +5)
Main Timing Capaciter Charging Curve

Effect of varying Threshold
Bage Drive Clrcuit for +5V Regulator
A(P) Collector Current waveform
Foldbaeck Current Limiting Circuit for Main +5Vy
Regulator

3=21

3=22
3m23
3m24

325

I=®26
327
I=28
I®29
3=39

other

Current Through RA
Inereasing Load Current BeVYond Trip Level
output

vVoltage/Current

Foldback

Current Limit Circult for +5B pedulator
A(L)

Collector Current Waveform

Typical Crobar Circuit

powey
Poweyr

Fall
Fal)l

and Sequenceyr Clreuitry
Detector waveforms

Power Down Seguence
Rattery Monltor Circuits

331

Electronle

Switeching

3»32

Battery

Detector

HoneMOS Loads

Page

I»33

Keep Allve Power

3r3S

Functional Block Diagram of Battery Backup Unit

Je34

=36
I=37
EEXE:
im39
w4y
3wdy

Im4?
3ed}
4ol
4w}

pattery Backup unit (H775)

Main Power Train of Boost Regulator
operation of Main Power Train
Regulation Centrel Circultry

Relative Timing of the Two 555 Timers

Charge Control Section
putput Circuit
selfe=sShut Off Circuit

charge Status Signal

H777 Fault Isolation Flow Chart
H777 with Cover ON

Page 6

TABLES

Table

No,

BAtiel, Specifications » PhysSical and Environmental

2=
2%2

Backplane Power Harness to Power Distribution
Modified Unipus and SPC Pins

Imy

PWM Design Limits

dwi

Regulator Qutput Specifications

2#3

Modified Unibus Devices

Page

THE BA1i1el MOUNTING BOX MAINTENANCE MANUAL

Page

CHAPTER 1

BA{i=L PHYSICAL CHARACTERISTICS AND SPECIFICATIONS

1,1

GENERAL

This

manual

desc¢grines

the

BAlle=L

rack=mounted

expander

bOX

manufactured by Digital Equipment Corporation, The BAlleL bOX is 19
inches wide, 5 1/4 inches high, and 25 inches deep, It provides power
to the varioys components mounted in the box (see Figure 1~1),

This manuyal i{s designed to provide Digital Field service and customer
maintenance personnel with sufficient installation, operation, and
servieing information to install and maintain the boX,

1,2

PHYSICAL CHARACTERISTICS

The BalleL mounting box is designed to provide a gtrong mounting frame

with

maximum accessibility and gserviceabilicy,

The mouynting frame is

one section e¢ontains all
divided into two sectlons;
modyles, the other section containg the H777 power Supply,

the

loglc

The mounting frame slides into a rack mounting wrap around envelope
that completely encloses all four sides of the frame, rThe front and

The
back of the ehvelope are open for front to back alr flow,
rack
without
cabinet,
a
wraparound envelope mounts directly into

slides, and functions as the slide mechanism for withdrawing the frame

and its contents,

An operator’s console assembly (KY11LA) mouynts on the front of tChe
The console assembly contains the power control and
BAlieL frame,
limited tuncerion gwitches regquired £0r systenm operations,
Table

1=1

specifications,

1list

BAlle=L

physical

and

environnental

Page

wRfiP‘fl RoupnD

ERApE

BAI-L.

ngggfflifgfi/
.

PaweR_

BAac KpLams

C“»QG\CQ)

OPERATOR'S

SUPPLY

SectTion

cC opnsolE

FIGURE i=1

BA1t+L Moynting Box (Extended From Wire Frame)

Page

TABLE

BAllel,

size

{e={

Specifications

Box

BA11L Mounting
Chassis

with operator§

console

1/4"H x

19"w x

25"D

Unconfigured weight with H777
Module

9 maximum using

sleots

DEC

ba¢Kkplanes

standard

Cooling effielency for both fans
at

9¢@vac

50hz

Shoek and vinratjion characteristics

(pperating)

172

and

slne shock pulse of
12

«3mg,

12 GPK

duration

(noneoperating)

172 gine shock pulse o0f 48 GPK
and 3¢ + or
=18 ms,
duration

FFan ajir movement direction

Front

Coolling efflelency for
at

9%vac

H777

power

both £ans

See

to rear,

Bob

2 channels

Allen

Subply

less

"D
5YH x 6 1/2"W x 20

Size

powey cord

Weight

(MOS

Welght

(Core

version)

Input

MOS

Core

(H777=A,

Version)

(H777eC,

HT7T7eD)

HTT77=D)

90e132, 160=264
47=63 Hz,
Dval primary

104m127,

4763
Dual

208B=2B4

HZ
primary

Vac

vac

RMS

Page

Qutputs

+5Vy

+15V,

=15V,

Battery
support

=5%,

+ or

€=25

Amp

Q2«1

Amp

=5%,

+ or =5%, Ve1 Amp

Average

+85Ve + or =5%, @w»2 Amp
=5V, ¢ or =5%, 2«2 Amp
+20V, + or =3%, de6 Anmp

(DC meter

readings)

Noise

Ripple

AC Lo

less,

nominal

voltage

and PC

must

pbe

=25

mBec,

Overload/short
recovers
protection
removal of overload,

Protectiont

S8C

= 53% x

circuit
upon
|

Irated

Overvoltage crobar
protection
on +5 and +20 volts,
Indirect

overvoltage proteetion on
bagkup voltades,

Battery

Interface?

Rattery voltage

backup,
Battery
system

voltage

Current

drain

MOS8

18=48V for MOS
24=48YV

core

(recabling required),

for

hackup

< or =2,5

Amp

from
24V
Dbattery
(64K
MOS,
MMil’S)q
max,
Amp
Charging » 2
avallable current @ 23=48 VDC,
mode,
Signals = Charger
Keg/Enable,

+ OF =18V
adjusted
to
+ or =12V by jumper,
DMNo other
adjustments avallable,

Adjustmentss

# Total

power

NTE 242 watts

Page

Environmentajlt

Ambients

temperature

C
degrees C»6@ degrees

{62,
humidity = per DEC STD,
DEC
per
ons
Shock & Vibrati
nt,
equipme
C
STD 102 for Class
Coolingt

Eff{ciency!

LFPpM

jee

required
Bfillflh);

min,

(Fan

ajrflow

mounted

60% minimum = overall,

BATTERY BOX
Sizet

5 1/4" x 19" Rack Mount x 4",

Input/0utput;

+23=48 DC/+24 DC,

Capacitys

120 watt hour e 850 degrees
e2,5 Amp rate,

Cell

Typel

(C,

Nickel
leadwacld,
Sealed
be
may
GELecell
or
cadmium
charge
used with appropriate
in capacity Sspec,

Charger:

Constant current,

Weight

1lb,

dual rate

Page

1,3

OPTIONAL 1/0 CABLE RETRACTOR ASSEMBLY

An optional

mounts

gpringeloaded cable petractor assembly

the

rear

standard

19"

pack

to provide a service loobp for Unibus and

them

against

fraving

when

the

wire

frame

isg

(part

no,

Its

functlion

cé&bling

bprotect

avallable,

1/0

extended,

Jthat

The retractor assemplY will accommodate all the round and flat ¢abling
styles

1,4

presently

H777 POWER SUPPLY PHYSICAL CHARACTERISTICS

The H777
into the

for

avallable,

povwer supply
BAli=L pox,

1s
It

flow,

frontetoerear alir

There

are
AC

filve

contr0l

a compaet moduylar
1s rectangular in

modular

subassemblies

assembly
sharpe and

in the H777

designed
to
£it
opeh at both ends

(8ee

figure

1=2)3

assembly

+5V main regulator
MOS reguylator

Cofe

regulator

Fan

With the exception
caAn be YemOVed and
BAli=L box,

of the AC
installeq

control assembly, all
the
while the H777 asSemplY is

NOTE

The

H777

the

following

HT77A

Power

Supply

1is

available

designationsgt

118v

Supply

(metal

oxide

core

and

MOS

semiwgconductor)

memory

H777B

23@v

SUupply

c¢ore

and

MOS

memory

H777C

115v

H777D

supply

23@v

gupply

=» M0OS memory only

MOS memory

only

Instructions
on the
top
of
the
power
supply speclfy the correct designatien,

subassemhlies
mounted in the

FPage

BAckpLane
SECTT opd

Powe R

SuPPLY
SEcTion)

‘

| .

/fl
," 7, /
a

\
,
/
/

OPERKTOR
S
C g OLE
]

' FAN Asse MB LY

| Ac CanNRoL ASSEMBLY
FIGURE

BAlly

Mounting Box

1e2

(Removed from

Wraparound Envelope)

Page

AC Control Assembly Physical Description (see Flgure i=3)

1,4,1

The AC eontrol assembly containsg the following componentst

Linear transformer (Ti1) = provides stepped=down
igsolation

of the power supply from the AC linejy

Voltage

and

operates at

h2Z,

Circuit breaker = turns off AC power In the event of a power
surgeé or when maintenanece personnel desire to work on the
powelr

supplV.

CAUTION
Never

without
AC

1,4,2

remove

the

power

supply

cover

turning circult breaker off,

still

present,

AC eonversion terminal block = provides conversion

Surge resistor = provides jinrush cuUrrent limiting When supply

Surge relay = bypasses surge resistor after

vac to 239 vac
is

connected to a=C

established

from

(see directions on terminal block cover),

115

source,

(normal coperation),

the

raw

1is

F1 surge protector = protects surge resistor i{f relay falls,

EM! line filter = keeps power supply nolse lsolated

solrce,

from

Main (+5y) Regulator Assembly Physical Characteristics

The majin regulator assembly consists of

large

and

small

printed

eircuit board assembly interconnected by a soldered power harness,

Page

Fuseé
CIRcuITTM

BREAKER

F4
emT

FILTER

cCBAa

CoNVERSI00)

_TERMIWAL.

_—

I UREE
RELAY

BlLeck;

—

FIGURE
AC

Control

1=3
Assembly

TRenSFORMER

Page

The larger
regquylator,

board (+5V regulator) contains a +5V lowevoltage
switehing
power
Sedyence
logie¢
(AC
LO,
DC
LO, LTC) and battery

moniter logle,
power

The small board (power

conneectors

cables,

which

provide

distribution

outputs

t¢0

two

board)

contains

system uynit power

and a power control connecter,

There are no adjustments onh the main regulator assembly,
A numper

module

interconneet

the larger +sV board,

1,4,3

MOS Regulator

and eontrol

econnec¢tors

are

molUnted

These connectors are identifled in Flgure 1=4,

Agsenmbly

(gsee Figyre

1°5)

The
The

¥M0S regulator is in reality three regulatorsg
+15V, «15V angd +3V,
+15V
and
=15V
regylators
have
dual
Switehed
and uUnsyitched
outputs,
The unswitched set runs on battery backup to run MOS8
(metal

oxide

semim=gonductor) memory modules,

backup

modes,

modyles

reguiring

=15V and are

the switcheéd oytputs run option

powered off

standby

and battery

The regulatoy assembly mounts {nverted on top of the +5 maln regulator
A small ribbon cable (MP3) and a large nineepin power cable
(MJ2) provide interface connections to the
vrest
of
the
supply,
A

assembly,

stralaght,

elghtepin

coennector

(MJ1)

mounted

over

the

Distribution Assembly provides a Battery Backup option interface,

1,4,4

Core regulator Assehbly

The core regulator

required

when

core

memory

(see Figure

optional
modules

used

The core reguylator, like the MOS requlator,
core moduyles require +2¢0V and =5V,

The

core

and

The
the

main

regulator

top

power

the

assembly mounts
MAIN

angd conftrol
regylator

+5V

1=6)

assembly

are

pover

the

part

o6f

H777,
a

systen,

a multiregulator,

inverted pbeside

the

MOS

The

regulatoer

regulator,

signals

assenbly,

frem the

core

regulator

interconnect

via

Fage 1€

Mm.oS PoawsR Ceniels IZ

Poureiz, DISTRABITIA)

MOS CoriEoL
CARE MP4-|

—-—-—‘%

{

’
3

.
E {

CovE Cort A

CRe\E oFB iz

Corssle
CRrLE

)

—

TERLMAOTM
Ru.ock

TRA

|
1

»> | OO OO

Figure

OO0

1-4

+5V Main Regulator Assembly

Page

ELGAT PIN cponNecToR. MTA

FIGURE 1e5

MOS Regulator Assembly

/Powem ChRLE MI 2

Page

10 Be SupplieoQ

FIGURE

Core

Regulator

1=6

Assembly

Page

CHARTER
SYSTEM

2,1

SYSTEM

UNITS

UMITS,

QPTIONS

AND

HARNESS

CONCERT

This chapter describes the concept of
apd
the
DD11-P
nine~slot backplane
new
the
been developed to imp)lement
maintainping
a
Stamdard
inibys

the DEC System Units in
9dzneral
im particular,
These uUnits have
while
system
Unmibus
HModified
input/output
interface,
This

inhereases

deyvelopment allows gsystem lnterfaces to remain the game and
the flexibility of

2,1,1

The

System

internal

Interconnection,

Unitg

term gystem ynits nhas come

accommodate a droup

ldentify

t¢he

bujilding

logic modyles,

S8ingle Sygtem Unit

2,1,1,1
(A=F)

into usage

A System Unit coOnslsts of a matrix
concept of all DEC systemg,
together
to
provide
power
and
signal
{nterconnectlons
to

bloek
wired

Unit

the

Single System Unit,

connector array,

The

(see Figyre 2#1) =

which

sghallegt

System

used

module

It consists of a four

¢four

hex

slots

(i=4) by SiX

for

mounting,

(see pDp=11,¢4 yser’s Gulde = Conflguration gegtion),

Aare

Many

such
moduleg,
speclal gystem units are dedicated to a gpeclal get of
ag a disk inperface,
Slot 1 connectors A and B, and slot 4 connectors
ang

connectlions,

always

Used

for

Unipus

Input

and

Unipus

output

respectively,

2.1,1,2
Douple Sygtem Units (see Figure
22) =
This
System
Unit
TnhisS unit has nine heX
nine PY Six copnector matrix,
&8
O0f
consistS
slots

for modqule mounting,

Slot 1

eonneetor A and B and slot 9 connector A and B are dedlcated to

unibus

input

respectively,

peginning

and

vunibuyus

output

termination,

Page

Hex Slot 1

‘

UNIBUS INPUT

;}; He

UNIBUS“OUTPUT

FIGURE

2=1

System Unit Array

Single
A

UNIBUS] INPUT

UNIBUS OUTPUT

}

ealie

Fienre

il v

Lt hagy

x Slot 4

2-2

LA
ilAg
G e
e

Double SvyeFen, UniT /ffhfi)/

CRCGVEIa
W VF

;}

Hex Slot 1

Hex

Slot

Page 23

2,1,1,3 power Distribution « while Unipbus control signals enter and
leave a gsystem pnit via the uynipus cable, DC power for modules enters
the System Unlt via the DC Power Distribuytion Harness attached to the
AW eonnector end of the system unit printed cireuit board backplane,

The power distpibution harhess, depending on type, consists of several
highecurrent MatesNwlLoK Cohnectors that are wiped by a short harness

The harness for the DDileC
to the System Unit (see Figure 2e3),
connector containing DC
Mateeh=Lok
backplane consists of a 15epin
Le, DC Lo ang LTC
AC
ng
voltages and & 6=pin connector containi
of two 15epin
consists
e
backplan
DD11sp
The harness for the
signals,
connector
bepin
4
anhd
voltages
DC
Mate=N=Lok connectors carrying
must be
harness
power
The
,
containing aC Lo, DC Lo, and LTC signals
a glven
by
emploved
ation
configur
eonfigured to match the power supply

The

system,

H777

and

HT765 power supply systems used in the BAllwlL

(5 1/4") and BAll1=K (12 1/2") expansion boxes have identical power
distripution systems which meansg that the same power harnésses can be

used in either box,

2.1,2.

See Table 2«1,

DDiiep Backplane

The DDil=P

packplane

double

system

unit

for

the

standard

DEC

designed

PDP=11/34 and PDPwell/39 duale=hex CPU modules, Slot one ls reserved
for the CPU control Module (M7266) and slot two is ryeserved for the
OPU Data Path Module (M7265), The remailning seven slots are available

for system Configurations invoiving a wide

memories and interfaces,

varlety

Filgure 2~4 defines slot usage,

Page

(aia

BACKP LANE

VIEW

FIGURE

FROM

MODULE

SIDE

Dnoll«P Power Distribution Harhess

Page

BACKPLANE POWER HARNESS TO POWER DISTRIBUTION
BOARD

INTERFACE

TABLE

BA{1»L/BAl1=K

power Dist,

Color

GND

Black

+15%B

White

GND

Black
Black
Black

(SPARE)
GND
+OV

1BV

a5V

»158

Brown

Green

Black

Brown

LTC
DC Lo

Yellow

( SPARE)

(SPARE)

violet

MateeN=[ok

+5V

Red

+15V

Gray

D¢

1S5epln

+20V
+5V

prange

Red

% P

$#3

GND

R X XX

|
2

6+*Pin MatevH=LO0OKk

Eooe®

Black
Red
Blue

ie
i1

GND
GND

R
Y

8
9

ki
e e

orange
Red

+20
+5V

3
4
5

% D8

Red
Gray

+BV
+15YVy

Fin Usage
De]lA=e7@11108

MagewiNmLok

1
2

Pin Usadqge

Del2=7011109

15«Pin

Wire

Agsigninent

DD11eF
Harness

>t o<

Piln

NDileC
Harness

2«1}

GND
+158

Black
Wwhite

GND

Black
Black

10
i1

GND
GND
(SFARE)
GND

+58

13
14

=15V
oSV

»{5B

Rlack
Black

Red
Blue
Brown
creeén

Page

GRANT
DIRECT ION

|
| st—

wrzee L
-

— p7265

MQ3o01d

N
|

V|
CowTROLLE

(S&PC)

MapIFIED

Lot S

UNIBUS

7
8

STD UNIBUS

FIGURE

bP11=P Slot

2+4

Usage

Page

The seven hex slots

(paragrabh 2,2,1,2),
unlpus

output

2.},2.4

Small

Peripheral

Controller (SPC)

Table 2=2 is a

(four —connector)

Peripheral

unibus signals and some internal interconnect signals,

Quad

Bug = Small

(8{X-connector)

The C,

slots,

heX

modyles,

can

MUD

Note that Slot 9 conneectors A ang B are tne®

standard

ContIollers

(slots 3 through 9) are broken
up lnto two

the SPC bus (paragrabPh 2,2,1,1) and the

parallel bus structures:
bus

memory

dedicated

are

there

‘This backplane i{s very flexible, as

'slots,

2%7

and F connectors are configured

with

pin configuration chart of an SPC slot,

New layouts for spC modules should consult te the

all

the

New

pModule

Layout

Guide,

Any moduyle specifled as an 3PC moduyle can he mounted
seven DD1i«P expander slots (slots 3 through 8),

Modified

2.1,22

Device

Unibus

(MUD)

Bus » New

any

o0f

the

batteryesupported

ralls were developed for M0OS memory (MS11) and new core voltage
power
features
These
rails were developed for the new core (MM11) memorys
in the
incorporated
is
which
Unibus,
mnodified
the
on
includeda
are

- DD11=P and
contains

DD11eC

memory

packplanes,

addition,

parity

the

Devices

are

and

and the new cOre memory are conhected to the modified Unibus

designated Modified unibus

Unibuys

modified

Devices such as MOS memory

control signals,
(MUD),

This new bus is strictly internal to the DD11«C and DDilep backplanes,

other 8ystem units the DPli=pP and DD1leC look like standard Unibus
TO
system units,
The number of MUD modules used in the PDP11/34
varys

the medule types are listed in Table 2~3,

and

systems

PDP11/39

The MUD bus is located on the A and B connhector bloCks on slots

The pin configuration of the MUD bus 1s listed in Table 22,

(Note
A MUD module at present 1s either a double 0r a heX Mmodule,
to
side
by
slde
mount
can
spC
width
quad
and
MUD
width
douple
a
that
f111 a hex siot_ )

The end of the Unlbus must

M93@2 SACK turnareund terminatory
M9302

will be Plugged into the

terminated

with

no other terminator will work,

last standard Unipus slot

the

The

last

In an 11,34 gystem with a
example,
For
system,
the
in
backplane
ninemslot DD11l=P backplane and a fourwslot DhlieC backplane, the M93¢2

plugged

92,

1into

slot

4A,

the

last

backplane

(foureslot

As in another example, in an 11/04 system
backplane, in this case),
backplanes, the M9322 is plugged into slot
DD1leP
with two nineeslot
of

the

second

DP11=P backplane,

Tuble 2-2 Medifled Mh.‘b“; and SPC
o

e by

Pins Slet2a-8&
CONNECTOR

Y
L3T

cav

|Frae|tTM S irS

DI3

DET |

c——

)

xJ
\G

{

L OuUT

8BSY|Fe!

LIV

Dp2.

Fol

6
s
| DP
DE
L

| L

iEfl&'@

AR D67 5 A T

WPR ;fié;vp
i A
L

NP
¢ ———y

| so

s Do
AT AT s
DD

¢
oot
Rt
et

ADIZ AT
| B

——

ST~
T
~

Dfi.? Fol

APS TP pe7 Hwfl&@é

lNTE Fo|

RITIAIG Pc

' so
EVBA

RE®

|Alb

REY

BG5S

A BR
ow’T

.Fo}

' $o

ouT

/| TP |BGS
DE
L

L/‘l

1R G 6
DL AT

AI3IAIZ HALT Y/3-3 TP

MPR A17
e

]

AP6 LI DB INIT ggm
L ouT
eveB' L

gSRCK AlS a4 HALT
(8
CRT

——

LolL

ASELIBRS

A TP P E9 Aol (BGYT

1A16

;’PA D5 |,

A SEL BRE

1 Aga gfiwT Y A SeL| A BR|

DIy ;@13

zBBSY

’PB

fioqu BR7
low | L

——y

D) D1z Ay BLLW; ‘

e Fre

DIy

ABG [-ISV
g

GND STV GND

GND A SEL '&ND

PaR TP
Lo

louT|
[ IN

V-

LTC DIS

coMWMECTOR

1806

VABGN +5V

1-15v

|
-/ 5V TP

s @
"9

N PG

BR4

CLETE

‘.

+5V TP| +5v ¢

lenp PA

[

(our)

+5Y NPG
(I w)

fao

(ge 28

SLO T

NIRRT

P 2.

FollZ. BoIn)

; ou‘fi__m

. ———
e aa

Fol M2

D
GM

) GN D ;ggé}
{ oup

S8V

msym

ARG
W

fimn! ARG
NH

|ownr

| L

ABR

Page

TABLE
Modified

2=3

Unibus

Devices

M93a1

Rootstrap/Terminator

Dual

Module

M33a6

MUD Terminator

Dual

Module

A
M98

Memory Parity Control

Duaj)

Module

M7847

mMOS Memory (MSe=11i)

Hex figdule

G221

Core

Memory

(MMlleB,

G222

Core

Memory

(MM1leD)

()

Hex Module

with

Quad

Hex

Modyle

with

Hex

Daughter

2.9

Page

CAUTION

Mever install an M9302
&ACK
Turnaround
Terminator
or
an
M932 Unibus in a MUD
power
MUD
apply
will
Doing so
slot,

ralls

the

bus grant and ground lines on

M9302,

used

NoneprocessOy Reguest 18 a transfer of data from one device In
system to another device inh the gystem withoyt CPU intervention,

2..1,2,3 NoneProcessor Grant (NPG) Line » The NPG slgnal

only

those

Interfaces

designed

Nonh

procCcessor Requests,

There are very few NpR devices that are algo SpC devices

Therefore,

rap 5umpers on the
the nPSG line grant continuity 1s provided by wiresw
the
g10t,
a
d o

backplane,

corresponding

removed,

NPR

wireeswrapped

nmodule

assiqgne

Jumper on CAl to CBI of that slot must be

This jumper permits the Grant signal to

next module,
Figure

Wnen

routed

¢to

the

The NPG signal routing through the backplane 1is shown 1in

2+5%,

2 4 Bus Grant (Bg) Line = Buys grant continulty cards are reguired
2.1.
in all Slots that do not contain modules, TheSe cards permit the

Grant signal to be passed from module to module (see Flgure 2e0),

Page

NPG

DIRECTIO

A \g

REMOVABLE

/WIRE WERKAP
Chl

:‘

}

Aul?'

¢A

NPG

FIGURE

Signal

Routing

Page

4] GRANT

DIRECTION

Ps%

DT2

BQEE:""W o
©

Q
%
0
O

¢
G

Y
o
0
&

t—z
‘%

FIGURE

Bus

Grant

2#6

Routing

* Aorll SIGNALS

Page

CHAPTER
H777

3.1

POQWER

3
SUPPLY

GEmERAh

This echapter describes the H777 power Supply, whieh is housed
Iin
the
This supply provides the operating voltages for
Mounting pox,
RAli=;,
the

PDP*11/34 and PDLP=11/39

supply

Processing

Systems,

designated H7?775 and provlides backup power
supply

3,2

avallaple for systems employing M0S§ memory,

event

the

bagtery

bpackKuyp

The backup 1s

power

fallure,

PHYSICAL DESCRIPTION

The H777 Power Supply moynts en

mounting

boyx

(see

Figure

3=1),

the left hand side of the box,

the

righthand

and the

side

DDileP backPlane

the

pBAllel

moynged on

power to the backplane 1s provided

a eonnectoOr at the rear of the power supplys
power to the operator’s
congole is provided by a connector at the front of
the
poOwer
supply
(see

Figure

3=1),

The power supply contains the following five
3#2)3

(see

Figure

»w

AC eoOntro]l assemhly
+5v main regulator

M0S regulator + or =15V, +8V
Core regulator +28V, =5V

Fan

3,2,1

assemblies

Assembly

Control

The AC Control Assembly contalns all of the hardware (l,e_, line cord,
relay,

fillter, circuit breaker,

the line volgage control,
trapnsformer

not be exceeded

complete

240

and main transformer) assoclated with

The H777 gystem

limited

1its

maln

(see

Table

3»1

for

watts of regulated DC oputput,

steady

characterization

state

the

operation,
1limits

This limit snhould

operatlon),

Internal

thermal protection will shutedown the individual regulator

assemblies

power=fail Seduence and is provided py a thermal switch

the

before

dangerous

conditions

are

reached,

This

shutdown

mailn

Page

reguylator

in order

to preserve

MOS memory data,

The H777 provides a controlled turneon by limiting the inrush current,
with
no
controlled
turn=on,
highesurge cyrrents could trip circult
breakers causing
the
shutedown
of
rack
power,
This teature
1is
impoertant in systems containing multiple mounting boxes,

Page

73 K %&)/,‘ng

FIGURE

3=}

BA1l=L Mounting Box Showing Connec¢tors and Cables

Page

3o2,2

+5V

Magln

Regulator

acts

The +5 Main regulator provides 25 amps of regulated DC power and

It also contains power
and

rs,
of raw DC for other redulato
(on/0FF/STAND
input

source

up/down sequenhcing circultry, control
Unibus AC Lo, DC Lo signals,

BY),

Canverter

M0OS

32,3

The M0s§ Cconverter provides ¢+ or «15 volts for use witnin the H777

and

This
assemblyY
alsp
supplies
+5 volts (+5B) te the MOS Memvries
battery-supported
refresh
operation,
The
HT777
system
clock

for

as
an output
Both switched

contained

3J,2,4

Core

The last
driving
contained

to the DLIi=P for MOS memory and
and yngwlitched (battery backyP)

the

MOS

eonverter

Memory Regulator

asSemply (optional
core
memories
at
on

the

main

various
sgourtes

module options,
ape
proyided,

assembly,

(Optional)
regulator)
+2?
and

is
«5

a removable unit cabable
of
vOlts from the paw DC source

regulator,

BLOCK DIAGRAM DESCRIPTION

3,3

Figure

3»3 is a bloek diagram of

3,3,1

the H777 power

shows
the
foyr major agsempllies of
battery backeup ynit,
Each assembly
for the following desceription,

Control

The

transformer,

RAW

shown

(RDC),

contalned
»

Figure
signal

the

supply,

the subPply plys
1is divided i{nto

The

figure

the optional H778
functional blocks
|

Assembly

Control

upper

RDC

left

flows

interface,

c¢orner

all

and main

Filgure

the

rectifier/filter

33,

Tregulator

and are

DbloCks

are

lapelled

WniCh

4are

ing
Lhe

Main

the

MOS Reguylator

the

Regulator

+2@Vv Core

AsSembPly

(center

Regulator

(upper

right)

(lower

right)

3»3 also shows the type of output obtalned from each
produelng block, along with its general destination,

power

Page

The cloek
switching
which

is & squarewwave oOsclllator used
Tregulators
within the H777 and

each

carrier

1Is

pulse

fed

Wwidth

each

wModulator

power

(pwWM)

switch

synchronize

all

the

Provide

carrier

upon

operates,

element

the

duty

The

modulated

eycle

that

appropriate to maintain constant and proper voltage,
The
modulation
of
the
carrier
within
each
regulator
1s
des¢cribed in subsequent
paradraphs,

Page

72 //3@ Sv%o/fedk

FIGURE

Major

H777

Power

13»2

supply Components

Pacge

See Puge 29A

F"1G U R E
Bl

u ia

r a‘

ie 3

QMS=Ny/\

LPyNod=U>QDDx5\WOAlT\Ow
-097YAo\ OD<—7Dt
| l

— 15

— —_ SOy

M~ :

SXLH

5t Al

~
&
d
%
v
/
!
NS

49O/24G7RLA ) .Nmn\WwnD,yW.~\wAM &SA50T[IS"ZNIy

OD7L2y1X3ALA(YW NA0o+y ——a<D4"fyNOOT%\,\5Q\9\w\0\\

24oy.FA0R—S=ZOB7Q4V‘T,.bmE/\L%OmuvY\\u\\%
\

e 294

Page

switen for +15V

3,3,3

Isolation

Note the SW (Switch) hoX aSsociated with the + or =i%v regulator,
Thig switch {solates the + or =15v (used for peripherals) from the
on

battery

the battery backeup time for MOS memory which represents the

critical

If the system should go

¢+ or =158 (ugsed for MOS memory),

vack»up,

lsolation

volatile

storage

consequently,

of the + or =18y from the + oy =15B will maximlze

losing

Contrel

3,3,4

peripherals

(noneeritical load) will,

not have battery backeuyp in this case,

the
Another featyre of
swapping of nonememory
without

The

10ad,

the

is
gswitched + or =15 output
modules may be accomplished

contents

for Console

that module
1in STBY mode

memory,

Interface

The control box (designated C) represents the console interface where
the power gwitch ON and STBY (stand by) functions are applied to the

1In the "STBY" state, the + or =15 and the +3B
H777.
strobed to provide® reqgqulated voltages for MOS memorY,

regulators are
The main +5 and

"DC OQFF"
In the
optional +29y and =5V regulators are not strobed,
any of
to
the clock is inhibited so that no earrier is applied
state,

the regulatops,

In the "DC OFF" state, AC power is still applied,

3,4

DETAILED CIRCULIT DESCRIPTION

The

followingy

provide

paragraphs

detailed

circuits comprising the H797 power supply,

3,4,1

description

the

Raw DC Circultry (Refer to Filgure 3w»4)

The Raw DC seCtion produces
a 1low DC
operating veltage
(normally
This single positive
for each of the regulators,
33 4+ or »9 volts
soyrce

suypplies power to

support could
alse provides

transients)

capacitor

for

"C»,

all

the

regulagors

(so0o

that

battery

bpe applled from one single battery), The RDC section
loss
the
rideethrough (power protection against

the

power

supply by virtue of the enerdy stored in

NOTE

pll components to the right of

"T"

are

on the Maln Reguylator Asgembly,
located
for
(except
components
remalning
The
control
AC
the
on
Jlocated
are
fan)

assembly,

Page

Coo {W/ 4| A

Raw

Aand

FIGURE

3=4

Relay Driver

Cireculits

H?777

%_ MWqF705NOD

CO-LFZH W

wlz/ord)
1

Y MEN o
A
Pago 40

Clef

m|\m*| 5|

Page

3,4,1,1

Circult

overcurrent
creates

3s4,1,2

power

The

fuse

3,4,2
The

convenient

Inrusn

Timer

(F)

Timer

The

the

event

<closure

Timer
is

performs

Circult

line=digconnect

protects

S55

Current Limiting

line

The

5585

Breaker

protection

and

i1s

for

(Refer

Resistor

bypassed

various

to Figure

within

the

The

containg

set

device
two

internal

Comparators

and

resetr

driver,

whicnh

The

flipeflop

set

1/3

Vec

device

Can be

whose

that

{in

2/3

logle,

chain

BecauySe

55%

a brilef

the

description

The

B8=pin
listed

3=5,

controls

source

manually reset

Ka,

as used here; is an
characteristiecs are

Figure

Vee,

oytput

can

current
Relay

3=5)

divider

and

get

inpuyt

gomparator

sink

each

outputs

can

billateral

eurrent,

by reducing the

reset

output

level

The output of the 555 inverts the state of the FF, as

follows?$

resigtive

H777

limits inpush
operation

functions within the H777,

flipw£flop,

4 to 2,4V,
.

a
at

during

Clock

blocCk diagram

provides

the

serviecing,

of its operation is presented,
The device,
DPIP
(dual Inline package),
Several of its

(BA)

within

Ra In the event of Ka failing to close,

located

along with

Breaker

fallure

FF peset

Qutput

High

OQutput

Low

(Source

(sink

current)

V.
Ce

Page 43

—

ol D
THZESH

— Covr,Lol

——

LorSCAHEIEE

l[r -

‘Ji

with FF set,
"ON" witph FF resget

Output can source or sink current

Reset Pin overrides trigger;

All

are edqual

value,

Output wi)l remain High as leng
Vice)

(12¢ ma maximum)

holds output Low for reset low,

Hignl,

—
-

1, Pin & High Resets FF
~
Pin 2 Lo Sets FF

"R"TM

RESET

STAGE

QuUTrPUT

Pin 3 High
Trapnsistor

| QUTPYT

A
TRISCER

18y maximum

FIGURE
555

3=5

Timer

Trigger

(Pin

Page

The sowcalledq discharge transistor is "ON" when the output is low

Reset),
<

1/2

The

v(pin

trigger comparator

Comparator

Wighin

(free=running)
modulator

The

the

3,4,3

resets

H777,

the

oscillator,

when

device

(Pin6)

used

one=shot,

and

device

this

Clock Clrcult

(Refer

teo

Flgure

operation,

Vee

pulseewidth

the

HT77

Square

wave

generatian

(or

relaxation

3I=g)

Clock generates a 20 KHZ
amplitude ot 12 volts,

The circuit that generates this carrier
a Free Running Relaxation Oscillator,

toward
1%
"turnseover"

2/3

signal,

c10ck

The H777 Master
carrier with an

V
1is

(PwM),

tirst &pplicatifln of

carrier

(FF

< 1/3 vVec(or

8),

Threshold

(pin5),

sets the FF when V(pin 2)

the

Timing

Caracltor

(Ca)

volts,
Upon
reachling
and discharges Ca via Rb

(+ or

centers

12
and

around a 5585

charged

volts
{ts

KHEZ)

through

Timer

and

(273
Vec¢) the
559%
internal
‘"discharge"

transistor,
transieion

falls
to
discharge

turnwover

That
trangition
eoincides
with
a
negativesgoing
outpPut of Pin 3,
When the voltage on Ca (Pin 2 & 6)
8§
volts (1/3 vce), the 558 wturnswmover"” again, opening the
transistor
and
allowing
Ca
to
charge
uyp
again,
That
at

the

colngldes

with an output

cycie continyes with Ca
Because the *turn=over"”

the osclllateor

The output O0f
still

maintain

freguency

thils
an

transition from Low to High,

oscli)llating
between
1/3
points are proportional to

(or

period)

Vce
Vce

will be independent of

cleck can source and sink up to about
acceptable

waveform,

The

apd
2/3
Vece,
in fixed ratio,

Vcc,

100

and

rage

vl oW

.
S

7- 8535 |

| F"L

v :

Capacitive relaxatjion oscillator
clock=in the H777 MOg converter,

This

_
12V

OEE

] [—A—

CLoC

- CLOCK OWUT

clock synchronizes

all

used

the

generate

switehing reguylators

FIGURE
H777

Clock

3=6
Cireuit

KHZ

the

master

H777,

Page

3,4,4

Serieg~Connected
(Refer

Power

to Figure 3=7)

Switehing

Stage

(typlcal

This power handling stage is identical to those used in

+5B,

the

+5B

+20)

and

+20 reqgulators and, with a different filter section, is similar to the
+ or =15 and 5V requlators of the
H777,
The
main
+5V
switech
1is
in paragraph

described

3 ,4,B,

It gets
This is called the "Passg element",
The power SwWiteh 1s Q(A),
base drive from Q(R) which in turn, is controlled from other circuitry
via R(E),

the

deiver

Current

current

flow through R(E)

allows

switcheg the stage

ON,

rRemoval

the stage t0 resyme blocking, or switeh OFF,

The Combination of R(B), R(C), D(A), D(B),
and
Q(B)
forms
a
Fixed
Current
driver
for the pass Element,
This driver limits the maximum
base current that can flow in the
pass
element,
thereby preventing
overstress on the pass transistor basewemitter Jjunction and protecting
fajilure,

fprom

excess

colléector

current

the

event

pass

element

Page

See Page 47 A

e«

L and ¢

form an averaging

¢llter,

waveform
The voltage waveform at point A follows the current
yleld
to
and the filter averages that voltage
¢,
point
at
smooth DC at

D(C)

point B,

is called a "freeswheeling"
FIGURE

diode,

3=7

Typical Requlator Serles switching stage

BN e

osmoe— TONINO)7HNDIS M

ML I

LTOLT
fage 4%
A

Page

The raw DC source (2@ to 50v) is switched across
D(C)
by
the
above
action of the pass element and driver,
The averaqging fllter (L and ()

create a relatively smooth DC (from thig chopped input) of a magnitude
equal

the time average

value of

the chopbed raw DC,

Examples

Yol THEE

RIv = 35v -

///é;//i/fififif“&g

(fiw’f A )

TYpICH|

—lv

,ffiit‘%«
—

//%&@; "
SSEC|

By chanaing
the
value

the width of the
of the output DC

width modylation
in paragraph

(pwWwM)

"QON®» pylse that
can be changed,

is accomplished by & feedback path as described

3,4,

If RDC = 35V and the pass element
perjods
(Diede D(C) conduycts for
E(AVG)

1s fed to the LC
filter,
The process called pulse

is "OMn for 29 usec out of a dP-usec
3@ usec lv drop)

=
=

35y

(1Y)

13,4

vdc

output

@ Point B

1f the pass element were "ON" for 8 @ usec
E(AVG) =
It RDC

35 X 8,0

increaSes,

1 X 42

[

4,76 volts output

the pulse width must decreaSe to maintain a constant

Note that changes in load
reverse is also true,
The
value,
oyutput
current (the ouytput current from the regulator) do not enter into the
determination of ouytput voltage,
The 13,4 Vdc and 4,76 Vdc previously
of
Theraforap mpdulation
caleylated are independent of load eurreht,
line
in
changes
overcome
width 1Is only necessary to
pulse
drive
the

Page

voltage

(RDC

components due

3,4,5

[evel)

and

compensate

(+ or

=13V Fllter

to load current g¢hanges,

The Flyback Stage

for

varlable

Scheme)

1losses

(Refer

€0

Figure

3eB)

Figure 3eg shows a
different
method
of
connecting
the
previously
descriped
filter
section;
dlode, choke, and capacltor,
Thls scheme
is ysed in the + or =15V regylator,
Here
the
choke
(L(A)
connects
acCross
the
filter
input
terminals,
swapping
places
with
the
freewheeling dicde

the

same

filter

(D(A)),

"output"

A capacitor

terminals,

previouysly described,

(C(A))

still

found

across

Note that the "power switch" 1s the

The same King of pPwM signal ls applied by the power switch stage, this
During the
during the "OnN" portion of the cycle
L(A),
across
time
D(A),
L(A),
of
connection
series
same
the
cycle,
the
of
"oFF" portion
Mplypback" is the term applled to this period when
exlsts,
(C(A)
AND
energy previously stored In L(A)

1s released to maintain current

the looP (L(A), D(A), C(A)) Will

decrease

flow

around
the
Series
1loop,
When
the
poWer
S8Switeh turns "OFF", the
polarity of the voltage across L(A) reverses and its magnitude
bullds
up yntil it preaches a level high enoygh to malntain current flowing in
the same direction throuqgh L(A),
The level that muyst
be
reached
1s
equal
to
the voltage on C(A) plus one diode drop (D(A)),
Current in

the

s¥iten

output
The
grounded,
positive terminal (Anode) of C(A) is
from this Flyback circult is, therefore, negative (=15V),

voltage

turns

again,

s§loWly

causing the current to rise

uUntil

in L(A),

NOte that the

Page

Either (+ or =) output can be used as the "sense point" or input to
feedpack system that will provide a regulation capability,

See Pige bj//

FIGURE

Flyback Clrcuyit used in ¢+
Qutput

voltages)

«15v

3=8

Regulator

(produces

Symmetrical

ity0T
(@ 77

R- T

//QW_o
Vase S0
A

mflJ\.rJ

Page

core

same

the

(which is wound

The remalning components L(B)

a positive output voltage 0f equal
produce
C(B)
and
D(B),
L(AY),
filter
Either half of the
magnitude to the negative voltage on C(A),
network

can

operate

exampie,

C(A)

starts,

¢the

Flyback

mede degseribhed above,

Ehergy

stored in the core by current flowing through L(A)
during
"ON"
time
1f, for
released to elther C(A) or C(B) dyring "QFF" time,
can bhe
(~»15V)

will

has

)lovwer

voltage

<clamp both windings

level (e,g,: »14,5vy),
and
doesgnh®t conduct,

across

(L(A)

{(t when

and L(B))

"Flyback"

time

at that voltage

reverse=blased
Because C(B) is at 15y, D(B) 1s
C(B), however, will discharge through the load,

down to 14,5 Volts so that D(B) cadn agadin
condlUct
on
Jlater
cYcles,
The
situvation is the same when (+15v) C(B) is low,
Eilther output can
assume
be ysed to supply power (+15 or ~»15) and the other output willl

Therefore, either ¢oOoyuld be used as the

magnitude,

voltage

same

the

reterence for regulation purposes,

In the H777

MOS

(C(R)) is used as the sensed output for regulation,

3,4,6

conyerter,

+15V

Control Circuit for Regulating (Main +5) (Refer to Figure 3=9)

To achieve a "regulated" output voltage

congtant

(one that

remains

relatively

voltage and/or load cullent change) from the Power

line

supply, it 1g necessary to introduce a feedback system

that

monitors

regulated,

mentioned

the output level and makeg adjustments within the supply circuitry to
The adjustment that is Made s
compensate for changes in that level
¢t¢he drive pulse that feeds the power switch stage
wideh of
in the

the

with

associated

line

output

being

the process is called Pylse Width Modulation (PWM) and in
previously,
mogqule, it is accompliShed via the circuitly of Figure
+5
5411597,
the
=g,
In this diagram, the 1input, or sense, voltage of the regulator)
is located on the right hand side, the modulated pulgse
train
output

The circult can be geparated into four sectlongs

appears on the left,

Reference

Voltage

Error Amplifier

Current Source
Pulge Width mModuylator

3,4,6,1

Voltage Reference »
tOlerance

=2%

zener

The voltage reference element 15 D(B), &

diode,

R(A)

teeds a Known current level

to maintain the =zener voltage at 5,1V + or =2%,
thpovgh D(B)
Capacitor C(¢C) 18 used to slow down the rate of rise of the referencCe
voltage

(and,

centrol

point

supply,

D(p)

transistor),

hence the output voltage)

and
X

The

during turneon

the

power

R(D) are used to drive the reference to zero when
dgrounded

5,1V

through

active

reference

non=inverting input of error amplifier E(1),

device

(like

voltage {8 fed to the

Page

SCee

(regulation)

/949@ OAA

feedback

Path

used

in main

FIGURE
Feedback

Path

(gsed

Ssection

H777,

3=9

Main

+5v

Section

H777

A &S/

o|2D N)lgmkWQT.NWRV )
A
Fise 52

Page
-~

3,4,6,2
senge

Error

amplifier

voltage

amplifies

the

A portion of
via
R(F),

(+5)

The

operational

with

the

reference

amplifier

(5,1Vv

g¢ompares

=2%)

voltage

the
and

difference,

the
The

amplifier output
voltage divider

is fed bhack to
action of R(F)

the
{inverting
{nput
and rR(C) fixes the DC

voltage galn of this amplifier circult so that a given
error
voltage
(Voutput = Vref) produces a Known output level from the amplifier,
The

Voltage

variable

jevel

Current

current

this

vout

with

and

=»

c¢can
5,1V to

5,1

error)

@G(A),

the

R(J)s

op=amp

R(G)»

source,

point

operating,

voltage

(amplified

level

the

first

three

(QCA)

collector

R(H)

which

converted

operate

segtions

¢the

circuit

between

the

gupply

output

convert
the difference
a kKnown current level,

X ma,

output

current)

NOTE

The

function

(in

the

modify

that
over
alve

C(B),

R(E),

error

amplifier

the

gain

the

CCA),

R(B)

circuit)

stage

way

Iin

will assure stabllity of the system
a pandwidth that is wide enoyagh
to
the
regulator
adequate
dynamie

response,

3,4,6,3

C(E)

this

Current Source =
Tregllator,

have

11ngar

The

rate

Capacitor C(E)

constant

rise

is the main

collector

voltade

current

timing
from

(see Figure

QCA)

element

3=190),

causes

-—</;~——~ Cheacimr (@ £) eLtwee wo Timae
1

- (A (};Ltefimfi Oufiéd’

FIGURE

Capacitor

3=10

(CE)

Waveform

The Rate of change of Capacltor voltage is deterpmipned

current

3,4,6,4
PWM

tpe

varjable

Pulge

(Cireuvuit

Width
(585),

capacitor

Zeron

Figure

Moduylation
let

zero volts

(558)
is oN,
Pins
C(E) so the ecurrent

(See

current

source

=»

wus

assume

and

the

Q(A)

(etc,,,

undergtand
that

discharge

the

operation

time

zero

transistor

output

the

(T(©))

within

the

E(2)

6 and
7 (threshold and discharge) are both tied
from Q(A) ls bypassed to groynd and V(CE) stays

3=11),

to
at

Page

58§

,41L,fl~’“"é§2?,

FIGURE

Q(A)

3=11

Current

BvYpass

At ehig poing (T2) the clock signal goes
high
(+13V)
and
turns
on
QC(C),
The e¢0llector Voltage falls rapidly to apout zeroe, causing Pin
2 of the 55% Timer to momentarily fall to zero, (Figure
3e12),
This
action triggers the timer and lts output qoes high,
Pin 3 = +13,5y),
No output

from the circuit

1s seen vet because Q¢¢)

turned

clamps
the
E2
ouytput near zero volts through p(pl).,
will exlst for as long as the clock remaing high,)

At the same

time

transistor turns
charging C(E),
The

voltage

signal)

y(CE)

wunti{l

that

"orFF",

rises

goes

High,

the

allowing the output current
at

fixed rate

(for

1t reaches the threshold polint

(This

internal

from Q(A)

constant

and

condition

discharge

to begin

output

error

(approximately 14V) and

resets the 555
dropped
back

Timer,
This event occyrs after
the
cloek
PulSe
has
to
zero
turning off Q(C),
Hence, an output pulse was

zero

when

produced by the clrcult which started when the clockK
and

ended

V(CE)

reached

{av,

signal

fell

¢to

page

i ecll777
6V

17%/ 2 (7/6) TM |

6‘___—

-—.

—

IZSV g

N/,

‘|

—

e
——

—

- RS

—

.[/

—~/oV.

FIGURE

summary o0f

,,a——"b/55?%2ff;/,'l//jjéi;{

Oanlz{lg%g? @wm)\séfli{//
\".“l)

l
|

\4%w,;3<6907FUT>.qiJt;;%fgiéii?ijgfifiijgl
o

3=12

Timing Sequence

‘l

\ ‘7//;

Page

OFF)

greater

the

less,

The

power

Switch

the

output

redyce
original

oytput

condition),

(equal

narrower,
will

voltage

have

the

average

regylator

Vthreshold

(thus

pulse

when applied

usec

time)

valye

waveforms

3-13

with

Higher

and

Cuprrent

Level

ON,

becomes

counteracting

EZ%

FIGURE

(1@V)

(25

pulse

nharrower

lowel

higher
V(CE)

tixed

[

CkT OUTPUT —=»p

VI(CE)

reacChes

width

output

This
a

< <

Cleci

Stage,

therefore

clock pulge

difference

pulse

and

The

the

rate

3»-1J)),

ysec

plgure

Q(A)
outputs
a
becaMe
higher),

capy

(see

source
voltade

inCreases

sooner

the variable current
(because
the
sense

that 1f
level

el ey

Observe
current

will

the

Page

1f the output of
time
of
V(CE)

Q(A) reaches a particuylar value suych that the
charge
1s
equal
to or less than the high clock time (
25
no output pulse I8 produCed,
Thnis esStablishes a minimum
pulSe

usec),
width

'zero

(see

Flgure

3»14),

Vo 2 f— ‘Lé,_,l

Cloc Kk

’t

OUTPLT /5 ZERO
O

FIGURE

IPEPSPS

—

]

3w=14

V(CE) Charge Time vs, High Clock Time

An upper limit to the circuit output pulse width is egtablished (at 25

usec) by reseting the timer (via Pin 4) at the beginning of each clock
cycle,
Thus, Q(B) momentarily tuyfns oN at T(@) (clock goes
high)
to
ensure

Q(BR)

that

also

the

output

performs

the

p at

the

important

start

the

function of

timing

allowing

interval,

either
the driver stage or the overecurrent detector
to truncate, or cut short, a pulse coming
from
the

Signal

from

glve designation
pWM
stage (see

Application ot a positive voltage to R(P) turns
3,4,9,1),
paragraph
on Q(B) and immedistely stops the pulse that is preSent at the
output
of

555

(and prevents

further

output

long

if an output pulse {s truncated by a momentary

voltage
(to
agajn produce

produced,

3,4,7

ON),

Note

application

that

reset

R(pP)), the timer will wait until the next cloeck pulse to
an
output,
If
each
pulse
1s
truncated
as
it
s

artyficjal

duty cycle of the

overload

Q(R)

protection

(and variable) maximum has been selt for the

regulator,
scheme,

the

This

H777,

feature

Alterpate Control Circult for Regulating
+5, Maln) (refer to Figure 3e1%5)

the

basis

(Outputs

o0of

other

the

thap

The regulating loop circuit used In the MOS8
converter
and
+20
volt
sectlions
of
the
H777 1is similar to the +5y regulator circylit except

for the method

settlng

the

c¢harge

time

for

the

main

timing

Page

capacitor,

tnis

scheme,

constant voltage (instedd 0of
along an expohential cyrve,
See

Figure

the

capacitor

(C(B))

fed from a

a econstant current)
source
and
charges
(The main +5 ¢apacltor charges linearly,)

3=16,

FIGURE

3=16

Main Timing Capacitor

Charging Curve

Page

OvTPLT I&

| f_—éf_" 8

J[iEL/J‘f

555

fl\\\\\\é;

’

NV o——ru]3

-———1

1—

|
L

FIGURE

Alternate PwM Circuit

3=15

(ysed in Regulaters Other Than Main +5Vy)

SENSE

'RF

Page

The trip point is now set directly by the output voltage of the

error

(Pin 5) the output pulse width can be widened or narrowed (see

Figure

amplifier

By raising or lowering the threshold

pin 5 of the 555,

3»17),
Note
that
trigger
and
reset
c¢ontrol
Paragraph 3,4,6 on the main +5 regulator,

are

the same as in

O CHAREES ——

fLons 7H(S
CyRVE

ook% TRESERS IREIT
T
e pE

TorAL.' , OmVT~ 7TSIIE
Epem THE 5S
(+)

Effect 0of varying Threshold

In the MOS Cohverter, the + or =15 volt loop uses the entire avallable
pulse from the 555, $0 no clamp path is provided (diode to collector
of vrigger trpansistor Q(C)) on the eircuit oytput
The Same applies to the +2¢ regulator PWM ¢ircuit,

(see

Filgure

The maximum pulse width 1ls unlimited in the +29 regulator by

3=5),

omission

of the R and € elementg that couble the cloeck edge to the reset
transistor, This is done to allow the regulator to reach a 1@¢g duty

cycle

and

approaches

thereby

maintain its 2¢ volt eutput as the raw DC voltage

volts,

Table el deplcts the design limits for

each regulator of

the HT77,

control

PpWM

signals

within

Page

PWM

TABLE 3={
Design kimits

Clocked
reset

Regulator

Pulse width
Max,
Min,

Main +5

25 us

YES

3 us

50 us

YES

+35 B(MOS Convy)

25 us

YES

=5 (Option)

25 us

YES

+2¢ (option)

3 us

+¢ or =15

(MOS Conv)

Trigger Clamp

Base prive Circult (Maln (+5) Regulator) (Refer to Flgure 3=18)

3,4,8

The outPut ¢cyfrent avallable from

the

5585

PWM

elircuits

previously

described (paragraph 3,4,7) ls too small to directly drive the power
This section
switch stageg of the various regulators in the HTIT,

deseribes

tnhe circuitry used to mateh the PyM output generated by the

main +5 loop to its power
function of this

switeh),

switch,

(Paraglaph

3,4,4

describes
|

the

regquires
This requlator, becauyse of its higher output current level,
parallel,
{n
connected
switches
power
or
elements",
"pass
two
Registors R(A) and R(B) help force the two swltches, Q(A) and Q(B), to
Sshare the load current, The two switches can be considfred asS one NPN

device,

The PWM signal from the control "loop" circuit 1s recelved at the base

Q(D),

this

transistor,

along with transformer T, amplifies the

signal and couples it to the bhase of the
current circuilt ig inserted between the
switch base, @(C), R(D), D(C), and DID)
about 2,7 Amps, Thig level wil) remain
leve)

varies,

A constant
pover switeh(s),
transformer secondary and the
limit the base drive level to

falrly constant as the raw DC

Page

high

level

base

drive

scheme

for

regulator

+5,

25A,DC

|
FIGURE

Base Drlve Circult

3»18

for

+5v Regulator

series

switching

)

“O

Tl | od

71 .

Day

G52
e

Page

An additiona]l function provided by transformer T {s
to
store
energy
during
the
drive
pulsSe,
to
pe
UuUsed
t0
Treverse
blas the switch
transistor basewemitter junction when it is time
¢to
turn
off,
The

energy
gtored
counterclockwise
the

transfopMer

transistor
The

in
the
(after Q(D)

base

collectoy

Figure

core
o0of
T
cauyses
a
current
to
flow
turns off) through R(C), D(F), D(A),
and
This
draws
current
out of the gwitch

secondary,

and

causes

current

vs,

time

switeh
in

Q(p)

will

’} .

trapezold

(see

ColRENT = Vol

THUS PoRTISN REACEIENTS

n 2w Ae
Seusmec
| uessy
CoXE
XA FoRmER

EFLECTED

)

FIGURE

Q(D)

Collector

3=19

Current

waveform

Protection Sequencing and Control Circuits

The
follo¥ing
sequencing, and

3,4,9,1

(Refey
filter

3,4,4),

paragrabPhs

descripe

control

circults

Limit

Circult

Curpent

the

operation

within

the

= 54

11597

=»

Cuprent

(.21

The

cuyrrent

triangylar

)

limiting

series

with

flowing

through

yaveform

(gee

this

requlator

and monjitoring
R(A)

Flgure

and

the

3#21),

and falling during
conduction
triangle "rides" on the average DPC

protection,

H777,

teo
FiqQure
3»20), =» Ipn Filgure 3=20,
components in the 5v regulator output

RCA)

rapidly,

3=19),

s
LodD15-f——z_,,,{S-[FmdD
e it ponrioy

3,4,9

(Main

the

Regulator)

L. and C are the
(see
paraqgraph

achieved

Peak Choke

voltage

riging

elements
¢ircult

across

while

the

the
¢freewheeling
output eurrent level,

inserting

Current,
1t

have

pass

stage

diode,

The

Page

P e

FREE WHEEHA|

Dioos Lawducts |
I

;

FIGURE

Current

3=21

Through

R(A)

Page

See P&ge GéA

FIGURE

3=20

Foldback Current Limiting Circult

From Main 5v Regulator

ASH LVALIO

Fage. GC
/

+1¢

AFHI0SISyNS~

X!
d)\

s/-H +

CAIS

Page

(IJout, the average regulator output current, can vary frolh near
2zero
to
about
25
Amps,
but
the triangular "echoke compenent" of eurrent
remalins the same,
The Peak ahd minimum current points are equidistant

above

The

and

below

the

opeTational

detector

amplifier

reset

current exceeds

drawing

average

curpent

the

a preset

through

value,

Figure

555

Timer

valuye,

R(B)

Ssetting the non=inverting (+)

inverting
(e)
fully negative

1input,
(=4v),6

R(A)

exceed

the

preset

beging

nhegative

¢0

3+29

(In

The

(E)

the

sServeS

regulator

trip point

and

R(C)

jinPut

(down

negative

loop),

value

to =5V)

with

threshold

when chock

preset

and thereby

Tre8pect

the

In
this
condition the opeamp output will be
Output current flow, through KR(A), balances out

blas

the

on the op=amp and,

preset

voltage

amplifier will amplify the difference,

ac¢ross

when the voltage across
R(B),

the

operational

O0nlY a few millivolts positive

differential 1g suffieclent to saturate
the
opeamp
output
near
+195
volts,
The
presence of pogsitive voltage on the op=amp output resets
the 555 and gtops conduction of the pass stage until
the
next
clock

cycle

pbegins,

Figure 3=22 {s a series of waveform sketches that show the
increasing

u
treut
t,

10ad current

Peak. cuyrrcert (, 5t,
Curkenl hmflmg,

enhobled

bheyond

trip

level

0of

the

result

current

liriting

NogmaL fif_“g“ wlqu curren'ft Lwfiffl!’k&
-~

T~ ~—

AR
U

Lovrg|

TM~

Lrgip |

the

FIGURE 327

Pu[ce Width
Increasing

Noete that as
wideh
(pass

(1)output
stage ON

Current component
its

peak,

The effect

Load

Current

BevYond

continues to rlse
time) will become

always

(I)output

triangular,

Trip

toward
(I)Trip,
the
pulse
narrower,
(Becayse the choke

1ts average value

halfway between peak

of narrowing the pass stage ON time

cycle

the

Output

voltage

waveform

the

applied

povwer

supplV,

the

Level

and

valley),

is to reduce

filter,

thereby

1is

1/2

the

lowering

duty
the

Page

A foldpack feature is built into this overload protection circuit,

operates because the preset bias, which sets the op amp trip polnt, is
determined by the output voltage so that a cCyrve of Ooutput voltage vs,

current will foldbacki

(see Flgure 3=23),

:[gt_:7fié;‘]:};l-.

\%;uT'

Lourpur
=

FIGURE

3#23

output veoltage/Current Foldback

3,4,9,2

Current Limit Circuit = +5B Reqgulator
NOTE

+5V
than main
other
Regulators
similar, (Refer to Figure 3e24)

are

In the +5B Regujater (MOS Converter) and in other H777 regujators, the

composite

lead

detector

element

choke

current

waveform

is mohitored hy a series

resistor in the collector cireuit of the povwer switch stage,
transistor,

the

basewemitter

Junection

PNP

Here the

gsignal

QCA),

collector cuprent in @(C) has the same form as that described
previous sectlion (see Figure 3=25),

1In

the

Page

FIGURE

Q(C)

Collector

3=25

Current

Waveform

When the (I)PK valye produces a voltage across R(p) that is sufficient
to overcome the V(BE) of Q(A) (approximately @,6V), the baSe begins to
draw current and collec¢tor current will f£low through R({) to reset the
timer
in
the
regulator
loop,
The
net result is the same as that

previously described,

Page

Se,e, p@fic 7 A

FIGURE

3=24

current Limit Circuit for +5B Regulator

LZS7/)LY F3Y)=A1°S_

| _

'l J

¥oay MOV4Ea1odINIXNINDLIWITIWIHOSdZsNNOdS+-SOWYIALNIANOD
.64

Vs
-1t

TRy

Page

€(A) provides noise suppression and eliminates premature reset due

the reverse pecovery current flowing into the free wheeling dlode (D),
a(p) and R(D) are used to create a preset blas

current

R(B)

through

V(oUT) is pulled down below the reference
This preset bias prodycegs a foldback

as
1inecreases
value
whoge
(V(REF)) by an ovyerload,

characteristic as described previously,

e Protection On +5, +5B
3,4,9,3 Crobar (Crowbar) Circuits Overvoltag
Figure 3-26) - Because each of the
and 420 Volt Regulaters (Refer to
ce a high voltage (Raw DCJ) atf
introdu
will
ors
above (+) ougput regulat
yre that prevents the pass
its 1load terminals 1in the event ofng,a fall
e¢rowbar c¢ircuits have been
element (power switch) from openi
is to

circult outPut
crowbar
on of a the
The actliacross
thelowload,
ect
Tregulator
included to prot
1mpedence
very
a

rapidly apply

terminals in the event of an excessive voltage appearing there,
NOTE

overvoltage
for
is
Circuit
A Crowbar
has nothlng
It
protection for the lead,
to do

with

overload

short

protection for the regqulator,

c¢ircuit

siliconecontrolled

The actual cpowbar element

momenNtary current

t0 cathode,

(SCR

rectifler

D(A)) that conducts heavily from anode to cathode, Ohce triggered by a
fpom gate

The trigger current is provided by another fourslayer device (SCR
Thig smaller device improves the accuracy of the (Crowbar
D(BR))
Circuit trigger voltage and assures an adeguate drive pulse for rapld
turpn=on of D(A), R(C) and C are tor lmproved noise immunity,

The actual trigger level for the circult is set by D(C) which bpeglns
to conduct once its zener voltage level has been exceeded ~ Conductlion
Jless

of p(c) prodyces a voltage across p(D) equal to the output value
the

vajlue,

zener

= V(OQUT)
V(RD)

V(Z)

current wlll
When this voltage (V(RD)) reaches approximately 2,6V,
causes
current
This
R(C),
yia
D(B)
of
gate
the
into
flow
begin to
also
which
D(A),
1Into
current
gate
c¢reating
ON,
D(Z) to switeh
switches

on == effectlvely

shortecircuiting

¢the

regulator

output

terminals,

Dca) will remain in condyction until its anode current falls

certain

(called "turn»off" time, 5¥ ysec) after which It agaln appears

open

below

level (called "holding current”, 1#@ ma) for a period of time

circulit,

Page

Note that 1f a pass transistor has falled
by
shorting
ceollector
to
the
Crowbar will remain in conduction indefinitely, sinking
large current from the raw DC gource,

emitters,

Page

);2%;2[[/9713&?

fl\

Similar crowbar circults are used ong
e

+5B

Y29

main

core

outpuf

reg,

FIGURE

Typical

3=26

Crowbar

Cilreuit

“

ouTLLUT

FROM

To protect D(A)
fast

blow

fuse

from this condition,

in series

with

the

RDC

each Crowbarred regulator

Page

has

source,

NOTE

internal

protection I8

provided

for

the
crowbar
devices
1f
an
external
source 0f power 1s connected across
the

output terminals

the H777,

3,4,9,4
Power
Fail
Detectors
(Refer
to
Figure
3=27) = The
H777
provides Unipus=compatible power fajlure signals (AC L0, DC LO), which
are used to

alert

power=down

sSequences,

the

processor

and

memory

durlng

power=up

and

The line drivers in H777 are of the open collector tvype and present
a
low
impedance to ground when asserted,
The slgnals are asserted when
the AC Power input is below preget volrage levels!?
9

V(rms)

8¢ V(rms)

The

that

for

line drivers Q(4)

display

for DC Lo

and Q(5)

are N channel

fleld effect

to groynd) as long as the gate to source blas voltage

when

transistors

a yery low ON resistance between drain and source (llne

this bias is made negative,

the deviges will Open,

hear

=zero,

presenting an

essentially infinite impedance to ground on the AC L0 and DC LO lines,

Page

Jee page T5A

FIGURE

3=27

power Fall and Sequencer Circuitry

,VOa

FT705AN0D

mil

02+I90,,

Page

The Field effect transistor
(FET)
1line drivers are controlled by
and E(3) whoSe output S¥wings grom +15V to
threShold detectors E(2)
The detectors
»15v depending on the relative polarity of the 1lnput,
that they are
ensure
to
feedback (via R(P) and B(S8))
employ positive

bistable, and not linear, in operation, Diodes D(F) and D(G) allow
only the negative detector output to appear on the FET GATE (Bias
voltage

zero or

«1i5v,)

This circult
Note that a third stage is also present, E(1l) and @(3),
the power
with
turns the noneMOs regulators ON and OFF {n sequence
¢aj)l signals,

so that a normal power=down anhd/or powerwup sequence can

be performed when the power supply 1s switehed to standby operatlon,

All three detectors have a common reference voltage (approximately 3V)
determined by dividing +15v by 3 via R(K) and R(y),

This reference 1is

applied to the (+) or noneinverting inputs of the oP=amb detectors,

The sensed voltages appear at the inverting inputs as fractions of the

volrage across capacitor C, The various detectors switeh from a high
output (AC Lo DC Lo uynasserted) when the regpective fractional
voltage reaches 5 volts (vice versa, as capacitor voltage decreases),

The timing capacitor #(C" ls charged linearly
source

(Q(1),

sequence,

R(D)»

R(C)y

etc,),

switched

current

Filgure 3=28 is a diagram of the

Page

77900 (% 20 Vol g

Voltaee o C

< ==F

Raw DL

|
[

"ON"

Rt(1) cap Voltaqge
Bt (2)

Cap

Voltage

PRt(3)

Cap

voltage

ecyrrent

souTce

+2¢,

turns

V(1);

+5,

sSwiteh

V(2):

Console

V(3)y

=5v

R(G)+R(H)+R(J)

= 5(R(GI+R(H)+R(JI+R(F))

§(R(GI+R(H)+R(JI+R(F))
R(J)

FIGURE

Power

enabled

unasserted

RH+RJ

v(3)

regulators

uynaSserted

VE1)=s5(R(G)+R(H)+R(J)+R(F)

V(1) = s(RG+RH+RJ+RF)
v(2)

15”“f?—‘g=;

16‘ 'irz. {%;

Fall

3+28

Detector

waveforms

Page

the

Dyring a power down sequence,

along 4an exponential

timing

determined

c¢urve

C(R¢F) + R(G) + R(H) + R(J)) or by the

c¢apaeitor

voltage

decays

Py elthel the RC product of

deereasing

value

raw

voltage drawing current f£rom C through diode Dp(C), Elther way, the
sequence Of events is reversed from the powér=up order,

(AC Lo

asserted;

disabled,)

asserted;

+5,

+20,

=»5

regulators

importance as long
puring power down, the relatlive timing is of less(see
Flgure 3Im29),
ined,
mainta
is
Lo
DC
as § ms between AC Lo and

Roe|. | fe—st miPl2

v(3), v(2), and v(1) are the same as above,
FIGURE

3«29

Power Down Sequencge

Page

3,4,9,5

Battery
e¢lrcuit

monitor

to
a

monitor
system,

Monitor Clrcults (refer
(located on the 5411597

the

statys

Tnhe®

H775

The battery monitor
which

monitors

the

Battery

H775

Battery

Backup

Unit

circuit
battery

contains
backup

Conditien

Lamp

to Figure
regulator

Off

H775

Flashing

Slowly
Lamp

(

H775

1,2

described

asgs

H778

when
in

employed

paragrapn

3,5,

diode

(LED)

follows?

present

battery

ils

(DEAD)

connected and

charged
»
Capacity <9Q%

HZ)

The battery
is emploved

Battery

discharged

Lamp

Unit

1lightwemitting

status

Status

Backup

3e38) »
module)

connected

battery

belng

1is

being

1Is

belng

Max,

and

battery

trickle=charged

Lamp FlaShinQ
Rapidily ( 5

The

monitor

HZ)

clrcultry

Capaclty

H775
used
is

three

2 or

is connected and
(DISCHARGE)

TIriple Nand Gate = Status

Plserete LED Driver/Enable Circule

Flaghers

The

Nand

turn

gates

the

LED

deCisions

Relaxation oscillators

operate

Driver

two

gtage

Max,

battery

sectionss

o«

>99%

system

status

accordingly,

(E(1),
(QCA),

E(2),

E(3))

Q(B))

(g(5),

E(4))

lines

(CHG)

relay

coil

and

Page

See Rage S04

FIGURE

3«30

Battery Monitor Circuits

7740by VO W DT
7

Zqou

3 “a A vl 7 dy|5§
_Wvou

Page

If the output of Ei, E2, or E3 is low, Q(B) {is turned on, causing
current to glow ContinUouslY through Q(A), Q(B), R(K) &ng the ConSole

LED (provided the wMon Enable® line is grouynded
Note

HT75),

the

plugging

that E(2) and E(3) can turn on the LED Driver also when

all of their inputs are enanled, This conditlion exists only when the
= see Section on Clock
respective flashers (Osecillators E(4) or E(5)
~

and 555 Timer for operation) have a high output,
The CHG MODE i{nput line i§s controlled by the

H775

according

the

following tapleg

CHG MODE

H77%

STATUS

Low

High charge rate

Hign

Trickle echarge rate

High

pDischarging (AC LO asserted)

(AC Lo UnasSerted)

voltage

The second status input is derived from the inrush relay coil

(clipped by p(A)), and merely indicates that the H?777 is turned QON, OF

in standby operation,

by a status (op truth) table;
Rasic operation is pest described
charge
Mode

Relay

@A
)
|
1

B(OfE)
i(on)
A(oft)
1(on)

LED

QFF
SLOW
FAST
0N

Switching

Electronic

3,4,9,6

State of

Non=MOS

Loads

(Refer

Figure

contains a pair
54e11601,
im31) = The MOS8 (Converter module,
+ or =15V ralls
¢onhect
that
Q(D),
and
Q(A)
switches,
splidestate

noneM0S

all

Loads in the BAlieL,

of
to

This is done to improve the usefyl

battery backesup time by disconnecting non=critical + or =15 Volt loads
when the main +5 regulator is disabled (either by eontrol switch or by
standby
1in
Anothey featyre is that,
losg of uytility power),

operation, M0oS memory canh be mMaintained while maintenance 1S perforted
on other sections of the machine,

The actual switeh circults are +15V and =15V,

Q(B))

1is

simply

driven from main +5,
oy

absence

stage

3,4,9,7

O0f +5,

driver

palr

The +185V switch

(Q(A),

of complementary commoneemitter amplifiers

the

presence

332) = This

eircuit

@A) saturates, or 1§ cut off, by

The =i5V switch is similar buf uses a common bage

(Q(C),

Battery Lo Detector (Refer

Flaure

performs
+ or =13V

once

a
memory
dreps out

asserted,

Sequence,

The

combination

lost its
creates»

function
in that it
during battery backup

until

result

[0 is

that

and

Bat

the

L0o)

M9301

that

the

feature

console

can

poard

voltage loss,
AC Lo and Bat

be disabled by removal

and

the

M9393@1,

the

rebpot on powermup or to resume operation,
This

asserted
remains

1f
ON

unasserted during a subsequent

contacts due t0 a
by
Iinteppreting

latches "bBat Lo"
operation,
Q(C)

Page

s8ignalled

MOS memory

The
Lo,

output
signals

sinCe

the

hasS

powerwup
(via

has

the

not

that
the
M93¥1
the processor to

memory

1is

intact,

jumper cable between

Page

} See/ (P@Q 5/\3/‘}

FIGURE

3+31

Electronie Switehing of Non MOS Loads

— AN

%\)MML.A—-yLOLVO
S/ LILTO

> S

.— s/ =N) O7T/IT(LDNDS5v/oO~r/WNLNeSIgdOZLlUroil/yV—eoAAS/pNN

&S/

g WTi =
Q@N

§mU)lm\

Page

See (Vage Y4/

FIGURE

Rattery Lo

3=32

Detector

d| .uAr.hAU.YDwavoyny3t|.\_I]
N 8

SOF IFNIZ
NO ImMd “dNl

Page

As with AC Lo and DC [os,

the driver

is an

Nechannel

(Junction

Fleld

Q(C) {8 oPened, or
(JFET), whileh is normally ON,
Transistor)
Effect
volts,
=15
¢to
Gate
JFET
turned OFF, by firing Q(A) to eonhect the
During
operation of the H777 either on utility power or on batterles
(MOS only)s the pat Lo line will be high (Q(A) is ON and Q(C) 1s OFF),
+15V bedlins to droop, dye t0 the conSole switch being turned off
When
or hecause the battery has been depleted, 0(R) will begin to conduct,
(Threshold
1level
{is
approximately
13y),
Current
1is then shunted
aroynd the prodrammable ynijynction transistor, Q(A), whieh
recovers,
or
tupns OFp,
Wwhen Q(A) stops conducting, the gate of the FET, Q(C),

resumegs

state,

[0 returns

to GND

level,

JIts

loweresigtance

QCA) will remain OFF, and Bat Lo ¥jill remain Low, unti]l
a
SuUpSedquent
powereyp
1s
performed
and
Q(A) is triggered onN by a negative level
(=15y) appearing on its gate,
The trigger veltage is derived from the
Hence, BatwLo remains low
on the AC po FET pine Driveyr,
Signal
Gate
during

powerelup

until

Lo d9oes

high,

Figure

3=33) = A

simple

serles

3,4,9,8

Keep Alive Power (Refer te

endble

the MOS Copverter to startup When enabled bY the gonsole PoWer

(linear) TregUlator 15 Used to keep the contaet circuits in the + or =
15 yolt portion of the Mos converter running at all times, As long asg
the H777 has utility power connected, there will be a raw DC Level
present, 7This RDC voltage ls reduced to a regulated +i2 volts toO

own
switch, DC ON, Onhce operating, the 4+ or =15y converter uses 1its power
control
output (+15) to digable the kKeep alive regulator and for
(for all internal circuitry), The keep alive function ig necessary to
permit TreStart, Should a + or = 15V oytbut be overlloaded, NoOte that

all other functions within the H777 depend on ¢ or = 15 volts from the
so they are disabled yntil {t has come up,
MDg Converter

The Keepsaliye circuilt 1s a simple serles pass and =zener diode
reguylator with protective current limiting provided by R(B), D(B), and
D(CY,

maximym available current
1s approximately?
1

maX

2,6V
o ®
®e

R(B)

(LTC) appears at the c¢ollector of a
The line time clock signal
satyrating amplifier ciprcult, which 1s driven by the secondary of the

poweyr

transformer,

Page

g0
56/
See
F

IGURE

3o33

5C
A

\m\ag3

* ANOD

{

Page

3,5

BATTERY BACK=UP

3,5,1

General

Description

The H77%5 EXxteInal Battery Back=lUp Medule is an

unjinterruptible

poWwer

soyrce designed primarily to provide DC refresh power to MOS memory in
the event of a power line outage or dip,
The
module
contains
a
24
volts,
5
Amp/hour battery, and a charging circuit,
It will supply up
to 54 wattsg into a consgtant power load, and will support
32K
of
Mpé

mémory
14=16

(28 watts) for a8 minimum of 2 hours,

Battery recharge time 1is

hourfig

Externally accessiple terminals are provided
external battery pack, should longer holdeup

for the
time pe

addition
necegsary,

The Stghdard features include an automatie Shuteoff cirecujit to prevent

the
pattery
charge statug

3,5,2

from discharging too deeply, (complete discharge), and a
signal for monitoring the condition of the pattery,

Mechanlecal

Configuration

The H775 i1s housed ina
5
174
x
19
|in,
box
suitable
for
rack
moynting,
with a depth of 4 1/4 in,
All input and outPuyt connections

are made threugh one 8epln connector, as shown In
Filgure
3e34,
Two
binding
posts
are
provided on the back for addition of the external
battery,
Fi9,
335
{s
a
dlagram
showing
input
and
output
connections,
The
onN=OFF
gwiteh {5 located on the front ¢f the box,
This {s also & twoepole
Dbreaker
for
input
and
output
oVercurrent
protection,

<«

Fieure

o=n

4 Jdh9 SE-&

L | dedd>o31eg , |%,

—

- DDA

ura)(tr .,

hxd%.lmfi.l.4a&1eI{dz)qOaae(Wdgduo.regoq7Alvbd f&bS|52U‘S0D4U5O,|.1_.‘jaonbflir2.ap\lafrq.|A®VwdAOBpLYN—V[“3TT[b)i4\d_y(l\|d?m.L"_@Ay= MW3T**_|
aa.fnimgv(z\q§|.£ocshm&|%29$w&“~m\g9\.D\&Q%%rq\wmw.\.:\\N261aeoT43N>e\ssrnp3ue]lsEM\V7m21\qvnemivudwd7)((s9As|fXNb3su3"wae8l
l'iyafie 59

Page

Main power Train = The front end of the charger circult is

Detaijed Circuit Description

3,5,3

3,5,3,1

boogt

voltage

circuit that employs indyctive Kick to step the raw 25

vDC of the H777 up to 45 volts, enough to charge the battery,

Q(A) is

turned

on,

the

output

cap

in Q(A) by tyrning on Q(B), which, in turn, terminates the ON time

Fig,

3=36 shows the maln body of the regulator,

putting the raw DC across the indyctor L, and the current 1I(L) starts
to rise., After a preset length of time (25 yse¢), Q(A) turns off, At
this time, tne voltage at the collector will climp high enough to turn

DCA), ON and the energy stored in "L" 1s dymped into

C(A),

R(A) i{s a current sense resistor,

Figure

Q(A),

main power

This limits the peak cyrrent

3=37 {5 5 graphic illustration of the operation of the

train,

3,5,3,2 Congrol Circult = The regulation scheme 1s shown in Flgure
This
The output voltage 1§ djivided down by R(G) and R(H),
Im38,

voltage is sensed by El and compared to the
usedq

varlable

frequency

reference

oscillator,

The

D(B),

current

source,

consisting of Q(C), R(D) and the output of Ei, chardge up C(B) to the
At this time, the output of E2 will go lo¥w and
threshold o¢¢ E2,
as a one shot, The output of E3 goes hilgh
used
trigger E3, which is
for a fixed perlod of time, determined by R(C) and C(D), and turns on
the main gwiech for this perlod,
terminate tnils pulse by pulling

The peak current detectoyr can
down Pin 4, the reset pin, onh E3,

shoyld the oytput voltage on C(A) try to go too high, the output of El

will

down

and

lower the frequency of E2,

timing relationsnips between varjous voltages,

Fiduyre 3I»39 shows the

Page

RAW Dc

AANAL
>

D'
Tom

-IL

ouT

+lefl\L'\\L~

\/QA

To Base

QAM

>~ DRIVE cKkT
|

T REsSET

PiN of 555

GND

FIGURE
Main

Power

Traln

3=36
Boost

Regulator

_
’

Page

Va/TAGE ANVD CuRrenT Titdinvg R LATIoN S #10S
4 A 25>u&11,
{, = Som~ses.

DeTecToR

PEAk

Cukkepr

‘
%

e1
|

NoRmAaL PULSE W I PTH
L == (PEAK CURRENT UNNECESTARILY HNIeH)

K PeAk CURRENT DETECTOR TRIGGERS
PulSeE

FIGURE

TERMINMATED
3=»37

Operation of Main Power Train

Page

See Foge 73
A

FIGURE
Regulation

3+38

Ccontro)l

Circultry

fase 75 A

)

iH3uYynd

Yal3i0yd

z3—1

A
Q

Page

3,5,3,3

Charge

illystrated

1in

Rate

Control = The

Figq,

Jed,

chargde

Initially,

Q(D)

eontrol

and

Q(G)

section

are ON

and

the

battery 18 Charging at a rate determined by the output voltage on C(A)

minus
the
pattery
nominally 9,% Amps,

voltage
and
The gate
of

the
¢two
Q(H),
a

reslstors
R(L) and R(M)j
programmable
unijunction

transistor, is set at 5,1V by D(D),
The battery voltage, divided down
by R(J) and R(K), will rise during charging, When the anocde
of
Q(H)

rises

Just

This,

happenss,

Q(C)

slightly
will

tuyrn

Wi}l

above

the

turn

Q(D)

charge state, and the trickle
difference

50 ma,
is

petween

V(CA)

OFF,

current

and the

Wwhen this

gate, @(H) will turn ON,

longer have any base

drive,

This

valve

and will

¢turn

the

defined as

battery voltage,

determined

and R(N),

oFF,

trickle

bpy

the

nominally

The clpcylt will remain in thils state until either the battery

needed or

system

turned off,

Page

Ve, 7/[/[/
£2 ovrevr

CPIN 3)

)

£3 oureur

‘

2, = 50 ppsec

(Dffifm-rmso Ry ovrvapr
oF

'ti L 25 urec

drfiT LY 6uTPuT
of owe-r Hor E3I)
(MY BE

FIGURE

Relative

Timing

CoMPARATIR)

TERMUIVATED
CURREAT

3=39

the

Two 555

Timers

BY PS5Ak
DETECTOR)

Page

FIGURE

Charge

3~40

Control

Section

Page

BATFERY 1S

—

‘

VeLrAGE

BATTERY 15

6% cHARGED

BATTERY 3°|

]

/& OVERC HAREE

—

{

CHAVEE. ToO

a—

The above graph shows the relationghip betwéen the battery voltage and

the charging current vs time at room temperature_ The time scale is a
fynction of e¢emperature and pattery aging, rthe gimes 1indlcated will

decrease® by as muych as 5@% at the two temperatyre extremes (¢ C and 65

C),

and

decreases

acceptance

charge

As the pattery ages, lts

Voltage rises earlier in the charging cVYcle,

the

3,9,3,4 Battery Output Section = The output section of the HT75 is
3=41, The BATTERY OUT line SenseS tnhe raw DC of the
shown in Fig,

H777,

D(K)s

QCr)

will

D(H),

Wigh D(F) onNs the pattery

will

regulators

returns,

set

D(J),

and

supply

the

and

shuts

turn

ON,

This turns ON @(p) and lets gate current

until

oneé

tlow into the SCR, D(F),

MOS

wWhen this gets pelow the reference,

resetting the SCR, Or

twe

thing$

The

ofcursg

battery

depletes

The

raw DC

In the latter case, the system is completely disabled
itselt off,
comes back yp and the +5 yolts froM the mQS regulator
DC
until the raw

returns,

3=42 snhows the self turneoff feature, When the raw DC 1is not
Fig,
present and the pattery 1s discharging, Q(S) and G(T) are ON and the

relay is in the closed position,

belew

the

zener

when the battery voltage drains down

voltage (D(P)), Q(s8) will turn OFF fol)lowed by Q(T)

and the relay will open and prevent the battery from

discharglng

deeply and causing a serlous degradation of the cycle life,

too

Page

See Wafie A
a

FIGURE

Output

3=41

Cilrcult

98§

My 2T

X WAYR(

S W A r yYTL

C
E
I
S
d
b
O
L
F
g
SYoLeI)(nL93YiH“.
AY3ULYF
+

Page G ¢ A

Page

Rty

“Omoemey

ORI

yay

[1|i(F—L=

R or—r)

Ttomenssy 0 O Slmwemgny T

G-

FIGURE

3=42

Self=Snuytotf

Clrcuit

BATTERY

ouT

3,5,3,5

Page

100

shown

When the battery is being tricklescharged, or

when

Charge Rate Signal = The charge status

signal

Fig,
3Imd 3,
The purpose of this signal 1is to tell the H777 what
charge mode ¢he patery is in, Wwhen the battery is in the fastechargqe
mode, Q(G)s QCU) and G(V) are all ON and the Signal 1S low

(= or <2,4V),

discharging,

the

signal

1is high (+5V),

This was desligned to be

compatible with battery monitor circuitry in the H177,

Page

s
&

STATUS

SlewAL

FIGURE
Charge

3«43

gtatus

sigpal

CHARGE |

sTarys

Mo DE

SIeMAL

FAST

S o4y

TRIckLE

+5 W

Disciagee|

1+5¥

141

Page

CHAPTER

BAi{~,

4,1

MAINTENANCE

GENERAL

BAll1=[,

procedures

majingenance

preventive

maintenancge

maintenance consists

prevent

fallures

and

are

divided

corrective

specific

tasks

Iinto

two

maintenance,

performed

cateqgorliess

Preventlve

periodically

caused by minor damage or progressive deterloration

due to aging, Corrective majintenance is performed to isolate a
or malfunetion, or to replace a defective requlator,

4,2

122

fault

PREVENTIVE MAINTENANCE

Preventive Mmainrenance tasks
consist
of
mechanical
and
electrical
All maintenance schedules should be established according to
checks,

site,
installation
particular
at the
eonditions
environmental
should be performed as often as required to enable
checks
Mechanical
fans and air filters to function efficlently,
All
other
preventive
maintenance tasks should be performed on a reqgular schedule determined
1400
every
is
A recommended schedule
by reliapility requirements,
first,
operating hoyrs or every three months, whichever occurs
A preventive

maintenance

10g book should be established and

necessary

This data, complled
according to a regular schedule,
made
entries
over an extended period of time, can be very useful
in anticipating

possible component

fallure,

Mechanical/Electrical

4,2,1

~ The following is a 1ist of the steps required
and physical

care of

for

mechanlcal

checks

the RAlleLy

Cheek all tans to ensure that they are not obstructed in

any

way,

head screws,
Philliphs
FRemove console by removing four
water or by
in
by immersing
¢tllter and clean,
Remove air
fllter
replace
£ilter,
blowing dipt out wigh air qun, Dry
and

Console,

Page

Inspect

all

wiring

deterloration,
Repalr

replace

Inspect the

and

cables

kKinks,
any

defective

following

for

strain,

for

e¢uts,

and

breaks,

mechanical

wiring

mechanical

cable

Inspect

power

supply

discoloration,

Replace

capacitors
as

required,

for

frays,

security,

covering,

security:

assemMblies,
Jacks,
connectors.,
switches,
regylators, tans,
capacitors,
screws,
nuts,
Tighten or replace as required,

143

LED

Holder

power
supply
clamps,
etc,

Jleaks,

bulges,

CORRECTIVE MAINTENANCE

4,3

The H777

Power

power

supply consists

system

flow chart
chapter

fallyre

(flgure

e¢an

4{isg

4e1),

fleld replaceaple modules,

digcovered,

set,

utllized

the

following

and power
1isclate

the

gtepg,

supply

once

description

malfunction

agsoclated

1in

faulty

module,

4,3,1

Voltage

Regulator

Checks

There are no adjustments on the H777 power supply,
The
power
voltages
are supplied by the requlators listed in Table 4+1,
the

followling

steps

Using a DyM,

condictiong

shoyld pe

ensure

measure

the

replaced,

that

the

voltages

the output

backplane,

(Rememper

are

voltageg

within

under

tolerance,

normal

outrofetolerance

yoy need a

SUpPPly
perfornm

1% meter

load

regulator

tO measure

tolerance correctly),
2,

Using
an
oscllloscope,
measure
eontent# on all DC outputs (Table

the
4=1),

peaketospeak

ripple

HI7T POWER SUpPPLY

4,4

The five maln subassemblles inside the supply can be broken down
into
two
categorjes,
First,
those that can pe removed from the assembly

without

the

LA K

removing

removal

F- R N

Ripple

the

whole

supply

supply,

The

atfect

second

their

are

those

require

removal,

F-L B

current

ground Probe,

that

must

That

iss

measured

a GND

using

line no mope

scope

than one

probe

inch

with

long,

tip

Page

FIGURE

4e1|

H777 Fault Isolation Flew Chart

104

{®T PowmER Diste myTi)

Page 104 A

HRARD MERASURE REG
OU
TPUT VOLT
AGES

ARl ' Lotk PINT

BRcebLae

HARNESTRS § V4LTREES

OW BRCKPLAVE @Ni
CHeclkk cBA., IS
RC

\F Raw D Cuk

PREEQT

SIENAL.
THE

;
CHECR

RAW

]

Jeoikee

ArE

PRESENT

JUTRUT

PLce THE

pDeFecniuE

RESULRTOR

A SSOC\RTED

WYTH

o gTRUT

CHECK FA 6N
SEC NGE A

I CHREC
e 2158

}

REC UMK

CLock.

g CREE K. CONSHTE
{ QoNTROL QABLE
FOR. ON

JN6NH-

REPLRCE FAOLTY ’
REQULETIR

NI
TOSE

oL wt

Blow

UNLESS N REGULATOR Was
IWERAUNL
PROR LEM

“levks Y-¢

W777 FRUL

RAD, RE-

+SV

covtRoOL

ISOLKTWONY . Flod

cyuaTy

Page

TARLE

1@5

4e1

REGULATOR OyTtPUT SPECIFICATIONS

REGULATOR
+5V,

MAIN

MOS Regulator

TOLERANCE

CURRENT

+3V

+ or = 5%

de2bamps

+ Or = 5%

Pw2amps

«15,58
{5V
+5B

+ or = 5%
+ or = 5%
+ O » 5%

all four
outputs
dm4amps

3%
3%
3%

+20V

+ or = 3%

Bebanps

+15,58

+ or =» 5%

+18V

Core RegUlatol

MAX PeP RIPPLE

QUTPUT

+ OF = 5%

*5V

shared with

Adeqamps

H777 power SypPly Removal

4.4,1

WARNING

Turn oftf DC power control switch on the
the circult breaker
off
turn
congole,

cBy, and disconnect the AC line cord

1in

to engure that the Battery
order
this
Backup Option will turn itself off,

Disconnect the conscle power control cable (CPZ2),

RemoVe four console mounting Sclrevws$,

,
Disconnect the backPlane harness, the powel controltionharness
poard,

Disconnect the logle fan AC plug,

Remove one botton, four side, and two rear mounting screws,

Lift tne supply stralght up to remove,

T{1t consSole forvward to

remove CP2,

and battery backup harness from the Power Distribu

Removal of H777 Power Supply Subassemplies

4,4,2

The following proceduyre covers the removal of the main components of
the supbly, Any interaction is sPecitied, The majoer components ares
supply cover

Power

AC control Assembly (remove the supply f£irst)

Page

Fan

MOS

Regulator

Main 45V regulator
MOS regulator

Power

4,4,3

106

Suypply

(removVe

from the

Cover

the

supply £irst,

then remove

the

supply),

Removal

Turn 0ff circult breaker CB1 before removing cover,

TUrn console sWitch to OFF position,

WARNING

I1f console switch 1s shut off first, the
internal
raw
DC capacitors will remaln

charged to approxjimately 4¢ volts,

The power supply cover is mounted by seven screwsy
top
and
four
on
the
side
(see
figure 4=2),
stralght up

to remove,

To Be jupplf'eo(

FIGURE

4+2

on
three
Lift cover

Page

4.,4,4

Removal

Control

107

Assenmbly

WARNING

for
Wait
Turn off ecircuit breaker CB1l,
12
(about
drop out
to
relay
surge
Then turn off console
seconds maximum),

switeh and ryemove AC
Turn off H775
socket,
unit,

1line plug from
Battery Backup

1f present,

Remove the supply first

(See paragraph 4,4,1)

Remove the screw from the fan bracket on top of fan,
RempVe the four pottom mounting Scre¥s from
base

the

transformer

the

relay

(T1),

transformer

RemoVe the

(T1)

outputs from the 43 regulator

outputs

(TBi),

and

(K1)

Disconnect the loglic and power supPlY fan connectors,

T{l¢ the

hreaker,

asseMbly

expose

the

bottom

Remove the line cord fagtoon tabs,

the

DiseOnnect console capble from #3V regulator,
Lift out the assenbly,

404,5

Fan Removal

(Powel

Supply)
WARNING

for
Walt
Tyrn oftf circuit breaker Cpil,
180
(about
out
drop
to
relay
surge
console
off
turn
Then
maximuym),
seconds
1line plug from
remove AC
switch and
up
back
battery
H775
Turn off
socket,

unit,

Remove

plug

present,

from

fan,

pemove screw from AC centrol bracket on top of fanh,
RempVe tWwo screws from pottom of sheet metal,
Lift

out

fan,

eircuit

To i{nstall a new fan,
replacement

494,5,1

remove

fan and reverse

Fan

Removal

the

brackets

from

removal

old

fan,

procCedure,

Page

108

Ingtall

(Logic)

WARNING

Remove
breaker

Remove

AC
CBi1

plug

Remove foyr
(KY{i1«LA or

plug
or
turn
before removing

from

off
f£an,

circuilt

fan,

console mounting
KY11«LB) forward,

screws

and

tilt

the

console

Remove alr filter,
Remove

MOS

444,06

tour

mounting

Regylator

Removal

screws

from fan and

11ttt

oyt

the

fan,

all

data,

WARNING

Turn off circuit breaker CB1,
wait
for
syrge
relay
to
drop
oyt
(about
10
seconds maximum),
Then turn off console
switeh
and
remove
AC
1line
plug from
socket,
Turn off
H775
battery
backup

unit,

1£f

present,

¢he

405

regulator

Remove

MJ]

battery backup option cable,

RempoVe

two

mounting

Remgve

two

screws

Turning

off

will

cause memory

screvws

holding

edge

heat

Lift requlator board andgd remove
Power

Distribution

lose

board,

sink,

MJ2

9.pin

Board,

Disconnect

RemovVe

regulator

MOS

cable

from

requlator

assembly,

board,

Mate=NelLOK

from

Page

109

Main +5V Regulator Removal

4,4,7

WARNING

Turn

off

starting,

circult

CBl

breaker

before

Obhserve warning specified {n

Paragraph 4,3,4,

The MOS regulator must be removed
requlator

prlor

removing

the

main

+5V

(See 4,3,4),

Rempove M0S REGULATOR FIRST (Paragraph 4.3,4),

RempoVe TBi connections,

Disconnect packplane harnesses trom Power Disgtrinution poard,

Disconnect power coentrol connector

from

Disconnect 34 cable from console,

Remove Console first,

RemoVe Screws from power distripution assemblY,

Remgve screws from bottom of the +5V regulator,

Remove the Regulator and Poweyr Digtribution Assembly,

Roard (if present),

Power

Distribution