KS10-Based DECSYSTEM-2020 Technical Manual

This technical manual, "KS10-BASED DECSYSTEM-2020 TECHNICAL MANUAL" (EK-0KS10-TM-002), provides detailed information for the maintenance and training of the DECSYSTEM-2020, a low-end member of Digital Equipment Corporation's 36-bit DECsystem-10 and DECSYSTEM-20 computer families.

The KS10 mainframe forms the core hardware. Its primary components include:

• Central Processor Unit (CPU): A microprogrammed unit (KS10-PA card cage) executing the DEC 10/20 instruction set and supporting TOPS-10/20 operating systems. It features a 512-word cache, 8 blocks of 16 general-purpose registers, parity checking, and a 300ns microinstruction cycle time.
• MOS Memory System: Ranging from 128K to 512K 36-bit words (expandable), with a 0.9µs cycle time. It includes 36 data bits plus 7 error detection and correction (ECC) bits for single-bit error correction and double-bit error detection.
• Console (CSL): An 8080A microprocessor-based system that provides operator and maintenance interfaces (local via CTY terminal, remote via KLINIK line), generates and controls system clocks, and arbitrates the internal KS10 bus.
• I/O Devices: Peripherals connect via Unibus Adapters (UBAs), which interface the KS10 bus to Unibus devices. A typical configuration includes two UBAs (one for disks, one for other devices like tape drives, line printers, card readers, and communication lines).

Key System Operations and Architecture:

• KS10 Bus: An internal, synchronous backplane bus that serves as the control and data path between the CPU, memory, console, and UBAs. It uses a multiplexed 2-cycle transfer for command/address and data.
• Address Mapping: The CPU translates 18-bit virtual addresses to 20-bit physical addresses using paging hardware and a cache. The UBA also performs virtual to physical address translation for Unibus device accesses via its own paging RAM.
• Instruction Set: The KS10 has a 396-instruction set, including data transmission, arithmetic, logic, program control, and I/O operations, with an EXTEND instruction for future expansion. Unimplemented User Operations (UUOs) provide trapping mechanisms.
• Machine Modes: The system operates in "exec mode" (full control for OS) and "user mode" (restricted access).
• Priority Interrupt System: Handles requests from Unibus devices and the processor itself across eight priority levels.

Maintenance and Differences:

• The manual details front panel controls and indicators, console commands for system control (boot, reset, examine memory, diagnostic functions), and remote diagnosis modes.
• Differences from the KL10: The KS10 supports both TOPS-10 and TOPS-20 paging, implements only "section 0" addressing (256K words virtual memory), lacks certain KL10 machine submodes, and uses a new I/O instruction set with specific interrupt handling variations compared to the KL10-B. The Unibus also has specific restrictions regarding NPR data transfers and interrupt handling.

Overall, the manual serves as a comprehensive technical reference for understanding the KS10's hardware, operational principles, and unique characteristics.