VAX-11/730 IDC Technical Description

The VAX-11/730 Integrated Disk Controller (IDC) is a key hardware component of the RB730 disk subsystem, serving as the interface between the VAX-11/730 CPU and its associated disk drives (supporting up to four RL02 drives or a combination of one R80 drive and up to three RL02 drives). Its primary purpose is to manage data storage and retrieval.

Physical and Basic Description: The IDC is a single hex-size module (M8388) that plugs into the VAX-11/730 backplane, drawing approximately 55 watts of DC power. It connects to the disk drives via dedicated ribbon cables.

Core Functional Capabilities: The IDC's operation is initiated and controlled by the CPU. Once a function is commanded, the IDC's internal microcontroller takes over to manage the disk drive operations. Key functions include:

1. Disk Drive Selection and Monitoring: It selects the specified disk drive and continuously monitors its operational status, alerting the CPU to any changes.
2. Command Execution: It translates CPU commands (like Seek, Get Status, Read Header, Write Data, Read Data, Write Check, and R80-specific Write Format) into the serial or parallel formats required by the respective RL02 or R80 disk drives.
3. Synchronization: The IDC synchronizes its operations with either the selected disk drive or the CPU using various internal and external clock signals.
4. Address Location: It locates specific sectors on the disk by comparing CPU-provided addresses with header information read from the disk.
5. Data Transfer: It handles single or successive block data transfers between the CPU and the disk drives. RL02 sectors are 256 bytes, while R80 sectors are 512 bytes. The IDC features two internal data buffers (each up to 512 bytes) that allow simultaneous data transfer to/from the disk and access by the CPU, optimizing throughput.
6. Data Integrity Verification: It generates and compares coded words (CRC/ECC) during write and read cycles to ensure data integrity.
7. Status Reporting: It generates a comprehensive status word for the CPU, detailing the outcome of operations, detected errors, or changes in disk drive status.

Internal Architecture and Operation: The IDC utilizes a complex internal logic, orchestrated by a microcontroller and its associated PROMs, to execute its functions. Key logical components include:

• Control Status Register (CSR): Configured by the CPU, it initiates IDC functions and provides overall status.
• Disk Address Register (DAR): Stores the target disk address (cylinder, head, sector) for operations.
• Data Buffers (FIFOs): Temporary storage for data during transfers.
• Clock Control Logic: Manages the various clocks needed for synchronization across different interfaces and operational phases.
• Data Path Components: A series of elements like serializers, data shift registers, NRZ data formatters, MFM encoders (for RL02), read data separators, and disk data multiplexers that handle the conversion, encoding, and routing of data.
• Error Detection and Correction Logic (ECC/CRC): Ensures data reliability and can report specific error types and positions.
• Skip Sector Control Logic: Manages defective sectors on R80 drives, allowing the IDC to automatically skip them if enabled.

Program Interface and Maintainability: The CPU interacts with the IDC via specific registers (CSR, BAR, BCR, DAR, MPR, ECC registers, etc.). The IDC also includes maintainability features such as a maintenance mode for diagnostics, data loopback for self-testing, and write/timeout inhibits to protect data during testing.

In summary, the VAX-11/730 IDC is a highly integrated and intelligent controller that provides a robust and reliable interface for disk storage within the VAX-11/730 system, automating complex disk operations and ensuring data integrity.