KA650-AA CPU Module Technical Manual

This "KA650 CPU Module Technical Manual" provides a comprehensive technical overview of the Digital Equipment Corporation (DEC) KA650 CPU Module and its associated MS650 memory modules. It is intended for design engineers and application programmers familiar with the Q22-bus and VAX instruction set.

The document covers the following key areas:

1. Overview of the KA650 CPU Module:

   • The KA650 is a quad-height VAX processor module designed for the Q22-bus (extended LSI-11 bus).
   • The KA650-AA model is for high-speed, real-time, and multiuser/multitasking environments.
   • The KA650-BA model is functionally equivalent to the -AA but is for workstation use and does not support multiuser VMS/ULTRIX operating system licenses.
   • Key components include the CVAX chip (Central Processing Unit) with a 1 Kbyte first-level cache, a CFPA chip (Floating-Point Accelerator), a CMCTL chip (Main Memory Controller) supporting up to 64 Mbytes of ECC memory with MS650 modules, an SSC chip (System Support Chip) for console/boot functions and timers, and a CQBIC chip (Q22-bus Interface) with a programmable address translation map.
   • It features a two-level cache (1KB first-level, 64KB second-level) to enhance CPU performance.

2. Installation and Configuration:

   • Details the physical installation of the KA650 and MS650 modules into Q22-bus/CD backplane slots, including slot placement and cable connections.
   • Explains how to configure power-up mode, break enable, and console serial line baud rate using either the H3600-SA CPU cover panel or the KA630CNF configuration board.
   • Lists compatible system enclosures (e.g., BA213, BA123-A, BA23-A, BA11-S) and their power and slot characteristics.

3. Architecture:

   • Describes the internal architecture of the KA650, including its central processor's state (registers like GPRs, PSL, IPRs), supported VAX data types, and instruction set subset implemented in microcode.
   • Covers memory management in detail, including the translation buffer and control registers.
   • Explains exceptions and interrupts, distinguishing between maskable and nonmaskable types, and detailing hardware-detected errors and the hardware halt procedure.
   • Provides specifications for the floating-point accelerator, and the organization, translation, behavior, and error detection of both first and second-level caches.
   • Details the main memory system, including its organization, addressing, write behavior, and error detection/correction via ECC.
   • Describes the console serial line interface, its registers, break response, and baud rate settings.
   • Outlines the time-of-year clock and programmable timers.
   • Explains the boot and diagnostic facility, including ROM memory, battery-backed RAM, and the initialization process.
   • Provides an in-depth look at the Q22-bus interface, covering address translation (Q22-bus to main memory, CDAL bus to Q22-bus), interprocessor communication, interrupt handling, DMA, and error handling.

4. KA650 Firmware:

   • Describes the functionality of the resident firmware (VAX-11 code in ROM), which provides diagnostics, an interactive console command language, and bootstrap/restart capabilities.
   • Explains the halt entry, exit, and dispatch mechanisms, power-up sequences (including initial power-up tests and console device location), and LED codes for fault isolation.
   • Summarizes the console service, including control characters, command syntax, address specifiers, and a comprehensive list of console commands (e.g., BOOT, EXAMINE, DEPOSIT, SET, SHOW, TEST).
   • Details the bootstrapping process, including supported boot devices, boot flags, and device-dependent procedures (disk/tape, PROM, network).
   • Outlines the machine state on power-up, memory layout, and public data structures within the firmware EPROM.

5. Appendices:

   • Appendix A provides physical, electrical, and environmental specifications.
   • Appendix B lists VAX memory and input/output address assignments.
   • Appendix C details the Q22-bus specification, including signal assignments, data transfer protocols, DMA, interrupts, control functions, electrical characteristics, and wiring.
   • Appendix D provides a list of acronyms used in the manual.

In essence, the manual serves as a complete technical guide for understanding, installing, configuring, and troubleshooting the KA650 CPU module within a DEC Q22-bus system environment.