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EK-DEBNI-IN-002
May 1990
73 pages
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Document:
DEC LANcontroller 200 Installation Guide
Order Number:
EK-DEBNI-IN
Revision:
002
Pages:
73
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OCR Text
DEC LANcontroller 200 installation Guide Order Number: EK-DEBNI-IN-002 The DEC LANcontroller 200 adapter (also known as the DEBNI controller) is an Ethemet/802 controlle: for systems that have a VAXBI bus. This guide is intended for use by DIGITAL customer sefvice representatives and self-maintenance customers who install the DEC LANcontroller 200. digital equipment corporation maynard, massachusstts Firet Printing, May 1860 Revised, April 1080 The information in this document iz subject to change without notice and should not be construed a8 8 commitment by Digital Equipment Corporation. Digital Equipment Corporation assumes no responsibility fer any errors that may appesr in this document. The software, if any, described in this document is furnished under a Jicense and may be used or copied only in accordance with the terms of such license. No responsibility is assumed for the u: 2 or reliability of software or equipment that is not supplied by Digital Equipment Corporation or its affiliated companies. Copyright ©1982, 1990 by Digital Equipment Corporation. All Rights Rerorved. Printed i U.S.A. The following are trademarks of Digital Equipment Corporation: DEBNA PDP VAXcluster DEC LANcontroller UNIBUS VMS DECUS VAXBI DEC DECnet ULTRIX VAX VAXELN FCC NOTICE: The equipment described in this manual generates, uses, and mey emit radio frequency energy. The equipment hee been type tested and found to comply with the limits for & Class A computing device pursuant to Subpert J of Part 15 of FCC Rules, which are designed to provide reagoneble protection ageainst such radio frequency interference when opersted in 8 commercial environment. Operation of this equiprient in a residential area may cauee interference, in which case the user at his own expense may be required to take meagures to correct the interference. Contents PREFACE vil CHAPTER 1 INTRODUCTION ;--: 1.1 BASIC FUNCTIONS 1-1 1.2 PHYSICAL DESCRIPTION 1-4 21 CHAPTER 2 INSTALLATIO 2.1 INSTALLATION 2-1 22 INSTALLATION VERIFICATION PROCEDURE 2-4 23 INTERNAL ETHERNET CAEBLE 2-6 24 FIRMWARE CONSOLE-ENABLE JUMPER 2-8 25 REMOVAL 2-9 3.1 HOW TO RUN SELF-TEST 3-1 3.2 33 REPORTING SELF-TEST RESULTS 3.2.¢ Self-Test Resuits in LEDs 3.2.2 Self-Test Resuls in the Power-Up Dlagnostic Register INTERPRETING T=:T RESULTS fl 3-2 ____ 3-3 3-3 3-3 Contenis 34 TESTED COMPONENTS -4 35 UNTESTED COMPONENTS AND FUNCTIONRS 3~5 s e s i i i s APPENDIX A ENVIRONMENTAL REQUIREMENTS A-1 L i e e s i i i i APPENDIX B REGISTERS APPENDIX C BOOTSTRAPPING WITH THE DEBN; C-1 C1 NETWORK BOOTING C-1 C.2 INVOLUNTARY BOOTING Cc-2 HOW TO READ THE DEBNI ETHERNET ADDRESS D-1 D.1 SYSTEMS WITH DECNET D-1 D2 VAX 6XXX SYSTEM D-1 D.3 VAX 82XX/83XX SYSTEMS D-2 D4 VAX 85XX/87XX/88XX SYSTEMS D-3 APPENDIX D DEVICE REGISTER (DTYPE) VAXBI CONTROL AND STATUS REGISTER (VAXBICSR) BUS ERROR REGISTER (BER) POWER-UP DIAGNOSTIC REGISTER (XPUD) B-1 8-3 B-5 8-10 B-17 Contents APPENDIX E HOW TO UPGRADE A DEBNA MODULE TO A DEBNI MODULE E-1 R R e e S E ey HDEX FIGURES 11 DEBNI Module in a VAXBI System 1-2 1-2 DEBNI! Block Diagram 1-3 2-1 Cebling at the DEBNI VAXB! Connector 2-4 2-2 Firmware Console-Enable Jumper 2-9 3 LED Locations 3-4 E-1 ROM and Label Locations E-2 R T B R S Fr T TABLES 1-1 Packing List for DEBNI Option 14 1-2 Cabinet Kits for DEBNI Options 1-5 2-1 Pewer Connectlon for internal Ethernet Cable 2~2 2-2 Internial Ethernet Ceble Pinouts (On VAXBI Beckplane) 2-6 2-3 Trangcelver Cabls Connector Pinoute 2-7 B-1 Reglsters Ussful During instaliation—Summary B-1 B-2 Codes for Blit Types B-1 PAGE VI INTENTIONALLY LEFT BLANK Preface Purpose of This Manual This manual describes how to install the DEC LANcontroller 200 adapter. The DEC LANcontroller 200 provides an interface between an Ethernet/IEEE 802 !ccal area network and a system that has a VAXBI bus. This manual also describes the adapter’s self-test and gives advice for troubleshooting. The DEC LANcontroller 200 is also known as the DEBNI controlier. Throughout the rest of this manual, the DEC LANcontroller 200 is referred to as the DEBNI. intended Audlence This manual is for DIGITAL and customer personnel who install or replace the DEBNI in the field. Document Structure This manual has three chapters and five appendixes, which are described below: Chapter 1 briefly describes the DEBNI module: its functions and what you should have received. Chapter 2 describes installation of the module. Chapter 3 describes the module’s self-test and how to interpret the results. Appendix A gives environmental requirements for the DEBNI module. Appendix B gives register information. Appendix C describes booting with the DEBNI module. Appendix D explains how to read the DEBNI's hardware Ethernet address. vil Prafacs Appendix E explains how to upgrade a DEBNA module to a DEBNI module. Agsoclated Documents The DEBNI is one of a family of processors, memories, and adapters that use the VAXBI bus. The VAXBI Options Handbook (EB-32265-46) provides a technical summary of all VAXBI modules. Other related documentation includes: DEC LANcontroller 200 Technical Manual, EK-DEBNI-TM DEC LANcontroller 200 Programmer’s Guide, EK-DEBNI-PG Ethernet Installation Guide, EK-ETHER-IN Conventions All addresses are in hexadecimal (hex). All bit patterns are in binary notation. All other numbers are decimal unless otherwise indicated. Ranges are inclusive. For example, the range 0—4 includes the integers 0, 1, 2, 3, 4. Bits are enclosed in angle brackets (for example, <12>). Bit ranges are indicated by two bits in descending order separated by a colon; for example, <12:1>. Bit ranges are inclusive. K = kilo (1024); M = mega (1024**2); G = giga (1024%*3). The term “asserted” indicates that a signal line is in the true state. The term “deasserted” indicates that a signal line is in the false state. “Assertion” is the transition from the false to the true state. “Deassertion” is the transition from the true to the false state. vl mmxxxxmmxx&mmmmmmxxxxwmwmmmx mmmmmmnnmmxxmxm EOOOCGRO0NGOCOBHXIKINOGCNCNRONNIKK OGO IGOOOOGGGOOOONGEGRONINOO0ONCNNGHNNOX KCOOGNGOOOaNCO00N00N0GON000N0N0000GNMN 00 HONCOGSHGOARNCHOG0NNOGOGIGGEON0OOONNOOMHX S G000 0$0.00.0.0.00:0.600000.00000.000880700604¢ XOO0O3000G000G0N0ORONNNNOOIRXINN0N HNGO0OCOOONGONGNN0N0NOGNN0000NOIX HHGOOLINN0G0GCONNNONNIGINNNN0K XEHUCCOCEONNOGHAA0GON0GOINKX ONO0OCGGEONNOGORNGANOOGOK BOGOGO0NGGOA0GOGONNNGINIY XXEHEHIOOO000G0GL0000000C HHOOONOOCHNOCNON0O0K OOOCOOCOH00000000K B HIICON0AO0G00O0K P00 40000 00004004 HONBOACIOKK UOKIGOOO0NK 0.4.9.4.4:¢.0.4:4 A0 X00x H¥X X X XXX 104944 HHARAAX FEAAKAKXK RO .0.¢.0.¢.0.6.0,0.0.6 09 .0.9.6.9,0.9.4.9.9.4.0.¢ ¢4 b00.9.0.9:6.4.6.¢690.0040¢ 1.0 0.0.0.6.6.0.60.¢40.60.6¢4.444 f.0.0.0.0.0.0.0.08.40.600404044 P80 0000.0.46080008000004¢¢ PO $.9.0.99.0.09.9.000846400684444 D0.0.0.0.0.4.0.0.0609060009080499¢¢4 . 0.6.0.0.0.0.0.006666.9.0005060840¢0.¢44 P 2.8.0.0.0000.0.608¢80806 0969000004049 §90.0.6¢00 000809 0900099.000910.¢009¢¢44 PO 66800.000008000800860.886408000¢0¢94¢ 0090000646600 8600 880869600808 0090¢0¢4 PO 0 008000 800.069060000040.4:008480009094 J0.6:0.9.0.0.0.09.610600809¢0¢088060550908060000044 XOOGOOOKKNN0000000C000NNONNNNNON0N0G00OIK PO 0.0.0.0.006.0000.0004800 0000000800008 680000064¢0¢4 19:9.0:0:0.0.0.04.80.000006800060606000480049990090.99094 D000 000860800885 880 606006860000 000600.08¢8090.649¢44 RRAEO0OK0HO0GO00ANONNOOA00ONX NN0NNONCOO0GONNIKKY introduction The DEC LANcontroller 200 is an intelligent 1/0 controller that interfaces an Ethernet local area network to a VAXBI bus. The DEC LANcontroller 200 is compatible with the Ethernet and IEEE 802 specifications ! and is the standard Ethernet interface for VAX 6xxx and 8xxx systems. The Systems and Options Catalog indicates which systems support the DEC LANcontroller 200 option. The DEC LANCcontroller 200 has a board designation of T1034-YA. It is also possible to upgrade the older DEBNA Ethernet controller, which has a board designation of T1034-00, to a DEC LANcontroller 200 by replacing four ROMs (see Appendix E). The converted version of the DEC LANcontroller 200 has a board designation « f T1034-YA but can be distinguished from the nonconverted version of the DEC LANcontroller 200 by the module revision number. The DEC LANcontroller 200 is also called the DEBNI controller. Throughout the rest of this manual, the DEC LANcontroller 200 is referred to as the DEBNI. 1.1 BASIC FUNCTIONS The DEBNI supports one Ethernet/IETE 802 port, which provides the physical link layer and portions of the data link communication layer of the Ethernet and 802 protocols, as defined by the Ethernet and IEEE 802 specifications. With its own onboard MicroVAX processor, the DEBNI can control operations independently of the host processor. The details of Ethernet transactions, including data transfer over the VAXBI bus, c.re thus transparent to the host processor (see Figure 1-1). ! In this manual, 802 refers specifically to the CSMA/CD local area network defined in the IEEE 802.2 and 802.3 specifications (physical and data link layers). -1 introduction Figure -1 DEBN! Module In a VAXBI System Ethernet Transceiver H4000 |ed- B i ! Ethernet \| <L tiost DEBNI Y v VAXBI Bus > The DEBNI lets the host processor communicate with other nodes in an Ethernet/802 local area network. The DEBNI implements the complete Ethernet protocol and complies with the IEEE 802 specifications. The DEBNI has extenuive on-board diagnostics. On power-up or reset, the DEBNI tests itself and makes its status (pass or fail) available through LEDs on the module and through the DEBNI Power-Up Diagnostic (XPUD) Register. In addition, a field service engineer may invoke other on-board diagnostics from the system console to test the DEBNTI’s logic and functionality more extensively. The DEBNI firmware includes a console monitor program that allows a user at any terminal on the network to monitor the DEBNI operation and the network utilization. The console monitor program is accessible only if the DEBINI firmware console-enable jumper is installed (ses Section 2.4). Figure 1-2 ie a block diagram of the DEBNI module. introduction Flgure 1-2 DEBNI Block Diagram < s é } #1416 Bus a Y v Transceiver/ Mutiplexer LANCE li16/AD16 ! | J> | 1 |« | SIA @ \ 3 ‘ <1r i ‘ Q ¥ ! i y ‘ - vaxgl | BcCB3 interface ~ Logic | piC ; v Transceiver H4000 - | B ' MEM Bus 3 é Q\ Ethernet i > #32 Bus ' > I Ethemnet 5 X ¥ Addr ROM MicroVAX Memory MicroVAX 7 Y Lat::s Y | Buffer RAM ' Me'g% v VAXBI Bus N 2 | The MicroVAX is a 32-bit, single-chip processor that serves as the DEBNI CPU. On the DEBNI module, the MicroVAX is dedicated to running firmware; it cannot be used directly by application programs running on the host processor or by a user at the system console. The DEBNI Ethernet interface consists of the following chipset: e A Local Area Network Controller for Ethernet (LANCE chip) o A Seria! Interface Adapter (SIA chip) The LANCE and SIA chips implement the physical layer and portions of the data link layer of the Ethernet/802 interface. The DEBNI VAXBI interface is impiemented by the BIIC and BCI3 chips. The BIIC has its own power-up self-test. 1-3 introduction R 1.2 e PHYSICAL DESCHIPTION The DEBNI option consists of a single board. The DEBNI has one cable that connects the module with an Ethernet transceiver. This cable is not part of the DEBNI option but is included in the cabinet kits for the DEBNI. (The cabinet kits are described below.) The Ethernet transceiver cable is a 9-conductor, shielded cable with a male connector. The cable has three main connectors: P1, P2, and P3. The P1 connector connects to the VAXBI backplane. The P2 connector is an industry-standard Ethernet connector that connects to the Ethernet bus. The P3 connector ir a +15V direct-current power connection. Table 1-1 lists the items on the DEBNI packing list. These are the items included with the DEBNI option, Table 1-1 Packing List for DEBNI Option Part Number Quantity Description T1034-YA i DEBNI module EK-DEBNI-IN 1 Installation Guide EK-DEBNI-RN 1 Release Note 17-00684-C2 1 Power interface cable needed by some VAX 82xx/83xx Configuration 1 systems. See Section 2.1 for more in.wiv. ation. Table 1-2 lists DEBNI cabinet kits, which must be ordered scparately from the DEBNI option. For new systems not included in this table, please see the Systems and Options Catalog. -4 Intreduction Teble 1-2 Cablnet Kits for DEBNI Options System/Enclosure bt Number Contents VAX 6xxx system cabinets CK-DEBNA-LD Ethernet /O connector panel (74-26407-41) 3' internal Ethemet cable (17-01486-01) Firmware console-enable jumper (17-01149-01) Ethernet loopback connector (12-22196-02) VAX 8800, 8810, 8550, and 8530 system cabinets; VAX 8840, 8830, and 8820 system and expansion CK-DEBNA-LJ Ethemet VO connector panel (74-26407-41) 5' intemal Ethemet cable (17-01601-03) Firmware console-anable jumper (17-01149-01) Ethemet loopback connector (12-221986-02) cabinets; and YAX 6xxx VAXBI expansion cabinets (new VAXBI expansion cabinet (HS657)) VAX 8350, 8250 CK-DEBNA-LM Ethernet VO connector panel (70-18799-00) 8' internal Ethernet cable (17-01601-02) Firmware console-enable jumper (17-01149-01) Ethemet loopback connector (12-22198-02) VAX 8810, 8800, 8700, 8550, and 8530 expansion cabinets (old VAXBI expansion cabinet (H8652)) CK-DEBNA-LN Ethernet VO connector panel (70-18799-00) 15" internal Ethemet cable (17-01601-04) Firmware conscle-enable jumper (17-01148-01) Ethernet loopback connector (12-22196-02) The DEBNI module has three status-indicator lights: e Two DEBNI OK LEDs (yellow) ¢ One External Loopback LED (green) Immediately after power-up or reset, all the status-indicator lights are off. If all the tests in the self-test pass (aside from the LANCE external loopback test), the firmware lights the yellow DEBNI OK LEDs. In addition, if the LANCE external loopback test passes (indicating that the DEBNI can transmit and receive a loopback packet over the network), the firmware lights the green External Loopback LED. Wmmmmmmmmmmmmx BT eTaTe e e 0T e s e e e e 00 s s e e e s 00 0heesessses xxmmnmmmxxmmmmxxxxx wammmmmmmmum}mm mmmmmxmummmmx s NNK NDNN I NNONO SOUGUNCaO0NNOONOKIHN0 FOOO000L Y KX IDNSOAONN0NGO0N0N0N0NNK 10O000O000N000ANGONN0NNKCOO0IK FO0 000 E 0000900000000 ebededesd 0t bedis 006000009 bo 00000 40000 6.0 F0000.0.0. OO0 KOO0 R KUY KKK KXRE MUK KOO0 0 XK 0OON00 KO0O00 RN FNCHHONN00N0ONOO0ONI 0¢ 48184 10.070.9.0.070.00/9.0.9.0.0.:0.6.0.9.096.9990 N0K 00N0 00000000 WO KR KK XK OOOKKK 0 0 HRICO N 00000 KR te t tt drtede 00 et et rbiess PO PP 900000 edede PO O NP PP 000000800rteteteorrrereb eTILLII LYY NPT OO NOP IO EIEIOIIIII VeI 0 sty ser00 00 0 0beeeo 00 000080 PO 000 000000 KKK KK0T XK IO 0N KR XK 00 0G KOO K O00GO0 eyt rrttet bosore sdRbes 0t 000000 000000 000 Yo TR 070 s0 0 000 N00GN0 X XIGOON XX BN K NONNNN TN 0ON0N0 installation This chapter explains how to install the DEBNI option into a VAXBI computer system. For complete instructions for ins.alling an Ethernet transceiver connected to a DEBNI, see the installatiop guides for the host computer system. WARNINGS POWER OFF—Shut off system power and disconnect the main system power cord before performing any procedure in this chapter. STABILIZE THE CHASSIS—For 82xx/83xx Configuration 1 systems: make sure to extend the stabilizer leg(s) before you pull out the processor drawer. WEAR ESD WRIST STRAP—You must wear an antistatic wrist strap that is connected to the processor cabinet whenever you work inside the cabinet. USE CONDUCTIVE CONTAINERS—Whenever you remove a circuit board from a “VAXBI card cage, place it in a conductive container. 2.1 INSTALLATION The following steps describe the installation process: 1 2 Power down the host computer system by: a. Turning the POWER switch to the OFF position b. Setting the system circuit breaker in the rear to OFF For 82xx/83xx Configuration 1 systems, extend the cabinet stabilizer leg(s). Open the cabinet. Meake sure you are wearing the ESD wrist strap that is attached to the system chassis. 2-1 insiaiiation 5 For 82xx/83xx Configuration 1 systems, slide out the card cage and rotate it until it locks into the vertical position. Remove the card cage cover. On some systems, it may be necessary to install a transition header (a cable connector for the backplane) on the VAXBI backplane opposite the slot for the DEBNI. (The VAXBI transition header is part number 12-22246-01.) Use only the torque screwdriver (P/N 29-17381-00). Torque both screws to 6 +0/-1 inch-pounds. 8 9 Make sure there is a node ID plug in place. Note the number on the node ID plug; this number 15 now the installed module’s VAXBI node ID. The node ID number must be unique with respect to the other node numbers on the VAXBI bus. Run the internal Ethernet cable from backplane segment E2 to the Ethernet /O connector panel. See Figure 2-1 and Section 2.3. 10 Connect the pigtail connector (P3) from the internal Ethernet cable to a +15V two-prong connector from the power supply. ! Table 2-1 describes the power connection for various VAX systems. Table 2-1 Power Connection for internal Ethernet Cable VAX8! System Power ‘onnection VAX 6xxx Any H7214 reguiator plug (J2) located in the rear of the cabinet VAX 82xx. 83xx Configuration 1 (12-slot VAXBI card cage) and 2-pin Mate-N-Lok pigtail cennsctor located in the bottom of the box VAXBI Expansion Box BA32-B VAX 82xx, 83xx Configuration 2 (24-slot VAXBI card cage) 2-pin Mate-N-Lok pigtail connector located in the rear of the cabinet VAX 85xx, 87xx, 88xx, and VAXBI Expansion Cabinet H8657 2-pin Mate-N-Lok pigtail connector labsled P3 or P4 and located in the rear of the cabinet NOTE All the pigtail connectors from the power supply may already be used. (Some systems have one or two.) In ! For VAX 82xx/83zx Configuration 1 systeme and for the VAXBI expander box (BA32-B), you may first heave to install the +16V connector to the power supply. The connector's part number is 17-00884-02. 2-2 instalistion this case, the external Ethernet cable from the VO connector panel must not be connected directly to an H4000 transceiver, a DESTA (a thin-wire box), or a DECOM broadband transceiver~none of which have their own power supplies. The cable may, however, be connected to any of the following devices, which do have their own power supplies and which may, in turn, be connected to an H4000: o A DELNI e A DEMPR (a thin-wire version of the DELNI) ¢ A DEBET (a bridge) 11 If you wish to have access to the DEBNI’s cons:i2 monitor program, install the firmware console-enable jumper on backplane segment E1. (See Figure 2-2 and Section 2.4.) 12 On the module-insertion side of the card cage, locate the card cage slot to which the DEBNI cables and jumper are connected on the connector side of the card cage. 13 Lift the lccking lever to open the slot. 14 Slide the DEBNI medule into the slot until it stops: this is a zero insertion force card cage. 15 Close the locking lever. 16 Replace the card cage cover. 17 For 82xx/83xx Configuration 1 systams, rotate the card cage to the horizontal position and retract the stabilizer leg(s). 18 Cloge the cabinet. 19 Verify the installation as described in the following section. 2-3 inetaliation Figure 2-1 Cabling at the DEBNI VAXBI Connector C D El | E2 Firmware Console- Enable Jumper 2.2 E [ ] & To Ethemet O Connector Panel INSTALLATION VERIFICATION PROCEDURE Follow these steps to verify that the DEBNI is properly installed: 1 Turn the system power on and verify that the DEBNI passes both self-test (the two yellow DEBNI OK LEDs light) and the LANCE external loopback test (the green External Loopback LED lights). (See Chapter 3.) If the self-test and/or zxternal loopback test fails, check to see that the module is properly seated in the card cage and that the cables are properly insielled. If the module continues to fail self-test, swap in a different DEBNI module if one is available. You can also try installing the module in: a different slot. After the module passes both self-test and the LANCE external loopback test, boot the operating system. Configure the network database and start DECnet. If the system is unable to communicate over the Ethernet, verify that the network software is installed and configured properly. 2-4 ingtatistion 5 If the network software is properly installed and configured, shut down the system and check the hardware to isolate the faulty fieldreplaceable unit (FRU) as follows: a. Disconnect the external Ethernet transceiver cable (BNE3) at the transceiver end. b. Install a loopback connector (part number 12-22196-02) on the cable. €. Run self-test and observe one of the following: e If the External Loopback LED lights, the transceiver is bad. Replace the transceiver, reconnect the cable to the new transceiver and rerun the self-test to verify proper operation. No further action is required. e If the External Loopback LED does not light, one of the following is bad: transceiver cable, internal Ethernet cable, backplane, or DEBNI module. Go to the next step. d. Disconnect the external transceiver cable at the /O connector panel and install a loopback connector in its place. @. Rerun the self-test and chserve one of the following: e [f the External Loopback LED lights, the transceiver cable is bad. Replace the cable and rerun the eelf-test to verify proper operation. No further action is required. ° [f the External Loopback LED does not light, one of the following is bad: internal Ethernet cable, backplane, or DEBNI module. Replace the internal Ethernet cable and install the loopback connector on the new cabie. Go to the next step. f. Rerun tnc self-test and observe one of the following: « If the External Loopback LED lights, the removed cable is bad. Rerun the self-test to verify proper operation. No further action is required. e If the External Loopback LED does not light, either the DEBNI module or the backplane is bad. If the module passes gelf-test, it is probably good, but repiace it and go to the next step. 2-5 installation g. 2.3 Rerun the self-test and observe one of the following: ¢ If the External Loopback LED lights, the removed DEBNI module is bad. Rerun the self-test to verify proper operation. No further action is required. o [If the External Loooback LED does not light, the backplane is bad. Install the DEBNI module in a different slot. Rerun the self-test to verify proper operation. Consider replacing the card cage. INTERNAL ETHERNET CABLE The internal Ethernet cable connects the VAXBI backplane to the I/O connector panel (see Table 1-2 for part numbers). The external transceiver cable is ordered separately; it runs from the outside of the connecter panel to an Ethernet transceiver, such as an H4000 basehand transceiver, DECOM broadband transceiver, or DELNI local network interconnect. On the backplane, the internal cable plugs ir.to cegment E2 opposite the DEBNI slot. (Viewed with the node ID plugs at the top, E2 is the right side of the segment farthest from the node ID plugs. See Figure 2-1.) The +16V pigtail connector supplies power to the H4000 transceiver; however, you should plug it in (if possible) regardless of the type of transceiver. Teble 2-2 lists pinouts of the internal Ethernet cable connectcr at the VAXBI card cage. Table 2-3 lists the connector pinouts of the transceiver cable. Tebie 2-2 Internal Ethernet Cable Plnouts (On VAXBI Backplane) Pin Signal EO1-E04 Unconnected E05-E09 Logic Ground E10 Ethernet Collision L Differential collision detect Ef1 Ethernet Collision H signals from the Ethernet bus. g2 E13 Ethernet Receive L Ethernet Recch. "1 Difterential receive signals from the Ethernet bus. Ei4 Ei5 Ethernet T.a.smit L Ethernet Transmit H Differential transmit signals to the Ethermnet bus. 2-6 Degcription installstion Table 2-2 (Cont.) Interna: Ethernet Cable Pinouts Backplane) Pin Signal Description Et6 g48 Firmware Console-Enable Enables access to the DEBNI console monitor program. The signal is asserted if there is a jumper connection between pins £16 and E46 in the DEBNiI section of the VAXBI backplane. The signal is sent to the Status Register, which is a DEBNI-internal register. Table 2-3 Transcelver Cable Connector Pinouts Pin Signat | Shield 2 9 Collision Presence H Collision Presence L Description Difterential signals that indicate a failure of the collision detection logic 3 10 Transmit H Transmit L Differential transmit signals to the Ethemet bus 4 Reserved 5 12 Recsive H Recaive L Differential receive signals from the Ethemet bus 6 Power Return Power return line 7 Reserved 8 Reserved 11 Reserved 13 Power 14 Reserved 16 Reserved 2-7 Instaliation MWARE CONSOLE-ENABLE JUMPER Install the firmware console-enable jumper if you want to have access to the DEBNI console monitor program. This program provides visibility into the DEBNI operation and the network utilization. The DEBNI console is accessible from any terminal on the network. (See the DEBNI VAXBI Network Adapter Technical Manual, EK-DEBNI-TM, for further information.) If the firmware console-enable jumper ie not installed, you will not be able to access the DEBNI console. The jumper (P/N 17-01149-01) is a 30-pin connector that is installed on segment E1 of the VAXBI backplane, opposite the DEBNI slot. {(Viewed with the node ID plugs at the top, El is the left side of the segment farthest from the node ID plugs.) The jumper connects pins E16 and E46, as shown in Figure 2-2. NOTE On the DEBNA Ethernet controller and the DEBNK Ethernet/txpe controller, this jumper was used to enable remote booting. The firmware console-enable jumper for the DEBNI has the same part number and is installed in the same location as the boot-enable jumper for the DEBNA and DEBNEK. The only difference is the function controlled by the jumper. 2-8 instaliation Figure 2-2 Flrmware Console-Enable Jumper Nede D Plugs { 46 16 o—0 c o o O O O C o D E | E O O O O O O 0O O O O 0O o O O O O O © O o O 60 30 E1 Connector 25 REMOVAL To remove a DEBNI module, follow these steps: 1 2 Power down the host computer system by: 8. Turning the POWER switch to the OFF position b. Setting the system circuit breaker to OFF For §2xx/83xx Configuration 1 systems, extend the cabinet stabilizer leg(s). Open the cabinet. 4 Make sure you are wearing an ESD wrist strap that is attached to the gystem chassis. 5 On the module-insertion side of the open cabinet: a. For 82xx/B3xx Configuration 1 systerns, rotate the card cage until it locks in the vertical position. 2-9 000 Remove the card cage cover. =0 Slide the circuit board out of the card cage slot. S@ inatatiatien Closge the locking lever. Locate the desired card cage slot. Lift the locking lever to open the slot. Put the board into a conductive container. Replace the plastic card cage cover if ancther module will not be installed. 6 7 On the cabling side of the open cabinet: a. Locate the same card cage slot. b. If another module will be installed, leave the cables and jumpers in place; otherwise; remove the cables and jumper. If another module will not be installed: For 82xx/83xx Configuration 1 systems, rotate the card cage to the horizontal position and retract the stabilizer leg(s). b. 2-10 Close the cabinet. mmmmmmmmmmmmmxx mmmmmmmmmmmtwmm WWWHWHHKWWWXX}Q{X wmmm«wmwm&mmmmx BON0ONGGONONN0NGN0NGIN HHOGOOCE00O000NTHK 60000000 0.0.0.90.0¢9.¢ 04 ¢4 i0.0:0/010.0.0.0.£.919.9.¢0.6 NO0H0G0LON0NMKK pieie06084400008 OO IO ie-0.0:010.09.91 KOO XRNAUX 00,000 po HO0AUX b 4.0 0.0.9.0.9.0.44 YAXODDO0NXK XOOA000000000(K 0.0. 444 0. 0:4.9.0.4.0.4:0.0.8. Y KUXH UK HEXKHURKKYKEA XXWWWX OGN0 000N00CGGHDNOONNOCONNNNNXE FOEINONNCOCOONDN0O0OMINNNONM N0 NN IO HN0OONONNRE0 Power-Up Self-Test The DEBNI's power-up self-test consists of ROM-resident diagnostic routines that run automatically on power-up or reset. The power-up selftest verifies that the hardware at the node is operational and that the DEBNI can transmit and receive a loopback packet over the network. Since the routines are contained in ROM, their execution requires no operating system. The self-test routines are thus stand-alone programs independent of any software environment. 3.1 HOW TO RUN SELF-TEST There are three ways of running self-test for the DEBNI: 1 On system power-up—When the user powers up the host system, the DEBNI automatically runs power-up self-test. Front pcnel controls vary among host systems; see the owner’s manual for the specific system. 2 On processor reset—When the user presses the reset or restart button on the host system’s front panel, the system goes through its reset sequence, which causes each VAXBI node to run its own self-test. 3 From the console—A field service engineer can invoke the DEBNI's DO tests from the system console of a VAX 6xxx, VAX 82xx, or VAX 83xx system. (These are the same tests that run duriny power-up or reset self-test.) The following example shows how to use VAX console comimands on a VAX 6xox system to run the self-test on a DEBNI located at VAXBI node 2. (The XMI-to-VAXBI adapter is at ¥MI node E.) For a description of the Z command used in this example, see the system Owner’s Manual. 3-1 Power-Up Seilf-Test > [CTRLTF) >>> Z/BI:2 E 7233 T/R RBD2> ST © 2 p H ;00000000 H [RETURy] Z connection successfully started PUDR: 0118 00000001 00000000 00000000 00000000 GOO000000 00000000 00000000 FFFFO0002 RBD2> [CTRL7Z][CTRL/F] 7?31 Z connection terminated by *P >>> The following example shows how to use VAX console commands on a VAX 82xx or 83xx system to run the self-test on a DEBNI at node 2. For a description of the Z command used in this example, see the system Quwner’s Manual. > [CTRLTE] [RETURN] >>>2 2 T/R [RETURR RBD2>DO : P 2 0118 00000001 00000000 00000000 000000CQ0 00000000 : FFFF0002 PUDR: 00000000 00000000 00000GOC RBD2> [CTRL/Z][CTRL/F] 7?31 Z connection terminated by "P >2> If you are on a VAX 6xxx conscie and do not know which VAXBI node the DEBNI is at, use the SHOW CONFIGURATION command at the console prompt to locate the DEBNI. Another way of locating the DEBNI nodes is to use the EXAMINE command to read the Device (DTYPE) Register at exch node until you find the DEBNI, which has a device type of 0118 (hex). A module’s DTYPE Register is always at the module's base address. (See Appendix D for a formula for determining the base address of a VAXBI node.) 32 REPORTING SELF-TEST RESULTS Test results (pase or fail) are indicated by LEDs or the module and by thDEBNI Power-Up Diagnostic (XPUD) Regisier. 3-2 Power-Up Seli-Test 3.2.1 Self-Test Results in LEDs There are three status-indicator lights on the module: e 2 yellow DEBNI OK LEDs ¢ 1 green Ext.rnal Loopback LED The location »f the LEDs is shown in Figure 3-1. The two yellow DEBNI OK LEDs show the status of the module after the node self-test. The green External Loopback LED indicates whether the DEBNI passed the LATM .CFE external loopback test, which tests the DEBNTI's ability to transmit +nd receive a loopback packet over the network. At power-up or reset, all the LEDs are off. If the DEBNI passes all the executed i-sts (excluding the LANCE external loopback test), the DEBNI firmware lights the two yellow DEBNI OK LEDs; otherwise, these LEDs remain off. If the LANCE external loopback self-test passes, the firmware lights the green External Loopback LED; otherwise this LED remains off. 3.2.2 Self-Test Results in the Power-Up Diagnostic Register The Power-Up Diagnostic (XPUD) Register indicates which tests in the self-test diagnostic passed. In addition, the Self-Test Comp!ste (STC) bit indicates whether the self-test has completed execution. See Appendix B for a detailed description of the XPUD Register. 3.3 INTERPRETING TEST RESULTS If the External Loopback LED fails to light, indicating that the LANCE external loopback self-test faileu, this does not necessarily indicate that a DEBNI component failed self-test. The problem could be a bad cable, bad Ethernet transceiver connector, improper seating of the transceiver cable, or simply that the DEBNI is disconnected from the transceiver. In any case, such an error condition prevents the DEBNI from transmitting or receiving Ethernet packets. Power-Up Self-Test R Figure 3-1 e P S R G R e O e TR R T LED Locations DEBNI OK LED ‘ c o] 1] DEBNI OK LED || External Loopback LED | | VAXBI | D Comer | © ' :’ E d g e If the XPU» Register indicates that all of the self-test routines failed, the problem is probably the BIIC, MicroVAX, or MicroVAX ROM. If one of these components fails, the self-test routine stops, and the MicroVAX enters a wait state. Self-test could also fail because of a systemwide fault. For example, a faulty power supply or missing VAXBI bus terminators could be the problem. Make sure that system power is OK and check for other possible systemwide faults. 34 TESTED COMPONENTS Self-test tests the following components and functions on the DEBNI module: ¢ MicroVAX ® MicroVAX ROM o MicroVAX RAM e MicroVAX Interrupt Request (IRQ) lines Power-Up Self-Test BIIC and BCI3 chips LANCE chip Interval timer 35 UNTESTED COMPONENTS AND FUNCTIONS The following components and functions are not tested: MicroVAX.: A complete instruction set Ethernet interface logic functions: More (multiple retries of packet transmission) One (one retry of a packet transmission) Babble error Time domain reflectometry Late collision Loss of carrier Memory error In the BCI3/BIIC logic: [} BIIC nodespace locking BIIC nodespace Write Sense bits @ BCI3 datamove operations with quadwords and cctawords BCI3 Nonlocal Memory Reference (NLMR) line 3-5 *mmm{xxmmm G WWMKWM{WWHWWX P XK AKUXKX 000904 ple HOODOARKK WNIOOOOKARK P00 10 40110100101010 0 P00 6.0101019/010.0 101070 KA KHARHKUKAKK WOOXKK ROOOCOOOCKKICRRNHK KROOOOOLIRKK KA RKRXKAK 4 ORS00 90.019910 0 010.09.0.09.0.0.00 DI I0 9091010.01919 0.010.0191010.9.0.0.9.0.0. KR KK KKK KK R KK KXLHAAR XAXDXO 164 44 914.0101918701010.0.0.0°4.910.0.010.0.610.014¢.9 PLOO KK KK XHKKKHIHHAK KX KXOOOERR XRHAKRO 0 010 010819870 91010101410 9910041010 1919.0.0.0'9.0.0.0.0.0:6 PleT0'0 810 9 0181019191 810.010 0.0 0.0 /010 016 6 0.6 $.010.0.8.0.0.0 44 DTOT0 88101070 870 10'9.010.019.$.0 1010014 $13 0161910 014 6 010 0 0 00 004 001040 oTOTa 1010100 9101610 0 $LE0 00 0/0.00.01010/0.0/0.0.0.910/000 ToTe 0100 F00/010/097016:010 0 0L P00 010010010100 0810 010 0.0.8.0.00.0.4 IO e 0100 010 00 8101101010 9 010 01010 $L0 010 810810 010100 810 610 0 e 01080 0 DT 216100 00Ta o0t o ol eTpio 910 0 01010 910110 810.0101910 1010810870 10.0.9.9.9.0.3.4 PTaTe 0" 0000 010T010 00 0151 0:01010 4 $10.0'$ 0.6 ¥.0/0.019 010 4 S 010 0 01010 b 6 010 4 00 8 NN XK XK 0NOTTE KX O00NNN0O 00ODONONGO O Environmental Requirements Operating Environment Temperature 5°C to 50°C (41°F to 122°F) Humidity 10% to 95% with maximum wet bulb of 32°C (89.6°F) and Altitude minimum dew point of 2°C (36°F) noncondensing To 2.4 km (8,000 ft) Storsge Environment Temperature -40°C to 66°C (-40°F to 151°F) Humidity To 95% noncondensing Altitude To 9.1 «m (30,000 ft) A-1 m:mmmmmmmmmmm{mmm R OGOOOOOOOCIORROONKXICC OB ONOONNEICNO00000KK mxxmwmmm&mxxmmm{mmxxmmx FA0 000 00086000005 80.000¢606060641 O 000000008400 00600:0068000:60:8 odnd et ree i attveverseey boltob NOUONOORGEOONHOGNGIN00K xxmtxxmnmmmmcxxx mzmmxmmxxxmx H000G0H0GONOK MOOOOK jiv it et 00 b0 biv ®08064 KX 4.4 e X X XXX X KoX HXIKXAK 00000 49 b9.9.0.9.9.0.0.¢.¢ IO KAAAR L0 9:0.9:0.0.8.9.0.60.0609 00644 F0.6:4.6.0.0:0.9.0.0.0.¢ 9764:6.6.8.0.0.0.9.0.4000004¢4 P08 08080, 040.8000 ¢4 TRK KX TR IGHOKKK DNNOONOONC DOOO0OKIOGRONCO0O0IXHX 604704 04:810.00.40.0.8. PO 0000 000009 PO S PO H 0S40 0 8.0.0.8.680684600] P09 0010 00.400.00.0.0.08 08000000 ¢8td00d PP ¢d OP LIV TN 00000000000 PL0i010.0.016.0.90:0.0.0,066¢.00 0806080900000 ¢004 NO KA KHKAX 000N000NNNNN0N0HOHNO 00000 OOOC000000GO0ONRNGA0OONNNNNGKINN00NE 0A00000N000000ONNASN0CNN0GONONNNGONNNNCNK KOOONoOGN00G0N00EA0N0N0COGNGOGONNON0GNNONK TOONGO0NNOANAGHNINOCONNNNGGAOGNGONNNNAGNNINY, HHRRO00OORCOI X HONOOGOOOOON0N0A0COONCON N KKK WNOE0GOO0OGONN00NNNONOTIONGN0N0ONGON00NNNOM XXX Registers This appendix describes the DEBNI registers that are useful for troubleshooting problems that may occur during installation. Table B-1 summarizes these registers. Table B-2 explains the access types for these registers, as well ae the bit types for the registers. Each register is then described in detail. Table B-1 Registers Useiul During instaliation—Summary Name Mnemonic Device DTYPE VAXBI Address Type' bb+0 RO Description incicates the VAXBI node's device type and device firmware revision level. VAXBi Control and V/.KBICSR Status bb + 4 Rw indicates whether the BIIC chip passed its internal self-test and whether the DEBNI as a whole passed its self-test. Bus Emror BER bb + 8 RW Raecords VAXB! bus errors and lcopback errors. Power-Up Diagnostic XPUD bb + FC Ro indicates whether self-test has completed and which tests in the self-test passed. TWith respect to the port driver i S S e Table B~2 Codes for Bit Types Code Description DCLCC Cleared by the BHC following a successful BilC seli-test; initiated on the deasssrtion of BCi DC LO L from the BHC. pCcLoL . Loaded by the BIIC on the lasi cycle in which BCI DC LO L is asssrted. If the BCI signal lines are not driven during this cycle, these bits are set. B-1 Reglsters Tabie B-2 (Cont.) Codes fer Bit Types Code Description DCLOS Set by the BIIC following a successful BIlC self-test; initlated o the duassertion of BCI DWW BIC diagnostic mode writeable; reserved for use by DIGITAL. RO Read-only. Write-type transactions must not change the value «! this register or bit. RW Normal read/write register or bit. sC Special case: operation defined in detailed description. STOPC Cleared by the BIC en receipt of a STOP command to the node. STOPS Set by the BlIC on receipt of a STOP command to the node. WiC Write-1-to-clear bit. Write-type transactions cannot set this bit. DC LO L from the BIIC. B-2 Registers Device Register (DTYPE) Device Register (DTYPE) The Device Register ideniifies the DEBNI device type and firmware revision. The device iype for the DEBNI is 0118 (hexadecimal). The port loads the Device Register on power-up or reset. The port drives reads the Device Register before attempting to initialize the port. ADDRESS Nodespace base address + 0 k) 16 15 Device Revision 4] Device Type BITS<31:16> Name: Device Revision Mnomonic: DREV Type: AW, DMW. DCLOC Indicates the device revision of the DEBNI. The high-order byte of ¢! field is the major revision number and the low-order byte of the fiele is the minor revision number. The major revision field is decoded as follows for the first 10 major revisione of the DEBNI: 06 MmO 0@ > #odule Revision Level o7 O Code (hex) 01 02 03 04 05 Reglsters Device Register (DTYPE) Code (hex) Module Revision Lavel 08 H 09 i 0A J The minor revision field is decoded as follows for the first 10 minor revisions of the DEBNI: Code (hex) Minor Revislon Level 00 00 01 01 02 02 03 03 04 04 05 05 08 06 07 07 08 08 09 09 oA 10 BITS<15:0> Name: Device Type Mnemonic: DTYPE Type: RW, DMW, DCLOC A value of 0118 (hex) indicates that the adapter is a DEBNI module. Registers VAXBI Conirol and Status Register (VAXBICSR) Control and Status Register (VAXBICSR) The VAXBICSR controls the DEBNI's VAXBI interface and provides status information about this interface. The register is written by the port and, with one exception, is read-only to the port driver: the port driver may izsue a node reset to the DEBNI by writing the register with C00 (hex) to set the Node Reset bit and the Self-Test Status bit. Otherwise, the port driver may not write the register. NOTE Both the Node Reset bit and the Self-Test Status bit should be set to cause a node reset. If the Self-Test Status bit is not set, the DEBNI's BIIC temporarily disables its VAXBI drivers (o isolate the node from the VAXBI bus, thereby causing the transaction that initiated the node reset to fail. ADDRESS Nodespace base address + 4 31 24 23 181514131211 109 8 7 6 § 4 3 0 0 l ‘ ’ I___, Node ID Arbitration Control | Soft Error INTR Enable Hard Error INTR Enable Uniock Write Pending Node Reset Self-Test Status Broke inktialize Soft Error Summary Hard Error Summary VAXEB) Interface Type VAXBI interface Revision B-5 mma Control and Status Register (VAXBICSR) @WSflN 24> Name: VAXB)I interface Revision Mnemonic: IREV Type: RO Indicates the revision of the device that provides the primary interface from the node to the VAXBI bus. Name: VAXBI Interface Type Mnemonic: ITYPE Type: RO Indicates the type of device that provides the primary interface from the node to the VAXBI bus. For the DEBNI,this device!s the BIIC, which has an ITYPE code of ¢000 0001 (hex). BiT<i5> Name: Hard Error Summary Mnemonic: HES Type- RO When set, indicates that one or more hard error bits in the Bus Error Register (BER) ia set. BiT<14> Name: Soft Error Summary fMnemonic: SES Type: RO When set, indicates that one or more soft error bits in the Bus Error Register (BER) is set. Reglsters VAXBI Control and Status Register (VAXBICSR) Name: initialize dMnemonic: INIT Type: W1C, DCLOS, STOPS Not used by the DEBNI. Neme: Broke Mnemonic: None Type: W1C, DCLOS When set, indicates that the BIIC passed its power-up self-test. The DEBNI clears this bit after the DEBNI node passes self-test. Name: Seil-Test Status Mnemonic: STS Type: RW, DCLOS When set, indicates that the BIIC has passed its internal self-test. When clear, indicates that the BIIC has not yet passed this self-test. If the BIIC faile its self-test, it disables its VAXBI drivers to isolate the node from the VAXBI bus. BiT<10s Name: Noda Reset Mnemonic: NRST Type: SC The port driver sets this bit to selectively reset the DEBNI. Setting the bit forces the BIIC to assert BCI DC LO L, which causes the DEBNI to execute its power-down and power-up sequences, including self-test. B-7 Reglsters VAXBI Control and Status Register (VAXBICSR) BiT<9> Name: Reserved Mnemonic: None Type: RO Reserved; must be zero. o N e e o] BiT<8» Name: Unlock Write Pending Mnemonic: UWP Type: WiC, DCLOC When set, indicates that the DEBNI has executed a successful Interlock Read with Cache Intent (IRCI) transaction and has not yet executed the corresponding Unlock Write Mask with Cache Intent (UWMCI) transaction. If the DEBNI issues a UWMCI transaction when UWP is cleared, the interlock Sequence Error (ISE) bit sets in the Bus Error Register (BER). The out-of-sequence UWMCI command is not aborted. BIT<7> Name: Hard Error INTR Ensble Mnemonic: HEIE Type: A/W, DCLOC, STOPS The DEBNI clears this bit to disable BIIC hard error interrupts to the host. When a hard error occurs, the BIIC will not automatically interrupt the host. Reglaters vVAXBI Control and Status Register (VAXBICSR) BiT <G> Name: Scft Error b ¢ R Enable tremonic: SEIE Type: R/W, DCLOC, STOPC The DEBNI clears this bit to disable BIIC soft error interrupta to the host. When a soft error occurs, the BIIC will not automatically interrupt the host. BiTS<5:4> MName: Arbitration Control dMnemonic: ARB yps: RW, DCLOC Indicates the VAXBI arbitration mode to be used by the DEBNI as follows: ARB 5 4 Arbitration Mode 0 0 Dual round rabin 0 1 Fixed-high priority (Ressrved) 1 o Fixed-low priority (Reserved) 1 i Disable Arbitration (Reserved) BiTS<3:0» Name: Node ID Mnemonic: None Type: RO, DMw, DCLOL Indicates the node ID, which is deternuined by the DEBNI node ID plug. The Node ID field is loaded by the DEBNI hardware on power-up or resst. 8-9 Reglsters Bus Error Register (BER) Bus Error Register (BER) The BER records errors during VAXBI and loopback transactions. An error seis the corresponding bit in the register and is also reflected in the EV (event) code that the BIIC passes to the BCI3. ADDRESS Nodespace base address + 8 31302020 2728 252423222120 1818 17 16 15 o 4 3210 Os ‘ I__ Null Bus Parity Error Corrected Read Data ID Parity Error User Parity Enable | _ lllegal Confirmation Error | ___ Nonexistent Address Soft Error Bits <2:0> l__.____ Bus Timeout e ——__ STALL Timeout? L. RETRY Timeout L__________ PRead Data Subsiitute e oo Slave Parity Error Lo Command Parity Error IDENT Vector Emor Transmitter During Fault Interlock Sequence Error Master Parity Eror Control Transmit Error . o Master Transmit Check Error . _ NO ACK to Multi-Responder Command Recelved Haed Error Bits <30:16» B8-10 Reglsters Bus Error Register (BER) BiT<31s Name: Heserved #nemonic: None Type: RO Reserved; must be zero. BiT<30> Name: NO ACK to Multi-Responder Command Received Mnemonic: NMR Typs: W1C, DCLOC Sets if the BIIC receives a NO ACK in response to a VAXBI interrupt that i¢ has issued. BiT<29> Name: Master Transmit Check Error Mnemonic: MTCE Type: WI1C, DCLOC The BIIC reads all VAXBI data that it transmits to verify transmission accuracy. The MTCE bit sets when received date does not match transmitted data. The BIIC does not perform this check on the assertion of the encoded ID on the I lines during an embedded arbitration cycle. BiT<28> Kame: Contral Transmit Ermror Mremonic: CTE Type: Wi1C, DCLOC Sets if the BIIC detects that BI NO ARB L, BI BSY L, or BI CNF<2:0> L is deasserted while the BIIC is trying to assert the signal. The BIIC does not check the state of BI NO ARB L during burst mode transactions. B-11 Reglstars Bus Error Register (BER) BiT<27> Name: Master Parity Error Mnsmonic: MPE Type: WiC, DCLOC Sets if the BIIC, as VAXBI bus master, detects a parity error on the VAXBI bus during a read-type or vector ACK data cycle. BiT<26> Name: Interlock Sequence Error Mnemonic: ISE Type: WiC, DCLOC Sets if the DEBNI successfully issues an Unlock Write Mask with Cache Intent (UWMCI) command without having previously issued a corresponding Interlock Read with Cache Intent (IRCI) command. The BIIC detects this sequence error by noticing that the Unlock Write Pending (UWP) bit in the VAXBICSR was cleared when the UWMCI command was issued. BiT<25> Name: Transmitter During Fault Mnemonic: TDF Type: W17, DCLOC Sete if the BIIC, as VAXBI bus master or VAIBI slave, detects a parity error during a cycle in which it was responeible for transmitting proper parity on the VAXBI bus. The responsibility for transmitting parity during a VAXBI cycle is as follows: VAXBI Cycle Nocde Responsible for Tranemitting Parlty Command/address Master Read-type ACK data Slave Write-type data baster 8-12 Reglaters Bus Error Register (BER) VAaXBi Cycle Node Responsibie for Tranemitting Parity Broadcast Cats Master Vector ACK data Slave Embedded ARB (encoded master ID) Master IDENT (decoded master ID) Mastar The TDF bit is not set for parity errors that occur during loopback cycles. Name: IDENT Vector Error Mnemonic: WE Type: W1C, DCLOC Sets if the BIIC issues an interrupt vector and does not receive an acknowledgment (ACK) from the rcceiving node. BiT<23> Name: Command Parity Error Mnemoric: CPE Type: W1C, DCLOC Sets if the BIIC detects an error in a command/address cycle. The transaction can be either a VAXBI or a loopback transaction. Name: Slave Perity Error Mnemonic: SPE Type: WiC, DCLOC Sets if the BIIC, as 2 VAXBI slave, detects a parity error during a write-type ACK, write-type STALL, or Broadcast ACK data cycle. B-13 Registers Bus Error Register (BER) BiT<21> Mame: Read Data Substitute Mnemonic: RDS Type: WwiC, DCLOC Sets if the BIIC receives a Read Irata Substitute (RDS) or RESERVED status code during a read-type or IDENT traasaction (for vector status). For this bit to be set, the BIIC mu.; have received good parity from the data cycle that contained the RDS or RESERVED code. This bit is set even if the transaction is aborted some time after the receipt of the RDS or RESERVED code. BiT<20> Name: RETRY Timeout Mnemaonic: RTO Typs: WiC, DCLOC Sets if the BIIC, as VAXBI bus master, receives 4096 consecutive RETRY responses from a node. BiT<19>» Name: STALL Timeout Mnemonic: STO Type: W1C, DCLOC Sete if the BliU’s slave port asserts the STALL code on the BCI RS<1:0> lines for 128 consecutive cycles. BiT<18> Name: Bus Timeout Mnemonic: BTO Type: W1iC, DCLOC Sets if the BIIC, as VAXBI bus master, is unable to start at least one tronsaction (out of possibly several that are pending) before 4096 cycles have elapsed. B-14 Reglsters Bus Error Register (BER) BiT<17> Name: Nonexistent Address Mnemonic: NEX Type: Wi1C, OCLOC Sets when the BIIC receives & NO ACK for a read- or write-type command that it has issued. NEX seta only if the BIIC’s parity check and master transmit check of the command/address data were successfui (that is, CPE and MTCE were not set for this command/address cycle). NEX is not set for NO ACK responses to other commands. BiT<16> Name: llegal Confirmation Error Mnemonic: ICE Type: W1C, DCLOC Sets if the BIIC receives a reserved or illegal confirmation code. This bit can be set during either master or slave iraneactions. Note that a NO ACK command confirmation is not an illegal response. BITS<15:4> Name: Ressrved Mnemonic: None Type: RO Reserved; must be zeros. s Name: User Parity Enabis Mremonic: UPEN Type: WiC, DCLOC e A b 5 S0 i S S g S i Indicates the BIIC parity mode. The DEBNI initializes this bit to zero to select BIIC-generated parity for VAXBI transactions initiated by the DEBNI. 8-18 Hegisters Bus Error Register (BER) BiT<2> Name: D Parity Error Mnemonic: IPE Type: WiC, DCLOC Sets if the BIIC detects a parity error on Bl [1<3:0> when the master’s encoded ID 15 anserted during embedded arbitration cycles. All nodes perform this parity check. Name: Comected Read Data Mnemonic: CRD Type: W1C, DCLOC Sets if the master receives a Corrected Read Data (CRD) stetus code. For this bit to be set, the BIIC logic also requires the receipt of good parity for the data cycle that contains the CRD code This bit is set even if the transaction aborts afier the BIIC has received the CRD status code. Name: Null Bus Parity Error Mnemonic: NPE Type: W1iC, DCLOC Sets if the BIIC detects odd parity on the VAXBI bus during the second cycle of a 2-cycle sequence during which BI NO ARB L and BI BSY L were unasserted. B8-16 Reglsters Power-Up Diagnostic Register (XPUD) Power-Up Diagnostic Register (XPUD) The XPUD Register displays the results of the DEBNI self-test, which runs automatically on power-up or reset. After the self-test finishes, the port driver can read the register and pass it to higher-level software that can determine which DEBNI components passed self-test. The XPUD is treated as follows: ¢ The DEBNI initializes the XPUD Register to all zeros on power-up or reset. When a subtest in the self-test routine passes, its corresponding bit in the XPUD Register sets. If a subtest fails, the corresponding bit remaine cleared. The XPUD Register of a DEBNI that passes self-test has a value of FFFFIOXX (hex), where X = don't care. B-17 Reglsters Power-Up Diagnostic Register (XPUD) ADDRESS MNodespace base address + FC 3130202027 2625242322212010 18 is 1615 is 2 71 0 Os l__ Firmware Inftiglization Complete External Loopback NI Logic is Good No Stuck-at IRQ Lines Interval Timer is Good BilC and BCI3 are Good MicroVAX s Good ROMA4 is Good ROM3 is Good ROM2 is Good ROM1 is Good Module RAM is Good Self-Test Compiete iT<3ls Name: Seli-Test Complete Mnemaonic: 8TC Type: AW, OCLOC Sets when the DEBNI self-test completes. §T5<3@> Name: Resarved Mremonie: Nene Type: RO Reserved; must be ones. e-18 Reglsiers Power-Up Diagnostic Register (XPUD) BiT<28> Mame: Module RAM is Good Mnemonic: RAM Type: RW, DCLOC Sets when the DEBNI RAM passes self-test. Name: ROM 1 is Good Mnemonic: ROM1 Type: RAW, DCLOC Sets when the checksum validation for ROM chip 1 succeeds. R, Name: ROM 2 is Good fMnemenic: ROM2 Type: R/W, DCLOC Sets when the checksum validation for ROM chip 2 succeeds. BiT<25> Name: ROM 3 is Good Mremonic: ROM3 Type: RW, DCLOC Sets when the checksum validation for ROM chip 3 succeeds. BiT<24> Neme: ROM 4 iz Good Mnemonic: ROM4 Type: RwW, DCLOC Sets when the checksum validation for ROM chip 4 succeeds. B-19 Reglsters Power-Up Diagnostic Register (XPUD) BiT<23> Name: pMicroVAX is Grod pMnemaonic: UVAX Type: R, DCLOC Sets when the MicroVAX passes self-test. BiT<22> Name: BIC and BCI3 are Gosd Mnemonic: Bi Type: RW, DCLOC Sets when the BIIC and BCI3 chips pass self-test. BIT<21s. Name: interval Timer is Good Mnemonic: TMR Type: RW, DCLOC Sets when the interval timer passes self-test. Name: No Stucl-at IRQ Lines Mnemonic: IRQ Typs: AW Sets when no IRQ (interrupt request) line is stuck asserted. BiT<19> Name: NI Logic is Good Mnemonic: NI Type: RW, DCLOC Sets when the Ethernet interface logic, including the LANCE chip, is good. B-~20 Registers Power-Up Diagnostic Register (XPUD) BiTS<18:16> Name: Reserved Mnemonic: None Type: RO Reserved; rmust be ones. BiTS<15:2> Name: Reserved finemonic: None Type: RO Reserved; must be zercs. e S 3 0 D S e i i o e BiT<i> Name: External Loopback Mnemonic: None Type: A/W, DCLOC When set, indicates that a loopback connector or an Ethernet cable is connected to the DEBNI and that the external loopback test has passed. BiT<0> Name: Firmware Initialize Complete Mnemonic: None Type: RW, DCLOC Sets when the DEBNI firmware completes initialization. B-21 X XXX KHXUK p:4.9.0.9.9 4 4 KHX0OOOK .. 9.0.0.0:4.¢.¢6.04 WHHROHAK 0040 ¢d }L0.9.0.0:¢0.0.90 }06.9.9.9.90.0.9.0.09¢0¢4 b0.0.0.00.0.8.90060099.400 WVOONONONCHKINGONOMY NNONGOONN0M KR KXY paa000 0006080 800060009004 F.O.4.9.0.0.0.0.064400.0.0490009690¢44 IOHOO0ON0NCHINOG0NNAXKY P8 000.0.000004800000.8080854800443] P00 600000040.84000060.6508408080809] K A00NCaONNOCNNONONCOTNRHIIONXK BON0LCAOORO0N00OG0NON0HENNENOGO0NNY :00.0.0°00.00.0:6.0.0:00080.86008080¢0006600006040464 PI0100.8.0.9.0.009.9.0.0000008400000606000600 00406094 mmmmmmmmumxxflm mmmmmmmmxxmmmmmx Bootsirapping with the DEBNI Most host systems in which the DEBNI resides can bootstrap their operating systems either locally (from disk or tape) or remotely (from an Ethernet network). Host systems can boot voluntarily (from a command that a user types at the system console) or involuntarily (from a command to boot that arrives via the network). Whether voluntarily or involuntarily, the host system boots from a specified device. The device is usually specified by the user in a console command, and the booting hardware/software then reads this parameter. The DEBNI plays a role in the booting whenever (a) the specified device from which to boot is the DEBNI or (}) a command to boot arrives from the network. This appendix describes these two bootstrap roles: i The system is instructed to boot an image from the network (via the DEBNI) instead of from a disk. 2 A remote system sends the DEBNI a command tc boot involuntarily— that the DFBNI's host system should reboot itself. Network Pooting The DEBNI may be specified as the boot device either explicitly by a console ccnmand or by the defau’t setting of the auto rescart function. The boot then proceed~ as follows: 1 A boststrap running on the local host initializes the port. 2 The bootsirap transmits a Request Progre m MOP message to the load assistant multicast address. This message requests the node that has the image to be downloaded to identify itself. 3 The bootstrap receives an Assistance Volunteer MOP message, which identifies the node that has volunteered to supply the load image. C-1 Bootstrapping with the DEBNI 4 The bootctrap transmits a Request Program MOP message to the volunteering node. o The bootstrap receives 2 Memory Load MOP message from the volunteering node. This message contains a section of the lo.d image. The bootstrap writes the received image data to the appropriate spot in hust memory. 6 The bootstrap transmits a Request Memory Load MOP message to request the next =ectior: of image data and to indicate the status of the previous section «f image data. 7 Steps 5 and 6 are repeated until the bootstrup receives a Memory Load with Transfer Address message. 8 The bootstrap transmits a final Request Memory Loed MOP message to indicate that the final block was received correctly. 9 Host program execution jumps to the starting address of the downloaded program. A user on the DEBNI's host system can request a boot by using the system console and typing the console B (boot) command at the system prompt (>>>). The following examples indicate the boot command for two VAX systems. On a VAX 82x=/83xx: >>> B ET50 Omn a VAX @zxx: >>> B /XMI:D/BI:6 ETO where: D is the XMI node number of the XMI-to-VAXBI adapter 6 is the VAXBI node number of the DEBNI C.2 Involuntary Booting In an involuntary boot, a remn*e n~"e sends the DEBNI a Maintenance Operations Protocol (MOP) Lot message. This operation is typically used for booting a system that is remotely located from an operator. C-2 Bootstrapping with the DEBNI If the DEBNI port is in the uninitialized state, it responds to the Boot meszage if the following two conditions are met: ° The packet containing the Beot message is addressed to the DEBNI default physical address (DPA), which is the MAC address from the DEBNT's MAC Address OM. e The boot verification code in the Boot message matches the DEBNI default boot verification code of 424E49424F 415244 (hex). 1 The packet containing the Boot message is addressed to the DEBNI default physical address (DPA). In this case, the DPA is either an address assigned by the host or, if no such address has been assigned, the MAC address from the DEBNI's MAC Address ROM. 2 The boot verification code in the Boot message matches the DEBNI boot verification code. If the port driver did not assign the DEBNI a boot verification code, the DEBNI uses its default boot verification code. [ if the port is in the initialized state (which is the normal case), it responds to the Boot meseage if the following three conditions are met: The DEBNI's Boot Message Flag was set by the port driver to enable involuntary booting over the network. In response to a valid Boot message, the DEBNI asserts BI RESET L on the VAXBI bus, which causes a VAXBI system reset. If auto restart is enabled for the local system, console boot software running on the local host boots the system from the default boot device. If auto restart is disabled, the conscle prompts for operator input from the console terminal before continuing the boot. Note that the boot device in either case may be a lecal disk (or tape) or the network as described in Section C.1. ICOOSNGIINN0CCOOOCOIK 00000000 KKK mmmmmnmmnmum TOO0N000D KK ON0NON00 00N KA XX XKL X KKK A XA HOOOON0OORCK K KOO0 IOONC KK KR KH R KX KK KK KKK, How to Read the DEBNI Ethernet Address The DEBNI's default Ethernet address, which is also called the default physical address (DPA), is stored in the DEBNI MAC address ROM. The DEBNI uses the DPA as its Ethernet address until the operating system assigns it a DECnet address during the operating system boot. D.1 Systei. s with DECnet If DECnet is running on your system, invoke the N«twork Control Program (NCP) and use the SHOW KNOWN LINE CHARACTERISTICS command to display the DEBNI's DPA as follows: $ MC NCP NCP>SHOW KNOWN LINE CHARACTERISTICS Known lLine Volatile Characteriastics as of 26-APR-1983 16:06:41 Line = BRA-0 Receive buffers = 21 Controller = normal Protocol = Ethernet Service timer = Hardware address = 08-00-2B-05-F9-A7 Device buffer size = 4000 1498 NCP>EXIT The hardware address is the DEBNI's DPA. D.2 VAX 6xux System If you are on a VAX 6xxx system, use the SHOW ETHERNET conaole command to display the DEBNI DPA ae follows: >>>SHCW ETHERHET HMI:E B:5 08-00-2B-08=-CD-F3 The command displays the XMI node number of the XMI-to-VAXBI adapter, the VAXBI node number of the DEBNI, and the DEBNI DPA. D-1 How to Read the DEBMNI Ethernet Address if the SHOW ETHERNET command cannot find the DEBNI, use the EXAMINE conscle command to read the DEBNI DPA. The address is stored in six bytes at the following VAXBI addresses: + 218 bb + 219 bb + 21A bb bbh 4+ 218 bb + 21C bb + 21D where address (bb) is the base address of the DEBNI nodespace computed (in hex) as follows: 20000000 + (2000000 * XMI node ID of XMI-to-VAXBI adapter) + (2000 * DEBNI VAXBI node ID) The following example shows how to examine the DPA of a DEBNI at VAXBI node D through an XMI-t0o-VAXBI adapter at XMI node C. The DTYPE register is examined first to confirm that the module being examined iz a DEBNI (device type = 0118). >>>E 3801A000 P 3801R000 >>>E/N:5/8 ! Examine DTYPE register ! Examine nogonol1ie 3801A218 P 3801A218 o]} P 3801A219 00 P 3801a21A 2B P 3801A21B o8 P 3801a21C cD P 3801A21D F3 address The address bytes are displayed in the order that they are transmitted over Ethernet (in this example, 08-00-2B-08-CD-F3). D3 VAX 82xx/83xx Systems If you are on a VAX 82xx or 83xx system, use the EXAMINE console command to read the DEBNI DPA. The address is stored in six bytes at the following addresses: + 218 bb + 219 bb D-2 How to Read the DEBNI Ethernet Address + 21A bb + 218 bb bb + 21C bb + 21D where address (bb) is the base address of the DEBNI nodespace computed (in hex) as follows: 20000000 + (2000 * DEBNI VAXBI node number) The following example shows how to examine the DPA of a DEBNI at VAXBI node 5. The DTYPE register is examined first to confirm that the module being examined is a DEBNI (device type = 0118). >>>E 2000A000 P 2000A000 ! Examine third byte ! Examine fourth byte ! Examine f£ifth byte ! Examine sixth byte 2000A21C CE >>>E P Examine second byte 2000A21B OB >>>E P ! 2000A21A 2B >>>E P Examine first byte 2000A219 00 >>>E P ! 2000A218 08 >>>E P Examine DTYPE Register 0100018 >>>E/B 2000A218 F ! 2000A21D AB The address bytes are displayed in the order that they are transmitted over Ethernet (in this example, 08-00-2B-0B-CE-AB). D4 VAX 85x/87xu/88xx Sysiems If you are on a VAX 86xx, 87xx, or 88xx system, use the EXAMINE console command to read the DEBNI DPA. The address is stored in six bytes at the following VAXBI addresses: D-3 How to Read the DEBNI Ethernet Address + 218 bb bb + 219 bb + 21A bb + 218 bb + 21C bb + 21D where address (bb) is the base address of the DEBNI nodespace computed (in hex) as follows: 20000000 + (2000000 * NBIA adapter number) + (2000 * DEBNI VAXBI nade ID) The following example shows how to examine the DF/\ of a DEBNI at VAXBI node 1. The NBIA adapter number is 1. The DTYPE register is examined first to confirm that the module being examined is a DEBNI (device type = 0118). >>>E 22002000 P 22002000 ! Examine DTYPE register ! Examine address 0o0D0118 >>>E/H:5/B 22002000 2B T 00 22002214 T o8 22002219 2200221B 08 R 22002218 2200221¢C cDh U P 2200221D 3F The address bytes are displayed in the order that they are transmited over Ethernet (in this example, 08-00-2B-08-CD-3F). m{mmm}mmmmmmmmm p O #08:00.0500000000 080 0etebebess i KK)GQQ{}Q{E@ mmmmmmmm How to Upgrade a DEBNA Module to a DEBNI A DEBNA module can be upgraded to a DEBNI module in the field by replacing the four DEBNA ROMs with four DEBNI ROMs. In addition, a new module identification (ID) label and & new module revision label must be pressed into place over the corresponding old DEBNA labels. The upgrade changes the boot-enable jumper on the DEBNA module to the DEBNI firmware ccasole-enable jrunper (Section 2.4). CAUTION As indicated in the following tab’ ¢, the TBEGS) option, which is a controller for the TEKB0 tape drive, has the same module number (T1034-00) as does the DEBNA. DO NOT attempt to upgrade a TBKB0 to a DEBNI, since the upgrade would disable the TBKS50's ability to control the THSS tape drive. - Device Optlon Module No. Controtier Type Tvpe T8K 50 T1034-00 Tape Drive 410E CTMana T1034-00 Ethernet 410F DEBNI T1034-YA Ethernet 0118 Figure E~1 shows the ROM locations on the DEBNA module, as well as the location of the module labels. The insert sheet in the update kit also provides pertinent information about the upgrade. The following is a step-by-step procedure for upgrading a DEBNA to a DEBNI: WARNINGS POWER OFF—Shut off system power and disconnect the meain system power cord before performing any procedurse in thie chapter. STABILIZE THE CHASSIS—For 82xx/83xx Conflguration 1 sysiems: make sure to extend the stabilizer leg(s) before you pull out the processor drawer. E-1 How to Upgrade e DEBNA Modute to & DEBNI Module Figure E-1 ROM and Label Locations . Notch VAXB! BCIS MicroVAX BiIC /CQRNER : Byte 0 ROMs Byte 1 to be replaced Byte 2 ! O ~3 L] O Byte 3 LEDs b > | Seria! Number Label {do not rapiace) Bevision Label {renlace) ZIF CONNECTC SEGMENTS 2 IR dModule ID Label (replace) ~ l | L SIA LANCE BTy WEAR ESD WRIST STRAP—You must wear an antistatic wrist strap that is connected to the processor cabinet whenever you work inside the chassis. USE CONDUCTIVE CONTAINERS—Whenever you remove a circuit board from a VAXBI card cage, place it in a conductive container. Pewer down the host computer system by: a. Turning the POWER switch to the OFF position B. Setting the system circuit breaker in the rear to OFF For 82xx/83xx Configuration 1 systems, extend the cabinet stabilizer leg(s} Open the cabinet. Make sure you are wearing the ESD wrist strap that is attached to the system's chassis. E-2 How to Upgrade a DEBNA Module to a DEBNI Meodule For 82xx/83xx Configuration 1 systems, slide out the card cage and @ Remove the card cage cover. <« Locate the slot that contains the DEB’ (A mody'e. O Lift, the locking lever to open the slc .. e rotate it until it locks into the vertical position. Slide the DEBNA out of the slot. CAUTICWN Uge extreme care when removing and ing alling the ROMs. Failure to do 80 could damage the chip :eads. 10 Cearefully remove the four ROMs from the DEBNA module. 11 If necessary, gently bend inward the two rows of pins on each ROM o that the ROM will fit into the socket: @. Place the ROM on its side on a table top covered with an antistatic sheet. b. Press down very carefully on the ROM so that the row of pins touching the table top bends inward slightly. ¢. Turn the ROM over on its other side and repeet the procedure for the other row of pins. d. Make small adjustments in this way until thc ROM fits into the gocket. 12 Install the new ROMs into the four ROM sockets. Normally, the lowest-numbered ROM should be installed in the socket for byte 0 (see Figure E-1), the next higher-numbcred ROM into the socket for byte 1, and so forth. However, see the insert sheet in the upgrade kit for an illustration showing where each ROM should be instalied. Align the chip leads carefully when ingerting the ROMs into the sockets. Make sure that the notched end of each ROM is near the board's edge (see Figure E-1). 13 Press the module ID label into place over the old module 11U label (see Figure E-1). 14 Choose the appropriate module revision label according to the instructions on the insert sheet in the upgrade kit. Then press this label into place over the old module revision label (see Figure E-1). E-3 How to Upgrade s DEBNA Module to o DEBNI Module NOTE The serial number label on the mnodule is not replaced. 16 Slide the converted module back into its card cage slot until the module stops: this is a zero insertion force card cage. 16 Close the locking lever. 17 Replace the card cage cover. 18 For 82xx/83xx Configuration 1 systems, rotate the card cage to the horizontal position and retract the stabilizer leg(s). 19 Close the cabinet. Verify the operation of the converted module as described in Section 2.2. 21 If therc are any verification problems, make sure that the ROMs are installed in the correct order and that each ROM is seated and oriented properly. E-4 Diegnestics (cont'd.) agli-tegt s 3-1 DPA See default physical address DTYPE See Device Register = Environmental requirements¢ A-1 BER See Bus Error Register Eihermnet default physical address « D-1 transceivar - 2-8 BiIC GPRs - B-1 Boot message, MOP- C-2 Eihernet intarface basic functions» 1-2 LANCE chip= 1-3 Bootstrapping from Ethernete C~1 Broke bit, in VAXBICSI: - 3~1 Bus Error Register - B-10 SiA chipe 1-3 F Firmware console-enable jumper » 1-5, 2-8 Cabinet kitse 15 Cablez - 1-4, 1-5 Ethemet- 2-6 H instailation« 2-4 H4000 tranaceiver » 2-2, 2-8 pigtail connector - 2-2, 2-6 Hardware Card cage, VAXBl- 2-4 D in.taligtion » 2-1 Humidity» -1 DEBET - 2-2 DEBNiI block diagram » 1-3 DECOM - 2-2 Default physical address » D-1 DELN}- 2-2 DEMPER - 2-2 DESTa. 2-2 Device Register- 3-2, 8-3 Diagnostics ROM-based IEEE 802+ 11 initialize bit, in VAXRICSR - 3-1 Installatione 2-1 to 2-9 precautions¢ 2--1 verification o 2-4 3-1 index-1 fndex Self-test ., results (cont'd.) interpreting ¢ 3-3 Jumpsr, \ running DO Jware console-enable ¢ 1-5, 2-8 3-1, 3-2 tested components » 3-4 troubleshooting « 2-5 L untested components and functions* 3-5 LANCE chipe 13 MAC address ROM - D-1 LEDs- 1-5, 3-2 Loopback connesiore 1-5 SIA chipe 1-3 STC bit, in XPUD Register« 3-3 STS bit, in VAXBICSR » 3-1 T Temperature - A-1 Module type - B-3 MOP Boot message Transition header » 2-2 C-2 Troubleshooting, self-test and » 2-5 ) Pigtail connector » 2-2, 2-6 Pinouts internal Ethernet cable « 2-6 transceiver cable connector » 2-7 Power-Up Diagnostic Register - 3-3, B8-17 R Upgrading a DEBNA to a DEBNI - E-1 vV VAXBI card cage - 2-4 VAXBI Control and Status Register- B-5 Broke bite 3~1 Initialize bit« 3~1 Registers Bus Emror e B-10 Device » 3-2, B-3 STS bite 3-1 Verification, installation « 2-4 Power-Up Diagnostice 3-3, B-17 VAXBI Contrel and Status ¢ B8-5 Removal of DEEN] - 2-0 ROM-based diagnostics¢ 3-1 S Seli-teste 3~1 o 3-5 how to run s 3--% LEDs- 32 fesuits» 32 0 3-4 inlEDs 32 in Power-Up Diagnostic Register 3-3 index-2 XPUD See Power-Up Diagnostic Register
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