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AA-C815A-TC

October 1977

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Document:	1160 MIcroprogramming Tools V1.0 Nov77
Order Number:	AA-C815A-TC
Revision:	0
Pages:	271
Original Filename:	AA-C815A-TC_1160_MIcroprogramming_Tools_V1.0_Nov77.pdf

OCR Text

THE PDP-11/60
MICROPROGRAMMING TOOLS
REFERENCE MANUAL
Order No. AA-C815A-TC

Edition 1
October 1977

Digital Equipment Corporation, Maynard, Massachusetts, 01754

THE PDP-11/60 MICROPROGRAMMING TOOLS REFERENCE MANUAL

The information in this document is subject to change without notice
and should not be construed as a commitment by Digital Equipment
Corporation. Digital Equipment Corporation assumes no responsibility
for any errors that may appear in this document.
The software described in this document is furnished under a license
and may only be used or copied in accordance with the terms of such
license.
No responsibility is assumed for the use or reliability of software on
equipment that is not supplied by Digital or its affiliated companies.
Copyright @ 1916 by Digital Equipment Corporation
The following are trademarks of Digital Equipment Corporation:
DIGITAL
DEC
PDP
DECUS
UNIBUS
COMPUTER LABS
COMTEX
DDT
DECCOMM
ASSIST-11

DECsystem-10
DECtape
DIBOL
EDUSYSTEM
FLIP CHIP
FOCAL
INDAC
LAB-8
DECSYSTEM-20
RTS-8

11/77-15

MASSBUS
OMNIBUS
OS/8

PHA
RSTS
RSX
TYPESET-8
TYPESET-10
TYPESET-11

CONTENTS

Preface
Chapters
PART I -- INTRODUCTION
1.

Introduction
PART II -- THE MICROPROGRAM ASSEMBLER: MICRO-11/60

2.
3.
4.
5.
6.
7.

Introduction to MICRO-11/60
Program Elements
Program Structure
Defini tions
Actions
Examples
PART III -- THE MICROPROGRAM LOADER: MLD

Microprogram Loader
PART IV -- THE MICROPROGRAM DEBUGGING TOOL: MDT

9.
10.
11 .
12.
13.

Introduction
Open Commands
Br e akpo in t Command s
Display Commands
Control Commands
PART V -- MICROPROGRAMMING TOOLS USER'S GUIDE

14.
15.
16.

Using the Assembler
Using the Microprogram Loader
Using the Debugger

Appendixes
A.
B.
C.
D.
E.

Syntactic Summary of Source and Command Languages
The 11/60 Predefinitions
The Dispatch File and Memory Partitions
Linked List Example
Error Messages

Index

NOTE: Each of the parts is immediately preceded by
a detailed table of contents for the part.

PREFACE
This manual describes the tools that are provided with the Writable
Control Store option for the PDP-11/60. The manual gives information
about assembling, loading, and debugging microprograms for the 11/60.
The manual is divided into five parts. The first part introduces the
microprogramming tools and discusses the syntax notation and other
issues that are common to all four parts of the manual.
The next three parts of the manual describe the three tools. Part II
describes the MICRO-11/60 assembler;
part III, the Microprogram
Loader, MLD; and part IV, the Microprogram Debugging Tool, MDT.
The fifth part of the manual contains information on the
tools to assemble, load, and debug a microprogram.

use

the

Five appendices, which give reference material,
are
included.
Appendix A summarizes the syntax.
Appendix B gives the 11/60
Predefinitions.
Appendix C describes the dispatch file and
a
technique for partitioning the Writable Control Store. Appendix D
provides a sample microprogram. Appendix E lists the error messages
for each of the tools.
Intended Audience
This manual is directed to
the
experienced
assembly-language
programmer
and to the hardware engineer with some programming
experience. The user should be familiar with the basic concepts of
the RSX-11M operating system described in Introduction to RSX11M
(DEC-11-0M1EA-B-D) and with basic operating procedures described in
the RSX-11M Operators's Procedures Manual (DEC-11-0MOGA-B-D).
Related Manual
This manual describes the microprogramming tools and their use.
understand the 11/60 microarchitecture, the following manual
provided:

To
is

PDP-11/60 Microprogramming Specification (AA-C814A-TC)
Reading the
suggested.

PDP-11/60

Microprogramming

Specification

first

PART I
INTRODUCTION

Contents

CHAPTER

INTRODUCTION
1• 1
1• 1• 1
1• 1• 2

1• 1. 3
1• 1• 4
1•2

THE SYNTAX NOTATION .
Concatenation
Disjunction .
Replication .
Omission
EXAMPLES

1-2

. 1-3
•

• 1- 3

. 1-4

. 1-5
· . 1-6

CHAPTER 1
INTRODUCTION

The Writable Control Store is a hardware option that allows users to
microprogram
the
11/60 for special applications.
This manual
describes the three tools that are provided with the Writable Control
Store option to aid the microprogrammer in writing, loading, and
debugging microprograms.
After this introductory part, the
described the tools, as follows:
Part II

three

parts

the

manual

- The Micro-11/60 Assembler, which converts
source microprograms into loadable object
modules.

Part III - The Microprogram Loader
MLD, which loads
the object module into the Writable Control
Store.
Part IV

- The Microprogram Debugging Tool -- MDT, which
allows the microprogrammer to examine and
breakpoint microprograms running in the
Writable Control Store.

Then, the last part of the manual
tools:
Part V

describes

the

use

- Microprogramming Tools User's Guide, which
describes how to invoke and execute the
tools.

the

three

MICROPROGRAMMING TOOLS -- INTRODUCTION

Page 1-2

Each chapter in the manual has a characteristic form. It consists of
a sequence of sections that begin with an introduction to a feature,
followed by a rigorous definition, followed by explanations and
examples.
The subsections that provide this information are given in
the following list:
SUb-section

Meaning

Syntax

Defines the structure of the feature.

Interpretation

Gives a succinct, but complete, statement of
the meaning of the feature, followed by a
detailed discussion of aspects of the feature.

Restrictions

Provides any restrictions on the
are not stated in the syntax.

Defaults

Supplies the assumptions made for
that are identified as optional
syntax.

any cases
within the

The manual is organized in this way so that it can be read
as a tutorial and'then used conveniently for a reference.

initially

1.1

feature

that

THE SYNTAX NOTATION

The constructs of the languages used by the WCS tools are defined in a
syntax notation.
A syntactic rule defines a syntactic name in terms
of a string of syntactic terms. The syntactic terms can be terminals
(such as:
keywords, separators, etc.), which are displayed in upper
case, or other syntactic names, which are displayed in lower case. An
example of a terminal is given in Section 1.1.

MICROPROGRAMMING TOOLS -- INTRODUCTION

Page 1-3

Syntactic rules are displayed in boxes. The box is divided into a
left-side and a right-side by a vertical line. On the left-side, the
syntactic name being defined is given and, on the right-side, the
string that defines the name is given. For example, consider the
following syntactic rule:

op-code

octal-digit

In the above rule, the syntactic name op-code
octal-digit.

1.1.1

defined

Concatenation

A concatenation is a sequence of two or more
written one after another.
An example of
syntactic rule is:

field-value-definition

field-value-name

definitions strings,
a concatenation in a

::=

value

The above syntactic rule states that a field-value-definition consists
of a field-value-name followed by the characters n::=n followed by a
value.
Another example of a concatenation, which includes
terminal and a syntactic name, is the following:

title-line

.TITLE

syntactic

the

keyword

title-string

The above rule states that a title-string
.TITLE followed by a title-string.

1.1.2

consists

Disjunction

A disjunction is a string definition that permits the choice from a
set of possible definitions. A disjunction is written within curly
braces, with each possibility separated from the others either by
being on a separate line or by a vertical bar character.

MICROPROGRAMMING TOOLS -- INTRODUCTION
An example of a disjunction in which
separate line is:

field-setting

field-name

Page 1-4
each

choice

written

field-value-name}
{ value

The above rules states that a field-setting consists of a field-name
followed by a "I" character followed by either a field-value-name or a
val ue .
An example of a disjunction in which
vertical bar characters is:

octal-digit

the

choices

are

separated

I {o 11 12 13 14 15 1 6 17}

The above rule states that an octal-digit can be either the character
0, or the character 1, or the character 2, and so on, to the character
1·

1.1.3

Replication

A replication is a string definition that can be repeated a specified
number of times. Replication is indicated in the syntax by enclosing
the string definition in curly braces with
a
subscript
and
superscript.
The
subscript
indicates
the minimum number of
repetitions and superscript indicates
the
maximum
number
of
repetitions. An example of replication in a syntactic rule is:

toc-string

{radiX-50-Char

}~4

The above syntactic rule states that a toc-string consists of
to 64 radix-50-chars.

from

MICROPROGRAMMING TOOLS -- INTRODUCTION

Page 1-5

If the replications are separated by some character, then that
character is given at the point of the curly brace as shown in the
following syntactic rule:

input-spec

{input-file

}n1

The above syntactic rule states that an input spec consists of one or
more input-files separated by commas. So, for example, an input-spec
can be any of the following:
fil e1
file1,file2
file1,file2,file3

The superscript n indicates that any number
g i v en.

1.1.4

replications

can

Omission

Omission is indicated by the use of the subscript 0 and the
superscript 1, indicating that from 0 to 1 replications are possible.
An example of omission is given in the following syntactic rule:

I
constraint

mask

low-address

high-address

] }01

The above rule states that a constraint consists of a mask, optionally
followed by the string" [low-address
high-address]"

MICROPROGRAMMING TOOLS -- INTRODUCTION
1.2

Page 1-6

EXAMPLES

Two kinds of examples are used in this manual, namely:
abstract and
concrete.
An abstract example is written with non-mnemonic names
(e.g. A, B, ALPHA, BETA, etc) and is used to illustrate a feature
when the scope of the feature is such that using a concrete example
would be distracting. A concrete example is an actual piece of a
microprogram.
When a concrete example is used, the context of that
example is usually referenced. The manual contains three complete
microprograms
and
concrete
examples
are
drawn
from
these
microprograms.

PART II
THE MICORPROGRAM ASSEMBLER:
MICRO-11/60

Contents

CHAPTER 2

INTRODUCTION TO MICRO-11/60

2. 1

TRANSLATION . . . . . . . .

2 • 1• 1

The 11/60 Predefinitions

2.2
2. 2. 1

2.2.2
2.2.3
2.2.4

2.3
2.4

CHAPTER 3

ADDRESS ASSIGNMENT

....

The Address Space . . . . . . . . .
Address Assignment Algorithm
Address Reservation . . . . . .
Address Specification . . . . .

ERROR DETECTION AND CORRECTION
PRESENTATION
....... .

2-2
· 2-3
·

. . 2-4
· 2-4
2-4

2-5
· 2-5
· . . . . 2-6
· 2-6

PROGRAM ELEMENTS

KEYWORDS . . . . .
3. 1
· . 3-2
NAMES . . . . . . .
3.2
· . 3- 3
3.2. 1
Syn tax . . . . .
· . . 3-4
Interpretation
3.2.2
· . . 3-4
VALUES . . . . . .
3.3
· . . 3-4
3-4
Syntax . . . . . . . . . .
3. 3. 1
Restrictions And Defaults
3.3.2
· . . 3-4
Interpretation . . . . . .
3-5
3.3.3
SEPARATORS AND DELIMITERS .
3.4
· . . . . 3-5
THE PROGRAM LINE
. . . . .
. 3-6
3.5
. • • . . • • • 3- 6
Comments . . . . . .
3.5. 1
Spacing . . . . . . . . .
3.5.2
· . . . . 3-7
Inter-Line Spacing
3.5.2.1
· . 3-7
Intra-Line Spacing
3.5.2.2
· . 3-8

CHAPTER 4
4. 1
4. 1 . 1

PROGRAM STRUCTURE
. . . . . .
......
. .
. . . . . . . . . . . . .
. . . . . .
..
. ........
. . . . . . . . . . . . .
.....
. . .
.
. . . ..
..
.......
. . ..
...
.
........
. .
. .
. . . .
. .
. . ..
...
..
..
.........
.............
.
. . ..
...
. . . . . . . .
. .
. . .
. ......

4-1
4-2
4-2
4-3
4-3
4-3
4-4
4-4
4-4
4-5
4-6
4-6

FIELD DEFINITIONS .
. . . .
. .
Syntax . . . .
. . ..
...
5. 1 . 2
Interpretation
. . . . . . .
5. 1 . 3
Restrictions
. . . ..
..
5. 1•4
Defaul ts
. . . .
. ......
5.1 .5
Semantics . . . . . . .
. ......
5. 1 .5. 1
Field-Specs .
. . . . . . . . .
5.1.5.2
Contiguous-Bit Fields
...
. .
5.1.5.3
Non-Contiguous-Bit Fields.
. .....
5.1.5.4
Overlapping Fields
. . . .
.
5 - 1 .5.5
Def81Jl t. Tni tial ization Pattern
..
5.1.5.6
Oversize Field Values . . . . . .
. .
5.2
MACRO DEFINITIONS .
. . . .
. .
5.2• 1
Syn tax . . . . .
. . . . .
. .
5.2.2
Interpretation . . . .
......
.
5.2.3
Restrictions
...
5.2.4
Defaults
. . . .
. .
5.2. 5
Semantics . . . . . . . . . . . . . . . . . .
5.2.5.1
Macro Expansion.
. .
5.2.5.2
Parameters
. . . .
. .
5.2.5.3
Nested Macros.
. .........
5.3
PREDEFINITIONS
..............
5 . 3. 1
Field Predefinitions
..........
5.3.2
Macro Predefinitions
. . .
. ...

5-2
5-3
5-4
5-4
5-4
5-4
5-5
5-5
5-5
5-6
5-7
5-8
5-8
5-9
5-9
5-10
5-10
5-10
5-10
5-12
5-13
5-14
5-14
5-15

4. 1 . 2

4.2
4.2. 1

4.2.2
4.2.3
4.2.4
4.3
4 . 3. 1
4.3.2
4.4
4.4. 1

4.4.2
4.4.3
4 . 4. 4
4.5
4.5. 1
4.5.2
4.5. 3
CHAPTER 5
5. 1

5. 1• 1

THE PROCESSING UNIT
Syn tax . . . . .
Interpretation
IDENTIFICATION PART
Syntax . . . . .
Interpretation
Defaults
Guidelines
TOC-LINES . .
Syntax
Interpretation
RADIX LINES. . .
Syntax . . . .
Interpretation
Defaults
.
Discussion
.
LIST KEYWORDS.
Syn tax
. . .
Interpretation
Defaults
.

.
.
.

.
.
.
.
.

4-7
4-7
4-7
4-7
4-8
4-8
4-8
4-8

DEFINITIONS

CHAPTER 6

ACTIONS

6• 1
MICROINSTRUCTIONS . .
. . . . . .
6. 1• 1
Syn tax . . . . . . . . . .
....
.
6. 1 • 2
Interpretation
.
Restrictions
. . . .
. .....
6 • 1• 3
6.1 .4
Defaul ts
. . .
.
6.2
TARGET ASSIGNMENT. . . . . .
...
.
6.2. 1
Syn tax . . . . . . . .
. . . . . . . .
6.2.2
Interpretation
.....
6.2.3
Restrictions
. . . . . ..
. ...
6 .2. 4
Defaul ts . . . .
. . . . .
.
6.2. 5
Semantics . . .
. . . . . . . . .
6.2.5.1
Mask . . . .
.......
.
6.2.5.2
The Address-Range
.........
The Scope Of The Target Assignment
.
6.2.5.3
6.2.5.4
Case-Microinstructions
.....
6.2.6
Discussion
. . . . .
·
6.2.6.1
. . . . . . . .
Looping . . . . . . .
6.2.6.2
. . . . . . . .
Switching . . . . . .
Guidelines . . . . . .
6 .2. 7
·
THE ENTRY POINT MECHANISM
6. 3
·

CHAPTER 7

7. 1

7.2

6-2
6-3
6-3
6-4
6-4
6-5
6-6

6-7
6-7
6-8
6-8
6-8
6-10
6-11
6-11
6-12
6- 12
6 -1 3
6-13
6-14

EXAMPLES
EXAMPLE 1 - THRESHOLD CHECK . . . . . . . . . . 7-1
EXAMPLE 2 - MATRIX ADDITION . . . . . . . . . . 7-5

CHAPTER 2
INTRODUCTION TO MICRO-11/60

The MICRO-11/60 assembler converts microprograms written in its source
language to absolute object code. The source language of MICRO-11/60
allows the symbolic definition of fields and macros and the use of
these names in specifying the actions to be performed by the
microprogram.
The MICRO-11/60 assembler performs two logical functions: translation
and address selection. In translating names within a microinstruction
to the appropriate set of bits, the assembler also performs valuable
syntax and error checking. In assigning addresses, the assembler aids
the programmer in laying out branches and allocating storage in an
effective manner.

MICRO-11/60 -- INTRODUCTION
2.1

Page 2-2

TRANSLATION

To construct an object microprogram, the assembler interprets a source
microprogram written in a language that defines and uses names to set
the appropriate bits in the microwords of the program. Names, called
field-names, are defined to identify a sequence of bits within the
microword. For example, bits 41 through 44 can be associated with the
field-name ALU by the following field-definition:
.FIELD ALU ::= <41:44>
Names, called field-value-names, then can be defined to represent some
or all of the possible field values for the field. Field-value-names
are specified following a field definition by a series of name and
value pairs, connected by the characters":: =". For example:
.FIELD ALU ::= <41:44>
NOT-A : : = 00
..
A-PLUS-B-PLUS-PS[C]
.. -- 01
NOT-A-AND-B ::= 02
ZERO ::= 03
A-PLUS-B-PLUS-D[C]
::= 04
A-PLUS-NOT-B-PLUS-D[C]
: : = 05
A-XOR-B ::= 06
A-AND-NOT-B ::= 01
DIVIDE ::= 10
A-PLUS-B : : = 11
B ::= 12
A-AND-B ::= 13
A-PLUS-B-PLUS-1 : : = 14
A-MINUS-B ::= 15
A-IOR-B
A

::=

Then to set bits 47 through 44 to the value
can write the field-setting:

10,

the

microprogrammer

ALU/DIVIDE
Since microprogrammers think in terms of symbolic names rather than
bits, the above notation is considerably more convenient for the
writer and understandable for the reader than the equivalent:

<41:44>/11

MICRO-11/60 -- INTRODUCTION

Page 2-3

In addition to this basic ability to refer to fields and their values
symbolically, macros can be defined to produce a notation in which the
functions of the microword, not the specific field-settings, are
given.
For example, to use the shift tree, a multiplexer selection
for each stage of the shift tree must be specified.
Consider the
following macro:
.MACRO D-RIGHT-14 ::= AEN/CMUX,AMUX/RIGHT-8,BMUX/RIGHT-4,
ASEL/RIGHT-2
The function performed by this macro is the shift of the D register to
the right 14 places.
To accomplish this, four field settings are
required; however, once this macro is defined, the microprogrammer
can simply write:
D-RIGHT-14
The above macro-call within a microinstruction is equivalent to
setting the four fields shown in the macro definition, but is, again,
more convenient and readable.

2.1.1

The 11/60 Predefinitions

The MICRO-11/60 assembler is a special version of the general
assembler MICRO-11.
MICRO-11/60 has been tailored for the needs of
the 11/60 microprogrammer by a series of predefinitions, which define
the fields of the 11/60 microword and which provide a set of macros
that specify the logical functions performed in executing an 11/60
microprogram.
For most applications, the 11/60 microprogrammer need not write any
additional field or macro definitions, but can work entirely in terms
of the predefinitions provided. These predefinitions have been used,
within DIGITAL, for several large microprograms and, in the course of
use, have been refined several times.
The philosophy of the predefinitions is described in Section 5.3 and a
complete
listing of the predefinitions, written in MICRO-11/60
language, is given in Appendix B. The method for incorporating the
predefinitions in the microprogram is described in Chapter 14.

MICRO-11/60 -- INTRODUCTION
2.2

Page 2-4

ADDRESS ASSIGNMENT

The 11/60 uses a chained sequencing method of addressing, as described
in the "11/60 Microprogramming Specification". Each microinstruction
contains the address of another microinstruction.
The field that
contains this address is called the Micro Pointer Field (UPF). If the
microinstruction specifies an unconditional branch, then control
passes to the microinstruction whose address is found in the UPF
field.
If the microinstruction specifies a conditional branch, then
control passes to the microinstrction whose address is formed by
OR-ing the output of the Branch Micro Test Multiplexer (BUT MUX) with
the UPF field.
The assembler, in the
absence
of
any
direction
from
the
microprogrammer, assigns unconditional branch addresses and, with some
help, assigns conditional branch targets.
The following sections
describe the address space, the algorithm used by the assembler in
assigning addresses and the ways in which the microprogrammer can
reserve and specify addresses.

2.2.1

The Address Space

The PDP-11/60 Writable Control Store consists of two pages. The first
page occupies addresses 6000 through 6777 and the second page occupies
addresses 7000 through 7777. The first 200 locations of the first
page, that is 6000 through 6200, are reserved for the resident section
of the Writable Control Store. The resident section is described in
the "PDP-11/60 Microprogramming Specification".

2.2.2

Address Assignment Algorithm

The assembler selects addresses for assignment from an available
address pool that is formed by considering all the addresses that lie
between the bounds specified either by the
predefinitions-file
(6200:7777) or, if the predefinitions-file is not included, by the
bounds given by the .BOUNDS keyword in the user-machine-definition.
The assembler chooses the lowest address in the available address
pool, assigns it to the current microinstruction, and removes the
address from the available address pool.

MICRO-11/60 -- INTRODUCTION

Page 2-5

The assembler only uses addresses from the available address pool that
are on the current page. The current page can only be changed by an
explicit address assignment from the microprogrammer. Initially, the
assembler establishes the current page as the page that contains the
first address assigned.
Suppose, for example, the address space
starts at 6200 and ends at 7777. The assembler chooses 6200 for the
address of the first microinstruction, and, in this way, establishes
the first page of the WCS as the current page. The assembler
continues assigning addresses until 6777. If the microprogrammer does
not change the page by assigning an address on the second page either
before or at that point, then the assembler reports an addressing
error for every subsequent microinstruction and assigns an address
that has already been assigned to a previous microinstruction.

2.2.3

Address Reservation

The microprogrammer can reserve a set of addresses and, in this way,
remove them from the available address pool. Section 6.2 of this
manual describes the mechanism for reserving and using reserved
addresses,
called the target assignment construct.
The target
assignment construct is used to layout the branch targets for a
conditional branch.

2.2.4

Address Specification

The microprogrammer can specify addresses explicitly, by simply
preceding the microinstruction by an address. As noted earlier, such
an explicit assignment is necessary to change the current page.
However, if an address is not available when it is specified, then an
error
is
reported
and
another
address
selected
for
the
microinstruction. To determine whether an address will be available,
the microprogrammer must consider the number of microinstructions that
precede the microinstruction, the bounds of the microprogram, and the
addresses reserved by the target assignment construct. Further, any
changes to the microprogram can affect the availability of
a
particular address. If, for example, the microprogrammer adds several
instructions before
the
given
microinstruction
or
moves
a
branch-definition to an earlier point in the program, its specified
address may become unavailable in the next assembly.

MICRO-11/60 -- INTRODUCTION

2.3

Page 2-6

ERROR DETECTION AND CORRECTION

MICRO-11/60 detects the errors described in Appendix E.
caused either by invalid input or by system failures.

Errors

are

Some errors are more devastating than others.
A system failure
usually causes the processing to cease and, in such a case, no useful
results are obtained. Some user input errors render the remainder of
the assembly useless. Some user input errors simply render the object
module invalid. However, although the resulting object module cannot
be loaded and executed, the results of the assembly can be examined
for other problems.
The devastating errors are usually the exception. Typically, in the
course of the assembly, MICRO-11/60 detects a few trivial errors that
can all be corrected before the next assembly. Moreover, MICRO-11/60
tries to continue processing and produce a useful result in all cases.
If the microprogrammer specifies an impossible action, the assembler
tries to counter with a possible action in the hope that the result
will be useful. For example, if the user specifies an address for a
microinstruction and that address has already either been reserved or
used, then the assembler reports the error and assigns the next
available address.
Most of the error messages are fairly self-explanatory.
One of the
most frequently encountered errors is Number 39 -- Syntax Error. If a
syntax error is encountered in a line, usually the entire line is
discarded, even though some useful information occurs before the
syntactically incorrect item. When the line is discarded, sometimes
other errors propagate from its absence and so the user should take
into account the affect of the absence of a line with a syntax error,
when studying the error messages produced as a result of an assembly.

2.4

PRESENTATION

The discussion of the MICRO-11/60 assembler is organized to begin with
the smallest unit, the program element, and to proceed through the
structure and parts of the microprogram to some complete examples, as
discussed in the following paragraphs.
The MICRO-11/60 assembler is a line-oriented processor, which accepts
a sequence of input lines written in MICRO-11/60 source language and
produces an object module that can be loaded into the 11/60 WCS.
The
elements of the source language are keywords, names, numbers, and
separators. These program elements are described in Chapter 3.

MICRO-11/60 -- INTRODUCTION

Page 2-1

The elements of the MICRO-11/60 source language are combined to form
the processing-unit that MICRO-11/60 assembles to form an object
module. The object module contains the microwords that, when loaded
in
the Writable Control Store, define the processing that is
performed. The processing-unit is described in Chapter 4.
The MICRO-11/60 processing unit consists of two parts,
namely
Definitions and Actions. The first part contains the definitions that
associate symbolic names with fields, values, field-value pairs and
groups of field-value pairs, so that the actions part of the
microprogram can be written as a sequence of logical functions.
The
second part contains the actions that are performed as a result of
executing the microprogram. Definitions are described in Chapter 5
and actions in Chapter 6 of this part of the manual.
Two complete microprograms are given in Chapter 1 to
use of the source language in writing microprograms.

illustrate

the

CHAPTER 3
PROGRAM ELEMENTS

A MICRO-11/60 microprogram is made up of a sequence of
These elements are keywords, names, values, and separators.

elements.

The microprogrammer writes his program in terms of these program
elements.
He uses spaces, tabs, and blank lines to arrange the
program in a clear and readable format and he uses comments to
describe the working of the program. When MICRO-11/60 interprets his
program, it uses these spaces or comments only to separate the
elements of the program.
The assembler then combines the language
elements to form language constructs and interprets these constructs
to produce the desired microprogram.
As an example, consider the following program excerpt, taken from
microprogram in Section 7.1.

the

! START OF LOOP TO CHECK EVERY POINT AGAINST THRESHOLD

SRCHLP:
.BEGIN:0[6240:6241]
The first three lines are comments.
as follows:
Element

Type

SRCHLP

name
separator
keyword
separator
value
separator
value
separator
value
separator

.BEGIN
:

0
[

6240
6241
]

The elements of the

excerpt

are

This chapter explains the elements of which a MICRO-11/60 microprogram
is built.
Keywords, names, values, and separators are presented.
Then, the program line is considered.

MICRO-11/60 -- PROGRAM ELEMENTS
3.1

Page 3-2

KEYWORDS

The keywords of MICRO-11/60 are given in the following list.
The
purpose of each keyword is summarized here and treated in more detail
in later sections.
Keyword

Purpose

.TITLE

Provide microprogram identification .

. IDENT

Provide microprogram version number.

.BOUNDS

Delimit the address space to be used for
microprogram.

the

.RADIX

Change the default number base that
assumed
for
values
written without
explicit radix .

is
an

. TOC

Make a table of contents entry.

.NLIST

Discontinue listing of assembled
the listing file .

program

. LIST

Resume listing of the
the listing file.

program

.FIELD

Define a field name and its associated
values .

. MACRO

Define a macro.

.CODE

Indicate the beginning of the code portion of
the microprogram.

.BEGIN

Identify and initiate a target assignment
construct for conditional branching.

. CASE

Define a conditional branch target .

.ENDB

Indicate the
construct.

. END

Indicate the end of the microprogram .

end

assembled

target

field

assignment

All MICRO-11/60 keywords begin with the character period (.).
A
keyword must be given exactly as it is shown in the above list;
otherwise, the assembler 1S unable to recognize the keyword and
discards the line on which it appears as syntactically incorrect.

MICRO-11/60 -- PROGRAM ELEMENTS
3.2

Page 3-3

NAMES

A name in MICRO-11/60 can be composed of from 1 to 32 characters from
the set of the characters given in Section 3.2.1, the first of which
must be an alphabetic. Five types of names are distinguished by the
MICRO-11/60 assembler:
Description
Field-name

A name that identifies a set of
microword.

Field-value-name

A name that represents a particular
given field.

Macro-name

A name that identifies a macro.

Formal

A name that is used within
indicate a formal parameter.

Label

A name that is associated
microinstruction address.

with

bits

within
value

the

for

macro-body

specific

A name must only be unique within its type. For example, a field-name
must be unique from all other field-names but can be the same as a
field-value-name, macro-name, formal, or label.
The rules for forming a MICRO-11/60 name are given
syntax. Some valid MICRO-11/60 names are:
ALPHA
A123
B

THISISASYMBOLNAME
THIS IS
A

A SYMBOL NAME

the

following

MICRO-11/60 -- PROGRAM ELEMENTS
3.2.1

Page 3-4

Syntax

name

alphabetic

name-char
alphabetic
radix-50-char
digit

3.2.2

{ name-char } : 1

I - I % I I l}
{A t B I ... I z}
{ alphabetic I digit I $ I .}
{o I 1 I ... , 9 }
{ rad ix-50-char

[

Interpretation

A name begins with an alphabetic character and continues until
separator is encountered. Separators are described in Section 3.4.

3.3

VALUES

A MICRO-11/60 value consists of a sequence of one or more digits. The
digits are interpreted according to the implicit radix, which is
assumed initially to be 8 and which can be reset by a .RADIX keyword.

3.3.1

value

3.3.2

Syntax

{ digit} :

Restrictions And Defaults

The maximum value for any number is 2**16 - 1.
If a value greater
than the maximum value is given, it is truncated; however, no error
message is printed. Signed numbers are not accepted.
The implicit radix is assumed to be 8, but each occurence of a
keyword changes the implicit radix.

.RADIX

Page 3-5

MICRO-11/60 -- PROGRAM ELEMENTS

3.3.3

Interpretation

A value is interpreted according to the implicit radix and represented
in the number of bits specified by the context. If the value cannot
be represented in that number of bits, then the value is truncated to
the required number of bits.

3.4

SEPARATORS AND DELIMITERS

Some characters have special meaning to MICRO-11/60 as separators or
delimiters.
The
following list summarizes the separators and
delimiters, and gives, for each, its special meaning.
Separator

Meaning
(period)

Used to indicate a keyword.

(at)

Used to indicate a formal
in
the
macro-body
of
definition.

(equals)

Used to initiate a constraint-string.

: : = or

Used to associate a meaning with a
name for field definitions, macro
definitions, and field settings.

. --

(CR)

parameter
a macro

(slash)

Used to separate a field-name from
its value in a microinstruction.

(prime)

Used to indicate concatenation.

(quote)

Used to
string.

(colon)

Used to terminate
address.

(asterisk)

Used within a constraint string.

(comma)

Used to separate field-settings in
microinstruction or macro-body.

(semicolon)

Used to terminate a microinstruction.

( ex cl amation
point)

Used to begin a comment.

(carriage
return)

Used to end a program line.

begin

and

end
a

label

quoted
and

MICRO-11/60 -- PROGRAM ELEMENTS
3.5

Page 3-6

THE PROGRAM LINE

MICRO-11/60 is a line-oriented processor.
It assumes that each
program line contains a complete and coherent piece of microprogram.
A program line can consist of from 1 to 120 characters. If the number
of characters on a line is greater than 120 but less than 124, then
any error messages associated with the line are lost. If the number
of characters on a line exceeds 123, then the rest Df the listing is
lost.
Some of the MICRO-11/60 constructs must be expressed on a single line,
namely:
the text following the keywords .TITLE, .IDENT, .BOUNDS,
.ENTRY, AND .ENDB. Other constructs are intrinsically multi-lined and
each line expresses a particular part of the construct.
The syntax for each construct expresses its representation on program
lines. For example, consider the syntax of the field-definition.

field-definition

.FIELD

field-name

~ field-value-name

field-spec

value

This syntax indicates that a field-definition begins with a line that
contains the keyword .FIELD followed by the field-name, followed by
either the characters "::=" or the characters ":=", followed by the
field-spec.
Following that line, a sequence of lines that define
field-value-names can be given.

3.5.1

Comments

A
Comments can be given on separate lines or at the end of any line.
comment is delimited by the character "!" on the left and the carriage
return that ends the line on the right.
The general form of a comment is:
comment-text
Comment text is reproduced by the assembler on the output listing, but
the assembler does not interpret the comment-text in any way. Comment
text can, therefore, appear at any point in the program and can
consist of any set of characters.

Page 3-7

MICRO-11/60 -- PROGRAM ELEMENTS
Some examples of comments are given in the following excerpt:
ENTRY POINT FOR MATRIX ADDITION
MATADD:
P1,
CLK-BA,PC-A,
A-PLUS-B,CSPB(TWO),
P2-T,
WR(AB,L,A),DATI,
P3,
NEXT,
J,MAT1

!INITIATE MEM(PC) READ:
!INCREMENT PC.

The use of comments increases the readability of a microprogram.
Chapter 7 of this manual contains two microprograms that are well
documented by the use of comments.

3.5.2

Spacing

Spaces can be inserted between any of the units of the microprogram.
The characters BLANK and TAB can be used to insert space within the
program line and the character CARRIAGE RETURN can be used to irsert
space between program lines.

3.5.2.1 Inter-Line Spacing - As an example of the use of blanks and
tabs for inter-line spacing, consider the following field defini~ion.
First, without spacing, it looks like:
.FIELD SWITCH ::= <22)
OFF::=O
ON: : =1
Then, after the addition of some spaces, it looks like:
.FIELD
OFF
ON

SWITCH
::= 0
: := 1

.. -..

<22)

The field-value-names OFF and ON are started at the first tab to
indicate their logical dependence on the line beginning with' .FIELD'.
Blanks are used to line up the characters "::=" and the values for
ease of reading.

MICRO-11/60 -- PROGRAM ELEMENTS

Page 3-8

3.5.2.2 Intra-Line Spacing - Blank lines are used to separate logical
sections of the microprogram.
If, for example, the microprogram
contains several field-definitions, then the readability of the
program is improved by separating each field-definition from the one
that follows by a blank line. For example:
.FIELD
OFF
ON

SWITCH
: := 0
: := 1

·· . --

.FIELD AFIELD ·· . -ALPHA ::= o
BETA
::= 1
GAMMA ::= 4

<22)

<30:20)

CHAPTER 4
PROGRAM STRUCTURE

This section describes the structure of an 11/60 microprogram. First,
the basic processing unit is described. Then, the identification part
of the microprogram is considered. Finally, the keyword lines that
can appear at any point within the microprogram are given.

4.1

THE PROCESSING UNIT

The processing-unit of the MICRO-11/60 assembler is a microprogram. A
microprogram consists of the two logical parts: definitions and
actions. In the definition part, the 11/60 predefinitions, any
program
identification, user field definitions, and user macro
definitions are specified. In the action part, the dispatch-file and
the user microinstructions, written in terms of the names defined in
the definition part, determine the processing that is performed when
the microprogram is executed.
As an example of a complete microprogram, consider the following:
.TITLE
.IDENT

REGEX

IREGEX11

.CASE 0 OF DISPCH
EXCHANGE:
P2-T, SR A,R3-A,
NEXT, J /E"XCH2;

!SAVE R3

EXCH2:
P2-T,
P3,
NEXT,

D A,R2-A,
WR(AB,L,B),R3-B,
J/EXCH3;

!MOVE R2 TO R3

P2-T,
P3,
NEXT,

D SR,
WR(AB,L,B),R2-B,
BUT(SUBRB) ,PAGE(O),

!MOVE SAVED R3 TO R2

EXCH 3:

J/BRA05;

.END

MICRO-11/60 -- PROGRAM STRUCTURE

Page 4-2

The above microprogram exchanges registers R2 and R3.
The program
uses
only predefined field and macro names and, therefore, a
user-definition part is not present. The action part of the program
contains the identification lines, which provide title, version, and
bounds information. The microinstructions determine the processing in
the microprogram. This microprogram contains three microinstructions.
The first microinstruction, labelled EXCHANGE, saves the contents of
R3 in the shift register (SR). The second microinstruction, labelled
EXCH2, moves the contents of R2 to R3 in both A and B scratchpads.
The last microinstruction, EXCH3, moves the saved contents of R3 to R2
in both scratchpads and returns to the base machine so that the next
PDP-11 instruction can be processed.

4.1.1

Syntax

processing-unit

predefinitions
{ user-definitions} :

dispatch-part
action-part

4.1.2

Interpretation

The processing-unit consists of a sequence of lines that identify the
microprogram and the constructs to be used in it, followed by a
sequence of microinstructions that make up the program. The assembler
uses the definitional part of the program to label and interpret the
action part of the program. The assembler produces an object module
that can be loaded into the Writable Control Store and executed.

MICRO-11/60 -- PROGRAM STRUCTURE
4.2

Page 4-3

IDENTIFICATION PART

The identification-part of a microprogram can appear in either the
user-definition or action-part.
It contains the .TITLE and .IDENT
keywords. The .TITLE keyword associates a name with the program and
the .IDENT keyword designates the current version number of the
program.
As an example of an identification-part, consider the following:
.TITLE MATRIX PACKAGE
.IDENT IMPV3AI
The .TITLE keyword associates the name MATRIX with the microprogram
and the .IDENT keyword indicates that the current version is MPV3A.

4.2.1

Syntax

identification-part

.TITLE

title-string

.IDENT

ident-string

ti tl e-string }

ident-string

4.2.2

{

radix-50-char }

Interpretation

The identification-part of a microprogram is interpreted as follows:
The .TITLE line is used to associate an identifying title with
the microprogram. The first six characters of the title-string,
or, if a blank occurs in the first six characters, the characters
preceding the blank are used as the title in the page heading on
each page of the output listing and in the object module produced
as a result of the assembly.
The .IDENT line is used to associate a version number with the
microprogram.
The first six characters of the ident-string or
the characters preceding the first blank are used as the version
number in the object module produced as a result of the assembly.
Although the .TITLE and .IDENT keywords are normally given only once,
as the first two lines of the microprogram, they can be given at any
point in the definition part or action part of the microprogram and
can be repeated any number of times.
In such a case, the last
title-string or ident-string encountered is used.

MICRO-11/60 -- PROGRAM STRUCTURE
4.2.3

Page 4-4

Defaults

If the .TITLE keyword is not given,
blanks is assumed.

then

title

consisting

If the .IDENT keyword is not given, then an ident-string consisting of
6 blanks is assumed.

4.2.4

Guidelines

The title-string and ident-string are truncated after six characters
or at the first blank or tab, whichever comes first. These strings
therefore, should be chosen so that the part left after truncation is
both unique and meaningful. The ident-string should be changed each
time the microprogram is updated, so that different versions of the
program are easily distinguishable.

4.3

TOC-LINES

A toc-line is used to identify a logical segment of the microprogram,
just as a heading is used to identify a logical segment of a document.
The assembler collects the toc-lines and prints them at the beginning
of the output listing and, in this way, produces a table of contents
for the listing.
The following program excerpt illustrates the use of toc-lines:
.TITLE MATRIX PACKAGE
.IDENT IMPLL271
.ENTRY MATPAK ::= 1
.TOC *MATRIX PACKAGE
.TOC * INITIALIZATION
.TOC

OPERATION DISPATCH

.TOC

MATRIX MULTIPLY

.TOC

MATRIX ADD

.TOC

MATRIX INVERT

.TOC

FINALIZATION

MICRO-11/60 -- PROGRAM STRUCTURE

Page 4-5

In the output listing, each line is numbered starting from 0001.
Thus, the table of contents provides a quick reference to the
appropriate line in the microprogram.
The output listing for the
above excerpt has the following form:
TABLE OF CONTENTS
4
5
22
30
79
125
220

*MATRIX PACKAGE
* INITIALIZATION
* OPERATION DISPATCH
MATRIX MULTIPLY
*
MATRIX ADD
*
MATRIX INVERT
*
* FINALIZATION

1
2
3
4
5

.TITLE MATRIX PACKAGE
.IDENT IMPLL271
.ENTRY MATPACK ::= 1
.TOC *MATRIX PACKAGE
.TOC * INITIALIZATION

· TOC

OPERATION DISPATCH

· TOC

MATRIX MULTIPLY

.TOC

MATRIX ADD

125

.TOC

MATRIX INVERT

220

· TOC

FINALIZATION

Observe that an interesting table of contents is constructed
toc-lines are indented to indicate subordination.

4.3.1

Syntax

toc-line

.TOC

toc-string

(

}

name-char

64
1

the

MICRO-11/60 -- PROGRAM STRUCTURE
4.3.2

Page 4-6

Interpretation

For each toc-line, the assembler creates a line of the form:
line-number

toc-string

The assembler prints the created table of contents line at the
beginning of the output listing. The toc-string is printed exactly as
it appears in the input, including any leading spaces or tabs.

4.4

RADIX LINES

A radix-line is used to change the implicit radix. The implicit radix
is the radix that is assumed for a value that appears in the program.
The value '22', for example, is interpreted according to the implicit
radix and, therefore, can be interpreted as an octal 22 at one point
in the program and as a decimal 22 at another point.
As an example of the
microprogram excerpt:
.TITLE
.IDENT
.FIELD

use

radix-lines,

consider

the

following

ABC

IABCV11

FIELD1 ::= <10:5>
VAL1 ::= 20
.RADIX 10
.FIELD2 ::= <22:10>
Q1 ::= 12
. CODE
0022:

OCTAL 20
DECIMAL 12

E1:

FIELD1 IVAL 1,

OCTAL 20

.END
The comments in the above microprogram indicate the radix according to
which the value on the same line is interpreted. The implicit radix
is assumed initially to be 8. Thus, the value of VAL1 is assumed to
be an octal 20. When FIELD1 is set to VAL, the implicit radix is 10,
but the value of VAL1 was established to be an octal 20 in the
definition part of the program and, therefore, an octal 20 is assigned
to that field.

MICRO-11/60 -- PROGRAM STRUCTURE
4.4.1

Page 4-1

Syntax

radix-line

.RADIX

radix

{2 I

4.4.2

10 }

Interpretation

A radix-line changes the implicit radix to the radix specified in the
line.
All values are interpreted according to the implicit radix
currently in effect. An implicit radix is in effect until another
radix-line is encountered.

4.4.3

Defaults

The implicit radix is assumed initially to be 8.

4.4.4

Discussion

Only those syntactic units that are identified as values in the syntax
are interpreted according to the implicit radix. Other numbers, such
as addresses and bit specifiers, are not interpreted according to the
implicit radix. An address, for example, is always interpreted as an
octal-value and is so identified in the syntax.
Similarly, a bit
specifier is always interpreted as a decimal number.

MICRO-11/60 -- PROGRAM STRUCTURE
4.5

Page 4-8

LIST KEYWORDS

The list keywords are used in pairs to suppress part of the output
listing produced as a result of assembling a microprogram. The .NLIST
keyword directs the assembler to suppress listing until a .LIST
keyword is encountered.
The .LIST keyword directs the assembler to
resume listing.
Both files supplied by DIGITAL, the predefinitions file and the
dispatch file, contain list keywords that prevent the listing of
contents of these files as part of each microprogram assembly.
The
predefinitions file output, obtained separately without the use of
list keywords, is reproduced in Appendix B;
the dispatch file is
reproduced in Appendix C.

4.5.1

Syntax

.NLIST}

list-keywords
{

4.5.2

.LIST

Interpretation

As part of the assembly process, MICRO-11/60 creates a listing file,
as described in Section 14.4. If the assembler encounters a .NLIST
keyword, it stops writing the listing file.
If the assembler
encounters a .LIST keyword, it resumes writing the listing file.
The .NLIST and .LIST keywords scope the material that is to be
suppressed.
The list-keywords essentially change the listing mode of
the assembler. If the assembler encounters a .LIST when it is in
listing-mode, it effectively ignores that keyword. Similarly, if the
assembler encounters a .NLIST when it is in suppress-listing-mode, it
ignores the keyword.

4.5.3

Defaults

The default mode is listing-mode.

CHAPTER 5
DEFINITIONS

The definitions part of a MICRO-11/60 microprogram identifies the
microprogram and specifies the meanings of all names that are used.
The definitions part consists of two units:
the predefinitions
supplied
by
DIGITAL and any user-definitions supplied by the
programmer. The programmer can define names for fields in the
microword and can define macros that set one or more of these fields.
The choice of meaningful names and the specification of macros that
perform logical functions enhance the readability of the microprogram.
r

user-definitions

J field-definition
Lmacro-definition

The user-definition part of the microprogram is optional.
The
MICRO-11/60 assembler obtains from the predefinitions file knowledge
of the name of each field, its position within the microword, its
length,
default
setting,
truncation
mode,
and
associated
field-value-names. Similarly, a set of macros to perform the logical
functions
associated
with
microprogramming the 11/60 is also
predefined. Most microprograms are written exclusively in terms of
these predefined fields and macros and, therefore, do not contain any
field or macro definitions.
Occasionally, however, the programmer wants to define a new field or a
new set of macros for a special application. In such a case, the
definition part of the microprogram contains the field or macro
definition.
In processing the definition part of the microprogram,
the assembler assimilates the information in these definitions and
adds that information to the body of predefined information for the
duration of the assembly.
This section describes the definition-part of a microprogram.
First,
field definitions are described. Then, macro definitions are given.
Finally, predefinitions are discussed.

MICRO-11/60 -- DEFINITIONS
5.1

Page 5-2

FIELD DEFINITIONS

A field-definition is used to assign a mnemonic name to a set of bits
within the microword and, further, to associate with that field a set
of names that suggest the meanings of the values that the field can
have.
For example, consider the following definition of the Bus
ENable field, taken from the 11/60 predefinitions:
.FIELD BEN ::= <43:42>
BS PLO :: = 0
BS PHI :: = 1
CSP ::= 2
BASCON ::= 3
The field BEN is predefined to occupy bits 43 and 42 of the microword
and to have associated with it four field-value-names, namely: BSPLO,
BSPHI, CSP, BASCON. The value of the BEN field controls the source
that is enabled onto the BUS BIN, as described in the "11/60
Microprogramming Specification". The definition of field-value-names
allows the programmer to write the following field-setting in a
microinstruction:
BEN/BASCON
The above field-setting assigns the value 3 to bits 43 through 42 and,
further, describes the intent of that assignment, namely: to enable
the BASe CONstant source onto BUS BIN.
As another example, consider the following
field, taken from the 11/60 predefinitions:

definition

the

EMIT

.FIELD EMIT::= <47:44>'<41:30>
The field EMIT is predefined to occupy bits 47 through 44 and bits
through 30 of the microword.

Page 5-3

MICRO-11/60 -- DEFINITIONS
5.1.1

Syntax

fielddefinition

.FIELD

{

field-name

field-spec

field-value-defini tion }

field-spec

bit-spec

{

bit-range};

bit-range

left-bit

defaul t

{

value

left-bit

right-bit

(
.../

[

decimal-digit} 2

field-valuedefinition

field-value-name

field-value)
name
field-name

name

j a

right-bit}:

'--

default

MICRO-11/60 -- DEFINITIONS
5.1.2

Page 5-4

Interpretation

A field-definition is interpreted as follows:
The field-spec is evaluated and the designated
bits
are
associated with the field-name.
If a default value is given,
then that default
value
becomes
part
of
the
default
initialization pattern.
The
field-value-definitions
are
then
processed.
Each
field-value-name and its assigned value, truncated, if necessary,
according to the truncation mode, are associated with the
field-name.
Once specified in this way, a field-value-name can
be used as part of a field-value-name/field-value pair to provide
a value for a field.

5.1.3

Restrictions

The maximum field size that can be specified is 16 bits.
Therefore,
the bit spec must not specify a concatenation of bits such that the
length of the field consisting of those bits exceeds 16.
The maximum number of bit-ranges that can be given in a bit-spec
16. The limit on bit-ranges derives from the field size limit.
Left-bit and right-bit in
inequality:
47

left-bit

bit-range

right-bit

must

satisfy

the

following

However, within a sequence of bit-ranges, the relationship among the
bit-spec
bit-ranges
is
unspecified.
For
example,
the
"<12:10>'<30:26>'<6:5>" is perfectly valid.

5.1.4

Defaults

If right-bit is omitted in a bit-spec, then the left-bit and right-bit
are assumed to be the same and a field size of 1 is assumed.

5.1.5

Semantics

The following sections describe the detailed semantics of
the
field-definition.
First, the field-spec is discussed with special
attentiori being given to the topics of non-contiguous and overlapping
bit fields. Then, the default initialization pattern is described.

MICRO-11/60 -- DEFINITIONS

Page 5-5

5.1.5.1 Field-Specs - The field-spec gives the information necessary
to define the field. It specifies the bits occupied, and, optionally,
any default value.
A field can be specified to be either a
contiguous-bit field or a non-contiguous-bit field.

5.1.5.2 Contiguous-Bit Fields - A
contiguous-bit
expressed by a single bit spec, as follows:

can

field

.FIELD field-name ::= <left-bit:right-bit>
The field is defined to occupy the contiguous set of bits starting
with left-bit and proceeding through right-bit.
The length of a
contiguous bit field is calculated as follows:
field-length

= left-bit - right-bit + 1

An example of a contiguous-bit field is given by the
definition of the ALU field from the 11/60 predefinitions:
.FIELD

following

ALU ::= <47:44>

The field ALU is defined to occupy bits 47 through
microword. The length of the ALU field is 4 bits.

the

5.1.5.3 Non-Contiguous-Bit Fields - A non-contiguous-bit field can be
expressed by concatenating two or more bit-specs, as follows:
.FIELD

field-name

::=

<11:r1>'<12:r2>' ... '<ln:rn>

Such a field occupies left-bit1 (11) through right-bit1 (r1), followed
by left-bit2 (12) through right-bit2 (r2), and so on. The length of a
non-contiguous-bit field is calculated by adding the lengths of the
contiguous components.
field-length

(11-r1+1)+(12-r2+1)+ ... +(ln-rn+1)

An example of a non-contiguous-bit field is given by the
definition of the EMIT field from the 11/60 predefinitions:
.FIELD

EMIT

following

..
.. -- <47:44>'<41:30>

The field EMIT is defined to occupy bits 47 through 44 followed by
bits 41 through 30 of the microword. The length of the EMIT field is
16 bits. The bits occupied by the EMIT field are indicated in the
following diagram by X.
4
4
3
2
1
765432109876543210987654321098765432109876543210

XXXX

XXXXXXXXXXXX

MICRO-11/60 -- DEFINITIONS

Page 5-6

If the field-setting 'EMIT/65432' is given in a microinstruction, then
the bits of the EMIT field are set as shown in the following diagram:
4
4
321
765432109876543210987654321098765432109876543210
10110

101100011010

5.1.5.4 Overlapping Fields - The MICRO-11/60 assembler allows the
definition of overlapping fields and the redefinition of fields and
subfields. This flexibility permits, for example, the different
structures of the 11/60 microword to be expressed.
For example, the definitions of the ALU and EMIT fields in the 11/60
definition, as seen in the previous section, define overlapping
fields. The ALU field is indicated by A and the EMIT field by E in
the following diagram:
4
4
321
765432109876543210987654321098765432109876543210
AAAA

. EEEE

EEEEEEEEEEEE

When a microword is executed, bit steering within the word determines
the meaning of fields within the word. The assembler, however, does
not attempt to determine if a microword is either complete or
consistent.
However, if the programmer attempts to set the same bit
more than once in a microword, the assembler reports an error.
Consider, for example, a microinstruction that, by mistake, sets both
the ALU and EMIT fields, as follows:
EMIT/65432,ALU/17
The EMIT field-setting is processed first and, as a result, the bits
are set as shown in the previous section. Then the ALU field setting
is processed and bits 47 through 44. An error is reported.
However,
if the inconsistent field settings do not involve overlapping fields,
the assembler is unaware of any problem.

MICRO-11/60 -- DEFINITIONS

Page 5-7

5.1.5.5 Default Initialization Pattern - The pattern that is used to
initialize
each
word in the microprogram before the explicit
field-settings are processed is called the default initialization
pattern.
This pattern is constructed from the defaults specified for
field-definitions.
The construction of the default initialization pattern starts with a
word that consists of 48 zeros. When field-definitions are processed,
any default values are set in the default initialization pattern.
Since the MICRO-11/60 assembler reads the 11/60 predefinitions first,
the default initialization pattern is the pattern that exists after
processing the defaults in the predefinitions.
The only predefined
field that has a non-zero default is the UBF field, which is defined
as follows:
.FIELD UBF ::= <13,9>,30
Therefore, the default initialization pattern
predefinition is:
4

after

considering

the

765432109876543210987654321098765432109876543210
000000000000000000000000000000000011000000000000
If the programmer adds a field-definition with default value, then
this default is logically ORed with the default pattern and the result
of that operation becomes the new default pattern.
Suppose, for
example, the programmer adds the following:
.FIELD ALPHA ::= <2:0>,2
.FIELD BETA
::= <47:40>,25
Then the default initialization pattern becomes:
4
3
2
1
765432109876543210987654321098765432109876543210

000101010000000000000000000000000011000000000010
The default pattern, therefore, is the word formed by the logical OR
of all defaults given. If two fields overlap, only one field should
be assigned a default value.
If the default value requires more bits for its representation than
are present in the associated field, the default value is truncated
and no error message is reported.

MICRO-11/60 -- DEFINITIONS

Page 5-8

5.1.5.6 Oversize Field Values - When a value that requires more bits
than are present in a field is assigned to that field, then the high
order bits are truncated.
For example, suppose the
following
field-setting is given by mistake:
ALU/32
As previously noted, the ALU field is 4 bits long. However, the value
32, interpreted according to the implicit radix 8, requires 5 bits for
its representation. The assembler truncates the high order 1 and
assigns the value 12 to the ALU Field and no error is reported.

5.2

MACRO DEFINITIONS

A macro-definition is used to obtain a convenient and readable
notation for a commonly performed operation. For example, consider
the following macro definition, taken from the 11160 predefinitions:
.MACRO

DIVIDE

.. --

ALU/DIVIDE

This definition allows the programmer
within
a
microinstruction instead
ALU/DIVIDE.

to
of

write the string
the more lengthy

DIVIDE
string

Often, macro definitions are written that combine the setting
several related fields. For example, consider the following:
.MACRO

D-RIGHT-14

..
.. --

AEN/CMUX,AMUX/RIGHT-8,BMUX/RIGHT-4,
ASEL/RIGHT-2

The programmer can write D-RIGHT-14 within a microinstruction to shift
D to the right by 14.
The assembler replaces the macro-call
'D-RIGHT-14' by the macro body and the fields to accomplish that shift
are set appropriately.

MICRO-11/60 -- DEFINITIONS
5.2.1

Page 5-9

Syntax

macro-definition

.MACRO

macro-name {

(

{

fOrr.1al}

~ ) }~

macro-body

macro-body
{

macro-body-part

macro-body-part }

field-name
{

value-spec

L
r~

macro-call

.../

value-spec

{field-value-name

I value I

macro-call

macro-name

actual}

actual

{name

macro-name}
formal
.
field-name

name

5.2.2

{(

{

formal}

~ )

formal}

Interpretation

A macro-definition is interpreted as follows:
The macro-body is associated with the macro-name so that when a
macro-call is encountered, the macro-body, with any formals
replaced by actuals, replaces the macro-call.
A macro-call is interpreted as follows:
The macro-body associated with the macro-name is copied, and the
formal
parameters
in the macro-body are replaced by the
actual-parameters in the macro-call, the i'th formal being
replaced by the i'th actual. Any excess actual parameters are
discarded.

MICRO-11/60 -- DEFINITIONS
5.2.3

Page 5-10

Restrictions

Macros must not be defined to be recursive. That is, the definition
of a macro must not contain a calIon itself or a calIon another
macro that ultimately results in a calIon itself.
The substitution of an actual for a formal must result in a correct
syntactic unit.
For example, the actual that replaces a formal in a
field-identifier must be a field-name.

5.2.4

Defaults

If an actual is not given for each formal, then sufficient actual
parameters with the value 0 to provide for the defined formals are
assumed to follow the explicitly given actuals.

5.2.5

Semantics

The detailed semantics of macro-definition and use are considered in
the following sections. First, macro expansion is described for the
simplest case, in which the macro-definition has no parameters. Then,
parameters
are considered.
Finally, the nesting of macros is
described.

5.2.5.1 Macro Expansion - The replacement of a macro-call by the
macro-body associated with that macro is called macro expansion. When
the assembler encounters a macro-call within a microinstruction, it
replaces the macro-call by the macro-body and then processes the
macro-body. For example, consider the following macro-definition:
.MACRO ALPHA ::=

AFLD/10,BFLD/20

MICRO-11/60 -- DEFINITIONS

Page 5-11

Suppose that the macro is called within a microinstruction as follows:
L 1:

CFLD/10,ALPHA,DFLD/5
The assembler first processes the field-setting CFLD/10.
Then, when
it encounters the macro-call ALPHA, it replaces the call by the
macro-body AFLD/10,BFLD/20, processes the field· Jetting AFLD/10, then
the field-setting BFLD/20, and finally the fiel ··setting DFLD/5.
The text of the macro-body is not interpreted until it is expanded and
therefore, it is understood in the context of the point at which it is
expanded. The implicit radix is an example of the context of
interpretation.
Suppose the macro ALPHA is defined when the implicit
radix is 8 and called first when the radix is 10 and again when the
radix is 8 as follows:
.RADIX 8
.MACRO ALPHA

..
.. -- AFLD/10,BFLD/20

.CODE
.RADIX 10
L2:
ALPHA;
.RADIX 8
L 3:

ALPHA;
Because the macro-body is not interpreted when it i3 defined, the
implicit radix at that point is irrelevant. For microinstruction L2,
ALPHA is expanded and interpreted when the implicit radix is 10 and
therefore AFLD is set to a decimal 10 and BFLD to a decimal 20. For
microinstruction L3, ALPHA is expanded and interpreted when the
implicit radix is 8 and AFLD and BFLD are set to octal 10 and octal 20
respectively.

MICRO-11/60 -- DEFINITIONS

Page 5-12

5.2.5.2 Parameters - The simplest case of a macro-definition is the
case in which no parameters are defined. In that case, the macro-call
simply consists of the macro-name. However, when a macro is defined
with parameters, it is possible to specify a more general and powerful
substitution.
The formal parameters of a macro definition are identified within
parentheses following the macro-name and then indicated within the
text of the macro-body by the character '@'.
As an example of a
macro-definition with parameters, consider the following:
.MACRO BETA(X,Y) ::= AFLD/@X,BFLD/@Y
The formal parameters of the macro definition are X and Y.
The
position of X and Y within the parentheses in the macro-definition is
important. When a call is made on the macro, the actual parameters in
the call are associated with the formal parameters positionally. That
is, the first actual is associated with the first formal, the second
actual with the second formal, and so on. Consider the following
macro-call:
BETA(C,D)
The actual parameters of the call are C and D.
macro-call is:

The expansion

the

and

the

AFLD/C,BFLD/D
The first actual C is associated with the
second actual D with the second formal Y.

first

formal

If more actuals than formals are given, then the extra actuals are
discarded.
If fewer actuals than formals are given, then the missing
actuals are assumed to be zero. If a null actual is specified, then
that actual is assumed to be zero. Some examples follow to illustrate
these cases:
Macro-Call

Macro Expansion

BETA(C,D,E)
BETA(D,E)
BETA(F)
BETA(,G)
BETA()
BETA

AFLD/C,BFLD/D
AFLD/D,BFLD/E
AFLD/F,BFLD/O
AFLD/O,BFLD/G
AFLD/O,BFLD/O
AFLD/O,BFLD/O

MICRO-11/60

Page 5-13

DEFINITIONS

A formal parameter is only defined within the macro-body associated
with the macro-definition. Further, within the macro-body, the formal
must be preceded by the character '@'.
Consider the following
microprogram excerpt:
.FIELD F1 ::= <24:22>
A :: = 1
B :: = 2
.MACRO GAMMA(A,B,C) ::= F1/A,F2/@A,F3/@B,F4/@C
.CODE
L1:
GAMMA (G , H, I) ;
.END
The expansion of the macro GAMMA in microinstruction L1
following string:

produces

the

F1/A,F2/G,F3/H,F4/I
The symbol A is interpreted first as a field-value-name.
Then, when
it is preceded by an '@', it is interpreted as the first formal
parameter.

5.2.5.3 Nested Macros - The macro-body of a macro definition can
contain calls on other macros. As an example, consider the following
macro-definition from the 11/60 predefinitions:
.MACRO ASPLO[OO] D
::= ASP(ROO),WR(A,L,A)
.MACRO ASP(XX)
::= ASEL/@XX,RIF/@XX
.MACRO WR(AB,HL,ADDR) ::= MOD/CLKSP,WRSP/@AB,HILOI@HL,WRSEL/@ADDR
The macro ASPLO[OO]_D is equivalent to the following string:
ASEL/ROO,RIF/ROO,MOD/CLKSP/WRSP/A,HILO/L,WRSEL/A
As another example, consider the following set of macro definitions:
.MACRO ALPHA(A)
::= FLDI@A,BETA(@A,B)
.MACRO BETA(X,Y)
::= XYZ/@X,GAMMA(Q,R,S)
.MACRO GAMMA(X,Y,Z)::= AFLD/@X,BFLD/@Y,CFLD/@Z
The macro-call ALPHA(AC) is expanded as follows:
FLD/AC,BETA(AC,B)
XYZ/AC,GAMMA(Q,R,S)
AFLD/Q,BFLD/R,CFLD/S
Thus, the final string is:
FLD/AC,XYZ/AC,AFLD/Q,BFLD/R,CFLD/S

MICRO-11/60 -- DEFINITIONS
5.3

Page 5-14

PREDEFINITIONS

The 11/60 predefinitions give a set of field and macro definitions
that are sufficient for most 11/60 microprograms. The complete set of
predefinitions, in MICRO-11/60 source, is given in Appendix B of this
manual.
The predefinitions-file is part of the input to a normal
MICRO-11/60 assembly, as described in Chapter 14.

5.3.1

Field Predefinitions

The field predefinitions specify all the field names for the 11/60
microword.
In
addition,
for
each
field-name,
a
set
of
field-value-names is defined. These names are selected to provide
convenient mnemonics for the value of the field.
For example,
consider the following predefinition for the ALU field:
.FIELD ALU ::= <47:44>
NOT-A ::= 00
-- 01
A-PLUS-B-PLUS-PS C
NOT-A-AND-B ::= 02
ZERO ::= 03
04
A-PLUS-B-PLUS-D C
A-PLUS-NOT-B-PLUS-D C
::= 05
A-XOR-B :: = 06
A-AND-NOT-B ::= 07
DI VI DE : : = 1 0
A-PLUS-B ::= 11
B
::= 12
A-AND-B :: = 1 3
A-PLUS-B-PLUS-1
.. - 14
A-MINUS-B ::= 15

A-IOR-B
::=
A
::=
17

Note that the field-value-names correspond closely to the verbal
definition given for the field value in Table 2-1 of the "PDP-11/60
Microprogramming Specification".

Page 5-15

MICRO-11/60 -- DEFINITIONS

When several choices for a field-value-name are possible,
the
predefinitions provide all the names as a convenience for the
microprogrammer, who can then use the name that seems most logical to
him. As an example, consider the following predefinition:
.FIELD WRSP ::= <16:15>
NOP::=O
WR-A::=1
A: : =1
ASP::=1
WR-B::=2
B: : =2
BSP: :=2
WR-A-AND-B: : =3
AB: : =3
BA: : =3
ABSP::=3
BASP: :=3
BOTH: : =3

NO ASP/BSP REWRITE
WRITE ASP ONLY, ON P3 120-150 NS.
WRITE BSP ONLY, ON P3 120-150 NS.
WRITE BOTH ON P3

To set the WRSP field so that both scratchpads are written,
microprogrammer can write any of the following field-settings:
WRSP/WR-A-AND-B
WRSP/ABSP

5.3.2

WRSP/AB
WRSP/BASP

the

WRSP/BA
WRSP/BOTH

Macro Predefinitions

The macro predefinitions provide a language for microprogramming the
11/60.
A macro is predefined for each logical function that the
microprogrammer wants to perform.
Macros are defined to supply a convenient name
For example:
.MACRO CLK-SR

..
.. --

for

field-setting.

CLKSR/YES

Macros are predefined to set the several associated fields that must
be specified to perform a logical function. For example, to write a
scratch pad, the MOD field must be 0; the WRSP must be set to 1 to
write A, 2 to write B, or 3 to write both; the WRSEL field must
specify the address to be used; and HILO must specify the section of
the scratchpad. To do this, the following macro is predefined:
.MACRO WR(AB,HL,ADDR) ::=

MOD/CLKSP,
WRSP/@AB,
HILO,@HL,
WRSEL/@ADDR

MICRO-11/60 -- DEFINITIONS
A calIon this macro sets the four fields necessary.

Page 5-16
For example:

WR(AB,L,A)
This macro-call sets the MOD field to 0, the WRSP field to AB to write
both scratchpads, the HILO field to L to indicate the low section, and
the WRSEL field to specify the A address.

CHAPTER 6
ACTIONS

The microcode-part contains the actions of the microprogram.
The
microcode-part
of
the
program
consists
of two units:
the
dispatch-file supplied by DIGITAL and the action-part supplied by the
programmer.
These actions determine the processing that is performed
when the microprogram is executed.
The action-part begins with the dispatch-file, which contains the
.CODE keyword, continues with the user-actions, and ends with the
keyword .END. The dispatch-file is given in Appendix C; it provides
a dispatch table to be used as an entry point mechanism. The
user-actions are given in the following syntax.

user-actions

~action-item

}

.END
(microinstruction

J branch-definition
action-item

case-microinstruction
~

end-definition

The
following
sections
describe
the
microinstruction,
the
target-assignment construct and the entry point mechanism.
The
branch-definition, case-microinstruction, and end-definition are parts
of the target-assignment construct. The entry point mechanism is an
application of the target assignment construct.

MICRO-11/60 -- ACTIONS
6.1

Page 6-2

MICROINSTRUCTIONS

The microinstruction is the basic unit of the microprogram.
It
contains the information necessary to set the bits in the microword.
As an example of a microinstruction, consider the following:

ALPHA:
CLK-BA,PC-A,
A-PLUS-B,CLK-D,CSPB(TWO) ,
WR(AB,L,A),DATI,
J/BETA;

P1 ,

P2-T,
P3,
NEXT,

As described in the previous section
on
"Definitions",
this
microinstruction is made up of predefined macros. When these macros
are expanded, the instruction has the following form:

ALPHA:

CLKBA/YES,
AEN/ASPLO,ASEL/R07,RIF/R07,
ALU/A-PLUS-B,CLKD/YES,BEN/BASCON,BSEL/TWO
MOD/CLKSP,WRSP/AB,HILO/L,WRSEL/A,BEGIN/YES,
SELECT/BUS,BUSCODE/DATI,
J/BETA;

The expanded microinstruction consists of predefined field-namel
field-value-name pairs.
The field-name defines the position within
the microword and the field-value-name gives the value to be inserted
in that field. The assembler initializes the microword to the default
value and then fills in the fields as indicated to form the following
microword:
4

765432109876543210987654321098765432109876543210
100111111001111

1 0110

00110

001001110
I

I I

ALU I BSELI

CLKD

I I MOD

BEN

CLKBA I

AEN

BEGIN

I I

IWRSP
I

WRSEL

ASEL
I

RIF

SELECT
I

BUSCODE

HILO

MICRO-11/60 -- ACTIONS
6.1.1

Page 6-3

Syntax

microinstruction

instruction-part

:} :
}~

{

address

{

label

{

instruction-part}

{

field-name

field-value}

macro-call
field-value

{ field-value-name I value}

macro-call

macro-name

field-name
~
field-value-name
macro-name
actual
label

name

address

octal-value

6.1.2

{< {

actual }

)

Interpretation

A microinstruction is interpreted as follows:
If an address is specified and the address is both valid and
available, then it is assigned to the microinstruction. If an address
is not specified, then the assembler selects the first available
address within the specified bounds on the current page from the
available
address
pool
and
assigns
that
address
to
the
microinstruction.
The address assigned either explicitly or by the
assembler is removed from the available address pool.
If a label is specified, the label is
address.

associated

with

the

assigned

Page 6-4

MICRO-11/60 -- ACTIONS

The microword is initialized to the default pattern, calculated by the
logical ORing together of all the field defaults, as described in
Section 5.1.5.5.
The lines of the microinstruction are processed from left to right.
In
this
processing,
any macros encountered are expanded and
field-name/field-value pairs evaluated. The specified values are set
into the specified fields of the microword. If a microinstruction
line ends with the',' delimiter, then another microinstruction line
is processed as part of the current microinstruction. However, if the
microinstruction line ends with either the ';' delimiter or a blank,
then the current microinstruction is assumed to be complete and the
next microinstruction line is assumed to start a new microinstruction.

6.1.3

Restrictions

The address specified for a microinstruction must lie within the range
6200 through 7777.
The field-setting that
microinstruction
'J/N'
microinstruction.

gives
must

next
for
the
the jump address
be the last field-setting in the

A line within a microinstruction
can
contain
one
or
more
instruction-parts.
The
comma
separator
indicates
that more
instruction-parts for the microinstruction follow.
The semicolon
separator indicates that the line terminates the microinstruction.
A field-value-name specified in an instruction-part must be one of the
field-value-names defined for the field-name in a field-setting of a
.FIELD definition.
The maximum field size that can be specified is 16 bits.

6.1.4

Defaults

If a line does not end with a separator, then the separator semicolon,
which indicates the end of the microinstruction, is assumed.
If a macro-call contains fewer actual parameters than the number of
formal parameters specified in the macro definition of the macro-name,
then as many additional actual parameters as necessary, with the value
0, are assumed to follow the given actuals in the macro-call. If a
macro-call contains more actual parameters than the number of formals
specified, the extra actuals are discarded.

Page 6-5

MICRO-11/60 -- ACTIONS
6.2

TARGET ASSIGNMENT

The MICRO-11/60 assembler provides a construct for specifying the
targets of a conditional branch, namely:
the target assignment
construct.
Conditional
branching
is
accomplished
in
11/60
microprograms by combining the output of the Branch Micro Test
Multiplexer (BUT MUX) with the contents of the Microbranch field (UBF)
by a logical OR operation.
The target assignment construct allows the programmer to specify a
base address (the contents of the UBF field) and the offset (output of
~BOT MUX) for each target associated with that base address.
As an
example of the use of the target assignment, consider the following
microprogram excerpt, which expresses a four-way conditional branch.
ALPHA:
.BEGIN=OO

A:
NEXT, BUT(D14-00-EQ-0 D15),
J/AO;

BRANCH ON
POS, NEG, ZERO, NEGZERO

.CASE 0 OF ALPHA
AO:
NEXT, JIB;

POSITIVE DIFFERENCE
NO ACTION

.CASE 1 OF ALPHA
A1:
P2-T, D_A-PLUS-B,
R3-A,CSPB(ONE),
P3, WR(AB,L,A),
NEXT, JIB;

NEGATIVE DIFFERENCE
HIT COUNTER

.CASE 2 OF ALPHA
A2 :
NEXT, JIB;

ZERO DIFFERENCE
NO ACTION

.CASE 3 OF ALPHA
A3 :
NEXT, J/ERR;

NEGATIVE ZERO
ERROR

.ENDB ALPHA
In this excerpt, the four targets of the conditional branch are AO,
A1, A2, and A3.
The conditional branch instruction, labelled A,
branches to the base address AO.
The target-assignment construct
begins
with
the
line containing the .BEGIN construct, which
establishes the name ALPHA, defines the offsets associated with that
name, and allocates the target addresses. The lines containing the
.CASE keyword then associate the possible targets of the conditional
branch with one another and with the offset information.
The
target-assignment construct ends with the line containing the .ENDB
keyword.

MICRO-11/60 -- ACTIONS

Page 6-6

The information in the target-assignment construct
allows
the
assembler to assign to each of the microinstructions designated as a
branch target the address that is formed by OR-ing the base address
with the offset indicated by the case number. For example, if the
assembler selects the address 6140 for the base address, then the
other targets are assigned as follows:
Target

Case Number

Offset

Address

AO
A1
A2
A3

o
2

00
01
10

6140
6141
6142
6143

This address assignment accomplishes the
for microinstruction A.

6.2.1

desired

conditional

branch

Syntax

branch-definition

branch-label
.BEGIN

constraint

mask

{

[

low-address

mask

{o I

I * } :6

casemicroinstruction

.CASE

case-number

microinstruction
end-definition
low-address }

.ENDB

branch-label

octal-integer

high-address
case-number

decimal-integer

branch-label

name

high-address

branch-label

]

MICRO-11/60 -- ACTIONS
6.2.2

Page 6-7

Interpretation

The interpretation of a target-assignment construct starts with the
branch-definition. The constraint string is examined to determine the
number of possible targets and the requirements on the base-address.
A set of targets satisfying the mask is selected from the available
addresses on the current page. The number of characters in the mask
specifies the number of bits that are constrained in the address.
The assembler selects a base address that has O's in the positions
indicated by 0, 1 's in the positions indicated by 1, and either 0 or 1
in the positions indicated by *. CASE 0 uses the base address.
The
remaining cases systematically use bit positions indicated by 0 in the
mask. If an address-range is specified, the set of targets is
selected from the given range and allocated. The set of reserved
addresses and the constraint string are
associated
with
the
branch-label.
A case-microinstruction for a given branch-label is assigned an
address by using the case-number to determine from the mask the
appropriate offset and then OR-ing that offset with the base- address.
The
processing
of
the case-microinstruction following address
of
an
ordinary
assignment is
exactly
the
same
as
that
microinstruction.
The interpretation of a target-assignment construct ends with the
end-definition.
If any of the addresses in the set of addresses
associated with the branch-label has not been allocated as the result
of interpreting a case-microinstruction, then the address is returned
to the available address pool when the end-definition is processed.

6.2.3

Restrictions

A case-microinstruction for a given branch-label must be given only
within
that
branch-label's
scope, which is delimited by the
branch-definition and end-definition for that label.
The number of O's, k, in a mask must lie in the range:
1

<= k <= 7

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Page 6-8

The case-number must lie within the range of values specified by the
constraint
given
in
the branch-definition for the associated
branch-label. That is, the case-number, n, must lie in the range:

o <= n <= 2**k - 1
The low-address must specify an address that is a legal base address
for the given constraint. The high-address must specify an address
that is greater than or equal to the highest possible constraint
address.
An address must not be specified for a case-microinstruction.
The base address must be defined. That
for case-number 0 must always be given.

6.2.4

is,

case-microinstruction

Defaults

If an end-definition is not given for a branch-label, then the scope
of
the branch-label is assumed to extend to the end of the
microprogram.

6.2.5

Semantics

The detailed semantics of the
constraint,
the
address-range,
target-assignment scope and ease-microinstruction are discussed in the
following sections.

6.2.5.1 Mask - The mask specifies the set of possible bits that can
be combined with a base-address by an OR operation to form the targets
of a conditional branch. The number of O's, k, in the mask determines
the total number of possible branch targets, 2**k, and the position of
the O's within the mask determines the set of possible addresses that
can be used for the targets.

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Page 6-9

For example, consider the following branch-definition:
BETA:
.BEGIN=010
The mask is '010'. The mask contains two O's;
consequently, four
targets are possible.
The mask contains a
in the second bit
position; consequently, any address within the program bounds on the
current page that ends with 2 is a candidate for the base address. If
the current page begins with 6000 and ends with 6777 and the program
bounds are specified to be 6200 through 7777, then the following
addresses are all potential base addresses:
6202
6302

6212

6222

6232

6242

6252

6262

6272

6702

6712

6722

6732

6742

6752

6762

6772

The assembler, in choosing a base address, determines which of the
above addresses are not yet allocated and of those addresses, which
can be OR-ed with the possible offsets to produce addresses that are
also unallocated. That is, in order to select the address 6242 as the
base address, the following target addresses must all be free:
Base Address
6242
6242
6242
6242

Offset
010
011
110
111

Target Address
6242
6243
6246
6247

If the assembler cannot find a set of addresses to satisfy the target
assignment construct, then an error is reported and the assembly
continues, but a valid load module cannot be produced.
Each character in a mask has a specific meaning as follows:
Character

Meaning

The base address should have a 0 in this position.
in this position.

The base address should have a

The base address
position.

can

have

this

MICRO-11/60 -- ACTIONS

Page 6-10

The asterisk (*) character allows the programmer to indicate bits that
are known to always be 0 in the BUT MUX output for this branch and, in
this way, to allow the assembler more freedom in its choice of
addresses. If, in the example just given, an asterisk rather than a 1
is given in the branch-definition, then the number of potential base
addresses doubles, as follows:
6200
6202

6210
6212

6220
6222

6230
6232

6240
6242

6250
6252

6262
6262

6270
6272

6710
6712

6720
6722

6730
6732

6740
6742

6750
6752

6760
6762

6770
6772

6300
6302

6700
6702

6.2.5.2 The Address-Range - The address-range is used to specify the
range of addresses from which the targets of the target-assignment
construct are to be chosen. If the programmer wants to absolutely
assign
the
targets, then he can specify the base-address as
low-address and the target that is formed by OR-ing a string in which
each 0 of the mask is replaced by a 1 with the base-address as
high-address. As an example of absolute assignment, consider the
following branch-definition.
GAMMA:
.BEGIN=00101[6205,6237]
The base-address associated with GAMMA is 6105
assigned as follows:
Case

Offset

Address

0
1
2
3
4
5
6
7

00101
00111
01101
01111
10101
10111
11101
11111

6205
6207
6215
6217
6225
6227
6235
6237

and

the

targets

are

If any of these addresses is not free when the branch-definition given
above is processed, then an error is reported and the assembly
continues, but the resulting load module cannot be used.

MICRO-11/60 -- ACTIONS

Page 6-11

6.2.5.3 The Scope Of The Target Assignment Construct - The scope of
the target assignment construct starts with the branch-definition and
ends either with the end-definition for the branch-label or, if an
end-definition is not given, with the end of the microprogram.
A case-microinstruction for a given branch-label is only valid
the scope of its definition. For example:

within

DELTA:
.BEGIN=0010
.CASE 3 OF DELTA
D3:
.CASE 0 OF DELTA
DO:
.ENDB DELTA

.CASE 2 OF DELTA
D2:
The case-microinstructions for D3 and DO lie within the scope of DELTA
in the above example and are, therefore, interpreted correctly. The
case-microinstruction for D2, however, lies outside the scope of DELTA
and therefore, its branch-label is undefined.

6.2.5.4 Case-Microinstructions - Within the scope
of
a
target
assignment construct, case-microinstructions can be given in any
order. Further, cases that are not used can be omitted. However the
zeroth case, which corresponds to the base-address, must always be
given.
When the branch-definition that starts the scope of the target
assignment construct is processed, all the possible targets, as
determined from the constraint, are reserved. If at the end of the
scope, some of the reserved targets have not been allocated by a
case-microinstruction, then they are returned to the general address
pool and, consequently, may be allocated later for a microinstruction
that has no relationship with the target assignment construct.

Page 6-12

MICRO-11/60 -- ACTIONS
6.2.6

Discussion

The use of the target-assignment construct in connection with
fundamental types of conditional branching is discussed in
following two sections.

two
the

6.2.6.1 Looping - The repetition of a sequence of microinstructions
based on a counter, is called looping. Looping is a special case of
conditional branching that occurs commonly in microprogramming.
The
following
microprogram
excerpt,
which
multiplies I times J,
illustrates the use of the target-assignment construct for looping.
This excerpt assumes that the counter is loaded with -J.
IJLOOP:
.BEGIN=O
MAT11:
P2-T,
NEXT,

CLK-SR,WCSB[O]-B,B,
BUT(COUNT-IS-377),
J/MAT12;
.CASE 0 OF IJLOOP
MAT12:
P2-T, A-PLUS-B,WCSB[O]-B,
SR,CLK-SR,
NEXT, BUT(COUNT-IS-377),
J/MAT12;
.CASE 1 OF IJLOOP
MAT13:

SR <-- 0

SR <-- SR + I
LOOP ADDINT I FOR J TIMES
! CONTINUE PROCESSING

The target-assignment construct is used to specify the targets MAT12
and MAT13. The instruction MAT12 is repeated J times. After the J'th
execution of that instruction, the output of the BUT MUX is 1 and
control passes to the instruction MAT13.
The microprogram from which this excerpt is
full in Section 7.1.

taken

reproduced

Page 6-13

MICRO-11/60 -- ACTIONS

6.2.6.2 Switching - The choice of one of a set of targets is called
switching.
Sometimes, control separates for a single calculation and
then returns to a common point, as illustrated in the example of
Section
7.2.
Sometimes, control separates to perform totally
different processing, as illustrated in the following example:
DECODE:
.BEGIN=OOO
DISPATCH:
NEXT,

BUT(IR 5-3 ),
J/BRANCH

.CASE 0 OF DECODE
BRANCH:
NEXT, J/MATRIX_ADD;

ENTRY FOR XFC 0

.CASE 1 OF DECODE
BRANCH1:
NEXT, J/MATRIX_MULT;

ENTRY FOR XFC 1

.CASE 2 OF DECODE
BRANCH2:
NEXT, J/MATRIX_INVERT;

ENTRY FOR XFC 2

.CASE 3 OF DECODE
BRANCH3:
NEXT: J/MATRIX_DIAG;

ENTRY FOR XFC 3

.CASE 4 OF DECODE
BRANCH4:
NEXT, J/LINK;

ENTRY FOR XFC 4

The target-assignment construct in the above example is
specify the switch points for five separate microprograms.

6.2.7

used

Guidelines

In order to satisfy a target-assignment construct, the assembler must
be able to select a set of addresses that have a given relationship to
one another. Therefore, the placement of the branch-definitions is
important.
They should be placed so that the necessary addresses are
available to the assembler; that is, close to the beginning of the
page to which they apply.

MICRO-11/60 -- ACTIONS
6.3

Page 6-14

THE ENTRY POINT MECHANISM

To branch to a microprogram within the Writable Control Store, the
programmer uses an XFC instruction in the main memory program. The
XFC instruction can be used to branch to anyone of eight possible
microprograms.
The programmer designates an entry point within the
microprogram by the use of the DISPCH target assignment construct, as
follows:
Instruction

Entry Point

XFC 0
XFC 1

.CASE 0 OF DISPCH
.CASE 1 OF DISPCH

XFC 7

.CASE 7 OF DISPCH

The branch-definition for the DISPCH target assignment construct is
contained in the dispatch-file.
Therefore, if an entry point is
specified in a microprogram, the assembly input file list must include
the dispatch-file before any files containing user-actions.
For example, suppose a program has two entry points, ENTA and ENTB.
The programmer wants to issue an XFC 0 to enter at ENTA and an XFC 1
to enter at ENTB. He writes his user-actions as follows:
.CASE 0 OF DISPCH
ENTA:
.CASE
ENTB:

OF DISPCH

.END
The dispatch-file is described in Appendix C.

CHAPTER 7
EXAMPLES

This chapter gives two complete microprograms to illustrate the use of
the MICRO-11/60 assembler and the 11/60 predefinition language.
The first example is a threshold check program and the second example
is a matrix addition program. These applications were chosen because
the associated microprograms are short. Typically, microprograms are
longer and more general than the programs reproduced here. However,
these examples are complete microprograms; they illustrate the form
and content of 11/60 microprograms.

7.1

EXAMPLE 1 - THRESHOLD CHECK

The example given in this section performs a threshold check.
The
microprogram accepts a list of positive values and produces, as its
result, a count of the number of values in that list that exceed a
specified threshold.
The threshold check microprogram locates its
inputs and outputs by the use of registers.
The threshold check program is an example of a well-documented
microprogram.
The inputs and outputs of the program are given in the
comments that precede the program.
The logical sections of the
program are separated by comments that describe the purpose of the
section. The actions performed by each microinstruction are described
by trailing comments on the microinstruction line.
Two target assignment constructs are used in the threshold check
microprogram, namely: SRCHP and THCMP. SRCHP illustrates the use of
the target assignment construct for looping and THCMP illustrates its
use for switching.
The construct SRCHP is used to control the loop that processes each
element in the input list. As long as more elements remain in that
list, control returns to CASE 0 of that construct.
When the input
list is exausted, control passes to CASE 1, which returns to the base
machine.

MICRO-11/60 -- EXAMPLES

Page 7-2

The construct THCMP is used in the comparison of the value of each
item in the input list with the threshold. The value of the input
item determines to which of the four possible cases control passes .
. TITLE QUANTIZE
.IDENT IQ31
.TOC
DATA POINTS THRESHHOLD CHECK
INPUT TO THRESHHOLD INSTRUCTION.
RO - BASE ADDRESS OF THE LIST OF POINTS.
ALL POINTS ARE POSITIVE NUMBERS.
R1 - NUMBER OF POINTS IN SAMPLE.
R2 - THRESHHOLD VALUE.
OUTPUT AT TERMINATION OF THRESHHOLD INSTRUCTION.
RO R1 R2 R3 -

USED AS WORK REGISTER.
USED AS WORK REGISTER.
THRESHHOLD VALUE.
NUMBER OF POINTS OVER THRESHHOLD.

SRCHLP:
.BEGIN:O[6240:6241]
THCMP:
.BEGIN:OO[6244:6247]
. CASE 0 OF DISPCH
XFCTHC:
P2-T,
CLK-D,ZERO,
WR(AB,L,A),R3-A,
P3,
NEXT,
XFCT 1 :
P2-T,
P3,
NEXT,
XFCT2:
P2,
NEXT,

!TARGETS FOR LOOP TO SEARCH.
!COMPARISON TARGETS WITH
!THRESHHOLD .
!ENTRY POINT FOR XFC 0
!INITIALIZE COUNT OF POINTS TO
!ZERO.

J/XFCT1 ;
CLK-D,NOT-A,R1-A,
WR(AB,L,A),

!R1 <-- -R1 (COMPLEMENT OF
! LENGTH) .

J/XFCT2;
LOAD-COUNTER,R1-A,
J/XFCT3;

!LOOP COUNTER <--

OF POINTS.

MICRO-11/60 -- EXAMPLES

Page 7-3

START OF LOOP TO CHECK EVERY POINT AGAINST THRESHHOLD .

. CASE 0 OF SRCHLP
XFCT3 :
P1 ,
CLK-BA,RO-[A],DATI,
P2-T,
CLK-D,A-PLUS-B,CSPB(TWO),
WR(AB,L,A),
P3,
NEXT,
XFCT4:
P3,
NEXT,
XFCT5:
P2-T,
NEXT,
XFCT6 :
NEXT,

!INITIATE FETCH OF (RO)+
!RO <-- POINTS TO NEXT DATA
! ITEM.

J/XFCT4;
WR-CSP,CSPB(MD),
J/XFCT5;

!DATA ARRIVES FROM MEMORY.

CLK-D,A-MINUS-B,
CSPB(MD),R2-A,

!D <-- THRESHHOLD - DATA.

J IXFCT6;

BUT(D14-00-EQ-OD15),
J/XFCT7;

!BRANCH ON EQUAL,GREATER,LESS.

POSITIVE DIFFERENCE - THRESHHOLD > DATA POINT - NO OPERATION

.CASE 0 OF THCMP
XFCT7:
NEXT,
BUT(COUNT-IS-377),
J/XFCT1 ;

!LOOP BACK IF MORE NUMBERS
!ELSE EXIT TO XFCT11

NEGATIVE DIFFERENCE - DATA POINT > THRESHHOLD - HIT THE
COUNTER .

. CASE 1 OF THCMP
XFCT8 :
P2-T,
CLK-D,A-PLUS-B,
R3-[A],CSPB(ONE),
WR( AB , L, A) ,
P3,
NEXT,
BUT(COUNT-IS-377),
J/XFCT1 ;

!INCREMENT COUNTER BY ONE.
!LOOP BACK IF MORE NUMBERS
!ELSE EXIT TO XFCT11

MICRO-11/60 -- EXAMPLES

Page

7-4

ZERO DIFFERENCE - DATA NOT OVER THRESHHOLD - NO OPERATION .

. CASE 2 OF THCMP
XFCT9:
NEXT,
BUT(COUNT-IS-377),
J/XFCT1 ;

!LOOP BACK IF MORE NUMBERS.
!ELSE EXIT TO XFCT11

IMPOSSIBLE DIFFERENCE - ERROR RETURN TO ERROR ROUTINE .

. CASE 3 OF THCMP
XFC10:
NEXT,
PAGE(O),BUT(SUBRB),

!EXIT TO ERROR POSITION.

J/OOOO;

.CASE 1 OF SRCHLP
XFCT11:
NEXT,
PAGE(O),BUT(SUBRB),
J/BRA05;
. END

!END OF INSTRUCTION.
!RETURN FOR NEXT MACRO
!INSTRUCTION .

Page 7-5

MICRO-11/60 -- EXAMPLES
7.2

EXAMPLE 2 - MATRIX ADDITION

The matrix addition example adds the elements of the matrix M to the
elements of the matrix N, on an element by element basis. That is, it
performs the following computation:
M(m,n) = M(m,n) + N(m,n)
The number of elements in each row is given by I
elements in each column by J.

and

the

number

Unlike the threshold check microprogram in which the input information
is passed through the registers, the matrix addition example contains
the input information in its calling sequence, as shown in the
comments at the beginning of the program.
The matrix addition example uses two target assignment constructs.
Both constructs are used for looping. The first, IJLOOP, is used to
calculate the total number of elements; that is, to multiply I times
J.
The second, MNLOOP, is used to loop through each element of the
matrix .
. TITLE
.IDENT

MATRIX ADDITION
IMP1AI

**************************

PC -->

.TOC

XFC

CODE

**************************

M
*
*
*
N
*
**************************
I
J
*
*
*
**************************

**************************

START OF MATRIX ADDITION EXAMPLE.

IJLOOP:
.BEGIN=O
MNLOOP:
.BEGIN=O
.CASE 2 OF DISPCH
MATADD:
P1 ,
CLK-BA,PC-A,
A-PLUS-B,CSPB(TWO) ,
P2-T,
WR(AB,L,A),DATI,
P3,
NEXT,
J IMAT 1 ;
MAT1 :
P3,
NEXT,

CSPB[MD]BUSDIN,
J/MAT2;

!ENTRY POINT FOR XFC 2
!INITIATE MEM(PC) READ:
!INCREMENT PC.

!MD<--MEMORY - M (START OF M)

MICRO-11/60 -- EXAMPLES

Page 7-6

MAT2:
P1 ,

P2-T,
P3,
NEXT,
MAT3:
P2-T,
P3,
NEXT,

CLK-BA,PC-A,
A-PLUS-B,CLK-D,CSPB(TWO),
WR (AB, L, A) ,DATI,
J/MAT3;

!INITIATE MEM(PC) READ.
!INCREMENT PC.

B,CSPB(MD),CLK-D,
WR(A,H,A),R[SRC]-A,
CSPB[MD]BUSDIN,
J/MAT4;

!WORK1<-- M

CLK-BA,PC-A,
A-PLUS-B,CLK-D,CSPB(TWO),
WR(AB,L,A),DATI,
J IMAT5;

!INITIATE MEM(PC) READ
!INCREMENT PC.

!MD<-- MEMORY - N (START OF N)

MAT4:
P1 ,

P2-T,
P3,
NEXT,
MAT5:
P2-T,
P3,
NEXT,

B,CSPB(MD),CLK-D,
WR(A,H,A),R[DST]-A,
CSPB[MD]BUSDIN,
J/MAT6;

!WORK2<-- N
!MD<-- MEMORY - I:J

CALCULATE I X J AND LOAD IN COUNTER.
MAT6:
P2-T,

CSPB(MD),CLK-D,CLK-SR,B,
D[C]O,
J/MAT7;

!D <-- I:J , SR <-- I:J
!D(C)<--O

MAT7:
P2-T,
P3,
NEXT,

CLK-D,D-RIGHT-8,D[C]D[C],A,
WR(B,H,B) ,WCSB[O]-B,
J/MAT8;

!D(C) <-- O.
!WORK3 <-- 0:1

MAT8:
P2-T,
NEXT,

CLK-D,SR,A,D[C]D[C],
J/MAT9;

!D <-- SR

D-SIGNEXT,NOT-A,CLK-D,
WR(B,H,B) ,WCSB[1]-B,
J/MAT10;

!D <-- COMPLEMENT OF J
!WCSB(1) <-- COMPLEMENT OF J

WCSB[1]-B,
LOAD-COUNTER,
J/MAT11;

!COUNTER GET -J

CLK-SR,WCSB[O]-B,B,
BUT(COUNT-IS-377),
J/MAT12;

!SR <-- I FROM WORK3
!CHECK IF = 1 TARGETS MAT12,13

NEXT,

(I:J)

MAT9:
"P2-T,
P3,
NEXT,
MAT10:
P2,
NEXT,
MAT11:
P2-T,
NEXT,

MICRO-11/60 -- EXAMPLES
.CASE 0 OF IJLOOP
MAT12:
A-PLUS-B,WCSB[O]-B,
P2-T,
SR,CLK-SR,
BUT(COUNT-IS-377),
NEXT,
J/MAT12;
.CASE 1 OF IJLOOP
MAT13:
P2-T,
CLK-D,SR,NOT-A,
WR(B,H,B) ,WCSB[1 J-B,
P3,
NEXT,
J/MAT14;
MAT14:
P2,
NEXT,

WCSB[1]-B,
LOAD-COUNTER,
J/MAT15;

Page 7-7

!SR <-- SR + I
!LOOP ADDINT I FOR J TIMES.

!WCSB(1) GETS -I*J

!COUNTER GETS -(I*J)

LOOP TO ADD EACH TERM OF MATRIX M AND N

.CASE 0 OF MNLOOP
MAT15:
P1 ,
CLK-BA,R[SRC]-A,
DATI,
NEXT,
J/MAT16;

!INITIATE MEM(M) READ.
!WORK1 CONTAINS N

MAT16:
P3,
NEXT,

CSPB[MD]BUSDIN,
J/MAT17;

!MD <-- MEM(M)

MAT17:
P1 ,
P2-T,
P3,
NEXT,

CLK-BA,R[DST]-A,
A-PLUS-B,CSPB(TWO),
WR(A,H,A),DATI,
J/MAT18;

!INITIATE MEM(N) READ.
!INCREMENT N

MAT18:
P2-T,
P3,
NEXT,

CLK-SR,B,CSPB(MD),
CSPB[MD]BUSDIN,
J/MAT19;

!SR <-- MEM (M)
!MD <-- MEM (N )

CLK-D,A-PLUS-B,SR,
CSPB(MD) ,
J/MAT20;

!D <-- MEM(M)

MAT19:
P2-T,
NEXT,

MEM(N)

MICRO-11/60 -- EXAMPLES

Page 1-8

MAT20:
P1 ,

NEXT,
MAT21 :
NEXT,
MAT22:
P2-T,
P3,
NEXT,

CLK-BA,R[SRC]-A,
DATO,
J/MAT21;

!INITIATE MEM(M) WRITE.

J/MAT22;

!DATA IS WRITTEN FROM D TO
!MEMORY.

A-PLUS-B,R[SRC]-A,
CSPB(TWO),CLK-D,
WR(A,H,A),
BUT(COUNT-IS-311),
J/MAT15;

.CASE 1 OF MNLOOP
MAT23:
NEXT,
PAGE(O),BUT(SUBRB),
J/BRA05;
. END

!INCREMENT M
!LOOP UNTIL ALL TERMS HAVE
!BEEN SUMMED. (TARGETS
!MAT15,23)

!RETURN TO BASE MACHINE FOR
!NEXT INSTRUCTION .

PART III
THE MICROPROGRAM LOADER:
MLD

Contents
CHAPTER 8
8. 1
8 . 1• 1
8•1. 2
8 . 1• 3
8.2
8.2. 1

MICROPROGRAM LOADER
. .
LOADER FUNCTIONS
Initialization . . . . . . .
. . . . .
Loading The Resident Section
Loading The Microprogram
. . . .
THE MICROPROGRAM OBJECT MODULE . . . . . . . .
Microprogram Object Module Format .
. ..

8-1
8-2
8-2

8-3
8-3
8-3

CHAPTER 8
MICROPROGRAM LOADER

This chapter describes MLD, the Microprogram LoaDer.
that loads the 11/60 Writable Control Store.

MLD is a program

The functions of the loader are described in the following section.
Then, the loader input, the microprogram object module, is discussed
and illustrated.

8.1

LOADER FUNCTIONS

MLD performs three-functions in loading the
namely:
of

the

Writable

Control

Store,

The initialization
special pattern.

The loading of the resident section of the Writable
Store.

Control

The loading of the set of object modules that
microprogram.

The following sections describe each of these activities.

Store

make

the

MLD -- MICROPROGRAM LOADER
8.1.1

Page 8-2

Initialization

Before loading any information, MLD initializes the entire Writable
Control Store, starting at location 6000 and continuing through
location 7777, to the default initialization pattern.
Any programs
previously loaded into the Writable Control Store are destroyed by
this initialization process.
The default initialization pattern is the following microword:
4
4
3
2
1
765432109876543210987654321098765432109876543210

000000000000000110000000000000000011100000001110

After the execution of the loader, any
explicitly loaded contains this pattern.

microaddress

that

not

If control passes to a word that contains the default initialization
pattern, then the execution of that word causes a transfer to the
resident section address 6016, which begins an error routine.
This
error routine handles the case in which a wild branch sends control to
an illegal address. The user can provide an error routine for this
case or can rely on the default handling, which exits to the console
as if a halt instruction was encountered.

8.1.2

Loading The Resident Section

After initialization, MLD loads the resident section specified by the
programmer.
Usually,
the standard resident section MICPAK is
specified.
The contents of the standard resident section MICPAK supplied by
DIGITAL are described in Appendix D of the "PDP-11/60 Microprogramming
Specification."

MLD -- MICROPROGRAM LOADER
8.1.3

Page 8-3

Loading The Microprogram

After loading the resident section, MLD loads the microprograms
specified by the user. MLD can load any number of object modules and
these object modules can coexist in the Writable Control Store as long
as the address space occupied by each module is consistent with the
address space occupied by the other modules.
The address space
occupied by an object module is determined by the bounds given with
the .BOUNDS keyword at the time the microprogram is assembled.
In loading the Writable Control Store, MLD constructs the address to
be loaded from the lower bound and the offset and then loads the bits
associated with that offset into the calculated Writable Control Store
location.
If an object module uses the same location as used in an
object module loaded earlier in the load sequence, then the location
is reloaded with the contents given in the later object module.
The fact that MLD permits words of the Writable Control Store to be
rewritten
is
convenient
for updating programs.
However, the
programmer must be careful, in that case, to specify the object
modules in the correct order, so that the last word loaded into the
given address is the expected one.

8.2

THE MICROPROGRAM OBJECT MODULE

The microprogram object module has a format that is compatible with
the standard macro object module produced by the translators operating
in the RSX-11M system. However, the microprogram object module is not
as general as a macro object module.

8.2.1

Microprogram Object Module Format

An 11/60 microprogram object module is made up of a sequence of
records. Five different types of records are used) namely: GSD, RLD,
TXT, end-GSD, and end-module. The meaning and format of each of these
record types are described in Appendix B of the "RSX-11M Task Builder
Reference Manual" CDEC-11-0MTBA-A-D).

MLD -- MICROPROGRAM LOADER

Page 8-4

The following d"iagram shows the format of the microprogram object
module for the RSX-11M system.
The first word is a count of the
number of bytes that follow in the record. The second word indicates
the type of record. The type of record determines the meaning of the
words that follow.
The diagram shows the words on the horizontal axis and the record
riumber on the vertical axis. The data is displayed as it appears in a
dump.

record

-----I

I
I

------ ------------- ------ ------

count 000001

version-name 000006 000000

------ ------

------------- ------ ------

count 000001 WC$DSP
------ ------

3
4

count 000001 WC$ARY

000440

count 000001 WC$001

000440

------------- ------

count 000004 000007 WC$DSP
------

------ ------

count 000003 000004

------

count 000003 000020

------ ------ -----count 000004 000007 WC$ARY
------ ------

~~~~~~]

------ ------ ------ ----------- ------

------r-----

count 000003 000000 lowbnd
------ ------ -----count 000003 000002 hi-bnd

------

000440

------------- ------

------ ------ ------------- ----------- ------

---2--r-- 3--

------ ... -----0
4
5
------ ------ ------ ------ ------ -----count 000001 module-name 000000 000000
------ ------

word---->

1000000

------ ------------- ------

count 000003 offset

microword (48 bits)

------ ------ ------ ---------------------

1:~~~~~I~~~~~~l

Page 8-5

MLD -- MICROPROGRAM LOADER

The microprogram object module begins with the four GSD (type 1)
records shown.
The first record contains the program title, as
extracted from the title-string supplied with the .TITLE keyword. The
second record contains the version identification, given with the
.IDENT keyword in the source microprogram.
The third and fourth
records declare the section names WC$DSP, for the WC$DSP area, and
WC$ARY, for the Writable Control Store array storage.
Following these four standard records, a GSD record is given
microprogram. The partition-name has the form WC$OOO.

for

the

After the GSD records, an RLD (type 4) record for the dispatch area is
given.
The text (type 3) records following that RLD give the lower
and upper bound for the program and the dispatch table.
Following the RLD and TXT records for the section WC$DSP, an RLD
record for the section WC$ARY is given. The TXT records following
give the offset, relative to the lower bound, at
which
the
microinstruction
is
to
be
loaded
and the contents of the
microinstruction. The offset is given in bytes and since each
microinstruction occupies 6 bytes, the microinstruction address is
calculated by the following formula:
microinstruction-address = lower-bound + offset/6
The microprogram object module concludes with
record and an end-module (type 6) record.

end-GSD

(type

MLD -- MICROPROGRAM LOADER

Page 8-6

The object module for the
14.4.9, is as follows:

sample

program

record
I

REGEX

000000 000000

R1V1

000006 000000

------ ------------- ------ ------

000012 000001
------

------ ------------- ------ ------

000012 000001 WC$DSP

000040 000000

000012 000001 WC$ARY

100040 000000

------ ------ ------------- ------ -----------

4
2
3
5
------r---------- ------ ------ ------ ------ -----0

given

------ ------

word---->

REGEX

------ ------------- ------ ------

000012 000001 WC$OOO

100040 length

------ ------ ------ ------ ------ ------

000012 000004 000007 WC$DSP
------

000000

------ ------ ------ ------ ------

000006 000003 000000 014000

000006 000003 000002 017377

000006 000003 000004 000061

000034 000003 000020 dispatch information

------ ------ ------ ------

------ ------ ------ ----------- ------ ------ ------ -----------------

------- ------ ------ ------------- -----000012 000004 000007 WC$ARY

000000

------ ------ ------ ------------- ------

000012 000003 000220 170232 004000 030200

000012 000003 001400 171612 010003 130201

------ ------ ------ ------ ------ ----------- ------ ------

13
14

------ -------

------ ------ ------

000012 000003 001406 171012 010003 134003
------ ------ ------ ------ ------ -----000002 000002
000002 000006

------ ------

Section

PART IV
THE MICROPROGRAM DEBUGGING TOOL:
MDT

Contents
CHAPTER 9
9. 1
9 . 1. 1
9.1 .2
9.2
9.3
9.3. 1
9.3.2
9.3.3
9.3.4
9.3.5
CHAPTER 10

INTRODUCTION
THE MACHINE STATE
The Microstate Table
Restoring The Machine State
A DEBUGGING SESSION .
· . .
THE COMMAND LINE . . . .
· . . ..
Command s . . . .
. .
The Address-Spec
. . . . . . . . .
The Qualifier .
· . .
Integer Field
· . .
Examples
· . . . . .

.
.
.
.
.
.
.

·
·
.
.
.
.
.
.
.
.

9-1
9-1
9-3
9- 3
9-3
9-4
9-5
9-6
9-6
9-6

OPEN COMMANDS

10.1
THE OPEN-BITS COMMAND
10.1.1
Syntax
10.1.2
Interpretation
10.1.3
Restrictions
10.1.4
Defaults
....
10.1.4.1
The Macro-Address-Spec
10.1.4.2
The Micro-Address-Spec
10.1.4.3
The Register-Address-Spec
10.1.4.4
New-Values
10.1.4.5
Line Terminators
·
10.2
THE OPEN-BYTE COMMAND . . .
10.2.1
Syntax . . . . . . . . .
10.2.2
Interpretation . . . . . . . .
10.3
THE OPEN-CHARACTER COMMAND
10.3.1
Syntax . . . . . . . .
10.3.2
Interpretation . . . . . . . .

·
·
.
.
·
·
.

· 10-2
· 10-3
10-4
. . . . . . 10-5
· 10-6
. ..
. 10-6
· . . . . 10-7
. ..
. 10-8
· . . . . 10-9
. . . . . . 10-9
10-11
· . . . . 10-11
. . . . . . 10-11
. ..
. 10-12
. . . . . . 10-13
.
. . 10-13

CHAPTER 11

BREAKPOINT COMMANDS

11 . 1
THE SET-BREAK-COMMAND
. . . . . . . . . . 11-4
11.1.1
Syntax. . . . . .
. . . . . . . . . . 11-4
11.1.2
Interpretation
. . . . . . . . . . 11-5
11.1.2.1
Including Breakpoint In Breakpoint List . . 11-5
11.1.2.2
Planting The Subroutine Call
. 11-5
11.1.3
Restrictions. . . . . .
. . . . . 11-5
11 . 2
THE PROCEED-FROM-BREAK-COMMAND
. . . . . . 11-6
11.2.1
Syntax . . . . . . . . . . . . . . . . . . . 11-6
11.2.2
Interpretation . . . . .
. . . . . 11-7
11 . 3
THE DELETE-BREAK-COMMAND
. 11-7
11.3.1
Syntax . . . . . . .
.......
. 11-8
11.3.2
Interpretation
. ..
. 11-8
11.3.3
Restriction. . . . .
. . . 11-8
11 . 4
THE LIST-BREAK-COMMAND . . . . . . . . .
. 11-9
11.4.1
Syntax. . . .
. . . .
.11-9
11.4.2
Interpretation
. . . . . . .
. 11-9
CHAPTER 12
12 . 1
12.1.1
12.1.2
12. 2
12.2.1
12.2.2
12.2.3
12. 3
12.3.1
12.3.2
CHAPTER 13
13 . 1
13.1.1

13.1.2
13.1.3
13. 2
13.2.1
13.2.2
13. 3
13.3.1
13.3.2

DISPLAY COMMANDS
THE SET-DISPLAY-COMMAND
· . . . .
Syntax . . . . . . .
· . . .
Interpretation
. . . ..
THE DELETE-DIS PLAY-COMMAND
. . . .
Syn tax . . . . . . . . .
Interpretation . . . . .
. . . .
Restriction . . . . . . .
THE LIST-DISPLAY-COMMAND
. . . . . .
Syntax . . . .
· . . . . . .
Interpretation

.
.
.
.
·
.
·
.
.
·

12-2
12-3
12-3
12-4
12-4
12-5
12-5
12-5
12-6
12-6

·
·
·
. . .
·
·

13-1
13-2
13-2
13 - 3
13-3
13-4

. .
. .
. .
. .

CONTROL COMMANDS
THE GO-COMMAND
Syntax
Interpretation
Restrictions
THE LOAD COMMAND
Syntax . . . .
Interpretation
THE RESET COMMAND .
Syn tax . . . . .
Interpretation

• .

• • .

• .

• 13- 4

. . . . . . 13-4
· 13-4
. . . 13-4

CHAPTER 9
INTRODUCTION

The MicroDebugging Tool MDT is a stand-alone program that provides an
efficient- tool for debugging 11/60 microprograms. Using MDT, the
programmer can monitor the execution of his microprogram. He can set
breakpoints, examine and change data or instructions in main or micro
memory, and alter the control of the program.
MDT is intended for debugging microprograms. Usually, the program to
be
debugged
consists
of a small main memory program and a
microprogram. The main memory program's purpose is to call the
microprogram and, in some cases, provide data for the microprogram to
manipulate. MDT takes over the machine and controls all IIO vectors
and, consequently, all the interrupts. Therefore, the processing that
can be done by the main memory program is limited.
It cannot, for
example, perform any input or output unless the programmer makes
special provisions for handling I/O.
Because MDT is used to debug microprograms, it must save the state of
the machine.
The following section describes the saving of the
-machine state. After that discussion, an MDT session is considered
and some general remarks are made on the MDT command line.

9.1

THE MACHINE STATE

Whenever a breakpoint occurs, MDT saves the state of the machine so
that it can restore the state before continuing the execution of the
program under test. The machine state is saved in a table called the
microstate table.

9.1.1

The Microstate Table

The microstate table has two logical sections.
The first section
contains the datapath registers and the second section contains the
PDP-11 registers.

MDT -- INTRODUCTION

Page 9-2

In the following table, the name of each register, the number of bits
occupied by that register, and a brief description of the meaning of
the register are given.
TABLE 9-1
Microstate Table

--------------------------------------------------------------------Datapath Registers

Bits

Description

$D
$DC
$SR
$An

16
1
16
16

$Bn

$Cn

$BA
$IR
$CNT
$FLAG
$UCON
$RES
$RET

16
16
6
8
17
4
16

D register
D(C) register
Shift register
A scratchpad registers
n is an octal integer starting
with 0 and continuing through 37
B scratchpad registers
n is an octal integer starting
with 0 and continuing through 37
C scratchpad
n is an octal integer starting
with 17 and continuing through 0
Bus address register
Instruction register
Count register
Flag register
UCON control register
Residual control register
Return register
PDP-11 Registers

Bits

Description

$PSW
$PC
$ACn

16
16
32

$RLn

$FPS
$FEC
$FEA

16
16
16

General registers
n is an integer starting
with 0 and continuing through 7
Program Status Word
Program Counter
Floating point registers
n is an integer starting with
o and continuing through 5
Relocation registers
n is an integer starting with
o and continuing through 7
Floating point status word
Floating point error code
Floating point error address

MDT -- INTRODUCTION
9.1.2

Page 9-3

Restoring The Machine State

The type of breakpoint determines the amount of the machine that must
be restored before execution of the program under test can resume. At
a main memory breakpoint, MDT restores the PDP-11 registers from the
microstate table.
At a microprogram breakpoint, MDT restores the
datapath registers, as well as the PDP-11 registers.
Three datapath registers cannot be preserved by MDT. These registers
are $UCON, $RES, and $RET. The contents of the microstate table for
these three registers is the default value used by MDT when restoring
the state of the machine.
If the programmer wants to change the default value for any of these
unpreserved registers, he can do so by the open-bits command. Since
MDT. never writes into the unpreserved locations, the default value is
not changed.
Then, each time that execution of the program is
resumed, that default value is copied into the register in question.

9.2

A DEBUGGING SESSION

A debugging session consists of a number of interactions between MDT
and the programmer, in which the programmer observes, and sometimes
changes, the characteristics of the program under test.
MDT prompts for a command by typing:
MDT)
In response to this prompt, the programmer types a command line.
The
following section considers some general properties of the command
line.

9.3

THE COMMAND LINE

An MDT command line can contain four possible items, as shown
following diagram:
{qUalifier }

~ {integer}: command

{

the

address-spec } :

The command must always be present in a command line, but the
presence, or absence, of the other three items depends on the command.
At most, two, out of the three optional items, are required for any
command.

Page 9-4

MDT -- INTRODUCTION

The permissable syntax and the meaning of that syntax are given for
each type of command in the following chapters. Some general remarks
about the form of the command, however, can be made here.
The following sections discuss the four items of the command line,
starting with the command and continuing with the address-spec, the
qualifier, and the integer.

9. 3. 1

Command s

The command mnemonics recognized by MDT are summarized in the
following list.
For each command mnemonic, a brief description is
given.
Command

Description

Used to open, examine, and possibly change, the
contents of bits in main memory or the Writable
Control Store.

Used to open, examine, and possibly change, a byte in
main memory.

Used to open, examine,
character in main memory.

Used to set a breakpoint;
or, with the qualifier
to delete a breakpoint; or, with the qualifier
'?', to list the current breakpoints.

Used to proceed
ex ecution .

Used to add an item to a display list; or, with the
qualifier
' , t o delete an item from the display
list; or, with the qualifier '?', to list the
current display items on the display list.

Used to start the
test.

R
L

after

and

possibly

breakpoint

change,

has

halted

program

under

Used to reset all breakpoints and clear
list.

the

display

Used to reload the microprograms
Control Store.

the

Writable

execution

the

into

The first three commands (0, OB, and OC) are described in Chapter 10,
"The Open Commands".
The next two commands (B and P) are given in
The next command (D) is
Cha pter 11, "The Br eakpo in t Commands".
described in Chapter 12, "The Display Commands". The last three
commands (G, R, and L) are described in Chapter 13, "The Control
Comm and s" .

MDT -- INTRODUCTION
9.3.2

Page 9-5

The Address-Spec

An address-spec in an MDT command locates
memory. The form of the address-spec is:
address

{bit-range }

sequence

bits

~ { , relocation-register} ~

The address part of an address-spec can designate a main memory
location, a micro memory location, or a register, depending on the
first character of the address as indicated in the following list:
Address

Meaning

A main memory address.
range 0 <= n <= 17777.

The address n must lie

A micro memory address. The address n must lie in the
range 6000 <= n <= 7777 for a microinstruction or in
the range 0 <n n <n 5777 for a data (local store) item.

A register. The register named x can be any of the
names recognized by MDT, as indicated in the table of
Sec tion 9. 1 . 1 .

The bit range indicates the bits within the designated
memory. A bit-range is expressed in the following way:
<

left-bit

right-bit

location

the

)

If a bit-range is not given, then the full word is assumed, namely:
<15:0)

For a main memory address

<47:0)

For a micro memory instruction address

<15:0)

For a micro memory data address

<n:O)

For a register, where n is the value of bits, from the
table in Section 9.1.1, minus 1.

The
relocation-register
can
be
anyone
of
the
eight
relocation-registers,
namely
$RLO,
$RL 1,
$RL 7.
A
relocation-register can only be used with a main memory address. If a
relocation-register is present in an address-spec, the contents of
that register is added to the specified address to determine the
actual address.
The form of the address-spec that is permitted depends on the command.
The most general address-spec is allowed in an open-bits command.
Other commands, however, are more restrictive.
For example, the
open-byte and open-character commands only accept main memory byte
addresses and the go-command only accepts a word address. The syntax
of each command indicates the form of the address-spec that can be
given.

Page 9-6

MDT -- INTRODUCTION

9.3.3

The Qualifier

The qualifier changes the meaning of the command mnemonic.
Two
qualifiers can be used in MDT, as indicated in the following list:
Qualifier

Meaning
Negate the meaning of the breakpoint or display
mnemonic, so that instead of setting a breakpoint
or display, a breakpoint or display is deleted.

List the breakpoints or displays currently set.

A qualifier can only be used with the breakpoint command
display command (D).

9.3.4

(B)

the

Integer Field

The integer field is used as an alternative to the address-spec. When
a
breakpoint
or
display
is set, it is associated with an
identification number. This identification number can be explicitly
assigned by the programmer. More often, however, it is assigned by
MDT. To delete a breakpoint or display, the programmer can give
either
the
identification
number
or the address-spec.
Some
programmers find the identification number more convenient because it
usually involves less typing.

9.3.5

Examples

Some examples of MDT command lines are given in the
For each command line, a brief description is given.

following

list.

Command Line

Description

0#46000

Open bits 5 through 2 of main memory
46000.

address

86200

Set a
6200.

address

List the display
display list.

-20

Delete display
number 2.

G#47010

Start execution at main memory address 47010.

<5:2)

breakpoint

micro

items

item

memory

currently

with

the

identification

The following chapters describe the MDT commands in detail.

CHAPTER 10
OPEN COMMANDS

Three open-commands are provided to examine, and possibly change, the
contents of locations within main memory or the Writable Control Store
(micro memory). The open-commands are given in the following syntax:

open-bits-command
open-command

open-byte-command

Lopen-Character-command J

The open-bits command is the most general open-command.
It can be
used to look at a specified number of bits in main memory, in micro
memory, or in the machine registers. The other two open-commands are
special purpose commands that can be used to access either a byte or a
character in main memory.
The following sections describe each of the open-commands.

MDT -- OPEN COMMANDS
10.1

Page 10-2

THE OPEN-BITS COMMAND

The open-bits command can be used to open a main memory address, a
microinstruction address, or a machine register. The programmer types
the character "0" followed by an address-spec to open and display the
contents of an address.
The address-spec identifies the type of
address, the address, and, optionally, the bits within the word
addressed. For example:
MDT>01l2034
The character "II" identifies the address 2034 as a main memory
address. Since no bit-range is given, MDT assumes the full word is to
be displayed.
MDT repeats the address-spec and then types the
contents of the bits specified in the address-spec, as follows:

112034<15:0>

14332

(pause)

The (pause) on the above line indicates that MDT is waiting for the
programmer's instructions after typing the address-spec and value.
The programmer can at this point enter a new value. For example, to
change bit 3 to a 0, the programmer types the new value 14322 as
follows:

112034<15:0>

14332

14322

(separator)

The separator in the above line tells MDT whether the programmer wants
to open another address or to return to MDT command level for another
command. If the programmer types carriage' return (cr) for the
separator, then MDT considers the command finished and prompts for
another command. The sequence, in this case, is:
MDT>01l2034
112034<15:0>
MDT>

14332

14333

If the programmer types a line feed (If), then MDT continues the
current command by opening the next consecutive address. The sequence
is:
MDT>01l2034 (cr)
112034<15:0> 14332 14333
112036<15:0> 1010 ( If)
112040<15:0> 23322 (cr)
MDT>

(I f)

MDT -- OPEN COMMANDS
10.1.1

Page 10-3

Syntax

open-bitscommand

o address-spec
{address-spec

address-spec

value

value {

{

new-value}: term}:

new-value}:

macro-address-spec
micro-address-spec
register-address-spec

ma~~~~address- macro-address {bit-range} : { relocation-register} ~

I 1

bi t-range
micro-addressspec

micro-address

registeraddressspec

bit-range

left-bit

{

{
{

dec imal-number

fieldindicator

< field-name

term

{

right-bi t

Of)

field-indicator

bit-range

...J 0

right-bi t }

Page 10-4

MDT -- OPEN COMMANDS

The valid register-names are given in the microstate table in Section
9.1.1 and the valid field-names are given in Section 10.1.4.2.

10.1.2

Interpretation

MDT interprets an open-bits-command in the following way:
If the
The address-spec is used to determine the bits to be opened.
address begins with the character "II", it is interpreted as a main
memory address. If the address begins with a "$", it is interpreted
as
a
register-address.
Otherwise,
it
is interpreted as a
micro-address.
If a bit-range is specified, then those bits within the specified
address are designated.
If a bit-range is not specified, then the
bit-range is constructed from the highest and lowest bit of the
address, as follows:
Address

Default Bit-Range

macro-address

<15:0>

micro-address
instruction
data

<41:0>
<15:0>

If a field-indicator is given in a micro-address-spec, then the
bit-range associated with the field-name in the table of Section
10.1.4.2 is used to designate the bits to be opened.
The designated bits are displayed as an octal number, in which leading
zeros are suppressed and right-bit is the zeroth bit.
If the programmer types a new-value, that value is interpreted as an
octal number with leading zeros suppressed, converted to a bit
sequence of the proper length, and used to replace the designated
bits.

Page 10-5

MDT -- OPEN COMMANDS
If a separator is given, then MDT opens an address according
separator used, as indicated in the following list:

the

Separator

Action

( If)

Open the next consecutive address: The next address is
determined for a macro address by adding 2 to the
current address; for a micro address by adding 1 to
the current address; for a register by taking the next
consecutive register in the table of Section 9.1.1.
Open the previous location. The previous macro address
is
determined by subtracting 2 from the current
address; for a micro address by subtracting 1 from the
current address; for a register address by taking the
entry just before the current register in the register
name table of Section 9.1.1.
Open the address indicated in the memory address
currently open (indirect addressing). This address is
formed for a macro address by taking the 16 bit
contents of the current address; for a micro address
by taking bits <8:0> of the contents of the current
address;
for a register address, by taking the
contents of the register and interpreting it as a
macro-address.

If the register contains more than 16 bits, the extra bits are
truncated.
If the register contains less than 16 bits, leading O's
are supplied.
A carriage return following
terminates the command.

10.1.3

displayed

value

new-value

Restrictions

If a new-value is given, it must fit, after truncating
zeros, in the bits designated by the address-spec.

any

leading

A micro-address for an instruction must lie in the range 6000 through
7777.
A micro-address for a data (local store) item must lie in the
range 0 through 5777.
A macro-add ress must be an even address in the range 0 through 177777.
The left-bit and right-bit must lie in the valid
address type, as follows:

bit

range

macro-address

15 >= left-bit

right-bit >= 0

micro-address
instruction
data

47 >= left-bi t
15 >= left-bit

>
>

right-bit >= 0
right-bit >= 0

for

the

MDT -- OPEN COMMANDS
10.1.4

Page 10-6

Defaults

If a right-bit is not given, then the right-bit is assumed to
same as the left-bit and a single bit field is assumed.

the

If no bit-range is given, the full word is assumed.
If a new-value is not given, then the value displayed is not changed.

10.1.4.1 The Macro-Address-Spec - The macro-address-spec
describes
the bits to be opened in a main memory location. A main memory word
consists of 16 bits, as indicated in the following diagram:
1

5432109876543210
address

[~~~~~~~~~~~~~~~~J

Suppose the main memory address 10234 contains the following bits:
1

5432109876543210

10234

1011011101111011
[----------------]
----------------

To examine the entire word, the programmer types the character "II" to
indicate a macro-address and the main memory address in response to
the MDT prompt, as follows:
MDT>01l10234

1110234<15:0> 133573
To examine a set of bits within the word, he types the character
followed by the address, followed by a bit-range.

"fI",

MDT>OIl10234<8:5>

1110234<8:5>

To change a set of bits within the word,
follows:

gives

new-value,

MDT>O#10234<2:0>
1110234<2:0> 3 0
After the above interaction the contents of main memory location 10234
contains the following bits:
1

5432109876543210
10234

[~~~~~~~~~~~~~~~~J

MDT -- OPEN COMMANDS

Page 10-7

10.1.4.2 The Micro-Address-Spec - The micro-address-spec
describes
the bits to be opened in the Writable Control Store. A Writable
Control Store location consists of 48 bits, as indicated in the
following diagram:
4
4
321
76543210987654321098765432109876543210987654321
address

[~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~J

Suppose the Writable
following bits:

Control

Store

location

6436

contains

the

4
4
321
765432109876543210987664321098765432109876543210

6436

[~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~J

To display the entire word, the programmer types the address without a
bit range, as follows:
MDT>06436
6436<47:0>

15777605167

To display a set of bits within the word,
address followed by a bit-range:

the

programmer

types

the

To display a predefined microinstruction field within the word,
programmer types the address followed by a field-indicator:

the

MDT>06436<12:7>
6436<12:7> 24

MDT>06436<UPF>
6436<8:0> 163
To change a set of bits, he types a new-value, as follows:
MDT>06436<UPF>
UPF<8:0> 163 172
After the above interaction,
bits:

location

6436

contains

the

4
4
321
0
765432109876543210987654321098765432109876543210

6436

[~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~J

following

MDT -- OPEN COMMANDS

Page 10-8

The field-names that can be given in a micro-address-spec are given in
the following table.
For each field-name, the associated bit-range
and a brief description are given.
Field-Name
ALU
BEN
BSEL
AEN
ASEL
XMUX
CMUX
RIF
COUT
WHEN
CLKD
CLKSR
CLKBA
SCC
BGB
BUSBOX
BMUX
BC
AMUX
WRCSP
HILO
WRSEL
WRSP
MOD
CLKCOUNT
CLKRES
UBF
UPF

Bit-Range

Meaning

<47:44>
<43:42>
<41:40>
<39:38>
<37:36>
<36>
<37:36>
<35:33>
<32:30>
<29>
<28>
<27>
<26>
<25>
<24>
<23>
<24>
<22:20>
<22:20>
<19>
<18>
<17>
<16: 15>
<14>
<16>
<18>
<13:9>
<8:0>

ALU function field
B scratchpad enable field
B scratchpad select field
A scratchpad enable field
A scratchpad select field
XMUX select field
CMUX select field
Register immediate field
Carry select field
Time to clock select field
Clock D register
Clock SR register
Clock BA register
Set condition codes
BGB field
Bus or Box field
BMUX select field
BC field
AMUX select field
Write C scratchpad from DIN
High/Low select field
A/B write select field
Rewrite select field
Field select
Clock count register field
Clock RES register field
UBF field
Next address field

10.1.4.3 The Register-Address-Spec The
register-address-spec
describes the bits to be opened either in a datapath register or a
PDP-11 register. The register-names recognized by MDT are given in
the Microstate Table in Section 9.1.1.

MDT -- OPEN COMMANDS

Page 10-9

10.1.4.4 New-Values - The programmer can make a temporary change in a
program by supplying a new-value in an open-command. The new-value
replaces the bits designated in the address-spec.
However, if the
program is reloaded, the old values are restored.
New-values can be entered without leading zeros.
MDT supplies
sufficient leading zeros to fill out the new value to the number of
bits specified by the address-spec and then replaces those bits within
the address.
If the programmer gives a new-value that contains more
bits than given by the address-spec, then the value is truncated to
fit the bits and no error is reported.

10.1.4.5 Line Terminators - The line terminator (term) communicates
to MDT whether or not the programmer wants to open another address,
which is related to the current address. If the programmer types the
carriage return line terminator, then MDT considers the open-command
complete and prompts for the next command. However, if the programmer
types a line feed, circumflex ("'), or n@", then MDT opens another
address.
To open the next consecutive address, the programmer
feed line terminator, as follows:
MDT>6240
6240<47:0> 334564 (If)
6241<47:0> 110200004007
6242<47:0> 104 (cr)

the

line

programmer

types

the

for

each

(If)

To open the previous address in memory,
circumflex terminator, as follows:
MDT>10234<10:8>
4110234<10:8> 2
4110232<10:8> 0
4110230<10:8> 1

types

the

(cr)

Observe that the bits designated in the bit range are
address opened.

used

MDT -- OPEN COMMANDS

Page 10-10

To open the indirect address,
terminator, as follows:
MDT>6240
6240<47:0>
6564<47:0>
6344<47:0>

334564 @
4457030344 @
202000 (cr)

MDT>#10236
10236<15:0>
4430<15:0>
4436<15:0>

4430 @
4436 @
10234 (cr)

the

programmer

types

the

"@"

line

The line terminators can be mixed in an open-command sequence.
Consider the case in which the programmer has a linked list of word
pairs. The first word of a pair contains the value and the second
word contains the link. To examine the list, he begins by opening the
first word of the first word pair, then the second word, then using
the link in that word, the next pair in the list, as follows:
MDT>#4000
#4000<15:0> 0 (If)
#4002<15:0> 4016 @
#4016<15:0> 3 (If)
#4020<15:0> 4110 @
#4110<15:0> 2 (If)

When the address-spec gives a register address, then the line feed and
circumflex line terminators can be used to display the other registers
in the microstate table. If a line feed terminator is used, then the
next register in the microstate table is opened and if a circumflex is
used, then the previous register in the microstate table is opened.
An example of the use of the line feed terminator with a register
address is as follows:
MDT>$BA
$BA<15:0>
$IR<15:0>
$CNT<5:0>
$FLAG<7:0>

12
3

( If)
( If)

(I f)

MDT -- OPEN COMMANDS
10.2

Page 10-11

THE OPEN-BYTE COMMAND

The open-byte command is used to open a byte of main memory. Suppose,
for example, that the programmer wants to examine main memory
locations 7002 through 7012 on a byte-by-byte basis and change the
first zero byte to the value 33. He opens the first location with an
open-byte-command and then, to locate and change the first byte with
value 0, uses the line feed line terminator to examine the following
bytes, as follows:
MDT)OBII7002
117002 302 (If)
117003 111 (If)
117004 123 (If)
117005 0 33 (cr)
The open-byte command can
example:

used

address

{

open

odd

address.

For

MDT)OBII3345
113345 22

10.2.1

Syntax

open-bytecommand

{"address

lIadd ress

10.2.2

value {

value

relocation-register} :

new-value}:

{~f} } :

{new-value} :

Interpretation

MDT interprets the open-byte-command in the following way:
The address locates the main memory byte to be opened.
The contents
of that byte are displayed as an octal number, with leading zeros
suppressed.

MDT -- OPEN COMMANDS

Page 10-12

If a new-value is given, that value is interpreted as an octal number
with leading zeros suppressed and is used to replace the contents of
the designated byte in memory.
If a line feed is used to terminate a line, then the next consecutive
byte in memory is displayed. If a circumflex is used to terminate a
line, then the previous byte is opened. If a carriage return is used,
then the command is terminated.

10.3

THE OPEN-CHARACTER COMMAND

The open-character command is used to open a character in main memory.
The open-character command accepts a byte address and displays the
contents of that byte as an ASCII character.
As an example of the use of the open-character-command, consider a
table of names in main memory. Each name consists of a sequence of
ASCII characters terminated by the special symbol ":".
Once the
programmer gets a pointer to the beginning of a string in the table,
he can use the open-character-command to examine the characters in the
name, as follows:
MDT)OC1I12340
1112340 A (If)
1112341 L
(If)
1112342 P (If)
1112343 H (If)
1112344 A (If)
1112345
(cr)
Suppose he wants to change that entry in the table from ALPHA to
ALPH1, he opens the appropriate character and changes it as follows:
MDT)OC1I12344
1112344

(cr)

Page 10-13

MDT -- OPEN COMMANDS
10.3.1

Syntax

open-charcommand

address

{tladdress

tladdress

10.3.2

char

relocation-register}:

{new-char}:

{~f} }:

{neW-Char}:

Interpretation

MDT interprets the open-char-command as follows:
The address locates a byte in main memory to be opened. The contents
of that byte are displayed as an ASCII character. If the contents of
the byte is not a printable character, a blank space is printed.
If a new-char is given, that character replaces the
designated byte.

contents

the

If a line feed is used to terminate a line, then the next consecutive
byte in memory is displayed as an ASCII character. If a circumflex is
used to terminate a line, then the previous byte is displayed as an
ASCII character.
If a carriage return is used, the command is
terminated.

CHAPTER 11
BREAKPOINT COMMANDS

The breakpoint commands allow the user to set breakpoints in main
memory or in the Writable Control Store, to continue execution after a
breakpoint occurs, to selectively delete breakpoints, and to list the
breakpoints currently set in the program.
The breakpoint commands are given in the following syntax:

'
j
r

breakpointcommand

set-break-command
proceed-from-break-command
delete-break-command

list-break-command

I
~

Two items of information are maintained for active breakpoints,
namely: the break-address and the repeat-count. The break-address is
supplied by the set-break-command; it determines the address at which
the breakpoint is taken.
The repeat-count is supplied by the
proceed-from-break-command; it determines the number of times the
breakpoint must occur before execution halts at that breakpoint.
MDT keeps this information in the breakpoint list.
The breakpoint
list contains 16 entries, one for each possible breakpoint. The
number of entries in this list limits the number of breakpoints that
can be active at anyone time. The break-id is the index into the
breakpoint list. The break-id can be given in a set-break-command.
However, if it is not supplied, MDT assigns the lowest available
break-ide

Page 11-2

MDT -- BREAKPOINT COMMANDS

Initially the breakpoint list is empty. Each time a set-break-command
is executed, an entry is made in the breakpoint list. Suppose the
programmer types the following two set-break-commands:
MDT)B#10200
MDT)2B6430
In the first set-break-command, no break-id is given and, therefore,
MDT assigns the first available break-id, 0, to that breakpoint. In
the second set-break-command, the break-id 2 is given.
After the
execution of these two commands, the breakpoint list looks as follows:
Break-Id

Break-Address
#10200

6430

Repeat-Count

o
o

When a breakpoint occurs, MDT examines the repeat-count associated
with that breakpoint. If the repeat-count is 0, then MDT prints the
breakpoint message and halts. Suppose control passes first to the
main memory address 10200. Then, the following message is printed:
BREAKPOINT NUMBER 0 AT ADDRESS #10200
To continue the execution of his program, the programmer types a
proceed-from-break-command, which can contain a repeat-count. Suppose
the programmer wants to ignore the next four occurrences of the
breakpoint at 10200. To do this, he types the following command:
MDT)4P
MDT updates the repeat-count associated with that breakpoint in
breakpoint
list.
After
the
execution
of
proceed-from-break-command, the breakpoint list looks as follows:
Break-Id

Break-Address
#10200

6430

2
3
15

Repeat-Count

the
the

MDT -- BREAKPOINT COMMANDS

Page 11-3

control passes again to 10200 in main memory and then to 6430
ln the Writable Control Store.
When control passes to 10200, the
repeat-count is decreased by 1, but no message is printed and no halt
occurs.
When control passes to 6430, a message is printed and
execution stops.
The programmer can, at that point, print the
breakpoint list by typing a list-break-command, as follows:
~uppose

BREAKPOINT NUMBER 2 AT ADDRESS 16430
MDT>?B
MDT, in response to this command, types the breakpoint list:
BREAKPOINT NUMBER 0 IS SET AT ADDRESS 10200
THE CURRENT REPEAT COUNT IS 3
BREAKPOINT NUMBER 2 IS SET AT ADDRESS 6430
THE CURRENT REPEAT COUNT IS 0
By examining the breakpoint list, the programmer learns the current
breakpoints that are set and the state of the repeat-count associated
with each breakpoint. Suppose that, on the basis of this information,
the programmer decides to delete the breakpoint at main memory
location 10200 and then continue execution. He types the following
commands:
MDT>-B#10200
MDT>P
The breakpoint list then looks as follows:
Break-Id

Break-Address

Repeat-Count

o
1

6430

The following sections discuss each
detail.

o
o
of

the

breakpoint

commands

MDT -- BREAKPOINT COMMANDS
11.1

Page 11-4

THE SET-BREAK-COMMAND

The set-break-command is used to indicate the address at which a
breakpoint is to be taken. When control passes to that address, MDT
examines the repeat-count associated with the address
in
the
breakpoint list.
If the repeat-count is not zero, it is decremented
by 1 and execution continues. If the repeat-count is zero, MDT prints
a message identifying the breakpoint plus the contents of any
display-items on the display list, and halts.
The display list and the MDT commands that add and delete entries from
the display list are described in the next chapter. In this chapter,
the display list is assumed to be empty.
As an example of the use of breakpoints, consider a program that
dispatches, on a calculated value, to one of three possible paths.
The programmer wants to examine some locations the first time control
passes through each path.
To do this, he sets a breakpoint at the
beginning of each path, as follows:
MDT)B6500
MDT)B6720
MDT)B6400
Then, he starts the execution of his program. Suppose the first time
control passes through the dispatch point it is sent to the path that
begins with the microinstruction 6720.
MDT prints the following
message and halts.
BREAKPOINT NUMBER 1 AT ADDRESS 6720
The programmer can, at this point, open addresses to examine the state
of the program, make temporary changes, set or delete breakpoints, or
perform any of the other MDT commands.

11 . 1 . 1

Syn tax

set-breakcommand

break-id

break-address

[

break-id }

{o I
{

break-address

11000000

6000

I 2 t ...
,

15 }

... I 1117776 }
I ... I 7777

1100002

6001

MDT -- BREAKPOINT COMMANDS
11.1.2

Page 11-5

Interpretation

In response to a set-break-command, MDT performs two actions, namely:
including the breakpoint in the breakpoint list and altering the
contents of the break-address so that MDT can handle the breakpoint.
The following sections discuss these two actions.

11.1.2.1 Including The Breakpoint In The Breakpoint List - MDT enters
the break-address given in the set-break-command with a repeat-count
of 0 in the breakpoint list entry specified by the break-ide
If a break-id is given in the set-break-command, MDT uses that
break-id as an index into the breakpoint list. If the entry indicated
by the break-id has an associated break-address, indicating that it is
a currently active breakpoint, then MDT deletes the old breakpoint
address in the table and replaces that address by the break-address
given in the set-break-command.
If a break-id is not given, MDT assigns the first available break-ide
If no break-id is available, indicating that 16 breakpoints are
active, MDT reports an error and rejects the command.

11.1.2.2 Planting The Subroutine Call - To set a breakpoint,
MDT
alters the contents of the break-address. It removes and saves the
current contents and replaces the contents with a call to an MDT
subroutine.
When control passes to the break-address, the MDT
subroutine is executed.
The MDT subroutine examines the repeat-count associated with the
break-address in the breakpoint list.
If the repeat-count is not
zero, the subroutine decrements the repeat-count and
execution
proceeds.
If the repeat-count is zero, the subroutine prints a
message identifying the breakpoint, then prints the contents of any
display-items on the display list, halts the execution of the program
and prompts for the next MDT command.

11.1.3

Restrictions

Observe that, since MDT alters the contents of the break-address, an
instruction that is dynamically modified by the program must not be
given as a break-address.
Further, since certain operations in the 11/60 (such as reading from
memory) take two cycles to complete, an MDT breakpoint should not be
placed on the second microword of a microword pair.

MDT -- BREAKPOINT COMMANDS
11.2

Page 11-6

THE PROCEED-FROM-BREAK-COMMAND

The proceed-from-break-command is used to resume program execution
after a breakpoint. Execution stops just before the instructon at the
break-address is executed.
The proceed-from-break-command causes
execution to resume at the instruction given in the set-break-command.
Execution then continues until another breakpoint is reached or until
the program halts for some other reasons.
In some cases, the programmer does not want to stop at every
occurrence of a breakpoint. The proceed-from-break-command allows the
programmer to give a repeat-count, which directs MDT to pass through n
occurrences of the breakpoint but to halt at the n+1th occurrence.
Suppose, for example, the programmer is debugging a program with a
loop that executes approximately 200 times. The programmer plants a
breakpoint within the loop. He wants the breakpoint to halt execution
the first time the loop is executed and again as the loop is about to
terminate. The first time the loop is executed, MDT prints the
breakpoint message and halts, waiting for a command. The programmer
types the following proceed-from-break-command:
BREAKPOINT NUMBER 0 AT ADDRESS 6436
MDT> 200P
The proceed-from-break-command instructs MDT to ignore the next 200
occurrences of the breakpoint.
At the 201st occurrence of the
breakpoint, MDT prints the following message and halts:
BREAKPOINT NUMBER 0 AT ADDRESS 6436
If the programmer wants to halt the 202nd
following proceed-from-break-command:

occurrence,

types

the

MDT> P
If a repeat-count is not given, it is assumed to be O.
The above
command, therefore, instructs MDT to stop at the next, in this case
202nd, occurrence of the breakpoint.

11.2.1

Syntax

proceed-from-break-command

repeat-count

{repeat-count} :
{o , I I ... I
P

511 }

MDT -- BREAKPOINT COMMANDS
11.2.2

Page 11-7

Interpretation

In response to a proceed-from-break-command, MDT performs two actions,
as follows:
MDT enters the repeat-count in the breakpoint list for the
breakpoint that has halted execution.
If no repeat-count is
given in the
proceed-from-break-command,
MDT
enters
the
repeat-count O.
MDT causes the execution of the program to resume at the
instruction that was contained in the break-address before the
set-break-command.

11.3

THE DELETE-BREAK-COMMAND

The delete-break-command is used to remove a breakpoint that
by a set-break-command.

was

set

As an example of the use of the delete-break-command, consider the
case in which the programmer has set breakpoints in his program at
addresses #10200, #12331, #16050, and #14443.
During the debugging, the programmer finds that control passes through
the breakpoint #12331 in the expected way and, therefore, the
breakpoint is no longer necessary.
The programmer deletes that
breakpoint as follows:
MDT>-B#12331
Later in the debugging session, the program~er wants to concentrate on
a particular section of the program.
He dispenses with all the
existing breakpoints by the following command:
MDT>-B
The above command clears all breakpoints
program.
The programmer can then add
special interest.

currently active in the
breakpoints in the area of

MDT -- BREAKPOINT COMMANDS
11.3.1

Syntax

delete-breakcommand

11.3.2

Page 11-8

{

break-id }

: B {

break-address}:

Interpretation

In response to a delete-break-command, MDT deletes a breakpoint. That
is, it removes the subroutine call placed in the breakpoint location
by the set-break-command and restores the original contents of that
location.
The form of the delete-break-command determines the breakpoint
deleted.

If neither a break-id nor break-address is given, then MDT
deletes all breakpoints currently set in the breakpoint list.
If only a break-id is given, then MDT deletes the breakpoint for
the address associated with that break-id in the breakpoint list.
If no address is currently associated with the break-id, then an
error is reported and the command is rejected.
If only a break-address is given, then MDT searches
the
breakpoint list. If the specified break-address is found in the
breakpoint list, that breakpoint is deleted. If it is not found,
then an error is reported and the command is rejected.

11.3.3

Restriction

Either a break-id or a
break-address
delete-break-command, but not both.

can

given

MDT -- BREAKPOINT COMMANDS
11.4

Page 11-9

THE LIST-BREAK-COMMAND

The list-break-command is used to print the breakpoint list, which
contains all the breakpoints that are currently active in the program.
The programmer types:
MDT)?B
In response to this list-break-command, MDT types the breakpoint
in the format shown in the following example:

list

BREAKPOINT NUMBER 0 IS SET AT ADDRESS #6436
THE CURRENT REPEAT COUNT IS 0
BREAKPOINT NUMBER 1 IS SET AT ADDRESS #12231
THE CURRENT REPEAT COUNT IS 12
. BREAKPOINT NUMBER 3 IS SET AT ADDRESS 6557
THE CURRENT REPEAT COUNT IS 1

11.4.1

Syntax

~ist-break-command
11.4.2

Interpretation

In response to the list-break-command, MDT types the breakpoint list,
glvlng the break-id, break-address, and repeat-count for each active
breakpoint in the following format:
BREAKPOINT NUMBER break-id IS SET AT ADDRESS
REPEAT COUNT IS repeat-count

break-address

CHAPTER 12
DISPLAY COMMANDS

The display commands allow the user to add address-specs
and
selectively delete them from the display list. The display list
contains the set of address-specs whose contents are printed by MDT
each time a breakpoint with a repeat-count of 0 occurs.
The display-commands are given in the following syntax:

I
I

display-command

set-diSPlay-COmmand

delete-display-command

l!ist-diSPlay-COmmand

The display list is very similar to the breakpoint list.
Like the
breakpoint list, it contains 16 entries, one for each possible display
and the number of entries in the list limits the number of displays
that can be active. The display-id is the index into the display list
just as the break-id is the index into the breakpoint list and it is
assigned either explicitly in a set-display-command or by MDT in a
similar fashion.
Each entry in the display list contains the address
printed.
The
display
list
is
empty
set-display-command
adds
an
entry
to
the
delete-display-command deletes an entry.
The following sections describe the display commands.

and bits to be
initially.
The
list
and
the

MDT -- DISPLAY COMMANDS
12.1

Page 12-2

THE SET-DISPLAY-COMMAND

The set-display-command is used to add an address-spec to the display
list.
After the execution of a set-display-command, the address-spec
given in the command is printed, as part of the display list, each
time a breakpoint with repeat-count 0 occurs.
As an example of the use of the set-display-command, consider the case
in which the programmer wants to examine, at each breakpoint, the
contents of registers 2 and 7, the program status word, and the ALU
field of microinstruction 6430. The programmer adds the address-specs
that define his display needs to the display list by the following
sequence of commands:
MDT>D$7
MDT>D$2
MDT>D$PSW
MDT>D6430<ALU>
When a breakpoint occurs, the display list is printed as follows:
BREAKPOINT NUMBER 0 AT ADDRESS #10010
DISPLAY
$7<15:0> 1012
$2<15:0> 54321
$PSW<15:0> 340
6430<ALU> 12
END OF DISPLAY
The address-specs are given in the display output according to their
display-ide No display-id was given when the address-specs were added
to the display list; consequently, the display-ids were assigned by
MDT.
The first address-spec entered was assigned the first available
display-id 0; the second address-spec was assigned the display-id 1;
and so on.

MDT -- DISPLAY COMMANDS
12.1.1

Page 12-3

Syntax

set-displaycommand

{

display-id

12.1.2

display-id

D address-spec

I 2 I . . . I 15 }

Interpretation

In response to a set-display-command, MDT adds the address-spec to the
display list entry specified by the display-ide
If a display-id is given, then the address-spec is entered into the
display list at that position. If the display-id indicates a display
list entry that has an address-spec, indicating that an active display
is associated with that display-id, MDT overwrites the address-spec in
the
display
list
with
the
new
address-spec
from
the
set-display-command.
If a display-id is not given, MDT assigns the first available
display-ide
If no display-id is available, then MDT reports an error
and rejects the command.
The address-spec is saved in the display list so that it can be used
to locate the bits to be printed when the display list is output. The
address-spec is described in connection with the open-bits-command in
Section 9.1.
Adding an address-spec to the display list directs MDT
to perform the open-bits-command for that address-spec automatically
each time a breakpoint is honored.

MDT -- DISPLAY COMMANDS
12.2

Page 12-4

THE DELETE-DISPLAY-COMMAND

The delete-display-command is used to delete an address-spec from the
display list.
The delete-display-command can be used to clear the
display list or to selectively remove address-specs from the display
list.
Suppose that, as in Section 12.1, the programmer has added registers 2
and 7, the program status word, and the ALU field of microinstruction
6430 to the display list. After taking a few breakpoints, he finds
that he is no longer interested in the contents of register 2. He can
delete that display by the following delete-display-command:
MDT >-D$2
Subsequent breakpoints, then, no longer include register 2 in the
display list.
At the next breakpoint, the following display list is
printed:
BREAKPOINT NUMBER 0 AT ADDRESS #1001
DISPLAY
$7(15:0> = 1012
$PSW(15:0> = 343
6430<ALU> 11
END OF DISPLAY
To delete all the address-specs, the programmer
delete-display-command:

types

the

following

MDT>-D
At the next breakpoint, the display list is empty and therefore, no
display is printed. The MDT simply reports the breakpoint as follows:
BREAKPOINT NUMBER 0 AT ADDRESS #1001

12.2.1

Syntax

delete-displaycommand

{disPlaY-id

0 D

{

address-spec }

MDT -- DISPLAY CnMMANDS
12.2.2

Page 12-5

Interpretation

MDT interprets a delete-display-command as follows:
If neither a display-id nor an address-spec is
given
in
a
delete-display-command, then MDT deletes all address-specs in the
display list to return the display list to its initial empty state.
If a display-id is given, then MDT deletes the address-spec associated
with that display-ide
If no address-spec is associated with the
display-id, then an error is reported and the command is rejected.
If an address-spec is given, then MDT searches the display list to
find a display-id associated with that address-spec and deletes the
address-spec. If MDT does not find the address-spec on the current
display list, then an error is reported and the command is rejected.

12.2.3

Restriction

Either a display-id or an address-spec can be given, but not both.

12.3

THE LIST-DISPLAY-COMMAND

The list-display-command is used to print the address-specs
currently on the display list.

that

are

To examine the contents of the display list, the programmer types
following command:

the

MDT)?D
MDT responds by typing the display list in the
following example:
DISPLAY LISTING
NUMBER
ADDRESS
0
$0
1
1121210
6430
3
This listing indicates
display-ids 0, 1 , and 3.

that

format

shown

are

current,

the

FIELD
<15:0)
<7: 0)
<22:20)
three

displays

with

MDT -- DISPLAY COMMANDS
12.3.1

Syntax

list-display-command

12.3.2

Page 12-6

Interpretation

In response to the list-display-command, MDT types the display list,
giving the display-id and address-spec for each active display in the
following format:
DISPLAY LISTING
NUMBER
ADDRESS
display-id
address

FIELD
bit-range

If a display-id is not currently in use, it is not printed as part
the display listing.

CHAPTER 13
CONTROL COMMANDS

Three control commands are provided in MDT.
These commands can be
used to start the execution of the program to be tested in the
debugging environment, to reload the Writable Control Store, and to
reset the state of MDT by deleting all breakpoints and displays.
The control commands are given in the following syntax:

go-command

control-command

load-command

Lreset-command ..../

The following sections describe each of the control commands.

13.1

THE GO-COMMAND

The go-command is used to start the execution of the program being
tested. The address part of the go-command informs MDT where to start
execution. For example:
MDT >G /I 46 1 00
This go-command instructs MDT to begin execution at the main memory
address 46100.
If the relocation register $RLO contains the base
address 46000, then the following go-command also starts execution at
main memory address 46000:
MDT >G /I 100 , 0

MDT -- CONTROL COMMANDS

Page 13-2

The go-command can be used to change the control sequence of the
execution after a breakpoint. For example, suppose that the program
execution halts at a breakpoint on one branch of a target assignment
construct and that the programmer wants to test out another branch.
He can enter a go-command after the breakpoint as indicated in the
following sequence:
MDT)B6420
MDT)B6430
MDT)G #461 00
BREAKPOINT NUMBER 0 AT ADDRESS 6420
MDT)P
BREAKPOINT NUMBER 0 AT ADDRESS 6420
MDT)G6430

13.1.1

Syntax

go-command

transfer-address

{

transferaddress

13.1.2

macro-address
micro-address

} {,

relocation-register }

Interpretation

MDT interprets a go-command in the following way:
MDT computes the transfer address.
If a relocation-register is
present, the contents of that register are added to the address. If
the address begins with the character "#", then MDT interprets it as a
main memory address; otherwise, MDT interprets the address as a micro
memory address.
MDT restores the state of the machine from the microstate table.
If
the transfer address is to main memory, then the PDP-11 registers are
restored. If the transfer address is to micro memory, then the
datapath registers, as well as the PDP-11 registers are restored from
the microstate table.
MDT starts the execution of the program under
address.

test

the

transfer

MDT -- CONTROL COMMANDS
13.1.3

Page 13-3

Restrictions

The transfer address in the go-command must not be a micro address
unless either a micro breakpoint has occurred or the programmer has
manually set up the datapath registers in the microstate table by a
sequence of open-bits commands.
A relocation-register must not be specified with a micro address.

13.2

THE LOAD COMMAND

The load command is used to restore the Writable Control Store to its
initial loaded state.
As part of its initialization sequence, MDT
copies the contents of the Writable Control Store into an unused
portion of main memory. If, after the program has been executing for
a time, the programmer wants to restore the contents of the Writable
Control Store, he uses the load-command. In response to this command,
MDT restores the saved copy of the contents of the Writable Control
Store.
This command is useful in the case in which the contents of the
Writable Control Store has been altered either intentionally or
accidentally while the contents of main memory have not
been
disturbed.
An example of such a case occurs when the programmer has
been making modifications to the microprogram in the Writable Control
Store by the use of open-commands.
As a simple example, consider the case in which the programmer begins
the debugging session by changing the contents of the ALU field of
locations 6200, 6201, and 6203. He mistakenly opens 6000 and makes
his modifications, as follows:
MDT>06000(ALU>
6000(47:44> 10
6001(47:44>
7
6002(47:44> 10

11
6
11

(If)
(If)

At this point, he realizes his mistake. He can either restore the
contents of 6000-6002 by the use of the open-command or he can reload
the Writable Control Store to restore it to its initial state.
In
this case, since no other changes were made to the Writable Control
Store, the use of the load-command is clearly simpler.
He continues
by typing the load-command and then entering the correct changes, as
follows:
MDT>L
MDT>06200(ALU>
6200(47:44>
2
6201(47:44>
3
6202(47:44>
1

11
6
11

(If)
(If)

MDT -- CONTROL COMMANDS
13.2.1

Page 13-4

Syntax

~oad-command
13.2.2

Interpretation

MDT interprets a load-command in the following way:
The saved copy of the Writable Control Store, which MDT copied into
main memory as part of its initialization sequence, is restored to the
Writable Control Store.

13.3

THE RESET COMMAND

The reset-command is used to reset the MDT tables.
A reset-command
directs MDT to remove all breakpoints and display-items from its
tables.
The reset command consists of the reset mnemonic, as
indicated in the following command-line:
MDT>R
The above line is equivalent to the following two command-lines:
MDT>-B
MDT>-D
The reset-command does not supply any addi~ional functionality but
provided in the MDT command language as a convenience.

13.3.1

Syntax

~eset-command
13.3.2

Interpretation

MDT interprets a reset-command in the following way:
All breakpoints are removed from the program under
display-items are removed from the display list.

test

and

all

PART V
MICROPROGRAMMING TOOLS USER'S GUIDE

Contents
CHAPTER 14
14 • 1

14.1.1
14. 1 . 2
14.1.3
14 . 1 . 4
14.2
14.2. 1
14.2.2
14.2.3
14.2.4
14.3
14.3. 1
14.3.2
14.3.3
14.4
14.4. 1
14.4.2
14.4.3
14.4.4
14.4.5
14.4.6
14.4.7
14.4.8
14.4.9

USING THE ASSEMBLER
THE INDIRECT FILE METHOD . . . . .
.
Syn tax . . . .
. . .
.
Interpretation
..........
Restrictions
. . . . ..
..
Default . . . .
. . . . . . ..
THE DIRECT METHOD .
. . . ..
. ..
Syntax . . . .
. . .
. .
Interpretation
. . . . ..
..
Defaul ts
. . . .
. . . . . . . .
Guidelines
..........
ASSEMBLER INPUT.
. . . . .
. .
Preparing The Input .
. .........
Formatting The Microprogram
..
A Sample Input Listing
....
THE OUTPUT LISTING
........
The Table Of Contents
..........
Line Numbers . . . .
. .........
Page Headings. . . .
....
.
The Microword Line
. . . . . ..
.
Error Messages
. . . .
.
Macro Expansions
. . . . ..
..
The Bit Map. . .
. . ..
. ...
The Summary. . .
. . . .
. .
A Sample Output Listing. .
.

14-1
14-2
14-2
14-2
14-2
14-3
14-4
14-4
14-5
14-6
14-6
14-6
14-7
14-9
14-10
14-10
14-11
14-11
14-12
14-12
14-13
14-14
14-14
14-15

CHAPTER 15

USING THE MICROPROGRAM LOADER

15 . 1
THE INDIRECT FILE METHOD . . . . . . . . . . .
15.1.1
Syntax . . . . . . . . . . . .
. ..
15.1.2
Interpretation
.......
15.1.3
Restrictions
. . . ..
. .....
15.1.4
Defaults
..........
15.2
THE DIRECT METHOD
....
15.2.1
Syntax . . . . . . . .
. .......
15.2.2 _ Interpretation
. . . . .
. ...
15.2.3
Defaults
. . . .
. ..
15.3
ENABLING THE WCS . . . . . . . . .
. ...
15.4
LOADER INPUT
. . . .
. .
15. 5
LOADER OUTPUT . . . . . . . . . .
. .
15.5.1
Error Messages
............
15.6
EXAMPLE . . . . .
. ..........
CHAPTER 16
16 . 1
16.1.1
16.1.2
16.1.3
16.2
16.2.1
16.2.2
16.2.3
16. j

16.3.1
16.4

15-2
15-2
15-3
15-3
15-3
15-4
15-4
15-4
15-5
15-5
15-5
15-6
15-6
15-1

USING THE DEBUGGER
RUNNING MDT . . . . . . .
Syntax . . . .
. . ..
Interpretation
• • • • •
Restrictions
. .
THE DEBUG SESSION .
Interrupting Program Execution
Restarting The Debugger .
Terminating A Session . . . . .
DEBUGGER ERRORS . . . . . . . . .
A Special Error
. . . .
AN EXAMPLE . . .
.....

. . . . 16-2
. . . . . . 16-3
• • • • • • • 16 - 3
. . . . . . . 16-4

· .
.
· .
. · .
.
.

.
.
.
.

16-4
16-4
16-5
16-5
• • -j 6-6
16-6
. . 16-1

CHAPTER 14
USING THE ASSEMBLER

This section describes using the assembler. First, the two methods of
assembling a microprogram are considered;
then the input to the
assembler is described; next, the assembler output is given;
and
finally, an example of the use of the assembler is presented.

14.1

THE INDIRECT FILE METHOD

The indirect file method of assembling a microprogram assumes that the
programmer has written the program entirely in terms of the 11/60
predefinitions. Further, it assumes an object module file and,
optionally, a listing file are wanted as a result of the assembly. As
an example of the use of the indirect file method, consider the
following interaction:
>@MIC
>; MIC.CMD \ASSEMBLE WCS MICROPROGRAM

>* ENTER MICROPROGRAM SOURCE FILE SPECIFICATION [S]: LNKLST
>* LIST? [Y/N]:Y
>MIC LNKLST,LNKLST=PREDEF,DSPTCH,LNKLST
VERSION 1= 12-AUG-77
ERRORS DETECTED:
0
NUMBER OF LINES PROCESSED:

2745

The system requests the programmer to enter the name of the source
file
that
contains the action-part of the microprogram.
The
programmer responds with the name of the file, in this case LNKLST.
Then, the system asks if the programmer wants a listing file. He
responds Y (yes) and the assembly is initiated. The assembly produces
the object module file LNKLST.OBJ and the listing file LNKLST.LST. At
the end of the assembly, a summary is printed.
In this case, the
summary shows that no errors were encountered in the assembly and that
the number of lines processed was 2745.
The
lines
of
the
predefinitions and dispatch files are counted in this summary although
the contents of these files is not reproduced in the list file, due to
the fact that these files contain .NLIST keyword to suppress listing.

USER'S GUIDE -- USING THE ASSEMBLER
14. 1 . 1

Page 14-2

Syn tax

>@MIC
in-direct;
method >* ENTER MICROPROGRAM SOURCE FILE SPECIFICATION[SJ: in-spec
r Y
>* LIST? [Y IN J : ~ N j

in-spec

{

1
-

in-file }

The text typed by the user is underlined in the above syntax.

14.1.2

Interpretation

The
in-spec
given
in
response
to
the
system
question
"ENTER MICROPROGRAM SOURCE FILE SPECIFICATION[SJ:"
is
assumed
to
contain the action-part written in terms of the 11/60 predefinitions.
The response given to the question "LIST? [Y/NJ" determines whether or
not a listing file is created.
An assembly command line is constructed using the name
file and the names of the files supplied by Digital.

the

input

If the assembler is not installed, the actions necessary to install it
are taken.

14.1.3

Restrictions

The maximum number of characters that can be given in
16.

14.1.4

in-spec

in-spec,

the

Default

If the extension is omitted for a
default extension .MIC is assumed.

file-spec

the

USER'S GUIDE -- USING THE ASSEMBLER
14.2

Page 14-3

THE DIRECT METHOD

The direct method of assembling a microprogram allows the user to
specify the files that make up the program in a general way. He can,
for example, extend or replace the 11/60 predefinitions.
Suppose, for example, that the programmer wants to add a few of his
own definitions to the 11/60 predefinitions. To do this, he invokes
the assembler in the following way for the files LNKLST and MYDEF:
>MIC LNKLST,LNKLST=PREDEF,MYDEF,DSPTCH,LNKLST
The user-definitions are included in the file MYDEF.
If the MICRO-11/60 assembler is installed, it is invoked by typing its
three letter abbreviation, MIC, followed by the assembly-command-line
at the command level in response to an operating system prompt. If it
is
not
installed,
the
RUN
command
must
be
used.
The
assembly-command-line gives the output and input files in the RSX-11M
standard notation.
The output files are given on the left-hand-side
and the input files are given on the right-hand-side of the '='
character in the assembly command line.

USER'S GUIDE -- USING THE ASSEMBLER
14.2.1

Page 14-4

Syntax

assembly

)MIC

assembly-commandline

output-spec

{Ob ect-file }: {, list-file}:

input-spec

{ input-file } ~

object-file
list-file
input-file

assembly-command-line

input-spec

file-spec

file-spec { / swi tch } :
i:dev:}: {[ppnJ}: file-name {.ext}:

switch

The text typed by the user is underlined in the syntax for assembly.

14.2.2

Interpretation

An assembly interaction consists of the invocation of
followed by an assembly-command-line.

the

assembler,

The assembly-command-line informs the assembler of the names of the
files to be used for output and input. The position of the file
within the assembly-command-line indicates its intended use.

USER'S GUIDE -- USING THE ASSEMBLER

Page 14-5

Both the output files are optional. If both output files are omitted,
then the assembler validity checks the input and reports any errors on
the terminal. If more than one input file is given, the assembler
reads the microprogram from the specified input files in the order
given in the assembly-command-line. The first input file is read and,
if an .END is not encountered before the end of that file is reached,
then that file is closed and the second file opened.
Processing
continues with the second input file, again until either an .END,
signifying the end of the microprogram, or an end-of-file, indicating
the end of input on that file, is read. Processing continues in this
way, moving from file to file, until an .END is encountered. The .END
determines the end of the microprogram. If it is read before all the
files specified in the assembly-command-line are processed, then the
information after the .END is discarded.
The assembler produces the object module on the object-file and that
file can be subsequently given as an input file for the microprogram
loader MLD
If an object-file is not specified, no object module is
produced.
The format of the object module is described in Section
8 • 2. 1
The assembler produces the output listing on the list-file.
If a
list-file is not specified, then no output listing is produced and any
errors detected in the assembly are reported at the terminal.
The
output listing is described in Section 14.4.
The
switches
can
be
given
following
any
file
in
the
assembly-command-line. The switch MX directs the assembler to include
macro expansions for all input files in the output listing and the
switch BT directs the assembler to add a bit map at the end of the
output listing. The result of adding the MX switch is described in
Section 14.4.6 and the result of the BT switch in Section 14.4.7

14.2.3

Defaults

If the file extension (.ext) is omitted in a file-spec, the
extensions are assumed:
File

Default Extension

input
object
list

.OBJ
.LST

.MIC

following

Page 14-6

USER'S GUIDE -- USING THE ASSEMBLER
14.2.4

Guidelines

Omitting the object-file increases the speed of the
assembly.
Sometimes several assemblies of a microprogram are necessary before
the microprogram is ready to be loaded and tested.
In early
assemblies, therefore, omitting the object module saves time.
More often, however, the microprogrammer
assembly may be useful for testing and
assembly can produce a number of errors
module
that
can
be executed and,
microprogrammer can obtain information
microprogram.

feels that the results of the
includes the object-file. An
and still yield an object
from whose execution, the
about the validity of the

In the absence of a strong conviction about the usefulness of either
of the output files, the microprogrammer should include both in the
assembly-command-line. The time saved by omitting the object-file is
minor compared to the time required to rerun the assembly simply to
obtain an object module and when an object-file is produced, a
list-file should be produced.
If an object-file does not have an
associated list-file, then troublesome questions about its contents
are apt to arise.

14.3

ASSEMBLER INPUT

The input to the assembler is a microprogram.
The microprogram
consists of a sequence of lines, written in MICRO-11/60 source and
conforming to the syntactic rules of that language. The input can be
prepared using any available editor.
This section discusses preparing the input, suggests
rules, and gives an example of assembler input.

14.3.1

some

formatting

Preparing The Input

The first step in preparing the input is writing the microprogram. To
write a microprogram, the programmer must be familiar with the
internal details of the 11/60 processor, as described in the "11/60
Microprogramming Specification" and with the 11/60 predefinitions,
given in Appendix B of this manual.
Representing an algorithm as a microprogram often involves rethinking
the logic of the algorithm.
The example given in Appendix D
illustrates this process, showing first three macro programs for
manipulating a linked list and then giving the restructured algorithms
for the corresponding microprograms.

Page 14-1

USER'S GUIDE -- USING THE ASSEMBLER

Once the logic of an algorithm is determined, the microprogram is
written using the 11/60 predefinition language, which defines the
fields of the 11/60 microword and provides a macro language that is
oriented toward the logical operations performed in a microprogram.
Then, the microprogram source is entered using any available editor.
From the assembler's point of view, the microprogram consists of a
sequence of lines beginning at the start of the first input file and
continuing until an .END is encountered. Within those limits, the
microprogram must have the expected structure. The first part must
give the definitional information and the second part must give the
actions to be performed when the microprogram is executed.
The assembler detects and reports errors, as described in Section
14.4.5.
In response to these errors, the microprogrammer edits the
input to obtain a valid microprogram. This process continues until
either no errors are present or until the microprogrammer is convinced
that the messages produced do not affect the validity of the
microprogram.

14.3.2

Formatting The Microprogram

Using a standard formatting scheme increases the readability of the
microprogram.
A standard format for 11/60 microprograms has been
developed at DIGITAL and is given here for the information of Writable
Control Store users.
If a microprogram has any definitions, it begins with the .TITLE and
.IDENT lines and continues with field definitions, followed by
macro-definitions, as follows:
.TITLE
title
.IDENT
/version/
.FIELD
field-name ::= field-spec
field-value-name ::= value
.MACRO
macro-name ::=
instruction-part, ...
The action-part of a microprogram
microinstructions, as follows:
microinstruction
.END

consists

sequence

Page 14-8

USER'S GUIDE -- USING THE ASSEMBLER
The standard format for a microinstruction is as follows:
comment
comment
address:
label:
time-state,

instruction-part,
instruction-part,

comment
comment

NEXT,

instruction-part,
J/next-address

comment

The rules for formatting a microinstruction are summarized as follows:
1.

Precede the microinstruction by any general comments.

If the microinstruction has an explicit address, give that
address at the left-margin and do not include any other
information on that line.

If the microinstruction has a label, give that label at the
left margin and do not include any other information on that
line.

Begin the microinstruction with the first
time-state.
Time-states are given at the first tab position. (column
9) •

Include as many instruction-parts, separated by commas, as
will fit in the columns starting at the second tab (column
17) and continuing to column 38.

Place any line-specific comments at the fifth tab (column
41).
In order to maintain the microprogram in a bindable
form (8 1/2 x 11), do not continue the comment past column

70.

If more instruction-parts are specified for a time-state
than can fit on a single line, continue at the second tab
(column 17) of the next line through column 38.

Give the NEXT time-state as the last time-state of the
microinstruction and conclude the instruction-part of the
NEXT time-state with a branch to the next-address.

Separate each microinstruction from the
microprogram by one or more blank lines.

All the microprograms in this
format.

manual

are

written

remainder

standard

the

USER'S GUIDE -- USING THE ASSEMBLER
14.3.3

Page 14-9

A Sample Input Listing

The input listing for the microprogram given in Chapter 4 of the first
part of this manual is reproduced here.
The register exchange
microprogram is chosen because its size, although untypically small
for a microprogram, is convenient for inclusion in a manual. A more
typical microprogram is given in Appendix D.
REGEX
. TITLE
.IDENT
IR1V11
! REGISTER EXCHANGE PROGRAM
.CASE 0 OF DISPCH
EXCHANGE:
P2-T, SR A,R3-A,
NEXT, J /E'XCH2;

SAVE R3

EXCH2:
P2-T,
P 3,
NEXT,

D_A,R2-A,
WR(AB,L,B) ,R3-B,
J/EXCH3;

MOVE R2 TO R3

P2-T,
P3,
NEXT,

D_SR,
WR(AB,L,B),R2-B,
BUT(SUBRB) ,PAGE(O),
J/BRA05;

MOVE SAVED R3 TO R2

EXCH3 :

.END
The output listing for this sample is given in Section 14.4.9.

USER'S GUIDE -- USING THE ASSEMBLER
14.4

Page 14-10

THE OUTPUT LISTING

The output listing of a microprogram corresponds to the input listing,
except that the assembler prints some additional information, namely:
o

A table of contents, formed by listing each .TOC line with
its assigned line number at the beginning of the output
listing.

A line number at the beginning of each line.

Page headings at the top of each page.

Microword lines, giving the address
microinstruction in the microprogram.

Error messages, if any errors are detected.

Macro expansions, if requested by the MX switch.

A bit map, if requested by the BT switch.

An error summary.

A brief description of each
following sections.

14.4.1

the

above

items

and

bits

given

for

each

the

The Table Of Contents

The table of contents is constructed by collecting the .TOC lines to
the beginning of the listing. Judicial placement of .TOC lines within
the listing results in a useful table of contents, by which the
microprogrammer can quickly reference any logical section of the
microprogram.
As the size of a microprogram increases, the value of the table of
contents increases.
However, the assembler always prints a table of
contents page, even when the microprogram does not contain any .TOC
lines and the table of contents is, accordingly, empty. Therefore,
including some .TOC lines in even the shortest microprogram is
advisable .
. TOC lines and the construction of the table of contents are described
in detail in Chapter 4, "Program Structure". A good example of the
use of .TOC lines to produce a comprehensive table of contents can be
found in Appendix B, in which the 11/60 predefinitions are given.

Page 14-11

USER'S GUIDE -- USING THE ASSEMBLER
14.4.2

Line Numbers

Each input line is numbered, by the assembler. The line number is a
four digit decimal number, which starts at 0001 and continues, in
increments of 0001, through 9999. If a microprogram contains more
than 9999 lines, then the string '****' is used instead of a line
number for every line after 9999.
Since blank lines and comments are assigned line numbers, it is not
unusual for a small microprogram to occupy several thousand lines.
However, the line limit of 9999 is seldom exceeded.
If it is
exceeded,
the resulting assembly is still valid and the only
inconvenience is that the table of contents does not locate the
position of .TOC lines that occur after the 9999th line.

14.4.3

Page Headings

The assembler divides the output listing into pages.
Each page
contains a heading line and 54 lines of the microprogram. The page
heading gives the following items of information:
o

The program title, as derived from the first six
of the last .TITLE line.

characters

The name and version number of the
used in assembling the microprogram.

assembler

The date and time of the assembly.

The page number.

MICRO-11/60

If a .TITLE line is not given in the microprogram, then the title part
of the heading is left blank.
An example of a heading line is:
LNKLST

MICRO

VOOA-1

11:20:02

PAGE 2

10-SEP-77

The heading line, as part of an output listing, is
14.4.9.

given

Section

Page 14-12

USER'S GUIDE -- USING THE ASSEMBLER
14.4.4

The Microword Line

The microword line contains the address and bits of the microword,
the following format:
nnnn

b bbbbbbbb bbbbbbbb bbbbbbbb bbbbbbbb bbbbbbbb bbbbbbbb
I

The address, nnnn, identifies the location to which the microword is
assigned.
The bits, b, identify the value of the bits in the
microword. The bits are displayed as shown above, in groups of eight.
The first single bit is not part of the microword and should be
ignored.
It is present because of a technique used
in
the
predefinition language.
The microword line is illustrated in Section 14.4.9.

14.4.5

Error Messages

If an error is detected in a microprogram line, then an error message
is printed by the assembler following that line. Error messages are
easy to find within the listing because, instead of a line number,
error messages begin with the string '****', followed by the error
number. The error message also contains a short description of the
error and, if possible, a piece of the input line to show the point at
which the error was detected.
If the assembler detects an error in a line, then the information on
that line is not fully interpreted in the assembly process. The fact
that the information is not interpreted sometimes causes additional
errors later.
Usually, when the first error is corrected, the other
errors disappear. For example, suppose the microprogrammer makes the
syntactic error of using a hyphen rather than a colon in a field
definition as follows:
.FIELD ALPHA ::= <44-40>
The assembler detects that error:
2345 .FIELD ALPHA ::= <44-40>
****39
SYNTAX ERROR
Because the assembler rejects the definition of ALPHA, any uses of the
field ALPHA within subsequent microinstructions also produce error
messages as follows:

4567
****24

ALPHA/1
MICROINSTRUCTION ILLEGAL

ALPHA

Appendix E lists all of the assembler error messages.

USER'S GUIDE -- USING THE ASSEMBLER
14.4.6

Page 14-13

Macro Expansions

If
the
microprogrammer
specifies
the
MX
switch
in
the
assembly-command-line, then the macros used in each microinstruction
are expanded and printed in the output listing.
The expansion of each macro is shown
expansion line begins with the string '+

on a separate line.
The
'instead of a line number.

As an example of a listing that includes macro expansions, consider
the following output listing excerpt produced from the assembly of the
matrix addition example given in Section 7.2.
2129
2130
2131
+

+
+

2132
+
+
+

2133
+
+

2134
+

6200:
MATADD:
P1,
CLK-BA,PC-A,
!INITIATE MEM(PC) READ:
N/O
CLKBA/YES
AEN/ASPLO,ASEL/R07,RIF/R07
P2-T, A-PLUS-B,CSPB(TWO) ,
!INCREMENT pc.
WHEN/AT-P2-T
ALU/A-PLUS-B
BEN/BASCON,BSEL/TWO
P3,
WR(AB,L,A),DATI,
N/O
MODICLKSP,WRSP/AB,HILO/L,WRSEL/A
BEGIN/YES,SELECT/BUS,BUSCODE/DATI
NEXT, J/MAT1;
N/O
6200

0 10011111 10011110 00000101 01100001 10110000 00000000

The first macro in the first microinstruction line, 'P1', expands to
the string 'N/O'.
The second macro 'CLK-BA' expands to the string
'CLKBA/YES'.
The third macro 'PC-A'
expands
to
the
string
'AEN/ASPLO,ASEL/R07,RIF/R07'.
The
first
macro
in the second
microinstruction line, 'P2-T', expands to the string 'WHEN/AT-P2-T',
and so on.

USER'S GUIDE -- USING THE ASSEMBLER
14.4.7

Page 14-14

The Bit Map

If
the
microprogrammer
specifies
the
BT
switch
on
the
assembly-command-line,
a bit map is produced at the end of the output
listing.
The bit map indicates the addresses that are used by the
assembly.
The bit map consists of a matrix of binary digits.
The digit 1
indicates that an address is used and the digit 0 indicates that an
address is not used.
As an example of a bit map, consider the following:
1 0 0 0 0 1 0 1 0 0 0 000 0 0 0 0 0 0 0 0 000 0 0 0 0 0

6576

6636

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

6676

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

6736

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

6776

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

7036

0 0

The bit map displays all the addresses within the
The above bit map was produced by a microprogram
microinstructions and the bounds 6576:7037.
As can
map, the assembler used locations 6576, 6577, 6600,
that program.

14.4.8

specified bounds.
that contains five
be seen from the
6605, and 6607 for

The Summary

At the end of the input listing, MICRO-11/60 summarizes all the errors
detected as a result of the assembly and gives the total number of
lines processed.
The number of lines includes the lines from the
predefinitions and dispatch-files, if those files are included as part
of the assembly.

USER'S GUIDE -- USING THE ASSEMBLER
14.4.9

Page 14-15

A Sample Output Listing

The output listing for the
14.3.3 is shown below.
MICRO

sample

input

program

given

Section

VOOA-1

10:11:08

06-JUL-11

PAGE 1

VOOA-1

10:11:08

06-JUL-11

PAGE 2

TABLE OF CONTENTS

REGEX
1
2
3
4
5
6
1

MICRO

. TITLE REGEX
.IDENT IR1V11
! REGISTER EXCHANGE PROGRAM
.CASE 0 OF DISPCH
EXCHANGE:
P2-T, SR A,R3-A,
NEXT, J/EXCH2;
6030

8
9
10

SAVE R3

0 11110000 10011010 00001000 00000000 00110000 10000000

EXCH2:
P2-T,
P 3,

NEXT,
6200

13
14
15
16
11
18

D A,R2-A,
WR(AB,L,B),R3-B,
J/EXCH3;

MOVE R2 TO R3

0 11110011 10001010 00010000 00000011 10110000 10000001

EXCH3:
P2-T,
P 3,
NEXT,
6201

D SR,
WR(AB,L,B),R2-B,
BUT(SUBRB) ,PAGE(O),
J/BRA05;

MOVE SAVED R3 TO R2

0 11110010 00001010 00010000 00000011 10111000 0011

19 . END
MIC
ERRORS DETECTED:
0
MIC -- NUMBER OF LINES PROCESSED:

2382

CHAPTER 15
USING THE MICROPROGRAM LOADER

Before a program that uses a microprogram can be executed, the 11/60
Writable Control Store must be loaded and enabled. Loading and
enabling requires the use of the Microprogram Loader, MLD, and two
small stand-alone programs, MSTART and MSTOP. The program MSTART
enables the Writable Control Store and MSTOP disables it.
All three of these programs are intended to be privileged programs
under RSX-11M to be accessed only by users with that status. The
execution of a microprogram in the WCS essentially modifies the
machine dynamically, and, tnerefore, the use of the WCS should be
restricted to the programmer who is aware of his responsibility to the
other programmers on the system. Until the error-free operation of a
microprogram is assured, any testing of that microprogram should be
done in a single-user (stand-alone) mode.
To run a program that contains both macro and micro code, several
steps are necessary. First, the macro code must be linked and loaded
into main memory. Then, the micro code must be loaded into micro
memory (the WCS).
Finally, the WCS must be enabled. An indirect
command file, @MLD, is provided to assist the programmer in loading
and enabling the WCS.
The steps necessary to link and load macro memory are not discussed
here. Information on loading macro memory can be found in the RSX-11M
Task Builder Reference Manual (DEC-11-0MTBA-A-D).
The following sections describe the two methods for invoking the
loader and the enabling programs. Then, the inputs and outputs of the
loader are discussed. Finally, an example of the use of the loader is
given.

USER'S GUIDE -- USING THE MICROPROGRAM LOADER
15.1

Page 15-2

THE INDIRECT FILE METHOD

In the indirect file method of loading the Writable Control Store, the
user invokes the loader by typing the loader indirect command file,
@MLD, at command level. The system then asks if the WCS is to be
enabled and requests the name of the file that contains microprograms
to be loaded. An example of an interaction is:
>@MLD
>; MLD.CMD\LOAD WCS

>* ENABLE WCS?[Y/N]:Y
>* ENTER MICROPROGRAM OBJECT FILE SPECIFICATIQN[S]:LNKLST
>MLD WCS=MICPAK,LNKLST
>RUN MSTART
!MSTOP SHOULD BE RUN WHEN FINISHED
>@<EOF>
In response to the system's request for information, the user types
'Y' and the file LNKLST, which contains an object module for that
program.

15.1.1

Syntax

in
{
direct- >@MLD
load
* ENABLE WCS?[Y/N]:

! Jr

* ENTER MICROPROGRAM OBJECT FILE SPECIFICATION[S]: obj-spec
objspec

{ file-spec }

The text typed by the user is underlined in the syntax for load.

USER'S GUIDE -- USING THE MICROPROGRAM LOADER
15.1.2

Page 15-3

Interpretation

A load interaction consists of the invocation of the loader, followed
by
an
indication whether or not to enable the WCS, by the
specification of the file for the microprograms to be loaded.
If the user answers 'Y' to the question 'ENABLE WCS?', the program
MSTART is executed to enable the WCS after the microprograms are
loaded. If the user types 'N' or simply carriage return, then MSTART
is not executed. Any other response is an error.
The resident section supplied by DIGITAL, MICPAK, is
by the specified microprogram object files.

loaded

followed

The loader does not report an error message if, in the course of
loading a set of object modules, a word in the WCS is reloaded. If
the programmer specifies more than one object module, he must be
responsible for the address compatibility of the modules. Object
modules can be assembled into different parts of the WCS by the use of
the .BOUNDS keyword, as described in "Parti tioning the WCS" in
Appendix C.
The fact that the loader allows addresses to be reloaded can be
convenient. It allows the user to patch an existing object module.

15.1.3

Restrictions

The maximum number of characters that can be given in an obj-spec that
is part of an @MLD sequence is 16.

15.1.4

Defaults

If any of the file-specs given in response to the request 'ENTER
MICROPROGRAM OBJECT FILE SPECIFICATION[SJ:' does not contain an
extension, the extension' .OBJ' is assumed.
If no file-spec is given, only the resident section is loaded into the
WCS.

USER'S GUIDE -- USING THE MICROPROGRAM LOADER
15.2

Page 15-4

THE DIRECT METHOD

The indirect command file @MLD is an aid supplied for the programmer.
He can invoke the loader directly by typing MLD, followed by the
loader command line, in response to the operating system prompt, as
follows:
>MLD WCS=MICPAK,LNKLST
The loader command line gives the programs to be loaded, which, in
this case, are MICPAK, the resident section supplied by DIGITAL, and
LNKLST, the user's object module file.
If the user wants to load more than one object module, he can
the object modules when invoking MLD directly as follows:

specify

>MLD WCS=MICPAK,LNKLST,MATPAK
(

so,

first

and

Or, if he wants to supply his own resident section, he can do
follows:
>MLD WCS=MYRES,MYMIC

15~2~ 1

Syntax

directload

15.2.2

)MLD

{

WCS } : = {MICPAK

,}:

{file-spec} ~

Interpretation

The loader loads the specified files starting
continuing through the last file into the WCS.

with

the

Following the use of the loader, the programmer should run the program
MSTART to enable the WCS.

Page 15-5

USER'S GUIDE -- USING THE MICROPROGRAM LOADER
15.2.3

Defaults

The default file extension is .OBJ for files specified in
the loader.

15.3

calIon

ENABLING THE WCS

The execution of MSTART enables the WCS.
program in the WCS.

The user can then execute

When the user is finished with the program that uses the WCS, he
should disable the WCS by running the disabling program MSTOP, as
follows:
>RUN MSTOP
MSTART sets a bit in the WHAMI register that permits the use of the
WCS; and, MSTOP resets that bit. Therefore, the successful execution
of these programs is usually assumed. However, if the user wants to
verify that the programs executed properly, he reads the console
lights. The successful completion of these programs is indicated by
the following pattern in the console lights:
Program

Console Lights

MSTART

000222

MSTOP

000333

Once the WCS is enabled, any XFC instruction executed, whether
intentionally or intentionally, causes the execution of microcode.
Therefore, the WCS should be disabled as soon as the programmer is
finished executing his microprogram.

15.4

LOADER INPUT

The loader input consists of the object module for the resident
section and the object modules that make up the microprogram to be
executed. The object module is described and illustrated in Section
8.2.1.
When more than one object module is to be loaded into the WCS, the
user must ensure that the addresses occupied by the different modules
do not conflict. He can cause the object modules to occupy different
address spaces by the use of the .BOUNDS keyword, as described in the
section on "Partitioning the WCS" in Appendix C.

USER'S GUIDE -- USING THE MICROPROGRAM LOADER
15.5

Page 15-6

LOADER OUTPUT

After executing, the loader prints a message indicating whether or not
its execution was successfully completed.
When the loading process is successful, MLD prints the message:
WCS LOAD COMPLETED
The user can assume, if that message is printed and no warnings are
issued, that the WCS is properly loaded. He can then proceed to
enable the WCS and run his program.
When the loading process is unsuccessful, MLD prints the message:
ABNORMAL PROGRAM TERMINATON
This message is usually preceded by one or more error messages,
indicate the reasons for the failure of the loading process.

15.5.1

which

Error Messages

The microprogrammer who uses the predefinitions and dispatch files as
part of his assembly is likely to encounter only two errors in loading
the resulting object module.
BAD RECORD IN OBJECT FILE
The loader reports this error if the format of the object module is
not correct.
In response to this message, the user should check all
the input files to ensure that they contain valid object modules.
The other error is:
WRITE TO WCS FAILED AT MICROINSTRUCTION ADDRESS:

micro-address

The loader writes an instruction into a WCS location and then reads
back the contents of that location to compare it with the value
written. If the value read does agree with the value written, then
the above error is reported.
In response to this message, the
microprogrammer can try again.
However, if he receives the same
message, he should assume that a hardware problem is likely to exist.
If the microprogrammer changes the bounds for the assembler, as
described in connection with the .BOUNDS keyword at the beginning of
Appendix B, he may encounter the following error message:
MLD

WARNING: INVALID 11/60 MICROINSTRUCTION ADDRESS:

address

Moreover, this message is issued if the loader receives an address in
the range 0000:5777. The loader loads the first 16 bits in the local
store address specified and then reports the message given above.

USER'S GUIDE -- USING THE MICROPROGRAM LOADER
15.6

Page 15-7

EXAMPLE

As an example of the procedure used to load and enable the Writable
Control Store prior to execution, consider the case in which the
program to be run consists of two FORTRAN programs, ANALYZR and PARSE,
a MACRO 11 program, INTRFC, and two microprograms LNKLST and MATPAK.
The user begins by building the task for the main memory programs.
a system with OTS in SYSLIB, the task build is:

>TKB AWCSYS=ANALYZR,PARSE,INTRFC
Then, he creates a microprogram file that contains the object
for LNKLST and MATPAK loads the WCS, as follows:

modules

>@MLD
>; MLD.CMD\LOAD WCS

>* ENABLE WCS?[Y/N]:Y
>* ENTER MICROPROGRAM OBJECT FILE SPECIFICATION[S]:LNKLST,MATPAK
>MLD WCS=MICPAK,LNKLST,MATPAK
>RUN MSTART
!MSTOP SHOULD BE RUN WHEN FINISHED
>@<EOF>
Then, he runs his program, as follows:
>RUN AWCSYS
After the execution of the task is complete, the user disables the WCS
by running MSTOP.

CHAPTER 16
USING THE DEBUGGER

The MicroDebugging Tool MDT operates as a stand-alone tool for
debugging- programs that use the Writable Control Store of the 11/60.
To use MDT, he invokes the MDT indirect command file.
This command
file shuts down the operating system and interacts with the programmer
to run the program under test in a single-user mode.

USER'S GUIDE -- USING THE DEBUGGER
16.1

Page 16-2

RUNNING MDT

To initiate MDT from RSX-11M, the user enters the debugger indirect
command file, @MDT, at command level. The system then requests the
name of the microprogram to be loaded into the WCS, runs the RSX-11M
shutdown program, and brings up MDT. An example of an interaction is:
>@MDT
>; MDT.CMD \LOAD WCS AND START MDT (FROM PRIVILEGED UIC)

>; SHU T S

R S X

DOW N

>* ENTER MICROPROGRAM OBJECT FILE SPECIFICATION [S]: MATADD
>MLD WCS=MDTMIC,MATADD
>RUN MSTART
!ENABLES WCS (SHOULD RUN MSTOP AS SOON AS RSX BACK UP)
>;
(SUGGEST PUTTING MSTOP IN STARTUP.CMD FILE)
>RUN SHUTUP
RSX11M SHUT DOWN PROGRAM

ENTER MINUTES TO WAIT BEFORE SHUTDOWN:

ENTER MINUTES BETWEEN MESSAGES:

ALL FURTHER LOGINS ARE DISABLED
a1-SEP-17 11:53 PLEASE FINISH UP, a MINUTES BEFORE SHUTDOWN
; TYPE "RES AT." WHEN SHUTDOWN COMPLETED

AT. -- PAUSING.

TO CONTINUE TYPE "RES ... AT."
DMO DBa:

>RES AT.
Ar:--=-CONTINUING

>
>

>* HAVE YOU PROTECTED EVERYTHING YOU WANT PROTECTED? [Y/N]:Y
>BOOT MDT
T HIS
T A KE S
R S X DOW N
MICRO DEBUGGING TOOL. VERSION #1.0
MDT>
In response to the system's request for information, the user types
the name of the microprogram 'MATADD', the shutdown parameters '0' and
'0', 'RES AT', and the answer 'Y' to the question about write
protection.

USER'S GUIDE -- USING THE DEBUGGER

Page 16-3

The general form of the interaction is given in the following syntax.
In this syntax, the commentary printed by the system is omitted.

16.1.1

mdtcall

Syntax

>@MDT

>~NTER

MICROPROGRAM OBJECT FILE SPECIFICATION[S]:obj-spec
ENTER MINUTES TO WAIT BEFORE SHUTDOWN:
minutes
ENTER MINUTES BETWEEN MESSAGES:
minutes
AT: -- PAUSING. TO CONTINUE TYPE 'RES ... AT.'
>RES AT.

>~AVE YOU PROTECTED EVERYTHING YOU WANT PROTECTED? ~ !~1
MDT>
!! J0

The text typed by the user is underlined in the above syntax.

16.1.2

Interpretation

The resident section for MDT and the obj-spec given by the user in
response
to
the
request
'ENTER
MICROPROGRAM
OBJECT
FILE
SPECIFICATION[S]:' are loaded into the WCS by MLD. The obj-spec can
consist of one or more files, each of which contains one or more
object modules. The object modules are loaded by MLD, starting with
the first, and continuing until the end of the last object module is
reached.
The minutes until shutdown and the minutes between messages given by
the user are used in the shutdown procedure.
If the system is
operating in stand-alone mode, then a response of 0 minutes in both
cases is indicated.
If the system is operating in multi-user mode,
then an appropriate delay before shutdown should be given.
When the shutdown is complete, the system types the
message:
'AT. -- PAUSING. TO
CONTINUE
TYPE
'RES ... AT.'.
The response
'RES AT.' directs the system to continue.
The user must not type
'RES AT.' until the shutdown is complete. In the example given above,
the shutdown is complete when the system types 'DMO DBO:'

Page 16-4

USER'S GUIDE -- USING THE DEBUGGER

Before bringing up MDT, the system asks if all the devices are
properly protected. At this point, if the user needs to write protect
some devices, he can type 'N' or not respond. If he types 'N', the
system repeats the question. When the devices are protected, he types
'Y' and MDT is brought up. MDT identifies itself and prompts for the
first command in the debug session.

16.1.3

Restrictions

The maximum number of characters that can be given in an obj-spec that
is part of an @MLD sequence is 16.

16.2

THE DEBUG SESSION

Following the prompt from MDT, the debug session begins. The user can
enter any number of MDT commands to set breakpoints, to examine and
change locations in main or micro memory, and to execute the program
under test.
The commands that can be given in response to the MDT
prompt are described in Chapters 9 through 13 of this manual:

16.2.1

Interrupting Program Execution

The programmer can interrupt the execution of either
program under test by typing two control-C characters.

MDT

the

If the double control-C is typed during the input of a command line,
all the input entered is erased. The programmer can use the double
control-C to delete an incorrect command line. For example, suppose
the programmer forgets the '#' character in the transfer address of a
go-command. If he notices the error before hitting the carriage
return that terminates the command, he can type two control-C (AC)
characters and start the command again, as follows:
MDT)G6612 ACAC
G#6612
If the double control-C is typed during the execution of the program
under test, then the execution of the program is aborted and control
is returned to MDT. MDT prompts for another command.
The state of
the machine is not saved when the program execution is interrupted
and, therefore, the contents of the registers are not meaningful.
Program execution can be resumed after interruption by the use of a
go-command to a main memory address.
An exception to this procedure for interrupting execution occurs when
the microprogram is in an infinite loop and not checking for service.
In this case, only an INIT signal from the console can interrupt
execution. The INIT signal is produced by simultaneously pressing the
HALT and START buttons.

USER'S GUIDE -- USING THE DEBUGGER
16.2.2

Page 16-5

Restarting The Debugger

In some cases, it may be necessary to restart the debugger. An entry
point $DEBUG is provided for this purpose. If the programmer loads
the address associated with this entry point into the switch register
and starts the processor, then MDT is restarted with the state of the
system as it was before the operation that caused the problem.

16.2.3

Terminating A Session

When the programmer is finished with the debugger, he brings up the
operating system as if a system crash occurred as described in the
RSX-11M Operator Procedures Manual.
However, since the use of MDT enables the WCS as part of its
initialization procedure, the operating system restart should call the
program MSTOP to disable the WCS. The inclusion of the calIon MSTOP
as part of the STARTUP command file is recommended. An example of a
system restart with MSTOP as part of the STARTUP file is as follows:
MDT>
RSX-11M V03 BL18
124K
MAPPED
>RED DBO:=SYO:
>MOU DBO:RSX11MBL18
>@[1,2JSTARTUP
>RUN [1,54JMSTOP
>INS [1,54J PIP
>INS [1,54J CRF
>INS [1,54J EDI
>INS [1,54J TEC
>INS [1,54J TEC/TASK= ... MAK
>INS [1,54J PRT/PAR=SPLPAR/CKP=NO
>INS [1,54J BIGTKB/PAR=GEN
>INS [1,54J BIGMAC/PAR=GEN
>INS [1,54J BRO
>INS [1,54J RMDEMO
>INS [1,54 J SHUTUP
>INS [1,54J F4P/INC=5120.
>INS [1,54J HEL
>INS [1, 54 J BYE
>LOA DK:
>LOA LP:
>* PLEASE ENTER TIME AND DATE (HH:MM MM/DD/YY) [SJ: 11:569/1/77
>TIM 11:56 9/1/77
>* PLEASE ENTER OPERATOR UIC AS #,# [SJ: 2,100
>SET /UIC=[2,100J
>BRO @[2,1JONTHEAIR,TXT
01-SEP-77 11:56

Page 16-6

USER'S GUIDE -- USING THE DEBUGGER
16.3

DEBUGGER ERRORS

MDT examines the command strings it receives from the programmer for
validity.
If MDT detects an error in a command, it prints a message,
rejects the command, and prompts for another command. The programmer
can then reenter the command with the appropriate syntax.
The error messages printed by MDT
messages are self-explanatory.
interaction:

are given in Appendix E.
Most
For example, consider the following

MDT)O#46002
#46002(15:0) 32 0#47020
OPEN ROUTINE: UNKNOWN TERMINATOR
MDT)O#47020
In the above interaction, the programmer forgets to type the carriage
return to terminate the open-bits-command.
MDT responds with the
error message shown above. The programmer can then enter the command
again.
The least specific
interaction:
MDT)D6016
MDT)D6017
MDT)6060
COMMAND PARSER:
MDT)D6060

MDT

error

message

occurs

the

following

SYNTAX ERROR

The programmer is entering a sequence of display-items. In the third
line, he forgets the D command mnemonic. MDT cannot guess his intent
and responds with the message shown above.
The programmer, in
response to this message, examines the preceeding line, finds his
error, and reenters the command.

16.3.1

A Special Error

One error detected by MDT requires special attention. If, in typing a
command to MDT, the programmer fills up the 64 character input buffer,
MDT rings the bell each time a character is typed and rejects the
additional characters.
The only way to escape from this error
condition is to type either a control-C or control-U character. These
control characters delete all the information in the input buffer and
reset it to an empty condition.

Page 16-7

USER'S GUIDE -- USING THE DEBUGGER
16.4

AN EXAMPLE

As an example of the use of MDT, in which a main memory program is
used
to call the microprogram, consider the debugging of the
microprogram for matrix addition given in Section 7.2. As the first
step in the debugging process, the programmer writes a simple macro
program to call the microprogram, as follows:
MATA:
MATB:
START:

.TITLE
. BLKW
.BLKW
.WORD
.WORD
.WORD
.BYTE
.BYTE
.HALT
.END

MATEST
100
100
076700
MATA
MATB
4
4
START

The programmer assembles the macro program and links
object module with the MDT object modules, as follows:

the

resulting

>TKB MATEST=@MDTBLD,MATEST
The load map produced as a result of linking the object modules can be
used to locate the object module MATEST in memory. Suppose it begins
at 46000.
Next, the programmer invokes MDT by typing the indirect file @MDT.
>@MDT
>; MDT.CMD \LOAD WCS AND START MDT (FROM PRIVILEGED UIC)

>; SHU T S

R S X

DOW N

>* ENTER MICROPROGRAM OBJECT FILE SPECIFICATION[S]: MATADD
>SET IMAIN=WCS:7600:200:DEV
>INS [1,1 ]WCS
>INS MLD/TASK= ... MLD
>MLD WCS=MDTMIC,MATADD
>RUN MSTART
!ENABLES WCS (SHOULD RUN MSTOP AS SOON AS RSX BACK UP)
>;
(SUGGEST PUTTING MSTOP IN STARTUP.CMD FILE)
>RUN SHUTUP
RSX11M SHUT DOWN PROGRAM

ENTER MINUTES TO WAIT BEFORE SHUTDOWN:

ENTER MINUTES BETWEEN MESSAGES:

ALL FURTHER LOGINS ARE DISABLED

USER'S GUIDE -- USING THE DEBUGGER

Page 16-8

01-SEP-77 11:56 PLEASE FINISH UP, 0 MINUTES BEFORE SHUTDOWN
: TYPE "RES AT." WHEN SHUTDOWN COMPLETED
)

AT. -- PAUSING. TO CONTINUE TYPE "RES ... AT."
DMO DBO:
)

)RES AT.
Ar:--=-CONTINUING
)

)

)* HAVE YOU PROTECTED EVERYTHING YOU WANT PROTECTED? [Y/N]:Y
)BOOT MDT
T HIS
T A KE S
R S X DOW N
MICRO DEBUGGING TOOL. VERSION #1.0

MDT)
Observe that this dialogue is different from the dialogue given at the
beginning of this chapter in that it installs MLD and sets up the WCS
1/0 page common.
Next, the programmer uses MDT to set some data values into the
reserved in the main memory test program, as follows:
MDT)0#46000
#46000<15:0)
#46002<15:0)
#46004<15:0)
#46006<15:0)
MDT )0#4 6100
#46200<15:0)
1146202<15:0)
#46204<15:0)
1146206<15:0)

blocks

(1 f)
(1 f)

0
0
0
0

1
2
3
4

0
0
0
0

5 (I f)
6 (I f)
7 (1 f)
10

( If)

Then, he sets breakpoints at the beginning and end of the microprogram
and starts the execution of the program, as follows:
MDT)B6200
MDT)B6224
MDT)G 1147200

USER'S GUIDE

Page 16-9

USING THE DEBUGGER

When the program execution halts at the breakpoint at the end of the
program, the programmer can use the open-bits command to check the
results of the matrix addition, as follows:

MDT >01146 000
1146000<15:0>
1146002<15:0>
1146004<15:0>
1146006<15:0>

(If)
(If)
(If)

6
10
12

The programmer can then change the dimensions of
again, as follows:

MDT >OB1I46 406
1146406<7:0> 4
1146407<7:0> 4

6
6

(If)

the

array

and

try

APPENDIXES

Contents
APPENDIX A
A. 1
A. 1 . 1
A. 1 .2
A. 1 . 3
A. 1 .4
A. 1 .5
A. 1 .6
A.2
A. 2.1
A.2.2
A.2.3
A.2.4
A.2.5
A.2.6
A.3
A. 3.1
A.3.2
A.3.3
APPENDIX B
B. 1
APPENDIX C
C. 1
C.2

SYNTACTIC SUMMARY OF SOURCE AND

MICRO-11/60 SOURCE SYNTAX.
Processing-Unit.
Field-Definition
Macro Definition
Microinstruction . . . . . . . . .
Target Assignment Construct .
.
MICRO-11/60 Elements
MDT COMMAND SYNTAX . . . . . . . . .
MDT-Session . . . . .
Open-Command
Breakpoint-Command . . . .
Display-Command . . .
Control Command . .
MDT Elements
COMMAND LANGUAGE SYNTAX
.....
MICRO-11/60 Command Syntax
MLD Command Syntax
MDT Command Syntax

LANGUAGES

· . A-2
A-2
A-3
· . A-4
A-5
.
. . . · . A-6

A-7

. . . · . A-8

A-8
. A-9

·
·
·
·
·
·
·

.
.
.
.
.
.
.

A-10
A-11
A-12
A-13
A-14
A-14
A-15
A-16

THE 11/60 PREDEFINITIONS
PREDEFINITIONS SOURCE LISTING

. . . B-2

THE DISPATCH FILE AND MEMORY PARTITIONING
THE DISPATCH FILE . .
....
. . C-1
PARTITIONING THE WRITABLE CONTROL STORE . . . . C-1

APPENDIX D

LINKED LIST EXAMPLE

APPENDIX E

ERROR MESSAGES

E. 1
E.2
E.3

~OMMAND

MICRO-11/60 ERROR MESSAGES
MDT ERROR MESSAGES . . . .
COMMAND LANGUAGE ERROR MESSAGES .

E-2
· . E-6
· . E-7

APPENDIX A
SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES

This appendix contains a syntactic summary for the source and command
languages used by each of the microprogramming tools. The MICRO-11/60
source is summarized first. Next, the MDT commands are listed. Then,
the command language syntax is given for MICRO-11/60, MLD, and MDT.
The syntax is presented here in a concise format for quick reference.
Some of the tutorial metasyntactic names used in the syntax within the
manual are omitted so that the syntax can be given in a minimum amount
of space.
All the syntactic terms used in the syntax sections of the manual and
in this appendix are listed in the index. If the programmer wishes
more information on a syntactic term, he can obtain the page in the
manual that discusses that term by looking in the index.

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.1
A.1.1

Page A-2

MICRO-11/60 SOURCE SYNTAX
Processing-Unit

processing-unit

{

predefinitions-file

}

"- user-machine-defini tions
,,-

.TITLE

title-string

.IDENT

.RADIX

radix

.TOC

toc-string

ident-string

-.. n

field-definition
0

macro-definition
( dispatch-file ~

~'- . CODE

.TITLE

title-string

.IDENT

.RADIX

radix

.TOC

toc-string

ident-string

n
I

microinstruction
branch-definition
case-microinstruction
end-definition

.END
user-machinedefinition

.WIDTH 49R
.BOUNDS [ lower-bound : upper-bound
.ADDRESS J: : =<8: 0 >
.OBJECT <47:32>'<31:16>'<15:0>

]

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.1.2

Page A-3

Field-Definition

field-definition

.FIELD

field-name

~field_value-name

{<
{.

field-spec

left-bit

defaul t }

Examples:

·· .. -- <40:30>
.FIELD BETA ·· .. -- <10:5>'<20:17>,22
.FIELD GAMMA ·· . -- <26>
ON · . - 0
OFF · .. -- 1
.FIELD ALPHA

.FIELD DELTA
D1 · .. -- 0
D2 ·· .. -- 2
D3 · . -- 4
D4 · .. -- 6

· .. -- <33:22>

{.:: }
.. -

{ ·-l

field-spec

.:.. -~ J

value} :

right-bit } : > }

;

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.1.3

Page A-4

Macro Definition

macrodefinition

• MACRO

macro-name {

{: : : } {

{

formal}

macrO-bOdy-part}

field-name

macro-name

value
@

formal

{ {

actual

1J 1

Examples:
.MACRO ALPHA ::=

~ ) }:

field-value-name

macro-bodypart

(

A/B,C/D

.MACRO BETA(B1,B2)
.MACRO GAMMA(X,Y,Z)

A/@B1,C/@B2,D/@B1

.. --

BETA(@X,CT1),ALPHA,C42/20

)}: J

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.1.4

Page A-5

Microinstruction

microinstruction

I {address} :

{label} :
value
field-name
macro-name

Examples:
6200:
ALPHA:
BETA:

AlB;
A/B,C/D,E/F,
G/H;

GAMMA:

MC1(X,Y),
AlB,
C,
DIE;
MC2,
X/2;

6412:

A/B1,
J/GAMMA;

{

field-value-name
>- ,

{ actual } ~ )}: 1
J

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.1.5

Page A-6

Target Assignment Construct

targetassignment

branchdefinition

branch-definition
{

case-microinstruction }

{

end-defini tion }

branch-label:

1Lr 0~

.CASE

case-number

casemicroinstruction

microinstruction

end-definition

.ENDB

Example:
ALPHA:
.BEGIN=O
BETA:
.BEGIN=10*10[6240:6277J
.CASE 0 OF ALPHA
AO: AlB,
JIB 1 ;

.CASE 1 OF ALPHA
A1:

CID,
J/B1;

.ENDB ALPHA
.CASE 0 OF BETA
01:

AIB,CID,
JIG 1 ;

.CASE 2 OF BETA
02:

X/4
J IG2

· BEGIN

branch-label

{

branch-label

addreSS-range~ 0

Page A-7

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.1.6

MICRO-11/60 Elements

I ti tle-string }
ident-string
toc-string

{radiX-50-Char

radix-50-char

{ alphabetic

alphabetic

[A
l

digit

{o I

I
!

address-range

I B

[

}:4
.}

I digit I $ ,
I ... I z }
I ... , 9 }

low-address

high-address

]

label
field-name
field-value-name
macro-name
formal
actual
entry-label

I
alphabetic

{

name-Char}:1

...)

op-code

octal-digit

lower-bound
upper-bound
low-address
high-address
address
defaul t-value
value
left-bit

}

octal-integer

decimal-integer

right-bit
name-char

{

rad ix-50-char

[

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.2
A.2.1

Page A-8

MDT COMMAND SYNTAX
MDT-Session

open-command

mdt-session

MDT)

breakpo int- command

displ ay-command
control-command

Example:
MDT)01l46000
1146000<15:0)
1146002<15:0)

0
0

ii46004<-j 5: 0)

MDT)01l46100
1146100<15:0)
1146102<15:0)
1146104<15:0)
MDT)B6200

0
0
0

2
4
6

( If)
( If)

MDT)G1I46200
BREAKPOINT NUMBER 0 AT ADDRESS 6200
MDT)O$O
$0<15:0) 12
MDT)P
BREAKPOINT NUMBER 0 AT ADDRESS 6200
MDT)B1I46210
MDT)P
BREAKPOINT NUMBER 1 AT ADDRESS 46210
MDT)01l46000
1146000<15:0)
1146002<15:0)
1146004<15:0)

3
7
13

(I f)

(If)

Open main memory
46000
Set values

address

Open memory address 46100
Set values
Set
micro
memory
breakpoint at 6200
Start execution at main
memory address 46200
Examine register 0
Proceed from breakpoint
Set
main
memory
breakpoint at 46210
Proceed from breakpoint
Examine
main
memory
address 46000-46004

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.2.2

Page A-9

Open-Command

I""-

J
loc

open-command

address-spec

{address-spec

address-spec

value

{

new-value} :

{~f} }

{new-value} :

Restrictions:
The address-spec used with an OB or OC command must be a
byte address.

main

The terminator @ must not be used with an address-spec that
register or that has a bit range,or with the commands OB or OC.

memory
is

Examples:
MDT)06200<40:38)
6200<40:38)
6201<40:38)
MDT )0#46000
#46000<15:0)
#46300<15:0)
#46520<15:0)
#46516<15:0)

0
1

(If)

46300
46520

@
@
,..

Open the main memory byte location
46701
71

MDT)OC#46703

Open the character at main memory
byte location 46703

#46703<7:0)

MDT)O$PSW
$PSW<15:0)

223

$7<15:0)
$6<15:0)

0
7

Open main memory address 46000
Look at the address pointed to
Again
Look at the previous word

2234

MDT)OB#46701
#46701<7:0)

Open bits 40 through 38 of
microaddress 6200
Look at same bits of next address

123

Open the register $PSW
Look at previous register in
microstate table
Again

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.2.3

Page A-10

Breakpoint-Command

breakpointcommand

-}1
(
l
f{

Jl 1 [IIL
B

break-id

macro-address}",

micro-address

{repeat-count } : p

Restrictions:
If the qualifier '_I is given, then
break-address can be given, but not both.

either

If the qualifier '?' is
break-address can be given.

neither

given,

then

break-id

a
nor

Examples:
MDT>Btl46000

Set breakpoint at
46000.

main

memory

MDT>4B6400

Set a breakpoint
address 6400.

with

MDT>?B

List the breakpoints that are set.

MDT>-Btl46000

Delete the breakpoint
address 46000.

MDT>-4B

Delete the breakpoint with id 4.

MDT>2P

Proceed from the current breakpoint and
pass
through 2 breakpoints at that
address before halting.

MDT>-B

Delete all breakpoints.

address
at

main

micro

memory

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.2.4

Page A-11

Display-Command

displaycommand

[ - l 1 { displ ay-id } 1 D { address-spec} :
L? ] 0
0

Restrictions:
If the qualifier '-' is given, then either
address-spec can be given, but not both.
If the qualifier '?' is given,
address-spec can be given.

then

neither

a
a

display-id

nor

If no qualifier is given, then the address-spec must be given.

Examples:
MDT>D$PSW

Add $PSW to the display list.

MDT>D6400<ALU>

Add the ALU field of microinstruction
6400 to the display list.

MDT>?D

Print out the display list.

MDT>-D$PSW

Delete $PSW from the display list.

MDT>-1 D

Delete the display-item with id
the display list.

from

MDT>-D

Clear the display list by
displays.

all

deleting

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.2.5

Page A-12

Control Command

: G

{II

macro-address}-'"

micro-address
control-command

L
R

Examples:
GII46000

Start execution at main memory 46000.

Reload the Writable Control Store.

Reset
the
debugger
by
breakpoints and displays.

del eting

all

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.2.6

Page A-13

MDT Elements

ru macro-address ~bit-range~~ ~, relocation-reg~ ~~

addressspec

bit-range

micro-address

}

{

<field-name>

! $ register-name {

bit-range} :

I
i

l
macro-address

{

micro-address

{6000

value

}

left-bit

{

octal-integer

new-value
break
display-id
repeat-count
left-bit
right-bit

... I 1777 6 }

I 6001 I . . . I 7777 }

bit-range

decimal-integer

right-bit } : >

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.3
A.3.1

Page A-14

COMMAND LANGUAGE SYNTAX
MICRO-11/60 Command Syntax

indirectmethod

>@MIC
>* ENTER MICROPROGRAM SOURCE FILE SPECIFICATION[S]: in-spec
>* LIST? [Y IN] :

-_Y
{

directassembly
assemblycommandline

>MIC

}

assembly-command-line

output-spec

in-spec

output-spec

{Object-file}: {; list-file}:

in-spec

{

Object-file}
list-file
in-file

file-spec

switch

in-file

}:
{I

SWitCh} :

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.3.2

Page A-15

MLD Command Syntax

IN-

i>@MLD

DIRECTLOAD

* ENABLE WCS?[Y/N]:

Iyl

LJ
~

* ENTER MICROPROGRAM OBJECT FILE SPECIFICATION[S]: obj-spec
objspec

di~~~~-

{file-spec}:
>MLD WCS= {MICPAK

,}:

{file-spec}:

Example:
>@MLD
>; MLD.CMD\LOAD WCS

>* ENABLE WCS[Y/N]:Y
>* ENTER MICROPROGRAM OBJECT FILE SPECIFICATION[S]:MPROG.OBJ
>MLD WCS=MICPAK,MPROG
>RUN MSTART
!MSTOP SHOULD BE RUN WHEN FINISHED
>@<EOF>
>MLD WCS=MICPAK,LNKLST,MATPAK

SYNTACTIC SUMMARY OF SOURCE AND COMMAND LANGUAGES
A.3.3

Page A-16

MDT Command Syntax

mdtcall

>@MDT

>~TER

MICROPROGRAM OBJECT FILE SPECIFICATION[S]:file-spec
ENTER MINUTES TO WAIT BEFORE SHUTDOWN:
minutes
ENTER MINUTES BETWEEN MESSAGES:
minutes
AT: -- PAUSING. TO CONTINUE TYPE 'RES ... AT.'
>RES AT.

>~AVE YOU PROTECTED EVERYTHING YOU WANT PROTECTED? { ~}:

MDT>
Example:
>@MDT
>; MDT.CMD \LOAD WCS AND START MDT (FROM PRIVILEGED UIC)

>; SHU T S

RS X

DOW N

>* ENTER MICROPROGRAM OBJECT FILE SPECIFICATION[S]: MATADD
>SET IMAIN=WCS:7600:200:DEV
>INS [1,1 ]WCS
>INS MLD/TASK= ... MLD
>MLD WCS=MICPAK,MDTMIC,SMKMIC
>RUN MSTART !ENABLES WCS (SHOULD RUN MSTOP AS SOON AS RSX BACK
UP)
>;
(SUGGEST PUTTING MSTOP IN STARTUP.CMD FILE)
>RUN SHUTUP
RSX11M SHUT DOWN PROGRAM

ENTER MINUTES TO WAIT BEFORE SHUTDOWN:

ENTER MINUTES BETWEEN MESSAGES:

ALL FURTHER LOGINS ARE DISABLED

01-SEP-77 11:56 PLEASE FINISH UP, 0 MINUTES BEFORE SHUTDOWN
: TYPE "RES AT." WHEN SHUTDOWN COMPLETED

AT. -- PAUSING. TO CONTINUE TYPE "RES ... AT."

DMO DBO:

>RES AT.
Ar:--=-CONTINUING

>
>

>* HAVE YOU PROTECTED EVERYTHING YOU WANT PROTECTED? [Y/N]:l
>BOOT MDT ! T HIS
T AKE S
R S X DOW N
MICRO DEBUGGING TOOL. VERSION #0
MDT>

APPENDIX B
THE 11/60 PREDEFINITIONS

The 11/60 predefinitions define the 11/60 architecture, specify the fields of the
11/60 microword and supply a set of field-value-names and macro-names that are useful
in writing microprograms for the 11/60 WCS.
The predefinitions are given here as an output listing from MICRO-11/60 assembler.
The- microprogrammer can, by reading this listing, familiarize himself with all the
predefined names that can be used in a microprogram. The table-of-contents at the
beginning of this listing is useful for finding a particular field or macro name.
The programmer specifies the predefinitions file as the first input file in an
assembly.
The MICRO-11/60 assembler, therefore, reads this file first and
incorporates all the names defined in this file into its internal tables.
In some advanced applications, the programmer may wish to assemble without the
predefinitions file.
In such a case, the following lines, which define the 11/60
architecture, must be supplied:
. WIDTH
. BOUNDS
. OBJECT
. ADDRESS

49R
[6000: 7777 J
<47:32)'<31:16)'<15:0)
J ::= <8:0)

The .WIDTH keyword specifies the number of bits and the ordering (right-to-Ieft) of
bits within the microword. The .BOUNDS keyword defines the legal address limits for
the program. The .OBJECT keyword defines the order of the bits within the object
module.
The .ADDRESS keyword locates the bits within the microword used for the
address field.

THE 11/60 PREDEFINITIONS
B. 1 PREDEFINITIONS SOURCE LISTING
TABLE OF CONTENTS
61 -67 -77 -91 -202 -207 -220 -227 -231 -256 -267 -304 -314 -351 ,-380 -397 -401 -409 -417 -425 -433 -445 -449 -452 -460 -468 -471 -488 -492 -501 -509 -517 -520 -541 -544 -552 -569 -573 -581 -590 -594 -604 -614 --

* IDENTIFICATION
* REVISION HISTORY
* MICROWORD FIELD DEFINITIONS
* MICROWORD BIT LAYOUT
* MICROWORD FIELD SPECIFICATION
MICROWORD FIELD FORMAT
* NULL
FIELD/MACRO SPECIFICATION
* ALU AND
INTERNAL DATA BUS CONTROL
*
<ALU>-ALU
FUNCTION CONTROL BITS
*
<~EN>-B-BUS DATA SOURCE
*
<BSEL>-B-BUS SOURCE SELECTION CONTROL
*
<AEN>-A-BUS DATA SOURCE
*
<ASEL>-A-BUS SOURCE SELECTION CONTROL
*
<RIF>-ASP,
BSP REGISTER IMMEDIATE FIELD
*
<COUT>-CARRY
OUT BIT MUX SELECTION
* CLOCKS
*
<WHEN>-D/SR WHEN TO CLOCK
*
<CLKD>-ENABLE D-REGISTER CLOCKING
*
<CLKSR>-ENABLE SR-REGISTER CLOCKING
*
<CLKBA>-ENABLE
CLOCKING OF BA-REGISTER
*
<SCC>-ENABLE
SETTING
PS CONDITION CODES
* BUS/UCON & CSP-ADDRESS OF
&
SHIFT-TREE
CONTROL
*
BUS/UCON
CONTROL
*
<BEGIN>-BEGIN BUS/UCON OPERATION
*
<SELECT>-SELECT BUS OR UCON
*
BUS
CONTROL
*
<BUSCODE>-BUS
CODE ACTION FIELD
*
UCON CONTROL
*
<FLPGO>-START HOT FLOATING POINT
*
<UCON-XFER>-UCON OPERATION
*
<UCON-LOAD>-LOAD UCON REGISTER
*
CSP
ADDRESS
SPECIFICATION
*
<CSPADDR>-CSP
IMMEDIATE ADDRESS
*
SHIFT CONTROL
*
<BMUX>-SECOND LEVEL OF SHIFT TREE
*
<AMUX>-FIRST LEVEL OF SHIFT TREE
* SP REWRITE
& REGISTER CLOCKS
*
<WRCSP>-WRITE
TO CSP
*
<MOD>-MODE
CONTROL
OF FOLLOWING BITS
*
SP
REWRITE
[A,B]
CONTROL
*
<HILO>-SP HI/LO SELECT
*
<WRSEL>-REWRITE ADDRESS SELECT
*
<WRSP>-REWRITE A/B SELECT
*

Page B-2

THE 11/60 PREDEFINITIONS
633 -637 -647 -657 -661 -666 -670 -691 -763 -786 -812 -816 -822 -837 -864 -870 -873 -892 -967 -990 -993 -996 -1032 -1059 -1091 -1165 -1191 -1206 -1215 -1228 -1243 -1247 -1310 -1320 -1341 -1356 -1360 -1375 -1383 --

Page B-3

REGISTER LOADING
*
<LOADRES)-LOAD RESIDUAL CONTROL REGISTER
*
<LOADCOUNT)-LOAD COUNTER
* SEQUENCING
FIELD
*
<UBF)-BUT
MICROBRANCH FIELD
*
NO
BUT
*
ACTIVE ONLY
*
INACTIVE ONLY
*
BOl'H
ACTIVE AND INAcrlVE
*
<UPF)-MICRO POINTER FIELD
*
FIELDS
* MISCELLANEOUS
<NEXT-PAGE)-NEW PAGE ADDRESS WADED DURING BUT[SUBROUTlNE]
*
<MULTIPLE)-SELECT CODE FOR BUT [MULTIPLE]
*
EMIT
FIELD - IMMEDIATE DATA FROM MICROWORD
*
RETURN
ADDRESS - FOR MICROSUBROurlNE CALLS
*
UCON
SELECTION
AND CONTROL FIELDS
*
SELEcrION
*
CONTROL (ALSO TMS ROurINES)
*
IDCAL
STORE FIELDS
*
* MACRO DEFINITIONS
* PRIMITIVE OPERATIONS
TIMING
*
WRITING
THE A AND B SCRATCH PADS
*
ASP
AND
BSP PHYSICAL REGISTER ADDRESSES
*
ASP
AND
BSP BASE MACHINE FUNCTIONAL REGISTER ADDRESSES
*
ASP
AND
BSP
INDIRECT REGISTER ADDRESSES
*
ASP,
BSP
INDIRECT
ADDRESSING
*
WRITING
THE
C
SCRATCH
PAD
*
CSP
IMPLIED
ADDRESSING
*
CSP DIRECT ADDRESSING
*
SHIFT TREE SPECIFICATION
*
ENABLED ONTO BUS A
*
FIRST 'n\O LEVELS ONLY [AMUX,
*
ALU
FUNCTIONS
*
cour
GENERATION
*
CIDeKS
*
BASIC REGISTER CIDeKS [D, SR, BA, CC]
*
REDEFINED FROM SP REWRITE FIELD [RES, COUNTER]
*
RES REGISTER CONTROL VALUES [FROM EMIT]
*

Page B-4

THE 11/60 PREDEFINITIONS
1405 -1414 -1434 -1442 -1464
1498 -1503 -1524 -1551 -1562 -1580 -1582 -1588 -1605 -1609 -1661 -1873 -1916 -1936 -1973 -2007 -2055
2087 -2096 -2104 -2130 -2143 -2151
2155 -2191 -2237 -2266 -2290 -2300 -2311 -2325 --

*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*

CC CONTROL [FROM EMIT]
BUS CONTROL MACROS
ueON CONTROL MACROS
PRJeESSOR UCON CONTROL SETUP
CACHE/KT UCON CONTROL
I/O UCON CONTROL
BUS CONTROL
CONSOLE 1-0
REMOTE CONSOLE INTERFACE
MICROBRANCH FIELD MACROS
MISCELlANEOUS
OTHER SOURCES ENABLED FOR A-BUS
PAGING, RETURN REGISTER
ADVANCED OPERATIONS
DATA INK> CSP, AT P3 ONLY
DATA INK> ASP, BSP, AT P2-T * P3
D AND SR <- (BUS-A FCN BUS-B), AT P2-T OR P3-T
D[C] GETS SET
D-REGISTER <- [BBUS = ABUS], BITWISE, AT P2-T OR P3-T
D-REGISTER <- D-REGISTER THRU SHIFT-TREE
D <-WHATEVER I S LEFT, AT P2-T OR P3-T
SR <- DATA, AT P2 T OR P3 T
RES-REG OPERATION MACROS
BASE MACHINE COUNTER
ENABLE ON BUS-A/B ONLY
TA~n~T~

.&....I'tJ1.~..L.~.""'

.L...'L.l.

O~~TC~~O

~'\.L.I'-'..L.....,.a..I...I"''\.

D AND SR TOGETHER
UCON FUNCTIONS
PROCESSOR UCON FUNCTIONS
CACHE/KT UCON FUNCTIONS
1-0 UCON FUNCTIONS
CONSOLE UCON FUNCTIONS
DBUF UCON FUNCTIONS
MULTIPLE UCON FUNCTIONS
WCS FUNCTIONS
JAM UPP LOG MACROS

THE 11/60 PREDEFINITIONS

Page B-5

2
3

4
5

IDE N T I F I CAT ION

7
8
9

PRODUCT CODE:

12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33

34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55

PRODUCT NAME:

PDP 11/60 DEFINITION FILE

MAINTAINER:

11/60 ENGINEERING

AurHOR:

11/60 ENGINEERING

DATE CREATED:

18-JANUARY-1977

LAST REVISION:

18-JANUARY-1977
23-MAY-1977
28-JUL-1977

(C)

1977;

DIGITAL EQUIPMENT CORPORATION
146 MAIN STREET
MAYNARD, MASSACHUSETrS, USA
01754
617-897-5111

THIS SOFTWARE IS FURNISHED TO THE PURCHASER UNDER A LICENSE FOR
USE ON A SINGLE COMPUTER SYSTEM, AND CAN BE COPIED (WITH INCLUSION OF DIGITAL'S COPYRIGHT NOTICE) ONLY FOR USE IN SUCH SYSTEM,
EXCEPT AS MAY OTHERWISE BE PROVIDED IN WRITING BY DIGITAL.
THE INFORMATION IN THIS OOCUMENT IS SUBJEcr TO CHANGE WITHOUT
NOTICE, AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION. DIGITAL EQUIPMENT CORPORATION ASSUMES NO
RESPONSIBILITY FOR ANY ERRORS THAT MAY APPEAR IN THIS OOCUMENT.
DIGITAL ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF
ITS SOFTWARE ON EQUIPMENT NOT SUPPLIED BY DIGITAL.

THE 11/60 PREDEFINITIONS
56
57
58
59

60
61

Page B-6

!=======================================================================
.TOe

* IDENTIFICATION

•TITLE

PDP 11/60 DEFAULT MACROS

62
63

65
66
67

1=======================================================================
• TOe
* REVISION HISTORY

68
69

.IDENT

/V01/

71
72
73

1=======================================================================

• TOe

* MICROWORD FIELD DEFINITIONS

80
81
82
83

oorE:

THE FOLIDWING ARE THE ASSIGNED RANGES OF THE
MICROWORD FIELD BIT DEFINITIONS USED IN THIS
SOURCE LISTING:
BITS [NUMBER]

WHERE HELD

[47: 00]

WCS CONTROL STORE

85
86
87

88
89

1=======================================================================

THE 11/60 PREDEFINITIONS
90
91 • TOe
92
93
94
95
96 !U47
97 !U46
98 !U45
99 !U44
100 !U43
101 !U42
102 !U41
103 !U40
104 !U39
105 !U38
106 !U37
107 !U36
108 !U35
109 !U34
110 !U33
III !U32
112 !U31
113 !U30
114 !U29 *
115 !U28 *
116 !U27 *
117 !U26 *
118 !U25 *
119 !U24 *
120 !U23
121 lU22
122 lU21
123 lU20
124 lU19 *
125 lU18
126 lU17
127 lU16
128 !U15
129 lU14 *
130 lU13 *
131 lU12 *
132 lUll *
133 !UI0 *
134 lU09 *
135 !U08 *
136 lU07 *
137 lU06 *
138 lU05 *
139 !U04 *
140 lU03 *
141 lU02 *
142 lUOl *
143 lUOO *

Page B-7

* MICROOORD BIT IAYour
J3..Z\SE
I-EMIT
MACHINE
2-SHIFT-TREE
4-UCON-DATA
CONTROL
3-RESIDUAL-cTL 5-CSP-ADDRESS
-------

ALU3
ALU2
ALUI
ALUO
BENI
BENO
BSELI
BSELO
AENI
AENO
ASELI
ASELO
RIF2
RIFI
RIFO
COur2
COurl
COUTO
WHEN
CLK-D
CLK-SR
CLK-BA
SET-CC
BEGIN
SELECT (=0)
BUSCOD2
BUSCODI
BUSCODO
WRCSP
HI/LO
WRSEL
WRB
WRA

-------------- ------------l-EMITH15
l-EMITH14
l-EMITH13
l-EMITH12
l-EMITMll
l-EMITMI0
l-EMITM09
l-EMITM08
l-EMITL07
l-EMITL06
l-EMITL05

6-RETURN
7-PAGING
8-UCON-CONTROL

--------------

4-UCONLI0
4-UCON-I/O-SEL 6-RETRll
4-UCON-WCS-SEL 6-RETRlO
4-UCON-KT-SEL 6-RETR09
4-UCONL09
4-UCONL08
4-UCONL07
4-UCONL06
4-UCONL05

6-RETR08
6-RETR07
6-RETR06
6-RETR05
6-RETR04
4-UCON-PROC-SEL 6-RETR03
4-UCONM12
6-RETR02

l-EMITL03
l-EMITL02
l-EMITLOI
l-EMITLOO

4-UCON-FP-SEL
4-UCONH15
4-UCONH14
4-UCONH13

6-RETROO
7-NEXT-PAGE2
7-NEXT-PAGEI
7-NEXT-PAGEO

2-BMUX
2-AMUX2
2-AMUXI
2-AMUXO

5-CSPADR3
5-CSPADR2
5-CSPADRl
5-CSPADRO

8-SELECT (=1)
8-FLPGO
8-UCON-XFER
8-UCON-WAD

3-LOAD-RES
3-IDAD-CQUNT

MOD (=0)
3-MOD (=1)
UBF4
UBF3
UBF2
UBFl
UBFO
UPF8
UPF7
UPF6
UPF5
UPF4
UPF3
UPF2
UPFI
UPFO
( * = DEDICATED TO THE CORRESPONDING SINGLE FUNCTION)

THE 11/60 PREDEFINITIONS
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198

lU47
lU46
lU45
lU44
lU43
lU42
lU41
lU40
lU39
lU38
lU37
lU36
lU35
lU34
lU33
lU32
lU31
lU30
lU29 *
lU28 *
lU27 *
lU26 *
lU25 *
lU24 *
lU23
lU22
lU21
lU20
lU19 *
lU18
lU17
lU16
lUIS
lU14 *
lU13 *
lU12 *
lUll *
lU10 *
lU09 *
lU08 *
lU07 *
lU06 *
lU05 *
lU04 *
lU03 *
lU02 *
lU01 *
lUOO *

BASE
MACHINE
CONTROL
------ALU3
ALU2
ALU1
ALUO
BEN1
BEN 0
BSELl
BSELO
AEN1
AENO
ASELl
ASELO
RIF2
RIF1
RIFO
cour2
cour1
couro
WHEN
CLK-D
CLK-SR
CLK-BA
SET-CC
BEGIN
SELECT (=0)
BUSCOD2
BUSCOD1
BUSCODO
WRCSP
HI/W
WRSEL
WRB
WRA

MOD (=0)
UBF4
UBF3
UBF2
UBF1
UBFO
UPF8
UPF7
UPF6
UPF5
UPF4
UPF3
UPF2
UPF1
UPFO

Page B-8

9-RES-BITS
10-MULTIPLE

----------9-HISMUXSELL
9-SRS1-L
9-SRSO-L
9-GUARD-EN-H

10-MULT-SEL2
1O-MULT-SEL1
10-MULT-SELO

LOCAL
STORE
DEFINITION

---------COLZER015
COLZER014
COLZER013
COLZER012
COLZER011
COLZER010
COLZ ERO 09
COLZER008
COLZER007
COLZER006
COLZER005
COLZER004
COLZER003
COLZER002
COLZER001
COLZEROOO
COIDNE15
COIDNE14
COIDNE13
COIDNE12
COIDNE11
COIDNE10
COIDNE09
COIDNE08
COLONE07
COIDNE06
COWNE05
COIDNE04
COWNE03
COWNE02
COIDNEOl
COWNEOO
COLThU15
COLThU14
COLThU13
COL'Im12
COLThU11
COLThU10
COLThU09
COLTW008
COLW007
COL'IW006
COLThU05
COLThU04
COLThU03
COLTW002
COLThU01
COLTWOOO

UCON
PROCESSOR
CONTROL

--------PS<3:0>-CLK

UBREAK-CLK
<NO>
<NO>
SEL-HBMUX1L
SEL-HBMUXOL
FPS<7:4>-CLK
PS<7:4>-CLK
IR-CWCK
PS<15:12>-CLK
FIAG<8:0>-CLK

THE 11/60 PREDEFINITIONS
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253

Page B-9

!=======================================================================
.TOe

* MICROWORD FIELD SPECIFICATION

!----------------------------------------------------------------------•'IOC

•RADIX

! ALL NUMBERS ARE OCTAL, UNLESS orHERWISE NorED

•WIDTH

49R

! MICROWORD IS 4810 BITS WIDE, BIT <00> IS
! RIGHTMOST BIT. BIT 48 USED FOR NULL FIELD.

•BOUNDS

[6000:7777]

ADDRESSES ARE 12 BITS, ON PAGES 6: 7

.OBJECT

<47:32>1<31:16>1<15:00>

OUTPUT FORMAT (DEFAULT SPEC)

MICROWORD FIELD FORMAT

!----------------------------------------------------------------------.'IOC

.FIELD
.MACRO

N::=<48>
NULL: :=N/O

•'IOC

NULL FIELD/MACRO SPECIFICATION

ALU AND INTERNAL DATA BUS CONTROL

.'IOC
*
<ALU>-ALU FUNCTION CONTROL BITS
!SPECIFIES ALU FUNCTION CODE AND CINMUX SELECT. ALWAYS IN EFFECT.
.FIELD ALU::=<47:44>
---FUNcrION--LOG/AR ALUS<3:0> H CINMUX L
-1
roT-A: :=00
0000
L
!COMPLEMENT A,
1001
-PS[C]
A-PLUS-B-PLUS-PS[C]::=Ol !ADD,
A
0010
-PS[C]
roT-A-AND-B::=02
L
!AND,
ZERO: :=03
L
0011
-PS[C]
!ZERO,
1001
-D[C]
A
A-PLUS-B-PLUS-D[C]::=04 !PLUS,
0110
-D[C]
A-PLUS-NOT-B-PLUS-D[C]::=05 !PLUS,
A
A-XOR-B::=06
0110
-D[C]
!XOR,
L
L
0111
-D[C]
A-AND-Nor-B::=07
!AND,
DIVIDE: :=10
!DIVIDE STEP,
!SUB,
IF D[C]H=l
0110
-D[C]=-l
A
!ADD,
1001
-D[C] =-0
IF D[C]H=O
A
A-PLUS-B::=ll
1001
-0
!PLUS,
A
B: :=12
1010
!SELECT B,
L
-0
A-AND-B: : =13
1011
-0
!AND,
L
A-PLUS-B-PLUS-l::=14
1001
!PLUS,
A
-1
A-MINUS-B: : =15
0110
!MINUS,
A
-1
A-IOR-B: :=16
1110
!IOR,
L
-1
1111
A: :=17
!SELECT A,
L
-1

THE 11/60 PREDEFINITIONS

Page B-I0

254
255
256.TOe
*
<BEN>-B-BUS DATA SOURCE
257 !SPECIFIES GATING OF DATA ONTO B-BUS. ALWAYS IN EFFECT.
258 .FIELD
BEN::=<43:42>
259
BSPLO::=O
!DIRECT BSP LOCATIONS 00-17
260
BSPHI::=1
!DIRECT BSP LOCATIONS 20-37
261
CSP::=2
!USE <CSPADDR> [SIC] AS ADDRESS (4 BIT)
BASCON::=3
!1 OF 4 BASE CONSTANTS IN CSP17 TO
262
263
!CSPI4 (2 BIT)
264
265
266
*
<BSEL>-B-BUS SOURCE SELECTION CONTROL
267 . TOe
268 ! SPECIFIES CONTROL OF INDIVIDUAL B-BUS SOURCES. ALWAYS IN EFFECT.
269 .FIELD
BSEL::=<41:40>
270 ! THIS FIELD NOT USED WHEN BEN/CSP IS SPECIFIED
271 !CSPI7 TO CSP14 IMMEDIATE ADDRESS WHEN BEN/BASCON
272
BI7::=0
273
BI6::=1
274
BI5::=2
275
BI4::=3
276
ONE::=O
!ONE CONSTANT
277
ZERO::=1
!ZERO CONSTANT
278
MD: :=2
!MEMORY DATA
279
'!WO: :=3
!'IWO CONSTANT
280 !USED IN CONJUNCTION WITH <RIF> FOR SP ADDRESS WHEN
281 !BEN/BSPLO OR BEN/BSPHI
282
DF: :=0
!DESTINATION FIELD
283
SF::=1
!80URCE FIELD
284
IMMEDO::=2
!DIRECT ADDRESS, LOW BIT=O
285
ROO::=2
'FOR JOINT USE W/ RIF FIELD
286
R02::=2
287
R04::=2
288
R06::=2
289
RI0::=2
290
Rl2::=2
291
Rl4::=2
292
Rl6::=2
293
IMMEDl::=3
.DIRECT ADDRESS, LOW BIT=1
ROl::=3
'FOR JOINT USE W/ RIF FIELD
294
R03::=3
295
296
R05::=3
297
R07::=3
298
Rll::=3
299
Rl3::=3
300
Rl5::=3
301
Rl7::=3
302

THE 11/60 PREDEFINITIONS
303
304.TOe
*
<AEN>-A-BUS DATA SOURCE
305 !SPECIFIES GATING OF DATA ONTO A-BUS. ALWAYS IN EFFECT.
306 .FIELD AEN::=<39:38>
307
XMUX: :=0
!XMUX=SR OR FLTPT ASSEMBLE
308
CMUX::=1
!SHIFT TREE
309
ASPLO::=2
!DIRECT ASP LOCATIONS 00-17
310
ASPHI::=3
!DIRECT ASP LOCATIONS 20-37
311
312
313
*
<ASEL>-A-BUS SOURCE SELECTION CONTROL
314 . 'IDC
315 !SPECIFIES CONTROL OF INDIVIDUAL A-BUS SOURCES. ALWAYS IN EFFECT.
316 .FIELD ASELO::=<36>
317 !XMUX CONTROL WHEN AEN/XMUX [USES ASELO ONLY]
318
SR:.:=O
!SR OUTPur ONTO BUS-A
319
FLTPT::=1
!FLTPT-ASSEMBLE ONTO BUS-A
320 .FIELD ASEL::=<37:36>
321 !CMUX CONTROL WHEN AEN/CMUX. SHIFTS CMUX INPUT APPROPRIATE AMOUNT
322
LEFT-I: :=0
!LOW BIT GETS SENDMUX OUTPUT
323
DIRECT::=1
!OUTPUT=INPUT
324
RIGHT-l::=2
!HIGH BIT GETS D[C]
325
RIGHT-2::=3
!HIGH BITS BOTH GET D[C]
326 !USED IN CONJUNCTION WITH <RIF> FOR SP ADDRESS WHEN
327 !AEN/ASPLO OR AEN/ASPHI
328
IMMEDO: : =0
!DIRECT ADDRESS, LOW BIT=O
329
ROO::=O
'FOR JOINT USE W/ RIF FIELD
330
R02::=0
331
R04::=0
332
R06::=0
333
RI0::=0
334
RI2::=0
335
Rl4::=0
336
Rl6::=0
337
IMMEDl: : =1
.DIRECT ADDRESS, LOW BIT=1
338
ROl::=1
!FOR JOINT USE W/ RIF FIELD
339
R03::=1
340
R05::=1
341
R07::=1
342
Rll::=1
343
RI3::=1
344
RI5::=1
345
RI7::=1
346
DF::=2
!DESTINATION FIELD
347
SF: :=3
!SOURCE FIELD
348

Page B-ll

THE 11/60 PREDEFINITIONS

Page B-12

349
350
351 •'rOC
*
<RIF>-ASP, BSP REGISTER IMMEDIATE FIELD
352 ! SPECIFIES ADDRESSES WITH ASP, BSP ALONG WITH AEN, ASEL & BEN, BSEL
353 .FIELD RIF::=<35:33>
ROO-oR-Ol::=4
!LOW BIT IS 0/1, SPECIFIED BY
354
355
ROO::=4
356
ROl::=4
357
R02-oR-03::=5
IUSING EITHER IMMEDO/IMMEDI MODES
358
R02::=5
359
R03::=5
360
R04-oR-05::=6
361
R04::=6
362
R05::=6
363
R06-oR-07::=7
364
R06::=7
365
R07::=7
366
RlO-oR-l1::=0
367
RlO::=O
368
Rll::=O
Rl2-oR-13::=1
!ADDR<3:0>H = -RIF<2>H # RIF<1:0>H # A/BSEL<O>H
369
370
Rl2::=1
371
Rl3::=1
372
Rl4-oR-15::=2
373
Rl4::=2
374
Rl5::=2
375
Rl6-oR-17::=3
376
R16::=3
377
Rl7::=3
378
379
380.'rOC
*
<CQUT>-CARRY OUT BIT MUX SELECTION
381 !SPECIFY INPUT TO D[C] REGISTER, LOADED WHEN D REGISTER LOADED.
382 !THIS IS ALWAYS IN EFFECT.
383 .FIELD COUT::=<32:30>
384
CIN::=O
!OUTPUT OF CINMUX [SIC]
385
PS[C]::=l
IPS C-BIT
386
ALUOO::=2
!ALU OUTPUT BIT 00
387
ALU07::=3
!ALU OUTPUT BIT 07
388
ALU15: : =4
!ALU OUTPUT BIT 15
COUT07::=5
!BYTE CARRY BIT
389
390
COur15: :=6
!WORD CARRY BIT
391
D[C]::=7
!PROPOGATE [SAVE] LAST D[C]
392
393 !----------------------------------------------------------------------394

THE 11/60 PREDEFINITIONS

Page B-13

395
396
397 .TOe
* CLOCKS
398
399
400
401 •TOe
*
<WHEN>-D/SR WHEN TO CLOCK
402 !SPECIFY CLOCK D/SR REGISTERS AT P2 T OR P3 T. ALWAYS IN EFFECT.
403 .FIELD WHEN::=<29>,0
404
AT-P2-T: :=0
!CLOCK D AND/OR SR AT P2 T [100 NS] •
405
AT-P3-T: :=1
!CIDCK D AND/OR SR AT P3 T [150 NS].
406
407
408
409 .TOe
*
<CLKD>-ENABLE D-REGISTER CLOCKING
410 !ENABLES CLOCKING OF D-REGISTER. ALWAYS IN EFFECT.
411 .FIELD CLKD::=<28>,0
412
NO: :=0
!NOP
413
YES: :=1
!CIDCK D[C], D-REGISTER AT <WHEN>
414
415
416
417 .TOe
*
<CLKSR>-ENABLE SR-REGISTER CLOCKING
418 !ENABLES CLOCKING OF SR-REGISTER. ALWAYS IN EFFECT.
419 .FIELD CLKSR::=<27>,0
420
NO: :=0
!NOP
421
YES: : =1
!CIDCK SR-REGISTER AT <WHEN>
422
423
424
425 •TOe
*
<CLKBA>-ENABLE CLOCKING OF BA-REGISTER
426 ! ENABLES CLOCKING OF BA-REGISTER AT PI T [60 NS]. ALWAYS IN EFFECT.
427 .FIELD CLKBA::=<26>,0
428
NO: :=0
!NOP
429
YES::=l
!CIDCK BA-REGISTER AT PI T[60 NS].
430
431
432
433 .TOe
*
<SCC>-ENABLE SETTING OF PS CONDITION CODES
434 !ENABLE CLOCKING OF PS CONDITION CODES AT P2 T [100 NS] OF NEXT UOORD.
435 !D MUST BE CLOCKED AT P2 T OR EARLIER OF PREVIOUS MICROWORD.
436 !THIS IS ALWAYS IN EFFECT.
437 .FIELD SCC::=<25>,0
438
NO: :=0
!NOP
439
YES: : =1
! ENABLE CLOCKING IN NEXT UWORD
440
441 !----------------------------------------------------------------------442

THE 11/60 PREOEFINITIONS

Page B-14

443
444
445 .TOe
* BUS/UCON & CSP-ADDRESS & SHIFT~REE CONTROL
446
447
448
449 .TOe
*
BUS/DCON CONTROL
450
451
452 .TOe
*
<BEGIN>-BEGIN BUS/UCON OPERATION
453 !INITIATE BUS XOR UCON OPERATION. AUiJAYS IN EFFECT.
454 .FIELD BEGIN: :=<24> ,0
455
NO::=O
!NOP FOR BUS AND UCON OPERATIONS
456
YES::=1
!BEGIN OPERATION SPECIFIED
457
458
459
460 .TOe
*
<SELECT>-SELECT BUS OR UCON
461 !SELECT BUS XOR UCON. ONLY USED IF BEGIN/YES.
462 .FIELD SELECT::=<23>
463
BUS::=O
!SELECT BUS
464
UCON::=1
!SELECT UCON
465
466
467
468 •TOe
BUS CONTROL
*
469
470
471 .TOe
*
<BUSCODE>-BUS CODE ACTION FIELD
472 !BUS ACTION CODES. ONLY USED IF BEGIN/YES & SELECT/BUS.
473 .FIELD BUSOODE::=<22:20>
474
DATI-CLKIR: :=0
!DATA IN, WAD IR
475
!DATA IN, NO INTERNAL ADDRESS
DATI-NOINT::=1
476
DA'ID: :=2
!DATA our
477
DATIB: :=3
!DATA IN, ALLOW: ODD ADDRESS
478
DATIB [P] : : =3
!DATA IN, ALLOW: ODD ADDRESS,
479
!FORCE 'ID PAUSE.
480
DATIP: :=4
!DATA IN, NO CACHE, WCK BUS
481
DA'IDB: :=5
!DATA our, ALLOW: ODD ADDRESS
482
DATI: :=6
!DATA IN
483
DATI [P] : : =6
!DATA IN, ALLOW: FORCE TO PAUSE
484
!INVALIDATE CACHE LOCATION FUNCTION
INVALIDATE: : =7
485
486
487
488 •TOe
UCON CONTROL
*
489
490
491
492 •'IDC
*
<FLPGO>-STARr Har FLOATING POINT
493 ! INITIATES Har FLOATING POINT FUNCTION. ONLY USED IF BEGIN/yES
494 !AND SELECT/UCON.
495 .FIELD FLPGO::=<22>
496
NO: :=0
!NOP
497
YES::=1
!YELL GO
498

THE 11/60 PREDEFINITIONS
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549

*
<UCON-XFER>-UCON OPERATION
!EXECUTE A UCON FUNCTION. ONLY USEO IF BEGIN/YES & SELECT/UCON.
.FIELD UCON-XFER::=<21>
NO: :=0
!NOP
YES::=l
!START UCON OPERATION

.TOe

.TOe
*
<UCON-LOAD>-1OAD UCON REGISTER
!1OAD UCON CONTROL REGISTER. ONLY USED IF BEGIN/YES & SELECT/UCON.
.FIELD UCON-1OAD::=<20>
NO::=O
!NOP
YES: :=1
!1OAD UCON CONTROL REGISTER

• TOe

CSP ADDRESS SPECIFICATION

.TOe
*
<CSPADDR>-CSP IMMEDIATE ADORESS
!SPECIFY CSP 4 BIT ADDRESS. ONLY USEO IF BEN/CSP.
.FIELD CSPADDR::=<23:20>
000::=17
'NOTE INVERSION
DOl: :=16
002::=15
003::=14
D04: :=13
D05: :=12
006: :=11
D07:: =10
DI0: :=07
011: :=06
D12: :=05
013: :=04
014: :=03
D15: :=02
D16: :=01
D17: :=00
• TOe

.roc

SHIFT CONTROL

*
<BMUX>-SECOND LEVEL OF SHIFT TREE
!BMUX CONTROLS SHIFT RIGHT OF 0 OR 4. ALWAYS IN EFFECT.
.FIELD BMUX::=<23>
DIRECT::=O
!AMUX<15:00>
RIGHT-4::=1
!4*0[C] # AMUX <15:04>

Page B-15

THE 11/60 PREDEFINITIONS

Page B-16

550
551
552 .roc
*
<AMUX>-FIRST LEVEL OF SHIFT TREE
553 !AMUX CONl'ROLS INPUT OF D-REG/COUNl'ER TO TREE. ALWAYS IN EFFECT.
554 .FIELD AMUX::=(22:20>
!D(HI> # D(W>
555
DIRECT: :=0
556
!D(W> # D(W>
D[W]#D[W]::=l
557
SIGNEXT: : =2
!8*D[C] # D(W>
558
!COUNTER # D(W>
COUNTER#D[W]::=3
559
COUNTER: : =3
!SAME
560
D[HI]#D[HI]::=4
!D(HI> # D(HI>
561
!D(W> # D(HI>
SWAB: :=5
562
!8*D[C] # D(HI>
RIGHT-8 : : =6
563
COUNTER#D[HI]::=7
!COUNTER # D(HI>
564
565 !----------------------------------------------------------------------566
567
568
569 .roc
* SP REWRITE & REGISTER ClOCKS
570
571
572
573 .roc
*
<WRCSP>-WRITE TO CSP
574 !WRITE CSP FROM DMUX [BUSDIN/CACHE]. ALWAYS IN EFFECT.
575 .FIELD WRCSP::=(19),0
576
NO: :=0
!NOP
577
YES::=l
ION P3, 120-150 NS.
578
579
580
581 .roc
*
(MOD>-MODE CONTROL OF FOLLOWING BITS
582 !CONTROLS REDEFINITION OF SP REWRITE/REGISTER ClOCK BITS.
583 !THIS IS ALWAYS IN EFFECT.
584 .FIELD MOD::=(14),0
585
CLKSP: :=0
!CONTROL ASP/BSP ClOCKING
586
WADREG: : =1
!CONTROL RES-REG/COUNl'ER WADING
587
588
589
590 .roc
*
SP REWRITE [A,B] CONTROL
591 !WHEN MOD/CLKSP
592
593
594 .roc
*
(HIW>-SP HI/W SELECT
595 !WHICH HALF OF SP'S TO REWRITE. ONLY IF MOD/CLKSP.
596 .FIELD HIW::=(18)
597
W: :=0
!REWRITE ENABLE A/B SP W [00-17]
598
L: :=0
599
HI: :=1
!REWRITE ENABLE A/B SP HI [20-37]
600
H: :=1
601
602

THE 11/60 PREDEFINITIONS

Page B-17

603
*
<WRSEL>-REWRITE ADDRESS SELECT
604 •'!DC
605 lWHICH WRITE ADDRESS TO USE ON REWRITE. ONLY IF MOD/CLKSP.
606 .FIELD
WRSEL::=<17>
607
A-ADDR: :=0
!USE A ADDRESS ON REWRITE
608
A::=O
609
B-ADDR::=l
lUSE B ADDRESS ON REWRITE
610
B::=l
611
612
613
614.'!DC
*
<WRSP>-REWRITE A/B SELECT
615 !ENABLE REWRITE OF SPECIFIC SP'S. ONLY IF MOD/CLKSP.
616 .FIELD
WRSP::=<16:15>
617
NOP: : =0
1m ASP/BSP REWRITE
618
WR-A: :=1
lWRITE ASP ONLY, ON P3 120-150 NS.
619
A::=l
620
ASP::=l
621
WR-B::=2
lWRITE BSP ONLY, ON P3 120-150 NS.
622
B::=2
623
BSP::=2
624
WR-A-AND-B: :=3
lWRITE BOTH ON P3
625
AB::=3
626
BA::=3
627
ABSP::=3
628
BASP::=3
629
BOTH::=3
630
631
632
633 • '!DC
*
REGISTER LOADING
634 lWHEN MOD/LOADREG
635
636
637 • '!DC
*
<IDADRES>-WAD RESIDUAL CONTROL REGISTER
638 !ENABLE WAD OF RESIDUAL CONTROL REGISTER FROM B-BUS.
639 ITHIS IS ONLY IF MOD/LOADREG.
640 .FIELD
LOADRES::=<18>
641
NO::=O
!NOP
642
YES::=l
!LOAD RES WITH B-BUS<14:11>
643
!AT P2 T [100 NS], B-BUS<14> COMPLEMENTED
644
645
646
647.'!DC
*
<LOADCOUNT>-WAD COUNTER
648 lENABLE WAD OF COUNTER FROM B-BUS <7:0>. ONLY IF MOD/LOADREG.
649 .FIELD
WADCOUNT: : =<16>
650
NO::=O
lOOP
651
YES: :=1
!LOAD COUNTER AT P2 T [100 NS] •
652
653
654

1-----------------------------------------------------------------------

THE 11/60 PREDEFINITIONS

Page B-18

655
656
657 .TOe
* SEQUENCING FIELD
658
659
660
661 .TOe
*
<UBF>-BUT MICROBRANCH FIELD
662 1SPECIFIES CONDITIONS TO MODIFY <UPF>/<J> FIELD DURING BRANCH.
663 1THIS IS ALWAYS IN EFFECT.
664 .FIELD UBF::=<13:9>,30
665
666 •TOe
*
NO BUT
667
NULL: :=30
1SPECIFY NO MODIFICATION
668
!(DEFAULT CONDlTON).
669
670 •TOe
*
ACTIVE ONLY
671 1PURELY ACTIVE BUTS GENERATE SIDE AFFECTS; THEY 00 Nor MODIFY THE <UPF>
672 1FIELD BY THE "OR-ING"-IN-QF-CONDITIONS METHOD.
THEY MAY MODIFY
673 1EXPLICITLY THE ENTIRE <UPF> FIELD, AS IN BUT (RETURN)
674
R-QR-1: : =22
1FORM R[SF] - IOR-"001
675
CUA-TRACK: : =31
1RESUME/RESTARr CUA TRACKING
676
CLR-FLAG-RES-UCON::=32
1CLEAR FLAGS<2:0>, EX-FLAG<l>,
677
1RES-REGISTER, UCON-REGISTER
678
DIAGNOSE::=33
1SPECIAL DIAGNOSTIC BUT
679
SUBRB: :=34
!RETURN <- EMIT<14:03>,
680
!PAGE <- EMIT<02:00>
681
SUBR-B: : =34
!SYNONYMS ARE:
682
GOI'O: :=34
683
GO-TO: :=34
684
SUBRA: :=35
!RETURN <- D<14:03>,
685
1PAGE <- EMIT<02:00>
686
SUBR-A: :=35
1SYNONYM
687
B#36: :=36
1TBD
688
RETURN: :=37
1PAGE <- RETURN<ll: 09>,
689
1NUA <- RETURN<08:00>
690
691 •TOe
*
INACTIVE ONLY
692 1INACTIVE BUTS ONLY CAUSE MODIFICATION OF THE <UPF> FIELD BY THE
693 ! II OR-ING"-IN-QF-CONDITIONS METHOD.
694
1----UPF MASK----1876 543 210 OCTAL
695
696
1*=NOT AFFECTED
697
SR3-0::=00
!*** **0 000 (OOO)
698
CASE: :=00
1
699
SR03: :=00
!*** **0 III (007)
700
SR02: :=00
!*** **1 011 (013)
701
SR01: :=00
1*** **1 101 (OlS)
702
SROO: :=00
1*** **1 110 (016)
703
IRl5-12::=01
1*** **0 000 (OOO)
704
OOP: :=01
!
705
INSTR5: :=02
*** *00 000 (OOO)
706
INSTR-5: : =02
707
IR11#FLTPT3-0::=03
*** *00 000 (OOO)
IR11-A: :=03
708
*** *01 III (017)
709
IR9-6::=04
*** **0 000 (000)
SOP: :=04
710

THE 11/60 PREDEFINITIONS
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762

MOV-DR7#IR5-3::=05
MOV-DR7::=05
IR5-3: :=05
BGSERV-FPSERV#D[C]#FPRET::=07
BGSERV-FPSERV::=07
D[C]-C::=07
FPRETI-0::=07
COUT07#DOUT07#FPS05::=10
COur07::=10
DOUT07::=10
COUT07#DOUT07::=10
FPS05::=10
DMO#SMO#BYTE::=ll
DMO: :=11
SMO::=11
BYTE::=ll
GD3-2: :=12
BG-SERVCE-L#MFSS#MULTIPLE::=14
BG-SERVCE-L: :=14
MFSS: :=14
MULTIPLE: :=14
MASKED-PS[T]::=14
DOO: :=14
PS[N]::=14
FLAG7: :=14
EXFLAGl: :=14
FLTPrS: :=14
EXFIAG2: : =14
INIT-JAM: :=14
D14-00EQO#D15::=15
D14-00-EQ-0#D15::=15
D14-00-EQ-0::=15
D15::=15
IRll#PS15::=16
IRI1-B: :=16
PS15: :=16
VECTOR-LOAD#DR6-7L::=21
VECTOR-LOAD::=21
DR6-7L: : =21
D[C]#BAOO::=23
D[C]-B::=23
BAOO: :=23
OTHER-JAM#FP-PROC::=24
OTHER-JAM: : =24
FP-PROC: : =24
INTR-HIGH#INSTR-BRANCH-L::=26
INTR-HIGH: :=26
INSTR-BRANCH-L::=26
PREFETCH-JAM#FP-FD::=27
PREFETCH-JAM::=27
FP-FD: :=27

Page B-19
!*** **0 000 (000)
!*** **0 III (007)
!*** **1 000 (010)
!*** **0 000 (000)
!*** **0 III (007)
!*** **1 011 (013)
!*** **1 100 (014)
!*** *** 000 (000)
!*** *** 011 (003)
!*** *** 101 (005)
!*** *** 001 (001)
!*** *** 110 (006)
!*** *** 000 (000)
!*** *** 011 (003)
!*** *** 101 (005)
!*** *** 110 (006)
!*** *** *00 (000)
!*** *** 000 (000)
!*** *** 011 (003)
!*** *** 101 (005)
*** *** 110 (006)

!*** *** *00
!
!*** *** *01
!*** *** *10
!*** *** *00
!*** *** *01
!*** *** *10
!*** *** *00
!*** *** *01
!*** *** *10
!*** *** *00
!*** *** *01
!*** *** *10
!*** *** *00
!*** *** *01
!*** *** *10
!*** *** *00
!*** *** *01
!*** *** *10
!*** *** *00
!*** *** *01
!*** *** *10

(000)
(001)
(002)
(000)
(001)
(002)
(000)
(001)
(002)
(000)
(001)
(002)
(000)
(001)
(002)
(000)
(001)
(002)
(000)
(001)
(002)

THE 11/60 PREDEFINITIONS

Page B-20

763 .1OC
*
BOrH ACTIVE AND INACTIVE
764 1THESE BUTS HAVE BOTH ACTIVE AND INACTIVE EFFECTS
1----UPF MASK----765
766
1876 543 210 OCTAL
767
1*=NOT AFFECTED
INSTRl::=06
1*00 000 000 (000) BUS CONTROL,
768
769
1SP REWRITE DEFEAT
INSTR-1:
:=06
770
1
771
SR1-0#COUNT-IS-377::=13
1*** *** 000 (000) BUMP COUNTER
772
SRl-O: :=13
1*** *** 001 (001) BUMP COUNTER
COUNT-IS-377-A::=13
773
1*** *** 110 (006) BUMP COUNTER
774
1*** *** *00 (000) BUMP COUNTER
COUNT-IS-377#D[C]::=17
775
1*** *** *01 (001) BUMP COUNTER
COUNT-IS-377-B::=17
776
1*** *** *10 (002) BUMP COUNTER
D[C]-A: :=17
777
1*** *** **0 (000) BUMP COUNTER
COUNT-IS-377::=25
778
1*** *** *00 (000) TIMING
PREFETCH-L#SERVICE::=20
779
1*** *** *01 (001) TIMING
PREFETCH-L::=20
780
1*** *** *10 (002) TIMING
SERVICE: : =20
781
LAST: :=20
1*** *** *11 (003) TIMING
782
783
784
785
786 .1OC
*
<UPF>-MICRO POINTER FIELD
787 1SPECIFIES EITHER NEXT MICROINSTRUCTION ADDRESS OR BASE TARGET
788 1ADDRESS TO BE USED "UNDER" THE BUT-CODE IN <UBF>.
789 •FIELD
UPF: :=<8:0> ,000
1ACTUAL MICRCMORD POINTER FIELD
790 •ADDRESS
J: : =<8: 0>
1THIS FIELD ALSO HAS
1MICROADDRESS QUALITIES
791
792
793
1BASE MACHINE MICROCODE ENTRY POINTS:
794
795
!THESE ENTRY POINTS HAVE BEEN FIXED AS OF 31-AUGUST-1976.
796
INIT01 ::= 0412
1INITIALIZATION SUBROUTINE (3412).
CON99
::= 0040
1FORCE "CONSOLE-MODE HALT" (1040).
797
798
FETOl
: : = 0702
1INSTR FETCH, NO OVERLAP
799
FET03
::= 0700
!INSTR FETCH, OVERLAP
800
SER01
: : = 0701
! SERVICE ENTRY, OVERLAP
801
SER02
: : = 0703
1SERVICE ENTRY, NO OVERLAP
802
TRPOO
::= 0127
803
1 (4631).
TRP07
::= 0631
804
1CHECK SERVICE WITH FET01 AS TARGET.
BRA05
::= 0003
805
EOS1A
::= 0460
lEND OF SERVICE ROUTINE.
(1460) •
806
807
808 1----------------------------------------------------------------------809
810

THE 11/60 PREDEFINITIONS
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862

.TOe

Page B-21

MISCELLANEOUS FIELDS

•'rOC
*
<NEXT-PAGE>-NEW PAGE ADDRESS WADED DURING BUT [SUBROUTINE]
!THESE 3 BITS ARE CLOCKED INTO PAGE REGISTER DURING A BUT[SUBRA] OR
! Bur [SUBRB]. ONLY USED WHEN UBF IBur [SUBRA] OR UBF IBur [SUBRB] •
.FIELD NEXT-PAGE::=<32:30>
.'rOC
*
<MULTIPLE>-SELECT CODE FOR BUT [MULTIPLE]
!MUST BE SET IN BOrH PREVIOUS AND CURRENT MIC~RDS WHEN BUT [MULTIPLE]
! IS ill BE EMPWYED.
.FIELD MULTIPLE::=<32:30>
MASKED-PS[T]::=O
000: :=1
PS [N] : :=2
FLAG7::=3
EXFLAG1: : =4
FLTPl'S: : =5
EXFLAG2: : =6
INIT-JAM: : =7

*
EMIT FIELD - IMMEDIATE DATA FROM MICRCMORD
!USED WHENEVER WADING IMMEDIATE DATA FROM MICRONORD
•FIELD EMIT::=<47:44>'<41:30>
•FIELD EMITH: :=<47:44>
.FIELD EMITM: :=<41:38>
•FIELD EMITL::=<37:30>
•FIELD EMITML::=<41:30>
•FIELD EMIT9-6::=<39:36>
.FIELD EMIT15::=<47>
•FIELD EMIT14::=<46>
•FIELD EMIT13::=<45>
•FIELD EMIT12::=<44>
•FIELD EMIT11::=<41>
.FIELD EMIT10::=<40>
•FIELD EMIT09::=<39>
•FIELD EMIT08::=<38>
•FIELD EMIT07::=<37>
•FIELD EMIT06::=<36>
•FIELD EMIT05::=<35>
•FIELD EMIT04::=<34>
.FIELD EMIT03: : =<33>
•FIELD EMIT02::=<32>
•FIELD EMIT01: : =<31>
•FIELD EMITOO:: =<30>

.roc

Page B-22

THE 11/60 PREDEFINITIONS
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890

*
RETURN ADDRESS - FOR MICROSUBROurlNE CALIS
lUSED WITH Bur [SUBRS] AND Bur [SUBRA]
•FIELD RETURN::=<46:44>'<41:33>
lPAGE # D.I.P.

•'IOC

.'IOC

.TOe
.FIELD

UCON SELECTION AND CONTROL FIELDS

SELECTION

UCON-SEL-I~::=<46>

1SELECT I ~

[BUS] CONTROL

NO: :=0

.FIELD
.FIELD
.FIELD
.FIELD

YES: :=1
UCON-SEL-WCS::=<45>
NO: :=0
YES: :=1
UCON-SEL-CACHEKT::=<44>
NO: :=0
YES: :=1
UCON-SEL-PROC::=<36>
NO: :=0
YES: :=1
UCON-SEL-FLTPT::=<33>
NO: :=0
YES: :=1

lSELECT WCS/ECS/DCS
lSELECT CACHE/KT
1SELECT PROCESSOR CONTROL
1SELECT Har FLOATING POINT

THE 11/60 PREDEFINITIONS

Page B-23

891
892.'IOC
CONTROL (ALSO TMS ROllINES)
893
!AFTER UCON [S] SELEcrED FROM ABOVE, CONTROL COMES FROM HERE.
894 .FIELD
UCON::=<32:30>'<35:34>'<47>'<42:38>
895
896 !WHEN INVOKING TMS ROUTINES TO TALK TO IDeAL STORE THEN USE THE
897
!FOLLOWING NAMES AS FORMAL PARAMETERS IN THE SUBSTITUTION MACRO
898
TMSPTR (XX).
THESE ARE THE ONLY LEGAL VALUES THAT WILL
899 !WORK IN THE MACRO. FURlliER EXPLANATION OF THESE ROUTINES
900 !CAN BE OBTAINED IN THE LISTING OF THE TMS ROM.
901
902
903
READ
: :=0064 !READ DATA.
904
READANDINC
: :=0050 ! READ DATA TO MD, INCREMENT ADDR.
905
WADANDREAD
: :=0040 ! WAD ADDRESS AND THEN READ DATA.
906
WADREADINC
: :=0070 ! WAD ADDRESS, READ DATA,
907
! INCREMENT ADDRESS.
908
: :=0030 !WRITE DATA.
WRITE
909
WRITEANDINC
: :=0010 !WRITE DATA AND THEN INCREMENT ADDRESS.
910
WADANrmRITE
: :=0020 ! WAD ADDRESS AND THEN WRITE DATA
911
: :=0002 ! WAD ADDRESS, WRITE DATA,
WADWRITEINC
912
! INCREMENT ADDRESS.
913
INCANDREAD
: :=0012 ! INCREMENT ADDRESS AND THEN READ DATA.
914
: :=0100 ! WAD ADDRESS
WADADDRESS
915
916
: :=0104 ! WAD GR' S FROM
WADGRS
917
! IDeAL STORE
918
STOREGRS
: :=0140 !SAVE GR'S INTO
919
! IDeAL STORE
920
: :=0174 ! WAD FP REGISTERS FROM lOCAL STORE
WADFP
921
STOREFP
: :=0266 !SAVE FP REGISTERS INTO lOCAL STORE
922
: :=0360 !WAD CSP[00-13] INTO lOCAL STORE.
WADCSP
: :=0420 !SAVE CSP[00-13] INTO IDeAL STORE.
923
STORECSP
924
Wru:mCSAB
: :=0462 !WAD WCS WORK REGISTERS FROM IDeAL STORE
925
STOREWCSAB
: :=0502 !SAVE WCS WORK REGISTERS INTO LOCAL STORE.
926
SETWAD
: :=0522 ! SAME AS LOADREADINC.
927
SETSTORE
: :=0530 ! SAME AS LOAD ADDRESS.
928
ASPADWAD
: :=0534 ! WAD ASP [00-37] FROM lOCAL STORE
929
ASPADSTORE
: :=0646 !SAVE ASP[00-37] INTO lOCAL STORE
930
BSPADWAD
: :=0756 ! WAD BSP [00-37] FROM lOCAL STORE.
931
BSPADSTORE
: :=1070 !SAVE BSP[00-37] INTO IDeAL STORE.
932
ALLCSPWAD
: :=1202 ! WAD CSP [00-1 7] FROM LOCAL STORE.
933
ALLCSPSTORE
: :=1252 !SAVE CSP[00-17] INTO IDeAL STORE.
WADREAIJIW)
934
: :=1324 ! WAD ADDRESS AND READ 'lID DATA ITEMS
INCREAIJIW)
935
: :=1334 ! INCREMENT ADDRESS AND READ
936
! 'lWO DATA ITEMS
937
WADWRITE1W
: :=1342 ! WAD ADDRESS AND WRITE 'lID DATA ITEMS.
938
WRITE1W
: :=1352 ! INCREMENI' ADDRESS AND WRITE
939
! 'IWO DATA ITEMS.

THE 11/60 PREDEFINITIONS
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986

READ INDIRECT
WRITE INDIRECT
LOADFPOl
LOADFP23
LOADFP45
STOREFPOI
STOREFP23
STOREFP45
IDADTEMP
STORETEMP

Page B-24
::=1362 !READ DATA ITEM INDIRECTLY.
: :=1376 !WRITE DATA ITEM INDIRECTLY.
: :=1412 !IDAD FPO AND FPl FROM LOCAL STORE.
: :=1444 !IDAD FP2 AND FP3 FROM LOCAL STORE.
: :=1476 !LOAD FP4 AND FP5 FROM LOCAL STORE.
: :=1530 !SAVE FPO AND FPl INTO LOCAL STORE.
: :=1562 !SAVE FP2 AND FP3 INTO LOCAL STORE.
: :=1~14 !SAVE FP4 AND FP5 INTO LOCAL STORE.
: :=1646 !LOAD TEMPS FROM LOCAL STORE.
: : =1700 !SAVE TEMPS INTO LOCAL STORE.

.FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
•FIELD
.FIELD

UCONH::=<32:30>
UCONM::=<35:34>
UCONL::=<47>'<42:38>
UCON15::=<32>
UCON14::=<31>
UCON13::=<30>
UCON12::=<35>
UCONll::=<34>
UCONI0::=<47>
UCON09::=<42>
UCON08: : =<41>
UCON07 : : =<40 >
UCON06:: =<39>
UCON05::=<38>

.'lOC

IDCAL STORE FIELDS

!EACH 48 BIT WORD IS DIVIDED INTO 3 SIXTEEN BIT FIELDS.
!BITS <15-00> ARE LSADR'S 0000-1777. (COLUMN ZERO)
!BITS <31-16> ARE LSADR'S 2000-3777. (COLUMN ONE)
!BITS <47-32> ARE LSADR'S 4000-5777. (COLUMN TWO)
•FIELD
•FIELD
•FIELD

COLTWO: : =<47: 32>
COLONE::=<31:16>
COLZERO::=<15:00>

!----------------------------------------------------------------------!----------------------------------------------------------------------!END OF MICRDWORD FIELD DEFINITIONS.
!-----------------------------------------------------------------------

THE 11/60 PREDEFINITIONS
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031

Page B-25

!=======================================================================
• IDe

* MACRO DEFINITIONS

• IDe

• '!DC

*
PO

TIMING

•MACRO

: :=

NULL

10 NS., UP3 VIEWED AS THE STARr OF A
IMICROCYCLE

•MACRO
•MACRO
•MACRO

P1
P1-L
P1-T

:: =
: :=
: :=

NULL
NULL
NULL

160 NS., AT P1
130 NS., AT P1 LEADING EDGE
160 NS., AT P1 TRAILING EDGE

•MACRO
•MACRO
•MACRO
•MACRO

P2
P2-L
P2-T
P2-U

:: = NULL

•MACRO
•MACRO
•MACRO
•MACRO

P3
P3-L
P3-T
P3-U

•MACRO

UP3

: :=

NULL

1P3 DELAYED BY 5 NS., PO VIEWED AS THE
lEND OF A MICROCYCLE. LATCHES NEW
!MICROINSTRUCTION INTO THE
IMICROWORD BUFFER REGISTER.

•MACRO

DEFER

: :=

NULL

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

NEXT
SETUP
SELEcr
ISSUE
ENABLE
EMITC

: :=
: :=
: :=
: :=

1CONTROL IS ISSUED AT THIS TIME,
1 ANY REQUIRED CLOCKING OCCURS LATER
lWHERE TO GO NEXT, CLOCKED AT UP3
!SETUP DATA/CONTROL
lMAKE A Har-BOX SELEcrION
1SET/CLEAR Har-BOX FLAG
! DITrO
ISPECIFY AN EMIT-CONSTANT VALUE

PRIMITIVE OPERATIONS

1100 NS., AT P2

: := NULL
170 NS., AT P2 LEADING EDGE
: : = WHEN/AT-P2-T 1100 NS., AT P2 TRAILING EDGE

: :=

NULL

1UNSUPPRESSED P2, CLOCK CONTINUOUSLY

NULL
1150 NS., 120-150 NS., AT P3
NULL
1120 NS., AT P3 LEADING EDGE
: := WHEN/AT-P3-T 1150 NS., AT P3 TRAILING EDGE
1UNSUPPRESSED P3, CLOCK CONTINUOUSLY
: := NULL
: :=

::=

NULL
NULL
NULL
NULL
: : = NULL
: := NULL

1=======================================================================

THE 11/60 PREDEFINITIONS

Page B-26

1032 • 'rOC
WRITING THE A AND B SCRATCH PADS
*
1033
1034
WRITING THE APPROPRIATE SCRATCH PADS:
1035
1036
(NOP
)
1037
(A
L
A)
WR (B ,H ,B)
1038
(AB
)
1039
1040
/1\ /1\ /1\
1041
1042
ASP, BSP, BOTH, NEITHER---------1043
10[00-17], OR HI [20-37]-------------1044
USE "A" SIDE OR "B" SIDE ADDRESS---------1045
1046
WRITES CONTENTS OF D-REGISTER INTO ADDRESSED SCRATCH PADS [SEE
1047
BELOW] DURING P3
1048
lCIDCK SP MODE
1049 .MACRO WR(AB,HL,ADDR) ::= MOD/CLKSP,
lNOP, A, ASP, B, BSP,
1050
WRSP/@AB,
lAB, ABSP, BA, BASP,
1051
lBOTH ARE CHOICES
1052
lHI, DO, H, L ARE CHOICES
1053
HI1O/@HL,
lA, B, A-ADDR, B-ADDR
1054
WRSEL/@ADDR
lARE CHOICES.
1055
1056
1057
1058
1059 • 'rOC
~BP AND BSP PHYSICAL REGISTER ADDRESSES
*
1060
1061 ! ENABLE INPUT/OUTPUT [FOR READ AND/OR WRITE] OF THE APPROPRIATE
1062 ! SCRATCH PAD ONTO EITHER BUS-A OR BUS-B VIA EXACT PHYSICAL ADDRESS
1063
1064 •MACRO ASP10 (XX)
!SELECT
: := AEN/ASPLO,
1065
lREGISTER &
ASEL/@XX,
1066
lENABLE ON BUS-A
RIF/@XX
1067
1068 .MACRO ASPHI(XX)
1SELECT
: : = AEN/ASPHI,
!REGISTER &
1069
ASEL/@XX,
!ENABLE ON BUS-A
1070
RIF/@XX
1071
1072 .MACRO ASP (XX)
!SELECT REGISTER,
: : = ASEL/@XX,
lNO ENABLE
1073
RIF/@XX
1074
1075
1SELECT
1076 •MACRO BSP10 (XX)
: : = BEN/BSPLO,
lREGISTER &
1077
BSEL/@XX,
!ENABLE ON BUS-B
1078
RIF/@XX
1079
1080 .MACRO BSPHI(XX)
!SELECT
: : = BEN/BSPHI,
1081
!REGISTER &
BSEL/@XX,
lENABLE ON BUS-B
1082
RIF/@XX
1083
!SELECT REGISTER,
1084 .MACRO BSP (XX)
: := BSEL/@XX,
!ID ENABLE
1085
RIF/@XX
1086
1087

THE 11/60 PREDEFINITIONS
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143

.TOC

!
!

Page B-27

ASP AND BSP BASE MACHINE FUNCTIONAL REGISTER ADDRESSES

ENABLE INPur/OUTPur [FOR READ AND/OR WRITE] OF THE APPROPRIATE
SCRATCH PAD ONTO EITHER BUS-A "-A" OR BUS-B "-B" VIA FUNCTIONAL
REGISTER DESIGNATION

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

RO-A
RO-B
Rl-A
Rl-B
R2-A
R2-B
R3-A
R3-B
R4-A
R4-B
R5-A
R5-B
SP-A
SP-B
PC-A
PC-B
FACA[O]-B
FACB[O]-A
FACC[O]-B
FACD[O]-A
FACA[l]-B
FACB[l]-A
FACC[l]-B
FACD[l]-A
FACA[2]-B
FACB[2]-A
FACC[2]-B
FACD[2]-A
FACA[3]-B
FACB[3]-A
FACC[3]-B
FACD[3]-A
FACA[4]-B
FACB[4]-A
FACC[4]-B
FACD[4]-A
FACA[5]-B
FACB[5]-A
FACC[5]-B
FACD[5]-A
FDSTA-B
FDSTB-A
FDSTC-B
FDSTD-A
FPSHI#FEC-A
FEA-B
USER-SP-A

: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=

: :=
: :=
: :=

: :=
: :=

: :=
: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=

ASPLO (ROO)
BSPLO(ROO)
ASPLO (ROl)
BSPLO(ROl)
ASPLO (R02)
BSPLO (R02)
ASPID(R03)
BSPLO(R03)
ASPLO (R04)
BSPLO(R04)
ASPLO (R05)
BSPID(R05)
ASPLO (R06)
BSPLO(R06)
ASPLO (R07)
BSPLO(R07)
BSPHI(RlO)
ASPHI (RlO)
BSPLO (RlO)
ASPID(RlO)
BSPHI (Rll)
ASPHI (Rll)
BSPID(Rll)
ASPLO (Rll)
BSPHI (Rl2)
ASPHI (Rl2)
BSPLO(Rl2)
ASPLO(Rl2)
BSPHI(Rl3)
ASPHI (Rl3)
BSPLO(Rl3)
ASPLO (Rl3)
BSPHI(Rl4)
ASPHI (Rl4)
BSPLO (Rl4)
ASPLO (Rl4)
BSPHI (Rl5)
ASPHI (Rl5)
BSPLO (Rl5)
ASPID (Rl5)
BSPHI(Rl7)
ASPHI (Rl7)
BSPID(Rl7)
ASPLO(Rl7)
ASPHI (Rl6)
BSPHI (Rl6)
ASPID (Rl6)

THE 11/60 PREDEFINITIONS
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

USER-SP-B
WHAM I-A
R[ZERO]-B
R[IR]-A
R[SRC]-B
R[SRC]-A
R[DST]-B
R[DST]-A
R[VECT]-B
WCSB[O]-B
WCSB[l]-B
WCSA[O]-A
WCSADR
FPA-B
CNSL-cNTL-B
CNSL-CADR-A
CNSL-SW-A
CNSL-TMPSW-A

• '!DC

Page B-28

: : = BSPID (Rl6)
: :=
::=
: :=
: :=
::=
::=
: :=
: :=

: :=
: :=
: :=
: :=
: :=
: :=
: :=

: :=
: :=

ASPHI (R02)
BSPHI (R03)
ASPHI (Rl7)
BSPHI (R04)
ASPHI (R04)
BSPHI (R05)
ASPHI (R05)
BSPHI (R02)
BSPHI (ROO)
BSPHI (ROl)
ASPHI (ROO)
ASPHI (ROl)
BSPHI (R06)
BSPHI (R07)
ASPHI (R07)
ASPHI (R06 )
ASPHI (R03 )

ASP AND BSP INDIRECT REGISTER ADDRESSES

ENABLE INPur/OurPUT [FOR READ AND/OR WRITE] OF THE APPROPRIATE

SCRATCH PAD ON BUS-A [A] OR BUS-B USING INDIRECT ADDRESSING
WITH THE IR, WHERE :
SF<3:0>H = [FLPADR H + KTSRCADRS3 H] # [FLTPl' L * IR8 H] #
[IR7 H] # [IR6 H + RORl H]
DF<3:0>H = [FLPADR H + KTDSTADRS3 H] # [IR2 H] # [IRI H] # [IRO H]
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

R[SF]~LO-B

::= AEN/ASPLO,ASEL/SF
::= BEN/BSPLO,BSEL/SF

R[SF]-HI-A
R[SF]-HI-B
R[DF]-LO-A
R[DF]-LO-B
R[DF]-HI-A
R[DF]-HI-B
R[SF]-A
R[SF]-B
R[DF]-A
R[DF]-B

: : = AEN/ASPHI,ASEL/SF
::= BEN/BSPHI,BSEL/SF
::= AEN/ASPLO,ASEL/DF
::= BEN/BSPLO,BSEL/DF
: : = AEN/ASPHI,ASEL/DF
: : = BEN/BSPHI ,BSEL/DF
::= R[SF] -LO-A
: : = R[SF] -LO-B
: : = R [DF] -ID-A
::= R[DF] -OO-B

• 'IDe

R[SF]-LO-A

ASP, BSP INDIRECT ADDRESSING

THESE MACROS ONLY SELECT THE ADDRESS MODE FOR THE ASP AND BSP;
THE SELECTED SP IS NOT ENABLED ONTO THE BUS
•MACRO
•MACRO
•MACRO
•MACRO

ASP-ADDRS-R [DF]
ASP-ADDRS-R[SF]
BSP-ADDRS-R[DF]
BSP-ADDRS-R[SF]

:: = ASEL/DF
::= ASEL/SF
::= BSEL/DF
::= BSEL/SF

Page B-29

THE 11/60 PREDEFINITIONS
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239

!=======================================================================
• 'roC

WRITING THE C SCRATCH PAD

! WRITE DATA ON BUSDIN [ACTUALLY DMUX OUTPUT] INTO ADDRESSED CSP
! LOCATION
[SEE BEDOW] DURING P3
.MACRO

WR-CSP

'roC

: := WRCSP/YES
CSP IMPLIED ADDRESSING

ENABLE FOR INPUT/OUTPur [READ AND/OR WRITE] ONTO BUS-B ONLY A
SPECIFIC CSP LOCATION, WHERE THE ADDRESS IS DETERMINED
AS FOLIDWS:
CSPADDR<3:0>H = -[ 0 # 0 # BSEL<1>H # BSEL<O>H ]
•MACRO

CSPB (XX)

'roC

: :=

BEN/BAS CON ,
BSEL/@XX

!USE IMMEDIATE MODE
!WHICH ONE

CSP DIRECT ADDRESSING

ENABLE FOR INPur/OUTPOT [READ AND/OR WRITE] ONTO BUS-B ONLY A
SPECIFIC CSP LOCATION, WHERE THE ADDRESS IS DETERMINED
AS FOLLOWS:
CSPADDR<3:0>H = -DWORD<23:20> H
•MACRO

CSPD(XX)

: :=

BEN/CSP,
CSPADDR/@XX

!USE CSP-ADDR MODE
!WHICH ONE

THE 11/60 PREDEFINITIONS
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295

Page B-30

1=======================================================================
.TOe
*
SHIFT TREE SPECIFICATION
IN.B. MAY REQUIRE PRIOR SEWP OF RES-REGISTER FOR SHIFT END MUX
1 SELECTION CONTROL (E. G., WHEN ASEL/LEFT-A IS USED).
•TOe
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

*
ENABLED ONTO BUS A
D-RIGHT-14
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/RIGHT-4,ASEL/RIGHT-2
D-RIGHT-13
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/RIGHT-4,ASEL/RIGHT-l
D-RIGHT-12
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/RIGHT-4,ASEL/DIRECT
D-RIGHT-ll
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/RIGHT-4,ASEL/LEFT-l
1SENDMUX SETUP
D-RIGHT-IO
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/DIRECT,ASEL/RIGHT-2
D-RIGHT-9
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/DIRECT,ASEL/RIGHT-l
D-RIGHT-8
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/DIRECT,ASEL/DIRECT
D-RIGHT-7
::= AEN/CMUX,AMUX/RIGHT-8,
BMUX/DIRECT,ASEL/LEFT-l
1SENDMUX SETUP
D-RIGHT-6
::= AEN/CMUX,AMUX/DIRECT,
BMUX/RIGHT-4,ASEL/RIGHT-2
D-RIGHT-S
::= AEN/CMUX,AMUX/DIRECT,
BMUX/RIGHT-4,ASEL/RIGHT-l
D-RIGHT-4
::= AEN/CMUX,AMUX/DIRECT,
BMUX/RIGHT-4,ASEL/DIRECT
D-RIGHT-3
::= AEN/CMUX,AMUX/DIRECT,
BMUX/RIGHT-4,ASEL/LEFT-l
1SENDMUX SEWP
D-RIGHT-2
::= AEN/CMUX,AMUX/DIRECT,
BMUX/DIRECT,ASEL/RIGHT-2
D-RIGHT-l
::= AEN/CMUX,AMUX/DIRECT,
BMUX/DIRECT,ASEL/RIGHT-l
D-NO-SHIFT
::= AEN/CMUX,AMUX/DIRECT,
BMUX/DIRECT,ASEL/DIRECT
D-DIRECT
: : = D-NO-SHIFT
D-LEFT-l
::= AEN/CMUX ,AMUX/DIRECT ,
BMUX/DIRECT,ASEL/LEFT-l
ISENDMUX SETUP
D-SWAB
::= AEN/CMUX ,AMUX/SWAB,
BMUX/DIRECT,ASEL/DIRECT
D-SWAB-RIGHT-3
::= AEN/CMUX,AMUX/SWAB,
BMUX/RIGHT-4,ASEL/LEFT-l
1SENDMUX SETUP
D-SWAB-LEFT-l
::= AEN/(}1UX,~ruX/SWAB,
BMUX/DIRECT,ASEL/LEFT-l
1SENDMUX SETUP
D-SIGNEXT
::= AEN/CMUX,AMUX/SIGNEXT,
BMUX/DIRECT,ASEL/DIRECT
D-SIGNEXT-RIGHT-1
::= AEN/CMUX,AMUX/SIGNEXT,

Page B-31

THE 11/60 PREDEFINITIONS
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351

•MACRO

D-SIGNEXT-LEFT-l

::=

•MACRO

NO-SHIFT

::=

•MACRO
.MACRO

DIRECT
COUNT#D[HI]

: :=

•MACRO

COUNT#D [10]

::=

•roc

!N.B.:
.MACRO

::=

BMUX/DIRECT,ASEL/RIGHT-l
AEN/CMUX,AMUX/SIGNEXT,
BMUX/DIRECT,ASEL/LEFT-l
!SENDMUX SETUP
AEN/CMUX,
BMUX/DIRECT,ASEL/DIRECT
NO-SHIFT
AEN/CMUX,AMUX/COUNTER#D[HI] ,
BMUX/DIRECT,ASEL/DIRECT
AEN/CMUX,AMUX/COUNTER#D[1O] ,
BMUX/DIRECT ,ASEL/DIRECT

FIRST TVl) LEVELS ONLY [AMUX,
BMUX]
FOR USE WHEN SHIFTING SR RIGHT, SR<IS> <- BMUX<OO>
D-DIRECT[BMUX]
::= AMUX/DIRECT,
BMUX/DIRECT

!=======================================================================
.roc
*
ALU FUNCTIONS
! [SEE FIELD DESCRIPTION OF "ALU" FOR FULL DESCRIPTION]
.MACRO
ZERO
::= ALU/ZERO
.MACRO A-XOR-B
: : = ALU/A-XOR-B
.MACRO B
::= ALU/B
.MACRO A-AND-B
: : = ALU/A-AND-B
.MACRO A-IOR-B
::= ALU/A-IOR-B
•MACRO A
:: = ALU/A
•MACRO NOT-A
: : = ALU /NOr-A
•MACRO NOT-A-AND-B
::= ALU/NOT-A-AND-B
.MACRO A-AND-NOT-B
::= ALU/A-AND-NOT-B
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

DIVIDE
A-PLUS-B
A-MINUS-B
A-PLUS-B-PLUS-PS[C]
A-PLUS-B-PLUS-D[C]
A-PLUS-NOT-B-PLUS-D[C]
A-PLUS-B-PLUS-l

: :=

ALU/DIVIDE

: : = ALU/A-PLUS-B
: :=
: :=
: :=
: :=
: :=

ALU/A-MINUS-B
ALU/A-PLUS-B-PLUS-PS[C]
ALU/A-PLUS-B-PLUS-D[C]
ALU/A-PLUS-NOT-B-PLUS-D[C]
ALU/A-PLUS-B-PLUS-l

•roc
*
COUT GENERATION
! [SEE FIELD DESCRIPTION OF "COUT" FOR FULL DESCRIPTION]
.MACRO COUT CIN
: : = COUT/CIN
.MACRO cour-ps [C]
::= COUT/PS [C]
•MACRO COOT-ALUOO
::= COUT/ALUOO
.MACRO cOur-ALU07
::= COUT/ALU07
.MACRO COOT-ALUIS
::= COUT/ALUIS
•MACRO COureoUT07
::= COUT/COUT07
.MACRO COUT-COUTI5
::= COUT/COUTI5
.MACRO COUT=D [C]
::= COUT/D [C]

THE 11/60 PREDEFINITIONS
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403

Page B-32

!=======================================================================
•'!DC

• '!DC

*
CLK-D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

• 'lOC

.MACRO
•MACRO

.'lOC

CIOCKS

BASIC REGISTER CLOCKS [D, SR, BA, CC]
: := CLKD/YES
!MUST SPECIFY P2 T OR P3 T
CLK-SR
: : = CLKSR/YES
!MUST SPECIFY P2 T OR P3 T
CLK-BA
: : = CLKBA/YES
!AT PI T ONLY
SET-CC
::= SCC/YES
! SETUP HERE, CLOCKED AT P2 T
! **OF NE}ff UWJRD** ONLY
CLK-CC
::= NULL
! IN NEXT UWJRD, FOR IX:x:UMENTATION

*
REDEFINED FROM SP REWRITE FIELD [RES, COUNTER]
LOAD-RES
::= MOD/LOADREG,LOADRES/YES
!AT P2 T ONLY, FROM B-BUS<14:11>
LOAD-COUNTER
: : = MOD/IDADREG, IDADCOUNT/yES
!DURING ENTIRE UWJRD, FROM B-BUS<7:0>

RES REGISTER CONTROL VALUES [FROM EMIT]

!IDADED VIA: EMIT<14:11> -> CSP[XX]<14:11> -> B-BUS<14:11> -> RES<3:0>
.MACRO SENDMUX-0123-SEL
::= EMIT14/1
! FOR SHIFT TREE
.MACRO SENDMUX-4567-SEL
::= EMITI4/0
! FOR SHIFT TREE
.MACRO SR-IDAD
::= EMITI3/0,EMITI2/0
! FOR SR/GUARD
•MACRO SR-LEFT
::= EMITI3/0,EMITI2/1
! FOR SR/GUARD
.MACRO SR-RIGHT
::= EMITI3/1,EMITI2/0
! FOR SR/GUARD
•MACRO SR-NOP
::= EMITI3/1,EMITI2/1
! FOR SR/GUARD
.MACRO GUARD-EN
::= EMIT11/1
! FOR SR/GUARD
•MACRO GUARD-DIS
::= EMITll/0
!FOR SR/GUARD

THE 11/60 PREDEFINITIONS
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440

Page B-33

*
CC CONTROL [FROM EMIT]
!USED VIA: BUS-U37-H -) EMIT07-H -) MODIFY-V(I)-H
.MACRO MODIFY-VB IT
::= EMIT07/1
.MACRO NOT-MODI FY-VBIT
::= EMIT07/0
• TOe

!=======================================================================
• TOe

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

BUS CONTROL MACROS
*
DATI-CLKIR
: := BEGIN/YES,SELECT/BUS,BUSCODE/DATI-CLKIR
DATI-NOINT
: := BEGIN/YES,SELECT/BUS,BUSCODE/DATI-NOINT
DATI
: := BEGIN/¥ES,SELECT/BUS,BUSCODE/DATI
DATI[P]
:: = BEGIN/YES,SELECT/BUS,BUSCODE/DATI[P]
!WITH ALTER/ALLOWED
DATO
: := BEGIN/YES,SELECT/BUS,BUSCODE/DATO
DATIB
: : = BEGIN/YES,SELECT/BUS,BUSCODE/DATIB
DATIB[P]
: : = BEGIN/YES,SELECT/BUS,BUSCODE/DATIB[P]
!WITH ALTER/ALLOWED
DATIP
: := BEGIN/YES,SELECT/BUS,BUSCODE/DATIP
DATOB
: := BEGIN/YES,SELECT/BUS,BUSCODE/DATOB
INVALIDATE
: := BEGIN/YES,SELECT/BUS,BUSCODE/INVALIDATE

!=======================================================================
• TOe
*
UCON CONTROL MACROS

•MACRO

SET-UCON-CQNTROL

::= BEGIN/YES,SELECT/UCON,UCON-LOAD/YES

•MACRO

UCON-oPE RAT ION

: :=

! WAD UCON CONTROL REGISTER AT PO
BEGIN/YES,SELECT/UCON,UCON-XFER/YES
!PERFORM UCON OPERATION

THE 11/60 PREDEFINITIONS
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496

.'!DC
.MACRO

•MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
•MACRO
.MACRO

Page B-34

*
PROCESSOR UCON CONTROL SETUP
UCON-PROC
::= UCON-SEL-PROC/YES
!SELECT PROCESSOR
EN-CLK-IR[15-00]
::= UCONI5/1
!ENABLE OPERATIONS
EN-CLK-PS[15-12]
::= UCONI4/1
EN-CLK-FLAG[8-0]
::= UCONI3/1
EN-CLK-FPS[7-4]
::= UCONI2/1
EN-CLK-PS[7-4]
::= UCONll/l
::= UCONI0/l
EN-CLK-PS[3-0]
EN-CLK-UBREAK [11-00]
::= UCON09/1
!UCON<8:7> ARE NOT USED IN PROCESSOR CONTROL
BUSDIN EMIT[15-00]
::= UCON06/0,UCON05/0 !HBMUX SELECT
BUSDIN-CUA[14-03]
::= UCON06/0,UCON05/1
BUSDIN-PS[15-00]
::= UCON06/1,UCON05/0
BUSDIN=FLAG[8-0]#FPS[7-0] ::= UCON06/1,UCON05/1

.MACRO

*
CACHE/KT UCON CONTROL
UCON-cACHE-KT
::= UCON-SEL-CACHEKT/YES
!SELECT CACHE / KT UCON FUNCTION
!UCON<IS> NOT USED HERE
EN-KT-NO-REIDCATE
: : = UCONI4/1
! INHIBIT KT FROM ANY RELOCATION OF BA - > PBA
BUSDIN_BUS-INTERNAL-ADDR[15-00] ::= UCONI3/0,UCONI2/1
! FROM INTERNAL ADDR ROM
BUSDIN CPU-INTERNAL-ADDR[15-00] ::= UCONI3/1,UCONI2/1
! DITID •••
BUSDIN_MMR2[15-00]
::= UCONll/l,UCON09/0
!VIRTUAL PC
BUSDIN_CACHE-STATUS[15-00]
::= UCONll/l,UCON09/1
!CACHE INFO
BUSDIN KT-SEL
::= UCONI0/l
!FOR PAR-S, PDR-S ETC
KT-wRITE-HIGH
::= UCON08/1
!WRITE REGISTER <15:08>
KT-WRITE-IDW
:: = UCON07/1
!WRITE REGISTER <07:00>
KT-WRITE
::= UCON08/1,UCON07/1
!WRITE REGISTER <15:00>
KT-SEL-SLR#CCR
::= UCON06/0,UCON05/0
!SELECT KT-MUX OUTPUT
KT-SEL-MMRO
::= UCON06/0,UCON05/1

.MACRO

KT-SEL-PDR

::= UCON06/1,UCON05/0

.MACRO

KT-SEL-PAR

::= UCON06/1,UCON05/1

.'!DC
.MACRO

.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO

Page B-35

THE 11/60 PREDEFINITIONS
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549

I/O UCON CONTROL
::= UCON-SEL-I-o/YES

.MACRO

UCON-I-o

.IDC
•MACRO
.MACRO
.MACRO

*
BUS CONTROL
EN-LOAD-DBUF [15-00]
::= UCON15/1
!EN LOAD DBUF AT P3
BUSDIN DBUF [15-00]
::= UCON15/1
!DBUF ON BUSDIN
EN-STATUS-MUX
::= UCON15/0
!STATUS-MUX ENABLE ON BUSDIN
!UCON<14:11> ARE NOT USED IN UCON BUS CONTROL
BUSDIN SERVICE[15-00]
::= UCONIO/0,UCON09/1
BUSDIN-JAM[15-00]
::= UCON10/1,UCON09/0
BUSDIN-PBA[15-00]
::= UCON10/1,UCON09/1
DMUX CACHEDATA[15-00]
::= UCONOS/l
EN-BC-FCN-O
::= UCON07/0,UCON06/0,UCON05/0
! SELEcr BUS CONTROL FUNCTION
::= UCON07/0,UCON06/0,UCON05/1
EN-STARr-DEIAY
::= UCON07/0,UCON06/1,UCON05/0
EN-CLR-JAM-ERRORS
::= UCON07/0,UCON06/1,UCON05/1
EN-CLR-NPR~IMEOUT
::= UCON07/1,UCON06/0,UCON05/0
EN-CLR-PWR-FAIL
::= UCON07/1,UCON06/0,UCON05/1
EN-CLR-YE LLOW-Z ONE
::= UCON07/1,UCON06/1,UCON05/0
EN-ALLOW-BG[l]H
::= UCON07/1,UCON06/1,UCON05/1
EN-BUS-INIT-UCON

.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
•MACRO
•MACRO
.MACRO
.MACRO
.MACRO
.MACRO
•MACRO

.MACRO

*
CONSOLE 1-0
EN-CONSOLE-COMMAND

!SELECT 1-0 CONTROL

::= UCON15/0,UCON14/0

!SETS UP UCON 1-0 BITS FOR CONSOLE COMMANDS
!ALSO SELECTS STATUS-MUX ON BUSDIN
.MACRO

EN-cNSL-NOP

::= UCON13/0,UCON12/0,UCON11/0

.MACRO

EN-CLR-COUNTR

::= UCON13/0,UCON12/0,UCONll/1

.MACRO

EN-INCR-COUNTR

::= UCON13/0,UCON12/1,UCON11/0

.MACRO

EN-CLR-CNSL-SRVC

!ENABLE CONSOLE NO OPERATION
!ENABLE CLEAR DIGIT PAIR COUNTER

.MACRO
.MACRO
•MACRO
.MACRO
.MACRO

!ENABLE BUMP TO NEXT DIGIT PAIR
::= UCON13/0,UCON12/1,UCON11/1
! ENABLE CLEAR CONSOLE SERVICE RQST FLOP
EN-STRB-DISP
::= UCON13/1,UCON12/0,UCON11/0
!ENABLE WRITE DIGIT PAIR TO DISPIAY LATCH
EN-CLR-cNSL
::= UCON13/1,UCON12/0,UCONll/1
! ENABLE CLEAR CONSOLE LED
EN-SET-cNSL
::= UCON13/1,UCON12/1,UCON11/0
!ENABLE SET CONSOLE LED
EN-SET-DP
::= UCON13/1,UCON12/1,UCON11/1
!ENABLE SET ALL DP LEOS
BUSDIN_CONSOLE[06-00]
::= UCON10/0,UCON09/0
! srATUS-MUX SELEcr
!UCON<8:5> ARE NOT USED IN UCON CONSOLE CONTROL

Page B-36

THE 11/60 PREDEFINITIONS
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
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1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602

• TOe

IN.B. :
•MACRO
•MACRO
•MACRO

*
REMOTE CONSOLE INTERFACE
"EN CONSOLE COMMAND" OOES Nar APPLY TO REMarE CONSOLE
EN-REMSTRB
::= UCONI4/1
lEN REMmE CONSOLE STROBE
EN-REMCODEI
::= UCONI2/1
lEN SPECIAL CODE 1
EN-REMOODEO
::= UCONll/l
lEN SPECIAL CODE 0

1=======================================================================

*
MICROBRANCH FIELD MACROS
1 [SEE <UBF> FIELD DESCRIPrION FOR FULL INFO]

.TOe

::= UBF/@XX 1INACTIVE, FULL WIDrH
UBF/@XX 1INAcrIVE, RESTRICTED WIDrH

•MACRO
•MACRO

BUT (XX)
BUTR(XX)

:: =

•MACRO
•MACRO

BUTA(XX)
BUTRA(XX)

: :=
: :=

•MACRO

TEST (XX)

:: =

•MACRO

BUTM(XX)

UBF/@XX lAcrIVE, FULL WIDrH
UBF/@XX 1AcrIVE , RESTRICTED WIDTH

MULTIPLE/@XX
1FOR BUTR (MULTIPLE) SETUP
: : = MULTIPLE/@XX,UBF/@XX
lA MULTIPLE BUTR

1=======================================================================

• '!DC

*
*

•MACRO
•MACRO

SR
FLTPT

OTHER SOURCES ENABLED FOR A-BUS
::= AEN/XMUX,ASELO/SR
::= AEN/XMUX,ASELO/FLTPT

• TOe

PAGING, RETURN REGISTER

.MACRO

IPAGE FIELD ONLY:
PAGE (X)

.MACRO

IPAGE FIELD AND BUT [SUBR B] :
GOTO-PAGE(X)
::= NEXT-PAGE/@X,UBF/SUBR-B

•MACRO

lRETURN REGISTER <- D<14:03>, PAGE <- EMIT<02:00> ON BUTA(SUBR-A)
RETURN_D[14-03]
::= UBF/SUBR-A

.MACRO

ISUBROUTINE CALL (PAGE MUST ALSO BE SPECIFIED)
CALL(SUB,RETURN)::=
BUT(SUBRA),J/@SUB,RETURN/@RETURN

• '!DC

MISCELLANEOUS

::= NEXT-PAGE/@X

THE 11/60 PREOEFINITIONS
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659

Page B-37

!=======================================================================
ADVANCED OPERATIONS

.'lOC

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

!N.B. : BUSDIN IS ANY BUT EMIT [OVERLAPS BSEL<1:0>]
CSPB[14] BUSDIN
: := CSPB(B14),WR-CSP
CSPB[15]-BUSDIN
: := CSPB(B15),WR-CSP
CSPB[16]-BUSDIN
: := CSPB(B16) ,WR-CSP
CSPB[17]-BUSDIN
: := CSPB(B17),WR-CSP
CSPB[MD]=BUSDIN
: := CSPB (MD) ,WR-CSP

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

!N .B. : GETS WHATEVER IS ON BUSDIN
CSPD[OO] BUSDIN
: := CSPD(DOO) ,WR-CSP
CSPD[Ol]-BUSDIN
: := CSPD(DOl),WR-CSP
CSPD[02]-BUSDIN
: := CSPD(D02),WR-CSP
CSPD [03] - BUSDIN
: := CSPD(D03),WR-CSP
CSPD[04]-BUSDIN
: := CSPD(D04),WR-CSP
CSPD[05]-BUSDIN
: := CSPD(D05),WR-CSP
CSPD[06]-BUSDIN
: := CSPD(D06),WR-CSP
CSPD[07]-BUSDIN
: := CSPD(D07) ,WR-CSP
CSPD[10]-BUSDIN
: := CSPD(DI0),WR-CSP
CSPD[ll]-BUSDIN
: := CSPD(Dll),WR-CSP
CSPD[12]-BUSDIN
: := CSPD(D12),WR-CSP
CSPD[13]-BUSDIN
: := CSPD(D13) ,WR-CSP
CSPD[14]-BUSDIN
: := CSPD(D14),WR-CSP
CSPD[15]-BUSDIN
: := CSPD(D15) ,WR-CSP
CSPD[16]-BUSDIN
: := CSPD(D16),WR-CSP
CSPD[17]-BUSDIN
: := CSPD(D17),WR-CSP
CSPD[MD]=BUSDIN
: := CSPD(D15),WR-CSP

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

!N.B.: REQUIRED THAT BUSDIN EMIT[15-00] PREVIOUSLY SET UP
CSPD [00] EMIT
: : = -CSPD(DOO),WR-CSP
CSPD [01] -EMIT
: : = CSPD(DOl) ,WR-CSP
CSPD [02]-EMIT
: := CSPD(D02),WR-CSP
CSPD [03 ]-EMIT
: := CSPD(D03),WR-CSP
CSPD[04]-EMIT
: := CSPD(D04) ,WR-CSP
CSPD [05] -EMIT
: := CSPD(D05),WR-CSP
CSPD[06]-EMIT
: := CSPD(D06),WR-CSP
CSPD [07] - EMIT
: := CSPD(D07) ,WR-CSP
CSPD[10]-EMIT
: := CSPD(DI0) ,WR-CSP
CSPD[ll]-EMIT
: := CSPO (Dll)· , WR-CSP
CSPD [12]-EMIT
: := CSPD(D12) ,WR-CSP
CSPD[13]-EMIT
: := CSPD(D13),WR-CSP
CSPD[14]-EMIT
: := CSPO(D14),WR-CSP
CSPD[15]-EMIT
: := CSPD(D15),WR-CSP
CSPD[16]-EMIT
: := CSPD(D16),WR-CSP
CSPD[17]-EMIT
: := CSPO(D17),WR-CSP
CSPD[MD]=EMIT(XX)
: := CSPO(D15),WR-CSP,EMIT/@XX

DATA INl'O CSP, AT P3 ONLY

THE 11/60 PREDEFINITIONS
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715

Page B-38

INrO ASP, BSP, AT P2-T * P3

• '!DC

•MACRO

ASPLO[17]_CSPB(XX)

•MACRO

ASPLO[17]_CSPD(XX)

•MACRO
•MACRO

PCD
R5-D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

ASPLO[OO] D
ASPLO [OI]-D
ASPLO [02]-D
ASPLO [03]-D
ASPLO [04]-D
ASPLO[05]-D
ASPLO [06]-D
ASPLO [07]-D
ASPLO[10]-D
ASPLO [11] -D
ASPLO[12]-D
ASPLO [13]-D
ASPLO[14]-D
ASPLO [15]-D
ASPLO[16]-D
ASPLO[17]=D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

ASPHI [00] D
ASPHI [OI]-D
ASPHI [02]-D
ASPHI [03]-D
ASPHI [04]-D
ASPHI [05]-D
ASPHI[06]D
ASPHI [07]-D
ASPHI [10]=D
ASPHI[11] D
ASPHI [12]-D
ASPHI [13]-D
ASPHI [14]-D
ASPHI [15]-D
ASPHI [16]-D
ASPHI [17]=D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
.t-1ACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

BSPLO[OO] D
BSPLO[Ol]-D
BSPLO[02]-D
BSPLO [03]-D
BSPLO [04]-D
BSPLO [05]-D
BSPLO [06]-D
BSPLO [07]-D
BSPLO [10]-D
BSPLO[II]-D
BSPLO [12]-D
BSPLO[13]=D

D~~A

B,ASPLO(Rl7),CSPB(@XX),
CLK-D,P2-T,WR(A,L,A)
: : = B,ASPLO(Rl7) ,CSPD(@XX),
CLK-D,P2-T,WR(A,L,A)
: : = PC-A,WR(AB,L,A)
: : = R5-A,WR(AB,L,A)
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=
: :=
: :=

: :=
: :=

: :=
: :=
: :=

: :=
: :=

: :=
: :=
: :=

: :=
: :=
: :=
: :=
: :=

: :=
: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=
: :=

ASP(ROO),WR(A,L,A)
ASP(ROl),WR(A,L,A)
ASP (R02) ,WR(A,L,A)
ASP(R03),WR(A,L,A)
ASP(R04),WR(A,L,A)
ASP(R05),WR(A,L,A)
ASP(R06),WR(A,L,A)
ASP(R07),WR(A,L,A)
ASP(RlO),WR(A,L,A)
ASP(Rll),WR(A,L,A)
ASP(Rl2),WR(A,L,A)
ASP(Rl3),WR(A,L,A)
ASP(Rl4),WR(A,L,A)
ASP(Rl5),WR(A,L,A)
ASP(Rl6),WR(A,L,A)
ASP(Rl7),WR(A,L,A)
ASP (ROO) ,WR(A,H,A)
ASP(ROl),WR(A,H,A)
ASP(R02),WR(A,H,A)
ASP(R03),WR(A,H,A)
ASP(R04),WR(A,H,A)
ASP (R05) ,WR(A,H,A)
ASP(R06),WR(A,H,A)
ASP(R07),WR(A,H,A)
ASP(RlO),WR(A,H,A)
ASP(Rll),WR(A,H,A)
ASP(Rl2),WR(A,H,A)
ASP(Rl3),WR(A,H,A)
ASP(Rl4),WR(A,H,A)
ASP(Rl5),WR(A,H,A)
ASP(Rl6),WR(A,H,A)
ASP(Rl7),WR(A,H,A)
BSP(ROO),WR(B,L,B)
BSP(ROl),WR(B,L,B)
BSP(R02),WR(B,L,B)
BSP(R03),WR(B,L,B)
BSP(R04),WR(B,L,B)
BSP(R05),WR(B,L,B)
BSP(R06),WR(B,L,B)
BSP(R07),WR(B,L,B)
BSP(RlO),WR(B,L,B)
BSP(Rll),WR(B,L,B)
BSP(Rl2),WR(B,L,B)
BSP(Rl3) ,WR(B,L,B)

THE 11/60 PREDEFINITIONS
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771

•MACRO
•MACRO
•MACRO
•MACRO

BSPID[14] D
BSPID [15]-D
BSPID[16]-D
BSPID[17]=D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

BSPHI[OO] D
BSPHI [Ol]-D
BSPHI [02]-D
BSPHI [03]-D
BSPHI [04]-D
BSPHI [05]-D
BSPHI [06]-D
BSPHI [07]-D
BSPHI[10]-D
BSPHI [ll]-D
BSPHI [12]-D
BSPHI [13]-D
BSPHI [14]-D
BSPHI [15]-D
BSPHI [16] - D
BSPHI[17]Y

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

A#BSPLO[OO] D
A#BSPLO[Ol]-D
A#BSPLO[02]-D
A#BSPLO[03]-D
A#BSPLO[04]-D
A#BSPLO[05]-D
A#BSPLO[06]-D
A#BSPLO [07]-D
A#BSPLO[10]-D
A#BSPLO[ll]-D
A#BSPLO[12]-D
A#BSPLO[13]-D
A#BSPLO[14]-D
A#BSPLO[15]-D
A#BSPID[16]-D
A#BSPLO[17]:=D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

A#BSPHI[OO] D
A#BSPHI [Ol]-D
A#BSPHI [02]-D
A#BSPHI[03]-D
A#BSPHI[04]-D
A#BSPHI [05]-D
A#BSPHI [06]-D
A#BSPHI [07] - D
A#BSPHI [10]-D
A#BSPHI [ll]-D
A#BSPHI[12]-D
A#BSPHI [13 ]=D
A#BSPHI[14] D
A#BSPHI [15]-D
A#BSPHI[16]-D
A#BSPHI [17]:=D

Page B-39
BSP(Rl4) ,WR(B,L,B)
BSP(Rl5),WR(B,L,B)
: := BSP(Rl6) ,WR(B,L,B)
: := BSP(Rl7),WR(B,L,B)
: :=
: :=

: :=

::=
: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=

: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=

::=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=
: :=

BSP(ROO) ,WR(B,H,B)
BSP(R01) ,WR(B,H,B)
BSP(R02),WR(B,H,B)
BSP(R03) ,WR(B,H,B)
BSP(R04) ,WR(B,H,B)
BSP(R05),WR(B,H,B)
BSP(R06) ,WR(B,H,B)
BSP(R07),WR(B,H,B)
BSP(RlO) ,WR(B,H,B)
BSP(Rl1),WR(B,H,B)
BSP(Rl2),WR(B,H,B)
BSP(Rl3) ,WR(B,H,B)
BSP(Rl4) ,WR(B,H,B)
BSP(Rl5),WR(B,H,B)
BSP(Rl6),WR(B,H,B)
BSP(Rl7),WR(B,H,B)
ASP(ROO),BSP(ROO) ,WR(AB,L,A)
ASP(R01),BSP(R01) ,WR(AB,L,A)
ASP(R02),BSP(R02),WR(AB,L,A)
ASP (R03) ,BSP(R03) ,WR(AB,L,A)
ASP(R04),BSP(R04) ,WR(AB,L,A)
ASP (R05) ,BSP(R05) ,WR(AB,L,A)
ASP (R06) ,BSP(R06) ,WR(AB,L,A)
ASP (R07) ,BSP(R07) ,WR(AB,L,A)
ASP (RlO) ,BSP(RlO) ,WR(AB,L,A)
ASP(Rl1),BSP(Rl1) ,WR(AB,L,A)
ASP (Rl2) ,BSP(Rl2) ,WR(AB,L,A)
ASP (Rl3) ,BSP(Rl3) ,WR(AB,L,A)
ASP (Rl4) ,BSP (Rl4) ,WR(AB,L,A)
ASP (Rl5) ,BSP(Rl5) ,WR(AB,L,A)
ASP(Rl6),BSP(Rl6),WR(AB,L,A)
ASP (Rl7) ,BSP(Rl7) ,WR(AB,L,A)
ASP (ROO) ,BSP(ROO) ,WR(AB,H,A)
ASP (R01) ,BSP(R01) ,WR(AB,H,A)
ASP(R02),BSP(R02),WR(AB,H,A)
ASP(R03),BSP(R03) ,WR(AB,H,A)
ASP(R04),BSP(R04) ,WR(AB,H,A)
ASP(R05),BSP(R05),WR(AB,H,A)
ASP(R06),BSP(R06),WR(AB,H,A)
ASP (R07) ,BSP (R07) ,WR (AB, H, A)
ASP (RlO) ,BSP(RlO) ,WR(AB,H,A)
ASP (Rl1) ,BSP(Rl1),WR(AB,H,A)
ASP (Rl2) ,BSP(Rl2) ,WR(AB,H,A)
ASP (Rl3) ,BSP(Rl3) ,WR(AB,H,A)
ASP (Rl4) ,BSP(Rl4) ,WR(AB,H,A)
ASP (Rl5) ,BSP (RlS) ,WR(AB,H,A)
ASP(Rl6),BSP(Rl6),WR(AB,H,A)
ASP(Rl7),BSP(Rl7),WR(AB,H,A)

THE 11/60 PREDEFINITIONS
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

A#BSPLO[OO] n-[A]
A#BSPLO[Ol]-D-[A]
A#BSPLO[02]-D-[A]
A#BSPLO[03]-n-[A]
A#BSPLO[04]-n-[A]
A#BSPLO[05]-n-[A]
A#BSPLO[06]-D-[A]
A#BSPLO[07]-D-[A]
A#BSPLO[10]-D-[A]
A#BSPLO[ll]-D-[A]
A#BSPLO[12]-D-[A]
A#BSPLO[13]-n-[A]
A#BSPLO[14]-D-[A]
A#BSPLO[15]-D-[A]
A#BSPLO[16]-n-[A]
A#BSPLO[17]=D-[A]

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

A#BSPHI[OO] D-[A]
A#BSPHI[Ol]-n-[A]
A#BSPHI[02]-D-[A]
A#BSPHI[03]-D-[A]
A#BSPHI[04]-n-[A]
A#BSPHI[05]-n-[A]
A#BSPHI[06]-D-[A]
A#BSPHI[07]-n-[A]
A#BSPHI[10]-D-[A]
A#BSPHI[ll]-D-[A]
A#BSPHI[12]-D-[A]
A#BSPHI[13]-D-[A]
A#BSPHI[14]-n-[A]
A#BSPHI[15]-n-[A]
A#BSPHI[16]-D-[A]
A#BSPHI[17]=D-[A]

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

A#BSPLO[OO] n-[B]
A#BSPLO[Ol]-D-[B]
A#BSPLO[02]-n-[B]
A#BSPLO[03]-D-[B]
A#BSPLO[04]-n-[B]
A#BSPLO[05]-n-[B]
A#BSPLO[06]-D-[B]
A#BSPLO[07]-D-[B]
A#BSPLO[10]-D-[B]
A#BSPLO[11]-n-[B]
A#BSPLO[12]-n-[B]
A#BSPLO[13]-o-[B]
A#BSPLO[14]-n-[B]
A#BSPLO[15]-n-[B]
A#BSPLO[16]-n-[B]
A#BSPLO[17]=n-[B]

Page B-40
: :=
:: =
: :=
:: =

: :=
:: =
: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=

:: =
: :=

: :=
: :=

: :=
: :=
: :=

: :=
: :=
:: =

: :=
: :=
: :=
: :=
: :=
: :=
: :=
:: =

ASP(ROO),WR(AB,L,A)
ASP (R01) ,WR(AB,L,A)
ASP(R02),WR(AB,L,A)
ASP(R03),WR(AB,L,A)
ASP(R04),WR(AB,L,A)
ASP(R05),WR(AB,L,A)
ASP(R06),WR(AB,L,A)
ASP(R07),WR(AB,L,A)
ASP (RlO) ,WR(AB,L,A)
ASP (Rll) ,WR(AB,L,A)
ASP(Rl2),WR(AB,L,A)
ASP(Rl3),WR(AB,L,A)
ASP(Rl4),WR(AB,L,A)
ASP (Rl5) ,WR(AB,L,A)
ASP (Rl6) ,WR(AB,L,A)
ASP(Rl7),WR(AB,L,A)
ASP(ROO),WR(AB,H,A)
ASP (ROl) ,WR(AB,H,A)
ASP(R02),WR(AB,H,A)
ASP(R03),WR(AB,H,A)
ASP (R04) ,WR(AB,H,A)
ASP(R05),WR(AB,H,A)
ASP(R06),WR(AB,H,A)
ASP(R07),WR(AB,H,A)
ASP(RlO),WR(AB,H,A)
ASP(Rll),WR(AB,H,A)
ASP(Rl2),WR(AB,H,A)
ASP(Rl3),WR(AB,H,A)
ASP(Rl4),WR(AB,H,A)
ASP(Rl5),WR(AB,H,A)
ASP (Rl6) ,WR(AB,H,A)
ASP (Rl7) ,WR(AB,H,A)
BSP(ROO),WR(AB,L,B)
BSP(R01),WR(AB,L,B)
BSP(R02),WR(AB,L,B)
BSP(R03),WR(AB,L,B)
BSP(R04),WR(AB,L,B)
BSP(R05),WR(AB,L,B)
BSP(R06),WR(AB,L,B)
BSP(R07),WR(AB,L,B)
BSP (RlO) ,WR(AB,L,B)
BSP (Rll) ,WR(AB,L,B)
BSP(Rl2),WR(AB,L,B)
BSP(Rl3),WR(AB,L,B)
BSP(Rl4),WR(AB,L,B)
BSP(Rl5),WR(AB,L,B)
BSP(Rl6),WR(AB,L,B)
BSP(Rl7),WR(AB,L,B)

THE 11/60 PREDEFINITIONS
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870

Page B-41

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

A#BSPHI[OO] D-[B]
A#BSPHI[Ol]-D-[B]
A#BSPHI[02]-D-[B]
A#BSPHI[03]-D-[B]
A#BSPHI[04]-D-[B]
A#BSPHI[05]-D-[B]
A#BSPHI[06]-D-[B]
A#BSPHI[07]-D-[B]
A#BSPHI[10]-D-[B]
A#BSPHI[ll]-D-[B]
A#BSPHI[12]-D-[B]
A#BSPHI[13]-D-[B]
A#BSPHI[14]-D-[B]
A#BSPHI[15]-D-[B]
A#BSPHI[16]-D-[B]
A#BSPHI[17]=D-[B]

•MACRO
•MACRO
•MACRO
•MACRO

ASPLO[DF]_D
ASPHI[DF] D
BSPLO[DF]-D
BSPHI[DF]=D

: :=
: :=
: :=

•MACRO
•MACRO
•MACRO
•MACRO

ASPLO [SF] D
ASPHI[SF]-D
BSPLO[SF]-D
BSPHI [SF]=D

: :=
: :=
::=
: :=

•MACRO
•MACRO
•MACRO
•MACRO

A#BSPLO[DF] D-[A]
A#BSPHI[DF]-D-[A]
A#BSPLO[DF]-D-[B]
A#BSPHI[DF]=D-[B]

:: =
: :=

•MACRO
•MACRO
•MACRO
•MACRO

A#BSPLO[SF] D-[A]
A#BSPHI[SF]-D-[A]
A#BSPLO[SF]-D-[B]
A#BSPHI[SF]=D-[B]

: :=
: :=

•MACRO

A#BSPLO[SF]_D

•MACRO

A#BSPLO[DF]_D

•MACRO

A#BSPHI[SF]_D

•MACRO

A#BSPHI[DF]_D

: :=
: :=
: :=
: :=

: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=
: :=
: :=

: :=

BSP(ROO),WR(AB,H,B)
BSP(ROl) ,WR(AB,H,B)
BSP(R02) ,WR(AB,H,B)
BSP(R03),WR(AB,H,B)
BSP(R04) ,WR(AB,H,B)
BSP(R05) ,WR(AB,H,B)
BSP(R06),WR(AB,H,B)
BSP(R07),WR(AB,H,B)
BSP(RlO),WR(AB,H,B)
BSP(Rll),WR(AB,H,B)
BSP(Rl2) ,WR(AB,H,B)
BSP(Rl3) ,WR(AB,H,B)
BSP (Rl4) ,WR(AB,H,B)
BSP(Rl5) ,WR(AB,H,B)
BSP(Rl6) ,WR(AB,H,B)
BSP(Rl7),WR(AB,H,B)

ASP-ADDRS-R[DF],WR(A,L,A)
ASP-ADDRS-R[DF],WR(A,H,A)
BSP-ADDRS-R[DF],WR(B,L,B)
: := BSP-ADDRS-R[DF],WR(B,H,B)
ASP-ADDRS-R[SF],WR(A,L,A)
ASP-ADDRS-R[SF] ,WR(A,H,A)
BSP-ADDRS-R[SF],WR(B,L,B)
BSP-ADDRS-R[SF],WR(B,H,B)

ASP-ADDRS-R[DF],WR(AB,L,A)
ASP-ADDRS-R[DF],WR(AB,H,A)
BSP-ADDRS-R[DF],WR(AB,L,B)
: : = BSP-ADDRS-R[DF],WR(AB,H,B)
: :=

ASP-ADDRS-R[SF],WR(AB,L,A)
ASP-ADDRS-R[SF] ,WR(AB,H,A)
BSP-ADDRS-R[SF],WR(AB,L,B)
: : = BSP-ADDRS-R[SF] ,WR(AB,H,B)
: :=

ASP-ADDRS-R[SF] ,
BSP-ADDRS-R[SF],WR(AB,L,A)
: := ASP-ADDRS-R [DF] ,
BSP-ADDRS-R[DF],WR(AB,L,A)
: := ASP-ADDRS-R[SF] ,
BSP-ADDRS-R[SF],WR(AB,H,A)
: := ASP-ADDRS-R [DF] ,
BSP-ADDRS-R[DF],WR(AB,H,A)
: :=

Page B-42

THE 11/60 PREDEFINITIONS
1871
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930

!=======================================================================
.'IOC

D AND SR <- (BUS-A FCN BUS-B), AT P2-T OR P3-T

!LOGIC FUNCTIONS:
SR ZERO
SR A-XOR-B
SR B
SRA-AND-B
SR-A-IOR-B
SR A
SR-NOT-A
SR-NOT-A-AND-B
SR A-AND-NOT-B
D ZERO
D A-XOR-B
D B

D A-AND-B
D A-IOR-B
DA
D-NOT-A
D Nar-A-AND-B
D-A-AND-NOT-B

::= ZERO,CLK-SR
::= A-XOR-B,CLK-SR
::= B,CLK-SR
::= A-AND-B,CLK-SR
::= A-IOR-B,CLK-SR
: := A,CLK-SR
::= NOT-A,CLK-SR
::= NOT-A-AND-B,CLK-SR
::= A-AND-NOT-B,CLK-SR
::= ZERO,CLK-D
::= A-XOR-B,CLK-D
::= B,CLK-D
::= A-AND-B,CLK-D
::= A-IOR-B,CLK-D
::= A,CLK-D
::= NOT-A,CLK-D
::= NOT-A-AND-B,CLK-D
::= A-AND-NOT-B,CLK-D

!ARITH FUNCTIONS:
D DIVIDE-STEP
D A-PLUS-B
D-A-PLUS-B-PLUS-O
D A-MINUS-B
DA-PLUS-B-PLUS-PS[C]
D-A-PLUS-B-PLUS-D[C]
D-A-PLUS-NOT-B-PLUS-D[C]

::= DIVIDE ,CLK-D

D-A-PLUS~B-PLUS-l

SR DIVIDE-STEP
SR A-PLUS-B
SR-A-PLUS-B-PLUS-O
SR-A-MINUS-B
SR-A-PLUS-B-PLUS-PS[C]
SR-A-PLUS-B-PLUS-D[C]

S~A-PLUS-NOT-B-PLUS-D[C]

SR-A-PLUS-B-PLUS-l

::= A-PLUS-B,CLK-D
::= A-PLUS-B,CLK-D
::= A-MINUS-B,CLK-D
::= A-PLUS-B-PLUS-PS[C],CLK-D
::= A-PLUS-B-PLUS-D[C],CLK-D
::= A-PLUS-NOT-B-PLUS-D[C] ,CLK-D
::= A-PLUS-B-PLUS-1,CLK-D
::= DIVIDE,CLK-SR
::= A-PLUS-B,CLK-SR
::= A-PLUS-B,CLK-SR
::= A-MINUS-B,CLK-SR
::= A-PLUS-B-PLUS-PS[C],CLK-SR
::= A-PLUS-B-PLUS-D[C],CLK-SR
::= A-PLUS-NOT-B-PLUS-D[C] ,CLK-SR
::= A-PLUS-B-PLUS-l,CLK-SR

D[C] GETS SET

.'IOC

•MACRO
•MACRO

D[C] CINMUX
D[Cl=l

•MACRO

D[C]_O

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

D [C] PS [C]
D[C]-ALUOO
D[C]-ALU07
D[C]-ALU15
D[C]-COUT07
D[C]-COUT15
D[C]-D[C]
SAVE=D[C]

::= CLK-D,COUT_CIN
CLK-D,COUT cm
!NEEDS SPECIFIC ALU/--: : = CLK-D ,COUT cm
!NEEDS SPECIFIC ALU/--::= CLK-D,COUT PS[C]
::= CLK-D,COUT-ALUOO
::= CLK-D,COUT-ALU07
::= CLK-D,COUT-ALU15
::= CLK-D,COUT-COUT07
: : = CLK-D , COUT- COUT15
::= CLK-D,COUT-D[C]
::= CLK-D,COUT=D[C]
::=

Page B-43

THE 11/60 PREDEFINITIONS
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972

•TOe

•MACRO
•MACRO

!N•B. : SHIFT TREE ENABLED SEPARATELY
D D-SHIFTED-XOR-CSPB(XX)::=" A-XOR-B,CSPB(@XX),CLK-D
D~-SHIFTED-XOR-BSPHI(XX)::= A-XOR-B,BSPHI(@XX),CLK-D

•MACRO
•MACRO
•MACRO

D_FLTPT-XOR-CSPB(XX)
D_FLTPT-XOR-CSPD(XX)
D_F LTPT-XOR-BS PH I (XX)

::= A-XOR-B,FLTPT,CSPB(@XX),CLK-D
::= A-XOR-B,FLTPT,CSPD(@XX) ,CLK-D
::= A-XOR-B,FLTPT,BSPHI(@XX),CLK-D

•MACRO
•MACRO
•MACRO

D~R-XOR-CSPB(XX)

o SR-XOR-CSPD(XX)

::= A-XOR-B,SR,CSPB(@XX),CLK-D
::= A-XOR-B,SR,CSPD(@XX) ,CLK-D
::= A-XOR-B,SR,BSPHI(@XX) ,CLK-D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

D-REGISTER <- [BBUS = ABUS] , BI'lWISE, AT P2-T OR P3-T

D=SR-XOR-BSPHI(XX)

o ASPLO[17]-XOR-CSPD(XX)::= A-XOR-B,ASPLO(Rl7),CSPD(@XX),CLK-D
D-ASPLO[07]-XOR-BSPHI(XX)::= A-XOR-B,ASPLO(R07),BSPHI(@XX),CLK-D
D=ASPLO[05]-XOR-BSPHI(XX)::= A-XOR-B,ASPLO(R05),BSPHI(@XX),CLK-D

°D~R-XOR-BSPHI[DF]
SR-XOR-BSPLO[SF]

::= A-XOR-B,SR,R[SF]-LO-B,CLK-D
::= A-XOR-B,SR,R[DF]-HI-B,CLK-D

•MACRO
•MACRO

o ASPLO[DF]-XOR-BSPHI[SF]::= A-XOR-B,R[DF]-LO-A,R[SF]-HI-B,CLK-D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

o CSPD[05]-XOR-ASPLO(XX)::=
D-CSPD[05]-XOR-ASPHI(XX)::=
D-CSPD[06]-XOR-ASPLO(XX)::=
D-CSPD[06]-XOR-ASPHI(XX)::=
D=CSPD[17]-XOR-ASPHI(XX)::=

•MACRO
•MACRO
•MACRO
•MACRO

o ASPLO[02]-XOR-BSPLO(XX)::= A-XOR-B,ASPLO(R02),BSPLO(@XX),CLK-D

D=ASPHI[SF]-XOR-BSPLO[DF]::= A-XOR-B,R[SF]-HI-A,R[DF]-LO-B,CLK-D
A-XOR-B,CSPD(D05) ,ASPLO(@XX),CLK-D
A-XOR-B,CSPD(D05) ,ASPHI(@XX),CLK-D
A-XOR-B,CSPD(D06) ,ASPLO(@XX)iCLK-D
A-XOR-B,CSPD(D06) ,ASPHI(@XX),CLK-D
A-XOR-B,CSPD(D17),ASPHI(@XX),CLK-D

D-ASPLO[03]-XOR-BSPLO(XX)::= A-XOR-B,ASPLO(R03) ,BSPLO(@XX),CLK-D
D-ASPLO[04]-XOR-BSPLO(XX)::= A-XOR-B,ASPLO(R04),BSPLO(@XX),CLK-D
D=ASPLO[05]-XOR-BSPLO(XX)::= A-XOR-B,ASPLO(R05),BSPLO(@XX),CLK-D

THE 11/60 PREDEFINITIONS
1973 .'IOC
1974
1975 •MACRO
1976 •MACRO
1977 •MACRO
1978 •MACRO
1979 •MACRO
1980 •MACRO
1981 •MACRO
1982 •MACRO
1983 •MACRO
1984 •MACRO
1985 •MACRO
1986 •MACRO
1987 •MACRO
1988 •MACRO
1989 •MACRO
1990 •MACRO
1991 •MACRO
1992 •MACRO
1993 •MACRO
1994 •MACRO
1995 •MACRO
1996 •MACRO
1997 •MACRO
1998 •MACRO
1999 •MACRO
2000 •MACRO
2001 •MACRO
2002 •MACRO
2003 •MACRO
2004
2005
2006

D-REGISTER <- D-REGISTER THRU SHIFT-TREE

D D-RIGHT-14
D-D-RIGHT-13
D-D-RIGHT-12
D-D-RIGHT-ll
DD-RIGHT-I0
D-D-RIGHT-9
D-D-RIGHT-8
D D-RIGHT-7
D D-RIGHT-6
D-D-RIGHT-5
D-D-RIGHT-4
D-D-RIGHT-3
DD-RIGHT-2
D D-RIGHT-l
D D-NO-SHIFT
D D-DIRECT
DD
SAVE-D
D D-LEFT-l
D D-SWAB
D-D-SWAB-RIGHT-3
D-D-SWAB-LEFI'-1
D D-SIGNEXT
D-D-SIGNEXT-RIGHT-l
D-D-SIGNEXT-LEFT-l
D NO-SHIFT
D DIRECT
D-COUNT#D [HI]
D COUNT#D [ID]

Page B-44

: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=
: :=

: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=

: :=
: :=
: :=
: :=
: :=

: :=
: :=
: :=

A,D-RIGHT-14,CLK-D
A,D-RIGHT-13,CLK-D
A,D-RIGHT-12,CLK-D
A,D-RIGHT-ll,CLK-D
A,D-RIGHT-I0,CLK-D
A,D-RIGHT-9,CLK-D
A,D-RIGHT-8,CLK-D
A,D-RIGHT-7,CLK-D
A,D-RIGHT-6,CLK-D
A,D-RIGHT-5,CLK-D
A,D-RIGHT-4,CLK-D
A,D-RIGHT-3,CLK-D
A,D-RIGHT-2,CLK-D
A,D-RIGHT-l,CLK-D
A,D-NO-SHIFT,CLK-D
A,D-DIRECT,CLK-D
A,D-DIRECT,CLK-D
A,D-DIRECT,CLK-D
A,D-LEFT-l,CLK-D
A, D-SWAB ,CLK-D
A,D-SWAB-RIGHT-3,CLK-D
A,D-SWAB-LEFT-l,CLK-D
A,D-SIGNEXT,CLK-D
A,D-SIGNEXT-RIGHT-l,CLK-D
A,D-SIGNEXT-LEFT-l,CLK-D
A,NO-SHIFT,CLK-D
A,DIRECT,CLK-D
A,COUNT#D[HI],CLK-D
A,COUNT#D[ID],CLK-D

Page B-45

THE 11/60 PREOEFINITIONS
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052

D <-WHATEVER'S LEFT, AT P2-T OR P3-T

.TOC

•MACRO
•MACRO

D NOr-ASPHI (XX)
D=NOr-ASPID (XX)

•MACRO
•MACRO

D CSPD(XX)
D=CSPB(XX)

•MACRO
•MACRO
•MACRO
•MACRO

: :=
: :=

NOT-A,ASPHI (@XX) ,CLK-D
NOr-A,ASPLO(@XX) ,CLK-D

: : = B,CSPD(@XX) ,CLK-D
: :=

B,CSPB(@XX) ,CLK-D

D BSPHI (XX)
D=BSPID(XX)
D ASPHI (XX)
D=ASPID (XX)

: :=

B,BSPHI(@XX),CLK-D
B,BSPID(@XX) ,CLK-D
A,ASPHI (@XX) ,CLK-D
A,ASPLO(@XX),CLK-D

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

D ASPLO[DF]
D- ASPHI [DF]
D-BSPLO[DF]
D-BSPHI[DF]
D- ASPID [SF]
D- ASPHI [SF]
O-BSPLO[SF]
D=BSPHI[SF]

:: =

•MACRO
•MACRO

D CSPD[14]-AND-ASPHI(XX)::= A-AND-B,CSPD(DI4),ASPHI(@XX),CLK-D
D=CSPD[15]-AND-ASPHI(XX)::= A-AND-B,
CSPD(DI5),ASPHI(@XX),CLK-D

•MACRO

SR_ASPHI[17]-AND-007700

•MACRO

D SR-IOR-170000

•MACRO

SR_ASPHI[17]-AND-000077

•MACRO

D SR-IOR-000I00

•MACRO

D_ASPLO[17]-AND-CSPD(XX)

: :=
: :=
:: =

A,R[DF]-ID-A,CLK-D
A,R[DF]-HI-A,CLK-D
B,R[DF]-ID-B,CLK-D
B,R[DF]-HI-B,CLK-D
: := A,R[SF]-ID-A,CLK-D
: : = A,R[SF]-HI-A,CLK-D
: := B,R[SF]-ID-B,CLK-D
:: = B,R[SF]-HI-B,CLK-D

: :=
:: =
: :=

:: = A-AND-B,ASPHI(Rl7) ,
CSPB(BI7),CLK-SR
: := A-IOR-B,SR,
CSPB(BI6),CLK-D
:: = A-AND-B,ASPHI(Rl7) ,
CSPB(BI5),CLK-SR
: := A-IOR-B,SR,
CSPB(BI4),CLK-D

•MACRO

: : = A-AND-B,ASPID(Rl7) ,
CSPD (@XX) ,CLK-D
D_ASPHI[OO]-IOR-CSPD(XX)
: : = A-IOR-B,ASPHI(ROO),
CSPD (@XX) ,CLK-D
D_ASPHI[OO]-IOR-CSPB(XX)::= A-IOR-B,ASPHI(ROO) ,CSPB(@XX),CLK-D

•MACRO
•MACRO

D SR
D JUNK

•MACRO

: :=
: :=

A,SR,CLK-D
ZERO,CLK-D

THE 11/60 PREDEFINITIONS
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103

Page B-46

!=======================================================================
• '!DC

*
!N •B. :

SR (- DATA, AT P2 T OR P3 T
THE PARrICULAR FUNCTION SELECTED REQUIRES THE RESIDUAL
CONTROL REGISTER ("RES-REG") TO HAVE THE APPROPRIATE
FUNCTION SETUP FOR THE SR OPERATION.
POSSIBLE FUNCTIONS:

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

SR ASPHI (XX)
SR-Nar-ASPHI (XX)
SR-CSPB(XX)
SR-CSPD(XX)
SR-BSPHI (XX)
SR-SR-PLUS-1
SR ALL-GNES
SR-SR-RIGHT-1
SR SR-LEFT-1
SR JUNK
SR D
SRAsPLO [DF]
SR- ASPHI [DF]
SR-BSPLO[DF]
SR-BSPHI [DF]
SR- ASPLO [SF]
SR-ASPHI [SF]
SR-BSPLO[SF]
SR=BSPHI [SF]

.'IDC

•MACRO
.MACRO

RES CSPD (XX)
RES=CSPB (XX)

• TOe

•MACRO
•MACRO

COUNTER_CSPD(XX)
COUNTER_BSPHI(XX)

: :=
: :=
: :=
: :=
: :=
: :=

: :=
: :=
: :=

: :=
: :=
: :=
: :=

: :=
: :=

: :=

LOAD, LEFr, RIGHT, NOP
A,ASPHI (@XX) ,CLK-SR
NOT-A,ASPHI(@XX),CLK-SR
B,CSPB(@XX) ,CLK-SR
B,CSPD(@XX),CLK-SR
B,BSPHI(@XX) ,CLK-SR
A-PLUS-B,COOOO01-B,SR,CLK-SR
A,C177777-A,CLK-SR
D-DIRECT[BMUX],CLK-SR
CLK-SR
ZERO,CLK-SR
A,D-DIRECT,CLK-SR
A,R[DF]-LO-A,CLK-SR
A,R[DF]-HI-A,CLK-SR
B,R[DF]-LO-B,CLK-SR
B,R[DF]-HI-B,CLK-SR
A,R[SF]-LO-A,CLK-SR
A,R[SF]-HI-A,CLK-SR
B,R[SF]-LO-B,CLK-SR
B,R[SF]-HI-B,CLK-SR

RES-REG OPERATION MACROS

: : = CSPD (@XX) ,LOAD-RES
: :=

CSPB (@XX) ,WAD-RES

BASE MACHINE COUNTER
::= LOAD-COUNTER,CSPD(@XX)
LOAD-COUNTER,BSPHI (@XX)

::=

THE 11/60 PREDEFINITIONS
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147

Page B-47

•'rOC

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

BUS-A ASPLO [SF]
BUS-A-ASPID [DF]
BU S-A-ASPH I [SF]
BUS-A=ASPHI [DF]
BUS-A
BUS-A ASPLO (XX)
BUS-A=ASPHI (XX)
BUS-A SR
BUS-A FLTPT

: :=
: :=

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

BUS-B BSPID[SF]
BUS-B-BSPLO[DF]
BUS-B-BSPHI[SF]
BUS-B]3SPHI [DF]
BUS-B
BUS-B BSPID (XX)
BUS-B=BSPHI(XX)
BUS-B CSPD(XX)
BUS-B=CSPB(XX)

: :=
: :=

ENABLE ON BUS-AlB ONLY
R[SF]-LO-A
R[DF]-LO-A
: : = R[SF]-HI-A
: : = R[DF]-HI-A
: :=
: :=
: :=

NULL

ASPID (@XX)
ASPHI (@XX)
: : = SR
: : = FLTPr
R[SF]-LO-B
R[DF]-LO-B
: : = R[SF]-HI-B
: : = R[DF]-HI-B

: :=
: :=
: :=
: :=
: :=

NULL

BSPID(@XX)
BSPHI(@XX)
CSPD(@XX)
CSPB(@XX)

.'rOC
*
IDADING BA REGISTER
!LOADED AT P1-T ONLY, FROM BUS-B<01:00>#BUS-A<15:00> -> BA<17:00>

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

BA BSPLO (XX)
BA=BSPHI (XX)
BA SR
BA-ASPLO(XX)
BA=ASPHI (XX)

.'IOC

.MACRO

SR#D_SR-PLUS-CSPD(XX)

: :=
: :=
: :=
: :=
: :=

CLK-BA,BSPID(@XX)
CLK-BA,BSPHI(@XX)
CLK-BA,SR
CLK-BA,ASPLO (@XX)
CLK-BA,ASPHI (@XX)

D AND SR TOGETHER
::= A-PLUS-B,SR,CSPD(@XX) ,CLK-D,CLK-SR

THE 11/60 PREDEFINITIONS

Page B-48

2148
2149 1=======================================================================
2150
2151 • 'rOC
UCON FUNCTIONS
*
2152
2153
2154
2155 • 'rOC
PROCESSOR UCON FUNCTIONS
*
2156
2157
1PREVIOUSLY SET UP [UCON-PROC, SET-UCON-CONTROL, EN "FUNcrION"]
2158 •MACRO
IR EMIT
: := UCON-oPERATION
2159 •MACRO PS[15-12] D[15#13]
: : = UCON-oPE RAT ION
2160 •MACRO FLAG [8-0]-D [15-8]
: : = UCON-oPERATION
2161 •MACRO FPS [7-4] 0[7-4]
: : = UCON-oPE RAT ION
2162 •MACRO PS [7-4] 0[7-4]
: : = UCON-oPE RAT ION
2163 •MACRO PS [3-0(p [3-0]
:: = UCON-oPERATION
2164 •MACRO PS D
: : = UCON-oPERATION
2165 •MACRO UBREAK_BUSDIN[11-00]
: := UCON-oPEAAI' ION
2166
2167
lSETUP ueON AND EXECUTE IN 1 MICROWORD:
2168 .MACRO PS[15-12] D[15#13]-[I] ::= UCON-PROC,SET-UCON-CONTROL,
ueON-OPERATION,EN-CLK-PS[15-12]
2169
2170 .MACRO FLAG[8-0]_D[15-8]-[I]
::= UCON-PROC,SET-UCON-CONTROL,
2171
UCON-oPERATION,EN-CLK-FLAG[8-0]
2172 .MACRO FPS[7-4]_D[7-4]-[I]
::= UCON-PROC,SET-UCON-CONTROL,
2173
ueON-OPERATION,EN-CLK-FPS[7-4]
2174 .MACRO PS[7-4]_D[7-4]-[I]
::= UCON-PROC,SET-UCON-CDNTROL,
2175
UODN-oPERATION,EN-CLK-PS[7-4]
2176 .MACRO PS[3-0]_D[3-0]-[I]
::= UCON-PROC,SET-UCON-CONTROL,
2177
UCON-oPERATION,EN-CLK-PS[3-0]
2178 •MACRO PS D- [I]
::= UCON-PROC,SET-UCON-CONTROL,
2179
UCON-oPERATION,EN-CLK-PS[15-12],EN-CLK-PS[7-4],EN-CLK-PS[3-0]
2180 .MACRO BUSDIN eUA-[I]
::= UCON-PROC,SET-UCON-CONTROL,
2181
BUSDIN_CUA[14-03]
2182 •MACRO BUSDIN_FLAGS#FPS-[I]
::= UCON-PROC,SET-UCON-CDNTROL,
2183
BUSDIN_FLAG[8-0]#FPS[7-0]
2184 .MACRO BUSDIN_PS-[I]
::= UCON-PROC,SET-UCON-CONTROL,
2185
BUSDIN PS[15-00]
2186 .MACRO BUSDIN_EMIT-[I]
::= UCON-PROC~SET-UCON-CONTROL,
2187
BUSDIN_EMIT[15-00]
2188
2189

THE 11/60 PREOEFINITIONS
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236

• 'ICC

•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO
•MACRO

Page B-49

CACHE/KT UCON FUNCTIONS

! SETUP, EXECUTE IN 1 MIC~RD
KT-NO-RELOCATE-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,EN-KT-NO-RELOCATE
BUSOIN BUS-INTERNAL-ADOR-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,BUSOIN BUS-INTERNAL-ADOR[15-00]
BUSOIN CPU-INTERNAL-ADOR-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,BUSOIN CPU-INTERNAL-ADOR[15-00]
BUSOIN MMR2-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,BUSOIN MMR2[15-00]
BUSOIN CACHE-STATUS-[I]::= UCON-cACHE-KT,
SET-UCON-CONTROL,BUSOIN CACHE-STATUS[15-00]
BUSOIN SLR#CCR-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,BUSOIN KT-SEL,KT-SEL-SLR#CCR
BUSOIN MMRO-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,BUSOIN KT-SEL,KT-SEL-MMRO
BUSOIN_POR-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,BUSOIN KT-SEL,KT-SEL-POR
BUSOIN_PAR- [I]
: : = UCON-CACHE-KT ,
SET-UCON-CONTROL,BUSOIN KT-SEL,KT-SEL-PAR
SLR[15-08] 0[15-08]-[1]::= UCON-cACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-SLR#CCR,KT-WRITE-HIGH
CCR[07-02] 0[07-02]-[1]
::= UCON-CACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-SLR#CCR,KT-WRlTE-DOW
MMRO 0-[1]
::= UCON-CACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-MMRO,KT-WRITE
MMRO[OO] 0[00]-[1]
::= UCON-cACHE-KT,
SET-UCON=tONTROL,UCON-oPERATION,KT-SEL-MMRO,KT-WRITE-DOW
MMRO[15-01] 0[15-01]-[1]
::= UCON-CACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-MMRO,KT-WRITE-HIGH
POR_D-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-POR,KT-WRITE
POR[03-01] 0[03-01]-[1]
::= UCON-CACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-POR,KT-WRITE-LOW
POR[14-08] 0[14-08]-[1]
::= UCON-CACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-POR,KT-WRITE-HIGH
PAR 0-[1]
::= UCON-cACHE-KT,
SET=UCON-CONTROL,UCON-oPERATION,KT-SEL-PAR,KT-WRITE
PAR [07-00] 0[07-00]-[1]
::= UCON-CACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-PAR,KT-WRlTE-LOW
PAR[II-08]_0[11-08]-[I]
::= UCON-cACHE-KT,
SET-UCON-CONTROL,UCON-oPERATION,KT-SEL-PAR,KT-WRITE-HIGH

THE 11/60 PREDEFINITIONS
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289

.TOe

Page B-50
1-0 UCON FUNCTIONS

.MACRO

!N.B.: SETUP IN 1 MICID\ORD
BUSDIN JAM-[I]
::= UCON-I-o,EN-STATUS-MUX,
SET-UCON-CONTROL,BUSDIN_JAM[15-00]
BUSDIN_SERVICE-[I]
::= UCON-I-o,EN-STATUS-MUX,
SET-UCON-CONTROL,BUSDINyERVICE [15-00]
BUSDIN_PBA-[I]
::= UCON-I-o,EN-STATUS-MUX,
SET-UCON-CONTROL,BUSDIN_PBA[15-00]
BC-FCN-O-[I]
::= UCON-I-o,SET-UCON-CONTROL,
UCON-oPERATION,EN-BC-FCN-O
START-DELAY-[I]
::= UCON-I-o,SET-UCON-CDNTROL,
UCON-oPERATION,EN-START-DELAY
CLR-JAM-ERRORS-[I]
::= UCON-I-o,SET-UCON-CONTROL,
UCON-oPERATION,EN-CLR-JAM-ERRORS
CLR-NPR~IMEOUT-[I]
::= UCON-I-o,SET-UCON-CONTROL,

.MACRO

CLR-PWR-FAIL-[I]

.MACRO

CLR-YELLOW-ZONE- [I]

.MACRO

ALIDW-BG [1] H- [I]

.MACRO

BUS-INIT-UCON-[I]

.'rOC

.MACRO
.MACRO
.MACRO
.MACRO
•MACRO
•MACRO

UCON-oPERATION,EN-CLR-NPR~IMEOUT

::= UCON-I-o,SET-UCON-CONTROL,
UCON-oPERATION,EN-CLR-PWR-FAIL
: : = UCON-1-0, SET-UCON-CDNTROL,
UCON-oPERATION , EN-CLR-YELDOW-ZONE
: : = UCON-1-0, SET-UCON-CDNTROL ,
UCON-OPE~rION,EN-ALLOW-BG[I]H

.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO
.MACRO

::= UCON-I-o,SET-UCON-CONTROL,
UCON-oPERATION,EN-BUS-INIT-UCON

CONSOLE UCON FUNCTIONS

!SETS UP AND PERFORMS INDICATED OPERATION IN 1 MICROWORD
CONSOLE-NOP
: : = UCON-1-0,
EN-CDNSOLE-COMMAND,SET-UCON-CONTROL,UCON-oPERATION,EN-cNSL-NOP
CLEAR-CONSOLE-CDUNTER
::= UCON-I-o,
EN-CONSOLE-COMMAND,SET-UCON-CONTROL,UCON-oPERATION,EN-CLR-COUNTR
INCREMENT-CDNSOLE-COUNTER
::= UCON-I-o,
EN-CDNSOLE-aoMMAND, SET-UCON-CONTROL,UCON-oPERATION ,EN-INCR-COUNTR
CLEAR-CONSOLE-SERVICE
::= UCON-I-o,
EN-CONSOLE-COMMAND,SET-UCON-CONTROL,UCON-oPERATION,EN-CLR-cNSL-SRVC
STROBE-CONSOLE-DISPLAY
::= UCON-I-o,
EN-CDNSOLE-COMMAND, SET-UCON-CONTROL,UCON-oPERATION ,EN-STRB-DISP
CLEAR-CONSOLE-LED
::= UCON-I-o,
EN-CONSOLE-COMMAND,SET-UCON-CONTROL,UCON-oPERATION,EN-CLR-CNSL
SET-CONSOLE-LED
::= UCON-I-o,
EN-CDNSOLE-COMMAND,SET-UCON-CONTROL,UCON-oPERATION,EN-SET-cNSL
SET-CONSOLE-DP-LEDS
::= UCON-I-o,
EN-CDNSOLE-COMMAND, SET-UCON-CONTROL,UCON-oPERATION , EN-SET-DP
BUSDIN CONSOLE-[I]
::= UCON-I-o,
EN-STATUS-MUX,SET-UCON-CONTROL,BUSDIN_CONSOLE[06-00]

THE 11/60 PREDEFINITIONS
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339

Page B-51
DBUF UCON FUNCTIONS

• '!DC

.MACRO

1PREVIOUSLY SETUP UCON-1-0, EN LOAD DBUF
DBUF D
::= UCON~PERATION

•MACRO

lSETUP AND EXECUTE IN 1 MICROWORD:
DBUF D-[I]
::= UCON-I-o,SET-UCON-CONTROL,
UCON-oPERATION,EN-LOAD-DBUF[15-00]

•'!DC

MULTIPLE UCON FUNCTIONS

1THESE ARE FUNCTIONS OF MORE THAN 1 UCON ENABLED SIMULTANEOUSLY
.MACRO

1PREVIOUSLY SETUP:
IR DBUF

.MACRO

lSETUP AND EXECUTE IN 1 MICRCMORD:
IR DBUF-[I]
::= UCON-PROC,UCON-I-o,SET-UCON-CONTROL,
UCON-oPERATION,EN-CLK-IR[lS-00],BUSDIN_DBUF[15-00]

.'IOC

•MACRO

: :=

UCON~PERATION

WCS FUNCTIONS

1INVOKE A TMS ROmINE TO USE LOCAL STORE •
TMSPI'R (XX)
::=
BEGIN/YES,SELEcr/UCON,
UCON-XFER/YES,UCON-LOAD/YES,UCON/@XX,
UCON-SEL-WCS/YES

1=======================================================================
1=======================================================================
.'IOC

JAM UPP LOG MACROS

1MACROS CONCERNED WITH CSP LOG AFTER UNEXPEcrED JAMUPP
1MACROS REQUIRE APPROPRIATE REGISTER ENABLED ON BUSDIN
•MACRO
•MACRO
•MACRO

CSPD[OO]_LOG-CUA
CSPD[Ol] LOG-SERVICE
CSPD[02]=LOG-JAM

::= CSPD(DOO},WR-CSP
::= CSPD(D01},WR-CSP
::= CSPD(D02},WR-CSP

1*****

END OF MACRO DEFINITIONS

*****

APPENDIX C
THE DISPATCH FILE AND MEMORY PARTITIONING

This appendix discusses the dispatch file, which is normally included
in every microprogram assembly. Then, a technique for partitioning
the Writable Control Store so that several separately assembled
microprograms can be loaded together and executed is described.

C.1

THE DISPATCH FILE

in
an
11/60
The dispatch file, DSPTCH, serves two purposes
microprogram assembly. First, it provides for the reservation of the
first two hundred words of the Writable Control Store, so that the
assembler does not overwrite the words required for the resident
section. Second, it provides an entry point mechanism, so that the
microprogrammer can designate entry points within the microprogram for
anyone or more of the eight possible XFCs.
The contents of the dispatch file is as follows:
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363

.NLIST
.CODE
AAA:
.BEGIN:10[6002:6003J
.BEGIN:100[6004:6007J
.BEGIN:1000[6010:6017J
.BEGIN:000[6020:6027J
DISPCH:
.BEGIN:1000[6030:6037J
.BEGIN:100000[6040:6077J
.BEGIN:1000000[6100:6177J
PAGE(1),BUT(SUBRB) ,J/CON99
6000 o 00000000 00000000 01000000 00000000 00111000 00100000
CSPD[MDJ.EMIT(0010),
P3,
NEXT, BUT(SUBRB),PAGE(O),J/TRPOO
6001 o 00001000 00000010 00000000 00101000 00111000 01010111
.LIST

Page C-2

THE DISPATCH FILE AND MEMORY PARTITIONING
C.2

PARTITIONING THE WRITABLE CONTROL STORE

If the programmer wants to have several
separately
assembled
microprograms operating in the Writable Control Store, he must
partition the WCS by the following set of actions:
1.

Divide the microprograms into a main program with one or more
subordinate microprograms.

Determine the address
microprograms.

Assemble the main program with the dispatch file and with
entry points for that program and all the subordinate
programs.

Assemble the subordinate programs without the dispatch file,
but with the appropriate .BOUNDS keyword line followed by a
.CODE keyword line.

ranges

associated

with

the

Suppose, for example, the programmer has three programs:
LOOKUP,
SORT, and MATPAK. The programmer decides that LOOKUP will be the main
program (assembled at 6200) and that SORT (assembled at 7000) and
MATPAK (assembled at 7400) will be the subordinate programs. He
begins by adding the following information to the source for LOOKUP:
.CASE 1 OF DISPCH
SORTENTRY:
J/7000;
.CASE 2 OF DISPCH
MATPAKENTRY:
J/7400;
.CASE 0 OF DISPCH
LOOKUP:
Then, he adds the following to the SORT source:
.BOUNDS[7000:7377J
.CODE
And the following to the MATPAK source:
.BOUNDS[7400:7777J
.CODE

THE DISPATCH FILE AND MEMORY PARTITIONING

Page C-3

He can then assemble and load the three programs as follows:
)MIC LOOKUP,LOOKUP=PREDEF,DISPTCH,LOOKUP
)MIC SORT,SORT=PREDEF,SORT
)MIC MATPAK,MATPAK=PREDEF,MATPAK
)MLD WCS=MICPAK,LOOKUP,SORT,MATPAK
The .BOUNDS keyword can be used, in separate assemblies, to partition
the WCS for several users or for several logical functions for a
single user. If the assembler cannot find the required addresses
within the specified bounds, then the assembly fails. In specifying
the .BOUNDS keyword, the programmer should take into account any
future expansions or corrections for the microprogram and allocate
some additional space, since discontinuous bounds cannot be specified.

APPENDIX D
LINKED LIST EXAMPLE

The example given in this section is a microprogram that implements
three subroutines for handling a linked list. The linked list is kept
in the local store portion of the WCS. It is assumed to have been
initialized.
The microprogram is written in the standard format, which is described
in Section 14.3.2.
The program documentation is included in the
listing as comments.
The three subroutines are:
INSERr

Insert element pointed to by R2 before the
the list pointed to by Rl.

element

Remove the entry pointed to by Rl from the linked list.
APPEND

Add the entry pointed to by Rl to the end of the list.

LINKED LIST EXAMPLE

Page D-2

TABLE OF CONTENTS

2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
4040
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461

.NLIST
.NLIST

FORWARD
*****
*****
* *--------------------------------------------~* *
* *
Rl ----~*
*
* *~--------------------------------------------* *
*****
BACKWARD
*****

*****

R2 ----~*
? ~--------------*

BACKWARD

FORWARD

*----------------~?

*****

THE ABOVE DL~GRAM IS AN ATrEMPr TO DESCRIBE THE INPUT CONDITIONS
WHICH EXIST AT THE START OF THE INSERT XFC INSTRUCTION.
THE
REGIS'rERS CONTAIN THE FOLLOWING INFORMATION:
RlPOINTS '.1'0 THE ENTRY TO BE INSERrED IN FRONT OF.
R2POINTS TO THE ENTRY TO BE INSERTED.

*****
* *---------

FORWARD

*****

*
-------------* *

---------------~*

Rl ----~*

* *~---*****

BACKWARD *****

FORWARD *****
----------7* *---

R2 ----~*

--------------*
BACKWARD

*
*~-----

*****

THE ABOVE DIAGRAM ATTEMPTS TO OOCUMENT THE POINTERS AND THE
WAY THEY IOOK AFTER THE INSERr ISTRUCTION HAS COMPLETED ITS EXECUTION.

LINKED LIST EXAMPLE
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510

Page 0-3

THE FOLLOWING REPRESENTATION IS A MACRO CODE
VERSION OF THE LINKED LIST ALGORITHM:
INSERr: MOV
MOV
MOV
MOV
MOV
MOV
MOV

R3 , - (SP)
i INSERT ELEMENT POINTED TO BY R2.
Rl,FLINK(R2)
iBEFORE ELEMENT POINTED TO BY Rl.
BLINK(Rl),BLINK(R2)
BLINK (Rl) ,R3
R2,FLINK(R3)
R2 ,BLINK (Rl)
(SP) +,R3

THE INSERT INSTRUCTION HAS ONE BIG DIFFERENCE THAN THE MACRO
CODE VERSION IN THAT THE LINKED LIST DATA STRUCTURE IS IN
LOCAL STORE RATHER THAN MAIN MEMORY.
UNDERSTANDING LOCAL STORE
AND THE ADDRESSING MODES REQUIRED WE CAN REWRITE THE ABOVE
ALGORITH AS THE FOLIDWING EXPRESSIONS:
GRAB BLINK (Rl)
MOV R2,BLINK(Rl)
MOV Rl ,FLINK (R2)
MOV GRABBED,BLINK(R2)
rt{JV R2, (GRABBED)
THE LATrER ALGORITHM ALTHOUGH Nor AS CLEAR AS THE FIRST ONE
OOES HAVE THE FOLLOWING PROPERTY THAT THE ADDRESS REGISTER ON
THE WCS BOARD NEEDS TO BE WADED ONLY THREE TIMES WHEREAS
IMPLEMENTING THE FIRST METHOD WOULD REQUIRE WADING THE
ADDRESS REGISTER SIX TIMES. ALSO IMPLEMENTING THE
LINKED LIST IN LQCAL STORE SHOULD SHOW SOME IMPROVEMENT
OVER THE MAIN MEMORY VERSION ALTHOUGH THE DATA TO
SUBSTANTIATE THIS HAS Nor BEEN COLLECTED YET.

INSERr:
!D<--BLINK(Rl) ADDRESS.
P2-T,
D_A-PLUS-B,Rl-A,CSPB(ONE),
NEXT,
J/INS1
6200 0 10011100 10011000 00010000 00000000 00110000 10000001
INS1:
! INITIATE WADANDREAD.
P3 ,
TMSPTR (WADANDREAD),
NEXT,
J /INS26201 0 10100000 00000000 00000001 10110000 00110000 10000010
INS2:
NEXT,
J/INS3
!NULL WORD ONE.
6202 0 00000000 00000000 00000000 00000000 00110000 10000011
INS3:
!BLINK (Rl) ARRIVES FROM LOCAL STORE.
P3,
CSPB[MD] BUSDIN,
NEXT,
J/INS46203 0 00001110 00000000 00000000 00001000 00110000 10000100

LINKED LIST EXAMPLE
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550

Page D-4

INS4:
P2-T,
D_A,R2-A,
1D<-- R2 FOR WRITE INTO BLINK(Rl)
NEXT,
J/INS5
6204 0 11110000 10001010 00010000 00000000 00110000 10000101
INS5:
P3,
TMSPrR_(WRITE),
1INITIATE MOV R2,BLINK(Rl)
NEXT,
J/INS6
6205 0 00100110 00000000 00000001 10110000 00110000 10000110
INS6:
NEXT,
J/INS7
1NULL IDRD ONE.
6206 0 00000000 00000000 00000000 00000000 00110000 10000111
INS7:
P2-T,
D_A,R2-A,
1D<-- FLINK(R2) ~DRESS
NEXT,
J/INS8
6207 0 11110000 10001010 00010000 00000000 00110000 10001000
INS8:
P3,
TMSPrR_(IDADWRITEINC),
1INITIATE WAD, WRITE AND INC
NEXT,
J/INS9
6210 0 00100000 10000000 00000001 10110000 00110000 10001001
INS9:
P2-T,
D_A,Rl-A,
1D<-- R1 DATA FOR MOV Rl,FLINK(R2)
NEXT,
J/INS10
6211 0 11110000 10011000 00010000 00000000 00110000 10001010
INS10:
NEXT,
J/INS11
1NULL IDRD TWO.
6212 0 00000000 00000000 00000000 00000000 00110000 10001011
INS11:
P2-T,
D_B,CSPB(MD),
1D<-- BLINK(Rl) FETCHED EARLIER.
NEXT,
J/INS12
6213 a 10101110 00000000 00010000 00000000 00110000 10001100
INS12:
P3,
TMSPrR_(WRITE),
1INITIATE MOV BLINK(Rl) ,BLINK(R2)
NEXT,
J /INS13
6214 0 00100110 00000000 00000001 10110000 00110000 10001101
INS13:
NEXT,
J/INS14
1NULL IDRD ONE.
6215 0 00000000 00000000 00000000 00000000 00110000 10001110
INS14:
NEXT,
J/INS15
1NULL IDRD TVD.
6216 0 00000000 00000000 00000000 00000000 00110000 10001111

Page 0-5

LINKED LIST EXAMPLE

2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597

INS15:
P3,
TMSPTR_(IDADANIMRITE),
!INITIATE MOV R2,BLINK(Rl)
NEXT,
J/INS16
!D REGISTER STILL OKAY.
6217 a 00100100 00000000 00000001 10110000 00110000 10010000
INS16:
P2-T,
D_A,R2-A,
!D<-- R2 FOR WRITE.
NEXT,
J/INS17
6220 a 11110000 10001010 00010000 00000000 00110000 10010001
INS17:
NEXT,
J/INS18
!NULL WORD TWO.
6221 a 00000000 00000000 00000000 00000000 00110000 10010010
INS18:
NEXT,
BUT (SUBRB) ,PAGE (0) ,J/BRA05
!RETURN TO GET NEXT INSTRUCTION.
6222 a 00000000 00000000 00000000 00000000 00111000 00000011

THE REMOVE INSTRUCTION TAKES AN ENTRY OUT OF THE LINKED LIST.
THE INPur REGISrERS CONSIST OF:
RlPOINTER TO THE ENTRY TO BE DELETED.
THE ALOORITHM USED TO REMOVE THE ENTRY FROM THE OOUBLY LINKED
LIST IS EXPRESSED IN THE FOLDOWING MACRO CODE:
REMOVE: MOV
MOV
MOV
MOV
MOV
MOV
CLR
CLR
MOV
MOV

R2,-(SP)
R3,- (SP)
BLINK (Rl) , R3
FLINK (Rl) , R2
R2,FLINK(R3)
R3 , BLINK (R2)
FLINK(Rl)
BLINK(Rl)
(SP) +,R3
(SP) +,R2

HERE AGAIN ANALYZING THE ALOORITHM AND KNONING WE ARE IN IDeAL
STORE AND THAT WE HAVE SUCH FUNCTIONS AS READ TWO VALUES AT A
TIME WE GET THE FOLLOWING AIillRITH IN A SHORrHAND NOrATION:
GRAB FLINK AND BLINK (Rl)
MOV R2,FLINK(BLINK(Rl))
MOV FLINK(Rl) ,BLINK(FLINK(Rl))
CLR FLINK AND BLINK (Rl)
IN THIS METHOD WE ONLY REFERENCE IDeAL STORE FOUR TIMES WHEREAS
USING THE ABOVE MElmOD WE 00 FIVE REFERENCES.

LINKED LIST EXAMPLE
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635

Page 0-6

REMOVE:
P2-T,
D_A,Rl-A,
!D<-- ADDRESS OF ENTRY.
NEXT,
J/REMI
6223 0 11110000 10011000 00010000 00000000 00110000 10010100
REMl:
P3,
TMSPrR_(IDADREAIJIW)) ,
!INITIATE READ OF FLINK AND BLINK.
NEXT,
J/REM2
6224 0 00100101 00001100 10000001 10110000 00110000 10010101
REM2:
NEXT,
J/REM3
!FIRST NULL WORD.
6225 0 00000000 00000000 00000000 00000000 00110000 10010110
REM3:
P3,
CSPB[MD]_BUSDIN,
!FIRST DATA ITEM INTO MD.
NEXT,
J/REM4
6226 0 00001110 00000000 00000000 00001000 00110000 10010111
! D HAS FLINK(Rl)
! MD HAS BLINK (Rl)
REM4:
P2-T,
SR_A,D-NO-SHIFT,
!SAVE FLINK (Rl) INTO SR.
NEXT,
J /REM5
6227 0 11110000 01010000 00001000 00000000 00110000 10011000
REM5:
P2-T,
D_B,CSPB(MD),
!D< -- ADDRESS OF BACK FLINK.
NEXT,
J/REM6
6230 0 10101110 00000000 00010000 00000000 00110000 10011001
REM6:
P3,
TMSPTR_(WRITE),
!INITIATE WRITE.
NEXT, J /REM7
6231 0 00100110 00000000 00000001 10110000 00110000 10011010
REM7:
!FIRST NULL WORD.
P2-T,
D_A,SR,
!DATA TO CHANGE BACK FLINK
NEXT,
J/REM8
6232 0 11110000 00000000 00010000 00000000 00110000 10011011
REM8:
!DATA WRITTEN IN THIS CYCLE.
P2-T,
D_A-PWS-B,SR,CSPB(ONE),
!POINT TO FLINK OF FORWARD ENTRY.
NEXT,
J /REM9
6233 0 10011100 00000000 00010000 00000000 00110000 10011100

LINKED LIST Exru~LE
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664

Page 0-7

REM9:
P3,
TMSPTR_(LOADANlMRITE),
!INITIATE WRITE.
NEXT,
J/REM10
6234 0 00100100 00000000 00000001 10110000 00110000 10011101
REM10:
P2-T,
D_B,CSPB (MD) ,
!DATA TO CHANGE FORWARD BLINK.
NEXT,
J /REM11
6235 0 10101110 00000000 00010000 00000000 00110000 10011110
REMl1:
P2-T,
D~,Rl-A,
!D<-- ADDRESS OF ENTRY REMOVED.
NEXT,
J/REM12
6236 0 11110000 10011000 00010000 00000000 00110000 10011111
REM12:
P3,
TMSPTR_ (LOAImRITETVl:» ,
! INITIATE CLEAR OF FLINK AND BLINK.
NEXT,
J/REM13
6237 0 10100000 10001100 10000001 10110000 00110000 10100000
REM13:
J?2-T,
D_ZERO,
! ZERO DATA FOR FORWARD LINK.
NEXT,
J/REM14
6240 0 00110000 00000000 00010000 00000000 00110000 10100001
REM14:
P2-T,
D_ZERO,
!ZERO DATA FOR BACKWARD LINK.
NEXT,
J/REM1S
6241 0 00110000 00000000 00010000 00000000 00110000 10100010
REMIS:
NEXT,
sur (SUBRB) ,PAGE (0) ,J/BRA05
!RETURN TO GET NEXT INS'rRUCTION.
6242 0 00000000 00000000 00000000 00000000 00111000 00000011

LINKED LIST EXAMPLE

2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710

Page 0-8

THE APPEND INSTRUCTION IS USED TO ADD AN ENTRY ONTO THE POINT
WANTED.
THIS INSTRUCTION CAN BE USED IN '!W) WAYS. (1) TO ADD
THE ENTRY ONTO THE FRONT OF A QUEUE DIREcrLY AFTER THE HEAD
ELEMENT AND ALSO TO ADD THE ELEMENT ONTO THE LAST POSITION OF
A LIST.
THE FOLLOWING INPtJr CONDITIONS OCCUR:
RlPOINTS TO HEAD OF LINKED LIST.
R2POINTS TO ENTRY TO BE APPENDED TO THE LINKED LIST.
,

THE ALGORITHM CAN BE REPRESENTED IN THE FOLI1:MING MACRO FORM:
APPEND: MOV R3,- (SP)
MOV FLINK (Rl) ,FLINK (R2)
MOV FLINK (Rl) ,R3
MOV R2,FLINK (Rl)
MOV BLINK (R3) ,BLINK (R2)
MOV R2, BLINK (R3 )
MOV (SP) +,R3
ANALYZING THE ALGORITHM AGAINST THE CONSTRAINTS AND THE
POWERS OF USING A LOCAL STORE REPRESENTATION OF THE LINKED
LIST THE FOLLCMING SHORl'HAND NOTATION ALGORITHM IS DEVEIDPED.:
GRAB FLINK (Rl)
MOV R2,FLINK(Rl)
GRAB BLINK(FLINK(Rl))
MOV R2,BLINK(FLINK(Rl))
MOV FLINK(Rl) ,FLINK(R2)
MOV BLINK(FLINK(Rl)) ,BLINK(R2)
USING THIS REPRESENTATION THE WCS ADDRESS REGISTER IS LOADED ONLY
FOUR TIMES COMPARED TO THE SEVEN OR SO TIMES FOR THE FIRST
METHOD.

APPEND:
P2-T,
D_A,Rl-A,
!D<-- ADDRESS OF APPEND PT.
NEXT,
J/APP1
6243 0 11110000 10011000 00010000 00000000 00110000 10100100
APP1:
!INITIATE READ OF FLINK(Rl).
P3,
TMSPTR_(READ) ,
NEXT,
J/APP2
6244 0 10100101 00000000 00000001 10110000 00110000 10100101
APP2:
NEXT,
J/APP3
!NULL WORD ONE.
6245 0 00000000 00000000 00000000 00000000 00110000 10100110

LINKED LIST EXAMPLE

Page 0-9

2711 APP3:
2712
P2-T,
D A,R2-A,
!PUT R2 INTO D FOR WRITE.
2713
P3,
CSPB [MD]_BUSDIN,
! INPUT FLINK (Rl) .
2714
NEXT,
J/APP4
6246 0 11111110 10001010 00010000 00001000 00110000 10100111
2715
2716 APP4:
2717
P3 ,
TMSPrR_ (WRITE) ,
! INITIATE MOV R2, FLINK (Rl) •
2718
NEXT,
J /APP5
6247 0 00100110 00000000 00000001 10110000 00110000 10101000
2719
2720 APP5:
2721
P2-T,
SR_B,CSPB(MD) ,
!SR GETS FLINK(Rl)
2722
NEXT,
J/APP6
!NULL WORD ONE.
6250 0 10101110 00000000 00001000 00000000 00110000 10101001
2723
2724 APP6:
2725
P2-T,
D_A-PLUS-B,SR,CSPB(ONE),
!CALCULATE BLINK(FLINK(Rl».
2726
NEXT,
J /APP7
6251 0 10011100 00000000 00010000 00000000 00110000 10101010
2727
2728 APP7:
2729
P3,
TMSPrR_(IDADANDREAD) ,
!INITIATE READ OF BLINK(FLINK(Rl».
2730
NEXT,
J/APP8
6252 0 10100000 00000000 00000001 10110000 00110000 10101011
2731
2732 APP8:
2733
NEXT,
J /APP9
!NULL WORD ONE.
6253 0 00000000 00000000 00000000 00000000 00110000 10101100
2734
2735 APP9:
2736
P2-T,
D A,R2-A,
!PUT R2 INl'O D FOR WRITE.
2737
P3,
CSPB[MD]_BUSDIN,
!INPUT BLINK(FLINK(Rl».
2738
NEXT,
J/APP10
6254 0 11111110 10001010 00010000 00001000 00110000 10101101
2739
2740 APP10:
2741
P3 ,
TMSPrR_ (WRITE) ,
! INITIATE MOV R2, BLINK (FLINK (Rl) )
2742
NEXT,
J/APP11
6255 0 00100110 00000000 00000001 10110000 00110000 10101110
2743
2744 APPll:
2745
NEXT,
J/APP12
!NULL WORD ONE.
6256 0 00000000 00000000 00000000 00000000 00110000 10101111
2746
2747 APP12:
2748
P2-T,
D A,R2-A,
!D<-- ADDRESS OF FLINK(R2).
2749
NEXT,
J7APP13
6257 0 11110000 10001010 00010000 00000000 00110000 10110000
2750

LINKED LIST EXAMPLE

Page 0-10

2751 APP13:
2752
P3,
TMSPrR_{LOADWRITEINC) ,
! INITATE MOV FLINK (Rl) ,FLINK (R2)
2753
NEXT,
J/APP14
6260 0 00100000 10000000 00000001 10110000 00110000 10110001
2754
2755 APP14:
2756
P2-T,
D_A,SR,
!FLINK(Rl) IN'ID 00 FOR WRITE.
2757
NEXT,
J/APP15
6261 0 11110000 00000000 00010000 00000000 00110000 10110010
2758
2759 APP15:
2760
P2-T,
D_B,CSPB(MD),
!BLINK(FLINK(Rl» INTO D FOR wrnITTE.
2761
! (DATA ABOVE WRITI'EN AND THEN INCREMENT
2762
NEXT,
J/APP16
!ADDRESS REGISTER TO POINT TO BLINK)
6262 0 10101110 00000000 00010000 00000000 00110000 10110011
2763
2764 APP16:
2765
P3,
TMSPrR_(WRITE),
!MOV BLINK(FLINK(Rl» ,BLINK(R2)
2766
NEXT,
J/APP17
6263 0 00100110 00000000 00000001 10110000 00110000 10110100
2767
2768 APP17:
2769
NEXT,
J/APP18
!NULL WORD ONE.
6264 0 00000000 00000000 00000000 00000000 00110000 10110101
2770
2771 APP18:
2772
NEXT,
J/APP19
!NULL WORD Tvl).
6265 0 00000000 00000000 00000000 00000000 00110000 10110110
2773
2774 APP19:
2775
NEXT,
Bur (SUBRB) ,PAGE (0) ,J/BRA05
!RETURN TO GET NEXT INSTRUCTION.
6266 0 00000000 00000000 00000000 00000000 00111000 00000011
MIC -- ERRORS DETECTED:
0
MIC -- NUMBER OF LINES PROCESSED:

2775

APPENDIX E
ERROR MESSAGES

This appendix contains the error messages for the microprogramming
tools. Error messages are given first for the assembler, then for the
debugger, and finally for the command language interpreter.
In addition to the error messages listed here, additional
messages can arise from any of the following sources:
o

Operating System.
form.

error

An operating system error message has the

FCS number file-name error message
For an explanation of operating system
programmer is referred to:

error

messages

the

FORTRAN IV PLUS User's Guide (DEC-11-LFPUA-BD),
Appendix C, Section C.2.3
o

FORTRAN Run-Time System.
form:

A FORTRAN error

message

has

the

FCS number file-name error message
For an explanation of FORTRAN error messages, the programmer
is referred to:
FORTRAN IV PLUS User's Guide (DEC-11-LFPUA-BD),
Appendix C, Section C.2.2
o

Program Errors. Error messages that are reported as a
result of the failure of consistency checks within the
microprogramming tools have the following form:
PROGRAM ERROR - error-message
These errors are described within the program documentation.
The occurence of such an error indicates a malfunction that
is outside the programmer's control.

Page E-2

ERROR MESSAGES
E.1

MICRO-11/60 ERROR MESSAGES

The following error messages are produced by the assembler. The first
nine errors are fatal errors. These errors indicate a problem with
the hardware or software support for the MICRO-11/60 assembler
program. For each of these errors a suggested procedure is indicated.
1.

WRITE ERROR IN WORK FILE
Suggested procedure:

INTERNAL BUFFER ERROR
Suggested procedure:

(reserved)

WORK FILE TOO BIG
Suggested procedure:

Try running in a different spot in
memory.

Try again.

WRITE ERROR IN OBJECT FILE
Suggested procedure:

Check disk. Try again in a less
active environment.

END OF OBJECT FILE ERROR
Suggested procedure:

Try to break down the microprogram
either by dividing into modules or
by removing comments.

INTERNAL INITIALIZATION ERROR
Suggested procedure:

Try again in a less active
environment.

READ ERROR IN WORK FILE
Suggested procedure:

Try again.

(reserved)

The remaining errors are non-fatal. After the detection of an error,
the assembly continues. For each of these errors, a Probable cause is
indicated.
10. ILLEGAL NUMERIC LABEL
Probable cause:

A label outside the legal limits
of the program.

ERROR MESSAGES

Page E-3

11. BEGIN BLOCK ALREADY ENDED
Probable cause:

A case-microinstruction or an enddefinition seen for a branch-label
that has already been ended by an
end-definition.

12. CASE NUMBER TOO LARGE
Probable cause:

A case number larger than the number
calculated by taking 2**k, where k is
the number of O's in the mask
associated with the branch-label.

13. THIS CASE ALREADY HANDLED
Probable cause:

A case number for a given branch-label
is given more than once in the
microprogram.

14. DATA SET ERROR
Probable cause:

The internal stack is too big.

15. ILLEGAL RANGE
Probable cause:

The address range given with a branchdefinition is in the wrong order or is
outside the legal limits of the program.

16. (reserved)

17. ILLEGAL USE OF SYMBOL
Probable cause:

A symbol given in a place where only
a numeric value is acceptable.

18. ILLEGAL CONDITION BEFORE .CODE
Probable cause:

A language construct that can only be
given in the action-part of the program
appears in the definition part.

19. ILLEGAL VALUE
Probable cause:

A value outside the legal range or
a signed value.

20. PAGE BOUNDS ERROR IN DEFAULT ADDRESS

ERROR MESSAGES

Page E-4

21. NO .ADDRESS KEYWORD
Note:

This error can occur only if this predefinitions file
is not used.

Probable cause:

The .ADDRESS keyword, as described in Appendix
B, is not present.

22. ILLEGAL STATEMENT AFTER .CODE
Probable cause:

A language construct that can be given
only in the definition part of the
program is used in the action part.

23. MACRO EXPANSION ERROR
Probable cause:

The arguments of the macro-call created
a problem in the expansion of the macrobody.

24. MICRO-INSTRUCTION ILLEGAL
Probable cause:

A name given in the microinstruction
is undefined. This error sometimes
indicates a problem with the definition
of the name.

25. INTERNAL STACK OVERFLOW
Probable cause:

The stack associated with macro expansion
has too many entries. This error can be
caused by nesting macros too deeply or
by supplying too many arguments for a
macro.

26. ATTEMPT TO REWRITE BIT IN MICROWORD
Probable cause:

A field-setting is given that sets a bit
already set in the microword by another
field-setting.

27. CONSTRAINT FIELD PARAMETER ILLEGAL
Probable cause:

The number of O's in a mask is either
less than 1 or greater than the allowable
number (7).

ERROR MESSAGES

Page E-5

28. CANNOT SATISFY CONSTRAINT REQUEST
Probable cause:

A set of addresses to satisfy the
constraint request cannot be found.

Suggested procedure:

Move the branch-definition to the
beginning of the program so that the
necessary addresses can be reserved.

29. ADDRESS ALREADY SEEN
Probable cause:

The address has already been either
explicitly allocated by the programmer
or selected by the assembler for allocation.

30. ALREADY DEFINED
Probable cause:

The name has already been defined for the same
name type.

31. ILLEGAL FIELD MODE

32. ILLEGAL PASS 2 OPERATION
Probable cause:

System or hardware failure.

33. BAD INITIALIZATION
Probable cause:

System or hardware failure.

34. (reserved)

35. ERROR ROUTINE FAILURE
Probable cause:

System or hardware failure.

36. SYMBOL ALREADY USED AS A LABEL
Probable cause:

Symbol has been already been defined by
its use as a label.

37. (reserved)
38. PRE-SCAN ERROR
Probable cause:

System or hardware failure.

39. SYNTAX ERROR
Probable cause:

The source line does not have the
correct syntax.

ERROR MESSAGES
E.2

Page E-6

MDT ERROR MESSAGES

The debugger error messages and the error source are listed below.
Error

Source

ADDRESS ERROR AT address

Run-time

ATTEMPT TO EXECUTE AN ILLEGAL INSTRUCTION
AT address

Run-time

ILLEGAL BREAKPOINT INSTRUCTION AT address

Run-time

UNKNOWN TRAP OCCURRED AT address

Run-time

ATTEMPT TO LOAD A CODE SEGMENT FAILED AT
ADDRESS address

Load

BREAKPOINT NUMBER breakpoint-id IS NOT SET

Breakpoint

BREAKPOINT TABLE FULL

Breakpoint

DID NOT FIND ADDRESS

Breakpoint

DISPLAY POINT NUMBER display-id IS NOT SET

Display

ILLEGAL

ADDRESS
ADDRESS TYPE
BIT NUMBER
BREAK COMMAND
BREAKPOINT NUMBER
NUMBER, TOO LARGE
TERMINATION

Proceed, Go, Open
Breakpoint
Open
Breakpoint
Breakpoint
Display Point
(all)

INCORRECT

BIT FIELD NAME
STATE VARIABLE NAME

(all)
(all)

INPUT ERROR

(all)

LEGAL BREAKPOINT DID NOT OCCUR

Proceed, Go

NO FREE ENTRIES IN DISPLAY TABLE

Display

ODD MACRO ADDRESS

Breakpoint

SYNTAX ERROR

(all)

UNABLE TO

LOAD DISPATCH TABLE
READ SPECIFIED LOCATION
WRITE SPECIFIED LOCATION

UNKNOWN TERMINATOR

Load
Open
Open
Open

ERROR MESSAGES
E.3

Page E-7

COMMAND LANGUAGE ERROR MESSAGES

The following error messages are command language interpreter error
messages.
These error messages may be encountered when trying to use
the MICRO-11/60 assembler.
1.

COMMAND LINE SYNTAX ERROR

rest-of-line

If the command language interpreter detects an error in
the command line, it prints this message and the part
of the line after the point at which the error was
detected.
2.

COMMAND SWITCH ERROR
where: n = 1 implies the object module file
n = 2 implies the list file
n = 4 implies the first input file
The command language interpreter
switch on the indicated file.

found

illegal

Page Index-1
INDEX

· BEGIN . . . . .
• CASE

•

••

.••••

.FIELD
.IDENT
. MACRO
· RADIX
.TITLE
· TOC .

.. .
.
. .. .
. .
. ...
. . . . . . . . . . . .
........ .
. . .

6-6
6-6
5-3
4-3
5-9
4-6
4-3
4-4

@MDT .

16-2

Action-item* .
Actions
. . . . . . . .
Actual parameters
Actual* . . . . . . . .
Address
assignment
assignment algorithm.
main memory
micro memory . .
reservation
space . . . . .
specification
Address range
of target assignment .
Address* . . . . . . . . . . .
Address-spec*
. . .
Alphabetic*
. . . . . . .
Assembler
error messages .
... .
input listing . . . . . . . . .
output listing
sample output listing
switches . . . . . . .
Assembly* . . . . . . . . . . . .
Assembly-command-line* .

6-1
6-1
5-12
5-9

Base address .
Bit map
Bit-range*
Bit-spec*
Bits
map
of microword
Branch-definition
Branch-definition* .
Branch-label*
. . .
Break-address* . . .

2-4
2-4
9-5
9-5
2-5
2-4
2-5
6-10
6-3
9-5, 10-3
3-4
14-12
14-9
14-10
14-15
14-5
14-4
14-4
6-5
14-14
5-3, 10-3
5-3
14-14
14-12
6-1
6-6
6-6
11-4

Page Index-2
Break-id*
Breakpoint
planting the call
Breakpoint list
Breakpoint-command*
Case-microinstruction
Case-microinstruction*
Case-number* . .
Command language
debugger . . . . . . .
Command line
MDT

•

Comments . . .
Constraint*
. . . .
Contiguous bit fields
Control-command* .
D

* . . . . . . . .

Datapath registers
Debugger
command language
interrupting
restarting . .
terminating
Debugger errors . . . .
Default* . . . . . . . .
Definitions
field
macro
. . .
predefinitions . . .
Delete-break-command*
Delete-display-command*
Digit* . . . . . .
Disabling WCS . . .
Display
lis t . . . .
Display-command* .
Display-id*
Enabling WCS .
End-definition . .
End-definition*
Error messages
assembler
debugger . . . .
load er . . . . .
Errors
detection and correction
Expansion
macros
Field

11-4
11-5
11 -1 , 11-5
11-1
6-7, 6-11
6-6
6-6
16-2
9-3
3-6
6-6
5-5
13-1
11 -1 , 12-1
9-1
16-2
16-4
16-5
16-5
16-6
5-3
5-1
5-2
5-8
5-14
11-8
12-4
3-4
15-5
12-1 , 12-5
12-1
12-3
15-5
6-7
6-6
14-12
16-6
15-6
2-6
5-10
5-2

Page Index-3
Field-definition*
Field-indicator* . .
Field-name
in MDT . . .
. . . .
Field-name*
. . .
Field-spec* . . . .
Field-value*
.. .
Field-value-definition*
Fields
contiguous-bit . .
maximum size . . .
non-contiguous-bit .
overlapping
. . .
oversize values
predefined . . .
File-spec* . . . . .
Formal parameters
Formal*
Format
microprogram object module
of microprogram

5-3
10-3
10-8
5-9
5-3
6-3
5-3

5-5
5-4
5-5
5-6
5-8
5-14
14-4
5-12
5-9
8-3
14-7

Go-command*

* . . . . . .

13-2
13-2

Heading
High-address*

14-11
6-6

Ident-string*
. . . . . . . •
Identification . . . . . . . . . .
Identification-part* . .
Implicit radix . . .
Indirect command file
@MDT . . . . . . . .
Initialization pattern
loader .
Input
load er
Input listing
Input preparation
Input-file* . . . .
Input-spec*
. . .
Instruction-part*
Interrupting
debugger . . . . .

4-3
4-3
4-3
4-6

Keyword
.BEGIN
.CASE
.FIELD
.IDENT
.LIST
.MACRO

.
...
.
.
...
.

16-2
5-7
8-2
15-5
14-9
14-6
14-4
14-4
6-3
16-4
6-6
6-6
5-3
4-3
4-8
5-9

Page Index-4
.NLIST .
.RADIX .
.TITLE .

4-8
4-6
4-3
4-4
3-2

. Toe • .

Keywords
L

* . . .

Label* . . . . .
Left-bit*
Line
program
Line numbers
Line terminator
in open-command
List
breakpoint . . . .
display . . . . .
List keywords
List-break-command*
List-display-command*
List-file* . . . .
Listing
assembler output
sample assembler input
Listing mode . .
Load-command*
Loader
error messages
functions
initialization pattern
input
output . . . . .
Loading
microprograms
Loading the WCS
Low-address* . .
Machine state
restoring
Macro . . . . .
Macro expansions
in listing . .
Macro-address-spec .
Macro-address-spec*
Macro-body*
Macro-body-part* . .
Macro-call . . . . .
Macro-call*
... .
Macro-definition*
.. .
Macro-name*
Macros
expansion
nested

. ...

13-4
6-3
5-3, 10-3
3-6
14 -11
10-5, 10-9
11-1
12 -1 , 12-5
4-8
11-9
12-6
14-4
14-10
14-9
4-8
13-4
15-6
8-1
8-2
15-5
15-6
8-3
15-2
6-6
9-1
9-3
5-8
14-13
10-6
10-3
5-9
5-9
5-9
6-3
5-9
5-9
5-10
5-13

Page Index-5
parameters .
predefined
Main memory
address
Mas k . . . . .
character
Mask* . . . .
MDT
command language
field-name . .
interrupting
restarting . . . . .
terminating
MDT command
breakpoint . . . . .
control
.........
delete-break . . . . . . . .
delete-display
.... .
display
..... .
go . . . . .
list-break . . . . .
list-display .
10 ad . . . . . . . .
ope n . . • . . . . . . . . .
open-bits
.....
open-byte
. . . . . . .
open-character .
....
proceed-from-break . . . . . .
reset
. . . . . . . .
set-break
. . .
set-display . . . . . . . .
MDT command line
.....
MDT commands
summary
Mdt-call*
Micro memory
address
Micro-address-spec
Micro-address-spec* . . . . .
Microcode . . . . . . . .
Microinstruction*
Microinstructions
Microprogram
format . . . . .
id en ti fic ation
structure
...... .
Microprogram object module
Microprograms
loading . . . .
Microstate table .
Microword
initialization .
Microword line . . . . . . . .

. . . . . . . . .

. . . . . . . .

5-12
5-15

9-5

6-8
6-9
6-6
16-2
10-8
16-4
16-5
16-5
.

.
.
.

11 -1
13-1
11-8
12-4
12-1
13-2
11-9
12-6
13-4
10-1
10-3
10-11
10-13
11-6
13-4
11-4
12-3
9-3
9-4
16-3

9-5

10-7
10-3
6-1
6-3
6-2
14-7
4-3
4-1
8-3
8-3
9-1
5-7
14-12

Page Index-6
MSTART .
MSTOP

.... ...

15-5
15-5

Name* . .
Name-char* .
Names
. . .
Nested macros
New values
in MDT . . . .
Non-contiguous-bit fields

3-4
3-4
3-3
5-13

0* .

10-3
10-11

OB* . . . . .
Object module
format . . . .
microprogram
Object-file* . .
OC

* .....

Offset . . . . .
Open-bits-command* .
Open-byte-command*
Open-character-command*
Open-command*
Output
loader . . .
Output listing
sample assembler
Output-spec* . . .
Overlapping fields
Oversize field values

10-9
5-5

8-3
8-3
14-4
10-13
6-5
10-3
10-11
10-13
10-1
15-6
14-10
14-15
14-4
5-6
5-8

Page heading . . .
Parameters . .
PDP-11 registers.
Predefinitions .
field . . . .
macro . . . .
Preparing input
Privileged status
loader . . . . .
Proceed-from-break-command*
Processing unit
....
Processing-unit* .
. ...•.
Program line
.•.....

14 -11
5-12
9-1
2-3, 5-14
5-14
5-15
14-6

Qualifier

9-6

* . . . .

13-4
4-7
3-4
4-7
10-8
10-3

Radix* . . . .
Radix-50-char*
Radix-line*
Register-address-spec
Register-address-spec* .

15-1
11-6
4-1
4-2
3-6

Page Index-7
Relocation-register
Repeat-count*
. . .
Reset-command* • . . .
Resident section . . . . . . .
Restoring machine state
Right-bit* . . . . . • .

9-5
11-6
13-4
8-2
9-3
5-3, 10-3

Scope
of target assignment
Separators . . . . . .
Set-break-command* .
Set-display-command* . .
Spac ing . . . . . . . . . . .
State
of the machine . . . . . . . . .
Switch*
Switches . . . . .
Table of contents
Target assignment
address range
case .
mas k . . . . . . .
scope . . . . . . . . . . . .
Target-assignment construct
Term* . . . . .
......
Threshold check
. . . . . .
Title-string*
...
Toc-line*
. . . . . . . .
Toc-string*
Transfer-address*

6-11
3-5
11-4
12-3
3-7
9-1
14-4
14-5
4-4, 14-10

.
.
.
.

6-10
6-11
6-8
6-11
6-5
10-3, 10-5
7-1
4-3
4-5
4-5
13-2

Uniqueness
of names
User-actions*

3-3
6-1

Value* . . . .
Value-spec*
Values . . . .

3-4
5-9
3-4

WCS
disabling
enabling . .
loading
WHAMI register

15-5
15-5
15-2
15-5

The PDP-ll/60 Microprogramming
Tools Reference Manual
AA-C8l5A-TC

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