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EK-OTE16-TM-001

August 1977

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Document:	EK-0TE16-TM-001 TE16 TE10W TE10N Maintenance Manual Aug77
Order Number:	EK-OTE16-TM
Revision:	001
Pages:	313
Original Filename:	EK-0TE16-TM-001_TE16_TE10W_TE10N_Maintenance_Manual_Aug77.pdf

OCR Text

TE16/TE10W/TE10N
DECmagtape
Technical Manual

EK-OTE16-TM-001

digital equipment corporation • maynard, massachusetts

First Edition, August 1977

Copyright © 1977 by Digital Equipment Corporation
The material in this manual is for informational
purposes and is subject to change without notice.
Digital Equipment Corporation assumes no responsibility for any errors which may appear in this
manual.
Printed in U.S.A.

This document was set on DIGITAL's DECset-8000
computerized typesetting system.

The following are trademarks of Digital Equipment
Corporation, Maynard, Massachusetts:
DEC
DECCOMM
DECsystem-I0
DECSYSTEM-20

DECtape
DECUS
DIGITAL
MASSBUS

PDP
RSTS
TYPESET-8
TYPESET-II
UNIBUS

CONTENTS
Page
PREFACE
CHAPTER 1

INTRODUCTION

1.1
1.1.1
1.1.1.1
1.1.1.2
1.1.1.3
1.2
1.2.1
1.3
1.4
1.5

GENERAL INFORMATION ............................................................................ 1-1
Improvements Over TU 16 ............................................................................ 1-1
Electronic Improvements ...................................................................... 1-1
Mechanical Improvements ................................................................... 1-2
Electromechanical Improvements ......................................................... 1-2
BASIC DESCRIPTION ...................................................................................... 1-2
TEI0W jTEI0N Information ........................................................................ 1-8
TAPE DRIVE FUNCTIONAL DESCRIPTION .............................................. 1-11
UNIT SPECIFICATIONS ................................................................................. 1-11
RELATED DOCUMENTS ............................................................................... 1-11

CHAPTER 2

INSTALLATION

2.1
2.1.1
2.1.2
2.1.3
2.2
2.2.1
2.2.2
2.3
2.4
2.4.1
2.4.1.1
2.4.1.2
2.4.1.3
2.5
2.5.1
2.5.2
2.5.3
2.5.4

SITE PLANNING AND CONSIDERATIONS .................................................. 2-1
Space Requirements ..................................................................................... 2-1
Power Requirements .................................................................................... 2-1
Environmental Requirements ....................................................................... 2-1
UNPACKING .................................................................................................... 2-1
TE 16 Cabinet Unpacking ............................................................................. 2-4
Controller Unpacking .................................................................................. 2-4
INSPECTION ..................................................................................................... 2-4
TE16 INSTALLATION AND CABLING .......................................................... 2-4
Cable Connections ....................................................................................... 2-7
Power Cable ......................................................................................... 2-7
System Cabling ..................................................................................... 2-7
Module Utilization ............................................................................. 2-12
ACCEPTANCE TESTING ............................................................................... 2-12
TM02jTE16 Acceptance Test Procedure .................................................... 2-12
TMBlljTEI0W jN Acceptance Test Procedure .......................................... 2-17
TM 8E jTE lOW jN Acceptance Test Procedures .......................................... 2-18
TC59 jTE 1OW jN Acceptance Test Procedure ............................................. 2-19

iii

CONTENTS (CONT)

CHAPTER 3

OPERATING INSTRUCTIONS

3.1
3.1.1
3.1.2
3.2
3.2.1
3.2.2
3.2.3
3.2.3.1
3.2.3.2
3.2.4
3.2.5
3.3

CONTROLS AND INDICATORS ..................................................................... 3-1
Address Selection Plug Receptac1e ................................................................ 3-3
Maintenance Aids ........................................................................................ 3-3
OPERATING PROCEDURES ........................................................................... 3-3
Application of Power .................................................................................... 3-3
Loading and Threading Tape ........................................................................ 3-3
Unloading Tape ........................................................................................... 3-5
Tape not at BOT ................................................................................... 3-5
Tape at BOT ......................................................................................... 3-5
Restart After Power Failure .......................................................................... 3-6
Restart After Fail-Safe ................................................................................. 3~6
OPERATOR TROUBLESHOOTING ................................................................ 3-7

CHAPTER 4

CUSTOMER CARE AND PREVENTIVE MAINTENANCE

4.1
4.2
4.3
4.3.1
4.3.2
4.3.3

CUSTOMER RESPONSIBILITIES .................................................................... 4-1
CARE OF MAGNETIC TAPE ........................................................................... 4-1
CUSTOMER PREVENTIVE MAINTENANCE ............................................... .4-2
Preventive Maintenance ............................................................................... 4-2
Magnetic Tape Drive Cleaning Kit ............................................................... 4-2
Cleaning the TE16 DECmagtape Drive ....................................................... .4-3

CHAPTER 5

THEORY ON OPERATION

5.1
5.1.1
5.2
5.2.1
5.2.2
5.2.3
5.2.3.1
5.2.4
5.2.4.1
5.2.4.2
5.2.4.3
5.2.4.4
5.3
5.3.1
5.3.1.1
5.3.1.2
5.3.2

INTRODUCTION .............................................................................................. 5-1
Basic Description ......................................................................................... 5-1
FUNCTIONAL THEORY OF OPERATION .................................................... 5-2
Tape Loading ............................................................................................... 5-7
Reel Motor and Brake Control ..................................................................... 5-8
TE16 Capstan Motion ................................................................................ 5-12
Capstan Motion Control .................................................................... 5-12
TE16 Read/Write Data Paths ..................................................................... 5-15
On-Line Writing ................................................................................. 5-15
Off-Line Writing ................................................................................. 5-16
Common Write Data Path .................................................................. 5-16
Read Recovery ................................................................................... 5-16
DETAILED CIRCUIT DESCRIPTIONS ......................................................... 5-16
H607 Power Board ..................................................................................... 5-17
Tape Motion Power Board (DRVR) ........................................................... 5-17
Tape Motion Daughter Board .................................................................... 5-23
TE16 Power Supply .................................................................................... 5-30

CONTENTS (CONT)

5.3.2.1
5.3.2.2
5.3.2.3
5.3.2.4
5.3.2.5
5.3.2.6
5.3.3
5.3.3.1
.5.3.3.2
5.3.4
5.3.4.1
5.3.4.2
5.3.4.3
5.3.5
5.3.5.1
5.3.6
5.3.6.1
5.3.6.2
5.3.6.3
5.3.6.4
5.3.6.5
5.3.6.6
-5.3.6.7
5.3.6.8
5.3.6.9
5.3.6.10
5.3.6.11
5.3.6.12
5.3.7
5.3.7.1
5.3.7.2
5.3.7.3
5.3.7.4
5.3.7.5
5.3.7.6
. 5.3.7.7
5.3.7.8
5.3.8
5.3.8.1
5.3.8.2
5.J.8.3
5.3.8.4
5.3.8.5

Generation of Raw ±dc ...................................................................... 5-31
+5.3 Vdc Regulator Circuit ................................................................ 5-33
+ 12 Vdc Regulator Circuit (Write Circuits) ........................................ 5-34
+ 12 Vdc Regulator Circuit (Control Switch Circuits) .......................... 5-35
-6.4 Vdc Regulator Circuit ................................................................. 5-35
Specifications ..................................................................................... 5-36
G066 Module Description .......................................................................... 5-36
Threshold Voltages ............................................................................. 5-36
Read Heads and Amplifiers ................................................................ 5-38
M8911-YB/M8931 Slave Clock and Motion Delay ..................................... 5-46
Write Clock ........................................................................................ 5-46
Motion Delay ..................................................................................... 5-47
Read Strobe Generation ..................................................................... 5-49
M8912 Module Description ........................................................................ 5-49
Theory of Operation ........................................................................... 5-52
M8916 - Logic and Write Module Description ............................................ 5-54
Write Data Path ................................................................................. 5-54
Tape Motion ...................................................................................... 5-58
Power Clear ........................................................................................ 5-58
Servo System Failure Detection .......................................................... 5-58
Loading Sequence Logic ..................................................................... 5-58
Brake Release ................................ :..................................................... 5-59
Rewind Control .............................. ·.................................................... 5-59
Unload Control .................................................................................. 5-59
Tape Unit Ready and Transport Settling Down .................................. 5-60
Manual Control Operation ................................................................. 5-61
Tape Unit Status Sensors .................................................................... 5-62
On-Line Operation ............................................................................. 5-64
M8926 Interface Module Description ......................................................... 5-66
General .............................................................................................. 5-66
Command Logic ................................................................................. 5-71
Status Logic ........................................................................................ 5-71
Drive Start Signals .............................................................................. 5-72
Startup Delay ..................................................................................... 5-72
Write Sequence ................................................................................... 5-81
Read Sequence ........ ;.......................................................................... 5-88
Drive Stop .......................................................................................... 5-98
M8927 Interface Module Description ......................................................... 5-98
General .............................................................................................. 5-98
Multiplexed Interface ......................................................................... 5-98
Control/Status Interface ................................................................... 5-111
Write Data Interface ......................................................................... 5-113
Read Data Interface .......................................................................... 5-116

CONTENTS (CONT)

5.3.9
5.4
5.4.1
5.4.1.1
5.4.1.2
5.4.1.3
5.4.2
5.4.2.1
5.4.2.2
5.4.2.3
5.5
5.5.1
5.5.1.1
5.5.1.2
5.5.1.3
5.5.2
5.5.2.1
5.5.2.2
5.5.2.3

TE16 Switch Box ...................................................................................... 5-116
READ OPERATION ...................................................................................... 5-116
PE Read (TEI6 Only) ............................................................................... 5-116
Command Initiation ......................................................................... 5-116
Command Execution ........................................................................ 5-119
Command Termination .................................................................... 5-119
NRZI Read (TEI6, TEI0W, TEI0N) ........................................................ 5-119
Command Initiation ......................................................................... 5-119
Command Function .......................................................................... 5-121
Command Termination .................................................................... 5-121
WRITE OPERATION ..................................................................................... 5-121
PE Write (TEI6 Only) ............................................................................... 5-121
Command Initiation ......................................................................... 5-121
Command Execution ........................................................................ 5-123
Command Termination .................................................................... 5-123
NRZI Write (TEI6, TEI0W, TEI0N) ....................................................... 5-123
Command Initiation ......................................................................... 5-123
Command Execution ........................................................................ 5-123
Command Termination .................................................................... 5-124

CHAPTER 6

SERVICING

6.1
6.2
6.3
6.3.1
6.4
6.4.1
6.4.2
6.4.2.1
6.4.2.2
6.4.2.3
6.4.3
6.4.3.1
6.4.3.2
6.4.3.3
6.4.3.4
6.4.3.5
6.4.3.6
6.4.3.7
6.4.3.8
6.4.3.9
6.4.3.10
6.4.3.11

SCOPE ................................................................................................................ 6-1
MAINTENANCE PHILOSOPHY ...................................................................... 6-1
TEST EQUIPMENT ........................................................................................... 6-1
Diagnostics .................................................................................................. 6-6
PREVENTIVE MAINTENANCE ...................................................................... 6-7
Preventive Maintenance Schedule ................................................................. 6-7
Monthly PM Procedures .............................................................................. 6-7
Tape Path Cleaning and Inspection ....................................................... 6-7
NRZI Diagnostic (on all DECmagtape systems) ................................... 6-9
Phase Encoding Diagnostic (TEI6 Systems only) .................................. 6-9
Quarterly PM Procedures ............................................................................. 6-9
Operator Panel Check ......................................................................... 6-10
Supply Reel Hub Inspection and Lubrication ...................................... 6-1 0
Vacuum System Belt Inspection .......................................................... 6-12
Voltage Checks ................................................................................... 6-12
Forward Tape Speed and dc Balance Check ........................................ 6-15
Reverse Tape Speed ............................................................................ 6-17
Forward Jitter Check .......................................................................... 6-17
Reverse Jitter Check ........................................................................... 6-18
Forward Skew (Azimuth) Check .......................................................... 6-18
Reverse Skew Check ........................................................................... 6-19
Dvnamic Read Skew Packet Check ................................................. : ... 6-19

CONTENTS (CONT)

6.4.3.12
6.4.4
6.4.4.1
6.4.4.2
6.4.4.3
6.4.4.4
6.4.4.5
6.4.4.6
6.4.4.7
6.4.4.8
6.4.4.9
6.4.5
6.4.5.1
6.4.5.2
6.5
6.5.1
6.5.1.1
6.5.1.2
6.5.1.3
6.5.2
6.5.3
6.5.3.1
6.5.3.2
6.5.4
6.5.5
6.5.5.1
6.5.5.2
6.5.5.3
6.5.5.4
6.5.5.5
6.5.6
6.5.6.1
6.5.6.2
6.5.6.3
6.5.6.4
6.5.7
6.5.8
6.5.9
6.5.10
6.5.11
6.5.12
6.5.13
6.6
6.6.1

Functional Test Diagnostic ................................................................. 6-20
Semiannual PM Procedures ........................................................................ 6-20
Forward Ramp Check ........................................................................ 6-21
Reverse Ramp Check .......................................................................... 6-22
Tracking Check .................................................................................. 6-22
Erase Head Check .............................................................................. 6-25
Read Amplifier Check ........................................................................ 6-26
Residual Amplitude Check ................................................................. 6-27
Reverse Balance Check ....................................................................... 6-28
H607 Clock Check .............................................................................. 6-28
G066 Read Threshold Check .............................................................. 6-28
Annual PM Procedure ................................................................................ 6-31
Reel Motor Filter Replacement .......................................................... 6-31
Clean and Regap Reel Motor Brakes .................................................. 6-31
ADJUSTMENT / ALIGNMENT PROCEDURES ............................................ 6-32
Tape Path Alignment Procedure ................................................................. 6-32
Basic Tape Path Plane ......................................................................... 6-34
Head Plate and Fixed Guide Tape Path Plane ..................................... 6-38
Aligning Capstan Motor Shaft Perpendicular to Tape Path ................. 6-41
Snap-Lock Hub Adjustment ....................................................................... 6-55
Skew Adjustments ...................................................................................... 6-56
Mechanical Azimuth (Read Skew) Adjustment ................................... 6-56
Write Skew Adjustments ..................................................................... 6-57
Read Amplitude Adjustments ..................................................................... 6-59
Regulated Power Supply Voltages ............................................................... 6-60
+ 5 V Adjustment ................................................................................ 6-60
+ 12 V Adjustment .............................................................................. 6-60
-6.4 V Adjustment .............................................................................. 6-60
+ 12 V (NRZI) Adjustment ................................................................. 6-60
+5 V (PE) Adjustment (TEI6 only) ..................................................... 6-63
Capstan Balance and Speed ........................................................................ 6-63
Balance ............................................................................................... 6-63
Forward Tape Speed ........................................................................... 6-63
Reverse Tape Speed ............................................................................ 6-63
Rewind Tape Speed ............................................................................ 6-65
Capstan Current (Acceleration Ramps) ...................................................... 6-65
Tape Unload Adjustment ........................................................................... 6-67
Reel Motor Brake Adjustments .................................................................. 6-67
Read/Write Interlock Assembly Adjustment .............................................. 6-68
Vacuum Motor Belt Tension Adjustment. ................................................... 6-70
Vacuum Motor Pulley Height Adjustment .................................................. 6-70
BOT /EOT Sensor Alignment ..................................................................... 6-71
REMOVAL AND REPLACEMENT PROCEDURES ..................................... 6-72
File Reel Snap-Lock Hub ........................................................................... 6-73

Vll

CONTENTS (CONT)

6.6.2
6.6.3
6.6.4
6.6.5
6.6.6
6.6.7
6.6.8
6.6.9
6.6.10
6.6.11
6.6.12
6.6.13
6.6.14
6.6.15
6.6.16
6.6.17
6.7
6.7.1
6.7.2
6.7.2.1
6.7.2.2
6.7.2.3
6.7.3
6.7.4
6.7.4.1
6.7.4.2
6.7.4.3
6.7.4.4
6.7.5
6.7.6
6.7.7
6.7.8
6.7.9

Take-Up Reel ............................................................................................. 6-77
Capstan Motor/Tachometer ....................................................................... 6-78
Capstan Wheel ........................................................................................... 6-78
Roller Guides ............................................................................................. 6-79
Fixed Guides .............................................................................................. 6-79
Head Plate Assembly .................................................................................. 6-80
BOT /EOT Sensor Assembly ....................................................................... 6-80
Operator Control Panel .............................................................................. 6-81
Reel Motor ................................................................................................. 6-81
Reel Motor Brakes ..................................................................................... 6-82
Reel Motor Filter Replacement .................................................................. 6-84
Vacuum Switches and Rubber Sleeves ......................................................... 6-84
Vacuum Assembly Drive Belt ..................................................................... 6-86
Vacuum Pump Assembly ............................................................................ 6-87
Power Supply Regulator ............................................................................. 6-87
Transformer-Capacitor Assembly ............................................................... 6-88
CORRECTIVE MAINTENANCE .................................................................... 6-89
Tape Loading/Motion Troubleshooting ..................................................... 6-89
Reel Motor/Brake Control Troubleshooting .............................................. 6-89
Initial Checks ............................................................................. ,., .. ".6-89
Suggestions For Isolating Failed Components .................................... 6-93
Suggestions For Troubleshooting Intermittent Reel Operations .......... 6-93
Clocks Troubleshooting .............................................................................. 6-97
Power Supply Troubleshooting ................................................................. 6-100
Troublshooting Rules ....................................................................... 6-1 00
Troubleshooting Hints ...................................................................... 6-1 0 1
Troubleshooting Charts .................................................................... 6-1 0 1
Troubleshooting Blown Fuses ........................................................... 6-1 05
Troubleshooting with Off-Line Write Operations ...................................... 6-112
Troubleshooting Using the Data Reliability Diagnostic Program .............. 6-115
Troubleshooting Using the TE16 Utility Driver Diagnostic ....................... 6-122
Use Of The Drive Function Timer ............................................................. 6-128
Cable/Wire Harness Troubleshooting ....................................................... 6-130

APPENDIX A

MAGNETIC TAPE FUNDAMENTALS

A.1
A.2
A.2.1
A.2.2
A.2.3

DEFINITIONS .................................................................................................. A-l
RECORDING METHODS AND DECtape FORMATS ................................... A-2
NRZI Recording Method (Non-Return-To-Zero Change On One) .............. A-3
9-Channel Tape Format .............................................................................. A-4
7-Channel Tape Format .............................................................................. A-5

viii

CONTENTS (CONT)

A.3
A.4
A.5
A.6

CYCLIC REDUNDANCY CHECK (CRC) CHARACTER ............................. A-6
LONGITUDINAL REDUNDANCY CHECK (LRC) CHARACTER ............. A-7
DATA FILES ..................................................................................................... A-8
TRACK ASSIGNMENTS ................................................................................. A-8

APPENDIX B

GLOSSARY

FIGURES
Figure No.
1-1
1-2
1-3
1-4
1-5
1-6
1-7
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19

Title

Page

TE16 with Transport Extended and Side Panels Removed .................................... 1-3
TE16 Transport, Front and Rear Views ................................................................ 1-4
TE16 Transport, Side Views ................................................................................. 1-6
TEI6/TM02 Configuration .................................................................................. 1-8
M8926 System Configuration ............................................................................... 1-9
M8927 System Configuration ............................................................................... 1-9
TE 16 System Block Diagram .............................................................................. 1-11
H950 Cabinet: Space and Service Clearance, Top View ......................................... 2-2
H9500 Cabinet: Space and Service Clearance, Top View ....................................... 2-3
Installation of Filler Strips .................................................................................... 2-5
Transport Hold-Down Shipping Brackets ............................................................ 2-6
Cabling a TE16 in a New PDP-I0/11 System with Massbus
Controller (RH 11, RH70); i.e., RH 10/20 with TM02 ........................................... 2-7
Adding Transports to Existing Massbus System ................................................... 2-7
Adding Drives to PDP-I0 System When Formatter is TMI0 ................................. 2-8
Installing Transports in a New PDP-II System ..................................................... 2-8
Installing Slave Transports to an Existing PDP-II or PDP-8 System ..................... 2-9
Installing Transports in a New PDP-8 System ....................................................... 2-9
Adding Transports to an Existing PDP-8/TC58 System ...................................... 2-10
Installing Transports in a New PDP-15 System ................................................... 2-10
Adding Transports to an Existing TC59/TU 10 System ....................................... 2-11
Adding Transports to an Existing TC59/TU20 System ....................................... 2-11
Overview of System Cabling ............................................................................... 2-13
TEI0W Master, Module Utilization Diagram ..................................................... 2-14
TEI0W Slave, Module Utilization Diagram ....................................................... 2-14
TEI0N Slave, Module Utilization Diagram ........................................................ 2-15
TEI6, Module Utilization Diagram .................................................................... 2-15

FIGURES (CONT)

3-1
3-2
3-3
4-1
4-2
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
5-22
5-23
5-24
5-25
5-26
5-27
5-28
5-29
5-30
5-31
5-32
5-33
5-34
5-35
5-36
5-37
5-38
5-39

Operator Control Box .......................................................................................... 3-1
Tape Loading Path ............................................................................................... 3-4
Fail-Safe Limits .................................................................................................... 3-6
Location of Read/Write and Erase Heads and Tape Cleaner ............................... .4-4
Proper Ceramic Washer Positioning .................................................................... .4-4
TE 16 Functional Block Diagram .......................................................................... 5-3
Tape Loading Functional Block Diagram ............................................................. 5-9
Reel Motor and Brake Control Functional Block Diagram ................................. 5-11
CAPSTAN Motion Functional Block Diagram .................................................. 5-13
Read/Write Functional Block Diagram .............................................................. 5-15
Servo Feedback Loop ......................................................................................... 5-17
Tape Transport Mechanism ................................................................................ 5-20
Reel Motor Amplifier Equivalent Circuit.. .......................................................... 5-21
Tape Loop Location - Forward Motion ............................................................. 5-24
Tape Loop Location - Reverse (and Rewind) Motion ......................................... 5-25
TE16 Power Supply Regulator Board ................................................................. 5-30
TE16 Power Supply Regulator Board (Cover Removed) and Fan ....................... 5-31
TE16 Power Supply Clock Diagram ................................................................... 5-32
+5.3 Vdc Regulator Circuit ................................................................................ 5-33
Current Foldback Operation .............................................................................. 5-33
+ 12 V Regulator Circuit (Write Circuits) ............................................................ 5-34
+ 12 V Regulator Circuit (Control Switch Circuits) ............................................. 5-35
-6.4 V Regulator Circuit ..................................................................................... 5-36
Programmable Threshold ................................................................................... 5-39
One Read Track Equivalent Circuit .................................................................... 5-41
Peak Detector Waveforms .................................................................................. 5-43
POS and NEG Waveforms ................................................................................. 5-44
Read Amplifier Waveforms (NRZI) ................................................................... 5-45
Read Amplifier Waveforms (PE) ........................................................................ 5-46
WRT CLK Generation Timing ........................................................................... 5-48
TFG Operating Procedure Sequence ................................................................... 5-50
TFG Switch Settings ........................................................................................... 5-51
Test Function Generator Module ....................................................................... 5-51
SS RD Function Timing ..................................................................................... 5-53
SS RD Function ................................................................................................. 5-54
Write Data Path ................................................................................................. 5-55
Write Operation Timing ..................................................................................... 5-57
Rewind Sequence Timing ................................................................................... 5-60
Tape Markers, Recording Area, and Tape Wind ................................................. 5-63
Tape Motion Initiation Flowchart ...................................................................... 5-65
M8926 Simplifier Flow Diagram ........................................................................ 5-67
M 8926 Detailed Flow Diagram .......................................................................... 5-68
M8926 Block Diagram ....................................................................................... 5-69
Command Latch-Up Flow Diagram ................................................................... 5-73

FIGURES (CONT)

5-40
5-41
5-42
5-43
5-44
5-45
5-46
5-47
5-48
5-49
5-50
5-51
5-52
5-53
5-54
5-55
5-56
5-57
5-58
5-59
5-60
5-61
5-62
5-63
5-64
5-65
5-66
5-67
5-68
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
6-13
6-14
6-15

Status/Command Block Diagram ...................................................................... 5-75
R WS and CR WS Timing Diagram ..................................................................... 5-77
M8926 Timing Diagram ..................................................................................... 5-77
Drive Start-Up Flow Diagram ............................................................................ 5-78
Start/Stop Control Block Diagram ..................................................................... 5-79
Write Data Timing Diagram ............................................................................... 5-82
Write Flow Diagram .......................................................................................... 5-83
Write Block Diagram ......................................................................................... 5-85
Read Flow Diagram ........................................................................................... 5-89
Read Block Diagram .......................................................................................... 5-91
End-of-Record Timing, Non-zero CRC and LRC ............................................... 5-94
End-of-Record Timing, Zero CRC ..................................................................... 5-96
End-of-Record Timing, Zero LRC ..................................................................... 5-96
End-of-Record Timing, 7-Track ......................................................................... 5-97
File Mark Timing ............................................................................................... 5-97
End-of-Record Flow Diagram ............................................................................ 5-99
End-of-Record Block Diagram ......................................................................... 5-101
Drive Stop Flow Diagram ................................................................................. 5-1 03
M8927 Block Diagram ...................................................................................... 5-104
Multiplexed Interface Block Diagram ............................................................... 5-109
RWS(SB) and BRWS Timing Diagram ............................................................. 5-111
Control/Status Interface Block Diagram .......................................................... 5-112
Timing Diagram of Divide-by-46 Counter ........................................................ 5-114
Write Data Interface Block Diagram ................................................................ 5-115
Read Data Interface Block Diagram ................................................................. 5-117
PE Read Operation Flowchart .......................................................................... 5-120
NRZI Read (Forward) Operation Flowchart .................................................... 5-120
PE Data Write Operation Flowchart. ................................................................ 5-122
NRZI Data Write Operation Flowchart. ........................................................... 5-124
TE16 DECmagtape Transport Assemblies ............................................................ 6-2
Front View, Transport Casting ............................................................................. 6-4
Oxide Accumulation ............................................................................................ 6-8
Cross-Sectional View of Snap-Lock Hub ............................................................ 6-11
Belt Tension Gauge ............................................................................................ 6-12
TE 16 Power Supply Regulator Board ................................................................. 6-14
H607 Mother Board: Adjustments and Test Points ............................................. 6-15
Tape Speed Check: 10 JlS Sweep Speed ................................................................. 6-16
Jitter Check: Scope Setup ................................................................................... 6-17
Jitter Check: Capstan Motor Good ..................................................................... 6-17
Capstan Motor Bad ............................................................................................ 6-18
Skew Check (Azimuth) ....................................................................................... 6-19
PACKET Waveform .......................................................................................... 6-20
Forward Acceleration Ramp .............................................................................. 6-21
Reverse Acceleration Ramp ................................................................................ 6-22
xi

FIGURES (CONT)

6-16
6-17
6-18
6-19
6-20
6-21
6-22
6-23
6-24
6-25
6-26
6-27
6-28
6-29
6-30
6-31
6-32
6-33
6-34
6-35
6-36
6-37
6-38
6-39
6-40
6-41
6-42
6-43
6-44
6-45
6-46
6-47
6-48
6-49
6-50
6-51
6-52
6-53
6-54
6-55
6-56
6-57
6-58
6-59

Developing Magnetic Tape ................................................................................. 6-23
Developed Magnetic Tape .................................................................................. 6-23
Track No.1 Reference Edge Measurement ......................................................... 6-24
H607 Daughter Board ........................................................................................ 6-29
Dual PE Read Threshold .................................................................................... 6-30
Brake Assembly .................................................................................................. 6-31
Fixed Reel Assembly .......................................................................................... 6-34
Hub Height Adjustment ..................................................................................... 6-35
Roller Guide Gauge ........................................................................................... 6-36
Roller Guide Adjustment ................................................................................... 6-37
Take-Up Reel Roller Guide ................................................................................ 6-37
Measurement of Head Plate Mounting Surface ................................................... 6-39
Shim Dimension ................................................................................................. 6-40
Location of Shims under Head Plate Assembly ................................................... 6-40
Examples of Capstan N onperpendicularity ......................................................... 6-42
Location of Possible Capstan Burrs .................................................................... 6-42
Measuring Depth of Left Vacuum Column (LVC) .............................................. 6-44
Alignment Glass ................................................................................................. 6-45
Using Alignment Glass to Load Tape ................................................................. 6-46
Capstan Motor Shim Placement ......................................................................... 6-47
Capstan Motor Shim .......................................................................................... 6-48
Gap (Y) from Tape to Floor of Left Column ....................................................... 6-49
Measurement of Tape Gap (Y) with Penlight and Shim ....................................... 6-50
Upper Spring-Loaded Guide Location ............................................................... 6-52
Capstan Wobble Check ...................................................................................... 6-54
Summary, Capstan Alignment Flow Diagram .................................................... 6-55
Measurement of Pulse Positions Relative to PACKET ........................................ 6-56
G066 Adjustment Potentiometers ....................................................................... 6-61
TE 16 Power Supply Regulator Board ................................................................. 6-62
H607 Mother Board: Adjustments and Test Points ............................................. 6-64
Forward Acceleration Ramp Waveform ............................................................. 6-66
Reverse Acceleration Ramp Waveform .............................................................. 6-66
Brake Assembly .................................................................................................. 6-68
Read/Write Interlock Assembly ......................................................................... 6-69
Belt Tension Gauge ............................................................................................ 6-70
Motor-Mounting Holes for 50/60 Hz Operation ................................................. 6-71
EOT /BOT Sensor Alignment ............................................................................. 6-72
Reel Motor Adapter ........................................................................................... 6-73
Motor Spacer Positioning ................................................................................... 6-74
Tightening Motor Adapter Nut .......................................................................... 6-75
Snap-Lock Hub Cross Section ............................................................................ 6-76
Mounting Fixed Take-Up Reel ........................................................................... 6-77
Location of Possible Capstan Burrs .................................................................... 6-78
Side View of Roller Guide .................................................................................. 6-79
xii

FIGURES (CONT)

6-60
6-61
6-62
6-63
6-64
6-65
6-66
6-67
6-68
6-69
6-70
6-71
6-72
6-73
6-74
6-75
6-76
6-77
6-78
A-I
A-2
A-3
A-4
A-5
A-6

Side View Brake Assembly .................................................................................. 6-82
Rear View Brake Assembly ................................................................................. 6-83
Rear View, Reel Motors ..................................................................................... 6-85
Vacuum Switches ............................................................................................... 6-86
Motor Power Voltages ........................................................................................ 6-92
Bypassing Capstan, Tape Test Setup ................................................................... 6-94
Locations to Remember During Test .................................................................. 6-95
TEI6 Clock Troubleshooting Flow Diagram ...................................................... 6-97
TE16 Clock Troubleshooting Write Clock Signals .............................................. 6-99
5412242 Regulator Board Fuse Locations ......................................................... 6-104
Fuse Troubleshooting Chart ............................................................................. 6-1 05
REC and WD Signal Waveforms ...................................................................... 6-118
Read Signals ..................................................................................................... 6-118
NRZI Signal Waveforms Using Pattern 3 and 800 bits/in ................................. 6-120
Time Relationships of Write Operation Signals ................................................. 6-125
Waveforms ofREC Pulses (16 data pulses, CRC pulse, LRC pulse) .................. 6-126
Waveforms of Analog Read Signals .................................................................. 6-127
Waveform ofRSDO Pulses ............................................................................... 6-128
Wiring Harness to Power Supply Connections .................................................. 6-131
Reference Edge of Tape .......................................................................... ............. A-l
Track-Bit Weight Relationship for 9-Channel Transport ..................................... A-2
Data Recording Scheme ................................................................................. ..... A-3
Tape Recording Format ............................................................................... ....... A-4
7-Channel Tape Format ................................................................................... ... A-5
9-Channel Tape Format ................................................................ ...................... A-6

TABLES
Table No.
I-I
1-2
1-3
1-4
1-5
3-1
3-2
5-1
5-2

Title

Page

TE 16 Options ....................................................................................................... 1-8
Variation List for TE Family .............................................................................. 1-1 0
TE 16 System Functions ...................................................................................... 1-12
TE 16 Specifications ............................................................................................ 1-13
Related Documents ............................................................................................ 1-15
TE 16 Switch Functions ........................................................................................ 3-2
TE 16 Indicators ................................................................................................... 3-2
Slave Bus Interface Signals ................................................................................... 5-5
Power Supply Input Specifications ...................................................................... 5-37

xiii

FIGURES (CONT)

5-3
5-4
5-5
5-6
5-7
5-8
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
6-13
6-14
6-15
6-16
6-17
6-18
6-19
6-20
A-I
A-2
A-3

Power Supply Output Specifications ................................................................... 5-37
Write Clock Frequencies .................................................................................... 5-47
Start and Stop Motion Delays ............................................................................ 5-48
Negative Slave Bus Signals ................................................................................ 5-105
Positive Slave Bus Signals ................................................................................. 5-1 06
TEI0N Motion Delay Periods .......................................................................... 5-119
Test Equipment .................................................................................................... 6-5
H607 Mother Board Test Points ......................................................................... 6-16
Read Amplitude, Residual Amplitude, and Balance Checks ................................ 6-26
TE16 PACKET Analysis and Write Deskew Worksheet ..................................... 6-58
Read Amplifier Test Points ................................................................................. 6-61
H607 Mother Board Test Points ......................................................................... 6-65
Tape Loading Troubleshooting Chart ................................................................. 6-90
Off-Line Tape Motion Troubleshooting Chart. ................................................... 6-91
On-Line Tape Motion Troubleshooting Chart .................................................... 6-91
Loop Motion Sequences For Right Column (Lower Motor) ............................... 6-96
Loop Motion Sequences For Left Column (Upper Motor) .................................. 6-96
Power Supply Troubleshooting Chart ............................................................... 6-101
Fuse Chart ........................................................................................................ 6-103
Signals to Check When All Channels are Dead .................................................. 6-112
Signals to Check When Some Tracks Are Missing ............................................. 6-113
Trouble Analysis of Data Reliability Diagnostic ............................................... 6-113
Trouble Analysis of Data Reliability Diagnostic Using Pattern 1 ...................... 6-115
Trouble Analysis of Data Reliability Diagnostic Using Pattern 3 ...................... 6-119
Troubleshooting Phase Encoded Mode ............................................................. 6-121
Trouble Analysis of Utility Driver Diagnostic ................................................... 6-123
Five-Character Record ........................................................................................ A-7
CRC Character in Register When Writing ........................................................... A-7
Track Assignments for Data and Parity ....................... '" ..................................... A-8

xiv

PREFACE

This manual is formatted to aid the user in quickly locating information at the level desired. To
accomplish this, the manual is divided into six chapters:
Chapter 1 - Introduction: This chapter contains general information, such as basic and functional
descriptions, specifications, and a list of related documents.
Chapter 2 - Installation: This chapter provides complete installation information. Because the TE16
can be used with many different processor-controller/formatter combinations, cabling diagrams for all
such systems are provided. In addition, unpacking and inspection instructions and acceptance test
procedures are included.
Chapter 3 - Operating Instructions: This chapter is directed toward the operator/user, so that the
reader will have a complete understanding of how to power up, load/unload tape, and apply basic
troubleshooting techniques. No programming information is provided, as it appears in the respective
controller/formatter manuals.
Chapter 4 - Customer Care and Preventive Maintenance: This chapter lists customer responsibilities,
magnetic tape care fundamentals, and customer preventive maintenance procedures.
Chapter 5 - Theory of Operation: This chapter provides three levels of theory for a total TE 16 description. First, a basic description of the TE16 is discussed. Then, a functional overview is presented,
providing a "big picture" of the TE 16. Diagrams complement the text, taking the reader through
entire operations from the application of power through tape buffering, power supply operation, and
the read/write action.
Then, a unit level discussion of each TE16 module is presented. The discussion identifies functional
components of each circuit schematic in the print set. The reader will be able to use these descriptions
with the function overview section to gain an overall understanding ofTE16 operation. Also presented
here are descriptions of the M8926 and M8927 interface modules. Use of these modules a.llows the
TE16 to function in many system configurations. When used with one of these interface modules, the
TE16 option designation changes. With an M8926, the TE16 becomes a TEI0W master; with an
M8927, it becomes a TEI0N.
Detailed explanations of PE and NRZI read and write circuitry operation complete this chapter.
Chapter 6 - Servicing: This chapter provides complete servicing information. Included are test equipment requirements, preventive maintenance procedures adjustment and alignment procedures, removal and replacement procedures, and corrective maintenance procedures.

TE16/TEIOW /TEION DECmagtape System

CHAPTER 1
INTRODUCTION

1.1 GENERAL INFORMATION
The TE 16 is an industry-compatible 7- or 9-track tape transport capable of reading and writing on 1.27
cm (1/2 in) magnetic tape at 1600 char/in (PE) and 800, 556, and 200 char/in (NRZI). Tape density
and tape character format are program selectable. Forward/reverse tape speed is 1.14 m/s (45 in/s),
while rewind is performed at 3.8 m/s (150 in/s). The transport consists of a tape deck with associated
reel and capstan motors, H607 motor driver module, transformer and capacitor assembly, a logic box
that integrates the read/write electronics, the control electronics and the power supply regulator, and a
vacuum system assembly. An off-line test function generator is included in the control package, which
allows most maintenance procedures to be completed off-line.
1.1.1 Improvements Over TU16
Many differences between the TUI6 and TEI6 transports exist. Also, many improvements have been
made. A summary of the differences/improvements is listed below:
1.1.1.1

Electronic Improvements

The G056 read amplifier is replaced by the G066, for increased reliability. All discrete transistors are replaced by integrated circuits. All amplitude adjustment potentiometers are at
right angles to the module so that the module does not have to be extended for routine
adjustments. The G066 is interchangeable with the G056.

The M8910 logic and write module is replaced by the M8916, which includes logic for an
automatic load feature and a new LED style control box. The modules are not interchangeable.

The H606 power and servo module is replaced by the H607. The H607 is a "mother-daughter" assembly (hinged for access), which contains all of the original H606 circuitry plus
dynamic reel motor braking and unload circuitry. This module is not interchangeable with
the H606.

A hardware-activated, dual threshold feature during a PE read (forward or reverse) is
added. During the preamble, the head amplifier threshold is automatically lowered, enabling the drive to read weak or damaged records that were previously unreadable.

The 5410451 voltage regulator module is replaced by a 5412242, increasing the +5 V current
rating from 5 A to 8 A. These modules are interchangeable.

I-I

1.1.1.2

Mechanical Improvements

Improved fixed guide spacing relative to the tape head now follows the industry standard.

The spacing between the capstan and the upper fixed guide has been increased, making
steering adjustments easier and less critical.

The fixed guides are now mounted directly to the deckplate casting rather than on the
headplate, to maintain an accurate tape path. The headplate can distort when performing
azimuth adjustments, thus throwing off fixed guide perpendicularity.

A third roller guide has been added between the existing upper left-hand roller guide and the
take-up reel to aid in tape stacking.

The flange around the capstan motor has been eliminated, making capstan steering shim
adjustments easier.

The upper take-up reel is fixed in place (no hub) and is constructed of a material that reduces
warping.

The lower hub is a snap-lock type, which reduces service calls and makes the operator's job
easier.

1.1.1.3

Electromechanical Improvements

The new control box is easier to operate than the previous control box. It features Halleffect pushbuttons and LED indicators.

A semiautomatic tape loading feature is now provided. The operator must still manually
thread the tape. However, once the tape is threaded, a single button is pushed and the tape
automatically loads to BOT. If the operator has wound the tape past BOT, the drive times
out and rewinds tape to BOT.

An automatic unload is accomplished when the tape is at BOT and OFFLINE. When the
REW /UNLOAD switch is depressed, the panel tape unthreads automatically from the tape
path and the drive stops.

The head contour has been changed from a relatively flat style to a sharper contour. The
new head reads marginal or damaged tape much better than the previous head.

A switch panel, used for maintenance purposes, is mounted under the logic cage, as off-line
forward and reverse capabilities are not possible with the new control box.

1.2 BASIC DESCRIPTION
. The TEI6 tape transport is contained in a single 48.3 cm (19 in) cabinet (H950), along with an 861
power control (Figure 1-1). Optionally, the TE16 may be mounted in an H9500 cabinet. The transport
transfers digital data to and from magnetic tape, as commanded by the tape controller. The 861 power
control controls power in the TE16 controller cabinet. Figures 1-2 and 1-3 illustrate front, rear, and
side views of the transport and identify many of the TE16 components and subassemblies.

1-2

TAPE TRANSPORT

VACUUM
MOTOR

861
POWER
CONTROLLER
8348-4

Figure 1-1

TE 16 with Transport Extended and Side Panels Removed

1-3

CAPSTAN

VACUUM DOOR
(CLOSED)
HEAD PLATE ASS'Y
(COVER REMOVED)

READ/WRITE
HEAD

TAPE CLEANER

CONTROL
PANEL

HUB SNAP
LOCK

TRANSPORT TWIST
LOCK
8348-3

A.
Figure 1-2

Front View

TE16 Transport, Front and Rear Views (Sheet 1 of 2)

1-4

LOGIC FAN
ASSEMBLY

CABINET FAN

POWER SUPPLY
REGULATOR BOARD

SHIPPING
BRACKETS (2)

TRANSFORMER/
CAPACITOR
ASSEMBLY

VACUUM HOSE

8348-2

B.
Figure 1-2

Rear View

TE16 Transport, Front and Rear Views (Sheet 2 of 2)

1-5

H607
POWER BOARD

TACHOMETER

LOGIC FAN

CAPSTAN
MOTOR

BRAKE
ASSEMBLY
TAKEUP
REEL MOTOR

TE1e POWER SUPPLY
REGULATOR BOARD

VACUUM
SWITCH
ASSEMBLY

VACUUM
SWITCH
ASSEMBLY
TRANSFORMER/
CAPACITOR
ASSEMBLY

FILE REEL
MOTOR

NOTE:
THE CAPSTAN MOTOR AND TACHOMETER
FORM AN INTEGRAL UNIT. DO NOT
DISASSEMBLE THE UNIT.

READ/WRITE
INTERLOCK

Left Side
8348-12

Figure 1-3

TE16 Transport, Side Views (Sheet 1 of 2)

1-6

DAUGHTER
BOARD

8348-9

B.
Figure 1-3

Right Side

TE16 Transport, Side Views (Sheet 2 of 2)

The TE16 master transport comprises interface logic (e.g., M8926, M8927) and a "host" transport.
The interface logic processes commands from a controller and issues motion and read/write commands to the host and slave transports; the interface logic also monitors status lines from the host and
slave transports. Any status changes at the selected transport are immediately reported to the controller. In response to inputs from the interface logic, the host transport (if selected) controls tape
motion and records on and reads from magnetic tape.
The TE16 slave transport consists of a tape transport only. In response to inputs from the interface
logic in the master transport, it controls tape motion and records on and reads data from magnetic
tape.
Table 1-1 lists the models available in the TE16 Tape Transport.

1-7

Table I-I

TEI6 Options

Unit
Designation

Data
Features

Power Requirements

TEI6-EE
TEI6-EF
TEI6-EH
TEI6-EJ

9-track PE/NRZI
9-track PE/NRZI
9-track PE/NRZI
9-track PE/NRZI

115 Vac @ 60 Hz
230 Vac@ 60 Hz
115 Vac@ 50 Hz
230 Vac@ 50 Hz

1.2.1 TEIOW /TEION Information
The TE16 drive may be used in many different controller/processor configurations. When a massbus
peripheral is desired, the TE 16 is outfitted with cable connector modules that interface directly to the
TM02. Up to eight TE16 drives may be interfaced to a TM02 (Figure 1-4).
The TE16 may be outfitted with an M8926 interface module, converting the drive to a TEI0W master
drive. The TEI0W is both electrically and software compatible with a TUI0 Master tape drive. Up to
seven additional TEI0W slave drives may be connected to a TEI0W master drive. The TEI0W family
interfaces to the TM 11, TMAll, or TMBII (unibus) or TM8E (omnibus) controllers (Figure 1-5).
The TE16 may also be outfitted with an M8927 interface module, converting the drive to a TEI0N. In
this configuration, it is both electrically and software compatible with a TU 10 slave tape drive. Additional TEI0W slave drives may be interfaced to the TEI0N. The TEI0N may be used as an add-on
drive in any existing TU 10 tape system (Figure 1-6).

TAPE
TRANSPORT

TM02

[MS;;7 - -

r--

I MS90S-YA

------1
MS913
I

(SEE NOTE 1)
RH11
RH70

PDP-11

----

tM-;9~ =~ r--

I
I

PDP-10

RH10

·1

---,

M9001

~~;1~j

r-J

Notes:
1.

Additional slave drives connect (daisy-chain) here.

Last slave on bus substitutes M9001-YB for M9001. MS913-YA for MS913 and M9001-YC for M9001-VA.
CP-3026

Figure 1-4

TEI6/TM02 Configuration

1-8

TE10N SLAVE
I

r--------,
PROCESSOR
OR
CONTROLLER

•

TU10

M8927

I
I
TAPE
I-I TRANSPORT
L

I
I

I
I
TAPE
M8926 I TRANSPORT

TM11
TMA11
TMB11
TM8E

PDP-8
PDP-11

I
1

TE10W MASTER
CP-3027

Figure 1-5

ANY
PROCESSOR
OR
CONTROLLER

M8926 System Configuration

TU10

• -,
I
I
I
I

I
PDP-8

TC58

I
TAPE
M8927
I TRANSPORT
I

PDP-15

·1

Te5.

~- J
-

CP-3028

Figure 1-6

M8927 System Configuration

The TEI0N also interfaces to Digital's negative logic tape controllers: TC58 (Omnibus), TC59 (PDP15) or TM 10 (PDP-I0).
In applications utilizing the TEI0N, the total number of transports attached to one controller is limited to eight (8). Thus, in an add-on situation, the total of TVI0s, TEI0W slaves, and the TEI0N must
be less than or equal to eight (8). In new systems utilizing negative-logic controllers, the total number
of TEI0W slaves plus the TEI0N must also be less than or equal to eight (8).
From the above discussion, it is apparent that the TEI6/TEI0W /TEI0N tape transports can be used
in any application that uses either TV16 or TVI0 tape drives. Table 1-2 lists all the available options
and the respective replacement transports to be used in various applications.

1-9

Table 1-2

Variation List for TE Family
Description

Old

New

TWUI6-EA
TWUI6-EB
TWUI6-EC
TWUI6-ED

TWEI6-EA
TWEI6-EB
TWEI6-EC
TWEI6-ED

11/70 Magtape System
11/70 Magtape System
11/70 Magtape System
11/70 Magtape System

115 V /60 Hz
230 V /60 Hz
115 V /50 Hz
230 V /50 Hz

TJUI6-EA
TJU 16-EB
TJUI6-EC
TJUI6-ED

TJEI6-EA
TJEI6-EB
TJEI6-EC
TJEI6-ED

Magtape System 800/1600
Magtape System 800/1600
Magtape System 800/1600
Magtape System 800/1600

115 V /60 Hz
230 V /60 Hz
115 V /50 Hz
230 V /50 Hz

TUI6-EE
TUI6-EF
TUI6-EH
TUI6-EJ

TEI6-EE
TEI6-EF
TEI6-EH
TEI6-EJ

9T 45 in/s Slave Drive
9T 45 in/s Slave Drive
9T 45 in/s Slave Drive
9T 45 in/s Slave Drive

115 V /60 Hz
230V /60 Hz
115 V /50 Hz
230 V /50 Hz

TMBII-EA
TMBII-EB
TMBII-EC
TMBII-ED

TMEI1-EA
TMEll-EB
TMEll-EC
TMEII-ED

Unibus 9T Tape System
Unibus 9T Tape System
Unibus 9T Tape System
Unibus 9T Tape System

115V/60Hz
230V /60 Hz
115 V /50 Hz
230 V /50 Hz

TMBII-FA
TMBII-FB
TMBII-FC
TMBII-FD

TMEII-FA
TMEll-FB
TMEll-FC
TMEll-FD

Unibus 7T Tape System
Unibus 7T Tape System
Unibus 7T Tape System
Unibus 7T Tape System

115 V /60 Hz
230 V /60 Hz
115 V /50 Hz
230 V /50 Hz

TEI0W-EA
TEIOW-EB
TEIOW-EC
TEI0W-ED

9T 1.114 m/s (45 in/s) Master Transport
9T 1.114 m/s (45 in/s) Master Transport
9T 1.114 m/s (45 in/s) Master Transport
9T 1.114 m/s (45 in/s) Master Transport

115 V /60 Hz
230 V /60Hz
115 V /50 Hz
230 V /50 Hz

TEI0W-EE
TEIOW-EF
TEI0W-EH
TEIOW-EJ

9T 1.114 m/s (45 in/s) Slave Drive
9T 1.114 m/s (45 in/s) Slave Drive
9T 1.114 m/s (45 in/s) Slave Drive
9T 1.114 m/s (45 in/s) Slave Drive

115 V /60 Hz
230 V /60 Hz
115 V /50 Hz
230 V /50 Hz

TEIOW-FA
TEI0W-FB
TEI0W-FC
TEIOW-FD

7T 1.114 m/s (45 in/s) Master Transport
7T 1.114 m/s (45 in/s) Master Transport
7T 1.114 m/s (45 in/s) Master Transport
7T 1.114 m/s (45 in/s) Master Transport

115 V /60 Hz
230 V /60 Hz
115 V /50 Hz
230 V /50 Hz

TUIOW-FE
TUI0W-FF
TUIOW-FH
TUIOW-FJ

TEI0W-FE
TEIOW-FF
TEIOW-FH
TEI0W-FJ

7T 1.114 m/s (45 in/s) Slave Drive
7T 1.114 m/s (45 in/s) Slave Drive
7T 1.114 m/s (45 in/s) Slave Drive
7T 1.114 m/s (45 in/s) Slave Drive

115 V /60 Hz
230 V /60 Hz
115 V /50 Hz
230 V /50 Hz

TUION-EE
TUION-EF
TUION-EH
TUION-EJ

TEION-EE
TEI0N-EF
TEION-EH
TEION-EJ

Add-On to 9T TUIO
Add-On to 9T TU 10
Add-On to 9T TU 10
Add-On to 9T TU 10

115 V /60 Hz
230 V /60 Hz
115 V /50 Hz
230 V /50 Hz

TUIOW-EE
TUIOW-EF
TUIOW-EH
TUIOW-EJ

1-10

Table 1-2

Variation List for TE Family (Cont)
Description

Old

New

TU10N-FE
TU10N-FF
TU10N-FH
TU10N-FJ

TE10N-FE
TE10N-FF
TE10N-FH
TE10N-FJ

Add-On to 7T TU10
Add-On to 7T TU10
Add-On to 7T TU 10
Add-On to 7T TU10

115 V/60 Hz
230 V/60 Hz
115V/50Hz
230 V/60 Hz

Both the M8926 and M8927 modules have connections available to expand a DECmagtape system. All
additional transports are TE10W slaves, which are virtually identical to the TE16 slave. The three
modules (M9001, M8908, and M9001-VA) interface the positive slave bus outputs of the
M8926/M8927 in the first transport to the add-on TE10W slave(s). Refer again to Figure 1-4 for more
information.
As noted earlier, both the TE10W and TE10N drives are basically identical to the TE16; only the
interfacing is different. Therefore, unless otherwise specified, all further references to a transport in
this manual are to the TE16 only. Information regarding the M8926 and M8927 interface modules is
provided in detail in Sections 5.3.7 and 5.3.8, respectively, of this manual.
1.3 TAPE DRIVE FUNCTIONAL DESCRIPTION
When the TE16 is interfaced' with one of the controllers mentioned in the previous section, a magnetic
tape system is created.
Figure 1-7 is representative of such a system. Detailed system configurations of many controller /transport combinations are provided in Chapter 2 of this manual. The basic functions performed by a controller in a system are off-line, read, write, write EOF, space forward, space reverse,
write-with-extended IRG, and rewind. Each of these functions is briefly described in Table 1-3.
Again, detailed operation of the various controllers and processors that can function with the TE 16 is
discussed in the respective controller/processor maintenance manuals or technical descriptions. A list
of reference documents is supplied in Section 1.5 of this manual.

TAPE
CONTROLLER

.A SLAVE BUS ....

"
Figure 1-7

TE16

SLAVE BUS ....

TE16
ADD-ON

CP-3029

TE16 System Block Diagram

1.4 UNIT SPECIFICATIONS
Table 1-4 contains operational, environmental, mechanical and electrical specifications for the TE 16
tape drive.
1.5 RELATED DOCUMENTS
Table 1-5 lists literature that supplements the information in this manual.

1-11

Table 1-3 TE16 System Functions
Function

Description

Off-Line

The off-line function is used when control is to be returned to the
tape transport so that tape can be rewound, reels changed, etc.,
without using processor time.
The off-line function places the selected tape transport in the offline (local) mode and causes it to begin a rewind operation.
A controller cannot write on or read from the magnetic tape when
the off-line function is used. Manual intervention is required to
return the drive to on-line status (i.e., ON-LINE bottom must be
pressed).

Read

This function permits reading from the magnetic tape. During the
read operation, the data portion of the record is loaded into the
controller data buffer for transfer to the memory. The LRC and
CRC characters are read but not transferred into memory

Write

This function permits writing on the magnetic tape. During the
write operation, data from the bus is loaded into the controller
data buffer register. The controller then transfers the data to the
tape transport write heads. The necessary LRC and CRC characters are generated and written on the tape following the data. The
write function advances the tape one record.

Write EOF

This function writes an end-of-file (EOF) mark on the tape. When
selected, this function erases a 7.6 cm (3 in) segment of tape prior
to writing the first character. The EOF mark and the associated
LRC character are considered one record. The EOF mark is an
octal 23-character (9-track drive; octal 17 for 7-track drive) followed by an octal (or octal 27) LRC character.

Space Forward

This function is used to skip over a number of records to find a
specific record on the tape. When selected, the space forward function causes the tape transport to advance a specific number of
records. The program loads the byte/record counter with the two's
complement of the number of records to be spaced over. Detection
of an end-of-file mark terminates a space operation.
Space forward is used for tape positioning only and, therefore,
does not affect information stored on the tape or in memory.

Space Reverse

This function is identical to the space forward function except the
tape moves in the reverse, rather than in the forward direction.

Write-with-Extended-IRG

This function is identical to the write function except that a 7.6 cm
(3 in) segment of tape is erased before writing the first character.

1-12

Table 1-3

TE16 System Functions (Cont)

Function

Description

Rewind

This function is used for rewinding the tape on the feed reel so that
the tape can either be loaded from the transport or operation can
start at the beginning of the tape. When this function is used, the
tape moves in the reverse direction at a much higher speed, 3.8 m/s
or 150 in, than for other functions, until the beginning-of-tape
(BOT) marker is detected. When the BOT marker is detected, the
tape slows down and comes to a complete stop at a point beyond
the BOT marker. It then moves forward until the BOT marker is
again detected, where it comes to a final stop. Rewind is used only
for tape positioning and has no effect on information stored on the
tape or in the memory.

Table 1-4 TE16 Specifications
Category

Parameter

Specification

Main
Specifications

Storage medium

1.27 cm (l/2 in) wide magnetic tape (industry compatible)

Capacity /tape reel

23 million characters (NRZI); 46 million characters (PE)

Data transfer rate

36,000 char/s (NRZI); 72,000 char/s (PE)

Transports /F ormatter,
maximum

Number of tracks

9 (or 7 TEI0W /N only)

Recording density

200, 556, 800 bits/in (TEI0); 800 and 1600 bits/in
(TE 16); program selectable

Interrecord gap

1.27 cm (0.5 in) minimum;
1.65 cm (0.65 in) nominal

Recording method

NRZI or phase-encoded; industry compatible.

Speed; forward and
reverse

1.14 m/s (45 in/s)

Rewind speed

3.8 m/s (150 in/s) nominal

Tape transport

Single capstan; vacuum columns

Start/stop distance

6.3 mm (0.25 in) nominal

Start/stop time

8 ms maximum

Data
Organization

Tape Motion

1-13

Table 1-4 TE 16 Specifications (Cont)
Category

Parameter

Specification

Tape
Characteristics

Width
Length
Type

1.27 cm (0.5 in)
731.6 m (2400 ft) maximum
Mylar base; iron-oxide coated

Thickness
Tension
Reel diameter
Reel hub

0.038 mm (1.5 mils)
227 g (8.0 oz)
26.7 cm (10.5 in)
9.37 cm (3.69 in) diameter (industry standard)

Tape transport,
mounting

Mounts on slides in a standard 48.3 cm (19 in) cabinet.

TE16 Transport

Without Cabinet

With H950 Cabinet

Depth
Width
Height
Weight

0.64 m (25 in)
0.48 m (19 in)
0.66 m (26 in)
70 kg (150 lb)

.76 m (30 in)
.53 m (21 in)
.83 m (72 in)
204 kg (450 lb)

Mechanical

861 power controller
Depth
Width
Height
Weight

0.20 m (8 in)
0.48 m (19 in)
0.13 m (5 in)
4.54 kg (10 lb)

Write
Read
Erase head

1.9 ~m (75 ~in) maximum
1.9 ~m (75 ~in) maximum
Full width

Power

Input current
Input Power
Voltage
Frequency

8 A at 115 V; 6 A at 230 V
920 VA; 1380 VA
115/230 Vac ± 10% (Note 1)
47-63 Hz; single phase (Note 2)

Operating
Environment

Temperature

15° to 32°C (Note 3)

Relative Humidity

20% to 80%, with maximum wet bulb 25° C and
minimum dew point 2°C (no condensation)

Altitude

2438 m (8000 ft) maximum

Interchannel
Displacement

1-14

Table 1-4 TEI6 Specifications (Cont)
Category

Parameter

Specification

Miscellaneous

BOT, EOT detection

Photoelectric sensing of reflective strip, industry
compatible

Broken tape detection

Vacuum fail-safe

Read/W rite head
disp lacem en t

3.8 mm (0.15 in)

Electrical skew

W rite deskew only; Read skew mechanically
aligned.

Interlocks

Interlocks disengage the tape transport mechanism
and reel motors when vacuum has been lost in the
vacuum columns.

Tape Packing

The tape handling system provides consistent
packing of the tape on the supply and take-up reels
during any operational mode of the transport.

Transport Bus

8 transports per controller, maximum 22.8 m (75
ft) cable length, maximum.
NOTE
Maximum length of 15.2 m (50 ft) from TC59 to
first TEIO N.

NOTE 1.

Transformer taps allow for nominal line voltages of 105 and 125 Vac.

NOTE 2.

Vacuum system must be configured for operation at either 47-53 Hz or 57-63 Hz.

NOTE 3.

Magnetic tape operation is more reliable if the temperature is limited to 65 0 to 75 0 F
(18 0 to 24 0 C) and the relative humidity to 40 to 60%.

Table 1-5

Related Documents

Title

Number

Description

PDP-15 Users Handbook,
Vol I (Processor);
PDP-15 Users Handbook,
Vol 2 (Peripherals).

15H 172

Devoted to the operation of the
PDP-I5 and its related peripherals.

861 A, B, C Power
Control Maintenance Manual

EK-861AB-MM-002

Contains theory of operation and
maintenance instructions for the
861 Power Controller.

TC58 Magnetic Tape
Control System Description

EK-TC58-TM-OOI

Contains a detailed description of
TC58 Controller operation.

TC59 Magnetic Tape
Control Instruction
Manual, Vol. I

I5HI88

Contains a detailed description of
the TC59 Controller (User Information).

TUI6/TM02 Tape Drive
System Maintenance Manual

EK-TU16-MM-002

Contains detailed theory and user
operation information for the
TM02 Controller.

TM03 Magnetic Tape
Formatter User Manual

EK-TM03-OP-OOI

Contains complete user operation
information for the TM03 Formatter.

TM03 Magnetic Tape
Formatter Maintenance
Manual

EK-TM03-MM-OOI

Contains detailed theory and
maintenance information for the
TM03 Formatter.

TS03/TM02 Tape Drive
System Maintenance Manual

EK-T3TMB-MM-OOI

Contains detailed theory and user
operation information for the
TM8E Controller.

TM II DECmagtape System
Maintenance Manual

EK-TMII-TM-004

Contains detailed information on
the TM 11.

TMAII DECmagtape
System Maintenance Manual

EK-TMAII-MM-PRE

Contains detailed information on
the TMAII.

TMBII/TUIOW
DECmagtape
Maintenance Manual
(TMBII-E/F System)

EK-TMBEF-MM-OOI

Contains detailed information on
the TMBII-E/F System.

RHIO Massbus Controller
Maintenance Manual

EK-RHIO-MM-002

Contains detailed information on
the RHIO.

I5H 175

1-16

CHAPTER 2
INSTALLATION

2.1 SITE PLANNING AND CONSIDERATIONS
Space, power, and environmental requirements are discussed in this section.
2.1.1 Space Requirements
The TE16 is housed in either an H950 or H9500 cabinet. Figures 2-1 and 2-2 illustrate the space and
service clearances required for each cabinet, respectively. Adequate space must be provided to slide the
equipment out of the rack for servicing and to open the front door on the TE16 DECmagape transport. A tape controller may be housed in either of the above mentioned cabinets or in an expansion
cabinet.
2.1.2 Power Requirements
The TE16 DECmagtape unit can be operated from a nominal 115 or 230 Vac, 50/60 Hz power source.
Line voltage should be maintained to within 20 percent of the nominal value, and the frequency should
not vary more than 3 Hz.
2.1.3 Environmental Requirements
The TE16 DECmagtape unit should be located in an area free of excessive dust and dirt or corrosive
fumes and vapors. To ensure proper cooling, the bottom of the cabinet and the fan inlet at the top of
the cabinet must not be obstructed. The operating environment should have cool, well-filtered, humidified air, a temperature range of 15° to 27°C (49° to 80°F) and relative humidity of 40 to 60 percent.
2.2 UNPACKING
The TE16 DECmagtape may be shipped with or without a controller. Unpacking and installation
procedures may vary slightly, depending on the system configuration. For example, if the user has
ordered a complete processor/controller/tape transport system, the controller is shipped installed in
its appropriate rack in the TE16 cabinet. However, if only part of the system is shipped because the
user already has a basic computer system, then the controller may be shipped separately with the
appropriate cables.

2-1

WINGING DOOR
(RH) NOTE 1

SWINGING DOOR

\ILH)_:~: '_ - - - - - - - - - - - - - - . - - - r -

~~~_

--""'"" , ,\-::::.-::::'/~

:~:g:"

II
II
1/

"-""-,\
'\'\

18 132 In
(46.27 em)

I
I
I'

+
REMOVABLE
END PANEL - - - - - .

1--0---I
I

REMOVABLE
END PANEL

- - II

48 7/32 in
(122.47cm)

I
I

CABLE ACCESS------________-!l-~I

0--;

/'
I

132

30 In
(76.2em)
LEVELER

~4 PLACES

+
CASTER SWIVEL
RADI US 2 13
In
(611 em) (4) CASTERS

FAN
PORTS

I."

I1 1-

•
,...-"----- 21'~16 In - - - - - 0 . 1

(54.87 cm)

TE16 EXTENDED
FROM CABINET

251n
(635 em)

NOTES:
,. Door may be L.H. or R. H.

Allow space for either case.
2. Cabinet
717/,~(182.28em) high
(floor line to cabinet top).

L _______ ~~___

..L_

(p- 2873

Figure 2-1

H950 Cabinet: Space and Service Clearance, Top View

2-2

18.22 in.
(46.27 em)

!
if
II

+
REMOVABLE
END PANEL (2)

,--------------,

_____

I
I

CABLE ACCESS - -_ _ _ ~

FAN PORT
45.74 In
(116.17 em)

--ri-----.
27.52 in

(69.9 em)

I
I

/' _ -..L,_ _ _ _ _ _ _ _ _ _ _ _ _ _ ~
!

+
CASTER SWIVEL
RADIUS 213hz in
(611 cm) (4) CASTERS

25 in
(63.5em)

NOTES:
1. Door may be L.H. or R. H.
Allow spaee for either case.

TE16 EXTENDED
FROM CABINET

2. 50in. (127em) or 60in (152cm)
high, depending on model (floor
line to cabinet top).

cp- 2874

Figure 2-2

H9500 Cabinet: Space and Service Clearance, Top View

2-3

2.2.1 TE 16 Cabinet Unpacking
To unpack the cabinet, proceed as follows:
1.

Remove outer shipping container.
NOTE
The container may be either heavy corrugated cardboard or plywood. In either case, remove any fasteners and cleats securing the container to the skid. If
applicable, remove wood framing and supports from
around the cabinet perimeter.

Remove the polyethylene cover from the cabinet.

Unbolt cabinet(s) from the shipping skid. The bolts are located on the lower supporting side
rails and are exposed by opening the access door(s). Remove the bolts.

Raise the leveling feet above the level of the roll-around casters.

Use wood blocks and planks to form a ramp from the skid to the floor and carefully roll the
cabinet onto the floor.

Roll the system to the proper location for installation.

2.2.2 Controller Unpacking
Refer to the relevant documentation, furnished with the specific controller used, for unpacking
information.
2.3 INSPECTION
After removing the equipment from its container(s), inspect it and report any damage to the responsible shipper and the local DIGITAL sales office. Inspect as follows:
1.

Inspect all switches, indicators, and panels for damage.

Remove equipment covers where necessary and inspect for loose or broken modules, blower
or fan damage, and loose nuts, bolts, screws, etc.

Inspect the wiring side of logic panels for bent pins, broken wires, loose external components, and foreign material.

Check the TE 16 transport(s) for any foreign material that may have lodged in the take up
reel or other moving parts.

Check the TE16 power supply for proper seating of fuses and power connectors.

2.4 TE16 INSTALLATION AND CABLING
To install the TE16 (either H950 or H9500) cabinet, proceed as follows:
1.

Lower the leveling feet so that the cabinet is resting on the floor, not on the roll-around
casters.

Use a spirit level to level the cabinet; ensure that all leveling feet are firmly on the floor.

2-4

Remove the shipping screws that secure the equipment to the cabinet.

If the TE 16 being installed is housed in an H950 cabinet and the cabinet is to be bolted to
another, install filler strips (P /V H952-G) between the cabinets as shown in Figure 2-3.
Tighten the bolts that secure the cabinet groups together, and then recheck that the cabinets
are level. (H9500 cabinets do not require filler strips when bolted together.)

71-7/16in.
(181.45 em.)

~,~
~~0
30 in.

I
0

(7620 om)

FILLER STRIPS

Figure 2-3

Installation of Filler Strips

Remove the plastic shipping pin from the top of the cabinet rear access door.

Ensure that the TE16 cabinet and the controller are connected to the same ground. Be sure
that the cabinet ground strap is installed.

After the TE16 has been positioned per the site plan, open the TE16 front door and loosen
the two twist-locks located in the upper left and lower right corners of the transport front
panel.

2-5

Loosen the two shipping brackets that secure the transport to the rear of the cabinet frame.
Slide the brackets toward the center of the cruciform, as shown in Figure 2-4, and then
tighten the shipping brackets.
NOTE
Do not remove the shipping brackets. If the TE 16 is
to be reshipped or installed in a new location, the
shipping brackets must be repositioned over the vertical members and then tightened.

If necessary, clean all outer surfaces.
LOGIC FAN
ASSEMBLY

CABINET FAN

POWER SUPPLY
REGULATOR BOARD

SHIPPING
BRACKETS (2)

TRANSFORMER/
CAPACITOR
ASSEMBLY

VACUUM HOSE

8348-2

Figure 2-4

Transport Hold-Down Shipping Brackets
2-6

2.4.1 Cable Connections
All power and interconnecting cabling is discussed in this section.
2.4.1.1

Power Cable - The power cable supplied with the TE16 is plugged into a local power outlet.
CAUTION
Before connecting the TE16 to the local power
source, ensure that the line voltage and frequency are
compatible with the TE16 power requirements.

2.4.1.2 System Cabling - The TE16 (or variations of the TEI6, i.e., TEI0W, TEI0N) may be used
with many different processor/controller combinations. Figures 2-5 through 2-14 illustrate a possible
system configuration for each possible combination. Each illustration lists all the cables, modules, and
locations used for that system.

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED

PDP-10
OR
PDP-11

FROM
AB01 J02
CD01.102

TO
M9001-YB-AB01

EF01 J01 M9001-YA EF01 J02

M9001-YC-EF01

FROM
- AB01
M8907
M8908YA - AB02
- AB03
M8908

AB01.101
COO1.101

TM02

BC06R

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED

-M9001·
-M8913-

TE16

M8913-Y A-Coo1

BC06R

SECOND
(OR ADDON)
TE16
CP·2875

Figure 2-5

Cabling a TE16 in a New PD·P-I0/11 System with Massbus Controller (RHll, RH70);
i.e., RHIO/20 with TM02

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED

M9001
- AB01
M8913
- CD01
M9001YA - EF01

TU16

M9001-YB AB01
M8913-YA CD01
M9001-YC EFOl

t--~

-----"t\I.--TE16

y
~~----------------------v---------------------~)
EXISTING SYSTEM
CP·2876

Figure 2-6

Adding Transports to Existing Massbus System

2-7

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED

THREE (3) TYPE
BC08A-XX CABLES
REQUIRED
FROM
1) B17
2) B18
3) B19

PDP-10

TM10

f---

TU10
SLAVE

TO
M8927
M8927
M8927

FROM
1) M8927 J01
2) M8927 J02
3) M8927 J03

NEGATIVE
TU10SLAVE BUS

TE10N
SLAVE

~
M9001
M8913
M9001YA

POSITIVE
TE16 SLAVE BUS

FIRST
ADD-ON

~~--------------------'Y~------------------~)

AB01
CD01
EF01

TE10W
SLAVE

SECOND
ADD-ON

EXISTING SYSTEM

NOTES:
1)
2)

-XX denotes cable length, in feet.
TU 1 O(s) would be present when adding to an existing system.
When configuring new system, TE 1 ON could cable directly to TM1 O.
CP-2877

Figure 2-7

Adding Drives to PDP-IO System When Formatter Is TMIO

THREE (3) THREE
BC06R-XX CABLES
REQUIRED

ONE(1) TYPE
BC11A-XX CABLE
REQUIRED
FROM
1) EF04

PDP-11

TMB11

TO
M8926 J K

/ \

FROM
1) M8926
2) M8926
3) M8926

TE10W
MASTER

J01
J02
J03

TO
M9001
AB01
MB913
CD01
M9001YA EF01

POSITIVE
TE16 SLAVE BUS

TE10W
SLAVE

NOTE: -xx denotes cable length, in feet.
CP-2878

Figure 2-8

Installing Transports in a New PDP-II System

2-8

THREE (3) TYPE
BCOSA-XX CABLES
REQUIRED
FROM
1) B17
2) B1S
3) B19

TM(A)11
OR
TMS

PDP-11
OR
PDP-S

TU10
MASTER

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED

TO
MS927 J
MS927 K
MS927 L

NEGATIVE
TU10SLAVE BUS

FROM
1) MS927 J01
2) MS927 J02
3) MS927 J03

TO
M9001
MS913
M9001YA

TE10N
SLAVE

TE10W
SLAVE

POSITIVE
TE16 SLAVE BUS

FIRST
ADD-ON

~'--------------------~y~--------------------~)

AB01
CD01
EF01

SECOND
ADD-ON

EXISTING SYSTEM

NOTES:
1)

-XX denotes cable length, in feet.
If adding to an existing TU10 system that has more than one transport, the TE10N
should be cabled to the last TU10 slave. TE10N must be electrically last
drive on negative bus, G741 and G741-YA terminators are required
in TU10 Master. No other external terminators are required, as they are
contained in the MS927 module.

CP-2879

Figure 2-9

Installing Slave Transports to an Existing PDP-II or PDP-8 System

TWO (2) TYPE
BCOSL-XX CABLES
REQUIRED *

PDP-S
M,E

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED

FROM

1) MS321 J01,2
2) MS323 J01,2

MS926 J
MS926 K

-------J
TMSE

____________~

FROM
1)
2)
3)

MS926 J01
MS926 J02
MS926 J03

TO
M9001
MS913
M9001YA

AB01
CD01
EF01

1,....--.---,
TE10W
MASTER

\..
POSITIVE
TE16 SLAVE BUS

TE10W
SLAVE

NOTES:

-xx

Modified per D-AD-7011571-0-0
denotes cable length, in feet.
CP-2880

Figure 2-10

Installing Transports in a New PDP-8 System

2-9

THREE (3) TYPE
BCOSA-XX CABLES
REQUIRED
FROM
1)
2)
3)

PDP-S

FROM

B17
B1S
B19

MS927
MS927
MS927

)

TU10
SLAVE

TC5S

I. L, M, E

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED

NEGATIVE
TU10 SLAVE BUS

1 ) M8927
2) M8927
3) M8927

TE10N
SLAVE

TO
J01
J02
J03

AB01
COO1
EF01

TE10W
SLAVE

POSITIVE
TE1S SLAVE BUS

FIRST
ADD-ON

MOO01
M8913
M9001YA

SECOND
ADD-ON

EXISTING SYSTEM
NOTE: - XX denotes cable length, in feet.
CP-2881

Figure 2-11

Adding Transports to an Existing PDP-8/TC58 System

TWO (2) TYPE
BCOSP-XX CABLES
REQUIRED
FROM
1)
2)

THREE (3) TYPE
BC06R-XX CABLES
REQUIRED
TO

B01,2
A01,2

J
K

1)
2)
3j

AND ONE (1) TYPE
BCOSN CABLE REQUIRED
1)

PDP-15

FROM

MS927
MS927

MS927
MS927
MS927

J01
J02
J03

M9001
MS913
M9001YA

AB01
CD01
EF01

MS927 L

A03

TC59
NEGATIVE
SLAVE BUS

TE10N
SLAVE

POSITIVE
TE16 SLAVE BUS

TE10W
SLAVE

NOTE: - XX denotes cable length, in feet
CP·2883

Figure 2-12

Installing Transports in a New PD P-15 System

2-10

THREE (31 TYPE
BC06R-XX CABLES
REQUIRED

TH REE (31 TYPE
BCOBA-XX CABLES
REQUIRED
FROM
11
21
31

PDP-9
OR
PDP-15

TC59

B17
B1B
B19

)

TU10
SLAVE

FROM

MB927
MB927
MB927

J
K

11 MB927
21 M8927
31 MB927

M9001
MB913
M9001YA

J l

TE10N
SLAVE

NEGATIVE
TU10SLAVE BUS

J01
J02
J03

TE10W
SLAVE

POSITIVE
TE16 SLAVE BUS

FIRST
ADD-ON

~--------------------~T--------------------~J

AB01
COO1
EF01

SECOND
ADD-ON

EXISTING SYSTEM
NOTE: - XX denotes cable length. in feet.
CP-2884

Figure 2-13

Adding Transports to an Existing TC59/TUI0 System

THREE (31 TYPE
BC06R-XX CABLES
REQUIRED

TWO (21 TYPE
BCOBP CABLES REQUIRED
FROM

D1.3
D2.4

MB927
MB927

11
21

FROM

J
K

AND ONE(11 TYPE
BCOBN CABLE REQUIRED
11

PDP-9
OR
PDP-15

TC59

i-----

TU20

MB927

) l

11 M8927
2) M8927
3) M8927

J01
J02
J03

M9001
M8913
M9001YA

AB01
Coo1
EF01

TU10N
SLAVE

LJ
POSITIVE
TE16 SLAVE BUS

TU10W
SLAVE

y
EXISTING SYSTEM
NOTE: - XX denotes cable length. in feet.

CP-2885

Figure 2-14

Adding Transports to an Existing TC59/TU20 System

2-11

To aid in locating the relative figure for this particular installation, the figure numbers and titles are
listed below.
Figure No.

Title

2-5

Cabling a TE16 in a New PDP-I0/11 System

2-6

Adding Drives to an Existing Massbus System

2-7

Adding Drives to PDP-IO System when Controller is TM 10

2-8

Installing Drives in a New PDP-II System

2-9

Installing Slave Drives to an Existing PDP-II /8 System

2-10

Installing Drives in a New PDP-8 System

2-11

Adding Drives to an Existing PDP-8/TC58 System

2-12

Installing Drives in aNew PDP-15 System

2-13

Adding Drives to an Existing TC59 /TU 10 System

2-14

Adding Drives to an Existing TC59/TU20 System

Locate the figure relative to the particular installation,and configure the system according to the information provided on the figure.
Figure 2-15 provides an overview of system cabling.
2.4.1.3 Module Utilization - Figures 2-16, 2-17, 2-18 and 2-19 show the module types and locations of
a TE lOW master and slave, TEION slave, and TE16, respectively. When configuring a system, refer to
the relevant diagram for a summary of MU information.
2.5 ACCEPTANCE TESTING
This section lists and describes all the tests and test procedures necessary to properly test and accept
the TEI6 DECmagtape Transport.
The TE 16 operates with many different processor/controller combinations. The paragraphs listed
below refer to the acceptance test procedures for the various comb\nations:
2.5.1
2.5.2
2.5.3
2.5.4

TM02/TE16
TMBII/TEI0W /N
TM8E/TEIOW /N
TC59/TEI0N

When those tests listed in the relevant paragraph are passed, the TE 16 is operating correctly.
2.5.1 TM02/TEI6 Acceptance Test Procedure
This section describes the TM02/TE16 Acceptance Test Procedure. When the following tests are complete, the TM02/TEI6 is operating correctly.

2-12

MASSBUS CAB LE A

CABLE B

CABLE C

5904

RH·11
04C/D

05 CID

06 C/D

---- - - - - - -------- - - - - 5903

5903

TM·02/3

04 AlB

a.,.,r--_-r-'

06 AlB

05 AlB

~
IF END OF BUS:
H870 OR 5903 V A

9001 VB

9001

01 AlB

SLAVE BUS A

8907
01 AlB

8913 VA

8913

01 CID

01 C/D

SLAVE BUS B

8908 VA

02 AlB

9001 VC

9001 VA

01 ElF

SLAVE BUS C

8908
03 AlB
TUITE 16 END OF BUS

TUITE 16 MIDDLE OF BUS
TM02/3
CP·3239

Figure 2-15

Overview of System Cabling
2-13

M8926

M8916

M8912

M9001

G066

(IN THE
MAINT.
POSITION)

M8916

M8912

G066

(SEE
NOTE)

(IN THE
MAINT.
POSITION)

M8913
(SEE NOTE)

M8911-YB

C
M8911-YB
(OR
M8931

OR
M8931

M8912

M8912
M9001-YA
(SEE NOTE)

(IN ONLINE
POSITION)

(IN ON(LINE
POSITION)

NOTE:
CP·2886

Module utilization of TE1 OW Slave is identical to that of TE16
with the exception that a TE 16 on end of slave bus requires
M9001-YB. M8913-YA. and M9001-YC.

Figure 2-16 TEI0W Master,
Module Utilization Diagram

CP·2887

Figure 2-17 TEI0W Slave
Module Utilization Diagram

2-14

M8916

M8912

G066

4
A

M9001

M8927

M8916

M8912

G066

(IN THE
MAINT.
POSITION)

(SEE
NOTE 2)

(IN THE
MAl NT.
POSITION)

M8913

M8911-YB
OR M8931

c
c
M8911-YB
OR
M8931

(SEE
NOTE 1)

M8912

E
E

M8912

M9001·YA

(IN ONLINE
POSITION)

liN ONLINE
POSITION)

F
F

NOTES:
1) Early transport models contain M8911-VB.
Later models contain M8931. Either module may be
used unless formatter is TM03; TM03 requires M8931.
2) Last TE16 on slave bus requires M9001-YB,
M8913-YA and M9001-YC. Later models require
M9001, M8913 and M9001-YA in slots A-F01
(inputs) and H8800, H8801 and H8800
terminators on A-F01 output connectors.

Cp·2888

Figure 2-18 TEI0N Slave,
Module Utilization Diagram

CP·2941

Figure 2-19 TE 16,
Module Utilization Diagram

2-15

The diagnostic programs used in this procedure are:
Data Reliability Test
TE16 BAsic Function Test
TEI6/TM02 Logic Test
TE 16 Drive Function Timer

MAINDEC-II-DZTUA
MAINDEC-l1-DZTUB
MAINDEC-l1-DZTUC
MAINDEC-II-DZTUG

Perform the following tests:

Run the TEI6/TM02 Logic Test (MAINDEC-II-DZTUC) for one complete pass. No errors are allowed. Run the test again with manual intervention.

Run the TE16 Basic Function Test (MAINDEC-II-DZTUB) for complete pass. No errors
are allowed.

Run the TE16 Drive Function Timer Test (MAINDEC-II-DZTUG) for one pass. No out
of range errors are allowed.
NOTE
After running this test, tape the teletypewriter (or
terminal) printout to the inside of the front access
door for future reference.

Run the TE16 Data Reliability Test (MAINDEC-II-DZTUA) as follows: Check the DECmagtape system NRZI mode by running one pass with the following parameters:
DENSITY = 3
PARITY = 0
FORMAT = 14
RECORD COUNT = 1
CHARACTER COUNT = 20
PATTERN NUMBER = 1
TAPE MARK = 1
INTERCHANGE READ = 0
SINGLE PASS = 1
STALLS
READ = 1
WRITE = 1
TURN AROUND = 1

Run the test with the console switches set to 000720.
A total of two write errors, one soft read forward and one soft read reverse error, are allowed with no
hard read errors.

2-16

Check the D ECmagtape system PE mode by running one (1) pass with the following parameters:
DENSITY = 4
PARITY = 0
FORMAT = 14
RECORD COUNT = 1
CHARACTER COUNT = 20
PA TTERN NUMBER = 1
TAPE MARK = 1
INTERCHANGE READ = 0
SINGLE PASS = 1
STALLS
READ ~ 1
WRITE = 1
TURN AROUND = 1
Run the test with the console switches set to 000720.
A total of two write errors, one soft read forward error and one (l) soft read reverse error, are allowed
with no hard read errors.
2.5.2 TMBII/TEIOW IN Acceptance Test Procedure
This section describes the TMBll/TEI0W /N acceptance test procedures. When the following tests are
complete, the TMBll/TEI0W /N is operating correctly.
The diagnostic programs used in this procedure are:
Instruction Test
MAINDEC-II-DZTMA
Drive Function Timer
MAINDEC-II-DZTME
Supplemental Instruction Test
MAINDEC-II-DZTMF
Multidrive Data Reliability Exerciser MAINDEC-II-DZTMH
Perform the following tests:

Run the Instruction test (MAINDEC-II-DZTMA) for one pass, with manual intervention.
No errors are allowed.

Run the Supplemental Instruction test (MAINDEC-II-DZTMF) for one complete pass. No
errors are allowed.

Run the Drive Function Timer (MAINDEC-II-DZTME) for one complete pass. No outof-range errors are allowed.
NOTE
After running this test, tape the teletypewriter (or
terminal) printout to the inside of the front access
door for future reference.

2-17

Run the Multidrive Data Reliability Exerciser (MAINDEC-II-DZTMH) for one pass on a
731.6 m (2400 ft) tape with the following parameters:
DENSITY = 2 or 3 (7- or 9-Track)
PARITY = 0
RECORD COUNT = I
CHARACTER COUNT = 20
PA TTERN NUMBER = I
TAPE MARK = I
SINGLE PASS = 1
STALLS
READ = 1
WRITE = I
TURN AROUND = I
Run the test with the console switches set to 000700.
A total of two write errors and one soft read error are allowed with no hard read errors.

2.5.3 TM8E/TEIOW IN acceptance test procedures
This section describes the TM8EjTEIOW jN Acceptance Test Procedure. When the following tests are
complete, the TM8EjTU lOW jN is operating correctly.
The diagnostic programs used in this procedure are:
Control Test, Part 1
Control Test, Part 2
Drive Function Timer
Data Reliability Test (7- or 9-Track)
Random Exerciser Program

MAINDEC-08-DHTMA
MAINDEC-08-DHTMB
MAINO EC-08- 0 HTM C IE
MAINDEC-08-DHTMD
MAINDEC-08-DHTMF

Perform the following tests:
1.

Run the Control Test, Part I (MAINDEC-08-DHTMA) for one complete pass with the
switch register set to 4200. No errors are allowed.

Run the Control Test, Part 2 (MAINDEC-08-DHTMB) for one complete pass with the
HTA+-" command. The switch register must be set to 4200. No errors are allowed.

Run the Drive Function Timer test (MAINDEC-08-DHTMC) for one complete pass and
compare the timing printout with the Time Limit Table in the Diagnostic listing.
NOTE
After running this test, tape the teletypewriter (or
terminal) printout to the inside of the front access
door for future reference.

2-18

Run the Data Reliability test, 7- or 9-Track (MAINDEC-08-DHTMDjE) for one complete
pass on a 731.6m (2400 ft) tape with the following parameters:
TST

PAT

PAR

DEN

RLS

WMO

RMO

800

Run this test with the console switches set to 1300. A total of two write errors and one soft
read error are allowed with no hard read errors.
5.

Run the Random Exerciser Program (MAINDEC-08-DHTMF) for one hour, with the
switch register set to 0000. No catastrophic errors are allowed.

2.5.4 TC59 ITEIOW IN Acceptance Test Procedure
This section describes the TC59 jTEI0W jN Acceptance Test Procedure. When the following tests are
complete, the TC59 jTEI0W jN is operating correctly.
The diagnostic programs used in this procedure are:
Instruction Test
Drive Function Timer
Data Reliability Test (7-9-Track)
Random Exerciser Program

MAINDEC-15-D4A
MAINDEC-15-D4C
MAINDEC-15-D4DjE
MAINDEC-15-D4G

Perform the following tests:

Run the Instruction Test (MAINDEC-15-D4A) for one complete pass, with the switch register set to 0002XO, where:

x = 0 for 7-Track
X = 4 for 9-Track

No errors are allowed.
2.

Run the Drive Function Timer (MAINDEC-15-D4C) for one complete pass and compare
the timing printout with the Time Limit Table in the Diagnostic listing. No out-of-range
errors are allowed.
NOTE
After running this test, tape the teletypewriter (or
terminal) printout to the inside of the front access
door for future reference.

Run the Data Reliability Test 7- or 9-Track (MAINDEC-15-D4DjE) for one complete pass
on a 731.6 m (2400 ft) tape with the following parameters:
TST

PAT

PAR

DEN

RLS

WMO

RMO

Run this test with the console switches set to 050000. A total of two write errors and one soft
read error are allowed with no hard read errors.
4.

Run the Random Exerciser Program (MAINDEC-15-D4G) for one hour, with the switch
register set to 000000. No catastrophic errors are allowed.
2-19

CHAPTER 3
OPERATING INSTRUCTIONS

3.1 CONTROLS AND INDICATORS
The operator control box (Figure 3-1) is located at the lower left-hand corner. The functions of the
control box switches and indicators are listed in Tables 3-1 and 3-2, respectively. All operator controls
are momentary contact switches. Indicators are yellow and red.

8348-6

Figure 3-1

Operator Control Box
3-1

Table 3-1

TE16 Switch Functions

Switch

Function

LOAD

Pushing this switch, when tape is correctly threaded, causes tape to be
pulled into the vacuum columns and the drive to seek the BOT marker
and go on-line when it is at rest at BOT.
The indicator on this switch glows when tape is in the vacuum columns
and proper vacuum has been established.
NOTE
A seek-for-BOT sequence consists of five seconds of
forward motion, followed by a rewind to BOT.

ONLINE

Pushing this switch causes the drive to make a transition between the
on-line and off-line states. For example, pushing the switch when the
drive is off-line causes it to go on-line. This switch is inoperative when
the LOAD indicator is off and no LOAD sequence is happening.
The indicator on this switch glows when the drive is on-line.

REWIND/
UNLOAD

This switch is inoperative when the drive is on-line. Pushing this switch
when the drive is off-line and not at BOT causes the drive to execute a
high-speed rewind to BOT. Pushing this switch when the drive is offline and at BOT causes the drive to execute an UNLOAD sequence,
gently winding all tape onto the lower reel.
This is not an indicating switch.
NOTE
Pushing this switch while the drive is executing a
LOAD sequence (LOAD indicator on) and seeking
forward for the BOT marker, aborts the LOAD sequence and causes a normal off-line rewind procedure. Never push this switch before the BOT
marker is sensed.

Table 3-2

TE16 Indicators

Indicator

Function

POWER

This indicator glows when ac power has been applied to the device. It is
powered by the +5 V regulated supply.

BOT

This indicator glows when the BOT marker IS positioned over its
sensor.

WRL

This RED indicator glows when either no tape reel is mounted, or a reel
is mounted without a write-enable ring.

SELECT

This indicator glows when the drive is both on-line and selected.

3-2

3.1.1 Address Selection Plug Receptacle
This receptacle accepts plugs labeled 0 through 7, which define the logical address of the device. If no
plug is in the receptacle, the drive cannot be selected. This is not an indicating plug.
3.1.2 Maintenance Aids
Two switches are located under the logic assembly to assist in TE16 maintenance. Both switches are
deactivated when the drive is on-line.
1.

FWD /REV - The FWD/REV switch determines the direction of tape motion. It does not,
however, initiate tape motion.
NOTE
Off-line tape motion may be initiated by the
ST ART /STOP switch or by the test function generator (TFG) module.

START /STOP - This switch initiates tape motion when moved from the STOP to the
START position. It halts tape motion when switched from the START to the STOP position.

3.2 OPERATING PROCEDURES
TE 16 operating procedures are described in the following paragraphs.
3.2.1

Application of Power
1.

If the 861 power controller REMOTE ON/OFF/LOCAL ON switch is in the REMOTE
ON position, TE16 power is controlled by the processor POWER key switch. This method is
used in normal operation.

If the processor POWER key switch is not activated, TE16 power may be turned on locally
by setting the 861 power controller REMOTE ON/OFF/LOCAL ON switch to LOCAL
ON. This method may be used during maintenance.

3.2.2 Loading and Threading Tape
Use the following procedure to mount and thread magnetic tape.
1.

Apply power to the transport. Ensure that the transport is off-line (the ON LINE switch
does not glow).

Place a write enable ring in the tape reel groove if data is to be written on the tape. Ensure
that there is no ring in the groove if data on the tape is not to be erased or written over.

Mount the file reel onto the lower hub in the following manner. Release the snap-lock lever
on the lower hub by pulling it firmly outward on the rim end. Then, with the reel groove
facing away from the operator, mount the file reel onto the lower hub. When the reel is
firmly seated against the hub flange (press the reel firmly, but not heavily), close the snaplock lever on the hub. The file reel is now correctly mounted.

Manually unwind tape from the file reel and thread the tape by the tape guides and head
assembly as shown in Figure 3-2.

3-3

Figure 3-2

ape Loading Path

3-4

c"."

Wind about four turns of tape onto the take-up reel. Ensure that the tape is in the guides.
CAUTION
Wind tape flat onto the take-up reel. Do not bend
tape back or place tape end outside of reel (out the
window). While winding tape on take-up reel, simultaneously unwind the file reel to relieve tension on the
tape. Rotate the reels gently. Do not jerk the tape, as
this could cause the tape to stretch.

When the tape is mounted and threaded, press the LOAD button. After a 2-second delay to
allow vacuum to be established, tape will be pulled into the vacuum columns and the seekfor-BOT sequence will begin. This sequence consists of 5 seconds of forward tape motion
followed by a rewind to BOT. When the BOT marker is sensed, tape motion stops and the
transport goes on-line (both the ON LINE switch and BOT indicators glow). The tape is
now positioned at the load point (at the BOT marker), and the transport is ready for use.

3.2.3 Unloading Tape
Depending on whether or not tape is at the BOT marker, use one of the following unloading procedures.
3.2.3.1

Tape not at BOT

Ensure the transport is off-line.

With the transport off-line and the tape not at BOT, press the REWIND/UNLOAD button.

The transport executes a high-speed rewind operation. When the BOT marker is sensed,
tape motion stops.

Press the REWIND/UNLOAD button again. An unload sequence begins, with the tape
gently winding onto the lower file reel. When all the tape is on the file reel, tape motion
stops.

To remove the file reel, unlock the snap-lock lever on the hub and gently pull the reel off.

3.2.3.2

Tape at BOT

Ensure the transport is off-line.

With the transport off-line and the tape at the BOT marker, press the REWIND /UNLOAD
button.

The unload sequence begins, with the tape gently winding onto the lower file reel. When all
the tape is on the file reel, tape motion stops.

To remove the file reel, unlock the snap-lock on the hub and gently pull the reel off.

3-5

3.2.4 Restart After Power Failure
In the event of a power failure, the TE 16 automatically shuts down and tape motion stops, without
physical damage to the tape. However, if the transport was on-line and was either reading or writing at
the time of the power failure, the last record should be assumed lost. Refer to the system recovery
procedures documentation if this happens. To restart the transport, proceed as follows:
NOTE
Return of power is indicated when the POWER LED
glows.
1.

Ensure that the TE 16 is off-line.

Using the top tape reel, manually wind up any loose tape so that it is just snug in the tape
loading path (Figure 3-2).

Press the LOAD button. This causes the tape to be drawn into the vacuum columns, go
forward for five seconds, and rewind to BOT.

3.2.5 Restart After Fail-Safe
I f the tape loop in either buffer column exceeds the limit shown in Figure 3-3, the vacuum system
automatically shuts down and tape motion stops without damage to the tape. When this fail-safe
condition occurs, the TE16 does not respond to either on-line or off-line commands. To restart the
transport, follow the procedure listed in Paragraph 3.2.4.

SHORT LOOP
(TRANSPORT
WILL SHUTDOWN)

VACUUM
SWITCHES

BUFFER
COLUMN

LONG LOOP
(TRANSPORT
WILL SHUTDOWN)

10-1268

Figure 3-3

Fail-Safe Limits

3-6

Before restarting, this failure should be noted in the system log, together with an indication of which
fail-safe switch was exceeded and the distance by which it was exceeded.
This information will aid Field Service in preventing a reoccurrence, should the fail-safe condition be
due to a tape drive problem.
3.3 OPERATOR TROUBLESHOOTING
Before any maintenance personnel are called to correct a problem, the operator can make several
checks with minimal effort. These precautions may isolate an easily correctable error:
1.

Ensure that the vacuum door (Figure 1-2) is closed and sealed properly.

If the tape does not stop at BOT, be certain the tape has a BOT marker. [The BOT marker is
4.87 m ± 3.05 m (16 ft ± 1 ft) from the beginning of tape.]

Ensure that the write enable ring is inserted in the tape reel if a write operation is to be
performed.

Clean the tape path according to the daily (8-hour) preventive maintenance procedures in
Chapter 4, if problems are related to the ability of the drive to read and write.

Check the POWER indicator. If it is not glowing, ensure that the 861 power control circuit
breaker is on. Also, ensure that the REMOTE/OFF /LOCAL 861 power control switch is in
the REMOTE position.

3-7

CHAPTER 4
CUSTOMER CARE AND PREVENTIVE MAINTENANCE

4.1 CUSTOMER RESPONSIBILITIES
The customer is directly responsible for:

4.2

Obtaining operating supplies, including disk cartridges, disk packs and filters, magnetic
tape, DECtape, paper tape, cassettes, printer paper, printer ribbons, plotter paper, etc.

Supplying accessories, including disk storage racks, DECtape storage racks, carrying cases
for disk cartridges and DECtape, cabinetry, tables, and chairs.

Maintaining the required logs and report files consistently and accurately.

Making the necessary documentation available in a location convenient to the system.

Keeping the exterior of the system and the surrounding area clean.

Turning off the teletypewriter and/or line printer when these devices are not in use.

Ensuring that ac plugs are securely plugged in each time equipment is used.

Performing the specific equipment care operations described in Paragraphs 4.2 and 4.3 at
the suggested periods or more often if usage and environment warrant.

CARE OF MAGNETIC TAPE
1.

Do not expose magnetic tape to excessive heat or dust. Most tape read errors are caused by
dust or dirt on the read head; keeping tape clean is imperative.

Always store tape reels inside containers when the tape is not in use; keep the empty containers tightly closed to keep out dust and dirt.

Never touch the portion of tape between the BOT and EOT markers; oil from fingers
attracts dust and dirt.

Never use a contaminated reel of tape; this spreads dirt to clean tape reels and could have an
adverse effect on tape transport reliability.

Always handle tape reels by the hub hole; squeezing the reel flanges could lead to tape edge
damage in winding or unwinding tapes.

Do not smoke near the tape transport or storage area; tobacco smoke and ash are especially
damaging to tapes.

4-1

Do not place magnetic tape near any line printer or other device that produces paper dust.

Do not place magnetic tape on top of the tape transport or in any other location where it
might be affected by hot air.

Do not store magnetic tape in the vicinity of electric motors.

4.3 CUSTOMER PREVENTIVE MAINTENANCE
Digital Equipment Corporation tape transports are highly reliable precision instruments that will
provide years of trouble-free performance when properly maintained. A planned program of routine
inspection and maintenance is essential for optimum performance and reliability. The following information will assist the customer in caring for his equipment and ensure the highest level of performance
and reliability.
4.3.1 Preventive Maintenance
To ensure trouble-free operation, a preventive maintenance schedule should be kept. Preventive
maintenance consists of cleaning only a few items, but the cleanliness of these items is very important
to proper tape transport operation. The frequency of maintenance will vary somewhat with the environment and degree of use of the transport. Therefore, a rigid schedule applying to all machines is
difficult to define. Daily cleaning is recommended for units in constant operation in ordinary environments. This schedule should be modified if experience shows other periods are more suitable. Paragraph 4.3.3 contains the cleaning instructions.
Before performing any cleaning operation, remove the file reel and store it properly. All items in the
tape path should be cleaned on a daily basis. In cleaning, be thorough, yet gentle.
CAUTION
Do not use acetone or lacquer thinner, rubbing alcohol, trichlorethane, or excessive cleaner. Isopropyl
alcohol (91%) is an acceptable cleaning agent. Be extremely careful not to allow any cleaner to penetrate
to ball bearings and motors.
4.3.2 Magnetic Tape Drive Cleaning Kit
A magnetic tape drive cleaning kit (TVCDl) has been carefully configured to provide cleaning materials that will not harm tape equipment and will not leave any residue behind to interfere with data
reliability. The hints contained in the following few paragraphs will ensure that the very best results
possible will be obtained from the kit.
The cleaning fluid in this kit is one of the best cleaners available. To ready the can of fluid for service,
unscrew the top and punch a small hole in the metal seal covering the pour spout.
WARNING
When using DECmagtape cleaning fluid, avoid
excessive skin contact. Do not allow it to come in
contact with the eyes, and do not swallow it. Use
cleaning fluid only in a well ventilated area.
When cleaning tape equipment, never dip a dirty cleaning swab or wipe into the can. To transfer fluid
onto the swab, pour a little out into the screw cap and dip the swab into the cap. Discard the remaining
fluid when the cleaning operation is complete.
Always keep the can of fluid tightly closed when not in use, because the fluid evaporates rapidly when
exposed to air.
4-2

Use the cleaning materials contained in the kit to clean tape heads, tape guides, the tape cleaner, reel
hubs, and any part of the drive where a dirty residue could ultimately come in contact with tape. To
clean other parts of the drive, such as the exterior surfaces of doors, use any reasonably clean, lint-free
material with or without cleaning fluid.
NOTE
An unusually stubborn dirt deposit that appears to
resist cleaner may require mild soap and water solution to dislodge it. After using soap, be sure to wash
down the affected area thoroughly with cleaning fluid
to remove soapy residues.
4.3.3

Cleaning the TE16 DECmagtape Drive
1.

Remove the tape reel from the unit.

Clean the following components of the drive using a foam-tipped swab soaked in cleaning
fluid (Figure 4-1).
a.
b.
c.
d.
e.
f.

Read/write head (Location A)
Erase head (Location B)
Tape cleaner (Location C)
Upper left-hand roller guide (Location D)
Lower roller guide (Location E)
Upper middle roller guide (Location H)
NOTE
Be careful to keep cleaning fluid only on the tapebearing surface of roller guides to prevent degreasing
the roller guide bearings.

When cleaning the head area, avoid the spring-loaded ceramic washers on the tape drive
assemblies. If it appears necessary to run the swab over the tape bearing surface of these
guides to remove oxide deposits, do so; however, when cleaning is completed, be sure that
the washer is pressed snugly up against the tape guide surface and not "hung up" on its shaft
(Figure 4-2).

Next, clean the vacuum pockets (F), the inner surface of the vacuum door (G), and the
rubber capstan wheel (J), using a lint-free wipe and cleaning fluid. Pass another lint-free
wipe over the head using a polishing action to remove any remaining deposits.

Use a dry wipe to clean the reel-contacting metal surfaces of the lower hub. Dirt on these
surfaces may result in slippage of the tape reel.

Inspect upper reel tape-contacting surfaces. If the surfaces are dirty, clean them using a swab
or wipe moistened in cleaning fluid.

4-3

o
E

c c

•

G
F
CP-2889

Figure 4-1

Location of Read/Write and Erase Heads and Tape Cleaner

THIS

NOT THIS
CERAMIC
WASHER

OECKPLATE
CASTING

CP-2890

Figure 4-2

Proper Ceramic Washer Positioning

4-4

CHAPTER 5
THEORY OF OPERATION
5.1

INTRODUCTION

This chapter is divided into five main sections: Introduction, Functional Theory of Operation, Detailed Circuit Descriptions, Write Circuitry, and Read Circuitry.
The Introduction references a basic block diagram to briefly describe TE16 system operation. Major
TE16 operations are detailed in a functional format in the second section. Block and flow diagrams
detail entire operations from the application of power through tape buffering, power supply operation,
and the read/write action.
The third section provides a unit level discussion of each TE16 module. Included in this section are
descriptions of the M8926 and M8927 interface modules that are used to permit the TE16 to be used in
many different system configurations. The discussion references and identifies functional components
of each drawing of the print set. The reader may then use these detailed logic descriptions with the
more basic functional diagrams in the previous section to gain an overall understanding of the TEI6.
The use of circuit schematic mnemonics prefacing signal names is exhibited throughout this chapter.
These mnemonics inform the reader where the signal originates. For example, signal LAW3 RELAY
ENABLE L originates on the third sheet of the Logic and Write (LAW) circuit schematics and the
TMDI HI FREQ CLOCK (1) H signal originates on the first sheet of the Tape Motion Daughter
(TM D) circuit schematics.
Completing this chapter are detailed explanations of PE and NRZI read and write circuitry operation.
Flow and timing diagrams complement this section.
All references to the TE16 imply the TEI0W /N options inclusively, unless otherwise specified.

5.1.1

Basic Description

This section outlines the manner in which a programmer's commands are transmitted to the TEI6. It is
presented to provide a background for the controller-transport interaction, which is described in
greater detail in later sections of this chapter.
Figure 5-1 is a functional block diagram of the TE 16 D ECmagtape transport. The processor initiates a
controller/TEl6 operation by addressing the controller registers by way of an address decoder and
loading the operation parameters into the registers. The processor specifies an out transfer (with respect to itself), causing a select out signal to be asserted for the particular register addressed. As each
register is selected, the processor places the appropriate data on its data lines, which is then loaded into
the register with a strobe pulse. Thus, the command register receives the type of operation to be
performed, the byte-record count register receives the number of bytes to be transferred, and the
current memory address register receives the memory address of the first byte to be transferred.

5-1

The controller command logic selects which transport is to be involved in the transfer and supplies a
function command to the command decoder, which generates the required commands for the tape
transport. When the start logic senses that the tape transport has been selected and is ready, it asserts a
SET pulse to the interface logic. This asserts the SLAVE SET PULSE signal to the TE 16, starting the
operation. If a read, write, or space forward operation is commanded, the transport command logic
asserts FOR to the tape drive system, which drives the capstan servo and starts the tape moving
forward.

If a write command is in progress, the controller counts a delay that is long enough to allow the tape to
come up to speed and then notifies the transport via the ACCL signal. The drive sends WRT CLK
pulses to the interface write channels, and writing of the data character begins. A WRITE command
signal from the controller enables the write channels, which transfer the write data from the controller
to the write heads in the transport. The controller write channel logic produces REC pulses, which
record the data characters on tape via the write heads. A parity bit is generated for each character and
is recorded on tape along with the character. When a transfer completes, the controller byte/record
counter is incremented, and the controller prepares for another transfer. When the byte/record
counter senses that the desired number of bytes has been transferred (i.e., written), it notifies the
interface write logic to write the end of record characters (NRZI mode) or the postamble (PE mode).
Typically, the interface read logic is enabled during a write operation and reads each character approximately 3 ms after it is written. The read heads are displaced from the write heads by 3.8 mm (0.15
inches). Thus, depending on density, 30 to 240 characters are written between the time a given character is written and the time it is read back.
The controller error logic monitors transport status, including parity and other data related errors and
asserts an error signal to the done logic if an error condition exists. Some types of errors warrant
terminating an operation before it is completed, while others wait until the end of the operation before
asserting an error signal.

If a read operation is in progress, the RDO - RD7 read data is gated to the controller data buffer
register, where it is loaded into the register. When the end of the operation is detected, the motion
control logic loads a post-operation delay code into the operation timing logic. When the postoperation delay is complete, the controller asserts STOP to halt tape motion. For detailed information
relative to processor or controller functions during read/write operations, refer to the correct processor and controller manuals.
The processor can read the controller registers by addressing them and requesting an in-transfer, with
respect to the processor. The address decoder then asserts select in for the particular register selected,
which gates the register bits out to a data bus through a register select output multiplexer.
The slave bus signals (Figure 5-1) are listed and described in Table 5-1.
5.2 FUNCTIONAL THEORY OF OPERATION
This section provides the reader with a general overview of the TE 16 in its various modes of operation.
Stress is placed on exhibiting all major components that are necessary to the operation under study
and on the major signal lines that interface those components. No attempt is made in this section to
explain the operation of any particular circuit. Such explanations are located in Paragraph 5.3, where
each TE 16 module is divided into its major subsections and analyzed.
When troubleshooting, this section of the TE16 Maintenance Manual should be used as an aid in
narrowing the area of search for a problem cause. Chapter 6 should then be referenced for more
explicit information about the suspected problem area, whether it is a module or a power supply.

5-2

TE16 HOST OR SLAVE TRANSPORT
LOGIC a WRITE (M8916)
____________
S_L_A_VE__S_E_L_E_C_T-+__~(LAW)

CONTROL

STATUS

INDICATOR

COMMANDS:
FWD ,REV ,RWNO aWRITE

SIGNALS ~

SLAVE SET PULSE
-

STOP

r-______....:F....:O=--R~ POWER BOARD (H607)

REV/REW

REWIND CAP

L
- -- -- _

---~~----~+--of[W00 (SB1-W07 (S81]

SLAVE
BUS

~ CAPS~A;--

14-- ~ SERVO

UPPER REEL a BRAKE DRIVE

RECORD

INDICATORS

-~ DRIVE SYSTEM- - - - - - - - - -

WRITE DATA LINES

CONTROL
PANEL
SWITCHES

OFF-LINE

LOWER REEL a BRAKE
DRIVE
VACUUM SWITCH SIGNALS

DO(J
6

VACUUM

ERASE _

SYS:M
_____________________ _

+ - -....

MEDIUM ON
LINE

D8()
D

I
I

VACUUM MOTOR ENABLE
_

-l
~

-",

SLAVE CLOCK aMOTION
DELAY (MB91'-Y81

READ AMPS
(G066)
[R00 (SBl -R07 (SB11
_____
R_E_A_D_D_A_T_A_Ll_N_ES-t..._I_ - - - _ _ _

-+-- --- --+-

ENABLE MOTION DELAY

ACC L
WRT CLK
*RSDO(READ STROBE DELAY OVER)

TE16 POWER
SUPPLY

*RSDO

generated in NRZI Mode only.

CP-3019

Figure 5-1 TE 16 Functional
Block Diagram

5-3

Table 5-1

Slave Bus Interface Signals

Slave Bus Signal

Function

Slave Select [SS(0:2)]

These lines select one out of eight possible TE 16 Transports for command execution.

Forward (FWD)
Reverse (REV)
Rewind (RWND)
Write Enable (WRITE)

These are the four command lines that determine TE 16
operation.

Slave Set Pulse
(SLAVE SET PLS)

This signal initiates TE 16 response to the four command
lines.

Stop (STOP)

This signal causes the TE16 to terminate motion. (Does
not apply to rewind, which terminates independently.)
Must be negated before assertion of the SET Pulse.

Enable Motion Delay (EMD)

This signal enables the TE 16 to gate out a coded motion
delay preset onto the read lines.

Accelerate (ACCL)

Asserted by the controller while the transport is getting up
to speed or not moving tape. Not asserted while the Identification Burst (lDB) is being written.

Write Data [WD(0:7,P)]

These nine lines transmit data to be written by the TEI6.

Record (REC)

A pulse that causes data to be written on tape.

Density Select
[DEN(0:2)]

These three lines control the density at which data is written on tape. They must also represent the density of tape
data during a read operation.
DEN2

o
o

DEN 1 DENO

o
o

0/1

BPI
200}

556

800
1600

TEIO }

TE16

Clock (CLOCK)

A 144-kHz clock, generated in the TEI6, present at all
times when the unit is on-line.

Write Clock (WRT CLK)

This clock is transmitted to the controller by a powered,
on-line TE16 loaded with tape when it is running at speed
(ACCL not asserted). The frequency of WRT CLK is a
function of the DEN lines and controls the write timing
frequency.

LRC Strobe (LRC STRB)

Asserted by the interface logic prior to the REC pulse that
writes the LRC character.

Read Data [RD(0:7,P)]

These nine lines transmit read data from the TE 16 to the
controller. (They also transmit the motion delay preset.)

Read Strobe Delay Over
(RSDO)

A read strobe pulse generated by the transport at the end
of the skew delay in NRZI mode.

5-5

Table 5-1

Slave Bus Interface Signals (Cont)

Slave Bus Signal

Function

Set Vertical Parity
Error* (SET VPE)

Asserted by the TE 16 during a write or interchange read
operation when data violates the skew window.

Beginning of Tape (BOT)

Asserted when the TE16 detects the BOT marker.

End of Tape (EaT)

Asserted when the TEl6 detects the EaT marker.

Rewind Status (RWS)

Asserted while the selected TE16 is performing a rewind
opertion.

7-Channel (7 CH)

Always negated by a selected TE 16 or 9-track TE I O.
Always present for a 7-track TEIO.

Slave Present (SPR)*

Asserted by a selected, powered TE16.

Medium On-Line (MOL)

Asserted by a selected, powered TE16 that is loaded with
tape.

Tape Unit Read (TUR)

Asserted by a selected TE 16 to indicate that tape motion
has stopped.

Settle Down (SDWN)

Asserted while the transport is decelerating, until it has
stopped.

Phase Encoded Status
(PES)*

Asserted by a TE16 when instructed to operate in PE mode
(DEN 2 asserted).

Slave Attention (SLA)*

Asserted by a TE16 when it comes on-line.

Set Slave Status
Change (SET SSC)*

Asserted at the completion of a rewind or when the unit
comes on-line. It is also pulsed when the transport goes
off-line or when the TE16 power fails. This line may be
asserted by any slave, selected or not.

Write Lock (WRL)

Asserted when the selected TE16 detects that the write enable ring has been removed from the tape reel.

Interchange Read (lRD)*

A maintenance function. When asserted in NRZI mode,
skew delays are tightened; in PE mode, a low read threshold is used.

Drive Type (DT)*

In the TEI6, these three bits are always asserted as follows:
DTO
DT1
DT2

*TE16/TM02 configuration only.

5-6

0
0

Table 5-1

Slave Bus Interface Signals (Cont)

Slave Bus Signal

Function

Serial Number
[SN(0:15)]*

These 16 lines contain the BCD code of the last four digits
of the serial number of the selected TEI6.

Drive Clear Pulse
(DR V CLR PLS)*

When asserted by the controller, DRV CLR PLS clears
SLA in the selected slave.

Initialize Pulse
(INIT PLS)*

When asserted by the controller, INIT PLS L clears SLA
in all on-line transports.

+5 V

The controller supplies this voltage to power the slave bus
terminator networks.

*TE16/TM02 configuration only.

5.2.1 Tape Loading
Elements shown in Figure 5-2 illustrate key events in a loading sequence. With the transport in the
unloaded state, the 5412242 regulator board supplies the following voltages:

+5 Vdc is supplied to the M8916. It is distributed on the M8916 to both the control panel
(via the M8916-control panel connecting cable) and the H607 daughter board. The daughter
board then distributes +5 Vdc to the mother board via the mother-daughter cable.

+17 Vdc, -17 Vdc, and COMMON are supplied to the brake control circuitry via the power
harness connecting the 5412242 and the mother board.

+ 16 Vdc, -16 Vdc, and COMMON are supplied to the capstan control circuitry via the
same power harness mentioned in step 2.

- 17 Vdc and COMMON are supplied to the reel motor circuitry. + 17 Vdc is not present
until the relay is energized.

When the LOAD switch on the control panel is depressed and released, the CTRL 1 LOAD SW L
signal asserts and then returns to the negated state upon release of the switch. The trailing edge of this
signal initiates the load sequence by setting the RELAY ENABLE flip-flop. Both LAW3 RELAY
ENABLE Hand LAW3 RELAY ENABLE L are then transmitted from the M8916 to the H607
daughter board.
LA W3 RELAY EN ABLE L simply passes through the daughter board, travels to the mother board
(via the mother-daughter cable), and finally to the 5412242 board along the power harness connecting
the mother board to the 5412242.
Once LA W3 RELAY ENABLE L reaches the power board, it energizes the relay, causing it to pull in
with an audible click. The relay contacts then make available the following voltages:

115 Vac is supplied to the vacuum motor assembly. (For 230 Vac units, the transformer is
used as an autotransformer to step 230 Vac down to 115 Vac.)

5-7

+ 17 V INTERRUPT is supplied to the mother board, thus powering the reel motor driver
circuits.

POWER COMMON INTERRUPT is supplied to the capstan motor, providing a return
path for capstan motor current.

Signal LAW3 RELAY ENABLE H is transmitted to the H607 daughter board, where it triggers a
circuit that delays for 2 seconds and then (if either lower fail-safe switch is still open) provides a 70 ms
pulse, TMD2 LOAD PULSE 1, to the H607 mother board. Note that the LOWER FAIL SAFE H
signal is transmitted to the M8916 via a back panel connector and is passed through the M8916 and
over to the H607 daughter board.
The TMD2 LOAD PULSE signal causes both reel motors to dump small loops of tape, sealing off
both vacuum columns. Once this occurs, vacuum is established in both columns, closing the lower failsafe switches. Closing these switches results in negation of LOWER FAIL SAFE Hand, 100 ms later,
the assertion of LAW3 REEL MOTOR ENABLE (0) L. This signal passes through the H607 daughter
board to the H607 mother board and enables the reel motor driver circuits there. At this time, the reel
motor control circuitry (distributed between the H607 mother and daughter boards) acts to position
both left and right hand loops between the vacuum sensing control switches.
Finally, approximately 4 seconds after the LOAD switch is pushed, the LA W3 LOAD LED signal is
pulled low by circuitry on the M8916 and the front panel LOAD indicator glows.

If a failure had occurred during the loading sequence, circuitry on the M8916 that senses both the
upper fail-safe and lower fail-safe switches would have been enabled at the 4-second time. Detection of
failure clears the RELAY ENABLE flip-flop, thus opening the relay on the 5412242 power board.

5.2.2 Reel Motor and Brake Control
This discussion illustrates the mechanism by which tape loops are maintained in the buffer columns
throughout all modes of tape motion. Figure 5-3 shows all modules, supply voltages, and major signals
involved in this mechanism.
The heart of the loop control system is the H607 daughter module (5412262). Inputs to this module
consist of the three motion commands (LA W3 FOR H, REV /REW H, and REWIND CAP H) and
four vacuum-sensing switch outputs. The signal LA W3 REEL MOTOR ENABLE L is also input to
the logic module but, as it is not utilized there, passes directly through to the power module. For a
description of the manner in which the three motion signals are generated, refer to Paragraph 5.2.3 for
a tape motion outline and Paragraph 5.3.6 for detail.
The H607 logic board uses the direction and magnitude of tape motion, together with the information
provided by the vacuum-sensing switches, to determine appropriate times for brake and motor actuation. The left-hand vacuum column switches control the upper motor and brake, while the right-hand
switches control the lower reel motor and brake. The upper and lower reel motors use completely
independent circuits, simplifying diagnosis of problems in this area.
The major outputs of the H607 module are two brake control signals and four reel motor direction
control signals. These signals are used to control the power driver circuits controlling the brakes and
motors.
Note that + 16 V and -16 V are not required to provide power for the reel motor and brake circuits.
However, in case of a failure in the ± 17 V power, diodes on the H607 (not shown in the figure) can
bleed power from the +16 V power line to allow brake actuation. While it is not apparent from the
diagram, the drivers for the brake circuits run from + 17 Vdc, while the reel motor drive circuits utilize
-17 V and + 17 V INTERRUPT. Thus, the RELAY ENABLE signal must energize the relay on the
5412242 regulator board before the reel motors can be energized.
5-8

H607
DAUGHTER

M8916

H607
MOTHER

LAW 3 REEL MOTOR ENABLE (0) L
REEL MOTOR ENABLE
t---------------4.,.- - - -+
- - - - - - - -..-- - -,
CONTROL
PANEL

LAW 3 RELAY ENABLE H

CTRL 1 LOAD SW L

..- - - - -.----;~~~~=~~:::J II
.....--------1- - . - -1-----------...- - - - -r---I----k:-::-:-~--'-b~
I
LAW 3 LOAD LED
+5V

-----

LOWER FAIL SAFE H

UPPER FAIL SAFE L

LAW 3 RELAY ENABLE L

RELAY ENABLE L

+5V

~----------

-,-

REEL MOTOR
DRIVER

CAPSTAN
MOTOR
SERVO &
DRIVER

LEFT COLUMN
LOWER FAIL
SAFE SWITCH

110VAC

110/230
VAC

--1::

230VAC

---r:::=b

"------1- ~ -

+5V

84:2-~

-I"I I .. -

+17VINT

-L.

PWR COM INT

+17V ---e
RIGHT COLUMN
LOWER FAIL
SAFE SWITCH

LOWER
REEL
MOTOR

CAPSTAN
MOTOR
&TACH

5412242

+ 17V

UPPER
REEL
MOTOR

...

LAW 3 LOWER FAIL SAFE H

I
I

TMD2 LOAD PULSE L

--I-------~

+17VDC, -17VDC,
+16VDC, -16VDC, COMMON

-...

.... -

110VAC
--1--------------...

LEFT COLUMN
UPPER FAIL
SAFE SWITCH

RIGHT COLUMN
UPPER FAIL
SAFE SWITCH
CP-3D20

Figure 5-2

Tape Loading Functional
Block Diagram

5-9

+5VDC

LAW3 FOR H
LAW3 REV/REW H

TMD1 UPR BRAKE ON L

LAW3 REWIND CAP H

TMD1 LWR BRAKE ON L

LAW3 REEL MOTOR ENABLE L ..

M~~~R~

H607
POWER
BOARD

REEL MOTOR POWER

DRV1
DRV1

UPPER BRAKE OUT

DRV4

.l-

-TMD2 LM GO CCW L

lWR~

MOTOR

TMD2 LM GO CW L
TMD3 UM GO CCW L

LWR MTR LVS

TMD3 UM GO CW L

LWR MTR UVS

REEL MOTOR POWER

DRV1
DRV1

LOWER BRAKE OUT

DRV4

UPR MTR LVS

--L
-

H607
LOGIC
MODULE

UPR MTR UVS

+17V

5412242

-17V
+17VINT
PWR COM

RIGHT
COLUMN
VACUUM
SWITCHES

LOWER
SWITCH

....r:::-

UPPER
SWITCH

LEFT
COLUMN
VACUUM
SWITCHES

LOWER
SWITCH

UPPER
SWITCH
CP-3021

Figure 5-3

Reel Motor and Brake Control Functional Block Diagram

5-11

5.2.3 TE16 Capstan Motion
This discussion illustrates and describes the mechanism by which tape motion is initiated and shows all
modules, supply voltages, and major signals involved in tape motion. Refer to Figure 5-4 while reading
this section.
To begin, tape motion can be initiated through two major signal groups: an on-line group and an offline group. The on-line signal group consists of five major signals. In order for the drive to respond to
this group of signals, it must be both on-line and selected. The signal SBUS 1 STOP (SB) L is an
overriding command and, when asserted, prevents all tape motion. The set pulse [SBUS 1 SLAVE SET
PULSE (SB) L] is used to load a motion command into the TEI6. The controller must negate STOP
before asserting SET PULSE to the TEI6. The three remaining command signals, SBUS2 FOR (SB)
L, SBUS2 REV (SB) L, and SBUS2 REWIND (SB) L, define the direction and speed of tape motion
requested by the SET PULSE. The controller must assert only one of these command lines when
requesting tape motion.
The off-line signal group used to initiate tape motion consists of seven signals. The drive must be offline in order for it to respond to any of these signals. Off-line rewinds can be initiated only by the
REW /UNLOAD switch, which is located on the TE16 front panel. Note that this switch requires +5
Vdc to power its Hall-effect closure mechanisms. Off-line operation at 1.14 m/s (45 in/s) is controlled
by the remaining six signals. The TE16 maintenance panel (located under the logic chassis) is the
source for four of these signals, while the M 8912 test function generator module supplies the remaining
two.
The FORWARD/REVERSE switch on the maintenance panel defines the direction for all off-line
operation at 1.14 m/s (45 in/s). The START/STOP switch is used to initiate and halt tape motion.
When the M8912 is inserted in slots A/B 03 of the TEI6, use of the STOP/START READ and
STOP /ST ART WRITE switches results in generation of the signals TFG3 FIRST ONE SHOT Land
TFG3 FOURTH ONE SHOT L. These signals have the same effect as flicking the STOP/START
maintenance switch from side to side.
The drive "jogs" in the direction indicated by the FORWARD/REVERSE maintenance switch.

5.2.3.1

Capstan Motion Control - Once a motion command has been loaded into the TEI6, the
command is processed on the M8916 Logic and Write module. The M8916 then asserts the appropriate command lines to the capstan motor circuitry: LA W3 FOR H, REV /REW H, and REWIND CAP
H are transmitted to the H607 logic board via the flat cable connecting the M8916 to the logic board.
These signals are simply passed through the logic board to the H607 power board via the interconnecting cable. Logic power travels along this same path to supply the integrated circuits used in the
first stage of the capstan motor control circuitry.
The last stage of capstan power drivers applies current to the capstan motor. Note that the return path
for this current passes through the H607 and terminates on the 5412242 power regulator module at the
relay on that board. As a result, the capstan motor will not move unless the RELAY EN ABLE signal
is asserted. This signal energizes the relay, applying POWER COMMON INTERRUPT to the capstan motor return lead and allowing the "push-pull" power driver circuit to direct the flow of current
to the capstan motor.
As the capstan motor turns, the tachometer attached to it generates the CAPSTAN TACH VOLTAG E signal, a voltage proportional to motor speed. This voltage is applied to the capstan servo
circuitry and is used to regulate motor speed.
For more information on the signal processing mentioned here, refer to the detailed logic descriptions
for the module or modules in question.
5-12

M9001
TE1e/
TE10W
SLAVE

TE10W
MASTER

TE10W

AB'1
M8913
CD~1

M892e
AFf/l1

M8927
AF;1

\
/

STOP(SB)l
SLAVE SET PUlSE(SB)l

-- ----

M9001

------ ~II
I

FWD(SB)l

------- ~I

M8913

REV(SB)l

------ ~II
- - - -- r---.-I

REWIND(SB)l

"""

M8916

LAW3 FOR H
lAW3 REV/REW H

------- ---..
-------

lAW3 REWIND CAP H
+5V

MDTD~

DRVR2 CAPSTAN TACH VOLTAGE
TACH RETURN

He07
lOGIC
BOARD

DRVR3CAPSTAN

CAPSTAN MOTOR RETURN

------ ~
------ ~

+5V

H607
POWER BOARD

0
CTRl1 REW/UNlOAD SW l

MANUAL FWD L

..-i, MANUAL REV L
START l

• J , STOP l

..
..

~
+5V

5412242

+1eV
-1eV
+17V

TFG31st ONE-SHOT L
M8912
(WHEN IN THE TFG3 4th ONE-SHOT l
AlB SLOT)

-17V

-v...AJ,J

~ _e_

POWER COMMON INTERRUPT
POWER COMMON ON

CP-3022

Figure 5-4

CAPSTAN Motion Functional
Block Diagram

5-13

5.2.4 TE16 Read/Write Data Paths
As with all other major transport functions, the TE16 can write data on tape under either direct
program control or off-line test control. This section outlines the data paths utilized in both on-line
and off-line write operations and traces the flow of data onto tape and back through the read recovery
chain. The read recovery scheme is identical to that of a normal read operation. Refer to Figure 5-5
while reading this section.

SLAVE SET PULSE (58) L
M8916
WRITE (58) L

MAGNETIC
TAPE

WD (rIf-7.P) (58) L
LRC STR8 (58) L

c ....

TEST
DATA L

RD ~-7.P

SETTESTWRE

a:: w
u ....
w::;)
a:: 0..

OU)

M8931
(OR M8911-Y8)

M8912
(TFG)

DIGITAL OUTPUT

G(l66

RSDO (58) L
WRT CLK (58) L
REC(S8)L

(SLAVE 8US)

ANALOG
TEST POINTS
CP-3023

Figure 5-5

Read/Write Functional Block Diagram

5.2.4.1

On-Line Writing - A controller uses only four signals to control TE16 writing. First, the DEN
2 (SB) L signal (not shown in Figure 5-5) is used to determine whether the TE16 will operate in NRZI
or PE Mode. (Operation of the write buffer on the M8916 LAW module is dependent upon the mode
in which the TE16 operates. In particular, when in PE Mode, one of the major write control signals,
LRC STRB (SB) L, is ignored.) Once the operating mode has been chosen, the controller commands
the TE 16 to write on tape by asserting WRITE (SB) L and strobing this signal with SLAVE SET PLS
(SB) L. Next, the controller uses the WRT CLOCK (SB) L signal (generated by M8911) to assert write
strobes [REC (SB) L] and transmits these REC pulses to the TEI6. REC (SB) L pulses are received on
the M8931 (or M9811-YB) module and then transmitted to the M8916 logic and write module.
In NRZI operation, the signal LRC STRB (SB) L is used to write the LRC character on tape. All other
data, including cyclical redundancy check (CRC) data is carried on the WD lines.

5-15

5.2.4.2

Off-Line Writing - In off-line test mode, the M8912 test function generator module is inserted
in slot A/B 03. In this mode, the STOP/START WRITE and WRITE switches on the M8912 module
can be used to generate a signal called SET TEST WRE. This signal is transmitted to the M8931 (or
M8911-YB), where it results in automatic generation of RECORD PULSEs, which are then transmitted to the M8916 in a manner identical to that of an on-line write operation. Generation of LRC
STRB signals in off-line mode is not possible. Signal SET TEST WRE L is also transmitted to the
M8916, where it turns on the write circuits.

5.2.4.3

Common Write Data Path - Once RECORD PULSEs have been generated, they are transmitted to the write buffer. Here, data is processed in a fashion that is dependent upon the mode
selected. In PE mode, the data contained on the WD lines (test data lines in off-line writing) is simply
clocked into the write buffer. In NRZI mode, the write buffer is used to format the data. (See Paragraph 5.3.6, M8916-Logic and Write Module Description, for a more detailed description of the write
operation.)
The write buffer outputs are transmitted through current-driver networks into the write head, where
data is recorded on tape as the tape moves past the write head at 1.14 m/s (45 in/s).

5.2.4.4 Read Recovery - The data recorded/written on tape then travels from the write head to the
read head. This distance is 3.8 m/s (150 in/s) so that a data bit deposited on tape by the write head
appears at the read head 3.3 ms later.
At the read head, data is picked up and passed along the read cable to the G066 read amplifier module.
(Test points are provided to inspect the analog stages of this module.) The output of the G066 module
consists of digitized read data. This read data is passed along to the M8931 (or M8911-YB) module,
where it is multiplexed with motion delay data. Read data is then transmitted as RD (0-7, P) to the
controller.
In NRZI mode, a read strobe is generated in the TEi6 [RSDO (SB) L]; whiie in PE mode, the
controller assumes all responsibility for read data recovery.

5.3

DETAILED CIRCUIT DESCRIPTIONS

A unit level discussion of each module is presented in this section. The descriptions reference functional components on the circuit schematics; therefore, a complete TE 16 engineering drawing set
should supplement this section. The reader can also use these descriptions with the functional diagrams in the previous section to gain an overall understanding ofTE16 (TEI0W /TEI0N) operation.
The sections and corresponding module descriptions are summarized below:
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9

H607 Tape Motion Power Board
5412242 Power Supply
G066 Read Amplifier
M8911-YB/M8931 Slave Clock and Motion Delay Module
M8912 Test Function Generator
M8916 Logic and Write Module
M8926 (TEI0W) Interface Module
M8927 (TEI0N) Interface Module
TE16 Switch Box

5-16

5.3.1 H607 Power Board
The H607 comprises the tape motion power board (5412264-DRVR) and the tape motion daughter
board (5412262-TMD). Together (as the H607), they contain the capstan drive circuitry and the tape
reel braking and motor control circuits. Individually, the two modules are referred to as the mother
(DRVR) and daughter (TMD) modules. The mother module is rigidly mounted to the deck plate, while
the daughter module is hinged. It swings outward for access while troubleshooting or adjusting.
5.3.1.1 Tape Motion Power Board (DRVR) - The tape motion power board (mother) is divided into
two main areas: capstan servo control and driver circuits, and the tape reel braking and motor control
circuits. This discussion references the 5412264 (DR VR) schematics.
5.3.1.1.1 Capstan Servo Control and Driver - The heart of the transport mechanism is the capstan
subsystem, which transports the tape across the read/write/erase head assembly at the desired speed.
The capstan is controlled by a velocity feedback servo loop (Figure 5-6). Refer also to sheet 2 of the
5412264 (DRVR) schematics.

CAPSTAN
MOTOR

TACHOMETER

CAPSTAN

TACHOMETER FEED BACK
~RV~---------------------~RVR~~

FOR H

REVERSE (1) H

I
I

FORWARD REFERENCE

VOLTAGE GENERATOR

REVERSE REFERENCE
VOLTAGE GENERATOR

REWIND H _ - - ' - "

'
I

I
I

,I
~E;;;--~I

SIGNAL
CAPSTAN SERVO AMPLIFIER
L _______________________________________
--...J
AND DRIVER

REWIND CAP H - - - - - - -...

RAMPED REWIND
REFERENCE GENERATOR

CP-3024

Figure 5-6

Servo Feedback Loop

As a forward command enters the logic (FOR H), Q29 is biased correctly to turn on. With Q29 turned
on, the voltage at the base of Q44 is higher than the -8 V at the emitter, resulting in Q44 being turned
on.

5-17

If either reverse or rewind is selected, signal REV jREW H becomes true and turns Q45 on. Notice that
the collectors of Q44 and Q45 are connected and that the output line is the running speed line going to
the "-" input of the 72741 operational amplifier. Diodes D55 and D54 detect the more positive and
more negative levels from 044 and Q45 respectively when selected. Therefore, when Q45 is on (Q44
off), D54 conducts and when Q44 is on (Q45 off), D55 conducts.
Resistors R91 and R87 are the forward and reverse speed adjustments; each is adjusted to move tape at
1.14 mjs (45 injs).
Transistors Q46, Q47, and Q48 constitute a -8 V series regulator that biases the forward (Q44) logic.
Transistors Q36, Q37, and Q38 make up a +8 V series regulator that supplies +8 V to the reverse
(Q45) logic. Circuit schematic DRVR2 lists test points available for checking these supplies.
The tachometer feedback signal (TACH V) is filtered and applied to the "+" input of the operational
amplifier (comparator). The tachometer produces an output voltage (TACH V) proportional to the
velocity of the capstan. The capstan servo amplifier (72741 at EI0) compares the tachometer output
with a reference voltage that is proportional to the desired capstan velocity and generates an appropriate error voltage. The error voltage (SERVO SIGNAL) is further amplified by the capstan motor
driver, which drives the capstan motor. Thus, if the capstan is running slower than the desired speed,
the SERVO SIGNAL and, consequently, the voltage impressed on the capstan motor increase, speeding up the capstan. If the capstan is running too fast, the capstan velocity is similarly decreased.
When the capstan is at rest and a forward command is issued, the difference between TACH V (OV)
and the forward (Q44) circuitry is quite large. This causes the error voltage comparator t~ produce a
large amplitude SERVO SIGNAL, which goes to the driver circuitry to allow the capstan velocity to
approach 1.14 mjs (45 injs) forward velocity.
Resistor R 177 is the balance adjustment. It is adjusted for zero capstan creep, with no input.
For normal [1.14 mjs (45 injs) forward and reverse] operation, the vacuum columns buffer enough
tape to allow time for the reels to catch up with the rapid accelerations and decelerations of the
capstan. However, the buffer columns cannot contain enough tape to allow the capstan to accelerate
and decelerate at its normal high rates to and from the 3.8 mjs (150 injs) rewind velocity. For this
reason, the rewind command logic uses two signals (REV jREW H and REWIND CAP H) to control
the rewind velocity of the capstan.
When a rewind command is issued, signal REV jREW H is asserted, causing the capstan to accelerate
immediately to 1.14 mjs (45 injs) just as in a normal reverse operation. Then, REWIND CAP H is
asserted approximately 200 ms later; transistor Q30 is turned on, placing an increasing current in the
running speed line. This causes a ramped rewind reference voltage generator (R 79 jC 19 time constant)
to gradually increase the rewind speed, exponentially approaching 3.8 mjs (150 injs) at a rate at which
the reels can be accelerated. Resistor R84 is used to fine-adjust the rewind speed.
Refer to schematic DRVR 3. This is the circuitry that drives the capstan motor. When SERVO SIGNAL enters, it is applied to the bases of two transistors, Q33 and Q41. Transistors Q33 and Q41 sense
the SER VO SIGNAL polarity for the forward (+) and reverse (-) directions, respectively. The circuitry
involving transistors Q28, Q31, and Q32 supplies current amplification for the forward direction,
providing CAPSTAN MOTOR POWER with the current necessary to drive the motor. Transistors
Q39, Q40, and Q49 operate in a similar manner for the reverse direction.

5-18

The SERVO SIGNAL is also diode-coupled to the outputs of two differential amplifiers. These amplifiers compare the capstan motor current with two fixed reference voltages. When the capstan motor
current produces 0.8 V across RI03 (corresponding to an 8 A motor current), one of these differential
preamplifiers senses the fact and clamps the SERVO SIGNAL, preventing the capstan motor current
from becoming greater.
Because the capstan motor acceleration is directly proportional to the motor current, this differential
amplifier circuit accurately controls capstan acceleration. By controlling the capstan acceleration, the
size of inter-record gaps on tape is also controlled.
In normal operation, the current limiting circuitry is activated only during the 8 ms (approximately)
interval during which the capstan is accelerating to speed at the beginning of a motion operation or
decelerating to a halt. Once operating speed is reached, capstan motor current drops to approximately
1 A and is controlled entirely by the SERVO SIGNAL acting to hold the motor at a ± 1.14 m/s (±45
in/s) velocity.
Transistor Q34 is used in the forward line; Q42 in the reverse. Resistor R86 is the "+" current adjustment used to fine-tune the positive acceleration current, eliminating large changes in the MOTOR
RETURN line. Resistor R 104 adjusts negative acceleration current, following a similar philosophy.
5.3.1.1.2 Motor Control and Tape Reel Braking Circuits - Circuit schematics DRVR 1 and DRVR 4
illustrate the motor control and braking circuits. As explained in the previous paragraphs, it is necessary to maintain a small "buffer" of tape on either side of the read/write/erase head, because the
massive tape reels cannot accelerate at the same pace as the smaller, much lighter capstan. Vacuumbuffer columns are used to hold these "buffer" loops of tape. The capstan does not directly move tape
from one reel to another; rather, it removes tape from one vacuum-buffer column and deposits it in
another. Each reel servo system endeavors to keep its associated vacuum-buffer column partially filled
with tape, ready either to supply or to take up tape, as might be required by a sudden acceleration of
the capstan.

Figure 5-7 shows the tape transport vacuum-buffer columns and the respective tape-position-sensing
vacuum switches. A vacuum port at the bottom of each vacuum-buffer column provides the vacuum
that draws the tape loops into the columns with a constant tension (252 g or 8 oz), independent of the
position or velocity of the tape loop. This helps assure a uniform wrap of the tape on the reel. In
normal operation, the position of the tape loop in each vacuum-buffer column is sensed by vacuum
switches located near the top and bottom of each column. These vacuum switches close when subject
to a vacuum exceeding 35.4 cm (10 in) of water and open when exposed to ambient air pressure. Thus,
if the tape loop is above a particular vacuum switch in the buffer column, that switch is exposed to
vacuum; the switch is then closed and its corresponding signal (UVS for the upper vacuum switches
and LVS for the two additional lower vacuum switches) is at ground. If, however, the tape loop is
below a vacuum switch in either column, the switch is exposed to ambient air pressure; it opens and the
corresponding signal is high. The reel servo systems endeavor to keep the respective tape loops oscillating near their respective vacuum switch pairs.
Figure 5-8 shows an equivalent circuit of the reel motor drive. Each reel motor is connected across a
transistor bridge, which connects the motor between the -17 V and + 17 V INT power supplies in
either direction. When the relay supplying +17 V INT opens, no power can be applied to the motors,
providing a fail-safe condition. When transistors A and B (Figure 5-8) are on, current flows through
the motor in a "+ to -" direction and the motor turns clockwise (CW). When transistors C and Dare
turned on, current goes through the motor in a "- to +" direction and the motor turns counterclockwise (CCW).

5-19

TAKE-UP

0...-

TAPE GUIDES (2)

CAPSTAN

..- -

HEAD TAPE
GUIDES (2)

HEAD ASSEMBLY
UPPER FAIL-SAFE --I~----tM

UPR MTR UVS -~l---"'~J

UPR MTR LVS _+--L-....
FILE REEL
(LOWER MOTOR)

LOWER FAIL-SAFE -+---......
VACUUM CHAMBER PORT - t -.....~ _ ..~

M--+--+-- LOWER MTR LVS
LEFT VACUUM PORT

M---+-- LOWER FAIL-SAFE
_____I---

VACUUM CHAMBER PORT

RIGHT VACUUM PORT
CP-3025

Figure 5-7

Tape Transport Mechanism

5-20

+17V INT

-17V
CP-3030

Figure 5-8

Reel Motor Amplifier Equivalent Circuit

The motor circuitry interfaces with the remainder of the drive with six signals:
UPR MTR GOCW
UPR MTR GO CCW
LWR MTR GO CW
LWR MTR GO CCW
REEL MTR ENABLE
LOAD PULSE
The LOAD PULSE is used only during a tape loading sequence. The remaining five signals control
normal operation. Signal REEL MOTOR ENABLE is generated on the M8916 (LAW) module. It
indicates that tape is in the columns and no fail-safe condition exists. Because the upper motor (UPR
MTR) circuitry (take-up reel) functions identical to the lower motor (LWR MTR) circuitry (file reel),
only the UPR MTR circuitry is detailed in this description.
On circuit schematic DR VR 1, signal UPR MTR GO CW L comes through J3-X and is ANDed with
REEL MTR ENABLE L. The output goes to a 75452 current buffer. Its output (low) pulls R17 to
ground and turns on Q6, providing additional current gain. Q6 draws current from the base of Q16
and supplies it to the base of Q9. Both transistors turn on, resulting in Jl-l going close to +17 V and
JI-2 going close to -17 V; the motor turns CWo
If signal UPR MTR GO CCW is asserted, a similar operation occurs; only this time transistor Q7
turns Q 13 and Q 15 on. This reverses the + and - 17 V on pins J 1-1 and J 1-2 and drives current through
the upper motor in the opposite direction, resulting in the upper motor turning CCW.
The lower motor circuitry works in an identical manner to turn CW or CCW. LWR MTR GO CCW
and REEL MTR ENABLE turn transistor Q5 on, which allows transistors Q8 and Ql to pass current
in a "+ to -" direction through the lower motor and turn it CCW. The L WR MTR GO CW signal
uses transistors Q4, Q2, and Q3 to turn the lower motor CW.

5-21

The LOAD PULSE signal (asserted only in a loading sequence) bypasses REEL MTR ENABLE. It
passes through a 75451 gate and pulls R 19 low. This has the same effect as if both UPR MTR GO
CCW and REEL MTR ENABLE had been asserted. With respect to the lower motor, the effect is the
same as if LWR MTR GO CW and REEL MTR ENABLE had been asserted. The result is that a
small tape loop is dumped into each column, sealing both columns.
The brake control logic is illustrated on schematic 0 R VR 4. The brakes used on the TE 16 are electromagnetically operated friction brakes. In normal 1.14 mls (45 in/s) operation, signals UPR BRAKE
ON and LWR BRAKE ON individually create the UPPER BRAKE OUT and LOWER BRAKE
OUT signals. These signals drive approximately 310 rnA of current through the brake windings.
Braking is not used during a rewind operation.
Signal UPR BRAKE ON L asserts, placing a low level at pin 13 of the 7400 NOR gate in E6. The
output asserts high and, because signal UPR MTR START L is not true, the output of the 7408 in E7
asserts and supplies brake current for the upper brake to the base of transistor Q23. With Q23 on,
transistor Q20 also turns on. This places the R55/R59 resistor combination into the UPPER BRAKE
OUT circuit, limiting and establishing the operating brake current. The 310 rnA of brake current
applied to the brake winding produces enough torque to rapidly bring the upper (take-up) reel to a
stop.
The lower brake works in an identical manner. Also, the FORCE BRAKE ON (1) L signal, a 4-second
delay generated on the LAW (M8916) module during power-up, fail-safe, power fail or an accident
applies both brakes simultaneously.
When the tape loop leaves a brake zone, brake current is shut off. Because the braking current tends to
produce a significant residual magnetism in the brakes, a short (15 ms) pulse of approximately 150 rnA
current is applied in the reverse direction when the brakes are released to ensure complete demagnetization and release of braking. When the brakes are to be shut off, the output of 7408 in E7 negates and
goes low. This low transition is ac coupled through C13 to Q22 and Q21 (as UPPER BRAKE OUT),
resulting in the short pulse. Zener diode 030 and R51 (collector resistor of Q22) cause the smaller (150
rnA) current.

5.3.1.1.3 Automatic Unload Sequence - The main objective of the unload circuitry is to gently wind
tape back onto the lower reel. In order to do this, a regulated voltage is applied to the lower reel motor
during the unload sequence. This voltage (adjustable) determines the speed at which the lower motor
turns. The upper motor is also activated during the unload sequence by a "trickle" current intended to
overcome internal friction in that motor.
The BRIDGE TURN ON L signal turns on Q14, which supplies base current to Q50, turning it on.
J 1-2, the" -" side of the upper motor, is pulled up toward +17 V. The Q 14 collector also supplies base
current to Ql, resulting in a voltage at 11-6. Essentially, a power voltage is applied to one lead of each
motor. Two additional circuits are used to limit the amount of power that can be dissipated in the
motors, thus limiting the torque each motor can produce so that a gentle unwind results.
Coincident with BRIDGE TURN ON L, signal INIT TORQUE SETTING H asserts. The current
through Q 17, varied by R42, is just enough to start the upper motor turning so that the unload
sequence can continue. If the upper motor does begin turning and the lower motor is successfully
taking up tape, the DAC signal is not required. However, if the tape binds, for example, or if the upper
motor sticks, then the DAC CONTROL signal begins to go negative. This signal goes through a 741
operational amplifier, with two additional transistors for current gain. This trickles greater currents to
the upper motor, trying to break if free. Once the motor breaks free and the capstan is turning in a
current unload sequence, the DAC CONTROL signal stops incrementing, but remains at its last
output voitage. Note that the capstan motor is not activated during the unload sequence; rather, it is
dragged around as the lower motor pulls tape onto itself.
5-22

As the capstan motor is dragged, the capstan tachometer outputs a voltage proportional to its speed.
Circuitry on the daughter board senses whether the capstan is being turned and uses this information
to either maintain or increase the power available to the upper and lower motors.
INIT TORQUE SETTING and DAC CONTROL control the amount of current to be drained
through the upper motor. By sensing the voltage across R38 (.47 ohms) and by inputting that to the
sensing node of the 741, a current driving network is produced. The more current through R38, the
more the operational amplifier output goes negative. This tends to turn off the current gain transistors
(Q18 and QI9). This feedback path senses the current through the motor and controls it through the
741. Reiterating, this is a current controlled operation.
A different technique is used with the lower motor during the unload sequence. The 723 references
from -17 V, not ground, and supplies a precise voltage across the lower motor. The 723 input is
floating at approximately -17 V. When the unload begins, the BRIDGE TURN ON signal asserts,
turning on Q14. In addition to supplying current to the base ofQl, transistor Q14 also supplies power
for the 723 regulator, which then puts 8 V across the lower motor. Resistor R28 adjusts the voltage
across the lower motor during the rewind sequence. Whereas current was trickled through the upper
motor to control torque, regulated voltage is used across the lower motor to control the speed.
The MAX FORCE signal is to the lower motor what the DAC CONTROL signal is to the upper
motor. It asserts about two seconds after the beginning of the unload sequence if no tape motion is
sensed. If asserted, the MAX FORCE signal causes the 723 regulator to operate in a current limiting
mode instead of a voltage controlling mode, which then attempts to break the lower motor free.
Whether or not the MAX FORCE signal is ever used, the regulator circuit is current limited. The
voltage across R26 (.47 ohm) is sensed and fed back to the regulator; current is limited to approximately 2 A.
5.3.1.2 Tape Motion Daughter Board - The tape motion daughter board (TMD) controls braking and
reel motor operation (both in normal tape motion and in rewind) and also contains the sequencing
logic for the unload circuitry. This discussion references the TMD (5412262) schematics.
Drawing TMDI illustrates the common logic used to control the brakes and reel motors. The vacuum
switch signals the module (left hand side of drawing) through the J2 connector. An RC filter eliminates
crosstalk among the four control switches. The 8640 gates send the filtered signals to type 74123 oneshots connected in a retriggering mode, each for approximately 1 ms. Look, for example, at the UPR
MTR UVS (upper motor vacuum switch) signal. If vacuum is sensed, the left hand upper vacuum
switch closes, pulling the UPR MTR UVS signal to ground. This signal then becomes inverted in an
8640 gate, which applies a high level to pin 1 of the 74123 one-shot in E27. The high level disqualifies
the delay and it begins to time out. Therefore, within 1 ms of the switch sensing vacuum, the delay
output (pin 13) would go low. Similarly, when vacuum is removed from the UVS, pin 1 of the delay
would be low, thus qualifying the delay. That qualification prepares the delay and the HI FREQ
CLOCK signal (discussed later) retriggers it. So, as long as vacuum is not sensed, pin 13 of the delay is
high. Essentially, the delays filter switch bounce at the leading and trailing edges of vacuum switch
activation.
The FWD MOTION flip-flop remembers the last direction of tape motion and controls reel motor
direction. Its output feeds the select input of a multiplexer (E32). The output of this multiplexer
controls the direction in which the corresponding reel motor is driven.

5-23

The multiplexer does not observe all the vacuum switches all the time, but rather picks those vacuum
signals that are of particular interest. For example, assume forward tape motion (FOR H asserted)~
this direct sets FWD MOTION, which places a low at the SO input of the multiplexer. A low here
selects the "A" inputs. In this example, therefore, the multiplexer would observe UPR MTR L VS and
L WR MTR UVS. When tape is moving forward, the tape loops should be located near these two
vacuum switches, not the other two, UPR MTR UVS and L WR MTR L VS (Figure 5-9). (A tape loop
outside a fail-safe switch automatically shuts down transport operation.) The multiplexer actually
defines those vacuum switches that are of interest, keeping the tape loops near those switches. By using
these switches during forward motion, it can be seen that in a sudden capstan direction reversal, most
of the buffer column is available to let the reel motor "catch up" with the capstan. In forward motion,
tape is pulled out of the right column and is deposited into the left column.

,.......-- CAPSTAN
ROTATES CCW IN
FORWARD DIRECTION

o
U PR MTR UVS --+-+----"

I MOTOR ZONE
UPR MTR LVS

LWR MTR UVS
UM MOTOR
ZONE

/----+---0

ALSO
UM BELOW
LOWER SW

J+---+-- LWR MTR LVS
LEFT
COLUMN

o
RIGHT
COLUMN
CP-3031

Figure 5-9

Tape Loop Location - Forward Motion

5-24

Looking at the location of the tape loop in the left column, notice that almost an entire column length
exists between the loop (near L VS) and the UVS. In the case of a tape motion reversal, the entire
column's worth of tape may be used to make whatever changes are necessary in reel motor velocity to
keep up with the new (reverse) tape motion. A similar situation holds true for the right column.
In a reverse tape motion sequence, the capstan is pulling tape out of the left column and depositing it in
the right column (Figure 5-10). The theory dictates that the tape loops should oscillate near the UPR
MTR UVS and the LWR MTR L VS. Again, any tape loop outside a fail-safe switch automatically
shuts down transport operation. As was the case in the forward direction with the tape loops in these
locations, the greatest margin exists for permitting reel motor velocity changes in a direction change.
The multiplexer observes only one vacuum switch per side in any tape motion sequence. It outputs a
MOTOR ZONE and BELOW LOWER SWITCH signal for each column.

/ 4 - - - CAPSTAN

ROTATES CW IN
REVERSE DIRECTION

UM
MOTOR ZONE

UPR MTR UVS

LWR MTR UVS

UPR MTR LVS

LWR MTR LVS

LM
MOTOR ZONE

LEFT
COLUMN

0
ALSO
)
LM BELOW
LWRSW
RIGHT
COLUMN
CP-3032

Figure 5-10

Tape Loop Location - Reverse (and Rewind) Motion

5-25

Referring back to the forward motion diagram (Figure 5-9), the upper motor (UM) MOTOR ZONE
in forward tape motion is between the UPR MTR L VS and the lower fail-safe switch, while the LM
MOTOR ZONE is between the L WR MTR UVS and its upper fail-safe switch. In reverse (see Figure
5-10), the UM MOTOR ZONE is between the UPR MTR UVS and its fail-safe switch and the LM
MOTOR ZONE is between the L WR MTR L VS and its fail-safe switch.
In forward motion, the UM BELOW LOWER SW signal is defined (for the upper motor only) when
the tape loop is between the UPR MTR L VS and its fail-safe switch. Similarly, in the reverse direction,
the LM BELOW LOWER SW signal can be asserted only when the loop attached to the lower motor
is between the L WR MTR L VS and its fail-safe switch (Figures 5-9 and 5-10).
The main point here is that the direction of the last tape motion sequence defines which vacuum
switches the tape loops are to be positioned near.
Also on TMD 1, signals REW CAP H, FOR H, and REV IREW Hare ORed, generating signal
MOTION L. Basically, the MOTION signal is asserted whenever the capstan motor is moving. MOTION is ORed again, with each MOTOR ZONE signal, and each 7408 output is input to a 74123 oneshot (both halves of EI9). When either MOTION or the relevant motor zone signal (UMZ, LMZ) is
asserted, this circuit detects whether tape is moving, or is just about to stop after a motion sequence, or
is still in a MOTOR ZONE. If any of these conditions are true, the relevant BRAKE ENABLE flipflop is not set. However, should tape motion cease for a longer period than the E19 one-shots are timed
for (2 or 3 ms) and the tape loop is successfully brought back into the middle zone, the SET BRAKE
ENABLE signal would assert and the brake would be applied. By ORing MOTOR ZONE with MOTION, the logic can never turn the brakes on in the middle of a data transfer; it always waits until
motion stops. The brakes are used to stop a tape loop only at the end of the motion sequence. As long
as MOTION is asserted, the brakes cannot be turned on.
A second method is also used to generate the BRAKE ENABLE signals. The 74123 one-shot in E40
observes the FWD MOTION flip-flop, which changes state with every tape motion direction change.
When tape motion changes direction, the one-shot fires, generating a 2 to 3 ms pulse and setting the
BRAKE ENABLE signals. The main reason for this alternate method is that changing direction creates drastic change in capstan velocity, and the reel motor control circuits cannot respond to a sudden
direction reversal. By design, the reel motors can only respond to a capstan speed change from a dead
stop to 1.14 mls (± 45 in/s). Therefore, if tape speed changes, for example, from +1.14 mls to -1.14
mls (± 45 in/s), the reel motor control cannot respond fast enough. The brakes must be used to bring
the reel motor to a stop. It can then respond to the change in tape velocity direction.
The MID ZONE signals assert when tape is in the middle zone (Le., UVS open and L VS closed). Each
MID ZONE signal is ANDed with its corresponding BRAKE ENBL flip-flop output to generate the
UPR/L WR BRAKE ON signals. These are the signals that apply brake current to the reel brakes.
The one-shots associated with the BRAKE ON signals ensure that once a brake is turned on, it
remains on for a minimum of 10 ms. If the brakes (when applied) are not held on for this minimum
time, they may be degaussed before they are fully turned off. This would result in an improper degauss
spike and a "dragging" brake.
The HI FREQ CLOCK used to retrigger the vacuum switch one-shots comprises two 74123 one-shots.
The output (adjusted by R16) is counted down by a single flip-flop into a 7497 variable frequency
counter. Its output, CLOCK H, is a 5 ms period pulsed wave form.
Drawing TMD2 and TMD3 are identical, except that TMD2 references the lower motor while TMD3
references the upper motor. Because they are similar, just TM 02 is discussed, unless otherwise specified.

5-26

In general, throughout the reel motor control circuitry discussion, the assumptions are made that the
capstan and reel motors are at a dead stop and the tape is in a middle zone. Therefore, referring to
TMD2, assume that signal SET LM BRAKE ENABLE L is initially asserted. This direct sets the
LWR BRAKE ENBL flip-flop and turns on the brake circuits; this also direct sets the LM NO DUTY
CYCLE flip-flop. When a tape motion command is executed, the SET LM BRAKE ENABLE signal
is negated, removing the direct set signal from the L WR BRAKE ENBL flip-flop; the flip-flop, however, remains set.
Now, tape moves into the MOTOR ZONE. The acquisition of the LMZ signal places a low level at the
data input of the LWR BRAKE ENBL flip-flop and causes a pulse to be generated by the 7486 in E21.
The pulse generator triggers a 74123 one-shot, which outputs alms pulse to the 74190 sequencing
counter (E3); it also clocks and clears the LWR BRAKE ENBL flip-flop. The LWR BRAKE ENBL
flip-flop is turned off, so the brakes are off. Now, current can be applied to the reel motor.
When the LMZ signal generated alms pulse from the E5 one-shot, that output went to the E3
sequencing counter and loaded a preload count, consisting of GROUND and a combination of:
LM NO DUTY CYCLE and
LM BELOW LOWER SW
E3 is a divide-by-ten counter and sequences at the CLOCK rate (5 ms). When the counter overflows, it
clocks and sets the LM START DUTY CYCLE flip-flop, placing a low level at the clock input of the
LM NO DUTY CYCLE flip-flop. The counter recycles (ten additional CLOCK pulses); this overflow
clears LM START DUTY CYCLE, which then clears the LM NO DUTY CYCLE flip-flop. So, the
LM NO DUTY CYCLE flip-flop remains on during the time tape moves into the MOTOR ZONE for
a period equal to 10 minus the preset count, plus another 10 counts. Then LM NO DUTY CYCLE is
turned off.
During its on period, LM NO DUTY CYCLE is presenting a high level to pin 2 of the 7427 NOR gate,
which results in a constant enable at the inputs of the LM GO CW and CCW gates. When the enable is
present, the gates are guided by a direction flip-flop to turn the motor in the desired direction.
Once the LM NO DUTY CYCLE flip-flop is off, the GO CW /CCW (motor enable circuitry) gates are
dependent on the pin 6 output of the sequencing counter. Because the 74190 is connected as a divideby-ten counter, the pin 6 output is low for four counts (O through 3), goes high for four counts (4
through 7), and then goes low again through the tenth count. Essentially, the pin 6 output is low 60
percent of the time and high 40 percent. The output is XORed with LM BELOW LOWER SWITCH
H. When LM BELOW LOWER SWITCH is negated (low), the pin 6 counter output is sent directly
(non-inverted) to E22, pin 13. Therefore, assuming NO DUTY CYCLE is off and the logic is dependent on the pin 6 output to determine the motor driving duty cycle, that duty cycle is 40 percent.
However, if the LM BELOW LOWER SWITCH signal is true (tape loop is below the lowest control
switch), the pin 6 output signal is inverted by the XOR, presenting a 60 percent duty cycle to the motor
enable gates. Whenever tape is below the lowest control switch, the motor is driven harder than anywhere else.
Again, assume a stopped condition with tape in the middle zone. Tape then moves to a MOTOR
ZONE and the NO DUTY CYCLE holds the motor on. Then, when the NO DUTY CYCLE flip-flop
clears, the logic enters a "duty cycling" mode, where the motor receives pulses of power, rather than
steady current. This pulsed power is sufficient to force the tape loop back into the middle zone. The
reel motor control is stable as long as the capstan velocity remains stable. Under control of the E3
counter, the logic attempts to push the motor in the opposite direction.

5-27

The counter still controls the duty cycle (through the XOR in E28), but the direction is still controlled
by the 7474 flip-flop in E30. As mentioned previously, this flip-flop, controlled by the FWD MOTION
flip-flop and HI FREQ CLOCK, controls the reel motor direction.
As the capstan is moving tape, the tape loop oscillates about the appropriate control switch. The reel
motor is continually pulsed at the appropriate duty cycle rate in the direction to drive the tape loop
back toward the switch (i.e., if the loop is above the switch, pulse the motor to force the loop up). In a
stable fashion, this circuitry continually "hunts" for the relevant vacuum switch.
When tape motion first starts from a dead stop, the LM NO DUTY CYCLE flip-flop is set. This
causes a long time (approximately 100 ms) that the reel motor is full on, trying to aproach the capstan
tangential velocity. If a tape loop goes below the LVS, the motor is pulsed again with a 100 ms pulse to
ensure bringing the tape loop out of the column and up toward the UVS. After this pulse, the regular
duty cycle is used to pulse the motor. In the event of a tape motion sequence that drives tape past the
L VS, a 100 ms pulse of 100 percent voltage is applied to the motor every time the loop goes below the
LVS.
Every time the tape loop goes below LVS, the LM BELOW LOWER SWITCH signal triggers a 74123
one-shot in E20, and its output direct sets the LM NO DUTY CYCLE flip-flop. As a result, every time
the loop goes below the L VS (on the lower motor), a lOOms pulse is applied to the motor. Then the
sequencing counter pulses the motor as before, until the tape loop comes above the LVS. Again, the
duty cycling resumes to push the tape loop down, "hunting" the switch.
So far, two methods of generating the motor direction signals (GO CW /CCW) have been explained:
LM NO DUTY CYCLE and E3 Sequencing Counter.
One additional method of producing these direction signals exists. Rewinding tape forces the reel
motors to operate near their top speed, and the normal duty cycle is not sufficient to drive the motors
when tape is in the MOTOR ZONE. As soon as the tape loop enters the MOTOR ZONE during a
rewind sequence, the reel motors are turned on and remain on until the tape loop reenters the middle
zone.
Signals REW CAP Hand LM MOTOR ZONE Hare ANDed in a 7408 gate and the output is sent to
the third input of the motor enable NOR gate (7427, E22, pin 1), causing a 100 percent duty cycle.
Again at rewind velocity, the motor control logic attempts to remove the tape loop from the MOTOR
ZONE (away from the fail-safe switch) and into the middle zone. The normal duty cycle then resumes.
In rewind, just as in normal forward or reverse operation, the logic is always "hunting" for the vacuum
switch.
5.3.1.2.1 Load - Unload Sequence - The RELAY ENABLE signal is sent to the TMD board from the
LAW board (M8916, Paragraph 5.3.6) during a load sequence. The RELAY ENABLE signal fires a 2
second 74123 one-shot (E4). When it times out, the LOWER FAIL SAFE signal is observed. If the
switch is open (indicating no tape in the column), then a second one-shot is fired, producing a 70 ms
LOAD PULSE. The RELAY ENABLE signal is delayed 2 seconds, in order to provide sufficient time
for the vacuum motor to establish vacuums in the columns~ Then, a check is made to see if tape is in
the columns. If tape is not in the columns, a LOAD PULSE dumps approximately 70 ms worth of tape
into the columns.
The unload sequencing logic is illustrated on the TMD4 circuit schematic. When the UNLOAD switch
is pressed on the front panel (i.e., transport is at BOT and the REW /UNLD switch is pressed), the
INHIBIT UNLOAD signal (lower left corner of TMD4) is negated by the M8916. The M 8916 (LAW)
module then sends an UNLOAD PULSE to the 7474 flip-flop (E29) and asserts the START signal.
5-28

A counter network comprising three 74197s is located in the lower middle ofTMD4. When START (1)
H is true, the clear lines on the counters are lifted, thus enabling the counters. The CLOCK signal (5
ms rate) begins clocking the counter, which provides twelve bits (4096) of counting. During the unload
sequence, this logic makes sure that the capstan is moving and, if it is not moving, working to drive
greater amounts of current to the reel motors to try to break them free. This module receives its
feedback from the CAPSTAN TACH VOLTAGE signal. An assumption is made that if the capstan is
not moving, then something is stuck or stalled. Two methods are used to break free whatever is stuck
or stalled.
A 339 comparator in E42 (pin 6) observes the CAPSTAN TACH VOLTAGE signal and compares it
to VI, a 7.5 mV level. If the capstan is moving at all, the comparator output asserts and then clears the
7474 flip-flop (pin 1) in E24. This results in the CAPSTAN RESET flip-flop being held clear all the
time the capstan is moving. Therefore, the unload sequence lasts until either the capstan stops moving
or the counter produces a timed clear pulse.
The CAPSTAN TACH VOLTAGE is also compared with a second level (V2), a 100 mV level. The
output from this 339 comparator (pin 14), through an AND gate, generates DAC CLOCK, which
clocks another counter (74191). This is a 4-bit counter that generates an analog output from pin 6; it
essentially is a DAC converter, with the output (pin 6) incrementing with CAPSTAN TACH VOLTAGE. As long as CAPSTAN TACH VOLTAGE is less than 100 mY, the 74191 is counted and a
continually more negative voltage outputs from pin 6. That negative voltage then causes more current
to input to the upper motor. Assuming the CAPSTAN TACH VOLTAGE does not become greater
than 100 mV, then something is stuck and the extra current to the upper motor attempts to break free
whatever is stuck.
A similar operation provides extra current to the lower motor in a sticking unload sequence. If the
counter network reaches a count of 211 before the unload sequence completes, the 211 signal sets a 7474
flip-flop and generates the MAXIMUM FORCE H signal. If the unload sequence does not complete
by the 211 count, the MAXIMUM FORCE H signal (a higher current) is applied to the lower motor to
break free whatever is stuck. The two most significant bits of the counter network (211 and 212) are
decoded in a 74H 11, E33. Once this count is decoded (3000 10 ), approximately 15 seconds from the
beginning count, the START flip-flop is cleared by the MAX TIME OUT signal. The lower time limit
(when the capstan is not turning at all) is set by the condition that the capstan voltage remains at zero.
Then a count of 1000 10 (211 or 212) is decoded (7427, E23) and, at that time (approximately 5 seconds),
the two 7474 flip-flops associated with CAPSTAN RESET are set; this clears the START flip-flop.
When the capstan is not moving, the unload sequence lasts approximately 5 seconds.
For the situation where the capstan motor continues to turn (CAPSTAN TACH VOLTAGE greater
than 7.5 m V), the CAPSTAN RESET flip-flop is cleared. If an extra long tape leader is encountered,
the unload continues to the 15 second point before the START flip-flop is cleared. Any time up until
then, the logic waits for the capstan voltage to cease and, if it does cease, ignores the CAPSTAN
RESET signal. Basically, this circuit is adaptive to a 5 to 15 second range. Anywhere within the range,
the logic senses a stop command; outside the range, it does not sense a stop command. In general, a 5
to 7 second unload is desirable.
The circuitry in the lower right corner ofTMD4 waits for a count of 29 (approximately 2.5 seconds). At
that time, two signals are generated: INIT TORQUE SETTING H and UPPER MTR START L. The
INIT TORQUE SETTING enables trickle current to the upper motor. The UPPER MTR START
signal releases the upper motor brakes. During the first 2.5 seconds of an unload sequence, the lower
motor is doing nothing except drawing tape out of the columns and creating a good tight loop. After
the 2.5 second delay, the brakes are turned off and the unload is permitted to continue.

5-29

5.3.2 TE 16 Power Supply
The TE 16 power supply is a forced air-cooled unit that converts single-phase, 115 V or 230 V nominal,
47 or 63 Hz line voltage to four regulated output de voltages (+ 5.3 V, + 12 V, + 12 V, and -6.3 V) and
four unregulated voltages (± 16 V and ± 17 V). The power supply is controlled by an 861 power
control. Each of the regulated voltages has short circuit (current foldback) protection.
Overvoltage (Crobar) protection is incorporated in the +5.3 V, one of the +12 V supplies and -6.4 V
circuits.
The power supply is divided into two sections (Figure 1-3A): the ac input circuitry, consisting of the
transformer and large filter capacitors (transformer-capacitor assembly), and a regulator board, which
contains the remaining circuitry. The power supply circuit description references schematic D-CS5412242-0-1. The regulator board (Figures 5-11 and 5-12) contains all the circuitry between the transformer secondary winding and the power supply output cables. A 4-pin Mate-N-Lok connector (11)
supplies voltage to the fan and vacuum motor. Connector 12 connects the transformer secondary
winding outputs to the regulator board, while 13 adds the large filter capacitors to the circuitry. Connector 14 connects the supply to the H607 power board servo circuitry and 15 supplies voltages to the
TE 16 backplane.

~II
\ ",v",\

.
<;) ~

I II I ""

R26(+12)~

(NRZ)

R37(+12)-@

010

R59

l
5-~

® (+5.3)

GND

AC HI

AC LO

D b5JOO[]O[]

115

230

115

NOTES:

1) 1-5 represent 5 Phillips head screws.
2) 6

represent Allen screw- must be secured very tightly,or
damage to the power supply may
result.
11- 4683

Figure 5-11

TE 16 Power Supply Regulator Board

5-30

LOGIC

FAN

ASSEMBLY
FAN

POWER
WIRING

+5V
ADJUSTMENT
8209-8

Figure 5-12

TE16 Power Supply Regulator Board (Cover Removed) and Fan

5.3.2.1 Generation of Raw ±dc - The ac power line cord, terminated with tab connectors, is brought
to the lower left-hand area of the regulator board (as viewed from the rear of the TE16 cabinet) and
connected to the input power tabs (AC HI, GND, and AC La). Two wires (in the same area) connect
to either the 230 V tab or the 115 V tabs and configure the power supply for 115 V or 230 V operation.
The 12 Mate-N-Lok connector interconnects the regulator board and the main transformer.

A general block diagram of the power supply is shown in Figure 5-13. The center-tapped transformer
voltage is fused, rectified, and filtered prior to being fed to the various voltage regulators and 14. The
fuses do not normally blow when an output is shorted because of an overcurrent (current foldback)
protection. Overvoltage protection (crobar) is also used on all regulated outputs except the + 12 V
(write circuits) output, which does not require it.
5-31

REGULATED DC VOLTAGES
(TO LOGIC BACKPLANE)

J5
+5.3V

(TEI6 LOGIC)

AC
TAPPED FROM
TRANSFORMER
SECONDARY

OVERCURRENT
PROTECTION
( CURRENT
FOLDBACK)

VACUUM
MOTOR

UNREGULATED DC
VOLTAGES (TO H607 POWER
BOARD)

-16 V

+ 16 V

-17 V

+17 V
3

+17 V INT

VACUUM ON L

CP-3033

Figure 5-13

TE16 Power Supply Clock Diagram

5-32

The J4 Mate-N-Lok plug connects the TE16 power supply's unregulated voltages to the TE16 Power
Board (H607, plug P2). Once tape is loaded onto the transport, signal RELAY ENABLE L is asserted.
This places a low signal at the inputs of the 75451 gate (schematic D-CS-5412242-0-1, location A7) that
enables the K2 relay. This relay passes required voltages on to the H607 module when tape is loaded.
5.3.2.2 +5.3 Vdc Regulator Circuit - The +5 Vdc regulator circuit is shown in Figure 5-14. Raw dc
voltage is input to pins 11 and 12 of the 712 voltage regulator. The output voltage from pin 10 is fed to
transistors Q5 and Q6, which are series regulators used to increase the current output capabilities of
the circuit. Resistors R62 through R66 (inclusive) sense the output current. R62 is used as a current
limit monitor by the 723. As the current increases, the voltage across R62 increases. When a reference
voltage is exceeded, the 723 begins to turn off Q5 and Q6, impeding current flow. The current does not
stop but decreases to a safer level; this is called current foldback. It assures that the output current
never goes over 10.0 A. Figure 5-15 shows how the current foldback procedure works. As the current
surpasses the limit of 10.0 A, the conduction ofQ5 and Q6 slows down (toward being shut off) until no
voltage is produced (at the short circuit current rating). The output voltage may be regulated. Resistors
R58, R59, and R60 divide the reference voltage. The adjustment of R59 changes the + 5.3 V output.

J5. PINS 1.7
+5.3 V
8.0A OUTPUT

R69
10
10W

~47

15A
+10.5 V
FROM
RECTIFIER

R66
.03
5W

R65
.03
5W
6
R10
390

R58
750

2W
R59
500
POT

R64
.03
5W

E1
723
R68
680

R67
100

016
IN469A

R22
680

R63
56

3
4

C9
.22

C8
47

R62
330

R61
750

C2h
1000PF

J5.
PIN 6

":"

11-4666

Figure 5-14

+5.3 Vdc Regulator Circuit

v
5.0~-----_

i SHORT

10 A

CKT
11-4681

Figure 5-15

Current F oldback Operation
5-33

In addition to the current foldback feature, a voltage crobar circuit is used, offering overvoltage protection. If for some reason Q5 or Q6 becomes shorted, the overvoltage protection circuit protects any
load connected to the power supply. When Q5 or Q6 short circuits, the output voltage starts increasing
very rapidly. As the voltage across the D 16 zener diode becomes greater than 6.8 V, it breaks down and
begins conducting; it does not conduct during normal operation. Current now begins to flow through
R22. When the voltage at the junction of D16 and R22 becomes greater than approximately 0.7 V (at
the gate of D 15), the SCR fires and begins conducting. This offers a path for current from the output
to ground, shunting any load and thus protecting it. The SCR continues conducting until the power
supply is turned off or the 15 A (F 12) fuse is blown.

5.3.2.3 + 12 Vdc Regulator Circuit (Write Circuits) - The 12/5 Vdc regulator circuit is shown in
Figure 5-16. It operates in a manner similar, but not identical to, the +5.3 Vdc regulator circuit
discussed previously. In the case of the +12 Vdc regulator, a type 723 regulator is again used.

017
+17V FROM
RECTIFIER

R32

J5.pin 8

t-------r--'VII\;----,---(+ 12 V.

1.0

800mA

2W
ell

TO~F
35V

W2
R28
100

6
R23

723

8.2K

R29
470

3
R25

R30
30K

13
R24
R26
IK

2.7K
7

2.71K

R31
12K

J5.pin2

'------+--< + 3

' - - - - - - - - L . - - - I . . . - - - - - - - - - - - . . . . . . . - < J 5 . pin 6

'1 -4680

Figure 5-16

+ 12 V Regulator Circuit (Write Circuits)

The 723 is a precision voltage regulator. It is a two-level regulator, in that it can output two selectable
voltages. Raw dc from the bridge rectifier network enters pins 12 and 11 of the 723. The TE16 write
driver circuits require + 12 V for NRZI. A high level is presented through J5, pin 2, to the inputs of the
75451, which outputs a high level through R57 by R23 and R24 and lets the full reference voltage from
pin 6 of the 723 enter the noninverting input (pin 5). A + 15 V output is produced.

5-34

The output (from pin 10) of the 723 is applied to Q7, where higher current is produced for the output.
The current foldback and sense circuits operate in a manner similar to those of the +5.3 V regulator.
Output voltage is divided by R25, R26, and R27 and is adjusted by R26. Resistor 57 is also a voltage
adjustment. It adjusts the reference line to the 723. When adjustments are made, R26 must be adjusted
before R57, because the reference voltage is dependent on the actual output voltage.
As output current increases, the voltage across R30 and R31 also increases. As the voltage reaches the
limit of the 723, it is sensed at pin 2. The output from the 723 starts reducing, starting to shut off Q7
and keeping the output current from reaching unsafe levels.
No overvoltage protection is provided in this +12 power supply section because it is not necessary.
The circuit that this supply feeds can stand voltage higher than this regulator can supply.
5.3.2.4 +12 Vdc Regulator Circuit (Control Switch Circuits) - The type 723 regulator used in this + 12
V supply operates in exactly the same way as the previous 723 regulator (Figure 5-17).
In this + 12 V regulator circuit, resistor R37 is the fine adjustment for the output voltage. Resistors
R41, R39, R40, and R55 offer the sense for the current foldback network. The overvoltage network
acts in the same way as the network in the +5 V supply, except the zener diode (D23) does not conduct
until the voltage across it becomes greater than 15 V. Then the SCR fires and offers a path for output
current, if Q8 becomes shorted for some reason.

D21

+17V
FROM --~-___1'---_i___~
RECTIFIER
C15

R41
1.0

J5. PIN 5

c-j--4--...,......,o-----'I.i'V\r-.....----.---------1~__< +12V

800mA

lOJ.d

R39

35V

R54

023
13V

10K
R40
470

R55

R38

3.3K

C18
.47J.1F

C19
.0IJ.1F

R43
680

35V

L-.....--~------+-------<~--___+_-----____i~_(J5.

PI N 6
10-1320

Figure 5-17

+ 12 V Regulator Circuit (Control Switch Circuits)

5.3.2.5 -6.4 Vdc Regulator Circuit - The TE16 power supply also furnishes a regulated -6.4 V (Figure
5-18). The LM304 is intended for systems requiring regulated negative voltages. Rectified negative
voltage is presented to the LM304 from the negative output of the D 11 diode bridge.
The LM304 output from pin 7 goes to the base of transistor Q 11. Transistor Q 11, connected with Q 10,
looks and acts like a normal PNP device; the combination supplies high current to the output.

5-35

-14V FROM
RECTIFIER

025
J5, PIN 4

........-"N~--+-__- - < . - 6.4 V
700 MA
R46
27
3
024

R47
2AK

5
020
8.2V
4
LM304

C21
.001
C20
47/-,-F
35V

7
07
.Ol/-,-F

8
R44
lK

R53
680

R49
750
R51
10K

R45
2.74K

J5, PIN 6

'1- 4679

Figure 5-18

-6.4 V Regulator Circuit

Transistor Q12 is used in the current foldback network. Output current is sensed by R50, the Veb of
Qll, R49, and R51. As the output increases (becomes more negative), the voltage at the base of Q12
also increases (becomes more negative). Transistor Q12 starts to turn on and, as it does, shunts LM304
output current away from QII-QI2, limiting output current. Then, as the output decreases, Q12
begins to shut off and allows the output current to rise again.
The overvoltage protection works identically to the other networks. Zener diode D20 begins conduction at approximately -8.2 V, which fires the SCR (D26) and creates a path to ground if QI0
and/ or Q 11 should short out. Again, the supply must be turned off to allow C22 to discharge before
D26 stops conducting. Diodes D24 and D25 protect the LM304 against any over-voltage surges.

5.3.2.6 Specifications
Tables 5-2 and 5-3 list the power supply specifications.
5.3.3 G066 Module Description
The G066 Read Amplifier comprises a threshold generating circuit and nine identical read amplifier
circuits, one for each tape track. This discussion references the G066 circuit schematic diagrams; refer
to the relevant drawing(s) while reading this description.
5.3.3.1 Threshold Voltages - Sheet 1 of the G066 schematic illustrates the threshold voltage generation logic.

5-36

Table 5-2

Power Supply Input Specifications

Parameter

Specifications

Input Voltage (1 phase,

95-132/190-264 V

2 wires, and ground)
Input Frequency

47-63 Hz

Input Current

7 A nominal at 115 V, 60 Hz

Inrush

85 A at 115 V rms, 60 Hz

Table 5-3

Power Supply Output Specifications
Specification

Parameter

+5 V Regulator Circuit
10 A maximum
6.4 V 10%
7 A nominal
15 A
5% minimum
Less than 2%

Load Range
Overvoltage Crobar
Current Foldback at 25° C
Backup Fuse
Adjustment
Regulation

+ 12 V Regulator Circuit
(Write Circuits)
0.75 A
None
0.5 A
lA
35% minimum
Less than 3%

Circuit Load Range
Overvoltage Crobar
Current Foldback at 25° C
Backup Fuse
Adjustment
Regulation

+ 12 V Regulator Circuit
(Control Switch Circuits)
0.75 A
15.5 V 10%
0.75 A to 0.3 A
0.75 A
10% minimum
Less than 3%

Load Range
Overvoltage Crobar
Current Foldback at 25° C
Backup Fuse
Adjustment
Regulation
-6.4 V Regulator Circuit

0.75 A

Load Range
Overvoltage Crobar
Current Foldback at 25° C
Backup Fuse
Adjustment
Re ulation

8V
0.75 A to 0.3 A
0.75 A
10% minimum
Less than 3%

5-37

Figure 5-19 is an equivalent circuit of this programmable threshold logic. A type 74156 MUX uses a 2bit code formed by signals WRE H and PES L to select one of the four A output lines. When an output
line is selected, a low voltage is produced, which draws current through the resistor attached to that
output. This sets up a reference current at the sensing node of the 324 operational amplifier. For
example, if a select code of 0 (i.e., WRE H false and PES L true) is used, output AO goes low. This
places 3 V across a 30k resistor (from the + 3 V reference at the noninverting 324 input) and draws .1
rnA through it and feedback resistor RIOt. An output voltage is produced from the 324 (pin 7) that is
slightly more positive than the + 3 V reference; that voltage is approximately + 3.3 V. The output feeds
two additional sections of the 324 op amp, which provides current buffering. Pins 10 and 3 are noninverting inputs, while pins 2 and 9 are inverting inputs. Pin 8 supplies the positive threshold (+ TH)
voltage (in this example approximately 3.3 V) to the threshold detection network. Similarly, the inverting amplifier (connected for a gain of 1) produces a positive voltage slightly less than +3 V from
pin 1. This is again buffered and supplies the negative threshold (-TH) voltage (in this example approximately + 2.7 V) to the threshold detection network. The chart on Figure 5-19 lists the approximate ± TH voltages produced by the possible selected inputs.
All of the threshold voltages are centered about a + 3 V source. This is done to provide the use of the
full dynamic ranges of the power supplies: + 12 V and -6 V. By referencing + 3 V, a full 9 V excursion
can be used. The -TH is the same reference to +3 V as the +TH, only it is inverted.
One additional resistor can be used by the 74156. When the TE16 is reading PE records, the controller
sends a signal called Interchange Read [IRD (SB)I] to the G066 over the slave bus. When true, the
signal selects the BO output of the 74156, placing a 12k resistor into the circuit. The result is a very low
threshold voltage (+ 3.1 V, -2.9 V). This is done to try to pick up every bit of signal possible from the
PE record. Signal IRD (SB) L is always negated in the gaps, so very little stray signal and spurious
noise can be picked up. The signal becomes true in the middle of the record, thus picking up as much of
the signal as possible.
The PACKET H signal (G066, Sheet 1) is useful for maintenance purposes. It follows all of the data
outputs, reflecting gap scatter, jitter, and skew. The signal is also sent to the M 8911-YB or M8931
where it is used in formatting data characters in NRZI mode.

5.3.3.2 Read Heads and Amplifiers - Nine identical read amplifier circuits are on the G066 module,
one for each tape track. Because these circuits are identical, just one is explained.
As tape moves past the read head, magnetic flux transitions on the tape cause the read head to produce
voltage pUlses. The direction of flux transition determines the polarity of the output pulses. The head
signal inputs to the module (G066, Sheet 2 and Figure 5-20) at pins 11-15, and 16 and goes through a
filter network to provide high frequency boost to the head signal. The filtering has little effect in NRZI
mode, but it does accentuate the high frequency PE signals. Without the network, larger differences
between the two signal amplitudes would exist.
The signal goes into a high gain jBW 733 amplifier. Adjoining track signals are decoupled from one
another by the capacitor jinductor networks tied to voltage input pins 5 and 10. The gain adjustment
(R56 for this track) is a 2k resistor between pins 4 and 11. All 9-track adjustments are accessible from
the rear of the module.
The dual 733 outputs are further decoupled (on a dc basis) and input to a 318 operational amplifier,
connected for a gain of 34. The inputs to the read head are relatively small (Le., 12 mV p-p NRZI; 6
m V p-p PE). However, by the time they output from the 318 amplifier, the signal is approximately 12 V
p-p. Only ac coupling is used from the 733, as the offset voltage coming from the 733 is removed by
capacitors C35 and C36.

5-38

r - - - -THRESHOLD
--------

DETECTION NETWORK

R101

B2
IRD (SB) L
B1
BO

+5
74156

-NEG

+3
-STROBE
(FROM PULSE AMP)

+3
A3
A2
A1
AO
30K

POS

INPUT
(FROM AMPLIFIER)

WRE H
PES L

+STROBE
(FROM PULSE AMP)

'-------------

± TH VOLTAGES
PES = 0

PES = 1
-TH

+TH

-TH

+TH

WRE = 0

3.9

2.1

3.3
2.7
SEE NOTE

NOTE:

WRE = 1

5.1

0.9

3.6

When I RD(SB}L is true (i.e., during PE Read), then
+TH = 3.1V
-TH
2.9V

2.4

CP-3034

Figure 5-19

Programmable Threshold

5-39

r-- -- .------- --,

PREAMPLIFIER

PES L

RDn(1)H

7476

(DECQUPLlNG)
-TH
(-REF)

Lr~--~------~J

I
L___________ _

L _____________ J

~---------------,
PEAK DETECTOR

RDn(O)H

AMPLIFIER

HEAD

,-- -- - - - - - - - - .

I
I
I

+TH
(+REF)

READ

;;A-;; D~~';-~O; -

IL ____________
CLEAR L
J

r----------- --- -,
PULSE AMP

(TTL)

'- _ _ _ _ _ _ _ _ _ _ ,...J

L _________ ______

L _____________ _
CP-3035

Figure 5-20 One Read Track
Equivalent Circuit

5-41

The 318 output feeds two areas: peak detector and threshold detection network.
The threshold detection network comprises two type 339 comparators. The 318 amplifier output feeds
the plus input of one comparator and the minus input of the other. This circuit detects if the amplifier
out is either above the positive threshold voltage (+ TH value) or below the negative threshold voltage
(-TH value). Head signals do not pass through the comparators; the comparators only supply a logical
high (only one can be true) to one leg of a 7400 NAND gate. The other input to the NAND gate is the
head signal, after passing through the peak detector. Both a peak detector output pulse and a threshold
qualification output are required to generate a POS or NEG signal (pulse) from the 7400s. The outputs
of the 7400s (POS and NEG) are always low going, but they are responding to a positive or negative
peak, respectively, from the tape.
The output of the 318 amplifier also feeds the peak detector, another 318. This circuit operates on the
principle that the only place on a sinusoidal waveshape where the derivative of that waveshape is zero
is at the peaks.
The 318 peak detector looks at the output of the previous 318 amplifier. When it has differentiated that
output, the peak detector then looks for zero crossings; that is where the peaks occurred.
The 318 peak detector op amp is coupled through a capacitor from the second stage 318 amplifier. The
current through that capacitor (e.g., C 155) is C dv / dt. Therefore, the current going into the minus
input of the peak detector is the derivative of the signal voltage. When the 318 output of the peak
detector is close to ground, the feedback diodes (D3 to D6) are all open, leaving only the 120k resistor
in the feedback path. If the signal voltage from the amplifier is a positive peak, then the current
through C 155 will be a small positive current pulse while the signal voltage is rising, followed by a
transition through 0 A at the peak, and followed by a negative current while the voltage is decreasing
(Figure 5-21).

AMPLIFIER
OUTPUT

iTHROUGH
C155

318 PEAK
DETECTOR OUTPUT

PEAK DETECTOR
710 COMPARATOR
OUTPUT
CP-3036

Figure 5-21

Peak Detector Waveforms

5-43

Therefore, the 318 peak detector output voltage first goes negative, until it is limited by the feedback
diodes (D3, D5). Once the level reaches approximately -.7 V, the diodes turn on and clamp the level.
This level remains until the signal voltage approaches its peak. When this happens, the current through
C155 goes through its zero crossing (derivative of voltage signal is zero). Then, as the signal voltage
starts down, the current through C 155 is a small negative current pUlse. Now diodes D4 and D6 limit
the 318 peak detector output.
A 710 comparator completes the peak detector network. It accurately isolates the point where the
transition at the output of the 318 portion of the network occurred and converts that ±.7 V swing to
TTL levels.
The 318 peak detector output oscillates during signal gaps because dv / dt is also zero there. The 710
follows accordingly, and its output stabilizes. When the current through C155 reaches the zero crossing, the 318 goes from -.7 V to +.7 V and the 710 comparator output goes low.
This transition inputs to a pulse amplifier, comprising two 7404s; the second provides an inverted
signal. The P A outputs normally sit at approximately +.4 V. When the peak detector fires, the outputs
go to about 2.6 V and -1.4 V. If, for example, a positive signal voltage is being read, a -1.4 V pulse
feeds the NEG 7400 NAND gate input and a +2.6 V pulse feeds the POS 7400 NAND gate input
(Figure 5-22).

AMPLIFIER
OUTPUT

PEAK DETECTOR
COMPARATOR
OUTPUT

+2.6V

NEG
PA OUTPUT
(ACROSS R24S)

-1.4V
+2.SV

POS
PA OUTPUT
(ACROSS R10S)

-1.4V
CP-3037

Figure 5-22

POS and NEG Waveforms

Until this time, the G066 operates the same for either PE or NRZI read data except, of course, for the
threshold. The setting of the various read data flip-flops is where the difference occurs.

5-44

In NRZI mode, a low pulse from either POS or NEG sets the read data flip-flop to the 1 state, either
by direct set (POS) or by the clock input (PES L is high in NRZI mode). Therefore, any pulse going
through the read amplifier chain sets the flip-flop.
The PACKET signal is sent to the M8911-YB (or M8931) to help format the data. The result is that
signal CLR READ BOARD L, generated on the M8911-VB, is sent to the G066 (Sheet 1) and asserts
signal CLEAR L. This signal clears the read data flip-flop at the end of the data character period.
Figure 5-23 shows the waveforms of the various designated areas of the read amplifier circuit (Figure
5-20). The read data flip-flop functions differently in a PE Read operation (Figure 5-24). A pulse at the
POS output of the threshold detection network sets the 7476 J-K read data flip-flop. Accordingly, a
pulse at the NEG output clears the flip-flop, because when reading in PE mode, the J input (PES L) is
low and the K input (PES H) is high. The output of the read data flip-flop follows the polarity of the
magnetic field on the tape; it contains the data in phase encoded (PE) form.

AMPLIFIER
OUTPUT

(POS) PA
OUTPUT
(ACROSS R246)

0
®

(NEG) PA
OUTPUT
(ACROSS Rl06)

PEAK DETECTOR
COMPARATOR OUTPUT

I
I
THRESHOLD
DETECTION
NETWORK
OUTPUTS

CLEAR L
(FROM SLAVE
CLOCK BOARD)

ROn!l)

I
I
I

Lr-

I
I

0
®
0

NOTE: ±TH are not to scale.

Figure 5-23

CP-3038

Read Amplifier Waveforms (NRZI)

5-45

AMPLIFIER
OUTPUT

PEAK DETECTOR
COMPARATOR OUT

(POS) PA
OUTPUT
(ACROSS R246)

(NEG) PA
OUTPUT
(ACROSS R106)

THRESHOLD
DETECTION
NETWORK
OUTPUTS

RDn(1)

t:\

0
Q
V

0
0
0
CP-3042

Figure 5-24

Read Amplifier Waveforms (PE)

5.3.4 M8911-YB/M8931 Slave Clock and Motion Delay
All free-running clock waveforms used in the TEl6/controller system are generated by a 2.3 MHz,
crystal controlled clock located on the slave clock and motion delay (SC) module (M8911, M8911-YB,
M8931). The 2.3 MHz clock is divided down to 144 kHz and is transmitted to the controller over the
slave bus [CLOCK (SB)] by any TE16 that is on-line and selected. The 144 kHz frequency has been
used, because it is the highest frequency clock needed by the controller; 144 kHz is twice the 1600
bits/in data rate.
5.3.4.1 Write Clock - With a controller, the TE16 is capable of reading and writing data at several bit
densities. In order to read and write at various bit densities, a separate clock signal is developed: signal
WRT CLK (drawing SC3). WRT CLK is transmitted to the controller by an on-line, selected TE16
whenever the ACCL (SB) L control signal is negated by the controller.
WRITE CLOCK is generated in the following manner. A number is preset into a 74161 (synchronously loaded) binary counter (SC3), which is then counted up at 575 kHz. When the counter overflows, WRT CLK H is asserted, which causes the counter to preset at the leading edge of the next 575
kHz clock pulse. With the counter preset, WRT CLK H is negated by the trailing edge of the same 575
kHz clock pulse. The counter clocks as before, until an overflow, and the cycle is repeated.
5-46

The presets of the 74161 counter are determined by combinations of the various signals listed in Table
5-4. Also listed in Table 5-4 are the resulting counter presets, the WRT CLK frequency, and the
density. Note that the WRT CLK frequency for 1600 bits/in is four times that of 800 bits/in. This is
because 1600 bits/in is used only in PE mode, and PE mode requires a double WRT CLK frequency.

Table 5-4

On-Line

Off-Line

{

Write Clock Frequencies

DEN
2

DEN

DEN
0

Test
PE

Test
DEN

WRTCLK
Counter Presents
LSB
MSB

Frequency
kHz (bits/in)

0
0
0
0
1
1
1
1

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

x
x
x
x

1
1
1
1
1
1
1
1
0
0
1
1

1
1
1
1
1
1
1
1
0
1
0
1

10000011
01010111
10001111
10001111
10111111
00111111
10111111
10111111
01010011
10001111
00111111
10111111

9 (200)
28 (556)
36 (800)
36 (800)
N/A
N/A
N/A
N/A
10.7 (238)
36 (800)
N/A
N/A

The frequency of the counter cycle varies with the magnitude of the preset. Figure 5-25 shows timing
diagrams for presets of -1 (-n = 2's complement of n), -2, and -3. Note that for a preset of -n, the
frequency of WRT CLK (fWRT CLK) = [575/(n + 1)] kHz.
5.3.4.2 Motion Delay - The slave clock and motion delay module also generates presets for the
motion delay counter in the controller. Simultaneous with tape motion initiation, the controller generally asserts signal EMD (SB) L (Enable Motion Delay). This signal gates the motion delay presets onto
the read data lines (SC2) of the slave bus and loads them into the controller motion delay counter.
When EMD L is negated, the counter is counted up until it reaches a count of 214, at which time signals
ACCL H and READING L are asserted; all further clocking is inhibited. The presets of the counter
determine the time interval necessary to reach the count of 214 and hence the duration of the motion
delay.
All presets depend on the type of operation (e.g., read/write) performed, the direction of tape motion,
and some additional parameters. Table 5-5 lists the motion delays generated under the various conditions.
The READING L signal enables the read circuitry in the controller. ACCL L is sent to the TEI6,
where it enables generation of WRT CLK and other read and write functions.

5-47

575 KHz CLOCK

J I
"-LJ
LOAD

COUNT OUTPUT
(PRESET =-1)

OFLO

LOAD

COUNT OUTPUT
( PRESET = -2)

WRT elK

lOAD

COUNT OUTPUT
(PRESET = -3)

WRT CLK

-I

-2

OFLO

LOAD

(

WRTCL'

LOAD

OFLO

(

(
U

lOAD

OFLO

-I

LOAD

(

OFLO

LOAD

OFLO

-I

(

I
(

(

OFLO

lOAD

-2

l
(

I
L

lOAD

-I

-2

-I

OFLO

lOAD

(

OFlO

(

LOAD

-I

OFLO

r
10-1254

Figure 5-25

WRT CLK Generation Timing

Table 5-5 Start and Stop Motion Delays
Start/Stop

Mode

Operation Time (ms)
7-Track
9-Track

Start Motion Delays

Write from BOT
WRITE
Read from BOT
READ/SPACE FWD/SPACE REV

184.60
8.99
150.60
2.72

200.70
15.26
86.94
.92

Stop Motion Delays

WXG /WFMK/WRITE
READ/SPACE FWD/SPACE REV

2.72
1.82

5-48

When the end of each data record is detected by the TEI6's controller, a shutdown sequence is started.
Again, EMD L is asserted, initiating a stop motion delay. EMD L loads the motion delay counter with
presets gated by the TE16 onto the read data lines of the slave bus, just as occurred during motion
initiation. The presets, however (again refer to Table 5-4), are different during start and stop delays.

5.3.4.3 Read Strobe Generation - The M8911 generates the Read Strobe Read Skew [RSDO (SB) L
Delay Over], and generates the CLEAR READ BOARD signal in NRZI mode. In PE mode, this read
strobe generation circuitry is inoperative, because the controller does the entire job of data recovery.
The manner by which read strobe can be generated is: The eight-input NOR gate, together with a twoinput OR gate, are used to generate the logical OR of all digital read signals. Whenever one of the
digital read signals becomes asserted as the result of a signal read from tape, a flip-flop is set that loads
the two-chip counter E23 and E28. The value loaded into this counter is provided by the Clock PROM
and is dependent upon the density code and the signals WRITE ENABLE and IRD. In general, the
counter is preset to a value such that it overflows in precisely 50 percent of one data cell time. However, when signals WRITE ENABLE or IRD are asserted, the preset value is altered so that, the
counter overflows in 35 percent of one data cell time.
When the counter overflows, the Skew Delay Over signal is asserted. Assertion of this signal generates
the CLEAR READ BOARD pulse, enables the sending of RSDO back to the controller, and loads a
second delay into the counter. This delay is also variable. It is generally approximately one microsecond long. However, if IRD or WRITE ENABLE is asserted, this second delay is increased to
approximately 50 percent of one data cell time and forms a NO TRESPASS ZONE, during which no
data pulses are expected. Occurrence of a data pulse during this interval results in assertion of the SET
VPE signal. Thus, the skew delay circuitry is less'tolerant of jittery or skewed data in the WRITE or
IRD modes.
Once the NO TRESPASS ZONE time is over, the skew delay counter returns to a state in which it
simply awaits the next detection of a data bit.

5.3.5 M8912 Module Description
The test function generator (TFG) module (M8912) is used for off-line testing of the TE16 tape transport. During normal, on-line operation of the TEI6, the TFG is only used to transmit the serial
number and certain drive-type bits to the tape controller; to do so, it must be located in section EF of
slot 3 of the TE 16 backplane. The serial number and drive-type information required is wired on the
backplane at this location. For use as an off-line tester, the TFG module must be moved to section AB
of slot 3.
An operating procedure for the TFG is presented in flow chart form in Figure 5-26. Figure 5-27
provides additional information on TFG switch settings. The TFG module is illustrated in Figure 528.

5-49

REMOVE TFG
FROM SLOT EF3
EXTEND MODULE
IN SLOT AB3

PLACE WRT,
SS WRT, AND SS
RD SWITCHES
IN DOWN
POSITION

CONFIGURE S5-9
& S5-1O FOR
DENSITY
WRITE

READ

CONFIGURE DATA
PATTERN IN S5 &
CONTINUOUS
READ

S6
START
-STOP
READ

CO NTINUOUS
WR ITE

START-STOP WRITE

PLACE SS RD
SWITCH UP MOMENTARILY
THEN DOWN
(LOADS DATA
PATTERN)

LOAD FRAME
COUNT INTO
S41-8

SET MAINT_ SW_
PANEL FWD/
REW/REV
SWITCH
TO FWD

PLACE WRT
SWITCH UP

INITIATE FWD
TAPE MOTION
FROM MAINT_
SW_ PANEL

INITIATE
FWD OR REV
TAPE MOTION
AT MAINT_ SW_
PANEL

LOAD FRAME
COUNT INTO
S41-8

I
SELECT FWD OR
REV TAPE MOTION AT MAl NT_
SW_ PANEL

PLACE SS WRT
SWITCH UP

PLACE SS RD
SWITCH UP

SET S4-9 TO ON IF
LONG DELAY BETWEEN STARTSTOP OPERATIONS
IS DESIRED_
ADJUST R23 AS
DESIRED
CP-3039

Figure 5-26

TFG Operating Procedure Sequence
5-50

ON = LONG DELAY
START /STOP OPERATIONS

NOT
USED

DETERMINE RECORD
LENGTH (2'5 COMPLEMENT)
FOR SS RD or SS WRT
OPERATION (BIT 1 = LSB)

' ,
DETERMINE DATA
DENSITY AND MODE ____ ., / '
____ ...J

r---..

I H+H+I+H:F

ON=O
OFF=1

MODE

S5-9
TEST PE

S5-1O
TEST DEN

ACTUAL
FREQUENCY

556 bpi NRZI

25 KHz

800 bpi NRZ

OFF

36 KHz

1112 bpi PE

OFF

50 KHz

1600 bpi PE

OFF

72 KHz

DETERMINE TFG
TEST DATA OUTPUT
(SEE NOTE)
NOT USED

111 11+1+I+H:

ON= 0

2 3

OFF=1
CP-3040

Figure 5-27

TFG Switch Settings

6999-5

Figure 5-28

Test Function Generator Module

5-51

As an off-line tester, the TFG module (Figure 5-28) controls tape motion, enables TE 16 read and write
circuitry, and generates test patterns to be written on tape. Three modes of operation are possible.
1.

Start-Stop Read (SS RD) - When the SS RD switch (S3) is activated (raised), tape motion is
initiated; a record of predetermined length is read; tape motion is then terminated. This
cycle is repeated as long as the SS RD switch is up.

Start-Stop Write (SS WRT) - When the SS WRT switch (S2) is activated (raised), tape
motion is initiated; a record of predetermined length, consisting of preselected characters, is
written on tape; tape motion is then terminated. This cycle is repeated as long as the SS
WRT switch is up.

Continuous Write (WRT) - When the WRT switch (St) is activated (raised), power is supplied to the write drivers and they are continuously driven with a preselected pattern. Tape
motion is controlled from the maintenance switch panel.

When the tester card is located in the TEI6, location AB, the pin labeled TESTER ENABLE L is at
ground potential (Drawing M8912, Sheet 3). This enables the TEST PE H and TEST DEN H switches.
With the LED on, the TEST PE H and TEST DEN H switches affect the recording density as controlled by the M8911-YB slave clock module. The TESTER ENABLE L level asserts LOCAL H,
preventing the transport from going on line.
An 8-bit counter, constructed from two 74197 up-counters, controls a preset record length. The preset
count is entered from the S4 switches S4 (1 to 8). Both the SS RD and SS WRT functions use the
counter to control record length. The WRT function is continuous and does not use a preset panel.
A 16-bit shift register, constructed from two 74199 8-bit shift registers, allows various data test patterns to be generated. Switches on S5 and S6 select the data pattern to be loaded into the register.
When shifted out, the test data patterns (TEST DATA A, H, and L and TEST DATA B, H, and L) are
wired to the data multiplex on the LAW module (M8916) and written on tape.
The start-stop repetition rate during SS RD and SS WRT can be modified by adjusting R23. The range
of adjustment is determined by switch S4, segment 9.
5.3.5.1 Theory of Operation - The following paragraphs describe the theory of operation of the TFG
module in its three functional modes. The discussions reference the TFG schematic (TFG 3).
1.

SS RD Function - Figure 5-29 illustrates the SS RD function timing. When the SS RD
switch (S3) is closed, E 1 - pin 10 goes low and triggers the first one-shot delay. FIRST ONE
SHOT L, input to the LAW module (M8916), initiates tape motion; the direction of tape
motion is determined by the direction switch on the TE 16 maintenance switch panel. FIRST
ONE SHOT also presets the 8-bit counter (E15 and E22) and loads the l6-bit shift register
(E 13 and E23).
When the first one-shot delay times out, flip-flop E8 is clocked set and asserts WRT CLK
TEST ENB L. This signal is used in the slave clock and motion delay module (M89ll-YB)
to enable WRT CLK and RECORD PULSE L pulses. The RECORD PULSE L pulses now
clock the TFG 8-bit counter and 16-bit shift register. When the counter overflows, the third
one-shot delay is triggered and engages WRT CLK TEST ENB L, inhibiting further RECORD PULSE L pulses.
When the third one shot delay times out, FOURTH ONE SHOT H is generated and causes
tape motion to terminate. When the fourth one shot delay times, the first one shot is again
triggered; the cycle begins again. The start-read-stop cycle continues as long as the SS RD
switch is depressed.
5-52

SS RD SWITCH H
L

1 ST

ONE SHOT L H

l ------it
.....
~

* L

FRAME CNT 2H

H
L

~I-----------~(

WRT CLK TEST ENB L
(RECORD PULSE)

TSTR

(II

I
Y /

I
Y / READ

READ

-1-----1/ h,zOVERFLOW

10 - - -5- - . 1 m

,------I

-----------!I

1-/

I r-,40VERFLOW

----of

i-I

L
rr

15ms

3 ROO N E SHOT H

H
4 TH ONE SHOT H

L --t-------f(

H --t-----I(

~----\~\_---~?~
r

VARIABLE 1
....._ _ _---;

1 - /- - - . . . . . .

1 - /- - - . . . . . ,

INIT L

L
CLOSE SS
RD SWITCH

..oJ

r - /_ _ _ _

r+-I

'--------J.

COUNTER OVERFLOWS
AT END OF PRESET
COUNT

* RECORD PULSE L PULSES

OPEN SS RD
SWITCH

10-1298

OCCUR DURING WRT CLK
TEST ENB L.

Figure 5-29

SS RD Function Timing

SS WRT Function - Figure 5-30 illustrates the start-stop write function timing. The SS WRT
function operates in a manner similar to the SS RD function, except that SET TEST WRE L
is asserted along with WR T CLK TEST ENB L. SET TEST WRE L causes the write and
erase heads to be energized. When RECORD PULSE L pulses clock the shift register (E13
and E23), the contents of the register are rotated. The shift register outputs (TEST DATA
A, H, and L and TEST DATA B, H, and L) are jumpered to the LAW data write multiplex
and written on tape.

Continuous Write Function - The continuous write function works differently than the SS
WRT function in that in the continuous test mode, no starting and stopping occurs. One
continuous write operation commences with the setting of the WRT switch and ends with
the opening of the switch. Tape motion (starting and stopping) is controlled at the TEl6
maintenance switch panel.
As the WRT switch is closed, WRT CLK TEST ENB L and SET TEST WRE L are asserted. This enables RECORD PULSE L pulses and passes write current to the heads. The
8-bit counters are not used in a continuous write operation. Instead, the shift registers are
clocked by inverted RECORD PULSE L pulses, and whatever data pattern was in the shift
register switches is shifted out on the TEST DATA lines to be written and observed. The
THIRD ONE SHOT delay is inhibited, which eliminates the start-stop operations.

If the operator desires a test data pattern other than the pattern presently in the shift register
switches, he must first run an SS RD operation with the desired test data pattern. It is the
only method for loading new information from the switches into the shift register.
The continuous write operation continues until the WRT switch is opened; this clears the
WRT flip-flop and removes the write current and record pulses.
5-53

SS WRT SWITCH:

IL-__--I/ ~I- - - - - - - - - - I !
rl

H --,
~

FIRST ONE SHOT L L

r - /_ _ _ _ _ _ _- - - (

r11
IOms!

H----,

~ I WRITE

WRT CLK TEST ENB L L

H--,I

SET TEST WRE L
(WRITE CURRENT) L

L..---tll~----

__--~II

H
3RD ONE SHOT H

->----,)~
I

IVARIABLEI

->----,II

t-+

'---I---t(U-/I----

H
4 TH ONE SHOT H

I-~

(~,-?---OVERFLOW!I

H _ _ _ _-iU..,foOVERFLOW
TSTR FRAME CNT 2 H

WRITE

n
) I

ill

H -'------;

((

INIT L

L
i

CLOSE SS
WRT SW1TCH

COUNTER OVERFLOWS
AT END OF PRESET COUNT

SS WRT OPERATION
REPEATING

OPEN SS WRT
SWITCH
10-1297

Figure 5-30

SS RD Function

5.3.6 M8916 - Logic and Write Module Description
The logic and write (LAW) module (M8916) interfaces the tape controller motion control signals,
status signals, and write data path to the TEI6. It also controls the loading sequence and initiates the
unloading sequence.
5.3.6.1 Write Data Path - Input to the LAW circuitry of each track is the data line corresponding to
that track and a delayed RECORD pulse. (The delay is prewired and corrects for static write skew
inherent in the write head.) PE write data has been formatted (converted from binary to PE mode) in
the controller. NRZI write data is still in binary mode and is converted (formatted) to NRZI mode
(transition for 1s; no transition for Os) in the LAW module. The write data signals are then applied to
the write head.
The write data path within the TE16 is shown in Figure 5-31. Once the slave bus write data line signals
are received by the slave bus receivers, they are sent to the write multiplexer. The output from the write
multiplexer is then clocked into the write deskew buffer. Note that the M8912 TFG module can also
supply data to the write deskew buffer for off-line test purposes (Paragraph 5.3.5).
In NRZI mode, a clock pulse occurs once for every character written on tape. The data is presented to
the drive in terms of Is and Os, and the drive must format the data stream. In PE mode, the clock
occurs twice for every character written: once when normal data is output from the write multiplexer
and once again when inverted data is output from the write multiplexer. In this mode, all formatting is
done in the controller, prior to the data being sent to the drive. PE write data goes out on the data lines
in the same waveshape as will be read back. The double clocking operation produces phase encoding
(in PE mode).
5-54

TE16 TAPE TRANSPORT

r- - - - - - - - - - - - 1
LOGIC AND WRITE (M8916)

I
I

.......

WRITE
DESKEW
BUFFER

I
I
PIO SLAVE BUS
WRITE DATA LINES

r-..
9 BITS

WD 0-7.P (SBll

9 BITS)
V

I
I
0

z
z

(..)
U)

f---

.....
'OJ

WD 1

..'\
.../

SLAVE
BUS
RECEIVERS

WRT ClK
TEST ENABLE
TEST
FUNCTION
GENERATOR
M8912

;:)

III

>
<t

...I

"......
WD3

I--;L~ ~~D~I~D~Y-'
REC(SB)l
RECORD PULSE

WRITE CLOCK
WRT CLK(SB)l

Mag11

,
)
J

I
I

L-

.....

......
WD5

....

WD6

)
v

WD7

I
I

I
I
I
I

I---

WD4

WDP

i0-f---

rO-

.....--!OI---

r-o-

I
I
I
I

)
~
I
WRITE
HEAD

I
I
I
I
I

I
I

SKEW CLOCK

(

I
I

f---

"....,

TEST DATA

f---

.....-,.;

WD2

WRITE
DATA
MUX

I
I

(..)

....,

WDO

a::

(

TAPPED DELAY

- - - - - - - - - - - - ..J

------ J

NOTE:
WRT ClK also goes to M8912 and REC pulse can be generated by M8912.

CP-3041

Figure 5-31

Write Data Path
5-55

Figure 5-32 shows the timing of the write operation for NRZI and PE mode.
Timing for both on- and off-line write operations is derived from WRT CLK, which is generated in the
TEI6 by the MB911-YB or M8931 modules and transmitted to the controller. WRT CLK is then gated
in the controller to produce RECORD pulses, which are transmitted back to the TEI6. The RECORD
pulses are input to a tapped delay, which outputs to the clock inputs of the write deskew buffer. This
arrangement provides write deskew; it compensates for dimensional tolerances inherent in the manufacture of tape heads. These tolerances prevent all the tape tracks from ideally lining up.
The write deskew buffer circuitry also converts the binary NRZI data into its NRZI form (i.e., transition for Is; no transition for Os). The write deskew buffer output is then driven to the write heads.

DATA

CONTROLLER
WRITE BUFFER OUTPUT
(OBSERVED ON WD 0-7.P)
·AT:

RECORD PULSE
(ONE PER DATA BIT)

NRZI

ONE
BITTIME
112~s

200 BPI
556 BPI
800 BPI

40~s

1600 BPI

14~s

28~s

DESKEW BUFFER OUTPUT
(NOTE FORMATTING OF DATA
IN DESKEW BUFFER)

CONTROLLER
WRITE BUFFER OUTPUT

RECORD PULSE
(TWO PER DATA BIT)

DESKEW BUFFER OUTPUT
(NOTE THAT ALL DATA
FORMATTING TAKES
PLACE IN CONTROLLE~)

~
ONE

BIT
TIME·

CP-3043

Figure 5-32

Write Operation Timing

5-57

5.3.6.2 Tape Motion - The signals that control the power board (H607), which, in turn, controls
capstan and tape reel motion, are generated on the LAW module. The LAW module contains motion
control flip-flops and various sequencing circuits. The sequencing circuits provide smooth mechanical
operation, protecting both data and hardware. The flip-flops enable reel motion and vacuum operation, determine the direction and speed of capstan rotation, and control panel indicators. These flipflops are controlled by the tape controller via the slave bus when the TE 16 is on-line and by the TE 16
control panel and maintenance panel when the transport is off-line. When the TE16 is on-line and
receives a motion/write command from the controller, the flip-flop(s) corresponding to that command
is set upon receipt of the DRV SET pulse, at which time the motion will commence and the write
amplifiers become enabled. Receipt of the STOP L signal from the controller causes the motion flipflops to reset, and the motion terminates. Note that if the STOP L signal is never negated, motion and
write enable flip-flops cannot be set.
The motion control logic is illustrated on the M8916 (LAW) drawings. The remainder of the discussion of the motion control logic uses the M8916 drawings to complement the text.

5.3.6.3 Power Clear - The power clear circuitry is a "power-low" detector. When the + 5 V power
supply is turned on, the circuit asserts P CLR L until the logic supply stabilizes at +5 V. This results in
the resetting of all the various status flip-flops in the TE 16 to the idle state, unloaded, off-line condition; keeps all motors turned off; and asserts braking on the reels. Similarly, whenever the +5 V power
supply drops to approximately 4.5 V, P CLR is asserted until the power supply either drops too low to
operate the power clear circuitry (approximately 3 V) or rises back above the trip voltage (4.5 V).
5.3.6.4 Servo System Failure Detection - Two fail-safe switches, located in each vacuum-buffer column, define the permissible limits of tape excursion into those columns. If the tape loop in either buffer
column goes below its lower fail-safe switch, the switch opens and signal LFS H is asserted. If either
tape loop travels above its upper fail-safe switch, then that switch closes and asserts UFS L. When
VACUUM ON (0) L is asserted, indicating that tape is loaded and either LFS H goes low or UFS L
goes H, then the FAIL flip-flop (LAW 3) is set. The~ effect of FAIL (1) H is essentially the same as that
of the P CLR pulse, except that FAIL (1) H is a level and remains asserted, preventing tape unit
operation until manually reset by pressing the LOAD switch on the TE 16 control panel.
5.3.6.5 Loading Sequence Logic - Initiation and shutting down of the reel motors, brakes, and function control logic is controlled by the loading sequence logic. The loading sequence logic consists of the
RELAY ENABLE flip-flop, the REEL MTR ENABLE L, and VACUUM ON L one-shots and their
associated logic. The RELAY ENABLE flip-flop is reset by either FAIL (1) or the pressing of the
REW /UNLOAD switch at the initiation of an UNLOAD sequence. When RELAY ENABLE is reset,
the vacuum motor is turned off. Also, power to the reel and capstan motors is turned off. The REEL
MTR ENABLE L one-shot is held to its 1 state, negating REEL MTR ENABLE L; the VACUUM
ON L one-shot is held to its 1 state, negating VACUUM ON L. These prevent the function control
logic from responding to any command.
The RELAY ENABLE flip-flop is set by signal LOAD PULSE (1) H, a signal produced when the
LOAD switch is pressed and released. When the RELAY ENABLE flip-flop is set, the vacuum motor
is turned on and power is applied to both the reel motor drive circuits (+ 17 V INT power line is
connected to + 17 V unregulated supply) and the capstan motor drive circuit (PWR COMMON INT
power line is connected to power common). As soon as the RELAY ENABLE flip-flop is set, the
VACUUM ON one-shot begins to time out. This one-shot provides a "grace period," during which
the vacuum motor is allowed to accelerate to its running speed. Tape can be loaded into the vacuum
columns (tape loading is accomplished on the H607) during this period. Once vacuum is established
and tape is loaded in the buffer columns, the LFS H signal goes low as vacuum pulls both lower failsafe switches closed. When LFS H does go low, the REEL MOTOR ENABLE one-shot begins to time
out. Approximately 100 ms later, the REEL MOTOR ENABLE one-shot times out, allowing the reel
servos to control reel motor motion.
5-58

Finally, the "grace period" expires as the VACUUM ON one-shot times out. If the load sequence has
been successful, both upper fail-safe switches are open (no vacuum at their intake ports), causing the
UFS L signal to be high. Also, both lower fail-safe switches are closed, causing the LFS H signal to be
low. The assertion of VACUUM ON does not clock the FAIL flip-flop. At this time, the LOAD
indicator glows and the seek-for-BOT sequence is initiated.
If the load sequence has not been successful and all four fail-safe switches are not in the appropriate
operating state, assertion of VACUUM ON clocks the FAIL flip-flop to the" 1" state, thus clearing
RELAY ENABLE and all its associated logic.

5.3.6.6 Brake Release - When the FORCE BRAKE ON (1) L delay signal is asserted, full braking is
applied to both reels. It is triggered by the assertion of the FAIL signal and lasts for approximately 4
seconds. When the delay times out, the brakes are released. FORCE BRAKE ON is also asserted
during the power-on sequence

5.3.6.7 Rewind Control- Due to the limited rate at which the reels can be accelerated and decelerated,
a special sequence of control signals must be generated to perform a high-speed rewind operation. The
sequence is shown in Figure 5-33. When the function control logic accepts a rewind command, it
asserts (Drawing LAW 5) signal SET R WD CMD L, which direct-sets the Rewind Status (R WS) flipflop.
A high level is presented to the pin 12 input of the 7400 gate in location E41 (LAW 3). This asserts
signal REV jREW H, which accelerates the capstan servo to 1.14 mjs (45 injs) in the reverse direction.
At the same time, RWS (1) triggers a 200 ns delay, which allows the reels to stabilize at 1.14 mjs (45
injs). When the delay times out, it asserts signal REWIND CAP H. The REWIND CAP H signal
causes the capstan servo to gradually accelerate to 3.8 mjs (150 injs) in the reverse direction. Approximately 10 seconds are required to achieve full rewind velocity. Normally, rewinding continues until
the function control logic detects the beginning of tape (BOT) marker. When BOT is detected, the
function control logic asserts FWD (1) L (LAW 5) and removes REWIND CAP H. The assertion of
FWD (1) L triggers the 80 ms delay [enabled by RWS (1) H]. Normal braking is applied and the
capstan servo gradually decelerates toward 1.14 mjs (45 injs), still traveling in the reverse direction
past BOT.
When this delay times out, the forward command is passed on to the capstan servo as FOR H (LAW
3). The capstan accelerates from 1.14 mjs (45 injs) in the reverse direction to 1.14 mjs (45 injs)
forward. The tape then moves forward until the BOT marker is again detected. At this time, the
function control logic clears the FWD and RWS flip-flops, negates FOR H, and the capstan comes to
a stop, terminating the rewind.

5.3.6.8 Unload Control - At the completion of the rewind function, the tape is sitting at rest at the
BOT marker. When the REW jUNLOAD switch on the TE16 control panel is pressed again (the first
time was to initiate the rewind function), the unload function begins. Pressing the switch triggers a 5 J.Ls
pulse (LAW 3 UNLOAD PULSE), which clears the RELAY ENABLE flip-flop.
When the RELAY ENABLE flip-flop clears, it clears the VACUUM ON signal, removing both vacuum from the tape columns and power from the capstan and reel motors. Special H607 circuitry then
applies limited power to the reel motors to accomplish unloading. The motor brakes are gated off
during this sequence. The tape is removed from the vacuum columns and the unload sequence continues until all tape is on the lower reel.

5-59

RWS H

REWIND CAP DLY H

(E54 pin 13)

REV/REW H

REWIND CAP H

o -_I-----J

FWD H

o --~------~----~
BOT H

o -+--------~------~
80 ms del H
(E 52 pin 5)

0 --+-----+-----~

FOR H

o -+------+--------~ ~----~
CAPSTAN
VELOCITY

+45 ips
0

-45 ips

-150 ips

CP-3044

Figure 5-33

Rewind Sequence Timing

5.3.6.9 Tape Unit Ready and Transport Settling Down - The TUR (SB) L and the transport settling
down [SDWN (SB) L] signals indicate whether the transport is idle (ready to begin an operation),
moving, or settling down (coming to a halt after performing an operation). When the tape transport is
on-line and selected by its controller, it transmits these signals to the controller to notify the controller
when it is able to accept another command.
Whenever an operation is being performed, the function control logic asserts MOTION H. The OR of
MOTION H (operation in progress) and LOCAL H (unit off-line) sets the RUNNING Hone-shot
delay (LAW 3), thereby asserting RUNNING H and also inhibiting the settle-down signal SDWN
(SB) L. When both MOTION H and LOCAL H are negated, the RUNNING H one-shot begins to
time out and SDWN (SB) L is asserted, indicating the transport is slowing to a halt. After approximately 12 ms, when the capstan has had time to come to a complete stop following any previous
command, the RUNNING H one-shot times out, negating SDWN (SB) L and, provided MOL H is
asserted, asserting Tape Unit Ready [TUR (SB) L], thereby indicating that the unit is ready to accept
any command.

5-60

5.3.6.10 Manual Control Operation - Manual operation of the TE16 Tape Transport is effected by
the operator control box switches. The detailed operation of those switches is explained in this section.
1.

LOAD - When the LOAD switch is pressed, the FAIL flip-flop is cleared, which then clears
the RELAY ENABLE flip-flop. Pressing and releasing this switch also triggers a delay,
asserting LOAD PULSE (1) H (LAW 3) for about 1 IlS. This sets the RELAY ENABLE
flip-flop and initiates the tape loading feature discussed earlier in this section.

ON-LINE - Pressing and releasing this switch changes the transport status from on-line to
off-line or vice versa, depending on the switch indicator. When the indicator is on, the
transport is on-line; pressing the switch would place the transport off-line (indicator would
go out).
Assuming the transport is off-line, pressing the ON-LINE switch asserts ON LINE SW
which clears the LOCAL flip-flop (LAW 4), asserting LOCAL (0) H and turning on the
indicator (ON LINE LED). Pressing the switch a second time asserts ON LINE SW again,
asserting LOCAL (1) H and turning off the indicator.
NOTE
If the TFG (M8912) module is in the testing position,
the drive cannot be placed on-line (Paragraph 5.3.5).
Unless a rewind operation is in progress, the ON LINE SW signal asserts INIT L (LAW 6).
The assertion of INIT L clears the FWD and REV flip-flops and brings tape motion to a
halt.
The LOCAL flip-flop (LAW 4) controls the operating mode of the TE 16 Tape Transport.
When LOCAL (0) H is true, the transport is on-line and all operations of the transport are
controlled by the tape controller over the slave bus (SB). When LOCAL (1) H is true, the
transport is off-line and is, effectively, isolated from the slave bus. In this mode (off-line),
tape motion is controlled by the FWD /REV and START/STOP switches (located under the
logic assembly), as discussed next, and also by the TFG (M8912) module.

FWD /REV - This two-position switch selects the direction of tape motion for off-line operations (LAW 5). When the switch is in the FWD position, MANUAL FWD L is asserted; in
the REV position, MANUAL REV L is asserted. These signals do not initiate tape motion
but are strobed by the START L pulse, as discussed next.

START/STOP - When this switch is moved from its START position to the STOP position, signal STOP L is asserted. If the transport is off-line [LOCAL (1) H asserted], this
causes a corresponding pulse at INIT L, clearing the FWD, R WS, and REV flip-flops and
bringing tape motion to a halt. When the START/STOP switch is moved to the START
position, START L is asserted, directly setting a flip-flop in E53 (LAW 5). The high-going
transition of this flip-flop is ANDed with LOCAL (1) H (transport off-line) and MOTION
L (no operation in progress) to produce a pulse that strobes the MANUAL FWD and REV
lines, the "B" inputs on an 8266 multiplexer. The assertion of either line causes the respective FWD or REV flip-flop to set, initiating tape motion in the indicated direction. Note,
however, that if BOT L is asserted, the signal that sets the RWS flip-flop is gated off because
the tape is already at BOT. Note also that if END PT H is asserted and FWD (1) H is true,
then INIT L is asserted to clear the FWD flip-flop and prevent running off the end of the
tape.

5-61

5.3.6.11 Tape Unit Status Sensors - The tape status (EaT IBOT) and write-lock sensor features are
discussed in this section.
1.

EOT IBOT SENSOR - To locate the beginning and the end of the recording area on the
tape, the load and end points are marked by reflective strips mounted on the nonoxide side
of the tape. The dimensions and placement of these strips are shown in Figure 5-34.
The strips are detected by the phototransistors of the EaT IBOT sensor assembly. The
EaT IBOT assembly is located in the wall of the lower vacuum column. It consists of an
EaT sensor phototransistor, located to detect light reflected from the EaT strip; a BOT
sensor phototransistor, located to detect light reflected from the BOT strip; and two lightemitting diodes (LED) located opp'osite the center of the tape, which illuminate both the
EaT and BOT strips. The LED operates in the infra-red region and, therefore, produces no
visible light. The outputs of the EaT and BOT signals are amplified, filtered, and converted
to logic levels (Drawing LAW 4), producing signals BOT H, BOT (SB) L, END PT H, and
END PT (SB) L.
The assertion of END PT H sets a flip-flop, which remains set until either the tape is
rewound or EaT is negated while tape is traveling in the reverse direction.
Thus, if tape is moved forward past the EaT marker, the END PT flip-flop remains set,
even after the marker is passed and is cleared only by rewinding or reversing the tape back
past the EaT marker. Setting the END PT flip-flop has the following effects:
a.

If the TE16 is off-line[LOCAL (1) H asserted], forward tape motion stops and the
transport does not accept a manual forward command until the tape is rewound or
reversed off the EaT marker.

If the TE16 is on-line and selected by its controller, the TE16 signal END PT (SB) Lis
asserted, indicating to the controller that tape has passed the end point.
NOTE
Notice that if the TE16 is on-line, it does not automatically stop upon detecting EOT. Data may be
written up to 3.05 m (10 ft) past the end point. The
programmer must ensure that he does not run past
this point.

The assertion of BOT H has the following effects:
a.

The TE16 accepts no new rewind commands.

When the TE16 rewinds into BOT [i.e., RWS (1) L is asserted, FWD (1) L is asserted,
and BOT H becomes asserted], the FWD flip-flop is set (Drawing LAW 5).

When the TE16 moves forward into BOT, the FWD flip-flop is cleared. (If the RWS
flip-flop is set at this time, clearing FWD also clears R WS, terminating the rewind
sequence.)

If the TE16 is on-line [LOCAL (0) H asserted] and selected by the controller, it asserts
the transport bus signal BOT (SB) L, indicating to the controller that it is at BOT.

5-62

I_ _ _ RECORDING AREA _ _+I

PHOTO REFLECTIVE MARKERS
SEE NOTE 1

SEE NOTE 2
0.76MM MAX
(0.03 IN.)

lJ12.6

EOT

HUB~r---l~-------=~==~~~~ ~~+-------------~ )------

'LJ
REFERENCE~"

-t-

(~OOF~'~

EDGE

L..===-==!:+=-__~ '--_---'j.--

0'04~~kNiN

)

±.

RIM END

~OT 0'76MMM~X t
(0.03 IN.)

7.6 M ~6~0~

4.6 M ±0.3 M
(15 FT. ±1 FT.)

+5 FT )
( 25 FT. -0.0 FT

_____

± .05 MM

(

05 MM

-'~;;;a..

......

_ _ _ _ ....._ ~1(~"~~t~7N'
(~0,0003 IN.)

BACK SIDE~

MAGNETIC SIDE

HUB END

MAGNETIC SIDE

FRONT V I EW
SCHEMATIC OF TAPE WINDING
CP-0223

Figure 5-34

Tape Markers, Recording Area, and Tape Wind

Write Lock - To protect tapes from inadvertent erasure, tape reels are provided with a write
enable ring. If a reel of tape is mounted on the TE16 Tape Transport with its write enable
ring removed, the condition is sensed and the transport refuses to honor any write commands. Further, if the transport is on-line and selected by the controller, it asserts WRL
(SB) L to the controller, indicating to the controller that it is write-locked.

The write-lock assembly consists of the write-lock solenoid and the write-lock switch. When
no write enable ring is inserted in the file reel, a feeler attached to the end of the solenoid
shaft extends into the write-lock slot on the back of the reel. This feeler places the write-lock
switch in its normally closed position, asserting WR LOCK L (Drawing LAW 6). When a
write enable ring is inserted in the file reel, the ring pushes back the solenoid shaft, actuating
the write-lock switch and negating WR LOCK L. If the write-enable switch is actuated when
tape is loaded in the buffer columns, the write-lock solenoid is engaged to withdraw the
feeler from contact with the ring. This keeps the write-lock switch actuated until the tape is
unloaded and reduces wear of the write-lock assembly and write enable ring during tape unit
operation.

5-63

5.3.6.12 On-Line Operation - When signal LOCAL (0) H is asserted, the TE16 is on-line. In this state,
all transport operations are directed by the tape controller over the slave bus. The slave bus connects
the controller to up to eight TE 16 Tape Transports.
1.

Transport Selection and Status Reporting - All of the tape transports in a system are wired to
the same slave bus, but only one transport can be logically connected to the bus at one time
(i.e., only one transport can transmit its status to the tape controller and respond to its
commands, and only one transport can be reading or writing data at a given time).
To select the particular tape transport to communicate with the tape controller, the controller transmits a binary code on bus lines SS 0 (SB) L, SS 1 (SB) L, and SS 2 (SB) L. As
shown on Drawing LAW 4, each transport on the bus compares this code to the transport
number determined by the address selection plug (signals SWO, SW 1, and SW2). If the
selection code transmitted by the controller matches the transport number and the transport
is on-line, then the SELECT indicator glows and the transport is logically connected to the
slave bus. All other transports remain logically disconnected and neither transmit nor respond to bus signals. If no address selection plug is inserted in the TE16 front panel, the
SELECT QUALIFY L signal is pulled up to +5 V and prevents drive selection. Also, during
the loading sequence, LOADING (1) H qualifies a 7405 gate which also prevents drive
selection.
When a particular transport is logically connected to the slave bus, it transmits status information to the tape controller as follows:

7 CH (SB) L

Always negated in the TE16 Tape Transport

BOT (SB) L

Asserted when the tape is positioned at load point (beginning of
tape).

END PT (SB) L

Asserted when the end point flip-flop is set.

WRL (SB) L

Asserted when the TE16 Tape Transport is write-locked.

RWS (SB) L

Asserted when the extended rewind status (EXT RWS) flip-flop
is set.

SDWN (SB) L

Asserted when the tape transport is settling down following an
operation (i.e., asserted for 12 ± 4 ms following the command
to terminate an operation while the capstan is coming to a halt).

TUR (SB) L

Asserted when the tape unit is ready to receive any command
(i.e., when the transport is neither performing an operation nor
settling down following an operation).

Tape Motion - If a TE16 is selected, on-line, and loaded with tape (MOL H asserted), it
responds to the SLAVE SET PLS and the FWD, REV, and RWND command lines of the
slave bus by setting the corresponding motion control flip-flops [i.e., FWD, REV, and R WS
(Rewind Status) flip-flops on LAW 5]. If the WRITE command line is asserted with the
RWND command line, signal SET OFF LINE L is generated, setting the LOCAL flip-flop
(LAW 4). If WRITE is asserted but R WND is not, SLAVE SET PLS produces SET WRE
(Set Write Enable), which sets the WRITE ENABLE flip-flop (LAW 6).

5-64

The outputs of the motion control flip-flops produce FOR H, REV /REW H, and REWIND CAP H (LAW 3) signals that control the capstan servo and drive circuits. At the
same time, the WRITE ENABLE flip-flop (if set) generates WRITE ENABLE (1) L, which
shunts WRITE voltage to the write and erase heads, thereby energizing the heads. Figure 535, the Tape Motion Initiation Flowchart, complements this description.

TAPE
CONTROLLER

TE16

YES

SLAVE
SET
PULSE

SET FWD FF

SET REV FF

SET RWS FF

SET LOCAL FF

SET WRITE
ENABLE FF

PLACE TE16
OFF-LINE

ENERGIZE WRITE
& ERASE HEADS

ENABLE
MOTION - - - - - . . . ,
DELAY

GATE OUT
MOTION DELAY
PRESETS

GENERATE FOR,
REV/REW&
REWIND CAP

MOTION
DELAY
COUNTER
DRIVE CAPSTAN
SERVO

CP-3045

Figure 5-35

Tape Motion Initiation Flowchart

Once forward or reverse tape motion is initiated, it continues (unless a TE16 mechanical or
power failure is sensed) until the tape controller transmits a STOP signal to the transport.

5-65

If a rewind operation is being performed, STOP L is asserted as soon as SLAVE SET PLS is
negated. However, because the RWS flip-flop is already set, this does not produce an INIT
L pulse (LAW 6) and does not terminate motion. Once the RWS flip-flop is set, the TE16
performs the rewind operation independently, as previously described. The TE 16 notifies
the tape controller that it is performing a rewind by asserting RWS (SB) L on the slave bus.
When the rewind control sequence is over, motion terminates automatically and the controller is notified when the TE16 asserts SET SSC L (Status State Change) on the slave bus
(LAW 6).

The TE 16 terminates tape motion when an INIT L pulse (generated on LAW 6) clears the
motion control flip-flops (LAW 5). An INIT (SB) L signal also exists; it is different than
INIT. The INIT signal is an internal M8916 signal, generated by various conditions that
determine the need to halt or inhibit tape motion.
INIT (SB) L simply clears the SET SSC and SLA flip-flops. When the TE16 controller is
initialized, it halts tape motion by asserting STOP to the selected slave and uses INIT (SB) L
to clear the SSC and SLA flip-flops.

5.3.7 M8926 Interface Module Description
As stated in Paragraph 1.2.1, the TEI0W Tape Transport is based upon the TEI6. The TE16 becomes
a TEI0W master when an M8926 interface module replaces the three standard cable cards (M9001,
M9001-Y A, and M8913) in a TEI6. This is done in order to achieve an interface with a positive logic
tape controller.

5.3.7.1

General (Figures 5-36,5-37, and 5-38) - Figure 5-36 is a simplified flow diagram of the M8926
interface board. The CSET command from the controller triggers a drive start-up sequence. The startup sequence signals the drive to start the capstan motor and introduces a delay period for the capstan
motor to get up to speed (1.14 m or 45 in/s) before enabling a read or write sequence.

All commands from the controller, except rewind, cause a read sequence to occur. The read sequence
transfers data from the drive to the M8926 board. A write command (CWRE) must be asserted by the
controller to enable a write sequence. If a write command is asserted by the controller, data is transferred from the controller to the drive to be written on tape (write sequence). The data written on tape
is then read back via the read sequence. This read-after-write feature allows the recorded data to be
checked for errors by the M8926 board. The read-after-write data is made available to the controller
where it can be accessed by the processor for maintenance purposes. During normal operation, read
data is not accepted by the controller unless a read command is asserted.
When the read circuits detect the end of the record, a drive stop sequence is triggered. The stop
sequence signals the drive to stop the capstan motor and initiates another delay period. The delay
allows the capstan motor to slow down to a stop before the command operation is terminated.
The M8926 detailed flow diagram (Figure 5-37) provides a more detailed functional description of the
M 8926 interface board. This diagram should be read in its entirety while referencing the functional
block diagram, Figure 5-38. Subsequent paragraphs in this chapter treat the M8926 board according
to the functional divisions shown in Figures 5-36, 5-37, and 5-38, namely:
1.
2.
3.
4.
5.

Status/Command logic
Drive startup
Write sequence
Read sequence
Drive stop.

5-66

READ
SEQUENCE

TAPE DRIVE
SLOWDOWN
TO STOP

114780

Figure 5-36

M8926 Simplifier Flow Diagram

5-67

MOTION CONTROL lOGIC (DRIVE UP TO SPEED):
1. NEGATES STOP (SB) AND ASSERTS EMD (SB) AND SLAVE SET PlS (SB) TO DRIVE.
2. lOADS START-UP TIME FROM THE READ CHANNELS
(AND CWXG OR EWFMK IF ASSERTED)
INTO MOTION DELAY COUNTER.
3. AllOWS CLOCK (SB) TO CLOCK MOTION DELAY COUNTER.
4. WHEN COUNTER COUNTS OUT DELAY PERIOD, COUNTING STOPS AND:
A. ACCl (SB) NEGATES GATING WRT ClK (SB) FROM DRIVE TO M8926
B. READING ASSERTS ENABLING READ CHANNELS.

READ lOGIC:
1. TRANSFERS DATA CHARACTERS AND READ STROBES
FROM TAPE TRANSPORT TO CONTROLLER.
2. CHECKS FOR VERTICAL PARITY ERRORS.
3. DETECTS FilE MARK IF PRESENT.
4. DETECTS END OF RECORD.

NO
YES

END OF RECORD lOGIC:
1. GENERATES CRCS AND lRCS FOR CONTROllER.
2. CHECKS FOR CRC AND lRC ERRORS.
3. GENERATES READ STROBES (CRDS) FOR CRC AND lRC CHARACTERS.
4. INITIATES END OF RECORD DECISION DELAY.
5. ASSERTS RD ClR PlS AFTER DECISION DELAY TO INITIATE
DRIVE STOP SEQUENCE.

MOTION CONTROL lOGIC (DRIVE STOP)
1. ASSERTS EMD (SB) TO DRIVE.
2. NEGATES READING THUS INHIBITING READ CHANNELS.
3. lOADS STOPPING TIME INTO MOTION DELAY COUNTER
VIA READ CHANNELS.
4. AllOWS CLOCK (SB) TO CLOCK MOTION DELAY COUNTER.
5. WHEN COUNTER COUNTS OUT DELAY PERIOD, COUNTING STOPS AND:
A. ACCl (SB) ASSERTS INHIBITING WRT ClK (SB) FROM DRIVE TO M8926
B. MOVE NEGATES.

M8926 GENERAL RESET.
STOP (SB) ASSERTED TO DRIVE.

WRITE lOGIC:
1. TRANSFERS DATA CHARACTERS FROM
CONTROllER TO TAPE TRANSPORT.
2. GENERATES VERTICAL PARITY BIT FOR EACH
CHARACTER.
3. GENERATES CWRS PULSES FOR CONTROllER.
4. GENERATES REC (SB) PULSES FOR TAPE
TRANSPORT.
5. GENERATES CRC CHARACTER.
6. GENERATES FilE MARK CHARACTER IF WFMK
COMMAND ASSERTED.

WRITE END OF RECORD:
1. TRANSFERS CRC CHARACTER TO TAPE
TRANSPORT.
2. GENERATES REC (SB) PULSES FOR CRC AND lRC
CHARACTE RS.
3_ GENERATES lRC STRB (SB) FOR TAPE TRANSPORT.

11-4777

Figure 5-37

M8926 Detailed Flow Diagram

5-68

r.wRiTE

CWDQ-CWD7

CWDR

•

CWRS

)

WDoISB'·WD7ISB' : )

•

WRITE
CHANNELS

EWFMK

7TRK

I·

EPEVN

REC(SB)
WRT CLK(SB)

CWRE

PARITY
GENERATOR

ENDOF
RECORD
GENERATOR

LRC STRB(SB)

L -- ~

CPEVN

WDP(SB)

FILE MARK
GENERATOR

I I I·
\.

LOGiC - ,

EPEVN
DEN 0 (SB)

CDEN5

(
~
(.

CDENS

CRWD

COMMAND

CFWD

LOGIC

CREV

CWRE

CWFMK

<:/

CINIT

CWXG

DEN 1 (SB)

CSELO-CSEL2

SSO(SB)-SS2(SB)

CSET

SET

CONTROLLER

RWND(SB)
FWD(SB)

REV(SB)
WRITE(SB)

EWFMK

SLAVE SET PLS(SB)
STOP(SB)

EWFMK
SET
RD CLR PLS
READING

READ LOGIC

CRDS

CFMK

OUTPUT
GATE

CLRCS
RD CLR PLS
CCRCE
CLRCE

CEOT

•
1
I

ACCL(SB)

RDOISB)-RD5ISB). RDPISB)

J
RDO(SB)-RD7(SB). RDP(SB)

L_--,

CCRCS

CVPE

READ
CHANNELS

FILE MARK
DETECTOR
END OF
RECORD
DETeCTOR
ERROR
DETECTOR

TAPE
TRANSPORT

CLOCK(SB)

---- -l
r.
.
CRDO-CRD7, CRDPI

EMD(SB)

START/STOP
MOTION
CONTROL

RSDO(SB)

7 TRK

WRT CLK

EPEVN

I
I

EFOR

__ J

END PT(SB)

CWRL

WRL(SB)

CSDWN

SDWN(SB)

CSELR

TRANSPORT

MOL(SB)

CTUR

STATUS

TUR(SB)

CRWS

LOGIC

RWS(SB)
BOT(SB)

CBOT

7CH(SB)

C7CH
7TRK

11-4799

Figure 5-38

M8926 Block Diagram

5-69

It will be helpful to reference Figures 5-37 and 5-38 as an overview while reading through this section.

NOTE
The block diagrams that follow use logical AND and
OR symbols. It does not necessarily follow that a
corresponding gate exists on the controller logic
prints. The assertion of inputs A and B causing the
assertion of output C may be represented on a block
diagram by a single AND gate, yet the engineering
drawing may show that several circuit stages are involved in the ANDing operation.
The signal names used on the functional block diagrams are the names used on the engineering circuit
schematics (CS prints). Other signal names or notes
are enclosed in parentheses.
5.3.7.2 Command Logic - Certain operational commands are coupled from the controller to the drive
via combinational logic circuits. Other commands, which must stay asserted during the entire operation, are latched up in flip-flops set by CSET from the controller. Note the conversion of CDEN5 to
DENO (SB) and CDEN8 to DENI (SB) during the latch-up process.
CSELO-CSEL2 selects a slave unit via a 3-bit code. The 3-bit code is latched up in the slave select latchup flip-flops, which output SSO (SB)-SS2 (SB) to the drive (Figure 5-39). The input code from the
controller is compared to the output code in the slave select comparator. If the two codes do not
match, the latch-up flip-flops are clocked, forcing SSO (SB)-SS2 (SB) to agree with the select code from
the controller. An AND gate must be enabled by MOVE before clocking of the flip-flops can occur.
MOVE is asserted true during every command operation except rewind. Thus, a new slave drive
cannot be selected during a read, write, or spacing operation. Note that a bit reversal takes place in the
latch flip-flops where the CSELO, 1 and 2 input bits become bits SS2 (SB), 1 and 0 respectively in the
output.
Figure 5-40 shows four signal lines coupling fixed potentials to the host drive. These signals lines are
not used but the host drive requires that the lines be held at a fixed voltage level. Three of the lines
[DRV CLR PLS (SB), INIT PLS (SB), 1 RD, (SB)] are tied to +3 V and the fourth (SLAVE BUS
ENBL) is tied to ground.
5.3.7.3 Status Logic - Certain status signals are transmitted directly from the drive to the controller,
while others such as RWS (SB) and MOL (SB) undergo conditional gating. Rewind status, RWS (SB),
from the drive negates at the end of SDWN (SB) simultaneously with the assertion of TUR (SB)
(Figure 5-41). A timing requirement within the controller demands that CR WS negate before TUR
asserts. This requirement is met by ANDing R WS (SB) with SDWN DELAYED, thus producing the
proper CRWS timing as shown in Figure 5-41. SDWN is delayed approximately 100 ns, producing
SDWN DELAYED before being ANDed with RWS (SB). This is done to eliminate the possibility of a
spurious assertion of CRWS should SDWN (SB) negate while RWS is still true.
CSELR is negated for 1 fJ,S, while a new drive is being selected by the slave select logic. This is accomplished by the gating of MOL(SB) with the 0 output of the slave select one-shot. The 1 fJ,s delay allows
settling of the select code before CSELR is asserted for the new drive.
When a 7 -track drive is being used 7CH(SB) is asserted from the drive causing the assertion of C7CH
to the controller and R 7CH to the 7TRK flip-flop. When SET asserts, 7TRK becomes true to indicate
the presence of a 7-track, slave drive to the M8926 board. Note that the assertion of EDEN5 will also
cause 7TRK to become true at SET time. Compatibility among the TUI0, TUI0W, and TEI0W drives
requires that both EDEN5 and R 7CH cause the assertion of 7TRK at SET pulse time.
5-71

5.3.7.4 Drive Start Signals (Figures 5-42, 5-43, and 5-44) - The SET pulse starts the command operation in the drive by:
1.

Setting the EMD flip-flop and asserting EM D (SB) to the drive

Asserting SLAVE SET PLS (SB) to the drive

Setting the MOVE flip-flop thereby negating STOP (SB) to the drive.

MOVE remains asserted and holds STOP (SB) false during the entire command operation. During a
rewind operation the MOVE flip-flop is not set. In this case, SLAVE SET PLS negates STOP (SB) at
SET time. This negation of STOP is sufficient for the drive to start the rewind sequence.

5.3.7.5 Startup Delay - The output of the EMD flip-flop loads the motion delay counter with delay
data set onto read lines BRDO-RRD6, RRDP by the drive. Bit 13 of the counter is preset to a 1 and
gates in the clock pulses. The clock pulses are obtained from a divide-by-four counter that receives
CLOCK (SB) pulses from the slave bus. An output from the divide-by-four counter is obtained after
the first 2 CLOCK (SB) pulses and every 4 CLOCK (SB) pulses thereafter. When the delay counter has
been clocked through the delay period, bit 13 of the delay counter is counted down to 0 and bit 14 is
asserted. At this time:
1.

Input clock pulses to the delay counter are inhibited.

READING is asserted enabling the read sequence.

ACCL (SB) is negated to the drive thus gating WRT CLK (SB) pulses from the drive for the
write sequence.

If the command is CWX G or CWFMK, an extended interrecord gap is generated prior to writing the
record. CWXG or EWFMK, if asserted, input into the delay counter increases the delay time and
allows the tape to travel an extra distance before the read and write sequences are enabled. The delay
increase is from 8.99 to 95.00 ms for a 9-track drive and from 15.26 to 101.3 ms for a 7-track drive. The
CWXG and EWFMK inputs to the delay counter are via a gate enabled by ACCL. Thus, only the
startup time or gap prior to the record is extended.

5-72

YES

(FILE MARK
CHARACTER)
(READ FLOW)

WRITE(SBI

DENO(SB)

7 TRK
(WRITE AND
READ FLOWS)

(FIG 6-43)

CP-3046

Figure 5-39 Command Latch-Up
Flow Diagram

5-73

•

~
~
~
~

CBOT

CEOT

CWRL

CTUR

TO
CONTROLLER

BOT(SB)

END PT(SB)(

WRL(SB)

TUR(SB)

<
FROM
TAPE
DRIVE

CRWS
(SOWN DELA YEO)
DELAY
(2)

CSDWN

MOL(SB)

~C_S_EL_R________~~

...

R7CH

C7CH

(

FIGURES 5-47, )
5-49 AND 5-56

7TRK
7 TRK
FF
(4)

A. STATUS
CP-3047

Figure 5-40

Status/Command Block Diagram (Sheet 1 of 2)

5-75

DRV CLR PLS(SBI
+3V
INIT PLS(SBI
TO
HOST
DRIVE

IRD(SBI

SLAVE BUS ENBL

SLAVE
SELECT
LATCH UP
FF
(21

CSEL2-CSELO

•

SSO(SBI-SS2(SBI

(CLOCKI

(FIG 5-44)

SLAVE
SELECT
O.S.
(21

SLAVE
SELECT

COMPARATOR
B
(21

CREV

CRWD

FROM
CONTROLLER

(HOST DRIVEl

peLR

D>
D>
B

CINIT

REV (SBI

RWND(SBI

•

•
TO
TAPE
DRIVE

MASTER CLEAR • (GENERAL
)
DRIVE RESET

WRITE(SBI

, CWRE
/

COMMAND
LATCH UP
FFS
( 11

, CFWD
/

EFOR

FWD(SBI

(FIG 5-49)
EWFMK

,CWFMK

(FIG 5-44 AND 5-47)

'" CPEVN

EPEVN

,'\. CDEN 5

EDEN 5

(FIG 5-47 AND 5-49)

DENO(SBI

;/
B
DEN1(SBI

,'" CDEN 8
'" CSET
/

DEN2(SBI
SET

;/'

NOTE
Designations in parenthesis refer to engineering drawings
containing corresponding logic.

.J;

(CLOCKI

•

(FIGURES 5-44. 5-47. AND 5-49)

B.COMMAND
CP·3048

Figure 5-40

Status/Command Block Diagram (Sheet 2 of 2)

5-76

RWS(SBI

j.-10ms.......j
SDWN(SBI

(SOWN DELA YEDI

TUR(SB'

CRWS

---.j

~ ~100ns
11-4719

Figure 5-41

R WS and CR WS Timing Diagram

RECORD TRANSFER
14.---DRIVE START-UP---.~·I01111""'OR SPACING
-1...•••- - - - D R I V E STOP---.a-II
OPERATION

CSET

MOVE
EMD(SBI

--~

. .1 2 3456

CLOCK(SB)<-I

I I I I I t'l I I I I I I I

....I....II~I.........~...L..........._

i4--START UP DELAV---.j
1-28 ~~
I

CLOCK TO

COUNTER~

A CCL(SBI
READING

--------------

AEMD~
BIT 13

--.J

BIT 14 _ _ _ _ _ _ _ _ _ _ _ __

BIT 15

----------------

RD CLR PLS

------------11-4775

Figure 5-42

M8926 Timing Diagram

5-77

(FIG 5-39)

1 - EMD FF

INHIBITS MOTION
DELAY COUNTER

YES

1-BIT14
CLEARS CRC
AND LRC
GENERATORS

(FIG 5-48)

(FIG 5-46)

CP-3049

Figure 5-43

Drive Start-Up Flow Diagram

5-78

(FROM HOST DRIVE) - - - - I

"V~--------...}

SLAVE SET PLS{SB)

SET
(FIG 5-40) - - - - - - r - - - - - I

SET MOVE

STOP{SBI

{TO TAPE DRIVEl

MOVE
D

-=
ACC L
C

(FIGURES 5-44. 5-47. 5-49. AND 5-56)

MOVE
FF
(2)

FROM
CONTROLLER

(CLEAR)

EWFMK
(FIG 5-40) - - - - - \

(BIT 15)
- ......

CWXG

RRDO-RRD6.RRDP
(FIG 5-49)

16-BIT
MOTION
DELAY
COUNTER

READING

•

(FIG 5-49 AND 5-56)

(l)

(BIT 14)

ACCL{SBI

(TO
)
TAPE
DRIVE

COUNTER)
( CLOCK
FROM
)
( TAPE DRIVE

ClOCK{SB)

(CLEAR)

(BIT ll1

74
COUNTER

{ll

(RESET)

r -- - ....., EMD (LOAD)

(SET)

EM D
FF

AEMD
(

(l)

{FIG 5-47 )
AND 5-49)

(FIG 5-56)
NOTE:

~_EM_D_(S_B_)_ _~(TOTAPE)

Designations in parenthesis refer to engineering drawings
containing corresponding logic.

DRIVE
CP-3050

Figure 5-44 Start/Stop Control
Block Diagram

5-79

5.3.7.6
1.

Write Sequence (Figures 5-45, 5-46, and 5-47)
Nine-Track Normal; Write Data - If a write command is asserted by the controller, CWRE
is true, allowing the SET pulse to set the WRITING flip-flop. The assertion of WRITING
loads the end-of-record counter, which is preset to a count of 8. The 8-bit output from the
counter gates R WRT CLK pulses from the drive to produce WRITE STROBE pUlses. The
assertion of each WRITE STROBE pulse will:
a.

Latch-up write data from the controller making it available to the drive via the output
gates

Assert CWRS to the controller to extract the next character from memory

Assert REC (SB) to the drive and to the CRC generator.

Vertical parity is produced by a parity generator, which monitors the eight write lines and
outputs a true or false parity bit according to the number of 1 bits and whether odd or even
parity is specified (EPEVN).
The write logic contains a circuit to detect a zero-character condition when even parity is
specified. Such a condition results in a blank space on the tape that can not be sensed by the
read logic. Should an attempt be made to write a zero character with even parity, the zero
character detector output would assert WRX3, thereby generating a 1 bit on the third write
channel. A single bit character demands a 1 parity bit when EPEVN is true. The parity bit is
also artificially generated via the zero character detector output, which asserts WRXP to the
parity write channel.
The CRC generator receives each data character from the write channels. REC (SB) pulses
clock the generator which develops the CRC character during the body of the record.
2.

Nine-Track Normal; Write End-or-Record - When the data transfer has been completed,
CWDR and WRITING are negated, and REC and CWRS strobes are inhibited. The sequence is illustrated in the data transfer timing diagram (Figure 5-45). It can be seen in
Figure 5-47 that data characters are moved from memory to tape in two steps: first from
memory to the write data latch-up register and then from the register to the transport write
logic. The last four characters of a record are shown in the timing diagram (Figure 5-45).
CWRS 1, issued to the controller, extracts data character 2 from memory, which moves
through the controller and over to the M8926 write data latch-up register. The next write
clock pulse (R WRT CLK 2) generates WRITE STROBE 2, REC 2, and CWRS 2. WRITE
STROBE 2 latches up data character 2 in the register, making it available to the transport
write logic; REC 2 records data character 2 on tape, and CWRS 2 extracts data character 3
from memory. The next CWRS pulse (CWRS 3) extracts the last character (data character
4) from memory. R WRT CLK 4 generates WRITE STROBE 4 to latch-up the last character and REC 4 to record it on tape. CWRS 4 is issued to the controller which, having sensed
that the last character has been transferred, inhibits a data extraction from memory (no
NPR bus cycle) and negates CWDR. The negation of CWDR conditions the WRITING
flip-flop to reset. The trailing edge of an R WRT CLK 4 clocks the flip-flop reset, thus
negating WRITING. When WRITING negates:
a.

CWRS pulses to the controller are inhibited.

REC (SB) pulses to the drive are inhibited.

The end-of-record counter is enabled.

WRITE STROBE pulses clock the end-of-record counter. When the counter reaches a count
of 3, CHK CHAR STRB asserts and:
a.

Switches the CRC character onto the write lines via the write data/CRC mux

Enables the REC AND gate.

5-81

R WRT ClK
WRITE
STROBE

REC(SBI

CWRS
DATA
CHARACTER c....-t-.J....-------"""1
DATA
CHARACTER 2

DATA CHARACTER 3

DATA CHARACTER 4

-----~~~------~

CONTROllER SENSES '\

THIS IS lAST DATA
_

_
CHARA-----,CTER

CWDR

WRITING

NOTE:
Each R WRT ClK pulse generates WRITE STROBE which generates REC and CWRS. Arrows
shown only for R WRT ClK 1.
"·4776

Figure 5-45

Write Data Timing Diagram

5-82

(FIG 6-431
C

ALLOWS CLOCKING
OF END OF
RECORD COUNTER

RESETS WRITE
DATA LATCH
UP REGISTER

SWITCHES CRC
CHARACTER ONTO
WRITE DATA LINES

YES

1--.WDO(SB),1,2,3
(7-TRACK FILE
MARK)

l--.WDO(SB), 1, 4
(9-TRACK FILE
MARK)

WDO(SB)-WD7(SB) ,
WDP(SB)
(DATA CHARACTER)
CLOCKS END OF
RECORD COUNTER
TO ZERO THEREBY
INHIBITING ANY
YES

(FIG 5-551

CP-3051

Figure 5-46

Write Flow Diagram

5-83

7TRK
(FIG 5·401
{

EWFMK

WRITE DATA,)
( CRC OR l's

CWDO-CWD2, CWD4-CWD7

(~~~~ROLLER) {

3 r--t_ _ _ _ _ _ _ _---,
)-C_W_D_

ZERO
CHARACTER'~-T-~
t--+-i~ EVEN PARITY

DETECTOR

EPEVN

(FIG 5·401

~--i~

'----_......

...... (5)

>--~-t--+

REC (SB) (CLOCK)

CRC
GENERATOR

WCRO-WCR7,
WCRP

WRITE
DATAl
CRC

......1....-.......1......

(CLOCK)

....---------eot LAT CH UP
(RESET)

WD7{SB)-)
WDO{SB),
WDP{SB)

(TO TAPE

(NOTE 2)

TRANSPORT

,-----4.. (5)

MUX
{51

(5)

(SWITCH)
AEMD (RESET)
(FIG 5·44)
WRXP

PARITY
GENERATOR

{51

\~~NTROLLER ~~~--------------------------------------------------------------------,

)

CWRS

(FIG 5·401
CWRE
FROM
)
( CONTROLLER {

r - - -........- - - - .

WRITING
FF
(

R WRT CLK

FROM
)
TAPE
TRANSPORT

EWFMK
(FIG 5·401 - - - - i

~~W_R_IT_I_N_G_~------~

)-C_W_D_R_ _ _ _ _ _ _ _ _ _ _-e1D

(1 )

>----------,.--4" C
(FIG 5·49 AND 5·56)

(SBIT)

7TRK {PRESETS 4 BITI
(FIG 5·40) - - - - - - - - -. .
WRITING (LOADS COUNTER)

REC{SBI
END

t---------------------....... OF

LRC

STRB(SB)

}

(

~~;:::ORT

)

RECORD
......
W_R_IT_E_S_T_R_O_B_E_{C_L_O_C_K_I____....... COUNT E R
(1)

MOVE (ENABLES COUNTER)

(FIG 5 · 4 4 ) - - - - - - - - -...

.,.{_2_B_I_T)_ _-+-_ _ _ _ _-t
(1 BIT)

LRC STROBE

NOTES:
1. Designations in parenthesis refer to engineering drawings
containing corresponding logic.
2. Note reversal of write data sequence with respect to
input from controller.
CP·3052

Figure 5-47

Write Block Diagram

5-85

)

The next WRITE STROBE pulse latches up the CRC character and generates a REC (SB)
pulse for the drive to record the CRC character. Three WRITE STROBES later, the counter
is at a count of 7 and again asserts CHK CHAR STRB, which:
a.

Enables the REC AND gate

Asserts LRC STROBE via the enabled L RC STROBE AND gate.

LRC STROBE asserts LRC STRB (SB) to the drive and resets the write data latch up
register, setting all the write lines to zero. (The LRC character is generated in the drive.) The
next WRITE STROBE asserts REC (SB) to record the LRC character and resets the end-ofrecord counter, thereby inhibiting any further WRITE STROBE pulses.
Summarizing, the 9-track end-of-record sequence is:
a.
b.
c.
d.
e.
f.
3.

Seven-Track Normal - Seven-track normal operation is identical to 9-track normal except
for the write end-of-record sequence. In 7-track operation, both the 4 and the 8 bits of the
end-of-record counter are preset to a 1. Thus, when the counter reaches a count of 3, the
same conditions exist as a count of 7 in 9-track operation. The 7-track end-of-record sequence is:
a.
b.
c.
d.

Last data character
Three blanks
CRC character
Three blanks
LRC character
Reset end-of-record counter.

The last data character
Three blank spaces
The CRC character
Reset end-of-record counter to terminate the write sequence.

Nine-Track File Mark; Write Data - In file mark operation, EWFMK is true and forces the
write data/CRC mux to output all Is into the write data latch-up register. After the Is are
clocked into the register, they are applied to the output gates. With EWFMK true and
7TRK false, all the output gates are inhibited except 0, 1, and 4, thus outputting an octal 23
(9-track file mark) to the drive.
CWRE is true and CWD R is false for a CWFMK command. CWRE allows the SET pulse
to set the WRITING flip-flop. The first WRT CLK (SB) pulse asserts WRITE STROBE
and then REC(SB), because CWDR is false, also resets the WRITING flip-flop. Thus, one
WRITE STROBE and one REC pulse is issued for the file mark character.
No CWRS pulses are returned to the controller in file mark operation.

5-87

Write End-of-Record - The write end-of-record sequence for a 9-track file mark is identical
to the write end-of-record sequence for 9-track normal, except that the CRC character is
shipped and only the LRC character is written. The end-of-record counter must reach a
count of 7 before a CHK CHR STRB is asserted. At this point, the same conditions exist as
in the 9-track normal mode; thus, the LRC character is recorded and the write sequence is
terminated. The 9-track file mark end-of-record sequence is:
a.
b.
c.
d.

The last data character (the file mark character)
Seven blank spaces
The LRC character
Reset end-of-record counter to terminate the write sequence

Seven-Track File Mark - The write data sequence for the 7-track file mark is identical to that
for the 9-track file mark except that 7TRK is asserted to the output gates via the enabled
EWFMK gate. Output gates now enabled are 0, 1,2, and 3, thus outputting an octal 17 (7track file mark) to the drive.
The end-of-record sequence for the 7-track file mark is identical to that for a 7-track normal
sequence.

5.3.7.7
1.

Read Sequence (Figures 5-48 and 5-49)
Read Data - RSDO (SB) pulses from the drive assert COMP RD STRB, which:
a.

Clocks the read data latch-up register

Triggers the read strobe one-shot, asserting CRDS to the controller

Uses a second output from the read strobe one-shot (CHECK REG PLS) to clock the
CRC generator and the LRC generator (and the LRCS flip-flop in the end-of-record
detection sequence).

When the read data latch-up register is clocked by COMP RD STRB, read data is made
available to the controller via the read data output mux. (Note the order reversal of the read
data in the latch-up register.) When READING is true, the multiplexer selects the data
character from the read lines for the controller. When READING is false (i.e., after a data
transfer operation), the resultant LRC register is output to the controller for maintenance
purposes.

5-88

(FIG 5·43)

YES

ENABLES FILE
MARK GAP
DETECTOR

CLOCKS LRC
GENERATOR

LRC7-LRCO.
LRCP ONTO
READ OUTPUT
LINES

CRD7--CRDO.
CROP DATA
CHARACTER

CRD7-CRDO.
CROP (LRC
GENERATOR
OUTPUT; FOR
MAINTENANCE
USE)
FMK

(FIG 5·55)
CP·3053

Figure 5-48

Read Flow Diagram

5-89

'11~ }

CVPE

(FIG 5·561
(FIG 5.401

DETECTOR

a-G=

RCS

CCRCE

CLRCE

(FIG 6-66)

,.------,

~(FIG5-401

CRC
ERROR
DETECTOR

..._C_R_7_-C_R_O_,_C_R_P_-I

-----...
LRC
ERROR
DETECTOR

(7)

LRCS

CRC
GENERATOR

(7)

(CLOCK)

CHECK REG PLS

tJ--(R_E_S_E_T_)_ _-.:....:A.=.EM~D (FIG 5-441

LR7-LRO, LRP

(CLOCK)

CHECK REG PLS

LRC
GENERATOR

m
TO
CONTROLLER

EPEVN

VERTICAL

m ......__________________----IPARITY ERROF

CHECK
REG PLS
(FIG 6.56) __..L..----~

(6)

READ
STROBE

(FIG 5-561

I--

0_5_

CRDS

(4)

RDO(SB)·RD7(SB), RDP(SB)_)

(FIG 6·561 +-CRD7-CRDO, CROP

READ
DATA
OUTPUT
MUX

LRC7-LRCO, LRCP
ERD7-ERDO, ERDP
(SWITCH)

READING

(6)

~
(FILE MARK
CHARACTER)

CFMK

(NOTE 2)

FILE MARK
CHARACTER
FF

(4)

(CLOCK)

~
(4)

""'"

MRDO-MRD7, MRDP
(3)

14-

~F_M_K_C_H_R~ CHARACTER
DETECTOR

RSDOISBI_J BUS

~3)

(4)

(FIG 5·561 [ . -_ _ _ _ _ _ _
FILE MARK

/
RRSDO /,~,

COMP RD STRB ~
(ARTIFICIAL
READ STROBEl

ROM
) SLAVE

~---~-R-R-D-O-.R-R-D-7-,-R-R-D-P-------J

(6)

(FIG 5-441

(FIG 6·40)

READ DATA
LATCH UP

r:r

(FIG 5·40)
(RESET)

r-:l'-~
FMK

(8 BLANK SPACES)

FROM
HOST
TRANSPORT

(ENABLE)
(RSDO = 2) - - - - - . . . (CLOCK)
FILE MARK ~-(C-L-E-A-R-)--------4---------------(-RS-D-O-->---2~) READSTROBE~--------------~
GAP
DETECTOR

~--------------------~------------------~------~COUNTER

(CLOCK)

(4)

(RESET)

(4)

l-G

MOL

~J--_ _R_S_DO-,

7TRK

(7)

MOVE

(FIG 5-441

RWRTCLK
(FIG 6·471

(4)

-./..,

~~
NOTES:

,. Designations in parenthesis refer to engineering drawings
containing corresponding logic_

(FIG 5·561 [.....JORO ACTIVE

(4)

2. Note order reversal of read data in latch up register_
CP-3054

Figure 5-49

Read Block Diagram

5-91

Error Detection (Figures 5-48 and 5-49) - Read data ERD7-ERD6, ERDP is checked for
CRC, LRC, and vertical parity errors. Each data character is clocked into the CRC and
LRC generators by the CHECK REG PLS. At the end of the record, the CRC character is
compared with the contents of the CRC generator, causing the CR 7-CR6, CRP output to be
all zeros. The CRC error detector looks for an all-zeros output, resulting from the comparison. If the CRC generator output is not all zeros when CRCS is true, CCRCE is asserted
to the controller, indicating a CRC error. In a similar manner, the LRC character is compared with the contents of the LRC generator, causing the LR 7-LRO, LRP output to be all
zeros. The LRC error detector looks for an all-zeros output, resulting from the comparison.
If the LRC generator output is not all zeros when LRCS is true, CLRCE is asserted to the
controller, indicating an LRC error.
CRC and LRC error outputs are enabled only when the drive is executing a forward motion
command. (This is due to the location of the CRC and LRC characters at the end of the
record.)
Accordingly, EFOR must be true for CCRCE or CLRCE to assert.
Each data character occurring during the body of a record is checked for vertical parity
error by a vertical parity error detector circuit. If a parity error is sensed by the detector,
CVPT is asserted to the controller. CVPE is inhibited during CRCS and LRCS times, as the
parity of these characters may be either odd or even, depending on the data contained in the
record.

File Mark Detection (Figures 5-48 and 5-49) - The file mark detection logic monitors the
read data and outputs CFMK to the controller if a file mark is detected. Three conditions
must be met before the record is identified as a file mark. These are:
a.

There must be two characters in the record

Both characters must be file mark characters

The second file mark character must be followed by at least eight blank spaces.

To meet condition b, read data (ERD7-ERDO, ERDP) is examined by the file mark character detector, which outputs FMK CHR if a file mark character is sensed. A file mark character flip-flop is set by the SET pulse at the start of the operation and then clocked by RRSDO
pulses. The flip-flop is conditioned to set by FMK CHR via an AND gate, such that if the
flip-flop is clocked to the reset state, it cannot be set again during the current operation.
Thus, the first two characters read must be file mark characters in order to keep the file
mark character flip-flop set.
Conditions a and c are met by means of a file mark gap detector and a read strobe counter.
When the read strobe counter reaches a count of two, the file mark gap detector is enabled
and starts counting R WRT CLK pulses. When the strobe counter reaches a count of three,
RSDO> 2 asserts and resets the gap detector. If the gap detector reaches a count of eight, it
outputs 8 BLANK SPACES and CFMK is asserted to the controller via an enabled AND
gate. If a third RSDO pulse occurs before the gap detector reaches eight, the detector is
cleared and the file mark character flip-flop is reset, indicating-that the record is not a file
mark and a normal record transfer is in progress.
The end-of-record detection sequence is enabled from the read data channels via a record
active OR gate. If a normal record transfer is in progress (RSDO> 2 is true) or a file mark
has been detected (FMK true), RECORD ACTIVE is asserted and enables (but does not
start) the end-of-record detection sequence.

5-93

Nine-Track Normal; End-of-Record Detection (Figures 5-55, 5-56 and 5-50) - The end of a
record is detected by looking for the three blank spaces that occur between the last data
character and the CRC character (LRC character for 7-track). The blank spaces are detected
by an end of record counter that is clocked by R WRT CLK pulses and effectively reset by
COMP RD STRB pulses. (Actually the COMP RD STRB pulses load the counter with a
count of 8.) COMP RD STRB pulses are asserted by RRSDO pulses from the drive. The R
WRT CLK pulses and the RRSDO pulses are not necessarily in sync, but they are of the
same frequency. Hence, the end-of-record counter is continually being clocked and "reset"
during the body of a record. Two R WRT CLK pulses might squeeze between two RRSDO
pulses, thereby clocking the counter to a count of two before it is reset, but it should never
reach a count higher than two during the body of a record. If the counter does reach a count
of three (three R WRT CLK pulses with no RRSDO pulse), 3 COUNT is asserted, signifying that this is the end of the record and the end-of-record sequence is started.

CRC CHARACTER STROBE
RRSDO
LOADS 0 INTO
DECISION DELAY
COUNTER

COMP RD
STRB
CRCS _ _ _ _ _ _ _ _....I

LRCS _ _ _ _ _ _ _ _ _ _ _- - J

(END OF'

\RECORD)----------------------~
PLS
RDCLR _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _~

" -4787

Figure 5-50

End-of-Record Timing, Nonzero CRC and LRC

The assertion of a 3 COUNT clocks the CRCS flip-flop set, outputting CCRCS to the
controller and indicating that the next character will be the CRC character. The next
RRSDO pulse will be the CRC character strobe, which will:
a.

Latch-up the CRC character in the read data latch-up register

"Reset" the end-of-record counter

Assert CRDS to the controller

Assert CHECK REG PLS, which clocks the LRCS flip-flop to the asserted state.

5-94

The asserted output of the LRCS flip-flop will reset the CRCS flip-flop and assert CLRCS
to the controller, indicating that the next character will be the LRC character. The next
RRSDO will be the LRC character strobe, which will:
a.

Latch-up the LRC character in the read data latch-up register

"Reset" the end-of-record counter

Assert CRDS to the controller

Assert CHECK REG PLS, which resets the LRCS flip-flop.

The negation of LRCS sets the end-of-record flip-flop, asserting END OF RECORD, which
locks the CRCS flip-flop in the reset state until the next operation.
When END OF RECORD asserts, a decision delay period begins. The decision delay period
is a time interval (normally eight R WRT CLK pulses long) between the assertion of END
OF RECORD and the assertion of RD CLR PLS. The delay period is a "last chance" look
for more RRSDO pulses before triggering the drive stop sequence. At the start of the decision delay, the end-of-record counter is "reset" (preset to a count of eight) and starts counting R WRT CLK pulses. When the counter reaches a count of eight, it overflows into the
decision delay counter, which then asserts RD CLR PLS to the drive stop logic. Should
RRSDO pulses reoccur any time during the decision delay period, the end-of-record counter
will be "reset," and the read sequence will continue. When the actual end-of-record does
occur, the decision delay count will start again but the end-of-record sequence will not
repeat.
The end-of-record sequence is inhibited if a write operation is in progress (WRITING true).
During a write operation, defective spots in the tape may simulate a gap and erroneously
trigger the end-of-record sequence. In this case the end-of-record logic is functioning to stop
the drive while the controller is still trying to write data. To prevent this, -WRITING is
gated with the R WRT CLK pulses into the end-of-record counter, thereby allowing the
counter to operate only if WRITING is false.
5.

Zero CRC or LRC Characters - The possibility exists that the CRC or the LRC character
could be a zero character, resulting in no corresponding RRSDO pulse being received from
the drive. In this case, a COMP RD STRB pulse is generated artificially so clocking of the
end-of-record sequence can continue. If no RRSDO pulse is received to "reset" the end-ofrecord counter, counting will continue up to six, at which time COMP RD STRB will be
asserted via a gate enabled by CRCS or LRCS. Figures 5-51 and 5-52 illustrate, respectively,
the timing sequence for a zero CRC and a zero LRC character.
The decision delay is normally eight R WR T CLK pulses long but is extended to 24 pulses if
no LRC character is detected. Failure to detect an LRC character may be because the
character is zero, but it could also be due to a bad area in the tape. Thus, when no LRC
character is detected, some doubt exists whether the end of the record has been reached.
Extending the decision distance to 24 pulses provides extra assurance that the end of the
record has been reached. The decision delay counter is a down counter, which is loaded by
each RRSDO pUlse. The counter is loaded with zeros except for the 1 bit that is loaded with
LRCS. If there is an LRC character, then LRCS is true during the last RRSDO pulse
(Figure 5-50) and the counter is loaded with all zeros. If there is no LRC character, then
LRCS is false during the last RRSDO pulse (Figure 5-52) and the delay counter is loaded
with a 1. In this case, the end of record counter must count an additional 16 pulses to count
down the 1 and assert RD CLR PLS.

5-95

COMP

CRCS _ _ _ _ _ _ _ _~

lRCS

(

---------------------~

END OF)
RECORD

-------------------------------.::.1

RDClR
PlS

s
114788

Figure 5-51

End-of-Record Timing, Zero CRC

RRSDO
RESETS END OF RECORD COUNTER
COMP
RD STRB
CRCS _ _ _ _ _ _ _ _ _ _ _ _ _

( END~:C~

(

_______________________________________________

RECORD)
RDCLR
PLS

~c:---------------

--------------------------------------------------------------~S
11-4789

Figure 5-52

End-of-Record Timing, Zero LRC

Seven-Track and File Mark (Figures 5-53 and 5-54) - In 7-track or file mark operation, the
end-of-record sequence is modified to eliminate the CRC character from the sequence. With
either FMK or 7TRK true, the three count output from the end-of-record counter directly
sets the LRCS flip-flop, which in turn holds the CRCS flip-flop reset. When in file mark
operation, the decision delay is 8 R WRT CLK pulses.

5-96

RRSDO

COMP
RD STRB

lRCS

(END OF
RECORD)______________________________________________________

RD ClR
PlS
11·4785

Figure 5-53

End-of-Record Timing, 7-Track

R WRT ClK
RRSDO

ACTIVE-----------------------------------------------------~

END OF
RECORD-------------------------------------------------------------------------~

RDClRPlS ___________________________________________________________________________________

11-4786

Figure 5-54

File Mark Timing

5-97

5.3.7.8 Drive Stop (Figures 5-43, 5-44 and 5-57) - RD ClR PlS triggers the drive stop sequence by
setting the EM D flip-flop and asserting EM D (SB) to the drive. The output of the EM D flip-flop also
loads the motion delay counter with the data set onto read lines RRDO-RRD6, RRDP by the drive.
Bit 13 of the counter is preset to a 1. The bit 14 output, which has been a 1 all during the record
transfer, is connected to the data input of bits 14 and 15. Thus, when EMD loads the counter, output
bits 13, 14, and 15 become 1s. READING negates due to exclusive ORing of output bits 14 and 15
while bit 13 gates clock pulses into the counter from the divide-by-four counter. The divide-by-four
counter receives CLOCK (SB) pulses from the slave bus. An output from the divide-by-four counter is
obtained after the first two CLOCK pulses and every four CLOCK pulses thereafter. After the delay
period the motion delay counter is clocked reset and:
1.

I nput clock pulses to the delay counter are inhibited (bit 13 = 0).

ACCD (SB) is asserted to the drive (bit 14 = 0) and inhibits WRT ClK pulses from the
drive to the write logic.

The assertion of ACCl resets the MOVE flip-flop, which negates MOVE and asserts STOP(SB) to the
drive, thereby terminating the command operation.

5.3.8 M8927 Interface Module Description
As stated in Paragraph 1.2.1, the TElON Tape Transport is based upon the TEI6. The TE16 becomes a
TEI0N when an M8927 interface module replaces the three standard cable cards (M9001, M9001-YA,
and M8913) in a TE16. This is done to achieve an interface with a negative logic tape controller or
when adding additional tape drives to a system using a negative logic tape drive bus.
5.3.8.1 General - Figure 5-58 is a block diagram of the M8927 interface module. The signals on the
negative-voltage slave bus are described in Table 5-6. The signals on the positive-voltage TU lOW slave
bus are described in Table 5-7. The M8927 interface logic primarily converts slave bus signals from one
logic polarity to the other. The signals are grouped in four categories: multiplexed, control/status,
write data, and read data; and are discussed accordingly in this chapter. In the functional block diagrams in this section, the signal connectors shown interfacing with the positive slave bus also show a
lettered connector orientated toward the lower edge of the illustration. These refer to the six module
connectors that plug into the TU ION logic assembly and carry the positive slave bus to the "host"
TUION.
5.3.8.2 Multiplexed Interface (Figure 5-59) - BSET from the negative slave bus is converted to positive logic by Q25 and triggers a slave set one-shot that outputs SLAVE SET PLS(SB) to the positive
bus. The Q25 output also clocks command data into command latch-up flip-flops. The command data
is coupled from the negative slave bus via negative-to-positive converts Q17 through Q20. The command data must be latched up for the positive slave bus, as it is present on the negative slave bus only
while BSET is true. [The reverse (BREV) command is also latched up by the SET pUlse. BREV is not
multiplexed with status information and therefore appears in Figure 5-61, the Control/Status Interface
Block Diagram.] The forward (FOR) and rewind (REW) commands are output to the TElOW bus as
FWD(SB) and R WND(SB). The off-line (OFF) and write enable (WRE) commands are ORed together and output to the TU lOW bus as WRITE(SB). An off-line command asserts WRITE(SB)
because an off-line operation is indicated on the TEI0W slave bus by the simultaneous assertion of
WRITE(SB) and R WND(SB).
When BSET negates and if a transport on the positive slave bus has been selected (MOL is true), four
status gates are enabled that couple RWS(SB), WRL(SB), END PT(SB), and BOT(SB) to the negative
slave bus via positive-to-negative converters Q46 through Q43.

5-98

(FIGURES 5-46 and 5-481
B

LRCS

YES

(FIG. 5-571

c
CP-3055

Figure 5-55

End-of-Record Flow Diagram

5-99

(FIG 5-44) .....:..:R.=D..::C:.:L:..:.R.:....:...:PL=S=--_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _---,

(FIG 5-49)

(ARTIFICIAL
READ STROBE)

TO
CONTROLLER

LRCS

DECISION
DELAY

RRSDO

(LOAD)

~--------------------- (FIG 5-49
COUNTER ~-(-E-NA-B-L-E)------------_,
(4)

(CLOCK)
(RESET)

END OF
RECORD
FF
(4)

(B COUNT)

(6 COUNT)

+V
(3 COUNT)

(ENABLE)
END OF
RECORD
COUNTER
(4)

RECORD ACTIVE (FIG 5-49)
WRITING}

(CLOCK)

R WRT CLK

(FIG 5-47)

LRCS
READING

LRCS
(RESET)

. . . . - - - (FIG 5-49)

(FIG 5-44)

COMP RD STRB (FIG 5-49)

(FIG 5-40)
LRCS
FF

(SET)

(4)

C
MOVE

(FIG 5-44)

D
CRCS

~------ (FIG 5-49)

CRCS
FF

(4)

C ...- - - -......

(RESET)

NOTE:
Designations in parenthesis refer to
engineering drawings containing
corresponding logic.

CP-3056

Figure 5-56

End-of-Record Block Diagram

5-101

(FIG 5-55)

INCREMENT
MOTION DELAY
COUNTER

INHIBITS
MOTION DELAY
COUNTER

CP-30S7

Figure 5-57

Drive Stop Flow Diagram

5-103

BWDQJ-BWD7. BWDP

WD7(SB)-WDQJ(SB).WDP(SB)

BREC

REC(SB)

WRITE DATA
INTERFACE

BLRCC

LRC STRB(SB)

(3)

BSTOP

STOP(SB)

BREV

REV(SB)

BEMD

EMD(SB)

BALFA

ACCL(SB)

BSEL~-BSEL2

CONTROL/
STATUS
INTERFACE

BDEN5. BDENS

SS2(SB)-SS"(SB)
DEN!'6(SB)-DEN2(SB)
7CH(SB)

B7CH
(2)
BSDWN

SDWN(SB)

BTUR

TUR(SB)

BCSf'6f'6

CLOCK(SB)

BC556
NEGATIVE
SLAVE BUS

POSITIVE
SLAVE BUS
SLAVE SET PLS(SB)

BSET

BRWS/WRE

RWS(SB)

BWRl/OFF

WRLiSB)
END PT(SB)

BEOT/REW
BBOT/FOR

BOT(SB)

MULTIPLEXED
INTERFACE
(1 )

WRITE(SB)
RWND(SB)

•

FWD(SB)

RD7(SB)-RD!'6(SB). RDP(SB)

BRDf'6-BRD7. BRDP
BSKEW

RSDO(SB)
READ DATA
INTERFACE
(4.5)

MOL(SB)

NOTE:
Designations in parenthesis refer to engineering drawing number containing corresponding logic.
CP-3058

Figure 5-58

M8927 Block Diagram

5-104

Table 5-6

Negative Slave Bus Signals

Bus Signal

Function

BSELO-BSEL2

A 3-bit code that selects one of eight possible drives for command
execution.·

BREV

Commands a reverse motion operation.·

BRWS/WRE

A multiplexed line that carries a write enable command· when
BSET is true and rewind status·· when BSET is false.

BWRL/OFF

A multiplexed line that carries an off-line command· when BSET
is true and write lock status·· when BSET is false.

BEOT/REW

A multiplexed line that carries a rewind command· when BSET is
true and an end-of-tape indication·· when BSET is false.

BBOT/FOR

A multiplexed line that carries a forward motion· command when
BSET is true and a beginning-of-tape·· indication when BSET is
false.

BDEN5, BDEN8

A 2-bit code· that indicates the recording density on the tape (200
bit/in, 556 bit/in, 800 bit/in) for a write operation (BC556).

BSET

A pulse· that initiates the response of the selected drive to the
input commands.

BEMD

A pulse· asserted at BSET time that places a motion delay code
onto bus read lines BRDI-BRD7, BRDP. The controller will not
allow a data transfer to start until the delay period specified by the
code has expired and the tape has come up to speed.

BALFA

Negates when the motion delay period is over and a data transfer
can start.·

BWDO-BWD7, BWDP

Nine bus lines carrying the data character to be written on tape.
The data character consists of 8 data bits and 1 parity bit.·

BREC

The recording pulse for the tape drive. There is one BREC pulse
for each data character to be written.·

BLRCC

Asserted after the body of a record has been written. It indicates
the LRC character can now be written.·

BRCO-BRD7, BRDP

Nine bus lines carrying the data character read from tape. The
data character consists of 8 data bits and 1 parity bit. During the
BEMD pulse, the read data lines carry the motion delay code.··

BSKEW

A read strobe pulse generated for each data character read from
tape.··

* = generated by controller
** = generated by selected slave
5-105

Table 5-6

Negative Slave Bus Signals (Cont)

Bus Signal

Function

BC800

A 36 kHz clock present when MOL(SB) is true. Used to clock
write strobes (BREC) when a DEN code of 800 bits/in is selected.
Controller divides BC800 by four when 200 bits/in is selected. **

BC556

A 25.02 kHz clock present when MOL(SB) is true and a 556
bits/in DEN code is asserted. Used to clock write strobes
(BREC).**

B7CH

Asserted by the selected drive if it is a 7-track transport. **

BSDWN

Asserted while the capstan motor is decelerating. Negates when
the motor is stopped. **

BTUR

Asserted when the capstan motor has stopped and the drive is
ready to accept a new command. **

BSTOP

Command signal, asserted by controller, which causes the capstan
motor to stop. BSTOP is negated when SET pulse is asserted to
initiate a tape motion operation.

* = generated by controller
** = generated by selected slave
Table 5-7

Positive Slave Bus Signals

Slave Bus Signal

Function

Slave Select
[SS(0:2)(SB)]

These lines select a tape transport on the positive slave bus
for command execution.

Forward [FWD(SB)]
Reverse [REV(SB)]
Rewind [RWND(SB)]
Write Enable [WRITE(SB)]

These are the four command lines that determine mode of
operation of the selected transport.

Slave Set Pulse
[SLA VE SET PLS(SB)]

This signal initiates response of the selected drive to the four
command lines.

Stop [STOP(SB)]

This signal causes the drive to terminate mot!on. (Does not
apply to rewind, which terminates independently.)

Enable Motion Delay
[EMD(SB)]

Asserted to the drive at set pulse time.

5-106

Table 5-7

Positive Slave Bus Signals (Cont)

Slave Bus Signal

Function

Accelerate [ACCL(SB)]

Asserted by the controller while the transport is getting up to
speed or not moving tape.

Write Data
[WD(0:7,P)(SB)]

These nine lines transmit data to be written by the drive.

Record [REC(SB)]

A pulse that causes data to be written on tape.

Density Select
[DEN(O: 1)(SB)]

These two lines control the density at which data is written on
tape. They also represent the density of tape data during a
read operation.

Clock [CLOCK(SB)]

A l44-kHz clock, generated in the selected TU10N or
TU10W; present at all times when the unit is on-line.

Write Clock
[WRT CLK(SB)]

Not used.

LRC Strobe
[SRC STRB(SB)]

Asserted by the interface logic prior to the REC pulse that
writes the LRC character.

Read Data
[RD(0:7,P(SB)]

These nine lines transmit read data from the selected TUI ON
or TU lOW to the M8927 module.

Read Strobe Delay Over
[RSDO(SB)]

A read strobe pulse generated by the transport at the end of
the skew delay.

Beginning of Tape
[BOT(SB)]

Asserted when the drive detects the beginning-of-tape
marker.

End of Tape
[END PT(SB)]

Asserted when the drive detects the end-of-tape marker.

Rewind Status
[RWS(SB)]

Asserted while the selected drive is performing a rewind operation.

7-Channel [7CH(SB)]

Asserted when the selected drive is a 7-track transport.

Medium On-Line
[MOL(SB)]

Asserted by a selected, powered drive that is loaded with
tape.

Tape Unit Ready
[TUR(SB)]

Asserted by a selected drive to indicate that tape motion has
stopped.

Settle Down [SDWN(SB)]

Asserted while the transport is decelerating.

Write Lock [WRL(SB)]

Asserted when the selected drive detects that the write-enable
ring has been removed from the tape reel.

5-107

-TO +
LEVEL
CONVERTER
025
(1 )

BSET

....

SLAVE
SET
ONE-SHOT
(1 )

(SET)

+TOLEVEL
CONVERTER
046
(1 )

BRWS/WRE

NEGATIVE
SLAVE
BUS

SLAVE SET PLS(SB)

(FIG 5-61)
A

(SOWN DELAYED)

RC
DELAY
(1 )

(SOWN)

r-C -

RWS

(1 )

+TOLEVEL
CONVERTER
044
(1 )

~ (FIG 5-64)

I-III

I-

!1I

~f--- !FlG6-61!

+TOLEVEL
CONVERTER
045
(1 )

BEOT/REW

A
(SET)

/ . SOWN

(FIG 5-61)

BWRL/OFF

RWS(SB)

t-WRL(SB)

~
END PT(SB)

,l
C

-TO+
LEVEL
CONVERTER
017
(1 )

(1 )

COMMAND
LATCH UP
FFs
(1 )

FOR

(FIG 5-64)

I.>--

FWD(SB)

RWND(SB)

(SET)

,
C

WRITE(SB)

NOTE:
Designation in parenthesis refer to engineering
drawing number containing corresponding logic.

POSITIVE
SLAVE
BUS

BOT(SB)

-TO +
LEVEL
CONVERTER
019
(1 )

"
......

-- I--

-TO+
LEVEL
CONVERTER
018
(1 )

-TO +
LEVEL
CONVERTER
020
(1 )

......

f-(1 )

+ TOLEVEL
CONVERTER
043
(1 )

BBOT/FOR

"....

,}~
WRE

+3V

INIT PLS(SB)

A
ORV CLR PLS(SB)
(FIG 5·64)

+
B

IRO(SB)

E
CP-3059

Figure 5-59 Multiplexed Interface
Block Diagram
5-109

The rewind status signal [R WS(SB)] passes through a second gate prior to its conversion to negative
logic. The purpose of the second gate is to cause BRWS to negate before R WS(SB). RWS(SB) from the
TEION or TEIOW drive negates at the end ofSDWN(SB) simultaneous with the assertion ofTUR(SB)
(see Figure 5-60).

RWS(SB)
I

~14--10ms-~"1
SOWN(SB)

TUR(SB)
I

--i

I+- ~ 1OOns

--------------------'1

(SOWN DELAYED)

•

~I------

I
BRWS

CP·3061

Figure 5-60

RWS(SB) and BRWS Timing Diagram

A timing requirement within the controller demands that BRWS negate before BTUR asserts. This
requirement is met by ANDing RWS(SB) with -SDWN DELAYED, thus producing the proper
BRWS timing as shown in Figure 5-60. -SDWN is delayed approximately 100 ns and becomes
-SDWN DELAYED before being ANDed with RWS(SB). This is done to eliminate the possibility of
a spurious assertion (i.e., race condition of BRWS) should SDWN(SB) negate while RWS is still true.
The drives on the positive slave bus require that unused bus lines INIT PLS(SB), DRV CLR PLS(SB),
and IRD(SB) be held high; thus the application of +3 V to these three lines on the M8927 module.
5.3.S.3 Control/Status Interface (Figure 5-61) - Control signals BDEN5, BDEN8, BSTOP, BREV,
BSELO-BSEL2, BEMD and BALFA are converted from negative to positive logic for the TEIOW
slave bus. Note the order reversal of the BSEL input lines with respect to the SS output lines. Note that
the reverse command line (BREV) is latched by SET during a reverse motion operation. Another
requirement during a rewind operation is that ACCL(SB) be true to inhibit the tape transport from
making a data transfer from the tape. Hence the application of R WS to the ACCL(SB) line on the
positive slave bus.
Status lines 7CH(SB), SDWN(SB), and TUR(SB) are ANDed with MOL before being converted to
negative logic. Thus, a drive on the positive slave bus (either the TEION or a TEIOW) must be selected
before these status signals will be placed on the negative slave bus.

5-111

(FIG.5-64)
7CH(SB)

+ TO-

B7CH

LEVEL
CONVERTER
032
(2)

(FIG 5-59)
BSDWN

+ TO-

SDWN(SB)

LEVEL
CONVERTER
031
(2)
TUR(SB)

TO LEVEL
ONVERTER
030
(2)

BTUR

BC8{1G

BC556

MOL (FIG. 5-64)
C

+ TOLEVEL
CONVERTER
028
(2)

+ TO-

DIVIDE BY-FOUR
COUNTER
(2)

(ENABLE)

DIVIDE
BY-46
COUNTER
(2)

(ENABLE)

CLOCK(SB)

LEVEL
CONVERTER
029
(2)

BDEN5

NEGATIVE
SLAVE
BUS
BDEN8

BSTOP

- TO +
LEVEL
CONVERTER
015
(2)

DEN (I(SB)

-TO +
DEN 1
LEVEL
CONVERTER
016
(2)

BSELO-BSEL2

BEMD

BALFA

DEN1(SB)

DEN2(SB)

-TO +
LEVEL
CONVERTER
023
(2)

STOP(SB)

RREV

(FIG. 5-59)

(SET)

COMMAND
LATCH UP
FF
(1)

-TO +
LEVEL
CONVERTERS
012,013,014
(2)
-TO +
LEVEL
CONVERTER
021
(2)

{

-TO +
LEVEL
CONVERTER
024
(2)

BREV

POSITIVE
SLAVE
BUS

REV(SB)

C
SS2(SB)-SS{I(SB)

EMD(SB)

EMD

-TO +
ACCL
LEVEL
CONVERTER
022
(2)

(FIG.5-64)

(FIG.5-59)
ACCL(SB)

(FIGS.5-63 AND 5-64)

NOTE:
Designations in parenthesis refer to engineering drawing number containing corresponding logic.
CP-3062

Figure 5-61

Control/Status Interface Block Diagram
5-112

Count down circuits are used to generate BC800 and BC556 clock signals for the negative slave bus. A
CLOCK(SB) signal of 144 kHz is received from the positive slave bus, reduced to 36 kHz by a divideby-four counter, converted to negative logic by Q28, and output as BC800. A CLK input of 1.152
MHz is received from the TE ION "host" drive, reduced to 25 kHz by a divide-by-46 counter, converted to negative logic by Q29, and output as BC556. The selected tape drive must be on the positive
slave bus (MOL true) to enable the divide-by-four and the divide-by-46 counters. An additional requirement for the assertion of the BC556 clock is that the DEN code for 556 bits/in be true. The 556
bits/in DEN code is BDEN5 (DEN 0) true and BDEN8 (DEN 1) false.
The logic for the divide-by-46 counter is on Sheet 2 of Engineering Drawing CS-M8927. Figure 5-62 is
a timing diagram of the counter operation and should be referenced along with the circuit schematic
during the following discussion. Counter Ell is clocked by the CLK input from the "host" drive. Ell
is a 4-bit counter whose R3(1) asserted output clocks E9-3, alternately setting and resetting the E9 flipflop. Note that when E9 resets, the cycle is distorted by the action of one-shot flip-flop E5. Each time
E9 resets, E9-6 goes high and triggers one-shot E5. The output from E5 presets counter Ell to a count
of one. (This is the actual starting condition represented at time zero in Figure 5-62.) Thus, each time
the counter is loaded, only seven clock pulses are required to assert R3(1) instead of eight. On the 23rd
clock pulse, E9-6 goes high again, thereby presetting counter Ell to one and the cycle is repeated. E911 is clocked by the E9-5 output, resulting in the E9-9 output shown in Figure 5-62. E9-9 and E9-6 are
ANDed by E13, generating the E13-8 output, which is the 25 kHz clock output from the divide-by-46
counter. It can be seen from Figure 5-62 that the ratio between the CLK input waveform and the E13-8
output waveform is 46-to-l.

5.3.8.4 Write Data Interface (Figure 5-63) - Write data BWDO-BWD7, BWDP on the negative slave
bus is converted to positive logic by negative-to-positive converters Ql through Q9 and then applied to
write data latch-up flip-flops. When the flip-flops are clocked, the write data is output to the positive
slave bus in a reversed order [i.e., WD7(SB)-WDO(SB), WDP(SB)]. BREC is converted to positive
logic and triggers a one-shot that outputs the recording pulse REC(SB) to the positive bus. The REC
converter output also serves as the clock for the write data latch-up flip-flops. BLRCC from the
negative slave bus is converted to positive logic and sets the LRC STRB flip-flop. The assertion of
LRC STRB(SB) on the positive slave bus indicates that the body of the record has been written and the
LRC character can now be written. The LRCC converter output resets the write data latch up flipflops, setting write lines WD7(SB)-WDO(SB), WDP(SB) to zero. (The LRC character is generated
internally within the selected drive.)
BREC, BLRCC, and the nine write data lines are not coupled through the M8927 module unless MOL
from the positive slave bus is true. Thus, the host drive or a TEI0W must be selected before any of the
write signals are placed onto the positive slave bus.
MOL enables the write signal lines by asserting a -0.7 V bias voltage to level converters Ql through
Ql1. A -6.3 V from the "host" drive is the source for the -0.7 V bias voltage.
Another -0.7 V (independent of MOL) and a -2.4 V are also derived from the -6.3 V input and serve as
operating voltages for the M8927 module.

5-113

ClK
(1.152 MHz)

llL---_________. . .

R3(1)

L -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

~h~

______

I
I

E9-

L-_ _ _ _ _ _ _ _ _----I

COUNTER Ell PRESET TO 1

COUNTER Ell PRESET TO 1 ~

E9-6

E9-9

-----------~

E13-8
(26 KHz)

I
I

rI
I

__________________

~n~

________________

CP-3060

Figure 5-62

Timing Diagram of Divide-by-46 Counter

5-114

-TO +
LEVEL
CONVERTERS
01-04(3)

BWDpJ-BWD7,BWDP

WRITE DATA
LATCH-UP
FFs
(3)

(CLOCK)

(RESET)

NEGATIVE
SLAVE
BUS

BREC

-TO +
LEVEL
CONVERTER
011 (3)

WD7(SB)-WD~(SB). WDP(SB)

REC
ONE-SHOT
(3)

A,B

REC(SB)

t
BLRCC

-TO +
LEVEL
CONVERTER
010(3)

LRC STRB
FF (3)

LRC STRB(SB)

(RESET) ACCL

MOL
0.7V

WRITE
CHANNEL
SWITCH (3)

POSITIVE
SLAVE
BUS

(FIG.5-S1)

(FIG 5-S4)

-2.4V

-0.7V

DC
DIVIDER
(3)

-S.3V

Figure 5-63

~
A

NOTE:
Designation i n parenthesis refer to engineering
drawing number containing corresponding logic.

CP-30S3

Write Data Interface Block Diagram

5-115

5.3.8.5 Read Data Interface (Figure 5-64) - Read data RD7(SB)-RDO(SB), RDP(SB) is received from
the positive slave bus and applied to read data flip-flops. The flip-flops are clocked by RSDO(SB)
pulses also received from the positive slave bus. (Note that the logic that gates the TE 1ON read data
and RSDO pulses to the positive slave bus is on the M8927 module.) The output of the read data flipflops, which is in reverse order with respect to the input, is converted to negative logic by level converters Q33 through Q41 and placed onto the negative slave bus. Data bit RDO is directly coupled
from the read data flip-flops to the level converters. Data bits RDI-RD7, RDP are applied to the
converters via a read data/delay mux. In the body of the record, the mux passes the read data to the
negative slave bus. At BSET time EMD asserts, which in turn asserts DELAY switch (if MOL is true)
and switches the mux. Thus, if a drive on the positive slave bus is selected (TEtON or TEI0W), the
EMD pulse switches the delay code from the delay ROM onto read lines RDI-RD7, RDP. The delay
code is used by the controller to establish the delay period for capstan motor acceleration and deceleration. The delay code is a function of the type of drive selected (7TRK), whether the drive is starting or
stopping (ACCL), and the type of operation the drive is executing (WRE, FOR). The delay periods are
shown in Table 5-8.
RSDO(SB) pulses trigger a skew one-shot. The one-shot output is gated with MOS, converted to
negative logic by Q42 and placed on the negative slave bus. Each SKEW pulse resets the read data flipflops via a read data reset one-shot.
5.3.9 TE16 Switch Box
The TE 16 switch box is illustrated on the 5412347 circuit schematic. All of the switches in the switch
box are H all-effect switches and, therefore, require + 5 V to operate. They are solid-state momentary,
not mechanical, switches. The outputs are low when the switches are depressed and high when released.
All indicators are LEDs, powered by the +5 Vdc logic supply. If one (or more) of the LED indicators
burn~ out, do not attempt to replace it; the entire switch box assembly must be replaced. Refer to
Chapter 6 of this manual for detailed replacement procedures.
5.4 READ OPERATION
This section describes the read operation for both PE and NRZI reading. Flow diagrams complement
the discussions.
5.4.1 PE Read (TEI6 Only)
Figure 5-65 illustrates the major functional sequences of a PE read operation and the following paragraphs describe this operation in slightly greater depth. A detailed description of the PE read operation
may be found in Paragraph 5.3.3, the detailed read amplifier (G066) module description.
5.4.1.1 Command Initiation - Once the controller is selected, it specifies the selected TEI6, tape character format, and tape data density (1600 bits/in for PE).
The controller places the slave select (SS 0-2) and density (DEN 0-2) bits of the tape control register on
the slave bus. The operational code of a read operation is decoded and the controller asserts FWD L or
REV L on the slave bus. It then transmits SLAVE SET PULSE to the TE 16 and initiates a motion
delay.

5-116

+TOLEVEL
BRD'-BRD7. BRDP
CONVERTERS
033-041
(5)

RD7(SB)-RDrI(SBI.RDP(SB)

RD'
READ DATA
FFs
RD1-RD7.RDP

r----- READ DATAl
DELAYMUX
(5)

(4)

(CLOCK)

MRD7-MRDrI.MRDP

141

I--

iC -

141

MOL
RSDO

A
C

RSDO(SB)
NEGATIVE
SLAVE
BUS

(RESET)

7TRK
(DELAY
CODE)

DELAY
ROM
(5)

B SKEW

READ DATA
RESET
ONE-SHOT
(4)

}

(FIG 5-61)

}

(FIG. 5-59)

SKEW

SKEW
ONE·SHOT
(4)

t--

ACCL
WRE
FOR

+TOLEVEL
CONVERTER
042
(5)

(5)

MOL/.

(DELAY SWITCH)

DELAY ROM
SELECTOR
(5)

(5)

MOL(SB)

(5)

IFIGURES ........ , •

NOTE
Designations in parenthesis refer to engineering
drawing number containing corresponding logic.

POSITIVE
SLAVE
BUS

AND 6-63)

..J ~
F

EMD

(FIG. 6-61)
CP·3064

Figure 5-64 Read Data Interface
Block Diagram

5-117

Table 5-8

TEI0N Motion Delay Periods

Drive Type

Start/Stop

Mode

Delay Period (ms)

9-Track

Start

Write
Read
Reverse
Write
Read
Reverse
Write
Read
Reverse
Write
Read
Reverse

8.99
0.92
0.92
2.72
1.82
1.82
15.26
0.92
0.92
2.72
1.82
6.30

Stop

7-Track

Start

Stop

5.4.1.2 Command Execution - The TEI6, which is enabled by its address code on the slave select lines
(SS 0-2) of the slave bus, responds to SLAVE SET PULSE by setting a motion control flip-flop
(forward or reverse), thereby activating the capstan drive motor and tape motion.
The TE 16 read amplifiers are on continuously. Even as the tape accelerates, the controller PE read
circuitry checks for a PE identification burst (IDB) and begins looking fora preamble. When the tape
is at speed, the preamble will be detached and read; the tape characters immediately after the preamble
all-Is character are data characters. These are deskewed in the controller, which then assembles the
characters into data words and places them on the data bus to the processor. The controller continues
this assembly of data characters into words until the first character of the postamble is detached.
5.4.1.3 Command Termination - The controller reads the postamble, which signifies the end of the
record. When the postamble has been read, a motion delay sequence is initiated, at the end of which
STOP L is asserted on the slave bus. STOP L resets the motion flip-flop in the TE16 and terminates
tape motion.
5.4.2 NRZI Read (TEI6, TEI0W, TEI0N)
Figure 5-66 illustrates the major functional sequences of an NRZI read operation and the following
paragraphs describe this operation in slightly greater depth. A detailed description of the NRZI read
operation may be found in Paragraph 5.3.3, the detailed read amplifier (0066) module description.
5.4.2.1 Command Initiation - Once the controller is selected, it specifies the selected TE 16, tape character format, and tape data density. The controller places the slave select (SS 0-2) and density (DEN 02) bits of the tape control register on the slave bus. The operational function code of a read operation is
decoded, and the controller asserts FWD L or REV L on the slave bus. It then transmits SLA VE SET
PULSE to the TE16 and initiates a motion delay.

5-119

INITIATE
TAPE
MOTION

CONVERT DATA
CHARACTERS TO
WORDS AND
TRANSMIT

CONVERT DATA
CHARACTERS
!NTOWORDS
AND TRANSMIT

*n is determined
by selected format

READ
CRCC/
LRCC

TERMINATE
TAPE
MOTION

*n depends on selected format
CP-3065

Figure 5-65

CP-3066

PE Read Operation Flowchart

Figure 5-66 NRZI Read (Forward)
Operation Flowchart

5-120

5.4.2.2 Command Execution - The TE16, which is enabled by its address code on the slave select lines
(SS 0-2) of the slave bus, responds to SLAVE SET PULSE by setting a motion control flip-flop
(forward or reverse), thereby activating the capstan drive motor and tape motion. When the motion
delay has timed out, the controller negates ACCL L on the slave bus. The signal enables the TE16
NRZI read circuitry.
When a tape character is detected by the TE16, RSDO (Read Strobe Delay Over) is transmitted via the
slave bus to the controller and the tape character is multiplexed onto the slave bus read data lines. The
controller assembles the characters into words and places them on the data bus to the processor. The
controller continues this assembly of data characters into words, until the end of the data records.
During a forward read, the rest of the read circuitry continues its operation, reading the CRCC and
then reading the LRCC. Discrepancies between generated CRCC/LRCC and detected CRCC/LRCC
cause their respective error bits to set.
During a reverse read, the LRCC character is encountered first at the start of the read operation,
followed by the CRCC. No CRC or LRC is generated. Then the data is read; assembly of characters
into data words may differ when reading in the reverse direction, but this depends on the data format
selected.
5.4.2.3 Command Termination - When the data and LRCC /CRCC have been read, the read heads
will encounter the IRG. This absence of tape characters causes a motion delay, at the end of which
STOP L is asserted on the slave bus. STOP L resets the motion flip-flop in the TE16 and terminates
tape motion.
5.5 WRITE OPERATION
This section describes the write operation for both PE and NRZI writing. Flow diagrams complement
the discussions.
5.5.1 PE Write (TEI6 Only)
Figure 5-67 illustrates the major functional sequences of a PE write operation and the following paragraphs describe this operation in slightly greater depth. A detailed description of the PE write operation may be found in Paragraph 5.3.6, the detailed logic and write (M 8916) module description.
5.5.1.1 Command Initiation - Once the controller is selected, it specifies the selected TE 16, tape character format, and tape data density (1600 bits/in for PE). The controller places the slave select (SS 0-2)
and density (DEN 0-2) bits of the tape control register on the slave bus. Then, the two's complement of
the number of tape characters to be written is loaded into the controller frame count register. The
controller decodes the write command function code and asserts FWD L and WRITE L on the slave
bus. SLAVE SET PULSE is asserted on the slave bus, and the controller accepts the first data word to
be written.

5-121

LOAD TAPE
CONTROL
REGISTER

CONVERT
DATA WORD
TO TAPE

LOAD
FRAME
COUNT

RECEIVE
DATA WORD
NO

TURN ON
WRITE AND
ERASE HEADS
START TAPE
MOTION

NO
RECEIVE
DATA
WORD

TERMINATE
TAPE MOTION
TURN OFF
ERASE AND
WRITE HEADS

CP-3067

Figure 5-67

PE Data Write Operation Flowchart

5-122

5.5.1.2 Command Execution - The TEI6, which is enabled by its address code on the slave select (SS
0-2) lines of the slave bus, responds to SLAVE SET PULSE by setting its forward motion and write
enable flip-flops. These flip-flops activate the capstan drive motor for forward tape motion and turn
on the write and erase heads.
After a motion delay during which the TE 16 erases tape while coming up to speed, the controller
negates ACCL L on the slave bus. This signifies that the TE16 is at speed and enables it to transmit
WRT CLK to the controller. Upon receipt ofWRT CLK, the controller begins generating a preamble.
When this is written, the controller begins disassembling the first data word into characters. When it
has disassembled the first data word, it requests the next data word and continues to do so until all the
data words have been transferred. Each time the controller generates a character, the frame count
register is incremented, a vertical parity bit is generated, and the tape character is converted to PE
mode and transmitted to the TE16 write circuitry. When the frame count register overflows, the controller generates a postamble, which is written on a tape. During the entire operation, the
TEl6/controller read operation is active and reads the record being written.
5.5.1.3 Command Termination - When the TEl6/controller read circuitry detects the end of the record, a motion delay is generated, at the end of which, the controller asserts STOP L on the slave bus,
resetting the TE16 forward motion flip-flop, thereby terminating tape motion.
5.5.2 NRZI Write (TEl6, TElOW, TElON)
Figure 5-68 illustrates the major functional sequences of an NRZI write operation and the following
paragraphs describe this operation in slightly greater depth. A detailed description of the NRZI write
operation may be found in Paragraph 5.3.6, the detailed logic and write (M8916) module description.
5.5.2.1 Command Initiation - Once the controller is selected, it specifies the selected TEI6, tape character format, and tape data density. The controller places the slave select (SS 0-2) and density (DEN 02) bits of the tape control register on the slave bus. Then, the two's complement of the number of tape
characters to be written is loaded into the controller frame count register. The controller decodes the
write command function code and asserts FWD L and WRITE L on the slave bus. SLAVE SET
PULSE is asserted on the slave bus, and the controller accepts the first data word to be written.
5.5.2.2 Command Execution - The TE 16, which is enabled by its address code on the slave select lines
(SS 0-2) of the slave bus, responds to SLAVE SET PULSE by setting its forward motion control and
write enable flip-flops. These flip-flops activate the capstan drive motor for forward tape motion and
turn on the write and erase heads.
After a motion delay during which the TE16 erases tape while coming up to speed, the controller
negates ACCL L on the slave bus. This notifies the TE16 that it is at speed and enables it to transmit
WR T CLK to the controller.
Upon receipt of WRT CLK by the controller, it begins disassembling the first data word into characters. When it has disassembled the first data word, it requests the next data word and continues to do
so until all the data words have been transferred. Each time the controller generates a character, the
frame count register is incremented. A vertical parity bit is generated, the CRCC is generated and the
tape character is transmitted to the TE16 write circuitry, where it is converted from binary to NRZI
mode (Is become transitions) and written on the tape. When the frame count register overflows to
zero, the controller generates the timing to write the generated CRCC and the LRCC.
During the time that the tape is moving at speed (ACCL L negated), the TEl6/controller performs a
read-after-write operation.

5-123

LOAD TAPE
CONTROL
REGISTER

CONVERT DATA
WORDS TO TAPE
CHARACTERS

TURN ON WRITE
AND ERASE
HEADS
INITIATE TAPE
MOTION

RECEIVE
DATA
WORD

TERMINATE
TAPE MOTION
NO

ERASEIRG
TURN OFF
ERASE AND
WRITE HEADS

CP-3068

Figure 5-68

NRZI Data Write Operation Flowchart

5.5.2.3 Command Termination - When the TE16/controller read circuitry detects the end of the
record, a motion delay is generated, at the end of which the controller asserts STOP L on the slave bus,
resetting the TE16 forward motion flip-flop, thereby terminating tape motion. When tape motion
ceases, the write enable flip-flop is cleared and the write and erase heads are de-energized.

5-124

CHAPTER 6
SERVICING

6.1 SCOPE
This chapter provides complete TE16 (TEI0W IN) preventive and corrective maintenance procedures.
No tape controller maintenance information is provided. For that information, refer to the specific
controller maintenance manual.
The major TE16 assemblies referenced throughout this chapter are shown in Figure 6-1. Access the
interior TE16 components by rotating the service lock (located on the lower right corner of the transport front) to release the transport assembly from the cabinet (Figure 6-2).

6.2 MAINTENANCE PHILOSOPHY
The TE16 DECmagtape Transport is a highly reliable tape transport that will provide years of troublefree performance when it is properly maintained. A planned program of routine inspection and
maintenance is essential for optimum performance and reliability.
Preventive maintenance (PM) includes daily head and tape path cleaning and additional monthly,
quarterly, and semiannual procedures. The transport requires few adjustments, and the procedures
should not be performed unless problems are encountered in transport operation. Refer to Paragraph
6.4 for the recommended preventive maintenance procedures.
Corrective maintenance (CM) consists of troubleshooting at the system level, using system diagnostics,
visual methods, and the Test Function Generator (TFG). Once a fault is thought to be in the transport,
functional block diagrams and engineering logic diagrams are used to localize the failure to an electrical area (module) or a mechanical part. Then, when the faulty module or mechanical part is located,
it should be replaced.

6.3 TEST EQUIPMENT
Table 6-1 lists tools that are required to maintain the TE16 (TEI0W IN) DECmagtape Transport.
Refer to Paragraph 6.3.1 for a list of required diagnostic programs.

6-1

8647-18

A.
Figure 6-1

Front View

TE 16 D ECmagtape Transport Assemblies (Sheet 1 of 2)

6-2

H607
POWER BOARD

TACHOMETER

CAPSTAN
MOTOR

BRAKE

TE16 POWER SUPPLY
REGULATOR BOARD

TAKEUP
REEL MOTOR
VACUUM
SWITCH
ASSEMBLY

VACUUM
SWITCH
ASSEMBLY
TRANSFORMER/
CAPACITOR
ASSEMBLY

FILE REEL
MOTOR

READ/WRITE
INTERLOCK

NOTE:
THE CAPSTAN MOTOR AND TACHOMETER
FORM AN INTEGRAL UNIT. DO NOT
DISASSEMBLE THE UNIT.
8348-12

B.
Figure 6-1

Left Side View

TE16 DECmagtape Transport Assemblies (Sheet 2 of 2)

6-3

DOOR
SEAL

LOCK

Figure 6-2

Front View, Transport Casting

6-4

8647-17

Table 6-1
Item

Part No.

1
2
3
4
5
6
7

29-18303
29-19224
29-16871
29-20273
29-10780
29-22265

74-16187

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23

90-09299
90-08268
90-09177
Local Purchase
48-50023-01
48-50023-03
48-50023-04
48-50023-05
48-50023-06
48-50023-07
48-50023-08
29-13515
74-13969
29-22039
94-05144

24
25

94-05143
Local Purchase

Local Purchase

27
28
29

W984
Local Purchase

Test Equipment

Description
Oscilloscope with probes
Digital tool kit
Skew tape
Magna-See™
Microscope
Penlight
Vacuum system belt
tension gauge
Vacuum system pulley
height gauge
Silicone grease
Heat sink compound
EOT /BOT markers
Metal straight edge (scale)
Shim stock .001 (purple)
Shim stock .002 (red)
Shim stock .003 (green)
Shim stock .004 (tan)
Shim stock .005 (blue)
Shim stock .0075 (clear)
Shim stock .010 (brown)
Feeler gauge set
Alignment doors
Depth micrometer
Hub spanner wrench and
adapter spacer
Block gauge (hub height)
1-3/8 in socket (3/4-in drive)
(see Note)
3/4-in drive breaker bar
(see Note)
Snap lock hub shim stock
Double height extender
Teflon tape

Usage*
1
2

X
X
X

X
X

X
X
X

X
X

X
X
X

X
X
X
X
X
X
X
X
X
X
X
X
X
X

X
X
X
X

*Usage Legend
Routine corrective maintenance
Monthly PM
Quarterly PM
Semiannual PM
Annual PM
Major tape path alignment
50-60 Hz conversion
Vacuum system belt change

TMMagna-See is a registered trademark of Columbia Broadcasting System, Inc.

6-5

X
X
X
X
X
X

Note:
1-3/8 in socket: Sears 9 GT 47549
3/4-in breaker bar: Sears 9 GT 4443

1.
2.
3.
4.
5.
6.
7.
8.

X
X

6.3.1 Diagnostics
This section lists the various PDP-II diagnostic programs that are used in maintaining the TE16
(TE ION /W) Transport. The group of programs that is listed for the customer configuration is considered to be required standard test equipment (see Table 6-1). Each diagnostic designation (e.g.,
DZTUA) is prefixed by "MAINDEC-ll."
1.

Diagnostic programs used with a TM02/TU 16 configuration:
a.
b.
c.
d.
e.
f.

Diagnostic programs used with a TM03/TE16 configuration:
a.
b.
c.
d.
e.
f.
g.

M ultidrive Data Reliability
Basic Function Test
Control Logic Test 1
Control Logic Test 2
Drive Function Timer
Utility Driver (BRUTIS)
Data Tape Create

DZTMA Instruction Test
DZTME Drive Function Timer
DZTMF Supplemental Instruction Test
DZTMG Utility Driver
DZTMH Data Reliability

Diagnostic programs used with TM8E/TEIOW /TEION configuration:
a.
b.
c.
d.
e.
f.

DZTEA
DZTEB
DZTEC
DZTED
DZTEE
DZTEF
DZTUF

Diagnostic programs used with the TMBll/TEIOW /TEION configuration:
a.
b.
c.
d.
e.

DZTUA Multidrive Data Reliability
DZTUB Basic Function Test
DZTUC Control Logic Test
DZTUE Utility Driver (BRUTIS)
DZTUF Data Tape Create
DZTUG Drive Function Timer

DHTMA
DHTMB
DHTMC
DHTMD
DHTME
DHTMF

Control Test I
Control Test 2
Drive Function Timer
Data Reliability (9-track)
Data Reliability (7-track)
Random Exerciser

Diagnostic programs used with TC59/TEIOW configuration:
a.
b.
c.
d.
e.

D4A Instruction Test
D4C Drive Function Timer
D4D Data Reliability (7-track)
D4E Data Reliability (9-track)
D4G Random Exerciser

6-6

6.4 PREVENTIVE MAINTENANCE
TEI6 preventive ma'intenance to be performed by the Field Service technician is presented in this
section. Care and preventive maintenance of the TEI6 to be performed by the user are listed in Chapter 4.
6.4.1 Preventive Maintenance Schedule
The recommended frequency for performing the preventive maintenance (PM) procedures in this section are based on moderate use of the equipment. In cases where use is heavy, certain steps should be
performed more frequently. For example, items 5 through 11 of the quarterly procedure (Paragraphs
6.4.3.5 through 6.4.3.11) assume that tape motion does not exceed 150 hours per quarter; if tape
motion exceeds that figure, those procedures should be performed more often.
The semiannual procedure (Paragraph 6.4.4) assumes that tape motion does not exceed 300 hours
during a six-month period; if tape motion exceeds that figure, the procedure should be performed more
frequently.
6.4.2 Monthly PM Procedures
The items listed in this section are to be performed on a monthly basis.
6.4.2.1
I.

Tape Path Cleaning and Inspection - Clean the tape path and inspect it for wear as follows:
Turn power off at the 861 Power Controller by moving the circuit breaker handle down.
Remove the supply reel (if one is installed). Using water-dampened wipes, clean the front
door glass and frame.
CAUTION
Be careful not to saturate the lining on the vacuum
column walls with fluid; this could cause damage to
the lining.

Remove the head cover and open the vacuum column door. Using a penlight, inspect the
read/write head and erase head for oxide accumulation. A worn head will normally show
oxide accumulation on the worn spot. If the read/write head is unevenly worn or if the erase
head shows any wear, replace the head plate assembly (refer to Figure 6-3); shiny spots
indicate uneven wear. Procedures for replacing the head plate assembly can be located in
Paragraph 6.6.7.
NOTE
Wear spots of any kind on the erase head indicate
head plate replacement is mandatory.

Using DECmagtape cleaning fluid and foam or cotton-tipped wooden swabs, clean any
accumulated oxide from the read/write head, erase head, and tape cleaner. Clean the tape
bearing surfaces of the fixed guides near the head assembly. (Pay particular attention to
removing oxide buildup from the ceramic washers on the fixed guides.)
NOTE
Ensure that the inner (spring loaded) washers move
freely after cleaning and that they are not jammed
under the fixed guides.

6-7

Using DECmagtape cleaning fluid and swab, clean the tape bearing surface of the three
roller guides (upper left, upper middle, and lower middle).
CAUTION
Do not allow fluid to penetrate the shaft area of the
roller guide, as this will degrease the bearings.

With DECmagtape cleaning fluid and wipes, clean the vacuum columns and column door
glass.

With D ECmagtape cleaning fluid and a lint free cloth, gently clean the rubber surface of the
capstan wheel.

Finally, using a dry wipe, clean the reel contacting metal surface of the lower snap-lock hub,
paying particular attention to the rear flange. Dirt on these surfaces may result in slippage of
the tape reel.
NOTE
If a quarterly PM is to be performed at this time,
proceed to Paragraph 6.4.3. If not, continue with
Paragraph 6.4.2.2.

J
CP-3189

Unacceptable Read/Write Head Assembly Wear
Figure 6-3

Oxide Accumulation (Sheet 1 of 2)

6-8

[.1
EVEN
WEAR

WEAR

CP- 1999

Cp· 1998

Unacceptable Erase Head Assembly Wear

Figure 6-3

Oxide Accumulation (Sheet 2 of 2)

6.4.2.2 NRZI Diagnostic (on all DECmagtape systems) - Turn power on; mount tape and load it to
BOT. Run the On-Line Reliability Diagnostic applicable to the computer system for 10 minutes in 800
bits/NRZI in mode. If any soft read errors occur, it will be necessary to run a complete pass to
determine whether the frequency of soft read errors is within specification or not. No hard read errors
are allowed.
NOTE
Acceptable soft read error rate for one 2400-ft reel
of tape is:
Forward Read
Reverse Read
Write

1
1
2

Retries on the same spot do not increase the soft read error tally (i.e., a read error on Block 1, Record
1, that required three retries to recover is recorded as one soft read error).
6.4.2.3 Phase Encoding Diagnostic (TE16 Systems only) - Rewind tape to BOT and run the relevant
On-Line Reliability Diagnostic for 10 minutes in 1600 bits/in PE mode. If any soft read errors occur, it
will be necessary to run a complete pass to determine whether the frequency of soft read errors is
within specification or not. No hard read errors are allowed.
NOTE
Acceptable soft read error rate for one 2400-ft of
tape is:
Forward Read
Reverse Read
Write

1
2
2

Retries on the same spot do not increase the soft error tally (i.e., a read error on Block 1, Record 1,
that required three retries to recover is recorded as one soft read error).
6.4.3 Quarterly PM Procedures
The items listed in this section are to be performed on a quarterly basis.

6.4.3.1

Operator Panel Check - Check the operator panel switches and indicators as follows:

Apply power to the TE 16 by placing the circuit breaker on the 861 Power Controller up. The
POWER and WRL indicators will glow.

Place a scratch tape (with write ring) on the lower hub and secure it with the latch lever.
Thread the tape through the tape path, and take three wraps around the take-up reel.

Depress and release the LOAD pushbutton. The tape will load into the vacuum columns
and run forward for approximately 5 seconds and then rewind to BOT. The BOT, ON /OFF
LINE, and LOAD indicators will glow. The WRL indicator should not glow with the write
ring installed. The SEL indicator will glow if the TM02/03 is currently selecting that TEI6.

The LOAD, RWD /UNLD pushbutton should not have any effect with the ON /OFF LINE
indicator on.

Depress and release the ON/OFF LINE pushbutton, which will extinguish the ON/OFF
LINE and SEL (if previously lit) indicators.

Depress the REW /UNLD pushbutton. If tape is positioned after BOT, the tape will rewind
to BOT and stop, and the BOT indicator will glow. If the tape was positioned at BOT, an
unload operation is executed. The vacuum system will be shut off, and tape will be taken out
of the columns and wound onto the supply reel. The LOAD indicator will extinguish.

Dismount the tape, and remove the write enable ring. Mount the tape and load it to BOT.
Ensure that the WRL indicator stays lit.
NOTE
If any discrepancies are found and the problem is diagnosed to the operator panel, the entire panel/cable
assembly, as a unit, must be replaced. The individual
switches and LEDs are not field replaceable.

Off-Line motion control switches are provided under the TE16 logic chassis (Figure 6-1B).
The FWD/REV switch controls, but does not initiate, tape motion. The START/STOP
switch initiates tape motion when it is moved from STOP to the START position and halts
tape motion when moved from the START to the STOP position. Check these switches for
proper functioning.

6.4.3.2 Supply Reel Hub Inspection and Lubrication - Perform the following to inspect and lubricate
the supply reel hub. Refer to Figure 6-4 for a cross-sectional view of the reel hub.

Disassemble the hub as follows:
a.

Release the snap-lock lever.

Note the position of the index screw by placing a pencil mark opposite the screw on the
surface of the inner hub.

Remove the index screw.

Remove the outer hub by rotating it and the lock lever counter clockwise.

6-10

MOTOR

SHIMS

LEVER

INDEX SCREW'),

~--

CP-3188

Figure 6-4

Cross-Sectional View of Snap-Lock Hub

Examine the "0" ring for any gouges or cracks. If any wear is noted, replace the "0" ring,
thrust washer, and lock lever. (All three items are contained in a kit envelope.)

Lubricate the assembly as follows:

Lightly lubricate the "0" ring chamfer on the outer and inner hubs with silicone
grease. (Do not use heat sink compound.)

Place the "0" ring onto the outer hub, being careful not to contaminate the outer
surface of the ring with grease. Wipe the outer surface of the hub and "0" ring to
remove all excess lubricant.

Lightly lubricate the thrust washer before sliding it over the snap lock lever shaft.

Reassemble the hub as follows:
a.

Rotate the outer hub clockwise, such that the shaft of the latch lever will thread its way
into the adapter.

Hold the inner hub while rotating the outer hub clockwise, until it bottoms. Continue
to hold the inner hub and rotate the outer hub counter clockwise until the lock lever
closes smoothly.

Locate the original hole, and replace the index screw.

6-11

6.4.3.3

Wipe away any excess grease that may have found its way to the surface of the hub
assembly.

Mount a tape and ensure that the lock lever closes smoothly, while checking to see that
the reel is held securely. If either parameter is not met, remove the index screw and
rotate the outer hub to fine-tune it. Replace the index screw when a proper alignment
has been made.

Vacuum System Belt Inspection - Follow these procedures to inspect the vacuum belt system:

Remove the guard plate with four quarter-turn fasteners.

Visually inspect the drive belt for any signs of wear or cracks. If necessary, replace the belt.

To check belt tension, position the gauge as shown in Figure 6-5. Push against the knob until
the third tab on the gauge just touches the belt. Read the tension from the scale just under
the spring. The belt is properly adjusted if the gauge reads 4.1 ± 1.8 kg (9 ± 4 lb). Refer to
section 6.5.11, for adjustment procedures, if adjustment is necessary.

KNOB

BELT TENSION GAUGE

MOTOR PLATE
TAKE-UP SCREW

BLOWER PULLEY

DRIVE PULLEY 60 Hz
CP-2119

Figure 6-5

6.4.3.4
1.

Belt Tension Gauge

Voltage Checks - Follow these procedures to check voltages:
Turn power off at the 861 Power Controller. Remove the M8912 (TFG) from slot EF03, and
place it on a module extender in slot AB03.

6-12

Place the SS RD, SS WRT, and WRT switches (on the TFG) down; turn power on.
NOTES
For a description of the TFG module, refer to Paragraph 5.3.5.
For all voltage checks, refer to Figure 6-6 for the
location of the potentiometers that control adjustments. If any voltages cannot be adjusted to meet
specifications, replace the regulator board.
a.

Check the +5 Vdc drive logic voltage:
Reference Point = D01A2 (red wire)
Nominal Value = +5.25 ± 0.05 Vdc
If necessary, adjust potentiometer R59.

Check the +12 Vdc Check (Drive Voltage):
Reference Point
Nominal Value

= A04V1 (yellow wire)
= 12.05 ± 0.05 Vdc

If necessary, adjust potentiometer R37.
c.

Check the -6.4 Vdc drive voltage:
Reference Point
Nominal Value

= C04N2 (green wire)
= -6.35 ± 0.05 Vdc

If necessary, adjust potentiometer R44.
d.

With S5-9 (M8912) ON, check the + 12 Vdc (NRZI) drive voltage:
Reference Point
Nominal Value

= C02J2 (orange wire)
= 11.875 ± 0.125 Vdc

If necessary, adjust potentiometer R26.
NOTE
Steps d and e are interactive and must be performed
in that sequence. Disregard step e for TEtON and
TEtOW models.
e.

With S5-9 (M8912) OFF, check the +5 Vdc (PE) drive voltage:
Reference point
Nominal Value

= C02J2 (orange wire)
= +5.6 ± 0.1 Vdc

If necessary, adjust potentiometer R57.

6-13

Q7
)

02
R26(+121@
(NRZI

t~)

R37(+121@

R44 (-6.41

\Q')

@)
R57®
(+51
(PEl

{§)

LOGIC
POWER

H607
POWER

®
R59 (+5.31

CAPACITOR
BANK

TRANSFORMER

AC HI GND AC LO

DOD

[]o[]o[]
115

230

LOGIC FAN
VACUUM MOTOR

115

NOTES:
1 I 1 - 5 represent 5 Phillips head screws.
21 6 represent Allen screw - must be secured very tightly, or
damage to the power supply may
result.

Figure 6-6

CP-3196

TE 16 Power Supply Regulator Board

6-14

6.4.3.5

Forward Tape Speed and de Balance Check - Check dc balance as follows:

Turn power off at the 861 Power Controller. Disconnect the erase/write head cable from the
M8916 LAW module, and loosen the two screws in the upper and lower right hand corners
of the H607 daughter board. Swing the board away from the H607 mother board.

Turn power on; load a master skew alignment tape, and position the tape at BOT.

Set the oscilloscope's vertical gain to 50 mV /cm, and reference mother board TP 13 (Figure
6-7 and Table 6-2).

Approximately 50 m V of ac ripple will be seen on the oscilloscope screen. This ripple should
be centered around 0 Vdc. If necessary, adjust R 117 on the mother board in order to obtain
0.0 V ± 0.04 Vdc.

L _________ _

Figure 6-7

H607 Mother Board:
6-15

TO REEL MOTORS

-- - I - -

Adjustments and Test Points

Table 6-2

H607 Mother Board Test Points

Test Point No.

Signal

Not Used
LOWER BRAKE OUT
UPPER BRAKE OUT
Not Used
REWINDCAPH
REV/REWH
FORH

2
3
4
5
6

7
8
9
10
11
12
13
14
5.

+8V
-8 V
UPPER BRAKE OUT H
LOWER BRAKE OUT H
GROUND
SERVO SIGNAL
CAPSTAN BALANCE

Check forward tape speed as follows:
a.

Set the oscilloscope as follows:
Horizontal:
Vertical:
Triggering:

10 Jls/cm
2 V / cm (channell)
Normal
Negative slope
Channel 1 triggered

Place the Channell probe to pin B04L 1 (track 5)
NOTE
The probe is placed on pin A04Hl (Track 8) for 7channel TEIO transports.
b.

Initiate forward tape motion with the maintenance switches. Check that the negative
pulses are 55-57 JlS apart (refer to Figure 6-8). If the pulses are not 55-57 JlS apart,
adjust potentiometer R91 to the mother board to obtain a 56 IlS reading.

M-0610

Figure 6-8

Tape Speed Check:
6-16

10 JlS Sweep Speed

6.4.3.6 Reverse Tape Speed - Initiate reverse tape motion with the maintenance switches. Check that
the negative pulses are 55-57 J,LS apart. If the pulses are not 55-57 J,LS apart, adjust potentiometer R87 on
the mother board to obtain a reading of 56 J,LS.
6.4.3.7 Forward Jitter Check - Check forward jitter as follows:
I.

Change the horizontal sweep to 20 J,Ls/cm. Initiate forward tape motion. Check that four
negative pulses appear on the oscilloscope screen (see Figure 6-9).

Use the horizontal XIO magnifier to increase the horizontal display. Using the horizontal
position knob, place the third pulse in the center of the screen. Check that the jitter is less
than 6 J,LS (3 cm on the oscilloscope, as indicated in Figure 6-10). If jitter exceeds 6 J,LS (as
indicated in Figure 6-11), replace the capstan motor.

M-0611

Figure 6-9

Jitter Check:

Scope Setup

M-0612

Figure 6-10

Jitter Check:
6-17

Capstan Motor Good

M-0613

Figure 6-11

Capstan Motor Bad

6.4.3.8 Reverse Jitter Check - Initiate reverse tape motion. Repeat Paragraph 6.4.3.7 to check reverse
jitter. Remove the XI0 horizontal magnification feature from the oscilloscope.
6.4.3.9
1.

Forward Skew (Azimuth) Check - Perform the skew check as follows:
Set up the oscilloscope as follows:
Horizontal:

2/-Ls/cm

Vertical:

0.1 V /cm (channels 1 and 2)

Vertical coupling:

Triggering:

Normal
Positive Slope
Channel 1 triggered

Mode:

Chopped

Place the channel 1 probe to pin A04L 1 (channell) and place the channel 2 probe to pin
F04Rl (channel 9).
2.

Initiate forward tape motion, and synchronize the oscilloscope. Bring channels 1 and 2 into
close proximity, as shown in Figure 6-12. The two channels should be aligned horizontally,
to within 0.5 /-LS at their peaks. Some jitter is allowable, but any greater than 0.5 /-LS (in either
direction) indicates a transport in need of tape path alignment (assuming, of course, a good
skew tape).

6-18

CP-3182

Figure 6-12

Skew Check (Azimuth)

6.4.3.10 Reverse Skew Check - Initiate reverse tape motion, and check that the waveforms do not
separate by more than 2.5 fJ.s. Here again, ± 0.5 fJ.S of jitter is acceptable, but if it is greater or the
waveforms separate more than 2.5 fJ.S, the tape path alignment must be checked, especially in the area
of capstan perpendicularity.

6.4.3.11
1.

Dynamic Read Skew Packet Check - Check the dynamic read skew as follows:
Set up the oscilloscope:
Horizontal:
0.5 fJ.s/cm
1 V/cm (channell)
Vertical:
Vertical Coupling: dc
Triggering:
Normal
Positive slope
Channel 1 triggered
Place the channell probe to pin E04K1 (signal PACKET H).

Initiate forward tape motion and synchronize the oscilloscope. A waveform similar to Figure 6-13 should be observed. This PACKET H waveform (a logical OR of all nine tracks)
should be no more than 2.5 fJ.S from the beginning of the trace to the leading edge of the
latest pulse seen. If a wider waveform is observed, the head may be worn (gap scatter increased), or the tape path may be in need of realignment.

6-19

M-0614

Figure 6-13

PACKET Waveform

Initiate reverse tape motion. PACKET width should not exceed 3.5 liS. If the PACKET
width does exceed 3.5 liS, the tape path may be in need of realignment.
NOTE
An occasional jump in PACKET width of 1 liS is allowable in Paragraph 6.4.3.16 (usually due to tape
defect); however, this should not occur more often
than once per second.

Allow the skew tape to continue in reverse mode to BOT. Do not rewind. Remove the skew
tape and reconnect the erase/write head cable to the M8916 module.
NOTE
If a semiannual PM procedure is scheduled, proceed
to Paragraph 6.4.4; if not, continue with Paragraph
6.4.3.12.

6.4.3.12 Functional Test Diagnostic - Power down the transport and return the M8912 TFG module
to slot EF03. Power up the transport. Load a good work tape to BOT and run the function, control, or
instruction tests that are applicable to the CPU and DECmagtape/Controller system.
NOTE
Proceed to Paragraph 6.4.2.2 of the monthly PM
procedure.
6.4.4 Semiannual PM Procedures
The items listed in this section are to be performed on a semiannual basis.

6-20

6.4.4.1
1.

Forward Ramp Check - Check and adjust the forward acceleration ramp as follows:
Set these switches on the TFG module (M8912):
SS RD, SS WRT, and WRT - DOWN
S4-9 - OFF

Set up the oscilloscope:
Horizontal:
Vertical:
Triggering:

2 ms/cm
0.2 V/cm (channell)
External Sync
Negative slope
Normal

Place the channell probe to pin P4-7 of the H607 mother board (TACH-V); refer to Figure
6-7. Connect the ground lead of the channel 1 probe to P2-7 of the H607 mother board.
Place the external trigger probe to pin A03S 1.
3.

Load a scratch tape on the transport, and position it to BOT. The tape must have a write
ring in place.

Initiate forward motion and place the SS RD switch (M8912) up. Synchronize the
oscilloscope and a waveform similar to that in Figure 6-14 should appear. The duration of
the negative-going slope should be 7 to 8 ms. If necessary, adjust R86 on the H607 mother
board. Refer to Figure 6-7 for location of R86.

M-0615

Figure 6-14

Forward Acceleration Ramp

6-21

6.4.4.2

Reverse Ramp Check - Check and adjust the reverse acceleration ramp as follows:
Initiate reverse tape motion and set the oscilloscope to positive. Synchronize the
oscilloscope, and a waveform similar to that in Figure 6-15 should appear. The duration of
the positive-going slope should be 7 to 8 ms. If necessary, adjust RI04 on the H607 mother
board. Refer to Figure 6-7 for location of R 104.

M-06H~

Figure 6-15

Reverse Acceleration Ramp

6.4.4.3 Tracking Check - Place the SS RD switch on the TFG (M 8912) down and remove the oscilloscope probes. Check industry compatible tape tracking as follows:
1.

Set up the TFG:
SS WRT, SS RD and WRT - DOWN
S5-1 through 8 - OFF
S5-9, 10 - ON
S6-1 through 10 - OFF

Set the FWD-REV maintenance switch to FWD, but do not initiate tape motion. Place SS
RD momentarily up, then down. (This loads data into the TFG Write buffer.)

Position a scratch tape on the transport at BOT.

Place the WRT switch on the TFG up, and initiate forward tape motion.

Allow the tape to be written for approximately 10 seconds.

Place the WRT switch down, and rewind the tape.

£\-22

Remove the tape from the transport, take it to a work area and proceed as follows:
a.

Unwind tape until BOT is reached, and cut the tape just before the marker.

Unwind '.9 m (3 ft) of tape beyond the BOT marker, and cut the tape again.

Shake the can of Magna-SeeM solution vigorously.

Dip the .9 m (3 ft) section of tape in Magna-See™ solution (refer to Figure 6-16). Try to
keep a loop of tape in the bottom of the can.

Work the tape back and forth until the entire .9 m (3 ft) section (except for the ends
being held) has been dipped into the solution.

Allow the tape to dry. Data written on the tape should appear as the solution dries
(Figure 6-17). If necessary, dip the tape again.

766~24

Figure 6-16

Developing Magnetic Tape

766~27

Figure 6-17

Developed Magnetic Tape

6-23

When the tape has been developed, proceed as follows:
a.

Place the developed tape flat on a white background.

Make sure the tape is flat, then place a weight on each end.

Check four points along the reference edge (the edge with the BOT marker) 3.7 cm (l.5
in) apart.

Set the microscope according to Figure 6-18. Lay the penlight flat on the table, positioned so that it shines on the reflector.

Ensure that a distance of .18 ± .08 mm (0.007 ± 0.003 in) from the reference edge to
track 1 exists (see inset in Figure 6-18) at each of the four points mentioned in step c.

NOTE
If the tracking check described above fails, tape path
alignment must be checked. If tape path alignment is
within tolerance, the fault is probably in the head assembly and the head assembly should be replaced.
9.

Install a new BOT marker 4.9 m (16 ft) from the front of the tape on the nonoxide side,
against the reference edge. The reference edge faces the operator when the tape is installed
on the transport.

RECORDED
TRACK

REFERENCE
EDGE

TRANSPARENT
CASE

Figure 6-18

MICROSCOPE

REFLECTOR

TAPE

PENLIGHT
7660-28

Track No.1 Reference Edge Measurement

6-24

6.4.4.4

Erase Head Check - Check erase head functioning as follows:

I. Set up the TFG module:

SS WRT, SS RD and WRT - DOWN
S5-1 through 8 - OFF
S5-9, 10 - ON
S6-1 through 10 - OFF
S4-1 through 10 - OFF
Load a work tape and position it to BOT.

3. Set the maintenance switch to FWD.
4.

Place SS RD on the TFG module up, momentarily, then down.

5. Place the WRT switch on the TFG up and initiate tape motion.
6. Allow the tape to be written for at least 30 seconds, but not more than one minute.

NOTE
Steps I through 6 record an all "Is" tape at low density (full saturation). The following steps check the
ability of the TEI6 to erase a saturated tape by writing all "Os" at high density.
7.

Halt tape motion, place the WRT switch down, and rewind the tape to BOT.

8. Set up the TFG module as follows:
SS WRT, SS RD and WRT - DOWN
S4-1 through 8 - ON
S4-9, 10 - OFF
S5-1 through 8 - ON
S5-9, 10 - OFF
S6-1 through 10 - ON
9. Set the maintenance switch to FWD, place SS WRT on the TFG up, and initiate tape
motion.
10. Allow the tape to be written for at least one minute.
II. Lower the SS WRT switch, and rewind the tape.

12. Set up the oscilloscope as follows:
Horizontal:
I ms/cm
Vertical:
0.1 V/cm (channell)
Vertical Coupling: ac
Triggering:
Auto
Channell triggered
Place the channel I probe to pin A04L I and the probe ground to pin B04C2.

6-25

13.

Initiate forward tape motion. Measure the unerased (residual) signal level for maximum
level. Ensure a good oscilloscope ground while doing this. Maximum level must be less than
400 m V p-p. Failure to meet this criteria (in steps 13, 14, or 15) will require replacement of
the head plate assembly. The erase head is not adjustable in the field.

14.

Rewind the tape. Place the channell probe on pin C04Ll; ensure a good ground. Initiate
forward motion. Check the unerased signal level (maximum = 400 m V).

15.

Rewind the tape. Place the Channel I probe on pin F04R I; ensure a good ground. Initiate
forward motion. Check the un erased signal level (maximum = 400 mY).

6.4.4.5

Read Amplifier Check
NOTE
Paragraphs 6.4.4.5, 6, and 7 require comparison of
read amplifier outputs under varied conditions.
Photocopy Table 6-3, or prepare a similar table.

Table 6-3
Track

Pin No.

A4-LI
B4-BI
B4-MI
C4-KI
C4-LI
D4-PI
D4-RI
F4-PI
F4-RI

2
3
4
5

6
7
8
9

Read Amplitude, Residual Amplitude, and Balance Checks
Read Amplitude

Residual
Amplitude

Reverse
Balance Amplitude

NjA

N/A
- .I • -

NjA

NjA
NjA
NjA

Check the Read Amplifier outputs as follows:
I.

Rewind the tape, and remove it from the transport.

Clean the readjwrite head, erase head, and tape cleaner.

Load a good quality work tape and position it at BOT.

Set up the oscilloscope as follows:
Horizontal:
Vertical:
Trigger:

2 msjcm
2 V jcm (channell)
Normal
Channell triggered

6-26

Set the switches on the TFG module as follows:
S4-1 through 8 - ON
S4-9, 10 - OFF
S5-1 through 8 - OFF
S5-9, 10 - ON
S6-1 through 8 - OFF
SS WRT, SS RD and WRT - DOWN

Place the SS WRT switch on the TFG up, and place the channel I probe to pin A04LI. The
peak-to-peak amplitude of the signal should be in the range of 10 to 13 V. Record the results
in the read amplitude column of Table 6-3 beside track I.

Repeat step 6, for all nine tracks, recording the results in the same column. If any track is
out of the acceptable range, adjust all nine channels to 12 V p-p. The adjustment potentiometers for the tracks are arranged sequentially from top (track 1) to bottom (track 9) on the
G066 module. They are accessible from the side.

Place the SS WRT switch on the TFG module down and rewind the tape.

6.4.4.6 Residual Amplitude Check - Perform the residual amplitude check as follows. (Residual amplitude is the amplitude left on the tape after several read operations. Some amount of erasure can be
expected during the first few read passes due to residual magnetism in the write and erase head poles.):
I.

Set the maintenance switch to FWD and raise SS WRT. Allow start-stop data to be recorded for at least 30 seconds. Place SS WRT down and rewind the tape.

Initiate forward tape motion and allow the tape to run in a forward direction for 15 seconds.
Rewind the tape. Repeat this operation ten times.

Leave the oscilloscope set up as in Paragraph 6.4.4.5. Place the channel I probe on pin
A04LI and initiate forward tape motion. Record the p-p amplifier output in the residual
amplitude column of Table 6-3. Rewind the tape.

Repeat step 3 for tracks 5 (C04LI) and 9 (F04Rl), recording their results in the same column.
NOTE
In steps 3 and 4, the assumption is that the tape does
not run in a forward direction for more than 15 seconds. If there is any doubt, rewind the tape and recheck the forward residual amplitude.

Compare the entries in the residual amplitude column of the table with entries in the read
amplitude column. If the residual amplitude entries show a decrease of greater than 20
percent of any of the three tracks, replace the head assembly and perform the tracking check
(Paragraph 6.4.4.3).

6-27

6.4.4.7

Reverse Balance Check - Perform the reverse balance check as follows:

Rewind the tape.

Place the channel 1 probe on pin A04Ll (oscilloscope still remains set up the same). Initiate
forward tape motion and run tape forward for 10 seconds. Now initiate reverse tape motion
and record the p-p amplifier output in the reverse amplitude column of Table 6-3.

Repeat step 2 for tracks 5 (C04L 1) and 9 (F04R 1), recording their results in the same column.

Compare entries in the reverse balance column to entries in the residual amplitude column.

If the reverse amplitude entries show an increase or decrease of greater than 10 percent, the
tape path alignment must be rechecked or the head assembly may have to be replaced.

6.4.4.8
1.

H607 Clock Check - Perform the H607 clock check as follows:
Set up the oscilloscope:
Horizontal:
Vertical:
Triggering:

1 ms/cm
I V /cm (Channell)
Normal
Positive slope
Channel I triggered

Place the channel I probe to chip E8, pin 5 of the H607 daughter board (5412262)
2.

A pulse waveform should be observed, with a period (leading edge to leading edge) of 5 ms
± 0.5 ms. If the waveform is out of this specification, adjust potentiometer R 16 on the
daughter board so that the waveform period becomes 5 ms ± 0 ms. Refer to Figure 6-19 for
the location of R16.

Resecure the H607 daughter board to the mother board.

6.4.4.9

G066 Read Threshold Check - Perform the G066 read threshold check as follows:

Replace the TFG module (M8912) in slot EF03.

Set up the oscilloscope:
Horizontal:
Vertical:
Triggering:

50ms/cm
I V /cm (channell)
Auto

Place the channel I probe to pin E04D 1.
3.

Load a good work tape, and position it at BOT.

Load and start the TEIO/16 Reliability Test that is applicable to the specific CPU and
DECmagtape system.

Select an 800 bits/in NRZI write operation with an all "1 s" data pattern via the tests conversation mode.

6-28

TO
VACUUM
SWITCHES

M8.

n
U

[ ] TOMOTHER
BOARD

R16

o CLOCK

R49

o UNLOAD DAC

CP-3185

Figure 6-19

H607 Daughter Board

During the NRZI write command, the voltage read on the oscilloscope should be +5.1 ± 0.4

7. Stop the test and rewind the tape.
8. Now select an 800 bits/in NRZI read operation with an all "Is" data pattern.

6-29

During the NRZI read operation, the oscilloscope should indicate +3.9 ± 0.4 V.
NOTE
If any voltage is out of range, replace the G066.

10. The following steps apply to TE16/TM02,3 DECmagtape systems only:
a.

Stop the test and rewind the tape.

Now select a 1600 bits/in phase encoded (PE) write operation with an all "Is" data
pattern.

During the PE write operation, the oscilloscope should indicate +3.6 ± 0.4 V.

Stop the test and rewind the tape.

Now select a 1600 bits/in PE read operation with all "Is" data pattern.

Due to the dual threshold feature, this operation will result in two voltage readings and
a step in the waveform (Figure 6-20). During the interrecord gap, the voltage should be
+3.35 ± 0.4 V. However, when the formatter recognizesthe preamble, the threshold
will drop to -3.25 ± 0.4 V.
NOTE
If an annual PM is to be performed at this time, proceed to Paragraph 6.4.5. If an annual PM is not to
be performed now, continue with Paragraph 6.4.3.17
of the quarterly PM procedure.

RECORD

r"---"'--,

CP-3183

Figure 6-20

Dual PE Read Threshold

6-30

6.4.5 Annual PM Procedure
These steps should be performed on an annual basis:
6.4.5.1

Reel Motor Filter Replacement - Replace the reel motor filters as follows:

Remove the entire filter assembly from the rear of the lower reel motor by unscrewing it in a
counter clockwise direction.

Wrap 1-1/4 turns of Teflon tape around the threads of a new filter assembly, and thread it
into the lower reel motor. Hand tighten it only.

Repeat steps 1 and 2 for the upper reel motor filter.

6.4.5.2 Clean and Regap Reel Motor Brakes - Disassemble, clean, and reassemble the reel motor
brakes using this procedure:

With power off, loosen the Allen head screw located on the clamp for the lower brake.
(Access both upper and lower brakes from the left hand side of the transport; refer to Figure
6-21.)

------..,
GASKET

----1141---.010 in. (.0254 em) CLEARANCE

REEL MOTOR

MOTOR SHAFT

3/16 in. (.48em.l
" - - - - - SPACE OR GAP

-----~

ROTOR

STATOR
CP-3212

Figure 6-21

Brake Assembly

6-31

Remove the clamp, rotor, and rotor disk. Push a cotton swab through each of the inserts
(locating holes) that hold the rotor disk and rotor to ensure they are securely held in the
rotor and that they do not protrude so as to interfere with operation of the rotor disk. If the
inserts are loose, replace the entire brake assembly as a unit (Paragraph 6.6.11.)

Using a dry, clean, lint-free cloth or wipe, clean the following:
a.

The brake surface of the stator (stator is mounted to the reel motor).

Both sides of the rotor disk, including locating pins.

The face of the rotor next to the rotor disk.

NOTE
Avoid skin contact with the brake surfaces; body oils
are detrimental to brake function.
4.

Install the rotor disk into the rotor. Select the mating combination that allows for smoothest
insertion and retraction of rotor disk pins into the rotor locating holes. Try each of the 120degree intervals for the best fit.

Replace the brake, leaving a clearance of .254 mm (.010 in) between the rotor disk and the
stator. When clearance is correct, tighten the Allen screw on the clamp.

With the .254 mm (.010 in) feeler gauge inserted between the stator and the rotor, rotate the
reel motor manually from the front of the unit to see that the brake is spaced uniformly all
around. If necessary, rotate the rotor disk at 120-degree intervals to determine the best
position for uniform separation. An excessively high or low spot is cause for replacing the
brake assembly.

Repeat steps 1 through 6 for the upper brake assembly.

When the above steps have been completed for both reels, rotate both reels, feeling for free
rotation and listening to ensure that there is no squealing from stator/rotor disk contact.

NOTE
Return to Paragraph 6.4.3.12 of the quarterly PM
procedure.
6.5 ADJUSTMENT / ALIGNMENT PROCEDURES
All adjustments and alignment procedures are listed in this section.

6.5.1

Tape Path Alignment Procedure

The tape path alignment procedure should be followed when:
1.

The capstan wheel, capstan motor, roller guide, or fixed guide is replaced.

The forward and/or reverse skew is found to exceed specifications.

An amplitude difference of more than 10 percent is seen between forward and reverse amplifier output.

6-32

A visible change in the tape path across the capstan is apparent when changing from forward to reverse tape motion.

The measurement of the reference edge to track 1 of a developed (with Magna-See™ solution) tape shows a result different from .18 ± .08 mm (0.007 ± 0.003 in), and it is not the
fault of the head.

Diagnostics indicate a "read reverse" error rate that exceeds specification in the monthly
PM procedures (TEI6 only).

Incompatibility with other tape transports persists after performing tape speed, mechanical
skew, capstan ramp, and read amplitude adjustments and all diagnostic tests run.

The objectives of the tape path alignment procedure are:
I.

To establish a single plane for tape to travel from supply reel to take-up reel, independent of
the capstan and fixed guides. This is accomplished by aligning reel hubs and roller guides.

To mount the head plate and fixed guides in the plane established in step I. This is accomplished by establishing the relationship between the reference surfaces used in step 1 and the
surface onto which the head plate and guides are mounted. If the relationship is not nominal, appropriate shims are placed underneath the head plate and guides to bring the reference edges of the fixed guides into the proper plane.

To minimize the amount of distortion to the tape as it travels through the plane established
in steps 1 and 2. This is accomplished by shimming the capstan motor so that the capstan
motor shaft becomes perpendicular to the tape path.
NOTE
The effect of accomplishing the above steps is to minimize static skew, dynamic skew, and tracking error
in both forward and reverse directions. Skew is the
total amount of nonperpendicularity of characters
written on tape. Tracking is defined by ANSI standards as the measurement from the reference edge to
each track center line. Improper tracking takes two
forms:
1.

Read - A tape transport that is tracking incorrectly will not have its read head elements
centered over tracks correctly written by another tape transport.

Write - A tape transport tracking incorrectly
will write data tracks that are not correctly
spaced from the reference edge of the tape.
Therefore, a transport with proper tracking
alignment would not have its read head elements centered on the incorrectly written
tracks.

6-33

6.5.1.1
1.

Basic Tape Path Plane - Perform the following steps to establish a basic tape path plane:
Fixed Reel Hub Height
a.

Remove the trim plate and the inner and outer reel flanges by unscrewing the three
Phillips head pan screws holding them to the hub (Figure 6-22).

Loosen the two Allen head set screws holding the hub to the reel motor shaft.

Using the block gauge (94-05143), set the hub height (Figure 6-23) and then tighten the
set screws.

Reassemble the flanges and trim plate to the hub casting.

SETSCREW \

I
- - - mE:f)

TRIMPLATE

r8-32 x 3/4

(3)

SHAFT

-- ---~

REAR
FLANGE

FRONT
FLANGE

CP-3181

Figure 6-22

Fixed Reel Assembly

6-34

~ BLOCK GAUGE

CP-3180

Figure 6-23

Hub Height Adjustment

Snap-Lock Hub Height - The snap-lock (supply reel) hub height is checked in the same
manner as the fixed reel hub height. The block gauge is pressed against the casting boss
above the hub and referenced to the step in the hub. If adjustment is necessary, circular
shims must be added to or removed from the adapter-rear hub interface. Refer to Paragraph
6.6.1 for disassembly instructions.

6-35

Roller Guide Adjustment
a.

Adjust the two vacuum column roller guides as follows:
( 1)

Prepare a gauge according to Figure 6-24.

2 in.

(5.08 em.)

r---------~--------,

6 in. (15.24 em.)
SCALE

WRAP A PIECE OF .002 in.
(.005 em.) SHIM STOCK
AROUND ONE EDGE AND
TAPE TO SCALE
CP-3175

Figure 6-24

Roller Guide Gauge

(2)

Loosen the roller guide clamp screw, and pull the guide slightly away from the
casting.

(3)

With point A of the gauge contacting the bottom inside surface of the roller guide
(Figure 6-25), push the gauge down toward the casting until the 2-mil shim just
contacts the bottom of the vacuum column. This ensures that the tape guide is set
to the middle of the buffer column.

(4)

Tighten the locking clamp.

Adjust the top center (take-up reel) roller guide as follows:
(1)

Push the roller guide shaft into the casting and roughly (by eye) adjust its height.
Tighten the locking clamp.

(2)

Load a scratch tape and run forward past BOT. Observe the edges of the roller at
points A and B (Figure 6-26) to check for tape puckering. If the tape is puckering,
the clamp should be loosened and the roller moved in or out as necessary.

(3)

The tape should now be run to EOT, rechecking the roller guide for puckering in
the process. Readjust as necessary. Also, check to see that the edges of the tape are
not striking the flanges of the take-up reel.

6-36

CP-3176

Figure 6-25

Roller Guide Adjustment

CP-3177

Figure 6-26 Take-Up Reel Roller Guide

6-37

6.5.1.2 Head Plate and Fixed Guide Tape Path Plane - Proceed as follows to establish the head plate
and fixed guide alignment:
1.

Two measurements are written on the deckplate, underneath the headplate. The first measurement is the depth of the left hand buffer column. It will be in the range of 1.26 cm to 1.28
cm (0.502 in to 0.504 in). The second measurement value is the distance from the top right
hand rail of the left buffer column to the head mounting surface (HMS). It is this measurement that is used to determine the size of the shim that is necessary under the head plate.
This value will be in the range of 2.84 cm to 2.85 cm (1.119 in to 1.123 in). If these values are
not written or are unreadable, proceed to perform the measurements:

NOTES
Measure the depth with the depth micrometer
from the outer surface of the left vacuum column to the surface onto which the head plate
was mounted. The nominal value is 2.84 cm
(1.120 in). Call this value HMS (Figure 6-27).
If this measurement is difficult because only
one side of the micrometer can be seated on the
vacuum column surface, it is, therefore, advised
to:
a.

Place the micrometer base at 45 degrees
to the vacuum column surface (gives
greater seating area).

lVlake the measurement with the
micrometer shaft as close as possible to
the vacuum column wall (gives more leverage to keep the micrometer base seated
and less distance to project error).

Repeat the measurement several times to
verify results.

Now subtract 2.84 cm (1.120 in) from the HMS value obtained in step 1 (i.e., HMS - 2.84 cm
or 1.120 in).

If the result obtained in step 2 is zero or negative, mount the head plate and both fixed
guides without shims.

If the result obtained in step 2 is positive, cut six shims (Figure 6-28), of which the thickness
value is that of the result, and place them as follows: one under each of the three shoulder
screws, one at the vacuum port, and one under each of the two fixed guides. See Paragraph
6.6.6 and 6.6.7 for mounting instructions and Figure 6-29 for locations.

6-38

LEFT VACUUM
COLUMN

DEPTH MICROMETER

HEADPLATE
MOUNTING
SURFACE
8647-12

Placement of Depth Micrometer

DEPTH
MICROMETER

LEFT
VACUUM
COLUMN

HMS

HEAD PLATE
MOUNTING
SURFACE

CP-1991

B. Bottom View of HMS Measurement
Figure 6-27

Measurement of Head Plate Mounting Surface

6-39

1/4 in.
(,64 em.) 0

5/8 in.
(1.59 em.)
(APPROX.)

____----'-.1

CP-3173

Figure 6-28

Shim Dimension

HOLES FOR
MOUNTING
SCREWS (3)

HOLES FOR
MOUNTING
FIXED
GUIDES (2)

HOLE FOR
MOUNTING
HEAD CLEANER

8647-5

Figure 6-29

Location of Shims under Head Plate Assembly
6-40

Summary:
1.

Paragraph 6.5.1.1 procedures set the reel hubs and roller guides in the same plane as the
vacuum columns.

Paragraph 6.5.1.2 procedures set the reference edge of the fixed guides into the plane of the
tape coming out of the vacuum columns and the head centered in that plane.
NOTE
Paragraph 6.5.1.3 procedures will set the shaft of the
capstan motor perpendicular to the tape path, to
minimize distortion of the plane established in steps 1
and 2.

6.5.1.3 Aligning Capstan Motor Shaft Perpendicular to Tape Path - Steps 1 through 21 ensure that the
capstan motor shaft is perpendicular to the tape path. Two conditions can cause nonperpendicularity
of the motor shaft to the tape path: One is the capstan motor shaft not being perpendicular to the
mounting face of the motor. Figure 6-30A and C are examples of this condition. [Specifications allow
.0127 cm (0.005 in) of nonperpendicularity of the motor shaft.] The other condition is nonparallelism
between the motor mounting surface on the back of the casting and the front surface of the casting.
Figure 6-30B illustrates this situation. [Specifications allow .0102 cm (0.004 in) of nonparallelism
between the machined surfaces on the front and back of the casting.]
The effect of the capstan motor shaft not being perpendicular to the tape path depends on the direction
of the non perpendicularity (i.e., whether the motor shaft is pointing up, down, toward the left, or the
right). When the shaft is pointing down (Figure 6-30A), the top of the capstan is away from the casting,
causing the tape to track away from the casting. Hard guiding occurs on the vacuum door glass and the
fixed guides in both forward and reverse directions. When the shaft is pointing up (Figure 6-30B), the
bottom of the capstan is away from the casting, causing the tape to track toward the casting. Hard
guiding occurs on the vacuum column floor and the spring-loaded guides in both forward and reverse
directions. When the shaft is pointing toward the left (Figure 6-30C), the tape tracks away from the
casting in the forward direction and toward the casting in the reverse direction. If the shaft were
pointing toward the right, the opposite would be true (i.e., the tape would track toward the casting in
the forward direction and away from the casting in the reverse direction).
Figure 6-41 is a flowchart of capstan alignment, summarizing and complementing this alignment procedure.
Perform the following steps to align the capstan motor shaft perpendicular to the tape path.
1.

Remove the capstan by loosening the capstan locking clamp with an Allen wrench, and
remove the capstan and clamp.
NOTE
If the capstan is hard to remove, it may be bent and
should be replaced. The inside of the capstan should
be checked for burrs in the area of the slots. The end
of the capstan motor shaft should also be checked for
burrs (Figure 6-31).

6-41

Side View Capstan Motor Shaft
Pointing Down due to
Non-Perpendicularity of Shaft

CP-1994

Side ViewCapstan Motor Shaft
Pointing Up due to
Non-parallelism of
Machined Motor
Mounting Surfaces

CP-1995

Top View Capstan Tipped Toward
Casting on Left Side
and Away from Casting
on Right Side due to
Non-perpendicularity
of Motor Shaft
CP-1996

Figure 6-30

Examples of Capstan N onperpendicularity

CAPSTAN MOTOR
SHAFT
~

======u
Figure 6-31

BURRS TO BE
REMOVED

CP-1987

Location of Possible Capstan Burrs

6-42

Remove the capstan motor by unplugging P4 from the H607 mother board and removing
the four bolts holding the capstan motor on the casting.
CAUTION
Because the bolt heads are in front of the casting and
the motor is on the rear, caution should be used so
that the motor does not fall when the screws are removed.
NOTE
Do not attempt to remove the tachometer portion of
the motor; the two are replaced as an assembly.

3. Check the capstan motor and casting for the following:
a.

The capstan motor specification template does not interfere with the motor mounting
on the casting. If there is interference, remove the template.

The motor does not have any burrs on the mounting surface that would prevent it from
mounting squarely on the casting.

Ensure the mounting surface of both the motor and casting are free of dirt, gummy
substances, and burrs pushed up by machining operations.

Lift up and remove the vacuum column door.

Use the depth micrometer to measure depth, if it is not already known, from the outer
surface of the left vacuum column to the floor of the left vacuum column. Nominal depth is
1.26 cm (0.502 in). Call this value "L VC" (Figure 6-32).

6. Subtract 0.500 from LVC; call the resulting value "X" (L VC - 0.500 = X). Record value
"X," as it will be used in Step 16.
NOTE
"X" is the distance that the inside edge of the tape
should be from the floor of the left vacuum column
when the outside edge is .005 cm (.002 in) from the
outer surface of the left vacuum column. If the capstan motor shaft is perpendicular to the tape path
and if Paragraphs 6.5.1.1 and 6.5.1.2 procedures
were performed correctly, "X" is equal to this distance.
7.

Remount the capstan motor on the casting (four bolts). Tighten the mounting bolts.

8. Clean the capstan with a water-dampened wipe or lint-free cloth. Do not use any cleaner
other than water on the capstan.
9.

Reposition the capstan on the capstan motor shaft. Tighten the clamp.

6-43

8647-13

A.
Figure 6-32

Placement of Depth Micrometer

Measuring Depth of Left Vacuum Column (L VC) (Sheet 1 of 2)

6-44

DEPTH
MICROMETER

LEFT
VACUUM
COLUMN
CP-1990

B.
Figure 6-32

Top View of LVC Measurement

Measuring Depth of Left Vacuum Column (L VC) (Sheet 2 of 2)

10. Load a good quality tape, using the alignment glass (Figure 6-33). It will be necessary to
hold the glass doors with one hand while pressing LOAD with the other (Figure 6-34).

IF THERE IS MASKING TAPE ON
ALIGNMENT GLASS. REMOVE IT
TAPE IS DETRIMENTAL TO
PROPER ALIGNMENT

Ie- 6.9 em . ...I
I (2.7in.l I

i- 6 .gem ...l
I (2.7in.l I

%1
"
"

:'
::

II
1

:',I
35.6cm. II
(14 in.>

': //
',!
:~ f

",I

35.6 em.
(14 in.>

MATERIAL IS
0.12 in. (.3em.l
THICK LEXAN

II
~

CP-1989

o. LEFT COLUMN GLASS

Figure 6-33

B.
Alignment Glass
6-45

Right-Column Glass

RIGHT CO
GLASS

8647-9

Figure 6-34

11.

Using Alignment Glass to Load Tape

Ensure the tape rides in the center of the capstan. This can be done by running the tape
forward several feet and checking the tape position on the capstan. The capstan can be
moved in or out to ensure the tape is in the middle of the capstan.
Ensure the capstan is clamped securely to the capstan motor shaft.

12. Now begin aligning the capstan motor shaft (making it perpendicular to the tape path). This
is done by placing shims between the capstan motor mounting face and the casting surface
onto which the capstan motor is mounted. Shims are placed in the vertical axis to correct for
capstan steering when both forward and reverse tape motion produces the same steering
characteristic (i.e., tape steers toward the deck plate or toward the vacuum column glass in
both directions). Shims are placed in the horizontal axis if forward and reverse tape motion
show opposite steering characteristics. Figure 6-35 shows shim placements.
6-46

DECK
PLATE

SHIM

/
/
,/
.,.......,

CAPSTAN

c. SIDE VIEW

b. FRONT VIEW
Shim placed in horizontal
axis when forward an{j
reverse steering are
opposite.

",--

I
I

c. FRONT VIEW
Shims p laced in vertical
axis when forward and
reverse steer ing are
simi lar.

6
cp- 2121

Figure 6-35

Capstan Motor Shim Placement

6-47

A few hints will assist in performing the procedure in the shortest possible time:
a.

The sequence of tightening the bolts on the capstan motor is important. Each time the
bolts are tightened in a particular procedure, they must be tightened in the same order
and with the same torque. This allows the procedure to be repeated while keeping the
motor in the exact same position.

The use of sharp scissors on the plastic shim stock is necessary to keep the edges from
curling up.
The plastic shim stock sizes are identifiable by the color coding .
.001 in
.002 in
.003 in
.004 in
.005 in
.0075 in
.010 in

Amber
Red
Green
Tan
Blue
Transparent
Brown
c.

The use of a good quality tape is necessary for correct capstan alignment. A used or
abused tape does not run true over the capstan, causing false readings during the capstan alignment procedure.

13. Cut one piece of each type of shim stock as indicated in Figure 6-36. Exact dimensions of
shim stock are not critical; the main idea is to have a manageable size to use as a feeler
gauge. The blunt point shown in Figure 6-36 also minimizes curling of the end that will be
used.

9.5mmT

(318

~BLUNT

inl

====-=5"":'
l-cm-.===::---.t.1
.
(2 in.)

PO I NT

!....
-I

Figure 6-36

CP-1988

Capstan Motor Shim

6-48

14.

Run tape forward from BOT for 5 seconds.

15. Using shim stock and penlight, determine the spacing (Y) between the inside edge of the tape
and the floor of the left vacuum column (Figure 6-37). The method of measuring space Y is
shown in Figure 6-38 and is described here in steps a, b, and c.
a.

Slide the shim stock under the inside edge of the tape at the slot between the top of the
left column and the capstan.

Shine the light on the full width of the tape while moving the shim stock back and
forth; look for puckering.

Measurement has been obtained when a piece of shim stock causes a small amount of
friction yet no visible pucker when sliding back and forth.

NOTE
Value "Y" (obtained in step 15) must be equal to
value "X" (obtained in step 6). The tolerance for
value "Y" is ±.005 cm (±.002 in). In no case shall
value "Y" be less than .0025 cm (.001 in). If it is,
continue with the procedure to determine corrective
action.

FLOOR OF LEFT
VACUUM COLUMN
CAPSTAN

tlyll

MAGNETIC
TAPE
CP-1985

Figure 6-37

Gap (Y) from Tape to Floor of Left Column

6-49

8647-10

Figure 6-38

Measurement of Tape Gap (Y) with Penlight and Shim

6-50

16. Run tape reverse for 5 seconds. Measure tape-to-column spacing to obtain value "Y."
Value "Y" obtained in step 15 must equal value "Y" obtained in step 6, ±.001 in.
a.

Basically, the capstan motor must continually be shimmed, as described in step 12,
until:
•

Value "Y" is no greater than value "X" plus .005 cm (.002 in) in forward or
reverse.

•

Value "Y" is no less than value "X" less .005 cm (.002 in) in forward or reverse
[less than .0025 cm (.001 in) in any case].

•

The difference between forward and reverse does not exceed .0025 cm (.001 in).

Shimming is accomplished as follows:

•

If the tape is too close to the casting in forward and reverse: loosen motor mounting bolts and place a shim under the motor adjacent to the bolt at the 6 o'clock
position, tighten bolts, and repeat steps 14, 15, and 16.

•

If the tape is too far away from the casting in both forward and reverse: loosen
motor mounting bolts, place a shim under the motor adjacent to the bolt at the 12
o'clock position, tighten bolts, and repeat steps 14, 15, and 16.

•

If the tape is too close to casting in forward and too far away from casting in
reverse: loosen motor mounting bolts, place a shim under the motor adjacent to
the bolt at the 3 o'clock position, tighten bolts, and repeat steps 14, 15, and 16.

•

If the tape is too far away from casting in forward and too close to casting in
reverse: loosen motor mounting bolts, place a shim under the motor adjacent to
the bolt at the 9 o'clock position, tighten bolts, and repeat steps 14, 15, and 16.

•

If measurements meet the value "Y" criteria stated in step 16a, go to step 17.

The following guidelines should be adhered to:
•

A .005 in shim is usually a good starting point, but almost any size shim (up to
.010 in) may be necessary to accomplish the criteria stated in step 16a.

•

If a shim size greater than .010 in is called for, it is advisable to rotate the motor
mounting 90 degrees and try again or change the motor.

•

In no case should there be a shim at the two ends of the same axis (i.e., 3 and 9
o'clock or 6 and 12 o'clock). If the formula in step 16b calls for a shim to be placed
at 6 o'clock and there is already a shim at 12 o'clock, decrease the shim size at the
12 o'clock position.

•

It is quite normal to have one shim in each of the two axes. In fact, it is desirable,
as this will make the procedure less subject to irregularities due to variations in
bolt tightening sequences (a shim in the vertical axis will allow the motor to rock
in the horizontal axis). For this reason, when a shimming session is started, place a
shim of half the value in the horizontal axis if a shim is placed in the vertical axis
due to the formula in step 16a (or vice versa); this is only a time-saving starting
point, and both shims may need adjustment on reruns through steps 15 and 16.

6-51

•

It is acceptable to use mUltiple shims under a given bolt to obtain the desired value
(e.g., placing a .004 in and .005 in shim together to obtain .009 in).

•

If steps 15 and 16 seem impossible to accomplish or if measurements taken in
these steps are inconsistent, see step 19 for an explanation of capstan and tape
phenomena.

•

It should be noted that, while a guiding surface exists on the right side of the
capstan (the head plate guides), none exists on the left side (left vacuum column).
This will tend to make forward capstan steering look less severe than the reverse
capstan steering. Therefore, small differences between forward and reverse are
sometimes better corrected by shims in the vertical axis.

17.

Mount a skew tape and adjust the mechanical skew per Paragraph 6.5.3.1.

18.

With the skew tape mounted and scoping PACKET (E4-KI), evaluate capstan alignment as
follows:
a.

Run the tape forward, looking at the PACKET signal on the scope. PACKET width
must be less than 2.5 J.LS.

While the tape is running forward, move the upper spring-loaded guide away from the
tape. PACKET width should not increase more than 4 J.LS; take care not to touch the
tape (Figure 6-39).

CAPSTAN

UPPER SPRING·LOADED
GUIDE WASHER

READ/WRITE
HEAD

CP-3197

Figure 6-39

Upper Spring-Loaded Guide Location

6-52

While the tape is running forward, look at the tape interface to the upper fixed guide
(use a penlight to reflect light off the tape surface); ensure that no puckering exists.

Run tape reverse, looking at the PACKET signal on the scope. PACKET width must
be less than 3.5 f.Ls.

While the tape is running reverse, move the upper spring-loaded guide washer away
from the tape. PACKET width must not increase more than 4 f.LS.

While the tape is running reverse, look at the tape interface to the upper fixed guide;
ensure that no puckering exists.

Corrective action:
a.

If PACKET width increases by more than 4 f.LS in either forward or reverse when the
spring guide is depressed, it should be assumed the tape is running too close to the
casting in that direction of tape travel.

If tape is puckering on the guide in either forward or reverse or if the PACKET width is
excessive in forward or reverse, yet does not increase when the upper spring guide is
depressed, it should be assumed that the tape is running too far away from the casting
in that direction of tape motion.

If neither a nor b exists, go to step 19.

If a or b exists, make final shimming corrections according to the procedure in step
16b.
NOTE
After all shimming is completed in this step, it will be
necessary to verify that the criteria in step 16 (tapeto-column spacing) are still met.

19. Run tape forward. Look in the slot between the inside tape edge and the left vacuum column
floor while the tape is moving forward. If room light is not adequate, shine the penlight
through from the inside of the vacuum column (Figure 6-40).
There should be a constant space (width of light) in this slot as the tape moves forward.
Periodic width change at a very low frequency (less than one per second) is probably due to
tape defects; do not worry about these, unless they are very repetitive and cause wide excursions. Higher frequency width changes (5 to 10 times per second) are usually caused by a
bent capstan. If this occurs, it will be necessary to replace the capstan and recheck the tapeto-column spacing with shim shock feeler gauges.
20. Run tape in reverse. Check the slot width using the criteria in step 19.
21.

Replace the vacuum column door. Run skew tape forward; ensure that the PACKET width
does not exceed 2.5 f.LS. Run tape reverse; ensure that the PACKET width does not exceed .5
f.LS. If either criterion fails, suspect a roller guide adjustment problem.

22. Now perform the tracking check as outlined in Paragraph 6.4.4.3.
23. To return the tape transport to good working condition now that the tape path has been
aligned, it may be necessary to perform a number of electrical checks and adjustments (depending on which parts have been replaced in this alignment procedure). Figure 6-41 is a
flowchart, which indicates checks that should be done and the order in which they should be
accom p lished.
6-53

SHINE
LIGHT
HERE IF
NECESSARY

LOOK
THROUGH
SLOT HERE

CP - 3210

Front View

CAPSTAN

SLOT
TAPE

RIGHT
LEFT WALL OF
VACUUM
COLUMN
CP-1986

Figure 6-40

Right Side V'lew

Capstan Wobble Check

6-54

ENTRY POINTS

ADJUST DC BALANCE
TAPE SPEED

CAPSTAN MOTOR
REPLACED

FWD
REV
REWIND

ADJUST CAPSTAN
RAMPS

HEAD PLATE
ASSEMBLY
REPLACED

-I

READ AND WRITE
SKEW ADJUST SECTION

NEITHER CAPSTAN
MOTOR NOR HEAD
REPLACED

PERFORM TRACKING
CHECK, ERASE HEAD
CHECK, READ AMP
CHECK, RESIDUAL
AMPLITUDE CHECK,
ON LINE AND EVALUA·
TION NRZ/PE

CP·3195

Figure 6-41

Summary, Capstan Alignment Flow Diagram

6.5.2 Snap-Lock Hub Adjustment
Proceed as follows to adjust the supply reel hub gripping force:
1.

Flip the snap-lock lever up to expose an index screw.

Remove the index screw.

While holding the inner hub half, rotate the outer hub half to perform the adjustment. A
clockwise rotation will increase the gripping force, whereas a counterclockwise rotation will
decrease it. Mount a tape and ensure that the lock lever closes smoothly and holds the reel
securely.

When that point is reached, locate the closest index hole and replace and tighten the index
screw.

6-55

6.5.3 Skew Adjustments
The deskewing procedures must be performed whenever a head plate assembly is replaced. All skew
adjustments are listed and defined in this section.
6.5.3.1 Mechanical Azimuth (Read Skew) Adjustment - Proceed as follows to perform the Read Skew
Adjustment:
1.

Clean the tape transport and load a skew tape.

Set up the oscilloscope as follows:
Horizontal:

2 JIs/cm

Vertical:

0.1 V /cm (channels 1 and 2)

Vertical Coupling: ac
Triggering:

Normal
Positive
Channell

Mode:

Chopped

Place the channell probe to pin A04Ll (channell) and the channel 2 probe to pin B04Bl
(channel 2).
3.

Initiate a forward motion command from the off-line maintenance switches. and put the two
channels in close proximity, as shown in Figure 6-42. On the head plate, just above the
recording head, is a Phillips head screw. Adjust this screw so that the peaks of channell and
2 line up in the vertical axis (Y). After performing this course adjustment, move the channel
2 probe to pin F04R 1 (channel 9) and fine tune the adjustment screw so that the peaks line
up.

CHANNEL
1
(PACKET)

II IIIII
I

I
I

I-.... PULSE POSITION
CHANNEL 2

i
CP - 3209

Figure 6-42

Measurement of Pulse Positions Relative to PACKET

6-56

Now initiate a reverse motion command and observe the proximity of the channel 1 peak
versus the channel 9 peak. The two peaks should not be more than 2.5 ~s apart. If they are,
investigate a possible tape path misalignment.

Now perform a PACKET analysis. Place the channell probe on pin E04Kl. This is the
PACKET signal, a logical OR of all nine tracks. Readjust the oscilloscope as follows:
0.5 ~s/cm
1 V / cm (dc coupling)

Horizontal:
Vertical (channell):
6.

Initiate a forward motion command and observe an oscilloscope waveform similar to Figure
6-42. PACKET should be no more than 2.5 ~s from the beginning of the trace to the leading
edge of the latest pulse in the composite waveform. If a wider waveform is observed, the tape
path may have to be realigned or the head may be badly worn.
NOTE
An occasional jump in PACKET width of 1 ~s is allowable (usually due to a tape defect); however, this
should not occur more often than once per second.

6.5.3.2

Now initiate a reverse motion command and observe PACKET. PACKET should not be
wider than 3.5 ~s. If it is, tape path realignment may be necessary.
Write Skew Adjustments - Proceed as follows to perform the Write Skew adjustment:
NOTE
This adjustment must be preceded by the Read Skew
adjustment (Paragraph 6.5.3.1) and is required when
replacing a head assembly or when excessive head
pole wear is suspected.

Set up the oscilloscope as follows:
Horizontal:

0.5 ~s/cm

Vertical:

1 V /cm (channels 1 and 2)

Triggering:

Normal
Positive
Channell

Mode:

Chopped

Place the channell probe to pin E04K1 (PACKET) and the channel 2 probe to pin A04JI
(track I).
2.

Photocopy Table 6-4, or prepare a similar one.

Load a skew tape on the transport and initiate a forward motion command from the maintenance switches.

Synchronize the oscilloscope to the leading edge of PACKET and look at channel 2. Channel 2 is now displaying the position of track 1 within PACKET. Determine the time displacement between the leading edge of PACKET and the leading edge of track 1 pulse, and
record it on the first line of the skew tape bit position column of Table 6-4. Continue tabulating the relative bit positions for tracks 2 through 9.
6-57

Table 6-4

TE16 PACKET Analysis and Write Deskew Worksheet

Track
No.

9/7

Pin
No.

I
2
3
4
5
6
7
8
9

2/B
0/*
4/8
PIC
5/4
6/2
7/1
1/*
3/A

A04JI
A04HI
B04Nl
B04Ll
C04UI
C04S1
E04Hl
E04Fl
F04M1

Channel

Skew Tape
Read
Bit Position

Work Tape
Uncorrected Write
Bit Position

*9-track only

5. After tabulating the data for all nine tracks, run the skew tape in reverse to BOT and remove
it.
6.

Remove power from the transport. Remove all nine wire wraps that jumper the record
pulses (SK CLK A through D) to the Write Deskew Buffer inputs (SK CLK 0 through 7
plus P). For backplane pin numbers, refer to Engineering Drawing D-CS-M8916-0-1, sheets
1 and 2 in the customer print set. Now, with termi-points or temporary wire wraps, jumper
the SK CLK B output to all nine buffer inputs. This is to allow all nine tracks to be written
at the same time for measurement purposes.

Plug the TFG module (M8912) into slots AB03, configured as follows:
S5-1 through 8 and 10 - OFF
S5-9 - ON
S6-1 through 8 - OFF
SS RD, WRT and SS WRT - DOWN

Apply power and load a work tape to BOT. Raise and lower the SS RD switch to load an all
"1 s" data pattern. Place the transport off-line, raise the WRT switch, and initiate forward
motion from the maintenance switches. Allow the transport to perform this continuous
write operation for 5 minutes. Put the WRT switch down and rewind the tape.

9. Now initiate a forward motion command from the maintenance switches and read back
what was just written in step 8. Again, monitor all nine read channel test points and record
the pulse positions under the column labeled "Uncorrected Write Bit Position."
CAUTION
While performing step 9, do not allow the tape to go
past the point where the write operation in step 8 was
terminated, or incorrect data may be gathered.
10. Now, for each track, compute the difference between the position of that track when reading
a skew tape (tape A) and its position when reading a tape (tape B) just written by the head
being deskewed.

6-58

11. If the pulse generated by tape B occurs more than 0.5 f.LS later than that generated by tape A,
connect the Deskew Buffer input for that track to the record pulse labeled SK CLK A. If the
pulse generated by tape B occurs less than 0.5 f.LS later than that generated by tape A, leave
the write clock for that track on SL CLK B.
12. If any pulse generated by tape B occurs more than 1.5 f.LS later than that generated by tape A,
perform the following steps:
a.

Disconnect all tracks connected to SK CLK B, and reconnect them to SK CLK D.

Disconnect all tracks connected to SK CLK A, and reconnect them to SK CLK C.

Connect all tracks where the difference is between 1.5 and 2.5 f.LS to SK CLK B.

Connect all tracks where the difference is greater than 2.5 f.LS to SK CLK A.

If any track shows greater than 4.0 f.LS difference between tape A and tape B, the head
assembly should be replaced, as it is out of tolerance.
NOTE
Some early TM02s contain M8903 modules that
generate NRZI Tape Mark errors if SK CLK C and
D are used. If these skew clocks are used and if
NRZI Tape Mark errors are detected, then M8903
ECO No. 7 must be installed.

13. Now replace all the temporary jumpers with permanent wire wraps.
14. Rewrite tape B using the all "1 s" pattern, rewind the tape, and initiate a forward command.
Examine PACKET and verify that the corrected write time does not exceed the value measured with a skew tape in Paragraph 6.5.3.1, step 6, by more than 0.5 f.Ls. If it does, a further
refinement of the write deskew jumpers may be necessary, in which case, go back to step 9
and proceed to the end of this paragraph again.
6.5.4 Read Amplitude Adjustments
The following procedure should be followed to adjust the read amplitudes. This should be performed
after replacing the read amplifier or head assembly:
1.

Clean the entire tape path and load a good quality work tape.
NOTE
The brand of tape used for this adjustment should be
typical of that used in the operating environment
where the transport resides. Tape output amplitudes
vary among manufacturers by as much as 35 percent.
Also, ensure that tape speeds are set properly (Paragraph 6.5.6).

6-59

Set up the oscilloscope as follows:
Horizontal:

2 ms/cm

Vertical:

2V / cm (channell)

Triggering:

Normal
Channell triggered

Place the channel 1 probe on pin A04L 1.
3.

Configure the TFG module switches as follows:
S4-1 through 8 - ON
S4-9, 10 - OFF
S5-1 through 8 - OFF
S5-9, 10 - ON
S6-1 through 8 - OFF
SS RD and WRT - DOWN

Place SS WRT up and observe the oscilloscope trace. The amplitude of each channel should
be adjusted to 12 V p-p. Refer to Figure 6-43 for adjustment potentiometer locations on the
G066 Read Amplifier. Proceed in this manner through all nine channels. Table 6-5 lists the
various test point locations.

6.5.5 Regulated Power Supply Voltages
Five potentiometers, located on the power supply regulator board, are used to adjust the following
voltages: + 5, -6.4, + 12, + 12 (NRZI), and + 5 (PE). The remaining voltages (+ 16, -16, + 17, and -17)
are not adjustable. A small insulated screwdriver or trimpot tool is required to make the adjustments.
Clockwise rotation of any of the potentiometers increases voltage. Refer to Figure 6-44 for the potentiometer locations. Use a calibrated voltmeter, preferably a DVM. All measurements are referenced to
ground at pin C04C2.
CAUTION
Do not adjust voltages beyond their 105 percent rating, and adjust slowly to avoid overvoltage crowbar.
Remove power from the tape transport. Then remove the regulator board cover; reapply power and
proceed as follows:
6.5.5.1 +5 V Adjustment - Attach the DVM probe to backplane pin DOIA2 (red wire) and adjust
R59 for +5.25 ± 0.05 V.
6.5.5.2 + 12 V Adjustment - Attach the DVM probe to backplane pin A04Vl (yellow wire) and adjust
R37 for + 12.05 ± 0.05 V.
6.5.5.3 -6.4 V Adjustment - Attach the DVM probe to backplane pin C04N2 (green wire), and adjust
R44 for -6.35 ± 0.05 V.
6.5.5.4 +12 V (NRZI) Adjustment - Attach the DVM probe to backplane pin C02J2 (orange wire)
and adjust R26 for +11.875 ± 0.125 V.

6-60

TKl

TK2

B
TK3

TK4

TK5

o
TK6

TK7

TK8

TK9

____________

Figure 6-43

CP-3174

G066 Adjustment Potentiometers

Table 6-5

Read Amplifier Test Points

Track
No.

9/7

Channel

Pin
No.

1
2
3
4
5
6
7
8
9

2/B
0/*
4/8
PIC
5/4
6/2
7/1
1/*
3/A

A04Ll
B04Bl
B04Ml
C04Kl
C04Ll
D04Pl
D04Rl
F04Pl
F04Rl

*9-track only

6-61

tal)

02
R26(+121@
(NRZI

R37(+121@

\:0)

R44 (-6.41

@)
@

R57®
(+5)
(PE)

LOGIC
POWER

H607
POWER

®
R59 (+5.3)

CAPACITOR
BANK

TRANSFORMER

AC HI GND AC LO

DOD

[]o[]o[]
115

230

LOGIC FAN
VACUUM MOTOR

115

NOTES:
1) 1· 5 represent 5 Phillips head screws.
2) 6 represent Allen screw· must be secured very tightly. or
damage to the power supply may
result.

Figure 6-44

CP·3196

TE 16 Power Supply Regulator Board

6-62

6.5.5.5 +5 V (PE) Adjustment (TEI6 only) - Leave the DVM probe at pin C02J2 and ground pin
C03BI (PES L). Adjust R57 for +5.6 ± 0.1 Vdc.
NOTE
Paragraphs 6.5.5.4 and 6.5.5.5 are interactive and
must be performed in that sequence. Paragraph
6.5.5.5 may be ignored for TEI0W IN models.
6.5.6 Capstan Balance and Speed
Adjustments to the capstan servo preamp are made as follows. Refer to Figure 6-45 and Table 6-6 for
the various adjustment locations.
6.5.6.1

Balance

Turn power OFF. Disconnect the erase/write head cable from the M8916 LAW module.
Loosen the two screws in the upper and lower right hand corners of the H607 daughter
board and swing it away from the H607 mother board.

Turn power ON and load a master skew alignment tape. Position the tape at BOT.

Set the oscilloscope's vertical gain to 50 mV /cm and reference mother board TP 13. Connect
the probe ground to TP 12.

Approximately 50 m V of ac ripple will be seen on the oscilloscope. This ripple should be
centered around 0 Vdc. If necessary, adjust R 117 on the mother board to obtain 0.0 ± 0.04
Vdc.

6.5.6.2
I.

Forward Tape Speed - Check forward tape speed as follows:
Set the oscilloscope:
Horizontal:
Vertical:
Triggering:

10 #J,s/cm
2 V/cm (channell)
Normal
Negative slope
Channell triggered

Place the channel I probe to pin B04LI (track 5). If working on a 7-channel
TEIOW /N transport, place the probe on pin A04H I (track 8).
2.

Initiate forward tape motion with the maintenance switches. Check that the negative pulses
are 55 to 57 #J,S apart (Figure 6-8). If the pulses are not within this specification, adjust
potentiometer R91 on the mother board so the spacing is 56 #J,S.

6.5.6.3 Reverse Tape Speed - Initiate reverse tape motion with the maintenance switches. Check that
the negative pulses are 55 to 57 #J,S apart. If they are not within this specification, adjust potentiometer
R87 on the mother board so the spacing is 56 #J,S.

6-63

I
I

I
I
I
I

I
I

TP140
TP130

a
a

4
TP12
0

TP11
0
TP10
0

I
I

co
~

o TP2

P"""" I--

OTP3

TO
DAUGHTER
BOARD

r...~

8
6

I
I

TO CAPST AN MOTOR
AND TACK

R42
0

R2B
0

ID ....
~
~
I- l-

o 0

~ I-~
0

VOLTAGE IN

.... I--

B
B

I
I

-f-TO REEL MOTORS,

L __
CP-3184

Figure 6-45

H607 Mother Board:

6-64

Adjustments and Test Points

Table 6-6

H607 Mother Board Test Points

Test Point No.

Signal

1
2
3

Not used
LOWER BRAKE OUT
UPPER BRAKE OUT
Not used
REWINDCAPH
REV/REWH
FORH
+8V
-8V
UPPER BRAKE OUT H
LOWER BRAKE OUT H
GROUND
SERVO SIGNAL
CAPSTAN BALANCE

5
6
7
8
9
10
11
12
13
14

6.5.6.4 Rewind Tape Speed
1.

Remove the master skew tape and load a scratch tape on the transport. Reconnect the
erase/write cable at the M8916.

Configure the TFG module for an 800 bits/in write of all "1" bits on tape.

After ensuring that there is adequate tape on the take up reel, run the transport in RWD.
Now the negative pulses should be 16.6 J.LS apart. If they are not, adjust potentiometer R84
on the mother board so that the spacing is 16.6 J.LS.

6.5.7 Capstan Current (Acceleration Ramps)
Adjust the FWD/REV acceleration ramps as follows:
1.

Set the switches of the TFG (M8912) module as follows:
SS RD, SS WRT, and WRT - DOWN
S4-9 - OFF

Set the oscilloscope:
Horizontal:

2 ms/cm

Vertical:

0.2 V/cm (channell)

Triggering:

External sync
Negative Slope
Normal

Place the channel 1 probe to P4-7 of the H607 mother board (signal TACH -V). Also,
connect the probe ground to TP 12 and the external trigger probe to pin A03S 1.

6-65

Load a scratch tape on the transport and position the tape to BOT. The tape must have a
write enable ring.

Initiate forward motion and place the SS RD switch (M8912) up. Synchronize the oscilloscope, and a waveform similar to that in Figure 6-46 should appear. The duration of the
negative-going slope should be 7 to 8 ms. If necessary, adjust R 104 (-CUR) on the H607
mother board to obtain this period.

Figure 6-46

Forward Acceleration Ramp Waveform

Now initiate reverse tape motion, and set the oscilloscope trigger level to positive. Synchronize the oscilloscope, and a waveform similar to that in Figure 6-47 should appear. The
duration of the positive slope should be 7 to 8 ms. If necessary, adjust R86 (+CUR) on the
H607 mother board to obtain this period.
NOTE
Deceleration times are not adjustable and will be
somewhat shorter than acceleration times.

Figure 6-47

Reverse Acceleration Ramp Waveform
6-66

6.5.8 Tape Unload Adjustment
Adjust the tape unload circuitry as follows:
1.

With power OFF, extend the transport on its slides and swing the H607 daughter board
away from the mother board.

Ensure that the capstan wheel is clean. This is extremely important, as the capstan wheel is
the velocity feedback element in the unload circuitry.

Load a scratch tape with a standard length tape leader 4.9 ± .6 m or 16 ± 2 ft on the
transport.

With the transport OFF LINE, press UNLOAD. The entire unload operation should take
no less than 5 seconds and no more than 7 seconds to complete. If the transport unloads
within this time frame, leave it alone. If not, proceed with step 5.

Turn potentiometers R28 and R42 on the H607 mother board fully counterclockwise. (For
location, refer to Figure 6-45.) Turn potentiometer R49 on the H607 daughter board to its
mid position.

Now perform the unload operation. If the tape unloads too quickly (Le., less than 5 seconds), turn R28 one-quarter turn clockwise. This reduces the level of voltage and, therefore,
torque applied to the lower motor. Continue adjusting R28 until the unload time parameter
is met.

If the tape unloads too slowly (Le., more than 7 seconds have elapsed, and there is still tape
to be taken up), turn R42 one-quarter turn clockwise. This increases the current applied to
the upper motor. Continue adjusting R42 until the unload time parameter is met. If R42 is
adjusted fully clockwise and the unload is still too slow, adjust R49 on the daughter board
fully clockwise.

6.5.9 Reel Motor Brake Adjustments
Proceed as follows to adjust the reel motor brakes:
1.

With power OFF, loosen the clamp on the motor shaft with an Allen wrench (Figure 6-48).

Insert a .254 mm (.010 in) feeler gauge between the stator and the rotor. When clearance is
correct, tighten the Allen screw on the clamp.

With the .254 mm (.010 in) feeler gauge inserted between the stator and the"rotor, rotate the
reel motor manually from the front of the unit to see that the brake is spaced uniformly all
around. If necessary, rotate the rotor disk at 120-degree intervals to determine the best
position for uniform separation. An excessively high or low spot is cause for replacing the
brake assembly.

6-67

------,
GASKET

-----+j 141"-- 010 In

REEL

(0254 em) CLEARANCE

MOTOR

~CLAMP

MOTOR SHAFT

3/16in. (,48cm)

'-----

-----~

SPACE OR GAP

ROTOR

STATOR
CP-3212

Figure 6-48

Brake Assembly

6.5.10 Read/Write Interlock Assembly Adjustment
To perform the following adjustment, refer to Figure 6-49.

Loosen the two screws securing the switch to the bracket just enough to allow the switch to
be moved.

Loosen the locknut and adjust the screw several turns (detail B, Figure 6-49).

Insert the small end of the setting gauge (No. 29-18610) in front of the roll pin through the
bottom of the bracket so that it fits between the pin and bracket body edge. Tighten the
adjusting screw until the switch just actuates.

4. Tighten the two screws, securing the switch to the bracket and the lock adjusting screw using
the locknut.
5.

Loosen the two solenoid mounting screws on the left of the interlock assembly (Figure 649A).

Insert the large end of the setting gauge in front of the roll pin as described in step 3. Push
the solenoid body forward until the plunger bottoms out, then tighten the solenoid mounting screws, keeping the solenoid body parallel to the upper edge of the bracket.

6-68

SOLENOID SHAFT

_ _ _ SWITCH
CONNECTING
PINS (3)

INTERLOCK ASSEMBLY
ADJUSTMENT
SCREWS
(UNDERSIDE OF
MOUNTING BRACKET)

I,
I
SOLENOID
ADJUSTMENT
SCREWS (LEFT OF
!NTERLOCK ASSEMBLY
AS VIEWED FROM
FRONT OF TE 16)

Figure 6-49

SWITCH
ADJUSTMENT
SCREW
CP - 0096

Read/Write Interlock Assembly

7. Loosen the bottom screws, securing the interlock assembly to the mounting bracket (Figure
6-49C).
8. Insert the ring gauge (No. 29-18608) onto the reel, lock it, and spin the reel to check for even
rotation.
9. Push the interlock assembly forward until the shaft bottoms in the solenoid and the small
spring is fully depressed.
10. Tighten the screws, securing the assembly to the bracket, remove the ring gauge, and check
for free movement of the solenoid shaft in the casting.

6-69

6.5.11 Vacuum Motor Belt Tension Adjustment
Perform the vacuum belt tension adjustment as follows:

Position the belt tension gauge as shown in Figure 6-50; push against the knob at the end of
the spring until the third tab on the gauge just touches the belt.

Read the tension from the scale just under the spring; adjust the belt tension adjustment
screw for 4.1 ± .9 kg (9 ± 2 lb) of tension.

KNOB

BELT TENSION GAUGE

DR IVE PULLEY 50 Hz

MOTOR PLATE
TAKE-UP SCREW

\\
DRIVE PULLEY 60 Hz

BLOWER PULLEY

CP-2119

Figure 6-50

Belt Tension Gauge

6.5.12 Vacuum Motor Pulley Height Adustment
To adjust the pulley height when performing a frequency conversion, proceed as follows:

Remove the black anodized pulley from the motor shaft by removing the set screw holding it
in place.

Inspect the set screw for stripped threads or a damaged tip; replace the set screw if it appears
damaged.

Inspect the motor mounting plate, which should have an open set of four motor-mount
holes. Remove the four socket-head screws holding the motor in place, and remount them in
the open set of holes, as shown in Figure 6-51.

6-70

MOUNT MOTOR IN THIS
HOLE PATTERN FOR 60 Hz

D
MOUNT MOTOR IN THIS
HOLE PATTERN FOR 50Hz
cp- 2130

Figure 6-51

Motor-Mounting Holes for 50/60 Hz Operation

Replace the pulley; use the pulley height gauge (No. 74-16187) to set the pulley height-2.08
cm (0.82 in) for 50 Hz and 1.32 cm (0.52 in) for 60 Hz.

Ensure that the set screw rests on the flat part of the motor shaft. Retighten the set screw.

Now perform the belt tension adjustment (Paragraph 6.5.11).

6.5.13 BOT /EOT Sensor Alignment
Perform the BOT IEOT sensor alignment as follows (reference Figure 6-52):
1. Remove power from the transport.
2. Attach one end of a 4.7k ohm resistor to backplane pin B04El (-6 V). Use a Termi-point to
hold the resistor on the pin.
3. Attach the negative probe of a DVM to the -6 Vend of the resistor and the positive probe to
the free end of the resistor.
4. Apply power to the transport and load a tape to BOT (assuming that the sensor has been
aligned roughly enough to sense BOT).
5. Remove the orange BOT sense lead from pin C02Dl, and attach it to the free end of the
resistor.
6. Loosen the screw holding the BOT sensor, and rotate the sensor until the meter reads maximum. Tighten the sensor screw and check to make sure the DVM reading has not changed.

6-71

+5 V

INFRARED
LED

EQUIVALENT CIRCUIT
DURING ADJUSTMENT

t7~~~~~'STOR
" /r
"

TAPE MARKER

V /
-6V
CP-3186

Figure 6-52

EaT/BOT Sensor Alignment

Verify that the DVM reading is greater than 2.5 V. If it is not, make sure that the sensor
lenses are clean and that the BOT marker on the tape is aligned properly and is new and
shiny. If these items are all right, and the DVM reading is still not greater than 2.5 V, then
the sensor must be replaced.

Next, move the tape forward, using the maintenance panel controls. As soon as the marker
leaves the sensor area, verify that the DVM reading drops to less than 0.5 V. If it does not,
replace the sensor.

When the tape reaches EaT, replace the orange wire on pin C02Dl and remove the brown
wire from pin C02D2. Attach the brown wire to the resistor.

10. Verify that the DVM reading is at least 2.5 V. If it is not, adjust the sensor to 2.5 V and
recheck the BOT reading. If the sensor cannot be adjusted to greater than 2.5 V output at
both BOT and EaT, replace the sensor.
11. With the orange wire on pin C02Dl and the brown wire on the resistor, rewind tape to BOT.
The DVM must now read less than 0.5 V. If it does not, replace the sensor.
12.

Replace the brown wire on pin C02D2, and remove the resistor and DVM.

6.6 REMOV AL AND REPLACEMENT PROCEDURES
This section outlines the removal and replacement procedures for the TE16 transport component
assemblies. The major assemblies referenced throughout this section are shown in Figure 6-1. Also,
Table 6-1 lists the special tools and equipment required for performing these proceedings.
NOTE
The capstan, capstan motor, roller guides, and head
plate directly affect the path of the tape as it moves
through the tape transport. If anyone of these items
requires replacement, an entire tape path alignment
is necessary. Refer to Paragraph 6.5.1 for the tape
path alignment procedure.

6-72

6.6.1 File Reel Snap-Lock Hub
Assemble the snap-lock hub as follows:

1. With the reel motor removed from the transport casting, assemble the adapter to the motor
shaft by sliding it on and lining up the two set screws with the two flats on the shaft. Use the
opposite end of the spanner wrench to set the spacing between the adapter and the motor
mounting surface. Once the spacing (.198 mm or .078 in) has been established, tighten the
two set screws (Figure 6-53).

MOTOR

ADAPTER

CP-3187

Figure 6-53

Reel Motor Adapter

2. Position the motor spacer on the motor mounting surface, making sure to align the mounting holes of the spacer (outer system of clearance holes) with the mounting holes of the
motor. The inner system of holes should line up with the motor cooling holes (see Figure
6-54).
3. Install the motor and spacer on the deckplate using four 10-32 X 1-1/4 socket head cap
screws and four No. 10 split washers. The motor and spacer cooling holes will line up with
the open vacuum slot on the deckplate.
4. Slide four .010 circular metal shims onto the adapter.
5. Place the Woodruf key into the keyway in the adapter, and slide the inner hub onto the
adapter, lining up the keyway.
6. Thread the large 1-3/8 nut onto the adapter and tighten it, using a 1-3/8 socket and rachet
or breaker bar, while holding the inner hub in place with the spanner wrench (Figure 6-55).
7. Lightly lubricate the "0" ring chamfer on both outer and inner hub pieces with silicone
grease.
8. Place the "0" ring over the outer hub assembly.

6-73

MOTOR
~ACER----------~

ADAPTER---.....

CP-3178

Figure 6-54

Motor Spacer Positioning

6-74

APPLY FORCE
ON SPANNER
WRENCH

APPLY FORCE
ON WRENCH

8647-6

Figure 6-55

Tightening Motor Adapter Nut

6-75

9. Lubricate the thrust washer with silicone grease prior to sliding it over the latch lever shaft.
10.

Install the shaft through the outer hub, and thread it into the adapter, making sure that the
"0" ring indicated in step 8 is in place.

11.

Hold the inner hub while rotating the outer hub clockwise, until the outer hub bottoms.
Continue to hold the inner hub and rotate the outer hub counter clockwise until the latch
lever closes smoothly.

12. Wipe away any excess grease from the outer surfaces of the hub assembly and mount a
number of tape reels, fine tuning this rotational adjustment to ensure a constant engagement
of all the reels.
13. Install the index screw through the outer hub into the inner hub. Locate the nearest hole in
the inner hub prior to screwing it in (Figure 6-56).
14. Verify that the write-protect switch adjustment is still within tolerance (Paragraph 6.5.10).

"O"RING~
OUTER HUB

.(:~)\I'l'""_~

INNER HUB
MOTOR

SHIMS

LEVER

INDEX SCREW),

~--

CP3188

Figure 6-56

Snap-Lock Hub Cross Section

6-76

6.6.2 Take-Up Reel
Remove and install the fixed take-up reel as follows:

Remove the fixed take-up reel:
a.

Remove the three Phillips head screws from the front.

The reel now comes apart in three pieces: trim plate, front flange, and rear flange.

Replace the fixed take-up reel:
a.

Replace the rear flange (Figure 6-57) over the hub casting, being sure to line-up the
three mounting holes.

Place the front flange in place over the rear flange, again being careful to line-up the
mounting holes.

Place the trim plate over the front flange and secure it with the three Phillips head
screws.

SETSCREW \

TRIMPLATE

rS.32 x 3/4

(3)

- -IIIE:Q
~

SHAFT

-- ---~

FRONT
FLANGE

CP·3181

Figure 6-57

Mounting Fixed Take-Up Reel

6-77

6.6.3 Capstan Motor/Tachometer
Remove and/or replace the capstan motor and tachometer (12-09786) as follows:
NOTE
The tachometer portion of the assembly is not individually replaceable nor are its brushes.

Remove power from the transport.

Unplug P4 from the H607 mother board.

Remove the capstan wheel (Paragraph 6.6.4).

While supporting the motor from the rear, remove the four Allen head cap screws from the
front of the casting.

Replace the motor by performing steps 2 through 4 in reverse order.

Replace the capstan wheel (Paragraph 6.6.4).

Perform the capstan perpendicularity adjustment (Paragraph 6.5.1.1).

6.6.4 Capstan Wheel
Remove and/or replace the capstan wheel (74-07957) as follows:
1.

Remove the capstan by loosening the locking clamp (between the wheel and the casting)
with an Allen wrench and by sliding the wheel and clamp off the capstan motor shaft.

Check the end of the shaft for burrs (Figure 6-58). If any burrs exist, remove them with
crocus cloth.

CP-1987

Figure 6-58

Location of Possible Capstan Burrs

Install the new capstan wheel by placing the clamp over the split ring and sliding the wheel
over the shaft.

Tighten the clamp on the shaft.

Load a tape and run it back and forth, noting the position of the tape on the rubber capstan
wheel. If the tape is not centered, loosen the clamp and slide the wheel to the point where the
tape is centered, and tighten the clamp.

Perform the capstan perpendicularity adjustment (Paragraph 6.5.1.1).

6-78

6.6.5 Roller Guides
Remove and/or replace the roller guides (70-10145) as follows:
1.

Loosen the locking clamp at the rear of the deckplate casting, and slide the roller guide out
the front (Figure 6-59).

Install the new roller guide in the reverse manner, and align it according to the procedure in
Paragraph 6.5.1.1.

Ensure that a flange cover (74-11590) is affixed to the end of the roller guide shaft with
Locktite 404 (29-16578).

NOTE
Be extremely careful to keep Locktite off the roller
guide. After affixing the flange cover and after the
glue has set, spin the guide to make certain it spins
freely.

ROLLER SHAFT
LOCK CLAMP

CLAMP
MOUNTING
SCREW
CP-3211

Figure 6-59

Side View of Roller Guide

6.6.6 Fixed Guides
Remove either of the fixed guides as follows:
1.

Break the sealing sticker at the end of the guide, in order to expose a slotted screw. U nthread
the screw from the casting. It is now possible to replace any of the damaged parts of the
guide (e.g., ceramic washer, stainless steel post, spring).
6-79

Install the fixed guide by reassembling its component parts and threading the screw back
into the casting.
NOTE
If a shim was employed between the guide and the
casting, be sure to reinstall it as well.

Gently tighten the guide screw in order to secure it; too much pressure will fracture the
upper (reference edge) ceramic guide washer.

6.6.7 Head Plate Assembly
Remove and/or replace the head assembly as follows:
NOTE
The components of this assembly are not field replaceable. Do not attempt to replace or align the
read/write head, erase head, or tape cleaner.
1.

Unplug the read, write, and erase head cables.

Remove the BOT/EaT sensor (Paragraph 6.6.8).

While supporting the head assembly, remove the three shoulder screws holding it in place.

Mount the new assembly in place, using the three screws removed in step 3.
NOTE
If shims were employed between the old head plate
and the casting, be sure to reinstall them under the
new head plate (one under each mounting screw and
one under the tape cleaner).

Plug in the read, write, and erase head cables.

Mount and align the BOT/EaT sensor assembly (Paragraphs 6.6.8 and 6.5.13).

Perform the read and write deskewing procedures and tracking check (Paragraph 6.5.3).

6.6.8 BOT /EOT Sensor Assembly
To remove the BOT/EaT sensor assembly (12-11720), proceed as follows:
1.

Remove power from the tape transport.

Disconnect four wires from the back panel:
C02A2
C02Dl
C02Cl
C02D2

Red
Orange
Yellow
Brown

Locate the sensor mounted on the head plate assembly.

Loosen and remove the mounting screw, being careful not to come in contact with any of the
head surfaces.

Remove the sensor by pulling the wire harness out through the casting.
6-80

Install the new assembly by performing steps 2 through 5 in reverse order.

Align the new sensor using the procedure outlined in Paragraph 6.5.13.

6.6.9 Operator Control Panel
Remove the control panel (70-13339) as follows:
1.

Remove power from the tape transport.

Disconnect the cable that runs from the rear of the control panel to the M8916 module.

Remove the two cable clamp screws.

Loosen and remove the four nuts securing the control panel to the casting.

Remove the control box by pulling both it and the cable straight out of the casting.

Install the new control panel by performing steps 2 through 5 in reverse order.

Perform the Operator Panel Check outlined in Paragraph 6.4.3.1.

6.6.10 Reel Motor
Proceed as follows to remove and replace the reel motor (70-09677) (Figure 6-1):
NOTE
The reel motor brushes are not field replaceable.
1. Remove power from the tape transport.
2. Remove the reel hub assembly. Refer to Paragraphs 6.6.1 and 6.6.2 for instructions.
3. Unplug connector PI from the rear of the H607 mother board.
4.

Remove the pins from the PI plug, and observe that the motor and brake wires are now
disconnected from the connector.

Remove the four socket head screws that secure the motor to the deck casting. Remove the
motor. (When removing the lower motor, also remove the spacer between it and the casting.)
CAUTION
When removing these four screws, the motor must be
supported from the rear. If support is not supplied,
the motor will fall when the screws are removed.

Remove the air filter(s) from the motor(s) (Paragraph 6.6.12).

Using the brake assembly removal procedure (Paragraph 6.6.11), remove the brake from the
rear of the motor.

Reinstall the brake assembly and air filter on the new reel motor (Paragraphs 6.6.11 and
6.6.12).

9. Replace the reel motor and tighten the four screws to a torque value of 1.13 N-m (10 in-Ib)
10. Reinstall the reel hub assembly and replace the pins in plug PI.
6-81

6.6.11 Reel Motor Brakes
Proceed as follows to remove and replace the reel motor brakes (12-10027):

Remove power from the tape transport.

Unplug the brake connector (PI) from the rear of the H607 mother board.

Remove the pins from PI, holding the wires for the particular brake being removed. Observe
that the wires for that particular brake are now disconnected from the respective pin locations in Pl.

Loosen the hub clamp with an Allen wrench and withdraw the clamp, rotor, and rotor disk
(Figures 6-60 and 6-61).

-----....,
GASKET

-----l141.. - - 010 in. (0254 cm) CLEARANCE

REEL

MOTOR
-~

~
~

MOTOR SHAFT

~~ :~ :

(48cm)
SPACE OR GAP

-----~

ROTOR
ROTOR DISC
STATOR SLOT
STATOR
CP-3212

Figure 6-60

Side View Brake Assembly

6-h2

STATOR MUST
BE MOUNTED
WITH SLOT IN
DOWNWARD
POSITION
11-4801

Figure 6-61

Rear View Brake Assembly

Remove the four 10-32 screws securing the stator to the reel motor.

Discard the stator, rotor, and rotor disk, but retain the clamp and cork gasket.

Mount the new stator to the motor using four 10-32 screws. Ensure that the cork gasket is
positioned between the stator and the motor. Ensure that the stator slot is at the "6 o'clock"
position.

8. Install the rotor disk in the rotor. Select the mating combination that allows for smoothest
insertion and retraction of rotor disk pins into the rotor locating holes. Try each of the 120degree intervals for the best fit.
9.

Replace the brake, leaving a clearance of .254 mm (.010 in) between the rotor disk and the
stator. When clearance is correct, tighten the Allen screw on the clamp.

10. With the .254 mm (.010 in) feeler gauge inserted between the stator and the rotor, rotate the
reel motor manually from the front of the unit to see that the brake is spaced uniformly all
around. If necessary, rotate the rotor disk at 120-degree intervals to determine the best
position for uniform separation.
11. Reinsert the brake wires into connector PI (polarity is of no consequence), and plug PI back
into the H607 mother board.

6-83

6.6.12 Reel Motor Filter Replacement
Replace the reel motor filter (12-09956) as follows:
1.

Refer to Figure 6-62. Remove the entire filter assembly from the rear of the lower reel motor
by unscrewing it in a counterclockwise direction.

Wrap approximately 1-1/4 turns of Teflon tape around the threads of a new filter assembly,
and thread it into the lower reel motor. Hand Tighten Only.

Repeat steps 1 and 2 for the upper reel motor filter.

6.6.13 Vacuum Switches and Rubber Sleeves
Proceed as follows to replace the vacuum switches and/or rubber sleeves (12-10477/91-07717) on the
switches (Figure 6-63):
1.

Remove power from the tape transport.

Release the service locks, and pull the transport out on the cabinet slides.

Carefully detach the pair of fast-on connectors from each switch and note the respective
positions for reassembly purposes.

Remove the switch from the bracket by removing the two 2-56 screws and nuts.

Cover the vacuum port of the switch with a 2.5 cm X 2.5 cm (1 in X 1 in) square of Texwipe
(lint-free cleaning material provided in DIGITAL cleaning kit). This prevents contamination of the switch interior. If Texwipe material is not available, do not substitute
anything else; leave the port open. Install Texwipe when it is available.

Replace the rubber sleeve on each switch with approximately 2.2 cm (7/8 in) length of
tubing. Replace the switch when necessary.

Mount the switch to the bracket with two 2-56 screws and nuts.
CAUTION
Guide the switch assemblies so each switch sleeve fits
snugly into its respective hole in the casting without
any lateral strain. Never overtighten the screws securing the vacuum switches to the bracket; damage
to the switch may result.

Reconnect the fast-on connectors to all switches.

Operate the transport off-line to verify switch functions.

6-84

MOTOR AIR FILTER
(DEC port number

12-09956)

H607
POWER
BOARD

BRAKE
ASSEMBLY
TRANSPORT

~ MOTOR AIR FILTER
(DEC port number

12-09956)
10-1300

Figure 6-62

Rear View, Reel Motors

6-85

MOUNTING SCREW NUT---+~
(2 PER SWITCH)
."

LOW OUTLET

(WHEN HOSE IS REMOVED,
COVER PORT WITH 1 in.
(2.5 cm.> SQUARE OF TEXWIPE.--+
SEE STEP 5).
RUBBER SLEEVE
(HOSE)

TRANSPORT
MOUNTING ----~
BRACKET

LOW OUTLET
cP- 0103

Figure 6-63

Vacuum Switches

6.6.14 Vacuum Assembly Drive Belt
Remove the drive belt (12-11581) as follows:
1.

Remove power from the tape transport.

From the rear of the transport, remove the vacuum assembly access cover by releasing the
four 1/ 4-turn fasteners.

Slip the drive belt off the drive motor pulley, and discard the drive belt.

6-86

Install the new drive belt as follows:
I.

Loop one end of the new drive belt around the small pulley on the vacuum pump shaft.

While rotating the belt, slip the other end over the large pulley on the drive motor shaft.
NOTE
The drive pulley has two diameters; the smaller diameter is used in 60 Hz systems and the larger diameter is used in 50 Hz systems.

Refer to Paragraph 6.5.11 for the belt adjustment procedure.

6.6.15 Vacuum Pump Assembly
Proceed as follows to remove and/or replace the vacuum pump assembly (70-09638):
I.

Remove power from the tape transport.

Slide the transport forward on its slides to facilitate access.

From the rear of the cabinet unplug power connector P9 from J9 at the vacuum assembly.

Loosen the hose clamp at the vacuum pump, and slide the hose off the shroud.

Disconnect the ground wire from the rear of the drive motor.

While supporting the vacuum assembly from underneath, remove the four screws holding it
captive to the cabinet. Remove the assembly.

To replace the assembly, perform steps 3 through 6 in reverse order.

6.6.16 Power Supply Regulator
To remove and/or replace the power regulator (54-12242), proceed as follows:
1. Ensure that power to the tape transport is turned off; then unplug the transport from its
outlet at the 861 power controller.
2. Approach the power supply from the rear of the transport cabinet.
3. Remove all plugs (PI through P5) from the power supply board.
4. Remove the regulator board cover.
5. Unplug the three power connections (AC HI, AC LO, and GND) from the bottom left
corner of the regulator board.
6. Remove the five Phillips head mounting screws and the single Allen head mounting screw
(Figure 6-44) from the regulator board.
7. Carefully lift the regulator board out of the cabinet.

6-87

8. To reinstall the regulator board, perform steps 1 through 7 in reverse order.
CAUTION
When replacing a power supply regulator board, apply a thin coating of Wakefield No. 128 compound or
Dow silicon grease to the diode pack heat sink, and
ensure that the Allen head screw is secured very
tightly. This provides adequate heat flow and prevents the diode packs from overheating.
9. Next to the AC HI, AC LO, and GND connector tabs in the lower left corner of the power
supply regulator board are three additional tab connectors and two wires. Two of the tabs
are marked "lIS"; the other (central) tab is marked "230." If the transport is operating from
a 115 V source, the two wires are connected to the two outside tabs (marked 115); for 230 V
operation, the wires are connected to the central tab (marked 230).
10. After applying power to the transport, perform the steps outlined in Paragraph 6.5.5 to
adjust the regulated voltages.
6.6.17 Transformer-Capacitor Assembly
Proceed as follows to remove and/or replace the transformer-capacitor assembly (7009636) (Figure
6-1):
1.

Ensure that power to the tape transport is turned off; then unplug the transport from its
outlet at the 861 power controller.

2. If possible, approach the transformer-capacitor assembly from the rear of the transport
cabinet. If this is not possible, pull the transport forward on its slides and work from either
side.
3.

Remove connectors J2 and J3 from the power supply board.

Remove the regulator board cover.

Remove the transformer-capacitor assembly cover.

Unplug the three power connections (AC HI, AC LO, and GND) from the bottom left
corner of the regulator board.

Remove the four Phillips head mounting screws that hold the transformer-capacitor assembly.
NOTE
Do not remove the two Phillips head screws that hold
the transformer-capacitor assembly bracket.

Remove the Phillips head screw holding the ground strap in place.

9. Carefully lift the transformer-capacitor assembly out of the cabinet.
10. To reinstall the transformer-capacitor assembly, perform steps 1 through 8 in reverse order.

6-88

6.7 CORRECTIVE MAINTENANCE
Corrective maintenance information is provided to guide and assist the Field Service engineer when he
is isolating and repairing faults. Photographs, line art, and tabular summaries complement this section, to aid the Field Service engineer.
6.7.1 Tape Loading/Motion Troubleshooting
This section relates strictly to tape loading/motion problems and does not discuss problems dealing
with motion/data transfer. Refer to Paragraphs 5.2.1 (Tape Loading) and 5.2.3 (Capstan Motion) for
further information.
The following list summarizes where the various adjustment procedures are documented.
Adjustment
Tape Path Alignment Procedure
Snap Lock Hub Adjustment
Skew Adjustments
Read Amplitude Adjustments
Regulated Power Supply Voltages
Capstan Balance and Speed
Capstan Current
Tape Unload Adjustment
Reel Motor Brake Adjustments
Read/Write Interlock Assembly Adjustment
Vacuum Motor Belt Tension Adjustment
Vacuum Motor Pulley Height Adjustment
BOT /EOT Sensor Alignment

Paragraph
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.5.6
6.5.7
6.5.8
6.5.9
6.5.10
6.5.11
6.5.12
6.5.13

Complete troubleshooting information covering Tape Loading, Improper Off-line Tape Motion, and
Improper On-Line Motion is provided in Tables 6-7, 6-8, and 6-9 respectively; refer to the correct
table(s) whenever necessary.
6.7.2 Reel Motor/Brake Control Troubleshooting
This section is divided into three parts:
6.7.2.1

Initial Checks

6.7.2.2

Suggestions for isolating failing components

6.7.2.3

Suggestions for troubleshooting intermittent fail-safe conditions.

6.7.2.1 Initial Checks - Before the TE16 reel motors can operate to maintain the tape loops in the
buffer columns, several requirements must be met.

6-89

Table 6-7

Tape Loading Troubleshooting Chart

Symptom

Possible Solutions

Vacuum motor does not turn on with LOAD
switch, and relay on 5412242 board does not
energize.

Check cable connections from switch box to
M8916, specifically LOAD SW L at E60 pin 12 of
M8916.
Check cable connections from M8916 to H607
daughter board.
Check cable connections from H607 daughter
board to H607 mother board, specifically 12 pin 1.
Check harness between H607 mother board and
5412242 regulator board.
Check for + 17 V.
Possible bad 5412242 regulator board or open relay coil.

Vacuum motor does not turn on with LOAD
switch, but relay on 5412242 energizes.

Check fuse Fl (Figure 6-69).
Check cable harness from 5412242 PI to vacuum
motor assembly.
Possible bad vacuum motor assembly.

Vacuum motor turns on, but reel motors do not
dump tape into columns.

Check for +17 V INT and ± 17 V at H607 mother
board 12.
Check LOAD PULSE L at H607 daughter E45 pin
8 and H607 mother board Ell pin 1.
Check that reel motors are plugged into the H607
mother board.
Check wiring and operation of lower fail-safe
switches.

Reel motors dump tape and vacuum motor
turns off.

Check belt tension on vacuum motor assembly.
Check vacuum hose for leaks.
Check door seal of vacuum cover door.
Check roller guide adjustment.
Check all fail-safe switches.
Check for obstructions (e.g., dirt, paint) at the top
of vacuum columns.

Reel motors dump tape into columns, then vacuum motor shuts off.

Check wiring to all vacuum column fail-safe
switches.
Possible bad fail-safe switch.
Possible bad M8916.

6-90

Table 6-8

Off-Line Tape Motion Troubleshooting Chart

Symptom

Possible Solutions

Tape loads into columns, runs forward then rewinds, and runs off reel.

Check that tape has a BOT marker and that it is
positioned properly [i.e., 4.9 ± .3 m (16 ± 1 ft)]
from the beginning.
Check for -6 Vdc at pin C02B2.
Check for misaligned BOT IEOT sensor.
Possible bad M8916.

Capstan does not respond to motion commands
given by maintenance switches.

Check harness connection between capstan motor
and H607 mother board 14.
Check for +16 Vdc, -16 Vdc, and PWR COM INT
at H607 mother board 12.
Check direction signals FWD (1) H (pin E02N 1)
and REV (1) L (pin E02P2).

Capstan moves tape, but tape leaves vacuum
column.

Table 6-9

Refer to Paragraph 6.7.1.2, Reel Motor Brake
Control Troubleshooting.

On-Line Tape Motion Troubleshooting Chart

Symptom

Possible Solutions

Tape moves in off-line mode but will not respond to on-line commands.

Ensure that the control panel SEL indicator is lit.
If it is not, find out why the formatter or the controller is not selecting the transport.
Check cable connections from controller or formatter to module(s) in slot 1.
Check the following lines for proper level:
STOP
INIT PLS
DRVCLR

AOIV2
AOIU2
BOID2

+3 Vdc
+3Vdc
+3 Vdc

Troubleshoot with the appropriate instruction test
and I or data reliability test. If transport is a TE 16,
use UTILITY DRIVER (BRUTIS).

6-91

Power Supply Voltages - Logic power (+ 5 Vdc) is supplied to the reel motor control circuitry via the
cable connecting the M8916 and 5412262 daughter module. From the 5412262, it is transmitted to the
5412264 along the cable connecting those two boards. Logic power should be present at pin 14 or pin
16 of all 74-series integrated circuits. Motor power is supplied at the middle connector on the 5412264
module. The voltages indicated in Figure 6-64 should be present.

Although the capstan power lines are shown (orange and yellow wires), they are not necessary for
operation of the reel motors and brakes.

t - - - - GREY +16 TO +24 VDC*

BLUE -16 TO -24 VDC

RED +16 TO +24 VDC

5412264
MIDDLE
CONNECTOR

ORANGE +14 TO +22 VDC

YELLOW -14 TO -22 VDC

GROUND

- GROUND*

fo-----RELAY ENABLE

*These signals are connected to the indicated voltage
only when the RELAY ENABLE signal is at ground
potential.
CP-3198

Figure 6-64

Motor Power Voltages

Control Signals - Control signals for reel motor and brake control are supplied along the M8916daughter cable and on the Mate-N-Lok connectors attached to the daughter board. Motor and brake
commands are transmitted from the daughter board to the mother board along the flat cable connecting them. Ensure that all connectors are firmly seated.
Reel Motor Enable - The M8916 generates the REEL MOTOR ENABLE signal when both lower failsafe switches close. Faulty fail-safe switches, harnesses, or an M8916 may cause this signal to remain in
the negated state, preventing the reel motors from turning.
Sequencing Clock on 5412262 - A train of clock pulses should appear at E8 pin 5 of the 5412262; they
are used to sequence the logic that controls reel motors and brakes. The pulses should appear in a 5 ms
rate. If the pulse train frequency is incorrect, it can be adjusted with the R 16 potentiometer (Figure
6-19).

6-92

6.7.2.2 Suggestions For Isolating Failed Components - Failures in the reel motor control portion of
the TE 16 are extremely difficult to troubleshoot, because they are not repetitive enough and, therefore,
cannot be "scoped." The following hints should prove to be very helpful when confronted with a reel
motor failure.
Bypassing the Capstan - The capstan motor can be bypassed so that the "dynamic braking" mode of
operation can be exercised without the danger of immediate tape loop fail-safes. To do this, open the
TEI6 buffer column door and thread the magnetic tape under the capstan (Figure 6-65). Be sure to use
a "scratch" tape, as this procedure does damage tape. Leave a loop in each column so that the loop is
positioned roughly midway between the fail-safe switches in either column (Figure 6-66).
NOTE
If the reel motors are totally out of control, a 1.5 m
(5 ft) section of tape may be cut away from a reel,
threaded as shown in Figure 6-65 and secured at either end with adhesive tape. Now this arrangement
may be manipulated to determine if reel motors are
being properly controlled, but without damage of reel
motors driving tape past fail-safe switches.
Once the loop is properly positioned, close the buffer column door and press LOAD. Vacuum should
be established in a normal fashion, and the LOAD indicator will come on. The capstan will start
moving counterclockwise (forward) and, after about four seconds, will reverse direction in its attempt
to rewind to BOT. Use the maintenance switches to stop the capstan. Now manually move the tape
loops and observe the behavior of the reel motors. Issue forward, reverse, and rewind commands to the
capstan and check each mode of operation. Table 6-10 lists the recommended sequences through
which the loops in the right column can be moved, while Table 6-11 lists the same information for the
loops in the left column. Always start with the tape loop positioned in the center of the column and
then load the motion command.
NOTE
The state of sequencing logic in the reel control logic
is dependent upon the last tape motion command that
the drive executed. For this reason, it is necessary to
be careful to examine operations only under the conditions described in Table 6-10.
6.7.2.3

Suggestions For Troubleshooting Intermittent Reel Operations

Sluggish Loop Performance - Sluggish loop performance is generally due to one of the following items.
A suggested remedy accompanies each problem area:
I.

Insufficient Degaussing of Brake - This can be detected as a medium-to-heavy "drag" when
the reel is moved. Remedy: replace the H607.

Dirty Brake - Disassemble and clean the brake.

Overheated Reel Motor - Sluggishness should be more pronounced with a full reel of tape.
The motor temperature should be too hot to touch. Remedy: replace clogged air filter; if
that does not eliminate the problem, replace the motor.

Clogged Vacuum-Sensing Hole or Vacuum-Sensing Switch - Remove the switch assembly,
clean the hole, and replace the switch assembly.
6-93

_ _- - CAPSTAN

NORMAL

~---- TAPE PATH

TAPE THREADED
UNDER
CAPSTAN

o
o

,
\

o
o

CP-3191

Figure 6-65

Bypassing Capstan, Tape Test Setup

6-94

ROLLER GUIDES

UPPER

=~:~~:FE ~to

LEFT
UPPER
CONTROL
SWITCH

LEFT
LOWER
CONTROL

Xf1

::~TECRH ~o
VACUUM PULLED AT
THESE PORTS

II
I.Y

FAIL-SAFE
SWITCH

lta
---o

o
o

/,1

II1";--

/11I~

/I I

UPPER
FAIL-SAFE
SWITCH
RIGHT
UPPER
CONTROL
SWITCH

RIGHT
LOWER
CONTROL
SWITCH
LOWER
FAIL-SAFE SWITCH
VACUUM PULLED AT
THESE PORTS

00
CP-3190

Figure 6-66

Locations to Remember During Test

6-95

Table 6-10

Loop Motion Sequences For Right Column (Lower Motor)
LOOP POSITION

CAPSTAN
ACTION

Between
Control
Switches

Below Lower
Control
Switch

Between
Control
Switches

Above Upper
Control
Switch

Between
Control
Switches

Moving
Forward

Brake ON
initially

Full power,
Counterclockwise

Brake ON
again

Pulsing
power,
clockwise

Pulsing
power,
counterclockwise

Moving
Reverse

Brake ON
initially

Pulsing
power,
counterclockwise·

Pulsing
power,
clockwise

Rewinding

Brake ON
initially

Full power,
counterclockwise

Pulsing
power,
clockwise

Pulsing
power.
clockwise

Pulsing
power,
clockwise

*For each subsequent turn that the loop travels below the lower control switch, a short "kick" should be felt,
followed by pulsing power.

Table 6-11

Loop Motion Sequences For Left Column (Upper Motor)
LOOP POSITION

CAPSTAN
ACTION

Between
Control
Switches

Below Lower
Control
Switch

Between
Control
Switches

Above Upper
Control
Switch

Between
Control
Switches

Moving
Forward

Brake ON
initially

Pulsing
power,
clockwise·

Pulsing
power,
counterclockwise

Moving
Reverse

Brake ON
initially

Full
power,
clockwise

Brake ON
again

Pulsing
power,
counterclockwise

Pulsing
power,
clockwise

Rewinding

Brake ON
initially

Full power,
clockwise

Brake ON
again

Full power,
counterclockwise

Pulsing
power,
clockwise

*For each subsequent turn that the loop goes below the lower control switch, a short "kick" should be felt,
followed by pulsing power.

6-96

Intermittent Loop-Outs - Intermittent loop-outs (fail-safes) are generally caused by a failed mechanical
component or connection. The following are some characteristic loop-out symptoms, followed by a
suggested remedy:
1.

Loop Winds Up 5+ cm (2+ in) Above Fail-Safe Switch - This is probably due to an intermittent open in a vacuum-sensing switch, caused by contamination. In such a case, all vacuum-sensing switches should be replaced.

Loop Winds Up Slightly Above or Below Fail-Safe Switch - This is probably an intermittent
open in the reel motor leads or contamination of the motor brushes. Replace the motor
and/or the H607.

Loop Winds Up Below Lower Fail-Safe Switch in Right Hand Column - This symptom may
occur only during rewinds or during both rewind and normal reverse operation. Generally,
this is caused by a false trigger of the LOAD PULSE circuitry. Check for proper filtering of
the LOWER FAIL-SAFE H signal on the M8916. Also, check for proper filtering at E4 pin
9 on the 5412262 module (this is the LOAD PULSE one-shot). Ensure that the electrostatic
shield is installed between the 5412262 and 5412264 modules.

Fail-Safe Occurs Only During On-Line Read/Write - If a fail-safe condition occurs only
during on-line motion when reading and writing, the problem may be caused by an intermittent control cable (BC06R) connecting the TEI6 to its controller.

6.7.3 Clocks Troubleshooting
Figures 6-67 and 6-68 provide a guide for analyzing TEI6 (TEIO) transport clock-related problems.
Refer also to the engineering print set and Paragraph 5.3.4(M8911-YB) of this manual. Careful evaluation of the trouble symptoms and good troubleshooting judgment are necessary to successfully
apply Figures 6-67 and 6-68 to practical troubleshooting situations.

CP-3192

Figure 6-67

TE 16 Clock Troubleshooting Flow Diagram (Sheet I of 2)
6-97

TE10W MASTER
TE16
OR
TE10W SLAVE

TE10N

YES

PERSUE CLOCK
TO CONTROLLER
OR FORMATTER

REPAIR OR
REPLACE
M8913

PERSUE
SIGNAL TO
CONTROLLER

YES

LAW4
REPAIR OR
REPLACE
M8927

DIAGNOSE
REASON FOR
NO MOL SIGNAL
CP-3193

Figure 6-67

TE16 Clock Troubleshooting Flow Diagram (Sheet 2 of 2)

6-98

YES

SC3
REPAIR OR
REPLACE
M8911·YB

YES

DIAGNOSE FAilURE OF
ACCl (SB) l TO NEGATE.
SEE TAPE MOTION
(SEC. 5.3.6.12) AND
TAPE MOTION TROUBLE·
SHOOTING (SEC. 6. 7. 1 \.

TE16 OR
TE1Cl't'11 SLAVE

YES

REPAIR OR
REPLACE
M8913

PURSUEWRT
ClKIN
CONTROllER
OR FORMATTER
CP·3194

Figure 6-68

TE16 Clock Troubleshooting Write Clock Signals

6-99

6.7.4 Power Supply Troubleshooting
This section relates to the failure analysis of the power supply, especially the 5412242 regulator module. both internal and external to the module. Refer also to Paragraph 5.3.2 for theory and Engineering
Drawing D-CS-5412242-0-1, the circuit schematic.
The following list summarizes where the various adjustment procedures are documented. If, during
troubleshooting, one or more of these adjustments must be performed, refer to the relevant section for
the correct procedure.
Adjustment
+5 Vdc
+ 12 Vdc
-6.4 Vdc
+ 12 Vdc (NRZI)
+5 Vdc (PE)

Paragraph
6.5.5.1
6.5.5.2
6.5.5.3
6.5.5.4
6.5.5.5

6.7.4.1 Troubleshooting Rules - When troubleshooting power supply problems, be sure to adhere to
the rules listed below:
1.

Ensure that power is turned OFF and the transport is unplugged before attempting to service the power supply.

Ensure that capacitors C6, C8, Cll, CIS, and C20 are discharged before servicing the power
supply. A 10-to-l00 ohm 10 W resistor can be used to hasten the discharge of the capacitors.
(Be sure power is 0 FF.)

Any cartridge-type fuse that must be replaced can be replaced without removing the regulator module portion of the power supply.

For proper operation, all hardware must be secured tightly to approximately 1.36 N-m (12
in-Ib). All hardware should be replaced with identical hardware replacement parts.

The module portion of the power supply may be removed from its mounting area by removing five Phillips head screws and one Allen head screw.

If the 5412242 regulator fails, it should be replaced as a unit. However, if the need arises,
troubleshoot the regulator to the component level. Should component level troubleshooting
take place, the following rules must be adhered to:

When replacing semiconductor components that are secured to the heat sink, apply a
thin coat of Wakefield No. 128 compound to the heat sink contact side (bottom) of the
semiconductor. Insulating wafers are not required.

If a diode pack is replaced, the Allen screw used to secure it must be secured very
tightly. If the screw is not tightened securely, overheating of the diode pack can result.

While troubleshooting with power on and a load applied (P5 plugged in), do not remove
plug PI from the regulator board or allow the small fan above the heat sink to stop turning,
or damage to the regulator will result.
CAUTION
V oltages up to 220 Vac are present on the power supply regulator module. Use caution when making
measurements and adjustments with power applied to
the transport. Keep one hand behind your back or in
a pocket, and do not come in contact with any metal
parts on the transport.
6-100

6.7.4.2 Troubleshooting Hints
I.

Make a visual examination of the circuitry, check for burnt printed circuit board etch, oil
leakage from capacitors, and loose connections. A good visual check can prove to be a quick
method of locating the cause of a malfunction.

The +5, + 12, and -6.4 V regulators contain overvoltage detection circuitry. If anyone of
the potentiometers (used to adjust regulated output voltage) is adjusted too far clockwise,
the corresponding Crobar circuit may trip. To avoid this, adjust the particular potentiometer fully counterclockwise and readjust it per Paragraph 6.5.5.

6.7.4.3 Troubleshooting Charts - In checking the various areas of the power supply, the rules listed in
the preceding section should be adhered to. In addition to the main troubleshooting chart (Table 6-12),
a separate fuse chart (Table 6-13) is included. Also, refer to Figure 6-69 for fuse locations.

Table 6-12

Power Supply Troubleshooting Chart
Cause
Transformer /Capacitor Bank

Problem

5412242 Regulator

No +5 Vdc (J5; 1,7)

• F4, F5, or F 12 open
• D9 totally open
• + 5 V adjusted too high (Crobar)
• C6, C8, or C9 shorted
• D 15 shorted anode to cathode
• R64, R65, R66 open

+5 Vdc output
too low

• EI (723) bad
• Q5 (2N5302) open
• Q6 (2N3055) shorted
• D9 partially open

+5 Vdc output
too high

• EI (723) bad
• Q5 (2N5302) shorted
• Q6 (2N3055) open
• DI6 open

No + 12/+5 Vdc
(J5; 8)

• F5 open
• R32 open
• DIO and DI9 or DI8 and
D27 open
• CII or CI3 shorted

+ 12/+5 Vdc output
too low

• E2 (723) bad
• Q7 (2N3055) open
• DIO, D18, D19, or D27 open

+ 12/+5 Vdc output
too high

• E2 (723) bad
• Q7 (2N3055) shorted
• E5 (75451) shorted

6-101

• C5 or C6 shorted
• Transformer open (no voltage at
J2; 10, 13)

• C5 shorted
• Transformer open (no voltage at
J2; 8, 12)

Table 6-12

Power Supply Troubleshooting Chart (Cont)
Cause
Transformer / Capacitor Bank

Problem

5412242 Regulator

No +12 Vdc
(J5; 5)

• F5 or FlO open
• Diodes 010 and 019 or 018 and
027 open
• Cll, C15, or C18 shorted
• R41 open
• 022 shorted anode to cathode

+ 12 Vdc output
too low

• E3 (723) bad
• Q8 (2N3055) open
• DI0, D18, D19, or D27 open

+ 12 Vdc output
too high

• E3 (723) bad
• Q8 (2N3055) shorted
• D23 open
• D21 shorted

No -6.4 V dc (J5; 4)

• Fll or F13 open
• D 11 totally open
• C20 or C22 shorted
• D24 shorted

-6.4 Vdc output
too low

• E4 (LM304) bad
• R50 open
• Q10 open
• Q 11 shorted
• D12 partially open
• Q12 shorted

-6.4 Vdc output
too high

• E4 (LM304) bad
• Q 10 shorted
• Q11 open
• D20 open
• D25 shorted

No + 16 Vdc (J4; 6)

• F9 or F14 open
• Dll open

• C4 shorted
• Transformer open (no voltage at
J2; 1, 2)

No -16 Vdc (J4; 2)

• F8 or F13 open
• 011 open

• C3 shorted
• Transformer open (no voltage at
J2; 2, 3)

No +17 Vdc (J4; 1)

• F6 open
• D12 open

• C2 shorted
• Transformer open (no voltage at
J2; 14, 15)

No -17 Vdc (J4; 7)

• F7 open
• D12 open

• C1 shorted
• Transformer open (no voltage at
J2; 9, 14)

• C5 shorted
• Transformer open (no voltage at
J2; 8, 12)

• C3 shorted
• Transformer open (no voltage at
J2; 2, 3)

6-102

Table 6-13

Fuse Chart·

Fuse

Type

Indication When Fuse is Open

5ASB

Vacuum motor not on

115 V = 6-1/4 ASB
230V = 4ASB

No voltage outputs in 115 V configuration
Low voltage outputs in 230 V configuration

15 ASB

No +5 Vdc
No indicators
No logic response

3ASB

No +5 Vdc
No +12 Vdc
No +5/+12 Vdc
No logic response
No indicators

20A

No + 17 Vdc to H607 power board
No LOAD function
No brakes

20A

No -17 Vdc to H607 power board
No reel motor action

No -16 Vdc to H607 power board
No reverse capstan

No + 16 Vdc to H607 power board
No forward capstan

FlO

.75A

No +12 Vdc
No write current

Fll

.75A

No -6.4 Vdc
No EOT /BOT sensed
No read data

F12

15 A

No +5 Vdc
No indicators
No logic response

F13

15 A

No -16 Vdc; therefore, no reverse capstan.
No - 6.4 Vdc; therefore, no EOT /BOT sensed.

F14

15 A

No + 16 Vdc; therefore, no forward capstan.

*Refer to Figure 6-69 for location of fuses.

6-103

(07)

0 2

~oo)

~Ql)
F10

I I

F11

~F12

d
J4

@
6

F14Q QF13

0
BB
J2

®
4

AC HI GND AC LO [ ]

DOD

[]

115

230

115

CP-3207

NOTES:
1) 1-5 represent 5 Phillips head screws.

2) 6

represent Allen screw· must be secured very tightly, or
damage to the power supply may
result.

Figure 6-69

5412242 Regulator Board Fuse Locations

6-104

6.7.4.4 Troubleshooting Blown Fuses - Do the following to troubleshoot a blown fuse.
Steady State - If a particular fuse blows every time power is applied to the transport and conventional
troubleshooting methods are exhausted, follow steps outlined in Figure 6-70, the Fuse Troubleshooting Chart.

UNPLUG P1
THROUGH P5
FROM 5412242
AND APPLY
POWER

YES

END

CHECK LINE
VOLTAGE AND
WIRING HARNESS
FOR SHORT
CIRCUITS
CP-3203

Figure 6-70

Fuse Troubleshooting Chart (Sheet 1 of 7)

6-105

PLUG P21NTO
J2 AND APPLY
POWER

YES

REPLACE
TRANSFORMER
T1

PLUG P31NTO
J3AND
APPLY POWER

YES

DIAGNOSE WHICH
CAPACITOR IN
BANK IS LEAKY
OR SHORTED

CP-3204

Figure 6-70

Fuse Troubleshooting Chart (Sheet 2 of 7)
6-106

PLUG P1 INTO
J1 AND APPLY
POWER

YES

REPLACE SMALL
FAN ABOVE
REGULATOR
HEAT SINK

PLUG P51NTO
J5 AND APPLY
POWER

YES

CP-3206

Figure 6-70

Fuse Troubleshooting Chart (Sheet 3 of 7)

6-107

YES

REPLACE
VACUUM
ASSEMBLY

PLUG P41NTO
J4AND
APPLY POWER

YES

YOU ARE BACK TO
START. SOMETHING
DISLODGED AND THE
PROBLEM IS GONE.
TROUBLESHOOT THIS
INTERMITTENT
PROBLEM
CP-3205

Figure 6-70

Fuse Troubleshooting Chart (Sheet 4 of 7)

6-108

REMOVE ALL
MODULES FROM
TE 16/10
BACKPLANE AND
APPLY POWER

WIRE FROM PIN
C02A2 AND
APPLY POWER

CP-3199

Figure 6-70

Fuse Troubleshooting Chart (Sheet 5 of 7)

6-109

REPLACE MODULE
ONE AT A TIME,
APPLYING POWER
AFTER EACH
MODULE IS

NOTE:

When replacing the M891S,
do not plug the Berg Connector
Cables into Pl and P2
at this time.

YES

REPLACE
MODULE LAST
INSERTED

PLUG CONTROL
BOX INTO
M891S-J1

YES

PLUG CABLE
FROM HS07
DAUGHTER J1
INTO M891S-J2

YES

YOU ARE BACK TO
DECISION BLOCK 13,
SOMETHING WAS
DISLODGED AND
THE PROBLEM HAS
VANISHED.
TROUBLESHOOT THE
INTERMITTENT
PROBLEM

REPLACE HS07
OR BERG CABLE
BETWEEN HS07
AND M8916

CP-3200

Figure 6-70

Fuse Troubleshooting Chart (Sheet 6 of 7)

6-110

REMOVE P1 AND
P4 FROM H607
MOTHER BOARD
AND APPLY
POWER

YES

PLUG P41NTO
J4AND APPLY
POWER

YES

PLUG P1 INTO
J1 AND APPLY
POWER

YES

YOU ARE BACK TO
DECISION BLOCK 17.
SOMETHING WAS
DISLODGED AND THE
PROBLEM HAS
VANISHED.
TROUBLESHOOT THE
INTERMITTENT
PROBLEM

ISOLATE WHICH
R&EL MOTOR OR
BRAKE IS SHORTED
AND REPLACE

CP-3201

Figure 6-70

Fuse Troubleshooting Chart (Sheet 7 of 7)

6-111

Only When Tape Motion Occurs - If a particular fuse blows every time a motion command is given (onor off-line) and conventional troubleshooting methods are exhausted, the following subassemblies
should be considered for replacement:
H607
M8916
Berg cable going from M8916-J2 to H607 (daughter) Jl
Reel motors
Capstan motor
Brakes
6.7.5 Troubleshooting with Off-Line Write Operations
When performing off-line write operations with the TFG (M 8912) module, five signals do most of the
testing. If there is no analog signal at all when performing an off-line write operation, check the items
listed in Table 6-14. If only a few channels (signals) are missing, check the signals listed in Table 6-15.

Table 6-14

Signals to Check When All Channels are Dead

Signal

Source

What to Look For

Write Voltage

C02J2, K2
(orange wire)

+12 V in NRZI mode and +5.6 V in PE mode

CLK L

D03Cl

900 ns clock

REC PLS L

D03L2

With M8912 S5-9, 10 on, one low-going pulse
every 40 J.LS

SKEW CLOCK A
SKEW CLOCK B
SKEW CLOCK C
SKEW CLOCK D

A02Bl
A02Ll
A02Nl
A02Rl

900 ns pulse every 40 J.LS
900 ns pulse every 40 J.LS
900 ns pulse every 40 J.LS
900 ns pulse every 40 J.Ls

Test Data Inputs

Ref. D-CS-M8916
sheets 1 and 2

Check all inputs for low logic levels (less than
0.8 V). If the test data inputs are high, the transport
will write all Os in all tracks.

NOTE
All of the above checks are to be made with the TFG
module (M8912) in slot AB03 and the WRT SW in
the up position.

If all these signals are present, the only remaining possibilities are: a bad head, head cable, or M8916
module.

6-112

Table 6-15

1.
2.

Signals to Check When Some Tracks Are Missing
Test Point

Track I
Track 2
Track 3
Track 4
Track 5
Track 6
Track 7
Track 8
Track 9

B02el
B02B2
B02FI
A02PI
A02S1
A02T2
A02VI
A02BI
A02AI

NOTES
For each track, make sure that the associated
clock skew jumper is properly wire wrapped.
For each track, make sure that the data coming
from the multiplexers is at a logic high.

Table 6-16 Trouble Analysis of Data Reliability Diagnostic
Problem

Remedy

Runaway: A runaway condition exists when
the program starts and depressing the HALT
key does not stop tape motion.
Symptoms:
No CLOCK (SB) L(144 kHz, 7 J.1s
period) on wire wrap pin DO lEI.
(See sheet 2 of M8911 schematic.)

Check for bad cable.
Check for bad cable connector card.
Check for bad M8911.
Check for wire wrap pin short.
Check that jumper is installed on M8911.
Check M8911.
Check M8913YA.

Pin DO I E I stays at ground level.

Check for bad cable.
Check for bad cable connector card.
Check for bad M8911.
Check for wire wrap pin short.

Pin DO I E I stays at a logic level
(approximately +0.3 to +3.4 Vdc).

Check that jumper is installed on M8911.
Check M8911.
Check M8913Y A.

6-113

Table 6-16 Trouble Analysis of Data Reliability Diagnostic (Cont)
Problem
No CLR READ BOARD L on pins
C03V1 and C0411: Approximately
12.5 ms after SET pulse, a series of
100 ns negative going pulses should
appear on pins C03 V 1 and C0411.
These pulses should be 28 ms apart
and within 0.5 V of ground.

Remedy
Check C03V1 and C0411 for shorts.
Check the following G066 output pins for shorts:
A04B1
A04F1
B04F1
B04KI
C04P1
C04R1
D04V1
E04E1
F04K1
Replace or repair M8911.

G066 outputs stay low and will not
reset.
Unsafe (UNS) error bit asserted in the
error register (TE16 only): Unsafe error
indicates that the formatter attempted to
execute a command with a TE16 that was
not on-line or that the formatter itself is
faulty.
Symptoms:
Check MOL(SB)L at pin FO 1V2 for
+0.2 to +0.4 Vdc. (See sheet 4 of
M8916 schematic.)

Replace or repair G066.
Check that TE 16 is on-line.

Check that cable connector cards are not loose.
Check that cables are routed correctly.
Check cables.
Check cable cards.
Check formatter.

MOL is low.

Check that cable connector cards are not loose.
Check that cables are routed correctly.

Set the TE 16 to off-line mode.
MOL does not go to +3 Vdc.

Check cables.
Check cable cards.
Check formatter.

On-line mode is selected at the switch
box but the TE 16 goes off-line when
the program is started.

Trouble is in formatter.
Replace M8916.

REWIND(SB)L on pin C01P2 stays low.

Trouble is in formatter.

REWIND(SB)L on pin C01P2 changes
state.

Replace M8916.

Operation Incomplete (OPl) error

Run TE 16 Utility Driver Diagnostic.
Go to Paragraph 6.7.7.

6-114

6.7.6 Troubleshooting Using the Data Reliability Diagnostic Program
When troubleshooting nondata transfer problems, reference Table 6-16 for runaway, UNS, and OPI
errors. When troubleshooting NRZI mode problems, run the TE16 (or TE10) Data Reliability Program using pattern 1 (all Is), 800 bits/in NRZI, 20 char/record. Reference Table 6-17 and Figures 6-71
and 6-72 to analyze the results.
NOTE
If an OPI error occurs with a VPE error, troubleshoot the OPI error first. This type of problem is
usually caused by too few RSDO pulses.
Table 6-17 Trouble Analysis of Data Reliability Diagnostic Using Pattern 1
Problem

Remedy

CRC and LRC errors

Check gain adjustment of G066.

Symptoms:
1. Look for a dead channel by letting
the program run until some error
printouts are obtained.

Check the WD line of the dead channel with an
oscilloscope triggered from the REC line. The
waveform of Fig. 6-71 should be obtained.

If the error printout resembles
CRC 377-777
LRC 377-777
the parity channel is dead.
If the error prin tou t resem bles

BN: 20
G 377
B 357

Check G066.
Check read head cable.
Check read head.,
Repair or replace M8916.
Check write head cable.
Check write head.
Check RD line.
Check M8911 and cables.
Check G066 and cables.
Check M8913 and cables.

a dead channel exists. 1
2.

Analog signal for dead channel 2
is missing or distorted. Check
analog signals (Fig. 6-72A) on
pins A04LI, B04B 1, B04M1,
C04K1, C04L1, D04P1, D04R1,
F04P1, and F04Rl. Mount
a skew tape and check the read
channel (Fig. 6-72B) on pins
A04B1, A04F1, B04F1, B04KI,
C04P1, C04R1, D04V1, E04E1,
and F04K1.

Repair or replace M8916.
Check write head cable.
Check write head.
Check RD line.
Check M8911 and cables.
Check G066 and cables.
Check M8913 and cables.

6-115

Table 6-17 Trouble Analysis of Data Reliability Diagnostic Using Pattern 1 (Cont)
Problem

Remedy

Read channel is bad.

Check G066.
Check read head cable.
Check read head.

Read channel is good.

Repair or replace M8916.
Check write head cable.
Check write head.
Check RD line.
Check M8911 and cables.
Check G066 and cables.
Check M8913 and cables.

CRC, LRC, and VPE errors without
data errors

Check for "clean" analog signals (Fig. 6-72A).
Check that the data pulses are approximately
10 V p-p.
Check that the CRC and LRC pulses are less than
5 V above and below ground.
Check pin E04Kl for the packet waveform shown
in Fig. 6-72C, D. Ensure that each pulse is less
than 2 IlS wide and that pulses occur every 28 IlS.
Check that logic "highs" are greater than +2.4 Vdc
and aU logic "lows" are less than +0.8 Vdc.

Nonexecutable Function (NEF) error
Symptoms:
1.
The Phase Encoded Status
Signal (PESB) signal is incorrect.
The signal should be +3 V dc
for density 0, 1, 2, and 3, and
o volts for density 4,5,6, and 7.
Nonstandard Gap (NSG) error

Check that WRL (Write Lock) at pin FO 1K2 is
at +3 Vdc. 3
Check that DEN lines are in correct state.
Check that 7 CH is not floating.

Check read circuitry.

Excessive number of RSDO pulses
are being generated.
Format error (FMT)

Stop and restart the program and retype the
format code.

Format code formatter control
register (bits 4, 5, 6, and 7 of
location 172432) is not 14.
6-116

Table 6-17 Trouble Analysis of Data Reliability Diagnostic Using Pattern 1 (Cont)
Problem

Remedy

Illegal Tape Mark (lTM) error

Check for system fault.
Check for bad tape.
Check data channels 0, 1, and 4.

When the program starts, check
the response to TM = O.
Typed response is 0 or RETURN.

Check for system fault.

Typed response is 1.

Check for bad tape.

Typed response is 1, and ITM is
printed more than once.

Check data channels 0, 1, and 4.

Frame Count (FCE) error.
Error occurs at end of read operation.

Check for 18 RSDO pUlses.

Error occurs at end of write operation.

Trouble is in formatter or Massbus controller.

Drive Timing Error (DTE)
Data Bus Parity Error (DBPE)
Control Bus Parity Error (CBPE)
Register Modification Refuse (RMR)
Illegal Register (lLR)
Illegal Function (ILF)

Trouble is in formatter, controller, or
processor.

To determine which channel is dead,
convert the G and B numbers, which
are in octal, to binary.
Channel4

Channel 0

G = 377 = 011 111 111

B=357=011101111
Channel 0 is the least significant
(right-most) bit. In the above example,
channel 4 is dead.

6-117

If WRL is at ground, a write-lock condition
will exist and it will be impossible to
execute a write command. Refer to the
M8916 circuit schematic.

Table 6-17 Trouble Analysis of Data Reliability Diagnostic Using Pattern 1 (Cont)
Problem
2.

Remedy

Convert the data channel number to
the physical track number as follows:
Data Channel No.

= Physical Track No.

6
5
4
3
2

6
5
3
9
1

+3V
REC

-----------------------------------------------------------------~-

+3V

10-2019

Figure 6-71

A. ANALOG

REC and WD Signal Waveforms

SIGNAL - - - - - - - - - - '

---r--~_----------------------+4V

B. RD SIGNAL

0.2 to 0.4 V

28
MICROSECONDS --t \4-

C. PACKET SIGNAL

D. EXPANDED

1111111111111111

P=~~~~ ~~~~~(lli~I~~ll~l~~~~~~~~~~~~~~~~~

SKEW JITTER
10-2020

Figure 6-72

Read Signals

6-118

If the trouble is not located, change the pattern to Pattern 3 (rippling Is) and rerun the diagnostic
program. Reference Table 6-18 to analyze the results. When troubleshooting PE mode problems
(TEI6 only), reference Table 6-19, for help in troubleshooting Phase Encoded Data Reliability errors.

Table 6-18 Trouble Analysis of Data Reliability Diagnostic Using Pattern 3
Problem

I terns to Check

Remedy

Grounded RD or
WD line

Check printout as follows to locate bad
channel.

Check RD and WD of
faulty channel for
short to ground.

eN:
G
B

00000010
00000011

Channel 0

eN:
G
B

00000100
00000101

eN:
G
B

3
00001000
00001001

Note that for each B (bad data) printout,
channel 0 is a one (1). This indicates that
either RDO or WDO is shorted to ground.
Data lines tied together

Check printout as follows to locate data lines.
eN:
G
B

1
Channe16
00000010
01000010

eN:
G
B

6
01000000
01000010

eN:
G
B

17
00000010
01000010

Channell

Check on slave bus
(cable A) for connection
between two data lines
indicated by printout.

Note that for each B (bad data) printout,
channels 1 and 6 are always the same. This
indicates that WD 1 and WD6 are tied to
each other.
Intermittent errors on
data channel O.

Error printout indicates that data channel 0
is intermittent.

Check that both ends of
cables A and Bare
correctly installed.
Using an oscilloscope,
check for the wave shapes
of Figure 6-73.

6-119

--,I
I

..- 2.8,.,5

--11-2.5,.,5
I I

REC (B.01R2)

U
-U

WD.0 (B.01v2)

WDI

(B01U2)

WD2 (B.01 52)

u
u

WD3 (A.01P2)

u
u

WD4 (B01K2)

L---_~I

WD 5 (A01 M2)

L---_~I

WD6 (A.01F2)

~_~I
~

___~I

WD7 (A.01E2)

WDP (A(;J1D2)
A.

WRITE

SIGNAL WAVEFORMS USING NEGATIVE EDGE
OF REC(SB) L FOR SCOPE TRIGGER

RSDO (C01K21

RDO (DO!V2)U

L.......I

RD2 (oOIS2)

RD' ( o O I U 2 ) U

RD3 (D01R2)

u
u

RD4 (D01P2)

RD5 (C01H2)

RD6 (C01F2)

u
u
u

u
u u

RD7 (C01E2)

RDP (COl D2)

B. READ SIGNAL WAVEFORMS USING NEGATIVE EDGE
OF RSDO FOR SCOPE TRIGGER
NOT ES:
1. When checking these waveforms,put PDP-" keys 2,3,
10,1,,12, and 13 up. Keys 2 and 3 cause a foward write.
Keys 10 through 13 inhibit error checking and printoul.
2. Record

count =1: character count= 20

3. Set oscilloscope

; switches 2 and 3 up.

for O.lms/cm.

Figure 6-73

10-2021

NRZI Signal Waveforms Using Pattern 3 and 800 bits/in.

6-120

Table 6-19 Troubleshooting Phase Encoded Mode
Problem

Remedy

FCE
CORR skew and
CORR data
Symptoms:
Postamble detected too soon.
One track is missing.
NSG error

Check formatter or Massbus controller.
Check for damaged tape.
Check for poorly written tape.
Check G066.

During a read operation one or more
channels of read data completes a
record in the wrong state; e.g., overshoot
on the last transition being recognized
as an extra transition.
Some unerased data left in the IRG.
PEF, CDE, INC errors

Check for misaligned erase head.
Check tape for dirt and defects.
Check for capstan jitter.
Check G066.
Check formatter.

Incorrectable data error with all zeros in
check character register and no CSjITM error.
Parity error exists with no dead track.

Check formatter.

Check character register repeatedly con tains
the same bit set. *
Trouble is in only one track. Swap
data sync modules in formatter.

Check analog and digital outputs of G066.
Check data sync module in formatter.

Trouble is in same track.

Check analog and digital outputs of G066.

Trouble is in different track.

Check data sync module in formatter.

PEF error
More than one dead track due to
improper detection of preamble
and postamble.
Records are being written improperly

Check for poor quality tape.
Check tape speed regulation.

Check M89l6 (head drivers).
Check +5 V (PE) write voltage.
Check formatter.

*A 777 in the check character register may indicate a late detection of postamble which causes the
check character register to be strobed at the wrong time.

6-121

6.7.7 Troubleshooting Using the TE16 Utility Driver Diagnostic
An OPI error occurring in the TM02/TEI6 Data Reliability Program diagnostic of Paragraph 6.7.6
can be caused by any of the following:

•

SET PULSE is not sent to the TEI6.

•

W rite circuitry fails to write on tape.

•

Read circuitry fails.

To troubleshoot an OPI error, run the TE16 Utility Driver Diagnostic by performing the following
steps:

Load the TE16 Utility Driver Diagnostic.

Set the following program parameters:
Density
Word Count
Frame Count
Data Pattern
Operation

800 bits/in
lOs
20s
All ones
Write

Check that the TE16 is loaded at BOT and is on-line.

The tape should move forward.

Refer to Table 6-20 to analyze the results of the Utility Driver Diagnostic.

6-122

Table 6-20 Trouble Analysis of Utility Driver Diagnostic
Problem

Remedy

Tape does not move.
Symptoms:
Put HALT ON ERROR switch up
(bit IS) to cause the program to
pause. Wait for the RUN indicator to
go out.

Check the formatter error register for set-up errors.
Check the SET PULSE line for shorts.
Check for faulty M8916.
Check for bad cable.
Check for faulty M900 I.

Restart the program.

Check pin AOIS2 for SET PULSE (Fig. 6-74A and
sheet 5 of M8916 schematic).
Check FWD at pin CO I V2 for a low (0 V).
Check REV at pin COl V2 for a high (+3 V).
Check WRITE at pin DO I D2 for a low (0 V).
Check REWIND at pin COIP2 for a high (+3 V).
Check for bad cables.
Check for bad cable card connectors.
Check M8916.

TE 16 SEL indicator is not lit.

Check the following signals for a high level
(+3 Vdc) (Fig. 6-74B).
SELO
SEL I
SEL2
STOP
IN IT PLS
DRVCLR

Tape moves and REC pulses (pin BO 1R2)
are present (Fig. 6-75).

Pin BOIH2
Pin BOIP2
Pin BOIM2
Pin AOI V2
Pin AOI U2
Pin BOID2

Check cable.
Check cable card connector.
Check that EMD pulse on pin BO I E2 goes low
for 2.8 or 42 ms after SET PULSE and then
goes high.

Signal is low

Check M8916.

The 144 kHz pulse train CLOCK is
not present on pin DOlE!.

Check M8911/M8931.

ACCL (SB) L on pin AO I H2 should
go low (0 V) for approximately 9.5 ms
after SET PULSE and then go high
(+3 Vdc). ACCL never goes high.

Check that data lines RDO, RDI, RD2, RD3, RD4,
RDS, RD6, RD7, and RDP are between +3.5 and
+4.5 Vdc. (Some RD lines may go low when the
SET PULSE occurs, but most of them should
remain high.)
6-123

Table 6-20 Trouble Analysis of Utility Driver Diagnostic (Cont)
Problem

Remedy

Symptoms:
WRITE CLOCK is missing.

Check M89l1 /M8931.

No analog signals on Pin A04Ll (Figs. 6-74E
and 6-76).

Check the write cable.
Check M89l6 (see Sheets 1 and 2 of M89l6
schematic); write amplifiers.

Symptoms:
Tape moves and REC pulses are present.

Check that WRITE CLOCK jumpers are properly
co:nnected to back panel.
Check that write buffer is being clocked.
Check that write voltage (orange wire) is
approximately +12 Vdc (+5.5 Vdc for PE or
off-line mode).
Check that the following wires to G066 are at
the specific voltages:
Red
Yellow
Green

=
=
=

+5 Vdc
+12 Vdc
-6 Vdc

Check the read and write cables.
Check that the WD lines (\VDO, \VD1, ... ) go
low (0 V) for approximately 400 /lS during the
period when REC pulses occur.
No RSDO pulses on pin C01K2 (Figs. 6-74F
and 6-77).
Tape moves, REC occurs, and analog
signals are present.

Check that all RD lines on G066 go low.
Check for 100 ms CLEAR RD BRD L pulse on
pin C03Vl (see Sheet 3 of M8911 schematic).
Check for back panel wiring shorts.

OPI error remains.
Tape moves, REC occurs, analog signals
are present, and RSDO pulses are present.

Replace or repair M89l3 and cable B.
Troubleshoot formatter.

6-124

+3V
r----------I.,(j

A. SET PULSE (58) L

-U

0.2 to 0.6V
~ (

+3V

8. STOP (58)

L~I----------~ ~j----------------------------10.2 to 0.6V

BV
C. REC (58) L

141----9.5 M ILLISEC - - . . . . . t l

0.2 to 0.6 V

~--------------~-------------------~
D.EXPANDED REC PULSES
( 16 DATA PULSES, CRC
PULS E ,LCR PULSE)

112p.5 ~

14-112fL5

0V
E. ANALOG READ SIGNAL
APPROXIMATELY
10V Po: P

+_4_V____________~~r~----------------~~~~~~~~---F. RSDO (S8) L PULSES

0.2-0.6V

1111111111111111

II
CP-3213

Figure 6-74

Time Relationships of Write Operation Signals

6-125

VERTICAL =2 V/CM

••••••••••
Note: REC Pulses in box
A. SWEEP SPEED = 2 MS/CM
TRIGGER =SET PULSE
M-0754

VERTICAL = 2 V/CM

B. SWEEP SPEED =0.1 MS/CM
TRIGGER = FIRST REC PULSE
M-0755

Figure 6-75

Waveforms of REC Pulses (16 data pulses,
CRC pulse, LRC pulse)

6-126

VERTICAL =2 V/CM

Note write crosstalk 9 ms from start of trace.
A. SWEEP SPEED = 2 MS/CM
TRIGGER =SET PULSE
M-0756

VERTICAL =2 V/CM

B. SWEEP SPEED = 0.1 MS/CM
TRIGGER = FIRST ANALOG SIGNAL
M-0757

Figure 6-76

Waveforms of Analog Read Signals

6-127

..._.....
VERTICAL = 2 V/CM

TRIGGER = SET PULSE
SWEEP SPEED =2 MS/CM
M-0758

Figure 6-77

Waveform of RSDO Pulses

6.7.8 Use Of The Drive Function Timer
Load and start the Drive Function Timer Program. If an error occurs, allow two or three printouts and
put the "continue on error" switch up until the next test begins; then, put it down. Continue this until
one complete pass of the program has run. In this manner, an error typeout for each failing test will be
obtained. The remainder of this section describes possible causes and corrections of each failed test.
I. Write From BOT - If this is the only test that fails, the probable fault is the M8911 Delay
ROM. If other tests fail, check that pin D03F2 on the TEI6 back panel is not shorted to
some other signal. This pin should be open. Also, check that CLOCK (SB) L on pin DOIEI
is a 144 kHz square wave. All printed times can be out of range, if this frequency is incorrect.
Section I failure can also be caused by a faulty read data (RD) line on cable B or by a
marginal EM D line on cable A.
Bad RD lines would result in data errors, write errors, and read errors with other diagnostics. A bad EM D line might only be detected by Drive Function Timer.
2. Write Start - Go to Paragraph I.
3. Write Shutdown - Make the same checks as in Paragraph I, but also note the printout of
Paragraphs 23 and 24 (Data Time, 200 bits/in and 556 bits/in). A frequent cause of failure
of Paragraph 3 is a "hung" density line, particularly DEN 0 (SB) L. It should be +0.2 to 0.4
V. Also check tape speed.

6-128

4. Write Settle Down - This test checks the timing of a one-shot delay on the M8916 (refer to
sheet 5, upper left-hand section of the M8916 circuit schematics). This failure usually indicates a bad IC or out-of-tolerance capacitor. Changing the M8916 should fix this problem.
5. Read from BOT - Go to Paragraph 1.
6. Read Start - Go to Paragraph 1.
7. Read Shutdown - Go to Paragraph 3.
8. Read Settledown - Go to Paragraph 4.
9. Read Reverse Start - Go to Paragraph 1.
10. Read Reverse Shutdown - Go to Paragraph 3.
11. Read Reverse Settledown - Go to Paragraph 4.
12. Turn Around F -R - This test measures the time-out duration of the settle-down one-shot
delay with the time-out of the read start delay. If this test fails without Paragraphs 8 and 9
failing, the formatter or controller is probably at fault.
13. Turn Around R-F - This test is the sum of Paragraphs 6 and 11. Go to Paragraph 12.
14. Gap Size-Stop Half - This test checks start/stop ramp times. If other tests fail, repair them
first, particularly Gap Size Interrecord, Paragraph 16. If this test is the only test that fails,
check forward/reverse start/stop times.
15. Gap Size-Start Half - Go to Paragraph 14.
16. Gap Size Interrecord - This test checks tape speed. If other tests fail, repair them first. If this
test is the only test that fails, check tape speed with a skew tape.
17. Gap Consistency - Go to Paragraph 12.
18. Data Time 200 bits/in - The most probable cause of failure of this test is a "hung" density
line. Check that when the three density bits in the control register are 0, the three DEN (SB)
lines are also O.
19. Data Time 556 bits/in - Identical to Paragraph 19, except DEN 0 (SB) is true.
20. Data Time 800 bits/in - Identical to Paragraph 19, except DEN 0 (SB) and DEN 1 (SB) are
both true.
21. Data Time 1600 bits/in - Identical to Paragraph 19, except DEN 2(SB) is true.
22. Erase - Go to Paragraph 1.
23. Tape Mark - Go to Paragraph 3.

6-129

6.7.9 Cable/Wire Harness Troubleshooting
I neluded in this section are the various cable and wire harness locations. Use this information to verify
correct placement of cables and harnesses.

EOT /BOT Sensor - Check that the BOT/EaT sensor is wired correctly, as follows:
Red wire to pin C02A2
Orange wire to pin C02D 1
Yellow wire to pin C02C 1
Brown wire to pin C02L2

Maintenance Panel Harness - Check that the maintenance panel harness is wired correctly,
as follows:
Red wire to pin F02E2
Green wire to pin F02D2
Yellow wire to pin F02F2
Brown wire to pin F02C 1
Black wire to pin F02C2

Fail-safe Switches - Check that the Fail-safe switches are wired correctly, as follows:
White/Yellow wire to pin C02U 1
Green wire to pin C02U2

Power Supply Connections - Referring to Figure 6-78, check that the wiring harness is connected correctly to the power supply regulator board. Also, check that the power cord and
transformer taps are installed correctly.

Control Box Cable - Check that the flat cable from the control box is plugged into the
bottom of the M8916. Connect the 50.8 cm (20 in) piece of flat cable from Jl on the H607
logic board to the jack of the side of the M8916. Finally, connect the short 12.7 cm (5 in)
piece of flat cable from the H607 logic board to the H607 power board.
NOTE
Be careful. When connecting the flat cables, be sure
that the smooth side of the cable is always facing up
from the board.

6-130

.....; - - - J5

LOGIC POWER

_-t--- J4 H607 POWE R

.....- t - - - J3 CAPACITOR BANK

CONNECT THE TWO (21 BLUE
WIRES TO THE OUTER LUGS
FOR 115 VAC OPERATION.
CONNECT TO THE INNER LUGS
FOR 230 VAC OPERATION.

GREEN

(

T
I

BLACK (HI)

, •

15
12
9
6
3

...........

•

•
•
•
•

•
•

•
•
•

13
10
J2 TRANSFORME~
CABLE

7
4
1

I·

•

·i

.....-+--- J1

LOGIC FAN AND
VACUUM MOTOR

WHITE (LOI

CP3202

Figure 6-78

Wiring Harness to Power Supply Connections

6-131

APPENDIX A
MAGNETIC TAPE FUNDAMENTALS

A.I

DEFINITIONS
I.

Reference Edge - The edge of the tape as defined by Figure A-I. For tape loaded on a tape
transport, the reference edge is toward the observer.

TAPE
LEADER

~---SUPPLY

REEL
10-1265

Figure A-I

Reference Edge of Tape

BOT (Beginning-of-Tape) Marker - A reflective strip placed on the nonoxide side of the
tape, against the reference edge, 457 cm ± 30.5 cm (I5 ft ± I ft) from the beginning of the
tape.

EaT (End-of-Tape) Marker - A reflective strip placed on the nonoxide side of the tape,
against the nonreference edge, 762 to 914 cm (25 to 30 ft) from the trailing edge of the tape.

9-Channel Recording - Eight tracks of data plus one track of vertical parity. Figure A-2
shows the relationship between track and bit weight for a 9-channel transport. *

*When the track vs. bit channel standard was adopted, the outer tracks were more susceptible to bit dropping
errors. Consequently, channels containing the least Is were assigned the outer locations on the tape.

A-I

BIT
WT

CONTROLLER
INTERFACE

TRACK

22 -1-

RO 0

--CR07

20 - 2 -

RO 1

--CR06

24 - 3 -

RO 2

--CR05

-4-

RO 3

--CR04

25-5-

RO 4

--CR03

26_6-

RO 5

--CR02

27_7-

RO 6

--CROI

21-8-

RO 7

--CRO(2J

23_9-

RO P

--CROP

READ AMPS
READ HEAD
11-3091

Figure A-2

Track-Bit Weight Relationship for 9-Channel Transport

5. Tape Character - A bit recorded in each of the nine channels.
6.

Record - A series of consecutive tape characters.

File - An undefined number of records (minimum = zero, no maximum).

Interrecord Gap (lRG) - A length of erased tape used to separate records [1.27 cm (0.5 in)
minimum for 9-track; maximum IRG is 762 cm (25 ft)].

Extended IRG - A length of erased tape [7.62 cm (3 in) minimum] optionaily used to separate records.

10. Tape Speed - The speed at which tape moves past the read/write heads; normally stated in
inches per second.
11. Tape Density - The density of sequential characters on the tape. It is normally specified in
bits per inch (bpi), which is equivalent to characters per inch.
12. Write Enable Ring - A ring that must be inserted on the supply reel to allow the transport to
write on the particular tape. This safety feature helps prevent accidental destruction of previously recorded data.
13. Tape Mark (TM) - A record written on the tape to designate the end of a file; sometimes
referred to as file mark (FMK).
A.2 RECORDING METHODS AND MAGNETIC TAPE FORMATS
A magtape system is an on-line mass storage system for programs or data. Data is recorded on tape in
vertical rows called characters. Each character consists of eight data bits and one vertical parity bit.
The vertical parity bit is program-selected as even or odd. The odd parity bit guarantees that each
character records at least one 1 bit.
The parity bit is generated according to the rule that the number of 1s in a character (parity bit
included) is odd or even. For example, if odd parity is used and the character contains an even number
of 1 bits, the parity bit is generated as a 1 bit and an odd number of 1 bits are recorded; then, if an even
number of bits are read back from tape, a vertical parity error is generated to notify the program that
the data is in error.
A-2

The data characters are recorded in blocks of characters termed records (Figure A-3). Each record
contains a specified number of characters determined by the word count.
Records are separated by interrecord gaps (IRGs). The IRG is 1.27 cm (0.5 in) minimum [approximately 1.5 cm (0.6 in) in normal operation], but may be extended to 7.62 cm (3 in) by performing an
extended gap operation. Tape IRGs (unrecorded areas) provide areas on the tape for the transport to
start or stop and also separate data records.

It... - - - - - - - FILE -------.1-1

FILE MARK =23

FILE MARK = 23 8

t-APPROX 9.65 CM (3.8IN.)---.I
LRC
I
;
CHARACTER
:

(6.56 ~~.)-J

l+I

III

r*+*,
t
CCRC

CHARACTER
LAST DATA
CHARACTER
OF PREVIOUS
FILE

DATA PREVIOUS--.
RECORD

(0.6 IN.)

1111 ~*+*1

t-**--i"
FILEtMARK

LRC
CHARACTER

FIRST DATA
CHARACTER
OF NEXT
FILE

LAST DATA
CHARACTER
OF PREVIOUS
RECORD

J I

1IIIII

t
LRC

CHARACTER
CRC
CHARACTER

B. IRG

A. FILE MARK AND GAP FORMAT

**=*=

j.-IRG--i-- DATA NEXT
I
RECORD

1-1.5 CM~

FIRST DATA
CHARACTER
OF NEXT
RECORD

FORMAT

3 CHAR. SPACE
7 CHAR.SPACE

11-3069

Figure A-3

Data Recording Scheme

A.2.t NRZI Recording Method (Non-Return-To-Zero Inverted)
In the NRZI recording method, a 1 bit is represented by a reversal in the direction of tape magnetization on a track; a 0 bit is represented by no change in tape magnetization.

A-3

A.2.2 9-Channel Tape Format
The format (Figure A-4) is composed of from 18* to 2048 9-bit characters spaced 3 mm 0/800 in)
apart, followed by 3 character spaces, a CRC character, 3 more spaces and an LRC character. This
unit of data is called a record. At 800 characters per inch, the record is between 0.79 mm 0/32 in)
minimum and 12.7 cm (5 in) maximum. Between each record is a gap of at least l.27 cm (0.5 in). The
tape structure consists of a number of records followed by a file mark (Figure A-3). Since data is
recorded and read at high speed, IRGs are used to provide space for starting and stopping a tape
transport. A transport accelerates from standstill to full speed in approximately 0.5 cm (0.2 in) of tape
and decelerates from full speed to standstill in 0.5 cm (0.2 in) of tape; thus, the minimum IRG of 1.27
cm (0.5 in) provides adequate space for starting and stopping the tape transport.

LEGEND:
BPI
BOT
LRC

TAPE BITS PER INCH
BEGINNING OF TAPE
LONGITUDINAL REDUN·
DANCY CHECK
CYCLIC REDUNDANCY CHECK

CRC

REFERENCE EDGE
(FRONT FLANGE
OF REEL)

LRC 0.127 MM (0.005 IN.) ± 10%
(NOTE 3)

CRC 0.127"" (0.005IN' ,,0%

! ~_"'

INTERBLOCK GAp-+I4IL---:-----:.:-BLOCK
1.27 CM (O.5IN.) MIN
(NOTE 2)

~?g3~~IM

(0.00125 IN.) ± 3%

WRITE TRACK
1.09 MM (O.043IN.) MIN

2048 MAX USASCII CH
18 MIN USASCII CH
LOAD POINT
BEGINING OF
TAPE REFLECTIVE
~~~~~~~~_~STRIP ON
NONOXIDE(SHINY)
SIDE OF TAPE

r------ --- -

END
OF
TAPE

~[____+_-PARITY

(ODD)

BEGINING
OF
TAPE

---------,

END POINT
END OF TAPE
REFLECTIVE
STRIP ON NONOXIDE
(SHINY) SIDE OF
TAPE

&I'
""-

L . . - - - -_ _

TAPE MOTION

NOTES:
1.

TAPE IS SHOWN WITH OXIDE SIDE
UP, READ/WRITE HEAD ON SAME
SIDE AS OXIDE. TAPE IS SHOWN REPRESENTING 1 BITS IN ALL NRZI RECORDING. 1 BIT PRODUCED BY
REVERSAL OF FLUX POLARITY, TAPE
FULLY SATURATED IN EACH DIRECTION.
TAPE TO BE FULLY SATURATED IN
THE ERASED DIRECTION IN THE IN·
TERRECORD GAP AND THE INITIAL
GAP.

AN LRC BIT IS WRITTEN IN ANY
TRACK IF THE LONGITUDINAL
COUNT IN THAT TRACK IS ODD.
CHARACTER PARITY IS IGNORED IN
THE LRC CHARACTER.

CRC - PARITY OF CRC CHARACTER IS
ODD IF AN EVEN NUMBER OF DATA
CHARACTERS ARE WRITTEN, AND
EVEN IF AN ODD NUMBER OF CHARACTERS ARE WRITTEN.

Figure A-4

Tape Recording Format

The CRC character is generated during a write operation and written at the end of a record. The check
character performs the same function to a record as the parity bit does to a character.

*USASCII program standards, not a hardware limit.

A-4

The LRC character is the final character in the record and is generated so that for each track the sum
of 1 bits (CRC character included) is even. The LRC character is written on tape by clearing the write
buffer in the tape transport after the CRC character is written. The LRC strobe resets the write buffer,
causing a 1 to be written on each track containing an odd number of 1s; a 0 is written on each track
containing an even number of Is.
A.2.3 7-Channel Tape Format
Each character frame in a 7-channel tape (Figure A-5) consists of six character bits (B, A, 8,4, 2, 1) in
descending order of significance. The parity bit, or check bit (C), is the seventh bit and is set or cleared
by the transport write head. One byte of a data word corresponds to one tape character. However,
because one byte contains eight bits and a tape character contains only six data bits, two bits within
each byte are not used. During a read operation, the extra bits are forced to 0; during a write operation, the bits remain unchanged. During the core dump mode of operation, one byte corresponds to
two tape characters. Thus, all bits within the byte are used; however, the two most significant bits on
the tape are not used.
FORWARD
TAPE
MOTION

•

ONE BYTE DUR I NG
CORE DUMP MODE

TAPE CHANNELS

(PARITY)C
1 1
B
1 1
A l l
4

L
r-

BOT

1
1
1

1
1
1
' [1 ]1'
1

_____
' ____
' __________

GAP+3-C~AA;:CTER
-+CHAR~CTER~TE~~~CO~
MIN.
PERIODS -1(IRG)
-1- N~~TcgR~TA
o.7-CHANNEL DATA

FORMAT

EOF MARK
CHARACTER

LARSETCODRADTA ~-.~----"I"
EXTENDED IRG
IN BLOCK

IF
------41,,""'.......
EO + -IRG
RECORD

b. EOF

RECORD

BEGINNING
OF NEW
DATA BLOCK

3 BLANK
CHARACTER
PERIODS
11- 0391

Figure A-5

7-Channel Tape Format

The magnetic tape is divided into data records, each record separated by an interrecord gap (IRG).
In a block format, a number of records are written together with an IRG before the first record and
after the last record. In either case, the IRG is an unused portion of tape preceding and following the
record or the block.
The longitudinal redundancy check (LRC) character is written after the data and is separated from the
data by three character spaces. Each bit in the LRC is such that the total number of bits in any specific
channel is even.
A-5

The end of a block of records is indicated by an end-of-file mark character. The end-of-file (EOF)
mark is separated from the data by an extended IRG. The extended IRG is a 7.6 cm (3 in) strip of
blank tape compared to the standard 1.9 cm (3/4 in) IRG for 7-channel tape and the 1.27 cm (1/2 in)
IRG for 9-channel tape. The EOF mark and associated LRC character are considered to be one
complete record.
The 9-channel tape format (Figure A-6) is similar to the 7-channel format; however, because each
character consists of eight data bits and one parity bit, a byte corresponds to a tape character. Therefore, there is no need for a core dump mode, because information can be transferred from the system
to the tape on a one-to-one ratio.
In addition, the 9-channel format includes a cyclic redundancy check (CRC) character. Data is followed by three blank character periods, the CRC character, three more blank character periods, and
the LRC character. The LRC character is followed by an IRG as before.

CRC CHARACTER

r-------=~ ONE BYTE

L
[-

8
7
6
5
(PARITY)4
3
2
1

1I
1
1
1
1
1
1

BOT GAP

l'm

LRC CHARACTER

,.----1

1
1

1
I
1
1
1
1
1
1

11
1
1
1
1
1
1

II
1
1
1
1
1
1

-CHD:;:CTER-+CHAR~CTER+CHAR~TER t-INTE~~~CORD+ ~~~i

I
1
1

W-(
1

I
1
1
1
1
1

MIN.

1
1
1
1
\

\
1
1
1
1
1
1
1

1
1

PERIODS

~----

(IRG)

RECORD
,,- 0392

Figure A-6

9-Channel Tape Format

A.3 CYCLIC REDUNDANCY CHECK (CRC) CHARACTER
The CRC character provides a method of error detection and correction on magtape transports. The
code has nine check bits that form a check character at the end of each record. To perform a correction, a record in which an error has been detected must be reread into memory with the CRC character
for program evaluation. Errors involving more than one track can be detected but not corrected.
The CRC character is generated as follows:
1.

The CRC register is cleared at the beginning of each record. As each data bit is written on
tape, it is exclusively ORed with its corresponding bit in the CRC register.

The CRC register is shifted one position to the right after the exclusive OR operation has
taken place.

The bits entering CRC2, CRC3, CRC4, and CRC5 of the CRC register are inverted if the bit
entering CRCP is a 1. Data is shown in Table A-I; the resultant CRC character is shown in
Table A-2.

A-6

Table A-I

Five-Character Record
Characters

Bit

Data
Character 0

Data
Character 2

Data
Character 3

Data
Character 4

0
0
0

1
1
1
1

0
0

0
0
0

1
1
1

0
0

1
2
3
4
5
6

0
0

1
1

0
0

1
1

1
1
1
1

Table A-2

Data
Character 5

1
0

CRC Character in Register When Writing
CR C Register

CRC
Bits

Cleared

CRCP
CRCO
CRCI
CRC2
CRC3
CRC4
CRC5
CRC6
CRC7

0
0
0
0
0
0
0
0
0

Character I Character 2 Character 3 Character 4
0
0
I
0
0
1
0
0
1

0
0
0
0

0
0
0
0
0

0
0

1
1
1

0
0
0

1
1
1
1
1
1
1
1

0
0
0
0

1
0
0

Final

CRC
Character
On Tape

1
1

1
0

Steps 1-3 are repeated for each data character of record.

At CRC time, all positions of the CRC register, except CRC2 and CRC4, are complemented
and the resultant CRC character is written on tape.

The CRC register is cleared for the next record.

A.4 LONGITUDINAL REDUNDANCY CHECK (LRC) CHARACTER
The LRC character is written three spaces after the CRC character. The vertical parity bit is always
written on the LRC character; the vertical parity of LRC is never checked. The LRC character makes
the longitudinal parity even for the entire record, including the CRC. The LRC character is generated
by the LRC register in the following manner:
I.

The LRC register is cleared at the beginning of a record.

A-7

As characters are written on tape, corresponding 1 bits complement the LRC register at the
time data is written on tape.

At LRC time, the LRC strobe clears the write buffer and Is are written on tape in only those
channels for which the write buffer is set prior to clearing.

Following this method, the LRC character forces an even number of bits to be recorded on
each track of the tape. The CRC character is included in determining the LRC character.

A.S DA T A FILES
As previously stated, a record is a group of characters preceded by an IRG and terminated by three
spaces, a CRC character, three more spaces, and an LRC character. A file is a group of records
separated by IRGs and terminated by a 7.62 cm (3 in) gap followed by a file mark. The file mark is a
record consisting of a single data character [the end-of-file (EOF) character] followed by seven blank
characters and an LRC character. The CRC character is not written on an EOF record. The LRC
character with a file mark is a duplicate of the EOF character (23 8).
A.6 TRACK ASSIGNMENTS
The track assignments for read, write, and parity bits are shown in Table A-3.

Table A-3
Transport
Track Number

1 furthest from
transport
2
3
4
5
6
7
8
9 closest to
transport

Track Assignments for Data and Parity
Write
Data Bits*

Read
Data Bits*

Binary
\\'eight

CW05

CR05

CW07
CW03
CWOP
CW02
CWOl
CWOO
CW06
CW04

CR07
CR03
CROP
CR02
CROI
CROO
CR06
CR04

2°
24

*A t controller interface.

A-8

25
26
27
21
23

APPENDIX B

GLOSSARY

Mnemonic

Meaning

ACCL
ATTN

Accelerate
Attention

BOT

Beginning of Tape

CAP
CCW
CLK
CLR
CPU
CRC
CRCC
CS
CW
7CH

Capstan
Counter Clockwise
Clock
Clear
Central Processing Unit
Cyclic Redundancy Check
Cyclic Redundancy Check Character
Control Status
Clockwise
7-Channel

DAC
DEM
DEN
DPR
DRV
DRVR
DRY
DS
DT

Digital-to-Analog Converter
Demand
Density
Drive Present
Drive
Driver
Drive Ready
Drive Status
Drive Type

EMD
ENBL
ENDPT
EOF
EOT
ER
ERR

Enable Motion Delay
Enable
End Point
End of File
End of Tape
Error
Composite ERR

Function
File Mark
Forward
Frequency
Forward

FMK
FOR
FREQ
FWD

B-1

Mnemonic

Meaning

lOB
INIT
IRO
IRG

Identification Burst
Initialize
Interchange Read
Inter Record Gap

LAW
LM
LMZ
LRC
LRCC
LVS

Logic and Write
Lower Motor
Lower Motor Zone
Longitudinal Redundancy Check
Longitudinal Redundancy Check Character
Lower Vacuum Switch

MOL
MTR

Medium on Line
Motor

NEG
NRZI

Negative
N onreturn to Zero Inverted

Operation

P
PE
PES
PLS
POS
PT

Parity
Phase Encoded
Phase Encoded Status
Pulse
Positive
Point

RD
RDS
REC
REV
REW
RSDO
RWND
RWS

Read Data
Read Strobe
Record
Reverse
Rewind
Read Strobe Delay Over
Rewind
Rewind Status

SB
SC
SDWN
SEL
SLA
SN
SPR
SS
STRB
SW

Slave Bus
Slave Clock
Settle Down
Select
Slave Attention
Serial N urn ber
Slave Present
Slave Select
Strobe
Switch

TACH
TFG
TH
TMD
TUR

Tachometer
Test Function Generator
Threshold
Tape Motion Daughter
Tape Unit Ready
B-~

Mnemonic

Meaning

UM
UMZ
UNLD
UVS

Upper Motor
Upper Motor Zone
Unload
Upper Vacuum Switch

VPE

Vertical Parity Error

WCLK
WD
WRE
WRL
WRT
WRTCLK

Write Clock
Write Data
Write Enable
Write Lock
Write
Write Clock

B-3

Reader's Comments

TE16/TEIOW /TEION DECMAGT APE
TECHNICAL MAINTENANCE MANUAL
EK-OTE16-TM-OOl

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