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AA-Z700A-TE

September 1984

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Document:	VMS 4.0 VAX MACRO and Instruction Set Reference Manual
Order Number:	AA-Z700A-TE
Revision:
Pages:	444
Original Filename:	https://archive.org/download/stx_AA-Z700A-TE_VMS_4.0_VAX_MACRO_and_Instruction_Set_Reference_Manual_Sep84/AA-Z700A-TE_VMS_4.0_VAX_MACRO_and_Instruction_Set_Reference_Manual_Sep84.pdf

OCR Text

VAX MACRO
and
Instruction Set
Reference Manual
Order Number: AA-Z700A-TE

September 1984

This document discusses the features of the VAX MACRO instruction set
and assembler. It includes a detailed description of MACRO directives and
instructions, as well as a discussion of MACRO source program syntax.

Revision/Update Information:

This is a new manual.

Software Version:

VAX/VMS Version 4.0

digital equipment corporation
maynard, massachusetts

September 1984
The information in this document is subject to change without notice and should
not be construed as a commitment by Digital Equipment Corporation. Digital
Equipment Corporation assumes no responsibility for any errors that may appear
in this document.
The software described in this document is furnished under a license and may be
used or copied only in accordance with the terms of such license.
No responsibility is assumed for the use or reliability of software on equipment
that is not supplied by Digital Equipment Corporation or its affiliated companies.
Copyright ©1984 by Digital Equipment Corporation
All Rights Reserved.
Printed in U.S.A.
The postpaid READER'S COMMENTS form on the last page of this document
requests the user's critical evaluation to assist in preparing future documentation.
The following are trademarks of Digital Equipment Corporation:
DEC
DEC/CMS
DEC/MMS
DECnet
DECsystem-10
DECSYSTEM—20
DECUS
DECwriter

DIBOL
EduSystem
IAS
MASSBUS
PDP
PDT
RSTS
RSX

UNIBUS
VAX
VAXcluster
VMS
VT

ZK-2312

This document was prepared using an in-house documentation production system. All
page composition and make-up was performed by T^X, the typesetting system developed
by Donald E. Knuth at Stanford University. T^X is a registered trademark of the American
Mathematical Society.

Contents
PREFACE

xvii

NEW AND CHANGED FEATURES

xix

VAX MACRO LANGUAGE
SECTION 1

INTRODUCTION

i-i

SECTION 2

MACRO SOURCE STATEMENT FORMAT

2-1

2.1

LABEL FIELD

2-2

2.2

OPERATOR FIELD

2-3

2.3

OPERAND FIELD

2-3

2.4

COMMENT FIELD

2-3

SECTION 3

THE COMPONENTS OF MACRO SOURCE STATEMENTS
3-1

3.1

CHARACTER SET

3-1

3.2

NUMBERS
3.2.1
Integers
3.2.2
Floating-Point Numbers
3.2.3
Packed Decimal Strings

3-3
3-3
3-3
3-4

3.3

SYMBOLS
3.3.1
Permanent Symbols _
3.3.2
User-Defined Symbols and Macro Names _
3.3.3
Determining Symbol Values _

3-4
3-5
3-5
3-6
iii

Contents

3.4

LOCAL LABELS

3-7

3.5

TERMS AND EXPRESSIONS

3-9

3.6

UNARY OPERATORS
3.6.1
Radix Control Operators
3.6.2
Textual Operators
3.6.2.1
ASCII Operator • 3-12
3.6.2.2
Register Mask Operator • 3-13
3.6.3
Numeric Control Operators
3.6.3.1
Floating-Point Operator *3-14
3.6.3.2
Complement Operator • 3-14

3-10
3-11
3-12

3.7

BINARY OPERATORS
3.7.1
Arithmetic Shift Operator
3.7.2
Logical AND Operator
3.7.3
Logical Inclusive OR Operator
3.7.4
Logical Exclusive OR Operator

3-15
3-15
3-16
3-16
3-16

3.8

DIRECT ASSIGNMENT STATEMENTS

3-16

3.9

CURRENT LOCATION COUNTER

3-17

SECTION 4

3-14

MACRO ARGUMENTS AND STRING OPERATORS

4-1

4.1

ARGUMENTS IN MACROS

4-1

4.2

DEFAULT VALUES

4-2

4.3

KEYWORD ARGUMENTS

4-2

4.4

STRING ARGUMENTS

4-3

4.5

ARGUMENT CONCATENATION

4-5

4.6

PASSING NUMERIC VALUES OF SYMBOLS

4-6

Contents

4.7 CREATED LOCAL LABELS

4-6

4.8 MACRO STRING OPERATORS
4.8.1
%LENGTH Operator _
4.8.2
%LOCATE Operator _
4.8.3
%EXTRACT Operator _

4-7
4-7
4-8
4-9

SECTION 5

MACRO ADDRESSING MODES

5-1

5.1 GENERAL REGISTER MODES
5.1.1
Register Mode _
5.1.2
Register Deferred Mode _
5.1.3
Autoincrement Mode _
5.1.4
Autoincrement Deferred Mode _
5.1.5
Autodecrement Mode _
5.1.6
Displacement Mode _
5.1.7
Displacement Deferred Mode _
5.1.8
Literal Mode _

5-1
5-4
5-5
5-5
5-6
5-7
5-7
5-9
5-10

5.2 PROGRAM COUNTER MODES
5.2.1
Relative Mode _
5.2.2
Relative Deferred Mode _
5.2.3
Absolute Mode _
5.2.4
Immediate Mode _
5.2.5
General Mode _

5-12
5-12
5-13
5-14
5-14
5-16

5.3

INDEX MODE

5-16

5.4

BRANCH MODE

5-19

SECTION 6

MACRO ASSEMBLER DIRECTIVES

6 1

.ADDRESS
ALIGN

6-4
6-5

.ASCIX

6-7

.ASCIC
.ASCID

6-8
6-9

ASCII
.ASCIZ
BLKX
.BYTE

6-10
6-11
6-12
6-14
v

Contents

.CROSS AND .NOCROSS
.DEBUG
•DEFAULT
• D—FLOATING AND .DOUBLE

6-18
6-19

.DISABLE

6-20
6-21

.ENABLE

6-22

•END

6-25

•ENDC
•ENDM
•ENDR
.ENTRY

6-26

• ERROR
• EVEN

6-31
6-32

.EXTERNAL

6-33

• F—FLOATING AND .FLOAT

6-34

•G—FLOATING
•GLOBAL

6-35

• H—FLOATING
IDENT
.IF

6-27
6-28
6-29

6-36
6-37
6-38

•IF_X

6-39
6-42

•IIF

6-45

•IRP

6-46

.IRPC
LIBRARY

6-48

• LINK
• LIST

6-51
6-54

.LONG

6-55

.MACRO
.MASK

6-56

.MCALL
MDELETE

6-59

•MEXIT
NARG

6-61

•NCHR
• NLIST
. NOCROSS
. NOSHOW
.NTYPE
• OCTA
.ODD
.OPDEF
.PACKED
vi

6-16

6-50

6-58
6-60
6-62
6-63
6-64
6-65
6-66
6-67
6-69
6-70
6-71
6-73

Contents

.PAGE

6-74

.PRINT

6-75

.PSECT

6-76
6-80

.QUAD
.REFN
REPEAT

6-81
6-82

.RESTORE—PSECT

6-84

•SAVE—PSECT
.SHOW AND .NOSHOW

6-85
6-87

.SIGNED_BYTE

6-89

.SIGNED_WORD

6-90

.SUBTITLE
.TITLE

6-92

•TRANSFER
.WARN

6-93
6-94

•WEAK

6-96
6-97

WORD

6-98

VAX DATA TYPES AND INSTRUCTION SET

SECTION 7

TERMINOLOGY AND CONVENTIONS

7-1

7.1

NUMBERING

7-1

7.2

UNPREDICTABLE AND UNDEFINED

7-1

7.3

RANGES AND EXTENTS

7-1

7.4

MBZ

7-1

7.5

RESERVED

7-2

7.6

FIGURE DRAWING CONVENTIONS

7-2

vii

Contents

SECTION 8

BASIC ARCHITECTURE

8.1 ADDRESSING

viii

8-1
8-1

8.2 DATA TYPES
8.2.1
Byte _
8.2.2
Word _
8.2.3
Longword _
8.2.4
Quadword _
8.2.5
Octaword _
8.2.6
F—floating _
8.2.7
D_floating _
8.2.8
G_floating _
8.2.9
H_floating _
8.2.10 Variable-Length Bit Field _
8.2.11 Character String _
8.2.12 Trailing Numeric String _
8.2.13 Leading Separate Numeric String _
8.2.14 Packed Decimal String _

8-1
8-1
8-1
8-2
8-2
8-3
8-3
8-4
8-4
8-5
8-5
8-6
8-7
8-9
8-10

8.3 PROCESSOR STATUS WORD
8.3.1
C bit _
8.3.2
V bit _
8.3.3
Zbit _
8.3.4
N bit _
8.3.5
Tbit _
8.3.6
IV bit _
8.3.7
FU Bit _
8.3.8
DV bit _

8-11
8-11
8-12
8-12
8-12
8-12
8-12
8-12
8-12

8.4 PERMANENT EXCEPTION ENABLES
8.4.1
Divide by Zero _
8.4.2
Floating Overflow _

8-13
8-13
8-13

8.5 INSTRUCTION AND ADDRESSING MODE FORMATS
8.5.1
Opcode Formats _
8.5.2
Operand Specifiers _

8-13
8-13
8-13

8.6 GENERAL ADDRESSING MODE FORMATS
8.6.1
Register Mode _
8.6.2
Register Deferred Mode _
8.6.3
Autoincrement Mode _

8-14
8-15
8-16
8-16

Contents

8.6.4
8.6.5
8.6.6
8.6.7
8.6.8
8.6.9

Autoincrement Deferred Mode _
Autodecrement Mode _
Displacement Mode _
Displacement Deferred Mode _
Literal Mode _
Index Mode _

8-16
8-17
8-17
8-18
8-19
8-21

8.7

SUMMARY OF GENERAL MODE ADDRESSING

8-22

8.8

BRANCH MODE ADDRESSING FORMATS

8-24

SECTION 9

VAX INSTRUCTION SET

9.1 INTRODUCTION
9.1.1
MicroVAX Architecture

9-1

9-1
9-1

9.2

INSTRUCTION DESCRIPTIONS
9.2.1
Operand Specifier Notation _
9.2.2
Operation Description Notation _

9-2
9-3
9-4

9.3

INTEGER ARITHMETIC AND LOGICAL INSTRUCTIONS

9-6

ADAWI

9-8

ADD

9-9

ADWC
ASH

9-10
9-11

BIC

9-12

BIS

9-13

BIT

9-14

CLR
CMP
CVT

9-15
9-16
9-17

DEC
DIV

9-18
9-19

EDIV
EMUL

9-20
9-21

INC
MCOM
MNEG

9-22
9-23
9-24

MOV

9-25

MOVZ

9-26
ix

Contents

MUL

9-27

PUSHL

9-28

ROTL

9-29
9-30

SBWC
SUB

9.4

TST

9-31
9-32

XOR

9-33

ADDRESS INSTRUCTIONS
MOVA
PUSHA

9.5

9.6

9-36

9-37

CMP

9-39

EXT
FF

9-40
9-41

INSV

9-42

CONTROL INSTRUCTIONS
ACB

9-43
9-45
9-47

9-48
9-49

9-51

9-52

9-53
9-54

AOBLSS

BLB
BR
BSB

9-55

CASE

9-56
9-57

JMP

9-58

JSB

9-59

RSB
SOBGEQ
SOBGTR

9-60
9-61
9-62

PROCEDURE CALL INSTRUCTIONS
CALLG
CALLS
RET

9-35

VARIABLE-LENGTH BIT FIELD INSTRUCTIONS

AOBLEQ

9.7

9-34

9-63
9-65
9-67
9-69

Contents

9.8

MISCELLANEOUS INSTRUCTIONS
9-71

BISPSW

9-72

BPT

9-73
9-74

HALT
INDEX
MOVPSL
NOP
POPR
PUSHR
XFC

9.9

9.10

9-75
9-77
9-78
9-79
9-80
9-81

QUEUE INSTRUCTIONS
Absolute Queues
9.9.1
Self-relative Queues
9.9.2
Instruction Descriptions
9.9.3

9-82
9-82
9-85
9-87

INSQHI

9-88

INSQTI
INSQUE

9-90
9-92

REMQHI

9-94

REMQTI

9-96

REMQUE

9-98

FLOATING POINT INSTRUCTIONS
9.10.1 Introduction
9.10.2 Overview of the Instruction set
9.10.3 Accuracy
9.10.4 Instruction Descriptions

9-100
9-100
9-101
9-102
9-103

ADD

9-105

CLR

9-106

CMP
CVT
DIV

9-107
9-108
9-111
9-112
9-114

EMOD
MNEG
MOV
MUL
POLY
SUB
TST

9.11

9-70

BICPSW

CHARACTER STRING INSTRUCTIONS

9-115
9-116
9-117
9-120
9-121

9-122
xi

Contents

9.12

CM PC

9-124

LOCC

9-126

MATCHC

9-127

MOVC

9-128

MOVTC

9-130

MOVTUC

9-131

SCANC

9-133

SKPC

9-134

SPANC

9-135

CYCLIC REDUNDANCY CHECK INSTRUCTION
CRC

9.13

9.14

xii

9-136
9-137

DECIMAL STRING INSTRUCTIONS
9.13.1 Decimal Overflow
9.13.2 Zero Numbers
9.13.3 Reserved Operand Exception
9.13.4 UNPREDICTABLE Results
9.13.5 Packed Decimal Operations
9.13.6 Zero-Length Decimal Strings
9.13.7 Instruction Descriptions

9-139
9-140
9-140
9-140
9-140
9-140
9-141
9-141

ADDP

9-143

ASHP

9-145

CMPP

9-147

CVTLP

9-148

CVTPL

9-149

CVTPS

9-150

CVTPT

9-152

CVTSP
CVTTP

9-154
9-155

DIVP

9-157

MOVP

9-159

MULP

9-160

SUBP

9-161

EDIT INSTRUCTION

9-163

EDITPC
EO$ADJUST_INPUT

9-164

EO$BLANK_ZERO

9-170

EOSEND

9-171

EO$END_FLOAT

9-172

EOSFILL

9-173

9-169

Contents

9.15

EOSFLOAT
EOSINSERT

9-174

EO$LOAD_
EOSMOVE

9-176
9-177

EO$REPLACE_SIGN

9-178

EO$_SIGNIF

9-179

EOSSTORE-SIGN

9-180

9-175

OTHER VAX INSTRUCTIONS
PROBEX
CHM

9-182
9-184

REI
LDPCTX

9-186
9-187

SVPCTX

9-188

MTPR

9-189

MFPR

9-190
9-191

BUG

APPENDIX A,

ASCII CHARACTER SET

A-1

APPENDIX B

HEXADECIMAL/DECIMAL CONVERSION

B-1

B.1

HEXADECIMAL TO DECIMAL

B-1

B.2

DECIMAL TO HEXADECIMAL

B-1

B.3

POWERS OF 2 AND 16

B-2

APPENDIX C

•

9-181

VAX MACRO ASSEMBLER DIRECTIVES AND
LANGUAGE SUMMARY

C l

C.1

ASSEMBLER DIRECTIVES

C-1

C.2

SPECIAL CHARACTERS

C-6

C.3

OPERATORS
C.3.1
Unary Operators

C-7
C-7
xiii

Contents

C.3.2
C.3.3

C.4

APPENDIX D

Binary Operators _
Macro String Operators _

ADDRESSING MODES

C-8
C-8

C-9

PERMANENT SYMBOL TABLE

D 1

D.1

OPCODES (ALPHABETIC ORDER)

D-1

D.2

OPCODES (NUMERIC ORDER)

D-10

Using Transfer Vectors

6-95

Special Characters Used in VAX MACRO Statements _
Separating Characters in VAX MACRO Statements _
Unary Operators _
Binary Operators _
Addressing Modes _
Floating-Point Literals _
Index Mode Addressing _
Summary of General Assembler Directives _
Summary of Macro Directives _
.ENABLE and .DISABLE Symbolic Arguments _
Condition Tests for Conditional Assembly Directives
_
Operand Descriptors _
Program Section Attributes _
Default Program Section Attributes _
.SHOW and .NOSHOW Symbolic Arguments _
Representation of Least-Significant Digit and Sign _
Floating-Point Literals _
General Register Addressing _
Program Counter Addressing _
Summary of EDIT pattern operators _
Decimal, Hexadecimal, and ASCII Conversion _

3-1
3-2
3-10
3-15
5-2
5-11
5-18
6-1
6-3
6-22
6-39
6-71
6-76
6-78
6-87
8-8
8-20
8-23
8-24
9-166
A-1

INDEX

FIGURES
6—1

TABLES
3—1
3—2
3—3
3-4
5—1
5—2
5— 3
6— 1
6—2
6—3
6-4
6—5
6—6
6—7
6—8
8—1
8—2
8—3
8— 4
9— 1
A—1
xiv

Contents

B—1
C—1
C—2
C—3
C—4
C—5
C—6
D—1
D—2
D—3

Hexadecimal/Decimal Conversion _
Assembler Directives _
Special Characters Used in VAX MACRO Statements _
Unary Operators _
Binary Operators _
Macro String Operators _
Addressing Modes _
Opcodes and Functions _
One-Byte Opcodes _
Two-Byte Opcodes _

B-2
C-1
C-6
C-7
C-8
C-9
C-9
D-1
D-10
D-14

Preface
This manual describes the VAX MACRO language and the VAX instruction
set. It includes the format and function of each feature of the language. The
VAX-11 Architecture Reference Manual describes the instruction set in greater
detail than it is presented in this volume.

Intended Audience
This manual is intended for all programmers writing VAX MACRO programs.
You should be familiar with assembly language programming, the VAX
instruction set, and the VAX/VMS operating system before reading this
manual.

Structure of This Document
This manual is divided into two parts, each of which is subdivided into
several sections.
Part I describes the VAX MACRO language.
•

Section 1 introduces the features of the VAX MACRO language.

•

Section 2 describes the format used in VAX MACRO source statements.

•

Section 3 describes the components of VAX MACRO source statements:
The character set
Numbers
Symbols
Local labels
Terms and expressions
Unary and binary operators
Direct assignment statements
The current location counter

•

Section 4 describes the arguments and string operators used with macros.

•

Section 5 summarizes and gives examples of using the VAX MACRO
addressing modes.

•

Section 6 describes the VAX MACRO general assembler directives and the
directives used in defining and expanding macros.

Part II describes the VAX data types, the instruction and addressing mode
formats, and the instruction set.
•

Section 7 summarizes the terminology and conventions used in the
descriptions in Part II.

•

Section 8 describes the basic VAX architecture, including:
Address space
Data types
Processor state
xvii

Preface

Processor status word
Permanent exception enables
Instruction and addressing mode formats
•

Section 9 describes the native-mode instruction set. The instructions are
divided into groups according to their function, and are listed alphabeti¬
cally within each group.

VAX MACRO and Instruction Set Reference Volume also contains four
appendixes:
•

Appendix A lists the ASCII character set that can be used in VAX MACRO
programs.

•

Appendix B gives rules for hexadecimal/decimal conversion.

•

Appendix C summarizes the general assembler and macro directives (in
alphabetical order), special characters, unary operators, binary operators,
and addressing modes.

•

Appendix D lists alphabetically and by opcode the permanent symbols
(instruction set) defined for use with VAX MACRO.

Associated Documents
The following documents are relevant to VAX MACRO programming:
•

VAX-11 Architecture Reference Manual

•

VAX/VMS DCL Dictionary

•

The descriptions of the VAX/VMS Linker and Symbolic Debugger in the
VAX/VMS Utilities Reference Volume

•

VAX/VMS System Routines Reference Volume

Conventions Used in This Document
The following conventions are observed in this manual, as in the other VAX
documents:
Convention

Meaning

UPPERCASE WORDS
AND LETTERS

Uppercase words and letters used in format examples
indicate that you should type the word or letter
exactly as shown.

lowercase words
and letters

Lowercase words and letters used in format examples
indicate that you are to substitute a word or value of
your choice.

Square brackets indicate that the enclosed item is
optional.
A horizontal ellipsis indicates that the preceding
item(s) can be repeated as necessary.
A vertical ellipsis indicates that not all of the state¬
ments in an example or figure are shown.

xviii

New and Changed Features
This manual describes Version 4.00 of VAX MACRO. The following sections
describe technical changes that have been made since Version 3.00, and
changes to the documentation.

Changes to VAX MACRO

•

The assembler now suppresses generation of the . BLANK . program
section when the . BLANK . program section has not been referenced.

•

There is a new directive, .LINK. The .LINK directive allows you to include
linker option records in an object module produced by VAX MACRO. The
qualifiers for the .LINK directive perform functions similar to the functions
performed by the same qualifiers for the DCL command LINK.

Changes to the Documentation of VAX MACRO

•

The descriptions of the general assembler directives and the directives
used in macros have been combined into one section (Section 6). The
descriptions of these assembler directives are organized in alphabetical
order.

•

The VAX data types and the instruction set are described in Sections 7, 8,
and 9 of this manual.

xix

VAX MACRO Language
Part I provides an overview of the features of the VAX MACRO
language, and includes an introduction to the structure and com¬
ponents of VAX MACRO source statements. Part I also contains a
detailed discussion of the VAX MACRO addressing modes, general
assembler directives, and macro directives.

Introduction

The VAX MACRO programming language is an assembly language for
programming VAX computers under the VAX/VMS operating system. Source
programs written in the VAX MACRO programming language are translated
into object (or binary) code by the VAX MACRO assembler, which produces
an object module and, optionally, a listing file. The features of the language
are introduced in this section.
VAX MACRO source programs consist of a sequence of source statements.
These source statements may be any of the following:
•

VAX native-mode instructions

•

Direct assignment statements

•

Assembler directives

Instructions manipulate data. They perform such functions as addition, data
conversion, and transfer of control. Instructions are usually followed in the
source statement by operands, which can be any kind of data needed for
the operation of the instruction. The VAX instruction set is summarized in
Appendix D of this volume and is described in detail in Section 9 and in the
VAX-11 Architecture Reference Manual.
Direct assignment statements equate symbols to values.
Assembler directives guide the assembly process and provide tools for using
the instructions. There are two classes of assembler directives: general
assembler directives and macro directives.
General assembler directives can be used to perform the following operations:
•

Store data or reserve memory for data storage

•

Control the alignment of parts of the program in memory

•

Specify the methods of accessing the sections of memory in which the
program will be stored

•

Specify the entry point of the program or a part of the program

•

Specify the way in which symbols will be referenced

•

Specify that a part of the program is to be assembled only under certain
conditions

•

Control the format and content of the listing file

•

Display informational messages

•

Control the assembler options that are used to interpret the source pro¬
gram

•

Define new opcodes

1-1

VAX MACRO and Instruction Set
Introduction

Macro directives are used to define macros and repeat blocks. They allow you
to perform the following operations:
•

Repeat identical or similar sequences of source statements throughout a
program

•

Use string operators to manipulate and test the contents of source state¬
ments

Use of macros and repeat blocks helps minimize programmer errors and
speeds the debugging process.

1-2

MACRO Source Statement Format

A source program consists of a sequence of source statements, which the
assembler interprets and processes, one at a time, generating object code or
performing a specific assembly-time process. A source statement can occupy
one source line or can extend onto several source lines. Each source line can
be up to 132 characters long; however, to ensure that the source line fits (with
its binary expansion) on one line in the listing file, no line should exceed 80
characters.
MACRO statements can consist of up to four fields.
•

Label field—symbolically defines a location in a program.

•

Operator field—specifies the action to be performed by the statement; this
field can be an instruction, an assembler directive, or a macro call.

•

Operand field—contains the instruction operand(s) or the assembler
directive argument(s) or the macro argument(s).

•

Comment field—contains a comment that explains the meaning of the
statement; this field does not affect program execution.

The label field and the comment field are optional. The label field ends
with a colon (:) and the comment field starts with a semicolon (;). The
operand field must conform to the format of the instruction, directive, or
macro specified in the operator field.
Although statement fields can be separated by either a space or a tab (see
Table 3-2), formatting statements with the tab character is recommended for
consistency and clarity. By DIGITAL convention, tab characters are used to
separate the statement fields.
Field

Begins in Column

Tab Characters to Reach Column

Label

Operator

Operand

Comment

For example:

LABT:
LAB2:

.TITLE
.ENTRY
CLRL
SUBL3
BRB

R0UT1
START,~M<>
RO
#10,4 CAP),R2
CONT

;
;
;
;

Beginning of routine
Clear register
Subtract 10
Branch to another routine

A single statement can be continued on several lines by using a hyphen (-)
as the last nonblank character before the comment field, or at the end of line
(when there is no comment). For example:
LABI:

MOVAL

W“BOO$AL_VECTOR,RPB$L_I0VEC(R7)

; Save boot driver

2-1

VAX MACRO and Instruction Set
MACRO Source Statement Format

VAX MACRO treats the preceding statement as equivalent to the following
statement:
LABI:

MOVAL

W'‘B00$AL_VECT0R,RPB$L_I0VEC(R7)

; Save boot driver

A statement can be continued at any point. Permanent and user-defined
symbol names, however, should not be continued on two lines. If a symbol
name is continued and the first character on the second line is a tab or a
blank, the symbol name will be terminated at that character. Section 3.3
describes symbols in detail.
Note that when a statement occurs in a macro definition (see Sections 4
and 6), the statement cannot contain more than 1000 characters.
Blank lines are legal, but they have no significance in the source program
except that they terminate a continued line.
The following sections describe each of the statement fields in detail.

2.1

Label Field
A label is a user-defined symbol that identifies a location in the program. The
symbol is assigned a value equal to the location counter at the location in the
program section in which the label occurs. The user-defined symbol name
can be up to 31 characters long and can contain any alphanumeric character
and the underscore (_), dollar sign ($), and period (.) characters. Section
3.3.2 describes the rules for forming user-defined symbol names in more
detail.
If a statement contains a label, the label must be in the first field on the line.
A label is terminated by a colon (:) or a double colon (::). A single colon
indicates that the label is defined only for the current module (an internal
symbol). A double colon indicates that the label is globally defined; that is,
the label can be referenced by other object modules.
Once a label is defined, it cannot be redefined during the source program. If
a label is defined more than once, VAX MACRO displays an error message
when the label is defined and again when it is referenced.
If a label extends past column 7, it should be placed on a line by itself so that
the operator field can start in column 9.
The following example illustrates some of the ways you can define labels:
. BLKL
. BLKW

50
25

CLRL
EVAL:
ERROR.,IN_ARG:
INCL
MOVO
TEST::

EXP:
DATA::

TEST1:

BRW

RO
EXP.R1
EXIT

Table stores expected values
Data table accessed by store
routine in another module
Routine evaluates expressions
The arg-list contains an error
increment error count
This tests routine
referenced externally
Go to exit routine

The label field is also used for the symbol in a direct assignment statement
(see Section 3.8).

2-2

VAX MACRO and Instruction Set
MACRO Source Statement Format

2.2 Operator Field
The operator field specifies the action to be performed by the statement. This
field can contain an instruction, an assembler directive, or a macro call.
When the operator is an instruction, VAX MACRO generates the binary
code for that instruction in the object module. The binary codes are listed
in Appendix D; the instruction set is described in Section 9 and in the VAX11 Architecture Reference Manual. When the operator is a directive, VAX
MACRO performs certain control actions or processing operations during
source program assembly; the assembler directives are described in Section 6.
When the operator is a macro call, VAX MACRO expands the macro; macro
calls are described in Section 4 and in Section 6 (.MACRO directive).
Either a space or a tab character may terminate the operator field; however,
the tab is the recommended termination character.

2.3 Operand Field
The operand field can contain operands for instructions or arguments for
either assembler directives or macro calls.
Operands for instructions identify the memory locations or the registers that
are used by the machine operation. These operands specify the addressing
mode for the instruction, as described in Section 5. The operand field for a
specific instruction must contain the number of operands required by that
instruction. See Section 9 and the VAX-11 Architecture Reference Manual for
descriptions of the instructions and their operands.
Arguments for a directive must meet the format requirements of that directive.
Section 6 describes the directives and the format of their arguments.
Operands for a macro must meet the requirements specified in the macro
definition. See the description of the .MACRO directive in Section 6.
If two or more operands are specified, they should be separated by commas.
VAX MACRO also allows a space or tab to be used as a separator for ar¬
guments to any directive that does not accept expressions (see Section 3.5
for a discussion of expressions.) However, a comma is required to sepa¬
rate operands for instructions and for directives that accept expressions as
arguments.
The semicolon that starts the comment field terminates the operand field. If
a line does not have a comment field, the operand field is terminated by the
end of the line.

2.4 Comment Field
The comment field contains text that explains the function of the statement.
Every line of code should have a comment. Comments do not affect assem¬
bly processing or program execution except for messages displayed during
assembly by the .ERROR, .PRINT, and .WARN directives (see descriptions in
Section 6).
The comment field must be preceded by a semicolon; it is terminated by the
end of the line. The comment field can contain any printable ASCII character
(see Appendix A).

2—3

VAX MACRO and Instruction Set
MACRO Source Statement Format

If a comment does not fit on one line, it can be continued on the next, but the
continuation must be preceded by another semicolon. A comment can appear
on a line by itself.
The text of a comment normally conveys the meaning rather than the action
of the statement. The instruction MOVAL BUF_PTR_1,R7, for instance,
should have a comment such as "Get pointer to first buffer" not "Move
address of BUF_PTR_1 to R7."
For example:
MOVAL
MOVZWL
MOVL

2-4

STRING_DES_1,R0 ; Get address of string
;
descriptor
(RO).Rl
; Get length of string
4(RO),RO
; Get address of string

The Components of MACRO Source
Statements
This chapter describes the components of VAX MACRO source statements:

3.1

•

The character set

•

Numbers

•

Symbols

•

Local labels

•

Terms and expressions

•

Unary and binary operators

•

Direct assignment statements

•

The current location counter

Character Set
The following characters can be used in VAX MACRO source statements:
•

The letters of the alphabet, A through Z, uppercase and lowercase. Note
that the assembler considers lowercase letters equivalent to uppercase
letters except when they appear in ASCII strings.

•

The digits 0 through 9.

•

The special characters listed in Table 3-1.

Table 3-1

Special Characters Used in VAX MACRO
Statements

Character

Character Name

Function

—
$

Underline

Character in symbol names

Dollar sign
Period

Character in symbol names
Character in symbol names, current location
counter, and decimal point
Label terminator

Colon
=

Equal sign
Tab
Space

#
@

Number sign
At sign

Comma

Direct assignment operator and macro
keyword argument terminator
Field terminator
Field terminator
Immediate addressing mode indicator
Deferred addressing mode indicator and
arithmetic shift operator
Field, operand, and item separator

3-1

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

Table 3—1

(Cont.)

Special Characters Used in VAX MACRO
Statements

Character

Character Name

Function

Semicolon

Comment field indicator

Plus sign

Autoincrement addressing mode indicator,
unary plus operator, and arithmetic addition
operator

Minus sign or
hyphen

Autodecrement addressing mode indicator,
unary minus operator, arithmetic subtraction
operator, and line continuation indicator

•

Asterisk

Arithmetic multiplication operator

Slash

Arithmetic division operator

Ampersand

Logical AND operator

Exclamation
point

Logical inclusive OR operator

Backslash

Logical exclusive OR and numeric conver¬
sion indicator in macro arguments

Circumflex

Unary operators and macro argument
delimiter

[]

Square brackets

Index addressing mode and repeat count
indicators

()

Parentheses

Angle brackets

Argument or expression grouping delimiters

Question mark

Created local label indicator in macro
arguments

Apostrophe

Macro argument concatenation indicator

Percent sign

Macro string operators

Table 3-2 defines the separating characters used in VAX MACRO.
Table 3-2

Separating Characters in VAX MACRO Statements

Character

Character Name

Usage

Space or tab

Separator between statement fields.
Spaces within expressions are ignored.

Comma

Separator between symbolic arguments
within the operand field. Multiple expres¬
sions in the operand field must be separated
by commas.

3-2

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

3.2

Numbers
Numbers can be integers, floating-point numbers, or packed decimal strings.

3.2.1

Integers
Integers can be used in any expression including expressions in operands and
in direct assignment statements (Section 3.5 describes expressions).

Format
snn
S

An optional sign: plus sign (+) for positive numbers (the default) or minus
sign (-) for negative numbers.

nn
A string of numeric characters that are legal for the current radix.
VAX MACRO interprets all integers in the source program as decimal unless
the number is preceded by a radix control operator (see Section 3.6.1).
Integers must be in the range of -2,147,483,648 through +2,147,483,647 for
signed data or in the range of 0 through 4,294,967,295 for unsigned data.
Negative numbers must be preceded by a minus sign; VAX MACRO translates
such numbers into two's complement form. In positive numbers, the plus sign
is optional.

3.2.2

Floating-Point Numbers
A floating-point number can be used in the .F_JFLOATING (.FLOAT),
.D—FLOATING, (.DOUBLE) .G-FLOATING, and .H_FLOATING directives
(described in Section 6) or as an operand in a floating-point instruction. A
floating-point number cannot be used in an expression or with a unary or
binary operator except the unary plus, unary minus, and unary floating-point
operator, T (F—FLOATING). Sections 3.6 and 3.7 describe unary and binary
operators.
A floating-point number can be specified with or without an exponent.

Formats
Floating-point number without exponent:
snn
snn.nn
snn.

Floating-point number with exponent:
snnEsnn
snn.nnEsnn
snn.Esnn

3-3

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

s
An optional sign.

nn
A string of decimal digits in the range of 0 through 9.
The decimal point can appear anywhere to the right of the first digit. How¬
ever, note that a floating-point number cannot start with a decimal point
because VAX MACRO will treat the number as a user-defined symbol (see
Section 3.3.2).
Floating-point numbers can be single-precision (32-bit), double-precision
(64-bit), or extended-precision (128-bit) quantities. The degree of precision is
7 digits for single-precision numbers, 16 digits for double-precision numbers,
and 33 digits for extended-precision numbers.
The magnitude of a nonzero floating-point number cannot be smaller than
approximately 0.29E-38 or greater than approximately 1.7E38.
Single-precision floating-point numbers can be rounded (by default) or
truncated. The .ENABLE and .DISABLE directives (described in Section
6) control whether single-precision floating-point numbers are rounded or
truncated. Double-precision and extended-precision floating-point numbers
are always rounded.
Sections 8.2.6, 8.2.7, 8.2.8, and 8.2.9 describe the internal format of floating¬
point numbers.

3.2.3

Packed Decimal Strings
A packed decimal string can be used only in the .PACKED directive (de¬
scribed in Section 6).

Format
snn
S

An optional sign.

nn
A string containing up to 31 decimal digits in the range of 0 through 9.
A packed decimal string cannot have a decimal point or an exponent.
Section 8.2.14 describes the internal format of packed decimal strings.

3.3

Symbols
Three types of symbols can be used in VAX MACRO source programs:
permanent symbols, user-defined symbols, and macro names.

3-4

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

3.3.1

Permanent Symbols
Permanent symbols consist of instruction mnemonics (see Appendix D),
VAX MACRO directives (see Section 6), and register names. Instruction
mnemonics and directives need not be defined before being used in the
operator field of a VAX MACRO source statement. Register names need not
be defined before being used in the addressing modes (see Section 5).
Register names cannot be redefined; that is, a user-defined symbol cannot
have one of the register names contained in the following list. The 16 general
registers of the VAX processor can be expressed in a source program only as
follows:
Register
Name

Processor Register

General register 0

General register 1

General register 2

R11

General register 11

R12 or
AP

General register 12 or argument pointer. If R12 is used as an
argument pointer, the name AP is recommended; if R12 is used
as a general register, the name R12 is recommended.

Frame pointer

Stack pointer

Program counter

Note that the symbols IV and DV are also permanent symbols, and cannot
be redefined, These symbols are used in the register mask to set the integer
overflow trap (IV) and the decimal string overflow trap (DV). See Section
3.6.2.2 for an explanation of their uses.

3.3.2

User-Defined Symbols and Macro Names
User-defined symbols can be used as labels or can be equated to a specific
value by a direct assignment statement (see Section 3.8). These user-defined
symbols also can be used in any expression (see Section 3.5).
The following rules govern the creation of user-defined symbols:
•

User-defined symbols can be composed of alphanumeric characters,
underlines (_), dollar signs ($), and periods (.). Any other character
terminates the symbol.

•

The first character of a symbol must not be a number.

•

The symbol must be no more than 31 characters long and must be unique.

3-5

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

In addition, by DIGITAL convention:
•

The dollar sign ($) is reserved for names defined by DIGITAL. This
convention ensures that a user-defined name (which does not have a
dollar sign) will not conflict with a DIGITAL-defined name (which does
have a dollar sign).

•

The period (.) should not be used in any global symbol name (see
Section 3.3.3) because other languages, such as FORTRAN, do not allow
periods in symbol names.

Macro names follow the same rules and conventions as user-defined sym¬
bols. (See the description of the .MACRO directive in Section 6 for more
information on macro names.) User-defined symbols and macro names do
not conflict; that is, the same name can be used for a user-defined symbol
and a macro. However, to avoid confusion, user-defined symbols and macros
should be given different names.

3.3.3

Determining Symbol Values
The value of a symbol depends on its use in the program. VAX MACRO uses
a different method to determine the values of symbols in the operator field
than it uses to determine the values of symbols in the operand field.
A symbol in the operator field can be either a permanent symbol or a macro
name. VAX MACRO searches for a symbol definition in the following order:
1

Previously defined macro names

User-defined opcode (see the .OPDEF description in Section 6)

Permanent symbols (instructions and directives)

Macro libraries

This search order allows permanent symbols to be redefined as macro names.
If a symbol in the operator field is not defined as a macro or a permanent
symbol, the assembler displays an error message.
A symbol in the operand field must be either a user-defined symbol or a
register name.
User-defined symbols can be either local (internal) symbols or global (exter¬
nal) symbols. Whether symbols are local or global depends on their use in
the source program.
A local symbol can be referenced only in the module in which it is defined.
If local symbols with the same names are defined in different modules, the
symbols are completely independent. The definition of a global symbol,
however, can be referenced from any module in the program.
Normally, VAX MACRO treats all user-defined symbols as local when they
are defined. However, a symbol definition can be explicitly declared to be
global by any one of the following three methods:

3-6

•

Use of the double colon (::) in defining a label (see Section 2.1)

•

Use of the double equal sign (==) in a direct assignment statement (see
Section 3.8)

•

Use of the .GLOBAL, .ENTRY, or .WEAK directive (see Section 6)

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

When a symbol is referenced within the module in which it is defined, VAX
MACRO considers the reference internal. When a symbol is referenced within
a module in which it is not defined, VAX MACRO considers the reference
external (that is, the symbol is defined in another module). The .DISABLE
directive can be used to make references to symbols not defined in the current
module illegal. In this case, the .EXTERNAL directive must be used to specify
that the reference is an external reference. See Section 6 for descriptions of
the .DISABLE and .EXTERNAL directives.

3.4

Local Labels
Local labels are used to identify addresses within a block of source code.

Format
nn$

nn
A decimal integer in the range of 1 through 65535.
Local labels can be used in the same way as user-defined symbol labels, with
the following differences:
•

Local labels cannot be referenced outside the block of source code in
which they appear.

•

Local labels can be reused in another block of source code.

•

Local labels do not appear in the symbol tables and thus cannot be
accessed by the VAX Symbolic Debugger.

•

Local labels cannot be used in the .END directive (see Section 6).

By convention, local labels are positioned like statement labels: left-justified
in the source text. Although local labels can appear in the program in any
order, by convention, the local labels in any block of source code should be
in numeric order.
Local labels are useful as branch addresses when the address is used only
within the block. Local labels can be used to distinguish between addresses
that are referenced only in a small block of code and addresses that are
referenced elsewhere in the module. A disadvantage of local labels is that
their numeric names cannot provide any indication of their purpose. Conse¬
quently, local labels should not be used to label sequences of statements that
are logically unrelated; user-defined symbols should be used instead.
DIGITAL recommends that users create local labels only in the range of 1$ to
29999$ because the assembler automatically creates local labels in the range
of 30000$ to 65535$ for use in macros (see Section 4.7).
The local label block in which a local label is valid is delimited by the
following statements:
•

A user-defined label

•

A .PSECT directive (see Section 6)

•

The .ENABLE and .DISABLE directives (see Section 6), which can extend
a local label block beyond user-defined labels and .PSECT directives

3-7

•

A second .ENABLE LOCAl^BLOCK directive

•

A .DISABLE LOCAL-BLOCK directive followed by a user-defin
a .PSECT directive

Although local label blocks can extend from one program section to
DIGITAL recommends that local labels in one program section not
enced from another program section. User-defined symbols should
instead.

Local labels can be preserved for future reference with the context
program section in which they are defined; see the descriptions of t
.SAVE—PSECT [LOCAL-BLOCK] directive and the .RESTORE_PS
directive in Section 6.
An example showing the use of local labels follows.
RPSUB:
10$:

COMP:
10$:

20$:

ENTR1:

AMOUNT.RO
delta.ro
10$

ADDL2
M0VL
CLRL
CMPL
BGTR

DELTA.RO
MAX.R1
R2
R0.R1
20$

SUBL
INCL
BRB

INCR.RO
R2
10$

MOVL
BRW

R2.COUNT
TEST

.ENABLE LOCAL.BLOCK
#~M<R0.R1.R2>
POPR
ADDL3
R0.R1.R3
BRB
10$

ENTR2:

SUBL2

R2.R3

10$:

SUBL2
BGTR

R2.R3
20$

INCL
BRB

RO
NEXT

20$:
NEXT:

3-8

M0VL
SUBL2
BGTR

DECL
RO
.DISABLE LOCAL.BLOCK
R4
CLRL

Start local label block
Define local label 10$
Conditional branch to
local label
Executed when R0 not > 0
End previous local label
block and starts new one
Define new local label 10$
Conditional branch to
local label
Executed when R0 not > R1
Unconditional branch to
local label
Define local label
Unconditional branch to
user-defined label
Start local label block that
will not be terminated
by a user-defined label
Branch to local label that appears
after a user-defined label
Does not start a new
local label block
Define local label
Conditional branch to
local label
Executed when R2 not > R3
Unconditional branch to
user-defined label
Define local label
Directive followed by userdefined label terminates
local label block

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

3.5

Terms and Expressions
A term can be any one of the following:
•

A number

•

A symbol

•

The current location counter (see Section 3.9)

•

A textual operator followed by text (see Section 3.6.2)

•

Any of the previously noted items, preceded by a unary operator (see
Section 3.6)

VAX MACRO evaluates terms as longword (4-byte) values. If an undefined
symbol is used as a term, the linker determines the value of the term. The
current location counter (.) has the value of the location counter at the start
of the current operand.
Expressions are combinations of terms joined by binary operators (see Section
3.7) and evaluated as longword (4-byte) values. VAX MACRO evaluates
expressions from left to right with no operator precedence rules. However,
angle brackets ( < > ) can be used to change the order of evaluation. Any
part of an expression that is enclosed in angle brackets is first evaluated to a
single value, which is then used in evaluating the complete expression. For
example, the expressions A*B+C and A* <B+C> are different. Angle brackets
can also be used to apply a unary operator to an entire expression, such as
- <A+B> .
Note that unary operators are considered part of a term; thus, VAX MACRO
performs the action indicated by a unary operator before it performs the
action indicated by any binary operator.
Expressions fall into three categories: relocatable, absolute, and external
(global).
•

An expression is relocatable if its value is fixed relative to the start of
the program section in which it appears. The current location counter is
relocatable in a relocatable program section.

•

An expression is absolute if its value is an assembly-time constant. An
expression whose terms are all numbers is absolute. An expression that
consists of a relocatable term minus another relocatable term from the
same program section is absolute, since such an expression reduces to an
assembly-time constant.

•

An expression is external if it contains one or more symbols that are not
defined in the current module.

Any type of expression can be used in most MACRO statements, but restric¬
tions are placed on expressions used in:
•

.ALIGN alignment directives

•

.BLKx storage allocation directives

•

.IF and .IIF conditional assembly block directives

•

.REPEAT repeat block directives

•

.OPDEF opcode definition directives

•

.ENTRY entry point directives
3-9

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

•

.BYTE, .LONG, .WORD, .SIGNED—BYTE, and .SIGNED_WORD directive
repetition factors

•

Direct assignment statements (see Section 3.8)

See Section 6 for descriptions of the directives listed in the preceding list.
Expressions used in these directives and in direct assignment statements
can only contain symbols that have been previously defined in the current
module. They cannot contain either external symbols or symbols defined later
in the current module. In addition, the expressions in these directives must
be absolute. Expressions in direct assignment statements can be relocatable.
An example showing the use of expressions follows.
A = 2*100
.BLKB

A+50

LAB:
.BLKW
A
HALF = LAB+<A/2>

3.6

LAB2:

.BLKB

LAB2-LAB

LAB3:

.WORD

TST+LAB+2

2*100 is an absolute expression
A+50 is an absolute expression and
contains no undefined symbols
LAB is relocatable
LAB+<A/2> is a relocatable
expression and contains no
undefined symbols
LAB2-LAB is an absolute expression
and contains no undefined symbols
but contains the symbol LAB3
that is defined later in this module
TST+LAB+2 is an external expression
because TST is an external symbol

Unary Operators
A unary operator modifies a term or an expression, and indicates an action
to be performed on that term or expression. Expressions modified by unary
operators must be enclosed in angle brackets. Unary operators can be used
to indicate whether a term or expression is positive or negative (if unary
plus or minus is not specified, the value is assumed to be plus, by default).
In addition, unary operators perform radix conversion, textual conversion
(including ASCII conversion), and numeric control operations, as described in
the following sections. Table 3-3 summarizes the unary operators.

Table 3-3

3-10

Unary Operators

Unary
Operator

Operator Name

Example

Operation

Plus sign

Results in the positive
value of A

Minus sign

-A

Results in the negative
(two's complement)
value of A

Binary

311000111

Specifies that
11000111 is a binary
number

Decimal

3127

Specifies that 127 is a
decimal number

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

Table 3-3 (Cont.)

Unary Operators

Unary
Operator

Operator Name

Example

Operation

Octal

T>34

Specifies that 34 is an
octal number

Hexadecimal

~XFCF9

Specifies that FCF9 is
a hexadecimal number

ASCII

"A/ABC/

Produces an ASCII
string; the characters
between the match¬
ing delimiters are
converted to ASCII
representation

rM<R3fR4/R5>

Specifies the registers
R3, R4, and R5 in the
register mask

Floating-point

T3.0

Specifies that 3.0 is a
floating-point number

Complement

X24

Produces the one's
complement value of
24 (decimal)

More than one unary operator can be applied to a single term or to an
expression enclosed in angle brackets. For example:
-+-A

This construct is equivalent to:
-<+<-A»

3.6.1

Radix Control Operators
VAX MACRO accepts terms or expressions in four different radixes: binary,
decimal, octal, and hexadecimal. The default radix is decimal. Expressions
modified by radix control operators must be enclosed in angle brackets.

Formats
~Bnn
~Dnn
~Onn
~Xnn

nn
A string of characters that are legal in the specified radix. The legal characters
for each radix are contained in the following list.

3-11

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

Format

Radix Name

Legal Characters

T3nn

Binary

0 and 1

Dnri

Decimal

0 through 9

"Orm

Octal

0 through 7

"Xnn

Hexadecimal

0 through 9 and A through F

Radix control operators can be included in the source program anywhere
a numeric value is legal. A radix control operator affects only the term or
expression immediately following it, causing that term or expression to be
evaluated in the specified radix.
For example:
WORD
WORD
WORD
WORD
LONG

“B00001101
“D123
“047
<A+“013>
“X<FlC3+FFFFF-20>

Binary radix
Decimal radix (default)
Octal radix
13 is in octal radix
All numbers in expression
are in hexadecimal radix

The circumflex cannot be separated from the B, D, O, or X that follows it, but
the entire radix control operator can be separated by spaces and tabs from the
term or expression that is to be evaluated in that radix.
The decimal operator, the default, is needed only within an expression that
has another radix control operator. In the following example, "16" would be
interpreted as an octal number if the *D operator did not precede it:
.LONG

3.6.2

“0<10000 ♦ 100 ♦ “D16>

Textual Operators
The textual operators are the ASCII operator ("A) and the register mask
operator (~M).
3.6.2.1

ASCII Operator
The ASCII operator converts a string of printable characters to their 8-bit
ASCII values and stores them one character to a byte. The string of characters
must be enclosed in a pair of matching delimiters.
The delimiters can be any printable character except the space, tab, or semi¬
colon (;). Although alphanumeric characters can be used as delimiters,
nonalphanumeric characters should be used to avoid confusion.
Format
“Astring

string
A delimited ASCII string from 1 through 16 characters long.
The delimited ASCII string must not be larger than the data type of the
operand. For example, if the "A operator occurs in an operand in a MOVW
instruction (the data type is a word), the delimited string cannot be more than
two characters.

3-12

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

For example:

3.6.2.2

QUAD
MOVL

~A%1234/678%
#~A/ABCD/,RO

CMPW

#~A/XY/,RO

MOVL

#~A/AB/,RO

Generates 8 bytes of ASCII data
Moves characters ABCD
into RO right justified with
"A” in low-order byte and "DM
in high-order byte
Compares X and Y as ASCII
characters with contents of low
order 2 bytes of RO
Moves ASCII characters AB into
RO; "A" in low-order byte; "B" in
next; and zero the 2 high-order bytes

Register Mask Operator
The register mask operator converts a register name or a list of register names
enclosed in angle brackets into a 1- or 2-byte register mask. The register
mask is used by the PUSHR and POPR instructions and the .ENTRY and
.MASK directives (see Section 6).
Formats
~Mreg-name
~M<reg-name-list>

reg-name
One of the register names or the DV or IV arithmetic trap enable specifiers.
reg-name-list
A list of register names and/or the DV and IV arithmetic trap enable speci¬
fiers, separated by commas.
The register mask operator sets a bit in the register mask for every register
name or arithmetic trap enable specified in the list. The bits corresponding to
each register name and arithmetic trap enable specifier are listed below.
Register Name

Arithmetic Trap
Enable

Bits

RO through Rll

0 through 11

R12 or AP

When the register mask operator is used in a POPR or PUSHR instruction, RO
through Rll, R12 or AP, FP, and SP can be specified. The PC register name
and the IV and DV arithmetic trap enable specifiers cannot be specified.
When the register mask operator is used in the .ENTRY or .MASK directives,
R2 through Rll and the IV and DV arithmetic trap enable specifiers can be
specified. However, RO, Rl, FP, SP, and PC cannot be specified. IV sets the
integer overflow trap, and DV sets the decimal string overflow trap.
See the VAX-11 Architecture Reference Manual for more information on
arithmetic trap enable specifiers.

3-13

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

For example:

3.6.3

.ENTRY RT1,~M<R3,R4,R5,R6,IV>

; Save registers R3. R4.
;
R5, and R6 and set the
;
integer overflow trap

PUSHR

#~M<R0.R1,R2,R3>

; Save registers RO, R1.
;
R2, and R3

POPR

#~M<R0,R1,R2,R3>

; Restore registers RO, Rl,
;
R2, and R3

Numeric Control Operators
The numeric control operators are the floating-point operator (T) and the
complement operator (AC). The use of the numeric control operators is
explained in the following two sections.

3.6.3.1

Floating-Point Operator
The floating-point operator accepts a floating-point number and converts
it to its internal representation (a 4-byte value). This value can be used in
any expression. VAX MACRO does not perform floating-point expression
evaluation.

Format
“Fliteral

literal
A floating-point number (see Section 3.2.2).
The floating-point operator is useful because it allows a floating-point number
in an instruction that accepts integers.
For example:

3.6.3.2

MOVL

#~F3.7,R0

MOVF

#3.7,R0

; NOTE: the recommended instruction
;
to move this floating-point
;
number is the MOVF instruction

Complement Operator
The complement operator produces the one's complement of the specified
value.

Format
~Cterm

term
Any term or expression. If an expression is specified, it must be enclosed in
angle brackets.
VAX MACRO evaluates the term or expression as a 4-byte value before
complementing it.
For example:
.LONG
.LONG

3-14

~C~XFF
~C25

; Produces FFFFFFOO (hex)
; Produces complement of
;
25 (dec) which is
;
FFFFFFE6 (hex)

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

3.7

Binary Operators
In contrast to unary operators, binary operators specify actions to be per¬
formed on two terms or expressions. Expressions must be enclosed in angle
brackets. Table 3-4 summarizes the binary operators.
Table 3-4

Binary Operators

Binary
Operator

Operator Name

Example

Operation

Plus sign

A+B

Addition

Minus sign

A-B

Subtraction

Asterisk

A*B

Multiplication

Slash

A/B

Division

At sign

A@B

Arithmetic shift

Ampersand

A&B

Logical AND

Exclamation point

A!B

Logical inclusive OR

Backslash

A\B

Logical exclusive OR

All binary operators have equal priority. Terms or expressions can be grouped
for evaluation by enclosing them in angle brackets. The enclosed terms and
expressions are then evaluated first, and remaining operations are performed
from left to right. For example:
.LONG
.LONG

1+2*3
l+<2*3>

; Equals 9
; Equals 7

Note that a 4-byte result is returned from all binary operations. If a 1-byte
or 2-byte operand is used, the result is the low-order byte(s) of the 4-byte
result. VAX MACRO displays an error message if the truncation causes a loss
of significance.
The following sections describe the arithmetic shift, logical AND, logical
inclusive OR, and logical exclusive OR operators in more detail.

3.7.1

Arithmetic Shift Operator
The arithmetic shift operator (@) is used to perform left and right arithmetic
shifts of arithmetic quantities. The first argument is shifted left or right by
the number of bit positions specified in the second argument. If the second
argument is positive, the first argument is shifted left; if the second argument
is negative, the first argument is shifted right. When the first argument is
shifted left, the low-order bits are set to 0; and when the first argument is
shifted right, the high-order bits are set to the value of the original high-order
bit (the sign bit).
For example:
.LONG
.LONG

~B101@4
1©2

; Yields 1010000 (binary)
; Yields 100 (binary)

.LONG
.LONG
MOVL

1(3 A
“X1234Q-A
#<~B1100000®-5>,RO

; Yields 10000 (binary)
; Yields 123(hex)
; Yields 11 (binary)

A = 4

3-15

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

3.7.2 Logical AND Operator
The logical AND operator (&) takes the logical AND of two operands.
For example:
A = ~B1010
B = “B1100
.LONG

A&B

; Yields 1000 (binary)

3.7.3 Logical Inclusive OR Operator
The logical inclusive OR operator (!) takes the logical inclusive OR of two
operands.
For example:
A = ~B1010
B = “B1100
.LONG

A!B

; Yields 1110 (binary)

3.7.4 Logical Exclusive OR Operator
The logical exclusive OR operator (\) takes the logical exclusive OR of two
arguments.
For example:
A = -B1010
B = ~B1100
.LONG

3.8

A\B

; Yields 0110 (binary)

Direct Assignment Statements
A direct assignment statement equates a symbol to a specific value. Unlike
a symbol that is used as a label, a symbol defined with a direct assignment
statement can be redefined as many times as desired.

Formats
symbol=expression
symbol==expre88ion

symbol
A user-defined symbol.

expression
An expression that does not contain any undefined symbols (see Section 3.5).
The format with a single equal sign ( = ) defines a local symbol and the format
with a double equal sign (==) defines a global symbol. See Section 3.3.3 for
more information about local and global symbols.
The following three syntactic rules apply to direct assignment statements:

3—16

•

An equal sign ( = ) or double equal sign (==) must separate the symbol
from the expression which defines its value. Spaces preceding and/or
following the direct assignment operators have no significance in the
resulting value.

•

Only one symbol can be defined in a single direct assignment statement.

VAX MACRO and Instruction Set
The Components of MACRO Source Statements

•

A direct assignment statement can be followed only by a comment field.

In addition, by DIGITAL convention, the symbol in a direct assignment
statement is placed in the label field.
For example:

3.9

A == 1

The symbol 'A' is globally
equated to the value 1

B = A@5

The symbol 'B' is equated
to 1©5 or 20(hex)

C = 127*10

The symbol 'C' is equated
to 1270(dec)

D = ~X100/~X10

The symbol 'D' is equated
to 10(hex)

Current Location Counter
The symbol for the current location counter, the period (.), always has the
value of the address of the current byte. VAX MACRO sets the current
location counter to 0 at the beginning of the assembly and at the beginning of
each new program section.
Every VAX MACRO source statement that allocates memory in the object
module increments the value of the current location counter by the number of
bytes allocated. For example, the directive .LONG 0 increments the current
location counter by 4. However, with the exception of the special form
described below, a direct assignment statement does not increase the current
location counter because no memory is allocated.
The current location counter can be explicitly set by a special form of the
direct assignment statement. The location counter can be either incremented
or decremented. Setting the location counter in this manner is often useful
when defining data structures. Data storage areas should not be reserved by
explicitly setting the location counter; the .BLKx directives should be used
instead (see Section 6).

Format
.=expre8sion

expression
An expression that does not contain any undefined symbols (see Section 3.5).
In a relocatable program section, the expression must be relocatable; that is,
the expression must be relative to an address in the current program section.
It may be relative to the current location counter.
For example:
. = .+40

; Moves location counter forward

When a program section previously defined in the current module is contin¬
ued, the current location counter is set to the last value of the current location
counter in that program section.
When the current location counter is used in the operand field of an in¬
struction, the current location counter has the value of the address of that
operand—it does not have the value of the address of the beginning of the
instruction. For this reason, the current location counter is not normally used
as a part of the operand specifier.

3-17

Macro Arguments and String Operators

By using macros, you can use a single line to insert a sequence of source lines
into a program.
A macro definition contains the source lines of the macro. The macro defini¬
tion can optionally have formal arguments. These formal arguments can be
used throughout the sequence of source lines. Later, the formal arguments
are replaced by the actual arguments in the macro call.
The macro call consists of the macro name optionally followed by actual
arguments. The assembler replaces the line containing the macro call with
the source lines in the macro definition. It replaces any occurrences of formal
arguments in the macro definition with the actual arguments specified in the
macro call. This process is called the macro expansion.
The macro directives (described in Section 6) provide facilities for perform¬
ing eight categories of functions. Table 6-2 lists these categories and the
directives that fall under them.
By default, macro expansions are not printed in the assembly listing. They
are printed only when the .SHOW directive (see description in Section 6) or
the /SHOW qualifier (described in the VAX/VMS DCL Dictionary) specifies
the EXPANSIONS argument. In the examples in this section, the macro
expansions are listed as they would appear if .SHOW EXPANSIONS was
specified in the source file or /SHOW=EXPANSIONS was specified in the
MACRO command string.
The remainder of this section describes macro arguments, created local labels,
and the macro string operators.

4.1

Arguments in Macros
Macros have two types of arguments: actual and formal. Actual arguments
are the strings given in the macro call after the name of the macro. Formal
arguments are specified by name in the macro definition; that is, after the
macro name in the .MACRO directive. Actual arguments in macro calls and
formal arguments in macro definitions can be separated by commas, tabs, or
spaces.
The number of actual arguments in the macro call can be less than or equal
to the number of formal arguments in the macro definition. But if the number
of actual arguments is greater than the number of formal arguments, the
assembler displays an error message.
Formal and actual arguments normally maintain a strict positional relation¬
ship. That is, the first actual argument in a macro call replaces all occurrences
of the first formal argument in the macro definition. However, this strict
positional relationship can be overridden by the use of keyword arguments
(see Section 4.3).

4—1

VAX MACRO and Instruction Set
Macro Arguments and String Operators

An example of a macro definition using formal arguments follows.
.MACRO
.LONG
.WORD
.BYTE
.ENDM

STORE
ARG1
ARG3
ARG2
STORE

ARG1.ARG2,ARG3
ARG1 is first argument
ARG3 is third argument
ARG2 is second argument

The following two examples show possible calls and expansions of the macro
defined previously.

4.2

STORE
.LONG
.WORD
.BYTE

3,2,1
3
1
2

Macro call
3 is first argument
1 is third argument
2 is second argument

STORE
.LONG
.WORD
.BYTE

X,X-Y,Z
X
Z
X-Y

Macro call
X is first argument
Z is third argument
X-Y is second argument

Default Values
Default values are values that are defined in the macro definition. They are
used when no value for a formal argument is specified in the macro call.
Default values are specified in the .MACRO directive as follows:
formal-argument-name = default-value

An example of a macro definition specifying default values follows.
.MACRO
.LONG
.WORD
.BYTE
.ENDM

STORE
ARG1
ARG3
ARG2
STORE

ARG1=12.ARG2=0.ARG3=1000

The following three examples show possible calls and expansions of the
macro defined previously.

4.3

STORE
.LONG
.WORD
.BYTE

12
1000
0

STORE
.LONG
.WORD
.BYTE

,5.X
12
X
5

Last two arguments supplied

STORE
.LONG
.WORD
.BYTE

1
1
1000
0

First argument supplied

; No arguments supplied

Keyword Arguments
Keyword arguments allow a macro call to specify the arguments in any
order; however, the macro call must specify the same formal argument names
that appear in the macro definition. Keyword arguments are useful when a
macro definition has many formal arguments, only some of which need to be
specified in the call.

4-2

VAX MACRO and Instruction Set
Macro Arguments and String Operators

In any one macro call the arguments should be either all positional arguments
or all keyword arguments. When positional and keyword arguments are com¬
bined in a macro, only the positional arguments correspond by position to the
formal arguments; the keyword arguments are not used. If a formal argument
corresponds to both a positional argument and a keyword argument, the
argument that appears last in the macro call overrides any other argument
definition for the same argument.
For example, the following macro definition specifies three arguments.
.MACRO
.LONG
.WORD
.BYTE
.ENDM

STORE
ARG1
ARG3
ARG2
STORE

ARG1.ARG2,ARG3

The following macro call specifies keyword arguments.
STORE
.LONG
.WORD
.BYTE

ARG3=27+5/4,ARG2=5.ARG1=SYMBL
SYMBL
27+5/4
5

Because the keywords are specified in the macro call, the arguments in the
macro call need not be given in the order they were listed in the macro
definition.

4.4

String Arguments
If an actual argument is a string containing characters that the assembler
interprets as separators (such as a tab, space, or comma), the string must be
enclosed by delimiters. String delimiters are usually paired angle brackets
( < > ). However, the assembler also interprets any character after an initial
circumflex (") as a delimiter. Thus, to pass an angle bracket as part of a
string, you can use the circumflex form of the delimiter.
The following are examples of delimited macro arguments.
<HAVE THE SUPPLIES RUN OUT?>
<LAST NAME. FIRST NAME>
<LAB:
CLRL
R4>
-/.ARGUMENT IS <LAST,FIRST> FOR CALL*/.
~?EXPRESSION IS <5+3>*<4+2>?

In the last two examples, the initial circumflex indicates that the percent sign
(%) and question mark (?), respectively, are the delimiters. Note that only
the left hand delimiter is preceded by a circumflex.
The assembler interprets a string argument enclosed by delimiters as one
actual argument and associates it with one formal argument. If a string
argument that contains separator characters is not enclosed by delimiters, the
assembler interprets it as successive actual arguments and associates it with
successive formal arguments.
For example, the following macro call has one formal argument.
.MACRO
.ASCII
.ASCII
.ENDM

REPEAT STRNG
/STRNG/
/STRNG/
REPEAT

4-3

VAX MACRO and Instruction Set
Macro Arguments and String Operators

The following two macro calls demonstrate actual arguments with and
without delimiters.
REPEAT
.ASCII
.ASCII

<A B C D E>
/ABODE/
/A B C D E/

REPEAT A B C D E
%MACRO-E-TOOMNYARGS, Too many arguments in MACRO call

Note that the assembler interpreted the second macro call as having five
actual arguments instead of one actual argument with spaces.
When a macro is called, the assembler removes the delimiters (if present)
around a string before associating it with the formal arguments.
If a string contains a semicolon, the string must be enclosed by delimiters, or
the semicolon will mark the start of the comment field.
Strings enclosed by delimiters cannot be continued on a new line.
To pass a number containing a radix or unary operator (for example, AXF19),
the entire argument must be enclosed by delimiters, or the assembler will
interpret the radix operator as a delimiter. The following are macro arguments
that are enclosed in delimiters because they contain radix operators.
<~XF19>
<~B01100011>
<~F1.5>

Macros can be nested; that is, a macro definition can contain a call to another
macro. If, within a macro definition, another macro is called and is passed a
string argument, you must delimit the argument so that the entire string is
passed to the second macro as one argument.
The following macro definition contains a call to the REPEAT macro defined
in an earlier example.
LABI:

.MACRO
.BYTE
REPEAT

CNTRPT LABI,LAB2,STR_ARG
LAB2-LAB1-1
; Length of 2*string
<STR_ARG>
; Call REPEAT macro

.ENDM

CNTRPT

LAB2:

Note that the argument in the call to REPEAT is enclosed in angle brackets
even though it does not contain any separator characters. The argument is
thus delimited because it is a formal argument in the definition of the macro
CNTRPT, and will be replaced with an actual argument that may contain
separator characters.
The following example calls the macro CNTRPT, which in turn calls the
macro REPEAT.
ST:

CNTRPT
.BYTE
REPEAT
.ASCII
.ASCII

ST,FIN.<LEARN YOUR ABC'S>
FIN-ST-1
; Length of 2*string
<LEARN YOUR ABC'S>
; Call REPEAT macro
/LEARN YOUR ABC'S/
/LEARN YOUR ABC'S/

FIN:

An alternative method to pass string arguments in nested macros is to enclose
the macro argument in nested delimiters. In this case, the macro calls in
the macro definitions should not have delimiters. Each time the delimited
argument is used in a macro call, the assembler removes the outermost pair
of delimiters before associating it with the formal argument. This method is
not recommended because it requires that you know how deeply a macro is
nested.

VAX MACRO and Instruction Set
Macro Arguments and String Operators

The following macro definition also contains a call to the REPEAT macro.
.MACRO

CNTRPT2 LABI,LAB2,STR_ARG

.BYTE

LAB2-LAB1-1

;

Length of 2*string

REPEAT

STR.ARG

;

Call REPEAT macro

.ENDM

CNTRPT2

Note that the argument in the call to REPEAT is not enclosed in angle
brackets.
The following example calls the macro CNTRPT2.
CNTRPT2 BEG, TERM, «MIND YOUR P'S AND Q'S»
BEG:

.BYTE

TERM-BEG-1

;

Length of 2*string

REPEAT

;

Call REPEAT macro

.ASCII

/MIND YOUR P'S AND Q'S/

.ASCII

/MIND YOUR P'S AND Q'S/

TERM:

Note that even though the call to REPEAT in the macro definition is not
enclosed in delimiters, the call in the expansion is enclosed because the call
to CNTRPT2 contains nested delimiters around the string argument.

4.5

Argument Concatenation
The argument concatenation operator, the apostrophe ('), concatenates a
macro argument with some constant text. Apostrophes can either precede or
follow a formal argument name in the macro source.
If an apostrophe precedes the argument name, the text before the apostrophe
is concatenated with the actual argument when the macro is expanded. For
example, if ARG1 is a formal argument associated with the actual argument
TEST, ABCDE'ARGl is expanded to ABCDETEST.
If an apostrophe follows the formal argument name, the actual argument is
concatenated with the text that follows the apostrophe when the macro is
expanded. For example, if ARG2 is a formal argument associated with the
actual argument MOV, ARG2'L is expanded to MOVL.
Note that the apostrophe itself does not appear in the macro expansion.
To concatenate two arguments, separate the two formal arguments with
two successive apostrophes. Two apostrophes are needed because each
concatenation operation discards an apostrophe from the expansion.
An example of a macro definition that uses concatenation follows.
.MACRO CONCAT

INST.SIZE.NUM

TEST'NUM':
INST''SIZE

RO.R'NUM

TEST'NUM'X:
.ENDM

CONCAT

Note that two successive apostrophes are used when concatenating the two
formal arguments INST and SIZE.
An example of a macro call and expansion follows.
CONCAT

MOV.L,5

MOVL

R0.R5

TEST5:
TEST5X:

4-5

VAX MACRO and Instruction Set
Macro Arguments and String Operators

4.6

Passing Numeric Values of Symbols
When a symbol is specified as an actual argument, the name of the symbol,
not the numeric value of the symbol, is passed to the macro. However,
the value of the symbol can be passed by inserting a backslash (\) before
the symbol in the macro call. The assembler then passes the characters
representing the decimal value of the symbol to the macro. For example, if
the symbol COUNT has a value of 2 and the actual argument specified is
\COUNT, the assembler passes the string “2” to the macro; it does not pass
the name of the symbol, "COUNT"" .
Passing numeric values of symbols is especially useful with the apostrophe
(') concatenation operator for creating new symbols.
An example of a macro definition for passing numeric values of symbols
follows.
.MACRO
.ENTRY
.ENDM

TESTDEF.TESTNO.ENTRYMASK=~?~M<>?
TEST•TESTNO.ENTRYMASK
; Uses arg concatenation
TESTDEF

The following example shows a possible call and expansion of the macro
defined previously.
COUNT = 2
TESTDEF
.ENTRY
COUNT = COUNT +
TESTDEF
.ENTRY

4.7

\COUNT
TEST2,~M<>
; Uses arg concatenation
1
\COUNT,~?~M<R3,R4>?
TEST3,~M<R3,R4>
; Uses arg concatenation

Created Local Labels
Local labels are often very useful in macros. Although a macro definition
can specify local labels in the macro definition, these local labels might be
duplicated elsewhere in the local label block and might therefore cause errors.
However, the assembler can create local labels in the macro expansion which
will not conflict with other local labels. These labels are called created local
labels.
Created local labels range from 30000$ through 65535$. Each time the
assembler creates a new local label, it increments the numeric part of the
label name by 1. Consequently, no user-defined local labels should be in the
range of 30000$ through 65535$.
A created local label is specified by a question mark (?) in front of the formal
argument name. When the macro is expanded, the assembler creates a new
local label if the corresponding actual argument is blank. If the corresponding
actual argument is specified, the assembler substitutes the actual argument for
the formal argument. Created local symbols can be used only in the first 31
formal arguments specified in the .MACRO directive.
Created local labels can be associated only with positional actual arguments;
created local labels cannot be associated with keyword actual arguments.
The following example is a macro definition specifying a created local label.

LI:

4—6

.MACRO
TSTL
BGEQ
MNEGL
.ENDM

POSITIVE
ARG1
LI
ARG1.ARG1
POSITIVE

ARG1.?L1

VAX MACRO and Instruction Set
Macro Arguments and String Operators

The following three calls and expansions of the macro defined previously
show both created local labels and a user-defined local label.
POSITIVE RO
TSTL
RO
BGEQ
30000$
MNEGL
RO.RO
30000$:
POSITIVE COUNT
TSTL
COUNT
BGEQ
30001$
MNEGL
COUNT,COUNT
30001$:
POSITIVE VALUE,10$
TSTL
VALUE
BGEQ
10$
MNEGL
VALUE,VALUE
10$:

4.8

Macro String Operators
The three macro string operators are:
•

% LENGTH

•

%LOCATE

•

%EXTRACT

These operators perform string manipulations on macro arguments and ASCII
strings. They can be used only in macros and repeat blocks. The following
sections describe these operators and give their formats and examples of their
use.

4.8.1

%LENGTH Operator
Format
•/.LENGTH (string)

string
A macro argument or a delimited string. The string can be delimited by angle
brackets or a character preceded by a circumflex (see Section 4.4).

DESCRIPTION

The %LENGTH operator returns the length of a string. For example, the
value of %LENGTH( <ABCDE> ) is 5.

4-7

VAX MACRO and Instruction Set
Macro Arguments and String Operators

EXAMPLES
Macro definition:

ARG1
; Macro checks if ARG1
.MACRO CHK.SIZE
‘/.LENGTH (ARG1)-3
;
is between 3 and
.IF GREATER.EQUAL
6-%LENGTH(ARG1)
;
6 characters long
.IF LESS.THAN
.ERROR
; Argument ARG1 is greater than 6 characters
; If more than 6
. ENDC
; If less than 3
.IF.FALSE
.ERROR
; Argument ARG1 is less than 3 characters
; Otherwise do nothing
.ENDC
.ENDM
CHK.SIZE

Macro calls and expansions of the macro defined previously:

Macro checks if A
is between 3 and
6 characters long.
Should be too short.
.ERROR
; Argument A is greater than 6 characters
.ENDC
; If more than 6
.IF.FALSE
; If less than 3
•/.MACRO-E-GENERR, Generated ERROR: Argument A is less than 3 characters
CHK.SIZE
A
.IF GREATER.EQUAL
.IF LESS.THAN

1-3
6-1

Otherwise do nothing

.ENDC

4.8.2

; Macro checks if ABC
;
is between 3 and
;
6 characters long.
;
Should be ok.
.ERROR
; Argument ABC is greater than 6 characters
; If more than 6
.ENDC
; If less than 3
.IF.FALSE
.ERROR
; Argument ABC is less than 3 characters
; Otherwise do nothing
.ENDC

CHK.SIZE
ABC
.IF GREATER.EQUAL
3-3
.IF LESS.THAN
6-3

% LOCATE Operator
Format
•/.LOCATE (stringl, string2 [. symbol] )

string 1
A substring. The substring can be written either as a macro argument or as
a delimited string. The delimiters can be either angle brackets or a character
preceded by a circumflex.
string2
The string to be searched for the substring. The string can be written either
as a macro argument or as a delimited string. The delimiters can be either
angle brackets or a character preceded by a circumflex.
symbol
An optional symbol or decimal number that specifies the position in string2
at which the assembler should start the search. If this argument is omitted,
the assembler starts the search at position 0 (the beginning of the string).
The symbol must be an absolute symbol that has been previously defined;

4—8

VAX MACRO and Instruction Set
Macro Arguments and String Operators

the number must be an unsigned decimal number. Expressions and radix
operators are not allowed.

DESCRIPTION

The %LOCATE operator locates a substring within a string. If %LOCATE
finds a match of the substring, it returns the character position of the
first character of the match in the string. For example, the value of
%LOCATE( <D> , <ABCDEF> ) is 3. Note that the first character
position of a string is 0. If %LOCATE does not find a match, it
returns a value equal to the length of the string. For example, the value of
%LOCATE( Z 4- , <ABCDEF> ) is 6.
The %LOCATE operator returns a numeric value that can be used in any
expression.

EXAMPLES
Macro definition:
Q

.MACRO BIT.NAME ARG1
; Checks if ARG1 is in list
. IF EQUAL ‘/.LOCATE (ARG1. <DELDFWDLTDMOESC>) -15
; If it is not, print error
.ERROR
; ARG1 is an invalid bit name
.ENDC
; If it is, do nothing
.ENDM BIT.NAME

Macro calls and expansions of the macro defined previously:
0

BIT.NAME ESC
; Is ESC in list
.IF EQUAL 12-15
; If it is not, print error
.ERROR
; ESC is an invalid bit name
.ENDC
; If it is, do nothing
BIT.NAME F00
.IF EQUAL 15-15

; Not in list

;
'/.MACRO-E-GENERR, Generated ERROR:
.ENDC

;

If it is not, print error
F00 is an invalid bit name
If it is, do nothing

Note: If the optional symbol is specified, the search begins at the character
position of string2 specified by the symbol. For example, the value of
%LOCATE(<ACE>,<SPACE_HOLDER>,5) is 12 because there is no
match after the 5th character position.

4.8.3

% EXTRACT Operator
Format
'/.EXTRACT (symbol 1, symbol2, string)

symbol 1
A symbol or decimal number that specifies the starting position of the sub¬
string to be extracted. The symbol must be an absolute symbol that has
been previously defined; the number must be an unsigned decimal number.
Expressions and radix operators are not allowed.

4-9

VAX MACRO and Instruction Set
Macro Arguments and String Operators

symbol2
A symbol or decimal number that specifies the length of the substring to be
extracted. The symbol must be an absolute symbol that has been previously
defined; the number must be an unsigned decimal number. Expressions and
radix operators are not allowed.
string
A macro argument or a delimited string. The string can be delimited by angle
brackets or a character preceded by a circumflex.

DESCRIPTION

The %EXTRACT operator extracts a substring from a string. It returns the
substring that begins at the specified position and is of the specified length.
For example, the value of %EXTRACT(2,3, < ABCDEF>) is CDE. Note that
the first character in a string is in position 0.

EXAMPLES
Macro definition:
Q

.MACRO RESERVE ARG1
XX = '/.LOCATE(<=> , ARG1)
.IF EQUAL
XX-'/,LENGTH(ARG1)
WARN
; Incorrect format for macro call - ARG1
.MEXIT
. ENDC
'/.EXTRACT(0.XX.ARG1) : :
XX = XX-*-1
. BLKB
'/.EXTRACT (XX. 3. ARG1)
.ENDM
RESERVE

Macro calls and expansions of the macro defined previously:
0

RESERVE F00BAR
XX = 6
.IF EQUAL XX-6
'/.MACRO-W-GENWRN, Generated WARNING:

Incorrect format for macro call - F00BAR

.MEXIT

RESERVE L0CATI0N=12
XX = 8
.IF EQUAL XX-11
.WARN
; Incorrect format for macro call - L0CATI0N=12
.MEXIT
.ENDC
LOCATION::
XX = XX+1
.BLKB

Note: If the starting position specified is equal to or greater than the length of
the string, or if the length specified is 0, %EXTRACT returns a null string
(a string of 0 characters).

4-10

MACRO Addressing Modes

This section summarizes the VAX addressing modes and contains examples
of VAX MACRO statements that use these addressing modes. Table 5-1
summarizes the addressing modes. Section 8 describes the addressing mode
formats in detail.
There are four types of addressing modes.
•

General Register

•

Program Counter

•

Index

•

Branch

Although index mode is a general register mode, it is considered a separate
type of mode because it can be used only in combination with another type
of mode.

5.1

General Register Modes
The general register modes use registers RO through R12, AP (the same as
R12), FP, and SP.
There are eight general register modes.
•

•

Autoincrement

•

Autoincrement deferred

•

Autodecrement

•

Displacement

•

Displacement deferred

•

Literal

5-1

VAX MACRO and Instruction Set
MACRO Addressing Modes

Table 5-1

Addressing Modes

Type

Addressing
Mode

Format

Hex
Value

Description

Indexable?

General
Register

(Rn)

Yes

Autoincrement

(Rn)+

Register contains the address
of the operand; the proces¬
sor increments the register
contents by the size of the
operand data type

Yes

Autoincrement
Deferred

@(Rn)+

Yes

Autodecrement

-(Rn)

Yes

Displacement

dis(Rn)
ETdis(Rn)
\ATdis(Rn)
L/dis(Rn)

A
C
E

The processor decrements
the register contents by the
size of the operand data type;
the register then contains the
address of the operand
The sum of the contents of
the register and the displace¬
ment is the address of the
operand; B~, NAT, and L~ indi¬
cate byte, word, and longword
displacement, respectively

@dis(Rn)
@B~dis(Rn)
@V\Tdis(Rn)
@L~dis(Rn)

B
D
F

Displacement
Deferred

The sum of the contents of
the register and the displace¬
ment is the address of the
operand address; B", V\T,
and L~ indicate byte, word,
and longword displacement,
respectively

Yes

Key:
Rn—Any general register RO through R12. Note that the AP, FP, or SP register can be used in place
of Rn.
Rx—Any general register RO through R12. Note that the AP, FP# or SP register can be used in place of Rx.
Rx cannot be the same as the Rn specified in the base-mode for certain base modes (see Section 5.3).)
dis—An expression specifying a displacement,
address—An expression specifying an address.
literal—An expression, an integer constant, or a floating-point constant.

5-2

VAX MACRO and Instruction Set
MACRO Addressing Modes

Table 5-1 (Cont.)
Type

Program
Counter

Addressing Modes
Hex
Value

Addressing
Mode

Format

Literal

#literal
S~#literal

0-3

address
ETaddress
NATaddress
L~address

A
C
E

©address
@ETaddress
©NATaddress
@L"address

B
D
F

Absolute

@#address

Immediate

#literal
r#literal

Relative

Relative Deferred

General

G'address

Description

Indexable?

The literal specified is the
operand; the literal is stored
as a short literal

The address specified is
Yes
the address of the operand;
the address specified is
stored as a dAisplacement from
PC; B\ NAT, and L" indicate
byte, word, and longword
displacement, respectively
The address specified is
the address of the operand
address; the address specified
is stored as a displacement
from PC;
NAT, and L~
indicate byte, word, and
longword displacement,
respectively

Yes

The address specified is the
address of the operand; the
address specified is stored
as an absolute virtual address
(not as a displacement)

Yes

The literal specified is the
operand; the literal is stored
as a byte, word, longword, or
quadword

The address specified is the
address of the operand; if
the address is defined as
relocatable, the linker stores
the address as a displacement
from PC; if the address is
defined as an absolute virtual
address, the linker stores the
address as an absolute value

Yes

Key:
Rn—Any general register RO through R12. Note that the AP, FP, or SP register can be used in place
of Rn.
Rx—Any general register RO through R12. Note that the AP, FP, or SP register can be used in place of Rx.
Rx cannot be the same as the Rn specified in the base-mode for certain base modes (see Section 5.3).)
dis—An expression specifying a displacement,
address—An expression specifying an address.
literal—An expression, an integer constant, or a floating-point constant.

5-3

VAX MACRO and Instruction Set
MACRO Addressing Modes

Table 5-1 (Cont.)

Addressing Modes

Type

Addressing
Mode

Format

Hex
Value

Description

Indexable?

Index

base-mode[Rx]

The base-mode specifies the
base address and the register
specifies the index; the sum
of the base address and the
product of the contents of Rx
and the size of the operand
data type is the address of the
operand; base-mode can be
any addressing mode except
register, immediate, literal,
index, or branch

Branch

address

The address specified is
the operand; this address is
stored as a displacement to
PC; branch mode can only
be used with the branch
instructions

Key:
Rn—Any general register RO thugh R12. Note that the AP, FP, or SP register can be used in place
of Rn.
Rx—Any general register RO through R12. Note that the AP, FP, or SP register can be used in place of Rx.
Rx cannot be the same as the Rn specified in the base-mode for certain base modes (see Section 5.3).)
dis—An expression specifying a displacement,
address—An expression specifying an address.
literal—An expression, an integer constant, or a floating-point constant.

5.1.1

For quadword, D_fioating, G_floating or variable-bit field operands, the
operand is the contents of register n concatenated with the contents of
register n+1.

•

For octaword and FLJIoating operands, the operand is the contents of
register n concatenated with the contents of registers n+1, n+2, and n+3.

In each of these cases, the least significant bytes of the operand are in register
n and the most significant bytes are in the highest register used, either n+1 or
n+3.
The results of the operation are unpredictable if PC is used in register mode
or if the use of a large data type extends the operand into the PC.

5-4

VAX MACRO and Instruction Set
MACRO Addressing Modes

Formats
Rn
AP
FP
SP

n
A number in the range of 0 through 12.

EXAMPLE
CLRB
CLRQ
TSTW
INCL

5.1.2

RO
R1
RIO
R4

;
;
;
;

Clear lowest byte of RO
Clear R1 and R2
Test lower word of RIO
Add 1 to R4

Register Deferred Mode
In register deferred mode, the register contains the address of the operand.
Register deferred mode can be used with index mode (see Section 5.3).
Formats
(Rn)
(AP)
(FP)
(SP)

n
A number in the range of 0 through 12.

EXAMPLE
MOVAL
CMPL
BEQL
CLRL
MOVL
MOVZBL

5.1.3

LDATA.R3
(R3),R0
10$
(R3)
(SP),R1
(AP),R4

;
;
;
;
;
;

Move address of LDATA to R3
Compare value at LDATA to RO
If they are the same, ignore
Clear longword at LDATA
Copy top item of stack into R1
Get number of arguments in call

Autoincrement Mode
In autoincrement mode, the register contains the address of the operand.
After evaluating the operand address contained in the register, the processor
increments that address by the size of the operand data type. The processor
increments the contents of the register by 1, 2, 4, 8, or 16 for a byte, word,
longword, quadword, or octaword operand, respectively.
Autoincrement mode can be used with index mode (see Section 5.3), but the
index register cannot be the same as the register specified in autoincrement
mode.

5-5

VAX MACRO and Instruction Set
MACRO Addressing Modes

Formats
(Rn) +
(AP) +
(FP) +
(SP) +

n
A number in the range of 0 through 12.

EXAMPLE

5.1.4

MOVAL
CLRQ
CLRL

TABLE,R1
(Rl) +
(Rl) +

Get address of TABLE.
Clear first and second longwords
and third longword in TABLE;
leave Rl pointing to TABLE+12.

MOVAB
INCB
INCB

BYTARR,R2
(R2) +
(R2) +

Get address of BYTARR.
Increment first byte of BYTARR
and second.

X0RL3

(R3) ♦ , (R4) +, (R5) ♦

Exclusive-OR the two longwords
whose addresses are stored in
R3 and R4 and store result in
address contained in R5; then
add 4 to R3, R4, and R5.

Autoincrement Deferred Mode
In autoincrement deferred mode, the register contains an address that is the
address of the operand address (a pointer to the operand). After evaluating
the operand address, the processor increments the contents of the register by
4 (the size in bytes of an address).
Autoincrement deferred mode can be used with index mode (see Section
5.3), but the index register cannot be the same as the register specified in
autoincrement deferred mode.
Formats
Q(Rn)+
Q(AP)+
@(FP)+
<3(SP) +

n
A number in the range of 0 through 12.

EXAMPLE
MOVAL

PNTLIS,R2

Get address of pointer list.

CLRQ

®(R2)+

Clear quadword pointed to by
first absolute address in PNTLIS;
then add 4 to R2.

CLRB

Q(R2)+

Clear byte pointed to by second
absolute address in PNTLIS
then add 4 to R2.

5-6

VAX MACRO and Instruction Set
MACRO Addressing Modes

MOVL

5.1.5

R10,fl(R0)+

Move RIO to location whose address
is pointed to by RO; then add 4
to RO.

Autodecrement Mode
In autodecrement mode, the processor decrements the contents of the register
by the size of the operand data type; then the register contains the address
of the operand. The processor decrements the register by 1, 2, 4, 8, or 16 for
byte, word, longword, quadword, or octaword operands, respectively.
Autodecrement mode can be used with index mode (see Section 5.3), but the
index register cannot be the same as the register specified in autodecrement
mode.
Formats
-(Rn)
-(AP)
-(FP)
-(SP)

n
A number in the range of 0 through 12.

EXAMPLE

5.1.6

CLRO

-(Rl)

Subtract 8 from Rl and zero
the octaword whose address
is in Rl.

MOVZBL

R3.-CSP)

Push the zero-extended low byte
of R3 onto the stack as a
longword.

CMPB

Rl,-(RO)

Subtract 1 from RO and compare
low byte of Rl with byte whose
address is now in RO.

Displacement Mode
In displacement mode, the contents of the register plus the displacement
(sign-extended to a longword) produce the address of the operand.
Displacement mode can be used with index mode (see Section 5.3).
Formats
disCRn)
dis(AP)
dis(FP)
dis(SP)

5-7

VAX MACRO and Instruction Set
MACRO Addressing Modes

n
A number in the range of 0 through 12.
dis
An expression specifying a displacement; the expression can be preceded
by one of the following displacement length specifiers, which indicate the
number of bytes needed to store the displacement.
Displacement
Length Specifier

Meaning

Displacement requires one byte

v\r

Displacement requires one word (two bytes)
Displacement requires one longword
(four bytes)

If no displacement length specifier precedes the expression, and the value of
the expression is known, the assembler chooses the smallest number of bytes
(one, two, or four) needed to store the displacement. If no length specifier
precedes the expression, and the value of the expression is unknown, the
assembler reserves one word (two bytes) for the displacement. Note that if
the displacement is either relocatable or defined later in the source program,
the assembler considers it unknown. If the actual displacement does not fit in
the memory reserved, the linker displays an error message.

EXAMPLE
MOVAB

KEYWORDS.R3

Get address of KEYWORDS.

MOVB

B~I0(R3),R4

Get byte whose address is 10
plus address of KEYWORDS;
the displacement is stored
as a byte.

MOVB

B~ACCOUNT(R3),R5

Get byte whose address is
ACCOUNT plus address of
KEYWORDS; the displacement
is stored as a byte.

CLEW

L~STA(R1)

Clear word whose address
is STA plus contents of Rl;
the displacement is stored
as a longword.

MOVL

R0,-2(R2)

Move RO to address that is -2
plus the contents of R2; the
displacement is stored as a byte.

TSTB

EXTRN(R3)

Test the byte whose address
is EXTRN plus the address
of KEYWORDS; the displacement
is stored as a word, since
EXTRN is undefined.

MOVAB

2(R5),R0

Move <contents of R5> + 2
to RO.

Note: If the value of the displacement is 0 and no displacement length is speci¬
fied, the assembler uses register deferred mode rather than displacement
mode.

5—8

VAX MACRO and Instruction Set
MACRO Addressing Modes

5.1.7

Displacement Deferred Mode
In displacement deferred mode, the contents of the register plus the dis¬
placement (sign-extended to a longword) produce the address of the operand
address (a pointer to the operand).
Displacement deferred mode can be used with index mode (see Section 5.3).
Formats
©dis(Rn)
Qdis(AP)
©dis(FP)
©dis(SP)

Meaning

Displacement requires one byte

v\r

Displacement requires one word (two bytes)
Displacement requires one longword
(four bytes)

EXAMPLE
MOVAL
CLRL

ARRP0INT.R6
©16(R6)

Get address of array of pointers.
Clear longword pointed to by
longword whose address is
<16 + address of ARRPOINT>; the
displacement is stored as a byte.

MOVL

©B~OFFS(R6).©RSOFF(R6)

Move the longword pointed to
by longword whose address is
<OFFS ♦ address of ARRPOINT>
to the address pointed to by
longword whose address is
<RSOFFS + address of ARRPOINT>;
the first displacement is
stored as a byte; the second
displacement is stored as a word.

5-9

VAX MACRO and Instruction Set
MACRO Addressing Modes

CLRW

5.1.8

(584 (R2)

Clear word pointed to by
<longword at 84 + contents of R2>;
the assembler uses byte
displacement automatically.

Literal Mode
In literal mode, the value of the literal is stored in the addressing mode byte
itself.
Formats
#literal
S~#literal

literal
An expression, an integer constant, or a floating-point constant. The literal
must fit in the short literal form. That is, integers must be in the range of 0
through 63 and floating-point constants must be one of the 64 values listed
in Table 5-2. Floating-point short literals are stored with a 3-bit exponent
and a 3-bit fraction. Table 5-2 also shows the value of the exponent and the
fraction for each literal. See Section 8.6.8 for information on the format of
short literals.

5-10

VAX MACRO and Instruction Set
MACRO Addressing Modes

Table 5-2

Floating-Point Literals

Expressed as Decimal Numbers

Exponent

0.625

3
0.6875

Fraction
4

0.75

0.8125

0.875

0.9375

0.5

0.5625

1.0

1.125

1.25

1.37

1.5

1.625

1.75

1.875

2.0

2.25

2.5

2.75

3.0

3.25

3.5

3.75

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

8.0

9.0

10.0

11.0

12.0

13.0

14.0

15.0
30.0

16.0

18.0

20.0

22.0

24.0

26.0

28.0

32.0

36.0

40.0

44.0

48.0

52.0

56.0

60.0

64.0

72.0

80.0

88.0

96.0

104.0

112.0

120.0

Expressed as Rational Numbers

Exponent

Fraction
4

9/16

11/16

3/4

13/16

15/16

V/s

r/2

V/s

23/4

3V2

33/4

214

4 Vz

5y2

6V2

1V2

104

112

120

EXAMPLE
MOVL

#1,R0

R0 is set to 1; the 1 is stored
in the instruction as a short
literal.

MOVB

S~#CR,R1

The low byte of R1 is set
to the value CR.
CR is stored in the instruction
as a short literal.
If CR is not in range 0-63,
the linker produces a
truncation error.

MOVF

#0.625,R6

R6 is set to the floating-point
value 0.625; it is stored
in the floating-point short
literal form.

5-11

VAX MACRO and Instruction Set
MACRO Addressing Modes

NOTES

When the #literal format is used, the assembler chooses whether to use
literal mode or immediate mode (see Section 5.2.4). The assembler uses
immediate mode if any of the following conditions are met:
•

The value of the literal does not fit in the short literal form

•

The literal is a relocatable or external expression (see Section 3.5)

•

The literal is an expression that contains undefined symbols

The difference between immediate mode and literal mode is the amount
of storage that it takes to store the literal in the instruction.
2

5.2

The S^literal format forces the assembler to use literal mode.

Program Counter Modes
The program counter modes use PC for a general register. There are five
program counter modes.

5.2.1

•

Relative

•

Relative Deferred

•

Absolute

•

Immediate

•

General

Relative Mode
In relative mode, the address specified is the address of the operand. The
assembler stores the address as a displacement from PC.
Relative mode can be used with index mode (see Section 5.3).
Format
address

address
An expression specifying an address; the expression can be preceded by one
of the following displacement length specifiers, which indicate the number of
bytes needed to store the displacement.
Displacement
Length Specifier

Meaning

Displacement requires one byte

v\r

Displacement requires one word (two bytes)
Displacement requires one longword
(four bytes)

VAX MACRO and Instruction Set
MACRO Addressing Modes

expression is unknown, the assembler uses the default displacement length
(see the description of .DEFAULT in Section 6). If the address expression is
either defined later in the program or defined in another program section, the
assembler considers the value unknown.

EXAMPLE

5.2.2

MOVL

LABEL.R1

Get longword at LABEL; the
assembler uses default
displacement unless LABEL was
previously defined in this
section

CMPL

W~ <DATA+4>,RIO

Compare RIO with longword at
ad
uses a word displacement

Relative Deferred Mode
In relative deferred mode, the address specified is the address of the operand
address (a pointer to the operand). The assembler stores the address specified
as a displacement from PC.
Relative deferred mode can be used with index mode (see Section 5.3).
Format
Qaddress

Meaning
Displacent requires one byte

v\r

Displacement requires one word (two bytes)
Displacement requires one longword
(four bytes)

If no displacement length specifier precedes the address expression, and
the value of the expression is known, the assembler chooses the smallest
number of bytes (one, two, or four) needed to store the displacement. If
no length specifier precedes the address expression, and the value of the
expression is unknown, the assembler uses the default displacement length
(see the description of .DEFAULT in Section 6). If the address expression is
either defined later in the program or defined in another program section, the
assembler considers the value unknown.

5-13

VAX MACRO and Instruction Set
MACRO Addressing Modes

EXAMPLE

5.2.3

CLRL

®VTPNTR

Clear longword pointed to by
longword at PNTR; the assembler
uses a word displacement

INCB

®L~C0UNTS+4

Increment byte pointed to by
longword at COUNTS+4; assembler
uses a longword displacement

Absolute Mode
In absolute mode, the address specified is the address of the operand. The
address is stored as an absolute virtual address (compare relative mode,
where the address is stored as a displacement from PC).
Absolute mode can be used with index mode (see Section 5.3).
Format
®#addre88

address
An expression specifying an address.

EXAMPLE

5.2.4

CLRL

®#~X1100

Clear the contents of location 1100(hex)

CLRB

®#ACCOUNT

Clear the contents of location
ACCOUNT; the address is stored
absolutely, not as a displacement

CALLS

#3,®#SYS$FAO

Call the procedure SYS$FA0 with
three arguments on the stack

Immediate Mode
In immediate mode, the literal specified is the operand.
Formats
#literal
I~#literal

literal
An expression, an integer constant, or a floating-point constant.

EXAMPLE
MOVL

#1000,RO

; RO is set to 1000; the operand 1000
;
is stored in a longword

M0V3

#BAR,R1

; The low byte of R1 is set
;
to the value of BAR

5-14

VAX MACRO and Instruction Set
MACRO Addressing Modes

MOVF

R6 is set to the floating-point
value 0.1; it is stored
as a 4-byte floating-point
value (it cannot be
represented as a short literal)

#0.1,R6

ADDL2

I~ #5,R0

The 5 is stored in a longword
because the 1“ forces the
assembler to use immediate mode

MOVG

#0.2,R6

The value 0.2 is converted
to its G_FLOATING representation

MOVG

#PI,R6

The value contained in PI is
moved to R6; no conversion is
performed

NOTES

When the #literal format is used, the assembler chooses whether to use
literal mode (Section 5.1.8) or immediate mode. If the literal is an integer
from 0 through 63 or a floating-point constant that fits in the short literal
form, the assembler uses literal mode. If the literal is an expression, the
assembler uses literal mode if all the following conditions are met:
•

The expression is absolute

•

The expression contains no undefined symbols

•

The value of the expression fits in the short literal form

In all other cases, the assembler uses immediate mode.
The difference between immediate mode and literal mode is the amount
of storage required to store the literal in the instruction. The assembler
stores an immediate mode literal in a byte, word, or longword depending
on the operand data type.
2

The r#literal format forces the assembler to use immediate mode.

There are two ways in which floating-point numbers can be specified: as a
numeric value or as a symbol name. The assembler handles these values
in different ways.
•

Numeric values are converted to the appropriate internal floating-point
representation.

•

Symbols are not converted. The assembler assumes that the values
have already been converted to internal floating-point representation.

Once the value is obtained, the assembler attempts to convert the internal
representation of the value to a short floating literal. If conversion fails,
immediate mode is used; if conversion succeeds, short floating literal mode
is used.

5-15

VAX MACRO and Instruction Set
MACRO Addressing Modes

5.2.5

General Mode
In general mode, the address specified is the address of the operand. The
linker converts the addressing mode to either relative or absolute mode.
If the address is relocatable, the linker converts general mode to relative
mode. If the address is absolute, the linker converts general mode to absolute
mode. General mode is used to write position-independent code when the
programmer does not know whether the address is relocatable or absolute. A
general addressing mode operand requires five bytes of storage.
General mode can be used with index mode (see Section 5.3).
Format
G~address

address
An expression specifying an address.

EXAMPLE

5.3

CLRL

G~LABEL_1

; Clears the longword at LABEL.1
;
If LABEL.1 is defined as
;
absolute then general mode is
;
converted to absolute
;
mode; if it is defined as
;
relocatable, then general mode is
;
converted to relative mode

CALLS

#5,G~SYS$SERVICE

; Calls procedure SYS$SERVICE
;
with 5 arguments on stack

INDEX MODE
Index mode is a general register mode that can be used only in combination
with another mode (the base mode). The base mode can be any addressing
mode except register, immediate, literal, index, or branch. The assembler first
evaluates the base mode to get the base address. To get the operand address,
the assembler multiplies the contents of the index register by the number of
bytes of the operand data type, then adds the result to the base address.
Combining index mode with the other addressing modes produces the
following addressing modes:

5-16

•

Autoincrement index

•

Autoincrement deferred index

•

Autodecrement index

•

Displacement index

•

Displacement deferred index

•

Relative index

•

General index

The process of first evaluating the base mode and then
register is the same for each of these modes.
Formats
base-mode[Rx]
base-mode[AP]
base-mode[FP]
base-mode[SP]

base-mode
Any addressing mode except register, immediate, literal
specifying the base address.

x
A number in the range 0 through 12, specifying the inde
Table 5-3 lists the formats of index mode addressing.

EXAMPLE
Register deferred index mode
0FFS=20

Define OFFS
Get address of BLIST
Set up index register
Clear byte whose address
is the address of BLIST
plus 20*1

MOVAB
MOVL
CLRB

BLIST.R9
#0FFS,R1
(R9) [Rl]

CLRQ

(R9)[Rl]

Clear quadword whose
address is the address
of BLIST plus 20*8

CLRO

(R9) [Rl]

Clear octaword whose
address is the address
of BLIST plus 20*16

Autoincrement index mode
CLRW

(R9)+[Rl]

Clear word whose address
is address of BLIST plus
20*2; R9 now contains
address of BLIST+2

index mode
Autoincrement deferred ii
MOVAL
MOVL
CLRW

POINT,R8
#30.R2
<8(R8) + [R2]

Get address of POINT
Set up index register
Clear word whose address
is 30*2 plus the address
stored in POINT; R8 now
contains 4 plus address of
POINT

VAX MACRO and Instruction Set
MACRO Addressing Modes

Displacement deferred index mode
MOVAL
MOVL
TSTF

ADDARR.R9
#100,R1
®40(R9)[R1]

; Get address of address array
; Set up index register
; Test floating-point value
;
whose address is 100*4 plus
;
the address stored at
;
(ADDARR+40)

Table 5-3

Index Mode Addressing

Mode

Format1

(Rn)[Rx]

Autoincrement Index

(Rn)+[Rx]

Autoincrement Deferred
Index

@(Rn)+[Rx]

Autodecrement Index

-<Rn)[Rx]

Displacement Index

dis(Rn)[Rx]

Displacement Deferred
Index

@dis(Rn)[Rx]

Relative Index

address[Rx]

Relative Deferred Index

@address[Rx]

Absolute Index

@#address[Rx]

General Index

G"address[Rx]

^ey: Rn—Any general register RO through R12 or the AP, FP# or SP register.
Rx—Any general register RO through R12 or the AP, FP, or SP register. Rx
cannot be the same register as Rn in the autoincrement index, autoincrement
deferred index, and decrement index addressing modes, dis—An expression
specifying a displacement.

NOTES

5-18

If the base mode alters the contents of its register (autoincrement, autoin¬
crement deferred, and autodecrement), the index mode cannot specify the
same register.

The index register is added to the address after the base mode is com¬
pletely evaluated. For example, in autoincrement deferred index mode,
the base register contains the address of the operand address. The in¬
dex register (times the length of the operand data type) is added to the
operand address rather than to the address stored in the base register.

VAX MACRO and Instruction Set
MACRO Addressing Modes

5.4

BRANCH MODE
In branch mode, the address is stored as an implied displacement from PC.
This mode can only be used in branch instructions. The displacement for
conditional branch instructions and the BRB instruction is stored in a byte.
The displacement for the BRW instruction is stored in a word (two bytes).
A byte displacement allows a range of 127 bytes forward and 128 bytes
backward. A word displacement allows a range of 32767 bytes forward and
32768 bytes backward. The displacement is relative to the updated PC, the
byte past the byte or word where the displacement is stored. See Section 9
for more information on the branch instructions.
Format
address

address
An expression that represents an address.

EXAMPLE
ADDL3

(RD + .RO, TOTAL

BLEQ

LABEL1

BRW

LABEL

Total values and set condition
codes
Branch to LABEL1 if result is
less than or equal to 0
Branch unconditionally to LABEL

5-19

MACRO Assembler Directives

The general assembler directives provide facilities for performing 11 types of
functions. Table 6-1 lists these types of functions and the directives that fall
under them.
The macro directives provide facilities for performing eight categories of
functions. Table 6-2 lists these categories and the directives that fall under
them. Section 4 describes macro arguments and string operators.
The remainder of this section describes both the general assembler directives
and the macro directives in detail, showing their formats and giving examples
of their use. For ease of reference, the directives are presented in alphabetical
order. In addition. Appendix C contains a summary of all assembler
directives.

Table 6-1

Summary of General Assembler Directives

Category

Directives1

Listing Control
Directives

.SHOW (.LIST)
.NOSHOW (.NLIST)
TITLE
.SUBTITLE (.SBTTL)
.IDENT
.PAGE

Message Display
Directives

.PRINT
.WARN
.ERROR

Assembler Option
Directives

.ENABLE (.ENABL)
.DISABLE (.DSABL)
.DEFAULT

^he alternate form, if any, is given in parentheses.

6-1

MACRO Assembler Directives

Table 6-1

(Cont.)

Summary of General Assembler Directives

Category

Directives1

Data Storage
Directives

.BYTE
.WORD
.LONG
.ADDRESS
.QUAD
.OCTA
.PACKED
.ASCII
.ASCIC
.ASCID
ASCIZ
.F_FLOATING (.FLOAT)
.D_FLOATING (.DOUBLE)
.G_FLOATING
.H_FLOATING
.SIGNED_BYTE
.SIGNED_WORD

Location Control
Directives

.ALIGN
.EVEN
ODD
.BLKA
.BLKB
.BLKD
.BLKF
.BLKG
.BLKH
.BLKL
.BLKO
.BLKQ
.BLKW
.END

Program
Sectioning
Directives

.PSECT
.SAVE—PSECT (.SAVE)
.RESTORE—PSECT (.RESTORE)

Symbol Control
Directives

.GLOBAL (.GLOBL)
.EXTERNAL (.EXTRN)
.DEBUG
.WEAK

Routine Entry Point
Definition
Directives

.ENTRY
.TRANSFER
.MASK

Conditional
and Subconditional
Assembly
Block Directives

.IF
.ENDC
.IF—FALSE (.IFF)
.IF—TRUE (.IFT)
.IF_TRUE_FALSE (.IFTF)
.IIF

’The alternate form, if any, is given in parentheses.

6-2

MACRO Assembler Directives

Table 6-1

(Cont.)

Summary of General Assembler Directives

Category

Directives1

Cross-Reference
Directives

.CROSS
.NOCROSS

Instruction
Generation
Directives

.OPDEF
.REF1
.REF2
.REF4
.REF8
.REF16

Linker Option
Record Directive

.LINK

’The alternate form, if any, is given in parentheses.

Table 6-2

Summary of Macro Directives

Category

Directives1

Macro Definition
Directives

.MACRO
.ENDM

Macro Library
Directives

.LIBRARY
.MCALL

Macro Deletion
Directive

.MDELETE

Macro Exit
Directive

.MEXIT

Argument Attribute
Directives

.NARG
.NCHR
.NTYPE

Indefinite Repeat
Block Directives

.IRP
.IRPC

Repeat Block
Directives

.REPEAT (.REPT)

End Range
Directive

.ENDR

’The alternate form, if any, is given in parentheses.

6-3

Assembler Directives
.ADDRESS

.ADDRESS
Address storage directive

FORMAT

.ADDRESS address-list

parameter

address-list
A list of symbols or expressions, separated by commas, which VAX MACRO
interprets as addresses. Repetition factors are not allowed.

DESCRIPTION .ADDRESS stores successive longwords containing addresses in the object
module. DIGITAL recommends that .ADDRESS rather than .LONG be
used for storing address data to provide additional information to the
linker. In shareable images, addresses specified with .ADDRESS produce
position-independent code.

EXAMPLE
TABLE:

6-4

ADDRESS

LAB_4.

LAB_3,

ROUTTERM

;

Reference table

Assembler Directives
.ALIGN

.ALIGN
Location counter alignment directive

FORMATS

parameters

.ALIGN integer[,expression]
.ALIGN keyword], expression]
integer
An integer in the range of 0 through 9. The location counter is aligned at an
address that is the value of 2 raised to the power of the integer.

keyword
One of five keywords that specify the alignment boundary. The location
counter is aligned to an address that is the next multiple of the values listed
below.
Keyword

Size (in Bytes)

BYTE

2T) = 1

WORD

2~1 = 2

LONG

2*2 = 4

QUAD

2~3 = 8

PAGE

2^9 = 512

expression
Specifies the fill value to be stored in each byte. The expression must not
contain any undefined symbols and must be an absolute expression (see
Section 3.5).

DESCRIPTION

.ALIGN aligns the location counter to the boundary specified by either an
integer or a keyword.

NOTES

The alignment specified in .ALIGN cannot exceed the alignment of the
program section in which the alignment is attempted (see the description
of .PSECT). For example, if the default program section alignment (BYTE)
is being used and .ALIGN is specified with a WORD or larger alignment,
the assembler displays an error message.

If the optional expression is supplied, the bytes skipped by the location
counter (if any) are filled with the value of that expression. Otherwise, the
bytes are zero filled.

6-5

Assembler Directives
.ALIGN

Although most instructions do not require any data alignment other than
byte alignment, execution speed is improved by the following alignments:
Data Length

Alignment

Word

Longword

Quadword

EXAMPLE
ALIGN
ALIGN
ALIGN
ALIGN

6-6

BYTE,0
WORD
3,“A/ /
PAGE

;
;
;
;

Byte
Word
Quad
Page

alignment—fill with null
alignment
alignment—fill with blanks
alignment

Assembler Directives
.ASCIx

.ASCIx
ASCII character storage directives

DESCRIPTION VAX MACRO has four ASCII character storage directives:
Directive

Function

ASCIC

Counted ASCII string storage

ASCID

String-descriptor ASCII string storage

ASCII

ASCII string storage

ASCIZ

Zero-terminated ASCII string storage

Each directive is followed by a string of characters enclosed in a pair
of matching delimiters. The delimiters can be any printable character
except the space, tab, equal sign (=), semicolon (;), or left angle bracket
( <). The character used as the delimiter cannot appear in the string
itself. Alphanumeric characters can be used as delimiters; however,
nonalphanumeric characters should be used to avoid confusion.
Any character except the null, carriage return, and form feed characters
can appear within the string. The assembler does not convert lowercase
alphabetic characters to uppercase.
ASCII character storage directives convert the characters to their 8-bit ASCII
value (see Appendix A) and store them one character to a byte.
Any character, including the null, carriage return, and form feed characters,
can also be represented by an expression enclosed in angle brackets outside of
the delimiters. You must define the ASCII values of null, carriage return, and
form feed with a direct assignment statement. The ASCII character storage
directives store the 8-bit binary value specified by the expression.
ASCII strings can be continued over several lines. The hyphen must be
used as the line continuation character and the string on each line must be
delimited at both ends. Note that a different pair of delimiters can be used
for each line. For example:
CR=13
LF=10
.ASCII
.ASCIZ
.ASCIC
ASCII
.ASCII
.ASCII
ASCII

/ABC DEFG/
@Any character can be a delimiter®
? lowercase is not converted to UPPER?
? this is a test!?<CR><LF>!Isn't it?!
\ Angle Brackets <are part <of> this> string \
/ This string is continued / \ on the next line \
<CR><LF>! this string includes an expression! <128+CR>? whose value is a 13 plus 128?

The following sections describe each of the four ASCII character storage
directives, giving the formats and examples of each.

6-7

Assembler Directives
.ASCIC

.ASCIC
Counted ASCII string storage directive

FORMAT

.ASCIC string

parameter

string
A delimited ASCII string.

DESCRIPTION

.ASCIC performs the same function as .ASCII, except that .ASCIC inserts
a count byte before the string data. The count byte contains the length of
the string in bytes. The length given includes any bytes of nonprintable
characters outside the delimited string but excludes the count byte.
.ASCIC is useful in copying text because the count indicates the length of the
text to be copied.

EXAMPLE
CR=13

6-8

Direct assignment statement
defines CR
ASCIC

#HELLO#<CR>

.BYTE
.ASCII

6
#HELLO#<CR>

This counted ASCII string
is equivalent to the
count followed by
the ASCII string

Assembler Directives
.ASCID

.ASCID
String-descriptor ASCII string storage directive

FORMAT

.ASCID string

parameter

string
A delimited ASCII string.

DESCRIPTION

.ASCID performs the same function as ASCII, except that .ASCID inserts
a string descriptor before the string data. The string descriptor has the
following format:
31

0
information

length
pointer
ZK-370-81

Parameters

length
The length of the string (two bytes)

information
Descriptor information (not used) (two bytes)

pointer
Position independent pointer to the string (four bytes)
String descriptors are used in calling procedures (see the VAX-11 Architecture

Reference Manual).

EXAMPLE
DESCR1:
DESCR2:

.ASCID
.ASCID

/ARGUMENT FOR CALL/
/SECOND ARGUMENT/

String descriptor
Another string
descriptor

PUSHAL
PUSHAL
CALLS

DESCR1
DESCR2
#2.STRNG.PROC

Put address of descriptors
on the stack
Call procedure

6-9

Assembler Directives
.ASCII

.ASCII
ASCII string storage directive

.ASCII string

FORMAT
parameter

string
A delimited ASCII string.

DESCRIPTION

.ASCII stores, in the next available byte, the ASCII value of each character in
the ASCII string or the value of each byte expression.

EXAMPLE
; Assignment statements
;
define CR and LF

CR=13
LF=10
ASCII
ASCII

6-10

"DATE: 17-N0V-1984"
/EOF/<CR><LF>

; Delimiter is "
; Delimiter is /

Assembler Directives
.ASCIZ

.ASCIZ
Zero-terminated ASCII string storage directive

FORMAT

.ASCIZ string

parameter

string
A delimited ASCII string.

DESCRIPTION

.ASCIZ performs the same function as .ASCII, except that .ASCIZ appends a
null byte as the final character of the string. Thus, when a list or text string is
created with an .ASCIZ directive, you need only perform a search for the null
character in the last byte to determine the end of the string.

EXAMPLE
FF=12

; Define FF
.ASCIZ

/ABCDEF/

ASCIZ

/A/<FF>/B/

; 6 characters
;
7 bytes of
; 3 characters
;
4 bytes of

in string,
data
in strings,
data

6-11

Assembler Directives
.BLKx

.BLKx
Block storage allocation directives

FORMATS

parameter

.BLKA expression
.BLKB expression
.BLKD expression
.BLKF expression
.BLKG expression
.BLKH expression
.BLKL expression
.BLKO expression
.BLKQ expression
.BLKW expression
expression
An expression specifying the amount of storage to be allocated. All the
symbols in the expression must be defined and the expression must be an
absolute expression (see Section 3.5). If the expression is omitted, a default
value of 1 is assumed.

DESCRIPTION VAX MACRO has 10 block storage directives.
Directive

Function

.BLKA

Reserves storage for addresses (longwords)

.BLKB

Reserves storage for byte data

BLKD

Reserves storage for double-precision floating-point data
(quadwords)

.BLKF

Reserves storage for single-precision floating-point data
(longwords)

.BLKG

Reserves storage for G_floating data (quadwords)

.BLKH

Reserves storage for H_floating data (octawords)

.BLKL

Reserves storage for longword data

.BLKO

Reserves storage for octaword data

.BLKQ

Reserves storage for quadword data

.BLKW

Reserves storage for word data

Each directive reserves storage for a different data type. The value of the
expression determines the number of data items for which VAX MACRO
reserves storage. For example, .BLKL 4 reserves storage for four long words of
data and .BLKB 2 reserves storage for two bytes of data.

6—12

Assembler Directives
.BLKx

The total number of bytes reserved is equal to the length of the data type
times the value of the expression as follows:
Directive

Number of Bytes Allocated

.BLKB

Value of expression

.BLKW

2 * value of expression

.BLKA
BLKF

4 * value of expression

.BLKL
.BLKD

8 * value of expression

.BLKG
.BLKQ
.BLKH

16 * value of expression

.BLKO

EXAMPLE
BLKB
BLKO
BLKL
BLKF

15
3
1
<3*4>

;
;
;
;

Space for 15 bytes
Space for 3 octawords (48 bytes)
Space for 1 longword (4 bytes)
Space for 12 single-precision
floating-point values (48 bytes)

6-13

Assembler Directives
BYTE

-BYTE
Byte storage directive

FORMAT

. BYTE expression-list

parameter

expression-list
One or more expressions separated by commas. Each expression is first
evaluated as a longword expression; then the value of the expression is
truncated to one byte. The value of each expression should be in the range
of 0 through 255 for unsigned data or in the range of -128 through +127 for
signed data.
Each expression optionally can be followed by a repetition factor delimited by
square brackets. An expression followed by a repetition factor has the format:
expressionl[expression2]

expression1
An expression that specifies the value to be stored.

[expression2]
An expression that specifies the number of times the value will be repeated.
The expression must not contain any undefined symbols and it must be
absolute (see Section 3.5). The square brackets are required.

DESCRIPTION

.BYTE generates successive bytes of binary data in the object module.

NOTES

The assembler displays an error message if the high-order three bytes of
the longword expression has a value other than 0 or "XFFFFFF.

At link time, a relocatable expression can result in a value that exceeds one
byte in length. In this case, the VAX Linker issues a truncation diagnostic
message for the object module in question. For example:

.BYTE

Relocatable value 'A' will
cause VAX linker truncation
diagnostic if the statement
has a virtual address of 256
or above

6-14

The .SIGNED—BYTE directive is the same as .BYTE except the assembler
displays a diagnostic message if a value in the range 128 through 255 is
specified. See the description of .SIGNED—BYTE for more information.

.BYTE
.BYTE
.BYTE
.BYTE

<1024-1000>*2
~XA,FIF,10,65-<21*3>
0
X,X+3[5*4],Z

;
;
;
;

Stores
Stores
Stores
Stores

a value of 48
4 bytes of data
1 byte of data
22 bytes of data

Assembler Directives
.CROSS and .NOCROSS

.CROSS
.NOCROSS
Cross-reference directives

FORMATS

parameter

.CROSS [symbol-list]
.NOCROSS [symbol-list]
symbol-list
A list of legal symbol names separated by commas.

DESCRIPTION VAX MACRO produces a cross-reference listing when the
/CROSS-REFERENCE qualifier is specified in the MACRO command. The
.CROSS and .NOCROSS directives control which symbols are included in the
cross-reference listing. The .CROSS and .NOCROSS directives have an effect
only if /CROSS-REFERENCE was specified in the MACRO command (see
the VAX/VMS DCL Dictionary).
By default, the cross-reference listing includes the definition and all the
references to every symbol in the module. The cross-reference listing can be
disabled for all symbols or for a specified list of symbols.
.NOCROSS without a symbol list disables the cross-reference listing of all
symbols. Any symbol definition or reference that appears after .NOCROSS
without a symbol list and before the next .CROSS without a symbol list
is excluded from the cross-reference listing. .CROSS without a symbol list
reenables the cross-reference listing.
.NOCROSS with a symbol list disables the cross-reference listing for the
listed symbols only. .CROSS with a symbol list enables or reenables the
cross-reference listing of the listed symbols.

NOTES

.CROSS without a symbol list will not reenable the cross-reference listing
of a symbol specified in .NOCROSS with a symbol list.

If the cross-reference listing of all symbols is disabled, .CROSS with a
symbol list will have no effect until the cross-reference listing is reenabled
by .CROSS without a symbol list.

EXAMPLES
□
LABI:

.NOCROSS
MOVL
.CROSS

LOCI, L0C2

Stop cross-reference
Copy data
Reenable cross-reference

The definition of LABI and the references to LOCI and LOC2 are not
included in the cross-reference listing.

6-16

Assembler Directives
.CROSS and .NOCROSS

g
LAB2:

.NOCROSS
MOVL
.CROSS

LOCI
L0C1.L0C2
LOCI

Do not cross-reference LOCI
Copy data
Reenable cross-reference
of LOCI

The definition of LAB2 and the reference to LOC2 are included in
the cross-reference, but the reference to LOCI is not included in the
cross-reference.

6-17

Assembler Directives
.DEBUG

.DEBUG
Debug symbol attribute directive

FORMAT
parameter

.DEBUG symbol-list
symbol-list
A list of legal symbols separated by commas.

DESCRIPTION

.DEBUG specifies that the symbols in the list are made known to the VAX
Symbolic Debugger. During an interactive debugging session, these symbols
can be used to refer to memory locations or to examine the values assigned to
the symbols.

NOTE

The assembler adds the symbols in the symbol list to the symbol table in the
object module. You need not specify global symbols in the .DEBUG directive
because global symbols are automatically put in the object module's symbol
table. (See the description of .ENABLE for a discussion of how to make
information about local symbols available to the debugger.)

EXAMPLE
.DEBUG

6-18

INPUT,OUTPUT.LAB_30,LAB.40

; Make these symbols known
;
to the debugger

Assembler Directives
.DEFAULT

.DEFAULT
Default control directive

FORMAT
parameter

.DEFAULT DISPLACEMENT, keyword
keyword
One of three keywords—BYTE, WORD, or LONG—indicating the default
displacement length.

DESCRIPTION

.DEFAULT determines the default displacement length for the relative and
relative deferred addressing modes (see Sections 5.2.1 and 5.2.2).

NOTES

.DEFAULT has no effect on the default displacement for displacement and
displacement deferred addressing modes (see Sections 5.1.6 and 5.1.7).

2 If there is no .DEFAULT in a source module, the default displacement
length for the relative and relative deferred addressing modes is a
longword.

EXAMPLE
DEFAULT
MOVL

DISPLACEMENT.WORD
LABEL,R1

.DEFAULT DISPLACEMENT,LONG
INCB
QCOUNTS+4

;
;
;
;
;
;
;
;

WORD is default
Assembler uses word
displacement unless
label has been defined
LONG is default
Assembler uses longword
displacement unless
COUNTS has been defined

6-19

Assembler Directives
.D—FLOATING and .DOUBLE

.D-FLOATING
.DOUBLE
Floating-point storage directive

FORMATS

parameter

.D_FLOATING literal-list
.DOUBLE literal-list
literal-list
A list of floating-point constants (see Section 3.2.2). The constants cannot
contain any unary or binary operators except unary plus or unary minus.

DESCRIPTION

.D_FLOATING evaluates the specified floating-point constants and
stores the results in the object module. .D_FLOATING generates 64-bit,
double-precision, floating-point data (1 bit of sign, 8 bits of exponent, and
55 bits of fraction). See the description of .F_FLOATING for information
on storing single-precision floating-point numbers and the descriptions of
.G—FLOATING and .H__FLOATING for descriptions of other floating-point
numbers.

NOTES

Double-precision floating-point numbers are always rounded. They are
not affected by .ENABLE TRUNCATION.

2 The floating-point constants in the literal list must not be preceded by the
floating-point operator (T).

EXAMPLE
.D_FLOATING
.DOUBLE
.D.FLOATING

6-20

1000.1.0E3,1.0000000E-9
3.1415928, 1.107153423828
5. 10. 15. 0. 0.5

; Constant
; List

Assembler Directives
.DISABLE

.DISABLE
Function control directive

FORMAT
parameter

.DISABLE

argument-list

argument-list
One or more of the symbolic arguments listed in Table 6-3 in the description
of .ENABLE. Either the long form or the short form of the symbolic
arguments can be used. If multiple arguments are specified, they must be
separated by commas, spaces, or tabs.

DESCRIPTION

.DISABLE disables the specified assembler functions. See the description of
.ENABLE for more information.

NOTE

The alternate form of .DISABLE is .DSABL.

6-21

Assembler Directives
.ENABLE

.ENABLE
Function control directive

FORMAT
parameter

.ENABLE argument-list
argument-list
One or more of the symbolic arguments listed in Table 6-3. Either the long
form or the short form of the symbolic arguments can be used.
If multiple arguments are specified, they must be separated by commas,
spaces, or tabs.

6-22

Table 6-3

.ENABLE and .DISABLE Symbolic Arguments

Long Form

Short Form

Default
Condition

ABSOLUTE

AMA

Disabled

When ABSOLUTE is en¬
abled, all PC relative
addressing modes are
assembled as absolute
addressing modes.

DEBUG

DBG

Disabled

When DEBUG is enabled, all
local symbols are included
in the object module's
symbol table for use by the
debugger.

GLOBAL

GBL

Enabled

When GLOBAL is enabled,
all undefined symbols
are considered external
symbols. When GLOBAL
is disabled, any undefined
symbol that is not listed
in an .EXTERNAL directive
causes an assembly error.

LOCAL_
BLOCK

LSB

Disabled

When LOCAL-BLOCK is
enabled, the current local
label block is ended and a
new one is started. When
LOCAL-BLOCK is disabled,
the current local label block
is ended. See Section 3.4
for a complete description
of local label blocks.

Function

Assembler Directives
.ENABLE

Table 6—3 (Cont.)

DESCRIPTION

.ENABLE and .DISABLE Symbolic Arguments

Long Form

Short Form

Default
Condition

SUPPRESSION

SUP

Disabled

When SUPPRESSION is
enabled, all symbols that are
defined but not referred to
are not listed in the symbol
table. When SUPPRESSION
is disabled, all symbols that
are defined are listed in the
symbol table.

TRACEBACK

TBK

Enabled

When TRACEBACK is
enabled, the program
section names and lengths,
module names, and routine
names are included in the
object module for use
by the debugger. When
TRACEBACK is disabled,
VAX MACRO excludes this
information and, in addition,
does not make any local
symbol information available
to the debugger.

TRUNCATION

FPT

Disabled

When TRUNCATION is
enabled, single-precision
floating-point numbers
are truncated. When
TRUNCATION is
disabled, single-precision
floating-point numbers
are rounded. D_floating,
G_floating, and H_floating
numbers are not affected
by .ENABLE TRUNCATION;
they are always rounded.

Function

.ENABLE enables the specified assembly function. .ENABLE and its negative
form, .DISABLE, control the following assembler functions.
•

Creating local label blocks.

•

Making all local symbols available to the debugger and enabling the
traceback feature.

•

Specifying that undefined symbol references are external references.

•

Truncating or rounding single-precision floating-point numbers.

•

Suppressing the listing of symbols that are defined but not referenced.

•

Specifying that all PC references are absolute, not relative.

6-23

EXAMPLE
.ENABLE ABSOLUTE, GLOBAL

Assemble relative address mode
as absolute address mode, and consider
undefined references as global

.DISABLE TRUNCATION,TRACEBACK

Round floating-point numbers, and
omit debugging information from
the object module

6-24

Assembler Directives
.END

.END
Assembly termination directive

FORMAT
parameter

.END [symbol]

symbol
The address (called the transfer address) at which program execution is to
begin.

DESCRIPTION

.END terminates the source program. No additional text should occur beyond
this point in the current source file or in any additional source files specified
in the command line for this assembly. If any additional text does occur, the
assembler ignores the text. The additional text does not appear in either the
listing file or the object file.

NOTES

The transfer address must be in a program section that has the EXE
attribute (see the description of .PSECT).

When an executable image consisting of several object modules is linked,
only one object module should be terminated by an .END directive that
specifies a transfer address. All other object modules should be terminated
by .END directives that do not specify a transfer address. If an executable
image either contains no transfer address or contains more than one
transfer address, the VAX Linker displays an error message.

If the source program contains an unterminated conditional code block
when the .END directive is specified, the assembler displays an error
message.

EXAMPLE
.ENTRY

START,0

; Entry mask
; Main program

.END

START

; Transfer address

6-25

Assembler Directives
.ENDC

.ENDC
End conditional directive

FORMAT

.ENDC

DESCRIPTION

.ENDC terminates the conditional range started by the .IF directive. See the
description of .IF for more information and examples.

6-26

Assembler Directives
.ENDM

.ENDM
End definition directive

FORMAT
parameter

.ENDM

[macro-name]

macro-name
The name of the macro whose definition is to be terminated. The macro
name is optional; if specified, it must match the name defined in the matching
.MACRO directive. The macro name should be specified so that the assembler
can detect any improperly nested macro definitions.

DESCRIPTION

.ENDM terminates the macro definition. See the description of .MACRO for
an example of the use of .ENDM.

NOTE

If .ENDM is encountered outside a macro definition, the assembler displays
an error message.

6-27

Assembler Directives
.ENDR

.ENDR
End range directive

FORMAT

.ENDR

DESCRIPTION

.ENDR indicates the end of a repeat range. It must be the final statement
of every indefinite repeat block directive (.IRP and .IRPC) and every repeat
block directive (.REPEAT). See the description of these directives for examples
of the use of .ENDR.

6-28

Assembler Directives
.ENTRY

-ENTRY
Entry directive

FORMAT
parameters

. ENTRY symbol, expression

symbol
The symbolic name for the entry point.

expression
The register save mask for the entry point. The expression must be an
absolute expression and must not contain any undefined symbols.

DESCRIPTION

.ENTRY defines a symbolic name for an entry point and stores a register
save mask (two bytes) that location. The symbol is defined as a global
symbol with a value equal to the value of the location counter at the .ENTRY
directive. The entry point can be used as the transfer address of the program.
The register save mask is used to determine which registers are saved before
the procedure is called. These saved registers are automatically restored when
the procedure returns control to the calling program. See the description of
the procedure call instructions in Section 9 and in the VAX-11 Architecture
Reference Manual.

NOTES

The register mask operator (~M) is convenient to use for setting the bits in
the register save mask (see Section 3.6.2.2).

An assembly error occurs if the expression has bits 0, 1, 12, or 13 set.
These bits correspond to the registers R0, Rl, AP, and FP, and are reserved
for the CALL interface.

DIGITAL recommends that .ENTRY be used to define all callable entry
points including the transfer address of the program. Although the
following construct also defines an entry point, its use is discouraged:
symbol::

.WORD

expression

Although a procedure starting with this construct can be called, the entry
mask is not checked for any illegal registers and the symbol cannot be
used in a .MASK directive.

.ENTRY should be used only for procedures that will be called by the
CALLS or CALLG instruction. A routine that is entered by the BSB or
JSB instruction should not use .ENTRY because these instructions do not
expect a register save mask. These routines should begin in the following
format:
symbol:: first instruction

The first instruction of the routine immediately follows the symbol.

6-29

;

6-30

and RET instructions

Assembler Directives
.ERROR

.ERROR
Error directive

.ERROR [expression];comment

FORMAT
parameters

expression
An expression whose value is displayed when .ERROR is encountered during
assembly.

;comment
A comment that is displayed when .ERROR is encountered during assembly.
The comment must be preceded by a semicolon.

DESCRIPTION

.ERROR causes the assembler to display an error message on the terminal or
batch log file and in the listing file (if there is one).

NOTES

.ERROR, .WARN, and .PRINT are message display directives. They can
be used to display information indicating that a macro call contains an
error or an illegal set of conditions.

When the assembly is finished, the assembler displays the total number of
errors, warnings, and information messages, and the sequence numbers of
the lines causing the errors or warnings.

If .ERROR is included in a macro library, the comment should also end
with a semicolon. Otherwise, the librarian will strip the comment from
the directive and it will not be displayed when the macro is called.

The line containing the .ERROR directive is not included in the listing file.

If the expression has a value of 0, it is not displayed in the error message.

EXAMPLE
.IF DEFINED
IF GREATER
ERROR 25
. ENDC
. ENDC

LONG.MESS
1000-WORK.AREA
; Need larger WORK.AREA;

If the symbol LONG_MESS is defined and if the symbol WORK_AREA has
a value of 1000 or less, the following error message is displayed:
•/.MACRO-E-GENERR. Generated ERROR: 25 Need larger WORK.AREA

6-31

Assembler Directives
.EVEN

.EVEN
Even location counter alignment directive

FORMAT

.EVEN

DESCRIPTION

.EVEN ensures that the current value of the location counter is even by
adding 1 if the current value is odd. If the current value is already even, no
action is taken.

6-32

Assembler Directives
.EXTERNAL

.EXTERNAL
External symbol attribute directive

FORMAT
parameter

.EXTERNAL symbol-list

symbol-list
A list of legal symbols, separated by commas.

DESCRIPTION

.EXTERNAL indicates that the specified symbols are external; that is, the
symbols are defined in another object module and cannot be defined until
link time (see Section 3.3.3 for a discussion of external references).

NOTES

If the GLOBAL argument is enabled (see Table 6-3), all unresolved
references will be marked as global and external. Thus, if GLOBAL is
enabled, the programmer need not specify .EXTERNAL. However, if
GLOBAL is disabled, the programmer must explicitly specify .EXTERNAL
to declare any symbols that are defined externally but are referred to in
the current module.

If GLOBAL is disabled and the assembler finds symbols that are not
defined in the current module and are not listed in a .EXTERNAL
directive, the assembler displays an error message.

Note that if your program does not reference, in a relocatable program
section, symbols that are declared in the absolute program section (ABS),
the unreferenced symbols will be filtered out by the assembler, and they
will not be included in the object file. This "filtering out" will occur even
if the symbols are declared global or external.
If you want to be sure that a symbol will be included even if it is not
referenced, declare it in a relocatable program section. If you want to
make sure that a symbol you define in an absolute program section is
included, reference it in a relocatable program section.

The alternate form of .EXTERNAL is .EXTRN.

EXAMPLE
.EXTERNAL
.EXTERNAL

SIN,TAN,COS
SINH,COSH,TANH

; These symbols are defined in
;
externally assembled modules

6-33

Assembler Directives
.F—FLOATING and .FLOAT

.F-FLOATING
.FLOAT
Floating-point storage directive

FORMATS

parameter

.F-FLOATING literal-list
.FLOAT literal-list

literal-list
A list of floating-point constants (see Section 3.2.2). The constants cannot
contain any unary or binary operators except unary plus and unary minus.

DESCRIPTION

.F_FLOATING evaluates the specified floating-point constants and
stores the results in the object module. .F_FLOATING generates 32-bit,
single-precision, floating-point data (1 bit of sign, 8 bits of exponent, and
23 bits of fractional significance). See the description of .D_FLOATING
for information on storing double-precision floating-point numbers and the
descriptions of .G—FLOATING and .H_FLOATING for descriptions of other
floating-point numbers.

NOTES

See the description of .ENABLE for information on specifying
floating-point rounding or truncation.

The floating-point constants in the literal list must not be preceded by the
floating-point unary operator (T).

EXAMPLE
.F_FLOATING
.F.FLOATING
.F.FLOATING
.FLOAT

6-34

134.5782,74218.34E20
134.2.0.1342E3,1342E-1
-0.75,1E38,-1.OE-37
0,25,50

; Constant list
; These all generate 134.2
; Constant list

Assembler Directives
.G-FLOATING

.G—FLOATING
G_floating-point storage directive

FORMAT

.G—FLOATING literal-list

parameter

literal-list
A list of floating-point constants (see Section 3.2.2). The constants cannot
contain any unary or binary operators except unary plus or unary minus.

DESCRIPTION .G_FLOATING evaluates the specified floating-point constants and stores the
results in the object module. .G_FLOATING generates 64-bit data (1 bit of
sign, 11 bits of exponent, and 52 bits of fraction).

NOTES

G—floating-point numbers are always rounded. They are not affected by
the .ENABLE TRUNCATION directive.

The floating-point constants in the literal list must not be preceded by the
floating-point operator (~F).

EXAMPLE
.G.FLOATING

1000,

1.0E3,

1.0000000E-9

;

Constant list

6-35

Assembler Directives
GLOBAL

.GLOBAL
Global symbol attribute directive

FORMAT
parameter

.GLOBAL symbol-list
symbol-list
A list of legal symbol names, separated by commas.

DESCRIPTION

.GLOBAL indicates that specified symbol names are either globally defined
in the current module or externally defined in another module (see
Section 3.3.3).

NOTES

.GLOBAL is provided for MACRO-11 compatibility only. DIGITAL
recommends that global definitions be specified by a double colon or
double equals sign (see Sections 2.1 and 3.8) and that external references
be specified by .EXTERNAL (when necessary).

The alternate form of .GLOBAL is .GLOBL.

EXAMPLE
.GLOBAL LAB_40,LAB_30
.GLOBAL UKN_13

6-36

; Make these symbol names
;
globally known
;
to all linked modules

Assembler Directives
.H—FLOATING

.H—FLOATIIMG
H_floating-point storage directive

FORMAT

.H_FLOATING literal-list

parameter

literal-list
A list of floating-point constants (see Section 3.2.2). The constants cannot
contain any unary or binary operators except unary plus or unary minus.

DESCRIPTION

.H_FLOATING evaluates the specified floating-point constants and stores the
results in the object module. .TLFLOATING generates 128-bit data (1 bit of
sign, 15 bits of exponent, and 112 bits of fraction).

NOTES

H_floating-point numbers are always rounded. They are not affected by
the .ENABLE TRUNCATION directive.

The floating-point constants in the literal list must not be preceded by the
floating-point operator (T).

EXAMPLE
.H.FLOATING

36912,

15.0E18,

1.0000000E-9

;

Constant list

6-37

Assembler Directives
.IDENT

.IDENT
Identification directive

FORMAT
parameter

.IDENT string
string
A 1- to 31-character string that identifies the module, such as a string that
specifies a version number. The string must be delimited. The delimiters can
be any paired printing characters other than the left angle bracket ( <) or the
semicolon (; as long as the delimiting character is not contained in the text
string itself.

DESCRIPTION

NOTES

.IDENT provides a means of identifying the object module. This identification
is in addition to the name assigned to the object module with .TITLE. A
character string can be specified in .IDENT to label the object module. This
string is printed in the header of the listing file and also appears in the object
module.

1 If a source module contains more than one .IDENT, the last directive
given establishes the character string that forms part of the object module
identification.

If the delimiting characters do not match, or if an illegal delimiting
character is used, the assembler displays an error message.

EXAMPLE
.IDENT

/3-47/

; Version and edit numbers

The character string "3-47" is included in the object module.

6-38

Assembler Directives
.IF

.IF
Conditional assembly block directives

FORMATS

.IF condition argument(s)
range

.ENDC
parameters

condition
A specified condition that must be met if the block is to be included in
the assembly. The condition must be separated from the argument(s) by a
comma, space, or tab. Table 6-4 lists the conditions that can be tested by the
conditional assembly directives.

argumentfs)
The symbolic argument(s) or expression(s) of the specified conditional test. If
the argument is an expression, it cannot contain any undefined symbols and
must be an absolute expression (see Section 3.5).

range
The block of source code that is conditionally included in the assembly.
Table 6-4

Condition Tests for Conditional Assembly Directives
Number

Condition

Complement

Argument

of Argu¬

Test

Condition Test

Type

ments

Expression

Long Form

Short

Long Form

Short

NOT_EQUAL

Form

Form
EQUAL

Condition that Assembles Block

Expression is equal to 0 /not equal
to 0

GREATER

LESS_EQUAL

Expression

Expression is greater than 0 /less
than or equal to 0

LESS_THAN

GREATER_EQUAL

Expression

Expression is less than 0 /greater
than or equal to 0

DEFINED

NOT_DEFINED

NDF

Symbolic

BLANK1

NOT_BLANK'

Macro

Argument is blank /nonblank

IDENTICAL1

IDN

DIFFERENT1

DIF

Macro

Arguments are identical /different

Symbol is defined /not defined

'The BLANK, NOT_BLANK, IDENTICAL, and DIFFERENT conditions are only useful in macro definitions.

6-39

Assembler Directives
.IF

DESCRIPTION

A conditional assembly block is a series of source statements that is assembled
only if a certain condition is met. .IF starts the conditional block and .ENDC
ends the conditional block; each .IF must have a corresponding .ENDC.
The .IF directive contains a condition test and one or two arguments. The
condition test specified is applied to the argument(s). If the test is met, all
VAX MACRO statements between .IF and .ENDC are assembled. If the test
is not met, the statements are not assembled. An exception to this rule occurs
when subconditional directives are used (see the description of the .IF_x
directive).
Conditional blocks can be nested; that is, a conditional block can be inside
another conditional block. In this case the statements in the inner conditional
block are assembled only if the condition is met for both the outer and inner
block.

NOTES

If .ENDC occurs outside a conditional assembly block, the assembler
displays an error message.

VAX MACRO permits a nesting depth of 31 conditional assembly levels.
If a statement attempts to exceed this nesting level depth, the assembler
displays an error message.

Lowercase string arguments are converted to uppercase before being
compared, unless the string is surrounded by delimiters. For information
on string arguments and delimiters, see Section 4.

The assembler displays an error message if .IF specifies any of the
following: a condition test other than those in Table 6-4, an illegal
argument, or a null argument specified in an .IF directive.

The .SHOW and .NOSHOW directives control whether condition blocks
that are not assembled are included in the listing file.

EXAMPLES
Q

An example of a conditional assembly directive is:
IF EQUAL

ALPHA+1

; Assemble block if ALPHA+1=0. Do
;
not assemble if ALPHA+1 not=0

.ENDC

Nested conditional directives take the form:
.IF
.IF

.ENDC
.ENDC

6-40

condition,argument(s)
condition,argument(s)

Assembler Directives
.IF

The following conditional directives can govern whether assembly
is to occur:
.IF DEFINED
.IF DEFINED

SYM1
SYM2

. ENDC
. ENDC

In this example, if the outermost condition is not satisfied, no deeper level
of evaluation of nested conditional statements within the program occurs.
Therefore, both SYM1 and SYM2 must be defined for the code to be
assembled.

6-41

Assembler Directives
.IF_x

.IF—X
Subconditionai assembly block directives

FORMATS

.IF_FALSE
.IF—TRUE
.IF_TRUE_FALSE

DESCRIPTION VAX MACRO has three subconditional assembly block directives:
Directive

Function

.IF_FALSE

If the condition of the assembly block tests false, the
program includes the source code following the .IF_FALSE
directive and continuing up to the next subconditional
directive or to the end of the conditional assembly block.

.IF_TRUE

If the condition of the assembly block tests true, the
program includes the source code following the .IF—TRUE
directive and continuing up to the next subconditional
directive or to the end of the conditional assembly block.

.IF_TRUE_FALSE

Regardless of whether the condition of the assembly
block tests true or false, the source code following the
.IF TRUE-FALSE directive (and continuing up to the next
subconditional directive or to the end of the assembly
block) is always included.

The implied argument of a subconditional directive is the condition test
specified when the conditional assembly block was entered. A conditional
or subconditional directive in a nested conditional assembly block is not
evaluated if the preceding (or outer) condition in the block is not satisfied (see
Examples 3 and 4).
A conditional block with a subconditional directive is different from a nested
conditional block. If the condition in the .IF is not met, the inner conditional
block(s) are not assembled, but a subconditional directive can cause a block to
be assembled.

NOTES

6-42

If a subconditional directive appears outside a conditional assembly block,
the assembler displays an error message.

The alternate forms of .IF_FALSE, .IF_TRUE, and .IF_TRUE_FALSE are
.IFF, .IFT, and .IFTF.

.IF.FALSE

; Tests FALSE since previous
;
.IF was TRUE.
Does not
;
assemble the following code

.IF.TRUE

; Tests TRUE since SYM is defined.
;
Assembles the following code

.IF_TRUE_FALSE

; Assembles following code
;
unconditionally

.IF_TRUE

; Tests TRUE since SYM is defined.
;
Assembles remainder of
;
conditional assembly block

. ENDC

Assume that symbol X is defined and that symbol Y is not defined
.IF DEFINED
.IF DEFINED
.IF.FALSE

X
Y

.IF.TRUE

; Tests TRUE since X is defined
; Tests FALSE since Y is not defined
; Tests TRUE since Y is not defined.
;
Assembles the following code

; Tests FALSE since Y is not defined.
;
Does not assemble the following
;
code

.ENDC
.ENDC

Assume that symbol A is defined and that symbol B is not defined
.IF DEFINED

; Tests TRUE since A is defined.
;
Assembles the following code

.IF_FALSE

; Tests FALSE since A is defined.
;
Does not assemble the following
;
code

.IF NOT.DEFINED B

; Nested conditional directive
;
is not evaluated

.ENDC
.ENDC

;

.IF.FALSE

; Nested subconditional
;
directive is not evaluated

.IF.TRUE

; Nested subconditional
;
directive is not evaluated

. ENDC
. ENDC

6-44

is not evaluated

Assembler Directives
. 11F

.IIF
Immediate conditional assembly block directive

FORMAT
parameters

.IIF condition [,]argument(s), statement
condition
One of the legal condition tests defined for conditional assembly blocks in
Table 6-4 (see the description of .IF). The condition must be separated from
the argument(s) by a comma, space, or tab; however, if the first argument
can be a blank, the condition must be separated from the argument(s) with a
comma.

arguments)
The argument associated with the immediate conditional directive; that is, an
expression or symbolic argument (described in Table 6-4). If the argument
is an expression, it cannot contain any undefined symbols and must be an
absolute expression (see Section 3.5). The argument(s) must be separated
from the statement by a comma.

statement
The statement to be assembled if the condition is satisfied.

DESCRIPTION

.IIF provides a means of writing a one-line conditional assembly block. The
condition to be tested and the conditional assembly block are expressed
completely within the line containing the .IIF directive; no terminating .ENDC
statement is required.

NOTE

The assembler displays an error message if .IIF specifies a condition test other
than those listed in Table 6-4, an illegal argument, or a null argument.

EXAMPLE
.IIF DEFINED EXAM. BEQL ALPHA

This directive generates the following code if the symbol EXAM is defined
within the source program:
BEQL

ALPHA

6-45

Assembler Directives
.IRP

.IRP
Indefinite repeat argument directive

FORMATS

.IRP symbol, < argument list>
range

.ENDR
parameters

symbol
A formal argument that is successively replaced with the specified actual
arguments enclosed in angle brackets. If no formal argument is specified, the
assembler displays an error message.

< argument list>
A list of actual arguments enclosed in angle brackets and used in expanding
the indefinite repeat range. An actual argument can consist of one or more
characters; multiple arguments must be separated by a legal separator
(comma, space, or tab). If no actual arguments are specified, no action is
taken.

range
The block of source text to be repeated once for each occurrence of an actual
argument in the list. The range can contain macro definitions and repeat
ranges. .MEXIT is legal within the range.

DESCRIPTION

.IRP replaces a formal argument with successive actual arguments specified
in an argument list. This replacement process occurs during the expansion of
the indefinite repeat block range. The .ENDR directive specifies the end of
the range.
.IRP is analogous to a macro definition with only one formal argument. At
each expansion of the repeat block, this formal argument is replaced with
successive elements from the argument list. The directive and its range are
coded inline within the source program. This type of macro definition and its
range do not require calling the macro by name, as do other macros described
in this section.
.IRP can appear either within or outside another macro definition, indefinite
repeat block, or repeat block (see the description of .REPEAT). The rules
for specifying .IRP arguments are the same as those for specifying macro
arguments.

Assembler Directives
.IRP

EXAMPLE
Macro definition:
.MACRO
.NARG
.IRP
.IIF
.ENDR
CALLS
. ENDM

SUBR,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10
CALL_SUB
COUNT
ARG,<A10,A9,A8,A7,A6,A5,A4,A3,A2,Al>
ARG,
PUSHL ARG
NOT.BLANK ,
#<C0UNT-1>,SUBR
CALL.SUB

; Note SUBR is counted

Macro call and expansion of the macro defined previously:
CALL.SUB
TEST.INRES,INTES,UNLIS,OUTCON,#205
.NARG
COUNT
.IRP
ARG,<.#205,OUTCON,UNLIS,INTES,INRES>
PUSHL ARG
ARG.
NOT.BLANK .
.IIF
.ENDR
PUSHL
NOTJBLANK ,
.IIF
PUSHL
N0T_BLANK .
.IIF
PUSHL
NOT.BLANK .
.IIF
PUSHL
NOT.BLANK .
.IIF
PUSHL
NOT.BLANK .
.IIF
PUSHL #205
.IIF
NOT.BLANK ,
#205,
OUTCON.
PUSHL OUTCON
NOT.BLANK .
.IIF
PUSHL UNLIS
NOT.BLANK .
UNLIS.
.IIF
INTES.
PUSHL INTES
NOT.BLANK .
.IIF
NOT.BLANK .
INRES.
PUSHL INRES
.IIF
; Note TEST is counted
#<C0UNT-1>.TEST
CALLS

This example uses the .NARG directive to count the arguments and the .IIF
NOT—BLANK directive (see descriptions of .IF and .IIF in this section) to
determine whether the actual argument is blank. If the argument is blank, no
binary code is generated.

6-47

Assembler Directives
.IRPC

.IRPC
Indefinite repeat character directive

FORMATS

. 1RPC symbol, < string>
■
■

range

.ENDR
parameters

symbol
A formal argument that is successively replaced with the specified characters
enclosed in angle brackets. If no formal argument is specified, the assembler
displays an error message.

< string>
A sequence of characters enclosed in angle brackets and used in the expansion
of the indefinite repeat range. Although the angle brackets are required only
when the string contains separating characters, their use is recommended for
legibility.

range
The block of source text to be repeated once for each occurrence of a character
in the list. The range can contain macro definitions and repeat ranges.
.MEXIT is legal within the range.

DESCRIPTION

.IRPC is similar to .IRP except that .IRPC permits single-character substitution,
rather than argument substitution. On each iteration of the indefinite repeat
range, the formal argument is replaced with each successive character in the
specified string. The .ENDR directive specifies the end of the range.
.IRPC is analogous to a macro definition with only one formal argument. At
each expansion of the repeat block, this formal argument is replaced with
successive characters from the actual argument string. The directive and its
range are coded inline within the source program and do not require calling
the macro by name, as do other macros described in this section.
.IRPC can appear either within or outside another macro definition, indefinite
repeat block, or repeat block (see description of .REPEAT).

Macro Definition:
.MACRO HASH_SYM
.NCHR
HV,<SYMBOL>
.IRPC
CHR,<SYMBOL>
HV = HV+~A?CHR?
.ENDR
.ENDM
HASH.SYM

SYMBOL

Macro call and expansion of the macro defined previous
HASH.SYM
<M0VC5>
.NCHR
HV,<M0VC5>
.IRPC
CHR,<M0VC5>
HV = HV+~A?CHR?
.ENDR
HV = HV+~A?M?
HV = HV+~A?0?
HV = HV+~A?V?
HV = HV+~A?C?
HV = HV+~A?5?

This example uses the .NCHR directive to count the num
an actual argument.

Assembler Directives
.LIBRARY

.LIBRARY
Macro library directive

FORMAT
parameter

. LI BRARY macro-library-name
macro-library-name
A delimited string that is the file specification of a macro library.

DESCRIPTION .LIBRARY adds a name to the macro library list that is searched whenever a
.MCALL or an undefined opcode is encountered. The libraries are searched
in the reverse order in which they were specified to the assembler.

If you omit any information from the macro-library-name argument, default
values are assumed. The device defaults to your current default disk; the
directory defaults to your current default directory; and the file type defaults
to MLB.
DIGITAL recommends that libraries be specified in the MACRO command
line with the /LIBRARY qualifier rather than with the .LIBRARY directive.
The .LIBRARY directive makes moving files cumbersome.

EXAMPLE
.LIBRARY
.LIBRARY
.LIBRARY

/DISK:[TEST]USERM/
7DISK:SYSDEF.MLB?
\CURRENT.MLB\

; DISK:[TEST]USERM.MLB
; DISK:SYSDEF.MLB
; Uses default disk and directory

Assembler Directives
.LINK

.LINK
Linker option record directive

FORMAT
parameters

.LINK "file-spec"[/qualifier[=(module-name[r.]
file-spec[,...]
A delimited string that specifies one or more input files. The delimiters can
be any matching pair of printable characters except the space, tab, equal
sign ( = ), semicolon (;), or left angle bracket
The character used as the
delimiter cannot appear in the string itself. Alphanumeric characters can be
used as delimiters; however, nonalphanumeric characters should be used to
avoid confusion.

( <).

The input files can be object modules to be linked, libraries to be searched
for external references or from which specific modules are to be included, or
shareable images to be included in the output image. If you specify multiple
input files, separate the file specifications with commas (,).
If you do not specify a file type in an input file specification, the linker
supplies default file types, based on the nature of the file. All object modules
are assumed to have file types of OBJ.
Note that the input file specification(s) must be correct at link time. You
should make your references explicit, so that if the object module created
by VAX MACRO is linked in a directory other than the one in which it was
created, the linker will still be able to find the files referenced in the .LINK
directive.
No wildcard characters are allowed in the file specification.

file qualifiers

/INCLUDE=(module-name[,...])
Indicates that the associated input file is an object library or shareable image
library, and that only the module names specified are to be unconditionally
included as input to the linker.
At least one module name must be specified. If you specify more than one
module name, separate the names with commas and enclose the list in
parentheses.
If you specify /INCLUDE, you can also specify /LIBRARY; if so, the library
is subsequently searched for unresolved references.
No wildcard characters are allowed in the module name specification(s).
Module names may not be longer than 31 characters, the maximum length of
a VAX MACRO symbol.

/LIBRARY
Indicates that the associated input file is a library to be searched for modules
to resolve any undefined symbols in the input files.

6-51

Assembler Directives
.LINK

If the associated input file specification does not include a file type, the linker
assumes the default file type of OLB. You can use both /INCLUDE and
/LIBRARY to qualify a file specification. In this case, the explicit inclusion
of modules occurs first; then the library is used to search for unresolved
references.

/SELECTIVE-SEARCH
Directs the linker to add to its symbol table, from the specified file, only those
global symbols that are defined in the file and are currently unresolved. If
/SELECTIVE-SEARCH is not specified, the linker includes all symbols from
that file in its global symbol table.

/SHAREABLE
Requests that the linker include a shareable image file. No wildcard
characters are allowed in the file specification.
The following table contains the abbreviations of the qualifiers for the .LINK
directive. Note that to ensure readability, as well as compatibility with future
releases, it is recommended that you use the full names of the qualifiers.

DESCRIPTION

Abbreviation

Qualifier

/INCLUDE

/LIBRARY

/SE

/SELECTIVE-SEARCH

/SH

/SHAREABLE

The .LINK directive allows you to include linker option records in an object
module produced by VAX MACRO. The qualifiers for the .LINK directive
perform functions similar to the functions performed by the same qualifiers
for the DCL command LINK.
The .LINK directive is intended to be used for references that are not linker
defaults, but which you always want to include in a particular image. Using
the .LINK directive enables you to avoid having to explicitly name these
references in the DCL command LINK.
For detailed information on the qualifiers to the DCL command LINK, and for
a complete discussion of the operation of the linker itself, see the VAX/VMS
Utilities Reference Volume.

Assembler Directives
.LINK

EXAMPLES
.LINK "SYS$LIBRARY:MYLIB" /INCLUDE=(M0D1, M0D2, M0D6)

This statement, when included in the file MYPROG.MAR, causes the
assembler to request that MYPROG.OBJ be linked with modules MODI,
MOD2, and MOD6 in the library SYS$LIBRARY:MYLIB.OLB (where
SYS$LIBRARY is a logical name for the disk and directory in which
MYLIB.OLB is listed). The library is not searched for other unresolved
references. The statement is equivalent to linking the file with the DCL
command:
$ LINK MYPROG, SYS$LIBRARY:MYLIB /INCLUDE=(M0D1. M0D2, M0D6)
.LINK \SYS$LIBRARY:MYOBJ\
.LINK 'SYS$LIBRARY:YOURLIB'

Link with object module
SYS$LIBRARY:MYOBJ.OBJ
/LIBRARY

Search object library
SYS$LIBRARY:YOURLIB.OLB
for unresolved references

.LINK *SYS$LIBRARY:MYSTB.STB* /SELECTIVE.SEARCH

Search symbol table
SYSSLIBRARY:MYSTB.STB
for unresolved references

.LINK "SYSSLIBRARY:MYSHR.EXE" /SHAREABLE

Link with shareable image
SYSSLIBRARY:MYSHR.EXE

To optimize performance, more than one input file can be included with a
single .LINK directive. The following example shows how the five options
illustrated previously can be included in one statement.
.LINK

'SYSSLIBRARY:MYOBJ'.'SYSSLIBRARY:YOURLIB’ /LIBRARY,•SYSSLIBRARY:MYLIB' /INCLUDE=(M0D1, M0D2, M0D6),'SYSSLIBRARY:MYSTB.STB' /SELECTIVE_SEARCH,'SYSSLIBRARY:MYSHR.EXE' /SHAREABLE

6-53

Assembler Directives
.LIST

.LIST
FORMAT
parameter

Listing directive

.LIST

[argument-list]

argument-list
One or more of the symbolic arguments defined in Table 6-8 in the
description of .SHOW. Either the long form or the short form of the
arguments can be used. If multiple arguments are specified, they must be
separated by commas, spaces, or tabs.

DESCRIPTION .LIST is equivalent to .SHOW. See the description of .SHOW for more
information.

Assembler Directives
.LONG

.LONG
Longword storage directive

FORMAT

. LONG expression-list

parameters

expression-list
One or more expressions separated by commas. Each expression optionally
can be followed by a repetition factor delimited by square brackets.
An expression followed by a repetition factor has the format:
expressioni[expression2]

expression 1
An expression that specifies the value to be stored.

[expression2]
An expression that specifies the number of times the value will be repeated.
The expression must not contain any undefined symbols and must be an
absolute expression (see Section 3.5). The square brackets are required.

DESCRIPTION

.LONG generates successive longwords (four bytes) of data in the object
module.

EXAMPLE
LAB_3:

.LONG
.LONG
.LONG

NOTE

LAB_3."X7FFFFFFF,“A'ABCD'
~XF@4
0[22]

; 3 longwords of data
; 1 longword of data
; 22 longwords of data

Each expression in the list must have a value that can be represented in 32
bits.

6-55

Assembler Directives
.MACRO

.MACRO
Macro definition directive

FORMATS

.MACRO macro-name [formal-argument-list]
range
.ENDM [macro name]

parameters

macro-name
The name of the macro to be defined; this name can be any legal symbol up
to 31 characters long.

formal-argument-list
The symbols, separated by commas, to be replaced by the actual arguments
in the macro call.

range
The source text to be included in the macro expansion.

DESCRIPTION

.MACRO begins the definition of a macro. It gives the macro name and a list
of formal arguments (see Section 4). If the name specified is the same as the
name of a previously defined macro, the previous definition is deleted and
replaced with the new one. The .MACRO directive is followed by the source
text to be included in the macro expansion. The .ENDM directive specifies
the end of the range.
Macro names do not conflict with user-defined symbols. Both a macro and a
user-defined symbol can have the same name.
When the assembler encounters a .MACRO directive, it adds the macro name
to its macro name table and stores the source text of the macro (up to the
matching .ENDM directive). No other processing occurs until the macro is
expanded.
The symbols in the formal argument list are associated with the macro name
and are limited to the scope of the definition of that macro. For this reason,
the symbols that appear in the formal argument list can also appear elsewhere
in the program.

6-56

Assembler Directives
.MACRO

NOTES

If a macro has the same name as a VAX opcode, the macro is used instead
of the instruction. This feature allows you to temporarily redefine an
opcode.

2 If a macro has the same name as a VAX opcode and is in a macro library,
the .MCALL directive must be used to define the macro. Otherwise,
because the symbol is already defined (as the opcode), the assembler will
not search the macro libraries.

3 You can redefine a macro with new source text during assembly by
specifying a second .MACRO directive with the same name. Including
a second .MACRO directive within the original macro definition causes
the first macro call to redefine the macro. This is useful when a macro
performs initialization or defines symbols; that is, when an operation is
performed only once. The macro redefinition can eliminate unneeded
source text in a macro or it can delete the entire macro. The .MDELETE
directive provides another way to delete macros.

EXAMPLE
Macro definition:
.MACRO USERDEF
.PSECT DEFS.ABS
MYSYM= 5
HIVAL=
~XFFF123
LOWVAL= 0
.PSECT RWDATA,NOEXE,LONG
.BLKL
100
TABLE:
. BLKB
10
LIST:
.MACRO USERDEF
. ENDM
USERDEF
USERDEF
. ENDM

Redefine it to null

Macro calls and expansions of the macro defined previously:
USERDEF
.PSECT DEFS.ABS
MYSYM= 5
~XFFF123
HIVAL=
L0WVAL= 0
.PSECT RWDATA.NOEXE.LONG
.BLKL
TABLE:
100
.BLKB
LIST:
10
.MACRO USERDEF
.ENDM
USERDEF
USERDEF

; Should expand data

; Redefine it to null
; Should expand nothing

In this example, when the macro is called the first time, it defines some
symbols and data storage areas and then redefines itself. When the macro is
called a second time, the macro expansion contains no source text.

6—57

Assembler Directives
.MASK

.MASK
Mask directive

FORMAT
parameters

.MASK symbol[,expression]
symbol
A symbol defined in an .ENTRY directive.

expression
A register save mask.

DESCRIPTION

.MASK reserves a word for a register save mask for a transfer vector. See
the description of .TRANSFER for more information and for an example of
.MASK.

NOTES

If .MASK does not contain an expression, the assembler directs the linker
to copy the register save mask specified in .ENTRY to the word reserved
by .MASK.

If .MASK contains an expression, the assembler directs the linker to
combine this expression with the register save mask specified in .ENTRY
and store the result in the word reserved by .MASK. The linker performs
an inclusive OR operation to combine the mask in the entry point and
the value of the expression. Consequently, a register specified in either
.ENTRY or .MASK will be included in the combined mask. See the
description of .ENTRY for more information on entry masks.

6-58

Assembler Directives
.MCALL

.MCALL
Macro call directive

FORMAT

.MCALL macro-name-list

parameter

macro-name-list
A list of macros to be defined for this assembly. The names must be separated
by commas.

DESCRIPTION

.MCALL specifies the names of the system and/or user-defined macros that
are required to assemble the source program but are not defined in the source
file.
If any named macro is not found upon completion of the search (that is, if the
macro is not defined in any of the macro libraries), the assembler displays an
error message.

Note: .MCALL is provided for compatibility with MACRO-11; DIGITAL
recommends that it not be used. When VAX MACRO finds an unknown
symbol in the opcode field, it automatically searches all macro libraries. If
it finds the symbol in a library, it uses the macro definition and expands
the macro reference. If VAX MACRO does not find the unknown symbol
in the library, it displays an error message. There is one exception for
which .MCALL must be used: when a macro has the same name as an
opcode (see description of .MACRO).

EXAMPLE
.MCALL

INSQUE

; Substitute macro in
;
library for INSQUE
;
instruction

6-59

Assembler Directives
.MDEILETE

.MDELETE
FORMAT
parameters

Macro deletion directive

.MDELETE macro-name-list
macro-name-list
A list of macros whose definitions are to be deleted. The names must be
separated by commas.

DESCRIPTION

.MDELETE deletes the definitions of specified macros. The number of macros
actually deleted is printed in the assembly listing on the same line as the
.MDELETE directive.
.MDELETE completely deletes the macro, freeing memory as necessary,
whereas the technique of macro redefinition explained in the description of
.MACRO merely redefines the macro.

EXAMPLE
.MDELETE

6-60

USERDEF. $SSDEF. ALTR

Assembler Directives
.MEXIT

.MEXIT
Macro exit directive

FORMAT

.MEXIT

DESCRIPTION

.MEXIT terminates a macro expansion before the end of the macro.
Termination is the same as if .ENDM were encountered. The directive can
also be used within repeat blocks. .MEXIT is most useful in conditional
expansion of macros because it bypasses the complexities of nested
conditional directives and alternate assembly paths.

NOTES

When .MEXIT occurs in a repeat block, the assembler terminates the
current repetition of the range and suppresses further expansion of the
repeat range.

When macros or repeat blocks are nested, .MEXIT exits to the next higher
level of expansion.

If .MEXIT occurs outside a macro definition or a repeat block, the
assembler displays an error message.

EXAMPLE
.MACRO

.IF EQ

POLO

; Start conditional assembly block

; Terminate macro expansion
; End conditional assembly block

.MEXIT
. ENDC

.ENDM

N.A.B

POLO

; Normal end of macro

In this example, if the actual argument for the formal argument N equals 0,
the conditional block is assembled, and the macro expansion is terminated by
.MEXIT.

6-61

.NARG
Number of arguments directive

FORMAT

.NARG

parameters

symbol

A symbol that is assigned a value equal to the number of argumen
macro call.

DESCRIPTION

.NARG determines the number of arguments in the current macro c

.NARG counts all the positional arguments specified in the macro
including null arguments (specified by adjacent commas). The valu
to the specified symbol does not include either any keyword argum
any formal arguments that have default values.

NOTE

If .NARG appears outside a macro, the assembler displays an error

EXAMPLE
Macro definition:
.MACRO
.NARG
.WORD
.ENDM

CNT.ARG A1.A2,A3.A4.A5.A6,A7,A8.A9=DEF9.A10=DEF10
COUNTER
; COUNTER is set to no. of ARGS
COUNTER
; Store value of COUNTER
CNT.ARG

Macro calls and expansions of the macro defined previously:
CNT_ARG TEST,FIND.ANS
.NARG
COUNTER
.WORD
COUNTER

COUNTER will = 3
COUNTER is set to no. of ARGS
Store value of COUNTER

CNT_ARG
.NARG
COUNTER
.WORD
COUNTER

COUNTER will = 0
COUNTER is set to no. of ARGS
Store value of COUNTER

;

CNT.ARG TEST,A2=SYMB2,A3=SY3
; COUNTER will = 1
.NARG
COUNTER
COUNTER is set to no. of ARGS
.WORD
COUNTER
Store value of COUNTER
Keyword arguments are not counted
CNT_ARG .SYMBL,,
.NARG
COUNTER
.WORD
COUNTER

6-62

COUNTER will =
COUNTER is set
Store value of
Null arguments

3
to no. of ARGS
COUNTER
are counted

Assembler Directives
.NCHR

.NCHR
Number of characters directive

FORMAT
parameters

.NCHR symbol,< string>
symbol
A symbol that is assigned a value equal to the number of characters in the
specified character string.

< string>
A sequence of printable characters. The character string must be delimited by
angle brackets (or a character preceded by a circumflex) only if the specified
character string contains a legal separator (comma, space, and/or tab) or a
semicolon.

DESCRIPTION

.NCHR determines the number of characters in a specified character string. It
can appear anywhere in a VAX MACRO program and is useful in calculating
the length of macro arguments.

EXAMPLE
Macro definition:
MACRO
.NCHR
.WORD
.ASCII
. ENDM

CHAR
MESS
CHRCNT,<MESS>
CHRCNT
/MESS/
CHAR

Define MACRO
Assign value to CHRCNT
Store value
Store characters
Finish

Macro calls and expansions of the macro defined previously:
CHAR
.NCHR
.WORD
.ASCII

<HELLO>
CHRCNT,<HELLO>
CHRCNT
/HELLO/

CHAR
.NCHR
.WORD
.ASCII

<14, 75.39 4>
CHRCNT,<14. 75.39
CHRCNT
/14, 75.39 4/

CHRCNT will = 5
Assign value to CHRCNT
Store value
Store characters
4>

CHRCNT will = 12(dec)
Assign value to CHRCNT
Store value
Store characters

6-63

Assembler Directives
.NLIST

.NLIST
Listing directive

FORMAT
parameter

. N LI ST [argument-list]

argument-list
One or more of the symbolic arguments listed in Table 6-8 in the description
of .SHOW. Either the long form or the short form of the arguments can be
used. If multiple arguments are specified, they must be separated by commas,
spaces, or tabs.

DESCRIPTION .NLIST is equivalent to .NOSHOW. See the description of .SHOW for more
information.

6-64

Assembler Directives
.NOCROSS

.NOCROSS
Cross-reference directive

FORMAT
parameter

.NOCROSS [symbol-list]
symbol-list
A list of legal symbol names separated by commas.

DESCRIPTION VAX MACRO produces a cross-reference listing when the

/CROSS-REFERENCE qualifier is specified in the MACRO command. The
.CROSS and .NOCROSS directives control which symbols are included in the
cross-reference listing. The description of .NOCROSS is included with the
description of .CROSS.

6-65

Assembler Directives
.NOSHOW

.NOSHOW
Listing directive

FORMAT
parameter

.NOSHOW [argument-list]
argument-list
One or more of the symbolic arguments listed in Table 6-8 in the description
of .SHOW. Either the long form or the short form of the arguments can be
used. If multiple arguments are specified, they must be separated by commas,
spaces, or tabs.

DESCRIPTION

6-66

.NOSHOW specifies listing control options. See the description of .SHOW for
more information.

Assembler Directives
.NTYPE

.IMTYPE
Operand type directive

FORMAT
parameters

. NTYPE symbol, operand
symbol
Any legal VAX MACRO symbol. This symbol is assigned a value equal to the
8- or 16-bit addressing mode of the operand argument that follows.

operand
Any legal address expression, as used with an opcode. If no argument is
specified, 0 is assumed.

DESCRIPTION

.NTYPE determines the addressing mode of the specified operand.
The value of the symbol is set to the specified addressing mode. In most
cases, an 8-bit (1-byte) value is returned. Bits 0 through 3 specify the register
associated with the mode, and bits 4 through 7 specify the addressing mode.
To provide concise addressing information, the mode bits 4 through 7 are
not exactly the same as the numeric value of the addressing mode described
in Table 5-1. Specifically, literal mode is indicated by a 0 in bits 4 through
7, instead of the values 0 through 3. Mode 1 indicates an immediate mode
operand, mode 2 indicates an absolute mode operand, and mode 3 indicates a
general mode operand.
For indexed addressing mode, a 16-bit (2-byte) value is returned. The
high-order byte contains the addressing mode of the base operand specifier
and the low-order byte contains the addressing mode of the primary operand
(the index register).
See Section 5 of this volume for more information on addressing modes.

EXAMPLE
Macro Definition:
;
;
;
;

The following macro is used to push an address on the stack.
It checks
the operand type (by using .NTYPE) to determine if the operand is an
address and, if not, the macro simply pushes the argument on the stack
and generates a warning message.

.MACRO PUSHADR #ADDR
.NTYPE A.ADDR
A = A@-4fc~XF
.IF IDENTICAL 0,<ADDR>
PUSHL
#0
.MEXIT
. ENDC

; Assign operand type to 'A'
; Isolate addressing mode
; Is argument exactly 0?
; Stack zero
; Exit from macro

6-67

IF EQUAL ERR
PUSHAL ADDR
IFF
PUSHL
ADDR
WARN
; ADDR is not an address
ENDC
ENDM
PUSHADR

Is mode address?
Yes, stack address
No
Then stack operand k warn

Macro calls and expansions of the macro defined previously:
PUSHADR (RO)
PUSHAL
(RO)

Valid argument
Yes, stack address

PUSHADR (Rl)[R4]
PUSHAL
(Rl)[R4]

Valid argument
Yes, stack address

PUSHADR 0
PUSHL
#0

Is zero
Stack zero

PUSHADR #1
PUSHL
#1
•/.MACRO- W-GENWRN, Generated WARNING:

Not an address
Then stack operand k warn
#1 is not an address

PUSHADR RO
PUSHL
RO
•/.MACRO- W-GENWRN, Generated WARNING:

; Not an address
; Then stack operand k warn
RO is not an address

Note that to save space, this example is listed as it would appear if
BINARY, not .SHOW EXPANSIONS, were specified in the source p

6-68

Assembler Directives
OCTA

.OCTA
Octaword storage directive

FORMATS

parameters

.OCTA literal
.OCTA symbol
literal
Any constant value. This value can be preceded by "O, *B, "X, or ~D to specify
the radix as octal, binary, hexadecimal, or decimal, respectively; or it can be
preceded by "A to specify ASCII text. Decimal is the default radix.

symbol
A symbol defined elsewhere in the program. This symbol results in a
sign-extended, 32-bit value being stored in an octaword.

DESCRIPTION

.OCTA generates 128 bits (16 bytes) of binary data.

NOTE

.OCTA is like .QUAD and unlike other data storage directives (.BYTE,
.WORD, and .LONG), in that it does not evaluate expressions and that it
accepts only one value. It does not accept a list.

EXAMPLE
.OCTA

~ A "FEDCBA987654321"

.OCTA
.OCTA
.OCTA

0
~XO1234ABCD5678F9
VINTERVAL

;
;
;
;
;
;

Each ASCII character
is stored in a byte
OCTA 0
OCTA hex value specified
VINTERVAL has 32-bit value.
sign-extended

6-69

Assembler Directives
.ODD

.ODD
Odd location counter alignment directive

FORMAT

.ODD

DESCRIPTION

.ODD ensures that the current value of the location counter is odd by adding
1 if the current value is even. If the current value is already odd, no action is
taken.

6-70

Assembler Directives
.OPDEF

.OPDEF
Opcode definition directive

FORMAT

.OPDEF opcode value,operand-descriptor-list

parameters

opcode
An ASCII string specifying the name of the opcode. The string can be up
to 31 characters long and can contain the letters A through Z; the digits
0 through 9; and the special characters underline (_), dollar sign ($),
and period (.). The string should not start with a digit and should not be
surrounded by delimiters.

value
An expression that specifies the value of the opcode. The expression must
not contain any undefined values and must be an absolute expression (see
Section 3.5). The value of the expression must be in the range of 0 through
decimal 65,535 (hexadecimal FFFF), but the values 252 through 255 cannot
be used. The expression is represented as follows:
if 0 < expression <251

expression is a 1-byte opcode.

if expression > 255

expression bits 7:0 are the first byte of the
opcode and expression bits 15:8 are the
second byte of the opcode.

Values 252 through 255 cannot be used because the architecture specifies
these as the start of a 2-byte opcode.

operand-descriptor-list
A list of operand descriptors that specifies the number of operands and the
type of each. Up to 16 operand descriptors are allowed in the list. Table 6-5
lists the operand descriptors.

Table 6-5

Operand Descriptors
Data Type

Access Type
Byte

Word

Long word

Floating

Double

G_floating

H_floating

Point

Floating

Point

Quadword

Octaword

Point

Address

Read-only

Modify

Write-only

Field

Branch

—

6-71

Assembler Directives
.OPDIEF

DESCRIPTION

.OPDEF defines an opcode, which it inserts into a user-defined opcode table.
The assembler searches this table before it searches the permanent symbol
table. This directive can redefine an existing opcode name or create a new
one.

NOTES

A macro can also be used to redefine an opcode (see the description of
.MACRO in this section.) Note that the macro name table is searched
before the user-defined opcode table.

.OPDEF is useful in creating "custom" instructions that execute userwritten microcode. This directive is supplied to allow programmers to
execute their microcode in a MACRO program.

The operand descriptors are specified in a format similar to the operand
specifier notation described in Section 8. The first character specifies the
operand access type and the second character specifies the operand data
type.

EXAMPLE
.OPDEF

M0VL3

~XA9FF.RL.ML.WL

.OPDEF
OPDEF

DIVF2
M0VC5

~X46.RF.MF
~X2C,RW,AB.AB,RW,AB

Defines an instruction
M0VL3, which uses
the reserved opcode FF
Redefines the DIVF2 and
M0VC5 instructions

.OPDEF

CALL

~X10.BB

Equivalent to a BSBB

6-72

Assembler Directives
.PACKED

.PACKED
Packed decimal string storage directive

FORMAT
parameters

.PACKED decimal-string[,symbol]
decimal-string
A decimal number from 0 through 31 digits long with an optional sign. Digits
can be in the range of 0 through 9 (see Section 8.2.14).

symbol
An optional symbol that is assigned a value equivalent to the number of
decimal digits in the string. The sign is not counted as a digit.

DESCRIPTION

.PACKED generates packed decimal data, two digits per byte. Packed decimal
data is useful in calculations requiring exact accuracy. Packed decimal data is
operated on by the decimal string instructions. See Section 8.2.14 for more
information on the format of packed decimal data.

EXAMPLE
PACKED
.PACKED
.PACKED
.PACKED

-12,PACK_SIZE
+500
0
-0,SUM_SIZE

; PACK_SIZE gets value of 2

; SUM_SIZE gets value of 1

6-73

Assembler Directives
.PAGE

.PAGE
Page ejection directive

FORMAT

.PAGE

DESCRIPTION

.PAGE forces a new page in the listing; the directive itself is not printed in
the listing.
VAX MACRO ignores .PAGE in a macro definition. The paging operation is
performed only during macro expansion.

6-74

Assembler Directives
.PRINT

.PRINT
Assembly message directive

FORMAT
parameters

.PRINT [expression];comment
expression
An expression whose value is displayed when .PRINT is encountered during
assembly.

;comment
A comment that is displayed when .PRINT is encountered during assembly.
The comment must be preceded by a semicolon.

DESCRIPTION .PRINT causes the assembler to display an informational message. The
message consists of the value of the expression and the comment specified in
the .PRINT directive. The message is displayed on the terminal for interactive
jobs and in the log file for batch jobs. The message produced by .PRINT is
not considered an error or warning message.

NOTES

.PRINT, .ERROR, and .WARN are called the message display directives.
They can be used to display information indicating that a macro call
contains an error or an illegal set of conditions.

If .PRINT is included in a macro library, the comment should end with an
additional semicolon. Otherwise, the comment will be stripped from the
directive and will not be displayed when the macro is called.

If the expression has a value of 0, it is not displayed with the message.

EXAMPLE
PRINT

; The sine routine has been changed

6-75

Assembler Directives
.PSECT

.PSECT
Program sectioning directive

FORMAT
parameters

. PSECT [program-section-name],argument-list]]
program-section-name
The name of the program section. This name can be up to 31 characters
long and can contain any alphanumeric character and the special characters
underline (_), dollar sign ($), and period (.). However, the first character
must not be a digit.

argument-list
A list containing the program section attributes and the program section
alignment. Table 6-6 lists the attributes and their functions. Table 6-7 lists
the default attributes and their opposites. Program sections are aligned when
an integer in the range of 0 through 9 is specified or when one of the five
keywords listed below is specified. If an integer is specified, the program
section is linked to begin at the next virtual address, that is, a multiple of
2 raised to the power of the integer. If a keyword is specified, the program
section is linked to begin at the next virtual address, that is, a multiple of the
values listed below:
Keyword

Size (in Bytes)
2*0 = 1
CM

CM
II

BYTE
WORD

II
CM
<
CM

2*3 = 8

PAGE

2*9 = 512

LONG
QUAD

BYTE is the default.

Table 6-6

6-76

Program Section Attributes

Attribute
Name

Function

ABS

Absolute—The linker assigns the program section an absolute
address. The contents of the program section can be only
symbol definitions (usually definitions of symbolic offsets to
data structures that are used by the routines being assembled).
No data allocations can be made. An absolute program section
contributes no binary code to the image, so its byte allocation
request to the linker is 0. The size of the data structure being
defined is the size of the absolute program section printed
in the “program section synopsis" at the end of the listing.
Compare this attribute with its opposite, REL.

Assembler Directives
.PSECT

Table 6-6 (Cont.)

Program Section Attributes

Attribute
Name

Function

CON

Concatenate—Program sections with the same name and
attributes (including CON) are merged into one program section.
Their contents are merged in the order in which the linker
acquires them. The allocated virtual address space is the sum
of the individual requested allocations.

EXE

Executable—The program section contains instructions. This
attribute provides the capability of separating instructions from
read-only and read/write data. The linker uses this attribute in
gathering program sections and in verifying that the transfer
address is in an executable program section.

GBL

Global—Program sections that have the same name and at¬
tributes, including GBL and OVR, will have the same relocatable
address in memory even when the program sections are in
different clusters (see the Linker section of the VAX/VMS Util¬
ities Reference Volume for more information on clusters). This
attribute is specified for FORTRAN COMMON block program
sections (see the VAX FORTRAN User's Guide). Compare this
attribute with its opposite, LCL.

LCL

Local—The program section is restricted to its cluster. Com¬
pare this attribute with its opposite, GBL.

LIB

Library Segment—Reserved for future use.

NOEXE

Not Executable—The program section contains data only; it
does not contain instructions.

NOPIC

Non-Position-Independent Content—The program section is
assigned to a fixed location in virtual memory (when it is in a
shareable image).

NORD

Nonreadable—Reserved for future use.

NOSHR

No Share—The program section is reserved for private use at
execution time by the initiating process.

NOWRT

Nonwriteable—The contents of the program section cannot be
altered (written into) at execution time.

OVR

Overlay—Program sections with the same name and attributes,
including OVR, have the same relocatable base address in
memory. The allocated virtual address space is the requested
allocation of the largest overlaying program section. Compare
this attribute with its opposite, CON.

PIC

Position-Independent Content—The program section can be
relocated; that is, it can be assigned to any memory area (when
it is in a shareable image).

Readable—Reserved for future use.

REL

Relocatable—The linker assigns the program section a relocat¬
able base address. The contents of the program section can be
code or data. Compare this attribute with its opposite, ABS.

6-77

Assembler Directives
.PSECT

Table 6-6 (Cont.)

DESCRIPTION

Program Section Attributes

Attribute
Name

Function

SHR

Share—The program section can be shared at execution time
by multiple processes. This attribute is assigned to a program
section that can be linked into a shareable image.

USR

User Segment—Reserved for future use.

VEC

Vector-Containing—The program section contains a change
mode vector indicating a privileged shareable image. The SHR
attribute must be used with VEC.

WRT

Write—The contents of the program section can be altered
(written into) at execution time.

Table 6-7

Default Program Section Attributes

Default
Attribute

Opposite
Attribute

CON

OVR

EXE

NOEXE

LCL

GBL

NOPIC

PIC

NOSHR

SHR

NORD

REL

ABS

WRT

NOWRT

NOVEC

VEC

.PSECT defines a program section and its attributes and refers to a program
section once it is defined. Program sections can be used to:
•

Develop modular programs

•

Separate instructions from data

•

Allow different modules to access the same data

•

Protect read-only data and instructions from being modified

•

Identify sections of the object module to the debugger

•

Control the order in which program sections are stored in virtual memory

The assembler automatically defines two program sections: the absolute
program section and the unnamed (or blank) program section. Any symbol
definitions that appear before any instruction, data, or .PSECT directive are
placed in the absolute program section. Any instructions or data that appear
before the first named program section is defined are placed in the unnamed
program section. Any .PSECT directive that does not include a program
section name specifies the unnamed program section.

6-78

Assembler Directives
.PSECT

A maximum of 254 user-defined, named program sections can be defined.
When the assembler encounters a .PSECT directive that specifies a new
program section name, it creates a new program section and stores the name,
attributes, and alignment of the program section. The assembler includes all
data and instructions that follow the .PSECT directive in that program section
until it encounters another .PSECT directive. The assembler starts all program
sections at a location counter of 0, which is relocatable.
If the assembler encounters a .PSECT directive that specifies the name of a
previously defined program section, it stores the new data or instructions after
the last entry in the previously defined program section. The location counter
is set to the value of the location counter at the end of the previously defined
program section. You need not list the attributes when continuing a program
section but any attributes that are listed must be the same as those previously
in effect for the program section. A continuation of a program section cannot
contain attributes conflicting with those specified in the original .PSECT
directive.
The attributes listed in the .PSECT directive only describe the contents of the
program section. The assembler does not check to ensure that the contents
of the program section actually include the attributes listed. However, the
assembler and the linker do check that all program sections with the same
name have exactly the same attributes. The assembler and linker display an
error message if the program section attributes are not consistent.
Program section names are independent of local symbol, global symbol, and
macro names. Thus, the same symbolic name can be used for a program
section and for a local symbol, global symbol, or macro name.

NOTES

The .ALIGN directive cannot specify an alignment greater than that of the
current program section; consequently, .PSECT should specify the largest
alignment needed in the program section. For efficiency of execution, an
alignment of longword or larger is recommended for all program sections
that have longword data.

2 The attributes of the default absolute and the default unnamed program
sections are listed below. Note that the program section names include
the periods and enclosed spaces.
Program Section
Name

Attributes and Alignment

. ABS .

NOPIC,USR,CON,ABSXCL,NOSHR,NOEXE,
NORD,NOWRT,NOVEC,BYTE

. BLANK .

NOPIC^SR^CON^ELXCL^OSHR^XE,
RD,WRT,NOVEC,BYTE

EXAMPLE
.PSECT

CODE.NOWRT.EXE.LONG

.PSECT

RWDATA.WRT.NOEXE.QUAD

Program section to contain
executable code
Program section to contain
modifiable data

6-79

Assembler Directives
.QUAD

.QUAD
Quadword storage directive

FORMATS

parameters

.QUAD literal
.QUAD symbol
literal
Any constant value. This value can be preceded by "O, ~B, "X, or ~D to specify
the radix as octal, binary, hexadecimal, or decimal, respectively; or it can be
preceded by ~A to specify the ASCII text operator. Decimal is the default
radix.

symbol
A symbol defined elsewhere in the program. This symbol results in a
sign-extended, 32-bit value being stored in a quadword.

DESCRIPTION

.QUAD generates 64 bits (eight bytes) of binary data.

NOTE

.QUAD is like .OCTA and different from other data storage directives (.BYTE,
.WORD, and .LONG) in that it does not evaluate expressions and that it
accepts only one value. It does not accept a list.

EXAMPLE
QUAD

“A'.ASK?..'

QUAD
QUAD
QUAD
QUAD

0
“ XO123456789ABCDEF
“Bill1000111001101
LABEL

6-80

;
;
;
;
;
;
;

Each ASCII character is stored
in a byte
QUAD 0
QUAD hex value specified
QUAD binary value specified
LABEL has a 32-bit,
zero-extended value.

Assembler Directives
.REFn

.REFn
Operand generation directives

FORMATS

parameter

.REF1 operand
.REF2 operand
.REF4 operand
.REF8 operand
.REF16 operand
operand
An operand of byte, word, longword, quadword, or octaword context,
respectively.

DESCRIPTION VAX MACRO has five operand generation directives used in macros to define
new opcodes:
Directive

Function

.REF1

Generates a byte operand

.REF2

Generates a word operand

.REF4

Generates a longword operand

.REF8

Generates a quadword operand

.REF 16

Generates an octaword operand

The .REFn directives are provided for compatibility with VAX MACRO VI.0.
The .OPDEF directive provides greater functionality and is easier to use than
.REFn; consequently, .OPDEF should be used instead of .REFn.

EXAMPLE
.MACRO
.BYTE
. REF4
. REF4
. REF4
. ENDM

M0VL3 A.B.C
~XFF,~XA9
A
B
C
M0VL3

M0VL3

RO.QLAB-l,(R7)+[RIO]

This operand has longword context
This operand has longword context
This operand has longword context

This example uses .REF4 to create a new instruction, MOVL3, which uses the
reserved opcode FF. See the example in .OPDEF for a preferred method to
create a new instruction.

Assembler Directives
.REPEAT

.REPEAT
Repeat block directive

FORMATS

.REP EAT expression
range
.ENDR

parameters

expression
An expression whose value controls the number of times the range is to be
assembled within the program. When the expression is less than or equal to
0, the repeat block is not assembled. The expression must not contain any
undefined symbols and must be an absolute expression (see Section 3.5).

range
The source text to be repeated the number of times specified by the value
of the expression. The repeat block can contain macro definitions, indefinite
repeat blocks, or other repeat blocks. .MEXIT is legal within the range.

DESCRIPTION

.REPEAT repeats a block of code a specified number of times, in line with
other source code. The .ENDR directive specifies the end of the range.

NOTE

The alternate form of .REPEAT is .REPT.

EXAMPLE
Macro definition:
.MACRO
.REPEAT
.ASCII
.ENDR
.BYTE
.ENDM

6-82

COPIES STRING,NUM
NUM
/STRING/
0
COPIES

Assembler Directives
.REPEAT

Macro calls and expansions of the macro defined previously:

VARB

COPIES
.REPEAT
.ASCII
.ENDR
.ASCII
.ASCII
.ASCII
.ASCII

<ABCDEF>,5
5
/ABCDEF/

ASCII
.BYTE

/ABCDEF/
0

/ABCDEF/
/ABCDEF/
/ABCDEF/
/ABCDEF/

3
COPIES <HOW MANY
REPEAT 3
.ASCII /HOW MANY
.ENDR
.ASCII
/HOW MANY
.ASCII /HOW MANY
.ASCII /HOW MANY
.BYTE
0

TIMES>,VARB
TIMES/
TIMES/
TIMES/
TIMES/

6—83

Assembler Directives
.RESTORE-PSECT

.RESTORE-PSECT
Restore previous program section context directive

FORMAT

. RESTORE_PSECT

DESCRIPTION

.RESTORE-JPSECT retrieves the program section from the top of the program
section context stack, an internal stack in the assembler. If the stack is empty
when .RESTORE-PSECT is issued, the assembler displays an error message.
When .RESTORE-PSECT retrieves a program section, it restores the current
location counter to the value it had when the program section was saved.
The local label block is also restored if it was saved when the program section
was saved. (See the description of .SAVE—PSECT for more information.)

NOTE

The alternate form of .RESTORE-PSECT is .RESTORE.

EXAMPLE

.RESTORE-PSECT and .SAVE—PSECT are especially useful in macros that
define program sections. The macro definition below saves the current
program section context and defines new program sections. Then, it restores
the saved program section. If the macro did not save and restore the program
section context each time the macro was invoked, the program section would
change.

.MACRO

INITD

.SAVE.PSECT
.PSECT SYMBOLS,ABS
HELP_LEV=2
MAXNUM=100
RATE1=16
RATE2=4
.PSECT DATA.NOEXE,LONG
TABL:
. BLKL
100
TEMP:
. BLKB
16
.RESTORE.PSECT

. ENDM

6-84

; Initialize symbols
;
and data areas
; Save the current PSECT
Define new PSECT
Define symbol
Define symbol
Define symbol
Define symbol
Define another PSECT
100 longwords in TABL
More storage
Restore the PSECT
in effect when
MACRO is invoked

Assembler Directives
.SAVE—PSECT

.SAVE-PSECT
Save current program section context directive

FORMAT

.SAVE_PSECT [LOCAL-BLOCK]

parameter

LOCAl_BLOCK
An optional keyword that specifies that the current local label is to be saved
with the program section context.

DESCRIPTION

.SAVE_JPSECT stores the current program section context on the top of
the program section context stack, an internal assembler stack; it leaves
the current program section context in effect. The program section context
stack can hold 31 entries. Each entry includes the value of the current
location counter and the maximum value assigned to the location counter
in the current program section. If the stack is full when .SAVE—PSECT is
encountered, an error occurs.
.SAVE—PSECT and .RESTORE—PSECT are especially useful in macros that
define program sections. See the description of .RESTORE—PSECT for
another example using .SAVE—PSECT.

NOTE

The alternate form of .SAVE—PSECT is .SAVE.

EXAMPLE
Macro definition:
.MACRO

ERR.MESSAGE.TEXT

; Set up lists of messages
;
and pointers

MESSAGE.INDEX, MESSAGE.INDEX=0
.IIF
NOT.DEFINED
SAVE.PSECT ; Keep local labels
LOCAL.BLOCK
; List of error messages
.PSECT MESSAGE.TEXT
MESSAGE::
.ASCIC /TEXT/
.PSECT MESSAGE,POINTERS
; Addresses of error
;
messages
.ADDRESS ; Store one pointer
MESSAGE
; Get back local labels
.RESTORE.PSECT
PUSHL
#MESSAGE_INDEX
; Print message
CALLS
#1,PRINT_MESS
MESSAGE.INDEX=MESSAGE_INDEX+1
.ENDM
ERR.MESSAGE

Macro call:
RESETS: CLRL
R4
BLBC
R0,30$
ERR.MESSAGE
30$:

RSB

<STRING TOO SH0RT> ; Add "STRING TOO SHORT"
;
to list of error
;
messages

6-85

Assembler Directives
.SAVE—PSECT

The use of .SAVE_PSECT LOCAL__BLOCK here means that the local label
30$ is defined in the same local label block as the reference to 30$. If a
local label is not defined in the block in which it is referenced, the assembler
produces the following error message:
'/.MACRO-E-UNDEFSYM, Undefined Symbol

6—86

Assembler Directives
.SHOW and .NOSHOW

.SHOW
.NOSHOW
Listing directives

FORMATS

parameter

.SHOW [argument-list]
.NOSHOW [argument-list]
argument-list
One or more of the optional symbolic arguments defined in Table 6-8.
Either the long form or the short form of the arguments can be used. Each
argument can be used alone or in combination with other arguments. If
multiple arguments are specified, they must be separated by commas, tabs,
or spaces. If any argument is not specifically included in a listing control
statement, its default value (show or noshow) is assumed throughout the
source program.
Table 6-8

DESCRIPTION

.SHOW and .IMOSHOW Symbolic Arguments

Long Form

Short Form

Default

Function

BINARY

MEB

Noshow

Lists macro and repeat block
expansions that generate
binary code. BINARY is a
subset of EXPANSIONS.

CALLS

Show

Lists macro calls and repeat
block specifiers.

CONDITIONALS

CND

Show

Lists unsatisfied condi¬
tional code associated with
the conditional assembly
directives.

DEFINITIONS

Show

Lists macro and repeat
range definitions that appear
in an input source file.

EXPANSIONS

Noshow

Lists macro and repeat
range expansions.

.SHOW and .NOSHOW specify listing control options in the source text of a
program. .SHOW and .NOSHOW can be used with or without an argument
list.
When used with an argument list, .SHOW causes certain types of lines to be
included in the listing file and .NOSHOW causes certain types of lines to be
excluded. .SHOW and .NOSHOW control the listing of the source lines that
are in conditional assembly blocks (see the description of .IF), macros, and
repeat blocks.

6-87

Assembler Directives
.SHOW and .NOSHOW

When used without arguments, these directives alter the listing level count.
The listing level count is initialized to 0. Each time .SHOW appears in a
program, the listing level count is incremented; each time .NOSHOW appears
in a program, the listing level count is decremented.
When the listing level count is negative, the listing is suppressed (unless the
line contains an error). Conversely, when the listing level count is positive,
the listing is generated. When the count is 0, the line is either listed or
suppressed, depending on the value of the listing control symbolic arguments.

NOTES

The listing level count allows macros to be listed selectively; a macro
definition can specify .NOSHOW at the beginning to decrement the listing
count and can specify .SHOW at the end to restore the listing count to its
original value.

The alternate forms of .SHOW and .NOSHOW are .LIST and .NLIST.

EXAMPLE
.MACRO

.SHOW

; List next line

.NOSHOW

; Do not list remainder
;
of macro expansion

X=.

. ENDM
.NOSHOW EXPANSIONS
XX
X=.

6-88

; Do not list macro
;
expansions

Assembler Directives
.SIGNED_BYTE

.SIGNED-BYTE
Signed byte data directive

FORMAT
parameters

.SIGNED_BYTE expression-list
expression-list
An expression or list of expressions separated by commas. Each expression
optionally can be followed by a repetition factor delimited by square brackets.
An expression followed by a repetition factor has the format:
expressioni[expression2]

expression 1
An expression that specifies the value to be stored. The value must be in the
range -128 through +127.

DESCRIPTION .SIGNED_BYTE is equivalent to .BYTE, except that VAX MACRO indicates
that the data is signed in the object module. The linker uses this information
to test for overflow conditions.

NOTE

Specifying .SIGNED—BYTE allows the linker to detect overflow conditions
when the value of the expression is in the range of 128 through 255. Values
in this range can be stored as unsigned data, but cannot be stored as signed
data in a byte.

EXAMPLE
.SIGNED.BYTE
.SIGNED.BYTE

LABEL1-LABEL2
ALPHA[20]

;
;

Data must fit
in byte

6-89

Assembler Directives
.SIGNED_WORD

.SIGNED_WORD
Signed word storage directive

FORMAT

.SIGNED_WORD expression-list

parameters

expression-list
An expression or list of expressions separated by commas. Each expression
optionally can be followed by a repetition factor delimited by square brackets.
An expression followed by a repetition factor has the format:
expressioni[expression2]

expression 1
An expression that specifies the value to be stored. The value must be in the
range -32,768 through +32,767.

DESCRIPTION

.SIGNED—WORD is equivalent to .WORD except that the assembler indicates
that the data is signed in the object module. The linker uses this information
to test for overflow conditions. .SIGNED—WORD is useful after the case
instruction to ensure that the displacement fits in a word.

NOTE

Specifying .SIGNED—WORD allows the linker to detect overflow conditions
when the value of the expression is in the range of 32,768 through 65,535.
Values in this range can be stored as unsigned data but cannot be stored as
signed data in a word.

EXAMPLE
.MACRO

BASE:

MAX:

CASE.SRC.DISPLIST.TYPE=W.LIMIT=#0.NMODE=S~#.7BASE.?MAX
; MACRO to use CASE instruction.
;
SRC is selector, DISPLIST
;
is list of displacements, TYPE
;
is B (byte) W (word) L (long),
;
LIMIT is base value of selector
CASE'TYPE
SRC. LIMIT, NMODE' «MAX-BASE>/2>-l
; Case instruction
; Local label specifying base
.IRP
EP,<DISPLIST>
;
to set up offset list
.SIGNED_WORD
EP-BASE
; Offset list
.ENDR
;
; Local label used to count
.ENDM
CASE
;
args
CASE
CASEW

6-90

IVAR
<ERR_PROC,SORT,REV_SORT>
IVAR, #0, S~#«30001$-30000$>/2>-l

;

If IVAR=0, error

30001$:

Local label used to count args
=1, forward sort;
=2, backward
sort
CASE
CASEL

30002$:

30003$:

TEST
<TEST1,TEST2,TEST3>,L,#1
TEST, #1, S~#«30003$-30002$>/2>-l
; Local label specifying base
.SIGNED.WORD
TEST1-30002$
Offset list
.SIGNED_WORD
TEST2-30002$
Offset list
.SIGNED.WORD
TEST3-30002$
Offset list
Local label used to count args
Value of TEST can be 1, 2, or 3

In this example, the CASE macro uses .SIGNED_WORD
CASEW, or CASEL instruction.

Assembler Directives
.SUBTITLE

.SUBTITLE
Subtitle directive

FORMAT
parameter

.SUBTITLE comment-string
comment-string
An ASCII string from 1 to 40 characters long; excess characters are truncated.

DESCRIPTION

.SUBTITLE causes the assembler to print the line of text, represented by
the comment-string, in the table of contents (which the assembler produces
immediately before the assembly listing). The assembler also prints the line
of text as the subtitle on the second line of each assembly listing page. This
subtitle text is printed on each page until altered by a subsequent .SUBTITLE
directive in the program.

NOTE

The alternate form of .SUBTITLE is .SBTTL.

EXAMPLES
Q

SUBTITLE CONDITIONAL ASSEMBLY

This directive causes the assembler to print the following text as the subtitle
of the assembly listing:
CONDITIONAL ASSEMBLY

It also causes the text to be printed out in the listing's table of contents, along
with the source page number and the line sequence number of the source
statement where .SUBTITLE was specified. The table of contents would have
the following format:
B

6-92

TABLE OF CONTENTS

(1)

5000 ASSEMBLER DIRECTIVES

(2)

300 MACRO DEFINITIONS

(2)

2300 DATA TABLES AND INITIALIZATION

(3)

4800 MAIN ROUTINES

(4)

2800 CALCULATIONS

(4)

5000 I/O ROUTINES

(5)

1300 CONDITIONAL ASSEMBLY

Assembler Directives
.TITLE

.TITLE
Title directive

.TITLE module-name comment-string

FORMAT
parameters

module-name
An identifier from 1 to 31 characters long.

comment-string
An ASCII string from 1 to 40 characters long; excess characters are truncated.

DESCRIPTION

.TITLE assigns a name to the object module. This name is the first 31 or
fewer nonblank characters following the directive.

NOTES

The module name specified with .TITLE bears no relationship to the
file specification of the object module, as specified in the VAX MACRO
command line. Rather, the object module name appears in the linker
load map, and is also the module name that the debugger and librarian
recognize.

If .TITLE is not specified, VAX MACRO assigns the default name .MAIN,
to the object module. If more than one .TITLE directive is specified in
the source program, the last .TITLE directive encountered establishes the
name for the entire object module.

When evaluating the module name, VAX MACRO ignores all spaces
and/or tabs up to the first nonspace/nontab character after .TITLE.

EXAMPLE
.TITLE

EVAL

Evaluates Expressions

6-93

Assembler Directives
.TRANSFER

.TRANSFER
Transfer directive

FORMAT
parameter

.TRANSFER symbol
symbol
A global symbol that is an entry point in a procedure or routine.

DESCRIPTION

.TRANSFER redefines a global symbol for use in a shareable image. The
linker redefines the symbol as the value of the location counter at the
.TRANSFER directive after a shareable image is linked.
Whenever possible, programs should not need to be relinked when the
shareable images to which they are linked change. This can only be achieved
if the following two conditions are met:
•

The total size of the shareable image does not change.

•

The entry points in the shareable image do not change their addresses
when the shareable code is changed and the image is relinked.

To avoid changing the size of the shareable image, reserve extra space when
first creating the image. To ensure that the entry points do not change, create
an object module that contains a transfer vector for each entry point and does
not change the order of the transfer vectors. If this object module is linked
at the beginning of the shareable image, the addresses will remain fixed even
if source code for a routine is changed. After each .TRANSFER directive, a
register save mask (for procedures only) and a branch to the first instruction
of the routine should appear.
The .TRANSFER directive does not cause any memory to be allocated and
does not generate any binary code. It merely generates instructions to the
linker to redefine the symbol when a shareable image is being created.
.TRANSFER can be used with procedures entered by the CALLS or CALLG
instruction. In this case, .TRANSFER is used with the .ENTRY and .MASK
directives. The branch to the actual routine must be a branch to the entry
point plus 2. Adding 2 to the address is necessary to bypass the 2-byte
register save mask.
Figure 6-1 illustrates the use of transfer vectors.

6-94

Assembler Directives
.TRANSFER

Figure 6-1

Using Transfer Vectors
Linked with Shareable Image

Program
Calling
Procedure

Transfer
Vector
Module

CALLS

ROUTB

.TRANSFER
.MASK
BRW
.TRANSFER
.MASK
BRW

ROUTA
ROUTA
ROUTA+2
ROUTB-*ROUTB
ROUTB+2-

Linked with Object Modules

Program
Calling
Procedure

CALLS

ROUTB

Shareable v
Image

Other
Object
Modules

. ENTRY
ROUTB,0
; START OF ROUTINERET

Object
Modules

ENTRY
ROUTB,0
; START OF ROUTINE
RET

ZK-535-81

EXAMPLE
.TRANSFER ROUTINE.A
.MASK
ROUTINE.A,~M<R4,R5>

BRW

ROUTINE.A+2

.ENTRY

ROUTINE.A,~M<R2,R3>

Copy entry mask
and add registers
R4 and R5
Branch to routine
(past entry mask)

; ENTRY point, save
registers R2 and I

RET

In this example, .MASK copies the entry mask of a routine to the new entry
address specified by .TRANSFER. If the routine is placed in a shareable image
and then called, registers R2, R3, R4, and R5 will be saved.

6-95

Assembler Directives
.WARN

.WARN
Warning directive

FORMAT
parameters

.WARN [expression];comment
expression
An expression whose value is displayed when .WARN is encountered during
assembly.

;comment
A comment that is displayed when .WARN is encountered during assembly.
The comment must be preceded by a semicolon.

DESCRIPTION

.WARN causes the assembler to display a warning message on the terminal
or in the batch log file, and in the listing file (if there is one).

NOTES

.WARN, .ERROR, and .PRINT are called the message display directives.
They can be used to display information indicating that a macro call
contains an error or an illegal set of conditions

When the assembly is finished, the assembler displays, on the terminal or
in the batch log file, the total number of errors, warnings, and information
messages, and the page numbers and line numbers of the lines causing
the errors or warnings.

If .WARN is included in a macro library, the comment should end with an
additional semicolon. Otherwise, the comment will be stripped from the
directive and will not be displayed when the macro is called.

The line containing the .WARN directive is not included in the listing file.

If the expression has a value of 0, it is not displayed in the warning
message.

EXAMPLE
.IF DEFINED
.IF DEFINED
WARN
. ENDC
. ENDC

FULL
DOUBLE.PREC
; This combination not tested

If the symbols FULL and DOUBLE_PREC are both defined, the following
warning message is displayed:
7.MACR0-W-GENWRN, Generated WARNING: This combination not tested

6-96

Assembler Directives
.WEAK

.WEAK
Weak symbol attribute directive

FORMAT
parameter

.WEAK symbol-list
symbol-list
A list of legal symbols separated by commas.

DESCRIPTION

.WEAK specifies symbols that are either defined externally in another module
or defined globally in the current module. .WEAK suppresses any object
library search for the symbol.
When .WEAK specifies a symbol that is not defined in the current module,
the symbol is externally defined. If the linker finds the symbol's definition in
another module, it uses that definition. If the linker does not find an external
definition, the symbol has a value of 0 and the linker does not report an error.
The linker does not search a library for the symbol, but if a module brought
in from a library for another reason contains the symbol definition, the linker
uses it.
When .WEAK specifies a symbol that is defined in the current module,
the symbol is considered to be globally defined. However, if this module is
inserted in an object library, this symbol is not inserted in the library's symbol
table. Consequently, searching the library at link time to resolve this symbol
does not cause the module to be included.

EXAMPLE
WEAK

I0CAR,LAB_3

6-97

Assembler Directives
.WORD

.WORD
Word storage directive

FORMAT
parameters

.WORD expression-list
expression-list
One or more expressions separated by commas. Each expression optionally
can be followed by a repetition factor delimited by square brackets.
An expression followed by a repetition factor has the format:
expressioni[expression2]

expression 1
An expression that specifies the value to be stored.

DESCRIPTION

.WORD generates successive words (two bytes) of data in the object module.

NOTES

The expression is first evaluated as a longword, then truncated to a word.
The value of the expression should be in the range of -32,768 through
+32,767 for signed data or 0 through 65,535 for unsigned data. The
assembler displays an error if the high-order two bytes of the longword
expression have a value other than 0 or "XFFFF.

The .SIGNED—WORD directive is the same as .WORD except that the
assembler displays a diagnostic message if a value is in the range from
32,768 to 65,535.

EXAMPLE
WORD

6-98

-X3F,FIVE[3].32

VAX Data Types and Instruction Set
Part II describes the VAX data types, addressing mode formats,
instruction formats, and the instructions themselves.

Terminology and Conventions

The following sections describe terminology and conventions used in Part II
of this volume.

7.1 Numbering
All numbers, unless otherwise indicated, are decimal. Where there is
ambiguity, numbers other than decimal are indicated with the base in English
following the number in parentheses. For example:
FF (hex)

7.2 UNPREDICTABLE and UNDEFINED
Results specified as UNPREDICTABLE may vary from moment to moment,
implementation to implementation, and instruction to instruction within
implementations. Software can never depend on results specified as
UNPREDICTABLE. Operations specified as UNDEFINED may vary from
moment to moment, implementation to implementation, and instruction
to instruction within implementations. The operation may vary in effect
from nothing to stopping system operation. UNDEFINED operations
must not cause the processor to hang—that is, to reach an unhalted state
from which there is no transition to a normal state in which the machine
executes instructions. Note the distinction between result and operation.
Nonprivileged software cannot invoke UNDEFINED operations.

7.3 Ranges and Extents
Ranges are specified in English and are inclusive (for example, a range of
integers 0 through 4 includes the integers 0, 1, 2, 3, and 4). Extents are
specified by a pair of numbers separated by a colon and are inclusive (that is,
bits 7:3 specifies an extent of bits including bits 7, 6, 5, 4, and 3).

7.4 MBZ
Fields specified as MBZ (Must Be Zero) must never be filled by software
with a nonzero value. If the processor encounters a nonzero value in a field
specified as MBZ, a reserved operand fault or abort occurs if that field is
accessible to nonprivileged software. MBZ fields that are accessible only to
privileged software (kernel mode) may not be checked for nonzero value by
some or all VAX implementations. Nonzero values in MBZ fields accessible
only to privileged software may produce UNDEFINED operation.

7-1

VAX MACRO and Instruction Set
Terminology and Conventions

7.5

Reserved
Unassigned values of fields are reserved for future use. In many cases,
some values are indicated as reserved to CSS and customers. Only these
values should be used for nonstandard applications. The values indicated as
reserved to DIGITAL, and all MBZ (Must Be Zero) fields, are to be used only
to extend the standard architecture in the future.

7.6

Figure Drawing Conventions
Figures which depict registers or memory follow the convention that increas¬
ing addresses run right to left and top to bottom.

7-2

Basic Architecture

8.1 Addressing
The basic addressable unit in VAX MACRO is the 8-bit byte. Virtual ad¬
dresses are 32 bits long: hence the virtual address space is 2**32 (approx¬
imately 4.3 billion) bytes. Virtual addresses as seen by the program are
translated into physical memory addresses by the memory management
mechanism.

8.2 Data Types
The following sections describe the VAX data types.

8.2.1

Byte
A byte is eight contiguous bits starting on an addressable byte boundary. The
bits are numbered from the right 0 through 7.
7

0
I

A byte is specified by its address A. When interpreted arithmetically, a byte is
a two's complement integer with bits of increasing significance ranging from
bit 0 through bit 6, with bit 7 the sign bit. The value of the integer is in the
range -128 through +127. For the purposes of addition, subtraction, and com¬
parison, VAX instructions also provide direct support for the interpretation
of a byte as an unsigned integer with bits of increasing significance ranging
from bit 0 through bit 7. The value of the unsigned integer is in the range 0
through 255.

8.2.2 Word
A word is two contiguous bytes starting on an arbitrary byte boundary. The
16 bits are numbered from the right 0 through 15.
l
5

0
I

A word is specified by its address A, the address of the byte containing bit 0.
When interpreted arithmetically, a word is a two's complement integer with
bits of increasing significance ranging from bit 0 through bit 14, with bit 15
the sign bit. The value of the integer is in the range -32,768 through +32,767.
For the purposes of addition, subtraction and comparison, VAX instructions

8-1

VAX MACRO and Instruction Set
Basic: Architecture

also provide direct support for the interpretation of a word as an unsigned
integer with bits of increasing significance ranging from bit 0 through bit 15.
The value of the unsigned integer is in the range 0 through 65,535.

8.2.3

Longword
A longword is four contiguous bytes starting on an arbitrary byte boundary.
The 32 bits are numbered from the right 0 through 31.
3

A longword is specified by its address A, the address of the byte containing
bit 0. When interpreted arithmetically, a longword is a two's complement
integer with bits of increasing significance ranging from bit 0 through
bit 30, with bit 31 the sign bit. The value of the integer is in the range
-2,147,483,648 through +2,147,483,647. For the purposes of addition, sub¬
traction, and comparison, VAX instructions also provide direct support for the
interpretation of a longword as an unsigned integer with bits of increasing
significance ranging from bit 0 through bit 31. The value of the unsigned
integer is in the range 0 through 4,294,967,295.

8.2.4

Quadword
A quadword is eight contiguous bytes starting on an arbitrary byte boundary.
The 64 bits are numbered from the right 0 through 63.
3

6
3

o
I

: A+4

3
2

A quadword is specified by its address A, the address of the byte containing
bit 0. When interpreted arithmetically, a quadword is a two's complement
integer with bits of increasing significance ranging from bit 0 through
bit 62, with bit 63 the sign bit. The value of the integer is in the range
-2**63 to +2**63-l. The quadword data type is not fully supported by
VAX instructions.

8-2

VAX MACRO and Instruction Set
Basic Architecture

8.2.5

Octaword
An octaword is 16 contiguous bytes starting on an arbitrary byte boundary.
The 128 bits are numbered from the right 0 through 127.
3

: A+4

: A+8

: A+12

1
2
7

9
6

An octaword is specified by its address A, the address of the byte containing
bit 0. When interpreted arithmetically, an octaword is a two's complement
integer with bits of increasing significance ranging from bit 0 through bit 126,
with bit 127 the sign bit. The value of the integer is in the range -2**127 to
+2**127-1. The octaword data type is not fully supported by
VAX instructions.

8.2.6

F_floating
An F—floating datum is four contiguous bytes starting on an arbitrary byte
boundary. The 32 bits are labelled from the right 0 through 31.
l l
5 4
+-+-■
ISI
+-+-■

7 6
exp

0
fraction

fraction

:A+2

An F_floating datum is specified by its address A, the address of the byte
containing bit 0. The form of an F_floating datum is sign magnitude with bit
15 as the sign bit, bits 14:7 as an excess 128 binary exponent, and bits 6:0
and 31:16 as a normalized 24-bit fraction with the redundant most-significant
fraction bit not represented. Within the fraction, bits of increasing significance
range from bits 16 through 31 and 0 through 6. The 8-bit exponent field
encodes the values 0 through 255. An exponent value of 0, together with
a sign bit of 0, is taken to indicate that the F_floating datum has a value of
0. Exponent values of 1 through 255 indicate true binary exponents of -127
through +127. An exponent value of 0, together with a sign bit of 1, is taken
as reserved. Floating-point instructions processing a reserved operand take
a reserved operand fault (see the VAX-11 Architecture Reference Manual).
The value of an F_floating datum is in the approximate range .29*10**-38
through 1.7*10**38. The precision of an F__floating datum is approximately
one part in 2**23; that is, typically seven decimal digits.

(

8-3

VAX MACRO and Instruction Set
Basic Architecture

8.2.7

D_floating
A D_floating datum is eight contiguous bytes starting on an arbitrary byte
boundary. The bits are labelled from the right 0 through 63.
1 1
5 4

7 6
exp

ISI

0
fraction

fraction

: A+2

fraction

: A+4

fraction

: A+6

A D_floating datum is specified by its address A, the address of the byte
containing bit 0. The form of a D_lfloating datum is identical to an F_floating
datum except for an additional 32 low-significance fraction bits. Within the
fraction, bits of increasing significance range from bits 48 through 63, 32
through 47, 16 through 31, and 0 through 6. The exponent conventions and
the approximate range of values are the same for D_floating as they are for
F_floating. The precision of a D_floating datum is approximately one part in
2**55, typically, 16 decimal digits.

8.2.8

G—floating
A G_floating datum is 8 contiguous bytes starting on an arbitrary byte
boundary. The bits are labelled from the right 0 through 63.
l l
5 4
1S |

4 3
exp

1 fract |

fraction

: A+2

fraction

: A+4

fraction

: A+6

A G—floating datum is specified by its address A, the address of the byte
containing bit 0. The form of a G—floating datum is sign magnitude, with
bit 15 as the sign bit, bits 14:4 as an excess 1024 binary exponent, and bits
3:0 and 63:16 as a normalized 53-bit fraction with the redundant mostsignificant fraction bit not represented. Within the fraction, bits of increasing
significance range from bits 48 through 63, 32 through 47, 16 through 31, and
0 through 3. The 11-bit exponent field encodes the values 0 through 2047.
An exponent value of 0, together with a sign bit of 0, is taken to indicate
that the G—floating datum has a value of 0. Exponent values of 1 through
2047 indicate true binary exponents of -1023 through +1023. An exponent
value of 0, together with a sign bit of 1, is taken as reserved. Floating-point
instructions processing a reserved operand take a reserved operand fault (see
the VAX-11 Architecture Reference Manual). The value of a G—floating datum
is in the approximate range .56*10**-308 through .9*10**308. The precision
of a G—floating datum is approximately one part in 2**52; that is, typically 15
decimal digits.

8-4

VAX MACRO and Instruction Set
Basic Architecture

8.2.9

H_floating
An H__floating datum is 16 contiguous bytes starting on an arbitrary byte
boundary. The 128 bits are labelled from the right 0 through 127.
l l
5 4
ISI

0
exponent

fraction

: A+2

fraction

: A+4

fraction

: A+6

fraction

: A+8

fraction

: A+10

fraction

: A+12

fraction

: A+14

An H_floating datum is specified by its address A, the address of the byte
containing bit 0. The form of an H_floating datum is sign magnitude with
bit 15 as the sign bit, bits 14:0 as an excess 16,384 binary exponent, and bits
127:16 as a normalized 113-bit fraction with the redundant most-significant
fraction bit not represented. Within the fraction, bits of increasing significance
range from bits 112 through 127, 96 through 111, 80 through 95, 64 through
79, 48 through 63, 32 through 47, and 16 through 31. The 15-bit exponent
field encodes the values 0 through 32,767. An exponent value of 0, together
with a sign bit of 0, is taken to indicate that the H_floating datum has a value
of 0. Exponent values of 1 through 32,767 indicate true binary exponents of
-16,383 through +16,383. An exponent value of 0, together with a sign bit
of 1, is taken as reserved. Floating-point instructions processing a reserved
operand take a reserved operand fault (see the VAX-11 Architecture Reference
Manual). The value of an H_floating datum is in the approximate range
.84*10**-4932 through .59*10**4932. The precision of an H_floating datum
is approximately one part in 2**112, typically, 33 decimal digits.

8.2.10 Variable-Length Bit Field
A variable-length bit field is 0 to 32 contiguous bits located arbitrarily with
respect to byte boundaries. A variable-length bit field is specified by three
attributes:
•

Address A of a byte

•

Bit position P, which is the starting location of the field with respect to bit
0 of the byte at A

•

Size S of the field

The specification of a bit field is indicated by the following figure, where the
field is the shaded area.
P+S P+S-l

P P-l

+-+-+-+

I
+

I//////////////////////1
I :A
+-+-+

s-l

8-5

VAX MACRO and Instruction Set
Basic Architecture

For bit strings in memory, the position is in the range -2**31 through
2**31-1 and is conveniently viewed as a signed 29-bit byte offset and a
3-bit bit-within-byte field.
3
1

3 2

byte offset

I bwb

The sign-extended 29-bit byte offset is added to the address A; the resulting
address specifies the byte in which the field begins. The 3-bit bit-within-byte
field encodes the starting position (0 through 7) of the field within that byte.
The VAX field instructions provide direct support for the interpretation of a
field as a signed or unsigned integer. When interpreted as a signed integer, it
is two's complement with bits of increasing significance ranging from bits 0
through S-2; bit S-l is the sign bit. When interpreted as an unsigned integer,
bits of increasing significance range from bits 0 to S-l. A field of size 0 has a
value identically equal to 0.
A variable-length bit field may be contained in one to five bytes. From a
memory management point of view, only the minimum number of aligned
longwords necessary to contain the field may be actually referenced.
For bit fields in registers, the position is in the range 0 through 31. The
position operand specifies the starting position (0 through 31) of the field in
the register. A variable-length bit field may be contained in two registers if
the sum of position and size exceeds 32.
3
l

p p-i

+-+-+

I/////////I

I Rn

+-+

I///////////I RCn+1]
P+S P+S-l

For further details on the specification of variable-length bit fields see the
descriptions of the variable-length bit field instructions in Section 9.5 and in
the VAX-11 Architecture Reference Manual.

8.2.11 Character String
A character string is a contiguous sequence of bytes in memory. A character
string is specified by two attributes: the address A of the first byte of the
string, and the length L of the string in bytes. Thus, the format of a character
string is represented as follows.
7

o
I

I
7

8-6

:A+L-l

VAX MACRO and Instruction Set
Basic Architecture

The address of a string specifies the first character of a string. Thus "XYZ" is
represented as follows.

“X"

+-+

"Y"

:A+l

+-+

"Z"

:A+2

The length L of a string is in the range 0 through 65,535.

8.2.12 Trailing Numeric String
A trailing numeric string is a contiguous sequence of bytes in memory.
The string is specified by two attributes: the address A of the first byte
(most-significant digit) of the string, and the length L of the string in bytes.
All bytes of a trailing numeric string, except the least-significant digit byte,
must contain an ASCII decimal digit character (0 through 9). The representa¬
tion for the high-order digits is as follows.

Digit

Decimal

Hex

ASCII
Character

The highest-addressed byte of a trailing numeric string represents an encoding
of both the least-significant digit and the sign of the numeric string. The VAX
numeric string instructions support any encoding; however there are three
preferred encodings used by DIGITAL software. These are:
•

Unsigned numeric encoding, in which there is no sign and the leastsignificant digit contains an ASCII decimal digit character

•

Zoned numeric encoding

•

Overpunched numeric encoding

Because the overpunch format has been used by compilers of many manufac¬
turers over many years, and because various card encodings are used, several
variations in overpunch format have evolved. Typically, these alternate forms
are accepted on input; the normal form is generated as the output for all op¬
erations. The valid representations of the digit and sign in each of the latter
two formats is indicated in Table 8-1.

8-7

VAX MACRO and Instruction Set
Basic Architecture

Table 8-1

Representation of Least-Significant Digit and Sign
Zoned Numeric Format

Overpunch Format
ASCII char
Hex
norm
alt.

Digit

Decimal

Hex

ASCII
char

123

{

Decimal

0[?

—0

112

125

}

]: •

-1

113

-2

1 14

-3

115

-4

116

-5

117

-6

118

-7

119

-8

120

-9

121

The length L of a trailing numeric string must be in the range 0 through 31 (0
through 31 digits). The value of a zero-length string is identically 0.
The address A of the string specifies the byte of the string containing the
most-significant digit. Digits of decreasing significance are assigned to in¬
creasing addresses. Thus "123" is represented as follows.
Zoned Format or Unsigned

Overpunch Format

7430

8-8

7430

: A

: A+l

: A+2

VAX MACRO and Instruction Set
Basic Architecture

The trailing numeric string with a value of "-123" is represented as follows.
Zoned Format

Overpunch Format

7430

: A

: A+l

1
--+

: A+2

1
+--

: A+2

8.2.13 Leading Separate Numeric String
A leading separate numeric string is a contiguous sequence of bytes in
memory. A leading separate numeric string is specified by two attributes: the
address A of the first byte (containing the sign character), and a length L,
which is the length of the string in digits and not the length of the string in
bytes. The number of bytes in a leading separate numeric string is L+l .
The sign of a separate leading numeric string is stored in a separate byte.
Valid sign bytes are indicated in the following table.

Sign

Decimal

Hex

ASCII
character

{blank}

—

The preferred representation for “+" is ASCII
. All subsequent bytes
contain an ASCII digit character, as indicated in the following table.

Digit

Decimal

Hex

ASCII
character

The length L of a leading separate numeric string must be in the range
0 through 31 (0 through 31 digits). The value of a zero-length string is
identically 0.

8-9

VAX MACRO and Instruction Set
Basic Architecture

The address A of the string specifies the byte of the string containing the sign.
Digits of decreasing significance are assigned to bytes of increasing addresses.
Thus "+123" is represented as follows.
7
1
1
1
1
1
1
1
1
1
i
+--

4 3

1
--11
1
-- i1
1
i
1
1

: A
: A+l
: A+2
: A+3

The leading separate numeric string with a value of "-123" is represented as
follows.
7

4 3

0
A
A+l
A+2

A+3

8.2.14 Packed Decimal String
A packed decimal string is a contiguous sequence of bytes in memory. A
packed decimal string is specified by two attributes: the address A of the
first byte of the string and a length L, which is the number of digits in the
string and not the length of the string in bytes. The bytes of a packed decimal
string are divided into two 4-bit fields (nibbles). Each nibble except the low
nibble (bits 3:0) of the last (highest-addressed) byte must contain a decimal
digit. The low nibble of the highest-addressed byte must contain a sign. The
representation for the digits and sign is indicated as follows.

Digit or Sign

Decimal

Hex

10,12,14 or 15

A,C,E, or F

11 or 13

B, or D

The preferred sign representation is 12 for "+" and 13 for
. The length L
is the number of digits in the packed decimal string (not counting the sign);
L must be in the range 0 through 31. When the number of digits is odd, the

8-10

VAX MACRO and Instruction Set
Basic Architecture

digits and the sign fit into a string of bytes whose length is defined by the
following equation: L/2 (integer part only) + 1 . When the number of digits is
even, it is required that an extra "0" digit appear in the high nibble (bits 7:4)
of the first byte of the string. Again, the length in bytes of the string is
L/2 + 2 .
The address A of the string specifies the byte of the string containing the
most-significant digit in its high nibble. Digits of decreasing significance are
assigned to increasing byte addresses and from high nibble to low nibble
within a byte. Thus "+123" has a length of 3 and is represented as follows.
7

4 3

-+-+

: A

+-+-+

: A ♦ 1

The packed decimal number "-12" has a length of 2 and is represented as
follows.
7
I

4 3
0

0
1

: A

+-+-+

8.3

: A + 1

Processor Status Word
The processor status word (PSW) contains:
•

The condition codes, which give information on the results produced by
previous instructions

•

The exception enables, which control the processor action on certain
exception conditions (see the VAX-11 Architecture Reference Manual)

The format of the PSW is:
l
5

876543210

I
I

MBZ

ID IF 111 I I I | I
|V|U|V|T|N|Z|V|C|

The condition codes are UNPREDICTABLE when they are affected by
UNPREDICTABLE results. The VAX procedure call instructions conditionally
set the IV and DV enables, clear the FU enable, and leave the T enable
unchanged at procedure entry.

8.3.1

c bit
The C (carry) condition code bit, when set, indicates that the last instruction
that affected C had a carry out of the most-significant bit of the result, or
a borrow into the most-significant bit. When C is clear, no carry or borrow
occurred.

8—11

VAX MACRO and Instruction Set
Basic Architecture

8.3.2

V bit
The V (overflow) condition code bit, when set, indicates that the last instruc¬
tion that affected V produced a result whose magnitude was too large to be
properly represented in the operand that received the result, or that there
was a conversion error. When V is clear, no overflow or conversion error
occurred.

8.3.3

Zbit
The Z (zero) condition code, when set, indicates that the last instruction that
affected Z produced a result that was 0. When Z is clear, the result was
nonzero.

8.3.4

N bit
The N (negative) condition code bit, when set, indicates that the last instruc¬
tion that affected N produced a negative result. When N is clear, the result
was positive (or zero).

8.3.5

Tbit
The T (trace) bit, when set at the beginning of an instruction, causes the
TP bit in the Processor Status Longword to be set. When TP is set at the
end of an instruction, a trace fault is taken before the execution of the next
instruction. See the VAX-11 Architecture Reference Manual for additional
information on the TP bit and the trace fault.

8.3.6

IV bit
The IV (integer overflow) bit, when set, forces an integer overflow trap after
execution of an instruction that produced an integer result that overflowed
or had a conversion error. When IV is clear, no integer overflow trap occurs.
(However, the condition code V bit is still set.)

8.3.7

FU Bit
The FU (floating underflow) bit, when set, forces a floating underflow fault
if the result of a floating-point instruction is too small in magnitude to be
represented in the result operand. When FU is clear, no underflow fault
occurs.

8.3.8

DV bit
The DV (decimal overflow) bit, when set, forces a decimal overflow trap after
execution of an instruction that produced an overflowed decimal (numeric
string, or packed decimal) result or had a conversion error. When DV is clear,
no trap occurs. (However, the condition code V bit is still set.)

8—12

VAX MACRO and Instruction Set
Basic Architecture

8.4

Permanent Exception Enables
The processor action on certain exception conditions is not controlled by bits
in the PSW. Traps or faults always result from these exception conditions.

8.4.1 Divide by Zero
A divide by zero trap is forced after the execution of an integer or decimal
division instruction that has a zero divisor. A fault occurs on a floating-point
division instruction that has a zero divisor.

8.4.2 Floating Overflow
A floating overflow fault is forced after the execution of a floating-point
instruction that produced a result too large to be represented in the result
operand.

8.5

Instruction and Addressing Mode Formats
The following sections describe the formats for instruction opcodes and for
the operand specifiers used with the various addressing modes.

8.5.1

Opcode Formats
An instruction is specified by the byte address A of its opcode.
7

0
opcode

The opcode may extend over two bytes; the length depends on the contents
of the byte at address A. If, and only if, the value of the byte is FC (hex)
through FF (hex), the opcode is two bytes long.
l
5
I

8 7
opcode

0
FC - FF

8.5.2 Operand Specifiers
Each instruction takes a specific sequence of operand specifier types. An
operand specifier type conceptually has two attributes: the access type and
the data type.
The access types include:
1

Read—The specified operand is read only.

2 Write—The specified operand is written only.
3 Modify—The specified operand is read, potentially modified, and written.
This operation is not performed under a memory interlock.

8—13

VAX MACRO and Instruction Set
Basic Architecture

4 Address—The address of the specified operand in the form of a longword
is the actual instruction operand. The specified operand is not accessed
directly, although the instruction may subsequently use the address to
access that operand.

5 Variable bit field base address—This access type is a special variant of the
address access type. Variable bit field base address type is the same as
address access type except for register mode. In register mode, the field
is contained in register n, designated by the operand specifier (or register
n+1 concatenated with register n).
6

Branch—No operand is accessed. The operand specifier itself is a branch
displacement.

Access types 1 through 5 are general mode addressing. Type 6 is branch
mode addressing.
The data types include:
•

Byte

•

Word

•

Longword and F__floating (equivalent for addressing mode considerations)

•

Quadword, D—floating, and G_iloating (equivalent for addressing mode
considerations)

•

Octaword and H_iloating (equivalent for addressing mode considerations)

For the address and branch access types, which do not directly reference
operands, the data type indicates:

8.6

•

Address—the operand size to be used in the address calculation in autoin¬
crement, autodecrement, and index modes

•

Branch—the size of the branch displacement

General Addressing Mode Formats
The following sections describe the operand specifier formats for the general
addressing modes. For descriptions and examples of the use of the general
addressing modes, see Section 5.
Notation for Describing Addressing Modes
To describe the addressing modes the following notation is used:

8-14

VAX MACRO and Instruction Set
Basic Architecture

addition

subtraction
multiplication
is replaced by

is defined as
concatenation
Rn or R[n]

the contents of register n

PC or SP

the contents of register 15 or 14 respectively

(x)

the contents of a location in memory whose address is x

arithmetic parentheses used to indicate precedence

SEXT(x)
ZEXT(x)

x is sign extended to size of operand needed

operand address
comment delimiter

x is zero extended to size of operand needed

Note: In the formal descriptions of the addressing modes, the symbol for a
register (for example, Rn or PC) always means the contents of the register
(for example, the contents of register n or the contents of register 15.)
However, in text, when there is no ambiguity, the symbol for a register is
often used as the name of a register (for example, Rn may be used for the
name of register n, and PC may be used for the name of register 15).
Each general mode addressing description includes the definition of the
operand address and the specified operand. For operand specifiers of address
access type, the operand address is the actual instruction operand; for other
access types, the specified operand is the instruction operand. The branch
mode addressing description includes the definition of the branch address.

8.6.1

4 3

- -

♦

No specifier extension follows.
In register mode addressing, the operand is the contents of either register
n or (for quadword, D_floating, and certain field operands) register n+1
concatenated with register n.

operand =

! If one register

or
R[n+1]'Rn

! If two registers

or
R[n+3]'R[n+2]'R[n+1]'Rn

! If four registers

The assembler notation for register mode is Rn.

8—15

VAX MACRO and Instruction Set
Basic Architecture

8.6.2 Register Deferred Mode
The operand specifier format is:
7

4 3

+-+-+

- -

♦

No specifier extension follows.
In register deferred mode addressing, the address of the operand is the
contents of register n.
OA = Rn
operand = (OA)

The assembler notation for register deferred mode is (Rn).

8.6.3 Autoincrement Mode
The operand specifier format is:
7
I

4 3
8

0
Rn

No specifier extension follows. If Rn denotes PC, immediate data follows,
and the mode is termed immediate mode.
In autoincrement mode addressing, the address of the operand is the contents
of register n. After the operand address is determined, the size of the operand
in bytes (1 for byte; 2 for word; 4 for longword and F_floating; 8 for quadword, G_floating and D_floating; and 16 for octaword and H__floating) is
added to the contents of register n, and the contents of register n are replaced
by the result.
OA = Rn
Rn <- Rn + size
operand = (OA)

The assembler notation for autoincrement mode is (Rn)+. For immediate
mode, the notation is Inconstant, where constant is the immediate data that
follows.

8.6.4 Autoincrement Deferred Mode
The operand specifier format is:
7
I

4 3
9

0
Rn

No specifier extension follows. If Rn denotes PC, a longword address follows,
and the mode is termed absolute mode.
In autoincrement deferred mode addressing, the address of the operand is the
contents of a longword whose address is the contents of register n. After the
operand address is determined, 4 (the size in bytes of a longword address) is
added to the contents of register n and the contents of register n are replaced
by the result.

8-16

VAX MACRO and Instruction Set
Basic Architecture

OA = (Rn)
Rn <- Rn + 4
operand = (OA)

The assembler notation for autoincrement deferred mode is @(Rn)+. For
absolute mode the notation is @#address, where address is the longword that
follows.

8.6.5

Autodecrement Mode
The operand specifier format is:
7
I

4 3
7

0
Rn

No specifier extension follows.
In autodecrement mode addressing, the size of the operand in bytes (1 for
byte; 2 for word; 4 for longword and F_floating; 8 for quadword, G_floating,
and D_floating; and 16 for octaword and H_floating) is subtracted from the
contents of register n, and the contents of register n are replaced by the result.
The updated contents of register n are the address of the operand.
Rn

<- Rn

- size

OA = Rn
operand = (OA)

The assembler notation for autodecrement mode is -(Rn).

8.6.6

Displacement Mode
There are three operand specifier formats:
7
1.

4 3
10

0
Rn

The specifier extension is a signed byte displacement that follows the operand
specifier. This is the byte displacement mode.
7
2.

4 3
12

0
Rn

The specifier extension is a signed word displacement that follows the
operand specifier. This is the word displacement mode.
7
3.

4 3
14

0
Rn

The specifier extension is a longword displacement that follows the operand
specifier. This is the longword displacement mode.

8-17

VAX MACRO and Instruction Set
Basic Architecture

In displacement mode addressing, the displacement (after it is sign extended
to 32 bits, if it is byte or word displacement) is added to the contents of
register n, and the result is the operand address.
OA = Rn + SEXT(displ)
or
Rn + dispi

! If byte or word displacement
! If longword displacement

operand = (OA)

If Rn denotes PC, the updated contents of PC are used. The updated contents
of PC are the address of the first byte beyond the specifier extension.
The assembler notation for byte, word, and long displacement mode is
B/'D(Rn), WT>(Rn), and L*D(Rn), respectively, where D = displacement.

8.6.7

Displacement Deferred Mode
There are three operand specifier formats:
7
1.

4 3
11

0
Rn

The specifier extension is a signed byte displacement that follows the operand
specifier. This is the byte displacement deferred mode.
7
2.

4 3
13

0
Rn

The specifier extension is a signed word displacement that follows the
operand specifier. This is the word displacement deferred mode.
7
3.

4 3
15

0
Rn

The specifier extension is a longword displacement that follows the operand
specifier. This is the longword displacement deferred mode.
In displacement deferred mode addressing, the displacement (after it is sign
extended to 32 bits, if it is byte or word displacement) is added to the contents
of register n, and the result is the address of a longword whose contents are
the operand address.
OA = (Rn + SEXKdispI))
or
(Rn + dispi)

! If byte or word displacement
!

If longword displacement

operand = (OA)

If Rn denotes PC, the updated contents of the PC are used. The updated
contents of PC are the address of the first byte beyond the specifier extension.
The assembler notation for byte, word, and longword displacement deferred
mode is (S)ITD(Rn), @W"D(Rn), and @LT>(Rn), respectively, where D =
displacement.

8-18

VAX MACRO and Instruction Set
Basic Architecture

8.6.8

Literal Mode
The operand specifier format is:
7 6 5

+-+-+

I 0 I

literal I

No specifier extension follows.
For operands of data type byte, word, longword, quadword, and octaword,
the operand is the zero extension of the 6-bit literal field.
operand = ZEXT(literal)

Thus, for these data types, literal mode may be used for values in the range
0 through 63.
For operands of data type F_floating, G_floating, D_floating, and H_floating,
the 6-bit literal field is composed of two 3-bit fields. These fields are illus¬
trated in the following diagram, where exp is exponent and fra is fraction.
5

3 2

I exp | fra I

The exponent and fraction fields are used to form an F_floating or D_floating
operand as follows:
l l
5 4

7 6

4 3

101

--128 + exp | fra I
0
I
-

+-+

: A+2

:A+4

+-+

:A+6

Note that bits 63:32 are not present in an F_floating operand.
The exponent and fraction fields are used to form a G_floating operand as
follows:
1 1
5 4
101

4 3
1024 + exp

1 fra 10|

: A+2

: A+4

: A+6

8-19

VAX MACRO and Instruction Set
Basic: Architecture

The exponent and fraction fields are used to form an H_floating operand as
follows:
1 1
5 4
101

16,384 + exp

I fra I

: A+2

: A+4

: A+6

: A+8

: A+10

: A+12

: A+14

+
I
+

The range of values available is given in Table 8-2 in both rational and
decimal number notation.

Table 8-2

Floating-Point Literals

Expressed as Decimal Numbers
Fraction
Exponent

0.5

0.5625

0.625

0.6875

0.75

0.8125

0.875

0.9375

1.0

1.125

1.25

1.37

1.5

1.625

1.75

1.875
3.75

2.0

2.25

2.5

2.75

3.0

3.25

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

8.0

9.0

10.0

11.0

12.0

13.0

14.0

15.0

16.0

18.0

20.0

22.0

24.0

26.0

28.0

30.0

32.0

36.0

40.0

44.0

48.0

52.0

56.0

60.0

64.0

72.0

80.0

88.0

96.0

104.0

112.0

120.0

Expressed as Rational Numbers
Fraction
Exponent

9/16

11/16

VA
2'A

3y4

Vs
13A
3 y2

15/16

3A
VA
3

13/16

6y2

V/b
33A
TA

V/s
2'A

4y2

V/s
23A
5 y2

104

112

120

8-20

VAX MACRO and Instruction Set
Basic Architecture

The assembler notation for literal mode is S*#literal.

8.6.9

Index Mode
The operand specifier format is:
1
5

8 7

4 3

+-+-+-+

Bits 15:8 contain a second operand specifier (termed the base operand spec¬
ifier) for any of the addressing modes except register, literal, or index. The
specification of register, literal, or index addressing mode results in an illegal
addressing mode fault (see the VAX-11 Architecture Reference Manual). If the
base operand specifier requires it, a specifier extension immediately follows.
The base operand specifier is subject to the same restrictions as would apply
if it were used alone. If the use of some particular specifier is illegal (that
is, causes a fault or UNPREDICTABLE behavior) under some circumstances,
then that specifier is similarly illegal as a base operand specifier in index
mode under the same circumstances.
The operand to be specified by index mode addressing is termed the primary
operand. The base operand specifier is used normally to determine an
operand address. This address is termed the base operand address (BOA).
The address of the primary operand specified is determined by multiplying
the contents of the index register x by the size of the primary operand in
bytes (1 for byte; 2 for word; 4 for longword and F__floating; 8 for quadword,
D_floating, and G_floating; and 16 for octaword and H_floating), adding
BOA, and taking the result.
0A = BOA + {size * (Rx)}
operand = (0A)

If the base operand specifier is for autoincrement or autodecrement mode, the
increment or decrement size is the size in bytes of the primary operand.
Certain restrictions are placed on the index register x. PC cannot be used as
an index register. If it is, a reserved addressing mode fault occurs (see the
VAX-11 Architecture Reference Manual). If the base operand specifier is for an
addressing mode that results in register modification (that is, autoincrement
mode, autodecrement mode, or autoincrement deferred mode), the same
register cannot be the index register. If it is, the primary operand address is
UNPREDICTABLE.

8-21

VAX MACRO and Instruction Set
Basic Architecture

The names of the addressing modes resulting from index mode addressing
are formed by adding the suffix "indexed" to the addressing mode of the base
operand specifier. The following gives the names and assembler notation.
The index register is designated Rx to distinguish it from the register Rn in
the base operand specifier.
•

•

Autoincrement indexed— (Rn)+[Rx]
or
Immediate indexed— T#constant[Rx] (Immediate indexed is recognized by
the assembler, but is not generally useful. Note that the operand address
is independent of the value of the constant.)

•

Autoincrement deferred indexed— @(Rn)+[Rx]
or
Absolute indexed— @#address[Rx]

8-22

•

Autodecrement indexed-(Rn)[Rx]

•

Byte, word, or longword displacement indexed—
BT>(Rn)[Rx],VTD(Rn)[Rx], or l/D(Rn)[Rx]

•

Byte, word, or longword displacement deferred indexed—
@B^D(Rn)[Rx],@W''D(Rn)[Rx], or @l/D(Rn)[Rx]

VAX MACRO and Instruction Set
Basic Architecture

8.7

Summary of General Mode Addressing
Table 8-3

General Register Addressing
7

4 3

+-+-♦

I mode

reg

Hex

Dec

Name

Assembler

r mwa V

AP
FP

Indexable

0-3

literal

S^literal

y f f f f

—

indexed

i[Rx]

y y y y y

—
f

y y y f y

(Rn)

y y y y y

autodecrement

-(Rn)

y y y y y

autoincrement

y y y y y

autoincrement deferred

(Rn)+
@(Rn)+

y y y y y

byte displacement

B~D(Rn)

y y y y y

byte displacement deferred

@B~D(Rn)

y y y y y

p
p

word displacement

V\TD(Rn)

y y y y y

word displacement deferred

@V\TD(Rn)

y y y y y

longword displacement

L~D(Rn)

y y y y y

p
p

longword displacement
deferred

@L~D(Rn)

y y y y y

Key:

D
i
—
f
p
u
uq
uo
ux
y
r
m
w
a
v

displacement
any indexable addressing mode
logically impossible
reserved addressing mode fault
Program Counter addressing
UNPREDICTABLE
UNPREDICTABLE for quad, octa, D_floating, G_floating, and H_floating (and field if position + size
greater than 32)
UNPREDICTABLE for octa, and H format
UNPREDICTABLE for index register same as base register
yes, always valid addressing mode
read access
modify access
write access
address access
field access

8-23

VAX MACRO and Instruction Set
Basic Architecture

Table 8-4

Program Counter Addressing
7
4 3 2 1 0
+-+-+-+-+-+
I mode

II 1 1 II

Hex

Dec

Name

Assembler

r mwa V

Indexable?

immediate

r# constant

y u u y y

absolute

@#address

y y y y y

byte relative

B'address

y y y y y

byte relative deferred

@B~address

y y y y y

word relative

\ATaddress

y y y y y

word relative deferred

@V\Taddress

y y y y y

long word relative

L'address

y y y y y

long word relative
deferred

@Laddress

y y y y y

Key:
u
UNPREDICTABLE
y
yes, always valid addressing mode
r
read access
m
modify access
w
write access
a
address access
v
field access

8.8

Branch Mode Addressing Formats
There are two operand specifier formats:
7
1.

0
displ

The operand specifier is a signed byte displacement.
l
5
2.

0
displ

The operand specifier is a signed word displacement.
In branch displacement addressing, the byte or word displacement is sign
extended to 32 bits and added to the updated contents of PC. The updated
contents of PC are the address of the first byte beyond the operand specifier.
The result is the branch address A.
A = PC + SEXT(displ)

The assembler notation for the and word branch displacement addressing is
A, where A is the branch address. Note that the branch address, and not the
displacement, is used.

8-24

VAX Instruction Set

9.1

Introduction
This section describes the instructions generally used by all software across
all implementations of the VAX architecture.
A more complete description of the instruction set can be found in the
VAX-11 Architecture Reference Manual. The VAX-11 Architecture Reference
Manual also contains information on certain instructions that are generally
used by privileged software and are specific to specialized portions of the
VAX architecture, such as memory management, interrupts and exceptions,
process dispatching, and processor registers.
A concise list of instructions and opcode assignments appears in
Appendix D.

9.1.1

MicroVAX Architecture
The MicroVAX architecture is a subset of the full VAX architecture. The
differences between the MicroVAX architecture and the VAX architecture can
be divided into two classes: missing instructions (and their associated data
types) and new exceptions.
Missing Instructions
The MicroVAX architecture does not include:
•

Compatibility mode

•

CRC instruction

•

Character string instructions (except MOVC3 and MOVC5)

•

Decimal string instructions, including EDITPC (decimal string data type)

•

D_floating-point instructions (D__floating data type)

•

H_floating-point instructions (H__floating data type)

•

Octaword instructions (octaword data type)

New Exceptions
Two new exceptions are included in the MicroVAX architecture to aid soft¬
ware in emulating the missing character, CRC, and decimal instructions. The
first exception pushes an exception frame including the opcode, operands,
and PC/PSL pair on the stack. The second exception occurs if FPD is set in
the PSL, and does not attempt to re-decode the operands, but merely pushes
a PC/PSL pair on the stack.
Both exceptions are same-mode exceptions, meaning they are handled in
whatever mode the system was currently executing at the time the exception
occurred.
9-1

VAX MACRO and Instruction Set
Instruction Descriptions

MicroVMS Support
Micro VMS will provide the same execution environment on MicroVAX sys¬
tems for nonprivileged programs that VMS supplies on full VAX architecture
systems.
MicroVMS will emulate all missing instructions, except for compatibility
mode. The floating-point emulation will provide support for all four floating¬
point data types. (If floating-point instructions are used, F and G data types
should be used instead of D or H.)
The software emulation for the character string instructions and CRC instruc¬
tion will be loaded into non-paged memory. The rest of the emulation will
be loaded into pageable memory. This means that code that runs above IPL
2 may not use the decimal or floating-point instructions.

9.2

Instruction Descriptions
The instruction set is divided into 12 major sections:
•

Integer arithmetic and logical

•

Address

•

Variable-length bit field

•

Control

•

Procedure call

•

Miscellaneous

•

Queue

•

Floating point

•

Character string

•

Cyclic redundancy check

•

Decimal string

•

Edit

Within each major section, instructions that are closely related are combined
into groups and described together. The instruction group description is
composed of the following:

9-2

•

The group name.

•

The format of each instruction in the group, including the name and type
of each instruction operand specifier and the order in which it appears
in memory. Operand specifiers from left to right appear in increasing
memory addresses.

•

The effect on condition codes.

•

Exceptions specific to the instruction. Exceptions that are generally possi¬
ble for all instructions (for example, illegal or reserved addressing mode,
T-bit, memory management violations, and so on) are not listed.

VAX MACRO and Instruction Set
Instruction Descriptions

9.2.1

•

The opcodes, mnemonics, and names of each instruction in the group.
The opcodes are given in hexadecimal.

•

A description, in English, of the instruction.

•

Optional notes on the instruction and programming examples.

Operand Specifier Notation
Operand specifiers are described in the following way:
name

access-type data-type

Parameters
name
A mnemonic name for the operand in the context of the instruction. The
name is often abbreviated.
access-type
A letter denoting the operand specifier access type:
a

Calculate the effective address of the specified operand. Address is
returned in a long word that is the actual instruction operand. Context
of address calculation is given by data-type, that is, size to be used in
autoincrement, autodecrement, and indexing.

No operand reference. Operand specifier is a branch isplacement. Size of
branch displacement is given by data-type.

Operand is read, potentially modified and written. Note that this is not an
indivisible memory operation. Also note that if the operand is not actually
modified, it may not be written back. However, modify type operands
are always checked for both read and write accessibility (see Chapter 5
of the VAX-11 Architecture Reference Manual).

Operand is read only.

Calculate the effective address of the specified operand. If the effective
address is in memory, the address is returned in a longword that is
the actual instruction operand. Context of address calculation is given
by data-type. If the effective address is Rn, the operand is in Rn or
R[n+1]'Rn.

Operand is written only.

data-type
A letter denoting the data type of the operand:
b

byte

D_floating

F_floating

G_floating

H_floating

longword

octaword

9-3

VAX MACRO and Instruction Set
Instruction Descriptions

9.2.2

quadword

word

first data type specified by instruction

second data type specified by instruction

Operation Description Notation
The operation of an instruction is given as a sequence of control and assign¬
ment statements in an ALGOL-like syntax. No attempt is made to define the
syntax formally; it is assumed to be familiar to the reader. The notation used
is an extension of that introduced in Section 8.6.
+

addition
subtraction, unary minus
multiplication

division (quotient only)
exponentiation
concatenation

is replaced by

Rn or R[n]

contents of register Rn

PC, SP, FP, or AP

the contents of register R15, R14, R13, or R12
respectively

PSW

the contents of the processor status word

PSL

the contents of the processor status long word

(x)

contents of memory location whose address is x

(x)+

contents of memory location whose address is x;
x incremented by the size of operand referenced
at x

-(X)

x decremented by size of operand to be referenced
at x; contents of memory location whose address
is x

<x:y>

a modifier that delimits an extent from bit position
x to bit position y inclusive

<x1,x2,...,xn>

a modifier that enumerates bits x1,x2,...,xn

is defined as

arithmetic parentheses used to indicate precedence

9-4

AND

logical AND

logical OR

XOR

logical XOR

NOT

logical (one's) complement

LSS

less than signed

LSSU

less than unsigned

LEQ

less than or equal signed

VAX MACRO and Instruction Set
Instruction Descriptions

LEQU

less than or equal unsigned

EQL

equal signed

EQLU

equal unsigned

NEQ

not equal signed

NEQU

not equal unsigned

GEQ

greater than or equal signed

GEQU

greater than or equal unsigned

GTR

greater than signed

GTRU

greater than unsigned

SEXT(x)

x is sign extended to size of operand needed

ZEXT(x)

x is zero extended to size of operand needed

REM(x,y)

remainder of x divided by y, such that x/y and
REM(x,y) have the same sign

MINU(x,y)

minimum unsigned of x and y

MAXU(x,y)

maximum unsigned of x and y

The following conventions are used:
•

Other than that caused by (x)+, or -(x), and the advancement of PC, only
operands or portions of operands appearing on the left side of assignment
statements are affected.

•

No operator precedence is assumed, other than that replacement ( <-) has
the lowest precedence. Precedence is indicated explicitly by { }.

•

All arithmetic, logical, and relational operators are defined in the context
of their operands. For example, "+" applied to floating operands means
a floating add, while "+" applied to byte operands is an integer byte
add. Similarly, "LSS" is a floating comparison when applied to floating
operands, while "LSS" is an integer byte comparison when applied to byte
operands.

•

Instruction operands are evaluated according to the operand specifier
conventions (see Section 8). The order in which operands appear in the
instruction description has no effect on the order of evaluation.

•

Condition codes generally indicate the effect of an operation on the value
of actual stored results, not on "true" results (which might be generated
internally to greater precision). Thus, for example, two positive integers
can be added together and the sum stored as a negative value, because of
overflow. The condition codes will indicate a negative value even though
the "true" result is clearly positive.

9-5

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions

9.3

Integer Arithmetic and Logical Instructions
The following instructions are described in this section.

9-6

Description
and Opcode

Number of
Instructions

Add Aligned Word
ADAWI add.rw, sum.mw

Add 2 Operand
ADD{B,W,L}2 add.rx, sum.mx

Add 3 Operand
ADD{B,W,L}3 addl.rx, add2.rx/ sum.wx

Add with Carry
ADWC add.rl, sum.ml

Arithmetic Shift
ASH{L,Q} cnt.rb, src.rx, dst.wx

Bit Clear 2 Operand
BIC{B,W,l_}2 mask.rx, dst.mx

Bit Clear 3 Operand
BIC{B,W,L}3 mask.rx, src.rx, dst.wx

Bit Set 2 Operand
BIS{B,W,L}2 mask.rx, dst.mx

Bit Set 3 Operand
BIS{B,W,L}3 mask.rx, src.rx, dst.wx

10.

Bit Test
BIT{B,W,L} mask.rx, src.rx

11.

Clear
CLR{B,W,L,Q,0} dst.wx

12.

Compare
CMP{B,W,L} srcl.rx, src2.rx

13.

Convert
CVT{B,W,L}{B,W,L} src.rx, dst.wy
All pairs except BB,WW,LL

14.

Decrement
DEC{B,W,L} dif.mx

15.

Divide 2 Operand
DIV{B,W,L}2 divr.rx, quo.mx

16.

Divide 3 Operand
DIV{B,W,L}3 divr.rx, divd.rx, quo.wx

17.

Extended Divide
EDIV divr.rl, divd.rq, quo.wl, rem.wl

18.

Extended Multiply
EMUL mulr.rl, muld.rl, add.rl, prod.wq

19.

Increment
INC{B,W,L} sum.mx

20.

Move Complemented
MCOM{B,W,L} src.rx, dst.wx

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions

Description
and Opcode

Number of
Instructions

21.

Move Negated
MNEG(B,W,L} src.rx, dst.wx

22.

Move
0V{B,W,L,Q} src.rx, dst.wx

23.

Move Zero-Extended
MOVZ{BW,BL,WL} src.rx. dst.wy

24.

Multiply 2 Operand
MUL{B,W/L}2 mulr.rx, prod.mx

25.

Multiply 3 Operand
MUL{B,W,L}3 mulr.rx, muld.rx, prod.wx

26.

Push Long
PUSHL src.rl, {-(SP).wlj

27.

Rotate Long
ROTL cnt.rb, src.rl, dst.wl

28.

Subtract with Carry
SBWC sub.rl, dif.ml

29.

Subtract 2 Operand
SUB{B,W,L}2 sub.rx, dif.mx

30.

Subtract 3 Operand
SUB{B,W,L}3 sub.rx, min.rx, dif.wx

31.

Test
TSTjB.W.L} src.rx

32.

Exclusive OR 2 Operand
XOR{B,W,L}2 mask.rx, dst.mx

33.

Exclusive OR 3 Operand
XOR{B,W,L}3 mask.rx, src.rx, dst.wx

9-7

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—ADAWI

ADAWI
Add Aligned Word Interlocked

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

reserved operand fault
integer overflow

opcodes

add.rw, sum.mw

<— sum LSS 0;
<— sum EQL 0;
<— {integer overflow};
<— {carry from most-significant bit};

ADAWI

Add Aligned Word Interlocked

DESCRIPTION

The addend operand is added to the sum operand and the sum operand is
replaced by the result. The operation is interlocked against similar operations
on other processors in a multiprocessor system. The destination must be
aligned on a word boundary; that is, bit 0 of the address of the sum operand
must be 0. If it is not, a reserved operand fault is taken.

NOTES

Integer overflow occurs if the input operands to the add have the same
sign and the result has the opposite sign. On overflow, the sum operand
is replaced by the low-order bits of the true result.

If the addend and the sum operands overlap, the result and the condition
codes are UNPREDICTABLE.

9-8

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—ADD

ADD
Add

FORMATS

2 operand:
3 operand:

opcode
opcode

add.rx, sum.mx
addl .rx, add2.rx, sum.wx

condition codes

N
Z
V
C

exception

integer overflow

opcodes

ADDB2

Add Byte 2 Operand

ADDB3

Add Byte 3 Operand

ADDW2

Add Word 2 Operand

ADDW3

Add Word 3 Operand

ADDL2

Add Long 2 Operand

ADDL3

Add Long 3 Operand

<- sum LSS 0;
<- sum EQL 0;
<_ {integer overflow};
<- (carry from most-significant bit};

DESCRIPTION

In 2 operand format, the addend operand is added to the sum operand and
the sum operand is replaced by the result. In 3 operand format, the addend 1
operand is added to the addend 2 operand and the sum operand is replaced
by the result.

NOTE

Integer overflow occurs if the input operands to the add have the same
sign and the result has the opposite sign. On overflow, the sum operand is
replaced by the low-order bits of the true result.

9-9

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—ADWC

ADWC

Add with Carry

FORMAT

opcode

add.rl, sum.ml

condition codes

N <— sum LSS 0;
Z 4— sum EQL 0;
V 4— (integer overflow};
C 4— (carry from most-significant bit};

exception

integer overflow

opcodes

ADWC

Add with Carry

DESCRIPTION The contents of the condition code C-bit and the addend operand are added
to the sum operand and the sum operand is replaced by the result.

NOTES

9-10

On overflow, the sum operand is replaced by the low-order bits of the
true result.

The two additions in the operation are performed simultaneously.

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—ASH

ASH
Arithmetic Shift

FORMAT

opcode

condition codes

N
Z
V
C

exception

integer overflow

opcodes

ASHL

Arithmetic Shift Long

ASHQ

Arithmetic Shift Quad

DESCRIPTION

NOTES

cnt.rb, src.rx, dst.wx

— dst LSS 0;
— dst EQL 0;
«— {integer overflow};
^ 0;

The source operand is arithmetically shifted by the number of bits specified
by the count operand and the destination operand is replaced by the result.
The source operand is unaffected. A positive count operand shifts to the left,
bringing Os into the least-significant bit. A negative count operand shifts to
the right, bringing in copies of the most-significant (sign) bit into the mostsignificant bit. A 0 count operand replaces the destination operand with the
unshifted source operand.

1 Integer overflow occurs on a left shift if any bit shifted into the sign bit
position differs from the sign bit of the source operand.
2

If cnt GTR 32 (ASHL) or cnt GTR 64 (ASHQ), the destination operand is
replaced by 0.

If cnt LEQ -31 (ASHL) or cnt LEQ -63 (ASHQ), all the bits of the desti¬
nation operand are copies of the sign bit of the source operand.

9-11

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—BIC

BIC
FORMATS

Bit Clear

2 operand:
3 operand:

condition codes n
z
V

opcode
opcode

mask.rx, dst.mx
mask.rx, src.rx, dst.wx

dst LSS 0;
dst EQL 0;
0;
C;

exceptions

None.

opcodes

BICB2

Bit Clear Byte

BICB3

Bit Clear Byte

BICW2

Bit Clear Word

BICW3

Bit Clear Word

BICL2

Bit Clear Long

BICL3

Bit Clear Long

DESCRIPTION In 2 operand format, the result of the logical AND on the destination operand
and the one's complement of the mask operand replaces the destination
operand. In 3 operand format, the result of the logical AND on the source
operand and the one's complement of the mask operand replaces the destina¬
tion operand.

9-12

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—BIS

BIS
Bit Set

opcode
opcode

mask.rx, dst.mx
mask.rx, src.rx, dst. wx

FORMATS

2 operand:
3 operand:

condition codes

N
Z
V
C

exceptions

None.

opcodes

BISB2

Bit Set Byte 2 Operand

BISB3

Bit Set Byte 3 Operand

BISW2

Bit Set Word 2 Operand

BISW3

Bit Set Word 3 Operand

BISL2

Bit Set Long 2 Operand

BISL3

Bit Set Long 3 Operand

DESCRIPTION

<- dst LSS 0;
<— dst EQL 0;
— 0;
<- C;

In 2 operand format, the result of the logical OR on the mask operand and the
destination operand replaces the destination operand. In 3 operand format,
the result of the logical OR on the mask operand and the source operand
replaces the destination operand.

9-13

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—BIT

BIT

Bit Test

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

BITB

Bit Test Byte

BITW

Bit Test Word

BITL

Bit Test Long

DESCRIPTION

9-14

mask.rx, src.rx

<— tmp LSS 0;
*— tmp EQL 0;
«_ 0;
<- C;

The logical AND is performed on the mask operand and the source operand.
Both operands are unaffected. The only action is to modify condition codes.

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—CLR

CLR
Clear

FORMAT

opcode dst. wx

condition codes

N
Z
V
C

exceptions

None.

opcodes

CLRB

Clear Byte

CLRW

Clear Word

CLRL

Clear Long

CLRQ

Clear Quad

7CFD

CLRO

Clear Octa1

«- 0;
— 1;
- 0;
— C;

1 This instruction is considered to be in the H_floating instruction class, and may,
therefore, be emulated on the MicroVAX.

DESCRIPTION

The destination operand is replaced by 0.

NOTE

CLRx dst is equivalent to MOVx SA#0, dst, but is one byte shorter.

9-15

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—CMP

CMP
Compare

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

CMPB

Compare Byte

CMPW

Compare Word

CMPL

Compare Long

DESCRIPTION

9-16

src 1. rx, src2. rx

<— srcl LSS src2;
<— srcl EQL src2;
«_ 0;
<- srcl LSSU src2;

The source 1 operand is compared with the source 2 operand. The only
action is to modify the condition codes.

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—CVT

CVT

Convert

FORMAT

opcode

src.rx, dst.wy

condition codes

N
Z
V
C

exception

integer overflow

opcodes

CVTBW

Convert Byte to Word

CVTBL

Convert Byte to Long

CVTWB

Convert Word to Byte

CVTWL

Convert Word to Long

CVTLB

Convert Long to Byte

CVTLW

Convert Long to Word

<_ dst LSS 0;
«- dst EQL 0;
— {integer overflow};
«- 0;

DESCRIPTION

The source operand is converted to the data type of the destination operand
and the destination operand is replaced by the result. Conversion of a shorter
data type to a longer one is done by sign extension; conversion of longer
data type to a shorter one is done by truncation of the higher-numbered
(most-significant) bits.

NOTE

Integer overflow occurs if any truncated bits of the source operand are not
equal to the sign bit of the destination operand.

9-17

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—DEC

DEC
Decrement

FORMAT

opcode

dif.mx

condition codes

N «- dif LSS 0;
Z «- dif EQL 0;
V <— (integer overflow);
C <— {borrow into most-significant bit);

exception

integer overflow

opcodes

DECB

Decrement Byte

DECW

Decrement Word

DECL

Decrement Long

DESCRIPTION

One is subtracted from the difference operand and the difference operand is
replaced by the result.

NOTES

Integer overflow occurs if the largest negative integer is decremented. On
overflow, the difference operand is replaced by the largest positive integer.

DECx dif is equivalent to SUBx S"#!, dif, but is one byte shorter.

9-18

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—DIV

DIV
Divide

FORMATS

2 operand:
3 operand:

condition codes

N
Z
V
C

exceptions

integer overflow
divide by 0

opcodes

DESCRIPTION

NOTES

opcode
opcode

divr.rx, quo.mx
divr.rx, divd.rx, quo. wx

<— quo LSS 0;
*— quo EQL 0;
<— {integer overflow} OR {divr EQL 0};
— 0;

DIVB2

Divide Byte 2 Operand

DIVB3

Divide Byte 3 Operand

DIVW2

Divide Word 2 Operand

DIVW3

Divide Word 3 Operand

DIVL2

Divide Long 2 Operand

DIVL3

Divide Long 3 Operand

In 2 operand format, the quotient operand is divided by the divisor operand
and the quotient operand is replaced by the result. In 3 operand format, the
dividend operand is divided by the divisor operand and the quotient operand
is replaced by the result.

1 Division is performed such that the remainder has the same sign as the
dividend; that is, the result is truncated toward 0. (Note that a remainder
of 0 is not saved.)

Integer overflow occurs if, and only if, the largest negative integer is
divided by -1. On overflow, operands are affected as in note 3, following.

If the divisor operand is 0, then in 2 operand format the quotient operand
is not affected; in 3 operand format the quotient operand is replaced by
the dividend operand.

9-19

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—EDIV

EDIV
Extended Divide

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

integer overflow
divide by 0

opcodes

divr.rl, divd.rq, quo.wl, rem.wl

<— quo LSS 0;
<— quo EQL 0;
<— {integer overflow) OR {divr EQL 0);
<- 0;

EDIV

Extended Divide

DESCRIPTION The dividend operand is divided by the divisor operand; the quotient operand
is replaced by the quotient and the remainder operand is replaced by the
remainder.

NOTES

The division is performed such that the remainder operand (unless it is 0)
has the same sign as the dividend operand.

2 On overflow, the operands are affected as in note 3, following.
3 If the divisor operand is 0, then the quotient operand is replaced by bits
31:0 of the dividend operand, and the remainder operand is replaced by 0.

9-20

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—EMUL

EMUL
Extended Multiply

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

mulr. rl, muld. rl, add. rl, prod, wq

«- prod LSS 0;
<— prod EQL 0;
_ 0;
«- 0;

EMUL

Extended Multiply

The multiplicand operand is multiplied by the multiplier operand, giving a
double-length result. The addend operand is sign extended to double length
and added to the result. The product operand is replaced by the final result.

9—21

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—INC

INC
Increment

FORMAT

opcode

sum.mx

condition codes

N <— sum LSS 0;
Z
sum EQL 0;
V ♦— (integer overflow};
C
(carry from most-significant bit};

exception

integer overflow

opcodes

INCB

Increment Byte

INCW

Increment Word

INCL

Increment Long

DESCRIPTION

One is added to the sum operand and the sum operand is replaced by the
result.

NOTES

Arithmetic overflow occurs if the largest positive integer is incremented.
On overflow, the sum operand is replaced by the largest negative integer.

2 INCx sum is equivalent to ADDx S"#!, sum, but is one byte shorter.

9-22

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—MCOM

MCOM
Move Complemented

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

MCOMB

Move Complemented Byte

MCOMW

Move Complemented Word

MCOML

Move Complemented Long

DESCRIPTION

src.rx, dst.wx

— dst LSS 0;
<— dst EQL 0;
«_ 0;
— C;

The destination operand is replaced by the one's complement of the source
operand.

9—23

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—MNEG

MNEG
Move Negated

FORMAT

opcode

src.rx, dst.wx

condition codes

N «- dst LSS 0;
Z
dst EQL 0;
V
{integer overflow};
C «- dst NEQ 0;

exception

integer overflow

opcodes

MNEGB

Move Negated Byte

MNEGW

Move Negated Word

MNEGL

Move Negated Long

DESCRIPTION

The destination operand is replaced by the negative of the source operand.

NOTE

Integer overflow occurs if the source operand is the largest negative integer
(which has no positive counterpart). On overflow, the destination operand is
replaced by the source operand.

9-24

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—MOV

MOV
Move

FORMAT

opcode

src.rx, dst.wx

condition codes

N — dst LSS 0;
Z <— dst EQL 0;
V
0;
C — C;

exceptions

None.

opcodes

MOVB

Move Byte

MOVW

Move Word

MOVL

Move Long

MOVQ

Move Quad

7DFD

MOVO

Move Octa1

1 This instruction is considered to be in the H_floating instruction class, and may,
therefore, be emulated on the MicroVAX.

DESCRIPTION The destination operand is replaced by the source operand.

9-25

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—MOVZ

MOVZ
Move Zero-Extended

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

MOVZBW

Move Zero-Extended Byte to Word

MOVZBL

Move Zero-Extended Byte to Long

MOVZWL

Move Zero-Extended Word to Long

DESCRIPTION

src.rx, dst.wy

<— 0;
<— dst EQL 0;
«_ 0;
«- C;

For MOVZBW, bits 7:0 of the destination operand are replaced by the source
operand; bits 15:8 are replaced by 0. For MOVZBL, bits 7:0 of the destination
operand are replaced by the source operand; bits 31:8 are replaced by 0. For
MOVZWL, bits 15:0 of the destination operand are replaced by the source
operand; bits 31:16 are replaced by 0.

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—MUL

MUL
Multiply

FORMATS

2 operand:
3 operand:

condition codes

opcode
opcode

prod LSS 0;
prod EQL 0;
(integer overflow};

mulr.rx, prod.mx
mulr.rx, muld.rx, prod, wx

exception

integer overflow

opcodes

MULB2

Multiply Byte 2 Operand

MULB3

Multiply Byte 3 Operand

MULW2

Mulitply Byte 2 Operand

MULW3

Multiply Word 3 Operand

MULL2

Multiply Long 2 Operand

MULL3

Multiply Long 3 Operand

DESCRIPTION

In 2 operand format, the product operand is multiplied by the multiplier
operand and the product operand is replaced by the low half of the double¬
length result. In 3 operand format, the multiplicand operand is multiplied by
the multiplier operand and the product operand is replaced by the low half of
the double-length result.

NOTE

Integer overflow occurs if the high half of the double-length result is not
equal to the sign extension of the low half of the double-length result.

9-27

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—PUSHL

PUSHL

Push Long

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

The longword source operand is pushed on the stack.

NOTE

PUSHL is equivalent to MOVL src, -(SP), but is one byte shorter.

9-28

src.rl

«_ src LSS 0;
<— src EQL 0;
— 0;
_ C;

PUSHL

Push Long

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—ROTL

ROTL
Rotate Long

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

cnt.rb, src.rl, dst.wl

«- dst LSS 0;
«- dst EQL 0;
<- 0;
— C;

ROTL

Rotate Long

The source operand is rotated logically by the number of bits specified by the
count operand, and the destination operand is replaced by the result. The
source operand is unaffected. A positive count operand rotates to the left. A
negative count operand rotates to the right. A 0 count operand replaces the
destination operand with the source operand.

9-29

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—SBWC

SBWC
Subtract with Carry

FORMAT

opcode

sub.rl, dif.ml

condition codes

N
Z
V
C

exception

integer overflow

opcodes

<— dif LSS 0;
_ dif EQL 0;
<— {integer overflow};
<— {borrow into most-significant bit);

SBWC

Subtract With Carry

DESCRIPTION

The subtrahend operand and the contents of the condition code C-bit are
subtracted from the difference operand, and the difference operand is replaced
by the result.

NOTES

On overflow, the difference operand is replaced by the low-order bits of
the true result.

The two subtractions in the operation are performed simultaneously.

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—SUB

SUB
Subtract

FORMATS

2 operand:
3 operand:

condition codes

N 4- (iif LSS 0;
Z 4- (dif EQL 0;
V <— integer overflow};
C 4- borrow into most-significant bit};

exception

integer overflow

opcodes

SUBB2

Subtract Byte 2 Operand

SUBB3

Subtract Byte 3 Operand

SUBW2

Subtract Word 2 Operand

SUBW3

Subtract Word 3 Operand

SUBL2

Subtract Long 2 Operand

SUBL3

Subtract Long 3 Operand

opcode
opcode

sub.rx, dif.mx
sub.rx, min.rx, dif.wx

DESCRIPTION In 2 operand format, the subtrahend operand is subtracted from the difference
operand, and the difference operand is replaced by the result. In 3 operand
format, the subtrahend operand is subtracted from the minuend operand, and
the difference operand is replaced by the result.

NOTE

Integer overflow occurs if the input operands to the subtract are of different
signs and the sign of the result is the sign of the subtrahend. On overflow,
the difference operand is replaced by the low-order bits of the true result.

9-31

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—TST

TST
Test

FORMAT

opcode

src.rx

condition codes

N
Z
V
C

exceptions

None.

opcodes

TSTB

Test Byte

TSTW

Test Word

TSTL

Test Long

— src LSS 0;
<— src EQL 0;
— 0;
«- 0;

DESCRIPTION

The condition codes are modified according to the value of the source
operand.

NOTE

src is equivalent to CMPx src, S"#0, but is one byte shorter.

9-32

VAX MACRO and Instruction Set
Integer Arithmetic and Logical Instructions—XOR

XOR
Exclusive OR

FORMATS

2 operand:
3 operand:

condition codes

opcode
opcode

mask.rx, dst.mx
mask.rx, src.rx, dst.wx

dst LSS 0;
dst EQL 0;
0;
C;

exceptions

None.

opcodes

XORB2

Exclusive OR Byte 2 Operand

XORB3

Exclusive OR Byte 3 Operand

XORW2

Exclusive OR Word 2 Operand

XORW3

Exclusive OR Word 3 Operand

XORL2

Exclusive OR Long 2 Operand

XORL3

Exclusive OR Long 3 Operand

DESCRIPTION

In 2 operand format, the result of the logical XOR on the mask operand
and the destination operand replaces the destination operand. In 3 operand
format, the result of the logical XOR on the mask operand and the source
operand replaces the destination operand.

9-33

VAX MACRO and Instruction Set
Address Instructions

9.4

Address Instructions
The following instructions are described in this section.

9-34

Description
and Opcode

Number of
Instructions

Move Address
MOVA{B,W,L=F,Q=D=G,0=H} src.ax, dst.wl

Push Address
PUSHA{B,W,L=F,Q=D=G,0=Hj src.ax, j-(SP).wl)

VAX MACRO and Instruction Set
Address Instructions—MOVA

MOVA
Move Address1

FORMAT

opcode

src.ax, dst.wl

condition codes

N
Z
V
C

exceptions

None.

opcodes

MOVAB

Move Address Byte

MOVAW

Move Address Word

MOVAL,

Move Address Long

MOVAF

Move Address F_floating

MOVAQ,

Move Address Quad

MOVAD,

Move Address D_floating

MOV AG

Move Address G_floating

«- dst LSS 0;
<— dst EQL 0;
«_ 0;
_ C;

7EFD

MOVAH

Move Address H_floating,

MOVAO

Move Address Octa1

1 This instruction is considered to be in the H_floating instruction class, and may,
therefore, be emulated on the MicroVAX.

DESCRIPTION

The destination operand is replaced by the source operand. The context
in which the source operand is evaluated is given by the data type of the
instruction. The operand whose address replaces the destination operand is
not referenced.

NOTE

The access type of the source operand is address, which causes the address of
the specified operand to be moved.

1 Except for CLRD, MOV AD, and PUSHAD (which have the same opcodes as CLRQ, MOVAQ, and PUSHAQ, respectively), D_floating and
H floating instructions are not part of the MicroVAX architecture definition.

9-35

VAX MACRO and Instruction Set
Address Instructions—PUSHA

PUSHA
Push Address1

FORMAT

opcode

src. ax

condition codes

N
Z
V
C

exceptions

None.

opcodes

PUSHAB

Push Address Byte

PUSHAW

Push Address Word

PUSHAL

Push Address Long,

PUSHAF

Push Address F_floating

PUSHAQ

Push Address Quad,

PUSHAD

Push Address D_floating,

PUSHAG

Push Address G_floating

PUSHAH

Push Address H_floating,

PUSHAQ

Push Address Octa1

<— src LSS 0;
<— src EQL 0;
<- 0;
— C;

7FFD

1 This instruction is considered to be in the H_floating instruction class, and may,
therefore, be emulated on the MicroVAX.

DESCRIPTION

The source operand is pushed on the stack. The context in which the source
operand is evaluated is given by the data type of the instruction. The operand
whose address is pushed is not referenced.

NOTES

PUSHAx src is equivalent to MOV Ax src, -(SP), but is one byte shorter.

2 The source operand is of address access type, which causes the address of
the specified operand to be pushed.

1 Except for CLRD, MOV AD, and PUSHAD (which have the same opcodes as CLRQ, MOVAQ, and PUSHAQ, respectively), D_floating and
H_floating instructions are not part of the MicroVAX architecture definition.

9-36

VAX MACRO and Instruction Set
Variable-Length Bit Field Instructions

9.5

Variable-Length Bit Field Instructions
A variable-length bit field is specified by three operands:
1

A longword position operand.

2 A byte field size operand in the range 0 through 32; if not, a reserved
operand fault occurs.

3 A base address. The position operand is used to locate the bit field relative
to this base address. The address is obtained from an operand of address
access type. However, unlike other instances of operand specifiers of
address access type, register mode may be designated in the operand
specifier. In this case, the field is contained in the register n designated by
the operand specifier (or register n+1 concatenated with register n). (See
Section 8.) If the field is contained in a register and the size operand is
not 0, the position operand must have a value in the range 0 through 31,
or a reserved operand fault occurs.
Zero bytes are referenced if the field size is 0.
The following instructions are described in this section.

Description
and Opcode

Number of
Instructions

Compare Field
CMPV pos.rl, size.rb, base.vb, {field.rv},
src.rl

Compare Zero-Extended Field
CMPZV pos.rl, size.rb, base.vb, {field.rv},
src.rl

Extract Field
EXTV pos.rl, size.rb, base.vb, {field.rv},
dst.wl

Extract Zero-Extended Field
EXTZV pos.rl, size.rb, base.vb, {field.rv},
dst.wl

Find First
FF{S,C} startpos.rl, size.rb, base.vb,
field.rv], findpos.wl

Insert Field
INSV src.rl, pos.rl, size.rb, base.vb,
{field.wv}

9-37

VAX MACRO and Instruction Set
Variable-Length Bit Field Instructions

The following variable-length bit field instructions are described in the section
on Control Instructions.

9-38

Branch on Bit
BB{S,C} pos.rlf base.vb, displ.bb,
{field.rv}

Branch on Bit (and modify without interlock)
BB{S,C}{S,C} pos.rl, base.vb, displ.bb,
{field.mv}

Branch on Bit (and modify) Interlocked
BB{SS,CC}l pos.rl, base.vb, displ.bb,
{field.mv}

VAX MACRO and Instruction Set
Variable-Length Bit Field Instructions—CMP

CMP
Compare Field

FORMAT

opcode

pos.rt, size.rb, base.vb, src.rl

condition codes

N <— tmp LSS src;
Z 4— tmp EQL src;
V — 0;
C 4— tmp LSSU src;

exception

reserved operand

opcodes

CMPV

Compare Field

CMPZV

Compare Zero-Extended Field

DESCRIPTION

The field specified by the position, size, and base operands is compared with
the source operand. For CMPV, the source operand is compared with the
sign-extended field. For CMPZV, the source operand is compared with the
zero-extended field. The only action is to affect the condition codes.

NOTES

A reserved operand fault occurs if:

•

size GTRU 32

•

pos GTRU 31, size NEQ 0, and the field is contained in the registers

On a reserved operand fault, the condition codes are UNPREDICTABLE.

9-39

VAX MACRO and Instruction Set
Variable-Length Bit Field Instructions—EXT

EXT
Extract Field

FORMAT

opcode

pos.rl, size.rb, base.vb, dst.wl

condition codes

N 4- dst LSS 0;
Z <— dst EQL 0;
V
0;
C
C;

exception

reserved operand

opcodes

EXTV

Extract Field

EXTZV

Extract Zero-Extended Field

DESCRIPTION

For EXTV, the destination operand is replaced by the sign-extended field
specified by the position, size, and base operands. For EXTZV, the destination
operand is replaced by the zero-extended field specified by the position, size,
and base operands. If the size operand is 0, the only action is to replace the
destination operand with 0, and to modify the condition codes.

NOTES

9—40

A reserved operand fault occurs if:

•

size GTRU 32

•

pos GTRU 31, size NEQ 0, and the field is contained in the registers

On a reserved operand fault, the destination operand is unaffected, and
the condition codes are UNPREDICTABLE.

VAX MACRO and Instruction Set
Variable-Length Bit Field Instructions—FF

FF
Find First

FORMAT

opcode

condition codes

N
Z
V
C

exception

reserved operand

opcodes

FFC

Find First Clear

FFS

Find First Set

startpos.rl, size.rb, base.vb, findpos.wl

4- 0;
<— {bit not found};
4- 0;
4- 0;

DESCRIPTION

A field specified by the start position, size, and base operands is extracted.
Starting at bit 0 and extending to the highest bit in the field, the field is tested
for a bit in the state indicated by the instruction. If a bit in the indicated state
is found, the find position operand is replaced by the position of the bit, and
the Z condition code bit is cleared. If no bit in the indicated state is found,
the find position operand is replaced by the position (relative to the base) of
a bit one position to the left of the specified field, and the Z condition code
bit is set. If the size operand is 0, the find position operand is replaced by the
start position operand, and the Z condition code bit is set.

NOTES

A reserved operand fault occurs if:

•

size GTRU 32

•

startpos GTRU 31, size NEQ 0, and the field is contained in the
registers

2 On a reserved operand fault, the find position operand is unaffected, and
the condition codes are UNPREDICTABLE.

9-41

VAX MACRO and Instruction Set
Variable-Length Bit Field Instructions—INSV

INSV
Insert Field

FORMAT

opcode

condition codes

N «- N;
Z
Z;
V
V;
C — C;

exception

reserved operand

opcodes

DESCRIPTION

NOTES

Insert Field

The field specified by the position, size, and base operands is replaced by bits
size-1:0 of the source operand. If the size operand is 0, the instruction has no
effect.

1 A reserved operand fault occurs if:
2

9-42

INSV

src.rl, pos.rl, size.rb, base.vb

•

size GTRU 32

•

pos GTRU 31, size NEQ 0, and the field is contained in the registers

On a reserved operand fault, the field is unaffected, and the condition
codes are UNPREDICTABLE.

VAX MACRO and Instruction Set
Control Instructions

9.6

Control Instructions
In most implementations of the VAX architecture, improved execution speed
will result if the target of a control instruction is on an aligned longword
boundary.
The following instructions are described in this section.
Description
and Opcode

Number of
Instructions

Add Compare and Branch
ACB{B,W,L.F,D,G,H) limit.rx, add.rx,
index.mx, displ.bw
Compare is LE on positive add, GE on
negative add.

Add One and Branch Less Than or Equal
AOBLEQ limit.rl, index.ml, displ.bb

Add One and Branch Less Than
AOBLSS limit.rl, index.ml, displ.bb

Conditional Branch
B{condition} displ.bb

Condition

Name

LSS

Less Than

LEO

Less Than or Equal

EQL, EQLU

Equal, Equal Unsigned

NEQ, NEQU

Not Equal, Not Equal Unsigned

GEQ

Greater Than or Equal

GTR

Greater Than

LSSU, CS

Less Than Unsigned, Carry Set

LEQU

Less Than or Equal Unsigned

GEQU, CC

Greater Than or Equal Unsigned,
Carry Clear

GTRU

Greater Than Unsigned

Overflow Set

Overflow Clear

Branch on Bit
BB{S,C} pos.rl, base.vb, displ.bb,
{field.rv}

Branch on Bit

BB{S,C}{S,C} pos.rl, base.vb, displ.bb,
{field.mv}
7.

Branch on Bit (and modify) Interlocked
BB{SS,CC}l pos.rl, base.vb, displ.bb,
{field.mv)

9-43

VAX MACRO and Instruction Set
Control Instructions

Description
and Opcode

9-44

Number of
Instructions

Branch on Low Bit
BLB{S,C} src.rl, displ.bb

Branch with {Byte, Word} Displacement
BR{B,W} displ.bx

10.

Branch to Subroutine with {Byte, Word}
Displacement BSB{B,W} displ.bx, {-(SP).wl}

11.

Case
CASE{B,W,L} selector.rx, base.rx,
limit.rx, displ.bw-list

12.

Jump
JMP dst.ab

13.

Jump to Subroutine
JSB dst.ab, {-(SP).wl}

14.

Return from Subroutine
RSB {(SP)+.rl}

15.

Subtract One and Branch Greater Than
or Equal SOBGEQ index.ml, displ.bb

16.

Subtract One and Branch Greater Than
SOBGTR index.ml, displ.bb

VAX MACRO and Instruction Set
Control Instructions—ACB

ACB
Add Compare and Branch1

FORMAT

opcode

condition codes

N <— index LSS 0;
Z
index EQL 0;
V <— {integer overflow};
C «- C;

exceptions

integer overflow
floating overflow
floating underflow
reserved operand

opcodes

limit, rx, add.rx, index, mx, displ.bw

ACBB

Add Compare and Branch Byte

ACBW

Add Compare and Branch Word

ACBL

Add Compare and Branch Long

ACBF

Add Compare and Branch F_floating

4FFD

ACBG

Add Compare and Branch G_floating

ACBD

Add Compare and Branch D_floating

6FFD

ACBH

Add Compare and Branch H_floating

DESCRIPTION

The addend operand is added to the index operand and the index operand
is replaced by the result. The index operand is compared with the limit
operand. If the addend operand is positive (or 0) and the comparison is less
than or equal to 0, or if the addend is negative and the comparison is greater
than or equal to 0, the sign-extended branch displacement is added to PC,
and PC is replaced by the result.

NOTES

ACB efficiently implements the general FOR or DO loops in high-level
languages, since the sense of the comparison between index and limit is
dependent on the sign of the addend.

2 On integer overflow, the index operand is replaced by the low-order
bits of the true result. Comparison and branch determination proceed
normally on the updated index operand.

3 On floating underflow, if FU is clear, the index operand is replaced by
0, and comparison and branch determination proceed normally. A fault
occurs if FU is set, and the index operand is unaffected.
Except for CLRD, MOV AD, and PUSH AD (which have the same opcodes as CLRQ, MOVAQ, and PUSHAQ, respectively), D_floating and
H_floating instructions are not part of the Micro VAX architecture definition.

9-45

VAX MACRO and Instruction Set
Control Instructions—ACB

4 On floating overflow, the instruction takes a floating overflow fault and
the index operand is unaffected.

5 On a reserved operand fault, the index operand is unaffected and condi¬
tion codes are UNPREDICTABLE.

6 Except for the circumstance described in note 5, the C-bit is unaffected.

9—46

VAX MACRO and Instruction Set
Control Instructions—AOBLEQ

AOBLEQ
Add One and Branch Less Than or Equal

FORMAT

opcode

limit.rl, index, ml, displ.bb

condition codes

N
Z
V
C

exception

integer overflow

opcodes

<— index LSS 0;
<— index EQL 0;
*— {integer overflow};
<- C;

AOBLEQ

Add One and Branch Less Than or Equal

DESCRIPTION

One is added to the index operand, and the index operand is replaced by
the result. The index operand is compared with the limit operand. If the
comparison is less than or equal to 0, the sign-extended branch displacement
is added to PC, and PC is replaced by the result.

NOTES

Integer overflow occurs if the index operand before addition is the largest
positive integer. On overflow, the index operand is replaced by the largest
negative integer, and the branch is taken.

2 The C-bit is unaffected.

9-47

VAX MACRO and Instruction Set
Control Instructions—AOBLSS

AOBLSS
Add One and Branch Less Than

FORMAT

opcode

limit.rl, index, ml, displ.bb

condition codes

N
index LSS 0;
Z
index EQL 0;
V <— {integer overflow};
C
C;

exception

integer overflow

opcodes

AOBLSS

Add One and Branch Less Than

DESCRIPTION

One is added to the index operand and the index operand is replaced by
the result. The index operand is compared with the limit operand. If the
comparison result is less than 0, the sign-extended branch displacement is
added to PC, and PC is replaced by the result.

NOTES

Integer overflow occurs if the index operand before addition is the largest
positive integer. On overflow, the index operand is replaced by the largest
negative integer, and thus (unless the limit operand is the largest negative
integer), the branch is taken.

2 The C-bit is unaffected.

9—48

VAX MACRO and Instruction Set
Control Instructions—B

B
Branch on (condition)

FORMAT

opcode

condition codes

N «- N;
Z <- Z;

displ.bb

v <— V;
C

— C;

exceptions

None.

opcodes

<|4

{N or z} EQL 0

BGTR

Branch on Greater Than (signed)

{n or z) EQL 1

BLEQ

Branch on Less Than or Equal
(signed)

Z EQL 0

BNEQ,

Branch on Not Equal (signed)

BNEQU

Branch on Not Equal Unsigned

Z EQL 1

BEQL,

Branch on Equal (signed)

BEQLU

Branch on Equal Unsigned

N EQL 0

BGEQ

Branch on Greater Than or Equal
(signed)

N EQL 1

BLSS

Branch on Less Than (signed)

{C OR Z} EQL 0

BGTRU

Branch on Greater Than Unsigned

{C OR Z\ EQL 1

BLEQU

Branch Less Than or Equal Un¬
signed

V EQL 0

BVC

Branch on Overflow Clear

V EQL 1

BVS

Branch on Overflow Set

C EQL 0

BGEQU,

Branch on Greater Than or Equal
Unsigned

BCC

Branch on Carry Clear

BLSSU,

Branch on Less Than Unsigned

BCS

Branch on Carry Set

C EQL 1

DESCRIPTION The condition codes are tested. If the condition indicated by the instruction
is met, the sign-extended branch displacement is added to the PC, and PC is
replaced by the result.

9—49

VAX MACRO and Instruction Set
Control Instructions—B

NOTES

The VAX conditional branch instructions permit considerable flexibility in
branching, but require care in choosing the correct branch instruction. The
conditional branch instructions are best seen as three overlapping groups:
1

Overflow and Carry Group
BVS

V EQL 1

BVC

V EQL 0

BCS

C EQL 1

BCC

C EQL 0

These instructions are typically used to check for overflow (when overflow
traps are not enabled), for multiprecision arithmetic, and for other special
purposes.

2 Unsigned Group
BLSSU

C EQL 1

BLEQU

{C OR Z} EQL 1

BEQLU

Z EQL 1

BNEQU

Z EQL 0

BGEQU

C EQL 0

BGTRU

{C OR Z} EQL 0

These instructions typically follow integer and field instructions where
the operands are treated as unsigned integers, address instructions, and
character string instructions.

3 Signed Group
BLSS

N EQL 1

BLEQ

{N or z} EQL 1

BEQL

Z EQL 1

BNEQ

Z EQL 0

BGEQ

N EQL 0

BGTR

{N or z} EQL 0

These instructions typically follow floating-point instructions, decimal
string instructions, and integer and field instructions where the operands
are being treated as signed integers.

9-50

VAX MACRO and Instruction Set
Control Instructions—BB

BB
Branch on Bit

FORMAT

opcode

pos.rl, base.vb, displ.bb

condition codes

N
Z
V
C

exception

reserved operand

opcodes

BBS

Branch on Bit Set

BBC

Branch on Bit Clear

<— N;
«_ Z;
— V;
<- C;

DESCRIPTION The single bit field specified by the position and base operands is tested. If
it is in the test state indicated by the instruction, the sign-extended branch
displacement is added to PC, and PC is replaced by the result.

NOTES

A reserved operand fault occurs if pos GTRU 31 and the bit specified is
contained in a register.

2 On a reserved operand fault, the condition codes are UNPREDICTABLE.

9-51

VAX MACRO and Instruction Set
Control Instructions—BB

BB
Branch on Bit (and modify without interlock)

FORMAT

opcode

pos.rl, base.vb, displ.bb

condition codes

N
Z
V
C

exception

reserved operand

opcodes

BBSS

Branch on Bit Set and Set

BBCS

Branch on Bit Clear and Set

BBSC

Branch on Bit Set and Clear

BBCC

Branch on Bit Clear and Clear

<- N;
«- Z;
«- V;
— C;

DESCRIPTION

NOTES

A reserved operand fault occurs if pos GTRU 31 and the bit is contained
in a register.

2 On a reserved operand fault, the field is unaffected and the condition
codes are UNPREDICTABLE.

3 The modification of the bit is not an interlocked operation. See BBSSI and
BBCCI for interlocking instructions.

9-52

VAX MACRO and Instruction Set
Control Instructions—BB

BB
Branch on Bit Interlocked

FORMAT

opcode

condition codes

N «- N;
Z <- Z;

pos.rl, base.vb, displ.bb

v «— V;
C

«- C;

exception

reserved operand

opcodes

BBSSI

Branch on Bit Set and Set Interlocked

BBCCI

Branch on Bit Clear and Clear Interlocked

DESCRIPTION

NOTES

The single bit field specified by the position and base operands is tested. If
it is in the test state indicated by the instruction, the sign-extended branch
displacement is added to PC, and PC is replaced by the result. Regardless of
whether the branch is taken or not, the tested bit is put in the new state as
indicated by the instruction. If the bit is contained in memory, the reading of
the state of the bit and the setting of the bit to the new state is an interlocked
operation. No other processor or I/O device can do an interlocked access on
this bit during the interlocked operation.

1 A reserved operand fault occurs if pos GTRU 31 and the specified bit is
contained in a register.

2 On a reserved operand fault, the field is unaffected, and the condition
codes are UNPREDICTABLE.

3 Except for memory interlocking, BBSSI is equivalent to BBSS, and BBCCI
is equivalent to BBCC.

This instruction is designed to modify interlocks with other processors or
devices. For example, to implement "busy waiting" :
1$:

BBSSI

bit.base,1$

9-53

VAX MACRO and Instruction Set
Control Instructions—BLB

BLB
Branch on Low Bit

src.rl, displ.bb

FORMAT

opcode

condition codes

N — N;
Z — Z;
V
V;
C
C;

exceptions

None.

opcodes

BLBS

Branch on Low Bit Set

BLBC

Branch on Low Bit Clear

DESCRIPTION

9-54

The low bit (bit 0) of the source operand is tested. If it is equal to the test
state indicated by the instruction, the sign-extended branch displacement is
added to PC, and PC is replaced by the result.

VAX MACRO and Instruction Set
Control Instructions—BR

BR
Branch

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

displ.bx

<— N;
«_ Z;
«- V;
<- C;

BRB

Branch with Byte Displacement

BRW

Branch with Word Displacement

The sign-extended branch displacement is added to PC, and PC is replaced
by the result.

9—55

VAX MACRO and Instruction Set
Control Instructions—BSB

BSB
Branch to Subroutine

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

9-56

displ.bx

4- N;
— Z;
«- V;
<- C;

BSBB

Branch to Subroutine with Byte Displacement

BSBW

Branch to Subroutine with Word Displacement

PC is pushed on the stack as a longword. The sign-extended branch displace¬
ment is added to PC, and PC is replaced by the result.

VAX MACRO and Instruction Set
Control Instructions—CASE

CASE
Case

FORMAT

opcode

selector.rx, base.rx, limit.rx, displ[OJ.bw,...,
displ[limit].bw

condition codes

N
Z
V
C

exceptions

None.

opcodes

CASEB

CASEW

Case Word

CASEL

Case Long

<— tmp LSS limit;
<— tmp EQL limit;
«_ 0;
<— tmp LSSU limit;

Case Byte

DESCRIPTION

The base operand is subtracted from the selector operand, and the result
replaces a temporary operand. The temporary operand is compared with
the limit operand; if it is less than or equal unsigned, a branch displacement
selected by the temporary value is added to PC, and PC is replaced by the
result. Otherwise, twice the sum of the limit operand and 1 is added to PC,
and PC is replaced by the result. This operation causes PC to be moved
past the array of branch displacements. Regardless of the branch taken, the
condition codes are modified as a result of the comparison of the temporary
operand with the limit operand.

NOTES

After operand evaluation, PC points at displ[0], not to the next instruction.
The branch displacements are relative to the address of displ[0].

The selector and base operands can both be considered as either signed or
unsigned integers.

9-57

VAX MACRO and Instruction Set
Control Instructions—JMP

JMP
Jump

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

dst.ab

«— N;
— Z;
— V;
<- C;

JMP

Jump

DESCRIPTION PC is replaced by the destination operand.

9-58

VAX MACRO and Instruction Set
Control Instructions—JSB

JSB
Jump to Subroutine

FORMAT

opcode

dst.ab

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

PC is pushed on the stack as a longword. PC is replaced by the destination
operand.

NOTE

Since the operand specifier conventions cause the evaluation of the destina¬
tion operand before saving PC, JSB can be used for coroutine calls with the
stack used for linkage. The form of this call is:

«- N;
— Z;
<_ V;
«- C;

JSB

Jump to Subroutine

JSB Q(SP)+

9-59

VAX MACRO and Instruction Set
Control Instructions—RSB

RSB
Return from Subroutine

FORMAT

opcode

condition codes

N «- N;
Z «- Z;
V
V;
C 4- C;

exceptions

None.

opcodes

DESCRIPTION

PC is replaced by a longword popped from the stack.

NOTES

RSB is used to return from subroutines called by the BSBB, BSBW, and JSB
instructions.

RSB is equivalent to JMP @ (SP) +, but is one byte shorter.

9-60

RSB

Return From Subroutine

VAX MACRO and Instruction Set
Control Instructions—SOBGEQ

SOBGEQ
Subtract One and Branch Greater Than or Equal

FORMAT

opcode

index, ml, displ.bb

condition codes

N
Z
V
C

exception

integer overflow

opcodes

«— index LSS 0;
<— index EQL 0;
<— {integer overflow};
«_ C;

SOBGEQ

Subtract One and Branch Greater Than or Equal

DESCRIPTION

One is subtracted from the index operand, and the index operand is replaced
by the result. If the index operand is greater than or equal to 0, the signextended branch displacement is added to PC, and PC is replaced by the
result.

NOTES

Integer overflow occurs if the index operand before subtraction is the
largest negative integer. On overflow, the index operand is replaced by
the largest positive integer; therefore, the branch is taken.

The C-bit is unaffected.

9-61

VAX MACRO and Instruction Set
Control Instructions—SOBGTR

SOBGTR
Subtract One and Branch Greater Than

FORMAT

opcode

index, ml, displ.bb

condition codes

N
Z
V
C

exception

integer overflow

opcodes

<— index LSS 0;
<— index EQL 0;
<— {integer overflow);
«- C;

SOBGTR

Subtract One and Branch Greater Than

DESCRIPTION

One is subtracted from the index operand and the index operand is replaced
by the result. If the index operand is greater than 0, the sign-extended branch
displacement is added to PC, and PC is replaced by the result.

NOTES

Integer overflow occurs if the index operand before subtraction is the
largest negative integer. On overflow, the index operand is replaced by
the largest positive integer, and thus the branch is taken.

The C-bit is unaffected.

9-62

VAX MACRO and Instruction Set
Procedure Call Instructions

9.7

Procedure Call Instructions
Three instructions are used to implement a standard procedure calling in¬
terface. Two instructions implement the CALL to the procedure; the third
implements the matching RETURN. Refer to the VAX Procedure Calling and
Condition Handling Standard in the Introduction to VAX/VMS System Routines
for the procedure calling standard.
The CALLG instruction calls a procedure with the argument list actuals in
an arbitrary location. The CALLS instruction calls a procedure with the
argument list actuals on the stack. Upon return after a CALLS instruction,
this list is automatically removed from the stack. Both call instructions
specify the address of the entry point of the procedure being called. The
entry point is assumed to consist of a word called the entry mask followed by
the procedure's instructions. The procedure terminates by executing a RET
instruction.
The entry mask specifies the register use and overflow enables of the subpro¬
cedure.
11111
5 4 3 2 1
ID|I|MBZ|
IVIVI
|

0
REGISTERS

I
|

On CALL, the stack is aligned to a longword boundary and the trap enables
in the PSW are set to a known state to ensure consistent behavior of the
called procedure. Integer overflow enable and decimal overflow enable are
affected according to bits 14 and 15 of the entry mask, respectively. Floating
underflow enable is cleared. Registers Rll through RO, specified by bits 11
through 0, respectively, are saved on the stack and are restored by the RET
instruction. In addition, PC, SP, FP, and AP are always preserved by the
CALL instructions and restored by the RET instruction.
All external procedure calls generated by standard DIGITAL language pro¬
cessors, and all intermodule calls to major VAX software subsystems, comply
with the procedure calling software standard (see the VAX Procedure Calling
and Condition Handling Standard in the Introduction to VAX/VMS System
Routines). The procedure calling standard requires that all registers in the
range R2 through Rll used in the procedure must appear in the mask. RO
and R1 are not preserved by any called procedure that complies with the
procedure calling standard.
In order to preserve the state, the CALL instructions form a structure on the
stack termed a call frame or stack frame. The call frame contains the saved
registers, the saved PSW, the register save mask, and several control bits.
The frame also includes a longword which the CALL instructions clear; this
longword is used to implement the VAX/VMS condition handling facility
(see the VAX Procedure Calling and Condition Handling Standard in the
Introduction to VAX/VMS System Routines). At the end of execution of the
CALL instruction, FP contains the address of the stack frame. The RET
instruction uses the contents of FP to find the stack frame and the restore
state. The condition handling facility assumes that FP always points to the
stack frame.

9-63

VAX MACRO and Instruction Set
Procedure Call Instructions

The stack frame has the following format:

condition handler (initially 0)

1
1 SPA 1S101

mask<ll:0>

saved PSW<15:5>

saved AP

saved FP

saved PC

saved R0 (...)

saved Rll (...)

(0 to 3 bytes specified by SPA, Stack Pointer Alignment)
S = set if CALLS;

clear if CALLG.

Note that the saved condition codes and the saved trace enable (PSW <T>)
are cleared.
The contents of the frame PSW <3:0> at the time RET is executed will
become the condition codes resulting from the execution of the procedure.
Similarly, the content of the frame PSW <4> at the time the RET is executed
will become the PSW <T> bit.
The following instructions are described in this section.

9—64

Description
and Opcode

Number of
Instructions

Call Procedure with General Argument List
CALLG arglist.ab, dst.ab, {-(SP).w*}

Call Procedure with Stack Argument List
CALLS numarg.rl, dst.ab, {-(SP).w*}

Return from Procedure
RET {(SP)-h.r*}

VAX MACRO and Instruction Set
Procedure Call Instructions—CALLG

CALLG

Call Procedure With General Argument List

FORMAT

opcode

condition codes

N
Z
V
C

exception

reserved operand

opcodes

DESCRIPTION

arglist.ab, dst.ab

— 0;
— 0;
«_ 0;
— 0;

CALLG

Call Procedure with General Argument List

SP is saved in a temporary. Bits 1:0 are replaced by 0, so that the stack is
longword aligned. The procedure entry mask is scanned from bit 11 to bit
0, and the contents of registers whose numbers correspond to set bits in the
mask are pushed on the stack as longwords. PC, FP, and AP are pushed
on the stack as longwords. The condition codes are cleared. A longword
containing the saved two low bits of SP in bits 31:30, a 0 in bits 29 and 28,
the low 12 bits of the procedure entry mask in bits 27:16, and the PSW in
bits 15:0 with T cleared are pushed on the stack. A longword 0 is pushed
on the stack. FP is replaced by SP. AP is replaced by the arglist operand.
The trap enables in the PSW are set to a known state. Integer overflow and
decimal overflow are affected according to bits 14 and 15 of the entry mask,
respectively; floating underflow is cleared. The T-bit is unaffected. PC is
replaced by the sum of destination operand plus 2, which transfers control to
the called procedure at the byte beyond the entry mask.
+-+ : (SP)
1
1 :(FP)
I
stack
|
1
1
I
frame
1
1
1
(0 to 3 bytes specified by SPA)

9-65

VAX MACRO and Instruction Set
Procedure Call Instructions—CALLG

NOTES

1 If bits 13:12 of the entry mask are not 0, a reserved operand fault occurs.

2 On a reserved operand fault, condition codes are UNPREDICTABLE.
3 The procedure calling standard and the condition handling facility require
the following register saving conventions:
•

R0 and R1 are always available for function return values and are
never saved in the entry mask.

•

All registers R2 through Rll that are modified in the called procedure
must be preserved in the mask.

Refer to the VAX Procedure Calling and Condition Handling Standard in
the Introduction to VAX/VMS System Routines.

9-66

VAX MACRO and Instruction Set
Procedure Call Instructions—CALLS

CALLS

Call Procedure with Stack Argument List

condition codes

mi
2

exception

reserved operand

opcodes

DESCRIPTION

numarg.rl, dst.ab

©©©©

opcode

N > U

FORMAT

CALLS

Call Procedure with Stack Argument List

The numarg operand is pushed on the stack as a longword (byte 0 contains
the number of arguments; the high-order 24 bits are used by DIGITAL
software). SP is saved in a temporary and then bits 1:0 of SP are replaced
by 0 so that the stack is longword aligned. The procedure entry mask is
scanned from bit 11 to bit 0, and the contents of registers whose numbers
correspond to set bits in the mask are pushed on the stack. PC, FP, and AP
are pushed on the stack as longwords. The condition codes are cleared. A
longword containing the saved two low bits of SP in bits 31:30, a 1 in bit 29,
a 0 in bit 28, the low 12 bits of the procedure entry mask in bits 27:16, and
the PSW in bits 15:0 with T cleared is pushed on the stack. A longword 0 is
pushed on the stack. FP is replaced by SP. AP is set to the value of the stack
pointer after the numarg operand was pushed on the stack. The trap enables
in the PSW are set to a known state. Integer overflow and decimal overflow
are affected according to bits 14 and 15 of the entry mask, respectively.
Floating underflow is cleared. T-bit is unaffected. PC is replaced by the sum
of destination operand plus 2, which transfers control to the called procedure
at the byte beyond the entry mask. The appearance of the stack after CALLS
is executed is:
+-+ : (SP)
1
1 :(FP)
1
1
1
stack
|
1
1
1
frame
1
1
1

(0 to 3 bytes specified by SPA)
1

INI

: (AP)

N longwords of argument list

9-67

VAX MACRO and Instruction Set
Procedure Call Instructions—CALLS

NOTES

If bits 13:12 of the entry mask are not 0, a reserved operand fault occurs.

2 On a reserved operand fault, the condition codes are UNPREDICTABLE.
3 Normal use is to push the arglist onto the stack in reverse order prior to
the CALLS. On return, the arglist is removed from the stack automati¬
cally.

4 The procedure calling standard and the condition handling facility require
the following register saving conventions:
•

R0 and R1 are always available for function return values and are
never saved in the entry mask.

•

All registers R2 through Rll that are modified in the called procedure
must be preserved in the entry mask.

Refer to the VAX Procedure Calling and Condition Handling Standard in
the Introduction to VAX/VMS System Routines.

9-68

VAX MACRO and Instruction Set
Procedure Call Instructions—RET

RET
Return from Procedure

FORMAT

opcode

condition codes

N
Z
V
C

exception

reserved operand

opcodes

«- tmpl <3> ;
<— tmpl <2> ;
— tmpl <1> ;
<— tmpl <0> ;

RET

Return from Procedure

DESCRIPTION

SP is replaced by FP plus 4. A longword containing stack alignment bits in
bits 31:30, a CALLS/CALLG flag in bit 29, the low 12 bits of the procedure
entry mask in bits 27:16, and a saved PSW in bits 15:0 is popped from the
stack and saved in a temporary. PC, FP, and AP are replaced by longwords
popped from the stack. A register restore mask is formed from bits 27:16
of the temporary. Scanning from bit 0 to bit 11 of the restore mask, the
contents of registers whose numbers are indicated by set bits in the mask are
replaced by longwords popped from the stack. SP is incremented by 31:30
of the temporary. PSW is replaced by bits 15:0 of the temporary. If bit 29
in the temporary is 1 (indicating that the procedure was called by CALLS),
a longword containing the number of arguments is popped from the stack.
Four times the unsigned value of the low byte of this longword is added to
SP, and SP is replaced by the result.

NOTES

A reserved operand fault occurs if tmpl <15:8> NEQ 0.

On a reserved operand fault, the condition codes are UNPREDICTABLE.

The value of tmpl <28> is ignored.

The procedure calling standard and condition handling facility assume that
procedures which return a function value or a status code do so in R0, or
R0 and Rl. Refer to the VAX Procedure Calling and Condition Handling
Standard in the Introduction to VAX/VMS System Routines.

9-69

VAX MACRO and Instruction Set
Miscellaneous Instructions

9.8

Miscellaneous Instructions
The following instructions are described in this section.

9-70

Description
and Opcode

Number of
Instructions

Bit Clear PSW
BICPSW mask.rw

Bit Set PSW
BISPSW mask.rw

Breakpoint Fault
BPT {-(KSP).w*}

Halt
HALT {-(KSP).w*}

Index
INDEX subscript.rl, low.rl, high.rl,
size.rl, indexin.rl, indexout.wl

Move from PSL
MOVPSL dst.wl

No Operation
NOP

Pop Registers
POPR mask.rw, {(SP)+.r*J

Push Registers
PUSHR mask.rw, {-(SP).w*}

10.

Extended Function Call
XFC {unspecified operands}

VAX MACRO and Instruction Set
Miscellaneous Instructions—BICPSW

BICPSW
Bit Clear PSW

FORMAT

opcode

mask.rw

condition codes

N
Z
V
C

exception

reserved operand

opcodes

DESCRIPTION

The result of the logical AND on PSW and the one's complement of the mask
operand replaces PSW.

NOTE

A reserved operand fault occurs if mask<15:8> is not 0. On a reserved
operand fault, the PSW is not affected.

«— N AND {NOT mask <3>
«- Z AND {NOT mask <2>
«_ V AND {NOT mask <1>
— C AND {NOT mask <0>

BICPSW

Bit Clear PSW

9—71

VAX MACRO and Instruction Set
Miscellaneous Instructions—BISPSW

BISPSW
Bit Set PSW

FORMAT

opcode

mask.rw

condition codes

N
Z
V
C

exception

reserved operand

opcodes

«- NOR mask <3>;
<— Z OR mask <2>;
— VORmask<l>;
*— C OR mask <0>;

BISPSW

Bit Set PSW

DESCRIPTION The result of the logical OR on PSW and the mask operand replaces PSW.

NOTE

9-72

A reserved operand fault occurs if mask <15:8> is not 0. On a reserved
operand fault, the PSW is not affected.

VAX MACRO and Instruction Set
Miscellaneous Instructions—BPT

BPT
Breakpoint Fault

FORMAT

opcode

condition codes

N <— 0; ! Condition codes cleared after BPT fault
Z — 0;
V
0;
C <- 0;

exceptions

None.

opcodes

DESCRIPTION

BPT

Breakpoint Fault

In order to understand the operation of this instruction, it is necessary to read
Chapter 6 of the VAX-11 Architecture Reference Manual. This instruction is
used, together with the T-bit, to implement debugging facilities.

9-73

VAX MACRO and Instruction Set
Miscellaneous Instructions—HALT

HALT
Halt

FORMAT

opcode

condition codes

N
0; ! If privileged instruction fault,
Z
0; ! condition codes are cleared after
V
0; the fault. PSL saved on stack
C <— 0; ! contains condition codes prior to HALT.

N
Z
V
C

+— N; ! If processor halt
«- Z;
<- V;
«_ C;

exception

privileged instruction

opcodes

HALT

Halt

DESCRIPTION

In order to understand the operation of this instruction, it is necessary to
read Chapter 6 of the VAX-11 Architecture Reference Manual If the process
is running in kernel mode, the processor is halted. Otherwise, a privileged
instruction fault occurs.

NOTE

This opcode is 0 to trap many branches to data.

VAX MACRO and Instruction Set
Miscellaneous Instructions—INDEX

INDEX
Compute Index

subscript, rl, low.rl, high.rl, size.rl, indexin. rl,
indexout. wl

FORMAT

opcode

condition codes

N
indexout LSS 0;
Z
indexout EQL 0;
V «- 0;
C «- 0;

exception

subscript range

opcodes

INDEX

index

DESCRIPTION

The indexin operand is added to the subscript operand and the sum multi¬
plied by the size operand. The indexout operand is replaced by the result. If
the subscript operand is less than the low operand or greater than the high
operand, a subscript range trap is taken.

NOTES

No arithmetic exception other than subscript range can result from this
instruction. Thus, no indication is given if overflow occurs in either the
add or the multiply steps. If overflow occurs on the add step, the sum is
the low-order 32 bits of the true result. If overflow occurs on the multiply
step, the indexout operand is replaced by the low-order 32 bits of the
true product of the sum and the subscript operand. In the normal use
of this instruction, overflow cannot occur without a subscript range trap
occurring.

The index instruction is useful in index calculations for arrays of the
fixed-length data types (integer and floating) and for index calculations
for arrays of bit fields, character strings, and decimal strings. The indexin
operand permits cascading INDEX instructions for multidimensional
arrays. For one-dimensional bit field arrays, it also permits introduction of
the constant portion of an index calculation that is not readily absorbed by
address arithmetic. The following notes show some of the uses of INDEX.

9-75

VAX MACRO and Instruction Set
Miscellaneous Instructions—INDEX

3 The following example shows a sequence of COBOL statements, and the
VAX MACRO code their compilation might generate.
COBOL:
01

A-ARRAY.
02 A PIC X(10) OCCURS 15 TIMES.

BPICX(IO).
MOVE A(I) TO B.

MACRO:
INDEX I. #1, #15, #10, #0, RO
M0VC3 #10, A-10[RO], B.

4 The following example shows a sequence of PL/I statements, and the
VAX MACRO code their compilation might generate.
PL/I:
DCL A(-3:10) BIT (5);
A(I) = 1;

MACRO:
INDEX I, #-3, #10, #5. #3, RO
INSV

#1, RO, #5, A ; Assumes A is byte aligned

5 The following example shows a sequence of FORTRAN statements and
the VAX MACRO code their compilation might generate.
FORTRAN:
INTEGER*4 A(L1:U1, L2:U2),
A(I.J) = 1

I, J

MACRO:
INDEX J, #L2, #U2, #M1, #0, RO; M1=U1-L1+1
INDEX I, #L1, #U1, #1, RO, RO;
MOVL
#1, A-a[R0]; a = {{L2*M1> + LI} *4

9-76

VAX MACRO and Instruction Set
Miscellaneous Instructions—MOVPSL

MOVPSL

Move from PSL

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

dst. wl

<- N;
_ Z;
— V;
— C;

MOVPSL

Move from PSL

DESCRIPTION The destination operand is replaced by PSL (see Chapter 6 of the VAX-11
Architecture Reference Manual).

9-77

VAX MACRO and Instruction Set
Miscellaneous Instructions—NOP

NOP

No Operation

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

<— N;
«_ Z;
— V;
— C;

NOP

No Operation

DESCRIPTION No operation is performed.

9-78

VAX MACRO and Instruction Set
Miscellaneous Instructions—POPR

POPR
Pop Registers

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

mask.rw

*— N;
<- Z;
_ V;
♦- C;

POPR

Pop Registers

DESCRIPTION The contents of registers whose numbers correspond to set bits in the mask
operand are replaced by longwords popped from the stack. R[n] is replaced if
mask <n> is set. The mask is scanned from bit 0 to bit 14. Bit 15 is ignored.

9-79

VAX MACRO and Instruction Set
Miscellaneous Instructions—PUSHR

PUSHR
Push Registers

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

mask.rw

4- N;
«_ Z;
_ V;
<- C;

PUSHR

Push Registers

DESCRIPTION The contents of registers whose numbers correspond to set bits in the mask
operand are pushed on the stack as longwords. R[n] is pushed if mask <n>
is set. The mask is scanned from bit 14 to bit 0. Bit 15 is ignored.

NOTE

9-80

The order of pushing is specified so that the contents of higher-numbered
registers are stored at higher memory addresses. This results in, for example,
a double-floating datum stored in adjacent registers being stored by PUSHR
in memory in the correct order.

VAX MACRO and Instruction Set
Miscellaneous Instructions—XFC

XFC
Extended Function Call

condition codes

2n>U

exceptions

None.

opcodes

DESCRIPTION

1 i I I

opcode
©©©©

FORMAT

XFC

Extended Function Call

In order to understand the operation of this instruction, it is necessary to
read Chapter 6 of the VAX-11 Architecture Reference Manual. This instruction
provides for customer-defined extensions to the instruction set.

9-81

VAX MACRO and Instruction Set
Queue Instructions

9.9

Queue Instructions
A queue is a circular, doubly linked list. A queue entry is specified by its
address. Each queue entry is linked to the next by a pair of longwords. The
first longword is the forward link; it specifies the location of the succeeding
entry. The second longword is the backward link; it specifies the location of
the preceding entry. Because a queue contains redundant links, it is possible
to create ill-formed queues. The VAX instructions produce UNPREDICTABLE
results when used on ill-formed queues.
A queue is classified by the type of link that it uses. The VAX supports two
distinct types of links: absolute and self-relative.

9.9.1

Absolute Queues
Absolute queues use absolute addresses as links. Queue entries are linked
by a pair of longwords. The first (lowest-addressed) longword is the forward
link; it is the address of the succeeding queue entry. The second (highestaddressed) longword is the backward link; it is the address of the preceding
queue entry.
A queue is specified by a queue header, which is identical to a pair of queue
linkage longwords. The forward link of the header is the address of the entry
called the head of the queue. The backward link of the header is the address
of the entry termed the tail of the queue. The forward link of the tail points
to the header.
Two general operations can be performed on queues: insertion of entries and
removal of entries. Generally, entries can be inserted or removed only at the
head or tail of a queue. (Under certain restrictions they can be inserted or
removed elsewhere; this is discussed later.)
The following text contains examples of queue operations. An empty queue
is specified by its header at address H.
3

o
:H

H
3
1

: H+4

If an entry at address B is inserted into an empty queue (at either the head or
the tail), the queue appears as follows:
3
1

0
B

: H+4
0

VAX MACRO and Instruction Set
Queue Instructions

--+

: B+4

♦-

If an entry at address A is inserted at the head of the queue, the queue is as
shown:

:H
: H+4

B
0

1
3
1

0
B

H
3

3
1

: A+4

A
3

: B+4
0

Finally, if an entry at address C is inserted at the tail, the queue appears as
follows:
3
1

0
A

C
3

: H+4

I
3

I
0

:A
: A+4
0

9-83

VAX MACRO and Instruction Set
Queue Instructions

3
1

:B+4

--+-■;--

1
3
1

--I

+-+

B
3
1

:C+4

Following the preceding steps in reverse order gives the effect of removal at
the tail and removal at the head.
If more than one process can perform operations on a queue simultaneously,
insertions and removals should only be done at the head or tail of the queue.
If only one process (or one process at a time) can perform operations on a
queue, insertions and removals can be made at other than the head or tail of
the queue. In the preceding example with the queue containing entries A,B,
and C, the entry at address B can be removed, giving:
3

o
I :H
-+
I

3
1
3
1

: H+4

0
I :A
-+
I

: A+4

I :C
-+
I :C+4
3

1
The reason for this restriction is that operations at the head or tail are always
valid because the queue header is always present; operations elsewhere in
the queue depend on specific entries being present and may become invalid if
another process is simultaneously performing operations on the queue.

9-84

VAX MACRO and Instruction Set
Queue Instructions

Two instructions are provided for manipulating absolute queues: INSQUE
and REMQUE. INSQUE inserts an entry specified by an entry operand
into the queue following the entry specified by the predecessor operand.
REMQUE removes the entry specified by the entry operand. Queue en¬
tries can be on arbitrary byte boundaries. Both INSQUE and REMQUE are
implemented as noninterruptible instructions.

9.9.2

Self-relative Queues
Self-relative queues use displacements from queue entries as links. Queue en¬
tries are linked by a pair of longwords. The first (lowest addressed) longword
is the forward link; it is the displacement of the succeeding queue entry from
the present entry. The second (highest-addressed)longword is the backward
link; it is the displacement of the preceding queue entry from the present
entry.
A queue is specified by a queue header, which also consists of two longword
links. The forward link of the header is the address of the entry called the
head of the queue. The backward link of the header is the address of the
entry termed the tail of the queue. The forward link of the tail points to the
header.
The following text contains examples of queue operations. An empty queue is
specified by its header at address H. Since the queue is empty, the self-relative
links must be 0, as shown.
3

: H+4

If an entry at address B is inserted into an empty queue (at either the head or
tail), the queue appears as follows:
3

o
B - H

: H+4
3

3
1

0
H - B

H - B
3

: B+4
0

If an entry at address A is inserted at the head of the queue, the queue
appears as follows:

9-85

VAX MACRO and Instruction Set
Queue Instructions

3
1

A - H

| :H

B - H

| :H+4

3
1

B - A

| :A

H - A

| :A+4

3
1

H - B

| :B

A - B

| :B+4

3
1

Finally, if an entry at address C is inserted at the tail, the queue appears as
follows:
3
1

A - H

C - H
3
1

B - A

H - A
3
1

| :A
I :A+4
0

3
1

C - B

A - B
3
1

| :B
| :B+4
0

3
1

9—86

| :H+4
0

3
1

H - C

B - C
3
1

I :H

I :C
| :C+4
0

VAX MACRO and Instruction Set
Queue Instructions

Following the previous steps in reverse order gives the effect of removal at
the tail and removal at the head.
Thus, four operations can be performed on self-relative queues:
1

Insert at head.

Insert at tail.

Remove from head.

Remove from tail.

Furthermore, these operations are interlocked to allow cooperating processes
in a multiprocessor system to access a shared list without additional synchro¬
nization. Queue entries must be quadword aligned. A hardware-supported
interlocked memory access mechanism is used to read the queue header.
Bit 0 of the queue header is used as a secondary interlock; it is set when
the queue is being accessed. If an interlocked queue instruction encounters
the secondary interlock set, it terminates after setting the condition codes to
indicate failure to gain access to the queue. If the secondary interlock bit
is not set, then the interlocked queue instruction sets it during its operation
and clears it at instruction completion. In this way, other interlocked queue
instructions are prevented from operating on the same queue.

9.9.3

Instruction Descriptions
The following instructions are described in this section.
Description
and Opcode

Number of
Instructions

Insert Entry into Queue at Head, Interlocked
INSQHI entry.ab, header.aq

Insert Entry into Queue at Tail, Interlocked
INSQTI entry.ab, header.aq

Insert Entry in Queue
INSQUE entry.ab, pred.ab

Remove Entry from Queue at Head, Interlocked
REMQHI header.aq, addr.wl

Remove Entry from Queue at Tail, Interlocked
REMQTI header.aq, addr.wl

Remove Entry from Queue
REMQUE entry.ab, addr.wl

9-87

VAX MACRO and Instruction Set
Queue Instructions—INSQHI

INSQHI
Insert Entry into Queue at Head, Interlocked

FORMAT
condition codes

opcode

entry, ab, header.aq

if {insertion succeeded} then
begin
N <- 0;
Z <- (entry) EQL (entry+4);
! First entry in queue
V <- 0;
C <- 0;
end;
else
begin
N <- 0;
Z <- 0;
V <- 0;
C <-l;
! Secondary interlock failed
end;

exception

reserved operand

opcodes

INSQHI

Insert Entry into Queue at Head, Interlocked

DESCRIPTION The entry specified by the entry operand is inserted into the queue following

the header. If the entry inserted was the first one in the queue, the condition
code Z-bit is set; otherwise it is cleared. The insertion is a noninterruptible
operation. The insertion is interlocked to prevent concurrent interlocked
insertions or removals at the head or tail of the same queue by another
process even in a multiprocessor environment. Before performing any part
of the operation, the processor validates that the entire operation can be
completed. This method ensures that if a memory management exception
occurs (see Chapters 5 and 6 of the VAX-11 Architecture Reference Manual),
the queue is left in a consistent state. If the instruction fails to acquire the
secondary interlock, the instruction sets condition codes and terminates.

NOTES

Because the insertion is noninterruptible, processes running in kernel
mode can share queues with interrupt service routines (see Chapters 5, 6,
and 7 of the VAX-11 Architecture Reference Manual).

2 The INSQHI, INSQTI, REMQHI, and REMQTI instructions are imple¬
mented such that cooperating software processes in a multiprocessor may
access a shared list without additional synchronization.

9-88

VAX MACRO and Instruction Set
Queue Instructions—INSQHI

To set a software interlock realized with a queue, the following can be
used:
INSERT:
INSQHI
BEQL
BCS
CALL

...
1$
INSERT
WAIT(...)

;
;
;
;

Was queue empty?
Yes
Try inserting again
No, wait

1$:

During access validation, any access that cannot be completed results in
a memory management exception even though the queue insertion is not
started.

A reserved operand fault occurs if entry or header is an address that is
not quadword aligned (that is, <2:0> NEQU 0) or if header <2:1 > is
not 0. A reserved operand fault also occurs if header equals entry. In this
case, the queue is not altered.

9-89

VAX MACRO and Instruction Set
Queue Instructions—INSQTI

INSQTI
Insert Entry into Queue at Tail, Interlocked

FORMAT
condition codes

opcode

entry, ab, header, aq

if {insertion succeeded} then
begin
N <- 0;
Z <- (entry) EQL (entry+4);
! First entry in queue
V <- 0;
C <- 0;
end;
else
begin
N <- 0;
Z <- 0;
V <- 0;
C <- 1;
! Secondary interlock failed
end;

exception

reserved operand

opcodes

INSQTI

Insert Entry into Queue at Tail, Interlocked

DESCRIPTION

The entry specified by the entry operand is inserted into the queue preceding
the header. If the entry inserted was the first one in the queue, the condition
code Z-bit is set; otherwise it is cleared. The insertion is a noninterruptible
operation. The insertion is interlocked to prevent concurrent interlocked
insertions or removals at the head or tail of the same queue by another
process even in a multiprocessor environment. Before performing any part
of the operation, the processor validates that the entire operation can be
completed. This method ensures that if a memory management exception
occurs (see Chapters 5 and 6 of the VAX-11 Architecture Reference Manual),
the queue is left in a consistent state. If the instruction fails to acquire the
secondary interlock, the instruction sets condition codes and terminates.

NOTES

Because the insertion is noninterruptible, processes running in kernel
mode can share queues with interrupt service routines (see Chapters 5, 6,
and 7 of the VAX-11 Architecture Reference Manual).

The INSQHI, INSQTI, REMQHI, and REMQTI instructions are imple¬
mented such that cooperating software processes in a multiprocessor may
access a shared list without additional synchronization.

9-90

VAX MACRO and Instruction Set
Queue Instructions—INSQTI

To set a software interlock realized with a queue, the following can be
used:
INSERT:
INSQHI
BEQL
BCS
CALL

...
1$
INSERT
WAIT(...)

; Was queue empty?
; Yes
; Try inserting again
; No, wait

1$:

During access validation, any access that cannot be completed results
a memory management exception even though the queue insertion is not
started.
5

A reserved operand fault occurs if entry, header, or (header+4) is an
address that is not quadword aligned (that is, <2:0> NEQU 0) or if
header <2:1 > is not 0. A reserved operand fault also occurs if header
equals entry. In this case, the queue is not altered.

9-91

VAX MACRO and Instruction Set
Queue Instructions—INSQUE

INSQUE
Insert Entry in Queue

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

NOTES

entry, ab, pred.ab

<■— (entry) LSS (entry+4);
<— (entry) EQL (entry+4); First entry in queue
— 0;
<— (entry) LSSU (entry+4);

INSQUE

Insert Entry in Queue

The entry specified by the entry operand is inserted into the queue following
the entry specified by the predecessor operand. If the entry inserted was the
first one in the queue, the condition code Z-bit is set; otherwise it is cleared.
The insertion is a noninterruptible operation. Before performing any part
of the operation, the processor validates that the entire operation can be
completed. This method ensures that if a memory management exception
occurs (see Chapters 5 and 6 of the VAX-11 Architecture Reference Manual),
the queue is left in a consistent state.

1 Three types of insertion can be performed by appropriate choice of the
predecessor operand:

• Insert at head:
INSQUE

entry, h

; h is queue head

• Insert at tail:
INSQUE
(Note

entry,@h+4
; h is queue head
in this case only)

• Insert after arbitrary predecessor:
INSQUE

entry,p

; p is predecessor

2 Because the insertion is noninterruptible, processes running in kernel
mode can share queues with interrupt service routines (see Chapters 5, 6,
and 7 of the VAX-11 Architecture Reference Manual).

9-92

The INSQUE and REMQUE instructions are implemented such that
cooperating software processes in a single processor may access a shared
list without additional synchronization, if the insertions and removals are
only at the head or tail of the queue.

VAX MACRO and Instruction Set
Queue Instructions—INSQUE

4 To set a software interlock realized with a queue, the following can be
used:
INSQUE
BEQL
CALL

...
1$
WAIT(...)

; Was queue empty?
; Yes
; No, wait

1$:

During access validation, any access that cannot be completed results in a
memory management exception, even though the queue insertion is not
started.

9-93

VAX MACRO and Instruction Set
Queue Instructions—REMQHI

REMQHI
Remove Entry from Queue at Head, Interlocked

FORMAT
condition codes

opcode

header, aq, addr.wl

if {removal succeeded} then
begin
N <- 0;
Z <- (header) EQL 0;
!
V <- {queue empty before
C <- 0;
end;
else
begin
N <- 0;
Z <- 0;
V <- 1;
!
C <- 1;
!
end;

exception

reserved operand

opcodes

REMQHI

Queue empty after removal
this instruction};

Did not remove anything
Secondary interlock failed

Remove Entry from Queue at Head, Interlocked

DESCRIPTION If the secondary interlock is clear, the queue entry following the header is

removed from the queue and the address operand is replaced by the address
of the entry removed. If the queue was empty prior to this instruction, or if
the secondary interlock failed, the condition code V-bit is set; otherwise it is
cleared.
If the interlock succeeded and the queue is empty at the end of this instruc¬
tion, the condition code Z-bit is set; otherwise it is cleared. The removal is
interlocked to prevent concurrent interlocked insertions or removals at the
head or tail of the same queue by another process even in a multiprocessor
environment. The removal is a noninterruptible operation. Before performing
any part of the operation, the processor validates that the entire operation
can be completed. This ensures that if a memory management exception
occurs (see Chapters 5 and 6 of the VAX-11 Architecture Reference Manual),
the queue is left in a consistent state. If the instruction fails to acquire the sec¬
ondary interlock, the instruction sets condition codes and terminates without
altering the queue.

NOTES

Because the removal is noninterruptible, processes running in kernel mode
can share queues with interrupt service routines (see Chapters 5, 6, and 7
of the VAX-11 Architecture Reference Manual).

2 The INSQHI, INSQTI, REMQHI, and REMQTI instructions are imple¬
mented such that cooperating software processes in a multiprocessor may
access a shared list without additional synchronization.
9-94

VAX MACRO and Instruction Set
Queue Instructions—REMQHI

3 To release a software interlock realized with a queue, the following can be
used:
1$:

REMQHI
BEQL
BCS
CALL

...
2$
1$
ACTIVATEC...)

;
;
;
;

Removed last?
Yes
Try removing again
Activate other waiters

To remove entries until the queue is empty, the following can be used:
1$:

REMQHI
BVS

...
2$

; Anything removed?
; No

process removed entry
BR
2$

BCS
1$
queue empty

;
; Try removing again

During access validation, any access that cannot be completed results in
a memory management exception, even though the queue removal is not
started.

A reserved operand fault occurs if header or (header + (header)) is an
address that is not quadword aligned (that is, <2:0> NEQU 0) or if
(header) <2:1 > is not 0. A reserved operand fault also occurs if the
header address operand equals the address of the addr operand. In this
case, the queue is not altered.

9-95

VAX MACRO and Instruction Set
Queue Instructions—REMQTI

REMQTI
Remove Entry from Queue at Tail, Interlocked

FORMAT
condition codes

opcode

header, aq, addr. wl

if {removal succeeded} then
begin
N <- 0;
Z <- (header + 4) EQL 0;
! Queue empty after removal
V <- {queue empty before this instruction};
C <- 0;
end;
else
begin
N <- 0;
Z <- 0;
V <- 1;
! Did not remove anything
C <- 1;
Secondary interlock failed
end;

exception

reserved operand

opcodes

DESCRIPTION

REMQTI

Remove Entry from Queue at Tail, Interlocked

If the secondary interlock is clear, the queue entry preceding the header is
removed from the queue and the address operand is replaced by the address
of the entry removed. If the queue was empty prior to this instruction, or if
the secondary interlock failed, the condition code V-bit is set; otherwise it is
cleared.
If the interlock succeeded and the queue is empty at the end of this instruc¬
tion, the condition code Z-bit is set; otherwise it is cleared. The removal is
interlocked to prevent concurrent interlocked insertions or removals at the
head or tail of the same queue by another process, even in a multiprocessor
environment. The removal is a noninterruptible operation. Before performing
any part of the operation, the processor validates that the entire operation
can be completed. This ensures that if a memory management exception
occurs (see Chapters 5 and 6 of the VAX-11 Architecture Reference Manual),
the queue is left in a consistent state. If the instruction fails to acquire the sec¬
ondary interlock, the instruction sets condition codes and terminates without
altering the queue.

NOTES

9-96

Because the removal is noninterruptible, processes running in kernel mode
can share queues with interrupt service routines (see Chapters 5, 6, and 7
of the VAX-11 Architecture Reference Manual).

The INSQHI, INSQTI, REMQHI, and REMQTI instructions are imple¬
mented such that cooperating software processes in a multiprocessor may
access a shared list without additional synchronization.

VAX MACRO and Instruction Set
Queue Instructions—REMQTI

To release a software interlock realized with a queue, the following can be
used:
1$:

REMQTI
BEQL
BCS
CALL

...
2$
1$
ACTIVATED . .)

;
;
;
;

Removed last?
Yes
Try removing again
Activate other waiters

2$:

To remove entries until the queue is empty, the following can be used:
1$:

REMQTI
BVS

...
2$

; Anything removed?
; No

process removed entry
BR
2$:

BCS
1$
queue empty

•
; Try removing again

During access validation, any access which cannot be completed results in
a memory management exception, even though the queue removal is not
started.

A reserved operand fault occurs if header, (header + 4), or (header
+ (header + 4)+4) is an address that is not quadword aligned (that is,
<2:0> NEQU 0), or if (header) <2:1> is not 0. A reserved operand
fault also occurs if the header address operand equals the address of the
addr operand. In this case, the queue is not altered.

9-97

VAX MACRO and Instruction Set
Queue Instructions—REMQUE

REMQUE
Remove Entry From Queue

FORMAT

opcode

condition codes

N <— (entry) LSS (entry+4);
Z 4— (entry) EQL (entry+4); ! Queue empty
V 4— (entry) EQL (entry+4); ! No entry to remove
C 4— (entry) LSSU (entry+4);

exceptions

None.

opcodes

entry. ab,addr.wl

REMQUE

Remove Entry from Queue

DESCRIPTION The queue entry specified by the entry operand is removed from the queue.

The address operand is replaced by the address of the entry removed. If there
was no entry in the queue to be removed, the condition code V-bit is set;
otherwise it is cleared. If the queue is empty at the end of this instruction,
the condition code Z-bit is set; otherwise it is cleared. The removal is a
noninterruptible operation. Before performing any part of the operation, the
processor validates that the entire operation can be completed. This ensures
that if a memory management exception occurs (see Chapters 5 and 6 of the
VAX-11 Architecture Reference Manual), the queue is left in a consistent state.

NOTES

Three types of removal can be performed by suitable choice of entry
operand:
•

Remove at head:
REMQUE

•

; h is queue header

Remove at tail:
REMQUE

•

Oh.addr

Qh+4,addr

; h is queue header

Remove arbitrary entry:
REMQUE

entry.addr

2 Because the removal is noninterruptible, processes running in kernel mode
can share queues with interrupt service routines (see Chapters 5, 6, and 7
of the VAX-11 Architecture Reference Manual).

9-98

VAX MACRO and Instruction Set
Queue Instructions—REMQUE

4 To release a software interlock realized with a queue, the following can be
used:
REMQUE
BEQL
CALL

...
1$
ACTIVATE(...)

; Queue empty?
; Yes
; Activate other waiters

1$:

5 To remove entries until the queue is empty, the following can be used:
1$:

REMQUE
BVS

...
EMPTY

; Anything removed?
; No

6 During access validation, any access which cannot be completed results in
a memory management exception, even though the queue removal is not
started.

9-99

VAX MACRO and Instruction Set
Floating Point Instructions

9.10

Floating Point Instructions
Floating-point instructions operate on four data types. F_floating and
D—floating instructions are standard on all VAX processors. G—floating and
H_floating instructions are optional on the VAX-11/780 and the VAX-11
/750, and standard on the VAX-11/730.
In order to be consistent with the floating-point instruction set, which faults
on reserved operands (see Section 8), software-implemented floating-point
functions (for example, the absolute function) should verify that no input
operands are reserved. An easy way to do this is a floating move or test of
the input operand(s).
In order to facilitate high-speed implementations of the floating-point instruc¬
tion set, certain restrictions are placed on the addressing mode combinations
usable within a single floating-point instruction. These combinations involve
the logically inconsistent simultaneous use of a value as both a floating-point
operand and an address.
Specifically, if within the same instruction the contents of register Rn are used
as both a part of a floating-point input operand (that is, an .rf, .rd, .rg, .rh,
.mf, .md, .mg, or .mh operand) and as an address in an addressing mode
that modifies Rn (that is, autoincrement, autodecrement, or autoincrement
deferred), the value of the floating-point operand is UNPREDICTABLE.

9.10.1 Introduction
Mathematically, a floating-point number may be defined as having the form:
(+ or -)

(2**K)*f

where K is an integer and f is a nonnegative fraction. For a non vanishing
number, K and f are uniquely determined by imposing the condition
1/2 LEQ f LSS 1.

The fractional factor, f, of the number is then said to be binary normalized.
For the number 0, f must be assigned the value 0, and the value of K is
indeterminate.
The VAX floating-point data formats are derived from this mathematical rep¬
resentation for floating-point numbers. Four types of floating-point data are
provided: the two standard PDP-11 formats (F_floating and D_floating), and
two extended-range formats (G_floating and H_floating). Single-precision, or
floating, data is 32 bits long. Double-precision, or D_floating, data is 64 bits
long. Extended-range double-precision, or G—floating, data is 64 bits long.
Extended-range quadruple-precision, or H_floating, data is 128 bits long.
Sign magnitude notation is used as follows:
1

Nonzero floating-point numbers:
The most-significant bit of the floating-point data is the sign bit: 0 for
positive and 1 for negative.
The fractional factor f is assumed normalized, so that its most-significant
bit must be 1. This 1 is the "hidden" bit: it is not stored in the data word,
but the hardware restores it before carrying out arithmetic operations. The
F_floating and D_floating data types use 23 and 55 bits, respectively,
for f, which, with the hidden bit, imply effective significance of 24 bits
and 56 bits for arithmetic operations. The extended-range (G—floating
and H_floating) data types use 52 and 112 bits, respectively, for f, which.

9-100

VAX MACRO and Instruction Set
Floating Point Instructions

with the hidden bit, imply effective significance of 53 and 113 bits for
arithmetic operations.
In the F_floating and D_floating data types, eight bits are reserved for
the storage of the exponent K in excess 128 notation. Thus exponents
from -128 to +127 could be represented, in biased form, by 0 to 255.
For reasons given later, a biased EXP of 0 (the true exponent of -128) is
reserved for floating-point 0. Thus, for F_floating and D_floating data
types, exponents are restricted to the range -127 to +127 inclusive, or, in
excess 128 notation, 1 to 255.
In the G_floating data type, 11 bits are reserved for the storage of the
exponent in excess 1024 notation. In the H—floating data type, 15 bits
are reserved for the storage of the exponent in excess 16,384 notation. A
biased exponent of 0 is reserved for floating-point 0. Thus, exponents are
restricted to -1023 to +1023 inclusive (in excess notation, 1 to 2047),
and -16,383 to +16,383 inclusive (in excess notation, 1 to 32,767) for
G_floating and H_floating data types, respectively.

2 Floating-point 0:
Because of the hidden bit, the fractional factor is not available to dis¬
tinguish between zero and nonzero numbers whose fractional factor is
exactly 1/2. Therefore, the VAX reserves a sign-exponent field of 0 for
this purpose. Any positive floating-point number with a biased exponent
of 0 is treated as if it were an exact 0 by the floating-point instruction set.
In particular, a floating-point operand whose bits are all 0s is treated as 0,
and this is the format generated by all floating-point instructions for which
the result is 0.

3 The reserved operands:
A reserved operand is defined to be any bit pattern with a sign bit of 1
and a biased exponent of 0. On the VAX, all floating-point instructions
generate a fault if a reserved operand is encountered. A reserved operand
is never generated as a result of a floating-point instruction.

9.10.2 Overview of the Instruction Set
The VAX has the standard arithmetic operations ADD, SUB, MUL, and
DIV implemented for all four floating-point data types. The results of these
operations are always rounded, as described in 9.10.3. It has, in addition,
two composite operations, EMOD and POLY, also implemented for all four
floating-point data types. EMOD generates a product of two operands,
and then separates the product into its integer and fractional terms. POLY
evaluates a polynomial, given the degree, the argument, and a pointer to
a table of coefficients. Details on the operation of EMOD and POLY are
given in their respective descriptions. All of these instructions are subject
to the rounding errors associated with floating-point operations, as well as
to exponent overflow and underflow. Accuracy is discussed in 9.10.3, and
exceptions are discussed in Chapter 6 of the VAX-11 Architecture Reference
Manual
The VAX also has a complete set of instructions for conversion from integer
arithmetic types (byte, word, longword) to all floating types (F_floating,
D__floating, G_floating, H_floating), and vice versa. The VAX also has a set
of instructions for conversion between all of the floating types except between
D_floating and G_floating. Many of these instructions are exact, in the sense
defined in 9.10.3. However, a few may generate rounding error, floating

9-101

VAX MACRO and Instruction Set
Floating Point Instructions

overflow, or floating underflow, or induce integer overflow. Details are given
in the description of the CVT instructions.
There is a class of move-type instructions that are always exact: MOV,
NEG, CLR, CMP, and TST. And, finally, there is the ACB (Add, Compare
and Branch) instruction, which is subject to rounding errors, overflow, and
underflow.
All of the floating-point instructions on the VAX fault if a reserved operand is
encountered. Floating-point instructions also fault on the occurrence of float¬
ing overflow or divide by 0, and the condition codes are UNPREDICTABLE.
The FU bit in the PSW is available to enable or disable an exception on
underflow. If the FU bit is clear, no exception occurs on underflow and 0 is
returned as the result. If the FU bit is set, a fault occurs on underflow. Fur¬
ther details on the actions taken if any of these exceptions occurs are included
in the descriptions of the instructions, and discussed in detail in Chapter 6 of
the VAX-11 Architecture Reference Manual.

9.10.3 Accuracy
General comments on the accuracy of the VAX floating-point instruction
set are presented here. The descriptions of the individual instructions may
include additional details on the accuracy at which they operate.
An instruction is defined to be exact if its result, extended on the right by an
infinite sequence of Os, is identical to that of an infinite precision calculation
involving the same operands. The prior accuracy of the operands is thus
ignored. For all arithmetic operations, except DIV, a 0 operand implies that
the instruction is exact. The same statement holds for DIV if the 0 operand is
the dividend. But if it is the divisor, division is undefined and the instruction
faults.
For nonzero floating-point operands, the fractional factor is binary normal¬
ized with 24 or 56 bits for single-precision (F_JIoating) or double precision
(D__floating), respectively; and 53 or 113 bits for extended-range double¬
precision (G_floating), and extended-range quadruple-precision (H__floating),
respectively. As shown below, for ADD, SUB, MUL and DIV, an overflow
bit, on the left, and two guard bits, on the right, are necessary and sufficient
to guarantee return of a rounded result identical to the corresponding infinite
precision operation rounded to the specified word length. Thus, with two
guard bits, a rounded result has an error bound of 1 /2 LSB (least-significant
bit).
Note that an arithmetic result is exact if no nonzero bits are lost in chopping
the infinite precision result to the data length to be stored. Chopping is
defined to mean that the 24 (F_floating), 56 (D_floating), 53 (G_Jloating), or
113 (H_floating) high-order bits of the normalized fractional factor of a result
are stored; the rest of the bits are discarded. The first bit lost in chopping is
referred to as the "rounding" bit. The value of a rounded result is related to
the chopped result as follows:

9-102

•

If the rounding bit is 1, the rounded result is the chopped result incre¬
mented by an LSB (least-significant bit).

•

If the rounding bit is 0, the rounded and chopped results are identical.

VAX MACRO and Instruction Set
Floating Point Instructions

All VAX processors implement rounding so as to produce results identical to
the results produced by the following algorithm: Add a 1 to the rounding
bit, and propagate the carry, if it occurs. Note that a renormalization may be
required after rounding takes place; if this happens, the new rounding bit will
be 0, so it can happen only once. The following statements summarize the
relations among chopped, rounded and true (infinite precision) results:
•

If a stored result is exact:
—

•

rounded value = chopped value = true value

If a stored result is not exact, its magnitude:
— is always less than that of the true result for chopping
— is always less than that of the true result for rounding if the rounding
bit is 0
— is greater than that of the true result for rounding if the rounding
bit is 1

9.10.4 Instruction Descriptions
The following instructions are described in this section.
Description
and Opcode

Number of
Instructions

Add 2 Operand
ADD{F,D,G,H}2 add.rx, sum.mx

Add 3 Operand
ADDlF^^^jS addl.rx, add2.rx# sum.wx

Clear
CLR{L=F,Q=D=G,0=H} dst.wx

Compare
CMP{F,D,G,H} srcl.rx, src2.rx

Convert
CVTjF,D,G,H}{B,W,L,F,D,G,H} src.rx, dst.wy
CVT{B,W,L}{F,D,G,H} src.rx, dst.wy
All pairs except FF,DD,GG,HH,DG, and GD

Convert Rounded
CVTR{F,D,G,H}L src.rx, dst.wl

Divide 2 Operand
DIV{F,D,G,H}2 divr.rx, quo.mx

Divide 3 Operand
DIV{F,D,G,H}3 divr.rx, divd.rx, quo.wx

Extended Modulus
EMOD{F,D} mulr.rx, mulrx.rb, muld.rx,
int.wl, tract.wx
EMOD{G,H} mulr.rx, mulrx.rw, muld.rx,
int.wl, tract.wx

10.

Move Negated
MNEG{F,D,G,H} src.rx, dst.wx

9-103

VAX MACRO and Instruction Set
Floating Point Instructions

Description
and Opcode

Number of
Instructions

11.

Move
MOV{F,D,G,H} src.rx, dst.wx

12.

Multiply 2 Operand
MUL{F,D,G,H}2 mulr.rx, prod.mx

13.

Multiply 3 Operand
MUL{F,D,G,H}3 mulr.rx, muld.rx, prod.wx

14.

Polynomial Evaluation F_floating
POLYF arg.rf, degree.rw, tbladdr.ab,
(R0-3.wl)

15.

Polynomial Evaluation D_floating
POLYD arg.rd, degree.rw, tbladdr.ab,
{R0-5.wl}

16.

Polynomial Evaluation G_floating
POLYG arg.rg, degree.rw, tbladdr.ab,
{R0-5.wl}

17.

Polynomial Evaluation H_floating
POLYH arg.rh, degree.rw, tbladdr.ab,
{R0-5.wl,-16(SP):-1 (SP).wbj

18.

Subtract 2 Operand
SUB{F,D,G,H}2 sub.rx, dif.mx

19.

Subtract 3 Operand
SUB{F,D,G,H}3 sub.rx, min.rx, dif.wx

20.

Test
TST{F,D,G,H} src.rx

The following floating-point instructions are described in the section on
Control Instructions.

Description
and Opcode

Number of
Instructions

Add Compare and Branch
ACB{F,D,G,H} limit.rx, add.rx, index.mx,
displ.bw

Compare is LE on positive add, GE on
negative add.

9-104

VAX MACRO and Instruction Set
Floating Point Instructions—ADD

ADD
Add1

FORMATS

2 operand:
3 operand:

condition codes

N <- sum LSS 0;
Z «- sum EQL 0;
V — 0;
c — 0;

exceptions

floating overflow
floating underflow
reserved operand

opcodes

opcode
opcode

add.rx, sum.mx
add 1.rx, add2. rx, sum. wx

ADDF2

Add F_floating 2 Operand

ADDF3

Add F_floating 3 Operand

ADDD2

Add D_floating 2 Operand

ADDD3

Add D_floating 3 Operand

40FD

ADDG2

ADD G_floating 2 Operand

41FD

ADDG3

ADD G_floating 3 Operand

60FD

ADDH2

ADD H_floating 2 Operand

61FD

ADDH3

ADD H_floating 3 Operand

DESCRIPTION

In 2 operand format, the addend operand is added to the sum operand and
the sum operand is replaced by the rounded result. In 3 operand format, the
addend 1 operand is added to the addend 2 operand and the sum operand is
replaced by the rounded result.

NOTES

On a reserved operand fault, the sum operand is unaffected and the
condition codes are UNPREDICTABLE.

2 On floating underflow, if FU is set, a fault occurs. Zero is stored as the
result of floating underflow only if FU is clear. On a floating underflow
fault, the sum operand is unaffected. If FU is clear, the sum operand is
replaced by 0 and no exception occurs.

3 On floating overflow, the instruction faults; the sum operand is unaffected,
and the condition codes are UNPREDICTABLE.

9-105

VAX MACRO and Instruction Set
Floating Point Instructions—CLR

CLR
Clear1

dst. wx

FORMAT

opcode

condition codes

N <- 0;
Z _ 1;
V _ 0;
C
C;

exceptions

None.

opcodes

CLRF

CLRD

Clear D_floating,

CLRG

Clear G_floating

CLRH

Clear H_floating

7CFD

Clear F_floating

DESCRIPTION

The destination operand is replaced by 0.

NOTE

CLRx dst is equivalent to MOVx S*#0, dst, but is one byte shorter.

9-106

VAX MACRO and Instruction Set
Floating Point Instructions—CMP

CMP

Compare1

FORMAT

opcode

condition codes

N
Z
V
C

exception

reserved operand

opcodes

CMPF

Compare F_floating

CMPD

Compare D_floating

51FD

CMPG

Compare G_floating

71FD

CMPH

Compare H_floating

DESCRIPTION

src 1. rx, src2. rx

«— srcl LSS src2;
<— srcl EQL src2;
- 0;
— 0;

The source 1 operand is compared with the source 2 operand. The only
action is to affect the condition codes.

9-107

VAX MACRO and Instruction Set
Floating Point Instructions—CVT

CVT
Convert1

FORMAT

opcode

condition codes

c
exceptions

opcodes

src.rx, dst.wy

dst LSS 0;
dst EQL 0;
{integer overflow};

integer overflow
floating overflow
floating underflow
reserved operand

CVTBF

Convert Byte to F_floating

CVTBD

Convert Byte to D_floating

4CFD

CVTBG

Convert Byte to G_floating

6CFD

CVTBH

Convert Byte to H_floating

CVTWF

Convert Word to F_floating

CVTWD

Convert Word to D_floating

4DFD

CVTWG

Convert Word to G_floating

6DFD

CVTWH

Convert Word to H_floating

CVTLF

Convert Long to F_floating

CVTLD

Convert Long to D_floating

4EFD

CVTLG

Convert Long to G_floating

6EFD

CVTLH

Convert Long to H_floating

CVTFB

Convert F_floating to Byte

CVTDB

Convert D_floating to Byte

48FD

CVTGB

Convert G_floating to Byte

68FD

CVTHB

Convert H_floating to Byte

CVTFW

Convert F_floating to Word

CVTDW

Convert D_floating to Word

49FD

CVTGW

Convert G_floating to Word

69FD

CVTHW

Convert H_floating to Word

9-108

VAX MACRO and Instruction Set
Floating Point Instructions—CVT

DESCRIPTION

CVTFL

Convert F_floating to Long

CVTRFL

Convert Rounded F_floating to Long

CVTDL

Convert D_floating to Long

CVTRDL

Convert Rounded D_floating to Long

4AFD

CVTGL

Convert G_floating to Long

4BFD

CVTRGL

Convert Rounded G_floating to Long

6AFD

CVTHL

Convert FI_floating to Long

6BFD

CVTRHL

Convert Rounded FI_floating to Long

CVTFD

Convert F_floating to D_floating

99FD

CVTFG

Convert F_floating to G_floating

98FD

CVTFH

Convert F_floating to H_floating

CVTDF

Convert D_floating to F_floating

32FD

CVTDH

Convert D_floating to H_floating

33FD

CVTGF

Convert G_floating to F_floating

56FD

CVTGH

Convert G_floating to FI_floating

F6FD

CVTHF

Convert H_floating to F_floating

F7FD

CVTHD

Convert FI_floating to D_floating

76FD

CVTHG

Convert FLfloating to G_floating

The source operand is converted to the data type of the destination operand,
and the destination operand is replaced by the result. The form of the
conversion is as follows:
CVTBF

exact

CVTBD

exact

CVTBG

exact

CVTBH

exact

CVTWF

exact

CVTWD

exact

CVTWG

exact

CVTWH

exact

CVTLF

rounded

CVTLD

exact

CVTLG

exact

CVTLH

exact

9-109

VAX MACRO and Instruction Set
Floating Point Instructions—CVT

NOTES

CVTFB

truncated

CVTDB

truncated

CVTGB

truncated

CVTHB

truncated

CVTFW

truncated

CVTDW

truncated

CVTGW

truncated

CVTHW

truncated

CVTFL

truncated

CVTRFL

rounded

CVTDL

truncated

CVTRDL

rounded

CVTGL

truncated

CVTRGL

rounded

CVTHL

truncated

CVTRHL

rounded

CVTFD

exact

CVTFG

exact

CVTFH

exact

CVTDF

rounded

CVTDH

exact

CVTGF

rounded

CVTGH

exact

CVTHF

rounded

CVTHD

rounded

CVTHG

rounded

Only CVTDF, CVTGF, CVTHF, CVTHD, and CVTHG can result in a
floating overflow fault; the destination operand is unaffected and the
condition codes are UNPREDICTABLE.

Only converts with a floating-point source operand can result in a reserved
operand fault. On a reserved operand fault, the destination operand is
unaffected and the condition codes are UNPREDICTABLE.

Only converts with an integer destination operand can result in integer
overflow. On integer overflow, the destination operand is replaced by the
low-order bits of the true result.

4 Only CVTGF, CVTHF, CVTHD, and CVTHG can result in floating un¬
derflow. If FU is set, a fault occurs. On a floating underflow fault, the
destination operand is unaffected. If FU is clear, the destination operand
is replaced by 0 and no exception occurs.

9-110

VAX MACRO and Instruction Set
Floating Point Instructions—DIV

DIV
FORMATS

Divide1

2 operand:
3 operand:

condition codes n

0;
0;

opcodes

divr.rx, quo.mx
divr.rx, divd.rx, quo. wx

quo LSS 0;
quo EQL 0;

exceptions

opcode
opcode

floating overflow
floating underflow
divide by 0
reserved operand

DIVF2

Divide F_floating 2 Operand

DIVF3

Divide F_floating 3 Operand

DIVD2

Divide D_floating 2 Operand

DIVD3

Divide D_floating 3 Operand

46FD

DIVG2

Divide G_floating 2 Operand

47FD

DIVG3

Divide G_floating 3 Operand

66FD

DIVH2

Divide FI_floating 2 Operand

67FD

DIVH3

Divide H_floating 3 Operand

DESCRIPTION

In 2 operand format, the quotient operand is divided by the divisor operand
and the quotient operand is replaced by the rounded result. In 3 operand
format, the dividend operand is divided by the divisor operand and the
quotient operand is replaced by the rounded result.

NOTES

On a reserved operand fault, the quotient operand is unaffected and the
condition codes are UNPREDICTABLE.

2 On floating underflow, if FU is set, a fault occurs. On a floating underflow
fault, the quotient operand is unaffected. If FU is clear, the quotient
operand is replaced by 0 and no exception occurs.

3 On floating overflow, the instruction faults; the quotient operand is
unaffected, and the condition codes are UNPREDICTABLE.

4 On divide by 0, the quotient operand and condition codes are affected as
in note 3, above.

9-m

VAX MACRO and Instruction Set
Floating Point Instructions—EMOD

EMOD
Extended Multiply and Integerize1

FORMATS

EMODF and EMODD:
opcode

mulr.rx, mulrx.rb, muld.rx, int.wl, fract.wx

EMODG and EMODH:
opcode mulr.rx, mulrx.rw, muld.rx, int.wl, fract.wx
condition codes

N
Z
V
C

exceptions

integer overflow
floating underflow
reserved operand

opcodes

DESCRIPTION

<- fract LSS 0;
«— fract EQL 0;
<— {integer overflow);
— 0;

EMODF

Extended Multiply and Integerize F_floating

EMODD

Extended Multiply and Integerize D_floating

54FD

EMODG

Extended Multiply and Integerize G_floating

74FD

EMODFI

Extended Multiply and Integerize FLfloating

The multiplier extension operand is concatenated with the multiplier operand
to gain 8 (EMODD and EMODF), 11 (EMODG), or 15 (EMODH) additional
low-order fraction bits. The low-order 5 or 1 bits of the 16-bit multiplier
extension operand are ignored by the EMODG and EMODH instructions,
respectively. The multiplicand operand is multiplied by the extended multi¬
plier operand. The multiplication is such that the result is equivalent to the
exact product truncated (before normalization) to a fraction field of 32 bits in
F_floating, 64 bits in D_-floating and G_floating, and 128 bits in FL_floating.
The result is regarded as the sum of an integer and fraction of the same sign;
the integer operand is replaced by the integer part of the result, and the
fraction operand is replaced by the rounded fractional part of the result.

Except for CLRD, MOV AD, and PUSHAD (which have the same opcodes as CLRQ, MOVAQ, and PUSHAQ, respectively), D_floating and
H_floating instructions are not part of the MicroVAX architecture definition.

9-112

VAX MACRO and Instruction Set
Floating Point Instructions—EMOD

NOTES

On a reserved operand fault, the integer operand and the fraction operand
are unaffected. The condition codes are UNPREDICTABLE.

2 On floating underflow, if FU is set, a fault occurs. On a floating underflow
fault, the integer and fraction parts are unaffected. If FU is clear, the
integer and fraction parts are replaced by 0 and no exception occurs.

3 On integer overflow, the integer operand is replaced by the low-order bits
of the true result.

4 Floating overflow is indicated by integer overflow; however, integer
overflow is possible in the absence of floating overflow.

5 The signs of the integer and fraction are the same unless integer overflow
results.

6 Because the fraction part is rounded after separation of the integer part, it
is possible that the value of the fraction operand is 1.

9-113

VAX MACRO and Instruction Set
Floating Point Instructions—MNEG

MNEG
Move Negated1

FORMAT

opcode

condition codes

N
Z
V
C

exception

reserved operand

opcodes

MNEGF

Move Negated F_floating

MNEGD

Move Negated D_floating

DESCRIPTION

src.rx, dst.wx

— dst LSS 0;
«— dst EQL 0;
_ 0;
— 0;

52FD

MNEGG

Move Negated G_floating

72FD

MNEGFI

Move Negated H_floating

The destination operand is replaced by the negative of the source operand.

1 Except for CLRD, MOVAD, and PUSHAD (which have the same opcodes as CLRQ, MOVAQ, and PUSHAQ, respectively), D_floating and
H_floating instructions are not part of the MicroVAX architecture definition.

9-114

VAX MACRO and Instruction Set
Floating Point Instructions—MOV

MOV
Move1

FORMAT

opcode

src.rx, dst.wx

condition codes

N
Z
V
C

exception

reserved operand

opcodes

MOVF

Move F_floating

MOVD

Move D_floating

50FD

MOVG

Move G_floating

70FD

MOVH

Move H_floating

«- dst LSS 0;
<— dst EQL 0;
4- 0;
_ C;

DESCRIPTION

The destination operand is replaced by the source operand.

NOTE

On a reserved operand fault, the destination operand is unaffected and the
condition codes are UNPREDICTABLE.

9-115

VAX MACRO and Instruction Set
Floating Point Instructions—MUL

MUL
Multiply1

FORMATS

2 operand:
3 operand:

condition codes

N <- prod LSS 0;
Z «— prod EQL 0;
V — 0;
C «- 0;

exceptions

floating overflow
floating underflow
reserved operand

opcodes

DESCRIPTION

NOTES

opcode
opcode

mulr.rx, prod.mx
mulr.rx, muld.rx, prod, wx

MULF2

Multiply F_floating 2 Operand

MULF3

Multiply F_floating 3 Operand

MULD2

Multiply D_floating 2 Operand

MULD3

Multiply D_floating 3 Operand

44FD

MULG2

Multiply G_floating 2 Operand

45FD

MULG3

Multiply G_floating 3 Operand

64FD

MULH2

Multiply H_floating 2 Operand

65FD

MULH3

Multiply H_floating 3 Operand

In 2 operand format, the product operand is multiplied by the multiplier
operand and the product operand is replaced by the rounded result. In 3
operand format, the multiplicand operand is multiplied by the multiplier
operand and the product operand is replaced by the rounded result.

1 On a reserved operand fault, the product operand is unaffected and the
condition codes are UNPREDICTABLE.

On floating underflow, if FU is set, a fault occurs. On a floating underflow
fault, the product operand is unaffected. If FU is clear, the product
operand is replaced by 0 and no exception occurs.

On floating overflow, the instruction faults; the product operand is unaf¬
fected, and the condition codes are UNPREDICTABLE.

9-116

VAX MACRO and Instruction Set
Floating Point Instructions—POLY

POLY
Polynomial Evaluation1

FORMAT

opcode

condition codes

N — RO LSS 0;
Z
R0 EQL 0;
V «- 0;
C — 0;

exceptions

floating overflow
floating underflow
reserved operand

opcodes

DESCRIPTION

arg.rx, degree, rw, tbladdr.ab

POLYF

POLYD

Polynomial Evaluation F_floating
Polynomial Evaluation D_floating

55FD

POLYG

Polynomial Evaluation G_floating

75FD

POLYH

Polynomial Evaluation H_floating

The table address operand points to a table of polynomial coefficients. The
coefficient of the highest-order term of the polynomial is pointed to by the
table address operand. The table is specified with lower-order coefficients
stored at increasing addresses. The data type of the coefficients is the same
as the data type of the argument operand. The evaluation is carried out by
Homer's method and the contents of RO (Rl'RO for POLYD and POLYG,
R3'R2'R1'R0 for POLYH) are replaced by the result. The result computed is:
if d = degree
and x = arg
result = C[0]*x**0 + x*(C[l]

+ x*(C[2]

+ ... x*C[d]))

The unsigned word degree operand specifies the highest-numbered coefficient
to participate in the evaluation. POLYH requires four longwords on the stack
to store arg in case the instruction is interrupted.

NOTES

After execution:
POLYF:
RO = result
R1 =0
R2 = 0
R3 = table address + degree*4 + 4

1 Except for CLRD, MOV AD, and PUSHAD (which have the same opcodes as CLRQ, MOVAQ, and PUSHAQ, respectively), D_floating and
H__floating instructions are not part of the Micro VAX architecture definition.

9-117

VAX MACRO and Instruction Set
Floating Point Instructions—POLY

POLYD and POLYG:
RO = high-order part of result
R1 = low-order part of result
R2 = 0
R3 = table address + degree*8 + 8
R4 = 0
R5 = 0
POLYH:
RO = highest-order part of result
R1 = second-highest-order part of result
R2 = second-lowest-order part of result
R3 = lowest-order part of result
R4 = 0
R5 = table address + degree* 16 + 16
2

On a floating fault:
•

If PSL <FPD> = 0, the instruction faults and all relevant side effects
are restored to their original state.

•

If PSL <FPD> = 1, the instruction is suspended and the state is saved
in the general registers as follows:
POLYF:
RO = tmp3

! Partial result after iteration
!
prior to the one causing the
!
overflow/underflow

R1 = arg
R2<7:0> = tmpl
! Number of iterations remaining
R2<31:8> = implementation specific
R3 = tmp2
! Points to table entry causing
!
exception
POLYD and POLYG:
Rl'RO = tmp3

! Partial result after iteration
!
prior to the one causing the
!
overflow/underflow
R2<7:0> = tmpl
! Number of iterations remaining
R2<31:8> = implementation specific
R3 = tmp2
! Points to table entry causing
!
exception
R5'R4 = arg
POLYH:
R3'R2'Rl'RO = tmp3

! Partial result after iteration
!
prior to the one causing the
!
overflow/underflow
R4<7:0> = tmpl
! Number of iterations remaining
R4<31:8> = implementation specific
R5 = tmp2
! Points to table entry causing
!
exception

arg is saved on the stack in use during the faulting instruction.
Implementation-specific information is saved to allow the instruction to
continue after possible scaling of the coefficients and partial result by
the fault handler.
3

9—118

If the unsigned word degree operand is 0 and the argument is not a
reserved operand, the result is C[0].

VAX MACRO and Instruction Set
Floating Point Instructions—POLY

4 If the unsigned word degree operand is greater than 31, a reserved
operand fault occurs.

5 On a reserved operand fault:

•

if PSL <FPD> = 0, the reserved operand is either the degree operand
(greater than 31), or the argument operand, or some coefficient.

•

if PSL<FPD> = 1, the reserved operand is a coefficient, and R3
(except for POLYH) or R5 (for POLYH) is pointing at the value that
caused the exception.

•

The state of the saved condition codes and the other registers is
UNPREDICTABLE. If the reserved operand is changed and the con¬
tents of the condition codes and all registers are preserved, the fault is
continuable.

On floating underflow after the rounding operation at any iteration of the
computation loop, a fault occurs if FU is set. If FU is clear, the temporary
result (tmp3) is replaced by 0 and the operation continues. In this case,
the final result may be nonzero if underflow occurred before the last
iteration.

7 On floating overflow after the rounding operation at any iteration of the
computation loop, the instruction terminates with a fault.
8

If the argument is 0 and one of the coefficients in the table is the reserved
operand, whether a reserved operand fault occurs is UNPREDICTABLE.

For POLYH, some implementations may not save arg on the stack until
after an interrupt or fault occurs. However, arg will always be on the
stack if an interrupt or floating fault occurs after FPD is set. If the four
longwords on the stack overlap any of the source operands, the results are
UNPREDICTABLE.

EXAMPLE
; To compute P(x) = CO + Cl*x + C2*x**2
; where CO = 1. 0,
Cl = .5. 5

PTABLE:

POLYF

X,#2,PTABLE

.FLOAT
.FLOAT
.FLOAT

0.25
0.5
1.0

; C2
; Cl
; CO

9-119

VAX MACRO and Instruction Set
Floating Point Instructions—SUB

SUB
Subtract1

FORMATS

2 operand:
3 operand:

condition codes

dif LSS 0;
dif EQL 0;

0;
0;

c
exceptions

opcodes

opcode
opcode

sub.rx, dif.mx
sub.rx, min.rx, dif.wx

floating overflow
floating underflow
reserved operand

SUBF2

Subtract F_floating 2 Operand

SUBF3

Subtract F_floating 3 Operand

SUBD2

Subtract D_floating 2 Operand

SUBD3

Subtract D_floating 3 Operand

42FD

SUBG2

Subtract G_floating 2 Operand

43FD

SUBG3

Subtract G_floating 3 Operand

62FD

SUBH2

Subtract H_floating 2 Operand

63FD

SUBH3

Subtract H_floating 3 Operand

DESCRIPTION

In 2 operand format, the subtrahend operand is subtracted from the difference
operand and the difference is replaced by the rounded result. In 3 operand
format, the subtrahend operand is subtracted from the minuend operand and
the difference operand is replaced by the rounded result.

NOTES

On a reserved operand fault, the difference operand is unaffected and the
condition codes are UNPREDICTABLE.

2 On floating underflow, if FU is set, a fault occurs. Zero is stored as the
result of floating underflow only if FU is clear. On a floating underflow
fault, the difference operand is unaffected. If FU is clear, the difference
operand is replaced by 0 and no exception occurs.

3 On floating overflow, the instruction faults; the difference operand is
unaffected, and the condition codes are UNPREDICTABLE.

9-120

VAX MACRO and Instruction Set
Floating Point Instructions—TST

TST
Test1

FORMAT

opcode

src.rx

condition codes

N
Z
V
C

exception

reserved operand

opcodes

TSTF

Test F_floating

TSTD

Test D_floating

<— src LSS 0;
<— src EQL 0;
— 0;
«- 0;

53FD

TSTG

Test G_floating

73FD

TSTH

Test H_floating

DESCRIPTION

The condition codes are affected according to the value of the source operand.

NOTES

TSTx src is equivalent to CMPx src, #0, but is 5 (F_floating) or 9
(D_floating or G_floating) or 17 (H_floating) bytes shorter.

On a reserved operand fault, the condition codes are UNPREDICTABLE.

Except for CLRD, MOVAD, and PUSHAD (which have the same opcodes as CLRQ, MOVAQ, and PUSHAQ, respectively), D_floating and
H_floating instructions are not part of the MicroVAX architecture definition.

9-121

VAX MACRO and Instruction Set
Character String Instructions

9.11

Character String Instructions
A character string is specified by two operands:
1

An unsigned word operand that specifies the length of the character string
in bytes.

2 The address of the lowest-addressed byte of the character string. This is
specified by a byte operand of address access type.
Each of the character string instructions uses general registers RO through
Rl, RO through R3, or RO through R5 to contain a control block that main¬
tains updated addresses and state during the execution of the instruction. At
completion, these registers are available to software to use as string specifica¬
tion operands for a subsequent instruction on a contiguous character string.
During the execution of the instructions, pending interrupt conditions are
tested; if any is found, the control block is updated, a first-part-done bit is set
in the PSL, and the instruction is interrupted (see Chapter 6 of the VAX-11
Architecture Reference Manual). After the interruption, the instruction resumes
transparently. The format of the control block is:
1

LENGTH 1

ADDRESS 1
1

LENGTH 2

ADDRESS 2
1

LENGTH 3

ADDRESS 3

: RO

: Rl

: R2

: R3

: R4

: R5

The fields LENGTH 1, LENGTH 2 (if required) and LENGTH 3 (if required)
contain the number of bytes remaining to be processed in the first, second
and third string operands, respectively. The fields ADDRESS 1, ADDRESS 2
(if required) and ADDRESS 3 (if required) contain the address of the next byte
to be processed in the first, second, and third string operands, respectively.
Memory access faults will not occur when a zero-length string is specified
because no memory reference occurs.
The following instructions are described in this section.

9-122

Description
and Opcode

Number of
Instructions

Compare Characters 3 Operand
CMPC3 len.rw, srcladdr.ab, src2addr.ab,
{R0-3.wl}

Compare Characters 5 Operand
CMPC5 srcllen.rw, srcladdr.ab, fill.rb,
src2len.rw, src2addr.ab, {R0-3.wl}

Locate Character
LOCC char.rb, len.rw, addr.ab, {R0-1.wl}

VAX MACRO and Instruction Set
Character String Instructions

Description
and Opcode

Number of
Instructions

Match Characters
MATCHC lenl.rw, addrl.ab, Ien2.rw/ addr2.ab/
{R0-3.wl}

Move Character 3 Operand
MOVC3 len.rw, srcaddr.ab, dstaddr.ab,
{R0-5.wl}

Move Character 5 Operand
MOVC5 srclen.rw, srcaddr.ab, fill.rb,
dstlen.rw, dstaddr.ab, {R0-5.wl}

Move Translated Characters
MOVTC srclen.rw, srcaddr.ab, fill.rb,
tbladdr.ab, dstlen.rw, dstaddr.ab, {R0-5.wl}

Move Translated Until Character
MOVTUC srclen.rw, srcaddr.ab, esc.rb,
tbladdr.ab, dstlen,rw, dstaddr.ab, {R0-5.wl}

Scan Characters
SCANC len.rw, addr.ab, tbladdr.ab, mask.rb,
{R0-3.wl|

10.

Skip Character
SKPC char.rb, len.rw, addr.ab, {R0-1.wl}

11.

Span Characters
SPANC len.rw, addr.ab, tbladdr.ab,
mask.rb, {R0-3.wl}

9-123

VAX MACRO and Instruction Set
Character String Instructions—CMPC

CMPC
Compare Characters1

FORMATS

3 operand:
5 operand:

opcode
opcode

len.rw, srcladdr.ab, src2addr.ab
src 1 len. rw, src 1 addr. ab, fill, rb,
src2len.rw, src2addr.ab

condition codes

N
Z
V
C

exceptions

None.

opcodes

CMPC3

Compare Characters 3 Operand

CMPC5

Compare Characters 5 Operand

<— {first byte) LSS {second byte};
<— {first byte) EQL {second byte};
— 0;
«— {first byte} LSSU {second byte};

DESCRIPTION In 3 operand format, the bytes of string 1 specified by the length and address 1

operands are compared with the bytes of string2 specified by the length and
address2 operands. Comparison proceeds until inequality is detected or all
the bytes of the strings have been examined. Condition codes are affected
by the result of the last byte comparison. In 5 operand format, the bytes
of the string 1 operand specified by the length 1 and address 1 operands are
compared with the bytes of the string2 operand specified by the length2
and address2 operands. If one string is longer than the other, the shorter
string is conceptually extended to the length of the longer by appending (at
higher addresses) bytes equal to the fill operand. Comparison proceeds until
inequality is detected or all the bytes of the strings have been examined.
Condition codes are affected by the result of the last byte comparison. For
either CMPC3 or CMPC5, two zero-length strings compare equal (that is, Z is
set and N, V, and C are cleared).

NOTES

After execution of CMPC3:
RO =

number of bytes remaining in string 1 (including byte that terminated
comparison); RO is 0 only if strings are equal

R1 =

address of the byte in string 1 that terminated comparison; if strings
are equal, address of one byte beyond string 1

R2 =

R3 =

address of the byte in string2 that terminated comparison; if strings
are equal, address of one byte beyond string2

This instruction is not part of the Micro VAX architecture definition.

9-124

VAX MACRO and Instruction Set
Character String Instructions—CMPC

2 After execution of CMPC5:
RO =

number of bytes remaining in string 1 (including byte that terminated
comparison); RO is 0 only if string 1 and string2 are of equal length
and equal or string 1 was exhausted before comparison terminated

R1 =

address of the byte in string 1 that terminated comparison; if compar¬
ison did not terminate before string 1 exhausted, address of one byte
beyond string 1

R2 =

number of bytes remaining in string2 (including byte that terminated
comparison); R2 is 0 only if string2 and string 1 are of equal length or
string2 was exhausted before comparison terminated

R3 =

address of the byte in string2 that terminated comparison; if compar¬
ison did not terminate before string2 was exhausted, address of one
byte beyond string2

3 If both strings have 0 length, condition code Z is set and N, V, and C are
cleared just as in the case of two equal strings.

9-125

VAX MACRO and Instruction Set
Character String Instructions—LOCC

LOCC
Locate Character1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

char.rb, len.rw, addr.ab

«- 0;
«- R0 EQL 0;
«- 0;
<— 0;

LOCC

Locate Character

DESCRIPTION

The character operand is compared with the bytes of the string specified by
the length and address operands. Comparison continues until equality is
detected or all bytes of the string have been compared. If equality is detected,
the condition code Z-bit is cleared; otherwise the Z-bit is set.

NOTES

After execution:
RO =

number of bytes remaining in the string (including located one) if byte
located; otherwise 0

R1 =

address of the byte located if byte located; otherwise address of one
byte beyond the string

If the string has 0 length, condition code Z is set just as though each byte
of the entire string were unequal to character.

This instruction is not part of the Micro VAX architecture definition.

9-126

VAX MACRO and Instruction Set
Character String instructions—MATCHC

MATCHC
Match Characters1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

NOTES

objlen.rw, objaddr.ab, srclen.rw, srcaddr.ab

<- 0;
<— R0 EQL 0; Imatch found
«- 0;
«— 0;

MATCHC

Match Characters

The source string specified by the source length and source address operands
is searched for a substring that matches the object string specified by the
object length and object address operands. If the substring is found, the
condition code Z-bit is set; otherwise, it is cleared.

1 After execution:
RO =

if a match occurred, 0; otherwise the number of bytes in the object
string

R1 =

if a match occurred, the address of one byte beyond the object string;
that is, objaddr + objlen; otherwise, the address of the object string

R2 =

if a match occurred, the number of bytes remaining in the source
string; otherwise 0

R3 =

if a match occurred, the address of one byte beyond the last byte
matched; otherwise, the address of one byte beyond the source
string; that is, srcaddr + srclen

For zero-length source and object strings, R3 and R1 contain the source
and object addresses, respectively.

If both strings have 0 length or if the object string has 0 length, condition
code Z is set and registers R0 through R3 are left just as though the
substring were found.

If the source string has 0 length and the object string has nonzero length,
condition code Z is cleared and registers R0 through R3 are left just as
though the substring were not found.

This instruction is not part of the Micro VAX architecture definition.

9-127

VAX MACRO and Instruction Set
Character String Instructions—MOVC

MOVC
Move Character

FORMATS

3 operand:
5 operand:

condition codes

N <— 0; !MOVC3
Z <- 1;
V
0;
C «- 0;

opcode
opcode

len.rw, srcaddr.ab, dstaddr.ab
srclen.rw, srcaddr.ab, fill.rb,
dstlen.rw, dstaddr.ab

N — srclen LSS dstlen; !MOVC5
Z
srclen EQL dstlen;
V — 0;
C <— srclen LSSU dstlen;

exceptions

None.

opcodes

MOVC3

Move Character 3 Operand

MOVC5

Move Character 5 Operand

DESCRIPTION

9—128

In 3 operand format, the destination string specified by the length and
destination address operands is replaced by the source string specified by the
length and source address operands. In 5 operand format, the destination
string specified by the destination length and destination address operands
is replaced by the source string specified by the source length and source
address operands. If the destination string is longer than the source string, the
highest-addressed bytes of the destination are replaced by the fill operand. If
the destination string is shorter than the source string, the highest-addressed
bytes of the source string are not moved. The operation of the instruction
is such that overlap of the source and destination strings does not affect the
result.

VAX MACRO and Instruction Set
Character String Instructions—MOVC

NOTES

After execution of MOVC3:
RO =

R1 =

address of one byte beyond the source string

R2 =

R3 =

address of one byte beyond the destination string

R4 =

R5 =

After execution of MOVC5:
RO =

number of unmoved bytes remaining in source string. RO is nonzero
only if source string is longer than destination string

R1 =

address of one byte beyond the last byte in source string that was
moved

R2 =

R3 =

address of one byte beyond the destination string

R4 =

R5 =

MOVC3 is the preferred way to copy one block of memory to another.

MOVC5 with a 0 source length operand is the preferred way to fill a block
of memory with the fill character.

VAX MACRO and Instruction Set
Character String Instructions—MOVTC

MOVTC
Move Translated Characters1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

srclen.rw, srcaddr.ab, fill.rb, tbladdr.ab,
dstlen.rw, dstaddr.ab

<— srclen LSS dstlen;
<— srclen EQL dstlen;
«_ 0;
♦— srclen LSSU dstlen;

MOVTC

Move Translated Characters

The source string specified by the source length and source address operands
is translated; it replaces the destination string specified by the destination
length and destination address operands. Translation is accomplished by
using each byte of the source string as an index into a 256-byte table whose
first entry (entry number 0) address is specified by the table address operand.
The byte selected replaces the byte of the destination string. If the destination
string is longer than the source string, the highest-addressed bytes of the
destination string are replaced by the fill operand. If the destination string
is shorter than the source string, the highest-addressed bytes of the source
string are not translated and moved. The operation of the instruction is such
that overlap of the source and destination strings does not affect the result.
If the destination string overlaps the translation table, the destination string is
UNPREDICTABLE.

NOTES

After execution:
RO =

number of untranslated bytes remaining in source string; RO is
nonzero only if source string is longer than destination string

R1 =

address of one byte beyond the last byte in source string that was
translated

R2 =

R3 =

address of the translation table

R4 =

R5 =

address of one byte beyond the destination string

This instruction is not part of the MicroVAX architecture definition.

9-130

VAX MACRO and Instruction Set
Character String Instructions—MOVTUC

MOVTUC
Move Translated Until Character1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

DESCRIPTION

srclen.rw, srcaddr.ab, esc.rb, tbladdr.ab,
dstlen. rw, dstaddr.ab

<— srclen LSS dstlen;
<— srclen EQL dstlen;
<— {terminated by escape};
<— srclen LSSU dstlen;

MOVTUC

Move Translated Until Character

The source string specified by the source length and source address operands
is translated; it replaces the destination string specified by the destination
length and destination address operands. Translation is accomplished by
using each byte of the source string as an index into a 256-byte table whose
first entry address (entry number 0) is specified by the table address operand.
The byte selected replaces the byte of the destination string. Translation
continues until a translated byte is equal to the escape byte, or until the
source string or destination string is exhausted. If translation is terminated
because of escape, the condition code V-bit is set; otherwise it is cleared.
If the destination string overlaps the table, the destination string and registers
R0 through R5 are UNPREDICTABLE. If the source and destination strings
overlap and their addresses are not identical, the destination string and
registers R0 through R5 are UNPREDICTABLE. If the source and destination
string addresses are identical, the translation is performed correctly.

This instruction is not part of the Micro VAX architecture definition.

9-131

VAX MACRO and Instruction Set
Character String Instructions—MOVTUC

NOTES

9-132

After execution:
RO =

number of bytes remaining in source string (including the byte that
caused the escape); RO is 0 only if the entire source string was
translated and moved without escape

R1 =

address of the byte that resulted in destination string exhaustion or
escape; or if no exhaustion or escape, address of 1 byte beyond the
source string

R2 =

R3 =

address of the table

R4 =

number of bytes remaining in the destination string

R5 =

address of the byte in the destination string that would have received
the translated byte that caused the escape, or would have received
a translated byte if the source string were not exhausted; or if no
exhaustion or escape, the address of one byte beyond the destination
string

VAX MACRO and Instruction Set
Character String Instructions—SCANC

SCANC
Scan Characters1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

len.rw, addr.ab, tbladdr.ab, mask.rb

<- 0;
«- R0 EQL 0;
_ 0;
— 0;

SCANC

Scan Characters

DESCRIPTION The bytes of the string specified by the length and address operands are

successively used to index into a 256-byte table whose first entry (entry
number 0) address is specified by the table address operand. The logical
AND is performed on the byte selected from the table and the mask operand.
The operation continues until the result of the AND is nonzero, or until all
the bytes of the string have been exhausted. If a nonzero AND result is
detected, the condition code Z-bit is cleared; otherwise, the Z-bit is set.

NOTES

After execution:
RO =

number of bytes remaining in the string (including the byte that
produced the nonzero AND result); RO is 0 only if there was no
nonzero AND result

R1 =

address of the byte that produced the nonzero AND result; if no
nonzero result, address of one byte beyond the string

R2 =

R3 =

address of the table

If the string has 0 length, condition code Z is set just as though the entire
string were scanned.

This instruction is not part of the Micro VAX architecture definition.

9-133

VAX MACRO and Instruction Set
Character String Instructions—SKPC

SKPC
Skip Character1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

char.rb, len.rw, addr.ab

«- 0;
«- R0 EQL 0;
«_ 0;
«- 0;

SKPC

Skip Character

DESCRIPTION

The character operand is compared with the bytes of the string specified
by the length and address operands. Comparison continues until inequality
is detected or all bytes of the string have been compared. If inequality is
detected, the condition code Z-bit is cleared; otherwise, the Z-bit is set.

NOTES

After execution:
RO =

number of bytes remaining in the string (including the unequal one) if
unequal byte located; otherwise 0

R1 =

address of the byte located if byte located; otherwise address of one
byte beyond the string

If the string has 0 length, condition code Z is set just as though each byte
of the entire string were equal to the character.

This instruction is not part of the MicroVAX architecture definition.

9-134

VAX MACRO and Instruction Set
Character String Instructions—SPANC

SPANC
Span Characters1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

len.rw, addr.ab, tbladdr.ab, mask.rb

«- 0;
^ RO EQL 0;
«- 0;
<- 0;

SPANC

Span Characters

DESCRIPTION

The bytes of the string specified by the length and address operands are
successively used to index into a 256-byte table whose first entry (entry
number 0) address is specified by the table address operand. The logical
AND is performed on the byte selected from the table and the mask operand.
The operation continues until the result of the AND is 0, or until all the
bytes of the string have been exhausted. If a 0 AND result is detected, the
condition code Z-bit is cleared; otherwise, the Z-bit is set.

NOTES

After execution:
RO =

number of bytes remaining in the string (including the byte that
produced the 0 AND result); RO is 0 only if there was no 0 AND
result

R1 =

address of the byte that produced a 0 AND result; if no nonzero
result, address of one byte beyond the string

R2 =

R3 =

address of the table

If the string has 0 length, the condition code Z-bit is set just as though the
entire string were spanned.

This instruction is not part of the MicroVAX architecture definition.

9-135

VAX MACRO and Instruction Set
Cyclic Redundancy Check Instruction

9.12

Cyclic Redundancy Check Instruction
This instruction is designed to implement the calculation and checking of
a cyclic redundancy check for any CRC polynomial up to 32 bits. Cyclic
redundancy checking is an error detection method involving a division
of the data stream by a CRC polynomial. The data stream is represented
as a standard VAX string in memory. Error detection is accomplished by
computing the CRC at the source and again at the destination, comparing
the CRC computed at each end. The choice of the polynomial is such as
to minimize the number of undetected block errors of specific lengths. The
choice of a CRC polynomial is not given here; see, for example, the article
"Cyclic Codes for Error Detection" by W. Peterson and D. Brown in the
Proceedings of the IRE (January, 1961).
The operands to the CRC instruction are a string descriptor, a 16-longword
table, and an initial CRC. The string descriptor is a standard VAX operand
pair of the length of the string in bytes (up to 65,535) and the starting address
of the string. The contents of the table are a function of the CRC polynomial
to be used. It can be calculated from the polynomial by the algorithm in the
notes. Several common CRC polynomials are also included in the notes. The
initial CRC is used to start the polynomial correctly. Typically, it has the
value 0 or -1, but would be different if the data stream is represented by a
sequence of noncontiguous strings.
The CRC instruction operates by scanning the string, including each byte
of the data stream in the CRC being calculated. The byte is included by
performing a logical XOR on it with the rightmost eight bits of the CRC.
Then the CRC is shifted right one bit, inserting 0 on the left. The rightmost
bit of the CRC (lost by the shift) is used to control the XOR operation
of the CRC polynomial with the resultant CRC. If the bit is set, a logical
XOR is performed on the polynomial and the CRC. Then the CRC is again
shifted right and a conditional logical XOR is performed on the polynomial
with the result, for a total of eight times. The actual algorithm used can
shift by one, two, or four bits at a time using the appropriate entries in
a specially constructed table. The instruction produces a 32-bit CRC. For
shorter polynomials, the result must be extracted from the 32-bit field. The
data stream must be a multiple of eight bits in length. If it is not, the stream
must be right-adjusted in the string with leading 0 bits.

9-136

VAX MACRO and Instruction Set
Cyclic Redundancy Check Instruction—CRC

CRC

Calculate Cyclic Redundancy Check1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

None.

opcodes

tbl.ab, inicrc.rl, strlen.rw, stream, ab

«- RO LSS 0;
— R0 EQL 0;
^ 0;
<- 0;

CRC

Calculate Cyclic Redundancy Check

DESCRIPTION

The CRC of the data stream described by the string descriptor is calculated.
The initial CRC is given by inicrc; it is normally 0 or -1, unless the CRC is
calculated in several steps. The result is left in RO. If the polynomial is less
than order 32, the result must be extracted from the low-order bits of RO. The
CRC polynomial is expressed by the contents of the 16-longword table. See
the notes for the calculation of the table.

NOTES

If the data stream is not a multiple of eight bits, it must be right-adjusted
with leading 0 fill.

If the CRC polynomial is less than order 32, the result must be extracted
from the low-order bits of RO.

The following algorithm can be used to calculate the CRC table given a
polynomial expressed thus:
polyn<n> <- {coefficient of x**{order -l-n»

This routine is available as system library routine LIB$CRC_TABLE (poly.rl,
table.ab). The table is the location of the 64-byte (16-longword) table into
which the result will be written.

This instruction is not part of the Micro VAX architecture definition.

9-137

VAX MACRO and Instruction Set
Cyclic Redundancy Check Instruction—CRC

SUBROUTINE LIB$CRC_TABLE (POLY, TABLE)
INTEGER*4 POLY, TABLE(0:15), TMP, X
DO 190 INDEX = 0.

150
190

TMP = INDEX
DO 150 I = 1, 4
X = TMP .AND. 1
TMP = ISHFT(TMP.-l)
IF (X .EQ. 1) TMP =
CONTINUE
TABLE(INDEX) = TMP

!logical shift right one bit
TMP .XOR. POLY

CONTINUE
RETURN
END

The following are descriptions of some commonly used CRC polynomials.
CRC-16 (used in DDCMP and Bisync)
polynomial:
poly:
initialize:
result:
CCITT

x~16 + x~15 + x~2 + 1
120001 (octal)
0
R0<15:0>

(used in ADCCP, HDLC, SDLC)
polynomial:
poly:
initialize:
result:

x~16 + x~12 + x~5 ♦ 1
102010 (octal)
-1<15:0>
one's complement of R0<15:0>

AUTODIN-II
polynomial:
poly:
initialize:
result:

x~32+x~26+x~23+x~22+x~16+x~12
+x~ 1 l+x~ 10+x~8+x~7+x~5+x~4+x~2+x+l
EDB88320 (hex)
-1<31:0>
one's complement of R0<31:0>

This instruction produces an UNPREDICTABLE result unless the table
is well formed, like the one produced in note 3. Note that for any well
formed table, entry[0] is always 0 and entry[8] is always the polynomial
expressed as in note 3. The operation can be implemented using shifts of
one, two, or four bits at a time, as follows:
Shift
(8)

Steps
per Byte
(limit)

Table Index

Table Index
Multiplier
(i)

Use Table
Entries

tmp3<0>

tmp3<l:0>

[0]=0, [8]
[0] =0, [4] , |

tmp3<3:0>

all

If the stream has 0 length. RO receives the initial CRC.

9-138

VAX MACRO and Instruction Set
Decimal String Instructions

9.13

Decimal String Instructions
Decimal string instructions operate on packed decimal strings. Conversion
instructions are provided between packed decimal, trailing numeric string
(overpunched and zoned), and leading separate numeric string formats.
Where necessary, a specific data type is identified. Where the phrase "decimal
string" is used, it means any of the three data types.
A decimal string is specified by two operands:
1

For all decimal strings, the length is the number of digits in the string.
The number of bytes in the string is a function of the length and the type
of decimal string referenced (see Section 8).

The address of the lowest-addressed byte of the string. This byte contains
the most-significant digit for trailing numeric and packed decimal strings.
This byte contains a sign for leading separate numeric strings. The address
is specified by a byte operand of address access type.

Each of the decimal string instructions uses general registers RO through R3
or RO through R5 to contain a control block that maintains updated addresses
and state during the execution of the instruction. At completion, the registers
containing addresses are available to the software to use as string specification
operands for a subsequent instruction on the same decimal strings.
During the execution of the instructions, pending interrupt conditions are
tested; if any is found, the control block is updated. First Part Done is set
in the PSL, and the instruction is interrupted (see Chapter 6 of the VAX-11
Architecture Reference Manual). After the interruption, the instruction resumes
transparently. The format of the control block at completion is:
3

o
RO
ADDRESS 1

: R1

ADDRESS 2

I : R3
-+

I : R4
-+

ADDRESS 3

: R5

The fields ADDRESS 1, ADDRESS 2 and ADDRESS 3 (if required) contain the
address of the byte containing the most-significant digit of the first, second,
and third (if required) string operands, respectively.
The decimal string instructions treat decimal strings as integers with the
decimal point assumed immediately beyond the least-significant digit of the
string. If a string in which a result is to be stored is longer than the result, its
most-significant digits are filled with Os.

9—139

VAX MACRO and Instruction Set
Decimal String Instructions

9.13.1 Decimal Overflow
Decimal overflow occurs if the destination string is too short to contain all
the digits (excluding leading Os) of the result. On overflow, the destination
string is replaced by the correctly signed least-significant digits of the true
result (even if the stored result is -0). Note that neither the high nibble of
an even-length packed decimal string, nor the sign byte of a leading separate
numeric string is used to store result digits.

9.13.2 Zero Numbers
A 0 result has a positive sign for all operations that complete without decimal
overflow, except for CVTPT, which does not change a -0 to a +0. However,
when digits are lost because of overflow, a 0 result receives the sign (positive
or negative) of the correct result.
A decimal string with value -0 is treated as identical to a decimal string with
value +0. Thus, for example, +0 compares as equal to -0. When condition
codes are affected on a -0 result, they are affected as if the result were +0;
that is, N is cleared and Z is set.

9.13.3 Reserved Operand Exception
A reserved operand abort occurs if the length of a decimal string operand is
outside the range 0 through 31, or if an invalid sign or digit is encountered in
CVTSP or CVTTP. The PC points to the opcode of the instruction causing the
exception.

9.13.4 UNPREDICTABLE Results
The result of any operation is UNPREDICTABLE if any source decimal string
operand contains invalid data. Except for CVTSP and CVTTP, the decimal
string instructions do not verify the validity of source operand data.
If the destination operands overlap any source operands, the result of an
operation will, in general, be UNPREDICTABLE. The destination strings,
registers used by the instruction, and condition codes will, in general, be
UNPREDICTABLE when a reserved operand abort occurs.

9.13.5 Packed Decimal Operations
Packed decimal strings generated by the decimal string instructions always
have the preferred sign representation: 12 for *+” and 13 for u-” . An evenlength packed decimal string is always generated with a “0" digit in the high
nibble of the first byte of the string.
A packed decimal string contains an invalid nibble if:

9-140

•

A digit occurs in the sign position

•

A sign occurs in a digit position

•

A nonzero nibble occurs in the high-order nibble of the lowest-addressed
byte in an even length string

VAX MACRO and Instruction Set
Decimal String Instructions

9.13.6 Zero-Length Decimal Strings
The length of a packed decimal string can be 0. In this case, the value is 0
(plus or minus) and one byte of storage is occupied. This byte must contain a
"0" digit in the high nibble and the sign in the low nibble.
The length of a trailing numeric string can be 0. In this case, no storage
is occupied by the string. If a destination operand is a zero-length trailing
numeric string, the sign of the operation is lost. Memory access faults will
not occur when a zero-length trailing numeric operand is specified because no
memory reference occurs. The value of a zero-length trailing numeric string
is identically 0.
The length of a leading separate numeric string can be 0. In this case, one
byte of storage is occupied by the sign. Memory is accessed when a zerolength operand is specified, and a reserved operand abort will occur if an
invalid sign is detected. The value of a zero-length leading separate numeric
string is identically 0.

9.13.7 Instruction Descriptions
The following instructions are described in this section.
Description
and Opcode

Number of
Instructions

Add Packed 4 Operand
ADDP4 addlen.rw, addaddr.ab, sumlen.rw,
sumaddr.ab, {R0-3.wl}

Add Packed 6 Operand
ADDP6 add 1 len.rw, addladdr.ab, add2len.rw,
add2addr.ab, sumlen.rw, sumaddr.ab,
{RO-5-wl}

Arithmetic Shift and Round Packed
ASHP cnt.rb, srclen.rw, srcaddr.ab,
round.rb, dstlen.rw, dstaddr.ab,
jR0-3.wl}

Compare Packed 3 Operand
CMPP3 len.rw, srcladdr.ab, src2addr.ab,
|RO-3.wl}

Compare Packed 4 Operand
CMPP4 srcllen.rw, srcladdr.ab, src2len.rw,
src2addr.ab, {RO-3.wl}

Convert Long to Packed
CVTLP src.rl, dstlen.rw, dstaddr.ab,
{RO-3.wl|

Convert Packed to Long
CVTPL srclen.rw, srcaddr.ab, {R0-3.wl},
dst.wl

Convert Packed to Leading Separate
CVTPS srclen.rw, srcaddr.ab, dstlen.rw,
dstaddr.ab, {RO-3.wl}

9—141

VAX MACRO and Instruction Set
Decimal String Instructions

9-142

Description
and Opcode

Number of
Instructions

Convert Packed to Trailing
CVTPT srclen.rw, srcaddr.ab, tbladdr.ab,
dstlen.rw, dstaddr.ab, {R0-3.wl}

10.

Convert Leading Separate to Packed
CVTSP srclen.rw, srcaddr.ab, dstlen.rw,
dstaddr.ab, {R0-3.wl}

11.

Convert Trailing to Packed
CVTTP srclen.rw, srcaddr.ab, tbladdr.ab,
dstlen.rw, dstaddr.ab, {R0-3.wl}

12.

Divide Packed
DIVP divrlen.rw, divraddr.ab, divdlen.rw,
divdaddr.ab, quolen.rw, quoaddr.ab,
{R0-5.wl, — 16(SP):—1 (SP). wb}

13.

Move Packed
MOVP len.rw, srcaddr.ab, dstaddr.ab,
{R0-3.wl}

14.

Multiply Packed
MULP mulrlen.rw, mulraddr.ab, muldlen.rw,
muldaddr.ab, prodlen.rw, prodaddr.ab,
{R0-5.wl}

15.

Subtract Packed 4 Operand
SUBP4 sublen.rw, subaddr.ab, diflen.rw,
difaddr.ab, {R0-3.wl}

16.

Subtract Packed 6 Operand
SUBP6 sublen.rw, subaddr.ab, minlen.rw,
minaddr.ab, diflen.rw, difaddr.ab,
{RO-5-wl}

VAX MACRO and Instruction Set
Decimal String Instructions—ADDP

ADDP
Add Packed1

FORMATS

opcode

addlen.rw, addaddr.ab, sumlen.rw,
sumaddr.ab
add lien.rw, addladdr.ab, add2len.rw,
add2addr.ab, sumlen.rw, sumaddr.ab

opcode

condition codes

N <— jsum string) LSS 0;
Z
sum string} EQL 0;
V <— {decimal overflow};
C <- 0;

exceptions

reserved operand
decimal overflow

opcodes

DESCRIPTION

ADDP4

Add Packed 4 Operand

ADDP6

Add Packed 6 Operand

In 4 operand format, the addend string specified by the addend length and
addend address operands is added to the sum string specified by the sum
length and sum address operands, and the sum string is replaced by the
result.
In 6 operand format, the addend 1 string specified by the addend 1 length and
addend 1 address operands is added to the addend2 string specified by the
addend2 length and addend2 address operands. The sum string specified by
the sum length and sum address operands is replaced by the result.

NOTES

After execution of ADDP4:
RO =

R1 =

address of the byte containing the most-significant digit of the addend
string

R2 =

R3 =

address of the byte containing the most-significant digit of the sum
string

This instruction is not part of the Micro VAX architecture definition.

9-143

VAX MACRO and Instruction Set
Decimal String Instructions—ADDP

9—144

After execution of ADDP6:
RO =

R1 =

address of the byte containing the most-significant digit of the
addend 1 string

R2 =

R3 =

address of the byte containing the most-significant digit of the
addend2 string

R4 =

R5 =

address of the byte containing the most-significant digit of the sum
string

The sum string, RO through R3 (or RO through R5 for ADDP6) and the
condition codes are UNPREDICTABLE if the sum string overlaps the
addend, addendl, or addend2 strings; the addend, addendl, addend2
or sum (4 operand only) strings contain an invalid nibble; or a reserved
operand abort occurs.

VAX MACRO and Instruction Set
Decimal String instructions—ASHP

ASHP
Arithmetic Shift and Round Packed1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

reserved operand
decimal overflow

opcodes

cnt.rb, srclen.rw, srcaddr.ab, round, rb,
dstlen.rw, dstaddr.ab

<— jdst string) LSS 0;
<— dst string} EQL 0;
<■— decimal overflow};
«_ 0;

ASHP

Arithmetic Shift and Round Packed

DESCRIPTION The source string specified by the source length and source address operands
is scaled by a power of 10 specified by the count operand. The destination
string specified by the destination length and destination address operands is
replaced by the result.
A positive count operand effectively multiplies; a negative count effectively
divides; and a 0 count just moves and affects condition codes. When a
negative count is specified, the result is rounded using the round operand.

NOTES

1 After execution:
RO =

R1 =

address of the byte containing the most-significant digit of the source
string

R2 =

R3 =

address of the byte containing the most-significant digit of the
destination string

The destination string, RO through R3, and the condition codes are UN¬
PREDICTABLE if the destination string overlaps the source string, the
source string contains an invalid nibble, or a reserved operand abort
occurs.

When the count operand is negative, the result is rounded by decimally
adding bits 3:0 of the round operand to the most-significant low-order
digit discarded and propagating the carry, if any, to higher-order digits.
Both the source operand and the round operand are considered to be
quantities of the same sign for the purpose of this addition.

This instruction is not part of the MicroVAX architecture definition.

9-145

VAX MACRO and Instruction Set
Decimal String Instructions—ASHP

4 If bits 7:4 of the round operand are nonzero, or if bits 3:0 of the round
operand contain an invalid packed decimal digit, the result is
UNPREDICTABLE.

5 When the count operand is 0 or positive, the round operand has no effect
on the result except as specified in note 4.
6

9-146

The round operand is normally 5. Truncation may be accomplished by
using a 0 round operand.

VAX MACRO and Instruction Set
Decimal String Instructions—CMPP

CMPP
Compare Packed1

FORMATS

3 operand:

opcode

4 operand:

opcode

opcode len.rw, srcladdr.ab,
src2addr.ab
operand: opcode srcllen.rw,
srcladdr.ab, src2len.rw,
src2addr.ab

condition codes

N
Z
V
C

exception

reserved operand

opcodes

CMPP3

Compare Packed 3 Operand

CMPP4

Compare Packed 4 Operand

DESCRIPTION

<— jsrcl string} LSS {src2 string};
«— {srcl string} EQL {src2 string};
— 0;
«- 0;

In 3 operand format, the source 1 string specified by the length and source 1
address operands is compared to the source 2 string specified by the length
and source 2 address operands. The only action is to affect the condition
codes.
In 4 operand format, the source 1 string specified by the source 1 length and
source 1 address operands is compared to the source 2 string specified by the
source 2 length and source 2 address operands. The only action is to affect
the condition codes.

NOTES

After execution of CMPP3 or CMPP4:
RO =

R1 =

address of the byte containing the most-significant digit of string 1

R2 =

R3 =

address of the byte containing the most-significant digit of string2

R0 through R3 and the condition codes are UNPREDICTABLE if the
source strings overlap, if either string contains an invalid nibble, or if a
reserved operand abort occurs.

This instruction is not part of the MicroVAX architecture definition.

9-147

VAX MACRO and Instruction Set
Decimal String Instructions—CVTLP

CVTLP
Convert Long to Packed1

FORMAT

opcode

condition codes

N «— jdst string! LSS 0;
Z
dst string) EQL 0;
V <— decimal overflow};
C 4— 0;

exceptions

reserved operand
decimal overflow

opcodes

src.rl, dstlen.rw, dstaddr.ab

CVTLP

Convert Long to Packed

DESCRIPTION

The source operand is converted to a packed decimal string and the des¬
tination string operand specified by the destination length and destination
address operands is replaced by the result.

NOTES

After execution:
RO =

R1 =

R2 =

R3 =

address of the byte containing the most-significant digit of the
destination string

The destination string, RO through R3, and the condition codes are
UNPREDICTABLE on a reserved operand abort.

Overlapping operands produce correct results.

This instruction is not part of the Micro VAX architecture definition.

9-148

VAX MACRO and Instruction Set
Decimal String Instructions—CVTPL

CVTPL
Convert Packed to Long1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

reserved operand
integer overflow

opcodes

srclen.rw, srcaddr.ab, dst.wl

— dst LSS 0;
♦— dst EQL 0;
<— {integer overflow);
_ 0;

CVTPL

Convert Packed to Long

DESCRIPTION The source string specified by the source length and source address operands
is converted to a longword and the destination operand is replaced by the
result.

NOTES

1 After execution:
RO =

R1 =

address of the byte containing the most-significant digit of the source
string

R2 =

R3 =

The destination operand, RO through R3, and the condition codes are
UNPREDICTABLE on a reserved operand abort, or if the string contains
an invalid nibble.

The destination operand is stored after the registers are updated as spec¬
ified in note 1. Thus, RO through R3 may be used as the destination
operand.

If the source string has a value outside the range -2,147,483,648 through
+2,147,483,647, integer overflow occurs and the destination operand is
replaced by the low-order 32 bits of the correctly signed infinite precision
conversion. Thus, on overflow the sign of the destination may be different
from the sign of the source.

Overlapping operands produce correct results.

This instruction is not part of the Micro VAX architecture definition.

9-149

VAX MACRO and Instruction Set
Decimal String Instructions—CVTPS

CVTPS
Convert Packed to Leading Separate Numeric1

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

reserved operand
decimal overflow

opcodes

DESCRIPTION

srclen.rw, srcaddr.ab, dstlen.rw, dstaddr.ab

«- src string} LSS 0;
<- src string} EQL 0;
<- decimal overflow};
<- 0;

CVTPS

Convert Packed to Leading Separate Numeric

The source packed decimal string specified by the source length and source
address operands is converted to a leading separate numeric string. The
destination string specified by the destination length and destination address
operands is replaced by the result.
Conversion is effected by replacing the lowest-addressed byte of the destina¬
tion string with the ASCII character "+" or
, determined by the sign of the
source string. The remaining bytes of the destination string are replaced by
the ASCII representations of the values of the corresponding packed decimal
digits of the source string.

NOTES

1 After execution:
RO =

R1 =

address of the byte containing the most-significant digit of the source
string

R2 =

R3 =

address of the sign byte of the destination string

The destination string, RO through R3, and the condition codes are
UNPREDICTABLE if the destination string overlaps the source string,
the source string contains an invalid nibble, or a reserved operand abort
occurs.

This instruction produces an ASCII
destination string.

1 This instruction is not part of the MicroVAX architecture definition.

9-150

in the sign byte of the

VAX MACRO and Instruction Set
Decimal String Instructions—CVTPS

If decimal overflow occurs, the value stored in the destination may be
different from the value indicated by the condition codes (Z and N bits).

If the conversion produces a -0 without overflow, the destination leading
separate numeric string is changed to a +0 representation.

9-151

VAX MACRO and Instruction Set
Decimal String Instructions—CVTPT

CVTPT
Convert Packed to Trailing Numeric1

FORMAT

opcode

condition codes

N <— jsrc string} LSS 0;
Z
src string} EQL 0;
V ♦_ {decimal overflow};
C — 0;

exceptions

reserved operand
decimal overflow

opcodes

DESCRIPTION

srclen.rw, srcaddr.ab, tbladdr.ab, dstlen.rw,
dstaddr.ab

CVTPT

Convert Packed to Trailing Numeric

The source packed decimal string specified by the source length and source
address operands is converted to a trailing numeric string. The destination
string specified by the destination length and destination address operands is
replaced by the result. The condition code N and Z bits are affected by the
value of the source packed decimal string.
Conversion is effected by using the highest-addressed byte of the source
string (that is, the byte containing the sign and the least-significant digit),
even if the source string value is -0. This byte is used as an unsigned index
into a 256-byte table whose first entry (entry number 0) address is specified
by the table address operand. The byte read out of the table replaces the
least-significant byte of the destination string. The remaining bytes of the
destination string are replaced by the ASCII representations of the values of
the corresponding packed decimal digits of the source string.

NOTES

After execution:
RO =

R1 =

address of the byte containing the most-significant digit of the source
string

R2 =

R3 =

address of the most-significant digit of the destination string

The destination string, R0 through R3, and the condition codes are
UNPREDICTABLE if the destination string overlaps the source string or
the table; if the source string or the table contains an invalid nibble; or if a
reserved operand abort occurs.

This instruction is not part of the MicroVAX architecture definition.

9-152

VAX MACRO and Instruction Set
Decimal String Instructions—CVTPT

The condition codes are computed on the value of the source string even
if overflow results. In particular, condition code N is set if and only if the
source is nonzero and contains a minus sign.

By appropriate specification of the table, conversion to any form of trailing
numeric string may be realized. See Section 8 for the preferred form
of trailing overpunch, zoned and unsigned data. In addition, the table
may be set up for absolute value, negative absolute value, or negated
conversions. The translation table may be referenced even if the length of
the destination string is 0.

Decimal overflow occurs if the destination string is too short to contain the
converted result of a nonzero packed decimal source string (not including
leading Os). Conversion of a source string with 0 value never results in
overflow. Thus, conversion of a nonzero source string to a zero-length
destination string results in overflow.

If decimal overflow occurs, the value stored in the destination may be
different from the value indicated by the condition codes (Z and N bits).

9-1 53

VAX MACRO and Instruction Set
Decimal String Instructions—CVTSP

CVTSP
Convert Leading Separate Numeric to Packed1

FORMAT

opcode

condition codes

N — dst string} LSS 0;
Z <- dst string} EQL 0;
V <- decimal overflow};
C
0;

exceptions

reserved operand
decimal overflow

opcodes

srden.rw, srcaddr.ab, dstlen.rw, dstaddr.ab

CVTSP

Convert Leading Separate Numeric to Packed

DESCRIPTION

The source numeric string specified by the source length and source address
operands is converted to a packed decimal string and the destination string
specified by the destination address and destination length operands is
replaced by the result.

NOTES

A reserved operand abort occurs if:
•

The length of the source leading separate numeric string is outside the
range 0 through 31

•

The length of the destination packed decimal string is outside the range
0 through 31

•

The source string contains an invalid byte. An invalid byte is any
character other than an ASCII "0" through u9” in a digit byte or an
ASCII *+” , * < space> " , or
in the sign byte.

After execution:
RO =

R1 =

address of the sign byte of the source string

R2 =

R3 =

address of the byte containing the most-significant digit of the
destination string

The destination string, RO through R3, and the condition codes are
UNPREDICTABLE if the destination string overlaps the source string, or if
a reserved operand abort occurs.

1 This instruction is not part of the MicroVAX architecture definition.
9-154

VAX MACRO and Instruction Set
Decimal String Instructions—CVTTP

CVTTP
Convert Trailing Numeric to Packed1

FORMAT

opcode

condition codes

N <— jdst stringjLSS 0;
Z <— dst string} EQL 0;
V <— {decimal overflow};
C
0;

exceptions

reserved operand
decimal overflow

opcodes

DESCRIPTION

srclen.rw, srcaddr.ab, tbladdr.ab, dstlen.rw,
dstaddr.ab

CVTTP

Convert Trailing Numeric to Packed

The source trailing numeric string specified by the source length and source
address operands is converted to a packed decimal string, and the destination
packed decimal string specified by the destination address and destination
length operands is replaced by the result.
Conversion is effected by using the highest-addressed (trailing) byte of the
source string as an unsigned index into a 256-byte table whose first entry
(entry number 0) is specified by the table address operand. The byte read out
of the table replaces the highest-addressed byte of the destination string (that
is, the byte containing the sign and the least-significant digit). The remaining
packed digits of the destination string are replaced by the low-order 4 bits of
the corresponding bytes in the source string.

NOTES

1 A reserved operand abort occurs if:
•

The length of the source trailing numeric string is outside the range 0
through 31

•

The length of the destination packed decimal string is outside the range
0 through 31

•

The source string contains an invalid byte. An invalid byte is any
value other than ASCII "0" through *9* in any high-order byte (that is,
any byte except the least-significant byte)

•

The translation of the least-significant digit produces an invalid packed
decimal digit or sign nibble

This instruction is not part of the Micro VAX architecture definition.

9-155

VAX MACRO and Instruction Set
Decimal String Instructions—CVTTP

After execution:
RO =

R1 *

address of the most-significant digit of the source string

R2 =

R3 =

address of the byte containing the most-significant digit of the
destination string

The destination string, RO through R3, and the condition codes are
UNPREDICTABLE if the destination string overlaps the source string or
the table, or if a reserved operand abort occurs.

If the convert instruction produces a -0 without overflow, the destination
packed decimal string is changed to a +0 representation, condition code N
is cleared, and Z is set.

If the length of the source string is 0, the destination packed decimal string
is set identically equal to 0, and the translation table is not referenced.

6 By appropriate specification of the table, conversion from any form of
trailing numeric string may be realized. See Section 8 for the preferred
form of trailing overpunch, zoned and unsigned data. In addition, the
table may be set up for absolute value, negative absolute value, or negated
conversions.
7

9-156

If the table translation produces a sign nibble containing any valid sign,
the preferred sign representation is stored in the destination packed
decimal string.

VAX MACRO and Instruction Set
Decimal String instructions—DIVP

DIVP
Divide Packed1

FORMAT

opcode

condition codes

N <— jquo stringl LSS 0;
Z
quo string} EQL 0;
V «— {decimal overflow};
C «_ 0;

exceptions

reserved operand
decimal overflow
divide by 0

opcodes

DIVP

divrlen.rw, divraddr.ab, divdlen.rw,
divdaddr.ab, quolen.rw, quoaddr.ab

Divide Packed

DESCRIPTION

The dividend string specified by the dividend length and dividend address
operands is divided by the divisor string specified by the divisor length and
divisor address operands. The quotient string specified by the quotient length
and quotient address operands is replaced by the result.

NOTES

This instruction allocates a 16-byte workspace on the stack. After ex¬
ecution, SP is restored to its original contents, and the contents of
{(SP)-16}:{(SP)-1} are UNPREDICTABLE.

The division is performed such that:
•

The absolute value of the remainder (which is lost) is less than the
absolute value of the divisor

•

The product of the absolute value of the quotient times the absolute
value of the divisor is less than or equal to the absolute value of the
dividend

•

The sign of the quotient is determined by the rules of algebra from the
signs of the dividend and the divisor; if the value of the quotient is 0,
the sign is always positive

This instruction is not part of the Micro VAX architecture definition.

9-157

VAX MACRO and Instruction Set
Decimal String Instructions—DIVP

9-158

After execution:
RO«

R1 =

address of the byte containing the most-significant digit of the
divisor string

R2 =

R3 =

address of the byte containing the most-significant digit of the
dividend string

R4 =

R5 =

address of the byte containing the most-significant digit of the
quotient string

The quotient string, RO through R5, and the condition codes are
UNPREDICTABLE if the quotient string overlaps the divisor or dividend
strings; if the divisor or dividend string contains an invalid nibble; if the
divisor is 0; or if a reserved operand abort occurs.

VAX MACRO and Instruction Set
Decimal String Instructions—MOVP

MOVP
Move Packed1

FORMAT

opcode

len.rw, srcaddr.ab, dstaddr.ab

condition codes

N
Z
V
C

exception

reserved operand

opcodes

<— jdst string) LSS 0;
<— (dst string} EQL 0;
_ 0;
_ C;

MOVP

Move Packed

DESCRIPTION

The destination string specified by the length and destination address
operands is replaced by the source string specified by the length and source
address operands.

NOTES

After execution:
RO =

R1 =

address of the byte containing the most-significant digit of the
source string

R2 =

R3 =

address of the byte containing the most-significant digit of the
destination string

The destination string, RO through R3, and the condition codes are
UNPREDICTABLE if the destination string overlaps the source string; if
the source string contains an invalid nibble; or if a reserved operand abort
occurs.

If the source is -0, the result is +0, N is cleared, and Z is set.

This instruction is not part of the Micro VAX architecture definition.

9-159

VAX MACRO and Instruction Set
Decimal String Instructions—MULP

MULP
Multiply Packed1

FORMAT

opcode

mulrlen.rw, mulraddr.ab, muldlen.rw,
muldaddr.ab, prodlen.rw, prodaddr.ab

condition codes

N <— {prod string} LSS 0;
Z <— {prod string} EQL 0;
V
(decimal overflow};
C 4- 0;

exceptions

reserved operand
decimal overflow

opcodes

MULP

Multiply Packed

DESCRIPTION The multiplicand string specified by the multiplicand length and multiplicand
address operands is multiplied by the multiplier string specified by the multiplier length and multiplier address operands. The product string specified by
the product length and product address operands is replaced by the result.

NOTES

After execution:
RO =

R1 -

address of the byte containing the most-significant digit of the
multiplier string

R2 =

R3 -

address of the byte containing the most-significant digit of the
multiplicand string

R4 =

R5 =

address of the byte containing the most-significant digit of the product
string

2 The product string, RO through R5, and the condition codes are
UNPREDICTABLE if the product string overlaps the multiplier or multi¬
plicand strings; if the multiplier or multiplicand strings contain an invalid
nibble; or if a reserved operand abort occurs.

This instruction is not part of the MicroVAX architecture definition.

9-160

VAX MACRO and Instruction Set
Decimal String Instructions—SUBP

SUBP
Subtract Packed1

FORMATS

4 operand:

opcode

6 operand:

opcode

condition codes

N
Z
V
C

exceptions

reserved operand
decimal overflow

opcodes

DESCRIPTION

opcode sublen.rw; subaddr.ab,
diflen.rw, difaddr.ab
opcode sublen.rw, subaddr.ab,
minlen. rw, minaddr. ab,
diflen.rw, difaddr.ab

<— {dif string! LSS 0;
<— dif string} EQL 0;
4— (decimal overflow};
«- 0;

SUBP4

Subtract Packed 4 Operand

SUBP6

Subtract Packed 6 Operand

In 4 operand format, the subtrahend string specified by the subtrahend length
and subtrahend address operands is subtracted from the difference string
specified by the difference length and difference address operands, and the
difference string is replaced by the result.
In 6 operand format, the subtrahend string specified by the subtrahend
length and subtrahend address operands is subtracted from the minuend
string specified by the minuend length and minuend address operands. The
difference string specified by the difference length and difference address
operands is replaced by the result.

NOTES

After execution of SUBP4:
RO-

R1 =

address of the byte containing the most-significant digit of the
subtrahend string

R2 =

R3 =

address of the byte containing the most-significant digit of the
difference string

This instruction is not part of the MicroVAX architecture definition.

9-161

VAX MACRO and Instruction Set
Decimal String Instructions—SUBP

9-162

After execution of SUBP6:
RO =

R1 =

address of the byte containing the most-significant digit of the
subtrahend string

R2 =

R3 =

address of the byte containing the most-significant digit of the
minuend string

R4 =

R5 =

address of the byte containing the most-significant digit of the
difference string

The difference string, RO through R3 (RO through R5 for SUBP6), and the
condition codes are UNPREDICTABLE if the difference string overlaps the
subtrahend or minuend strings; if the subtrahend, minuend, or difference
(4 operand only) strings contain an invalid nibble; or if a reserved operand
abort occurs.

VAX MACRO and Instruction Set
Edit Instruction

9.14

Edit Instruction
This instruction is designed to implement the common editing functions
that occur in handling fixed-format output. It operates by converting a
packed decimal string to a character string. This operation is exemplified by
a MOVE to a numeric edited (PICTURE) item in COBOL or PL/I, but the
instruction can be used for other applications as well. The operation consists
of converting an input packed decimal number to an output character string,
generating characters for the output. When converting digits, options include
leading zero fill, leading 0 protection, insertion of floating sign, insertion
of floating currency symbol, insertion of special sign representations, and
blanking an entire field when it is 0.
The operands to the EDITPC instruction are an input packed decimal string
descriptor, a pattern specification, and the starting address of the output
string. The packed decimal descriptor is a standard VAX operand pair of the
length of the decimal string in digits (up to 31) and the starting address of the
string. The pattern specification is the starting address of a pattern operation
editing sequence that is interpreted much the way that the normal instructions
are. The output string is described by its starting address only, because the
pattern defines the length unambiguously.
While the EDITPC instruction is operating, it manipulates two character
registers and the four condition codes. One character register contains the
fill character. This is normally an ASCII blank, but would be changed to an
asterisk for check protection. The other character register contains the sign
character. Initially this register contains either an ASCII blank or a minus
sign, depending upon the sign of the input. The contents of this register can
be changed to allow other sign representations such as plus/minus or
plus/blank, and can be manipulated in order to output special notations such
as CR or DB. The sign register can also be changed to the currency sign in
order to implement a floating currency sign. After execution, the condition
codes contain the sign of the input (N), the presence of a 0 source (Z), an
overflow condition (V), and the presence of significant digits (C). Condition
code N is determined at the start of the instruction, and is not changed
thereafter (except for correcting a -0 input). The other condition codes are
computed and updated as the instruction proceeds. When the EDITPC
instruction terminates, registers R0 through R5 contain the conventional
values after a decimal instruction.

9-163

VAX MACRO and Instruction Set
Edit Instruction—EDITPC

EDITPC
Edit Packed to Character String1

FORMAT

opcode

condition codes

N <— {src string} LSS 0; IN <- 0 if src is -0
Z ♦— src string) EQL 0;
V
{decimal overflow}; Inonzero digits lost
C <— {significance};

exceptions

reserved operand
decimal overflow

opcodes

DESCRIPTION

srclen.rw, srcaddr.ab, pattern.ab, dstaddr.ab

EDITPC

Edit Packed to Character String

The destination string specified by the pattern and destination address
operands is replaced by the edited version of the source string specified
by the source length and source address operands. The editing is performed
according to the pattern string, starting at the address pattern and extending
until a pattern end pattern operator (EO$END) is encountered.
The pattern string consists of 1-byte pattern operators. Some pattern oper¬
ators take no operands. Some take a repeat count that is contained in the
rightmost nibble of the pattern operator itself. The rest take a 1-byte operand
that immediately follows the pattern operator. This operand is either an
unsigned integer length or a byte character. The individual pattern operators
are described on the following pages.

NOTES

A reserved operand abort occurs if srclen GTRU 31.

2 The destination string is UNPREDICTABLE if the source string contains an
invalid nibble, if the EO$ADJUST_INPUT operand is outside the range 1
through 31, if the source and destination strings overlap, or if the pattern
and destination strings overlap.

This instruction is not part of the Micro VAX architecture definition.

9-164

VAX MACRO and Instruction Set
Edit Instruction—EDITPC

After execution:
RO =

length of source string

R1 =

address of the byte containing the most-significant digit of the
source string

R2 =

R3 =

address of the byte containing the EO$END pattern operator

R4 =

R5 =

address of one byte beyond the last byte of the destination string

If the destination string is UNPREDICTABLE, RO through R5 and the
condition codes are UNPREDICTABLE.

4 If V is set at the end and DV is enabled, a numeric overflow trap occurs
unless the conditions in note 9 are satisfied.

5 The destination length is specified exactly by the pattern operators in
the pattern string. If the pattern is incorrectly formed or if it is modified
during the execution of the instruction, the length of the destination string
is UNPREDICTABLE.
6

If the source is -0, the result may be -0 unless a fixup pattern operator is
included (EO$BLANK_ZERO or EO$REPLACE_SIGN).

The contents of the destination string and the memory preceding it
are UNPREDICTABLE if the length covered by EO$BLANK ■■ZERO or
EO$REPLACE__SIGN is 0, or if it is outside the destination string.

8 If more input digits are requested by the pattern than are specified, then
a reserved operand abort is taken with RO = -1 and R3 = location of the
pattern operator that requested the extra digit. The condition codes and
other registers are as specified in note 11. This abort is not continuable.

9 If fewer input digits are requested by the pattern than are specified, then
a reserved operand abort is taken with R3 = location of EO$END pattern
operator. The condition codes and other registers are as specified in note
11. This abort is not continuable.
10 On an unimplemented or reserved pattern operator, a reserved operand
fault is taken with R3 = location of the faulting pattern operator. The
condition codes and other registers are as specified in note 11. This
fault is continuable as long as the defined register state is manipulated
according to the pattern operator description and the state specified as ???
is preserved.

9—165

VAX MACRO and Instruction Set
Edit Instruction—EDITPC

11 On a reserved operand exception, as specified in notes 8 through 10, FPD
is set and the condition codes and registers are as follows:
N =

{src has minus sign}

Z =

all source digits 0 so far

V =

nonzero digits lost

C =

significance

RO =

-zeros < 15:0> 'remaining srclen < 15:0>

R1 =

current source location

R2 =

??? 'sign 'fill

R3 =

location of edit pattern operator causing exception

R4 =

???

R5 =

location of next destination byte

Key:
zeros—count of source zeros to supply
sign—current contents of sign character register
fill—current contents of fill character register

Table 9-1
Function

Summary of EDIT pattern operators
Name

Operand

Summary

EO$INSERT

Insert character, fill if
insignificant

EO$ST ORE_SIGN

Insert sign

EO$FILL

Insert fill

EOSMOVE

Move digits, fill if
insignificant

EO$FLOAT

Move digits, floating sign

EO$END_FLOAT

End floating sign

EO$BLANK_ZERO

len

Fill backward when 0

EO$REPLACE_SIGN

len

Replace with fill if -0

Insert:

Move:

Fixup:

Key:
ch—one character
r—repeat count in the range 1 through 15
len—length in the range 1 through 255

9-166

VAX MACRO and Instruction Set
Edit Instruction—EDITPC

Table 9-1

(Cont.)

Summary of EDIT pattern operators

Function

Name

Operand

Summary

EO$LOAD_FILL

Load fill character

E0$L0AD_SIGN

Load sign character

EO$LOAD_PLUS

Load sign character if

EO$LOAD_MINUS

Load:

positive
Load sign character if
negative
Control:
EO$SET_SIGNIF

Set significance flag

EO$CLEAR_SIGNIF

Clear significance flag

EO$ADJUST_INPUT

len

Adjust source length

EOSEND

End edit

EDIT pattern operator encoding
Hex

Symbol

EOSEND

E0$END_FL0AT

E0SCLEAFL.SIGNIF

EO$SET_SIGNIF

E0$ST0RE_SIGN

05..IF

Reserved to DIGITAL

20..3F

Reserved for all time

EO$LOAD_FILL

Character is in next byte

E0$L0AD_SIGN

Character is in next byte

E0$L0AD_PLUS

Character is in next byte

E0$L0AD_MINUS

Character is in next byte

EOSINSERT

Character is in next byte

Notes

E0$BLANK_ZER0

Unsigned length is in next byte

EO$REPLACE_SIGN

Unsigned length is in next byte

EO$ADJUST_INPUT

Unsigned length is in next byte

48..5F

Reserved to DIGITAL

60.7F

Reserved to CSS
and customers

80,90,A0

Reserved to DIGITAL

81..8F

EOSFILL

Key:
ch—one character
r—repeat count in the range 1 through 15
len—length in the range 1 through 255

9-167

VAX MACRO and Instruction Set
Edit Instruction—EDITPC

Table 9-1

(Cont.)

Summary of EDIT pattern operators

Hex

Symbol

Notes

91.9F

EO$MOVE

Repeat count is <3:0>

A1..AF

EOSFLOAT

BO..FE

Reserved to DIGITAL

Reserved for all time

Key:
ch—one character
r—repeat count in the range 1 through 15
len—length in the range 1 through 255
The following pages define each pattern operator in a format similar to that
of the normal instruction descriptions. In each case, if there is an operand it
is either a repeat count (r) from 1 through 15, an unsigned byte length (len),
or a character byte (ch).
The following definitions are also used:
fill = R2<7:0>
sign = R2<15:8>

See the VAX-11 Architecture Reference Manual for more detailed information.

9-168

VAX MACRO and Instruction Set
Edit Instruction—EO$ADJUST_INPUT

EO$ADJUST_INPUT
Adjust Input Length

FORMAT

opcode

pattern
operators

pattern ten

EO$ADJUST_INPUT

Adjust Input Length

DESCRIPTION

The EO$ADJUST__INPUT pattern operator is followed by an unsigned byte
integer length in the range 1 through 31. If the source string has more digits
than this length, the excess leading digits are read and discarded. If any
discarded digits are nonzero then overflow is set, significance is set, and zero
is cleared. If the source string has fewer digits than this length, a counter is
set of the number of leading Os to supply. This counter is stored as a negative
number in RO <31:16> .

NOTE

If the length is not in the range 1 through 31, the destination string, condition
codes, and RO through R5 are UNPREDICTABLE.

9—169

VAX MACRO and Instruction Set
Edit Instruction—EO$BLANK_ZERC>

EO$BLANK_ZERO
Blank Backwards When Zero

FORMAT

opcode

pattern
operators

pattern len

EOSBLANK—ZERO

Blank Backwards When Zero

DESCRIPTION

The EOSBLANK—ZERO pattern operator is followed by an unsigned byte
integer length. If the value of the source string is 0, then the contents of the
fill register are stored into the last length bytes of the destination string.

NOTES

The length must be nonzero and within the destination string already
produced. If it is not, the contents of the destination string and the
memory preceding it are UNPREDICTABLE.

This pattern operator is used to blank out any characters stored in the des¬
tination under a forced significance such as a sign or the digits following
the radix point.

9-170

VAX MACRO and Instruction Set
Edit Instruction—EO$END

EO$END
End Edit

FORMAT

opcode

pattern
operators

DESCRIPTION

The EO$END pattern operator terminates the edit operation.

NOTES

E0$END

pattern
End Edit

If there are still input digits, a reserved operand abort is taken.

2 If the source value is -0, the N condition code is cleared.

9-171

VAX MACRO and Instruction Set
Edit Instruction—EO$END_FLOAT

EO$END_FLOAT
End Floating Sign

FORMAT

opcode

pattern
operators

pattern

EO$END_FLOAT

End Floating Sign

DESCRIPTION

The EO$END_JFLOAT pattern operator terminates a floating sign operation.
If the floating sign has not yet been placed in the destination (that is, if
significance is not set), the contents of the sign register are stored in the
destination, and significance is set.

NOTE

This pattern operator is used after a sequence of one or more EO$FLOAT
pattern operators that start with significance clear. The EO$FLOAT sequence
can include intermixed EO$INSERTs and EO$FILLs.

9-172

VAX MACRO and Instruction Set
Edit Instruction—EO$FILL

EO$FILL
Store Fill

FORMAT

opcode

pattern
operators

EOSFILL

pattern r
Store Fill

DESCRIPTION

The rightmost nibble of the pattern operator is the repeat count. The EO$FILL
pattern operator places the contents of the fill register into the destination the
number of times specified by the repeat count.

NOTE

This pattern operator is used for fill (blank) insertion.

9-173

VAX MACRO and Instruction Set
Edit Instruction—-EO$ FLOAT

EO$FLOAT
Float Sign

FORMAT

opcode

pattern
operators

DESCRIPTION

pattern r

EO$FLOAT

Float Sign

The EO$FLOAT pattern operator moves digits, floating the sign across
insignificant digits. The rightmost nibble of the pattern operator is the repeat
count. For the number of times specified in the repeat count, the following
algorithm is executed:
The next digit from the source is examined. If it is nonzero and significance is
not yet set, then the contents of the sign register are stored in the destination,
significance is set, and zero is cleared. If the digit is significant, it is stored
in the destination; otherwise, the contents of the fill register is stored in the
destination.

NOTES

If r is greater than the number of digits remaining in the source string, a
reserved operand abort is taken.

2 This pattern operator is used to move digits with a floating arithmetic sign.
The sign must already be set up as for EO$STORE_SIGN. A sequence
of one or more EO$FLOATs can include intermixed EO$INSERTs and
EO$FILLs. Significance must be clear before the first pattern operator of
the sequence. The sequence must be terminated by one
EO$END_FLOAT.

3 This pattern operator is used to move digits with a floating currency sign.
The sign must already be set up with an EO$LOAD_SIGN. A sequence
of one or more EO$FLOATs can include intermixed EO$INSERTs and
EO$FILLs. Significance must be clear before the first pattern operator of
the sequence. The sequence must be terminated by one
EO$END__FLOAT.

9-174

VAX MACRO and Instruction Set
Edit Instruction—EOSINSERT

EO$IIMSERT
Insert Character

FORMAT

opcode

pattern
operators

pattern ch

EO$INSERT

Insert Character

DESCRIPTION The EO$INSERT pattern operator is followed by a character. If significance is
set, then the character is placed into the destination. If significance is not set.
then the contents of the fill register are placed into the destination.

NOTE

This pattern operator is used for blankable inserts (for example, comma) and
fixed inserts (for example, slash). Fixed inserts require that significance be set
(by EO$SET_SIGNIF or EO$END_FLOAT).

9-175

VAX MACRO and Instruction Set
Edit Instruction—EOS LOAD—

EO$LOAD_
Load Register

FORMAT

opcode

pattern ch

pattern
operators

EO$LOAD_FILL

EO$LOAD_SIGN

Load Sign Register

EO$LOAD_PLUS

Load Sign Register If Plus

EO$LOAD_MINUS

Load Sign Register If Minus

Load Fill Register

DESCRIPTION

The pattern operator is followed by a character. For EO$LOAD_FILL, this
character is placed into the fill register. For EO$LOAD_SIGN, this character
is placed into the sign register. For EO$LOAD_PLUS, this character is placed
into the sign register if the source string has a positive sign. For
EO$LOAD_MINUS, this character is placed into the sign register if the source
string has a negative sign.

NOTES

1 EO$LOAD_FILL is used to set up check protection (* instead of space).
2 EO$LOAD_SIGN is used to set up a floating currency sign.
3 EO$LOAD__PLUS is used to set up a nonblank plus sign.
4 EO$LOAD_MINUS is used to set up a nonminus minus sign (such as CR,
DB, or the PL/I +).

9-176

VAX MACRO and Instruction Set
Edit Instruction—EO$MOVE

EO$MOVE
Move Digits

FORMAT

opcode

pattern
operators

pattern r

EO$MOVE

Move Digits

DESCRIPTION The EO$MOVE pattern operator moves digits, filling for insignificant digits.
The rightmost nibble of the pattern operator is the repeat count. For the
number of times specified in the repeat count, the following algorithm is
executed:
The next digit is moved from the source to the destination. If the digit is
nonzero, significance is set and zero is cleared. If the digit is not significant
(that is, a leading 0) it is replaced by the contents of the fill register in the
destination.

NOTES

If r is greater than the number of digits remaining in the source string, a
reserved operand abort is taken.

2 This pattern operator is used to move digits without a floating sign. If
leading-zero suppression is desired, significance must be clear. If leading
Os should be explicit, significance must be set. A string of EO$MOVEs
intermixed with EO$INSERTs and EO$FILLs will handle suppression
correctly.
3 If check protection (*) is desired, EO$LOAD_JFILL must precede the
EOSMOVE.

9-177

VAX MACRO and Instruction Set
Edit Instruction—EO$REPLACE_SIGN

EO$REPLACE_SIGN
Replace Sign When Zero

FORMAT

opcode

pattern
operators

pattern ten

EO$REPLACE_SIGN

Replace Sign When Zero

DESCRIPTION

The EO$REPLACE_SIGN pattern operator is followed by an unsigned byte
integer length. If the value of the source string is 0 (that is, if Z is set), then
the contents of the fill register are stored in the byte of the destination string
that is len bytes before the current position.

NOTES

The length must be nonzero and within the destination string already
produced. If it is not, the contents of the destination string and the
memory preceding it are UNPREDICTABLE.

2 This pattern operator can be used to correct a stored sign
(EO$END_FLOAT or EO$STORE_SIGN) if a minus was stored and the
source value turned out to be 0.

9-178

VAX MACRO and Instruction Set
Edit Instruction—EO$_SIGNIF

EO$_SIGNIF
Significance

FORMAT

opcode pattern

pattern
operators

EO$CLEAR_SIGNIF

Clear Significance

EO$SET_SIGNIF

Set Significance

DESCRIPTION The significance indicator is set or cleared. This controls the treatment of
leading Os (leading Os are 0 digits for which the significance indicator is clear).

NOTES

EO$CLEAR_SIGNIF is used to initialize leading-zero suppression
(EOSMOVE) or floating sign (EOSFLOAT) following a fixed insert
(EOSINSERT with significance set).

2 EO$SET_SIGNIF is used to avoid leading-zero suppression (before
EOSMOVE) or to force a fixed insert (before EOSINSERT).

9-179

VAX MACRO and Instruction Set
Edit Instruction—EO$STORE_SIGN

EO$STORE_SIGN
Store Sign

FORMAT

opcode

pattern
operators

pattern

EO$STORE_SIGN

Store Sign

DESCRIPTION The EO$STORE_SIGN pattern operator places contents of the sign register
into the destination.

NOTE

9-180

This pattern operator is used for any nonfloating arithmetic sign. It should be
preceded by a EO$LOAD_PLUS and/or EO$LOAD_MINUS if the default
sign convention is not desired.

VAX MACRO and Instruction Set
Other VAX Instructions

9.15

Other VAX Instructions
Description
and Opcode

Number of
Instructions

Probe {Read, Write} Accessibility
PROBE(R,W} mode.rb, len.rw, base.ab

Change Mode
CHM{K,E,S,U| param.rw, {-(ySP).w*}
Where y=MINU(x, PSL <current-mode> )

Return from Exception or Interrupt REI {(SP)+.r*}

Load Process Context
LDPCTX {PCB.r*, -(KSP).w*}

Save Process Context
SVPCTX {(SP)+.r*, PCB.w*}

Move To Process Register
MTPR src.rl, procreg.rl

Move From Processor Register
MFPR procreg.rl, dst.wl

VAX MACRO and Instruction Set
Other VAX Instructions—PROBEx

PROBEx
Probe Accessibility

FORMAT

opcode

mode.rb, len.rw, base.ab

condition codes N «— 0;
Z «— if {both accessible) then 0 else 1;
V - 0;
C — C;

exception

translation not valid

opcodes

PROBER

Probe Read Accessibility

PROBEW

Probe Write Accessibility

DESCRIPTION The PROBE instruction checks the read or write accessibility of the first and
last byte specified by the base address and the zero-extended length. Note
that the bytes in between are not checked. System software must check all
pages between the two end bytes if they will be accessed.
The protection is checked against the larger (and therefore less privileged) of
the modes specified in bits <1:0> of the mode operand and the previous
mode field of the PSL. Note that probing with a mode operand of 0 is
equivalent to probing the mode specified in PSL < previous-mode > .

EXAMPLE
MOVL

4 (AP) , R0

PROBER

#0, #4 , (R0)

BEQL

violation

MOVQ

8(AP),RO

9-182

Copy the address of first arg so
that it cannot be changed
Verify that the longword pointed to
by the first arg could be read by
the previous access mode
Note that the arg list itself must
already have been probed
Branch if either byte gives an
access violation
Copy length and address of buffer
arg so that they cannot change

VAX MACRO and Instruction Set
Other VAX Instructions—PROBEx

PROBEW

#0,RO,(Rl)

BEQL

violation

Verify that the buffer described by
the 2nd and 3rd args could be
written by the previous access
mode
Note that the arg list must already
have been probed and that the 2nd
arg must be known to be less than
512
Branch if either byte gives an
access violation

See the VAX-11 Architecture Reference Manual for a description of the op¬
eration of PROBE on each of the virtual addresses it is checking. Note that
probing an address returns only the accessibility of the page(s) and has no
effect on their residency. However, probing a process address may cause a
page fault in the system address space on the per-process page tables.

NOTES

If the valid bit of the examined page table entry is set, it is
UNPREDICTABLE whether the modify bit of the examined page table
entry is set by a PROBEW. If the valid bit is clear, the modify bit is not
changed.

2 Except for note 1, above, the valid bit of the page table entry, PTE <31 > ,
mapping the probed address is ignored.

3 A length violation gives a status of "not-accessible."
4 On the probe of a process virtual address, if the valid bit of the system
page table entry is 0, then a Translation Not Valid Fault occurs. This
allows for the demand paging of the process page tables.

5 On the probe of a process virtual address, if the protection field of the sys¬
tem page table entry indicates No Access, then a status of "not-accessible"
is given. Thus, a single No Access page table entry in the system map is
equivalent to 128 No Access page table entries in the process map.

9-183

VAX MACRO and Instruction Set
Other VAX Instructions—CHM

CHM
Change Mode

FORMAT

opcode

condition codes

N
Z
V
C

exception

halt

opcodes

CHMK

Change Mode to Kernel

CHME

Change Mode to Executive

CHMS

Change Mode to Supervisor

CHMU

Change Mode to User

DESCRIPTION

code.rw

«— 0;
«- 0;
_ 0;
<- 0;

Change Mode instructions allow processes to change their access mode in a
controlled manner. The instruction only increases privilege (that is, decreases
the access mode).
A change in mode also results in a change of stack pointers; the old pointer
is saved, and the new pointer is loaded. The PSL, PC, and code passed by
the instruction are pushed onto the stack of the new mode. The saved PC
addresses the instruction following the CHMx instruction. The code is sign
extended. After execution, the appearance of the new stack is:
1

sign-extended code

PC of next instruction

old PSL

:(SP)

The destination mode selected by the opcode is used to obtain a location from
the System Control Block. This location addresses the CHMx dispatcher for
the specified mode. If the vector <1:0> code NEQU 0, then the operation is
UNDEFINED.

NOTES

9-184

As usual for faults, any Access Violation or Translation Not Valid fault
saves PC and PSL, and leaves SP as it was at the beginning of the
instruction except for any pushes onto the kernel stack.

VAX MACRO and Instruction Set
Other VAX Instructions—CHM

2 The noninterrupt stack pointers may be fetched and stored either in
privileged registers or in their allocated slots in the PCB. Only LDPCTX
and SVPCTX always fetch and store in the PCB (see Chapter 7 of the
VAX-11 Architecture Reference Manual). MFPR and MTPR always fetch
and store the pointers whether in registers or the PCB.

3 By software convention, negative codes are reserved to CSS and
customers.

EXAMPLES
CHMK

Request the kernel mode service
specified by code 7

CHME

Request the executive mode service
specified by code 4

CHMS

#-2

Request the supervisor mode service
specified by customer code -2

9-185

VAX MACRO and Instruction Set
Other VAX Instructions—REI

REI
Return from Exception or Interrupt

FORMAT

opcode

condition codes

N
Z
V
C

exception

reserved operand

opcodes

«- saved PSL<3>;
«- saved PSL<2>;
«- saved PSL<1>;
«- saved PSL<0>;

REI

Return from Exception or Interrupt

DESCRIPTION

A longword is popped from the current stack and held in a temporary PC. A
second longword is popped from the current stack and held in a temporary
PSL. Validity of the popped PSL is checked. The current stack pointer is
saved and a new stack pointer is selected according to the new PSL
CUR—MOD and IS fields (see section on Stack Status Bits in Chapter 6 of the
VAX-11 Architecture Reference Manual). The level of the highest privilege
AST is checked against the current mode to see whether a pending AST can
be delivered. Execution resumes with the instruction being executed at the
time of the exception or interrupt. Any instruction lookahead in the processor
is reinitialized.

NOTES

The exception or interrupt service routine is responsible for restoring any
registers saved and removing any parameters from the stack.

As usual for faults, any Access Violation or Translation Not Valid condi¬
tions on the stack pops restore the stack pointer and fault.

The noninterrupt stack pointers may be fetched and stored either in
privileged registers or in their allocated slots in the PCB. Only LDPCTX
and SVPCTX always fetch and store in the PCB (see Chapter 7 of the
VAX-11 Architecture Reference Manual). MFPR and MTPR always fetch
and store the pointers, whether in registers or in the PCB.

9-186

VAX MACRO and Instruction Set
Other VAX Instructions—LDPCTX

LDPCTX
Load Process Context

FORMAT

opcode

condition codes

N
Z
V
C

exceptions

reserved operand
privileged instruction

opcodes

— N;
— Z;
— V;
_ C;

LDPCTX

Load Process Context

DESCRIPTION

The PCB is specified by the privileged register PCB base. The general regis¬
ters are loaded from the PCB. The memory management registers describing
the process address space are also loaded and the process entries in the
translation buffer are cleared. Execution is switched to the kernel stack. The
PC and PSL are moved from the PCB to the stack, suitable for use by a
subsequent REI instruction.

NOTES

Some processors keep a copy of each of the per-process stack pointers in
internal registers. In those processors, LDPCTX loads the internal registers
from the PCB. Processors that do not keep a copy of all four per-process
stack pointers in internal registers keep only the current access mode
register in an internal register and switch this with the PCB contents
whenever the current access mode field changes.

Some implementations may not perform some or all of the reserved
operand checks.

9-187

VAX MACRO and Instruction Set
Other VAX Instructions—SVPCTX

SVPCTX
Save Process Context

FORMAT

opcode

condition codes

N
Z
V
C

exception

privileged instruction

opcodes

DESCRIPTION

The Process Control Block is specified by the privileged register Process
Control Block Base. The general registers are saved into the PCB. The PC
and PSL currently on the top of the current stack are popped and stored in
the PCB. If a SVPCTX instruction is executed when the Interrupt Stack (IS)
is clear, then IS is set, the interrupt stack pointer is activated, and IPL is
maximized with 1 because of the switch to the interrupt stack.

NOTES

<— N;
<- Z;
«- V;
«_ C;

SVPCTX

Save Process Context

The map, ASTLVL, and PME contents of the PCB are not saved because
they are rarely changed. Thus, not writing them saves overhead.

2 Some processors keep a copy of each of the per-process stack pointers
in internal registers. In those processors, SVPCTX stores the internal
registers in the PCB. Processors that do not keep a copy of all four perprocess stack pointers in internal registers keep only the current access
mode register in an internal register and switch this access mode register
with the PCB contents whenever the current access mode field changes.

3 Between the SVPCTX instruction that saves the state for one process and
the LDPCTX that loads the state of another, the internal stack pointers
may not be referenced by MFPR or MTPR instructions. This implies that
interrupt service routines invoked at a priority higher than the lowest one
used for context switching must not reference the process stack pointers.

9-188

VAX MACRO and Instruction Set
Other VAX Instructions—MTPR

MTPR
Move to Processor Register

FORMAT

opcode

src.rl, procreg.rl

Condition Codes
N <- src LSS 0;
Z <- src EQL 0;
V <- 0;

If register is replaced

! Except TBCHK register
!
(see Chapter 5 of the
!
VAX-11 Architecture Reference Manual

C <- C;
N
Z
V
C

exceptions

opcodes

<<<<-

N;
Z;
V;
C;

! If register is not replaced

reserved operand fault
reserved instruction fault

MTPR

Move to Processor Register

DESCRIPTION

Loads the source operand specified by src into the processor register specified
by procreg. The procreg operand is a longword that contains the processor
register number. Execution may have register-specific side effects.

NOTES

If the processor internal register does not exist, a reserved operand fault
occurs.

A reserved instruction fault occurs if instruction execution is attempted in
other than kernel mode.

A reserved operand fault occurs on a move to a read-only register.

9-189

VAX MACRO and Instruction Set
Other VAX Instructions—MFPR

MFPR
Move from Processor Register

FORMAT

opcode

procreg.rl, dst.wl

Condition codes

exceptions

opcodes

N
Z
V
C

<<<<-

dst LSS 0;
dst EQL 0;
0;
C;

If destination is replaced

N
Z
V
C

<<<<-

N;
Z;
V;
C;

If destination is not replaced

reserved operand fault
reserved instruction fault

MFPR

Move from Processor Register

DESCRIPTION The destination operand is replaced by the contents of the processor register
specified by procreg. The procreg operand is a longword that contains the
processor register number. Execution may have register-specific side effects.

NOTES

If the processor internal register does not exist, a reserved operand fault
occurs.

2 A reserved instruction fault occurs if instruction execution is attempted in
other than kernel mode.

3 A reserved operand fault occurs on a move from a write-only register.

9-190

VAX MACRO and Instruction Set
Other VAX Instructions—BUG

BUG
Bugcheck

message, bx

FORMAT

opcode

condition codes

N «- N;
Z «- Z;
V «- V;
C «- C;

exception

reserved instruction

opcodes

FEFF

BUGW

Bugcheck with word message identifier

FDFF

BUGL

Bugcheck with longword message identifier

DESCRIPTION

The hardware treats these opcodes as Reserved to DIGITAL and as faults.
The VAX/VMS operating system treats them as requests to report software
detected errors. The inline message identifier is zero extended to a longword
(BUGW) and interpreted as a condition value (see the VAX Procedure Calling
and Condition Handling Standard in the Introduction to VAX/VMS System
Routines). If the process is privileged to report bugs, a log entry is made. If
the process is not privileged, a reserved instruction is signalled.

9—191

ASCII Character Set

Table A-l lists the ASCII characters and the decimal and hexadecimal codes
for each.
Table A—1

Decimal, Hexadecimal, and ASCII Conversion
Dec Hex ASCII

Dec Hex ASCII

Dec Hex ASCII
00

NUL

SOH

STX

!
n

ETX

EOT

100 64

ENQ

101

ACK

102 66

BEL

&
/

103 67

104 68

g
h

105 69

>
•

106 6A

107 6B

108 6C

109 6D

110 6E

111

DLE

/
0

112 70

DC1

113 71

DC2

114 72

DC3

115 73

DC4

116 74

NAK

117 75

SYN

118 76

ETB

119 77

CAN

120 78

121

SUB

122 7 A

y
z

ESC

[

123 7B

124 7C

{
1

]

125 7D

;

A—1

VAX MACRO and Instruction Set
ASCII Character Set

Table A—1 (Cont.)
Dec Hex ASCII

Decimal, Hexadecimal, and ASCII Conversion
Dec Hex ASCII

Dec Hex ASCII

126 7E

127 7F

A—2

DEL

Hexadecimal/ Decimal Conversion

Table B-l lists the decimal value for each possible hexadecimal value in each
byte of a longword. The following sections contain instructions to use the
table to convert hexadecimal numbers to decimal and vice versa.

B.1

Hexadecimal to Decimal
For each integer position of the hexadecimal value, locate the corresponding
column integer and record its decimal equivalent in the conversion table. Add
the decimal equivalent to obtain the decimal value.
For example:
D0500AD0 (hex)

B.2

?(dec)

D0000000
500000
A00
DO

3,489,660,928
5,242,880
2,560
208

D0500AD0

3,494,904,576

Decimal to Hexadecimal
Step 1:
Locate in the conversion table the largest decimal value that does not exceed
the decimal number to be converted.
Step 2:
Record the hexadecimal equivalent, followed by the number of Os that
corresponds to the integer column minus 1.
Step 3:
Subtract the table decimal value from the decimal number to be converted.
Step 4:
Repeat steps 1 through 3 until the subtraction balance equals 0. Add the
hexadecimal equivalents to obtain the hexadecimal value.
Example:
22,466 (dec)

= ?(hex)

20,480
1,792
192
2

= 5000
= 700
=
CO
=
2

22,466

= 57C2

22,466
-20,480
1,986
- 1,792
194
192

B—1

VAX MACRO and Instruction Set
Decimal Conversion

B.3

Powers of 2 and 16
This section lists the decimal values of powers of 2 and 16. These values are
often useful in converting decimal numbers to hexadecimal.
Powers of 2

Table B-1

Powers of 16

2**n

16**n

256
512
1024
2048
4096
8192
16384
32768
65536
131072
262144
524288
1048576
2097152
4194304
8388608
16777216

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

1
16
256
4096
65536
1048576
16777216
268435456
4294967296
68719476736
1099511627776
17592186044416
281474976710656
4503599627370496
72057594037927936
1152921504606846976

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

Hexadecimal/Decimal Conversion
HEXADECIMAL TO DECIMAL CONVERSION TABLE
7

8
HEX
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F

DEC

0
268,435,456
536,870,912
805,306,368
1,073,741,824
1,342,177,280
1,610,612,736
1,879,048,192
2,147,483,648
2,415,919,104
2,684,354,560
2,952,790,016
3,221,225,472
3,489,660,928
3,758,096,384
4,026,531.840

HEX

6
DEC

0
0
16,777,216
1
2 33,554,432
3 50,331,648
4 67,108,864
5 83,886,080
6 100,663,296
7 117,440,512
8 134,217,728
9 150,994,944
A 167,772,160
B 184,549,376
C 201,326,592
D 218,103,808
E 234,881,024
F 251,658,240

HEX
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F

DEC

HEX DEC

HEX: DEC

0
0
1
4,096
2 8,192
3 12,288
4 16,384
5 20,480
6 24,576
7 28,672
8 32,768
9 36,864
A 40,960
B 45,056
C 49,152
D 53,248
E 57,344
F 61,440

0
0
1
256
512
2
768
3
4 1,024
5 1,280
6 1,536
7 1,792
8 2,048
9 2,304
A 2,560
B 2,816
C 3,072
D 3,328
E 3,584
F 3,840

0
0
1
16
2 32
3 48
4 64
5 80
6 96
7 112
8 128
9 144
A 160
B 176
C 192
D 208
E 224
F 240

0 0
1
1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
A 10
B 11
C 12
D 13
E 14
F 15

5
DEC

0
1,048,576
2,097,152
3,145,728
4,194,304
5,242,880
6,291,456
7,340,032
8,388,608
9,437,184
10,485,760
11,534,336
12,582,912
13,631,488
14,680,064
15,728,640

HEX

DEC

0
0
1
65,536
2 131,072
3 196,608
4 262,144
5 327,680
6 393,216
7 458,752
8 524,288
9 589,824
A 655,360
B 720,896
C 786,432
D 851,968
E 917,504
F 983,040

HEX

ZK-2013-84

B—2

VAX Macro Assembler Directives and
Language Summary

c.i

Assembler Directives
The following table summarizes the VAX MACRO assembler directives.

Table C—1

Assembler Directives

Format

Operation

.ADDRESS address-list

Stores successive longwords of
address data

.ALIGN keyword[/expression]

Aligns the location counter to the
boundary specified by the keyword

ALIGN integer[,expression]

Aligns location counter to the bound¬
ary specified by ^integer)

.ASCIC string

Stores the ASCII string (enclosed in
delimiters), preceded by a count byte

.ASCID string

Stores the ASCII string (enclosed
in delimiters), preceded by a string
descriptor

.ASCII string

Stores the ASCII string (enclosed in
delimiters)

.ASCIZ string

Stores the ASCII string (enclosed in
delimiters) followed by a 0 byte

BLKA expression

Reserves longwords of address data

.BLKB expression

Reserves bytes for data

.BLKD expression

Reserves quadwords for double¬
precision floating-point data

.BLKF expression

Reserves longwords for single¬
precision floating-point data

.BLKG expression

Reserves quadwords for floating¬
point data

.BLKH expression

Reserves octawords for extendedprecision floating-point data

.BLKL expression

Reserves longwords for data

.BLKO expression

Reserves octawords for data

.BLKQ expression

Reserves quadwords for data

.BLKW expression

Reserves words for data

BYTE expression-list

Generates successive bytes of data;
each byte contains the value of the
specified expression

C-1

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-1 (Cont.)

C—2

Assembler Directives

Format

Operation

.CROSS

Enables cross-referencing of all
symbols

.CROSS symbol-list

Cross-references specified symbols

.DEBUG symbol-list

Makes symbol names known to the
debugger

.DEFAULT DISPLACEMENT, keyword

Specifies the default displacement
length for the relative addressing
modes

.D_FLOATING literal-list

Generates 8-byte double-precision
floating-point data

.DISABLE argument-list

Disables function(s) specified in
argument-list

.DOUBLE literal-list

Equivalent to .D_FLOATING

.DSABL argument-list

Equivalent to .DISABLE

.ENABL argument-list

Equivalent to .ENABLE

.ENABLE argument-list

Enables function(s) specified in
argument-list

.END [symbol]

Indicates logical end of source
program; optional symbol specifies
transfer address

.ENDC

Indicates end of conditional assembly
block

.ENDM [macro-name]

Indicates end of macro definition

.ENDR

Indicates end of repeat block

.ENTRY symbol [,expression]

Procedure entry directive

.ERROR [expression] comment

Displays specified error message

.EVEN

Ensures that the current location
counter has an even value (adds 1 if
it is odd)

.EXTERNAL symbol-list

Indicates specified symbols are
externally defined

.EXTRN symbol-list

Equivalent to .EXTERNAL

.F_FLOATING literal-list

Generates 4-byte single-precision
floating-point data

.FLOAT literal-list

Equivalent to .F_FLOATING

.G_FLOATING literal-list

Generates 8-byte G_floating-point
data

.GLOBAL symbol-list

Indicates specified symbols are
global symbols

.GLOBL

Equivalent to .GLOBAL

.H_FLOATING literal-list

Generates 16-byte extendedprecision H_floating-point data

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-1

(Cont.)

Assembler Directives

Format

Operation

.IDENT string

Provides means of labeling object
module with additional data

.IF condition [,] argument(s)

Begins a conditional assembly block
of source code which is included
in the assembly only if the stated
condition is met with respect to the
argument(s) specified

.IFF

Equivalent to .IF_FALSE

.IF_FALSE

Appears only within a conditional
assembly block; begins block of
code to be assembled if the original
condition tests false

.IFT

Equivalent to .IF_TRUE

.IFTF

Equivalent to .IF_TRUE_FALSE

.IF_TRUE

Appears only within a conditional
assembly block; begins block of
code to be assembled if the original
condition tests true

. IF_TRUE_F ALSE

Appears only within a conditional as¬
sembly block; begins block of code
to be assembled unconditionally

.IIF condition argument(s),
statement

Acts as a 1-line conditional assembly
block where the condition is tested
for the argument specified; the
statement is assembled only if the
condition tests true

.IRP symbol, <argument list>

Replaces a formal argument with
successive actual arguments speci¬
fied in an argument list

.IRPC symbol, <string>

Replaces a formal argument with
successive single characters speci¬
fied in string

.LIBRARY macro-library-name

Specifies a macro library

.LINK "file-spec'’
[/qualifier[=(module-name[,...])],...]

Includes linker option records in
object module

.LIST [argument-list]

Equivalent to .SHOW

.LONG expression-list

Generates successive longwords of
data; each longword contains the
value of the specified expression

.MACRO macro-name
[formal-argument-list]

Begins a macro definition

.MASK symbol ^expression]

Reserves a word for and copies a
register save mask

C—3

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-1 (Cont.)

C—4

Assembler Directives

Format

Operation

.MCALL macro-name-list

Specifies the system and/or userdefined macros in libraries that are
required to assemble the source
program

.MDELETE macro-name-list

Deletes from memory the macro
definitions of the macros in the list

.MEXIT

Exits from the expansion of a macro
before the end of the macro is
encountered

.NARG symbol

Determines the number of arguments
in the current macro call

.NCHR symbol, <string>

Determines the number of characters
in a specified character string

.NLIST [argument-list]

Equivalent to .NOSHOW

.NOCROSS

Disables cross-referencing of all
symbols

.NOCROSS symbol-list

Disables cross-referencing of speci¬
fied symbols

.NOSHOW

Decrements listing level count

.NOSHOW argument-list

Controls listing of macros and
conditional assembly blocks

.NTYPE symbol,operand

Can appear only within a macro
definition; equates the symbol to the
addressing mode of the specified
operand

.OCTA literal

Stores 16 bytes of data

.OCTA symbol

Stores 16 bytes of data

ODD

Ensures that the current location
counter has an odd value (adds 1 if
it is even)

.OPDEF opcode value,
operand-descriptor-list

Defines an opcode and its operand
list

PACKED decimal-string [,symbol]

Generates packed decimal data, 2
digits per byte

.PAGE

Causes the assembly listing to skip
to the top of the next page, and to
increment the page count

.PRINT [expression] ;comment

Displays the specified message

.PSECT

Begins or resumes the blank program
section

.PSECT section-name
argument-list

Begins or resumes a user-defined
program section

.QUAD literal

Stores 8 bytes of data

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-1 (Cont.)

Assembler Directives

Format

Operation

.QUAD symbol

Stores 8 bytes of data

.REF1 operand

Generates byte operand

REF2 operand

Generates word operand

.REF4 operand

Generates longword operand

.REF8 operand

Generates quadword operand

.REF 16 operand

Generates octaword operand

.REPEAT expression

Begins a repeat block; the section of
code up to the next .ENDR directive
is repeated the number of times
specified by the expression

.REPT

Equivalent to .REPEAT

.RESTORE

Equivalent to .RESTORE_PSECT

.RESTORE_PSECT

Restores program section context
from the program section context
stack

.SAVE [LOCALBLOCK]

Equivalent to .SAVE_PSECT

.SAVE_PSECT [LOCAI_BLOCK]

Saves current program section
context on the program section
context stack

.SBTTL comment-string

Equivalent to .SUBTITLE

.SHOW

Increments listing level count

.SHOW argument-list

Controls listing of macros and
conditional assembly blocks

.SIGNED_BYTE expression-list

Stores successive bytes of signed
data

.SIGNED_WORD expression-list

Stores successive words of signed
data

.SUBTITLE comment-string

Causes the specified string to be
printed as part of the assembly
listing page header; the string
component of each .SUBTITLE is
collected into a table of contents at
the beginning of the assembly listing

.TITLE module-name
comment-string

Assigns the first 15 characters in the
string as an object module name and
causes the string to appear on each
page of the assembly listing

TRANSFER symbol

Directs the linker to redefine the
value of the global symbol for use in
a shareable image

.WARN [expression] ;comment

Displays specified warning message

.WEAK symbol-list

Indicates that each of the listed
symbols has the weak attribute

C—5

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-1

C.2

(Cont.)

Assembler Directives

Format

Operation

.WORD expression-list

Generates successive words of data;
each word contains the value of the
corresponding specified expression

Special Characters
The following table summarizes the VAX MACRO special characters.
Table C-2

Special Characters Used in VAX MACRO
Statements

Character

Character Name

Underline

Character in symbol names

Dollar sign

Character in symbol names

Period

Character in symbol names, current
location counter, and decimal point

Colon

Label terminator

Equal sign

Direct assignment operator and macro
keyword argument terminator

Tab

Field terminator

Space

Field terminator

Number sign

Immediate addressing mode indicator

At sign

Deferred addressing mode indicator and
arithmetic shift operator

Comma

Field, operand, and item separator

C-6

Function(s)

;

Semicolon

Comment field indicator

Plus sign

Autoincrement addressing mode indica¬
tor, unary plus operator, and arithmetic
addition operator

Minus sign

Autodecrement addressing mode indi¬
cator, unary minus operator, arithmetic
subtraction operator, and line continua¬
tion indicator

Asterisk

Arithmetic multiplication operator

Slash

Arithmetic division operator

Ampersand

Logical AND operator

Exclamation
point

Logical inclusive OR operator

Backslash

Logical exclusive OR and numeric conver¬
sion indicator in macro arguments

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-2 (Cont.)

Character Name

Function(s)

Circumflex

Unary operator indicator and macro
argument delimiter

Square brackets

Index addressing mode and repeat count
indicators

< >

Parentheses

Angle brackets

Argument or expression grouping delim¬
iters

Question mark

Created label indicator in macro argu¬
ments

•

Apostrophe

Macro argument concatenation indicator

Percent sign

Macro string operators

Character

C.3

Operators

C.3.1

Unary Operators

Special Characters Used in VAX MACRO
Statements

The following table summarizes the VAX MACRO unary operators.
Table C-3

Unary Operators

Unary
Operator

Operator
Name

Example

Effect

Plus sign

Results in the positive
value of A (default)

Minus sign

-A

Results in the negative
(2's complement) value of
A

Binary

"B11000111

Specifies that 11000111
is a binary number

Decimal

"D127

Specifies that 127 is a
decimal number

Octal

"034

Specifies that 34 is an
octal number

Hexadecimal

"XFCF9

Specifies that FCF9 is a
hexadecimal number

C—7

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

C.3.2

Table C—3

(Cont.)

Unary Operators

Unary
Operator

Operator
Name

Example

Effect

ASCII

"A/ABC/

Produces an ASCII string;
the characters between
the matching delimiters
are converted to ASCII
representation

~M<R3,R4,R5>

Specifies the registers
R3, R4, and R5 in the
register mask

Floating point

T3.0

Specifies that 3.0 is a
floating-point number

Complement

X24

Produces the 1 's com¬
plement value of 24
(decimal)

Binary Operators
The following table summarizes the VAX MACRO binary operators.
Table C-4

C.3.3

Binary Operators

Binary
Operator

Operator
Name

Example

Plus sign

A+B

Addition

Minus sign

A-B

Subtraction

Asterisk

A*B

Multiplication

Slash

A/B

Division

At sign

A@B

Arithmetic Shift

Ampersand

A&B

Logical AND

Exclamation point

A!B

Logical inclusive OR

Backslash

A\B

Logical exclusive OR

Operation

Macro String Operators
The following table summarizes the macro string operators. These operators
can be used only in macros.

C—8

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-5

C.4

Macro String Operators

Format

Function

%LENGTH(string)

Returns the length of the string

%LOCATE(string 1 ,string2[,symbol])

Locates the substring string 1
within string2 starting the
search at the character position
specified by symbol

%EXTRACT(symbol1 ,symbol2, string)

Extracts a substring from
string that begins at character
position specified by symbol 1
and has a length specified by
symbol2

Addressing Modes
The following table summarizes the VAX MACRO addressing modes.
Table C—6

Addressing Modes

Type

Addressing
Mode

Format

Hex
Value

Description

Indexable?

General
Register

(Rn)

Yes

Autoincrement

(Rn)+

Register contains the address
of the operand; the proces¬
sor increments the register
contents by the size of the
operand data type

Yes

C—9

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C—6 (Cont.)
Type

Program
Counter

Addressing Modes

Addressing
Mode

Format

Hex
Value

Description

Indexable?

Autoincrement
Deferred

@(Rn)+

Yes

Autodecrement

-(Rn)

The processor decrements
the register contents by the
size of the operand data type;
the register then contains the
address of the operand

Yes

Displacement

dis(Rn)
ETdis(Rn)
V\Tdis(Rn)
L^dis(Rn)

The sum of the contents of
the register and the displace¬
ment is the address of the
operand; B~, W\and L" indi¬
cate byte, word, and longword
displacement, respectively

Yes

A
C
E

Displacement
Deferred

@dis(Rn)
@ETdis(Rn)
@V\Tdis(Rn)
@L~dis(Rn)

The sum of the contents of
the register and the displace¬
ment is the address of the
operand address; B~, V\T,
and L* indicate byte, word,
and longword displacement,
respectively

Yes

B
D
F

Literal

#literal
S~#literal

The literal specified is the the
operand; the literal is stored
as a short literal

0-3

address
ETaddress
NATaddress
Laddress

The address specified is
the address of the operand;
the address specified is
stored as a displacement from
PC; B~, V\T, and L" indicate
byte, word, and longword
displacement, respectively

Yes

A
C
E

Relative

C-10

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-6 (Cont.)
Type

Index

Addressing Modes

Addressing
Mode

Format

Relative Deferred

B
D
F

Absolute

@#address

Immediate

#literal
T#literal

General

G'address

Index

base-mode[Rx]

Hex
Value

Description

Indexable?

The address specified is
the address of the operand
address; the address specified
is stored as a displacement
from PC; B\ W\ and 1/
indicate byte, word, and
longword displacement,
respectively

Yes

The address specified is the
address of the operand; the
address specified is stored
as an absolute virtual address
(not as a displacement)

Yes

The literal specified is the
operand; the literal is stored
as a byte, word, longword, or
quadword

Yes

C-11

VAX MACRO and Instruction Set
VAX Macro Assembler Directives and Language Summary

Table C-6 (Cont.)

Addressing Modes

Type

Addressing
Mode

Format

Branch

address

Hex
Value

Description

Indexable?

The address specified is
the operand; this address is
stored as a displacement to
PC; branch mode can only
be used with the branch
instructions

C-12

Permanent Symbol Table

The permanent symbol table (PST) contains the symbols that VAX MACRO
automatically recognizes. These symbols consist of both opcodes and assem¬
bler directives. Sections D.l and D.2 below present the opcodes (instruction
set) in alphabetical and numerical order, respectively. Section C.l (in Ap¬
pendix C) presents the assembler directives.
See Section 9 and the VAX-11 Architecture Reference Manual for detailed
descriptions of the instruction set.

D. 1

Opcodes (Alphabetic Order)
Table D-1

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

ACBB

Add compare and branch byte

ACBD

Add compare and branch D_floating

ACBF

Add compare and branch F_floating

4FFD

ACBG

Add compare and branch G_floating

6FFD

ACBH

Add compare and branch FI_floating

ACBL

Add compare and branch long

ACBW

Add compare and branch word

ADAWI

Add aligned word interlocked

ADDB2

Add byte 2 operand

ADDB3

Add byte 3 operand

ADDD2

Add D_floating 2 operand

ADDD3

Add D_floating 3 operand

ADDF2

Add F_floating 2 operand

ADDF3

Add F_floating 3 operand

40FD

ADDG2

Add G_floating 2 operand

41FD

ADDG3

Add G_floating 3 operand

60FD

ADDH2

Add H_floating 2 operand

61FD

ADDH3

Add H_floating 3 operand

ADDL2

Add long 2 operand

ADDL3

Add long 3 operand

ADDP4

Add packed 4 operand

ADDP6

Add packed 6 operand

ADDW2

Add word 2 operand

D—1

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—1

D—2

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

ADDW3

Add word 3 operand

ADWC

Add with carry

AOBLEQ

Add one and branch on less or equal

AOBLSS

Add one and branch on less

ASHL

Arithmetic shift long

ASHP

Arithmetic shift and round packed

ASHQ

Arithmetic shift quad

BBC

Branch on bit clear

BBCC

Branch on bit clear and clear

BBCCI

Branch on bit clear and clear interlocked

BBCS

Branch on bit clear and set

BBS

Branch on bit set

BBSC

Branch on bit set and clear

BBSS

Branch on bit set and set

BBSSI

Branch on bit set and set interlocked

BCC

Branch on carry clear

BCS

Branch on carry set

BEQL

Branch on equal

BEQLU

Branch on equal unsigned

BGEQ

Branch on greater or equal

BGEQU

Branch on greater or equal unsigned

BGTR

Branch on greater

BGTRU

Branch on greater unsigned

BICB2

Bit clear byte 2 operand

BICB3

Bit clear byte 3 operand

BICL2

Bit clear long 2 operand

BICL3

Bit clear long 3 operand

BICPSW

Bit clear program status word

BICW2

Bit clear word 2 operand

BICW3

Bit clear word 3 operand

BISB2

Bit set byte 2 operand

BISB3

Bit set byte 3 operand

BISL2

Bit set long 2 operand

BISL3

Bit set long 3 operand

BISPSW

Bit set program status word

BISW2

Bit set word 2 operand

BISW3

Bit set word 3 operand

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—1

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

BITB

Bit test byte

BITL

Bit test long

BITW

Bit test word

BLBC

Branch on low bit clear

BLBS

Branch on low bit set

BLEQ

Branch on less or equal

BLEQU

Branch on less or equal unsigned

BLSS

Branch on less

BLSSU

Branch on less unsigned

BNEQ

Branch on not equal

BNEQU

Branch on not equal unsigned

BPT

Break point trap

BRB

Branch with byte displacement

BRW

Branch with word displacement

BSBB

Branch to subroutine with byte displacement

BSBW

Branch to subroutine with word displacement

BVC

Branch on overflow clear

BVS

Branch on overflow set

CALLG

Call with general argument list

CALLS

Call with stack

CASEB

Case byte

CASEL

Case long

CASEW

Case word

CHME

Change mode to executive

CHMK

Change mode to kernel

CHMS

Change mode to supervisor

CHMU

Change mode to user

CLRB

Clear byte

CLRD

Clear D_floating

CLRF

Clear F_floating

CLRG

Clear G_floating

7CFD

CLRH

Clear H_floating

CLRL

Clear long

7CFD

CLRO

Clear octa

CLRQ

Clear quad

CLRW

Clear word

CMPB

Compare byte

D—3

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-1

D—4

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

CMPC3

Compare character 3 operand

CMPC5

Compare character 5 operand

CMPD

Compare D_floating

CMPF

Compare F_floating

51FD

CMPG

Compare G_floating

71FD

CMPH

Compare H_floating

CMPL

Compare long

CMPP3

Compare packed 3 operand

CMPP4

Compare packed 4 operand

CMPV

Compare field

CMPW

Compare word

Functional Name

CMPZV

Compare zero-extended field

CRC

Calculate cyclic redundancy check

CVTBD

Convert byte to D_floating

CVTBF

Convert byte to F_floating

4CFD

CVTBG

Convert byte to G_floating

6CFD

CVTBH

Convert byte to H_floating

CVTBL

Convert byte to long

CVTBW

Convert byte to word

CVTDB

Convert D_floating to byte

CVTDF

Convert D_floating to F_floating

32FD

CVTDH

Convert D_floating to H_floating

CVTDL

Convert D_floating to long

CVTDW

Convert D_floating to word

CVTFB

Convert F_floating to byte

CVTFD

Convert F_floating to D_floating

99FD

CVTFG

Convert F_floating to G_floating

98FD

CVTFH

Convert F_floating to H_floating

CVTFL

Convert F_floating to long

CVTFW

Convert F_floating to word

48FD

CVTGB

Convert G_floating to byte

33FD

CVTGF

Convert G_floating to F_floating

56FD

CVTGH

Convert G_floating to H_floating

4AFD

CVTGL

Convert G_floating to long

49FD

CVTGW

Convert G_floating to word

68FD

CVTHB

Convert H_floating to byte

F7FD

CVTHD

Convert H_floating to D_floating

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—1

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

F6FD

CVTHF

Convert H_floating to F_floating

76FD

CVTHG

Convert H_floating to G_floating

6AFD

CVTHL

Convert H_floating to long

69FD

CVTHW

Convert H_floating to word

CVTLB

Convert long to byte

CVTLD

Convert long to D_floating

CVTLF

Convert long to F_floating

4EFL

CVTLG

Convert long to G_floating

6EFD

CVTLH

Convert long to H_floating

CVTLP

Convert long to packed

CVTLW

Convert long to word

CVTPL

Convert packed to long

CVTPS

Convert packed to leading separate

CVTPT

Convert packed to trailing
Convert rounded D_floating to long

CVTRDL

CVTRFL

Convert rounded F_floating to long

4BFG

CVTRGL

Convert rounded G_floating to long

6BFD

CVTRHL

Convert rounded H_floating to long

CVTSP

Convert leading separate to packed

CVTTP

Convert trailing to packed

CVTWB

Convert word to byte

CVTWD

Convert word to D_floating

CVTWF

Convert word to F_floating

4DFD

CVTWG

Convert word to G_floating

6DFD

CVTWH

Convert word to H_floating

CVTWL

Convert word to long

DECB

Decrement byte

DECL

Decrement long

DECW

Decrement word

DIVB2

Divide byte 2 operand

DIVB3

Divide byte 3 operand

DIVD2

Divide D_floating 2 operand

DIVD3

Divide D_floating 3 operand

DIVF2

Divide F_floating 2 operand

DIVF3

Divide F_floating 3 operand

46FD

DIVG2

Divide G_floating 2 operand

47FD

DIVG3

Divide G_floating 3 operand

D—5

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-1

D—6

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

66FD

DIVH2

Divide H_floating 2 operand

67FD

DIVH3

Divide H_floating 3 operand

DIVL2

Divide long 2 operand

DIVL3

Divide long 3 operand

DIVP

Divide packed

DIVW2

Divide word 2 operand

DIVW3

Divide word 3 operand

EDITPC

Edit packed to character

EDIV

Extended divide

EMODD

Extended modulus D_floating

EMODF

Extended modulus F_floating

54FD

EMODG

Extended modulus G_floating

74FD

EMODH

Extended modulus H_floating

EMUL

Extended multiply

EXTV

Extract field

EXTZV

Extract zero-extended field

FFC

Find first clear bit

FFS

Find first set bit

HALT

Halt

INCB

Increment byte

INCL

Increment long

INCW

Increment word

INDEX

Index calculation

INSQHI

Insert into queue at head, interlocked

INSQTI

Insert into queue at tail, interlocked

INSQUE

Insert into queue

INSV

Insert field

JMP

Jump

JSB

Jump to subroutine

LDPCTX

Load program context

LOCC

Locate character

MATCHC

Match characters

MCOMB

Move complemented byte

MCOML

Move complemented long

MCOMW

Move complemented word

MFPR

Move from processor register

MNEGB

Move negated byte

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-1

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

MNEGD

Move negated D_floating

MNEGF

Move negated F_floating

52FD

MNEGG

Move negated G_floating

72FD

MNEGH

Move negated H_floating

MNEGL

Move negated long

MNEGW

Move negated word

MOVAB

Move address of byte

MOVAD

Move address of D_floating

MOVAF

Move address of F_floating

MOVAG

Move address of G_floating

7EFD

MOVAH

Move address of H_floating

MOVAL

Move address of long

7EFD

MOVAO

Move address of octa

MOVAQ

Move address of quad

MOVAW

Move address of word

MOVB

Move byte

MOVC3

Move character 3 operand

MOVC5

Move character 5 operand

MOVD

Move D_floating

MOVF

Move F_floating

50FD

MOVG

Move G_floating

70FD

MOVH

Move H_floating

MOVL

Move long

7DFD

MOVO

Move data

MOVP

Move packed

MOVPSL

Move program status longword

MOVQ

Move quad

MOVTC

Move translated characters

MOVTUC

Move translated until character

MOVW

Move word

MOVZBL

Move zero-extended byte to long

MOVZBW

Move zero-extended byte to word

MOVZWL

Move zero-extended word to long

MTPR

Move to processor register

MULB2

Multiply byte 2 operand

MULB3

Multiply byte 3 operand

MULD2

Multiply D_floating 2 operand

D—7

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—1

D—8

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

MULD3

Multiply D_floating 3 operand

MULF2

Multiply F_floating 2 operand

MULF3

Multiply F_floating 3 operand

44FD

MULG2

Multiply G_floating 2 operand

45FD

MULG3

Multiply G_floating 3 operand

64FD

MULH2

Multiply H_floating 2 operand

65FD

MULH3

Multiply H_floating 3 operand

MULL2

Multiply long 2 operand

MULL3

Multiply long 3 operand

MULP

Multiply packed

MULW2

Multiply word 2 operand

MULW3

Multiply word 3 operand

NOP

No operation

POLYD

Evaluate polynomial D_floating

POLYF

Evaluate polynomial F_floating

55FD

POLYG

Evaluate polynomial G_floating

75FD

POLYH

Evaluate polynomial H_floating

POPR

Pop registers

PROBER

Probe read access

PROBEW

Probe write access

PUSHAB

Push address of byte

PUSHAD

Push address of D_floating

PUSHAF

Push address of F_floating

PUSHAG

Push address of G_floating

7FFD

PUSHAH

Push address of H_floating

PUSHAL

Push address of long

7FFD

PUSHAO

Push address of octa

PUSHAQ

Push address of quad

PUSHAW

Push address of word

PUSHL

Push long

PUSHR

Push registers

REI

Return from exception or interrupt

REMQHI

Remove from queue at head, interlocked

REMQTI

Remove from queue at tail, interlocked

REMQUE

Remove from queue

RET

Return from called procedure

ROTL

Rotate long

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-1
Hex
Value

(Cont.)

Opcodes and Functions

Mnemonic

Functional Name

RSB

Return from subroutine

SBWC

Subtract with carry

SCANC

Scan for character

SKPC

Skip character

SOBGEQ

Subtract one and branch on greater or equal

SOBGTR

Subtract one and branch on greater

SPANC

Span characters

SUBB2

Subtract byte 2 operand

SUBB3

Subtract byte 3 operand

SUBD2

Subtract D_floating 2 operand

SUBD3

Subtract D_floating 3 operand

SUBF2

Subtract F_floating 2 operand

SUBF3

Subtract F_floating 3 operand

42FD

SUBG2

Subtract G_floating 2 operand

43FD

SUBG3

Subtract G_floating 3 operand

62FD

SUBH2

Subtract H_floating 2 operand

63FD

SUBH3

Subtract H_floating 3 operand

SUBL2

Subtract long 2 operand

SUBL3

Subtract long 3 operand

SUBP4

Subtract packed 4 operand

SUBP6

Subtract packed 6 operand

SUBW2

Subtract word 2 operand

SUBW3

Subtract word 3 operand

SVPCTX

Save process context

TSTB

Test byte

TSTD

Test D_floating

TSTF

Test F_floating

53FD

TSTG

Test G_floating

73FD

TSTH

Test H_floating

TSTL

Test long

TSTW

Test word

XFC

Extended function call

XORB2

Exclusive-OR byte 2 operand

XORB3

Exclusive-OR byte 3 operand

XORL2

Exclusive-OR long 2 operand

XORL3

Exclusive-OR long 3 operand

XORW2

Exclusive-OR word 2 operand

D—9

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-1

D.2

(Cont.)

Opcodes and Functions

Hex
Value

Mnemonic

Functional Name

X0RW3

Exclusive-OR word 3 operand

Opcodes (Numeric Order)
Table D—2

D—10

One-Byte Opcodes

Hex
Value

Mnemonic

Hex
Value

Mnemonic

HALT

BSBW

NOP

BRW

REI

CVTWL

BPT

CVTWB

RET

MOVP

RSB

CMPP3

LDPCTX

CVTPL

SVPCTX

CMPP4

CVTPS

EDITPC

CVTSP

MATCHC

INDEX

LOCC

CRC

SKPC

PROBER

MOVZWL

PROBEW

ACBW

INSQUE

MOVAW

REMQUE

PUSHAW

BSBB

ADDF2

BRB

ADDF3

BNEQ# BNEQU

SUBF2

BEQL, BEQLU

SUBF3

BGTR

MULF2

BLEQ

MULF3

JSB

DIVF2

JMP

DIVF3

BGEQ

CVTFB

BLSS

CVTFW

BGTRU

CVTFL

BLEQU

CVTRFL

BVC

CVTBF

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—2 (Cont.)

One-Byte Opcodes

Hex
Value

Mnemonic

Hex
Value

Mnemonic

BVS

CVTWF

BGEQU, BCC

CVTLF

BLSSU, BCS

ACBF

ADDP4

MOVF

ADDP6

CMPF

SUBP4

MNEGF

SUBP6

TSTF

CVTPT

EMODF

MULP

POLYF

CVTTP

CVTFD

DIVP

Reserved to
DIGITAL

MOVC3

ADAWI

CMPC3

Reserved to
DIGITAL

SCANC

Reserved to
DIGITAL

SPANC

Reserved to
DIGITAL

MOVC5

INSQHI

CMPC5

INSQTI

MOVTC

REMQHI

MOVTUC

REMQTI

ADDD2

MOVB

ADDD3

CMPB

SUBD2

MCOMB

SUBD3

BITB

MULD2

CLRB

MULD3

TSTB

DIVD2

INCB

DIVD3

DECB

CVTDB

CVTBL

CVTDW

CVTBW

CVTDL

MOVZBL

CVTRDL

MOVZBW

CVTBD

ROTL

CVTWD

ACBB

CVTLD

MOVAB

D—11

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-2 (Cont.)

D—12

One-Byte Opcodes

Hex
Value

Mnemonic

Hex
Value

Mnemonic

ACBD

PUSHAB

MOVD

ADDW2

CMPD

ADDW3

MNEGD

SUBW2

TSTD

SUBW3

EMODD

MULW2

POLYD

MULW3

CVTDF

DIVW2

Reserved to DIGITAL

DIVW3

ASHL

BISW2

ASHQ

BISW3

EMUL

BICW2

EDIV

BICW3

CLRQ, CLRD, CLRG

XORW2

MOVQ

XORW3

MOVAQ, MOVAD, MOVAG

MNEGW

PUSHAQ, PUSHAD, PUSHAG

CASEW

ADDB2

MOVW

ADDB3

CMPW

SUBB2

MCOMW

SUBB3

BITW

MULB2

CLRW

MULB3

TSTW

DIVB2

INCW

DIVB3

DECW

BISB2

BISPSW

BISB3

BICPSW

BICB2

POPR

BICB3

PUSHR

XORB2

CHMK

XORB3

CHME

MNEGB

CHMS

CASEB

CHMU

ADDL2

BBS

ADDL3

BBC

SUBL2

BBSS

SUBL3

BBCS

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-2 (Cont.)

One-Byte Opcodes

Hex
Value

Mnemonic

Hex
Value

Mnemonic

MULL2

BBSC

MULL3

BBCC

DIVL2

BBSSI

DIVL3

BBCCI

BISL2

BLBS

BISL3

BLBC

BICL2

FFS

BICL3

FFC

XORL2

CMPV

XORL3

CMPZV

MNEGL

EXTV

CASEL

EXTZV

MOVL

INSV

CMPL

ACBL

MCOML

AOBLSS

BITL

AOBLEQ

CLRL, CLRF

SOBGEQ

TSTL

SOBGTR

INCL

CVTLB

DECL

CVTLW

ADWC

ASHP

SBWC

CVTLP

MTPR

CALLG

MFPR

CALLS

MOVPSL

XFC

PUSHL

ESCD to
DIGITAL

MOVAL, MOVA

ESCE to
DIGITAL

PUSHAL, PUSHAF

ESCF to
DIGITAL

D—13

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—3

Two-Byte Opcodes

Hex
Value

Mnemonic

Hex
Value

Mnemonic

OOFD

Reserved to DIGITAL

30FD

Reserved to DIGITAL

01FD

Reserved to DIGITAL

31FD

Reserved to DIGITAL

02FD

Reserved to DIGITAL

32FD

CVTDH

03FD

Reserved to DIGITAL

33FD

CVTGF

04FD

Reserved to DIGITAL

34FD

Reserved to DIGITAL

05FD

Reserved to DIGITAL

35FD

Reserved to DIGITAL

06FD

Reserved to DIGITAL

36FD

Reserved to DIGITAL

07FD

Reserved to DIGITAL

37FD

Reserved to DIGITAL

08FD

Reserved to DIGITAL

38FD

Reserved to DIGITAL

09FD

Reserved to DIGITAL

39FD

Reserved to DIGITAL

OAFD

Reserved to DIGITAL

3AFD

Reserved to DIGITAL

OBFD

Reserved to DIGITAL

3BFD

Reserved to DIGITAL

OCFD

Reserved to DIGITAL

3CFD

Reserved to DIGITAL

ODFD

Reserved to DIGITAL

3DFD

Reserved to DIGITAL

OEFD

Reserved to DIGITAL

3EFD

Reserved to DIGITAL

OFFD

Reserved to DIGITAL

3FFD

Reserved to DIGITAL

10FD

Reserved to DIGITAL

40FD

ADDG2

11FD

Reserved to DIGITAL

41FD

ADDG3

12FD

Reserved to DIGITAL

42FD

SUBG2

13FD

Reserved to DIGITAL

43FD

SUBG3

14FD

Reserved to DIGITAL

44FD

MULG2

15FD

Reserved to DIGITAL

45FD

MULG3

16FD

Reserved to DIGITAL

46FD

DIVG2

17FD

Reserved to DIGITAL

47FD

DIVG3

18FD

Reserved to DIGITAL

48FD

CVTGB

19FD

Reserved to DIGITAL

49FD

CVTGW

1AFD

Reserved to DIGITAL

4AFD

CVTGL

1BFD

Reserved to DIGITAL

4BFD

CVTRGL

1CFD

Reserved to DIGITAL

4CFD

CVTBG

1DFD

Reserved to DIGITAL

4DFD

CVTWG

1EFD

Reserved to DIGITAL

4EFD

CVTLG

1FFD

Reserved to DIGITAL

4FFD

ACBG

20FD

Reserved to DIGITAL

50FD

MOVG

21FD

Reserved to DIGITAL

51FD

CMPG

22FD

Reserved to DIGITAL

52FD

MNEGG

23FD

Reserved to DIGITAL

53FD

TSTG

24FD

Reserved to DIGITAL

54FD

EMODG

D—14

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D-3 (Cont.)

Two-Byte Opcodes

Hex
Value

Mnemonic

25FD

Reserved to DIGITAL

55FD

POLYG

26FD

Reserved to DIGITAL

56FD

CVTGH

27FD

Reserved to DIGITAL

57FD

Reserved to DIGITAL

Hex
Value

Mnemonic

28FD

Reserved to DIGITAL

58FD

Reserved to DIGITAL

29FD

Reserved to DIGITAL

59FD

Reserved to DIGITAL

2AFD

Reserved to DIGITAL

5AFD

Reserved to DIGITAL

2BFD

Reserved to DIGITAL

5BFD

Reserved to DIGITAL

2CFD

Reserved to DIGITAL

5CFD

Reserved to DIGITAL

2DFD

Reserved to DIGITAL

5DFD

Reserved to DIGITAL

2EFD

Reserved to DIGITAL

5EFD

Reserved to DIGITAL

2FFD

Reserved to DIGITAL

5FFD

Reserved to DIGITAL

60FD

ADDH2

90FD

Reserved to DIGITAL

61FD

ADDH3

91FD

Reserved to DIGITAL

62FD

SUBH2

92FD

Reserved to DIGITAL

63FD

SUBH3

93FD

Reserved to DIGITAL

64FD

MULH2

94FD

Reserved to DIGITAL

65FD

MULH3

95FD

Reserved to DIGITAL

66FD

DIVH2

96FD

Reserved to DIGITAL

67FD

DIVH3

97FD

Reserved to DIGITAL

68FD

CVTHB

98FD

CVTFH

69FD

CVTHW

99FD

CVTFG

6AFD

CVTHL

9AFD

Reserved to DIGITAL

6BFD

CVTRHL

9BFD

Reserved to DIGITAL

6CFD

CVTBH

9CFD

Reserved to DIGITAL

6DFD

CVTWH

9DFD

Reserved to DIGITAL

6EFD

CVTLH

9EFD

Reserved to DIGITAL

6FFD

ACBH

9FFD

Reserved to DIGITAL

70FD

MOVH

AOFD

Reserved to DIGITAL

71FD

CMPH

A1FD

Reserved to DIGITAL

72FD

MNEGH

A2FD

Reserved to DIGITAL

73FD

TSTH

A3FD

Reserved to DIGITAL

74FD

EMODH

A4FD

Reserved to DIGITAL

75FD

POLYH

A5FD

Reserved to DIGITAL

76FD

CVTHG

A6FD

Reserved to DIGITAL

77FD

Reserved to DIGITAL

A7FD

Reserved to DIGITAL

78FD

Reserved to DIGITAL

A8FD

Reserved to DIGITAL

79FD

Reserved to DIGITAL

A9FD

Reserved to DIGITAL

D—15

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—3 (Cont.)

Two-Byte Opcodes

Hex
Value

Mnemonic

Hex
Value

Mnemonic

7AFD

Reserved to DIGITAL

AAFD

Reserved to DIGITAL

7BFD

Reserved to DIGITAL

ABFD

Reserved to DIGITAL

7CFD

CLRH# CLRO

ACFD

Reserved to DIGITAL

7DFD

MOVO

ADFD

Reserved to DIGITAL

7EFD

MOVAH, MOVAO

AEFD

Reserved to DIGITAL

7FFD

PUSHAH,PUSHAO

AFFD

Reserved to DIGITAL

80FD

Reserved to DIGITAL

BOFD

Reserved to DIGITAL

81FD

Reserved to DIGITAL

B1FD

Reserved to DIGITAL

82FD

Reserved to DIGITAL

B2FD

Reserved to DIGITAL

83FD

Reserved to DIGITAL

B3FD

Reserved to DIGITAL

84FD

Reserved to DIGITAL

B4FD

Reserved to DIGITAL

85FD

Reserved to DIGITAL

B5FD

Reserved to DIGITAL

86FD

Reserved to DIGITAL

B6FD

Reserved to DIGITAL

87FD

Reserved to DIGITAL

B7FD

Reserved to DIGITAL

88FD

Reserved to DIGITAL

B8FD

Reserved to DIGITAL

89FD

Reserved to DIGITAL

B9FD

Reserved to DIGITAL

8AFD

Reserved to DIGITAL

BAFD

Reserved to DIGITAL

8BFD

Reserved to DIGITAL

BBFD

Reserved to DIGITAL

8CFD

Reserved to DIGITAL

BCFD

Reserved to DIGITAL

8DFD

Reserved to DIGITAL

BDFD

Reserved to DIGITAL

8EFD

Reserved to DIGITAL

BEFD

Reserved to DIGITAL

8FFD

Reserved to DIGITAL

BFFD

Reserved to DIGITAL

COFD

Reserved to DIGITAL

EOFD

Reserved to DIGITAL

C1FD

Reserved to DIGITAL

E1FD

Reserved to DIGITAL

C2FD

Reserved to DIGITAL

E2FD

Reserved to DIGITAL

C3FD

Reserved to DIGITAL

E3FD

Reserved to DIGITAL

C4FD

Reserved to DIGITAL

E4FD

Reserved to DIGITAL

C5FD

Reserved to DIGITAL

E5FD

Reserved to DIGITAL

C6FD

Reserved to DIGITAL

E6FD

Reserved to DIGITAL

C7FD

Reserved to DIGITAL

E7FD

Reserved to DIGITAL

C8FD

Reserved to DIGITAL

E8FD

Reserved to DIGITAL

C9FD

Reserved to DIGITAL

E9FD

Reserved to DIGITAL

CAFD

Reserved to DIGITAL

EAFD

Reserved to DIGITAL

CBFD

Reserved to DIGITAL

EBFD

Reserved to DIGITAL

CCFD

Reserved to DIGITAL

ECFD

Reserved to DIGITAL

CDFD

Reserved to DIGITAL

EDFD

Reserved to DIGITAL

CEFD

Reserved to DIGITAL

EEFD

Reserved to DIGITAL

D—16

VAX MACRO and Instruction Set
Permanent Symbol Table

Table D—3 (Cont.)

Two-Byte Opcodes

Hex
Value

Mnemonic

Hex
Value

Mnemonic

CFFD

Reserved to DIGITAL

EFFD

Reserved to DIGITAL

DOFD

Reserved to DIGITAL

FOFD

Reserved to DIGITAL

D1FD

Reserved to DIGITAL

F1FD

Reserved to DIGITAL

D2FD

Reserved to DIGITAL

F2FD

Reserved to DIGITAL

D3FD

Reserved to DIGITAL

F3FD

Reserved to DIGITAL

D4FD

Reserved to DIGITAL

F4FD

Reserved to DIGITAL

D5FD

Reserved to DIGITAL

F5FD

Reserved to DIGITAL

D6FD

Reserved to DIGITAL

F6FD

CVTHF

D7FD

Reserved to DIGITAL

F7FD

CVTHD

D8FD

Reserved to DIGITAL

F8FD

Reserved to DIGITAL

D9FD

Reserved to DIGITAL

F9FD

Reserved to DIGITAL

DAFD

Reserved to DIGITAL

FAFD

Reserved to DIGITAL

DBFD

Reserved to DIGITAL

FBFD

Reserved to DIGITAL

DCFD

Reserved to DIGITAL

FCFD

Reserved to DIGITAL

DDFD

Reserved to DIGITAL

FCFE

Reserved to DIGITAL

DEFD

Reserved to DIGITAL

FCFF

Reserved to DIGITAL

DFFD

Reserved to DIGITAL

FDFF

BUGL

FEFF

BUGW

FFFF

Reserved for all time

D—17

Index

Absolute expression*3-9
Absolute mode *5-14

ADDP4 (Add Packed 4 Operand)
instruction • 9-143 to 9-144
ADDP6 (Add Packed 6 Operand)
instruction • 9-143 to 9-144
Address
virtual *8-1
Address access type *8-14

assembling relative mode as *6-22
Absolute queue *9-82 to 9-85

.ADDRESS directive• 6-4
Address instructions *9-34 to 9-36

manipulating *9-85
ACBB (Add Compare and Branch Byte) instruction
• 9-45 to 9-46
ACBD (Add Compare and Branch D_floating
instruction* 9-45 to 9-46
ACBF (Add Compare and Branch F_floating)
instruction* 9-45 to 9-46
ACBG (Add Compare and Branch G_floating)
instruction* 9-45 to 9-46
ACBH (Add Compare and Branch H_floating)
instruction • 9-45 to 9-46
ACBL (Add Compare and Branch Long) instruction
• 9-45 to 9-46
ACBW (Add Compare and Branch Word)
instruction • 9-45 to 9-46
Actual argument *4-1 to 4-2
ADAWI (Add Aligned Word Interlocked)
instruction • 9-8

Address storage directive (.ADDRESS) • 6-4
Addressing mode *5-1 to 5-19
absolute*5-14, 6-22
autodecrement • 5-7
autoincrement • 5-5
autoincrement deferred • 5-6 to 5-7
branch* 5-19
determining • 6-67 to 6-68
displacement • 5-7 to 5-8
displacement deferred *5-9 to 5-10
general* 5-16
general register *5-1 to 5-12
immediate*5-14 to 5-15
index*5-16 to 5-18
literal *5-10 to 5-13, 5-15
operand specifier formats *8-14 to 8-24
program counter *5-12 to 5-16
register*5-4 to 5-5

ADDB2 (Add Byte 2 Operand) instruction • 9-9
ADDB3 (Add Byte 3 Operand) instruction • 9-9
ADDD2 (Add D_floating 2 Operand)
instruction *9-105
ADDD3 (Add D_floating 3 Operand)
instruction *9-105
ADDF2 (Add F_floating 2 Operand)
instruction *9-105
ADDF3 (Add F_floating 3 Operand)
instruction *9-105
ADDG2 (ADD G_floating 2 Operand)
instruction *9-105
ADDG3 (ADD G_floating 3 Operand)
instruction *9-105
ADDH2 (ADD H_floating 2 Operand)
instruction *9-105
ADDH3 (ADD H_floating 3 Operand)
instruction *9-105
ADDL2 (Add Long 2 Operand) instruction • 9-9
ADDL3 (Add Long 3 Operand) instruction • 9-9

register deferred • 5-5
relative *5-12 to 5-13, 6-19, 6-22
relative deferred*5-13 to 5-14, 6-19
summary *C-9 to C-12
ADDW2 (Add Word 2 Operand) instruction • 9-9
ADDW3 (Add Word 3 Operand) instruction • 9-9
ADWC (Add with Carry) instruction • 9-10
.ALIGN directive*6-5 to 6-6
AND operator *3-16
AOBLEQ (Add One and Branch Less Than or
Equal) instruction* 9-47
AOBLSS (Add One and Branch Less Than)
instruction • 9-48
Argument
in macro *4-1 to 4-6
length* 6-63
number of • 6-62
Arithmetic instructions *9-139 to 9-162
floating-point • 9-100 to 9-121
Index—1

Index

Arithmetic instructions (cont'd.)
integer *9-6 to 9-33
Arithmetic shift operator*3-15
ASCIC directive *6-8
.ASCID directive *6-9
ASCII character set*A-1 to A-2
.ASCII directive*6-10
ASCII operator *3-12
ASCII string storage directives*6-7 to 6-11
counted (.ASCIC) *6-8
string (.ASCII) • 6-10
string-descriptor (.ASCID) *6-9
zero-terminated (.ASCIZ) • 6-11
.ASCIZ directive *6-11
ASHL (Arithmetic Shift Long) instruction • 9-11
ASHP (Arithmetic Shift and Round Packed)
instruction *9-145 to 9-146
ASHQ (Arithmetic Shift Quad) instruction*9-11
Assembler directives,
summary *C-1
Assembly termination directive (.END) *6-25
Assignment statement* 1-1, 3-16 to 3-17
Autodecrement mode *5-7
operand specifier format *8-17
Autoincrement deferred mode *5-6 to 5-7
operand specifier format *8-16 to 8-17
Autoincrement mode *5-5
operand specifier format *8-16

B
Base operand specifier*8-21
BBC (Branch on Bit Clear) instruction *9-51
BBCC (Branch on Bit Clear and Clear)
instruction *9-52
BBCCI (Branch on Bit Clear and Clear Interlocked)
instruction* 9-53
BBCS (Branch on Bit Clear and Set)
instruction *9-52
BBS (Branch on Bit Set) instruction *9-51
BBSC (Branch on Bit Set and Clear)
instruction *9-52
BBSS (Branch on Bit Set and Set)
instruction *9-52
BBSSI (Branch on Bit Set and Set Interlocked)
instruction* 9-53
BCC (Branch on Carry Clear) instruction • 9-49 to
9-50
Index—2

BCS (Branch on Carry Set) instruction • 9-49 to
9-50
BEQL (Branch on Equal) instruction • 9-49 to 9-50
BEQLU (Branch on Equal Unsigned)
instruction • 9-49 to 9-50
BGEQ (Branch on Greater Than or Equal)
instruction • 9-49 to 9-50
BGEQU (Branch on Greater Than or Equal
Unsigned) instruction* 9-49 to 9-50
BGTR (Branch on Greater Than) instruction • 9-49
to 9-50
BGTRU (Branch on Greater Than Unsigned)
instruction • 9-49 to 9-50
BICB2 (Bit Clear Byte 2 Operand) instruction *9-12
BICB3 (Bit Clear Byte 3 Operand) instruction*9-12
BICL2 (Bit Clear Long 2 Operand) instruction *9-12
BICL3 (Bit Clear Long 3 Operand) instruction *9-12
BICPSW (Bit Clear PSW) instruction • 9-71
BICW2 (Bit Clear Word 2 Operand)
instruction *9-12
BICW3 (Bit Clear Word 3 Operand)
instruction *9-12
Binary operator*3-15 to 3-16
summary *C-8
BISB2 (Bit Set Byte 2 Operand) instruction*9-13
BISB3 (Bit Set Byte 3 Operand) instruction *9-13
BISL2 (Bit Set Long 2 Operand) instruction *9-13
BISL3 (Bit Set Long 3 Operand) instruction *9-13
BISPSW (Bit Set PSW) instruction*9-72
BISW2 (Bit Set Word 2 Operand)
instruction *9-13
BISW3 (Bit Set Word 3 Operand)
instruction *9-13
BITB (Bit Test Byte) instruction • 9-14
BITL (Bit Test Long) instruction • 9-14
BITW (Bit Test Word) instruction • 9-14
BLBC (Branch on Low Bit Clear) instruction • 9-54
BLBS (Branch on Low Bit Set) instruction • 9-54
BLEQ (Branch on Less Than or Equal)
instruction • 9-49 to 9-50
BLEQU (Branch on Less Than or Equal Unsigned)
instruction • 9-49 to 9-50
Block storage allocation directives (.BLKx)*6-12
to 6-13
BLSS (Branch on Less Than) instruction • 9-49 to
9-50
BLSSU (Branch on Less Than Unsigned) instruction
•9-49 to 9-50
BNEQ (Branch on Not Equal) instruction • 9-49 to
9-50

Index

BNEQU (Branch on Not Equal Unsigned) instruction
•9-49 to 9-50
BPT (Breakpoint Fault) instruction*9-73
Branch access type *8-14
Branch mode*5-20
operand specifier format *8-24
BRB (Branch Byte Displacement) instruction • 9-55
BRW (Branch Word Displacement)
instruction *9-55
BSBB (Branch to Subroutine Byte Displacement)
instruction* 9-56
BSBW (Branch to Subroutine Word Displacement)
instruction* 9-56
BUGL (Bugcheck Longword Message Identifier)
instruction* 9-191
BUGW (Bugcheck Word Message Identifier)
instruction *9-191
BVC (Branch on Overflow Clear) instruction • 9-49
to 9-50
BVS (Branch on Overflow Set) instruction • 9-49 to
9-50
Byte *8-1
BYTE directive *6-14 to 6-15
Byte storage directive (.BYTE) *6-14 to 6-15

c
Call frame*9-63
CALLG (Call Procedure With General Argument
List) instruction* 9-65 to 9-66
CALLS (Call Procedure with Stack Argument List)
instruction* 9-67 to 9-68
Carry condition code (C) • 8-11
CASEB (Case Byte) instruction*9-57
CASEL (Case Long) instruction*9-57
CASEW (Case Word) instruction*9-57
Character set
in source statement • 3-1 to 3-2
special characters*C-6 to C-7
table* A-1 to A-2
Character string
data type *8-6 to 8-7
length* 6-63
Character string instructions *9-122 to 9-135
CHME (Change Mode to Executive)
instruction *9-184 to 9-185
CHMK (Change Mode to Kernel) instruction *9-184
to 9-185

CHMS (Change Mode to Supervisor)
instruction *9-184 to 9-185
CHMU (Change Mode to User) instruction • 9-184
to 9-185
CLRB (Clear Byte) instruction • 9-15
CLRD (Clear D_floating) instruction • 9-106
CLRF (Clear F_floating) instruction • 9-106
CLRG (Clear G_floating) instruction • 9-106
CLRH (Clear H_floating) instruction • 9-106
CLRL (Clear Long) instruction • 9-15
CLRO (Clear Octa) instruction • 9-15
CLRQ (Clear Quad) instruction • 9-15
CLRW (Clear Word) instruction • 9-15
CMPB (Compare Byte) instruction • 9-16
CMPC3 (Compare Characters 3 Operand)
instruction *9-124 to 9-125
CMPC5 (Compare Characters 5 Operand)
instruction *9-124 to 9-125
CMPD (Compare D_floating) instruction • 9-107
CMPF (Compare F_floating) instruction • 9-107
CMPG (Compare G_floating) instruction • 9-107
CMPH (Compare H_floating) instruction • 9-107
CMPL (Compare Long) instruction *9-16
CMPP3 (Compare Packed 3 Operand)
instruction *9-147
CMPP4 (Compare Packed 4 Operand)
instruction *9-147
CMPV (Compare Field) instruction • 9-39
CMPW (Compare Word) instruction • 9-16
CMPZV (Compare Zero Extended Field) instruction
•9-39
Colon (:)
in label field *2-2
Complement operator*3-14
Condition code *8-11 to 8-12, 9-5
carry (C) *8-11
negative (N)*8-12
overflow (V)*8-12
zero (Z) *8-12
Conditional assembly block directives
.ENDC • 6-26
.IF*6-39 to 6-41
listing unsatisfied code *6-87
Continuation character (-)
in source statement *2-1
Control instructions*9-43 to 9-62
CRC (Calculate Cyclic Redundancy Check)
instruction *9-137 to 9-138
Created local label *4-6 to 4-7
range *3-7
Index—3

Index

.CROSS directive *6-16 to 6-17
Cross-reference directives
.CROSS *6-16 to 6-17
.NOCROSS*6-16 to 6-17, 6-65
Current location counter*3-17
CVTBD (Convert Byte to D_floating)
instruction • 9-108 to 9-110
CVTBF (Convert Byte to F_floating)
instruction • 9-108 to 9-110
CVTBG (Convert Byte to G_floating)
instruction *9-108 to 9-110
CVTBH (Convert Byte to H_floating)
instruction*9-108 to 9-110
CVTBL (Convert Byte to Long) instruction • 9-17
CVTBW (Convert Byte to Word) instruction • 9-17
CVTDB (Convert D_floating to Byte)
instruction *9-108 to 9-110
CVTDF (Convert D_floating to F_floating)
instruction • 9-108 to 9-110
CVTDH (Convert D_floating to H_floating)
instruction • 9-108 to 9-110
CVTDL (Convert D_floating to Long)
instruction • 9-108 to 9-110
CVTDW (Convert D_floating to Word)
instruction *9-108 to 9-110
CVTFB (Convert F_floating to Byte)
instruction • 9-108 to 9-110
CVTFD (Convert F_floating to D_floating)
instruction *9-108 to 9-110
CVTFG (Convert F_floating to G_floating)
instruction • 9-108 to 9-110
CVTFH (Convert F_floating to H_floating)
instruction *9-108 to 9-110
CVTFL (Convert F_floating to Long)
instruction*9-108 to 9-110
CVTFW (Convert F_floating to Word)
instruction *9-108 to 9-110
CVTGB (Convert G_floating to Byte)
instruction *9-108 to 9-110
CVTGF (Convert G_floating to F_floating)
instruction *9-108 to 9-110
CVTGH (Convert G_floating to H_floating)
instruction *9-108 to 9-110
CVTGL (Convert G_floating to Long)
instruction *9-108 to 9-110
CVTGW (Convert G_floating to Word)
instruction *9-108 to 9-110
CVTHB (Convert H_floating to Byte)
instruction *9-108 to 9-110
CVTHD (Convert H_floating to D_floating)
instruction • 9-108 to 9-110

Index—4

CVTHF (Convert H_floating to F_floating)
instruction *9-108 to 9-110
CVTHG (Convert H_floating to G_floating)
instruction *9-108 to 9-110
CVTHL (Convert H_floating to Long)
instruction • 9-108 to 9-110
CVTHW (Convert H_floating to Word)
instruction *9-108 to 9-110
CVTLD (Convert Long to D_floating)
instruction *9-108 to 9-110
CVTLF (Convert Long to F_floating)
instruction *9-108 to 9-110
CVTLG (Convert Long to G_floating)
instruction *9-108 to 9-110
CVTLH (Convert Long to H_floating)
instruction *9-108 to 9-110
CVTLP (Convert Long to Packed)
instruction *9-148
CVTLW (Convert Long to Word) instruction*9-17
CVTPL (Convert Packed to Long)
instruction *9-149
CVTPS (Convert Packed to Leading Separate
Numeric) instruction* 9-150 to 9-151
CVTPT (Convert Packed to Trailing Numeric)
instruction *9-152 to 9-153
CVTRDL (Convert Rounded D_floating to Long)
instruction* 9-108 to 9-110
CVTRFL (Convert Rounded F_floating to Long)
instruction* 9-108 to 9-110
CVTRGL (Convert Rounded G_floating to Long)
instruction* 9-108 to 9-110
CVTRHL (Convert Rounded H_floating to Long)
instruction* 9-108 to 9-110
CVTSP (Convert Leading Separate Numeric to
Packed) instruction* 9-154
CVTTP (Convert Trailing Numeric to Packed)
instruction *9-155 to 9-156
CVTWB (Convert Word to Byte) instruction • 9-17
CVTWD (Convert Word to D_floating)
instruction • 9-108 to 9-110
CVTWF (Convert Word to F_floating)
instruction *9-108 to 9-110
CVTWG (Convert Word to G_floating)
instruction*9-108 to 9-110
CVTWH (Convert Word to H_floating)
instruction *9-108 to 9-110
CVTWL (Convert Word to Long) instruction*9-17
Cyclic redundancy check instruction • 9-136 to
9-138

Index

D
D_floating data type *9-101
.D_FLOATING directive*6-20
Data storage directives
.ADDRESS *6-4
.ASCIC • 6-8
.ASCID*6-9
ASCII *6-10
.ASCIZ* 6-11
.BYTE *6-14 to 6-15
D—FLOATING • 6-20
F_FLOATING • 6-34
G—FLOATING • 6-35
H_FLOATING • 6-37
.LONG *6-55
.OCTA • 6-69
PACKED *6-73
.QUAD *6-80
.SIGNED_BYTE • 6-89
.SIGNED_WORD • 6-90 to 6-91
WORD *6-98
Data type *8-1 to 8-11
character string • 8-6 to 8-7
floating-point • 8-3 to 8-5, 9-100 to 9-101
integer *8-1 to 8-3
leading separate numeric string *8-9 to 8-10
packed decimal string *8-10 to 8-11
string *8-6 to 8-11
trailing numeric string *8-7 to 8-9
variable-length bit field *8-5 to 8-6
.DEBUG directive *6-18
Debug symbol attribute directive (.DEBUG) • 6-18
DECB (Decrement Byte) instruction*9-18
Decimal overflow enable (DV)*8-12
Decimal string instructions*9-139 to 9-162
Decimal/hexadecimal conversion • B-1
table* B-2
DECL (Decrement Long) instruction *9-18
DECW (Decrement Word) instruction • 9-18
Default control directive (.DEFAULT) • 6-19
.DEFAULT directive*6-19
Delimiter
string argument *4-3
Direct assignment statement* 1-1, 3-16 to 3-17

Directive* 1-1 to 1-2, 6-1 to 6-98
as operator *2-3
general assembler* 1-1, 6-1, 6-1 to 6-3
macro* 1-1, 6-1
summary *C-1 to C-6
Directives
macro* 6-3
.DISABLE directive*6-21
Displacement deferred mode *5-9 to 5-10
operand specifier formats *8-18
Displacement mode *5-7 to 5-8
operand specifier formats *8-17 to 8-18
DIVB2 (Divide Byte 2 Operand) instruction *9-19
DIVB3 (Divide Byte 3 Operand) instruction *9-19
DIVD2 (Divide D_floating 2 Operand)
instruction *9-111
DIVD3 (Divide D_floating 3 Operand)
instruction *9-111
DIVF2 (Divide F_floating 2 Operand)
instruction *9-1 11
DIVF3 (Divide F_floating 3 Operand)
instruction *9-111
DIVG2 (Divide G_f!oating 2 Operand)
instruction *9-111
DIVG3 (Divide G_floating 3 Operand)
instruction* 9-111
DIVH2 (Divide H_floating 2 Operand)
instruction *9-11 1
DIVH3 (Divide H_floating 3 Operand)
instruction *9-111
Divide by zero trap *8-13
DIVL2 (Divide Long 2 Operand) instruction • 9-19
DIVL3 (Divide Long 3 Operand) instruction • 9-19
DIVP (Divide Packed) instruction • 9-157 to 9-158
DIVW2 (Divide Word 2 Operand) instruction • 9-19
DIVW3 (Divide Word 3 Operand) instruction • 9-19
.DOUBLE directive• 6-20

E
Edit instruction • 9-163 to 9-180
Edit pattern operator*9-164, 9-166 to 9-180
EDITPC (Edit Packed to Character String)
instruction *9-164 to 9-180
EDIV (Extended Divide) instruction • 9-20
EMODD (Extended Multiply and Integerize
D_floating) instruction* 9-112 to 9-113

Index—5

Index

EMODF (Extended Multiply and Integerize
F_floating) instruction* 9-112 to 9-113
EMODG (Extended Multiply and Integerize
G_floating) instruction* 9-112 to 9-113
EMODH (Extended Multiply and Integerize
H_floating) instruction* 9-112 to 9-113
EMUL (Extended Multiply) instruction *9-21
.ENABLE directive *6-22 to 6-24, 6-33
End conditional directive (.ENDC)*6-26
End definition directive (,ENDM)*6-27
.END directive*6-25
End range directive (.ENDR)*6-28
.ENDC directive*6-26
.ENDM directive*6-27
.ENDR directive*6-28
.ENTRY directive *6-29 to 6-30
Entry mask *9-63
Entry point
defining *6-29 to 6-30
EO$ADJUST_INPUT (Adjust Input Length) pattern
operator* 9-169
EO$BLANK_ZERO (Blank Backwards When Zero)
pattern operator* 9-170
EO$CLEAR_SIGNIF (Clear Significance) pattern
operator* 9-179
EO$END (End Edit) pattern operator*9-171
EO$END_FLOAT (End Floating Sign) pattern
operator* 9-172
EOSFILL (Store Fill) pattern operator*9-173
EO$FLOAT (Float Sign) pattern operator*9-174
EOSINSERT (Insert Character) pattern
operator* 9-175
EO$LOAD_FILL (Load Fill Register) pattern
operator *9-176
EO$LOAD_MINUS (Load Sign Register If Minus)
pattern operator* 9-176
EO$LOAD_PLUS (Load Sign Register If Plus)
pattern operator* 9-176
EO$LOAD_SIGN (Load Sign Register) pattern
operator *9-176
E0$M0VE (Move Digits) pattern operator*9-177
EO$REPLACE_SIGN (Replace Sign When Zero)
pattern operator* 9-178
EO$SET_SIGNIF (Set Significance) pattern
operator *9-179
EO$STORE_SIGN (Store Sign) pattern
operator* 9-180
.ERROR directive*6-31
.EVEN directive*6-32
Exception control *8-1 1 to 8-13
Exclusive OR operator*3-16

Index—6

Expression • 3-9 to 3-10
absolute *3-9
evaluation of *3-9
example of *3-10
external • 3-9
global *3-9
relocatable *3-9, 3-17
Extent
syntax* 7-1
.EXTERNAL directive • 6-33
External expression • 3-9
External symbol *6-97
defining *6-22, 6-33
External symbol attribute directive*6-33
%EXTRACT operator *4-9 to 4-10
EXTV (Extract Field) instruction • 9-40
EXTZV (Extract Zero Extended Field)
instruction • 9-40

F
F_floating • 8-3
F_floating data type*9-101
.F_FLOATING directive*6-34
FFC (Find First Clear) instruction*9-41
FFS (Find First Set) instruction • 9-41
Field *2-1 to 2-4
comment *2-1, 2-3 to 2-4
label *2-1, 2-2
Must Be Zero (MBZ)*7-1
operand *2-3
operator *2-3
variable-length bit *8-5 to 8-6
.FLOAT directive*6-34
Floating overflow fault *8-13
Floating underflow enable (FU) • 8-12
Floating-point
accuracy *9-102 to 9-103
rounding *9-102 to 9-103
zero* 9-101
Floating-point data type *8-3 to 8-5, 9-100 to
9-101
D_floating • 8-4
G_floating • 8-4
H_floating • 8-5
Floating-point instructions*9-100 to 9-121
Floating-point number *9-100

Index

Floating-point number (cont'd.)
F_floating • 6-34
format • 3-3
G_floating* 6-35
H_floating*6-37
in source statement • 3-3 to 3-4
rounding *6-23
storage *6-20
storing • 6-34, 6-35, 6-37
truncating *6-23
Floating-point operator*3-14
Floating-point storage directives
.D_FLOATING • 6-20
.F_FLOATING • 6-34
.G—FLOATING • 6-35
Formal argument *4-1 to 4-2
Frame
call *9-63
stack* 9-63

G
G_floating data type *9-101
G_FLOATING directive*6-35
General mode *5-16
General register mode *5-1 to 5-12
.GLOBAL directive*6-36
Global expression*3-9
Global label • 2-2
Global symbol *3-6, 6-97
defining • 6-22, 6-33, 6-36
redefining for shareable image *6-94 to 6-95
Global symbol attribute directive (.GLOBAL) • 6-36

H
.H_FLOATING directive*6-37
H_floating-point storage directive
(.H—FLOATING) • 6-37
HALT (Halt) instruction*9-74
Hexadecimal/decimal conversion • B-1
table • B-2

i
.IDENT directive • 6-38
Identification directive (.IDENT) • 6-38
.IF directive *6-39 to 6-41
.IF_FALSE directive• 6-42 to 6-44
.IF_TRUE directive*6-42 to 6-44
.IF_TRUE_FALSE directive • 6-42 to 6-44
.IIF directive • 6-45
Immediate conditional assembly block directive
(.IIF) *6-45
Immediate mode *5-14 to 5-15
contrasted with literal mode *5-16
INCB (Increment Byte) instruction • 9-22
INCL (Increment Long) instruction • 9-22
Inclusive OR operator • 3-16
INCW (Increment Word) instruction • 9-22
Indefinite repeat argument directive (.IRP)*6-46 to
6-47
Indefinite repeat character directive (.IRPC)*6-48
to 6-49
INDEX (Compute Index) instruction • 9-75 to 9-76
Index mode *5-16 to 5-18
operand specifier format *8-21 to 8-22
INSQHI (Insert Entry into Queue at Head,
Interlocked) instruction* 9-88 to 9-89
INSQTI (Insert Entry into Queue at Tail,
Interlocked) instruction* 9-90 to 9-91
INSQUE (Insert Entry in Queue) instruction • 9-92
to 9-93
Instruction* 1-1
as operator *2-3
format *8-13 to 8-24
Instruction notation
operand specifier • 9-3 to 9-4
operation description • 9-4 to 9-5
Instructions*9-2 to 9-191
address *9-34 to 9-36
arithmetic*9-6 to 9-33, 9-100 to 9-121,
9-139 to 9-162
character string *9-122 to 9-135
control • 9-43 to 9-62
decimal string *9-139 to 9-162
floating-point • 9-100 to 9-121
integer *9-6 to 9-33
logical *9-6 to 9-33

Index—7

Index

Instructions (cont'd.)
packed decimal*9-139 to 9-162
procedure call *9-63 to 9-69
queue *9-82 to 9-99
string *9-122 to 9-135, 9-139 to 9-162
variable-length bit field *9-37 to 9-42
INSV (Insert Field) instruction • 9-42
Integer
data type *8-1 to 8-3
in source statement • 3-3
unsigned *8-1, 8-2
Integer instructions *9-6 to 9-33
Integer overflow enable (IV) *8-12
.IRP directive*6-46 to 6-47
.IRPC directive*6-48 to 6-49

j
JMP (Jump) instruction*9-58
JSB (Jump To Subroutine) instruction • 9-59

K
Keyword argument *4-2 to 4-3

L
Label
created local • 4-6 to 4-7
global *2-2
user-defined local *3-7 to 3-8, 4-6
LDPCTX (Load Process Context)
instruction *9-187
Leading separate numeric string
data type *8-9 to 8-10
%LENGTH operator *4-7 to 4-8
.LIBRARY directive*6-50
.LINK directive *6-51 to 6-53
/INCLUDE qualifier *6-51
/LIBRARY qualifier *6-51
/SELECTIVE_SEARCH qualifier • 6-52
/SHAREABLE qualifier • 6-52

Index—8

.LIST directive *6-54
See also .SHOW directive
Listing
table of contents*6-92
Listing control directive
.IDENT • 6-38
.LIST *6-54
.NLIST • 6-64
.NOSHOW *6-66, 6-87 to 6-88
.PAGE *6-74
.SHOW *6-87 to 6-88
.SUBTITLE *6-92
.TITLE *6-93
Listing level count *6-88
Literal mode *5-10 to 5-12
contrasted with immediate mode *5-16
operand specifier format *8-19 to 8-21
Local label
saving *6-85 to 6-86
user-defined • 3-7 to 3-8
Local label block
ending • 6-22
starting • 6-22
Local symbol *3-6
%L0CATE operator *4-8 to 4-9
Location control directive
.ALIGN *6-5 to 6-6
.BLKx*6-12 to 6-13
.EVEN *6-32
.ODD *6-70
LOCC (Locate Character) instruction *9-126
Logical AND operator
See AND operator
Logical exclusive OR operator
See exclusive OR operator
Logical inclusive OR operator
See inclusive OR operator
Logical instructions*9-6 to 9-33
.LONG directive*6-55
Longword • 8-2
Longword storage directive (.LONG) *6-55

M
Macro *4-1 to 4-10
nested • 4-4 to 4-5
passing numeric value to *4-6

Index

Macro (cont'd.)
with the same name as an opcode*6-57
Macro argument *4-1 to 4-6
actual *4-1 to 4-2

MBZ field *7-1
.MCALL directive*6-59
MCOMB (Move Complemented Byte)
instruction • 9-23

concatenated • 4-5
delimited *4-3 to 4-4, 4-4 to 4-5
formal *4-1 to 4-2
keyword • 4-2 to 4-3
positional • 4-2 to 4-3
string • 4-3 to 4-5
Macro call *4-1
as operator *2-3
listing • 6-87
number of arguments*6-62

MCOML (Move Complemented Long)
instruction • 9-23

Macro call directive (.MCALL) • 6-59
Macro definition • 4-1
default value *4-2
end *6-27
Labelling in *4-6 to 4-7
listing • 6-87
Macro definition directive
.MACRO*6-56 to 6-57
Macro deletion directive (.MDELETE) • 6-60
.MACRO directive*6-56 to 6-57
Macro exit directive (.MEXIT) *6-61
Macro expansion
listing • 6-87
printing *4-1
terminating • 6-61
Macro library
adding a name to *6-50
Macro library directive (.LIBRARY) • 6-50
Macro link directive (.LINK) *6-51 to 6-53
Macro name *3-6
Macro operator
%EXTRACT • 4-9 to 4-10
%LENGTH • 4-7 to 4-8
%L0CATE • 4-8 to 4-9
string *4-7 to 4-10
Macro string operator
summary *C-8 to C-9
Macroinstruction
See macro
Mask
entry • 9-63
register*3-13 to 3-14
register save*6-29, 6-58
MASK directive*6-58
MATCHC (Match Characters) instruction • 9-127

MCOMW (Move Complemented Word) instruction
•9-23
.MDELETE directive • 6-60
Message display directives
.ERROR *6-31
.PRINT *6-75
.WARN *6-96
.MEXIT directive*6-61
MFPR (Move from Processor Register)
instruction *9-190
MNEGB (Move Negated Byte) instruction • 9-24
MNEGD (Move Negated D_floating)
instruction • 9-1 14
MNEGF (Move Negated F_floating)
instruction • 9-1 14
MNEGG (Move Negated G_floating)
instruction *9-1 14
MNEGH (Move Negated H_floating)
instruction *9-114
MNEGL (Move Negated Long) instruction • 9-24
MNEGW (Move Negated Word) instruction • 9-24
Modify access type *8-13
Module name
made available to debugger*6-23
MOVAB (Move Address Byte) instruction • 9-35
MOVAD (Move Address D_floating)
instruction *9-35
MOVAF (Move Address F_floating)
instruction • 9-35
MOVAG (Move Address G_floating)
instruction *9-35
MOVAH (Move Address H_floating)
instruction • 9-35
MOVAL (Move Address Long) instruction • 9-35
MOVAO (Move Address Octa) instruction • 9-35
MOVAQ (Move Address Quad) instruction • 9-35
MOVAW (Move Address Word) instruction • 9-35
MOVB (Move Byte) instruction • 9-25
MOVC3 (Move Character 3 Operand)
instruction*9-128 to 9-129
MOVC5 (Move Character 5 Operand)
instruction *9-128 to 9-129
MOVD - Move D_floating • 9-115
MOVF - Move F_floating • 9-115
MOVG - Move G_floating • 9-1 15
Index—9

Index

MOVH - Move H_floating • 9-115
MOVL (Move Long) instruction • 9-25
MOVO (Move Octa) instruction • 9-25
MOVP (Move Packed) instruction • 9-159
MOVPSL (Move PSL) instruction • 9-77
MOVQ (Move Quad) instruction • 9-25
MOVTC (Move Translated Characters)
instruction *9-130
MOVTUC (Move Translated Until Character)
instruction *9-131 to 9-132
MOVW (Move Word) instruction • 9-25
MOVZBL (Move Zero-Extended Byte to Long)
instruction *9-26
MOVZBW (Move Zero-Extended Byte to Word)
instruction *9-26
MOVZWL (Move Zero-Extended Word to Long)
instruction* 9-26
MTPR (Move to Processor Register)
instruction *9-189
MULB2 (Multiply Byte 2 Operand)
instruction • 9-27
MULB3 (Multiply Byte 3 Operand)
instruction • 9-27
MULD2 (Multiply D_floating 2 Operand) instruction
•9-116
MULD3 (Multiply D_floating 3 Operand) instruction
•9-116
MULF2 (Multiply F_floating 2 Operand) instruction
•9-116
MULF3 (Multiply F_floating 3 Operand) instruction
•9-116
MULG2 (Multiply G_floating 2 Operand) instruction
•9-116
MULG3 (Multiply G_floating 3 Operand) instruction
•9-116
MULH2 (Multiply H_floating 2 Operand) instruction
•9-116
MULH3 (Multiply H_floating 3 Operand) instruction
•9-116
MULL2 (Multiply Long 2 Operand)
instruction *9-27
MULL3 (Multiply Long 3 Operand)
instruction *9-27
MULP (Multiply Packed) instruction*9-160
MULW2 (Multiply Word 2 Operand)
instruction • 9-27
MULW3 (Multiply Word 3 Operand)
instruction • 9-27
Must Be Zero field *7-1

Index—10

N
.NARG directive *6-62
.NCHR directive *6-63
Negative condition code (N) • 8-12
.NLIST directive*6-64
See also .NOSHOW directive
.NOCROSS directive*6-16 to 6-17, 6-65
NOP (No Operation) instruction • 9-78
.NOSHOW directive •6-66, 6-87 to 6-88
.NTYPE directive*6-67 to 6-68
Number
See also integer, floating-point number, and
packed decimal string
in source statement • 3-3 to 3-4
Number of arguments directive (.NARG) • 6-62
Number of characters directive (.NCHR) *6-63
Numeric control operator*3-14
Numeric string
leading separate*8-9 to 8-10
trailing*8-7 to 8-9

o
Object module
identifying *6-38
naming *6-93
title* 6-93
.OCTA directive • 6-69
Octaword • 8-3
Octaword storage directive (.OCTA) *6-69
.ODD directive *6-70
One's complement
of expression *3-14
Opcode
creating *6-71 to 6-72
defining *6-81
format • 8-13
redefining *6-57, 6-71 to 6-72
summary *D-1 to D-17
with the same name as a macro *6-57
Opcode definition directive (.OPDEF) • 6-71 to
6-72

Index

OPCODES,
summary,
alphabetic order *D-1
numeric order *D-10
.OPDEF directive*6-71 to 6-72
Operand • 2-3
determining addressing mode of *6-67 to 6-68
primary • 8-21
reserved • 9-101, 9-102, 9-140
Operand generation directives
.REF16• 6-81
.REF2*6-81
.REF4* 6-81
.REF8 • 6-81
Operand specifier*8-13 to 8-24
access type notation *9-3
access types *8-13 to 8-14
base* 8-21
data type notation *9-3 to 9-4
data types*8-14
notation • 9-3 to 9-4
Operand specifier addressing mode formats *8-14
to 8-24
autodecrement mode *8-17
autoincrement deferred mode *8-16 to 8-17
autoincrement mode *8-16
branch mode *8-24
displacement deferred mode *8-18
displacement mode *8-17 to 8-18
index mode *8-21 to 8-22
literal mode *8-19 to 8-21
register deferred mode *8-16
register mode *8-15
Operand type directive (.NTYPE) • 6-67 to 6-68
Operator* 2-3
AND *3-16
arithmetic shift *3-15
ASCII *3-12
binary *3-15 to 3-16, C-8
complement *3-14
exclusive OR *3-16
floating-point *3-14
inclusive OR *3-16
macro *4-7 to 4-10
macro string*C-8 to C-9
numeric control *3-14
pattern • 9-166 to 9-180
radix control *3-11 to 3-12
register*3-13 to 3-14

Operator (cont'd.)
summary *C-7 to C-9
textual *3-12 to 3-14
unary *3-10 to 3-11, C-7 to C-8
Overflow condition code (V)*8-12

p
Packed decimal instructions • 9-139 to 9-162
Packed decimal string *9-139 to 9-141
data type *8-10 to 8-11
format • 3-4
in source statement • 3-4
storing • 6-73
zero-length *9-141
Packed decimal string storage directive (.PACKED)
•6-73
.PACKED directive *6-73
.PAGE directive*6-74
Page ejection directive (.PAGE) *6-74
Pattern operator • 9-164, 9-166 to 9-180
Period (.)
current location counter *3-17
Permanent symbol *3-5, 3-6
Permanent symbol table *D-1 to D-17
POLYD (Polynomial Evaluation D_floating)
instruction • 9-117 to 9-119
POLYF (Polynomial Evaluation F_floating)
instruction • 9-117 to 9-119
POLYG (Polynomial Evaluation G_floating)
instruction *9-117 to 9-119
POLYH (Polynomial Evaluation FF_floating)
instruction • 9-117 to 9-119
POPR (Pop Registers) instruction • 9-79
Positional argument *4-2 to 4-3
Primary operand *8-21
.PRINT directive *6-75
PROBER (Probe Read) instruction • 9-182 to 9-183
PROBEW (Probe Write) instruction • 9-182 to
9-183
Procedure call instructions • 9-63 to 9-69
Processor status word *8-1 1 to 8-12
condition codes *8-11 to 8-12
decimal overflow enable (DV)*8-12
floating underflow enable (FU)*8-12
integer overflow enable (IV) *8-12
trace trap enable (T)*8-12

Index—11

Index

Program counter mode*5-12 to 5-16
Program section
absolute*6-78, 6-79
alignment* 6-79
attributes*6-76 to 6-78, 6-79
defining *6-76 to 6-79
name *6-76, 6-79
restoring context of *6-84
saving context of *6-85 to 6-86
saving local label *6-85 to 6-86
unnamed • 6-78, 6-79
Program sectioning directive
.PSECT• 6-76 to 6-79
.RESTORE—PSECT • 6-84
.SAVE_PSECT • 6-85 to 6-86
.PSECT directive *6-76 to 6-79
PSW
See processor status word
PUSHAB (Push Address Byte) instruction • 9-36
PUSHAD (Push Address D_floating)
instruction *9-36
PUSHAF (Push Address F_floating)
instruction • 9-36
PUSHAG (Push Address G_floating)
instruction *9-36
PUSHAH (Push Address H_floating)
instruction • 9-36
PUSHAL (Push Address Long) instruction • 9-36
PUSHAQ (Push Address Quad) instruction*9-36
PUSHAW (Push Address Word) instruction • 9-36
PUSHL (Push Long) instruction • 9-28
PUSHR (Push Registers) instruction*9-80

Q
.QUAD directive *6-80
Quadword • 8-2
Quadword storage directive (.QUAD) *6-80
Queue *9-82 to 9-87
absolute*9-82 to 9-85
header*9-82, 9-85
inserting entries*9-82 to 9-85, 9-85 to 9-87
removing entries *9-84 to 9-85, 9-86 to 9-87
self-relative • 9-85 to 9-87
Queue instructions*9-82 to 9-99

Index—12

R
Radix control operator *3-11 to 3-12
Range
syntax* 7-1
Read access type *8-13
.REFn directive*6-81
Register deferred mode • 5-5
operand specifier format *8-16
Register mask operator *3-13 to 3-14, 6-29
Register mode *5-4 to 5-5
operand specifier format *8-15
Register name *3-5, 3-6
Register save mask *6-29, 6-58
REI (Return from Exception or Interrupt) instruction
•9-186
Relative deferred mode *5-13 to 5-14
setting default displacement length *6-19
Relative mode *5-12 to 5-13
assembled as absolute mode *6-22
setting default displacement length *6-19
Relocatable expression • 3-9
REMQHI (Remove Entry from Queue at Head,
Interlocked) instruction • 9-94 to 9-95
REMQTI (Remove Entry from Queue at Tail,
Interlocked) instruction* 9-96 to 9-97
REMQUE (Remove Entry from Queue)
instruction • 9-98 to 9-99
Repeat block
argument substitution • 6-46 to 6-47
character substitution • 6-48 to 6-49
end *6-28
listing range definitions of*6-87
listing range expansions of*6-87
listing specifiers*6-87
terminating repetition • 6-61
Repeat block directive (.REPEAT) • 6-82 to 6-83
.REPEAT directive *6-82 to 6-83
Reserved operand • 9-101, 9-102, 9-140
.RESTORE_PSECT directive • 6-84
RET (Return from Procedure) instruction • 9-69 to
9-70
ROTL (Rotate Long) instruction • 9-29
Routine name
made avaialble to debugger*6-23
RSB (Return from Subroutine) instruction • 9-60

Index

SUBB2 (Subtract Byte 2 Operand)
instruction • 9-31

S
.SAVE—PSECT directive*6-85 to 6-86
SBWC (Subtract with Carry) instruction • 9-30
SCANC (Scan Characters) instruction • 9-133
Section name
made available to debugger*6-23
Self-relative queue *9-85 to 9-87
Shift operator *3-15
SHOW directive *6-87 to 6-88
Signed byte storage directive
(.SIGNED BYTE) *6-89
Signed word storage directive
(.SIGNED_WORD) • 6-90 to 6-91
.SIGNED_BYTE directive • 6-89
.SIGNED_WORD directive*6-90 to 6-91
Significance indicator *9-179
SKPC (Skip Character) instruction *9-134
SOBGEQ (Subtract One and Branch Greater Than
or Equal) instruction* 9-61
SOBGTR (Subtract One and Branch Greater Than)
instruction* 9-62
Source statement
See statement
SPANC (Span Characters) instruction *9-135
Stack frame*9-63
Statement* 1-1
character set *3-1 to 3-2
comment *2-3 to 2-4
continuation of *2-1
format *2-1 to 2-4
label *2-2
operand *2-3
operator*2-3, C-7 to C-9
special characters*C-6 to C-7
String argument *4-3 to 4-5
String data type
character*8-6 to 8-7
leading separate numeric *8-9 to 8-10
packed decimal *8-10 to 8-11
trailing numeric *8-7 to 8-9
String instructions*9-122 to 9-135, 9-139 to
9-162
String operator
in macro *4-7 to 4-10

SUBB3 (Subtract Byte 3 Operand)
instruction *9-31
Subconditional assembly block directives*6-42 to
6-44
.IF_FALSE • 6-42 to 6-44
.IF_TRUE • 6-42 to 6-44
.IF_TRUE_FALSE • 6-42 to 6-44
SUBD2 (Subtract D_floating 2 Operand) instruction
•9-120
SUBD3 (Subtract D_floating 3 Operand) instruction
•9-120
SUBF2 (Subtract F_floating 2 Operand) instruction
•9-120
SUBF3 (Subtract F_floating 3 Operand) instruction
•9-120
SUBG2 (Subtract G_floating 2 Operand) instruction
•9-120
SUBG3 (Subtract G_floating 3 Operand) instruction
•9-120
SUBH2 (Subtract H_floating 2 Operand) instruction
•9-120
SUBH3 (Subtract H_floating 3 Operand) instruction
•9-120
SUBL2 (Subtract Long 2 Operand)
instruction *9-31
SUBL3 (Subtract Long 3 Operand)
instruction* 9-31
SUBP4 (Subtract Packed 4 Operand)
instruction *9-161 to 9-162
SUBP6 (Subtract Packed 6 Operand)
instruction *9-161 to 9-162
.SUBTITLE directive *6-92
SUBW2 (Subtract Word 2 Operand)
instruction *9-31
SUBW3 (Subtract Word 3 Operand)
instruction *9-31
Summary of OPCODES,
alphabetic order *D-1
numeric order *D-10
SVPCTX (Save Process Context)
instruction *9-188
Symbol • 3-4 to 3-7
cross-referencing • 6-16 to 6-17, 6-65
determining value of *3-6
external • 6-33, 6-97
global *3-6, 6-33, 6-36, 6-94, 6-97
in operand field *3-6
in operator field *3-6
local • 3-6

Index—13

Index

Symbol (cont'd.)
macro name *3-6
made available to debugger*6-22
permanent • 3-5, 3-6
register name *3-5, 3-6
suppressing • 6-23
transferral to VAX Symbolic Debugger*6-18
undefined • 6-22
user-defined • 3-5 to 3-6, 3-6
Symbol attribute directive
.WEAK *6-97

T
Tab stops
in source statement • 2-1
Term • 3-9
Terminating an assembly program *6-25
Textual operator*3-12 to 3-14
.TITLE directive*6-93
Trace trap enable (T)*8-12
Traceback*6-23
Trailing numeric string
data type *8-7 to 8-9
.TRANSFER directive • 6-94 to 6-95
Trap
decimal overflow*8-12
divide by zero*8-13
integer overflow • 8-12
trace* 8-12
TSTB (Test Byte) instruction • 9-32
TSTD (Test D_floating) instruction *9-121
TSTF (Test F_floating) instruction *9-121
TSTG (Test G_floating) instruction *9-121
TSTH (Test H_floating) instruction *9-121
TSTL (Test Long) instruction • 9-32
TSTW (Test Word) instruction • 9-32

u
Unary operator*3-10 to 3-1 1
summary *C-7 to C-8
UNDEFINED results *7-1
UNPREDICTABLE results *7-1

Index—14

User-defined local label *3-7 to 3-8
range *3-7
User-defined symbol *3-5 to 3-6, 3-6

v
Variable bit base address access type *8-14
Variable-length bit field
bytes referenced • 8-6
data type • 8-5 to 8-6
Variable-length bit field instructions*9-37 to 9-42
Virtual address *8-1
VTLB (Convert Long to Byte) instruction • 9-17

w
.WARN directive*6-96
.WEAK directive *6-97
Word *8-1
.WORD directive*6-98
Word storage directive (.WORD) *6-98
Write access type *8-13

x
XFC (Extended Function Call) instruction • 9-81
X0RB2 (Exclusive OR Byte 2 Operand) instruction*
9-33
XORB3 (Exclusive OR Byte 3 Operand) instruction •
9-33
XORL2 (Exclusive OR Long 2 Operand) instruction*
9-33
XORL3 (Exclusive OR Long 3 Operand) instruction*
9-33
XORW2 (Exclusive OR Word 2 Operand)
instruction • 9-33
XORW3 (Exclusive OR Word 3 Operand)
instruction *9-33

VAX MACRO and
Instruction Set
Reference Manual
AA-Z700A-TE

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