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XX-3F555-FD

December 1965

24 pages

Original

2.4MB

Document:	maindec-825-d
Order Number:	XX-3F555-FD
Revision:
Pages:	24
Original Filename:	https://svn.so-much-stuff.com/svn/trunk/pdp8/src/dec/maindec-825/maindec-825-d.pdf

OCR Text

IDENTIFICATION
I

Maindec 825

I .2

680 Static Tes’r

I .3

October 22, I965

PDP

8
LIBRARY

Maindec 825

Page I
2

ABSTRACT

The 680 Static Test verifies correct operation of the 68I and 685 circuits associated with the
That is, the program does not actually transmit characters, but tests only the logical operation of the hardware. Hardware malfunctions detected by the program result in a processor halt.
680 Data Communications System in a static state.

REQUIREMENTS

3.I

Storage
I

Starting Address

Test or Routine

End Address

‘

0002

Interrupt Routine

0000

End of Test

0030

Common Display Halt

0074

Line Register Test

0200

TTI Test

0400

0475,

0600

0726

0070

‘

0I07

0324.

TTO TTI Test

Shift the MB Test and
Shift the MB Subroutine
Clock Test
Power Clear Test

3.2

I000

II76

0730

0772

I200

I36I

‘

I400

I434

Subprograms and/or subroutines
None

3.3

Equipment
Minimum configuration PDP-8
680 DCS hardware

3 4
.

Miscellaneous We “j

Jumper wire from location LMBI-H to LMBI-U on the 685 Panel.
4.

USAGE

4.l

(InpUt to output of line 0).

If theRIlAZ Loader starting at address 7777 is in memory, go to paragraph 4.l .2.
thelefij Loader must be loaded into memory.

4.l I

The 680 Static Test may now be loaded into memory as follows:
4. I .2

Set 7777 in the SWITCH REGISTER.

4.l .3

Press LOAD ADDRESS key.

4.l .4

Place the 680 Static Test in the keyboard reader.

4.l .5

Press the START key on the operator console.

4.l .6

Engage the keyboard reader.

Otherwise,

Maindec 825
Page 2

Switch Settings

4.3

Switch 0

—

cycle: alltests’ except Power Clear Test.

Switch 1 up repeat current test (sWitcH O overrides switch 1).
Switches 0 and 1 down halt at completion of current test and repeat current test it
-

—

CONTINUE or STARTIs pressed.
Indicate which clock to test
Clock 1
Clock 2
*fi’“ 01
10
Clock 3
11- Clock 4

Switches 10 and 11

‘a‘nIa/or Entry

4.4

Start up

4.4.1

Line Register: Test
Set the

SIWIVVTCH REGISTER to 02008‘ 5

'. j

Press LOADADDRESS
Press START
‘

4.4.2

TTl Test
Set the

SWITCH REGISTER

0400

Press LOAD AD DRE SS

Press START
4.4.3

TTO and TTI Test
Set the SWITCH REGISTER to
Press LOAD ADDRESS

06008

Press START

Shift the MB Test

4.4.4

Set the SWITCH REGISTER to
Press LOAD ADDRESS

10008

Press START

Clock Test

4.4.5.

Set the SWITCH REGISTER to
Press LOAD ADDRESS

12008

Set switches 10 and 11 to select the
7
.

4.4.6

Press START

appropriate

clock

To cycle through all of the above tests
Set the SWITCH REGISTER to

Press LOAD ADDRESS
Set switch 0

02008

up
Set switches 10 and 11 to select the

Press START

appropriate

clocl<

Maindec 825

Page 3
4.4.7

To cycle any of the above tests by itself
Set the SWITCH REGISTER to the appropriate address
Press LOAD ADDRESS

Set switch I

Press START

4.4.8

Power Clear Test
Set the SWITCH REGISTER'to
Press LOAD ADDRESS

14008

Press START

The processor will halt'at address I407
Press START
.

4.5

The processor will halt at address I433
Errors in Usage

If the program detects a'hardware malfunction, the result will be a processor halt.
4.5.I

ADDRESS 0077

COMMON DISPLAY HALT

The processor will halt with the error address displayed in the AC. Press CONTINUE and the
processor will halt at address I02 with the contents of memory address II displayed in the AC. Press
CONTINUE again, andthe processor will halt at address I07 with the contents of memory addreSs I0

displayed in the AC.
The address in the AC on the first halt indicates the type of error.

The contents of the AC on the second halt indicates the correct information as it pertains to
the type of error.
The contents of the AC on the third halt indicates the incorrect information as it pertains to
the type of error.
4.5.2

Non-Error Halts

ADDRESS 0054

END OF TEST
'

ADDRESS 1407

POWER CLEAR TEST,
WAIT FOR START KEY
3

ADDRESS I433

END OF POWER CLEAR TEST
I

Error Table

4.5.3

The following is a list of error halts included in the program:
ERROR TABLE

Address of Halt

Contents of AC

Error Description

0246

TTSL ERROR

0I02

0XXX

LINE REGISTER SHOULD EQUAL

OI 07

0XXX

LINE REGISTER READ BACK

3apuuow 9Z8

060d 17
30333 313v1

(159011111100)

SSSJPPV 10 ”DH

10.113 ‘ig011d1‘1oseg

SWQWOD J0 3V

3:>N111 30333

1100

1130

2010

xxxo

3N11 33151033 0100135

1010

xxxo

3N11 33151033

1100

9190

33N111 30333

z010

xxxo

3N11 33151033 0100115 1‘vn03

1010

XXXO

1vr103

33v3c1v33

3N11 0V33'331510‘33 >D‘V'El

‘

”

[[00

01H

lzllHS EIHJ. SW 30883

2010

XXXX

HEIlDVEI‘Y/HD A'IEIWEISSV GHOM Cl'lflOHS 'I‘V’flCEI

l0 [0

XXXX

HHLDVHVHD A'IEIWHSSV GHOM SEIOG 'lVflCEI

101 01179 11) 00

90z0
Ix

0331313 3H1 3v

(0N1H10N

101 1511

90z0

010 10N 3V313 3H1 3v
1

z1z0

xxxo

101 1311

010 10N 3V313 3H1 3N11

33151033

30 101 1311
010 10N 0V33 33va 1111333303

VZZO

lOI 181.1

‘

GIG .LON HS 3H1 EH OJ. ill
30 lOl WELL
CllCl .LON (IVER! >D‘V’8 Ml

V GNODEIS 'ISiJ.

OEZO

GEHVEI'D 3H1 HNH HELLSIEDEIEI
_

1,930

101 3:)N111

,
*

031V3330 5v v 111

N01130315N1

0N1?" 0333135 5N011v301
.

9920

.LOI HDNIJJ.

‘

GICI lON .LNEIWEIEDNI EIHi HNI'I EIEIiSIEDEIH
WOHJ [ll 04 000

Zl’VO

lOl Ill
CIICI .LON cll>lS

9110

101 111

MW) 111 5v (Z1170

A'INO 0333135 1 NOILVDO'I

ZZ’VO

XXXX

10! Ill Sfll‘V’lS (MOM

0000

GEIHEJL‘IV 3H]. SfllVlS (MOM

zevo

XX>0<

MW) 111 5v (93170
033311v 3H1 331:)v3v113 A'IEIWEISSV 030M
101 111

9Z8113‘9PUEDW
960d g
110211121 310w

(99911111199)
‘

SSE’JPP‘V’ J0 HDH

1101.13 1:10.14d1mseq

SJUENUOD :10 3v
A

01770

lOl |_LJ.

GEllzllHS 3H1 3V

Z17170

101 111

99170

awvs) 111 sv (12170

Gawznz) 211-11 >INI'I

iOl ILL SfllVlS GEO/\A

OOO’V

SfllVlS GHOM SVM lON GEiNEIWEIEDNI O]: [0017

xxxx

1910

101 111
*

01170

awvs) 111 sv (99170

02111211117 3111 HELDVWHD mawassv GEO/1A
10] Ill

CIHlNEIWEEDNI 3H1 EINI‘I 33151938
17090

lOI OLL
CIEIcIcI|>|S l NOLL‘V’DO'I

9090

101 01.1

awvs) 011 sv (17090

CEIddI>IS z 3010111001
1090

‘

101 011

awvs) 011 sv (17090

G1G lON 1:!le 31921111
z190

101 01.1

awvs) 011 sv (17090

CIHSHVD 3H1 211911 212113192111 o1 iNEIWEIEDNI
[Z90

.LOI Oil 30 Ill

HWVS) Oil SV (17090

OLL CHCI .LON lElS HNI'] O 01 [V

30 Ill GIG .LON .LNEIWEI'IcIWOD HNI'I O

OlNl 3H1 SfliViS GEO/\A
9390

101 011 >INI‘I) 1: 3v

3v iON 0211;111-15 ’Amdoad A'IEIVEIOHd
011 G1G .LON 21175113 >|NI‘I
0,:

9890

12“

EIWVS) 0].]. SV (W90

0].]. IG Cl N 10 13$ H EN 0 Oi V O

10! Oil 210 ”.1

-‘

80 Ill GICI .LON iNEIWEl'IcIWOD ENI‘I O

OiNl ElHl SfllVlS GEO/1A
1290

101 111
~

zg90

awvs) 111 sv (9990

Sfli‘v’iS (MOM 51 11211110 NVHl 0000 Ho 00017
101 111

smws) Gaom (90017

smws GHOM GIG iON lNElWElEDNI 01
9990

101 111

170017

awvs) 111 sv (zg90

aawvwm mawassv (RIO/1A iON soaaz

Main‘dec, 825
Page 6

ERROR TABLE (continued)

Address Of H0111

.0671

Contents of AC

Error Description

IOT TTO OR TTI

‘

(STATUS WORD 4003)

TTO DID NOT SET LINE 0 TO A1
OR TTI DID NOT INPUT LINE 0 INTO THE
CHARACTER ASSEMBLY WORD
‘

IOT TTI

0673

(SAME 111 AS 0671)

CHARACTER ASSEMBLY WORD WAS OTHER

THAN 0000 OR 4000

'70702?

IOT TTI

(STATUS WORD 4001)

TTI ONLY SKIPPED 1‘LOCATION

“0711“

IOT TTI

(STATUS WORD 4002)

TTI ONLY SKIPPED 1 LOCATION

IOT 111

0720

(STATUS WORD 4007)

TTI ONLY SKIPPED 1 LOCATION

1243

CLOCK SKIP SKIPPED IN ERROR

INTERRUPT WAS RECEIVED WITH THE

1252

CLOCK

FLAG OFF
S

1 260

1265

MSEC
sKlP

CLOCK FLAG DID NOT SET WITHIN 12
OR THE CLOCK SKIP IOT DID NOT

INTERRUPT WAS NOT RECEIVED WITH THE
_

CLOCK FLAG ON
’

1274

CLOCK ON IOT DID NOT CLEAR THE CLOCK
FLAG

CLOCK FLAG DID NOT SET WITHIN 12 MSEC

1301

CLOCK OFF IOT DID NOT CLEAR THE CLOCK

1 305

FLAG
CLOCK FLAG SET AGAIN AFTER A CLOCK

1313

OFF IOT
1316

CLOCK I FLAG IS SET

1321

CLOCK 2 FLAG IS SET

1324

CLOCK 3 FLAG IS SET

I332

CLOCK 4 FLAG IS SET

1416

LINE 0 WAS NOT RETURNED TO THE 1 STATE

1421

CLOCK 1 WAS NOT TURNED OFF

1424

CLOCK 2 WAS NOT TURNED OFF

1427

CLOCK 3 WAS NOT TURNED OFF

1432

CLOCK) 4 WAS NOT TURNED OFF

Maindec 825

Page 7
4.6

Recovery from Such Errors
Pressing CONTINUE will cause the program to proceed to the

next test sequence.

However,

hardware malfunctions should be repaired as soon as they are detected or erroneous indications may be

given in later tests.

RESTRICTIONS (Not Applicable)

DESCRIPTION

o.I

Discussion

The 680 Static Test consists of several routines that each verify a logical operation of the
The routines may be run individually or progressively. The output of line'O must
be tied into its own input. Hardware malfunctions detected by the program result in a processor halt.

68I and 685 hardware.

6.I .I

Test Descriptions

o.l .I .I

Line Register Test

(Starting address 200)

The Line Register portion of the 680 Static Test exercises the IOT's associated with line
register manipulations and verifies their correct operation
.

The IOT's tested are:
Octal

Mnemonic

Description
TT DO NOTHING

o4l0
64H

TTCL

64I2

TTSL

SET THE LINE REGISTER

64I4

TTRL

READ THE LINE REGISTER

640I

TTINCR

INCREMENT THE LINE REGISTER

TTSL+I

CLEAR THEN SET THE LINE REGISTER

64I3
6.I .I .2

TTI Test

CLEAR THE LINE REGISTER

(Starting address 400)

The TTI portion of the 680 Static Test exercises the TTI IOT with the assumption that line 0 is
This test verifies that the TTI IOT skips 2 locations, that the status and character OISare not altered, that the TTI does not shift the AC or clear the LINK, that a’status word of
words
sembly
4000 is incremented, and that TTI does not increment the line register.
set to the I

state.

6.I .I .3

TTO and TTI Test

(Starting address 600)

The TTO and TTI portion of. the 680 Static Test manipulates line 0 with the TTO IOT and
further verifies the correct operation of the TTI IOT. This test verifies that the TTO IOT shifts the AC,
changes line 0 from the I to the 0 state and back again and that TTO does not skip locations or increment
the line register. It also verifies that the TTI IOT reads the complement of line 0 into the status word and

line 0 into the character assembly word
not appear to

6.I .I .4

The test verifies that status words of 4001, 4002, and 4007 do

be a status word of 4003.

SHIFT THE MB TEST

(Starting address I000)

This portion of the 680 Static Test verifies that the logic which shifts the MB will shift all
combinations of bits.

Maindec 825
Page ‘8
6.l .l .5

CLOCK TEST

(Starting address l200. Switches l0 and H indicate whichclock)

This portion of the 680 Static Test verifies that the clock lOT's function correctly in that they
will turn on the appropriate clock without turning on any of the other clocks and that they will turn off.
the appropriate clock. The program also verifies the skip and interrupt functions.
6.l .l .6

POWER CLEAR TEST

(Starting address T400)

This portion of the 680 Static Test verifies correct operation of the power clear function. The
Press START, and the program

program sets line 0 to a 0 state, turns on all of the clocks, and then halts.
verifies that line 0 is returned to the l state and all clocks are turned off.
tests

that are run with SWO up.

METHODS (Not Applicable)

FORMAT (Not Applicable)

EXECUTIONTIME (Not Applicable)

It is not included as one of the

Maindec 825

Page 9
PROGRAM

Program Listing
/STATIC TEST POP-8
/TYPE 680 TELETYPE

680
LINE

MUX

/THE OUTPUT OE LINE 0
/MUST BE JUMPERED TO ITS
/OWN INPUT
/IOT DEFINITIONS
TTI:6402

/TELETYPE INPUT COMMAND
/TELETYPE OUTPUT COMMAND

TTO:6404
TTCL:6411
TTRL:6414
TTSL=6412
TTINCR:6401
/STARTING
/PONER

/CLEAR LINE REGISTER
/REAO LINE REGISTER
/SET LINE REGISTER
/INCREMENT LINE REGISTER

ADDRESSES

CLEAR

TEST

TESTS

1400

/CLOCK IOT'S
TT10N=6424
TTlOEFz6422
TTlSKP:6421
TTZON=6454

TT20FF:6452
TT2$KP=6451
TTSON:6444

TTSOEF:6442
TT3SKP26441
TT4ON:6454
TT40FF:6452TTASKP26451
/SNO 2 CYCLE ALL TESTS
/SW1 2 REPEAT CURRENT TEST
/BOTH DOWN, STOP, REPEAT CURRENT

TEST

/INTERRUPT ROUTINE
*1

0001
0002

5402

JMP
.-1

0001

/END

/GO TO INTERRUPT
/FOR INTERRUPT POINTER

.+1

TEST

ROUTINE

*50
0050

5030

0031

7200

0052
0055
0054

1050
0056
7112

0055
0056

7012
7012
7010

0057

ENDTST,

JMP
CLA
TAD .-2
AND ONESIX
CLL RTR
RTR
RTR
RAR
.

/CLR

/EOR JMS
/ZERO AC
/GET RETURN ADDRESS
TO PAGE NUMBER
/POSITION
/PAGE NUMBER
/OVER
/7 BITS

AAaindec;825

P096710
@@4@
@@4l
@@42
@@45
@@44
@@45
@@46

@@47
@@5@
@@51
@@52
@@55

@@54
@@55
@@56

@@57
@@S@

@@61
@@62
@@65
@@64
@@65
@@66
@967
@@7@

751@
546@
@@7@
745@
74@2
5457
16@@
@@@@
@@@@
@@61
@2@@
@4@@
@6@@
1@@@
12@@
@2@@
2@@@

ONESIX,

TSPNTR,

FORTST,
/ERROR
*74

@@74
@@75

5@74
72@@

@@76
@@77
@1@@

@1@5

1@74
74@2
72@@
l@11
74@2
72@@

@1@4
@l@5
@1@6

1@1@
74@2
72@@

@1@7

5474

@l@l
@l@2

TSPNTR /GENERATE CURRENT TEST POINTER
/SAVE IT FOR INDIRECT
ONESIX+2
I ONESIX+2
/GET START CURRENT TEST
DCA ONESIX+1
/FOR RESTART
/ADVANCE TO GET NEXT TEST
ISZ ONESIX+2
TAD I ONESIX+2
/GET NEXT TEST POINTER
DCA ONESIX+2
/FOR START NEXT TEST
OSR
/GET SWITCHES
SPA
/START NEXT TEST SET?
JMP I ONESIX+2
/YES
AND FORTST /CLR TO BIT l
/NOT STOP SET?
SNA
HLT
/HALT, NAIT START
/RESTART CURRENT TEST
JMP I ONESIX+1
16@@
/RESTART TEST ADDRESS
@'.g
@
/START NEXT TEST POINTER
/CONSTANT AND PAGE NO.IS TEI
/START LINE REGISTER TEST
,LINR EG
TSTT TI
/START TTI TEST
TSTT O
/START TTO TTI TEST
SHIF MB
/START SHIFT THE MB TEST
/START CLOCK TEST
CLOCK
/RESTART LINE REGISTER TEST
LINR EG
/FOR ANDING SW1
2@@@
TAD
DCA
TAD

1@61
5@6@
146@
5@57
2@6@
146@
5@6@
74@4

ERROR,

HALT

ERROR

DATA

AJMP
CLA
TAD
HLT
CLA
TAD Z
HLT
CLA
TAD Z
HLT
CLA
JMP I

ERROR

/TYPE 68@ STATIC TEST
/LINE REGISTER TEST
/PAGE
*ZOO

@2@@
@Z@l
@2@2
@2@5
@2@4

724@
641@
745@

@2@6

74@2
6412
744@
74@2

@2@7
@21@
@211

6411
6414
744@

@212
@215

74@2
1322

@2@5

LINREG,

CLA CMA

ADDRESS

2@@

/SET

ONES IN AC
DO NOTHING
NOTHING CLEAR
/YES, ERROR 1

641@
SNA
HLT

/TT
/DO

TTSL

SHOULD CLEAR AC
IT
/NO, ERROR 2
/CLEAR LINE REGISTER
/READ LINE REGISTER
/LINE REGISTER CLEAR
/NO, ERROR 5
/OT77

SZA
HLT
TTCL
TTRL
SZA.
HLT
TAD ONE77

/TTSL

/OID

AAaindec 825

Page 1]
6412
6414
5@1@
1@1@

TTSL
TTRL
DCA Z
TAD Z

7@4@
1522
7@4@

CMA
TAD
CMA

@225
@224
@225

744@
74@2
6412

SZA
HLT

@226
@227
@25@

6414
765@
74@2
5@11
1525
5@12

TTRL
SNA CLA
HLT
DCA Z 11
TAD K128
DCA Z 12
TAD Z 11

@214

@215
@216
@217
@22@
@221
@222

@251
@252
@255

1@
1@

TTSL

@257
@24@
@241
@242
@245
@244

1@11
7@4@
744@

TAD Z
CMA
SZA

@245
@246

4@74
2@11

@247
@25@
@251

2@12
5254
64@l

ERROR
11
ISZ Z 12
JMP SETLOP
TTINCR

@252
@255
@254

6414
741@
74@2

TTRL
SKP
HLT

@255
@256
@257

744@
74@2

SZA

@26@
@261

SETLOP,

TTSL+1
TTRL
DCA Z
TAD Z
CMA

JMS
ISZ

HLT
DCA
DCA
TAD
DCA

5@11

@262

5@12
1524
5@15

@265
@264
@265

2@11
1@12
6415

@266
@267
@27@

64@1
6414

5@1@

@271
@272

1@1@
7@4@

@275
@274
@275
@276
@277
@5@@
@5@1

1@11
7@4@
744@
4@74
2@15
5265

@5@2
@5@5
@5@4

5@11
1524
5@12

2@12

INCLOP,

1@
1@

/AC

/READ LR
/SAVE READ BACK
READ BACK
SHOULD BE -1
SHOULD BE D
/READ BACK WHAT WAS SENT

/COMPLEHENT
11

Z
Z

/AC
/AC

ERROR 6
LINE
/TESTED ALL LINE NUMBERS
/NO, TEST NEXT LINE NUMBER
/INCREMENT LINE REGISTER
/LINE REGISTER SHOULD BE @

/NO,

/ADVANCE

/SKIP

7, TTINOR PUT US HERE
/LINE REGISTER ALL ZEROS
/NO, ERRORS
/CLEAR :1
/CLEAR 12
/-127
/ERROR

Z 12
K127
Z 15
ISZ Z 11
TAD Z 12
TTSL+1
TTINCR
TTRL
DCA Z 16
TAD Z 1@
CMA
TAD Z
CMA

SZA
Z ERROR
ISZ 12
ISZ 15
JMP INCLOP /NO
DCA 11
TAD K127
DCA 12
JMS

READ BACK
SHOULD I ‘1
/COMPLINENT IT
/ALL BITS COME BACK
/NO, ERROR 4
/SHOULD NOT CLEAR LR
/READ LINE REGISTER
/DID SECOND TTSL CLEAR LR
/YES, ERROR 5
/SET 11 TO B
/’128
/FOR COUNTING
/GET NEXT CONSTANT TO SET
/CLR LR THEN SET IT

/COMPLEMENT

0NE77

1@11
6415
6414
5@1@
1@1@
7@4@

@254
@255
@256

/SET LINE REGISTER
/READ LINE REGISTER
/SAVE READ BACK

/11 SHOULD 2 LR AFTER TTINCR
/12 IS LR BEFORE ITINCR
/CLEAR LR AND SET IT
/INCREMENT LR
/READ LR
/SAVE READ BACK

/CQ{V’1?LEMENT READ BACK
/ADD CORRECT READ BACK
/AC SHOULD BE ZEROS
/LR INCREMENT CORREOTLY
/NO, ERROR 9
/SET NEXT LINE NUMBER
/TESTED ALL LINE NUMBERS

/“127

Moindec 825
Page 12

@3@6

64@1
6414

@3@7
@31@
@311

3@1@
1@1@
7@4@

@312
@313
@314

1@11
7@4@
744@

@315
@316
@317

4@74
2@11
2@12

@32@
@321

53@5
4@3@

@322
@323

@177
76@@
76@1

@3@5

@324

TTINCR

INCLZ,
TTRL
DCA Z
TAD Z
CMA
TAD Z
CMA

/ INCR LR
/READ LR
/SAVE READ BACK

1@
1@

xcuRRLEMERI READ

SZA
JMS Z ERROR
182 Z 11
ISZ Z 12
JMP INCL2
JMS Z ENDTST

ONE77,
K128,
K127,
/INITIAL

/LR

INCREMERI OK

/NO, ERROR
AFTER TTINCR
/IESIEO-INCR. TO 177
/11

/END

@177
76@@
76@1

TTI

BACK

/ADD CORRECT LINE NO
/AC SHOULD BE ZERO

LINE

REG

/-128
/-127

TEST
/PAGE

/SET

ADDRESS

4@@

*4@@

CLA
DCA

@4@1

72@l
3272

@4@2
@4@3
@4@4

12@2
32@7
1273

@4@5
@4@6

321@
64@2

TAD
DCA
TAD
DCA
TTI

@4@7

@@@@

@41@
@411

@@@@
744@
74@2

@4@@

@412
@413
@414
@415

@416
@417
@42@
@421
@422
@423
@424
@425
@426

724@
1272
744@
74@2
6411
3223
3224
64@2
@@@@
@@@@
1223
744@

@427
@43@
@431

74@2
1224
744@

@432
@433
@434

74@2
7121
64@2

@435
@436

@@@@
@@@@
745@

@437
@44@
@441
@442
@443
@444

74@2
742@
74@2
72@@
1274

TSTTTI,

SZA
HLT
CLA
TAD

IAC

FORISZ

/CLEAR AC TO +1
TEST LOCATION
INSTRUCTIONS
TEST TTI
/JUST IN CASE OF
/A PREVIOUS DISASTER
/RESET

/THAT

.+4
FORPL2
.+3

/TAD

INSTR
INSTR
/NAS TAD EXECUTED
/YES, ERROR
/SET AC : -1
LOCATION
/was 152 EXECUTED
/YES, ERROR
/SEr TO LINE O

/ISZ

CMA

FORISZ

SZA
HLT
TTCL
DCA .+3
DCA .+3
TTI

/ADD

TEST

@
TAD

SZA
HLT
TAD
SZA
HLT
STL
TTI

.-2
/OIO

/YES,

TTI CHANGE TTI
ERROR

.-4

IAC

/OIO III CHANGE III +2
/YES, ERROR
/SET AC : 1
SET LINK

@
@

TTI SHIFT
ERROR
/YES,
/OID III CLEAR
ERROR
/YES,
/DID

SNA
HLT
SRL
HLT
m A

IEO

INCRK

THE

THE LINK

TES

Maindec 825

Page 13
0445

5250

0446
0447

5251
6402
4000

0450
0451
0452

0000

0455
0454

1250
7040

0455

7440

0456

7402
1251
7440
7402
6411
6402
0000

0457

0460
0461
0462

0463
0464
0465
0466
0467
0470

D04 .+5
DCA .+3
TTI
4000
0
TAD INCRK+1
TAD .‘3
'CMA

1275

/DID

SZA
HLT
TAD

/WAS

/YES,

INCREMENT

CHANGED

LINE REGISTER

TTRL
SZA
HLT
JMS Z

0000
2272
4000

TTI +2
ERROR

/CLEAR

6414
7440
7402

0472
0475
0474
0475

.-6

SZA
HLT
TTCL
III
0

4050

TTI

/N0, ERROR

0000

0471

/5776

/READ LINE REGISTER
/TTI INCREMENT LINE

/YES,

ERROR

ENDIST

/END

INITIAL

TITS

FORISZ,
FORPLZ,
INCRK,

ISZ

FORISZ

/TO

CHECK

4000

5776

IE TTI+2 IS EXECUTED
/TO CHECK IF TTI+1 IS

INCREI

3776

TTO

/INITIAL
*600

TEST,

2ND

TTT

TEST

/PAGE’5 ADDRESS
0600
0601

6411
7201

0602
0603
0604

6404
5206
7402

0605
0606

7402
7440

0607

7402

0610
0611
0612

6414
7440

0613
0614

3215
6402
0000
0000

0615

0616

0617
0620
0621
0622
0623

‘HLT

7402

1215
7440

7402
7120
6404

HLT
SZA
HLT
TTRL
SZA
HLT
DCA .+2
TTI
0
0
TAD .-2
SZA
HLT
STL
TTO

SZA
HLT
DCA
TTI

0626

7440
7402
5250

0627
0650

6402
0000

0651

0000

0652

1250

TAD

0624
0625

60%
LINE REGISTER TO 0
AC TO +1
/TELETYPE OUTPUT l
/SHOULD EXECUTE HERE
/RETURN EITHER OF THESE
/TWO LOCATIONS IS ERROR
/DID AC SHIFT PROPERLY
/NO, ERROR
/READ LINE REGISTER
/DID LR GET INCREMENTED
/YES, ERROR
/CLEAR TTI +1
/READ TTY LINE
/SHOULD NOT CHANGE

/SET
/SET

TTCL
CLA IAC
TTO
JMP-.+5

TSTTO,

TTO TRANSMIT A 1
TTI READ COMPLEMENT
/NO, ERROR EITHER TTO OR TTI
/SET LINK
/TELETYPE OUTPUTG
/AC SHIFT PROPERLY
/NO, ERROR
/DID
/AND

.+2
/TELETYPE INPUT

.-2

/GET

STATUS

WORD

TTI+1

AAaindec 825

Page 14
9655
9654

7194
7429

CLL
SNL

9655
9656
9657
9649
9641
9642

7492
7449

HLT
SZA
HLT

/CLEAR L, BIT 9 TO L
/DID TTO & ITI NORK PROPERLY

RAL

9655

7492
1524
5244
5245
6492
4995
9999
1244
7949
1525
7449
7492
1245

9654

7449

SZA

9655
9656
9657i
9669

.7492

HLT

7291
1524

CLA IAC
TIO
TAD KOF5

9661
9662

5264
5265

DCA
DCA

9665
9664.
9665

6492
4995
9999

111,
4995
@

9666
9667

1265
7194
7429

TAD .«1
CLL RAL
SNL,

9645
9644
9645
9646
9647
9659
9651
9652

TAD KOF5
DCA
DCA

TAD
CNA

TAD

6494

HLI,
TAD

9677
9799
9791
9792
9795
9794

5592
6492
4991

9721

/GET

¢“o

7492
7449

,AHALI,

/SIAIUS INCREMENI PROPERLY
/NO, HALT
/9 BII IN THE
/CHARACTER ASSEMBLY WORD
/NO, HALT
/AC : +1
/SEI LINE 9 TO A 1
/4995

/SET STATUS WORD
/CLEAR ASSEMBLY WORD
/INPUT LINE 9

.+5
.+3

/GET ASSEMBLY wORD
/SET BIT O INTO LINK
/RECEIVE A 1 ON LINE

/4991

KOFI
.

IAD AHALT
DCA 1+5
4001
HLT.

1525
5519
1271
5511
6492
4992
74924,

VINO
DCA

TAD

KOFZ“
.+4
AHALT

lOCA‘.+5_
‘

TII
4992
HLT
TAD KOF7
DCA 9+4
TAD AHALT
LDCA 1+5
III
4997
.RLI
7

5517
'1271
5529
6492
4997
7492
4959

/NO, ERROR
/PICK UP ANY OTHER BITS
/YES, ERROR

.VHLIL
SZA 7

TT1

74mg

715267

WORD
STATUS

/4995

.-6

[DCA,.+4

STATUS

/COMPLEMENT

~
I

IAO KOE5+1

1522
5591
1271

9716
9717
9729

SZA
HLT

7492

9712
9715
9714
9715

9674
9675
9676

9719
9711

9+5
.+3

'TTI
4303

9679
9671
9672
9675

9795
9796
9797

ERROR
/STATUS SHOULD NOT BE INCREN
/STATUS wORD ERROR
/4995
/SET STATUS NORO
/CLEAR CHAR ASSEM NORO

/NO,

998

ENDIST

/4992
/SEI STATUS WORD
/HLT
/CHARACTER ASSEMBLY WORD
/TELETYPE INPUT
/STAIUS WORD
/HALI IF 2 LOOKS LIKE 5
/4997
/SET STATUS WORD
/HLT
/GEI ASSEMBLY WORD
/TT INPUT
/STAIUS WORD
/HALT IF 7 LOOKS LIKE 5
/END OF INITIAL
'

Maindec 825

Page 15
9722

4991

9725
9724
9725

4992
4995
4995

9726

4997

4991

KOFl,
KOFZ,

4992
4995

K0F5,

4995

4gm7

KOF7,
/11 III
*753

INSTRUCTIONS FOR SHIFMB

9759
9751
9752

5559
6492
4995

9755
9754
9755

9999
6492

JMP
III
4995
9
III

4995'

zmgz"g‘

__4093

9756
9757

6492

0
III

9749

4995

9741
9742
9745
9744
9745

9999
6492
4995
9999
6492

9746

4995

9747

9999
6492
4995
9999
6492
4995

9759
9751
9752
9755
9754

TTITAB,

III
:4995

1.9
TTI

TTI
4995
9
III

'4995’

9999
6492

9769
9761

4995
9999
6492

4995
9

9762
9765
9764
9765

4995
9999
6492
4995

4ggs
0
III
4005

9766
9767
9779

9999
6492
4995

E
III

9771
9772

9999
5759

9755
9756
9757

/TELETYPE INPUT INSTRUCTION
/STATUS WORD
/CHARACTER ASSEMBLY

III

I/SHIFT

4995
@
JMP I TTITAB-l
THE MB TEST, START

/EXIT
SHIFT

ONES

*1020

1999
1991
1992

6411
7291
6494

1995
1994
1995

1575
5915
5911
4544
7129
4555
1555
5919
4562
2915
5296

1996
1997
1919
1911
1912
1915
1914
1915

SHIFMB,

TTCL
CLA IAC
TTO
TAD K15
DCA Z 15
DCA Z 11
JMS TTISHF
STL
JMS SHIFll
TAD SHFREG
DCA z 19
JMS COMPll
ISZ z 15
JMP .-7

/CLEAR LINE REGISTER
/AC : 1
/SET LINE 9 TO A 1
/-15
/FOR COUNTING
/CLEAR SIMULATED SHIFT
/LOAD (11) INTO SHFREG AND TTI
/SET LINK TO
/SIMULATE TTI SHIFT
/GET III RESULTS
/INIO LOC 19
/COMPARE LOC 19 AND LOC 11
/FILLED WITH ALL ONES
/NO, REPEAT

Maindec 825

Page 16
/SHIFT
1916
1917

1929
1921
1922

ZEROS
CLA CMA
DCA z 11
TTD
TAD x15
BOA z 15
JMS TTISHF

7249
5911
6494
1575
5915
4544
7199

1925
1924
1925
1926
1927
1959
1951
1952

2915
5225

1955
1954

1275
5911

1955
1956

1942

7199
4275
1275
5911
7199
4522

1945

7291

1944
1945
1946

6494
1274
5911

1947
1959

STL
JMS

1951

7129
4275
1274

1952
1955
1954

5911
7129
4522

DCA
STL
JMS

1955

7299

1956
1957
1969
1961
1962
1965

6494
5915
1915
5911
4544

CLL
UMS SHIEII
TAD SHFREG
'DCA Z 19
JNS COMPll
152 z 13
JMP .-7

4555
1555
5919
4562

/FLOAT

1957
1949
1941

TAD

DCA
CLL
JMS

1967
1979

1971
1972
1975
1974

SHFALL,

ALL

COMTTI

GENTTI
BIT9+1
Z

/GENERATE

/COMPARE

/FOR

COUNTING

COMTTI

COMB
CLA
TTO
DCA Z 15
TAD Z 15
DCA Z 11
JMS TTISHF

CLL

4562
2915
5269

J98
152
JMP

COMPll
Z 15
SHFALL

JMS Z
4999
5777

To
To

ONES“
A

TTI

<11)
LINE

ALL ZEROS

INSTRUCTIONS

/4999
/RESET <11)
/LINK : LINE
TTI RESULTS

/AC=1

/SET

/GENERATE

LINE

/SET CONTENTS ll
/LINK=LINE 9
ll TTI INSTRUCTION

/5777

SHIFll
SHFREG
Z 19

5777

/ADDD
/PRESET

SITE
11

J95
TAD
DCA

BITS,

LINE

/CLEAR LINK
/SIMULATE TTI SHIFT
/GET III RESULTS
/INT0 LOC 19
/COMPARE 19 AGAINST 11
/FILLED wITH
/No, REPEAT

7199
4555
1555
5919

4959
4999

/LINK
GENTTI

“_g1

LOC

/LDAD 11 INTD SHFREG AND TTI

SINGLE 9 BIT
CLA IAC
TTO
TAD BIT9+1 /5777
DCA Z 11

TAD

/SHIFT

1966

SINGLE ONE BIT
TAD BITE
DCA z 11
CLL
JMS

/FLOAT

1964
1965

‘w
/SET
/SET
/-15

/COMPARE

/RESET CONTENTS OF
/LTNK 2 LINE 9
11 TTI AGAINST (ll)

/AC : 9
/SET LINE 9
/INITIALIZE

TO
15

/SET 11 2 TO NEXT SHIFT
SHFREG AND TTI
/LINK 2 LINE 9
/SIMULATE TTI SHIFT
/GET TTI RESULT
/INTO 19
/COMPARE (19) : (11)
/TESTED ALL COMBINATIONS
/NO, REPEAT

/(11)

ENDTST

Maindec 825
1

Page 17
/SET
1975

5275

1976
1977
1199

7204
3014
1372

1191
1192
1195

3012
1375
3015

1194
1195
1196

1374
3415

1197

3415
2015

1119

GENTTI,

91LL11,

1011

TTI
999

INSTRUCTIONS

/SET UP TTI
/GET LINK
/SAVE LINK

GLK
964 z 14
749 K11
964 z 12
149 149771
964 z 15
149 49995
964 1 z 15
749 z 11

/-11

/91961

/999
111+1~1

69991196

/999 6199196
/4995
/171+1

/999

964

ISZ

z415

749

z 14
949
z 11

949
964
132
999
JMS
999

z 11
z 12
91LL11 /99
1 746711+1
1 GENTTI

TAB

171+2 SHIFT1961

/711+2
/STEP P461 771 19619.
/GET LINK
/L199 : LINE 9
/GET L461 171+2
/999 NEXT 171+2
/RESEI 11
/RESET 11 111

1111

1014

749

1112
1115
1114
1115
1116
1117

7110
1011
7010

6LL

3011
2012
5304

1129
1121

4776
5675

1122
1125

5322
7204

1124
1125
1126

3014
1372
3012

1127
1159
1151

1375
3015
2015

1152
1155
1154

1415
3010
1014

1155
1156
1157

7110
4355
4362

1149
1141

2015
2012

1142

1145

5331
5722

/COMPARE RESULTS 99 771 196799611996
599
/GET LINK
GLK
964 z 14
749 K11
/—11
964 z 12
/999 69991196
149 149171 /91961 711
964 z 15
/999 GETTING 711's +2
ISZ z 15
/6199 9461 614196 9999
699911,
149 1 z 15 /GET 111 +2
964 z 19
1/999 699949196
/GET LINK
‘149 z 14
CLL 949
/LINK : LINE 9
JMS 691911 /6199L419 171 69791
JMS 699911 /6999499 (19) 499 (11)
/STEP 9467 111 19679.
182 z 15
ISZ z 12
/69994999 ALL
999 699917 /99
999 1 699171
/9x17

1144

5344

111699,

1145
1146
1147

1011
3353
1374

1150
1151'

3352
6402

1152

4003

1153
1154

0000

1155
1156
1157

5355
1011
7010

1160
1161
1162

699711,

SHFREG,

5744

3011
5755
5362

691911,

699911,

/EXE691E 771
/EXIT

196199671996

999
149 z 11
964 SHFREG
749 49995
964 .+2
711
4995

/691
/GET

9
999 1
599
749 z
949
964 z
999 1
599

/1919

111699

1979 699996,

11
11

691911

171

111+2
/4995
/1979

711+1
/TELETYPE INPUT
/614196

9999

/ASSEMBLY
/EXIT

9999

/SIMULATE 711

(11)

/GET

L=LINE 9

/69191 499 SET 911 9
/9469 1919 11
/EXIT
/6999499 L96 19 4641961

Mdi' nd‘e-c 825

PagerIB
1165
1164
1165
1166
1167
1172

140 z

1212
7241

13"}CE7 711 RESULIS.

1011

CMA IAC’H

/2'S

“”“*

524*
JMS z ERRCRj7

7442
4274
7222

1171

5762

1172

7765

1175
1174
1175
1176

7765
4225
2751
2752

CLA

COMP11

7765

K11,
K15,

“

4KOE5,

77653

’TABTII,E TTITAB
TTITABL
/CLOCK TEST
*1200

/415
7415

[FOR

4225

‘

w U31 1 11 C ASE
/EK11
_‘

1‘

QJMP L

7624
2554
5555

1205
1204
1205

1555
1556

1226
1207

SWITCHES

12+11

1210
1211
1212
1215
1214
1215

1216
1217
1220
1221

CLOCK, 1-014 QSR
1

“440 THREE
3»5DCA KLGCK

TAD KLOCK
1.142KLOCK+1
DCA KLOCK+2

5557fi"'11
1757
5212
1412
5241
1241
5257
1257
5272
1272

TAD
DCA

I
z
TAD I

5500:33
1500”

INDICATE CLOCK

SK1P2;
SK1P2_

DCA

SK1P5

TAB sK1P5;

SK1P4

TAD SK1P4
.41iDGA sK1P5
TAD SKIPSZ
DCA SKIPG~

1222
1225
1224
1225
1225
1227
1250
1251
1252

1511
5267
1412
5255
1255
5266
1266

1255
1254
1255

527141fi’

1256
1257

1242
5522

1242
1241
1242

6422
6421
7412

1245
1244
1245

7422.
5222

BSA

1246
1247

6221
7222

17 1041‘

1252

622244~

1251
1252

7412

TAD SKIPC
DCA
~¢

‘

1‘;

RUPTOK+lg

140 I 12

DCA OKONE:
TAD ONONE

1412

5242

/CET

CLOCK NUMBER

/CLR TO CLOCK

DCA RUPTOK
TAD RUPICK
~gDCA RUPTOK+3
TAD I 10
DCA OFFONE:
TAD OFFONE
OFFTWO

DCA

/GET

IOT

/IKIRD 5:
xECUR1H242
/E1PTH
I;

/S:5T
H
/TURN

CLOCK 0N

UP FIRST CLOCK 0N
{ (SECOKD»
/SET

OFFCLOCKJ

/TURN

FIRST CLOCK

/SECOND

/TURN

”SKP

NQP'

IOE1.A”J‘K

”SKP'
NDRUPT,

ADDRSCf

HLT

/SET.UP

/SKIP,

TAD

5,
If

/SECOND

OFFONE; ;1TT10FF .1”
«HLT1

POINTER

‘/FOR INDIRECT
/SKIP ON CLOCK
/SE1 FIRST CLOCK SKIP

SK1P1,,, ‘LTTISKP

1562‘"‘3

NUMBER

/SAVE IT
/CEI CLOCK NUMBER
.f;/+ TABLE ADDRES
"/;“IABLE$ROINTER

DCA

5525
1525
5511

7422

KLOCK+2
10.;

DCA SK1P1.
TAD SKIP1

‘1

171.+1

1200
1201
1202

COMPLEMENT

/ADD SIMULATED RESULTS~
/AC SHOULD : C
/IT DOES NOT ERROR

145 z 11;*

1211

CLOCK OPE
IS CLOCK

047

n,/NO

/CLocK SKIP SKIPPED
/POR

INTERRUPT

[WAIT-

"/147ERRUP1‘NOT
/SKP ERROR
/INTERRUPT

13 OK
HALT
IN ERROR

OFF

Maindec -825

Page 19
1255
1254
1255
1256
1257
1260
1261
1262
1265
1264
1265
1266
1267
1270

6424
5557

2557
5255
6421

7402
1561
5002
6001
7000

7402
6424
6421
5267

6424
1271
1272
6421
7410
1275
7402
1274
1275 “5557
2557
1276
1277
5276
1500
6421
1501
7402
6422
1502
1505
6421
1504
7410
1505
1506
1507

7402
5557
2557

1510
1511

5507
6421

1512
1515

7410
7402

1514

1515
1516

6421
7410
7402

1517
1520
1521

6451
7410
7402

1522
1525
1524

6441
7410
7402

1525
1526
1527

6411
7201
6404

1550
1551
1552

6451
4050

ONONE,

SKIPZ,

TTTON
DCA KLOCK+2

/TURN CLOCK

ISZ KLOCK+2
JMP .-1
TTlSKP

/WAIT

HLT
TAD ADDRS+1
DCA Z 2
TON
NOP
HLT
TTION
RUPTOK,
TTl SKP
JMP 0.].
TT1 ON
TTlSKP
SKIPS,
SKP
HLT
D04 KLOCK+2'
ISZ KLOCK+2
JMP .‘1
TTISKP
SKIP4,

HLT

OFFer,
SKIPS,

TTIOFFV
TTISKP
SKP

/WAIT

FOR

CLOCK

/FLAG

AGAIN?

/NO
/TURN
/FLAG

CLOCK OFF
CLEAR?

’

HLT
DCA

/YES
/FLAG
/WAIT

KLOCK+Z
KLOCK+2
0-1

ISZ
LIMP

TTlSKP

SKIPG,

0005

THREE,

0005

1555
1556
1557

0000
1540

~KLOCK,

0000

KTABLE,

KTABLE
0
TTONE-l
TTTWO~1

/SET
TO
TEST 2
/

TTXOFF

0N7
.

/TTXOFF DID NOT
/ALL
/CLOCKS
/SHOULD BE OFF
/AT THIS POINT

SKP
HLT
TTZSKP
SKP
HLT

/1 FOR
TT4SKP
JMS Z ENDTST
HLT
JMS Z ENDTST

CLEARED BY

/NO

TTISKP

TT5SKP
SKP
HLT
TTC L
CLA IAC
TTO

NOT

/CLOCK

SKP
HLT

1554

1545
1546

/NO, INTERRUPT
/CLOCK ON
CLOCK FLAG SET
NO, WAIT
/CLOCK ON, CLEAR CLOCK FLAG
/FLAG CLEAR?
/YES
/FLAG NOT CLEARED BY TTXON

1555

1540

/SK1P WORK
/DID NOT SKIP 0N CLOCK
/ADDRESS FOR INTERRUPT
/FOR JMP I 2
/TURN INTERRUPTS ON
/WAII

7402
4050

1541

TURN

LTNE

/END

OF CLOCK

TEST

/END

OF CLOCK

TEST

/FOR

ANDING
/CLOCK NUMBER
/TABLE ADDRESS
/FOR INDIRECT
/IOT'S FOR CLOCK
/IOT'S FOR CLOCK

CLOCK

Maindec 825
Page 20

1551
1552
1555

1551
1554
6421
6424
6422
6451
6454
6452
6441
6444

1554
1555
1556

6442
6451
6454

1557
1569
1561

6452
1252
1266

1542
1545
1544
1545

1546
1547
155%

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.ADDRS,

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TT4ONH
TT4OFF

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/CLOCK

FOR CLOCK
FOR CLOCK
SKIP
ON
OFF
SKIP
ON

5,
4

OFF
SKIP
ON
OFF
SKIP
ON
OFF

NORUPT

RUPI0K~?

/PowER CLEAR TEST
*14OO

PWRCLR,”

142%
1421
1492

7229
6411
6424

1405
1404
1495

6424
6454
6444

1406
1407
1419

6454
7422
5212

1411
1412
1415

6422
OEGQ
@229

1414
1415
1416

1212
7446

1417
1425
1421
1422
1425
1424
1425
1426
1427
1453
1451
1452
1455
1454

7419
7422
6451
7410
7422
6441
7410
7422
6451
7410
7422
7432
526%

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HLT
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HLT
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TTCL

:‘TTO'
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TTZON

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TT4ON
>HLT
DCA
TTI

/SET TO LINE 0
/LINE O TO A O
/CLOCK 1 ON
/CLOCK 2 ON
/CLOCK 5 ON
/CLOCK 4>ON
/HALT, WAIT START

.+2

/CLEAR STATUS
/TELETYPE INPUT
/STATUS WORD

.-2

SZA

/GET STATUS WORD
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7422

HLT

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6421

TTISKP

/CLOCK

ON?

/YES
/CLOCK

ON?

/YES
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ON/

/YES
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ON?

ADDRS
AHALT

1569
@671

AKOF5
BITE
CLOCK

1174
1275
129$

COMPIT
COMPll

1151
1162

O
O

TAD

/YES
/END POWER CLEAR
/ONLY 1 PASS

TEST

Maindec 825
Page 21

202771

ENDTST
ERROR
FILLIT
FORISZ
FORPLZ
FORTST

GENITI
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owEsxx
22277
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RUPTOK
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1122
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1164
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2272
1275
2265
2525
2474
1555
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2724
2726
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DIEAGRAMS (Not Applicable)
REFERENCES (No’r Applicable)

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.

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