Digital PDFs

DEC-00-HZRKA

December 2000

113 pages

Original

2.7MB

Document:	dec-00-hzrka-a-d
Order Number:	DEC-00-HZRKA
Revision:
Pages:	113
Original Filename:	https://svn.so-much-stuff.com/svn/trunk/pdp8/src/dec/dec-00-hzrka/dec-00-hzrka-a-d.pdf

OCR Text

RK05 Exerciser
Maintenance Manual

digital equipment corporation magnard. massachusebts

1st Edition, April 1974

Copyright @ 1974 by Digital Equipment Corporation
The material in this manual is for informational
purposes and is subject to change without notice.
Digital Equipment Corporation assumes no responsibility for any errors which may appear in this
manual.
Printed in U.S.A.

The following are trademarks of Digital Equipment
Corporation, Maynard, Massachusetts:
DEC
FLIP CHIP
DIGITAL

PDP
FOCAL
COMPUTER LAB

CONTENTS
Page
CHAPTER 1

GENERAL INFORMATION
INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
PHYSICAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Exerciser Chassis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Bus Terminator Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Positioner Exerciser Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1
Writer Exerciser Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Unibus Cable Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Power Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Environmental . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

CHAPTER 2

UNPACKING. SET-UP AND ACCEPTANCE TESTING
UNPACKING PROCEDURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
SET-UP PROCEDURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
ACCEPTANCE TEST PROCEDURE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Writer Exerciser Module Test Procedure . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Positioner Exerciser Module Test Procedure . . . . . . . . . . . . . . . . . . . . . . 2-6

it'

,-,-"N

CHAPTER 3

OPERATION
SCOPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
CONTROLS AND INDICATORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
MODES OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
StepMode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Alternate Mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Oscillate Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Random Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
UTILIZATION PROCEDURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

CHAPTER 4
4.1
4.2
4.2.1
4.2.1.1
4.2.1.2
4.2.1.3
4.2.1.4
4.2.1.5
4.2.2
4.2.2.1
4.2.2.2
4.2.2.3
4.2.2.4
4.2.2.5

THEORY OF OPERATION
SCOPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Writer Exerciser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Sector Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Write Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Write Clock
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Clock and Data Output Multiplexer . . . . . . . . . . . . . . . . . . . . . . . 4-1
Head Select Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Positioner Exerciser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Strobe Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Address Counter Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Address Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Cylinder Address Source Select Logic . . . . . . . . . . . . . . . . . . . . . . 4-2
Fault Detect Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
...

Ill

CONTENTS (Cont)
Page
DETAILED LOGIC DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4
Writer Exerciser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
Sector Decoder and Write Sector Switch . . . . . . . . . . . . . . . . . . . . . 4 4
Write Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
Write Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Clock and Data Output Multiplexer . . . . . . . . . . . . . . . . . . . . . . . 4-5
Positioner Exerciser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Strobe Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Address Counter Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
Address Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
Cylinder Address Source Select Logic . . . . . . . . . . . . . . . . . . . . . . 4-10
Fault Detect Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
FLOW DIAGRAM DESCRIPTION
CHAPTER 5

CHAPTER 6

MAINTENANCE
SCOPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MAINTENANCE PHILOSOPHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TEST EQUIPMENT REQUIRED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PREVENTIVE MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CORRECTIVE MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5-1
5-1
5-1
5-1
5-2

RK05 DISK DRIVE MAINTENANCE USING THE RK05 EXERCISER
SCOPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
ALIGNMENT. CHECKS. AND ADJUSTMENTS . . . . . . . . . . . . . . . . . . . . . . 6-1
Alignment Cartridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1
RK05K-AC Alignment Cartridge . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
231 5 CE Test Cartridge Shim Installation . . . . . . . . . . . . . . . . . . . . 6-2
Servo System Timing Checks and Adjustments . . . . . . . . . . . . . . . . . . . . 6-2
Dynamic Off-Line Checks and Adjustments . . . . . . . . . . . . . . . . . . . 6 4
Static Tests and Adjustments . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
ReadIWrite Data Separator (G180 Card) Adjustment . . . . . . . . . . . . . . . . . 6-10
Read/Write Head Check and Alignment . . . . . . . . . . . . . . . . . . . . . . . . 6-10
RK05K-AC Alignment Cartridge . . . . . . . . . . . . . . . . . . . . . . . . .6-11
2315 CEPack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14
Index/Sector Timing Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
RK05K-AC Alignment Cartridge . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
2315 CE Pack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-18
Cartridge Receiver Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19

APPENDIX A

1C SCHEMATICS
7442 4-LINE-TO-10-LINE DECODERS . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
7474 DUAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS . . . . . . . . . . . . . . . . . . A-2
741 23 MONOSTABLE MULTIVIBRATOR . . . . . . . . . . . . . . . . . . . . . . . . . A-3
74193 SYNCHRONOUS 4-BIT UPIDOWN COUNTER (DUAL CLOCK WITH CLEAR) . . A 4

APPENDIX B

ENGINEERING DRAWING SET

ILLUSTRATIONS
Figure No .

Title

Page

RK05 Exerciser Components
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Bus Terminator Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Unibus Cable Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Power Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Exerciser to RK05 Disk Drive Connection Diagram . . . . . . . . . . . . . . . . . . . . . 2-2
RK05 Exerciser to Multiple RK05 Disk Drives Connection Diagram . . . . . . . . . . . . . 2-3
Write Gate Data Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Writer Exerciser Clock and Data Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
Write Data Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
How to Read a Vernier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
RK05 Exerciser Front Panel Controls and Indicators . . . . . . . . . . . . . . . . . . . . 3-1
RK05 Exerciser Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
Sector Decoder and Write Section Switch Diagram
. . . . . . . . . . . . . . . . . . . . . 4-4
Write Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Write Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Write Clock and Multiplexei Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Clock and Data Multiplexer Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
Strobe Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
Address Counter Control Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
Address Counter Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
Cylinder Address Source Select Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
Fault Detect Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
Writer Exerciser Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12
Positioner Exerciser Step Mode Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . 4-13
Positioner Exerciser Alternate Mode Flow Diagram . . . . . . . . . . . . . . . . . . . . . 4-14
Positioner Exerciser Oscillate Mode Flow Diagram . . . . . . . . . . . . . . . . . . . . . . 4-15
Positioner Exerciser Random Mode Flow Diagram . . . . . . . . . . . . . . . . . . . . . . 4-16
Troubleshooting Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
Spindle Runout (Negligible Runout) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
Spindle Runout (Considerable Runout) . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
CE Test Cartridge Shim Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
Sine AmplitudeIOffset and Velocity Offset Waveform . . . . . . . . . . . . . . . . . . . . 6-5
Cosine AmplitudeIOffset Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
Velocity Amplitude Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
Acceleration Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
Full Stroke Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
Full Stroke Position Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
Outer Limit Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
RK05-AC Alignment Cartridge Head Alignment Waveforms . . . . . . . . . . . . . . . . . 6-13
ReadIWrite Head Adjustments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15
23 15 CE Pack Head Alignment Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . 6-17
Index/Sector Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19
Cartridge to Receiver Clearance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-20
Cartidge Receiver Clearances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-20
7442 Package and Logic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
DEC 74123 IC Illustrations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
DEC 74123 1C Output Pulse Width vs . External Timing Capacitance . . . . . . . . . . . . A-3
74193 Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5

TABLES

Table No .

Title
Exerciser Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exerciser Operating Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Bits Switch to Data Bit Correlation . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test Equipment. Required . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preventive Maintenance Schedule . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Servo System Checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Servo System Adjustments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Page
3-2
34
3-8
5-1
5-2
6-2
64

RK05 EXERCISER MAINTENANCE MANUAL

RK05-TA
RK05 - Exerciser

CHAPTER 1
G E N E R A L INFORMATION
1.1 INTRODUCTION
This manual provides a complete description of the RK05
Exerciser, including physical, functional, logic level, and
flow diagram descriptions, specifications, and operation and
maintenance procedures.
1.2 GENERAL DESCRIPTION
The RK05 Exerciser is a portable unit used to exercise the
RK05 Disk Drive off-line. The unit generates all the control
signals necessary to exercise the disk drive linear positioner
circuitry and write circuitry; the processor and drive
controller are not needed.

The exerciser can be used to isolate most hard disk drive
faults and to verify proper operation once the fault has
been corrected.
NOTE
If reliability problems are encountered, the disk
drive should be checked out on-line, using
MAINDEC diagnostics.
The exerciser is completely contained in an aluminum
chassis and is powered by the RK05 Disk Drive power
supply. A special 4-wire power cable serves t o route the
power supply outputs (t15 V, - 15 V, +5 V) to the
exerciser without interrupting power to the disk drive.
1.3 PHYSICAL DESCRIPTION
The exerciser (Figure 1-1) consists of five subassemblies and
two cable assemblies: exerciser chassis, front panel, bus
terminator module, test positioner module, test writer
module, bus cable assembly, and power cable.
1.3.1 Exerciser Chassis
The 9605720 chassis is a 6-1/10 in. high by 11-9/10 in.
wide by 3-6/10 in. deep metal box with a hinged front
panel.

1.3.2 Bus Terminator Module
The M930 Bus Terminator module (Figure 1-2) is a dual
height module that is mounted in slot 2 of the connector
block and contains all the circuitry necessary to terminate
the Unibus.
1.3.3 Positioner Exerciser Module
The G503 Positioner Exerciser Module (Figure 1-1) is a
dual height module that is mounted in slot 3 of the
connector block. This module contains all the logic
necessary to exercise the disk drive linear positioner
circuitry. In response to front panel switch setting and disk
drive control signal inputs, the module generates control
signal and cylinder address outputs to the disk drive linear
positioner circuitry. The module also monitors the disk
drive fault lines and illuminates the front panel fault
indicators when a fault is detected. Refer to engineering
drawing D-CS-G503-0-1 for a complete physical layout and
parts identification.
1.3.4 Writer Exerciser Module
The G502 Writer Exerciser Module (Figure 1-1) is a dual
height module that is mounted in slot 4 of the connector
block. This module contains all the logic necessary to
exercise the disk drive write circuitry. In response to front
panel switch settings and disk drive control signal inputs,
the module generates control signals, clock, and data
outputs to the disk drive write circuitry. Refer to engineering drawing D-CS-G502-0-1 for a complete physical
layout and parts identification.
1.3.5 Front Panel
The 9605719 front panel (Figure 1-1) contains a 4-pin
female Mate-N-Lok input power connector and controls
and indicators necessary to exercise the disk drive. Refer to
engineering drawing D-UA-RK05-TA-0 for wiring data,
parts identification, and a complete physical layout.

FRONT PANEL
(9605719)

CONNECTOR BLOCK
(1205348
I

CHASSIS
(9605720)
1

WRITER
EXERCISER
MODULE

POSITIONER
EXERCISER
MODULE
(G503)

NOTE:
UNIBUS AND POWER
CABLE NOT SHOWN

Figure 1-1 RK05 Exerciser Components

Figure 1-2 Bus Terminator Module

1-2

CHAPTER 2
UNPACKING, S E T - U P
AND ACCEPTANCE TESTING
2.1 UNPACKING PROCEDURE
To unpack the RK05 Exerciser, proceed as follows:

Unpack the unit from the shipping container
and inspect for damage. Damage claims should
be directed to the responsible shippers.
Check that the Unibus and power cables are
included with the exerciser.

To connect the RK05 Exerciser to four RK05
Disk Drives, the Unibus cable is installed as
follows (Figure 2-2):
a.

Remove all power from the RK05 Disk
Drives.

Disconnect the controller end of the
Unibus cable, which connects the RK05
Disk Drive to the controller module.

Open the exerciser chassis and mount the
disconnected Unibus cable into slot 1 of
the connector block.

2.2 SET-UP PROCEDURE

NOTE
The RK05 Exerciser may be connected to one
disk drive or as many as four disk drives
simultaneously; however, the exerciser can only
exercise one drive at a time.
1.

To install the RK05 Exerciser power cable,
proceed as follows (Figure 2-1):
a.

Remove the RK05 Disk Drive top cover.

Disconnect the PI Mate-N-Lok connector
on the disk drive power supply.

c.
Open the exerciser chassis and mount
either end of the Unibus cable assembly
(BC11A) into slot 1 of the connector
block.

Connect the 9-pin female connector (Jl)
of the exerciser power cable to PI.

Remove the disk drive prefilter and
ensure that the bus terminator module is
mounted in slot 7 of the disk drive
electronic module.

Connect the 9-pin male connector (P2) of
the exerciser power cable to Mate-N-Lok
connector J l on the disk drive power
supply.

Connect the 4-pin male connector (PI) of
the exerciser power cable to the 4-pin
female connector ( J l ) located on the
exerciser front panel.

To connect the RK05 Exerciser to one RK05
Disk Drive, the Unibus cable is installed as
follows (Figure 2-1):
a.

Unplug the disk drive ac power cord.

Mount the other end of the Unibus cable
assembly into slot 8 of the disk drive
electronic module.

(continued on page 2-3)

Figure 2-1 Exerciser to RK05 Disk Drive Connection Diagram

U N I B U S CABLES

RK05#1
EXERCISER

Set the exerciser front panel Drive
Selector knob to the ID (disk drive
identification number) of the disk drive
to be exercised.

2.3 ACCEPTANCE TEST PROCEDURE
The exerciser is shipped ready-to-use. If the unit is not
operating properly, refer to Chapter 5 (Maintenance) and
diagnose and correct the problem. Service should be
performed by qualified service personnel only.
To test the exerciser, obtain an RK05 Disk Drive that is
known to be operating properly, and set the exerciser up
for testing in accordance with the set-up procedure
described in Paragraph 2.2. After completing the set-up
procedure, perform the following test procedures.

Figure 2-2 RK05 Exerciser to Multiple RK05 Disk Drives
Connection Diagram
f.

Set the exerciser front panel Write
Constant toggle switch to the down
position.

NOTE
If faulty operation is detected at any point in
the following procedure, refer to Chapter 5 and
correct the fault before proceeding to the next
step in the procedure.
2.3.1 Writer Exerciser Module Test Procedure

CAUTION
The disk drive write circuitry must
not be exercised while an alignment
disk cartridge is installed in the disk
drive as serious damage to the
alignment tracks may result. The
alignment disk cartridge is
identified by a red access door
and/or a red label.

Set the Write Sector knob to "ALL."

Set the Head Select-UPPER/LOWER toggle
switch to UPPER.

Depress the WRITE pushbutton repeatedly;
observe the disk drive front panel WT indicator
illuminates momentarily each time the WRITE
pushbutton is depressed.

Set the Constant Write toggle switch to ON;
observe the disk drive front panel WT indicator
illuminates and does not extinguish until the
Constant Write toggle switch is set to the down
position.

Apply power to the disk drive(s); observe
the disk drive blower motor comes on
immediately. After a short delay, the
door lock solenoid energizes and the
exerciser front panel POWER ON indicator illuminates.

Set the disk drive RUN/LOAD switch to
LOAD and insert the DECpack.

Set the RUN/LOAD switch to RUN;
observe the DECpack rotates.

NOTE
An oscilloscope (Tektronix 453 or equivalent) is required to perform the following steps.
5.

Connect channel 1 scope probe to pin B08M2
on the RK05 Disk Drive logic block.

6 . Toggle the exerciser Head Select toggle switch
up and down; observe a HIGH level signal
( t 3 V) when the toggle switch is set to LOWER
and a LOW level signal when the toggle switch
is set to UPPER.

12.

NOTE
The index pulse is not visible on the
photograph shown in Figure 2-3 due to
photographic resolution limitations.

Set the oscilloscope controls as follows:
Vertical
Mode
Sensitivity
Coupling

13.
= ADD
= 1 V/div
= dc

Set the oscilloscope controls as follows:
Vertical
Mode
Sensitivity
Coupling

Sweep
A sweep time = 5 ms/div
Trigger
= Normal
8.

Set Write Sector knob to positions 1 through 9 ;
observe the index pulse moves in discrete steps.

Connect the channel 1 probe to B08L2
(WRITE GATE L) on the RK05 Disk Drive
logic block.
Connect the channel 2 probe to A02R2
(INDEX PULSE) on the RK05 Disk Drive logic
block.

10.

Set exerciser Constant Write toggle switch to
ON.

11.

Set the Write Sector knob to 0 ; observe the
display shown in Figure 2-3.

= Chl
= 1 V/div

= dc

Sweep
A sweep time = 0.2 ps/div
= Normal
Trigger
14.

Set all exerciser Data Bit toggle switches to the
0 position.

15.

Connect channel 1 scope probe to A08F2 on
RK05 Disk Drive logic block and uncalibrate
the scope horizontal sweep to display four
negative-going pulses as shown in Figure 2-4a.

16. Set all four Data Bit toggle switches to the 1
position; observe eight negative-going pulses as
shown in Figure 2-4b.

INDEX PULSE APPEARS HERE

Figure 2-3 Write Gate Data Waveform

Clock Waveform

Clock and Data Waveform

Figure 2-4 Writer Exerciser Clock and Data Waveforms

17. Toggle each of the Data Bit toggle switches;
observe that each switch controls one of the
negative-going pulses.
18.

Set the oscilloscope controls as follows:
Vertical
Mode
Sensitivity
Coupling

= dc

19.

Connect scope probe to TP3 on card GI80
(AB01 in RK05 Disk Drive).

20.

Set exerciser RUN switch to the down position.

21.

Set exerciser Constant Write and DC Erase
toggle switches to the down positions.

22.

Set exerciser Write Sector knob t o ALL.

23.

Set exerciser Head Select toggle switch to
UPPER.

24.

Depress exerciser WRITE pushbutton; observe
data appears on display as shown in Figure
2-5a.

25.

Set exerciser Head Select toggle switch to
LOWER and depress the WRITE pushbutton;
observe data appears as shown in Figure 2-5a.

27.

Set the FWD/REV switch to FWD.

Set the RTZ toggle switch to the down
position.

Set the RUN switch to the up position; observe
the linear positioner moves to ever increasing
(inward) cylinder addresses.

Set the FWDIREV toggle switch to REV;
observe the linear positioner moves to ever
decreasing (outward) cylinder addresses.

Set all Cylinder Address toggle switches to 0.

Set the Function knob to ALT; observe the
linear positioner moves back and forth between
cylinder address 0 and ever decreasing cylinder
addresses.

Set the FWDIREV switch to FWD; observe the
linear positioner moves back and forth between
cylinder address 0 and ever increasing cylinder
address.

Set the RUN toggle switch to the down
position.

10.

Set the Function knob to OSC.

11.

Set the following Cylinder Address toggle
switches to the 1 position: 128, 64, 8, and 2
(cylinder address 202).

Set the exerciser Head Select toggle switch to
UPPER.
Set the exerciser DC Erase toggle switch to ON
and depress the WRITE pushbutton; observe
data is erased completely as shown on Figure
2-5b.

28.

Set the exerciser Head Select toggle switch to
LOWER; observe data is still present as shown
on Figure 2-5a.

29.

Depress the exerciser WRITE pushbutton;
observe data is erased completely as shown on
Figure 2-5b.

30.

1. Set the Function knob to STEP.

= CHI
= 0.5 V/div

Sweep
A sweep time = 0.5 ps/div
= normal
trigger

26.

2.3.2 Positioner Exerciser Module Test Procedure

Repeat steps 23 through 29 for sectors 0-9.

12. Momentarily set the RUN toggle switch to the
up position; observe the linear positioner moves
to cylinder address 202.

NOTE
Refer to Figure 2-6 for instructions on
reading the vernier.
13.

Set Cylinder Address toggle switch 1, 4, 16, or
32 to the 1 position.

14.

Set the RUN toggle switch to the up position;
observe the exerciser ADDR INV (address
invalid) indicator illuminates.

Write Data Waveform

Erase Data Waveform

Figure 2-5 Write Data Waveforms

15.

Set the RUN toggle switch to the down
position and set all Cylinder Address toggle
switches to 0.

16.

Set Cylinder Address toggle switch 128 to 1
and momentarily set the RUN toggle switch to
the up position; observe the linear positioner
moves to cylinder address 128.

17.

Repeat steps 15 and 16 using each of the
remaining Cylinder Address toggle switches.

18.

19. Put the RK05 Disk Drive servo amp switch
(located to the left of the positioner assembly)
to the down position; observe the exerciser
SEEK INC (Seek Incomplete) indicator illuminates. Return the servo amp switch to the up
position.
20.

Set the RTZ toggle switch to the up position;
observe the linear positioner moves to cylinder
address 0 and stops.

Set the RUN toggle switch to the up position
and set the Function knob to RAND; observe
the linear positioner moves to random cylinder
addresses.

200

100

PERFECTLY ALIGNED

TO R E A D A V E R N I E R , proceed
As follows:
a.

Determine t h e w h o l e number value o f t h e nearest regular scale marking t o t h e right o f Vernier scale triangle (A).

A d d t h a t value t o t h e value o f t h e vernier scale marking t h a t aligns perfectly w i t h a regular scale marking.

I n t h e illustration shown above t h e vernier reading is: Regular Scale Marking = 2 0 0
Vernier Marking
=
2
Vernier Reading
= 202

Figure 2-6 How to Read a Vernier

CHAPTER 3
OPERATION

controls and indicators. The writer exerciser controls
directly control the writer exerciser logic and enable
manual selection of the upper or lower disk drive readlwrite
head. The positioner exerciser controls and indicators
directly control the positioner exerciser logic and monitor
disk drive fault lines and +15 V input power. The front
panel drive selector knob selects the ID of the disk drive to
be exercised. Figure 3-1 shows the exerciser front panel,
and Table 3-1 provides a complete description of each
control and indicator.

3.1 SCOPE
This chapter covers complete operation of the exerciser and
includes a description of front panel controls and indicators
and modes of operation and a utilization procedure

3.2 CONTROLS AND INDICATORS
The RK05 Exerciser front panel (Figure 3-1) controls and
indicators can be functionally separated into two categories: writer exerciser controls and positioner exerciser

7
6891-4

Figure 3-1 RK05 Exerciser Front Panel Controls and Indicators

Table 3-1
Exerciser Controls and Indicators
Item

Description

Function

POWER ON indicator

Illuminates when +15 V input power is present.

Constant Write-ON toggle switch

Enables the writer exerciser logic to perform
repeated write operations on the selected sector.

DC Erase-ON toggle switch

Places a constant HIGH on the writer exerciser
logic clock and data output line, thus erasing the
selected sector.

4-Pin Connector

Input power connector, connects to RK05 Disk
Driver power supply via the power cable.

Data Bits toggle switches

Enable manual selection of data bits output to the
disk drive by the writer exerciser logic.

Head Select-UPPER/LOWER
toggle switch

Selects readlwrite head at the selected RK05 Disk
Drive.

WRITE pushbutton

Enables the writer exerciser logic to perform a
single write operation on sectors 0-9 or all
sectors.

Write Sector Knob

Selects sectors 0-9 or all sectors for writing by the
writer exerciser logic.

Drive Sector Knob

Selects ID of disk drive to be exercised (switch
output goes directly to disk drive).

Function Knob

Selects one of four position exerciser modes of
operation:
a.

1).
c:.

(1.

Step
Alternate
Oscillate
Random

(See Paragraph 3.3 for a complete description of
modes of operation.)
RUN toggle switch

Enables the positioner exerciser to perform a
position operation each time the disk drive enters
the ready state, i.e., R/W/S READY L asserts.

Table 3-1 (Cont)
Exerciser Controls and Indicators
Item

Description
RTZ toggle switch

Clears the address counter to a count of 0 ,
extinguishes the ADDR INV indicator if
illuminated and asserts the RESTORE L output to
disk drive. RESTORE L initiates a restore
operation in the disk drive.

FWDIREV toggle switch

Enables the address counter to count up (FWD) or
count down (REV).

ADDR INV indicator

Illuminates when the BUS ADDRESS INVALID L
input line asserts. The disk drive asserts the BUS
ADDRESS INVALID L line when the cylinder
address is considered to be greater than 202.

SEEK INC indicator

Illuminates when the BUS SEEK INCOMPLETE
input line asserts. The disk drive asserts BUS SEEK
INCOMPLETE when the seek operation is not
completed.

Cylinder Address - 1 , 2 , 4 , 8 , 16,
32,64,128 toggle switches

Enables manual selection of cylinder address for
use in the alternate and oscillate modes.

3.3 MODES OF OPERATION
The positioner exerciser logic operates in four different
modes selectable via the Function knob.

Function

3.3.1 Step Mode
In the step mode of operation consecutive cylinder
addresses are provided to the disk drive. An address counter
internal to the positioner exerciser logic is the source of the
consecutive addresses. If the FWDIREV switch is set to
FWD, the address counter starts at whatever count it
contained when the step mode was selected and increments
by one after each cylinder seek operation is completed.
When cylinder address 202 is reached, the address counter
is cleared to a count of 0 and continues to increment by 1.
If the FWDIREV switch is set to REV, the address counter
decrements by 1 after each cylinder seek operation; when a
count of minus 1 is reached, the address counter is loaded
to a count of 202 and the process continues.
Thus, in the step mode the positioner exerciser will
generate all 203 cylinder addresses (0-202) consecutively
and gate them out to the disk drive.

3.3.2 Alternate Mode
In the alternate mode of operation, the positioner exerciser
alternately selects the front panel Cylinder Address
switches and internal address counter as the source of the
cylinder address. The Cylinder Address switches are controlled manually by the operator and are normally set to
address 0. However, these switches may be set to any
address at the operator's discretion. If the FWDIREV
switch is set to FWD, the internal address counter will
increment by 1 each time the address counter is selected as
the source of the cylinder address, i.e., on alternate cylinder
seek operations. When the counter reaches a count of 202,
it is cleared to 0 and the process continues.
3.3.3 Oscillate Mode
The oscillate mode is similar to the alternate mode in that
the positioner exerciser logic alternately selects the cylinder
address switches and the internal address counter as the
source of the cylinder address. In the oscillate mode,
however, the internal address counter is held to a count of
0. Hence the cylinder seek operations oscillate back and
forth between the contents of the manually controlled
cylinder address switches and 0.

3.3.4 Random Mode
In the random mode, pseudo random cylinder addresses
provided by the internal address counter are gated out to
the disk drive. An internal clock referred to as the fast
clock is enabled in this mode which increments/decrements
the address counter until a strobe occurs. When the strobe
occurs the fast clock is shut off, the contents of the address
counter is used to perform a seek operation, and the
counter is incrementedldecremented by 1. The fast clock is
then enabled again and the process is repeated. If the
FWD/REV switch is set to FWD, the cylinder address of
each successive cylinder seek operation is greater than that
of the previous operation until a count of 202 is reached.
At a count of 202, the counter is cleared and the process
continues. If the FWDIREV switch is set to REV, the
cylinder address of each successive cylinder seek operation

is less than the previous operation until a count of minus 1
is reached. At a count of minus 1, the counter is loaded to a
count of 202 and the process continues.

3.4 UTILIZATION PROCEDURE
To exercise the RK05 Disk Drive, set up the exerciser and
disk drive per Paragraph 2.2 and perform the following
operating procedures (Table 3-2).
CAUTION
DO NOT attempt to exercise the disk drive
write circuitry with an alignment disk cartridge
installed in the disk drive as serious damage to
the alignment tracks may result. The alignment
disk cartridge is identified by a red access door
and/or a red label.

Table 3-2
Exerciser Operating Procedure
Procedure
1.

Indication

To position the readlwrite heads to a particular cylinder:
a.

Set the RTZ and RUN toggle switches to the down
position.

Set the Function knob to OSC.

Set the Cylinder Address toggle switches to the
desired cylinder address (0-202).

Quickly toggle the RUN toggle switch to RUN and
off; repeat until positioner stops at the selected
cylinder.

Observe the linear positioner moves to
the selected cylinder and stops.

To position the readlwrite heads to ever increasing
cylinder addresses:
a.

Set the FWD/REV toggle switch to FWD.
6

Set the Function knob to STEP.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves to
ever increasing cylinder addresses.

Table 3-2 (Cont)
Exerciser Operating Procedure
-

Procedure

Indication

To position the readlwrite heads to ever decreasing
cylinder addresses:
a.

Set the function knob to STEP.

Set the FWD/REV toggle switch to REV.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves to
ever decreasing cylinder address.

To alternately position the readlwrite heads to a selected
cylinder address and ever increasing cylinder addresses:
a.

Set the RTZ and RUN toggle switches to the down
position.

Set the Function knob to ALT.

Set the Cylinder Address toggle switches to the
desired cylinder addresses (0-202).

Set the FWDIREV switch to FWD.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves back
and forth between the selected cylinder
address and ever increasing cylinder
addresses. When the increasing cylinder
addresses reach 202, the positioner moves
directly to cylinder address 0 and the
process continues.

To alternately position the readlwrite heads to a selected
cylinder address and ever decreasing cylinder addresses:
a.

Perform steps 4a through 4c.

Set the FWD/REV switch to REV.

Set the RUN toggle switch to RUN.

Observe the linear positioner moves back
and forth between the selected cylinder
address and ever decreasing cylinder
addresses. When the decreasing cylinder
addresses reach 0, the positioner moves
directly to cylinder address 202 and the
process continues.

Table 3-2 (Cont)
Exerciser Operating Procedure
I

Procedure
6.

Indication

To oscillate the readlwrite heads back and forth between
a selected cylinder address and cylinder address 0:
a.

Set the RTZ and RUN toggle switches to the down
position.

Set the Function knob t o OSC.

Set the Cylinder Address toggle switches to the
desired cylinder address (0-202).

Set the RUN toggle switch to RUN.

I
Observe the linear positioner oscillates
back and forth between cylinder address
0 and the selected cylinder address.
NOTE

If the Cylinder Address switches are set
to address 0, the linear positioner will not
move.
7.

To randomly position the readlwrite heads to many
different cylinder addresses:
a.

Set the RTZ and RUN toggle switches to the down
position.

Set the Function switch to RAND.

Set the RUN toggle switch to RUN.

To move the readlwrite heads to cylinder address 0, set
the RTZ switch to RTZ.

Observe the linear positioner moves
randomly.
Observe the linear positioner moves to
cylinder address 0 and stops.

Table 3-2 (Cont)
Exerciser Operating Procedure
Procedure
9.

10.

11.

12.

Indication

To continuously write all sectors on a particular
cylinder:
a.

Set all toggle switches to the down position.

Set the Function knob to OSC.

Position the Cylinder Address toggle switches to
the desired cylinder address (0-202).

Quickly toggle the RUN toggle switch to RUN and
off. Repeat until positioner stops at the selected
cylinder.

Set the Head Select - UPPER/LOWER toggle
switch to the desired position.

Set the Data Bits toggle switch to the desired data
configuration (Table 3-3).

Set the Write Sector knob to ALL.

Set the Constant Write toggle switch to ON.

To write all sectors on a particular cylinder only once:
a.

Perform steps 9a through 9s.

Depress the WRITE pushbutton.

To write a particular sector on a particular cylinder
continuously:
a.

Perform steps 9a through 9f.

Set the Write Sector knob to the desired sector.

Set the Constant Write toggle switch to ON.

To write a particular sector on a particular cylinder only
once:
a.

Perform steps 9a through 9g.

Set the Write Sector knob to the desired sector.

Depress the WRITE pushbutton.

Observe the linear position moves to the
selected cylinder and stops.

Table 3-2 (Cont)
Exerciser Operating Procedure
- --

Indication

Procedure
13. To erase all sectors on a particular cylinder:

14.

Perform steps 9a through 9e.

Set the Write Sector knob to ALL. - -

Set the DC Erase toggle switch to ON.

Depress the WRITE pushbutton.

To erase a particular sector on a particular cylinder:
a.

Perform steps 9a through 9e.

Set the Write Sector knob to the desired sector.

Set the DC Erase toggle switch to ON.

Depress the WRITE pushbutton.

Table 3-3
Data Bits Switch to Data Bit Correlation
Data Bits Switch

Data Bit Selected

*Bits 12, 13, 14, 15 are written only on 1 2 sector disk
packs.

CHAPTER 4
THEORY OF OPERATION

4.1 SCOPE
This chapter provides a detailed description of the RK05
Exerciser. The description is provided in three parts: a
functional description, a detailed logic description, and a
flow diagram description.
4.2 FUNCTIONAL DESCRIPTION
Functionally, the exerciser circuitry can be separated into
two logic sections: the writer exerciser and the positioner
exerciser. The writer exerciser monitors the disk drive
sector counter and BUS INDEX lines and generates control
and data signals to exercise the disk drive write circuitry.
The positioner exerciser monitors the disk drive R/W/S
READY (ReadIWritelSeek Ready) line and fault lines and
generates control signals and cylinder addresses to exercise
the disk drive linear positioner circuitry.
4.2.1 Writer Exerciser
As illustrated in Figure 4-1, the writer exerciser is separated
into four functional logic blocks: the sector decoder, the
write control logic, the write clock, and the clock and data
output multiplexer.

4.2.1.1 Sector Decoder - The sector decoder decodes the
sector counter inputs from the disk drive and asserts one of
ten sector select lines (0-9) to the front panel Write Sector
switch. The disk drive continually updates the sector
counter inputs to indicate the sector currently passing
under the readlwrite heads. When the sector select line
asserted corresponds to the position of the Write Sector
switch, the WRITE GATE ENABLE line asserts.
4.2.1.2 Write Control Logic - The Write Control logic
monitors the front panel Constant Write and WRITE
switches and the disk drive BUS INDEX signal and enables
or disables the write clock and the disk drive write circuitry
accordingly.

If the Constant Write toggle switch is set to ON, the WRITE
ENABLE line is constantly asserted thereby enabling the
write clock to run continuously. The BUS WRITE GATE
line then asserts whenever the WRITE GATE ENABLE line
asserts. Thus, in the constant write mode, the BUS INDEX
signal has no effect and the selected sector is written each
time it passes under the readlwrite head.
If the Constant Write toggle switch is set to off (down) and
the WRITE pushbutton is depressed, the first BUS INDEX
pulse causes the WRITE ENABLE line to assert. The BUS
WRITE GATE line will then follow the state of the WRITE
GATE ENABLE line. After one revolution of the disk
another BUS INDEX pulse occurs and clears the WRITE
ENABLE and BUS WRITE GATE lines. Thus, the write
clock is enabled for one revolution of the disk only and the
selected sector is written only once.
4.2.1.3 Write Clock -When enabled, the write clock
generates the clock pulses and control signals necessary to
gate the clock pulses and data bits through the multiplexer.
4.2.1.4 Clock and Data Output Multiplexer - The clock
and data multiplexer converts parallel data bit inputs from
front panel Data Bits toggle switches into a serial data
output and frames each data bit with clock pulses. Setting
the front panel DC Erase toggle switch to ON causes a
constant HIGH to be output on the BUS WRITE DATA
AND CLOCK line thereby erasing the selected sector.
4.2.1.5 Head Select Switch - The output from the front
panel Head Select switch selects either the upper or lower
readlwrite head in the disk drive.
4.2.2 Positioner Exerciser
As illustrated in Figure 4-1, the positioner exerciser is
separated into five functional logic blocks: the strobe
oscillator, the address counter control logic, the address
counter, the cylinder address source select logic, and the
fault detect logic.

4.2.2.1 Strobe Oscillator - The strobe oscillator monitors
the front panel RUN switch and the R/W/S READY line
from the disk drive and, when enabled, generates strobes to
the address counter control logic, the cylinder address
source select logic, and the disk drive. If the RUN switch is
set to the down position, the strobe oscillator is disabled.
Setting the switch to the up position conditions the strobe
oscillator such that any assertion of the R/W/S READY
input activates the oscillator.
4.2.2.2 Address Counter Control Logic - The address
counter control logic, monitors the front panel Function
and FWDIREV switches, and controls the operation of the
address counter accordingly. The Function switch selects
one of four operating modes and the FWDIREV switch
determines whether the address counter will be incremented or decremented. Note that setting the RTZ switch
to the up position overrides all other inputs to the address
counter control logic by clearing and holding the address
counter to a count of 0 and asserting the BUS RESTORE
line to the disk drive. The following paragraphs describe the
operation of the address counter control logic in each of
the four modes.
4.2.2.2.1 Step Mode - In this mode the STEP input to the
Cylinder Address source select logic asserts and causes
ADDR CNTR SEL to assert. When the strobe oscillator
generates a strobe, the ADDR CNTR BITS (0-7) are gated
through the cylinder address source select logic and strobed
into the disk drive. The disk drive linear positioner then
performs a seek operation to the cylinder address indicated.
FWD/REV switch is set to FWD, the
1f the front
COUNT UP line then asserts and increments the address
counter by 1. When the next strobe o c c ~ r s ,the ADDR
CNTR BITS (0-7) are gated out again and the counter is
incremented by 1. This continues until the counter reaches
a count of 202. At a count of 202, the 202 DETECT line
asserts, the counter is cleared to a count of 0, and the
process continues. If the FWDIREV switch is set to REV, a
strobe causes the COUNT DOWN line to assert decrementing the counter by 1 and upon reaching a count of
minus 1, the counter is loaded to a count of 202. Thus, in
the step mode, the disk drive performs seek operation to
ever increasing or decreasing consecutive cylinder addresses.
4.2.2.2.2 Alternate Mode - In this mode, the ADDR
CNTR SEL line asserts only on alternate strobes, causing
the ADDR CNTR BITS (0-7) to be gated out to the disk
drive and enabling the address counter to be incremented or
decremented by 1. Thus, in the alternate mode, the disk
drive linear positioner performs seek operations alternately
to the cylinder address contained in the front panel

Cylinder Address switches and the address counter. Note
that the Cylinder Address switches provide a fixed address
while the address counter provides an ever increasing or
decreasing address.

4.2.2.2.3 Oscillate Mode - In this mode, like the alternate
mode, the ADDR CNTR SEL line asserts on alternate
strobes. However, in the oscillate mode, the OSC line
asserts causing the address counter control logic to assert
the CLEAR line which clears the address counter to 0 and
holds it there. Thus, in the oscillate mode, the disk drive
linear positioner performs seek operations alternately to the
cylinder address contained in the front panel Cylinder
Address switches, which may be set to any address from 0
to 202, and the address counter, which is held to address 0.
4.2.2.2.4 Random Mode - In this mode, the STEP and
RANDOM lines assert. The assertion of STEP causes ADDR
CNTR SEL to assert, therefore, as in the step mode, each
occurrence of a strobe in the random mode causes the
ADDR CNTR BITS (0-7) to be gated out to the disk drive
and the address counter to be incremented or decremented
by 1. The random mode differs from the step mode,
however, in that the assertion of the RANDOM line enables
a fast clock internal to the address counter control logic.
The fast clock increments or decrements the address
counter between strobes. Hence, the cylinder addresses
output to the disk drive are not consecutive, but rather,
differ by varying amounts depending on the elapsed time
between strobes. As a result, the seek operations performed
by the disk drive linear positioner are pseudo-random.
4.2.2.3 Address Counter - The address counter outputs
the ADDR CNTR BITS (0-7) t o the cylinder address
source select logic and asserts the NEQ 1 DETECT and 202
DETECT lines whenever those counts are reached. The
inputs to the address counter from the address counter
control logic enable the counter to be incremented by 1
from 0 to 202, decremented by 1 from 202 to 0, cleared to
a count of 0 and loaded to a count of 202.
4.2.2.4 Cylinder Address Source Select Logic - The
cylinder address source select logic monitors the front panel
Function switch and selects either the front panel Cylinder
Address switches or the address counter as the source of the
cylinder address accordingly. If the Function switch is set
to ALT or OSC, the STEP input is cleared and the strobe
input alternately selects the address counter input and
Cylinder Address switch input as the cylinder addresses
source. If the Function switch is set to STEP or RAND,
however, the STEP input asserts and the address counter
input is constantly selected as the cylinder address source
and the strobe input has no effect.

BUS RESTORE*

PANEL
FRWED
V/

1
1
1 SWITCH
L---J
COUNT DOWN*
FRONT PANEL
HEAD SELECT- UPPER*
UPPER / LOWER
SWITCH

BUS WRITE GATE*
FRONT

* TO

BITS ( 0 - 7 )
-A D o R COUNTER
E s s
-

N E 1~ DETECT*
RUN

rÃ‘ 1
1 FRONT 1
IF J E % k N I

WRITE
ENABLE

ICONSTANT
WRITE
1 SWITCH 1

ADDRESS
COUNTER
CONTROL

STROBE

1 RTZ
I

2 0 2 DETECT*
CYLINDEI
ADDRESS
SOURCE
SELECT
LOGIC

OSC*
Ã

RANDOM*

' 1

r---

1 SWITCH 1

WRITE
2ONTROL
LOGIC

L--J

O
N
PANEL
CYLINDER
AOORESS
SWITCHES

'
1

RK05

STEP*
WRITE ( U )

STROBE

:1!;WRITE
:L

4DDRESS
3US
CYLINDER
(0-7)*)

CYLINDER ADDRESS ( 8 LINES)

BUS I N D E X ( U )

SECTOR CNTR 0
FROM

SECTOR CNTR 1.
SECTOR CNTR 2

RK05

SECTOR CNTR 3

SECTOR
SECTOR
DECODER

-4)

1 FRONT 1 p c

-----

ERASE

FRONT
PANEL INDICATORS

'1I

BUS ADDRESS
INVALID*

BUS
INCOMPLETE*
SEEK

ADDR
INV

SEEK
INC

---- -

POWER
1
ON

---

--4

.
DETECT
LOGIC

7 D R I V E O*

1 FRONT
PANEL ( D R I V E I *
DRIVE
2*
1 SELECTOR 1DRlvE
DRIVE 3 *

Ãˆ

dTO1,

* RK05

Figure 4-1 RK05 Exerciser Functional Block Diagram

4-3

4.2.2.5 Fault Detect Logic - The fault detect logic
monitors the BUS ADDRESS INVALID and BUS SEEK
INCOMPLETE inputs from the disk drive and lights the
corresponding front panel indicator when either of the lines
asserts. Assertion of the RTZ line causes the ADDR INV
indicator to extinguish.

4.3 DETAILED LOGIC DESCRIPTION
The following paragraphs provide a detailed logic level
description of each of the functional blocks shown in
Figure 4-1.

4.3.1 Writer Exerciser
4.3.1.1 Sector Decoder and Write Sector Switch - The
sector decoder (Figure 4-2) decodes the SECTOR CNTR
(0-3) inputs and asserts one of ten lines to the Write Sector
switch. When the sector decoded corresponds to the
position of the Write Sector switch, the WRITE GATE
ENABLE L line asserts. If the Write Sector switch is set to
ALL, WRITE GATE ENABLE L is always asserted.

[

SECTOR CNTR O L
I

4.3.1.2 Write Control Logic - The write control logic
(Figure 4-3) enables the disk drive to write the selected
sector once or repeatedly. Setting the Constant Write
switch to ON asserts CONSTANT WRITE L which sets the
Write Gate flip-flop, thereby enabling the write clock and
conditioning the bus write AND gate. Under these
conditions, the write clock runs constantly and the BUS
WRITE GATE L line asserts each time WRITE GATE
ENABLE L asserts, i.e., each time the selected sector passes
under the readlwrite heads. Setting the Constant Write
switch to off (down) and depressing the WRITE pushbutton clears CONSTANT WRITE L and asserts WRITE L,
which sets the Write Latch. When the bus index pulse
occurs (the bus index pulse occurs once per disk
revolution), the positive-going edge sets the Enable Write
Gate flip-flop, which in turn sets the Write Gate flip-flop
thus enabling the write clock and conditioning the bus
write AND gate. BUS WRITE GATE L then asserts when
the selected sector passes under the readlwrite heads and
immediately thereafter the selected sector is written. The
very next bus index pulse then resets the Write Gate
flip-flop on its negative-going edge. Note that releasing the
WRITE pushbutton clears the Write Latch and resets the
Enable Write Gate flip-flop.

1 P I 0 FRONT PANEL

W R I T E SECTOR SWITCH

CNTR 1L
FROM
RK05

I
I
1

CNTR 2 L

BINARY TO
DECIMAL
DECODER

I
CNTR

31-J^

Figure 4-2 Sector Decoder and Write Section Switch Diagram

----F/o
FRONT PANEL "I
I
1
CONSTANT WRITE

WRITE GATE

CONSTANT WRITE L

WRITE LATCH

WRITE H

1WRITE L

ENABLE
WRITE

-u
WRITE

WRITE ENABLE H

(TO WRITE CLOCK FIGURE 4 - 4 1

(FROM RK05)
BUS INDEX L

Figure 4-3 Write Control Logic

4.3.1.3 Write Clock - The write clock generates the clock
pulses and control signals necessary to gate clock pulses and
data bits through the clock and data multiplexer (Figure
4-4). See timing diagram (Figure 4-5) for logic operation.
Note that the clock runs as long as WRITE ENABLE H is
asserted.
4.3.1.4 Clock and Data Output Multiplexer - The clock
and data output multiplexer serially outputs the clock
pulses and data bits such that each data bit is preceded and
succeeded by a clock pulse (Figure 4-6). Referring to Figure
4-5, note that the initial clock pulse is generated on the first
assertion of CLOCK H. On the second assertion of CLOCK
H, 1 L is cleared and the bit 0 AND gate is satisfied, gating
bit 0 on t o the output line. On the third assertion of
CLOCK H, 1 L is asserted again generating a second clock
pulse and so on.

4.3.2 Positioner Exerciser
4.3.2.1 Strobe Oscillator - The strobe oscillator (Figure
4-7) generates strobes which are used internally and are also
output to the disk drive to gate in the cylinder address.
Setting the front panel RUN switch to the up position
clears the RUN L line. When the disk drive is ready to
execute another operation, the R/W/S READY L line
asserts, turning the input driver off. With the driver off, the
capacitor charges until the UJT (unijunction transistor)
conducts, discharging the capacitor and generating a
positive-going pulse which is inverted by the output inverter
asserting STROBE L. The negative-going pulse output turns
the output driver on, asserting BUS STROBE L. In response
to BUS STROBE L, the disk drive initiates a seek operation
and clears the R/W/S READY L input.

CLOCK

WRITE
ENABLE H
(FROM
FIGURE 4 - 3 )

ns
ONESHOT
0-

ns
ONESHOT
0

A2
F/ F

4
F/F
0

5 -

-8
F/ F

.CRO

?
Ã

(1.44 M H z )
Ãˆ

Figure 4-4 Write Clock

WRITE
ENABLE H

2 5 0 n s O.S.
CLOCK H

BIT 0

BIT 1

BIT 2

100,

ov
+ 3V

B I T 3
OV

1 0 0 ns
CLOCK

BIT0

CLOCK

BIT1

CLOCK

BIT2

CLOCK

BUS WRITE + 3 V
DATA AND
CLOCK L

Figure 4-5 Write Clock and Multiplexer Timing Diagram

BIT3

CLOCK

T0
FIGURE
4-6

J
Figure 4-6 Clock and Data Multiplexer Logic

STROBE L
( T O RK05)

RR K O
0 5 READY
W
L

1 STROBE L

:ures

4-8 8 4-10

Figure 4-7 Strobe Oscillator

on alternate strobes. When the counter reaches
a count of minus 1, the Load/Clear flip-flop is
set and LOAD L asserts, loading a count of 202
into the counter. The very next strobe asserts
ADDR SOURCE TRIG L, clearing the Load/
Clear flip-flop.

4.3.2.2 Address Counter Control Logic - The address
counter control logic (Figure 4-8) monitors the front panel
switches and manipulates the address counter in accordance
with the mode of operation selected:

Step Mode - If the step mode is selected and
the FWD/REV switch is set to FWD, the ADDR
CNTR SEL H line asserts (Paragraph 4.3.2.4 b),
FWD L asserts, and REV L clears (goes HIGH).
When the strobe oscillator outputs STROBE L,
the count trigger one-shot triggers asserting
COUNT UP L which increments the counter by
1 and ADDR SOURCE TRIG L asserts
(Paragraph 4.3.2.4 b) and clears the Load/Clear
flip-flop. This has no effect on the fast clock
driver because RANDOM L is cleared holding
the driver ON thereby disabling the fast clock.
Therefore, in the step mode, successive strobes
gate the count of the address counter to the
disk drive and increment the counter until a
count of 202 is detected. At a count of 202,
the Load/Clear flip-flop is set, asserting CLEAR
H which clears the counter to a count of 0. The
very next strobe then asserts ADDR SOURCE
TRIG L, clearing the Load/Clear flip-flop and
incrementing the counter to a count of 1 and so
on.
Alternate Mode -If the alternate mode is
selected and the FWDIREV switch is set to the
REV position, the ADDR CNTR SEL H line
clears on the first strobe thereby preventing the
counter from being decremented. The first
strobe also asserts ADDR SOURCE TRIG L
which clears the Load/Clear flip-flop but does
not affect the fast clock. On the second strobe,
ADDR CNTR SEL H asserts causing COUNT
DOWN L to assert decrementing the counter by
1. On the third strobe, ADDR CNTR SEL H
clears hence the counter is only decremented

Oscillate Mode - If the oscillate mode is
selected, OSC L is asserted clearing the counter
to a count of 0 and holding it there.

Random Mode -If the random mode is
selected and the FWD/REV switch is set to
FWD, the ADDR CNTR SEL H line asserts
immediately and RANDOM L asserts, turning
the fast clock driver off enabling the fast clock.
The fast clock then outputs clock pulses which
increment the counter and reset the Load/Clear
flip-flop. When the first strobe occurs, ADDR
SOURCE TRIG L asserts turning the fast clock
driver on thereby inhibiting the fast clock
pulses. The count trigger one-shot also triggers
on the first strobe, incrementing the counter by
1. When ADDR SOURCE TRIG L clears, the
fast clock starts incrementing the counter again.
When the counter reaches a count of 202, the
202 DETECT L line asserts and the counter is
cleared to a count of 0. Thus, in the random
mode, the fast clock increments the counter
until a strobe occurs; the strobe gates the count
to the disk drive and increments the counter by
1. The fast clock then starts again and increments the counter until another strobe occurs.
As a result, successive cylinder address outputs
to the disk drive appear to be randomly
selected.
Note that the assertion of RTZ L clears and
holds the counter to a count of 0 and asserts
BUS RESTORE L.

FWDIREV
NC

(FROM
REV L

ADDR CTR SEL H

.- --

FIGURE 4 - 1 0 )

FWD L
NO

+3V

STEP

STROBE L
(FROM F l G U R E 4 - 7 )

CONT
TRIG
ONESHOT
2us

COUNT
DOWN L

r^>-

+3V

I
I R

I TO RUN SWITCH
~ I (SEE FIGURE 4 - 7 1
--- .
I KILL
B

CLEAR H

- BUS
RESTORE L
( T O RK05)
--

FAST CLOCK

+3V

^"^

.-L

ADDR SOURCE TRIG L
(FROM FIGURE 4-10)

TO
FIGURE
4- 9

LOAD L

RAND
NC
T

COUNT
UP L

202
DETECT L
(FROM F I G U R E 4 - 9 )

Figure 4-8 Address Counter Control Logic

T h i s diode is mounted across
the function switch terminals

4.3.2.3 Address Counter - The address counter (Figure
4-9) can count up from 0 to 202 and count down from 202
to minus 1. When the CLEAR H input asserts, the counter
clears to a count of 0. When the LOAD L input asserts, the
counter sets to a count of 202. When the counter reaches a
count of 202 or minus 1, the respective count detect line
asserts.

triggers asserting ADDR SOURCE TRIG L
which sets the Address Source flip-flop, thereby
asserting SWITCH ADDR SEL H. The assertion
of SWITCH ADDR SEL H selects the front
panel Cylinder Address switch inputs. When the
second strobe occurs, the 4 ps one-shot triggers
again but this time the Address Source flip-flop
resets because the D-input to the flip-flop is
low. Thus, the ADDR CNTR SEL H line asserts
and selects the address counter inputs.

4.3.2.4 Cylinder Address Source Select Logic - The
cylinder address source logic (Figure 4-10) monitors the
front panel Function switch and selects the cylinder address
source in accordance with the mode of operation selected:
a.

Step and Random Mode - In these modes, the
STEP L input to the Cylinder Address source
select logic is a constant LOW, holding the
Address Source flip-flop in the reset state.
Thus, the ADDR CNTR SEL H line is always
asserted selecting the address counter inputs.
Note however, that ADDR SOURCE TRIG L
still asserts each time STROBE L asserts in
these modes.

Alternate and Oscillate Modes - In these
modes, the strobe input to the address source
select logic alternately selects the cylinder
address switch inputs and the address counter
inputs. If the Address Source flip-flop is reset
when the first strobe occurs, the 4 ys one-shot

COUNT UP L
I

- - . .. . . - FIGURE 4 - 8

0 LD

CLEAR H

_I_
-

BIT 0 ( L S B )

CLR

A
COUNTER

- +3V

BIT2

-C

-D
BOR

T0
ADDRESS SOURCE
SELECT LOGIC
FIGURE 4 - 1 0

BIT 3

CAR
L

A-4

! o u ~ ~ ~ ~

'IT
BIT6

( T O FIGURE 4-01

ADDRESS
To
SOURCE
S E L E C T LOGIC
FIGURE 4 - 1 0

BIT 7

* 3 most significant bits

NEG 1 DETECT L
(TO FIGURE 4 - 8)

true for negative 1 only

Figure 4-9 Address Counter Logic

ADDR SOURCE TRIG L
ADDR CNTR S E L H

ADDRESS SELECT LOGIC

Â-±]*

CYL ADDR SW 1
SOURCE

STROBE L
FROM
( Figure 4-71

TRIG
ONESHOT

ADDR CTR BIT 0

4us

...----

r?/0 FRONT PANEL

J N c T l o N d * z i

C Y L ADDR SW 2

ADDR CTR BIT 1

1 + * This switch.
is
across
---.-RAND

diode

mounted

the

function

' 2 0 ~ 8
SELECT CIRCUITS

Figure 4-10 Cylinder Address Source Select Logic
-

4.3.2.5 Fault Detect Logic - The fault detect logic
monitors the disk drive fault inputs (Figure 4-1 1). When
BUS ADDRESS INVALID L asserts, the flip-flop sets
turning the driver on. When the driver turns on, a ground is
applied to the ADDRESS INV indicator causing it to
illuminate. The indicator remains illuminated until the RTZ
switch is set to the up position resetting the flip-flop. When
BUS SEEK INCOMPLETE L asserts, a ground is applied to
the SEEK INC indicator.

4.4 FLOW DIAGRAM DESCRIPTION
The following flow diagrams provide a step by step
explanation of the exerciser operating sequences. Figure
4-12 covers the writer exerciser module operation, and
Figures 4-13 through 4-16 cover the positioner exerciser
module operation in each of the four modes.

BUS ADDRESS
INVALID L

P' O
/

---- 1
FRONT
PANEL

ADDRESS

BUS SEEK
INCOMPLETE L

Figure 4-1 1 Fault Detect Logic

ASSERT WRITE
DATA AND CLOCK
PULSES

ENABLE WRITE
GATE AND HOLD

ENABLE WRITE
GATE

DISABLE WRITE
GATE
A

ENABLE CLOCK
AND DATA OUTPUT MULTIPLEX.
ER

1 YES
NOTE:
ALL APPLICABLE LOGIC
CONTAINED ON MODULE
G502

ASSERT
WRITE GATE
L ONTO

Figure 4-12 Writer Exerciser Flow Diagram

HOLD WRITE
DATA AND
AT +3 VDC

c-^
START

(FROM FIGURE 4-16)

rap'
YES

SELECTED

0-0
SELECTED

(SEE FIGURE 4.141

YES

lNe
READY
TRUE L

STROBE DISK
DRIVE

NOTE:
All applicable logic
contained on module G503.

0
GATE CONTENTS
OF ADDRESS
COUNTERONTO
BUS CYLINDER
ADDRESS LINES

CP-0821

Figure 4-13 Positioner Exerciser Step Mode Flow Diagram

FROM FIGURE 4-13

?
(SEE FIGURE 4-151

RIWIS
READY

STROBE DISK
DRIVE
-t

GATE CONTENTS
OF CYLINDER

SOURCE FLIP.

SWITCHES ONTO
BUS CYLINDER
ADDRESS LINES
AND RESET ADDRESS SOURCE
FLIP-FLOP

GATE CONTENTS
OF ADDRESS
COUNTERONTO
BUS CYLINDER
ADDRESS LINES
AND SET AD.
DRESS SOURCE

DRESS COUNTER

SWITCH

DRESS COUNTER

COUNTER
EQUALS

a
LOAD 202 INTO
ADDRESS
COUNTER

NOTE:
A L L APPLICABLE
LOGIC CONTAINED
ON MODULE G503

CP-0822

Figure 4-14 Positioner Exerciser Alternate Mode Flow Diagram

FROM
FIGURE 4.14

0-0
OSCILLATE
SELECTED

SEE FIGURE 4.161

CLEAR ADDRESS
COUNTER AND

y
READY

0
STROBE DISK
DRIVE

NOTE:
All applicable logic
contained on module G503.

a
CONTENTS OF
ADDRESS COUN.
TER GATED ONTO BUS LINES
AND ADDRESS
SOURCE FLIP.
FLOP IS SET.

CONTENTS OF
CYLINDER ADDRESS SWITCHES
GATEDONTOBUS
LINES A N D AD.
DRESS SOURCE
FLIP-FLOP IS
RESET.

CP-0823

Figure 4-15 Positioner Exerciser Oscillate Mode Flow Diagram

FROM FIGURE 4-15

CLOCK A N D
STROBE DISK

(SEE FIGURE 4-13]

0
GATE CONTENTS
OF ADDRESS
COUNTER ONTO
BUS CYLINDER
ADDRESS LINES

ENABLE FAST

DRESS COUNTER

COUNTER BY 1

COUNTER
EQUALS

NEGATIVE

YES

COUNTER

SWITCH

~ I*

[ YES

DRESS COUNTER

EQUALS
NEGATIVE

[ YES

CLEAR ADDRESS

NOTE:
A L L APPLICABLE LOGIC CONTAINED
ON MODULE G503

Figure 4-16 Positioner Exerciser Random Mode Flow Diagram

CHAPTER 5
MAINTENANCE

5.1 SCOPE
This chapter lists test equipment required and provides a
complete description of exerciser maintenance procedures,
including a preventive schedule and a corrective maintenance troubleshooting flow diagram.
5.2 MAINTENANCE PHILOSOPHY
Basically, exerciser maintenance consists of preventive and
corrective maintenance procedures, and a maintenance log.
The preventive maintenance procedures are performed
regularly in an attempt to detect any damage caused by
improper handling of the unit. The corrective maintenance
troubleshooting flow diagram is provided to aid service
personnel in isolating and repairing faults in exerciser

circuitry. The maintenance log (included in the back of this
manual) is used to record all maintenance action and aid in
detecting any component failure pattern that may develop.

5.3 TEST EQUIPMENT REQUIRED
Exerciser maintenance procedures require the test equipment, tools, and materials listed in Table 5-1, in addition to
standard hand tools, cleaners, test cables, and probes.
5.4 PREVENTIVE MAINTENANCE
Preventive maintenance consists of tasks performed at
periodic intervals to ensure proper equipment operation
and minimum unscheduled maintenance. These tasks
include visual inspection and operational checks. Table 5-2
provides a recommended preventive maintenance schedule.

Table 5-1
Test Equipment Required
Equipment

Manufacturer

Designation

Oscilloscope
X l 0 Probe (2)
Multime ter
Module Extender

Tektronix
Tektronix
Triple tt/Simpson
DIGITAL

Type 453 or equivalent
P6008
Model 310/Model260
W984 (Dual Height)

Table 5-2
Preventive Maintenance Schedule
Test or Procedure

Performance Interval
Monthly

Visually inspect for physical damage, correct if required.

Monthly

Clean externally.

Monthly

Check that all modules are properly seated in the connector block.

Quarterly (Every 3 months)

Check that all indicators work properly.

Quarterly

Clean internally with vacuum cleaner or a soft brush.

Quarterly

Touch up external paint scratches or scrapes. Check for looseness of the
knobs, switches, and indicators.

5.5 CORRECTIVE MAINTENANCE
The following information will aid the service technician in
isolating failing exerciser components. The information is
presented in flow diagram form such that correctly

functioning exerciser circuitry is systematically eliminated.
Using the flow diagram (Figure 5-1) and logical deductive
reasoning, faulty components can be located.

c^)
START

L
OBTAIN A DISK
DRIVE U N I T
KNOWN TO BE OPERATING PROPER
L Y AND PERFORM
THE EXERCISER
SET-UP PROCEDURE PER PARAGRAPH 2.2

EXERCISER
INDICATORS
FAULTY

REFERTOFAULT
DETECT LOGIC
(FIGURE 4-11 A N D
ENGINEERING
DRAWING
D-CS-G503-0-1)
AND ISOLATE THE
FAULT

UNPLUG DISK
DRIVE POWER
CORD ANDDISCONNECT POWER
CABLE CONNECTOR P I A T THE
EXERCISER
FRONT PANEL

n
PERFORM WRITER
EXERCISER
MODULE TEST
PROCEDURE PER
PARAGRAPH 2.3.1

n
PERFORM POSITIONER MODULE
TEST PROCEDURE
(PARAGRAPH
2.3.2).

A
OSITIONER

PLUG I N DISK
DRIVE AC POWER
CORD AND CHECK
FOR +5 V, + I 5 V,
-15 V AND GND

REFER TO
WRITER EXERCISER MODULE
FLOW DIAGRAM
(FIGURE 4-12)
AND ISOLATE THE
THE F A U L T

FAULT OCCURS
I N RANDOM
EXERCISER
NOT A T
FAULT
DISK DRIVE
POWER SUPPLY
OR EXERCISER
POWER CABLE
FAULTY
J

REFER TO POSITIONER EXERCISER STEP MODE
FLOW DIAGRAM
(FIGURE 4-13]

MODE FLOW DIA-

4-15>AND ISOLATE
LATE THE F A U L T

UNPLUG DISK
DRIVE AC POWER
CORD, RECONNECT POWER
CABLE CONNECTOR P1 AND PLUG
I N DISK DRIVE AC
POWER CORD

IÃ‘Ã‘Ã‘

Figure 5-1 Troubleshooting Flow Diagram

CHAPTER 6
RK05 DISK DRIVE MAINTENANCE
USING T H E RK05 EXERCISER
6.1 SCOPE
This chapter contains RK05 Disk Drive alignment, checkout, and adjustment procedures which incorporate the use
of the RK05 Exerciser as a maintenance aid. For additional
maintenance information, refer to the RK05 Disk Drive
Maintenance Manual, DEC-00-RK05-DB.
6.2 ALIGNMENT, CHECKS, AND ADJUSTMENTS
6.2.1 Alignment Cartridges
6.2.1.1 RK05K-AC Alignment Cartridge -This DEC
alignment cartridge represents the preferred method for
RK05 alignment procedures. It provides three tracks
(principal track 105, plus spare tracks 85 and 125) of
constant frequency data with alternate sectors recorded at
displacements of t0.0025 and -0.0025 inches, respectively,
from the ideal track locations.

is displayed, the head may appear to be aligned at some
sector locations and misaligned at others. This condition
indicates the degree of wobble of the spindle. Figure 6-la
shows a spindle with negligible runout; Figure 6 - l b shows a
spindle with considerable runout. The amount of wobble
can be determined by the amplitude differences occurring
in any adjacent pair of sector boundaries using the same
equations used for head alignment.
NOTE
If the condition shown-in Figure 6-lb exists,
ensure that the mating of spindle and disk is
clean. Improper mating can cause such runout.

When a head is aligned to specifications, the readback signal
shows equal amplitudes for all sectors (shown when the
oscilloscope displays only two sectors and triggered by the
SECTOR signal). The degree of amplitude inequality in
alternating sectors indicates the departure from exact
alignment.
?.

Sector timing data is included on all three tracks to indicate
head gap location relative to sector pulse detection. This
data is represented by a single pulse (70 ps nominal)
following the INDEX pulse and 10 ps prior to the onset of
head alignment data.
The RK05K-AC alignment cartridge also indicates the
degree of runout on the spindle. When the oscilloscope is
triggered on INDEX and a complete revolution of the disk

Figure 6-la Spindle Runout
(Negligible Runout)

6.2.1.2 23 15 CE Test Cartridge Shim Installation - (To be
used only when an RK05K-AC alignment cartridge is not
available.) Before a 2315 CE test cartridge can be used for
any RK05 alignment procedure, a .005-inch shim must be
installed in the disk hub. Because the 2315 cartridge is
recorded at low density and the RK05 uses a high-density
cartridge, this shim is required to accentuate the wobble of
the low-density cartridge and allow it to be used for
high-density alignments. To install the shim properly, trim a
piece of .005-inch shim stock as indicated in Figure 6-2 and
attach it to the disk hub as follows:

Locate sector 00 by holding the cartridge
upside down and observing the sector slots in
the metal lip of the disk hub (Figure 6-2).
Rotate the disk clockwise inside the plastic case
until two slots close together are located (sector
11 and index slots). Continue to rotate the disk
clockwise, stopping at the next slot (sector 00).

Position the shim 180 degrees from the sector
00 slot. Ensure that the narrow portion of the
shim is in the spindle cavity and that the shim
does not reach the bottom of the cavity.

Tape the shim in position.

Figure 6-1b Spindle Runout
(Considerable Runout)

Specifications for the RK05K-AC alignment cartridge are as
follows:
Alignment and Sector Timing Tracks:
Primary Track - 105
Backup Tracks - 85, 125 (Use only if track
105 is unusable)

6.2.2 Servo System Timing Checks and Adjustments
The servo system timing adjustments are precisely set at the
factory and should not be routinely adjusted or fine-tuned
as part of any PM procedure. If a positioner malfunction is
suspected, all waveforms related to each phase of servo
operation should be examined; based on these, the possible
trouble should be diagnosed before any servo adjustments
are attempted. Because some of the servo check tolerances
differ from the adjustment tolerances, reference should be
made to the check tolerances in Table 6-1 before adjustments are attempted.

Recorded Frequency: Nominal 720 kHz
Number of Sectors: 12
Alignment Accuracy, track 105: Â±20 microinches
Sector Timing: Single pulse 70 Â 1 ys following
INDEX pulse

Table 6-1
Servo System Checks
Checks

Drive Configuration

Test Point

Tolerance

Reference

Full Stroke Profile

202 cyl osc seek

A05H1

< 90 ms waveform dura-

Figure 6-7

Full Stroke Position

202 cyl osc seek

A05M1

equal beginning & end
amplitudes within 5%.
< 1 V overshoot

Figure 6-8

Outer Limit

rep RTZ

A05 J 1

3 to 3.5 V amplitude.
< 0.3 V plateau

Figure 6-9

tion with plateau at
trailing edge

6-2

Table 6-1 (Cont)
Servo System Checks
Checks

Drive Configuration

Test Point

Tolerance

Reference

Sine Amplitude/Offset

4 cyl osc seek

10 + 1 V p-p, ground
symmetrical within
Â±lo

Figure 6-3

Velocity Offset

4 cyl osc seek

ground symmetrical
within + 10%

Figure 6-3

Cosine Amplitude

4 cyl osc seek

10 k 1 V p-p, ground
symmetrical within
Â±lo

Figure 6-4

Velocity Amplitude

2 cyl osc seek

center pulse duration = 3.2 + 0.5 ms

Figure 6-5

Acceleration

64 cyl osc seek

14 ms rise time

Figure 6-6

Figure 6-2 CE Test Cartridge Shim Installation
6-3

Table 6-2
Servo System Adjustments
Potentiometer*

Function

SA (Sine Amplitude)

Sets amplitude of SIN POSITION signal

SO (Sine Offset)

Adjusts SIN POSITION symmetry about ground

CA (Cosine Amplitude)

Sets amplitude of COS POSITION signal

CO (Cosine Offset)

Adjusts COS POSITION symmetry about ground

VO (Velocity Offset)

Adjusts velocity generator output at zero velocity. (Provides offset
control to position loop.)

LSA (Limit Signal Amplitude)
LSO (Limit Signal Offset)

Simultaneously adjusts amplitude of both Limit signals before digitizing
Sets zero level of Limit signal with positioner in normal recording area
of disk
Sets maximum positioner current (determines acceleration)

CURRENT (on H604)

*Potcntiomcters arc located o n the G938 card (card position 5) of the electronic module. Remove the prefilter at the rear of the
drive l o gain access t o these potentiometers.

NOTE
Settings within the tolerances listed in Table
6-2 should not be adjusted.
For most malfunction cases, the positioner system will
operate enough to allow dynamic measurements. However,
if the positioner either does not operate or operates very
erratically, the static checks and adjustments described in
Paragraph 6.2.2.2 should be performed. If servo system
parts are field-installed, settings must be readjusted,
according to Table 6-1.
6.2.2.1 Dynamic Off-Line Checks and Adjustments
1.

To prepare the RK05 Disk Drive for testing,
perform the RK05 Exerciser set-up procedure
(Paragraph 2.2).

Set the oscilloscope controls (Tektronix 453 or
equivalent) as follows:
vertical
mode
sensitivity
trigger
coupling

=
=
=

channel 1
2 V/div
channel 1
dc

sweep
A sweep
time
trigger

=
=

10 ms/div
normal

trigger
source
coupling
slope

=
=
=

external*
ac
+

*Connect t h e scope external trigger input
to disk drive B05J2 (FWD H)

To avoid excessive scope control changes and to
keep the probe test point changes to a
minimum, perform the following checks and
adjustments in the listed sequence.
SINE Amplitude ( S A ) and Offset (SO)
Set exerciser front panel RTZ and RUN
a.
toggle switches to the down position.

Set the exerciser Function knob to OSC.

Set exerciser Cylinder Address4 toggle
switch to 1 and all other Cylinder
Address switches to 0.

Set the RUN toggle switch to RUN;
observe the linear positioner oscillates
between cylinders 0 and 4.

The waveform amplitude must be
10 Â 1 V p-p and symmetrical about
ground.

Observe A05M1 (SIN POSITION) for a
scope display as illustrated in Figure 6-3a.

If necessary, adjust SA (Table 6-2) for the
correct amplitude and SO for the ground
symmetry.

PIN
SWEEP

VERT SENS

Correct Waveform (Symmetrical Signal)

Incorrect Waveform (Signal not Symmetrical about Ground)

Figure 6-3 Sine Amplitude/Offset and Velocity Offset Waveform

6-5

Velocity Offset ( VO)
a.
Observe that the voltage minimums at
A05M1 (SIN POSITION) are symmetrical
about ground (Figures 6-3a and 6-3b). A
small amount of ripple at the minimum
voltage levels is normal. To estimate the
degree of symmetry, use the average value
of the ripple as the voltage minimum.
b.

If necessary, adjust VO (Table 6-2) f o r
the required symmetry.

Cosine Amplitude (CA)and Offset (CO)
a.
Observe A05S1 (COS POSITION) for a
scope display as illustrated in Figure 6 4 .
The waveform amplitude must be
10 Â 1 V p-p and symmetrical about
ground.

If necessary, adjust CA (Table 6-2) for
the correct amplitude and CO for the
ground symmetry.

Velocity Amplitude ( V A )
a.
Set the exerciser front panel Cylinder
Address-4 toggle switch to 0 and the

Cylinder Address-2 toggle switch to 1 ;
observe the linear positioner oscillates
between cylinders 0 and 2.
Set the scope sweep time to 1 ms/div.
Observe A05M1 for a scope display as
illustrated in Figure 6-5. The duration of
the center cycle must equal 3.2 Â .05 ms.
If necessary, adjust VA (Table 6-2) for
the correct time.

Acceleration (Positioner Current)
Set the exerciser front panel Cylinder
Address-2 toggle switch to 0 and the
Cylinder Address-64 toggle switch to 1;
observe the linear positioner oscillates
between cylinders 0 and 64.
Set the scope sweep time to 5 ms/div and
the vertical sensitivity to 0.5 V/div.
Observe disk drive A05H1 (VELOCITY)
for a velocity profile as illustrated in
Figure 6-6.
If necessary, adjust R15 (on H604) for a
1 4 ms rise time.

PIN
SWEEP
V E R T SENS

Figure 6-4 Cosine Amplitude/Offset Waveform

A05M1

SWEEP

1 msldiv

VERT SENS

2Vldiv

05H1

Figure 6-5 Velocity Amplitude Waveform

Figure 6-6 Acceleration Waveform

SWEEP

msldiv

VERT SE

.5V/div

Acceleration (Positioner Current). Adjust
the appropriate potentiometer (Table
6-2) as required to obtain the correct
waveform.

Full Stroke Profile
a.
Set the exerciser front panel Cylinder
Address-128, 8, and 2 toggle switches to
1; observe the linear position oscillates
between cylinders 0 and 202.
b.

Set the scope sweep time to 10 ms/div
and the vertical sensitivity to 0.5 V/div.

Observe A05H1 (VELOCITY) for a scope
display as illustrated in Figure 6-7. The
0 V level of the profile must be reached
in less than 90 ms from the start of the
seek. In addition, there must be a definite
plateau (constant voltage level) at the end
of the seek. If this is not the case, recheck
the Velocity Amplitude (VA) and the

Full Stroke Position Waveform
a.
Set the scope vertical sensitivity to
2 V/div and observe A05M1 (SIN
POSITION) for a scope display as illustrated in Figure 6-8. The waveform
amplitudes at the start and end of the
seek must be equal within 5% and the
overshoot at the end of the seek must not
exceed 1 V. If overshoot is excessive,
recheck the Velocity Amplitude (VA)
and the Acceleration (Positioner Current).

'LATEAU

PIN
SWEEP
VERT SE

A05H1
10 msldiv
0.5VIdiv

Figure 6-7 Full Stroke Waveform
I

EQUAL

OVERSHOOT

PIN
SWEEP
VERT SENS

Figure 6-8 Full Stroke Position Waveform
6-8

A05M1
10 msldiv
2Vldiv

Outer Limit (dynamic test)
a.
Set exerciser front panel RTZ toggle
switch to RTZ.
b,

Trigger the scope from B05K2 (REV H).

Set the scope vertical sensitivity to
1 V/div and observe A05J1 (LIMIT) for a
scope display as illustrated in Figure 6-9.
The waveform peak amplitude must be 3
to 3.5 V with a minimum level of 0 V. In
addition, the voltage plateau immediately
following the trailing edge must not
exceed 0.3 V. If not, perform the Static
Limit Adjustment procedure (Paragraph
6.2.2.2).

Set the exerciser RTZ toggle switch to
the down position.

Check the INNER LIMIT signal by
physically moving the positioner to the
inner limit (towards the spindle). If the
INNER LIMIT signal is operative, a
restore operation will be initiated. If this
is not the case, perform the Static Limit
A d j u s t m e n t procedure (Paragraph
6.2.2.2).

6.2.2.2 Static Tests and Adjustments - Perform the
following procedure when the positioner or a major servo
system component has been replaced. This procedure
should also be followed as a diagnostic aid when the
positioner system is inoperative or unstable in operation.

To make the required adjustments, remove the disk
cartridge from the drive and physically move the positioner
carriage back and forth while observing the selected signal.
Use the automatic scope sweep and do not attempt to sync
the sweep to the observed signal. With a little practice, the
most convenient sweep speed setting and the type of
positioner motion required will quickly be discovered.
To make the static adjustments, proceed as follows:
Do not install a disk cartridge in the drive.
Place a finger on the positioner carriage
assembly and place switch S l (on H604) in the
down or off position. (This precaution prevents
any possible carriage motion caused by
transient switch noise.)
Make the following checks and adjustments.
Sine Amplitude (SA)and Offset (SO)
a.
Set the scope vertical sensitivity to
2 V/div and adjust the ground reference
to the center of the scope screen.

PLATEAU

< 0.3V

PIN
SWEEP
VERT S

Figure 6-9 Outer Limit Waveform

Observe A05M1 (SIN POSITION) while
manually moving the positioner back and
forth. Adjust SA (Table 6-2) for a 10 V
p-p signal amplitude.

Install a prerecorded cartridge in the drive.

Place the drive in the run mode and manually
position the heads at any recorded cylinder past
track zero. An all ZERO data recording is
preferable; however, any recorded pattern is
sufficient.

Set the oscilloscope controls as follows:

Adjust SO until the signal is symmetrical
about ground.

Cosine Amplitude (CA) and Offset (CO)
Observe A05S1 and adjust CA and CO (Table
6-2) in the same manner as that used in the Sine
Amplitude and Offset procedure above.

vertical
mode
sensitivity
trigger
coupling

Limit Signal Amplitude (LSA) and Offset
PO)
a.
Set the scope vertical sensitivity to
1 Vldiv and adjust the ground reference
to the center of the scope screen.
b.

sweep
A sweep
time
trigger

Observe A05J1 with the positioner
stationary at approximately the center of
travel. Adjust LSO (Table 6-2) for a
ground signal at the center of the scope
screen.

Move the positioner to the inner limit and
observe the voltage change on the scope.
Similarly, move the positioner to the
outer limit and observe the voltage
change.

trigger
source
coupling
slope

=
=
=
=

channel 1
1 V/div
channel 1
dc

I00 ns/div
normal

=
=

internal
ac
+

Connect the channel 1 scope probe to TP1 of
the GI80 card (card position 1). It should be
possible to obtain solid scope synchronization
at the sweep start. (Disregard the unsynchronized pulses that follow.)

Adjust LSA until the smaller voltage level
obtained in step cis 3.0 V.

Adjust R55 fully counterclockwise and R54
clockwise.

Return the positioner to the center of
travel and readjust LSO for 0 V.

Repeat step c above and, if necessary,
readjust the smaller voltage level to 3.0 V.

Adjust R54 counterclockwise to obtain a
500 ns pulse width as measured from the start
of the rise to the start of the fall.

Readjust R55 clockwise until the pulse width
decreases to 440 Â 10 ns as measured from the
start of the rise to the start of the fall.

6.2.3 ReadIWrite Data Separator ((3180 Card) Adjustment
Adjustment of the data separator is not part of the normal
maintenance and therefore is not recommended unless a
GI80 component that affects the data separator section has
been replaced. If this occurs, set the width of the data
window as follows:

NOTE
R13 is the write current adjustment potentiometer and should not be adjusted in the field.

6.2.4 Readwrite Head Check and Alignment
The following procedure describes the complete readlwrite
head alignment. Before attempting this alignment procedure, ensure that the drive operates correctly and that the
heads have not been contaminated by exposure to a
defective cartridge. If new heads have been installed, it is
recommended that this alignment procedure be performed
off-line using the RK05 Exerciser.

6.2.4.1 RK05K-AC Alignment Cartridge - The appropriate on-line diagnostics may be used; however, DO NOT
ADJUST A HEAD THAT HAS LESS THAN A 15%
ERROR (Figure 6-10).

Set the exerciser Function knob to OSC.

Set the exerciser Cylinder Address-64,32,
8 and 1 toggle switches t o 1 and all other
Cylinder Address toggle switches to 0
(cylinder address 105).

Quickly set the exerciser RUN toggle
switch t o RUN and back to the down
position, observe the linear position
moves to cylinder 105.

To align or check the heads proceed as follows:
1. Perform the RK05 Exerciser set-up procedure
(Paragraph 2.2).
2.

Install an alignment cartridge on the spindle
and operate the drive in the run mode for at
least 30 minutes. This must be done to allow
the alignment cartridge and the drive
components to achieve thermal stabilization.

Using the WR PROT switch, place the drive in
the write protect condition.

Set the oscilloscope controls as follows:
vertical
mode
sensitivity
coupling

=
=

NOTE
If a bright horizontal line does not appear
at the beginning of the displayed
waveform as shown in Figures 6-lob
through 6-log, adjust the scope level
control until the line appears. The bright
line indicates proper positioning of the
sectors on the display [odd sectors (Xl)
on left, even sectors (X2) on the right].

ADD (invert CHAN 2)
20 mV/div
dc
9.

sweep
A sweep
time
trigger

=
=

500 ps/div
normal

trigger
source
coupling

=
=

external*
ac

Monitor the scope display for one of the
waveforms illustrated in Figure 6-10.

If none of the illustrated waveforms appear, the
head is misaligned so badly that manual
manipulation of the positioner is required. If
manual manipulation is required, perform the
following steps; if not, proceed to step 10.
a.

Place switch S l (on H604) in the down or
off position, keeping a finger on the
carriage to dampen any positioner
transients.

Slowly move the positioner by hand until
the alignment pattern occurs. Cylinders
85 and 125 have identical patterns, so be
sure that the displayed pattern is for
cylinder 105.

Observe the track scale and note the
cylinder indication when the "right on"
waveform (Figure 6-9) is obtained. If the
scale indicates less than 105, the head is
too far forward in the carriage. Conversely, if the scale indicates more than
105, the head is back too far in the
carriage.

*Use a 1:1 probe to connect the scope external
trigger input to A02S2 (sector).

Connect the channel 1 probe to TP3 and the
channel 2 probe to TP4 of the GI80 card. (Use
10: 1 probes.)

Ensure that the positioner track scale indicates
cylinder 00. If it does not, loosen and readjust
the scale to ensure proper scale readout over
the entire length of the head.

Select cylinder 105 as follows:
a.

Set the exerciser front panel Head Select
toggle switch to LOWER.

Head correctly aligned.

ilitudes are equal.

BRIGHT L I N E
SHOULD APPEAR
HERE

Heads slightly misaligned. Larger left amplitude
indicates head inside of CYL 105 (toward 106).
error = +15%

BRIGHT L I N E
SHOULD APPEAR
HERE

Large misalignment. Head inside of CYL 105.
Furth er misalignment reduces amplitude of
signal on left side of screen.

BRIGHT LINE
SHOULD APPEAR
HERE

NOTE
The alignment error is denoted as a signed percentage. The percentage is derived from
the relative amplitudes of the two signal modes (xi and x2) according to the following
expression:

% error = x i x 2 X 100
X l + x2
(Approximate error in MICRO inches equals % error X 35)
The sign denotes the direction of the alignment error. A negative sign indicates the
head is too far from center (track less than 105).

Head considerably misaligned. Larger left
ampli tude indicates head inside of CYL 105.
error = +72%
BRIGHT LINE
SHOULD APPEAR
HERE

Figure 6-10 RK05-AC Alignment Cartridge Head
Alignment Waveforms

Large misalignment. Head at too great a track
radius. Further misalignment reduces amplitude
of signal on right side of screen.

Head correctly aligned. Amplitudes are equal.

BRIGHT LINE
SHOULD APPEAR
HERE

Head considerably misaligned. Smaller left
amplitude indicates head outsiide of CYL 105.
error = - 72%

Heads slightly misaligne
indicates head inside of
error = +15%

BRIGHT
LINE SHOULD
APPEAR HERE

Head slightly misaligned. Smaller left amplitude
indicates head outside of CYL 105.
error = - 15%

BRIGHT LINE
SHOULD APPEAR
HERE

rger left amplitude
105 (toward 106).

BRIGHT LINE
SHOULD APPEAR
HERE

Head considerably misaligned. Larger left
amplitude indicates head inside of CYL 105.
error = +72%

BRIGHT LINE
SHOULD APPEAR
HERE

LOWER HEAD ADJUSTMENT SCREW

/
TRACK SCALE

LOWER HEAD CLAMP SCREW

1
UPPER HEAD ADJUSTMENT SCREW

UPPER HEAD CLAMP SCREW

Figure 6-1 1 ReadIWrite Head Adjustments
b.

Set the exerciser Function knob t o OSC.

Set the exerciser Cylinder Address-64,32,
8 and 1 toggle switches to 1 and all other
Cylinder Address toggle switches to 0
(cylinder address 105).

Place switch S l (on H604) in the down or
off position, keeping a finger on the
carriage to dampen any positioner transients.

Quickly set the exerciser RUN toggle
switch t o RUN and back t o the down
position; observe the linear positioner
moves to cylinder 105.

Slowly move the positioner by hand until
the alignment pattern occurs. Cylinder
110 has an identical pattern, so be sure
that the displayed pattern is for cylinder
105. Do not use undue force on the
positioner when manually changing track
positions.

Monitor the scope display for one of the
waveforms illustrated in Figure 6-12. If none of
the illustrated waveforms appear, the head is
misaligned so badly that manual manipulation
of the positioner is required. If manual
manipulation is required, perform the following
steps; if not, proceed to step 9.

Observe the track scale and note the
cylinder indication when the waveform
shown in Figure 6-12d is obtained. If the
scale indicates less than 105, the head is
too far forward in the carriage.
Conversely, if the scale shows more than
105, the head is too far back in the
carriage.

Loosen the clamp and adjustment screws
(Figure 6-11) and move the head in the
appropriate direction until the waveform
shown in Figure 6-12d is obtained and
the scale indication is slightly greater than
105.
Lightly tighten the clamp screw and turn
on the positioner power (Sl up).

Set the exerciser RTZ toggle switch RTZ
m o m e n t a r i l y ; observe the linear
positioner moves to cylinder 0.

Quickly set the exerciser RUN toggle
switch to RUN and then back to the
down position; observe the linear positioner moves to cylinder 105 and stops.

6.2.5 Index/Sector Timing Adjustment
6.2.5.1 RK05KAC Alignment Cartridge - The procedure
for adjusting indexlsector timing using the RK05K-AC
alignment cartridge is as follows:
Perform the RK05 Exerciser set-up procedure
(Paragraph 2.2).
Install an alignment cartridge on the spindle,
ensuring that the mating surfaces are clean and
operate the drive in the run mode for at least
30 minutes. This must be done to allow the
alignment cartridge and the drive components
to achieve thermal stabilization.
Using the WR PROT switch, place the drive in
the write protect condition.
Set the oscilloscope controls as follows:

If one of the illustrated waveforms is present,
note in which direction the head must be
moved to obtain the proper indication. If it
must be moved backward, loosen the head
clamp and adjustment screws and gently push
the head all the way back into the carriage; if it
must be moved forward, loosen only the clamp
screw, and then turn the adjustment screw until
the correct waveform is obtained. (The
adjustment screw is a vernier that only moves
the head forward; it should not be left torqued
down after this adjustment.)
NOTE
If the positioner is moved from cylinder
105 during the adjustment procedure,
perform steps 8f and 8g.
Set the exerciser Head Select toggle switch to
UPPER.
Using a torque wrench (9605893-0-O), if available, tighten the head clamp screw until the
wrench begins to ratchet (55 ozlin.). If a torque
wrench is not available, use the appropriate
Allen wrench to tighten the head clamp screw
snugly; however, do not overtighten.
Recheck to ensure that the clamping action did
not disturb the head adjustment.

vertical
mode
sensitivity
coupling

ADD (invert CHAN 2)
0.2 V/div
dc

sweep
A sweep
time
trigger

5 msldiv
normal

trigger
source
coupling
slope

external*
ac
-

*Use a 1:1 probe to connect the scope external
trigger input to A02R2 (INDEX).

Connect the channel 1 probe t o TP3 and the
channel 2 probe to TP4 of the G180 card. (Use
10: 1 probes.)
Momentarily set the exerciser front panel RTZ
toggle switch to RTZ.
Select cylinder 105 as follows:
a.

Set the exerciser Cylinder Address-64,32,
8 and 1 toggle switches to 1 and all other
Cylinder Address toggle switches to 0
(cylinder 105).

Large misalignment. Head close to CYL 104.
(Further misalignment only reduces amplitude of
peaks.)

Head correctly aligned at CYL 105. Null
amplitudes are equal.

Head considerably misaligned. Smaller left null
indicates head position less than CYL 105.

Head slightly misaligned. Larger left null
indicates head position more than CYL 105

error = - 60%

Head slightly misaligned. Smaller left null
indicates head position less than CYL 105.
error = -33%

error = +26%

Head considerably misaligned. Larger left
null indicates head position more than
CYL 105.
error = +71%

TP3&TP4

SWEEP

10psfdiv

VERTSENS =

2Vldiv

Figure 6-13 Index/Sector Waveform

6.2.6 Cartridge Receiver Alignment
Prior to shipment of the RK05 Disk Drive, the cartridge
receiver is precisely aligned at the factory. Since it is not
necessary to disturb the receiver alignment when performing any of the field maintenance procedures, cartridge
receiver alignment is therefore not normally required in the
field. However, if the duckbill, airduct, or cartridge support
post are replaced, the cartridge receiver alignment must be
checked. In addition, the Cartridge-On switch should also
be checked for proper operation.

If the (A) clearance is incorrect, loosen the
pivot post lock nuts and adjust the height of
both posts to obtain the proper clearance. Hold
the pivot post at (x) with an adjustable wrench
while loosening and tightening the lock nuts
(Y).

Lightly tighten the pivot post lock nuts and
check the following (Figure 6-15):

Remove the cartridge and ensure that the
clearances (B) between the upper receiver
rails and the cartridge channel are equal,
and that the receiver rails are as parallel as
possible to the channel.

NOTE
The duckbill on later model drives is slightly
different than the earlier models. If an earlier
version duckbill is replaced with the later
version, the airduct and cartridge support posts
must also be replaced. Refer to the RK05
Illustrated Parts Manual (DEC-RK05-IPB-1)to
identify which duckbill version is being
replaced.
1.

Slide the drive out of the rack and remove the
top and bottom covers.

Insert a cartridge into the receiver and close the
drive front door.

Check for a .020 to .040 in. clearance (A)
between the plastic cartridge case and the
receiver rails (Figure 6-14). Make this rneasurement towards the rear of the receiver at a point
where the plastic cartridge case passes over the
intersecting receiver rails.

Push the receiver all the way to one side
and ensure that there is a slight clearance
(C) of .010 to ,040 in. between the pivot
post and the receiver hinge rail. When
making this check, do not push the
receiver so hard that the pivot posts twist.
Push the receiver to the left and right and
ensure that the front receiver rail does
not touch either side of the chassis.
6

Tighten the pivot post lock nuts and recheck all
clearances. There must be a clearance at points
A, B, and C; however, it is especially critical
that clearances A and C do not exceed the
limits indicated in Figures 6-14 and 6-15.

-POSITIONER
CARTRIDGE CASE

1 j"T

\CARTRIDGE
RECEIVER

A=.020MlN.
, 0 4 0 MAX

LOCK NUTS

-BASEPLATE

Figure 6-14 Cartridge to Receiver Clearance

Figure 6-15 Cartridge Receiver Clearances

Check for the following points of contact
between the cartridge and the cartridge
receiver, which indicate that the cartridge is
properly seated:
a.

Two thin rails (These should either touch
evenly or be parallel along the full length
of the cartridge.)

Two cartridge posts

Access door opener bail

Spring at top center of cartridge

Duckbill (lower slot)

Airduct bridge

g.
8.

Airduct foam seal.

Check for the following points of clearance
between the cartridge and the cartridge
receiver, which indicate that the cartridge is
properly seated:
a.

Two fat rails on top of the cartridge

Four crosspoints on the underside of the
cartridge

The pivot posts and receiver hinge bail.

The position of the pivot posts determines how
the top rails ride on the cartridge and also
determines the bottom clearance of the four
crosspoints and the underside of the carriage.

APPENDIX A
1C S C H E M A T I C S

The RK05 Exerciser employs several types of integrated
circuit (IC) chips in its design. This appendix provides
detailed schematics, packaging diagrams and truth tables on
several of the more complex ICs as a maintenance aid to the
service technician.
The following ICs are covered in this appendix:
4-LINE-TO-10 LINE DECODERS
DUAL D-TYPE EDGE TRIGGERED
FLIP-FLOPS
741 23 MONOSTABLE MULTIVIBRATOR
74 193 SYNCHRONOUS 4-BIT UP/DOWN
COUNTER (DUAL CLOCK WITH CLEAR)

7442
7474

Ã‘oOUTPU

A.1 7442 4-LINE-TO-10-LINEDECODERS
TRUTHTABLE
BCD Input
C
0
0
0
0
1
1
1
1
0
0
0

B
0
0
1
1
0
0
1
1
0
0
1

Octal Output
A
0
1
0
1
0
1
0
1
0
1
0

INPUT A
4 OUTPUT 1

INPUT 0

INPUTS

OUTPUTS

Ã‘0OUTPU 3

3
OUTPUTS

Vcc: PIN ' 6

GND-PIN 3

Figure A-1 7442 Package and Logic Diagrams

6 G N 0

A.2 7474 DUAL D-TYPE EDGE-TRIGGERED
FLIP-FLOPS

P O S I T I V E LOGIC. LOW INPUT TO PRESET SETS Q TO LOGICAL 1
LOW INPUT TO CLEAR SETS Q TO LOGICAL 0
PRESET AND CLEAR ARE INDEPENDENT OF CLOCK
11-0766

Truth Table (Each Flip-Flop)

Input

Output

Notes:

1. tn = bit time before clock pulse.
2. t + , = bit time after clock pulse.

A.3 741 23 MONOSTABLE MULTIVIBRATOR
Vcc

1 Rext/
cext

1
cext

CLEAR

mn'H'H-h8$
A

1
CLEAR

1C!

2 Re,/

Cext

GND

F U N C T I O N A L LOGIC / P I N LOCATOR

ET]
TRUTH T A B L E

NOTE

t
H

n u
n u

H z high level (steady state), L = low level (steady state),
t : transition f r o m low to h i g h l e v e l , 4: t r a n s i t i o n from
high to l o w level. JL
= one high-level p u l s e , "L-T = one
low- level Pulse, X: irrelevant (any input, including transitions)

Figure A-2 DEC 74123 1C Illustrations
OUTPUT PULSE WIDTH
vs
EXTERNAL TIMING CAPACITANCE

Cent-External Timing Copocitonce-pF

Figure A-3 DEC 74123 1C Output Pulse Width vs. External Timing Capacitance

A.4 74193 SYNCHRONOUS 4-BIT UP/DOWN COUNTER
(DUAL CLOCK WITH CLEAR)

J OR N DUAL-IN-LINE PACKAGE (TOP VIEW)
INPUTS

vcc

INPUTS

OUTPUTS

'DATA
A

CLEAR A
,-r
LOAD
BORROW CARRY

DATA
C

DATA
D

I
BORROW

LOAD

LOGIC: LOW INPUT TO L O A D SETS Q A z A , Q ~ B , Q ~ C , A N D
QD=D

11-0640

BORROW
OUTPUT

CARRY
OUTPUT

DATA
INPUT A

DOwN
COUNT

-b-

PRESET

OUTPUT QA

COUNT

CLEAR

DATA
INPUT B

PRESET

OUTPUT QB

CLEAR

DATA
INPUT C

INPUT
DATA
D

^>-

CLEAR 0

LOAD

Figure A-4 74193 Logic Diagram

APPENDIX B
E N G I N E E R I N G DRAWING S E T

THIS O W I N G MB SPECIFICATIONS, HEREIfl. ARE THE PROPERTY OF DIGITAL EQUIPMENT CORPOMTIOR AND SHALL
MOT BE REPRODUCED OR COPIED OR USE0 IN W E OR I N PART
MRllEll PEWISSEW. 0 3 P V R I ~@
VElS

DRAWING DIRECTORY
9-

SEOUENm

/973.T222gzw&EF

CUSTOMER PRINT SET INDEX

DRAWING DIRECTORY
R/w POSITIONER TESTER
CABLE POWER
DECK PACK T E S T POSITIONER/WRITER
TIMING DIAGRAM
R m 5 EXERCISER OPERATORS GUIDE
WIRED A S S Y

TIB-DD-R@S-TA
D-UA-RK65-TA-0
D-IA-9606036-0-0
C-CS-RKJZfS-TA-1
D-TD-R~S-TA-2
A-SP-&5-TA-3
C-AD-7009661-0-0

SEOIEW

-it-

THIS IS PRINT SET

[TI

VARIATIONS

&\ 1 1

PRINT SET

UNIT

RERR

FUNCT 1
0N

VIEW

DRIVE
SELECTOR.

\\[ELITE
5EC-o R

NEXT HIGHER ASSY
NUMBER

1 REV

DATA BITS

HEM3
SSLECT

WRITE
(PUSHBUTTON';

A3-El
A3-DI
FWD

ALT

LO^
u3

A3- H Z

A3-R2

1
FUNCTION

DRIVE
SELECT0R

SECTOR
SELECTOR

F I ~ S TUSEDON OPTION/MODEL

DESCRIPTION

RK05-TA

PART NO

1 \JEW

1 1

PARTS LIST

:
N E X T HIGHERASSY.
-

-1
OR,.

,c2 c

-/Â¥Ã‘Ã‘Ã‘

SCALE
NO

SHEET

D I S T ~

1 1 1 1

O M SfCTOrf

' W R i T E , BITS 0 - 3

# SECTOR 1.5 SE'Lâ‚

TÂ£ PVC .^JS

M T E ' I S fISSER,TE2

,. TJ Ã‘

O~T
~i TA
S 4 8E,V/IRLÂ£
~
/IND .'XI 7,-=-y~
#IF W R I E BuTT-uN RELEASET
CLEfiP'3 b . X * T E
FLOP WHIG^ r i I S f t B P
~ - I . ,>:'>
7 F RMINK T I N G \/P-Y -i-

I N 2 0 F'UL5Â

M, -

SATE
-E

8
;
~y";~
p.",:;~":;;
h.

bin to, th.

,mmm
pm,ss8Qm
'--.Q

manD'acturB or sale of 8""s

':..

7
without

NOTES:
AILâ‚

<r is-,'.;

..' A I~.7 ?[Â¥I.' t

OTHERWISE- Â¥SPEC'I.FTâ Â¥

I ETS'KTANCE IS 'I.M OHMS I/+ W.
2. S W C - H E S ( S W U W I T ~ \ ^ J &ASHâ‚¬ HUES')
ARE M O U U T E D O M E l ' - â ‚ ¬ ~ . c l S B O X .

CoRWPAlI&tl

^5 REF

i REF

1
2

6.0-4.

REF

Rl
R14 R15

2
I

R 5 . R6
R2

RES 56K 1'4 Ã 10%
RES 5 6K 1 / 4 W 10%

R3,R4,R7 THRU R l l

RES I K 1b4 W 5%

RES 10K POT 3/4 W \W. 76PR
RES 750
1 / 4 W 5%

1C DEC 7420

E7EIO

--__1_014C
D
E
7
1C DEC 7400

Â£ E5 E l l

1C DEC 7474

--1309143-10-6
1301401-4-0

124123

1300523-t)-J
1300457 -<2> 0

2 0

-- 1 3 0 0 3 6 5 - 0

looogl I
HANDLE

F L I P CHIP

&REEN-

QTY

f FIRST USED O N OPTION MODEL 1

REF DESIGNATION

-^ -^

B MH G502 0 6

BOODLE ECO HISTORY
ASSY/DRI LLING HOLE LAYOUT

X Y COORDINATE HOLEOOCATION

K COG502 0 4

ETCHED CIRCUIT BOARD

5010067

DESCRIPTION
DA D T C I ICT

WRITER EXERCISER

-j34 - A I

WRITE.
LATCH

WR TE H

-f-

'/S

(BUS)

5
fi//

s
t
-

74 74

.0^,Tâ

-7-E

^-//
7 4 74

6 4 i-3.
6
-

5
'
5
-

FLOP

WR 1T E
CrATE
FLOP

e&
I

ENABLE
WRITE
GATE

64-81

UR1T.E L

84-D l

7SECTOR
A

R8
Â¥seroe c u r e

FIRST USED O N OPTION/MODEL

p
-1
[SECTOR S E L E L ~ ~

At-HI

QTY

D l!SCRIPTION

54-1ic,

PARTNO

I }TÂ£

I E Q U I P M E N T

REMOVE BURRS AND BREAKSHARP
CORNERS s u R m c E o u A u n

MATERIAL

FINISH

DRD 1 0 2 4

;

SIZ COD

NUMBER

D CS G5i2(2-0- I

SCALE
SHEET

I F E1
DEC PACK
I
,
\Â¡"
W R I T ER EXERCISER

NEXT HIGHER ASSY

u
eM N O

- - ,

k"?in5~i
,"----

"2.

DIST

1 1 1 1 1

1 1 1

REV

*
1

NOTES:
. JULEPS 0THE.KWlSE SPE-C'LFlE-D *.

SE-'SISTANCE; l5 I.^ OHM'S, '/^ W 5 %
C A P A C T W M C L K IU U F, 50 V

*EF

6 REF
EEF

1 C30.31

REF

R12

RES 22K 1 / 4 W 5%

1301808

R14

RES 470K 1 4 W 5%

1302398

CIO

REF

R3 RIO

RES 100K 1 4 W 5%

1302466

RES IOK 1 / 4 Ã 5%

1300479

THRU R8 R l l
THRU R27

I K 114 W 5%

RES

R15

RES 330

RIB

RES 120

1/4 W 5%

R17

RES 68

1/4 W 5%

l711

E5,E15,E16 E 1 9 .
E2O.E2l.E22

114 Ã 5%

DEC 75451

I 1910298

1C DEC 741
1C DEC 74193

I ,
1

E3
El!

1C DEC 7420

EIO,E14

1C DEC 7410

1902576

1C DEC 7400

1905575

1300247

â‚
E9 E l 3

I
3

[ FIRST USED ON OPTION MODEL 1

R1,R4
R13 RIB

1C TYPE

1309595

1 2 3

.
.-

TRANSISTOR MU4894
W 5%
RES IM 4'1

GND AND 5V ARE USUALLY PIN 7 AND 14
5PECTNELY EXCEPTIONS ARE STATED ABOVE

5.iq

/00004.3

Ql
R9

7 2 7 4 1

202

I
1

8.M

/ O O O PF 2 5 0 V

=ic
I

-1

1I CAP.

-- - .

I21

1910018

..--.
-

.- . -.

--1C DEC
- - -74123

1910436
1905547

1C DEC 7474

E4 E7 E 8 , E I I .
El2,El7
El
D203,D4

1C DEC 7404
DIODE 0664

DIODE IN 746A

C2S

CAP IOOPf 100V 5%

1002345-

C21 C28

CAP 4 7 0 P f IOOV 5%

1000024

C22 THRU C25

CAP 6 8U5 35V 20%

C l THRU C21

I000067
-

CAP

O l l t f 50V 20%

lOOl8lO

C26

CAP

033U5 100V

lOOOO5ll

7
- ---

9006732
9008337 I

6
-- 5

10%

EYELET,#GS 4 7,STIMPSON

HANDLE

F L I P CHIP, G R E X

--a

REF

MODULE ECO HISTORY

B MH-G503 0 6

REF

ASSYIDRI LLING HOLE LAYOUT

D AH-6503.0-5

REF
I

X Y COORDINATE HOLE LOCATION
ETCHED CIRCUIT BOARD

QTY

VEF DESIGNATION

DESCRIPTION

1
I0

- .--3
K-CO 6503 0 - 4
2
5010088
I

-1

PART NO

DARTC 1 ICT

DECPACK POSITIONER

rn
F A S T CLOCK

202 DETECT L
C^C L

'I'

RK05 EXERCISER MAINTENANCE LOG
DATE

MAINTENANCE

FAULT SYMPTOMS
(If Any)

SOLUTION

RK05 EXERCISER MAINTENANCE LOG
MAINTENANCE
(Check One)
Preventive
Corrective

FAULT SYMPTOMS
(If Any)

READER'S COMMENTS

RK05 EXERCISER MAINTENANCE MANUAL
DEC-00-HZRKA-A-D

Digital Equipment Corporation maintains a continuous effort t o improve the quality and usefulness
of its publications. T o d o this effectively we need user feedback: your critical evaluation of this
document. Please give specific page and line references when appropriate.

ERRORS NOTED IN THIS PUBLJCATION:

SUGGESTIONS FOR IMPROVEMENT OF THIS PUBLICATION:

---

MISSING DOCUMENTATION:
Is there sufficient documentation on associated system programs required for use of the software
described in this manual? If not, what material is missing and where should it be placed?

Name

Date

Organization
Please describe your position.
Street
City

- State

Zip Code

- - - - - - - - Do Not Tear -Fold Here and Staple - - - - - - - -

FIRST CLASS
PERMIT NO. 33
MAYNARD, MASS.

BUSINESS REPLY MAIL
NO POSTAGE STAMP NECESSARY IF MAILED IN THE UNITED STATES
Postage will be paid by:

Digital Equipment Corporation
Technical Documentation Department
Digital Park, PK3-2
Maynard, Massachusetts 01754

Digital Equipment Corporation
Maynard, Massachusetts