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DIGITAL-7-31-F-Sym

February 1965

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Document:	SignedMult
Order Number:	DIGITAL-7-31-F-Sym
Revision:
Pages:	6
Original Filename:	http://bitsavers.org/pdf/dec/pdp7/DIGITAL-7-31-F-Sym_SignedMult.pdf

OCR Text

IDENTIFICATION
1• 1

Dig ita 1-7- 31- F-Sym

1 .2

Signed Multiply Subroutine - Single Precision

1 .3

February 15, 1965

Digital-7-31-F-Sym
Page 2

ABSTRACT
This subroutine forms a 34-bit signed product from 17-bit signed multiplier

and multipl icand.

REQUIREMENTS

3. 1

Storage
This subroutine uses 47 (decimal) memory locations.

USAGE

4.2

Call ing Sequence

The subroutine is called by the JMS instruction. When the JMS is executed
to enter the subroutine the multiplier must be in the accumulator (AC). The location following
the JMS must contain a LAC with the address of the multipl icand.
The subroutine will return the instruction immediately following the latter
location with the least significant part of the product in the AC. The most significant part of
the product will be stored in location MP5.

DESCRIPTION
Reference to the flowchart (10. 1) will illustrate the following discussion.

6. 1• 1

On entry, the sign of the multiplier is tested, and if negative, the multiplier

is made positive.
6. 1 .2
The mul tipl icand is obtained and tested for O. If it is found equal to 0, a
;ump to the exit is executed. Next the sign of the multiplicand is tested; and if it is found
negative, the multiplicand is made positive.
.
6. 1 .3

At this point, the contents of the Iink are as follows:
Sign of Multipl ier

Sign of Multipl icand

Links

and represent, therefore, the sign of the product.
6.1.4
The multiply loop proper (tagged MP4) is entered. During this loop, the
least significant half of the product shifts into the most significant end of MP5 while the
multiplier shifts out the least significant end of MP5 and is lost. Note that the sign of the
product is retained in MP5.

Digital-7-31-F-Sym
Page 3
6. 1.5
The sign of the product is tested. If positive, the subroutine exits. If
negative, complementation of the product is performed before the exit.
6.3

Scal ing
Upon entry the binary point is assumed to be located between bit positions

o and 1 in both multiplier and multiplicand. Since there are 17 magnitude bits in each of the
two factors, the product will contain 34 magnitude bits.
The product is double signed, i.e., bit positions 0 and 1 of the most significant word of the product both contain the sign. The remaining 16 bits of the most significant word of the product ~magnitude bits.
The least significant word of the product is devoted entirely to magnitude.
If the binary point of the factors are as stated above, the binary point of
the product will be located between bit positions 1 and 2 in the most significant portion of
the product.
On entry, multiplier and multiplicand must be 2 1s complement binary.
After return, the product is contained in two words in 2 1s complement form.
For more information on binary scal ing for fixed-point computers, see
Appl ication Note 501 •

METHOD

7.2

Algorithm

The conventional algorithm is used. The least significant bit of the multipl ier
is tested. If it is equal to 1, the multiplicand is added to the developing product and this
quantity is shifted right. If the least significant bit of the multipLier is 0, no addition is made
before the shift. The process is repeated until all the bits of the multipl ier in order from least
significant to most significant have been processed.

EXECUTION TIME

9. 1

Minimum

When the subroutine discovers that the multipl icand is 0, the mu Itipl ication
loop is bypassed. In this case, execution time will be 14 microseconds.

9.2

Maximum

Maximum execution time occurs when the sign of the product is negative
and the multipl ier consists (in binary) of all ones. The time is approximately 570 jJsec.
PDF

LIBRARY

Digital-7-31-F-Sym
Page 4

10.

PROGRAM

10. 1

Flowchart

COMPLEMENT MULTIPLIER
SET LINK

CLEAR LI NK

SIGN STATUS IS IN LINK. THE LAC (360000.
RAL MAKES EITHER A NOP OR CMA WHICH
IS SAVED AND EXECUTED ON EXIT FROM LOOP.

COMPLEMENT MULTIPLICAND
COMPLEMENT LINK

ROTATE

RIGHT

g~~)p~~~7~r

STORE LEAST HALF OF PRODUCT
AND MULTIPLIER
C(ACl- C(MPll

SAVE MOST SIGNIFICANT HALF OF PRODUCT
C (ACl -C(MP5l

ADD MULTI PLICAND
C(MP5l +C(MP2l- C(ACl

COMPLEMENT BOTH HALVES
OF PRODUCT

Digital-7-31-F-Sym
Page 5
10.2

Example

The C (Y) are tested. If C (Y) = 0, C (MP1) = C (MP5) = O. If C (Y) is not
0, then C(Y) - C(MP2), C(MP5) are cleared and multiplication is carried out as follows:
If C (MP1 )ll contains a 1, C(MP2) are added to C (MP5). The contents of
MP5 and the MPl are then snlfted right one bit. If C(MPl)17 = 0, the contents of MP5 and
those of the MPl are shifted right one bit.
For this example, assume that the registers MP1, MP5 and MP2 are five bits
in length instead of 17. The following sequential steps will occur in a multiply operation.
The multiplicand is 9 and the multiplier is 4.
MP5

MP1

00000

01001

00100

01001

C(MP2) + C(MP5) -C(MP5) since C(MPl)17 is a 1.

00010

00100

C(MP5, MP1) rotated right one place. C(MPl)17 is
tested.

00001

00010

No addition, because C(MP1)lZ is O. C(MP5, MP2)
rotated right one bit and AC 17 is tested.

00000

10001

No addition C(MPl)]7 = 0, C(MP5, MPl) rotated right
one bit. C(MPl)17 IS tested.

00100

10001

C (MP2) + C (MP5)

00010

01000

C (MP5, MPl) rotated right.

00001

00100

No addition C(MP1)17 = 0, C(MP5, MPl) rotated right
one bit. Rotation counter indicates that the mul tipl ication
is complete, since it has been reduced to o.

10.3

Comments
Initial contents of the register MP1, ready to be tested.

C(MP5) since C(MPl )17 is a 1 •

Program Listing
A Iisting of the subroutine with MULl located at address 0200 is as follows:

0200
0201

/CALLING SEQUENCE:
/LAC
MULTIPLIER
/JMS
MULT
/LAC
MULTIPLICAND
/RETURN iLOW ORDER PRODUCT IN AC
/HIGH ORDER PRODUCT IN LOCATION MP5
0000
MULT,
0
7100
DZM MP5
/ZERO OUT PRODUCT AREA

PDP

LIBRARY

Digital-7-31-F-Sym
Page 6
0202
0203
0204
0205
0206
0207
0207
0210
0211
0212
0213
0214

7510
7061
3250
3251
1600
7450
7450
5234
7510
7061
3252
1247

SNA
JMP MPZ
SPA! CLL
CMA : CML
DAC #MP1
XCT I MULT
SNA
JMP MPZ
SPA
CMA ! CML
DAC #MP2
LAC (360000)

0215
0216
0217
0220
0221
0222
0223
0224
0225
0226
0227
0230
0231
0232
0233
0234
0235
0236
0237

3253
1250
7010
3250
1251
7430
1252
7110
3251
2253
5216
1250
7010
7430
5240
3250
1251
2200
5600

RAL
DAC MPSIGN
LAM -21
DAC #MP3
LAC MPl
RAR
DAC MPl
LAC MP5
SZl : Cll
TAD MP2
RAR
DAC MP5
ISZ MP3
JMP MP4
0
DAC MP5
LAC MPl
RAR
XCT MPSIGN

0240
0241

7141
3250

MP4,

MPSIGN,

MPZ,

ISZ MUlT
JMP I MULT

/IS MULTIPLIER ZERO?
/IF ZERO, RETURN
/TAKE ABSOLUTE VALUE OF MULTIPLIER
/SET LINK = 1 IF MULTIPLIER IS NEGATIVE
/PICK UP MULTIPLICAND
/IS MULTIPLICAND ZERO
/IF ZERO, RETURN
/IF NON ZERO, TAKE ABSOLUTE VALUE
/IF NEGATIVE, COMPLEMENT LINK
/L1NK HAS SIGN OF PRODUCT
/COMPlEMENT ACCUMULATOR IF PRO/DUCT IS NEGATIVE

/INITIALIZE COUNT TO -17

/ROTATE MULTIPLIER RIGHT ONE BIT
flOW ORDER INTO LINK
/FETCH PRODUCT
/ADD MULTIPLICAND IF LINK IS 1
/ROTATE PRODUCT RIGHT ONE BIT
/IS COUNT + 1 = O?
/IF NOT, GO TO MP4
/IF YES COMPLEMENT HIGH ORDER PORTION
/OF PRODUCT, IF IT IS NEGATIVE
/RETRIEVE lOW ORDER BIT OF PRODUCT
/FROM THE LINK
/PLACE IT INTO THE LOW ORDER PORTION
/OF WORD COMPLEMENT AS ABOVE
/RETURN

STORAGE MAP: (Locations available to the user)
MP5 (C(MP5) = high order product}