Signed Multiply Subroutine - Single Precision

This document describes a single-precision signed multiply subroutine designed for the PDP-7 computer, dated February 15, 1965. Its purpose is to compute a 34-bit signed product from a 17-bit signed multiplier and multiplicand.

The subroutine requires 47 decimal memory locations. It is invoked using a JMS instruction, with the multiplier loaded into the accumulator (AC) and the multiplicand's address in the instruction following the JMS. Upon completion, the least significant part of the product is returned in the AC, while the most significant part is stored in memory location MP5.

Before the main multiplication loop, the subroutine tests the signs of both the multiplier and multiplicand, making them positive if negative. The sign of the final product is determined by the initial signs and stored in the link bit. The binary point is assumed to be between bit positions 0 and 1 for both factors. The product is double-signed, with bits 0 and 1 of the most significant word indicating the sign, and the remaining 16 bits containing magnitude. The least significant word is entirely magnitude.

The subroutine utilizes a conventional multiplication algorithm. It iteratively checks the least significant bit of the multiplier: if it's 1, the multiplicand is added to the developing product; regardless, the product and multiplier are shifted right. This process continues until all bits of the multiplier have been processed. If the multiplicand is zero, the multiplication loop is bypassed for faster execution. The product is returned in 2's complement form across two words.

Execution time varies: a minimum of 14 microseconds occurs when the multiplicand is zero, and a maximum of approximately 570 microseconds for a negative product with a multiplier of all ones. The document also includes an example walk-through and a program listing of the subroutine.