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March 1984

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Document:	DMZ32 24-line Asynchronous Multiplexer User Guide
Order Number:	EK-DMZ32-UG
Revision:	PRE
Pages:	138
Original Filename:

OCR Text

EK-DMZ32-UG-PRELIMINARY

14 MARCH

1984

DMZ32 24-LINE ASYNCHRONOUS MULTILPLEXER
USER GUIDE

¢ J¢ J¢ e Je Je do Je Je Je Je Je de J Je de K Je de de d

(PRELIMINARY RELEASE)

de e e e de d e % 3 de e de e e de e de e de e ok

FOR

INTERNAL

USE

ONLY

EK-DMZ32-UG~-PRELIMINARY

14 MARCH

1984

DMZ32 24-LINE ASYNCHRONOUS MULTILPLEXER
USER

GUIDE

d¢ Je % % ¢ % Je Je Je Jo Je de Je e Je Kk Fe e ke ko d

(PRELIMINARY'RELEASE)

fhkkkkhkdhrkdhbkhhrkrkk

FOR

INTERNAL

USE

ONLY

CONTENTS
Page

PREFACE

=
WW WW

il el il el iel ikl

(H3014)

00 ~NOYO\OY Ut

Remote Distribution Panel
Power Supply
Expansion Module
Processor Module
DMZ32 System Operation
Tl Overview
DMZ32 Specifications

(M8398)

DMZ32 Module (M8398)
Distribution Panel (H3014)

Introduction

Unpacking and Inspection
Installation

Device Address Assignments
Device Vector Assignment
Procedure

M8398 Module Installation
H301l4 Distribution Panel Installation

H9642-FC/FD -

(UNIBUS Expansion Cabinet)

o
o
e

~NSovwn

Cable

Installation

DMZ32

Installation Check-off List

H9652-MF - (UNIBUS Expansion Cabinet)
Non FCC Compliant Cabinet
NN

Ak OO WW WW

DON NN NN

INSTALLATION

N+

Vot
WN
L] [ ]
LS

UNIBUS Interface Module
UNIBUS Interface
Shared RAM Interface
Tl Interface Unit

o
*

W N

[)
o
e

o
e
o
o

.
L
o

[

o,
[3
[]

CHAPTER 2
NN

INTRODUCTION

Introduction

[

DMZ32 General Description

[}

VMTUTU WD
NN

e
e
el
Nl el

CHAPTER

DMZ32 Installation Checkout

FOR

INTERNAL

USE

ONLY

Parameter

(CSR)

and Status Register

Diagnostic Control and Status Register
Diagnostic Register (DMZ.CSR[2]<15:0>) - Write
Diagnostic Register DMZ.CSR[2]<15:0> - Read

Line Parameter Register

Receive Buffer

Receive Silo Parameter
Indirect
Indirect
Indirect

(OCTET CSR)

(LINE PAR REGK15:0>)

(RX.BUF)

(RSP.REG)

Indirect Register

[
.

Y
A
S
Y
S
Y
Y- S

HHEEMWOYWWOWYWOWOOOoO0OomOoaea~Ioh
Uld (WMN
O OO O
L]
[]
L]
¢
o
B> W N W N

Registers (IND.REG([31:0])
Registers (IND.REG[0]<13:0>) W
Register (IND.REG[0]<15:0>) R

(IND.REG([1]<15:0>)

Indirect Register (IND.REG[2]<15:0>)
Indirect Register (IND.REG[3]<15:0>)
CHAPTER

R/W

WW wWw
J
WWRON NN NE

Octet Control and Status Register

WWWW

Configuration Control

3.13

REG)

lwwuuuut'»uw Www ww

Line

Octet

Control

W NV W O VW N IOV W WW RO DN

*
[
¢

AU
B WN

o
o
o

¢«
oo
o
o
&

W RN
Ui

&
&
o
o
&

Registers

Octet

(LP
Octet Receive Buffer (RX BUF)
Octet Indirect Register (IND REG)
Initial Operation
Parameter Initialization
Transmit Operation
Receiver Operation

Device

ww w

Introduction
Overview

Device Registers and Vector Assignments

WO 000000~

PROGRAMMING

Www

WWWWWwwWwWwWwuwWwwuwuwww
Wwwww

CHAPTER

R/W

R/W
R/W

SERVICE
Introduction

Maintenance

Philosophy

DMZ32

Replaceable

Field

Units

Preventive Maintenance
Self-Test

Diagnostic

Diagnostics
Diagnostic

Supervisor

Local

Loopback

DMZ32 CSR Address and Vector Address
T1

(H3028)

Remote T1 Loopback (H3027)
Single Line EIA Loopback (H3248)

Staggered Multiline

Loopback

(29-24929-00)

Manual Analog Modem Loopback
Software Loopback Methods
Shared RAM Loopback
Local Trunk Loopback
EIA Single-line or All Lines
Local Modem Loopback
DMZ32

Level

(EVDAE)

Loopback

4-26

Diagnostic

EVDAE Hardware Prerequisites

EVDAE

Software

Diagnostic

4-27

Prerequisites

EVDAE Diagnostic Description

FOR

INTERNAL

4-27

USE

ONLY

4-29

Loading, Attaching, and Running EVDAE

EVDAE Event Flags

4-30

EVDAF Hardware Prerequ131tes

4-31

EVDAF Diagnostic Description

4-32

4-31

DMZ32 Level 2R (EVDAF) Diagnostic

4-31

EVDAF Software Diagnostic Prerequisites

4.11.3
4.11.4
4.12
4,12.1
4.12.2

4.12.3
4.13

3=33

Loading, Attaching, and Running EVDAF

H3014 Front Panel Indicators

4-36

Sync Indicator (SYNC)

4-37

Remove/Replace Procedures

4-39

4-37

Power Indicator (PWR)

4-37

Trunk Quality Indicator (TRNK QLTY)

H3014 Power Supply Assembly Removal/Replacement

4.13.1

(29-24799-00)
H3014 Fan Assembly Removal/Replacemnt
(29-24800-00)
H3014 Expansion Module Removal/Replacement
(29-24798-00)
H3014 Processor Moduel Removal/Replacement
(29-24797-00)

4.13.2
4.13.3
4.13.4

H3014 Chassis/Backplane Replacement

4.13.5

4-40
4-42

4-44

4-46

4-50

(29-24796~-00)

APPENDIX

Afll
Aflz

www

APPENDIX B
1
.2
3

Floating Device Addresses and Vectors

A-1

Floating Device Addresses

A-3

Floating Vector Addresses
T1 CABLE INFORMATION
Introduction

Cable Configuration

T1 Conductor Characteristics

- FOR

INTERNAL

B-1

B-4

USE ONLY

PREFACE
The DMZ32 User Guide is a stand-alone document that describes

typical

24-line

capabilities,

troubleshooting

philosophy.

asynchronous

installation,
procedures

multiplexer

based

module

and Vectors

are covered

and

replacement

information

about

the

DM232

Manual

Appendix
'

24-line

asynchronous

multiplexer can be found in the following:
Technical

‘

Additional

features

service

T-Carrier Techniques are covered in Appendix A,

Floating Device Addresses
B.

use,

programming,

®¢

DMZ32

(EK-DMZ32-TM-=-001),

Communications Options Minireference Manual
(EK-CMIVI-RM-002)

DMZ32

Set

(MP00997-01).

The postage-paid READER'S COMMENTS form on the last page of

this document requests your critical evaluation to assist us
inpreparing

future documentation.

FOR

INTERNAL

USE

ONLY

CHAPTER

INTRODUCTION
INTRODUCTION

1.1

This chapter

DMZ32,

contains

a brief

introduction

this manual,

throughout

as used

the DMZ32.

The

term

denotes the 24-line asyn-

chronous multiplexer.

DMZ32 GENERAL DESCRIPTION

1.2

The

DMZ32

24-line

asynchronous

multiplexer

consisting

a maximum

line

speed

Features of the DMZ32

The DM232 has

single height hex module and a distribution panel.
19.2K bps.

include:

Split baud rate and modem control on all lines

Transmit and receive character
DMA capability on transmit

Programmable

silo

Improved

alarm

silos

time-out

period

for

the

receive

connectivity

An added
These features result in increased system throughput.
The connection
feature is the improved connectivity of the DMZ32.

between

the

VAX

UNIBUS

Interface

Module

(M8398)

and

the

Remote

Distribution Panel (H3014)

is accomplished by two cables (BC22N-10

The

panel

and

BCl8L-15).

remote

mounted

distribution

5000

feet

away

(M8398)

with additional cable

the

distribution

The

DMZ32

(H3014),

from

the

UNIBUS

DMZ32,

Interface

(See Appendix B).

panel

are

RS232-C

Male

plugs

into

Small

Peripheral

runs under the VMS operating system

DB25

Controller

the

DMZ32

- FOR

INTERNAL

connectors

(SPC)

and

Located

slot

and

Figure

1-2

(Version 4 or later).

to Figure 1l-1 for the component parts of
for the DMZ32 functional block diagram.)

Module

The H301l4

active distribution panel that requires external power.
which allow connection to 24 different lines.

can

USE

(Refer

ONLY -

{M8398)

(BC22N-10)

‘

{aC18L-15)

(H3014)

bo1eess

Figure

1-1

DMZ32

H3028

Component

Parts

FOR

INTERNAL

USE

ONLY

POWER
SUPPLY

1.544
UNK

The

first

mounted

interface

the

single

hex

following logic sections:
°

UNIBUS

Interface

Block

Diagram

(M8398)
of

Interface

height

the

DMZ32

and

Module

board

(UIM).

Asynchronous

The

divided

UIM

into

the

(UBI)

(SR)

Shared RAM Interface

°®

H3014

Functional

component

UNIBUS

DMZ32

UNIBUS Interface Module

Multiplexer

=
— 33

OEMUX

1-2

€A
ASYNC
LINES

ORIVERS/

e enrace [

INTEREACE

Figure

l1.2.1

EIA
RECEIVERS

BPs

SHARED

”

—

CQNTROL

INTERFACE | INTERFACE

|2z
x TM

MODEM

unNiBus

Interface Unit

(TIO)

1.2.1.1 UNIBUS Interface
The

UNIBUS

Interface

(UBI)

UNIBUS and the

shared

the

section

logic

which

handles

This section passes data between the VAX

interfacing.

all UNIBUS

Random Access Memory

(RAM)

interface.

1.2.1.2 Shared RAM Interface
The

Shared

passing

the

UNIBUS

Shared

RAM

Interface

RAM

Interface

data

from

Interface
the

area

asynchronous

well

allows

Interface

from

(SR)

one

access

shared

process

the

allows

access,

Interface

access

means

Unit

from

The

another.

the

UNIBUS

Interface.

1.2.1.3 Tl Interface Unit
The

Interface

off

the

high

the

carrier

Unit

(TIU)

interface.

speed

(1.544

the

time

trunk.-

It controls

MBPS)

division

all

multiplexer
and

data

going

and

- FOR INTERNAL USE ONLY -

1.2.2

Remote Distribution Panel

The second component
Remote
Distribution

distribution

panel

supply.

The

transfers

between

that

H3014

powered

from

its

responsible
for
of 24 asynchronous

the

H3014

it may also be

' the _appropriate

DMZ32 Asynchronous Multiplexer
(H3014).
The
H301l4
1is
an

any

The configuration

therefore

of the
Panel

(H3014)

option

depends

responsible
is

own

independent

coordinating
lines and the

the

for

option

passing

installed.

The

is the
active

power

all
data
T1 trunk.

purchased

and

modem signals

distribution

panel

decodes the incoming Tl formatted serial data.
- In the reverse
direction it places outgoing asynchronous terminal data and modem
control
signals
into
the
T1
serial
bit
stream
using
bipolar
encoding

The

techniques.

H3014
°
)

consists

1.2.2.1

Power

The Power

electronic
‘provided

Supply provides

circuitry

power

+12
-12

vdc
vdc
vde

10
@
@

Expansion

expansion

modem

following major

components:

Supply

by the

l.2.2.2

the

Power Supply
Expansion Module
Processor Module

The

supported

supply

are:

Data

necessary

for

the

that

are

The

voltages

Module
provides

Signaling
To

Set

drivers/receivers
for

The

expansion

Request

Data

voltages

distribution panel.

2.5 A
2.5 A

signals.

the

operating

the

module

control

the

within

modem

module

Rate

are

control
as

six

signals

follows:

Select

Send

Ready

Clear To Send
RS-449 Local Loopback
RS-449

(Refer

Table

Test

1-1

for

Mode

assignment

and

signal

FOR

descriptions.)

INTERNAL

USE

ONLY

Table 1-1 V.24/RS232 Pin Assignments

CCITT

EIA

Origin

101

103

" DTE

Received Data

164

DCE

DTE

Clear

106

DCE

Ground

102

Carrier Detect (CD)

109

Description

Protective

Ground

Transmitted Data

Request To Send (RTS)
to

Send (CTS)

Data Set Ready (DSR)
Signal

RS449

Local

Loopback

Data Terminal Ready
Ring

Indicator

The

DCE
DTE

(DTR)

108.2

DTE

125

DCE

111

DTE

(DSRS)

RS449 Test Mode

1.2.2.3

(RI)

]

DCE

107 .

(LL)

Data Signalling Rate
Selector

105

(TM)

Processor

DCE

Module

processor module

contains

the microprocessor

that

controls

the H3014 operation, status indicators (Pwr, Sync, and Trnk Qlty),

drivers/receivers for data signals,
The modem control drivers/receivers

module

and modem control signals.
contained on the processor

are:

Data

Carrier

Terminal

Ring

Ready

Detect

Indicator

FOR

INTERNAL

USE ONLY

DMZ32

The

DMZ32

setting

transmit

the

line

data

and

bit

receive

can

take

marking)

except

data

disabled

the

Program

NPR/DMA to load

Mode

specific

line

special

handled

from

Line

before

held

uses

maintenance

I/0

and

enabled

receive

data.

NPR/DMA

mode

silos).

order

There

the

situations.
techniques,

the

DMA

Mode

is enabled by setting

silo

receive

character

(or

standard

the transmit silos.

128

(LINE

different

the receiver

Control

two

uses

Each

octet

the

receiving

(8-line

three

(total

the

line

A line must be

enable bit in the appropriate LINE CTRL register.
a

different

transmission

using

For reception of data,

Although both of these techniques use

Program Mode and DMA Mode.

silos,

the

be enabled

line must

place.

state,

Transmission

enable

data

the transmit line is enabled

)

CNTRL)
data

can

During transmission of data,

7’

lines.

SYSTEM OPERATION

group)

receive

mode

the

DMZ32.

1.4

Tl Overview

The DMZ32 uses a "T1" transmission technique by way of two twisted

pair cables to provide optimal channel utilization for transfer of
data between the UIM and the distribution panel.

"pl"

from

"T-Carrier"

the

based

Bell

System

pulse

multiplexing

(TDM)

data

independent

subsequently placed

stream
or

mark

the T1

link.

receive end

the

this

serial bit

and

distribution

1.5

DMZ32

techniques.

into

This

Using

encoded

are

1.544 mbps

transmission

these

into

serial

bit

into a specific
(AMI)

technique

and

link,

the

clock

techique

division

techniques,

Dbits

stream.

format,

inversion

the

time

and

(PCM)

using

This

and
bit

a bipolar

transmitted

down

reconstructed

from

stream and used to synchronize the demultiplexing
of

the

data

the

appropriate

line.

SPECIFICATIONS

The

specifications

the

following:

(M8398 module

system.

modulation

channels

converted

then

alternate

carrier

coded

taken

term

industry

telecommunication

and

Physical

for

the

H3014

two

major

components

the

INTERNAL

USE

panel)

distribution

are divided

DMZ32

into

Specifications

Electrical

Specifications

Environmental

Specifications

UNIBUS Conductor

’4

1.3

Specifications

FOR

ONLY

1.5.1

DMZ32

Module

(M8398)

Physical Specifications
Single Hex height module

Electrical Specifications
DC Voltage

+5V @ 9.0 Amps.
+15v @ 0.1 Amps.

Data Baud Rates
(Half or Full Duplex)

50, 75, 110, 134.5,
150, 300, 600, 1200,
1800, 2000, 2400,
4800, 9600,
19200.

and

Environmental Specifications
Temperatures

Operating

10°C0(50°F) to 40°C

Non-operating

-40°C (-40°f¥”€6“33°5“’“ 151°F)

(104°F)

Relative Humidity

10% to 90% with a
maximum wet bulb of

Operating

28°¢c (82°F) -omaximum

dewgoint of 2°C
(36°F), noncondensing.

5% to 95%
densing.

Non-operating

noncon-

UNIBUS Specifications
UNIBUS

6.2 ac unit loads

Loads

1.5 dc unit loads

Addresses

Vector

760440 - 763740

(Octal)

(Typical)

300

(Octal)

Interrupt

Levels

FOR

(Typical)
5

INTERNAL

USE ONLY -

1.5.2

Distribution Panel (H3014)

Physical Specifications

Height

Width
Depth

Mounting

Weight

13.3 cm

(5.25

in)

48.2 cm

(19 in)

43.18 cm

(17

in)

Standard

48.2

(19

in)

(18 1lbs)

8.1 kg

maximum

Electrical Specifications
AC Line Voltage

90-130 VAC, or
180-255 VAC

Line Frequency

47-63 Hz.

Input Current

1.5 Amp @ 120 VAC
.8 Amp @ 220-240 VAC

Grounding

Frame Ground

The chassis
frame
electrically bonded
earth

ground

primary

via

circuit

1is
to
the

con-

nector.

Logic Ground
EIA Ground

ground.

This

carrying

refer-

signal

This
ence

non-current
ground

as a reference

used

for all

Electronic
Industries
re(EIA)
Association
ceiver inputs.

USE ONLY - FOR INTERNAL

Environmental

Specifications
Temperatures

Class

(Non Air Conditioned)

lOOCO(SOOF) to 40°¢
(104°F)

Relative Humidity
Class

(Non Air Conditioned)

o
10% to 90% with
maxsmum wet bulb 28°C
- maxi&num due
(82°F)
point 2°C (36 F) noncondencing

Heat Dissipation

454 BTU per hour

- FOR INTERNAL USE ONLY -

CHAPTER TWO

INSTALLATION
INTRODUCTION

2.1

This

chapter

contains

checking the DMZ32.

installation process,

procedures

for

unpacking,

installing,

and

A checklist, which can be used to verify the
is

included.

UNPACKING AND INSPECTION

2.2

The DMZ32

When

is packaged according to commercial packing practices.

unpacking

materials making sure not

damage

contents against the shipping list.
of each

DMZ32

option.

remove

carefully

option,

DM232

Inspect all

all

and

the

contents

items

carefully.

packing

check

the

Table 2-1 lists the contents
Pay

attention to the module to check for cracks, loose components, and

‘breaks

the

etched paths.

Table 2-1

OPTION

DMZ32-M

CK-DMZ32-DY

List

PART NUMBER

CONTENTS

M8398
BC22N-10

e
®

One UNIBUS HEX module
One Internal cable and 2 x 4

BCl8L-15

One External cable

bulkhead

insert

H3028

One Local T1 Loopback

EK-DMZ32-UG

One User Guide

H3014-CA

Remote Distribution Panel

Shipping Bracket
120V Power Cord

H3027

CK-DMZ32-AY

DMZ32 Option Packing

H3014-AA

One Remote T1 Loopback

(120V/240V) with Modem Control

240V Power Cord

Remote

Shipping Bracket

Picture Frame

240V

Distribution

(120v/240V)

Panel

No Modem Control

120V Power Cord
Power

Cord.

- FOR

INTERNAL USE ONLY -

2-1

Table

OPTION

DMZ32-AP

DMZ32-DP

DMZ32-N

2-1

DMZ32

Option

PART NUMBER

Packing

List

continued

CONTENTS

e
e

DMZ32-M (System
CK-DMZ32-AY

Integrated)

DMZ32-M

CK-DMZ32-DY

(System

Remote

Distribution

(H3014)
Expansion
Modem Control

FOR

INTERNAL

Panel

Module

USE

for

ONLY

2.3

DEVICE ADDRESS ASSIGNMENTS

The DMZ32's device addresses are selected from the floating device

(I/0)

page.

When

there

input/output

of the UNIBUS

to Appendix B)

(Refer

space

address

Switch pack E-53. on the DMZ32 selects the first DMZ32

CSR address.

are

floating

devices

floating address space is 760440

third

hex)

VMS

floating

address

spaces

4.0

later),

and 760540

(version

the

DMZ32

respectfully.

(FFE160 hex)
or

for

before

(FFE120 hex).

the

actual

the SYSGEN utility.

determined by using

are

760500

(FFE140
-

address(es)

Refer

can

the VAX/VMS

for

the procedure

controlled

the

VMS

DEVICE VECTOR ASSIGNMENT

DMZ32

System.

interrupt

vectors

are

Operating

During autoconfiguration the operating system loads the

value of

the base vector

floating

vector

are calculated

into the DMZ32.

from the base vector.

The other DMZ32 vectors

(Refer to Appendix A for

addresses.)

'INSTALLATION PROCEDURE

2.5

The

first

When operating under

to determine CSR address assignments.

The

the

The second and

(AA-H499B-TE)

Guide to Writing a Device Driver

2.4

DMZ32,

installation of

the

DMZ32

broken

down

into

the

following

procedures:

UNIBUS

Cable

Interface Module

(M8398)

Installation

Remote Distribution Panel (H3014)

Installation

Installation Tools Required:
VAX Cabinet Key (Usually a
Phillips screwdriver
7/16 Hex Driver
Flatblade Screwdriver

2.5.1

7/64 Allen Wrench)

M8398 Module Installation

install

2-1

shows

the M8398,

perform the

following

steps

the

given, ensuring that no steps are skipped or overlooked.
the

location

switch

sequence

Figure

packs.

- FOR INTERNAL USE ONLY -

¢
i

i
:

SWITCH SETTINGS OFF TO REDUCE POWER CONSUMPTION

" DO DATA PATH

X %.%.

TESTING (NCAMAL

oo oata sate

NOTE

Sits FesT oML

AND EI@1, ~ON” IS A LOGC

*0% AND *OFF* IS A LOGIC
.,'.'

W 3 OUT

Figure

2-1

DMZ32

Aoons!m TM2 1 0. ] 0

T
17

UNIBUS

Interface

Module

FOR

(M8398)

INTERNAL

USE

ONLY

Set switches 2 through 9
priority level.

Set switches 1 through 8
UNIBUS addressv,

on sw1tch pack

Set switch 9

Set

switch pack E-63 to

on switch pack E-53

sw1tch.

(Refer

to Figure

Power

down

2-1

for

the

proper

9051ton{

the

E=53

switch settings.)

M8398

the

which

system

the

to the ON position.

pack

switch

E-53

the correct

being

installed.

WARNING
BEFORE

SYSTEM

PERFORMING

INSTALLED,

AND

DOWN

WHICH

MUST

THIS

THE

POWER

THE

POWER

the

Non

Processor

COMPLETELY

SOURCE.

FROM

PROCEDURE,

DMZ32

THE

POWERED

DISCONNECTED

CORD

INJURY

PERSONAL

- MAY RESULT IF THIS PROCEDURE IS IGNORED.
Remove

Grant

the Small Peripheral Controller
the

M8398

module

to be

resistance

Install

the M8398 module

circuits

lofl

the

system

and

the

When the M8398

module

supplied
the

Installation

remaining

steps

the

backplane

ensure

exist.

DD11-DK backplane.

Power

from

where
lane
slot
backp

(SPC)

installed.

checks

Perform

short

(CAl-CBl)

wire

(NPG)

into

the prepared

verify

M8398

that

TList

+5.00

measures

installation

Check-off

the

SPC slot
vdc

+5.00

the

that

complete, proceed

(Section

2.7)

vdc.

for

the

be performed.

- FOR

USE ONLY INTERNAL.

2.5.2

H3014 Distribution Panel Installation

H9642-FC/FD - (UNIBUS Expansion Cabinet)
NOTE

Because

mounting

limitations,

in h9642-fc/£fd model cabinets.

Figure 2-3

for

rear

Remove

door

assembly

Remove the FCC Shield Gasket
removing the following:

7/64 allen wrench.

Two

side

7/16

and

These

Hex

top

the

VAX

cabinet

Panel Assembly

head

screws

the

FCC

located

left side of

secure

'®

Refer to

the rear view of a model-

H9642-FC/FD.

the

be mounted

only

can

panel

distribution

using

the

(Figure

the

2-2)

top

Nine

Shield

philips

screws

located

Gasket

(these

screws

Panel

the

Bulkhead

FCC

under

the

secure

assembly

right

the gasket panel assembly.
Panel

vertical mounting rails of the cabinet.
®

the

gasket

Shield

FCC

panel

Gasket

Assembly

H3014

down

Shield

the

Figures

the

2-2

removed

bottom

and

Gasket

location

is to be mounted.

Frames must

frame

FCC

the

Panel

where

the

These Bulkhead

from

most

the

top most

frame.

(See

2-3.)

Remove
the
nine
(9)
phillips
screws
secure FCC Bulkhead Frames together.

4.,

Remove the six (6) mounting phillips screws (Figure 2-2)
that

secure

mounting

rails

the
of

FCC

the

NOTE

below

Frame).

The FCC Bulkhead Frames must be removed
from

Bulkhead

Frames

(Figure

the

2-2)

that

vertical

cabinet.

FOR

INTERNAL

USE

ONLY -

"\ ]

’ ., ) 17"

FCC SHIELD

GASKET PANEL

|~ ASSEMSLY

(6 AACSS)

MOUNTING SCREWS

’

7/16 HEX HEAD "~
SCREWS (2PLACES)

SMALL PHILIPS

SCREWS (g PLACES)

I/0O PANEL

FCC BULKHEAD

(TYPICAL)

FRAME

POWER
CONTROLLER

Figure

2-2

Typical

H9642-FC/FD

Shielded

Cabinet

before

H3014

Installation

- FOR

INTERNAL

USE ONLY -

Repeat steps 3 and 4 until all requiréd FCC Bulkhead Frames
are

removed,
NOTE

then

proceed

mounted
above

the

shown

the

vertical

mounting

screws

the

panel

cabinet

in Figure

mounting

(Figure

distribution

can only

the

location

2-4.

distribution

cabinet

After

step

)

The distribution

Position

panel

and

secure

rails

wusing

the

it
six

the

philips

2-4).
panel

mounted,

secure

the

bottom

of the distribution panel to the FCC Bulkhead Frame beneath
it using the nine philips screws that were removed from the
FCC Bulkhead Frame.
NOTE

the

remove

H301l4

the

shipping

received

cabinet,

bracket

(Figure

Install the FCC shield gasket panel assefibly by reversing
the procedure

When

the

step

distribution

proceed

for

remaining

the
the

the

panel

Installation
steps

installation

Check-off

List

performed

the

complete,

(Section

2.7)

installation

DMZ32.

FOR

INTERNAL

USE

ONLY

—

e
Gme
mae w—
=
-

w—

H9642-FC/FD CABINET

H3014 SHIPPING

SIDE

—

8RACKET

FRONT

(TOP VIEW)

REMOTE DISTRISBUTION
PANEL (H3014)

FRONT
SIDE

(SIDE VIEW)

Figure

2-3

H30l14

Shipping

Bracket

- FOR

Position

INTERNAL USE ONLY -

—
» ——_“.
ot %]

PLAGES)

okt

’

)

// H3014

SSES SSHT

MOUNTING % BT TT

d?nwsm

2 e=»

) fl_'i

NEES

8770

POWER CONTROL

H === o :

4 Io
2x
PANEL (TYPICAL)

Figure

2-4

Typical

H9642-FC/FD
H3014

FCC

Shielded

Cabinet

after

Installation

2-10
-

FOR

INTERNAL

USE

ONLY

H9652-MF

(UNIBUS

Expansion Cabinet)

NOTE

H9652-MF

the

boxes,

BAll

uses

cabinet

distribution

not be mounted in
power limitations.

the

(2)

two

can

panel

cabinet

due

Remove the rear door assembly of the VAX cabinet using the

Remove the FCC Shield Gasket Panel Assembly
removing the following:

7/64 allen wrench.

Two

(2)

7/16

side

right

Hex

and

head

top

screws

are

located

side

left

(Figure 2-5)
on

the

gasket

pane

Gasket

Panel

assembly.

These secure the FCC

Shield

Nine

phillips

located

(9)

Shield

screws

gasket panel assembly.
Gasket

Panel

are

tog

the

to the vertical mounting rails of the cabinet.

under

the

These screws secure the FCC ‘

the FCC

Bulkhead

Frame.

Remove the nine (9) small phillips screws (Figure 2-5) tfiég

secure

the

FCC

Bulkhead

the

six

(6)

Frame

the

top

the

cabinet

frame.

Remove

vertical mounting

mounting

phillips

screws

(Figure

2-5)

that secure the top most FCC Bulkhead Frame to the cabinet
rails.

Repeat steps 3 and 4 until all required FCC Bulkhead Frames

When completed, proceed to step 6.

are removed.
NOTE

The

distribution

mounted
Frame

the

panel

top

two

can

FCC

only

Bulkhead

locations.

- FOR

INTERNAL USE ONLY -

Position

the

cabinet

mounting

After

screws

(Figure

the nine

and

rails

using

(9)

secure

the

six

the

philips

2-7).

distribution panel

it using

panel

mounting

the distribution panel

the

step

distribution

vertical

is mounted,

the

phillips

FCC

secure

Bulkhead

screws that

the bottom

Frame beneath

were removedin

NOTE

If the H301l4 is received in a cabinet,
(Figure
shipping bracket
the
remove

you

seven,

are

mounting

two

distribution

Install the FCC Shield Gasket
the procedure in step 2.
10.

When

the

proceed

panels,

repeat

and when completed, proceed to step nine.

distribution

the

panel

Installation

for the remaining
of the DMZ32.

steps

panel

assembly

installation

Check-off

to be performed

List

the

step

reversing

complete,

(Section

2.7)

installation

2-12

FOR

INTERNAL

USE ONLY -

pYye

HEAD

EC ninG SCREWS
Sich

(q PLACESD

”
”

SCREWS

((p PLACS

;
I

Figure

2-5

Typical

HS652-MF

(VAX11-780)

before H3014

FCC

Installation

Shielded

Cabinet

2-13

- FOR

INTERNAL

USE ONLY -

——

H9652-MF CABINET

FRONT
SIDE

H3014 SHIPPING

BRACKETS

REMOTE DISTRIBUTION
PANEL(S) (H3014)

)

FRONT

- — ‘=
|1

SIDE

- -—-L- -

=== 1
1

jfr=—==== i

|H (BA11-K BOX) HI

R J1
:
- - CONTROLLER
~Jl |~ POWER
I
U

(SIDE VIEW)

Figure

2-6

H3014

Sshipping

Bracket

FOR

Position

INTERNAL

USE

ONLY

MOUNTING

SCREWS

b )

SRS
CAUTION

iF TWO BAt1 BOXES
ARE BEING USED 8Y THE
“VAX11-780. THE H3014
DISTRISUTION PANEL(S)

IN THE CABINET BECAUSE

OF POWER UMITATIONS.

Figure

2-7

Typical

H9652-MF

FCC
Installation

(VAX11-780)

after H3014

Shielded

Cabinet

2-15

- FOR

INTERNAL

USE ONLY -

Non

FCC Compliant Cabinet

Remove
7/64

the

Position

and
the

rear

door

assembly

the

VAX

cabinet

using

the

allen wrench.

the

secure

distribution

six philips mounting

If you

where

the

mounted

screws.

are mounting two distribution panels,

then proceed

When

panel

the cabinet vertical mounting rails using

step

repeat step 2

distribution

panel

installation

complete

groceed to the Installation Check-off List (Section 2.75
or

the

remaining

steps

performed

the

installation

DMZ32.

FOR

INTERNAL

USE

ONLY

2.5.3

Cable

Installation

NOTE

FCC

cabinet,

the 2 X 4

cable.

the

before

should

connected,

the

BC22N-=10

attached

I/0 panel that is shipped with

installing

I1f

cabinet, discard the 2
(Refer to Figure 2-8).

a non-FCC
Panel.

I/0

1/0 panel from the FCC Bulkhead Frame

Remove a blank 2 X 4

where the new 2 x 4 I/0 panel (supplied with the cable) is
to be located.

Remove the two screws that secure the panel

to the FCC Bulkhead.

Feed

the

cable

opening at the

end

the

BC22N-10

cable

through

location where the new I/O panel

the

is to be

secured.

Secure

the

new

BC22N-10 cable

panel

was

I/O

panel

that

to the FCC Bulkhead

connected

the

Frame where the blank

removed.

Connect the 15 pin berg connector of the BC22N-10 cable to
J1 of the M8398 module, located in the BAll-K box.
"This

Side Up"TM

Label

Be sure

is visible.

Connect one end of the BCl8L-15 cable to the external side
of

the

Connect

new

I/0 panel.

the

loose

end

the

BCl8L-15

Connector on the distribution panel.

- FOR

cable

the

INTERNAL USE ONLY -

2X4 1/0 PANEL

BC22N-10

M8398

THREADED SPACERS

DISTRIBUTION

MODULE

PANEL T

CONNECTOR

8C18L-15

|
INTERNAL TO CABINET <w————t———s EXTERNAL
TO CABINET

Figure

2-8

BC22N-10

BCl8L-15

Connection

INTERNAL

FOR

USE ONLY -

2.6

DMZ32

INSTALLATION CHECKOOT

The following procedure is used to check-out the installation of
the

DMZ32.

Remove the BC22N-10 cable from J1 of the M8398 module.

Install the Local T1 Loopback (H3028) connector into J1 of

the M8398

module

(Figure

2-9).

H3028 G

A
E

M8398

Figure 2-9 H3028 Loopback Connectoi Installed'on‘figgés
3.

Power up the VAX and execute diagnostic EVDAE for 2 passes

with event
how

(Refer to Chapter 4 for details on

flag 3 set.

execute

EVDAE).

If a failure occurs, check the following:
e

Seating

M8398

module

1in

the

DD11-DK backplane
©¢

e
IF

ROM seating on

Seating

connector
THE

REFER

H3028

the

loopback

in Jl

FAULT

the M8398 module

CHAPTER

NOT

THEN

FOR

CORRECTED,

CORRECTIVE

ACTION.

- FOR

INTERNAL

USE ONLY -

After

two

successful

passes,

remove the

H3028

loopgack

connector from the M8398 module and connect the BC22N-10
cable between M8398 module J1 and
the
2 X 4
I/O
panel
insert (Refer to Figure 2-10).

gat1.k—1|

- 8C22N-10

80X

FRONT

OF
CABINET

Figure

2-10

BC22N-10

1/Q BULKHEAD

Cable between

1 / PANEL

M8398

and

INTERNAL

FOR

I/0

Bulkhead

USE

ONLY -

the *L
Install the H3027 loopback connector (Figure 2-11) to the
-

I/0 Panel side of the I/O Panel connector

(outside of

cabinet), and execute diagnostic EVDAE setting event flag 3
for two passes without errors.

If a failure occurs, check the Tl cable for proper seatlng
.

at both ends.

IF THE FAULT IS NOT
CORRECTIVE ACTION.

If the H301l4

REFER

CORRECTED,

installed

CHAPTER

in a remote location,

4 - FOR
To- s

the

customer's responsibility to supply and install the Remote
Tl cable.

(Refer to Appendix C for Tl cable information.)-

mgflfima

~r
|

—

o———

—

|
|

H3027

LOOPBACK CONNECTOR

N P

- -~

/O PANEL

INSERT

NOTE

THE LOCATION OF THIS I/0 PANEL
INSERT CONNECTOR WILL VARY

WITH EACH UNIT. THIS IS
ONLY A TYPICAL
REPRESENTATION.

Figure 2-11 H3027 Loopback Connector Installed on 1/0 Bulkhead

2-21

- FOR

INTERNAL USE ONLY -

Remove

the

Connect

panel.

H3027

the

loopback

Remote

(Refer

Figure

Connector

cable

from

BCl8L-15

the

I/0

the

Bulkhead.

I/0

2-12).

Install the H3027 loopback connector
(Figure 2-12)
to the
opposite end of the Remote Tl cable or BCI8L-15 and
execute
EVDAE diagnostic for 2 passes with event flag 3 set.

NOTE

This loopback test can only be performed
if the Tl cable length is 2500 feet or
less in length.

REMOTE CABLE

(REFER TO APPENDIX 8)

Figure

2-12

H3027

2X4 1/0 PANEL

Loopback Connected

Remote

End

Tl .Cable

2-22
-

FOR

INTERNAL

USE

ONLY

After two successful passes of EVDAE,

remove the H3027 loopback connector.

cable or BCl18L-15
(Figure

connector

input

D
e

e
S

e
=

R
=1

the

stop the diagnostic,

Connect the Remote Tl
on

the

H301l4

2-13).

S
=38
e
”flfififl%?@flflfi@flfi@fififlllfi
:
-

BCi18L-15

CONNECTOR

2X4 1/O PANEL

Figure

2-13

Connector

Between

I/0

and

H3014

2-23

FOR

INTERNAL

USE

ONLY

Install

the

connectors

six

which

(6)

are

29-24929-00

supplied

29-24929-4»

kit

1loopback

(Figure

2-14).

H3014

Distribution

Panel

INTERNAL

ONLY

LOOPBACK CONNECTOR

plee)o]

Pl
-

staggered

the CD

HANDLE

el
oo

{REAR VIEW)

(Fhonr VIEW)

[t==2)

,"‘o

ojoooo* |

"iv

O,O

249-24929-0
@

Figure

2-14

29-24929-00

Installed

2-24

FOR

USE

10.

Execute

EVDAE

diagnostic

for

passes

with

event

flag

set.

If a failure occurs,

check the following:

Tl cable for proper seating

H3014 modules for proper seating

H3014 power supply voltages

THE

FAULT

NOT

CORRECTED,

REFER

CHAPTER 4

CORRECTIVE ACTION.

FOR
,

CAUTION

order

the

11.

12.

check

seating,

proper

the

refer

procedures

FRU's

removing

the

checking

power

H301l4

for

followed

the

for

boards

Chapter

H3014

when

and

supply voltages.

Upon successful completion of EVDAE, remove the 29-24929-00
loopback connectors from the H3014 distribution panel.

Execute

loopback

the

set

DM232

for details.

(loop

on-line diagnostic
type

equals

EVDAF with

four).

Refer

internal
Chapter

If a failure occurs, perform the following:

Check for proper module seating

Verify proper

check

THE

UNIBUS placement

voltages

FAULT

NOT

CORRECTED,

REFER

CHAPTER

- FOR

INTERNAL

FOR

CORRECTIVE ACTION.
—

USE

ONLY -

13.

After

the

User

DMZ32

Exerciser

during

UETP,

has

passed

Test

Program

check

the

the system

EVDAF

diagnostic,

(UETP).

configuration.

failure

execute

occurs

14, After the DMZ32 has passed UETP, return the system to the
normal

configuration

and

initiate

customer

acceptance.

a M8395
2

EQUIVALENT

TEST

LOOPBACK

gfiieNmoo
.l

CONNECTOR =l FR.0|T

{

H3027

o0 cgimecmn
TEST

"i':'} )

PANEL

{

VIEW) VIEW)

8CIBL-1S

EQUIVALENT

;

—

H3248

CONNECTOR
TEST

LU A

UNIBUS INTERFACE MODULE:

M8338

BC22 E/F OR

H3027
CONNECTOR

\ry casLe

REAR CABINET
AREA

. Hofa2 FeffD
»

HI9652-MF

Figure 2-15

DMZ32

Installation Overview

2-26

FOR

INTERNAL

USE

ONLY -

2.7

DMZ32 INSTALLATION CHECK-OFF LIST

PHASE I - Preinstallation Consfiderations:
1.

System Requirements

M8398 Module

(Section

1.4)

1l.4.1)

UNIBUS Loading

Power Requirements

Interrupt Priority Level

DMZ32 Device Address Determination
B.

H301l4 Distribution Panel

(Section 1.4.2)

Power Requirements

PHASE

M8398

/__/

Installation

Unpack DMZ32 option and verify .that all
components were

Table 2-1) ®

E-63

set

for

shipped

proper

(Section

2.2

E-53

through

and

/____/

priority level

(Section 2.5.1 and Figure 2-1).
3.

set

UNIBUS

/__/

Address,

refer to Appendix B
(Figure 2-1).

for UNIBUS Address

E-53 S9 set to "ON"

(Figure 2-1).

E-53

NPG wire (CAl -CB1l) removed.

Backplane resistance checks complete.

With Power ON, verify selected SPC backplane

S10

voltages.

set

"ON"

—

(Figure 2-1).

Install'M8398 Module into selected SPC slot

the backplane.

FOR

INTERNAL

/_/

USE

ONLY

PHASE

Installation

- H3014

III

Unpack H3014 distribution panel and
that all components were shipped.

Install H301l4

3.
4.

into proper

verify

cabinet.

Connect power cable to Switched output of

power controller.

If the H3014
the

(Section

is received

2.5.2)

in a cabinet,

remove

shipping bracket.

PHASE 1V - Cable Installation
1.

Connect

the

Remove blank

X
4 I/0

panel

1/0 panel

from

supplied with

the DMZ32 to the BC22N-10 cable.

Frame to make space for
supplied with

the DMZ32.

Connect BC22N-10 cable to

Connect BCl8L-15

the FCC Bulkhead

the new I/0 panel

/__/

I1/0

the M8398 module.

cable between

panel

and

the BC22N-10

the

H3014

distribution

panel.

PHASE V - DMZ32
1.

Run

System Checkout

EVDAE with

M8398 module
2.

Connéct M8398 module

panel
3.

Run

(Figure

2-10).

EVDAE with

the

cable
4,

When

(Section
power

connected

the

/_/

the BC22N-10

cable

I/0

VAR

H3027

connected

the

BC22N-10

2.6).
applied

LEDs display a
Table 4-4).

H3028

(Section 2.6).

normal

/_/
to

the

H3014,

indication

the

front

(Refer

panel

Run EVDAE with BC1l8L-15 connected to the I/O panel

with

H3027

of the cable.

the

2500

far

turnaround

end

connected

the

open

end

(If a remote cable, connect the H3027

feet or less

the

cable

in length.)

ONLY

FOR

the cable

INTERNAL

USE

ONLY

Disconnect the H3027 from the Tl cable and connect

the Tl cable to

six

the

(6)

the H3014

29-24929-00

H3014

T1 Connector.

staggered

Distribution

Panel

Then place

turnaround

and

run

connectors

EVDAE.

EVDAE

runs

successfully under all conditions (Section 2.6). _/_/

EVDAF

runs

successfully under all

(Section 2.6).

Remove all

loopback connectors,

over to the customer.

conditions

and

turn

system

S
-

2-29

FOR

INTERNAL

USE

ONLY

CHAPTER THREE

PROGRAMMING

INTRODUCTION

3.1

This

chapter

describes

bits

of each register are defined.

operation of the DMZ32.

the different

registers

which

control

the

Each register is listed and the different

Overview

3.1.1

The DMZ32 asychronous multiplexer contains 3 octets of 8

transmit

and 8 receive lines each making a total of 24 lines available for

data.

baud

These 24

rates

lines may be programmed

bps

from 50

19,200 bps.

capability of operating with different

operate at

transmit baud

receive and

All lines have modem control and each receive and transmit

rates.

line can be independently enabled or disabled.

rate

one -of

lines have the

All

and

receive

vector

interrupt

transmit

There is

each

for

sepa-

the

These vectors may be enabled or disabled independently.
Separate TX READY and RX DATA AVAILABLE bits exist for each octet

octets.

These octets

to allow for non-interrupt-driven device operation.

e,
each
can be operated independently from each other. For exampl
octets.
other
the
of
any
affecting
octet can be reset without
In

the

DM2Z32,

characters

receive

line

respective

their

with

numbers and status information are stored in a 128 character silo.

An interrupt may be generated for

Each octet has its own RX silo.
the

following

reasons:

the

RX silo

the

contains

programmed

time

silo was read.

characters,

been

has

silo

interval

for

non-empty
since

the

last

than

time

the

The DMZ32 may be programmed to echo all received characters.

Each transmit line has its own separate 32 character TX silo.

characters

respective TX silo.

transmitted

must

first

1loaded

into

All
the

The TX silo may be loaded in one of two ways.

The first method (Programmed Mode) is to use CPU move instructichs

to load one or two characters at a time into the proper Indirect

Address

Memory

Access

(DMA)

The

second

transfers

method

(DMA

from main

Mode)

memory.

via

Once

Direct

DMA

transfer has been initiated, characters are automatically put into

the TX silo every time the TX silo count drops below 8 characters.

This cycle continues until the DMA byte count

When the

zero.

last character to be transmitted is fetched from the TX silo, an
interrupt

silo may

will

generated

flushed,

resulting

requested.

emptying

zeroing any remaining DMA byte count.
If
bit is HIGH, an interrupt is generated.

desired,

each

the TX silo and

the TX interrupt enable

- FOR

INTERNAL

USE ONLY -

Each

transmit

The

line's

When

enabled,

transmit

line may

receiver
a

line

character

received

will

operated

must

XOFF

the

1In

transmit

XOFF character will

either

enabled

disabled.

3.1.2

Device Registers

the operating system

long RX silo timeouts as
the- transmitter.

The

UNIBUS

DMZ32

-device- registers,

This

mode

the time-critical

for

each

three

octet.

XON/XOFF

mode

cause

the

respective

XON
both

the octet's

transmissions have been

operation

XOFF

(3)

The

allows

for

1nstant1y dlsables
:
-

groups
of four

four

device

(4)-

registers

are:

3.1.3
The

mode.

operate.

receiving

be enabled.

be stored

aware that

interface uses

one

this

will

line

the XON or

automatic

for

like manner,

cases,
silo

character

be disabled.

cause

enabled

Octet

@
®

Octet Line Parameter Register (LINE.PAR.REG)
Octet
Receive
Buffer
(RX.BUF/OCTET
Receive

Control

Octet

Parameter

and

Status

(RSP.REG)

Indirect

Registers

is used

for

the

Silo

(IND.REG)

Octet Control and Status Register

OCTET.CSR

(OCTED.CSR)

(OCTET.CSR)

following:

‘To select one of four Indirect Registers
To select a register line number
To initiate a Master Reset
To
To
To
To
3.1.4

Octet

enable/disable receive and transmit interrupts
indicate when data is in the RX silo
indicate when a TX silo is empty
indicate a NXM error
Line Parameter

The LINE.PAR.REG

is used

The bits per

specify

(LINE.PAR.REG)

the

character

The number of stop bits per
The

receive

following:

and

transmit

frame

baud rates

The parity enable/disable and

3.1.5
The

The

sense

Octet Receive Buffer (RX.BUF/bCTET Receive Silo Parameter
(RSP.REG)

RSP.REG

used

read

the

following:

The

received character

The

status

The

RSP.REG

used

silo

byte

associated

write:

alarm

timeout

N
with

the

received

character.

FOR

INTERNAL

USE

value

3-2
-

ONLY

3.1.6

Octet

Indirect Register

(IND.REG)

The IND.REG is used as a window to one of four registers (IND.REG

IND.REG O

IND.REG 1

e
®

Write to

the

can

following

The

0, IND.REG 1, IND.REG 2, or IND.REG 3).
performed by the appropriate registers:

TX silo

Read the TX silo count
Read the RX modem signals

Enable a preempt characte
Set

the TX modem signals

Functions

reporting

the

Enable

Control

Maintenance

the

Enable

modem

signal change
Flush the TX silo

Break the TX line
Enable the receiver

and/or

transmit-

ter

IND.REG 2

IND.REG 3

e
®

Enable auto XON/XOFF

Specify

buffer

Specify

buffer

bits

DMA

upper

the

bits

DMA

address

Specify the DMA transfer byte count

INITIAL OPERATION

3.2

Before the DMZ32 can be prepared for

system

lower 16

the

address

must

itself

diagnostic

operation.

routine

conditions:

checked

within

the

for

loading line parameters,

proper

DMZ32

This

self-diagnostic

power

operation.

run

run under

e
e
e

After UNIBUS Initialization (INIT)
M8398 pushbutton switch
AAQ00 to the diagnostic register

verify

the

proper

following

PARAMETER INITIALIZATION

3.3
After an

the

self-

INIT or a Master Reset has occurred within the DMZ32,

the

load

the

transmit and receive buffers are empty and all lines are disabled.

Before

operation

can

begin,

the

Operating

System

must

line parameter register (LINE.PAR.REGK15:0>) with the desired

parameters

for

specific lines

before enabling

these

lines.

(The

are
line parameter registers must be loaded even if all parameters
Zero.)

3-3

FOR

INTERNAL

USE ONLY -

The

line

the

lower

number

<2:0>.

parameters

byte

the

program

After

interrupt

enable

(CSR<K15: 0>),

and

receive

Modem

cleared

the

any

signals

are

Reset.

Modem

program

ready

Signals

the

3.4

The

the

appropriate

not

set,

TX.RDY

INIT

and

signals

going

the

DMZ32

every

lines.

desired

transmit

DMZ32

can

Master

time

INIT

the

Reset.
are

there

are

Master

the
the

loaded

Reset

set,

then

of data

the

is
is

can

occur,

line

IND.REG

line

is
and

line must
If

held

programmed

performed

disabled
not

whenever

active

when

due

has to
line.

the --

one or

causes

transmit

silo

the

appropriate

bit

marking

echo

becomes

will

contain

OCTET.CSR<13>

aborted

clears

cleared

DMA

TX.RDY.

before

set

the

empty

DMZ32

can

state

remote

due

a silo flush.

then

line

interrupt

number

The

act

important

assert

read CSR<K15:0>
If TX.RDY 1is

transmission

transfer.
This

where
has

reading

because

TX.RDY

the

been

for

TX.RDY

another
- %=

To minimize the possibility of interrupt overload from occurring,
the

program

should

the

program

decides

transmit

attempt
to

fill

keep

silo count register

transmitted

from

the

silo

count

indicates

how

many

full

this,

silo

silos

specific

full

silo,

all

may

times.

inspect

the

to determine how many characters have

been

Because

while

count

positions
zero

being

filled.

there

are

indicates

The

the

empty

silo

silo.

silo,

and

a silo count of 32 indicates a full silo.
The transmit silo count
registers may be examined at any time and any particular line's
silo may be loaded or flushed.
These operations may be performed
regardless

whether

the

not.

line

disabled

transmission

stops

transmitted.

However,

respective

after

the

will

remain

and

upon

the

will

resume

normal.

transmit

while

the

contents

silo

enabled.

setting

the

auto

set,

the

for

TX.RDY becomes

OCTET.CSRK2:0>

OCTET.CSR<15:0>

transmit

line

empty.

stopped

into

also

Modem B

affected

the transmit vector is posted.
The program should
in order to determine the cause of the interrupt.
silo

set

a change on

leaving the silo to be transmitted or

TX.I.E.

The

not

OPERATION

asserted

character

the

after

bit

(providing
loopback)
.

from

appropriate

Status

enable

INIT or

LINE.SELECT

the

and

only

transmission

enabling

coming

contained

update.

TRANSMIT

Before

sets

Control

signal

device register

loaded

after

cleared

Control

optionally

the

time

Parameter

respective device
more

are

Line

bits

Control

the

lines.

Master

- RX

whose

order

its

silo

current

silo

enabling

line

enabled

being

character

emptied,

has

been

1loaded,

the

line,

transmission

3-4

the

been

silo

from

:
-

FOR

INTERNAL

USE

ONLY

3.5

The

bits

RECEIVER OPERATION

receive lines

data.

All

the

lines

DMZ32

are enabled by

A line must be enabled

IND.REG

in each octet share a

is no DMA mode for the receiver.

There
3.6

setting

appropriate

in order to receive

128 character

receive silo.

DEVICE REGISTERS AND VECTOR ASSIGNMENTS

A block of 16 words has been assigned to the iegisters which
control

line

the

DMZ32.

floating

block

CSR

range

via

includes

CSRs

for

the

<12:5>

the

base

the

The base address

DIP

switches

device

floating

the

for

Appendix

(Refer

This

for each octet.

registers

CSRs

and

four

is selected 1in
DMZ32' -module.

and

addresses

vectors.)

The

floating

words

(refer

determine

bits

registers

that

are

Access by word means
register

(DATOB)

DMZ32

3-1).
the

hex

Eight

starting

contiguous

switches

block

DMZ32

the

address.

The

line's

transmit

silo.

causes

data

UNIBUS cycle.

than

data

byte

used

out

(DATO)

rather

registers

the

that

registers

access

instruction

that operates on the
a

out

The DMZ32 pays no attention to the least

significant UNIBUS address bit

only.

are

in this block can only be addressed by word except for

contained
the

Figure

that

are word access-

Because of this, the register block must be located on a 20

address

devices as

boundary.

shown

The

in Figure

sixteen

3-1l.

words

are

allocated

the

- FOR INTERNAL USE ONLY -

7750‘408

DMZ32 BASE +0

CONFIGURATION CONTROL ANO STATUS

CONFIG. CSR

DIAGNOSTIC CONTROL
AND STATUS
DIAG.CSR

7760444,

DMZ32.BASE.

OCTET CONTROL AND STATUS
LINE PARAMETER

LINE.PAR.REG
RECEIVER BUFFER/RECEIVE SILO PARAMETER

IND.REG[OL[11.{2}.13)

INDIRECT REGISTERS

OCTET CONTROL AND STATUS
UNE PARAMETER
UNE.PAR.REG
RECEIVER BUFFER/RECEIVE SILO PARAMETER

INOIRECT REGISTERS

OCTET O BASE +6

[

OCTET 1 BASE +0

. ,

OCTET 1 BASE +2

OCTET

OCTET 2 BASE +0

LINE PARAMETER

OCTET 2 BASE +2

RECEIVER BUFFER/RECEIVE SILO PARAMETER

RAX.BUF/RSP.AREG

OCTET 2 BASE +6

IND.REG{O}.[1].{2].[3]

Allocation

OCTET

OCTET 2 .B,A'.S_E_fé R

INDIRECT REGISTERS

DMZ32 Word

OCTET

OCTET L ONTROL AND STATUS

LINE.PAR.REG

3-1

OCTET O BASE +2

OCTET | BASE +6

IND.REG {01.{1L.12].{3]

Figure

OCTET 1 BASE +4

RX.BUF/RSP.REG

77604648

OCTET O BASE +0

OCTET O BASE +4

RX.BUF/RSP.REG

7760454a

of Device

Registers

Control/Statu
.

FOR

INTERNAL

USE

ONLY

3.7

CONFIGURATION CONTROL AND STATUS REGISTER

(CONFIG.CSR)

The Configuration Control and Status Register has an address which.

establishes

the

rest

the

remaining

addresses

the

for

DMZ32.

Refer to Appendix A for the floating device addresses and vectors.

This

(Figure

3-=2)

used

the

VAX/VMS

Operating

System at the time the system is being automatically configured.
The autoconfiguration routine scans each bit

the

CONFIG.CSR(O0]

Refer

Figure

3-1.1

registers.

for

a bit map

CONFIG. CSR

INTERFACE TYPE

overview of .the

DMZ32

VECTOR BASE A0DDRESS

NUMBER QOF OCTETS

DIAG. CSR 1

‘

DIAGNOSTIC

164

CONTROL

o068

TRANSMIT LINE

TRANSMIT

UNUSED

INTEARUPT
ENABLE

TRANSMITTER

REG. NUMBER

RECEIVE

air

O
INOIRECT

NUMBSER

OCTET.CSR (READ/WRlTE)

DATA

o0t 00
R

MASTER

NDIRECT REG

RESET

AVAILABLE ’

UNUSED 81T

UINE NUMBER

RECE;vi

READY

INTERRUPT

ENABLE
TRANSMIT

QMA ERROA

TRANSMIT BAUD RATE |

RECEIVE BAUD RATE

f::::f““

LINE.PAR.REG (READ/WRITE)

JINE SELECT

T
STOP CODE | samiry
|

—

enasie

EVEN/ODD
PARITY

RECEVE LNe

RECEIVE CaRaCTES

;

RX.BUFF (READ ONLY)

DATA

FRAMING

VALID

€RAOR

DATA SET

CHANGE

QVERRUN

PARITY

ERAOR

EAROR

RSP.REG (WRITE ONLY)

Figure

RESERVED aI1s

3-1.1

%
RECEIVER SILO ALARM

TiargTMy 7

DMZ32 Register Bit Map Overview
3-7

FOR

INTERNAL

USE

ONLY

IND.REG O (WRITE ONLY)
]

TRANSMIT CHARACTER

TRANSMIT CHARACTES

USED BITS

TRANSMIT SILO COUNT

IND.REG 0 (READ ONLY)

RING

CLeamTo | useR

I:0ICATOR | SEND

RECEIVE

OATA SET

CARRIER

READY

DETECT

1§

UNUSED

oOsa

UNUSED
TS
1

IND.REG 1

(READ/WRITE)

PREEMPT

UNUSED | DATA

MAINTENANCE | FLUSH

RECEIVE | TRANSMIT

CONTROL

ENABLE

TERMINAL |

TRANSMIT |

READY
REQUEST

TO SEND

SiLO

ENaBLE

LINE

OATA

usEn

OATA SET

SIGNAL

TRANSMIT

CHANGE

AUTO

ENABLE

XON/XOF$

RATE

SREAK

TRANSANT

SELECT

IND.REG 2 (READ/WRITE)

IND.REG 3 (READ/WRITE)

TRANSMIT BUFFER ADDRESS

EERE

RANSMIT

BUFFER

DMA CHARACTER COUNT

ADDRESS

Figure

3-1.1

DMZ32

Bit

Map

Overview

- Continued

3-8
-

FOR

INTERNAL

USE

ONLY

]

used by

interrupt vectors

six

There are

the

contiguous

M8398

There are no switches on the M8398 module that

the first vector.

have control over the

interrupt vectors

the

interrupt vectors as

are under software control.

to Table 3-1 for the bit map of the configuration control
Refer
(MUX.CSR[0]<K15:>).

and status register

This

cycle.

may

accessed

INTERFACE TYPE

with

read

modify

(RMW)

write

VECTOR BASE ADORESS

NUMBER OF OCTETS

%'?rTsE‘Zr.cs) of the WIRUS vechr sddiess ace lways =evo!
dherefoce only the fop eisht hifs £2:2) of +he VNIBUS

ace war mfi«l inh CONFIG,CSR £7:8).

Figure 3-2

Table 3-1

Configuration Control and Status
Bit Map

vector

(CONFIG.CSR)

Configuration Control and Status Register Functions
—----—-—----

-—----—-_----—-‘--—--‘-—'——-—--—-fi-——‘——---—--——--—-,

<7:0>

Vector

The CONFIG.CSR<7:0>

loaded

vector
six

is read/write and is

autoconfiguration

address

floating

vector

interrupt

with

vector

Vector

°®

Receive

vector

[1]<8:2>

Transmit

vector

[2]1<8:2>

Receive

vector

[0]<8:2>

for

FIRST octet

for

FIRST octet

.for

The

addresses

are as follows:

°®

the

[0]<8:2>.

SECOND

octet

- FOR

INTERNAL

USE

ONLY -

Table

3-1

Configuration Control and
- Continued

Bits

Title

<7:0>

Vector

Cont.

Vector [3]<8:2> Transmit vector

for

SECOND octet,
Vector
[4]<8:2>

Receive

vector

for THIRD octet,
Vector
([5]<8:2>

and
Transmit

vector

for

There are
interrupt

no switches
vectors.

locations

are

other

vectors

are

shown

VECTOR

[0]<9:2>

= 320

VECTOR

[1]<9:2>

)

VECTOR

[2]1<9:2>

= 330

VECTOR

[3]<9:2>

VECTOR

[4]1<9:2>

340

VECTOR

[5]<K9:2>

344

bits

INIT.D

executing

are

.. ..

The

324
334

cleared

upon

receipt

the microdiagnostic.

CONFIG.CSR<11l:8> will always be read as a
binary value of three.
In CONFIG.CSR<9:8>

24-line

octets)

1Interface

... . -

below.

These

...

operating

time.

assumed

Number

the

autoconfiguration

when

<12:15>

THIRD octet.

on the DM2Z32 for
The
six
vector

loaded

system

contiguous

<8:11>

Functions

Function

Status Register

binary
unit

three

(l1l)

1is

(three

to be

eight line
configured.

present,

groups

CONFIG.CSR<12:15> will always be read as

zero and controls the loading of drivers.
Since
only
asynchronous
lines
are
available, only asynchronous drivers will

loaded.

FOR

INTERNAL

USE

ONLY

'DIAGNOSTIC CONTROL AND STATUS REGISTER (DIAG.CSR)

3.8

Device Base

status

and

control

The diagnoétic

has

address

1is the
The diagnostic control and status register (DIAG.CSR)
The DIAG.CSR can be thought of as a
UNIBUS window into the DMZ32.
device used by the host processor in controlling trunk loopback

functions, monitoring test status, requesting/reporting microcode
T
revision numbers, and starting on-board diagnostics.=~
Diagnostic Control and Status Register (DIAG.CSRK15:0>) =~
|
|
'
Write -

3.8.1
The

bit

map

Figure 3-3.1.

the

for

DMZ.CSR[2]<15:0>

NOT be

accessed by word only.

Bits

with

RMW cycle,

Diagnostic

NOT

Control

USED

Status

and

(DIAG.CSRK15:0> - Write - Bit Map

Diagnostic Control and Stutus Register DIAG.CSR<K15:0>
- Write =~

Decimal

Octal

Function/Test Description
o

WRITTEN TO DIAG CSR<15:8>
<15:8>

can

9 o7

DIAGNOSTIC COMMAND

3-3.1

Hex

accessed

1§

Table 3-2.1

(Refer to

Table 3-2.1 for the functions performed.

Figure

seen

This 1s for DMF32 -conformity.

can

Write

The DMZ32 only uses the upper byte (<15:8>) of this

170

252

Start Self Test

125

Halt UBI Microcode

Read UBI Microcode Version Number

Read TIU Microcode Version Number

Read RDP Microcode Version Number

Set Local Trunk Loopback
3-11

- FOR

INTERNAL

USE ONLY -

Table 3-2.1 Diagnostic Control and Status Register DIAG.CSR<15:0>
- Continued Bits

Hex

Decimal

Octal

Function/Test Description

Clear Local

Set

Clear ALL Lines Loopback (EIA)

33
-

S T

D G

3.8.2

The

GED GNP AES G

D W

63
TED GNP T

WD AR

D G

Diagnostic Control

bit

Read

map

for

Figure 3-3.2.
This

SR GE

accessed

Read
G

and

D GNP MED G

Lines

T1
IR

Status

Loopback

Status
D G

WD G

Loopback
(EIA)

D WD WD G

D W

WD WD

b WAL

DIAG.CSRK15:0>

’

the

(Refer

ALL

Trunk

may

DIAG.CSR[2]<K15:0>

NOT

Table 3-2.2

Read

can

seen

can

for the functions performed.

accessed

with

RMW

cycle,

by word only.
15

STATUS OR ERROR RETURNED

VALID
REG

ERROR/
STATUS

Figure

3-3.2

Diagnostic

Control

DIAG.CSRK15:0>-

Table
Y WS W

3-2.2

D GED EED G

YRS GED SED

Diagnostic

P GED CHD CED

Bits

Hex

<15>

(valid

D G

M) WA W

GE GNP GED GNP GNP G

Decimal

Data

Control

Flagq)

WHD GED GED GED GED UV

Octal

Read

and
IR

and

- Bit

Status

AR AL G

D G

CuD

D GHD CED

Function/Test

This

bit

the

content

set,

Status

the

Map

DIAG.CSR<15:0>

D GED WD SER S

D A

D VD WD G

GMD GES SRS G

Description

used

the

valid.

indicate

diagnostic
If

microcode

executing

the

selftest.

FOR

INTERNAL

USE

ONLY

1is

not

still

Diagnostic Control and Status Register DIAG.CSR<15:0>

Table 3-2.2

- Continued -

Function/Test Description

Octal

Decimal

Bits

Hex

<14>

(Status or Error Flag)

the

indicates

Dbit

This

content of the diagostic register
is a status return or an error
return.

0
1

<13:0>

= Status
= Error

(Status or Error Return)

Refer to Table 4-1 for details.

3.9

(OCTET.CSR)

STATUS

AND

CONTROL

OCTET

Read/Write -

The Octet Control and Status Régister (OCTET.CSRK15:0>) has an
The bit map for the OCTET.CSR<15:0>
address of Octet Base + 0.
(Refer to Table 3-3 for the bit
can be seen in Figure 3-4.

)

functions performed by this register.)

This register may NOT be accessed with a RMW cycle.
1

TRANSMIT LINE

NUMBER

FRANSMIT

REG. NUMBER

RECEIVE

aIT

ENABLE
TRANSMITTER
READY

UNUSED

INTERRUPT

02
INDIRECT

DATA

MASTER

AVAILABLE

UNUSED SI1T

INDIRECT REG.

RESET

UNE NUMBER

RECEIVE

INTERRUPT
ENABLE

TRANSMIT

QMA ERROR

Figure 3-4

Octet Control and Status Register (OCTET.CSR) Bit Map

Table 3-3
Bits

<15>

Octet Control and Status Register Functions

Title

Transmitter

Ready

Function

This bit is set when an

enabled

line

(pointed

silo

into

the

OCTET.CSR

<10:8>) has loaded the last character from

the

respective

line holding

3-13

- FOR

INTERNAL USE

ONLY -

This

read/write

Reset,

INIT,

<14>

bit

Transmit

When set,

Interrupt

requests to be made
when TX.RDY is set.

Enable

the

cleared

act

this bit allows

Master

Reset

Master

this

interrupt

the

reading

transmit

vector

clears

thls

INIT

read/write bit.
<13>

This bit is used only when the respectivé

Transmit
DMZ
. NXM

line

in DMA mode.

This bit

is set

the
indicated
line
if
the
DMZ32
controller either did not receive

Error

least

microseconds

after

for. .

UNIBUS
a SSYN

issuing

MSYN, or the controller could not become
bus master
for
at
least
32 microseconds
after having asserted BUS NPR.
OCTET.CSR
<2:0> points to the line in error.

This read only bit
program
reads
this

<12>

Not

Used

<11>

Not

Used

<10:8>

Transmit

When
TX.RDY
contains

1is

Line
Number

the

number

the

and

are

become

empty.

set,

Receive
Data

Available

<6>

Receive

Transmit

whose

silo

read

only,

Master

Reset,

INIT,

this

are

has

Line

bits

cleared

line

the

—

These

or the act of reading
<7>

INIT.

Reset,

is cleared when the register,
by
Master

This Read ONLY bit is set whenever data is
available in the receive silo and is
automatically cleared when the receive
silo is empty.
Receive

Data

Available

cleared

Master

(RX.DATA.AVAIL)

Reset

Interrupt

When this read/write bit is
requests can be made to the

Enable

under

the
°

INIT.

set, interrupt
receive vector

following conditions:
Receive

Data

set

longer

for

Available
than

the

has

been

timeout

period
°

characters

receive

silo

have

entered

the

3-14

- FOR INTERNAL USE ONLY -

Table

Bits

Octet Line Control and Status Register Functions

3-3

- Continued

Function

Title

a Master
cleared byhis
---P
bit 1s
==-=
read/write
"""""" se=s=s==
<5>

INIT.

Reset or

When this read/write bit is set, a Master
This bit remains set
Reset is initiated.
while resetting is taking place "and is

Master
Reset

cleared

after

Master

failure.

The

Reset

has occurred.

This bit will remain set after a self-test
program

should

not

access

device registers of the octet being reset
(other

than

occurring.
a

Master

effect.

this

one)

while

reset

Writing to this register while

Reset

Master

taking place

takes

Reset

has

500

microseconds.
NOTE

Performing the Master
only affects one octet.

<4:3>

<2:0>

Reset function
Each octet must

—

individually reset.

Indirect

These read/write bits point to one of four

Number

automatically

Indirect

Line

Number

(4)

indirect registers.

cleared

These bits are

Master

Reset

oOr

INIT.

These read/write bits point to one of

eight (8) indirect register groups. This
register is accessed through location
Octet

Base

These bits

ically cleared by Master

- FOR

are automat-

Reset

INIT.

INTERNAL USE ONLY -

3.10

LINE

PARAMETER REGISTER

(LINE.PAR.REG<K15:0>)

The Line Parameter Register has an address of Octet
bit map for the line parameter register can be seen

Refer

This

Table

3-4

for

individual

bit

The line
ALWAYS
the

parameter

loaded

particular

enabled

(even

line

Base + 2.
in Figure

The
3-5.

RMW cycle.

the

should

parameter

before

the

Read/Write

functions.

with

the

for

line

parameters

are

all

Zeros).

Bits

<2:0>

are

used

specify

number when writing only.
OCTET.CSR

<2:0>

TRANSMIT BAUD RATE |

selects

the

When

the

line

number.

RECEIVE BAUD RATE'

line

reading,

&u:g:mn

UNE SELECT

STOP CODE | PARITY
ENABLE

EVEN/OOD
PARITY

Figure

3-5

Line

Parameter

Table 3-4
D

Bits

<15:12>

D CED GED AN

CED

DGR

Transmit
Rate

(LINE.PAR.REG.<K15:0>)

Line Parameter Register Functions
GES

Title

Baud

D TED

AR WD GU

WED GAD

ED CED

D W

SED G

TED

GEP

GHD WD

GNP S

Function

When
.

line

is selected,

specify one
baud rates:

Bits

the

<15:12>

these bits

following

Baud

Rate

Baud

0001

Baud

0010

110

Baud

0011
0100
0101

134.5
150
300

Baud
Baud
Baud

0000

transmit

3-16
-

FOR

INTERNAL

USE

ONLY

Table

3-4

Line

Parameter

1200

Baud

1001

2000

Baud

1100

4800

Baud

1111

19200

Baud

Split baud rate capability is supported.
rate

specifies

the

rate.

Bits

<15:12>

Baud

0101

300

Baud

011l

1200

Baud

1001

2000

Bauwd ..

1100

4800

Baud

1111

19200

Baud

1110

Baud

9600

This bit specifies the number of stop bits
follows:

logic 0 = 1 stop bit
logic l

2 stop bits

When parity enable is set, even/odd parity

specifies

which

parity

is being used. as

follows:

Parity Enable

Baud

2400

for the selected line as

<5>

Baud

1800

1010

Baud
Baud
Baud
Baud

600

1000

Parity

Baud

110
134.5
150

0110

Even/0dd

= _

0010
0011
0100

0001

<6>

Rate

0000

Stop Code

the receive baud
selected receiver's

When a line is selected,
baud

<7>

Baud

9600

1110

Baud Rate

Baud

2400

1010

Receive

Baud

1800

1000

Baud

600

0110

0111

<11:8>

- Continued

Logic 0

Logic 1l

odd character parity

even character parity

When set, this bit causes a parity biE to
be generated on transmission.
bit

checked

and

stripped

of the selected line.

The parilty

reception

3-17
-

FOR

INTERNAL

USE

ONLY

Table

<4:3>

3-4

GED

GNP

GED

Line

GNY

GRS

TED CED

Parameter

Character

ORI

CED

WED WED

GED

These

GhE

GUL CED

two

Select

line as

follows:

These
the

written.
for

GND

CED GED

bits

CED

specify

counting

Continued

GES

GED

the

start,

enabled)

for

CEL

GND

SUD

CED

character
stop,

the

and

selected

per character

bits per character
bits per character
bits per character

bits
1line

bits

(not

00 = 5
0l = 6
10 = 7
11 = 8
Line

CED CED

length

parity bits,

<2:0>

Functions

contain
whose

Selection

reading

the

binary

parameter
is

done

number

are

particular
by

of
be

line

way

OCTET.CSR<K2:0>.

FOR

INTERNAL

USE

ONLY

3.11

RECEIVE BUFFER REGISTER

(RX.BUFK15:0>)

The

receive buffer register has

and

Table

- Read Only -

an address of Octet Base + 4,

Refer to Figure 3-6 for the bit map of the receive buffer register
register.

in this

functions of each bit contained

the

3-5 for

It is through the receive buffer register that the program_accesEvery time this register is read, data
ses the receive silo.
in

words

silo

the

shift down by one

cycles access successive silo entries.

read

Successive

position.

This receive silo not only

contains receive characters and associated status information, but
also contains data set change information.

Master Reset or INIT flushes the silo.

This register may NOT be accessed with a RMW cycle.

i8 14 13 12 11

)

Figure 3-6

‘

Receive Buffer Register

Table 3-5
VD

RECEIVE CHARACTER

ERROR

—

Receveune |
NUMBER

PARITY

OVERAUN

D WIS W

08 ,07

FRAMING | DATA SET
CHANGE
ERROR

DATA
VALID

D YD CED IR G

(RX.BUF)

- Read Only - Bit Map

Receive Buffer Register Functions

N TED WEP WIS CED GND WD UR W

D wEE WD W

TR WD

D WD W

S WD

D SN G

N G

R SIS A

D G

Bits

Title

Function

<15>

Data

When this bit is set, the remaining bits

valid

are valid.

loaded

into

This bit

the

set when data is

receive buffer

This bit

is cleared by Master

there

Reset,

INIT,

long

This bit will remain set as
is data in the buffer.

or when the receive buffer becomes empty.

<l4>

Overrun

Error

This bit is only useful

(RX.BUF<K11>) is clear.

one

or more

if Data Set Change

This bit is set 1f

characters

were

lost

on the line due to the silo being full.

<13>

Framing

Error

This bit

is only useful
if Data

(RX.BUF<11>)

the

line

received
the

time

which

the

was

the

first

the

character

spacing

(0)

stop

bit

was

FOR

INTERNAL

3-19

Set Change

This bit is set 1if

is clear.

was

state

sampled.

USE

ONLY -

Table

3-5

Receive

Buffer

Functions

Continued

Function
D

D WD

CER

This bit
Change

<10:8>

<7:0>

R YD

WS G

D G

D GED

) GED W

is only useful
if the Data

error

has

which

the

enabled

been

character

Data
Set

S W

(RX.BUF<K1ll>)

bit will be
<11>

clear.

for

the

Set
parity

line

and

the

received,

incorrectly,

received

this

set.

When this bit is set, RX.BUF<7:0> is

Change

zero, RX.BUFK10:8> contains the line
number of the modem line that has changed.

Receive

These bits

contain

Line

the line on which a character was received

Number

and

set change.experienced.

Receive

These bits contain the received character
only if RX.BUFK1l> is clear.
1If parity is

Character

a data

enabled,

the

Characters

the binary number

parity

less

justified

are

right

RX.BUFK11l>

the

RX.MODEM signal.

bits

will

set

bit

than

eight

with

stripped

bits

the

high

off.

length

order

zero.

zero

1is

and

set,

the

FOR

then

program

INTERNAL

RX.BUFK7:0>

should

USE

read

ONLY

3.12

"RECEIVE SILO

- Write

(RSP.REGK15:0>)

PARAMETER REGISTER

Only -

The receive silo parameter register has an address of Octet Base +

The
This register is write only and is accessed by word.
alarm
silo
receive silo parameter register contains the receive
timeout. Refer to Figure 3-7 for the bit map of the receive silo
4.

parameter

This register may MNOT be accessed by a RMW cycle.
o8

_ RECEIVER SILO ALARM TIMEOUT

RESERVED BITS

Figure 3-7

Receive Silo Parameter Register (RSP.REG) - Write Only

Table 3-6

Bit Map

Receive Silo Parameter Register Functions
O - D G CED TS SR TED SED I WD WD W S CHp D W ED

- D D D WD D WD D P I U W WD S NS D S GED D WD CES WD WD G GAD MER AN GED S GRS SUB D D D TP Chb M CHD GT OED CHD WD GND b W D

Bits

Title

Reserved Bits

<15:8>
<7:0>

Function

Receive

These bits specify the silo alarm timeout

Alarm

data has been sitting in the silo for a

Silo

Timeout

An interrupt will be generated if

period.

time equal to or longer than the timeout

period.

read,

occurs,

Every

Master

time

Reset

receive

the

restarting the

occurs

internal

silo

INIT

timer.

The timeout period can range from 0 to
Loading a
approximately 255 milliseconds.
value of zero into this register causes an
infinite

timeout.

following

The

these eight

shows

bits

progression

specify

the

silo

how .

alarm

rate:

Infinite timeout

00000000

00000001

00000010

Approximately 2 milli-

00000011l

Approximately 3 milli-

3-21

Approximately 1 milliseconds

timeout.

seconds

timeout.

seconds

timeout.

- FOR

INTERNAL

USE ONLY -

Table
-

3-6

Receive Silo

Parameter

. D P D D WED D D NS WP WD GED GED WD Sb NS P SEG S WED IR D WEN D GV W WED WD W VED WS D D VNS GIR D VED R WIS WD D WD D WD D D D G G

Bits
-

Title

S G GES. D VD GNP WD WD

D G

GNP G WD GED

- Continued

D . D D

e -

Function
D VS VD W THD WD SN G CED W

D G

P WD MNP GHD

D Ul

P WP

D GES MNP W

D WD WH WD

D G} G

GED GED SN

S W

D MD

R WD

D D W

<7:0> - Continued
e¢

11111111

Maximum

timeout,

approx-

:
imately 255 milliseconds.

Approximately 1 millisecond is added for
each bit

increment.

microcode

accurate.

timeout

Master

The

set

Reset

1loops

This

and

timer

receive

value

based

not

very

1 after

silo

alarm

INTERNAL

INIT.

FOR

USE

ONLY

INDIRECT REGISTERS

3.13

of the
There are 32 indirect registers associated with each octet

DMZ32.

Oonly the generic indirect registers are covered 1in this

chapter.
The generic indirect registers
IND.REG 1, IND.REG 2, and IND.REG 3.

The

indirect

the

registers

are

addressed

covered

the

indicate

the

the Octet Control and Status Register <4:0>.
address

referenced,

OCTET.CSR<2:0>

are

IND.REG

five-bit

address

in--

The lower three bits
1line

being

number

and the upper two bits OCTET.CSR<4:3> select which

indirect register of that line is being accessed.

- FOR

INTERNAL

USE

ONLY -

3.14

INDIRECT REGISTER

The indirect register
This

write

(IND.REG[0]<15:0>)

- Write Only -

of Octet Base + 6.
[0] has an address
while

the

into

the

" Writing to this register enters one or two characters 1nto

the

silo.
two

This

data

should

this

will

Mode

PROGRAMMED

writing

only

operation.

written

still

load

is permissable but will

only

Mode

DMA

characters

result

operation

in the mixing of the

streams.

for the selected line.

transmit silo

character
this

WORD,

for

example;

byte

into the silo first.

characters are loaded into the silo.
loaded

‘is 'a BYTE,
loaded

the

UNIBUS

If the write to

DATO,

The character

then

two

in. the lower

If the write to this register

for example UNIBUS DATOB, then only the lower byte is

into the silo,

and

the high order

character

ignored.

The bit map for the indirect register 0 - Write Only - can be seen
in

Figure

This

3-8.

NOT be accessed

with

3-8

Indirect

RMW cycle.

o7
TRANSMIT CHARACTER

TRANSMIT CHARACTER

Figure

(IND.REG[0]<15:0>)
Only

Bit Map - Write

Bits

Title

Function

<15:0>

Transmit

This register is reserved for data that is

Character
Buffer

being

transmitted.

3-24

FOR

INTERNAL

USE

ONLY -

INDIRECT REGISTER (IND.REG([0]<15:0>) - Read Only -

3.15

The

The indirect register [0] has an address of Octet Base + 6.

bit map for indirect register (IND>REG[0]<15:0>) - Read Only - can

be seen in Figure 3-=9.

This register may NOT be accessed by a RMW cycle.

USED 8ITS

TRANSMIT SILO COUNT

CLEAR TO ustla

RING

INDICATOR | SEND

DATA SET

CARRIER

READY

DETECT

Figure 3-9

‘

RECEIVE

UNUSED

Indirect Register (IND.REG[0]<15:0>) Bit Map - Read

Table 3-8

Only

- Read Only - Functions

Indirect Register 0

--—--—--—_--—»

.---_—---—--—‘---——-_-o-—-”—-—d--‘-_‘—--“-fl-c--——---——

Bits

Title

Function

<15:8>

Receive

This byte contains the receive modem

All modem

status for the selected line.

Modem

signals represented in this register come

Status

from

data

the

equipment

communications

The MODEM.RX byte is updated after

(DCE).

a Master Reset or

the RX silo.

INIT but not

flagged

If the receive silo is full

and data set change enable

(IND.REG[1]<5>)

is set, a data set change will be flagged

only after

this

when

<15>

Data

Set

Ready

<14>

Ring

Indicator

way,

the

data

silo

set
is

becomes

changes

non-full.

are

not

1In

lost

full.

This bit reflects the state of the Data

Set line (RS232C circuit CC)

coming from

the modem connected to the selected line.

This bit reflects the state of the Ring

Indicator line

from

line.

the modem

3-25

(RS232C circuit CE) coming
connected

- FOR

the

selected

INTERNAL USE ONLY -

Table

Bits

1Indirect Register
Continued

Title

<13> -

<12>

3-8

Carrier

Detect

Clear
to

Send

Read

Only

- Functions -

Function

This bit reflects the state of the

Received
Line
(RS232C circuit

Signal
Dectector
1line
CF) coming from the modem

connected

selected

the

line.

This bit reflects the state the Clear to

Send line

from

(RS232C circuit CB)

the

modem connected

This

bit

connected

the

for

whatever

coming

to the

selected .

‘line.

<11>

Not Used

<10>

User

Receive

distribution

RS232C

panel.

connector

This

purpose

bit

the

may

user

the

used

desires.

<9:8>

Not Used

<7:0>

Transmit
Silo

These bits contain the number of entries
in the 32-character transmit silo for a

Count

selected
Master

line.

Reset

They

are

cleared

after

INIT.

FOR

INTERNAL

USE

ONLY

INDIRECT REGISTER (IND.REG[1]<15:0>) = Read/Write -

3.16

The indirect register [l] has an address of Octet Base + 6. This
This
read/write register is cleared by a Master Reset or INIT.
to
prior
tion
informa
iate
register must be loaded with the appropr
using a

The bit

Reset.

line after Master

for

map

indirect

the

read/write can be seen in Figure 3-10.

-=(IND.REG[1]<15:0>)

This register may be accessed by a RMW cycle.

1S,

UNUSED

DATA

UNUSED
BITS

PRAEEMPY

TERMINAL |
READY

BIT

REGQUEST

TO SEND

DATA

SIGNAL
RATE

RECEIVE | TRANSMIT

MAINTENANCE | FLUSH
DATA SEt¥

USER

TRANSMIT

ENABLE
UNE

TRANSMIT | ENABLE
SiLo

CONTRQL

CHANGE

BREAK

TRANSMIT

AUTO

XON/XOFF

_ENABLE

SELECT

Figure

3-10

Table 3-9
Bits

Title

<15:8>

Modem

Indirect

Bit Map

(IND.REG[1]<15:0>)

Read/Write -

Indirect Register 1 - Read/Write - Functions

Transmit

Function

the
These read/write bytes represent

transmit
line.

modem

for

signals

These bits are cleared by an

by a Master Reset.
always

the

selected

INIT but

not

The modem signal lines

follow these bits.

FOR

INTERNAL

USE

ONLY

Table

3-9

Indirect

Read/Write

Functions

set by the program to.preempt

Continued

Preempt

This

bit

silo

output.

transmit

The

low

byte

then

will

The

user

may

that

loaded

This

allows

character

transmitted.

PROGRAMMED

interrupt

send
a character

load

the

user

program

character

the

then

indirect

the

transmission

DMA

(presumably

XON

XOFF) and then continue the PROGRAMMED or
DMA transmission.
When this process is

performed,

take note that there is no loss

character

characters

effective

When
bit

<14:13>

- Not Used -

<12>

Request

transmit

indirect

data.

The

inserted

output

stream

cleared by Master

Reset or

This bit

the

controls

the modem.

Request

condition.

When

Send

Request

When

Send

that

this

bit

1line

this

line

bit

the

This

data.

this

bit

INIT.

Request

RS232C circuit CA)

preempt

into

loaded,

is automatically cleared.

(EIA

Send

simply

Send

Line

set,

the

connected

the

clear,

the

in the OFF condi-

tion.
<11>

- Not Used

<10>

Data

Signal
Rate

Select

This bit

controls

Select line

the

connected

the

OFF condition.

set,

clear,

the

Data

Signal

Rate

(EIA RS232C circuit CH)
to

the modem.

Signal

Data

condition.

the Data

When

that

this

Rate

Select

When

this

bit

line

bit

Signal Rate Select line 1is

FOR

INTERNAL

USE

ONLY -

Table 3-9

Functions -

- Read/Write -

Indirect Register 1

Continued

Bits

Title

Function

<9>

Data

This bit controls the Data Terminal line

Ready

connected to the modem.

Terminal

(EIA RS232C circuit CD)

set,

the

Data Terminal

that is

When this bit is

Readx)ling

is in

B
the ON condition. When this bit is clear,
e
OFF B
the Data Terminal Ready line is in_th
condition.

<8>

User
Transmit

This line is connected to pin 18 of the
line's 25-pin RS232C connector on the

distribution

panel.

RS232C unassigned pin.

associated

EIA

used

for

This line and the
may

with

This

whatever purpose the user desires.

<7:0>

Line
Control

These read/write bits are cleared by a
Master Reset or INIT. These bits must

be loaded with the appropriate information

prior to using a line after a Master Reset

<7:6>

Maintenance

Control

Function

has been generated.

These maintenance bits have the following

meanings:

Normal Operation

Automatic Echo Mode.

put

this mode

into

the

operation data

received

silo

and

automatically retransmitted regard-

less of the state of TX.ENA) at the

same baud

rate

the

transmitter.

RX.ENA must be set for this mode to

work.

Normal

transmitter operation

is not inhibited

in this mode.

- FOR INTERNAL USE ONLY -

Table

Bits

<7:6>
SR

3-9

1Indirect

Title

Read/Write

Functions

Function

Maintenance
Control
" ‘Function

- Continued

Internal Line Loopback
.
In
this mode of operatlon,
the
specific
line's.
output
- is

internally

connected

the

line's

(within

the

data

1looped

back.

All

signals

are

looped

panel) .

Received
modem

distribution

back when operating

input

in this mode.

Shared
RAM Loopback
In
this mode of operation,
specific

line's

internally

connected

output

the

the
is

line's

input.
All data and modem signals
are looped back at the UBI"
= TIU
interface (Shared RAM).

<5>

Data

When set,

Change

receive signals for the selected line.

Set

Enable

this bit enables the multiplexer

for

When

such

silo

will

transition

the modem

transition

found,

the

Set

Change

bit

result is that the entry into the receive
have

the

Data

set,

<4>

Flush

The

transmit silo

Silo

setting

flushed

and

this

for

DMA

bit

the

causes

selected

terminated.

the

line

to be

Disabling

the

transmitter does not cause the silo to be
flushed.

Disabling

the

transmitter

simply

inhibits
the silo

character
transmission.
After
has been
flushed,
¢this
bit
1is
automatically cleared and TX.RDY is set.

3-30
-

FOR

INTERNAL

USE

ONLY -

.
-

Table 3-9

- Read/Write - Functions -

Indirect Register 1
Continued

_--—-cc---s——‘—c----a---'——-‘-G-GQGQ-‘---‘oc-—-———o--—,-———n--q--

When this bit
transmits

character

spaces

has

Transmission

the EIA Data line

set,

the-

after

the break

after

resumes

current-.

serialized.

being

finished

cleared.
<2>

Receive
Enable

When this bit is set, the receiver for the

When this bit

selected line is enabled.
is

clear,

line

set

the

zero

while

the

for

receiver

is disabled.

selected

receive enable

character

1is

being

assembled, then the character is lost.
<1>

Tx
Auto

XON/XOFF

When this bit is set,

the receipt of an

XOFF causes the transmit enable bit to be

The receipt of an XON causes the
'reset.
The XON/XOFF character 1is
bit to be set.

put

into the RX silo

receiver

the

enabled.

<0>

Transmit
Enable

When this bit is set, the transmitter for

the selected -line is enabled.

bit

selected

enable

being

clear,

line

the

cleared

transmitted,

the transmitter

transmitter

is disabled.
while

then

character

occurs after

of an XON or XOFF character

[l]

- FOR

for

the

transmit
1is

the disabling of
the

character has been transmitted.
this bit if IND.REG

When this

sets

complete

Reception
or

<2> is set.

resets

INTERNAL USE ONLY -

3.17

INDIRECT

The indirect register
read/write

read

After

OCTET.CSR<4:3>

(IND.REG[2]<15:0>)

Read/Write -

not

write

cleared

Master

line

buffer

incremented

loaded

address

the

DMA mode

of operation.

the

lower

bits

with

respective line.

meaningful

the

DMA

Reset

address

buffer

the

automatically

respective line's DMA character count register.

The

This

has an address of Octet Base +6.

[2]

only

This

point

the

buffer

INIT.

the

respective

should

address

for

the

Writing to this register while the DMA character

count

non-zero will

Refer

to the Figure 3-11 for the bit map of the indirect register

(IND.REG[2])

_contained
If

mode.

DMA

and

have unpredictable results.

Table

3-10

for

the

function

the

bits

in this register.
error

The

encountered,

will

the

contain

line

the

will

address

taken

which

out

caused

DMA

the

error.

This

RMW cycle.

TRANSMIT BUFFER ADORESS

Figure

Table 3-10

Bits

<15:0>

(IND.REG[2]<15:0>)

Indirect

3-11

Indirect Register 2 . - Read/Write -

Map

Functions -

Continued

Title

Transmit
Buffer
Address

Bit

Read/Write -~

Function

The lower

16 bits of the DMA buffer

.address.

3-32

FOR

INTERNAL

USE

ONLY

INDIRECT REGISTER (IND.REG[3]<15:0>) - Read/Write -

3.18

The indirect register [3] has an address of Octet Base + 6.

This

these

read/write register contains the DMA character count and the upper

bits

two

registers initiates a DMA transfer.

the bit map of indirect register

Writing

address.

buffer

transmit

the

Refer to the Figure 3-12 for

(IND.REG[3]) and to Table 3-11

for the function of the bits contained in this register.

The DMA character count is cleared by a Master Reset or INIT.

The

If a DMA error is encountered,

two address bits are not cleared.

Bits <15:14> will

the DMA character count will be set to zero.

contain the UNIBUS address bit <17:16> which caused the error.

This register may be accessed by a RMW cycle.

MIT

BUFFER

DMA CHARACTER COUNT

ADORESS

Figure

(IND.REG({3]<15:0>)
Register
Read/Write -

Indirect

3-12

Indirect Register 3

Table 3-11

Continued

Bits

Title

<15:14>

Transmit

- Read/Write -

Bit

Map |

Functions -

Function

These bits <17:16> contain the UNIBUS

address bits.

Buffer

Address

<13:0>

These bits contain the respective line's

DMA

14-bit character counts.

Character

Count

NOTE

characters

the

cycles,

decremented.

while

the

non-zero

are

DMA

character

count

character

«count

Writing

DMA

will

via

fetched

have

this

DMA

1is

unpredictable

results.

FOR

INTERNAL USE ONLY -

CHAPTER FOUR

SERVICE

INTRODUCTION

4.1

This

describes

chapter

field

replacable wunits (FRU's),

remove/replace procedures, preventive maintenance, self test,

diagnostics and removal/replacement procedures.

4.2
The

DMZ32 FIELD REPLACEABLE UNITS
DMZ32

designed

for

ease

of maintainability.

Internal

g fault
the
microdiagnostics and system diagnostics aid in isolatin
to a specific FRU.

The FRUs of the DMZ32 are as follows:

UNIBUS Interface Module (M8398)
H3014 Processor Module (29-24797-00)

H3014 Expansion Module (29-24798-00)

H3014 Power Supply Assembly (29-24799-00)
H3014 Fan

(29-24800-00)

H3014 Chassis with I/0O Panel (29-24796-00)
10 foot internal cable (BC22N-10)
15 foot external cable

(BCl8L-15)

For the removal/replacement procedures for each of the FRUs refer
to

section 4.13.

- FOR

INTERNAL USE ONLY

PREVENTIVE MAINTENANCE

4.3

There is

DMZ32.

scheduled

preventive

maintenance

performed

the

following

the

should be checked:

Check the voltages on the DD11-DK backplane

Check

the

voltages

H3014 distribution panel

the

processor

module

Check the voltages on the expansion module of the
H3014 distribution panel
Check H3014 disribution panel

fan operation

DD11-DK Voltage Test Points
+5V

(CA2)

+15V

(CUl)

H3014 Voltage Test Points

Processor Module
TP14
TP1l3

TP12
TP1l

(Second Module)

- Figure 4-1

(BLACK) = Ground
(RED) = +5V
(BLUE) = +12V
(WHITE) = -12V

TP11 (WHITE) = =12V
TP12 (BLUE} = +12V

the

However, when system preventive maintenance is performed,

TP13 (RED) = +5V
TP14 (BLACK) = GND

’

---1zz£mm
| P2 [
l\ e
A= S

)

l‘\\!\‘\\‘
NA
!

]

Figure 4-1

Processor Module Test

Points

4-2
-

FOR

INTERNAL

USE

ONLY

Expansion Module (Top Module)
TP14
TP13
TP12

TP1ll

- Figure 4-2

(BLACK) = Ground
(RED) = +5V
(BLUE) = +12V

(WHITE)

= =12V

TP11 (WHITE) = =12V
TP12 (BLUE) = +12V
TP13 (RED) = +5V

TP14 (BLACK) = GNO

‘l

fT"l 1]

Figure 4-2

Expansion Module Test

Points

- FOR INTERNAL USE ONLY -

Power Supply Assembly - Figure 4-3
TB1-1

TBl-2
TTMB1-3
TBl-4

Input

NOT

Line Voltage

USED

- TB1l-5 - =12V
TBl-6

+12V

TB1l-8

+5V

TBl-7 - Chassis Ground

Figure

4-3

Power

Supply

Assembly Test

Points

4-4

- FOR

INTERNAL

USE ONLY

4.4

SELF-TEST DIAGNOSTIC

The self-test diagnostic

DMZ32

the

for

Memory (ROM) based microdiagnostic.
executed during the

on-board

Only

Read

The self-test diagnostic is

following:

Power-up

.
When self-test pushbutton is pressed
At UNIBUS initialization

to the dlagnostlc reglster

When writing aa00 (hex)

The results of the ROM based microdiagnostics can be seen by
reading

the

eight

(8)

Diodes

Light-emitting

(LEDs)

that- are-

Refer to Figure 4-4 for the proper

mounted on the M8398 module.

Refer to Table 4-1 for

orientation of how the LEDs are numbered.

the LED coded display, the function tested when a display is seen,

and the field replacable unit that is faulty for each display.

When

the

self-test

<iiagnost1c

finished,

through the LSB

(LED 0).

everything

has

rotating pattern that

passed the self-test, the LED's cycle in a

repeats over and over.

and

The pattern repeats from the MSB (LED 7)

0
MSB 7 654 321LS8

Figure

4-4

M8398

LEDs

4-5

FOR

INTERNAL

USE

ONLY

Table 4-1

M8398 LEDS
4|3(2(1}0

M8398 Coded LED Display

.
Diagnostic LEDS

Function Tested

Hex |Decimal|Octal

FRU
.Illegal Code

e|]

M8398 | Q Register Condition

Code

00-

M8398 | Working

ole

M8398 | Working Registers 8-18

M8398 | MSB of "A" & "B" Address
of Working Register

0-7

Registers

M8398 | Subroutine calls (4
Levels)

ole

M8398| Set Negative Bit

olo]e

M8398: Set~Carry Bit

M8398 | Clear N Bit, C Bit

M8398 | XOR Fugction, AUX Z Bit

®
®

M8398 | Rotate Left, Rotate Right

M8398 | Mask Function

ole

M8398 | Negate Function

0oC

ole .
ole|e

M8398 | Decrement Function
M83§8 OR Function

oD
OE

.15

ole oo

- Not Used -

M8398 | Shared RAM (Addressing)

M8398 | Shared RAM (Data)

WR & Q Register

)

°
.

o |eo

le]| |o

4-6
-

FOR

INTERNAL

USE

ONLY

M8398 Coded LED Display - Continued -

'Function Tested

ole

M8398|

ejofe

M8398|

‘

eole

Octet 0

I15

LS Addressing (.256K Blocks)

COMF<24:25>

LS Addressing

(Direct

M8398 | LS Addressing

(Process

COMJ<K23:16>

Space)

PROCK2:0>

Space)

ol®

(1K Sections)

EA PADRK1l:>

M8398)}

LS Data Indirect LO

ol®

)

M8398]|

LS Data Indirect HI
Octet 0

ole!

|[eole]

M8398|

LS Data Indirect LO

M8398|

LS Data Indirect HI

Octet 1

]

o e|e

Octet 1

)

eleje

Octet

Indirect HI

e,fe-—?Eiigf

olelole

M8398|

LS Data
Octet 2

ejlo|o|ole

M8398]

LS .Data Indirect LO
Maintenance Space

M8398|

LS Data Indirect Hi
Maintenance Space

M8398|

Starting DMA Tests

M8398|

Slave Sync Time-Out
During DMA DATO

M8398|

Data Compare Error On
DMA DATO

)
'

M8398| LS Data Indirect LO

- FOR

]

M8398| LS Addressing

Hex|Decimal|Octal

FrU

4|3/2/1]0|

Diagnostic LEDs

LEDs

M8398

INTERNAL USE

ONLY

Table 4-1

Table

4-1

M8398

M8398 PEDS

‘

Coded

LED Display

Continued

Diagnostic LEDs

Function Tested

S{4|3]2]1{0]

. fRU

Hex |Decimal |Octal

)

M8398 | Slave Sync Time-Out
On DMA DATI

)

TIU 2901

M8398 | Data Compare
DMA DATI

Error

M8398 | Failed To Become Master

o|e

)

o|leojeo

DATO or

DATI

- Reserved -

M8398 | Starting
TIU Self-Test

M8398 | TIU 2901

olo

M8398 | TIU 2901

M8398 | TIU Micro-Sequencer

eo|o

M8398 | TIU Micro-Sequencer

ejoje|e

M8398 | TIU Micro-Sequencer

M8398 | TIU Local

Store

M8398 | TIU Local Store

M8398|

M8398 | TIU

)

ole

Shared

RAM

M8398 | TIU

Interface

o e

M8398 | TIU T1 Interface

M8398 | TIU A23

Failure

|®

- Reserved -

oo e

)

Channel

M8398 | Tl Link Synchronization

Reserved

4-8
-

FOR

INTERNAL

USE

ONLY

Table 4-1

M8398 Coded LED Display - Continued -

M8398 LEDs

5{4]3({2/110

Diagnostic LEDs

Function Tested

Hex| Decimal}jOctal

FRU

- Reserved -

.57

- Reserved -

TR 3K el e
elej|oe

- Reserved - Reserved -

3B
3C

:Séi
60

73
74j

- Reserved -

eojeojolole

- Reserved -

olojojeole|0®

- Reserved -

§3

100

Path [Octet 0, Line 1]

101

eoloieo
°

ejlele

el oj|eje®

M8398 | Internal Local Tl Data

Path

)

M8398 | Internal Local T1 Data

M8398|

Internal Local Tl Data
Path [Octet 0, Line 2]

102

M8398|

Internal Local Tl Data
Path [Octet 0, Line 3]

103

M8398 | Internal Local T1 Data
Path [Octet 0, Line 4]

104

Internal Local Tl Data
Path [Octet 0, Line 5]

105

°
®

M8398|

Internal Local T1 Data

ol®

M8398

Line 6]

106

olo|®

M8398 | Internal Local Tl Data
Path [Octet 0, Line 7]

107

Line 0]

110

M8398 | Internal Local T1 Data
Path [Octet 1, Line 1]

111

Path

[Octet 0,

M8398 | Internal Local T1 Data

°
®

[Octet 0, Line 0]

Path

[Octet 1,

- FOR INTERNAL USE ONLY -

;

M8398 Coded LED Display - Continued -

4{31211}0

Diagnostic LEDs

Function Tested

M8398 LEDs

Hex |Decimal |Octal

FRU

M8398 | Internal Local Tl Data
Path [Octet 1, Line 2]

112

eole

M8398 | Internal Local T1l Data
Path [Octet 1, Line 3]

113

114

115

116

117

120

121

Path

[Octet

Line 4]

M8398 | Internal Local T1 Data
Path

[Octet

Line

eojefe

M8398 | Internal Local Tl Data

ojejo|e

M8398 | Internal Local T1 Data

Path

[Octet

Line 6]

Line 7]

|
§

M8398 | Internal Local Tl Data

)

Path

[Octet

M8398 | Internal
Path

Line 0]

Line

M8398 | Internal Local Tl Data

Path

[Octet

Line

ole

M8398 | Internal Local T1 Data
Path [Octet 2, Line 6]

oo |®

M8398 | Internal Local Tl Data

[Octet 2,

Line 4]

Path [Octet 2, Line 5]

[Octet

Line

122

123

M8398 | Internal Local Tl Data

Path

124

125

126

87.| 127

130

4-10

FOR

?
!

M8398 | Manual Tl Connector Data
:
Path [Octet 0, Line 0]

)

M8398 | Internal Local Tl Data
Path

Line 3]

;

Local Tl Data

[Octet

M8398 | Internal Local Tl Data

...,.1".

Table 4-1

INTERNAL

USE

ONLY

|
|

M8398 Coded LED Display - Continued -

Table 4-1

Hex |Decimal| Octal

FRO

4132110
e|le

Diagnostic LEDs

Function Tested

M8398 LEDs

M8398 | Manual Tl Connector Data

Path

[Octet 0,

Line 1]

131

eol0

M8398 | Manual T1 Connector Data
Path [Octet 0, Line 2]

132

"3IK )

M8398 | Manual T1 Connector Data
Path [Octet 0, Line 3]

133

134

M8398 | Manual T1 Connector Data
Path [Octet 0, Line 5]

135

M8398 | Manual T1 Connector Data
Path [Octet 0, Line 6]

136

M8398 | Manual T1 Connector Data
Path [Octet 0, Line 7]

137

M8398 | Manual T1 Connector Data
Path [Octet 1, Line 0]

140

141

142

143

100

144

101

145

102

o
146

103

147

M8398 | Manual T1 Connector Data

Path

ejole

eloio|oje

[Octet 0,

Line 4]

M8398 | Manual T1 Connector Data
:

Path

1, Line 1]
[Octet

M8398 | Manual T1 Connector Data

o/|®

M8398 { Manual T1 Connector Data

Path
Path

[Octet 1,
[Octet

Line 2]

Line

M8398 | Manual T1 Connector Data
Path [Octet 1, Line 4]

M8398 | Manual Tl Connector Data
Path

[Octet 1,

Line 5]

M8398 | Manual Tl Connector Data
Path [Octet 1, Line 6]

o leole

M8398 | Manual Tl Connector
Path

[Octet

Data

Line 7]

4-11

FOR

INTERNAL

USE

ONLY

Table 4-1

M8398 Coded LED Display - Continued -

41312|1f0
°

Diagnostic LEDs

Function Tested

M8398 LEDs

Hex|Decimal |Octal

FRO

:
104

:
150-

105

151.

6A |

106

152

M8398 | Manual T1 Connector Data
Path [Octet 2, Line 0]

M8398 | Manual T1 Connector Data
Path [Octet 2, Line 1]

M8398 | Manual T1 Connector Data

M8398 | Manual T1 Connector Data
Path [Octet 2, Line 3]

107

153

M8398 | Manual T1 Connector Data
Path [Octet 2, Line 4]

108

154

M8398 [ Manual T1 Connector Data
Path [Octet 2, Line 5]

109

155

110

156

111

157

- NOT USED -

112

160

- NOT USED -

113

161

Path

ole®

[Octet 2,

Line 2]

ele

ejo|e

M8398 | Manual T1 Connector Data

eojio|o|0®

M8398 | Manual T1 Connector Data
Path [Octet 2, Line 7]

Path

°
°

[Octet

Line 6]

- NOT USED -

114

162

- NOT USED -

115

163

- NOT USED -

116

164

- NOT USED -

117

165

ol®

- NOT USED -

118

166

ojeo}le

- NOT USED -

119

167

- NOT USED -

120

;70

- NOT USED -

121

171

- NOT USED -

122

172

ole
®

ole
ele

ejele

4-12

FOR

INTERNAL USE ONLY

Table 4-1

M8398 Coded LED Display - Continued -

5/41312(1({0

- NOT USED -

. 7B

123

173

- NOT USED =

124

174

- NOT USED -

125

175

- NOT USED -

126

176

H3014 Self-Test Failure

127

177

H3014
Processor

Internal EIA Data Path
[Octet 0, Line 0]

128

200

H3014
Processor

Internal EIA Data Path
[Octet 0, Line 1]

129

201

H3014
Processor

Internal EIA Data Path
[Octet 0, Line 2]

130

202

ole

H3014

Internal EIA Data Path

H3014

Internal EIA Data Path

H3014

Internal EIA Data Path

H301l4
Processor

Internal EIA Data Path
[Octet 0, Line 6]

oo @

H3014

Internal EIA Data Path

eleleolo
oleo oo |0

ejoj® 00 @

°®

H3014
Processor

Processor

Hex |Decimal|Octal

FRU

eolo

elo|o®
R

Diagnostic LEDs

Function Tested

M8398 LEDs

Processor

[Octet 0,

[Octet 0,
[Octet 0,

Line 4]
Line 5]

Processor

[Octet

H3014
Processor

Internal EIA Data Path
[Octet 1, Line 0]

H3014

Internal EIA Data Path

Processor

H3014

Processor

Line 3]

[Octet 1,

Line 7]

Line 1]

Internal EIA Data Path

[Octet 1, Line 2]

FOR

INTERNAL

§
83

131

203

132

204

133

205

134

206

135

207

388

136

210

137

211

138

212

USE

ONLY

Table 4-1

M8398 Coded LED Display - Continued '

FRU

el @

H3014

Internal EIA Data Path

H3014

Internal EIA Data Path

H3014

Internal

H3014

Internal EIA Data Path

H3014

Internal

EIA Data Path

H3014

Internal

EIA Data Path

H3014

Internal EIA Data Path

H3014

Internal

EIA Data Path

Processor

[Octet 2,

ele®

H3014

Internal

[Octet 2,

EIA Data Path

Processor

H3014
Processor

Internal EIA Data Path
[Octet 2, Line 4]

H3014

Internal

eol®

H3014
Processor

Internal EIA Data Path
[Octet 2, Line 6]

ele|e®

H3014

Internal EIA Data Path

Processor

ole|
olo|e®

Processor
Processor
Processor

)

Processor

Hex | Decimal Octa%

2/1({0

Processor

Diagnostic LEDs

Function Tested

M8398 LEDs

[Octet 1, Line 3]

[Octet 1, Line 4]

EIA Data

[Octet 1, Line 5]

[Octet 1,

Line 6]

[Octet 1, Line 7]
[Octet 2,

[Octet 2,

[Octet

Path

Line 0]

Line 1]
Line 2]

Line 3]

EIA Data

Line 5]

Path

[Octet 2, Line 7]

FOR

INTERNAL

;

139

- b

213

140

214

141

215

142

216

143

217

144

220

145

221

146

222

147

223

148

224

149

225

150

226

151

227

ONLY

-1

USE

M8398 Coded LED Display - Continued -

Table 4-1

- Illegal Codes -~

eleo

T "[Hex |Decimal]Octal

FROU

71615/41312]1]0

fDiagaestic~LEDsnmm

—

Function Tested

M8398 LEDs

UBI or TIU Failure

152

230

255

377

(through)

- Illegal Codes -

olojojeojoie|e e

UBI or TIU Failure

When all of the microdiagnostics are successfully passed, the LEDs

will display a walking ones
7

LEDs

period.

through

When

flashing

completed,

(ls) pattern.

sequentially

binary

This is indicated by

over

number

will

time

second

displayed

indicating the peak, 24 line receive character rate since the last

peak character rate number was displayed.
displayed for approximately two seconds.

the

binary

number

followed

The binary number 1is

After the two seconds,

second

number

that

In both cases,

the

binary

displays the peak 24 line transmit character rate.

lasts

also

for approximately two seconds.

binary number displayed can be translated

to peak characters per

second by dividing by two and multiplying by 1000.

binary number of

second.

walking

(00010000)

translates

This display

For example, a

characters

8000

FOR

INTERNAL

per

The TX peak character rate number is then followed by the

ones patter again.

USE

ONLY

DIAGNOSTICS

4.5

The DM232 is

This section describes the use of DMZ32 diagnostics.

The Level 3

supported by both Level 3 and Level 2R diagnostics.

diagnostic

standalone

diagnostic

diagnostic.

The purpose of EVDAE

Diagnostic Supervisor using direct I/O.
of

loopback

methods

are

used

specific component of the DMZ32.

used during the running of the
controlled or manually inserted.-

the

runs

verify

the

isolate

the

the DMZ32.

Various

The

that

Level

2R diagnostic enables

1level

option

diagnostic,

run

while

under

the

functionality
'

“

fault

The different loopback methods
EVDAE

field

are

service to

VMS.

under

running

Diagnostic

either
fault

The

Supervisor

software

isolate

Level

uses

the

EVDAF is the only Level

the VMS device driver.

interface of

wunder

EVDAE is the only Level 3

QIO

diagnostic.

DIAGNOSTIC SUPERVISOR

4.6

and Level 2R diagnostics run under the Diagnostic
Loading and using the Diagnostic Supervisor are

Both Level 3
Supervisor.

described in both the VAX-11/730 Diagnostic System Overview Manual

(EK-DS730-UG)

(EK-VX11D-UG)

the

and

DMZ32 CSR ADDRESS AND VECTOR ADDRESS

4.7

The DMZ32 CSR address
in

Guide

User's

System

Diagnostic

VAX

the

following

is used only as an example address

(760440)

diagnostic

procedures.

The

actual

address

(Refer to Appendix A for

floating

depends on the switch setting of E-53 on the M8398 module.
vector is software controlled.
device addresses and vectors.)
4.8

MANUALLY CONTROLLED

(HARDWARE)

The

LOOPBACK METHODS

There are five manually controlled loopback methods that are used
in

running

manually

the

DM232

put

diagnostics.

These

be placed on the line(s)
turnaround device

controlled

loopback

mode

are

loopback methods

that

Local

(H3028)

1loopbacks

operation.

used

require

or that the local modem
with the

The

manually

DMZ32

are as

follows:

T1 Loopback

Remote T1 Loopback

Single Line

(H3027)

EIA Loopback

(H3248)

Staggered Multiline Loopback

(29-24929-00)

Manual Analog Modem Loopback

FOR

INTERNAL

USE

ONLY

4.8.1

Local Tl Loopback (H3028)

l
The Local Tl Loopback test is conducted by field service personne---

using

the H3028

turnaround connector

The H3028

(Figure 4-=5).

turnaround connector is inserted at J1 on the M8398 Module.

When

the H3028 is inserted in J1 of the M8398 module, the T1 circuitry

up to and including the analog I/O of the M8398 module is checked
for proper operation.

This loopback is supported by EVDAE with event flag 3 set.

- POBNOWY
P WN
o

J1 PIN NUMBER

SIGNAL NAME
H 307 8

DATA IN A () <=
DATA IN B (=)
SIGNAL GROUND

Prza\

UNUSED

1eonns

UNUSED

UNUSED
UNUSED
UNUSED

DATA OUT A (+ —
DATA OUT B (=) =i

\1EE .

\\\_a/fi \Es
|

H3027

"“‘

T
29-24929 -6p

] = Loopsack
= VERIFIED GOOD

Figure 4-5

H3028 Loopback Connector
4-17

FOR

INTERNAL

USE

ONLY

Remote T1 Loopback

4.8.2

The Remote

(H3027)

conducted

test

Loopback

personnel using the H3027 turnaround connector

service

field

(Figure 4-6).

The

H3027 turnaround connector is inserted at either the I/0 bulkhead

between

the

and

module

M8398

end

panel

distribution

of the’ interconnecting cable
panel.

distribution

When

inserted into the I/0 panel insert connector (BC22N-10), the M8398

module and

the

internal

. proper: operation.
- the

distribution

This

loopback

interconnecting

cable

end

cable,

are

panel

the

is also checked for proper operation.

(BC18L-15)

is supported by EVDAE with event

NOTE

This

checked for

When the turnaround connector is connected to.

1loopback

remote

distance of
H3027

can

ONLY

installation
2500

flag 3

used

cable:

set.

maximum

feet.

SIGNAL NAME (REFERENCED TO H3027)

PIN NUMBER

DATA OUT A (+ ———Jpn-

CHASSIS GROUND
DATA IN A ()

CHASSIS GROUND

5
8

UNUSED

DATA OUT 8 (=) —

DATAIN 8 (=)

——u}

UNUSED

SIGNAL GROUND

UNUSED

H3028

H3014

BC22N-10

:§g§§2‘ =

==P=u$ J lc-.-

H3Q27

M =

BC!BL 15

29-2429-00

] = Loorsack

29-24429 -co

= VERIFIED GOOD

Figure 4-6 H3027 Loopback Connector

4-18

|
-

FOR

INTERNAL

USE

ONLY

4.8.3

Single Line EIA Loopback (H3248)

The Single Line EIA Loopback test is conducted by field service

using

personnel

the

turnaround

H3248

(Figure

connector

4-7),

The H3248 turnaround
supplied in the CD Kit (A2-W0707-10).
connector or at
RS232C
connector is inserted either at the H3014
the H3248 is
When
the EIA cable which connects to the modem.
the remote
on
y
connected to the suspect channel (directl
ches;4
receive/lat
drivers,
line
distribution panel), the connector,
proper
for
checked
are
channel
that
for
and all modem signals
turnaround connector

When the H3248

operation.

is connected to

the EIA cable associated with the channel, the EIA cable is also

checked for proper operation.

5 set and
This loopback is supported by EVDAE with event flag
ce.
sequen
attach
the
in
ed
EVDAF loopback type 5 select
PIN

TX DATA

RX DATA

RTS

€E 5

—

SIGNAL NAME

cTS

CARRIER

LOCAL LOOP

REARVIEW

TEST MODE

DATA SIGNALING RATE SELECT

RING

ENO OF A 6C22 CASLE

H3028

__
Z

FRONT VIEW

#3248 SINGLE LINE
TEST CONNECTOR
PLUGS INTO 34.412 OR

H3014

8C22N-10

e
E\CcEem=s
it=

1 fl

_?a-‘? 'F

O~
8C18L-1§

] = LooPBack

= VERIFIED GOOD
Figure

29-24929 '¢¢
4-7

H3248

Turnaround

Connector

4-19

FOR

INTERNAL

USE

ONLY

4.8.4

Staggered Multiline Loopback (29-24929-00)

The Staggered Multiline Loopback test is conducted- by field
(Figure 4-8)
(6) 29-24929-00
service personnel using six
the CD Kit
in
supplied
are
which
connectors
turnaround

The 29-24929-00 turnaround connectors are attached

(A2-WO707-10).

to the distribution panel so that all connectors have a loopback

attached.

when connected, this test checks for line interaction

and asynchronous line problems.

This loopback is supported by EVDAE with event flag 6 set.

35 through 41 of EVDAE are run when this connector is used.

Tests.

29-24929-0¢
TX DATA (n)

RST (n)

= CTS (n+1), CARRIER {n+1)

DTR {n)

’

RX DTA (n+1)

—— DSR (n+1)

LOCAL LOOP (n)

—

DATA RATE SELECT {n)

—= RING (n+1)

TX DATA (n+1)

TEST MODE {n+1)

1O}|

(FRONT VIEW)

RX DATA (n)

RTS (n+1)

CTS (n). CARRIER (n)

DTR (n+1)

DSR (n)

===

—=

TEST MODE (n)

LEERE

LOCAL LOOP (n+1)

DATA RATE SELECT (n+1)

~mmm—eme———stm

H3028

RING (n)

(BACK VIEW)

H3014
8C22N-10

——

H3Q27

I’

H3248

U YM

)

8C18L-15

3
3

29-2429-00

3 = woorsack

= VERIFIED GOOD

Figure 4-8

29-24 Q@29-p0

29-24929-00

Staggered Loopback Connector

4-20
-

FOR

INTERNAL

USE ONLY

4.8.5

The

Manual Analog Modem Loopback

manual

modem

analog

loopback

conducted

test

service personnel by pressing the analog loopback button

field

(AL)

the modem (Figure 4-8.1).
This loopback verifies that data can be
sent to and received from the local modem.
This loopback is supported by EVDAE with event flag
-7 set,
EVDAF with loopback type 7 selected in the attach sequence.

and

H3014

H3028

== i

el
==2S|

BC22N-10

‘H3027

- f

| )

BCi8L-15

29-2429-00

1 = woorsack

= VERIFIED GOOD

Figure

4-9

A-29429 ¢ &

Manual

Analog

Modem

Loopback

4-21
-

FOR

INTERNAL

USE

ONLY

4.9

SOFTWARE

LOOPBACK METHODS

There are many loopback methods that can be used

DMZ32 diagnostics.

with

the

DMZ32

are as

running

the

The software loopback methods that are used
follows:

Shared RAM Loopback
Local

Trunk

Loopback

Internal Single-line Loopback

Programmable Local Modem Loopback

- FOR INTERNAL USE ONLY -

4.9.1
The

Shared RAM Loopback

Shared

RAM

Loopback

to modem

signals

individual

applies

UBI

and

line basis

TIU

4-10.,)
This loopback

invoked

loops

without
at

data

the

Shared

UNIBUS

sections

only under

used

attaching

and

modem

RAM

interface

1loopback

Diagnostic Supervisor Event Flag

type

The

Shared

also

between

the

Figure

RAM

:
loopback

setting

This

(Refer

module.

EVDAE.

signals

lines.

other

affecting

)

the

POWER

SUPPLY

-3 I

SHARED

x TM

INTERFACE

15
<

RAM

— 5

CONTROL

INTERFACE | INTERFACE

MODEM

UNIBUS

o
:w:4a

fasim

EIA

| rerFace [] ORIVERS/

LINK

RECEIVERS

2
— 22

1;\/;7

ma398
o

H3014

CABLE

(] = vemmeo Gooo

[ - LooPgacy.

Figure 4-10

Shared RAM Loopback

FOR

Test

INTERNAL

USE

ONLY

4,9.2
The

Local Trunk Loopback
Local

Trunk

Loopback

1loops

driver/receiver on the M8398 module.

data

back

before

the

(Refer to Figure 4-11.)

This loopback is supported by EVDAE and the microdiagnostics.

The

Local Trunk Loopback is invoked by attaching loopback type 2 or by

setting Diagnostic Supervisor Event Flag

POWER

SUPPLY

UNIBUS

MODEM

— )S

CONTROL

INTERFACE | INTERFACE
.

al_]

SHARED

xg TM

INTERFACE

L;::;

— WP

AAM

INK

E1A

£iA

-\ ;

M8398

CABLE

" o

LINES

RECEIVERS

[

[— 23

DEMUX

ASYNC

—f Nrenrace [| ORIVERS/

H3014
"

_J/

E = VERIFIED GOOD

1= WworgAck-

Figure 4-11

Local Trunk Loopback Test

FOR

INTERNAL

USE

ONLY

4.,9.3

The

Internal Single-line or all lines Loopback

Single-line Loopback

tested (Refer to Figure 4-12).
time, on all lines selected.

channel

with the

is associated

being

A message is sent, one line at a

EIA latches, drivers, and receivers

are not tested with this loopback.

This loopback is used by EVDAE with event flag 4 set,’ and EVDAF
A
with loopback type 4 selected in the attach sequence.

POWER
SUPPLY

MODEM
CONTROL

T
UNIBUS
INTERFACE | INTERFACE
N

SHARED

3 L_
2z

EIA
1.544 |
/
T!
___}
MePs
1 vrerrace [] DRIVERS
T
RECEIVERS

RAM CE
INTERFA

x
<

0
—;

UINK

EIA
ASYNC
W 3|

o 22

e 23

DEMUX

malgs

—

CABLE

LINES

H3014

—

r_‘:] = VERIFIED GOOD

1= LooPRACK

Figure 4-12 Single Line Loopback Test

- FOR INTERNAL USE ONLY -

Programmable Local Modem Loopback

4.9.4

NOTE

only work with a
programmable local

This loopback will
modem that supports
loopback.

The

Programmable

signals

and

Loopback is

Local

will

selected

Modem

executed

Loopback

the

in the supervisor

verifies

the

Programmable

attach sequence and

modem control is available.

(Refer to Figure 4-13.)

This

loopback

supported

EVDAE

DMZ32
. Modem

Local - Modem

with

event

flag

the

set,

and

EVDAF with loopback type 8 selected in the attach sequence.

POWER

SUPPLY

MODEM

UNIBUS

CONTROL

INTERFACE | INTERFACE

SHARED

@ L-

p-]

EIA

1 nterrace [] ORIVERS/
RECEIVERS

“—11

RAM
INTERFACE

5P
%

;::;

M8398

DEMUX

H3014

= VERIFIED GOOD

[ 1 = LooPBACK.

Figure

4-13

Analog

Modem

Loopback

Test

4-26

- FOR INTERNAL USE ONLY -

4.10

DMZ32

LEVEL 3

(EVDAE)

DIAGNOSTIC

" There is only one Level 3 Diagnostic used to support the DMZ32,
This diagnostic operates under the VAX Diagnostic
EVDAE.
Supervisor

(VDS).

EVDAE Hardware Prerequisites

4.10.1

The following must be functional before the Level 3 dlagnostlc may

be used:

e VAX-1ll CPU

KB)

Memory

(512

UNIBUS

Adapter

EVDAE Software Diagnostic Requirements

4.10.2

requires VAX Diagnostic Supervisor
VAX Diagnostic Supervisors are as

The Level 3 Diagnostic (EVDAE)
The different
7.0 or later.
follows:

e
e
e

4.10.3
EVDAE

VAX 11/725/730 - ENSAA
VAX 11/750 - ECSAA
VAX 11/780/782 - ESSAA

is an

aid

system operation.
the DMZ32.
Table

—_—

EVDAE Diagnostic Description
to

field

service

personnel

verifing

proper

EVDAE is also used to aid in troubleshooting

A summary of the test performed by EVDAE islisted

in|

4-2.

Table 4-2

EVDAE Diagnostic Summary

Description

Test Number
1
2
3

5
6
7
8

Master Reset Line Control & TX Modem
Register

Master Reset Octet CSR
Line Parameter
TX Silo Count Master Reset
UNIBUS

INIT

9
10

Flush Silo Test
TX Ready,
TX
Enable

RX Data Available &

Count

Data Loopback

and

Master

Silo

Reset

’

4-27

_ FOR

INTERNAL

USE ONLY -

Table 4-2

EVDAE Diagnostic Summary - Continued Description

Test Number

15
16
17

TX Enable/Disable
Character Length
Load Word Test
Transmit Interrupt
Receive Interrupt

Multiple Interrupt

DMA Transfer

DMA Transfer, Unaligned Address

26
27

TX Break Test
Receive Silo Overrun

13
14

18
20

24
25

Receive Interrupt at 64 Characters

NPR-Nonexistent Memory

(NO AUTO - INC)

DMA Transfer (AUTO - INC)

DMA Transfer (Memory Extension)
Receive Silo Alarm Time-out
Prempt

29
30
31

Interaction Test
Dynamic Baud Rate
Dynamic Word Length

TX & RX Modem Signals

34
35
36

37
38

39
40

Dynamic Parity

Data

Modem

XON/XOFF

NOTE

Single

(H3248)

Line

(Staggered)

Framing Error

(Staggered)

Parity Error (Staggered)

(Staggered)

Auto Echo Mode

"RX & TX Modem (Staggered)
Data Set Change

(Staggered)

Split Baud Rate (Staggered)

41
42

Test

Manual Section

perform

Tests

41,

through

29-29249-00 loopback connectors must be
installed on the distribution panel

The manual intervention test (test 42) verifies- that a 256 byte

block, or multiple, of data can be transmitted error free.

_ FOR

INTERNAL USE ONLY -

4.10.4

Loading, Attaching,

After

‘the

and Running EVDAE

1loaded,

Supervisor

Dlagnostlc

operating

the

instructions in Figure 4-13 can be used for the EVDAE diagnostic.

The colored portlons are what the user enters into the system.
EVDAE

uses

the

sequence

input

VDS

standard

for

attaching

the

The user must. select the:,

UNIBUS adapter and loading the program.

lines to be tested, the baud rate to be used in external testing

and the loopback type°

On-line help may be obtained by typing HELP EVDAE.

SOR.

22-EXSAR-7.0-YYY

8-PEB-198) 09:40:14.80

08> Afl”mio S8t OWO 3 ¢

3 POR VAX/780 ATTACH THE UBA ON THE SBS

o8> A'i’?or'lio HUR DWO

3 POR VAX/750 TESTING

08> ATT DW7I0 WUB DWO
08> LOAD EYDAR

3
.

08> ATT DNR32

POR VAX/730 TESTING

; LOAD 7HE OM311 DIAGWOSTIC
:

ATTACK TTMHE OM3J2

OEVICE LIuR? DWO

THE 0NEI2 IS LINKED TO TTMNE UBA

OEVICE NANR? TZA

$ THE GENERIC NANE FOR OME12 UMIT 1

CSR? 760440

3 THE CSR ADRS IS 760440
3 (RANGE=760000-777776)

vEcToR? 300

; VECTOR AORS IS 100

m? s

(RANGR=300-776)

': BR INTERRUPT LEIVEL 1S S (RANGE®5-6)

TEST LINES(OCTETO)? 377

: LINES 0«7 OF OCTZT O WILL BE TESTED

LEVEL ] ONLY - TEST LINEZS(OCTETI)? 1

; LING O OF OCTET 1 WILL 8 TESTED
LEVEL

3 ONLY

- TEST LINES(OCTET2)? 208

L3NG 7 OF OCTEF 2 WILL BC TESTED

{OCTAL BIT HAP OF DESIRED LINES TO

;

TES?,

———

8170 © LING O,

8171 = LI¥g 1, m
RANGE =~ 000-137

: EXAMPLE: TEST unur XIJ
¢ TEST LINES 3IX, POUR, ONE ANO ZERO

SAUD RATE? )00

; BAUD RATE TO BC USED IN TEST )4
: MANUAL TEST.
; BAUD RATES THAT CAM BE SELICT
3 ARE, 50, 7S, 110, 133, 150, 100,

600,

LOOPBACK TYPE?

IIOO

1200,

9604,

1800,

INTERMAL

1%200

2000,

2440,

(AUTO)

3
—

) e mANOAL T CONIECT!ON

= SINGLE LINE - 1240 CONNECTOR

[NTERNAL

LINE

: 6 = STAGGERED CONNECTOR
i 7 « LOCAL MODE (MANUAL ANALOG LOOPBACK)
MOOEt CONTROL?

3S>

Figure 4-14

SELICT T2A

aenke

;

YRS

¢
:

(EXPANSION MODULE)
NO = DATA ONLY

Se LECT

PROGRAMMABLE LOCAL MODEM

HIOL4 CMA!“ MODEN OPTION

SPECIPIC

OMZ32

RUN,

Loading, Attaching, and Running EVDAE
4-29

_ FOR INTERNAL USE ONLY -

4.10.5

The

EVDAE Event Flags

loopback type

event flag.
event

attach

flag

also

selected

setting

the

appropriate

only ONE event flag is to be set at a time.

set overrides

the

type

loopback

selected

during

The

the

sequence.

To use a specific loopback type the following:

DS> CLEAR EVENT ALL

DS> SET EVENT X

s CLEAR PREVIOUS LOOPBACK,

;

IF ANY

X = EVENT FLAG = LOOPBACK TYPE
1 = SHARED RAM
2 = LOCAL TRUNK
3 = MANUAL T1 CONNECTOR
or H3028)
4

INTERNAL

.
(H3027

LINE

(H3248)

= SINGLE LINE

= LOCAL MODEM

(MANUAL)

(PROGRAMMABLE)

STAGGERED

LOCAL MODEM

LOOPBACK

4-30

_ FOR INTERNAL USE ONLY

4.11

DMZ32 LEVEL 2R

(EVDAF)

DIAGNOSTIC

EVDAF can run only with VAX/VMS Operating System version 4.0 or
later,

the

latest DMZ32

4.11.1

EVDAF Hardware Prerequisites

version 7.0 or later.

driver

and

the

VAX Diagnostic

)

Supervisor

.
The following must be functional before the Level 2R diagnostic

may be

used:

4.11.2

DW780, DW750, or DW730 fully tested without errors

VAX family of processors with at least the minimum VMS
-

configuration

Modem

(Optional)

EVDAF Software Diagnostic Requirements

This diagnostic

intended

test the

to a VAX family of processors.

attached

DMZ32

product that

The host VAX must have

the following:

Minimum fiefiory required by VMS Operating System

One (1) DM2Z32 module with H3014 distribution panel
oe

The VAX Diagnostic Supervisors are as follows:
e

VAX 11/725/730 - ENSAA
VAX

11/750

ECSAA

VAX 11/780/782 - ESSAA

‘

FOR

INTERNAL

USE

ONLY

4.11.3
This

EVDAF Diagnostic Description

diagnostic

following:

aid

field

personnel

service

the

Verification of customer installation

Service

calls:

device isolation and verification

A summary of the tests performed by EVDAF are listed in Table 4-3.
Table 4-3 EVDAF Diagnostic Summary

Test Number

Single

Description

Line Internal
Line

1Internal

Single

Modem Signals Loopback

EIA

Data

Loopback

‘

Data

(DMA)

(H3248)

External Data Loopback

4-32

FOR

INTERNAL

USE

ONLY

4.11.4

Loading, Attaching, and Running EVDAF

The DMZ32 architecture is very similar to the DMF32 therefore many

programming similarities exist.
the

async portion

three

(3)

The DMZ32 appears very much like

appear as if there are three DMF32s on the UNIBUS.

The program treats each octet selected as though it is a
.
'
For example:
device.

e When vyou select TZA only,
(Octet)

only the first
A

of the DMZ32 is tested.
select

When

you

TZB

(lines

(lines 0 - 7),
8

TZA

and

TZB,

the

program

15).

The program

treats

the

When TZA,

You

TZB,

and TZIC are selected,

TZA first, TZB second and TZC last.

must

(Refer

lines
]

tests

two

TZA

perform

the

attach

sequence

octets

Because of

the program must run twice.

separate
SR

then the program starts over and tests

as though they were two separate devices.
this,

will

vectors

and

CSRs

DMF32s.

the program runs

for

each

octet.

to Figure 4-15.)

On-line help may be obtained by typing HELP EVDAF

FOR

INTERNAL

USE

ONLY

Before EVDAF will run, the following must be performed:

After

the

(11/780/782=ESSAA,

; START SUPERVISOR

$ RUN ENSAA

11/725/730=ENSAA

;11/750=ECSAA,

the operating

loaded,

Supervisor

Diagnostic

Figure 4-15 can be used for the EVDAF diagnostic.

instruction in

The colored portions of Figure 4-15 are what the user enters into

DIAGNOSTIC

SUPERVISOR.

SBI

DWO

ZZ-ENSAA~-6.10-YYY

;

9-0CT-1983

09:40:14.80

ATTACH THE UBA TO THE SBI,

VAX/780

DSS ATT 33750 HUB OWO ’
OS> ATT 83730 HUB DWO

; FOR VAX/750 TESTING
; FOR VAX/730 TESTING

DS>

LOAD

DS>

ATT DM2Z32

ATTACH THE

1ST

DEVICE LINK? DWO

-e

ATT DW780

THE OPTION

IS LINKED TO THE UBA

DEVICE NAME?

;

THE OPTION

IS NAMED TZIA

DS>

THE CSR ADRS

EVDAF

TZA

VECTOR?

BR?

300

TEST

LINES

(OCTET

0)?

LOAD THE

LEVEL
BAUD

;

LINES

;

(OCTET BIT MAP OF DESIRED LINES TO

0-7

TEST,

EXAMPLE:

;

TEST

LINES

(OCTET

ONLY

- TEST LINES

(OCTET

LINK?

DWO

DEVICE

NAME?

T2B

CSR?

760440

Loading,

0 WILL

LINE

;

TESTS.

RATE

600,

9600,

TESTED

Level

Applies only

Level

USED

1800,

2000,

EXTERNAL

2400,

DATA

SELECTED

4800,

ARE:

(EIA)

(INTERNAL

LOCAL MOCEM

LOCAL MODEM

DOES THE

;

YES

;

ATTACH THE

2ND

OCTET

;

THE

OPTION

LINKED

THE

OPTION

NAMED

TZB

;

THE

CSR

;

(RANGE=760000-777776)

and

ZERO

only

;

AND

RATES THAT CAN BE

LOOPBACK TYPES
4 = LOCAL LINE

H3248

123
ONE

Applies

;
TO

19200

FOUR,

;

BAUD

1200,

LINES?

SIX,

Attaching,

(RANGE=5-6)

DMZ32

DEVICE

OCTET

ATT

LEVEL

DS>

CONTROL?

(RANGE=300-776)

MODEM

300

ACTIVE

BAUD

LINES

;

TYPE?

BITO

;

BIT1l = LINE 1, ETC.
RANGE = 000~377)

LOOPBACK

ADRS

INTERRUPT

ONLY

9600

1S 760440

;i
377

RATE?

OCTET

VECTOR

;

TEST

DIAGNOSTIC

(RANGE=760000-777776)

;
H

LEVEL

)

-e

CSR? 760440

Figure 4-15

the system.

LOOPBACK)

TURNAROUND
IN ANALOG LOOP
(PROGRAMMABLE LOOPBACK)

DEVICE HAVE
NO.

ADRS

MODEM

CONTROL,

THE

UBA

760440

Running

EVDAF

(Sheet

1 of

4-34

FOR

INTERNAL

USE

ONLY

; VECTOR ADRS IS 300 (RANGE=300-776)

VECTOR? 300

; BR INTERRUPT LEVEL IS S {RANGE=5-6)

‘

BR? S

(OCTET 0)? 377

TEST LINES

LEVEL 3 ONLY - TEST LINES iOCTET 1)2 0

LEVEL 3 ONLY - TEST LINES (OCTET 2)? 0

BAUD RATE?

; Applies only to Level 3

; Applies only to Leve3 l- _ -

9600

LOOPBACK TYPE?
Y

ATTACH THE 3RD OCTET

DS> ATT DMZ32

DEVICE LINK? DWO

-e

MODE CONTROL?

THE OPTION IS LIMKED TO THE UBA

THE OPTION IS NAMED TZC

CSR? 760440

THE SCR ADRS IS 760440

DEVICE NAME? T2ZC

VECTOR?

(RANGE=760000-777776)

300

BR INTERRUPT LEVEL IS S (RANGE=5-6)

BR? 5
TEST LINES

VECTOR ADRS IS 300 (RANGE=300-776)

(OCTET 0)? 377-

LEVEL 3 ONLY - TEST LINES (OCTET 1)? 0

LEVEL 3 ONLY - TEST LINES (OCTET 2)? 0

: Applies only to Level 3

BAUD RATE? 9600

' LOOPBACK TYPE?
MODE CONTROL?

DEVICE LINK? DWO

3 THE OPTION IS LINKED TO THE UBA
THE OPTION IS NAMED TZC

DEVICE NAME? TIC

THE SCR ADRS IS 760440

weo

CSR? 760440

{RANGE=760000-777776)

; VECTOR ADRS IS 300 (RANGE=300~776)
£y

VECTOR? 300
BR?

ATTACH THE 3RD OCTET

DS> ATT DMZ32

BR INTERRUPT LEVEL IS 5 (RANGE=5-6)

(OCTET 0}? 377

TEST LINES

LEVEL 3 ONLY - TEST LINES (OCTET 1)? O

LEVEL 3 ONLY - TEST LINES (OCTET 2)2? 0
BAUD RATE?

; Applies only to Level 3

9600

LOOPBACK TYPE?

MODEM CONTROL?

DS> SEL TZA

; SELECTS LINES 0-7

DS> SEL TZB

; SELECTS LINES 8-1S5

DS> SEL TZC

: SELECTS LINES 16-23

DS> START

Figure 4-15 Loading, Attaching, and Running EVDAF (Sheet 2 of 2)
4-35

FOR

INTERNAL

USE

ONLY

4.12

There

panel.

H3014 FRONT PANEL INDICATORS

are

three

LED

These

LED

(3)

indicators

indicators are

the

H301l4

distribution
the

oos T

located directly above

Connector, as viewed from the connector side of the panel (refer
to Figure 4-15).

Power

These indicators are as follows:

(PWR)

Sync

(SYNC)

Trunk

Quality

(TRNK QLTY)

"PPhe three LEDs display coded information that indicates the status
to

" of the H30l4.

(Refer

During-normal

operation,

combinations.)

all

for

4-4

Table

three

the different indication -

indicators

that the H30l4 is operating correctly.

when the H301l4

fails

its self-test,

are

ON, signifying

three LEDs will

all

remain

OFF.

POWER (PWR) INDICATOR
SYNC {SYNC) INDICATOR
UNK QUALITY (TRNK QLTY) INDICATOR

——

Figure 4-16

H3014

LED Indicators

4-36

FOR

INTERNAL

USE

ONLY

4.12.1
The

Power Indicator (PWR)
indicator

LED

PWR

provides

on-line

indication

that

the

three power supply outputs (+12V, =12V, and +5V) are good when the

If any of the three power supplies fail during
PWR LED is lit.
normal on-line operation, the PWR indicator will go out.

During

the

power-up

sequence,

H3014

the

performs a self "test-

s
of the coded
ome
part
evaluation and the PWR LED indicator bec

display that is used to tell the status of the H301l4.
Table 4-4 for the coded display indications.)
4.12.2

Sync Indicator

(Refer to
)

(SYNC)

The SYNC LED indicator is the most useful indicator on the H3014.
There are three states of the sync indicator:
e

OFF

Blinking

(Refer to Table 4-4 for the coded display indications.)
OFF

when the sync indicator is OFF,
present at the distribution panel.

valid

trunk

signal

1is

not

When the sync indicator is ON, a valid trunk interface signal

present.

4.12.3

Trunk Quality Indicator

(TRNK QLTY)

When the T1 circuitry in the H3014 detects a bipolar viloation,
the TRNK QLTY LED will be turned off for apporximately 1 second.

- FOR INTERNAL USE ONLY -

Table 4-4

PWR

SYNC

TRNK

H3014 Front Panel Indicators

VALID

TRUNK

SIGNAL PRESENT

PROBABLE CAUSE

2 2 22 22 22222 2222222223222 2 2222 2 22 2 2 22 22 2 222ty

"THIS

INFORMATION

******************************************************************

GLEN ROY."

HAS

CHANGED.

INPUT

COME

FROM

TIM

SAGEAR OR—--

khkkhkkRhkhhdhhhhhrkhrkhhhkhhihhhhhhhkhhhhhhhhhhhhhhhhhhdkihhkiidd

ARk hkRedhkkkhkhhhrhhhhrhhrhhhhhkhhhkhhhhhdhhhhhhhhhhhdkrhhhhhhhehhx

FOR

INTERNAL

USE ONLY

4.13

H3014 REMOVAL/REPLACEMENT PROCEDURES

This section contains the removal and replacement procedures for

all Field

Replacement Units contained

the

H3014

distribution
.

panel.

Tools

e
e

Required:

7/64 Allen Wrench
Small Phillips screwdriver
WARNING

OR
REMOVAL
THESE
PERFORMING
BEFORE
REPLACEMENT PROCEDURES, MAKE SURE THAT
THE H3014 IS TURNED OFF AND THE POWER

CORD

REMOVED

FROM

CONTROLLER.

THE

POWER

INTERNAL

4-39

FOR

USE

ONLY

4.13.1

H3014 Power Supply Assembly Removal/Replacement (29-24799-00)

Open the VAX cabinet using a 7/64 allen wrench.

Disconnect

Loosen the two

receptacle.

input

power

(2)

the

H301l4

power

1\4 turn phillips head lock fasteners

on the H3014 distribution panel

from

cable

(Refer to Figure 4 -17.)

—7

(Refer to Figure 4-17).

% TURN LOCK FASTENERS (2 PLACES)

Gf/

\wour

POWER CONNECTOR

Figure 4-17 1\4 Turn Lock Fasteners

Open the rear cover of the H3014 distribution panel.

Disconnect the power connector that is connected to the
fan assembly

(Refer

to Figure 4-18).

FOR

INTERNAL

USE ONLY -

Disconnect the power connectors from the processor module

and

the expansion module

(Refer

to Figure 4-18).

Remove the processor module (Refer to Figure 4-18).

Lift the power supply assembly (Refer to Figure 4-18)

1/2

about

chassis.

inch and pull the assembly out of the H301l4

9.,

Using a 3/8 nut driver, disconnect the CHASSIS GND

10.

connection from the power supply chassis..

replace

through

the

supply

power

assembly,

reverse

step

EXPANSION MODULE POWER CONNECTOR
FAN POWER CONNECTOR

PROCESSOR MQDULE POWER CONNECTOR.

pp/

”

)

ANSION

]

PROCESSOR

POWER SUPPLY ASSEMSBLY

Figure 4-18

H3014 Distribution Panel with Rear Cover Open

FOR

INTERNAL

USE ONLY

4,13.2

H3014 Fan Assembly Removal/Replacement (29-24800-00)

Open the VAX cabinet using a 7/64 allen wrench.

Disconnect

receptacle

the

input

power

cable

the

from

H3014

power

(Figure 4-17).

Loosen the two 1/4 turn phillips head lock fasteners on
the H3014 distribution panel (Refer to Figure 4-17).

Open the rear cover of the H3014 distribution panel.

Disconnect the power connector that is connected to the
fan assembly

Slide

the

(Refer to Figure 4-19).

fan

assembly

out

pulling the fan mounting bracket

the

H3014

toward

chassis

the rear of the

chassis.

CAUTION

Make certain that the fan is
so that the air flows inward.

installed

To replace the fan assembly, reverse steps 1 through 6.

FOR

INTERNAL

USE ONLY

FAN POWER CONNECTOR

NN\ AN

X -

| S

--------

----------------------------------------------------------------------------------------

Figure 4-19

R R

H3014 Distribution Panel with Rear Cover Open

222X

22X

XT XSRS

X222 2

a2 R

A R

022

*************************************************************

TO BE SUPPLIED WHEN NEW DISTRIBUTION PANEL

IS FINALIZED

**************************************************************

Je de J¢ Je e de & Je e Je Je Je de de e de de de de de g do de Je de de de do K de Je T e dede do de K Je fe ke do e de do Je ke de de de de K de e de ke dede ke de KK

Figure 4-20

Fan Mounting Bracket Assembly

- FOR INTERNAL USE ONLY -

4.13.3

H3014 Expansion Module Remove/Replacement (29-24798-00)

Open the VAX cabinet using a 7/64 allen wrench.

Disconnect

Loosen the two 1/4 turn lock phillips head fasteners on
the H3014 distribution panel (Refer to Figure 4-17).

Open the rear cover of the H3014 distribution panel.

‘Disconnect the expansion module and the processor module

Grasp the two finger handles (Figure 4-20) on either side

receptacle

the

power cable

(Figure 4-17).

power connectors
of

input

power

from the H3014

(Refer to Figure 4-21).

the expansion module.

Pull

the

finger

handles

toward

the back of the H301l4 to physically remove the expansion

module

from the backplane.

To replace the expansion module, reverse steps 1 through
6.

FOR

INTERNAL USE

ONLY -

PROCESSOR. MODULE POWEL CONNECTOK
EXPANSION MODULE
POWER CONNECTOR

FINGER MANDLE

{

PROC

T S5 NANGRAE
Tl 1H S A AT
R] - el
)

’
FINGER HANODLE

‘
f

T T

smesmsmserar s

T
L I
LI
L L

amamr et

Figure 4-21

H3014 Distribution Panel with Rear Cover Open

4-45
-

FOR

INTERNAL

USE

ONLY

4.13.4

H3014 Processor Module Removal/Replacement (29-24797-00)

Open the VAX cabinet using a 7/64 allen.wrenéh.

Disconnect the input power cable from the :_H3014 power

Loosen the two 1/4

Open the rear cover of the H3014 distribution panel.

5.
6.

receptacle

(Figure 4-17).

turn lock phillips head

fasteners on

the H3014 distribution panel (Refer to Figure 4-17).

Disconnect

the

power connectors

processor

and

module

(Refer to Figure 4-21).

expansion

module .

Grasp the two finger handles (Figure 4-21) on either side

the

processor module.

Pull

the

finger

handles

toward

the back of the H301l4 to physically remove the processor

module

from the backplane.

FOR

INTERNAL

USE

ONLY

To replace the processor module, reverse steps 1 through

NOTE

Before placing the processor module back

into

the

jumpers

H3014,
and

Jumper

verify

switch

between

always in place

the

following

settings.

and

(Refer to Figure

Jumper between E4 and ES5 is
always in place (Refer to Figure
4‘-23)0

- FOR INTERNAL USE ONLY -

(o3

us?
uso

€E6/E7
JUMPER

Unuso

uso ¥ us1

]

SWITCH N

Ylus2

L%fis Ul

(vot

usep)
u

;Ima

(V3]

U108 U109

|
1[1'_1 78 Tm17£;:::]

]

Figure

4-22

Processor Module Clock Jumper and Dip Switch
4-48

FOR

INTERNAL

USE

ONLY

' ‘ DS1 DS2 ;;

c]mzs
c 27(]‘]
-

100

Figure 4-23

”""”lfl

53 E4 €5

MASTER/SLAVE

JUMPER

Processor Module Master/Slave Jumper
4-49

FOR

INTERNAL

USE

ONLY

4.13.5

H30l4 Chassis/Backplane Replacement
CAUTION

Two

persons are needed

One

procedure.

person

perform

this

while

the

in place
the chassis
hold
screws are being removed.

Disconnect

all

turn

attached

are

that

<cables

distribution panel.

1/4

required

lock phillips head

the

fasteners on

Loosen the two

Disconnect the input power connectors
module and the processor module.

Remove the expansion module from

Remove the controller module from the distribution panel

Remove the power supply module from the distribuion panel
(refer

to Section 4.13.1).

Remove

the

the H3014 distribution panel (refer to Figure 4-17).

(refer

to Section 4.13.3).

the

expansion

distribution panel

to Section 4.13.4).

fan

assembly

(refer to Section 4.13.1).

the

from

FOR

distribution

INTERNAL

panel

USE ONLY

Remove the eighteen (18) phillips screws that secure the

mounting bracket of the distribution
chassis. (Refer to Figure 4-25.)

To replace the H3014 chassis/backplane,
through

FOR

panel

the

reverse steps

INTERNAL

USE

ONLY

APPENDIX A

FLOATING DEVICE
ADDRESSES AND VECTORS

FLOATING DEVICE ADDRESSES

A.l

UNIBUS addresses starting at 760010 and continuing through 763776
are designated as floating device addresses (see Figure A-1l).
These

other)

are

used

addresses

for

communications

devices interfacing with VAX-1ll computers.

A gap of 10,

must be left between the last address of one device

type and the first address of the next device type.
address

boundary.

(and

the

type

device

The gap of 10,

must

start

The first

module

must also be left for devices that ar

not installed but are skipped over in the priority ranking list.

Multiple devices

the

same

type must be assigned continuous

Reassignment of device types already in the system may
addresses.
be required to make room for additional ones.
777 777

DIGITAL EQUIPMENT

CORPORATION

WORDS

(FIXED ADDRESSES)

770 000

767 777

DR11-C

WORDS

USER ADDRESSES

764 000
763 777

t
1K

FLOATING ADDRESSES

WORDS

760 010

DIGITAL EQUIP CORP (DIAGNOSTICS)

760
006
760 000
757 777

001 000

000 777

VECTORS

FLOATING VECTORS
000 300

000 277

TRAP & INTERRUPT

VECTORS

VECTORS
000 000

Figure

A.1

UNIBUS

Address

Map

A.l

- FOR

INTERNAL USE ONLY

Table A.l gives the floating CSR address- assignments for UNIBUS '

and

QBUS

devices.

Table A.1

Floating CSR Address Assignments

OPTION

DECIMAL SIZE

OCTAL MODULUS

DJ11

DQ1ll

5 -

DUP1l1l

DMC11/DMR11l

(DMC before DMR)

DZS11,DZ32

(DZ1ll before DZ32)

LPP1l1l

- RANK
1

4
6

DH1l1l

DUl1l,DUV11
LK11lA

Dz11/DZV11,

RMC1l1

RL1l1l,RLV11

KwWwll-C

Reserved

RX11/RX211

RXV11/RXV21

4
8
4
4

vMV21
VMV31l
DWR70 -

LPAl1l-K

11
12
13
14

10
20
10

DMP1l1l

ISB1l1l

DEUNA

DMF32

VS1l00

Reserved

DMZ32

30
32
33

DPV11

DMV11l

UDASO
KMS1l1

Reserved
Reserved

(After first)

DR11-W

DR11-B

20 (After first)

(After first)

(RX11 before RX211)
(After second)

(After first)

FOR INTERNAL

USE ONLY

FLOATING VECTOR ADDRESSES

A.2

Vector addresses starting at 300 and proceeding upward

777

are

(and

family

These are used for communications

designated as floating vectors.
other)

computers.
Multiple

devices

sequentially.

device

Table

assignment

interface

with

the

VAX

the same

A.2

type

the

shows

would

floating

assigned

interrupt

OCTAL MODULUS

DECIMAL SIZE

DEVICE
DC1l1

KL11l

DL11-B

DLV11l,DLV11-F

DM11l-A

DM11-BB/BA

DR11-A,DRV11-B

2
2

3
5
7

TUS8

DL11l-A
DLV1l1l=-J

DP11
DN11l

DH11l Modem Control

DR11-C,DRV11

(Reader+punch)

PA61ll

DTO7

DL11-C

DL11-E/DLV11-E

DH1l1l

VSV1l

DQ1l1

11
13

14
14

LPD11
DX11

DL11-D

DJ11l

GT40

18
20

vector

sequence.

vectors

Floating Interrupt Vector Device Assignment

Table A.2

RANK

that

Vector size is determined by the device type.

LPS11
KW1ll-W,KWV1l

- FOR

INTERNAL

USE ONLY

Table A.2

DEVICE

RANK

DU11,DUV11

LK1ll-A

DMC1l1

DZ32
KMC1l1l

4
4

10 (D211 Before DZ32)
10

VMV21

DV11l + Modem Control

DWUN

DZ11/DZS11/DZV11l,

OCTAL MODULUS

DMR1l1l

DECIMAL SIZE

DUPLl1l

Floating Interrupt Vector Device Assignment - Continued -

LPP1l1l

10 (DMC Before DMR)

VMV3l

DWR70

36
37
38

TS1l1l,TU8O
LPAll-K
IP11/1P300
KWll-C

2
4
2
4

(After the first)
4
10
(After the first)
4
’
10

DR11-W

34
35

41
42

VTVOol

RL11/RLV11

RX11/RX211
RXV11/RXV21

DR11-B

DMP1l1

2 -

4
2
4

(After the first)

(After the first)
(RX11 before RX21l1l)

(After the first)

10
4
10

(MASSBUS device)

43
44

DPV1l
ML1l1

DMV11l

UDASO0

KMS1l1

VS1l00

Reserved

DMZ32

47
49

53
55

ISBl1l1l

DEUNA
DMF32

PCL11-B

Reserved
Reserved

Reserved

(After the first)

- FOR INTERNAL USE ONLY -

APPENDIX B

Tl CABLE SPECIFICATIONS
B.1l

INTRODUCTION

This appendix gives information concerning the Tl link from the 2

x 4 I/0 panel insert on the FCC Bulkhead Frame to the Tl Connector
‘
o
input of the remote distribution panel (H301l4).

B.2

CABLE CONFIGURATION

The T1 cable (BCl8L-xx or BC1l8M-xx) is connected between the2 X 4
I/0 parel insert on the FCC bulkhead Frame and the T1 Connector
input

This

H3014.

the

configuration

cable

defines

the

detail requirements for a 4 Conductor Shielded Cable Assembly with
a 15 position female D-Subminature connector at one end and a 15
position male D-Subminature connector at the other end.
A BCl8L-15 is supplied with this option when purchased.

other

lengths

ordered

may

DIGITAL

from

directly

Cables of

EQUIPMENT

CORPORATION (Refer to Table B.2) or fabricated using the component
specifications listed in Table B.l.
Table B-1 BCl8L-xx Component Parts

Material & Finish

Description

Digital Part Number
12-10493-39

Crimp Terminal Pin

Brass, gold flash

{Accomodates AWG 20 -

minimum thickness on

over nickel 0.00005

(contact)

(Figure C-1)

entire contact with

24]

additional

0.00002

mating

for

gold thickness on
end

of 0.150/0.175

Carrier

length

inch. -

strip may not

be gold plated.
NOTE

used

when

An AMP

90265~-1 crimping

inserting

connector housing

trademark

AMP,

tool

into

to be

the

(12-10493-57).

Inc.

- FOR

INTERNAL USE ONLY -

Table B-1l BCl8L-xx Component Parts -'Continued D

D P T

WD WD GHD D S

D D WD WED GNP AR WD CUB NS G

GED AED G

N SN WD ED WD GED WD WR GNP WD WD D VIP W

D GEP Wi

GED M GEP GED ED WD WD T

D G GED SN

NP GED D ED GED i W

Crimp Terminal Socket

Phosphor Bronze %old

[Accommodates AWG 20
- 24].

0.00005 minimum
thickness on entire.

(contact),

(Figure C-2)

G GNP G G

Material & Finish

Digital Part Number

12-10493-41

P GIP WL D G G

Description

flash over nickel

contact with

additional

0.00002

gold minimum

thickness on mating
end

for

length

0.150/0.175
NOTE

inch.

90302-1 crimping tool is to be
An AMP
used when inserting the socket into the

connector housing

12-10493-57

(Figure C-=3)

(12-10493-58).

Connector Housing,

Shell:

Steel

for 15 Male (Pins)

with Tin Plating.

relief.

B.
Insulator:
Glass
filled Nylon, color

contacts with strain

black.

12-10493-58

(Figure C-4)

Connector Housing,
for 15 Female
(Sockets)

contacts

with strain

Shell:

Steel

with Tin Plating.

relief.

Insulator:

filled
black.

Nylon,

Glass

color

et
b
| Bt

B-2
-

FOR

INTERNAL

USE

ONLY

S =

Table B-2 Digital Cable Option Designations
Tl EXTERNAL PVC CABLE BC1lS8L

DIGITAL Option

Cable Length

15 Feet

50 Feet

Number

BCl8L=15

BC18L-50

BC1l8L-A0

100 Feet

150 Feet

BC18L-AS

Feet
Feet
Feet
Feet
Feet

BC18L-BS
BCl8L-C5
BCl8L-EQ
BCl8L-HS5
BC18LOLO

BCl8L-BO

200 Feet

250
350
500
750
1000

Tl EXTERNAL PLENUM CABLE BCl8M

BC18M-15

15 Feet

BC1l8M-50

50 Feet

BC18M-AQ

100 Feet
150

Feet

BCl8M-AS

BC18M~-BO

200 Feet
350

Feet

BC18M-CS

500 Feet

BC1l8M-EO

1000 Feet

BCl8M-LO

750

Feet

BC1l8M-HS5

B-3

FOR

INTERNAL

USE

ONLY

B.3
The

T1 CONDUCTOR CHARACTERISTICS
conductor

that

characteristics.

Electrical

Pairs:
Nominal

the

for

used

1link

has

following

the

Characteristics:

Impedance -

100

ohms

Nominal Capacitance between conductors - 16 pf/ft

Nominal velocity of propagation - 66%

Nominal delay - l1.54 nano seconds per ft.
Capacitance unbalance (pair to pair) - 160 picofarads/1000
feet - Maximum at 1000 Hz

ohms
1.20
pair)
(individual
unbalance
Resistive
D.C./1000 feet - Maximum
Crosstalk - 70 db/1000 feet mingmum at 150 KHz far end.

Insulation resistance - 10 x 10

ohms/1000 feet minimum at

200-500 volts DC for 1 minute.

Attenuation - 6.0 db/1000 feet Maximum at 1 MHz
Shield

Coverage -

100%

Nominal shield DC resistance - 5.0 ohms/1000 feet

Nominal conductor DC resistance - 17.0 ohms/1000 feet

Maximin operating voltage - 150 volts AC RMS
:
UL listed AWM Style 2919

Physical Characteristics:

Nominal weight/1000 feet - 40 lbs.

Minimum bending

radius

-3

incheg

. Temperature rating - -30"C to 80°C
Shield Type - Foil and braid with 22 AWG Drain Wire
Maximum pulling tension - 64 lbs.
Insulation material -

Jacket material - PVC

Outise

Dimensions -

Polyethylene

.296

inches Dia.

FOR

INTERNAL

USE

ONLY

T1 Cable Schematic

Table B-3

WIRE

Description

- From

Color

| Connection |

22
22

WHT/BLU

22
22

WHT/ORN

DRAIN

P1l-9
Pl-1
Pl-1
P1-3
P1 Shell

AWG

BLU

ORN

TABLE

‘

Remarks

Connection |
P2-9
p2-1
P2-11
P2-3
P2 Shell

FOR

INTERNAL

USE

ONLY