KX09A Memory Protection Option

This document serves as an instruction manual for the KX09A Memory Protection Option for the PDP-9 computer. Manufactured by Digital Equipment Corporation, this option is designed to establish a foreground/background environment for time-sharing by defining protected and unprotected regions within the core memory.

The KX09A monitors all instructions before execution and traps specific conditions: illegal instructions (like IOT, OAS, HLT, or chained XCTs), references to protected memory areas, or references to nonexistent memory banks. Upon detecting a violation, it triggers an effective Jump to Subroutine (JMS) instruction, transferring control to a monitor program at an absolute memory location (20 if program interrupt is disabled, 0 if enabled) to prevent system hang-ups.

The memory protection boundary is programmable, allowing the protected region to be set in 2000 (octal) word blocks using the MPLD instruction. The option can be placed into user (protect) mode via an MPEU instruction or a console switch. It also includes several other Input/Output Transfer (IOT) instructions for managing flags related to memory violations and nonexistent memory.

The hardware consists of 47 FLIP CHIP modules mounted in two panels, forming the ME09B assembly, which integrates with the PDP-9's central processor and control memory system. The manual details installation procedures, including interconnections, power requirements (10V at 0.2A and -15V at 3.2A), environmental specifications, and an on-site checkout process. It also provides information on diagnostic programs and lists recommended spare parts for maintenance.