DEC TRNcontroller 100 Hardware Description and Debugging

This document, "DEC TRNcontroller 100 Hardware Description and Debugging," published in December 1991, provides a comprehensive overview of the DECTM TRNcontroller 100 (DEQRA), an intelligent Q-Bus-to-Token Ring Adapter.

Core Purpose: The DEQRA is designed to connect Digital Equipment Corporation's Q-bus-based VAX computers directly to industry-standard token-ring networks. Its main goal is to improve overall system performance and bandwidth by offloading low-level communication tasks from the host CPU.

Hardware Architecture: The DEQRA features a dual-bus architecture:

• Processor Bus: Optimized for program execution, it includes a Motorola 68020 32-bit CPU, dynamic RAM, EPROM (containing self-test diagnostics and a bootloader), a multifunction peripheral (MFP) for console communication and timers, and various control/status registers.
• Communications Bus (Z-BUS): Optimized for data transfer and host interface, it incorporates a TMS380C16 Token Ring Communications Processor, shared memory, and Q-bus interface circuitry. This bus handles data movement between the token ring and the host, conforming to IEEE 802.5 standards.

The document details memory maps, bus operations, arbitration schemes between the processor and communications buses, and how data is transferred between the host, DEQRA's shared memory, and the token ring.

System Operation: The DEQRA operates in two phases:

1. Start-up: It performs on-board diagnostics, initializes the host interface, and downloads its operating system and application software from the host.
2. Normal Operation: It processes all communication-related tasks, including protocol handling and data manipulation, freeing the host CPU for other operations.

Electrical Interfaces: The DEQRA has two main interfaces:

• Token Ring Port: A D-subminiature 9-pin connector for physical connection to the token-ring network.
• Console Port: A 10-pin box connector used primarily for debugging and running diagnostics via an RS-232 terminal.

Debugging Tool (ODT68): A significant portion of the guide is dedicated to the ODT68 on-line debugging tool. This powerful tool allows programmers and technicians to:

• Communicate directly with the DEQRA board.
• Examine and modify memory contents and processor registers.
• Set and clear instruction-tracing breakpoints.
• Execute and step through application programs.
• Access a comprehensive set of diagnostic tests (e.g., for memory, EPROM, timers, bus errors, and the TMS380C16 chip) to troubleshoot hardware issues and verify functionality.

Intended Audience: The guide is aimed at maintenance technicians, computer system integrators, and software developers who require in-depth technical information on the DEQRA hardware's operating theory and features for development and troubleshooting purposes.