Programmed Data Processor-7 Users Handbook

Order Number: XX-A2A67-2E

The document describes the Digital Equipment Corporation (DEC) Programmed Data Processor-7 (PDP-7), a general-purpose, solid-state digital computer designed for laboratory, computing, or process control systems. It features a single-address, fixed 18-bit word length architecture, utilizing 1's and 2's complement arithmetic.

The basic PDP-7 system includes a processor with an operator console, a 4096- or 8192-word random access ferrite-core memory (expandable to 32,768 words), and input/output control. The processor contains core components like the Accumulator (AC), Link (L), Memory Address Register (MA), Memory Buffer Register (MB), Instruction Register (IR), Program Counter (PC), and a Major State Generator which manages fetch, execute, defer, and break states. The core memory has a 1.75 µsec read/write cycle.

Standard I/O equipment includes a high-speed perforated tape reader (300 char/sec), a high-speed paper tape punch (63.3 char/sec), and a Model 33 KSR Teletype unit (10 char/sec). The system is self-contained, requiring no special power sources, air-conditioning, or floor bracing, operating on standard 115V, 60-cps power.

Optional equipment extends the PDP-7's capabilities:

  • The Type 177 Extended Arithmetic Element (EAE) provides high-speed multiplication, division, shifting, and register manipulation, adding a multiplier-quotient register (MQ) and step counter (SC).
  • The Type 172 Automatic Priority Interrupt (API) offers 16 priority-based interrupt channels for faster I/O device servicing and supports multilevel interrupts.
  • The Type 173 Data Interrupt Multiplexer allows up to four high-speed I/O devices to share the single data break facility, achieving a combined transfer rate of up to 570,000 18-bit words/sec.

The PDP-7 supports both programmed and manual operations, with instructions categorized as memory reference or augmented. A "break cycle" mechanism provides temporary interruptions for data transfer, real-time clock updates, or program interrupts to service peripheral devices or handle illegal instructions in trap mode.

XX-A2A67-2E
2000
352 pages
Quality

Original
35MB

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