PDP-7 Memory Address Test

Order Number: DIGITAL-7-56-M

This document describes MAINDEC 703, a Memory Address Test program for the PDP-7 computer. Its primary purpose is to inspect the performance of the memory address register and decoder networks, capable of testing memory configurations from 4096 to 32,768 words. The program occupies a small amount of memory (registers 00000-00022 plus an initializing sequence) and runs on a standard PDP-7, supporting systems with or without memory extension control and up to three extended memory fields.

The test operates by sequentially checking each memory register. It first determines the memory size and sets the testing limits. The program then alternates between two types of passes: a "write-then-read" pass, where it writes a value to a cell and immediately verifies it, and a "read-only" pass, where it simply reads and verifies existing contents. This continuous process stops only if an error occurs or if manually halted. Errors are indicated by specific halt codes (E1 and E1A), which provide information about failed bits and the address of the problematic memory cell.

MAINDEC 703 is valuable for routine maintenance and diagnosing memory issues. It helps identify common problems like open selection lines (preventing data access) or shorted selection lines (causing data to appear in multiple locations). The pattern of errors can further pinpoint whether the issue is related to y-axis (larger blocks of errors) or x-axis (smaller blocks of errors) selection lines. The test area can be customized by adjusting AC switches or a specific memory register. The program runs continuously, with each full pass taking approximately 75 milliseconds per 4096 words of memory.

DIGITAL-7-56-M
July 1965
8 pages
Quality

Original
0.2MB

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