PDP-14 Maintenance Manual Volume II

This document is the second volume of a maintenance manual for the PDP-14 computer system, published in March 1970 by Digital Equipment Corporation. It primarily comprises detailed schematic diagrams and component location information for various hardware modules and interfaces. The manual is structured to provide comprehensive technical details for maintenance and understanding of the PDP-14's architecture.

Key areas covered include:

• Control Blocks: Schematics for the main control block, switch and power control, instruction decoder and register control, major states and timing, and compare control.
• Registers: Detailed block and circuit schematics for major registers (bits 0-5 and 6-11), bus registers, and incrementing bus registers.
• Memory: Schematics for 1K memory options (First, Second, Third, and Fourth MR14 installed blocks).
• ROM Components: Circuit and component location diagrams for ROM braid boards, sense amplifiers, and selection modules.
• Interfaces: Extensive documentation for the PDP-8/I and PDP-8/L interfaces, device code select jumper boards, dot NOR gates, input and output interface boxes, isolated AC switches, accessory interface boxes, timers, retentive memory, storage interface boxes (full and half), flip-flops, binary-to-octal decoders, and inverters.
• Module Utilization: Information on module allocation within the control unit rows.
• Power Supply: Schematics and component locations for the power supply filter assembly.

The document serves as a reference for technicians and engineers working on the PDP-14, offering a visual and functional breakdown of its internal electronic components and interconnections.