μ/T-11

This document is the User's Guide for the Digital Equipment Corporation (DEC) DCT11-AA microprocessor, with editions dating up to June 1982.

Aimed at engineers familiar with PDP-11 architecture, including both hardware and software specialists, it provides a comprehensive tutorial on the DCT11-AA's design and operation. A key characteristic highlighted is the processor's user-programmable operating modes, which directly impact its functionality and timing.

The guide systematically covers:

• Internal Architecture: Registers (General-Purpose, Status, Mode), Arithmetic Logic Unit (ALU), Hardware Stack, Interrupts, and Direct Memory Access (DMA) mechanism.
• Bus Transactions: Detailed descriptions of 16-bit and 8-bit static and dynamic read/write transactions, refresh, interrupt acknowledge (IACK), bus no-operation (BUSNOP), and DMA transactions.
• Pin Descriptions: Comprehensive details on data/address lines, address/interrupt lines, control lines, and miscellaneous signals.
• Mode Selection: Guidelines for choosing operational modes based on criteria like cost, speed, and size.
• Interfacing: Practical design examples and considerations for power-up, clocking, address latching and decoding, memory subsystems (16-bit and 8-bit), interrupt handling, DMA, and working with specific peripheral chips (8155, 2651, DC003).
• Addressing Modes and Instruction Set: A thorough explanation of all addressing modes and the complete instruction set of the DCT11-AA.

The document is complemented by appendices offering detailed instruction set tables, timing diagrams, and a comparison of software differences and compatibilities with other members of the PDP-11 family.