CI750 Hardware Technical Description

This "CI750 Hardware Technical Description (Preliminary)" document from Digital Equipment Corporation (DEC), published in July 1984, provides a comprehensive technical overview of the CI750 hardware. The CI750 is an intelligent interface designed to connect a VAX-11/750 system to a Computer Interconnect (CI) cluster, a high-speed, serial data bus that links computer subsystems.

The document highlights the CI's key features, including:

• Dual signal paths operating simultaneously.
• A 70-megabit-per-second bandwidth and transfer rate.
• 32-bit Cyclical Redundancy Check (CRC) for error detection.
• Packet-oriented data transfers with immediate acknowledgements (ACK/NACK).
• Contention and round-robin arbitration for bus access.
• Internal and external data looping for diagnostic purposes.

The CI750 hardware is modular, consisting of four main components:

1. Link Module: This module provides the direct interface to the CI bus, managing both transmit and receive channels. It handles packet formatting (including bit synchronization, character synchronization, and appending CRC bytes and trailers), Manchester encoding/decoding for serial data, and the generation of transmit and receive clocks. It also incorporates arbitration logic for bus access and processes ACK/NACK packets.
2. Packet Buffer Module (PB): This module offers buffering for data packets moving through the CI750. It includes two 1KB transmit buffers (TBUF) and two 1KB receive buffers (RBUF) to optimize data flow between the Data Path Module and the Link Module, managed by sequencing logic.
3. Data Path Module (DP): The central control unit for data flow within the CI750, the DP module uses an internal bus (IB Bus) and various registers (including interfaces to the PB and CCI). It integrates a 2901A microprocessor (ALU) for arithmetic and logical operations and features comprehensive parity generation and checking. The DP operates in various modes such as Run, Uninitialized, Stall, and Suspend.
4. CMI CIPA Interface Module (CCI): This module serves as the interface between the CI750 and the VAX-11/750's CPU Memory Interconnect (CMI) bus. It adheres to CMI protocol and timing, containing buffers (XMIT/RCV files) and control registers (like the Configuration Register - CNFGR) to facilitate both port-initiated and unsolicited (host-initiated) data transfers.

The CI750's operations are primarily controlled by microcode stored in a 3KB RAM/PROM control store located on the Packet Buffer Module, with branching logic residing in the Data Path Module. The document details the structure of the microwords, the microsequencer's role in addressing, and various control signals. It also extensively covers the initialization, power control, and interrupt functions, emphasizing various diagnostic and maintenance capabilities integrated into the hardware.