PDP-15 Systems Maintenance Manual Volume 1

This document is Volume 1 of the PDP-15 Systems Maintenance Manual by Digital Equipment Corporation. Its primary purpose is to provide comprehensive information for the understanding, maintenance, and troubleshooting of the PDP-15 computer hardware.

The manual is structured into seven chapters:

1. General Description: Introduces the PDP-15 system, detailing its major components such as the Central Processor (KP15), I/O Processor (KD15), Console (KC15), various memory types (MM15, ME15, MK15 expanders), and peripheral interface expanders (BA15, BB15). It outlines different system configurations (e.g., PDP-15/10, 15/20, 15/30, 15/40, 15/C) and provides overall system specifications and interconnections.
2. MM15 Memory: Explains the architecture and operation of the core memory, including its addressing matrix (X-Y, inhibit/sensing), control logic, and different memory cycle types (Read/Restore, Clear/Write, Read/Pause/Write).
3. Central Processor: Describes the internal workings of the CPU, detailing its registers (e.g., Accumulator, Program Counter, Instruction Register), bus structures, data manipulation hardware, and control state generation (Fetch, Defer, Execute, Increment). It also covers instruction execution details, addressing modes (Page, Bank, deferred, auto-increment), console operations, and interrupt mechanisms.
4. I/O Processor: Focuses on the KD15 I/O Processor, outlining its role in coordinating data transfers between the CPU/memory and peripheral devices. It covers I/O timing, request synchronization, IOT (Input/Output Transfer) instructions, the I/O bus structure, and the Data Channel Facility for high-speed transfers.
5. Power Distribution: Details the power supply and distribution systems for both standard PDP-15 and PDP-15/C models, including information on power supplies, AC/DC control, bulk and local regulation, power monitoring, and adjustment procedures.
6. Options: Provides in-depth descriptions of various optional hardware components that extend the PDP-15's capabilities. These include the KE15 Extended Arithmetic Element (EAE) for high-speed math, the KW15 Real-Time Clock, the KF15 Power Fail option for program protection, MP15 Memory Parity for data integrity, KM15/KT15 Memory Protect/Relocate options for memory management, and interfaces for high-speed paper-tape reader/punch (PC15), additional teletypes (LT15A), and display controls (VP15).
7. Maintenance: Offers practical guidance on preventive and corrective maintenance. It lists necessary equipment and diagnostic programs (MAINDEC), details troubleshooting procedures (including console checks, processor logic, circuit-level diagnostics), explains repairs and replacements, and provides comprehensive instructions for adjusting DC voltages and critical timing circuits across the system.

In essence, the manual serves as a vital resource for technical personnel to understand the PDP-15's architecture, operational principles, and to perform effective diagnosis, repair, and upkeep of the system.