PDP-11/84 System Installation and Technical Reference Manual

This document is a Preliminary System Installation and Technical Reference Manual for the Digital Equipment Corporation PDP-11/84 computer system, published in May 1985.

The manual provides comprehensive information for the installation, configuration, and maintenance of the PDP-11/84, which is described as a high-performance computer featuring a J11 microprocessor with a Floating Point Accelerator (FPA), operating on an 18-bit UNIBUS with 22-bit memory addressing. It covers two main configurations: a 42-inch cabinet (PDP-11X84) and a 10.5-inch rack-mountable expansion box (PDP-11/84).

Key areas covered include:

1. System Introduction: Describes the core components (KDJ11-BF CPU, MSV11-JB/JC memory, KTJ11-B UNIBUS Adapter, Monitor and Distribution Module, Minimum Load Modules, power supplies), their functions, and system variations (e.g., different memory configurations, power requirements). It also details environmental, mechanical, and electrical specifications.
2. Site Preparation and Installation: Guides users through preparing the site, unpacking the system, performing mechanical and electrical installations, setting up console serial line connections, and configuring initial switch settings for both cabinet and box products. It also covers the installation of expansion backplanes and battery backup units.
3. Functional Description: Delves into the system's architecture, including:
   • Private Memory Interconnect (PMI) Bus: Details its signals, acquisition, DMA requests, and data transfer protocols.
   • Memory Management: Explains virtual-to-physical address relocation, memory protection, and various associated registers (Page Address, Page Descriptor, Memory Management Registers).
   • Cache Memory: Describes the KDJ11-BF CPU's dual-tag cache and the KTJ11-B's DMA cache, including their operations, organization, and control registers.
   • CPU Registers: Provides detailed information on the Processor Status Word, Program Interrupt Request Register, CPU Error Register, and others crucial for system operation and diagnostics.
   • Operating Modes: Outlines Kernel, Supervisor, and User modes, and their respective privileges.
   • UNIBUS Mapping: Explains how the UNIBUS address space is mapped to physical memory.
4. Bootstrap and Diagnostic ROM Programming: Explains the role of ROMs and EEPROM for system testing and booting. It details the "Dialog Mode" commands (Help, Boot, List, Setup, Map, Test) and the "Setup Mode" for modifying EEPROM parameters and boot programs. It also covers the structure of M9312 compatible boot ROMs and the use of the J11 Micro ODT (On-Line Debugging Technique) for low-level system interaction.
5. System Maintenance: Offers troubleshooting aids (LEDs, voltage test points, audible alarms), outlines different diagnostic program types (DECX11, XXDP+, ROM Resident), and provides instructions for interpreting error messages. Crucially, it includes detailed procedures for the removal and replacement of various Field Replaceable Units (FRUs) such as modules, power supplies, fans, and panel assemblies.

The document also includes appendices with detailed technical data, such as CPU instruction timing, hardware/software differences compared to older PDP-11 models, backplane pin assignments, system interconnect diagrams, ROM code version differences, and setup parameter worksheets.