PDP-11/45 Maintenance Reference Manual

This document is the PDP-11/45 Maintenance Reference Manual, published by Digital Equipment Corporation (DEC) between 1972 and 1975.

It serves as a comprehensive technical guide for the PDP-11/45 computer system, providing in-depth information essential for maintenance, troubleshooting, and advanced programming.

Key contents include:

• Central Processor (CP) Instruction Set: Detailed descriptions of instructions, general and special addressing modes, condition code operators, and instruction timings.
• Memory Architecture: Comprehensive coverage of Memory Management, Semiconductor Memory, and Core Memory, including their configurations, control registers, addressing schemes, and related block diagrams.
• Floating Point Processor (FP11): Detailed explanation of its instruction formats, data formats, processing of floating-point exceptions, and simplified block diagrams.
• System Registers and Addresses: Listings of general purpose, special purpose, and device register addresses, along with the Processor Status Word (PSW) and memory parity control register.
• System Operation: Information on inter-mode communications, memory mapping, program loaders (including bootstrap loader flow charts and coding), and the operator's console.
• Hardware Diagrams: Detailed block diagrams for the KB11-A Central Processor Data Paths, Processor Control Section, and various memory matrix configurations.
• Reference Information: Tables for device register addresses and ASCII codes.

The manual is intended for technical personnel needing to understand, maintain, and interact at a low level with the PDP-11/45 system.