KD11-E Central Processor Maintenance Manual

This document is the KD11-E Central Processor Maintenance Manual, published by Digital Equipment Corporation (DEC) in December 1976.

The KD11-E is a two-board Central Processing Unit (CPU) designed for the PDP-11/34 computer system. It integrates with a memory system and peripherals via the Unibus, performing core functions such as:

• Controlling Unibus time allocation.
• Executing arithmetic and logic operations.
• Decoding instructions and handling data transfers (16-bit words, 8-bit bytes).
• Supporting single- and double-operand addressing.
• Managing memory addressing up to 128KB via its integrated KT11-D Memory Management System.

The CPU is program-compatible with KD11-A (PDP-11/35 and PDP-11/40) and LSI-11 systems, executing the Extended Instruction Set (EIS) but not the Floating Instruction Set (FIS).

The manual provides a detailed technical description for maintenance, including:

• CPU Operating Specifications: Environmental, power, and physical characteristics.
• Detailed Hardware Description: In-depth analysis of the data path, Arithmetic Logic Unit (ALU), scratchpad memory, Unibus address and data interface, instruction decoding, auxiliary ALU control, and memory management system.
• Instruction Set Information: Comprehensive lists of addressing modes, instruction timings, and instruction set differences compared to other PDP-11 models.
• Microcode: Explanation of microprogram flows and control store fields.

It is intended for users with a general knowledge of digital circuitry and a basic understanding of PDP-11 computers.