KB11-C Processor Manual (PDP-11/70)

This document is the KB11-C Processor Manual (PDP-11/70), published by Digital Equipment Corporation in 1975.

Purpose: It is designed to provide maintenance personnel with an overall understanding of how the KB11-C Central Processor Unit (CPU) functions within the PDP-11/70 system, and sufficient detail on its logic to enable on-site troubleshooting and repair. The manual adopts a functional approach, explaining processes rather than module-by-module logic.

Key Components & Features Described:

• KB11-C Processor: The central component, responsible for all arithmetic and logical operations, implementing the PDP-11/45 instruction set, and acting as the Unibus arbitration unit. It details instruction decoding, data paths, control registers, timing generation, data transfers, and error handling (aborts, traps, and interrupts).
• Memory Management: A standard hardware feature enabling address relocation and protection for multi-user, multi-tasking environments. It supports 16 User, Supervisor, and Kernel mode memory pages, variable page lengths, and allows access to up to 4 million bytes of Main Memory by converting 16-bit virtual addresses to 22-bit physical addresses.
• Unibus Map: The interface connecting the Unibus to the Cache and Main Memory, converting 18-bit Unibus addresses to 22-bit physical addresses.
• Cache: A high-speed 1K-word (2048 bytes) bipolar memory that buffers data between the processor and slower Main Memory. It operates transparently to programs, uses a two-way set associative organization with a random replacement strategy and write-through policy, and serves as an interface for high-speed I/O controllers.
• Console: Provides direct control over the system for starting, stopping, resetting, and debugging, with switches and indicators for monitoring operations and maintenance.
• System Reliability: Emphasizes extensive parity checking across Main Memory, Cache, and high-speed I/O transfers, enabling recovery from parity errors and degraded mode operation.
• Concepts: Introduces fundamental computer concepts such as microprogramming, parallel operation (pipelining), virtual machines, and reentrant/recursive programming, essential for understanding the PDP-11/70's architecture.

The manual includes block diagrams, flowcharts, and tables to illustrate its descriptions.