KB11-A, D Central Processor Unit Maintenance Manual

This maintenance manual for the Digital Equipment Corporation (DEC) KB11-A and KB11-D Central Processor Units (CPUs), used in PDP-11/45, 11/50, and 11/55 computer systems, aims to provide an overall understanding of their function and detailed logic for troubleshooting and maintenance. The KB11-D is an updated version of the KB11-A, primarily differing in microcode, flow diagrams, and specific module implementations to enhance floating-point performance and console operation.

The document thoroughly describes the CPU's architecture, including its data paths (general, temporary, and special-purpose registers, Arithmetic and Logic Unit (ALU), and Shifter), and its control section, which uses microprogramming for efficient operation. It explains fundamental concepts like parallel operation (pipelining) for improved performance, and the virtual machine system, which enables multiprogramming, memory management (including address spaces and protection mechanisms), and re-entrant/recursive programming through stack usage. Detailed explanations are provided for the Processor Status (PS) word and complex instructions like Multiply and Divide.

The manual further describes the instruction set and addressing modes, categorizing instructions (e.g., double operand, program control, arithmetic) and detailing methods for calculating instruction execution times based on various subcycle and memory characteristics. Operational aspects are covered, explaining console controls and indicators, power-on sequences, and step-by-step procedures for loading programs and examining/depositing data. Finally, it offers an in-depth, module-by-module and circuit-by-circuit description of the CPU's hardware logic and lists diagnostic programs designed to test every circuit of the CPU, aiding maintenance personnel in identifying and resolving hardware failures.