KA660 CPU Module Technical Manual

This document is the KA660 CPU Module Technical Manual, published by Digital Equipment Corporation in March 1990. It provides a comprehensive technical overview of the KA660 CPU module and its associated components, primarily for design engineers and application programmers familiar with Digital's Q22-bus and VAX instruction set.

The manual covers the following key areas:

• System Overview and Components: Introduces the KA660 Subsystem, which includes the KA660 CPU module (available in -AA for multi-user and -BA for single-user environments), MS650 memory modules (8MB/16MB ECC, up to 64MB total), and the H3602 console module. It details major functional blocks and integrated chips like the System on a Chip (SOC) CPU, Memory Controller (CMCTL), Q22-bus Interface (CQBIC), System Support Chip (SSC), Ethernet Controller (SGEC), and DSSI Host Adapter (SHAC).
• Central Processor: Describes the SOC CPU's VAX architecture subset, processor state (registers like GPRs, PSL, IPRs), memory management (translation buffer, control registers), and handling of interrupts and exceptions (including detailed machine check exceptions).
• Memory Systems: Explains the organization and operation of the KA660's 6KB, 6-way associative, write-through cache memory (address translation, data block allocation, error detection) and the main memory system (timing, organization, addressing, ECC error detection and correction).
• Interfaces and I/O: Provides details on the console serial line (registers, baud rate), clock and timer registers, the Q22-bus interface (address translation, interrupt handling, error reporting), the Ethernet network interface (SGEC programming, packet formats), and the DSSI mass storage interface (SHAC functionality, CI-DSSI protocol).
• Boot and Diagnostic Facility: Covers the EPROM-resident firmware, its role in initialization, power-up modes, diagnostic tests, battery-backed RAM, and the console command interface.
• Installation and Configuration: Guides users through installing the KA660 and MS650 modules, configuring device addresses and interrupt vectors, and managing mass storage configurations (DSSI node and unit numbers).

The document is a detailed technical reference, including register formats, bit descriptions, timing information, and error handling procedures for the KA660 CPU module.