KA630-AA

This document is the KA630-AA CPU Module User's Guide (EK-KA630-UG-001), published by Digital Equipment Corporation in February 1986. It is intended for design engineers and application programmers familiar with Digital's Q22-Bus and VAX instruction set.

The guide provides comprehensive information on the KA630-AA MicroVAX CPU module and related MS630 memory modules, covering:

1. Overview: Introduces the KA630-AA as a quad-height VAX processor module for the Q22-Bus, detailing its key components (MicroVAX 78032 CPU, FPU, interface gate array, local memory, boot/diagnostic ROM, console serial line unit), its interaction with the Q22-Bus, operational modes (arbiter/auxiliary), and electrical/environmental specifications.
2. Installation: Provides detailed instructions for physically installing the KA630-AA and MS630 modules into Q22-Bus backplanes and system enclosures, including information on connectors, configuration board, CPU distribution panel, and Time-of-Year (TOY) clock battery backup unit.
3. Booting and Console Program Interface: Explains the power-up sequence, console program initialization, various bootstrap methods (from disk, tape, PROM, or an auxiliary processor), and console commands for diagnostics, system control, and memory manipulation. It also describes console I/O modes and related error messages.
4. Architecture: Describes the internal architecture of the KA630-AA, including its processor state, register set, VAX instruction set, exception and interrupt handling, memory management (physical, virtual, and Q22-Bus mapping), hardware error detection, and interprocessor communication mechanisms, with a focus on multiprocessor configurations.
5. Diagnostics: Outlines the diagnostic tests performed by the KA630-AA, covering functional areas like memory, CPU chip, and Q22-Bus mapping registers. It also explains how to interpret the KA630-AA LED display for diagnostic purposes.

The document also includes appendices detailing the Q22-Bus specification (general characteristics, master/slave operations, signal assignments, data transfer protocols, DMA, interrupt handling, electrical characteristics, and physical configurations) and a list of acronyms.