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EK-D5283-SG-002
2000
177 pages
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Document:
Digital VAX 11/750 Magic Book
Order Number:
EK-D5283-SG
Revision:
002
Pages:
177
Original Filename:
OCR Text
EY-D5283-SG-002 DIGITAL VAX 11/750 MAGIC BOOK Rev.8 JAN-1-19883 S0 mAGIC MTERMAL USE ONLY =i ~J N 1 RBROOK THIS TEXT WAS CREATED IN AN ATTEMFT TO CENTRALIZE THE ESSENTIAL INFORMATION REQUIRED TO MAINTAIN THE 11/730 CONTAINED IN THIS TEXT IS INFORMATION AT A BRANCH LEVEL. CONCERNING ROARD LOCATIONSs GATE ARRAYS LOCATED ON EACH ROARD'y EBASIC FUNCTIONS OF THE CHIPS», PART NUMEERS. AND MIZC. OTHER INFORMATION YOU MIGHT FIND USEFUL WHEN INSTALLING OR . MAINTAINING THE VAX 11/750 SYSTEMS. THE INTENT OF THIS GUIDE IS NOT TD ERECOME A STEF EY STEF TROUBLESHOOTING TOOL», ONLY TO MAKE SOME USEFUL A SINGLE FACKAGE. INFORMATION AVAILAELE IN UMS SHUTDOWN FROCEETWURE FLOATING FOINT ACCELERATOR A IATA FATHS MODULE MEMORY INTERCONNECT MOINULE UNIBUS INTERCONNECT MODULE SECOND' UNIRBUS ADAFPTER. MODULE CFU/WRITEARLE CONTROL STORE REMOTE DIAGNOSTIC MODULE OFTION SLOTS RH750 MASSERUS ADAFPTER MODULE CFU MEMORY CONTROLLER MODULE FFA LOOO1 nFM LOOOZ MIC LOOO3 URI LOQO0O4 SUR LOO10Q CCS/WCS LOOOS ROM/MTM LOOOS MEBA LOOQO7 CMC LOO11/L001&6 UET M2313 UMIRUS EXCERCISOR/TERMINATOR S /ATTACHE UTOSIZER DIAGNOSTIC TRANSFER/NAMES/A COMMANDS COFY AND EASIC CONSOLE WRITERDOT UTILITY REVCON REVISION CONTROL DOCUMENT EACKFLANE CAERLES AND JUMFERS SYE ERROR LOGGER S06 SYSTEM DUHF ANALYZIER BOOTSTRAF FROCESS DESCRIFTION INSTRUCTION DECODE FROCESS MACHINE AND EBUGCHELKS UNIBUS ADDRESS TRAMNSLATION WORKSHEET ENT EDITOR REYFAD DIAGRAMS U}%MHH‘OGJ“JO'-UI-&-NFJ FOWER SYSTEM BLOCK DIAGRAM FHYSICAL ADDRESS ORGANIZATION ¢ ? 7 5% 73 75 F7 835 .21 ?3 104 107 SLOT 1 SLOT 2 SLoT 3 SLOT 4 SLOT 7+8» SLOT 3 SLAOT & SLOT 7:2y 5107 7-8vy SLOT 1¢ 108 130 132 135 137 142 LEE e MAINTENANCE FHILOSOFHY SIMPFLIFIED EBLOCK DIAGRAM MICROCODE EKIT FIELD CHART MAJOR BUS DEFINITIONS BACKFLANE FIN COUNTS FAGE * j INDEX OF MAIN TOFICS - CONTENTS? ciss leel (008 008D oS0 Sn russ coct e cvee ibee toss seee coit sage iese sees camm ot ses vasn wate een samm moe mese mare sewS seve Sese mrE G4 ‘bes ES 1048 Sebe sete SFd SPSs Sese seie SmS B 0O OB TASS SASS WES Sims SUSD G606 MPER CE CCI WS SES Lem LS e Gmes L . IV SHFT E =B \}" . \} TOK _Jd ccs ,i | i I sTATUS :.I,)l msQ ADORESS/DATA — ST rDPM ;. MC_ e e —— "o - Tl , STATUS v y ccc |[AAMLL wc [ToUCF | me .78 2t - ATA| __AEADD WRITE DATA || v --cc—s-' T | i cac |WY] cmx ::: PA - | e | .8 L/ . I [ qg s | 11 Il 3 Temes | HHM.] | a‘:" cAx um ACY AK ar |) i i 1 | - \ __—. 2 |___uvecton i e | e ) | _ | i : wr T N BLOCK DIAGRAM VAX 11/750 (GATE ARRAY LEVEL) 8 DATA ADDAESS 0Q<T:8> V - 2 VAX 117750 MAINTENANCE PHILGOOPHI( THE CUSTYMER IS RFQUIRED TO PRGVIDE A VIICT SRADE TELEPRONE LIME AJD CONNECTOR FOR ONC (DIGITAL DIAGHOSTIC CENTER) COMMUNICATION, (THAIS REQUIREMENT IS INCLUDED «#ITd PCWER AND ENVIRGWAMENTAL REQUIREMENTS 1M ThE VAX 11/750 SITE PREPAKRATION GUIDE. P/N EK=CORP=SP=003 ) (REV, IS5 SUBJECT TQ CHANGE) ThE RDM UPTION WILL BE INSTALLED IN THE BACKPLANE OF ALL VAX 11/750 SYSTEMS DIGITAL INSTALLS, TO PROVE THE VALUE OF kKU TO IT »ILL BE LEFT I THE CUSTOMER DURING THE wWARRANTY PERICD. THE BACKPLANE FUR ALL CUSTCMERS #ITH THE STAYDARD RD MAINTEMANCE COMTRACT, BASIC o] ) FLOW:Z THE CUSTO“ER CALLS THE DDC A "TOULL FREE ~UMBER" wHEN THEKE IS PROBLEM. (NOTE: NUMBERS ARE SUBJECT TGO CHANGE) 1=800-525=6570 FOR DDC CONNECTION 1-303-599=4000 FOR ENGINEER ASSISTANCE (NOT TIOLL FREE) 1=303=593-7890 U.S.F.S. EZMPLOYEES ONLY MAIL STOP CX/DDC COLORADO LIBRARY 0.E.C. SPRINGS, COLORADU THE DDC PERFURMS REQUTE SUBSYSTEM ISOLATIOwN. THE DDC IDENTIFIES THF FAILING THE BFRANCH OFFICE SEXD THE PARTS TO FIX THE PROBLEM, FOR CPU THE ENGINEER TAKES THE ENGIWNEER RUNS THE FOR CUSTOMERS THE RNM TOOL »HEN THE RIGHT ENMGINMEER 3RAGCH AITH WITH THE CPU SPARES TUS8 NON=RD INTO THE VAX COJPLETES THE AND kD ThE UFFICE, RIGRT THAL TN THE SITE. MICFCDIAGNOSTIC CASSETTE CONTRACTS, 11/75¢ THE =NGINEZR SACKPLANE, »ORK, LOGIC M4MODULES, FAULTS AFE ISOLATED AND SIMULTAINEOUSLY TN A STRING OF TW4Q GATE THE ENGINEER THE FIX 1AERES, INSTALLS AND REMOVES 1IT TD A SPECIFIC CHIPS (AVEFAGE CF ARRAYS)., REPLACIANG THEM THTIS TQ PROBLEMS: dE/She ON CPU MODULE UPTION THE PERFIR«S COMPONEMT INDICATED S4NULD THSu SITH SUILDYING A 1S IMNPURTANTS!!! wdpEl CLR NDJES ALL OTHEX C2ll RZPLACED, BE GATE VRPIFIEN CASE LEVEL APRAYS. #ITH KISIURY UfF MIOT CURRECT 15F FAJLT FATLJFES, THE FAILLIANG REPLACEMEANT THE (CLR) 3Y DAC CTI1eR 1U ASSIST FAOR THE 131/750. FAILYRES Ob CPJ s»UlULe LIGIC HMCDULES, Ir ASSEMELT IS awnb W-8US LA I CONSOLE |NTERFACE C-T- N 1% ' T RoUT ROUTING AND prs MEMORY CONTROL ARRAY M BUS 4 INTERNAL MEMBUS } 1/ \r — UNIBUS | FLOATING POINT D REMOTE ACCEL MODULE DIAGNOSTIC | UNIBUS 0z VT 100 ADDRESS| oM L —7* 14 c | 2 CPU \\ CONYROLLER |orive LPO4 VAX-11/750 ) WRITABLE CONTROL | CONTROL STORE ggN‘I'»goum oriveo| 14} . Kl |2) | CACHE INTERFACE 3 \ N & TRAPS e [ LOGIC ALIGNMENT WCSPRES SEQUENCER iNTeRAuPTS K ADDRESS DATA MICRO- [ le MIC OPM TUSBE 1 TUSB INTERFACE C: l= o STORE UET 0313 | : AMO3 Max bevs. 8 AMO3 \ I CM1062.MCR |130,134) $ DEFIN .MIC [130,034]) 12440 12449 12450 12454 12452 12453 19-Jan-00 Comet Micro wWord Chart + ! Lttt % ! {AjAJLITY Pttt LILI I | | ! | | 12469 124170 $2474 ¢ | ! | g ] RaY plej7 619 ‘-‘—‘..oc‘ | 2 | { l J RASRC e [ ' c NCIRL 8us i =y 4t~ —.-----------’-’-—'% - 00|06 7684/221098|768432101090]70¢8 ¢ J32|110190°7 . 8 4}3}2 ——44 .-‘.-----’.--’--..---’-------’---% | Al Iy A v A o MUX U ¢ 12470 $= 12493 ¢ 76|660680/0686688|588863384 4" 444444413333 3.3‘3 22222122222 c | 12496 1af 0 1 . 4 s 2 12492 12494 A-.--.’-------..--‘-----—---. a1|7|1 737 ¢ Vv 12490 ¢ ———t Iy :fl 12491 §2492 %-‘.--‘-----‘P---------------.‘ ‘-G-‘--—Q ‘u §12400 12481 12402 12408) 124084 {2409 {2408 12467 12400 12409 %— ALPCIL | | 12473 12474 12477 12470 12479 waed ! | ! 12472 12479 ¢ ' 12462 ,fllfll TR I H LitaL - 4 12466 12467 124680 - | * LonLes = 3 12463 i ¢ { ’—’-‘,_—-Q 12463 12464 6.00, Clock rate = (180ns - | 12459 12460 12461 CLOKX Rev : Comet Micro Word Chart® .10¢ * 32454 $2459% 124586 $ 2457 124580 15122168 ) = ALY 4 ROTSRK ¢ ccmlsc o 0Q3 + L Lt | A—A FPA ccrsiL 2 L ] i ‘A' S . lll _ ’-------.-‘-’ uam”unoo Ofl'ols 3320109680 T, mpmanncvoncas ) {DQ2 = % moanene jocwmacassd jOoO¢ 4,---—---’---0 ! 98765343210 #—#———e ey ALUGD ¢ fomay eecjnencncone) ¢ . . AAJOR BUS JFFTINITIGHS THE ‘MAJOR COMPOMENTS OF THE PROCESSOR AR® [ {TZRCUNMNECTED VIA TwC 32 BIT "LOw TRUE" BUSSES CALuED Td& 4EMIRY gUS (MBUS) ANC THE 4BUS: wRITE BJS (4RUS). THE “EMORY BUS 1S PRIMARILY USED W~HEW INSTRUCTION QPERAND DATA FROM MEMORY, MODULE AND TO THE DPK FOR PRUCESSING. SIURCING PrCGRARM THROIUGH THE MIC I MAY ALSC BE UTILIZED WHEN THE OPTIOWNAL FLOATING PJINT ACCELERATOR REJQUIRES OPERAND DATA FRCGm THE #M1C MIN'JLE Ok MEMCkY. THE uBUS IS VORMALLY SOURCED FRUM THE MIC mOCULE EUT IT CAN ALSO BE LOADED BY THE 4TEAP RLGISTERS. G ThE CONTROL COF THE MBUS IS ACCOMPLISHED EY DPM #AQDULE. MICRQCODE FIELDS AND CAHNHNUT EE DIRECTLY ACCESSED &Y THE ABUS: CONSOLE TERMIWNAL. THE WRITE BUS IS THE BASIC INTERCOUNECTINN BETwEEWN FOUR OF THE MAJOR CPU MUDULES (nPM, «4IC, UBI, FFA). THE WRITE BUS ACTIVITY IS CONTROLLED VIA NSICRGCOLE FIELDS AND CAN BE UTILIZED 3Y MOST CIMPONENIS INTERNAL TFE WBUS LIKE THTS M8US CANuCT -3% TO THE CPU XERNAL. DIRECTLY ACCESSED RY THE CONSOLE TER4INAL, CvI: NOTE:: THE CPU ME4QRY IWTERCONNECT BUS IS Tde MAJJPR CENTEAL IT IS A TRI=STATE BUS (SOME SIGNALS ARE LCw TRUE BUS. AND OTHERS ARE HI TRUE) whICH PROVIDES THE HIGh SFEED TRANSFER OF DATA BETWEEN CPU, MEMORY, AND DEVICE ADAPTERS (I.E. RH750, Dw750, FP750,0R750,JI750 &IC,). INDIVIDUAL MQDULES AND GATE=ARFAYS MAY HAVE ThIER Owx INTERNAL BUS STRUCTURES FUT THEY #ILL 3% DEALT wIlH AS #“E ENCOUNTER THEM IN THIS TrXT. BACKPLANE, REARVIEW 94 PINS ‘36 PINS G.1,0.QwW.X,y,2 NOT USED - 1 2/3 anma O —— EXTENDED HEX HEX SLOTS UNIBUS SLOTS SLOTS 45 6 7 8 9101 2 3 45 6 7 8 9 A 2 3 4 56 7 A A o A s o C D D E E | LY V"FROW‘—-B c F 36 PINS G,.0,QW.X,Y.Z, NOT USED 4 8 9 PUWER f D FAP W P PART SUPPLY P U P SEN T AP G S GNP ULY CONTROLLERS: ] | : | OPERATOR POWER PART WP D Uy RS v Sy S #°S W'y 7015929=00 = 11% . 1015929=01 = 230 VoOuT VOLY 71016157=01 voLrT = 2.5 H7104=C L5=30P (11SVAC) 6=159 (230VAC) U REMOTE POWERUP g‘l\s%.:)%"uecr ENABLE AND TEMPERATURE SENSE ——————& [ OVERTEMPERATURE SENSE AC FACILITY POWER . 115/230VAC, 18 > POWER o-B1AS VOLTAGES CONTROLLER < STATUS SIGNALS Acl an IAC FLOW SENSE lac BATTERY BACKUP ENABLE +2.5V POWER o BIAS VOUAG_ES ASSEMBLY STATUS sugum.sl SUPPLY ] BLOWER |\ o * ASSEMBLIES RELATED TO H7104 ASSEMBLY . 1.0.Y BATTERY® DISCONNECT AIR 15V POWER SUPPLY LT & & BATTERY BACKUP ‘ BATTERY BACKUP (OPTIONAL) 2710 |47V JV ] 1 ] |-5vB8|+l2vB DC v ) LO §1.2A ¢10A LO 85A . 10A POWER SYSTEM AS CONFIGURED FOR OPERATION WITH THE VAX-11/750 17104 Power System Block Diagram ;3‘\; 136A PARCL nl1l03=0) BATCERY BACKUP: H7112 SUPPLY SIGNAL AUMBP NP YPC WD SUR 7016156«01 = 5,0 VOLT PLUGS PANELS . W pe SUPPLIES: \ G +15V 24§ 3.5A ¥°8 000000 256 KB Q3FREE 040000 1ARRAY BOARD M7 S12xe OIFFFF 080000 768 X8 0BFFFF 0C0000 pgt 1024 KB 10 1280 KB 13EFFF 140000 1538 K8 1892 X8 1IFFFF 180000 1BFFFF 100000 2048 KB MAXIMUM FULLY POPULATED ARRAYS AFFFEF END OF EXISTENT MEMORY Expansion Sprce e M8750%s 170 SPACE £00000 MEMORY CONFIGURATION REG. A F20000 $20004 MEMORY CONFIGURATION REG. B F20008 F20400 MEMORY CONFIGURATION REG. C BOOTSTRAP ROM PROGRAM £28000 F28400 MASSBUS ADAPTOR 0 INT. REGISTERS MASSBUS ADAPTOR 0 EXT. REGISTERS F28800 MASSBUS ADAPTOR 0 MAP REGISTERS £2A000 £2A400 MASSBUS ADAPTOR 1 INT. REGISTERS MASSBUS ADAPTOR 1 EXT. REGISTERS F2A800 MASSBUS ADAPTOR 1 MAP REGISTERS F2C000 MASSBUS ADAPTOR 2 INT. REGISTERS F2C400 £2C800 MASSBUS ADAPTOR 2 EXT. REGISTERS MASSBUS ADAPTOR 2 MAP REGISTERS £30004-C UNIBUS DATA PATH CONTROL & STATUS F30800 P LR G £32000 F32800 T 2ND UNIBUS MEMORY SPACE 128KW F80000 FCcooce - / &£/ UNIBUS MEMORY SPACE 128KW VAX-11/758 Physical Memory Organization UMS - SHUTDOWN FROCEDURE TO ERRING THE VAX/UMS OFERATING SYSTEM DOWN: ONE MUST HAVE THE FROFER PRIVILEGES. THESE CaAM BRE HAD RY LOGGIMG INTO THE SYSTEM MANAGERS ACCOUNT. THE NORMAL FIELD SERVICE ACCOUNT MAY NOT HAVE THE FRIVILEGES TO EBRING THE SYSTEM DOWN. S0 LOGOUT FROM THE ACCOUNT YOU ARE INy IF YOUR INs AND LOG INTO THE SYSTEM MANAGERS ACCOUNT AS SHOWN BELOW (UNDERLINEID. (OF COURSE IN THE FIELD YOU FPRORAELY WILL NOT HAVE THE FASSUWORID USERNAME :SYSTEM MOTE THE FASSWORD IS NOT DISFLAYELD. AFTER YOU HAVE THE "$* FROMFTs THEN TYFE THE UNIDERLIMNEL RESFOMNSES. Welcome to VAX/VMS Version VUX.X ¢ PSYS$HSYSTEM:SHUTDOWN OR $ PLSYSEXEISHUTIDOWN System shutdown command Frocedure. 23I-MAR-1980 09:33:23 How mane minutes until shutdown?! 10 (or whatever? Ressorm?! FM (or <CR>» if ro messase is desired) o wou want to serin down the dishks??! YES (or <CR> 1f not) Eveected urtime? (<CR> if not kriown):? Enable sutomatic reboot?: YOU HAVE NOW STARTED THE SHUTDOWN FROCEDURE. YOU HAVE GIVEW IT TEN MINUTES TO 00 THISs, ALSO GIVEN THE REASON AS SYSTEM FM- AND TOLD IT THAT YOU WANTED TO SFIN DOWM THE USER FACKS (MOT THE SYSTEM FACK). THE SYSTEM WILL SEMD OQUT A WARNING AT FREDETERMINMED TIMES, IT WILL STOF ALL QUEUESs LOG EVERYONE QUT AND FINALLY COME UF WITH THE FOLLOWIMG HMESSAGE! SYSTEM SHUTDOWN COMFLETE - USE CONMSOLE TO HMALT SYSTEM CNOW YOU CAN TYFE A CONTROL °"F* TO GET EACK TO CONSOLE COMMAND LANGUAGE MODE WITH THE PROMPT ao-s 10 LOOO1 FPA 11 EF750 The An Floating Point accelerator (FFR) = optional hiche=speed gprocessor extention to the vVax=11/750 A. CpPU. FETSO0, Purpose: 1. 2, To increase the speed at which Vax=11/750 cean execute certain floating point instructions,. a. Single~-precision floating b. Double=precision floating Ce. Extended d. Polvnomial To enhance multiply 3. It will grand Modulus the the (EmOD) (FOLY) execution of integer instructicns not (G) accelerate or huge (H) execution ot tloating instructions. B. Characteristics: Extended~-Hex Module 28 gate arrays 64-bit fraction data path Mo internal diagnostics 80=-pit micro=-worgd independently Cperates CPU data of cache the CFU Uses b. Uses the CPU Instructicn instruction fetch while FPA Is 1) Celculate 2) Fetch 3) Prepare executing, remory dbufter the CPU edcresses date tc fetch data for a. trensmit cata for cén; 4) 7. 8. Store Can operate 1.7 X results on numbers on signed the CEU. 12 from 10 Can operate 2 -1, Interfacing to i, M=Bus 2, W=Bus 3. Miscellaneous a. FPA Control store .29 integers address lines X 10 from to 2 from CCS. be. Except;dnsllnterrupts to UBI, C. Clock d. Others, signals to and from from the all DPM, of the above, to S30ARD 13 CONFIGURATIGHS THE MICROFICHE LISTINGS FOR ECKAB.EXE AND eECKAC.LXE GIVE BOARD LAYNUTS AND LOCATICXNS 0OF EACH GATE ARFAY, | | | | (TaP) THE FPA i FCC | MODULE | FOA $L00O1 | | FEX | | FEX ! i ! ! { | | I i { | | o> LED (FPA ENABLED) ! i | | I rEA " oFm | \Fcs |t | | { | Fes T J i | " Fes | FuR 1 | [ i | F10 1 i\oFn | | ! | =t TR | | ! =T VoF i | i i [ | i ] | | FFA i T \oFs 1 i S—— S—— | =pa OPSRANDS N MB'JS 1/ DAE.A . < PATHS OPERANDS/RESULTS TS D 3 FPA CONDITION CODES | INTERFACE CONTROL CONTROL LOGIC CS FPA CONTROL SIGNALS - INTERFACE CONTROL - | ! i CS WCTRL N STATUS OPCODES N . SIGNALS XBUF CONTROL SIGNALS T vt v crws ¢ N ) | I 14 TIMING SIGNALS FPA 1/0 CPU SIGNAL INTERFACE < . OGIC FP750 INSTALLATION 15 PROCEDURE *%% CAUTION *x% THE LO0OO1 “ODULE, AS ALL 11/750 MODULES, CONTAINS ELECTROSTATIC DISCHARGE SENSTIVE DEVICES THE USE OF THE VELOSTAT KIT IS ESSENTIAL TO (ESDS), PREVENT DAMAGE WHICH MAY NQOT 8EZCOME IMMEDIATELY APPARENT, (VELOSTAT KIT NUMBER A2-¥0299-10) 1) Run system shutdown or the equivalent (@SYSSSYSTEM:SHUTDOWN) 2) and Verify that microcode decimal the hardware revision (step revision level is level equal to or {s Rev 3 greater or higher, that 94 4)., 3) The FP750 will only work correctly in 11/750 systems that contains MINIMUM CPU of the 11/750 system (sS1ID). 4) Microcode revision examine the System Place the keyswitch to the LOCAL (“P) and type the following: >>>E/1 94, To verify revision level IDENTIFICATION Register position, HALT system — 3E (printout) I 0000003E . 0200SEXX | | ° Ucode Rev (HEX N3TE: Hardware 94 SE) XX = 03 L0011l controller/old backplane XX = 30 LOO11 controller/olad tackplane/SID switch XX = 38 L0016 controller/new backplane/SID switch VAX750=R=003 FCO (REV 94 Micro code) is a prereguisite the installation of a FP750 option, This FCO consists of to the L0004 UBI module and replacement of the L0005 CCS this will bring both modules (CCS and UBI) o REV "H", This FCO Ravy c¢can bte ordered using EQ=01128=0! number, before rewerk module, 16 ¥¥*%¥ DJ NOT S) INSTALL Place THE tne L0901 MODULE frontpanel position, and remove 6) the VeloStat and Unpack attach the 15° WITHOUT PROPER Action on Power MICROCODE Switch to power from the system, tool from its container, pot ground cord to the the ooen VeloStat LEVEL **% YALT package, snap fastener, which attacned to the wrist strap. Attach the end with the clip to a reliable electrical ground on the 11/750 systenm, alligator 7) Install the L0001 FPA module in slot #1 of the CMI backplane, If the RDM or DM L0006 module is not already resident in the CPU, install it in slot 26, move the console and TUS8 cables from the left side to the right side of slot #6 on the processor backplane (looking at the back of the processer). 8) Reapply position, the HALT primary on the state, power console with 9) Test the FPA’s following console E/1 Depositing 0 to 8000 Db/I 28 E/I 28 (print to keyswitch systemn will prompt 00000028 28 >>> 8000 out) IPR#* >>> Devositing console the The to local come up in capability by using not be >>>, the 0 23 (print turning panel, ON/OFF (enable/disable) commands: '>>> D/1 28 >»> the by disables out) IPR#%# FPA 00000000 (GREEN 00000028 28 enables FPA LED will 1it) 00000001 (GREEN LED will be 1lit) N3TE: FP750 uses 17 the Accelerator Status/Control register IPR #28 The following diagram describes the'bit position of the Accelerator 31 | 24 Control/Status 23 16 Register (ACCS) 15 8 7 0 X000X00O0D0000000XO0000M00000000O00O0TKX.} ..-------.-------------------.---.-—----‘------------------------ Irror === Reserved Overand [ ° a:':celerator .-------.---------------------------Q-----------:-' Type - 8it 15> = Bit <7:0> = l | FPA Enable : N i (%0) Accelerator Type = No accelerator (or disabled FFPA) = Enabled FPA =255 = reserved Note: ACCS <15> always reads as 0, In order to determine if an 11/750 nas an FPA you must first write a 1 to ACCS <i15> then read ACCS <N>, If it reads 0 there is no FPA present, {f it reads back as an 1 there is an FPA and it {s now Enabled, 3aostic Acceptance HRrBENNRERTIR NN TN The VAX Architectural and Floating Point Instruction FExercisers are used to verify the inteqrity of the FP750 option. These instruction exercisers will run under the Diagnostic Suvervisor stand=alone or on-line, but to properly test the #P7S0 they should be run stand-alone., (In on=line mode, tney cannot disable and enable the FP750). The enhanced DP¥ micro diagnostic is used to verity the logaic wnich i{nterfaces the FP750 from the DPM module of the 11/750 processor, Version V07,2 or greater of the ECKAR DPM =micro diagnostic will verify some of the CPU-FPA interface logic., Verification of this interface logic, w#which is resident in the DPM module of the CPU and is not activated until the FPA i{s enabled, is tested under test D2-DC of this diagnostic. These test are listed below: D2 D3 D4 DS D6 D7 D8 D¢ The FPA Enable/Disable Function FPA Stalls/wait Test 4ABUS/WBUS Interface Test FPA Reserved Operand Trap Test FPA Trap Logic Test Condition Code Test (1 of 4) Condition Code Test (2 of 4) Condition Code Test (3 of 4) DA DY Condition FPA Copv Code Test (4 of 4) fo Condition Codes DC tPA Cooy of the FU 84t Boot Diagnostic >>> B/10 DS> ATT Sucervisor (ECSAA) {device] KA750 CMI and attach NO NO YES 0 (Accelator === SELect PS> SET The the ARCHITECTURAL instruction FP75S0 disabled (Green LED this the FP750 12) Run f£irst FPA) has will exerciser on the completed be will LOCO! run first with %odule will not successfully, another be 1lit). pass with performed., EVKAC The FLOATING run wvhen successful with fallure (DPTM micro . 1loqic on Run pass enabled also 13) type) O=No EVKaB dhen ECKAB, 1=FPA TRace Run a ( ALL 11) If processor, i | DS> the : KAO 2 10) the POINT FP750 completion, occurs when diagnostic) the DPM reolace instruction disabled L0001 the first is either verify If exerciser the FP750 running to module, tne the on the and enabled EVKAB is rerun not EVKAR, Again and or integrity failure module like pass. tested, EVKAC, of will after the run ECKAB interface detected wnen EVKAB,EVKAC, and running ECKAR, ECXASB Run DPM micro diagnostic to verify the interface logic “p (go to console program mode(nalt (go to RDM conséle control mode) RDM> (get TE RDM (start Prompt;install If |RDM {s to be removed, Console and TUS8 16) Dis-connect the VelaStat 17) Power 18) Rootstrap up power cables tape) to tool down their and ECKAB indicate 4S5 minutes). system, operating remove original resack system. customer’s TUS8 test) 14) Error Free Passes of EVKAB,EVKAC and is complete (3iagnostic runtime {s atout 1S) macro “D RDv> replace any activity)) software, it in verification LOOCE module, positions, the kit container, 19 L0002 DPM 20 THE DATA PATHS {OwdlLE (DPM) sSLaT 2). 310002 IT HOUSES THE GENERAL PYURPGSE RFGISTERS (GPR?S), I#dTFR:iAL PRIVILEGED REGISTERS (IPR’S), ®TEMP AWD RTZYP MICROCTGDET REGISTERS, ARITHMETIC LOGIC UWIT (ALu), ROTATAR LOGIC, Q AxD D REGISTERS, P AND 3 LATCHES, SYSTSY CLICKS, MICKOSEGQUENCER, IR DECODE KROAMS. THE DPM IS CONNECTED TO THF W BUS AND M 3dJS. (THE MICROSEQUENCER IS CONMNECTED r0 THE CCS IF CCURSE) NCTE: THERE IS NQ PARITY CHECKING AT ALL ON THE 5°v WOCDULE OTHER THAd CONTRAL STORE MICROCODE PARITY #HICH IS -LATCKED ON THE MIC, UBI, DOP4, AND CCS MUDULES AJdD CHECKEC CN 1hE L[Pwm, THE MICROUDIAGNOSTIC ECXAB.FXF TAPE GATEARRAYS: #1 WILL T<ST THE TPk, ALP,ALK,CCC,CLA,IRD,4S4y,Pd8,S5AC,SPA,SRK,SrM,TOXK GATE=ARRAY ¥AGIC 800K PICTURE SYMBCLOGY X:X = COMPLETE RAWNGE OF BIfS CONTAINED IN EACH CHIP N = <> = o NOT APPLICARLE 3I-DIRECTIONAL INVERTED IN THIS CHIP (MAJOR 8US) 21 (TQOP) THE DPM | SPA | i TOK | I S’qt | MODULE I SRM2 PINS>>>> $L0002 | | SREM3 | I SRv¥4¢ | w—— e - temem: - - 22 DATA PATH g2 —————— ATCH g t H *e i . A SUT N s < o LOGIC s L ouc" ! 70 wamony| , wTERsACE g ,' A s TO OTHER MODULES U A e Data Path Block Diagtam —————— —d 23 ALP: ARITHMETIC LIOGIC PRIOCESSOP(ALI) CONTAINS LOGIC TO PERFIRM 1094 ARITHAETIC FUNCTIONS, ALSU CONTAINS A "SECCHND LEVELY" WITH THE SUPER 3 PART RNTATOR MULTIFLEXER, CHAIFS: NUMBER BEST MODULE: BUS NIAGHOSTICS: DPM D2PM GATE DEFINITIONS: SB = S3US USED AID 3IT SLICE <3=9> ALP 2 <7=4> ALP ALP ALP ALP 4 S 6 7 <15=12> <19=15> ALP 8 <31-23> ALP (1 SRM <23=20> €27=24> TERM = “B = WR = THROUGH 3) (SUPER RUTATCR RUS INTERNAL TOC DM ONLY) TO TRANSFER IMTERMNAL RUTATIR DATA EBETwEEM ) RBUS (RQTATOR BUS INTERNAL Tu 0Pm JNLY) USED TO TRANSFER DATA FRGCM SCRATCHA ©9AD REGISTERS (EXCLUDING MTEMPS) 106 ALU, MBUS (MEMGRY 3US, SEE MAJOK RIS DEFIN(TIOMS FAGE) WBUS (WRITE 3US. SEE MAJOR BJS DSFIVITICNS FAGE) 44UXZ DEFINITICNS?S . ECKAB.,EXE FIRST AND SFECOMD LeVEL SHIFTERS. RB USE CHIPS) <11=3> 3 MICRO’S ARRAY: SIK CHIP ALP 1 ALP 19-14682 (S A<D LAOGICAL SHIFTER FQR = W BUS MULTIPLEXER ALP EQUAL T3 Z%RO NyN,EXT.DATA,ZXTLLCATA,EXTLDATA 55(2,6,10,14,18.22.26,30)--1--"""'"'0-43-EXT-0ATA.EXT-DAT\,EXT-DRTA 10=47.5dF S8 (1,5,9,13,17,21,25,29)ac3aal QD CLKaa4-ol (6'10014'1q022'26'30'34) lemd5.8SB (3,7,11,15,19,23,27,31) {0eddSHE 0 lmw43.58 (5,9,13,17,21,25,29,33) le=42.56 (¢4,8,12,15,20,24,28,32) lewtleSd (U,4,8,12,16,20,24,248) 10ed0a (3,7,11,15,19,23,27,31) 10a39.RB (3,7,11,15,19,23,27,31) e 38GROUND |10a37.RB (2,6,10,14,13,22,28,3C) l0a3b.kd (1,5,9,13,17,21,25,29) lew3SaGRIUND |0w34.DP PHASE |Ow33Kkb (G,4,8,12,15,2¢,24,2¢%) |0e32-"8 (2,6,10,14,13,22,26,30) {0e3laB (3,7,11,15,19,23,27,31) |03V (01403'12016020124928) GENERATE CARRY (G Xi:X)aaS-0l ALUC(0,3,7,11,15,19,23,27)aaba0l V (N,7,8,15,8,8,8,31)uca=] A (3,7,11,15,19,23,27)au8=01 PRUPAGATE CARRY (P X:!X)aadao0l We(3,7,11,15,19,23,27,31)210<>1 AB (1'5'9113,17'21025029)-11<>' VGaLl 2l VCCalldamal WB(Z!&.10,14018,22026,30)-14()l (0'405012;16'20'24028)-15<>| (0,3,7,11,15,19,23,27)=16a0i : WHMUXZ ALPCTL ALK 0P ALK OP ALPCTL 2 4 § 3 (GOPC2)alla=l (CPC4)l3.-l (OPCS)al9cal (CPC3)a20aat ALK JP 6 ALK ALK OF CP 0 (GPCO)<23.<! 1 (OPCl1)a24a=l! lee29-ALPCTL 9 lew27AL2CTL 7 l0=28® 3(0,0,1,1,2,2,3,3)a2lax! (0OPC8)n22awi lwm 20LALPCTL wS1Z£1 THIS (13PCO) (1,59,9,13,17,21,25,2¢9) 8 (3°C7) (2JPCR) 1025 +3Vidm,+3VN24,X(8:19)nN, ) £(8215)=1,NS172£1,0812%1,C812-1, cocmcceecs STH=Z Y “5 A 1 |--46-SB Taw ARCS SIMGIRS N RIJARD ALK ARITHMETIC LOGIC CONTROI, COWTROLS THE ALP FUMCTIONS BY JOECIODING 4ICPOCOLE LIPUTS ARND GENeRrRATING THe COWTROL SIGHALS., PART NUMBER BEST DIAGWOSTICS: MODULE: TERM 19-14689 DPH DP¥ GATE DEFINITIONS: (SIQ) = MICRC’5 ARRAY: SHIFT ECKAB.EXE ALK IN/cCUT - - ALK 3 (SIN) Tawle0==wseseesssg_48_Q (SIQ) ALU SI0 OQuwe2.0!l o 1€>4 7488 31 ALU SI0O 3le=ld.0l 1<>46_W8 30 ALPCTL Quwiw=l 10453 ALPCTL (SIO) lawSa=l 15 I0wd44Q ALPCTL (SIO) Sewbaw! 31 | w43 LALPCTL ROT ROT 3eeTww=l lewd2LALK fewBww! lew4lC ROT 2aw9awl DOURLE ENABLEL10L..t QP 3 9 31 | e 40 LALPCTL 4 | mee39a8CD PSLCellaw! | w38 aGRAUND VeAnl2awl |lme37ALPCTL VClaliaal S |lew3bLALPCTL 2 ALK 0P "ROT ALK OP 6.ida.l 0nlSo=l Salfaai | e 35LGRCUND lww34ALPCTL |0e33.LAONG ROT lalTaal QD CLK.i18.01| ROT CARRY 9 lww32.SPW 1 lewe3la.D SIZE lewee30L.5Pw 0 Sal9%.al 3 LITERAL O ALPCTL 7220aa! (COUT).21.01 ALPCTL 9e22a<| |lwelQ.SPWB ENASLE (SYTE) lmwl28SPil EVABLE (LUMNGACKL) |lwm27=SPAA ALK QP ENABLE 4.23.-1 (WOKD) lee20.D ALX OP 124! OUT TAIS SIDE () TOWARDS SIZE |0w25.(BYTE) FINGERS On 1 X(321S5)EN BUARD 25 CcC: ConuNTi1lu CODE CHIP CONTAIHUS PSL(PSW) BITS <C,V,Z,N,LV,F1,IV> CONTROLS THE SETTING OF ALL CONDITIOXN COCES FOk VAX NATIVE AND COMPATARILITY ~ONE INSTRUCTIONS AT ThE REQUFEST OF THE MICROCODE. NORKS PART NUM3ER: BEST DIAGNOSTICS: MODULE: CONJUNCTION THE ALU. 19-14684 vPM GATE DEFINITIONS: WITH CCBR = DPM MICRO’S ECKAB.EXE MIC MICRO’S ARRAY: CONDITICON ECKAC.EXE ccc CODE oRANCH cCC D SIZE Quelae===<==e=s==0_48_FPA PRESENT D WMUX Z BO SIZE lec2awl (BYTE)eo3dee! IR el IR 4enSaal IR 7Teeba=! 1<>47.4WB 15 |leem36LALUV 31 o] |l ;e dS<ALUV 7 | ;@2 ALUY leed3WMUX 15 Z 31 Sealaal 3mnfeal 2au9.al IR 12l IR 011l VGAL12. .1 IR IR | @ 38GROUND w37 =dMUX 83 (3YTE) la=e3laWMUX Z 32 1<>30.%8 4 l w29-CC CTRL |lmee28CC CIRL lwe27CC CTRL (BYTE) 1<>36.4W8 VCCal3aal Z 7 FPA Z.14_01 |l e 35GRTIUND 1<>34_wB S FPA Val6anl | ae33.CCBR ARITHMETIC TRAP.15.0! 1€<>32.WB PSLCal Tl 3.22<>1 WB 1.23<>1 N 2a24<> THAIS SIDE N 0.21<>1 WB 1 & W CCBR 0.13..! PROC I4IT~19.0l BUFF B CLK.20..l A3 (3YTE) 10=42_ALUC 31 10-41.ALUC 10 | 040 ALUC 07 1<>39.w8 31 IR lw=26aCC Q) TOAARDS le=w25.D FIMNGEPS ON CTRY CLK EN 3JARD O TERM IN 26 CLAZ CARRY LOQOK LOGKS AT aAnEAD CHIPS (P AdD PROPAGATE AL? CARRIES, AS WFLL THE MOST SIGHIFICAAT CCC W1TH CHIP ¢ RBITS SIGHNALS)TO AS OF DETERMINATION DEALING EACH OF GZVERATZ wITH UATA TYP2< TI POSITIVE IR CHARACTERISTICS. PART NUMBER: BEST DIAGNOSTICS: MODULE: TERM G ALUC P G ALUC G 0PM GATE flICRO'S ARRAY: BCD = BIJARY ALUC = ALU JSGATIVE ECKAB,EXE CLA CODED CARRY DECIMAL BITS (12:15)endo0] (04:07)ac5-0]| lo~d44.G (31:28) 0 10043.P (23:20) (C9) 31} |0=45_LITREG aedaol | | 004268CD 10a4lalP NeoFew ! 10a40LALUC 100! |0w39.P (03:00).1lo0! CLK FRIY NawBwe | ALK (19:153) 07 (C2) (31:23) | 033.GRIIND VGaA_12.0 G ALUC G |0w37LALUC 1S (C4) VCCwl 3.0l (31:28)=14.01 10=36.G (11:08) | 03S5-GROUND 31 wl5L01 (23:20).16.01 |0w34.G (19:156) 1033.P (V3299) G (15:12)a17-01 l0m32-P (27:2%) P (11:08)_18.01 |0m3la (07204) (27:24)=19_0/| 10e30LP (07:04) 27 (C7).20.0! | 0w29.G (03:00) (11:08).21.01 10=28aG (23:29) G ALUC G G ALUC G AIU CLA (12:15)anlO==emncccae__48.3D CLK N3 BCDuw2ew! © lew47-LONG LIT 23 (C6)mw3o0l lewdb6at3V NOY ) Uy B ALUC ALU/CR STATE 19=14686 DPM DEFINITIONS: THE (27:24).22.0! 19 |0w27CARRY (C5).23.01 (19:16).24.01 THIS SILE 1 Q) TOWARDS I FROM 0e20ALUC 03 (C1) l0a23aALUC 11 (C3) FINGERS ON BQARD ALK CEF TEE 27 IKD: INSTRUCTINK REGISTER DECHNE CAIP RECEIVES HELPS THE FOR IN INSTRUCTION DECUDE THE CNDRE ROMS Id IRD1 DECODE EACH INSTRUCTIAN IRD UNTIL STREAM OP HEXT . ADDRESSInNG LA <=CSAD(3:0)=={ ROM = L E L ! OSR TP Y IRD L ¥ ¥ | IR Y YT Y X L THE EXECUTICH SPECIFI&R, PRI2SR MODE, 0P ALL ASSISTS 4ICROCCLE ADDRESS CUDES BEST DIAGNJQSTICS: DP# GATE ZXECUTION dUFFERS X ! (HDR) DECODE BUS== Y MICRC’S ARRAY: XB G o= XB 1 IRPD 09 le=44.0ISP ISIZE 1 (IRD ROM) IR (buwda=l (IRD ROM)IR 07T =l lme43XBUF 03 leed42XBUF 00 (IRD RUM)IR 0S5aa9.<! (IRD KROM)IR 02.10..1 lee40LIRD RNUM 1 lew39L.(IRD RI4)IR 03 XBUF 02aaBa=! X3UF 09.11<>1 VGAL12-a| VCCal3..l lewd4laIRD X8UF DISP OSR 0SalTaa! A.18.0l XBUF 15.19<>1| X3UF 12.20<>1 ISIZE 0u2l.al! X3UF 13a222<>1 L3AD IRL23.0l X3UF 07a28usli THIS SIDE 2 |l e 38GRIUND lee37-IRD RNUY lew3haIRD RNUM 0 3 laedSaGRIUND lme34IrD ACTL 1<>33.X8UF 14 (IRD ROM)IR 04.li.l . (REGISTER ¥NDE)CST RMODEL1S..l CUMPATABILITY MOCE)PSL CMalbaa! LOAD RNUM ) THWARDS 9 lee3d2.8UF & le=31.IKD ADD CTL CLX 1 lee30.IRD CANTRIL 10.29.CSAC 03 10a23.CSAD 00 |l w27 <REGISTIR 400E 10.26.CSAD 01 10225.CSAD 02 FINGEPS 3% 3JARD CEIFS <==< ECKAB.EXE 0awl aa====ccce=es__38_(IR0D ROM)IIR O0daela=! © 1<>47 . XBUF 11 1<>46.X8U¥ 09 Jlacndea! 10.a4<>| | wewr4S5=wCTRL 2 (IRD ROM)IR OlauS.! CbN 41C MGODULE IRD XBUF XBUF A8UF X3UF LATCHED ! ! DOPM AKE ! 19=14696 NUMBER: GUFEEPS, R0OM | Cemmata=aXid Y THE CHIP PART MODULE: 1 FRUM OPERASD TIME. <--CSAD(9:3)-------------------IRDI ==CSAD(10:0)===-IRDX 1st GEMNERATING AND IRD1 DATA AwC MSGe MTCRO 28 SEQUENCER SEGUEXCES ADDRESS, THE AICRUCODE, COwNECTED PART NUMBER: 3EST DIAGIOSTICS: MOCDULE: DPM I0 FORAS THE wuw MICRL DOPM AICRC’S CTRL ARRAY: 2SR A..2.0} CODE A..3..l © SUT 2maleme! BUT OnwSaal! SUT leedd48UF lawbaw! Y lae43oSTK LIT OuaTaa! 10242.0SIn8 5 (FRUM ADDR 2.11a.| | VGAL12anl 10=37.USTK lee3S5S-GROUND 1.iSel |0.34.CSA0 STK Jul7wal lew3d2<0XT STK 1.i8..1 (ADC).21.0l 2222l | w2 BNXT 3 10.27.CSAD 3 STK SIDE S 4 l10.31.CSAD 4 le=e30.STK 3 lee23.STK 4 NXT 1e19eal 0 (ADC)a20.01 THIS IMNAIBIT RG4 OUTPUT Ould.-l 0224wl IRD IVH) H ENAEBLE lee36LJSR CTR NXT ROM w3 BGRCUND ADDR 2.23..! 0OS [0=41.ZER] HI #HEXT 10o40.MICRO ADURESS VCCal3aal lewdb ) TOWARDS EKABLE 10.25.CSAD FINGERS 2:d CF CLK USTX NXT NEAT B CLK B SEZRVICE ’ 10dS_M4SEQ INIT (VEGATIUN |0a39_ENABLE 1 41 104600 1.i0u! CSAD LAICHFS, |lewd47.8UF ADDR .CSAD STURF FIELO _ leclaa===weccce=__48_DISABLE USTK IRD CONTRCL VJEXT MSQ LIT FPA #AITo.8.01 USTK ADDR JaaSaw! USTK IF AJD ECKAB.EXE MS@Q BUT g8ITS 19=14695 GATF. LOAD 6 STACK 2 (AOC) (a0C) (ADD) YICRI (aDC) 304ARD VECTCR DCLO) THEREZ 1). 2), 3). 4). S). ARR FIVE wAYS 0QOF ScQUENCTI&G THe MICRJACOADE: M) MCDIFICFTIIONS) STRAIGHT THROUGH LEXT FIZLD AJDCRISSIANS BRANCHIAG O BUT CONDITIONS LN HARDwARSE PERFORMING MICRO VECTOR NPERATIONS JUMPS TO AND PZTURIS FROA MICRGC SUIROQITINES INSTRUCTIOU DECODE MSQ .--------------\' l -----------------------------------\ :SAD(S:O) FIELD “ .--------------/' prooewp FIELD o TQ CCs MCDULE | Owen awm NEXT NEXT ‘------—--------'-.-‘-.-----------f-/ e e ,Ow ceocseceeecswas) ' bl (D § | C can’ | | I | R 38 -, (| |1 Jos=eet | IN1Te==>| i I ===’ | | “ | [ T | | cmecmcmacceeaany| | 3UT FIELD | I VS E =--, o JOowwwweas |2 { | 2 - C oo’ i | T o .I 13 )om==am==a + d HNEXT==> “52 | { , | '<'USTK-->‘<- ' { bomma—t 'ICROSEQ Q| | | | l | | i ' cocncecessocacvnen/ | JSR | BIT=m===ea=>| | l | I I | _-—e 10 R | |e==eZFRO bPocoocameonmaommnp ' ' ' Jo==+ | | l === HI | | MTIZRO 1 N i X VECTCR <== SAC YACFOD X X <== CODES CHIP TRAPS SAC AnD UTIR CHIPS MICKG TRAFPS <== UTR AND INT CHIPS INTERUPTS CHIP PHB?: PRACTICALLY HALF BUTS | - CONTAINS PSL BITS <Ci,TF,FPD>, STEP AND ABOUT HYALF THE LOGIC TG PERFORM TEST 41CRO=-ORDEKRS., PART NUMBER: BEST DIAGNOSTICS: MODULE: TERM STATUS (3UT)3RANCH AN FLAGS, MICFCe 19=14703 DPM DPM GATE DEFINITIONS: COUNTER, PHR GOOD MICRO’S ARRAY: SAM = ECKAB.EXE PHB GOOD SAMARITAw 3US PHB D CLK ENABLE HawloO0w=w=seeece=0_45.CSAD 1 CSAD 0wu2.0! leed47MISC CIL B 00we3<d| [0-46.L0AD IR lewddPHB GOOD PSL O Newldewl 10wd5.BUF M CLK FPDauSeol B 03aab<>l [<>43.96 INTERUP TawT e DO CSAD 3..8.0! CSAD 2..9.0]! SERVICE.10.01 WB : 01.11<>1 27 1<>39.48 31 1 SAY SAM 2 0O ' | e=38.GROUWD VCCo13..l 1<>36.W3 02.14<>| TP 30 | me35aGRAUND CSADL1S5o-_i BUT GJJIN GQOJD 1<>40.%3 lew37-PSL le=w34.PSL BUT 0clfbacl LONG SAM 04 le=42.PHB leed41.PH48 VGAL12ual Wa DISABLE 0 |0=33.CSAD CM 04 (CI4PATASILITY 1al7wal le=32-IRD LOAD WU LITERAL.Z1§-01 lmw31.IRD ADOR CTL OSR 3UT 4,.19..1 10-30.L3AD 3UT 5w20aal BUT 2a2lmal le=29.IRD ADDR lmw?3MISC CTL CTL 3 lee27MISC lee26.MISC CTL CTL 4 | wmZS5=MI3C CTL 2 BUT 3222l 4B 05.23<>j CSAD S.24unl THIS SIDE Q) TOWARDS FIMNGEKS Cn BARD O A 1 9 MGDE) SERVUICE ARBITRATION AND CLOCKS 3 1 CONTAINS THE IRD COUNTER (WHICH IS USED FRIMARILY TO TRACK THE NUMEBER OF BYTES OF ISTREAM DATA THAT HAS BEEN EXECUTED)» SERVICE ARRITRATION REFERS TO THE FRICQRITIZING OF TRAFS AND MICROTRAFS, AND FINALLY THE SAC CHIF CREATES ALL SYSTEM CLOCKS, (HASEsBsQDsMyFHASE) FROM THE OSCILLATOR INFUT (RI7-RI3 ON BACKPLANE)» SAC ALSO HAS CONNECTIONS TD THE RDM HMODULE TO HANDLE CLOCKING CONTROL AMDI DISABLES THE CCE& EOARD FROM DRIVING THE MICRO ADDRESSES DURING MICRO DIAGNOSTIC EXECUTION. THE FIRST €S FARITY ERROR (DETECTED THE SAC CHIF ALSO MONITORS MODULE)s LOOKING FOR ANOTHER ONE MIC THE ON CHIF ACY THE RY EREFORE THE FIRST IS DOME WITH IT’S MICRO-TRAF (IN WHICH CASE IT WILL IMMEDIATELY HALT THE CLOCK. B . M - EASIC SYNCHRONIZED CLOCK 160 NS 6,25 MHZ CLOCK USED THROUGHOQUT THE CFRU AMD UNI. 320 NS CAN RE EXTENDED WITH THE CLKX EBIT OF MICROCODE TO 480 NS THIS CLOCK IS THE MAIN MICROSEQUENCER CLOCK USED TO STROEE MICROCODRE FROM CLOCK CcSs. SFLITS THE M CLOCK INTO TWO HALFS. FHASE IS HIGH NURING THE FIRST 1460 NS DURING WHICH TIME ALL READS OCCURs THE FHASE IS LOW DURIMG THE SECOMI THE FHASE CLOCK 150 NS WHEN ALL WRITES OCCUR. PHASE CLOCK Qo RUNS CONSTANTLY 180 NS 46.25 MHZ ' BASE CLOCK IS ALSO EXTEMDED WITH THE CLKX EIT. FOLLOWS M CLOCK., IT IS USED TO CLOCK THE Q (QUOTIENT) ANDIN It (DIVIDEND) REGISTERS INTERMNAL TO THE ALU SECTION OF THE DFM MODULE. CLOCK 19-14691 FART NUMEBER: IFM MICRO'S REST DIAGNOSTICS: ALL MICRO’S GATE ARRAY: SAC MODULE: DFM CONSOLE HALT.-1_o0-——=—————— —_A8_CLRX (CLOCK EXTENI { .47 _FF TRAF L CFU 0SC IN(18.75 MHZ)._2__1 0o Fo_ 46 ARITHHMETIC THAF o455 _FFA STALL N__.3.0i FHASE__4_.1 Vo A4_FF WAalT MEM STALL .S VA3 TIMER SERVICE 10-42_CSal 1 SETC_6--: EASE CLOCK._7--i 1o-41_CSAD' © o 40_CS5ALl 2 VOLSPLIHTERUFT FEMUING e SR _GROUNT Ty RO ADDR INHIBRIT(FROM RIM)_._B8__: CS FARITY ERROR._P_.—: L oM o COMFATARILITY MODEX_10_-3 HALT(STOFS B CLKIY.L11_o) FSL TR H o 37 ' 3s LOAD QGE VEALLZ ) WCC.13..-1 VS GROUND yoL34..00 SERVICE MICRO TRAF-14-.0: IRD CTR 115 VoS3 EMABLE MICRQ VECTOR BUT 016 b S2.D0URLE DHabRLE P31 0T DL EMaslE oUT 21740 BUT 1.0 i CoL S0 AT MTORD TRAR b T ot UT COTRL CODE A-l%.-. BUF M CLK_Z0 I IL". -‘-.2 ?-J ‘ 1 ". [ FLEE W T 2 0y !\{‘ e »- ot b et e e b % R dee PR c—vee g ee e e - Do 3 GERD DEST O TNMTRLY 1 T TN TR TR TR e b4 skTTY e bee hed eeen bl b s T PR| . ST S ' ’ o peen meen som o - . : cnee eemd smee ted® Beea s N 8! riem veees ot " - f . St DT e e TR TS pm e m TR s ey H i 32 SPA: SCRATCH PAD ADDRESSING THEZ SPA AdD IT CUNTROLS GPR REGISTERS), CUONTROLS THE THE CHIP ADDRESSING REGISTER GF THE BACKJP 54 SCRAPCHPAU STACK (3ACKS UP REGISTERS UP 1TC & COMTATIS LOGIC TO KEEP TRACK QF THE AUIC= INCREMENTING/DECREMENTING GF THE GPR’S, DEVELOPS IT’S CwN STATUS AND ENABLE PART NUMBER: BEST DIAGNOSTICS: NODULE: TERM BITS FOR THE VARIJUS REGISTEFRS. 19-14690 DPM OPM GATS DEFINITIONS: SIGNALS MICRO’S ARRAY: ECKAB.EXE - SPA MSPA MTEMP RSPA RTEMP SCRATCHPAD ADORESS REGISTER NUMBER dUS (FROM RNUM SCRATCHFAD ADORESS RNUY REGISTEE) SPA IRD LOAD RNUM D SIZE Onul.-l! (LOAD REGISTER) ewm3dem=l D CLK ENABLEwmnidww! leed7<IRD RNIJY 2 o) I<>46.48 02 1<>45.48 03 MSRC BUF 3ouSoal! M CLKaa5.0! PHASEwwTw= 1SRC MSRC 2acloal lew9ael! 4allewl VGA_12.-1 VCCal3aal TEMP 09 01 lew4laSPA STO0 (STATUS) leetl.SPA STt (3TATUS) lae3d.0 SIZE 1 l @38 .GROUND low37oINSTR FETCH ASRC MCS I1<>43 .48 1<>42.48 l==36.RCS 3PR e 35 GROUID RSPA MSPA 114 1.15__|I lew3d4KRSRC ASPA 2u16aal 10=33_.LITREG RSPA 2217wl lee32RSRC (ENABLE) (MSRC/=T#P).13.0l RSPA Qal9aal! lew31.DST (EVABLE)(RSRC/=GPR) 1 EVABLE 3 k#J)OT le=e3daRSRC lew29KSRC 4 S (DEST. IS KEG., YODE) 1SPA 020awl RSPA 3.21..1 lwe28LIT MSPA 3a2c=! lew27<RSRC 0 RSRC 2.23..! 1Ce26oRCS 10w25oRCS IPR (EIASLE)(RSRC/=IFR) TMP (ENABLE)(KSRC/=T“P) SPwML2401 THIS SIDE Q) TOWARDS FINGERS On O HGJARD 33 REGISTERS FALL INTQ DEFINITION OrF THESZ TWO CATEGURIES CATEGURIZS I3 RTEZ4PS AS AND 4TE~PS, THE FILLO#S: oo aed ememcecanecace\ | 4 TENPS |=eeecceeeee> i BYS R 8US pemmmcccaanca} 4 BUS tmecccncccneny ceeececsceawsee/ | R TEMPS | I I (GPR’S) (IPR?S) (RTEMP) oo M TEMP’S | |====we====> | | csvcesP M BUS TEMPORARY REGISTERS USED TEMPCRARY STURAGE OF DATA, 8Y THE (CAN ONLY BE ACCESSEN BY “ICROCODE NOR MICROCADE MICRO=MCNITGR) R TEMP’S = CONSIST’S GF ALL REGISTERS THAT FEED THe R B3US GPR’S IPR’S NOTE: FCk R BUS; TEMPORARY REGISTERS (MICRQCIDE QR MICKCGMCNITOR) 16 GENERAL PURPOSE REGISTI<RS INTERNAL PRIVILEGED REGISTERS (TZ¥PORARY HOLDING POINT FOR DATA DESTINED FOR MZMSCR’S RTEMP AND MTEMP 0=7 ARE DUAL PORTED TUGETHER, EX, ARITING RTEMP S ALSO A4KITES MTE4P S READS STILL OWLY AFFECT ONZ GF THEM SRK: SUPER ROTATIR CNNTROL CO%NTRALS FIELD S NOTE: ROTATOR MULTIPLFXZR UPERATINNS. SRK ARRAY CHIP OF CGNTRILS SIGHALS SHF (SHIFT)., CAN RE CALLED THESE QUITE THE PRI SIGNALS CONFUSING KUT AND CHIP. CHIP FUNCTIONS VIA A COMPLEX (PRIMARY), 3ZC (SECINCARY), AND ANL ARE MALFUNCTIOHNS BEST OF DIAGNNSED THESE USING SIGNALS THE MICEO ' PART NUM3ER: 19-14638 BEST DIAGNOSTICS: DpPM DPM GATE HAICRUO’S ARRAY: . SHF AT SRM DIAGNGSTICS. MODULE: LCOKS CF AICROUCODF AND TELLS THE SKM CHIPS 4HAT T LO. P LATCHES (STZE ANC POSITION) ARE COWTAINED IN THIS AdD THE SUPER 2341 ECKA3.EXE SRK SRK ROT Junclaw=""cacecces__33_R0T ROT Qeele=! ROT Sacldaw! O 10w 2 7 u(PRIAARY.FUNCTION)PRI leedb6RCT 1 1 (SECONDARYLFUNCTION)SEC 3aaid.0l | Owd4S5.(SECONDARY_FUNCTION)SEC 4 DSIZE 0ccSaal |04 (SECONDARYFUNCTION)SEC OSI2E S lacSewl (PRIMARYLFUNCTION)IPRI 070l 10243 (SECINDARY_FUNCTICN)SEC 2 1(TJO ALP 2ND WAUXZ BYTE ROT 4! WilUXZ SYTE 0al0w=} LEVEL SHIFT).11l.0! |0t 2.(SECONDARYLFUNCTIUN)SEC law8awl O | 0ed4la (SECONDARYFUNCTION)SEC | 0ed40.3D |Ow39.SHF | w38 ViAal2aw! VCCo13aa! CLK 2(TN SRM 1ST LEVEL SHIFT) 3RAUND w3 7=SREK ST1 |e=36<SRK STO (STATUS) (STATUS) . AMUXZ 3YTE AMUXZ BYTE 2alSawl! 1034.SdF 4(TJ SR4 1ST 4B LEVEL 05.16<>} | 033.SHF 3(TJ SR (ST W3 02.17<>14 LEVEL SAIFT) |Oa32LSHF O0(TJ ALP 24,0 LEVEL SHIFT) 3.14..! | ==35.GROUND 48 07.138<>] 1€>31..88B 04 w3 03.19<> 1 1€>30.S3 02 WB 00.20<>1 1<>29.SB 03 4B 06.21¢<>1 1<>28.SB 01 00 AB 04.22<>1 1<>27.58 S3 06.23<>1 1<>26.58 07 S8 05.24<>} 1€>25.08 0% THIS SIDE Q) TOWARDS FINGERS ON BOARD SHIFT) 39 SR43 SUPER 4 ROGTATIR CHIPS THESE PERFOR! CHIPS CAPASLE OUF AMD THE AND IT UOF R TAKING 3US, FRJM SENT CAN SHIFTER THE 4 84 A A FINCIIONS "FIRST 64 3US, AwxY SHIFTER THE ALU 0 (COMPLETE 4ITH BIT OF THIS SRM FGUR BITS ON COMSINATICA OF MICRCCOULE, (NI3YLE), THE OF THE DPM 3 MORE BITS 3SUPER MJDULE WHEFE INSIO® A 0,4,8,12,16,20,2%4,28,32 SRTM 3 2,6,10,14,18,22,26,30,34 SR+ 1 3,7,11,15,19,23,27,31 NUMBER: BEST NIAGNOSTICS: DPM GATE ARRAY: SRM (1 TnROUGH LCESIRED %) SRM SHF 3melaol 104648 31 0,SEC Vawbws! l0=a45.RB 28,29,39,31 SEC PRI 3aa7a0li lawSa0l 104288 joad41.RB 24,25,26,27 12,13,14,15 CC 0,CC 1,ISTR4,RSRC ivOA,GRND,GRND,GRND Qua9ae! -10a01! 10.40.RB l10=39.R5 08,9%9,10,11 00,01,02,03 © {0md4T7+3V NOM,GRND,GRNDa110l VGALL 2.l |l e 35.DP Jal14.0| SEC 2.18.01 SEC Oul9.0! 0,1,2,3 «20<>| 4,5,6,7 =21<>| 16,17,18,19.22<>1 TH{IS 3IDE NO4,43 09,mB L PHASE |l e 395L.GROUND 12,13,14,15.15<>| 2,9,10,11 a16<>| SEC 11701 20,21,22,23.23<>1 24,25,20,27.24<>} S |l e 38.GROUND 10-.37.RR 04,05,06,07 VCCl3amal PRI se s3 S3 S3 SB IF SECONL DPM MICRCO’S ECKAB.EXE 4ael20l S3 SB RIT ELS) 19-14687 SHF NOm,+3V 35 BITS PART 0,SEC (5 LFEVEL BUCKET) INTERNAL TO T4t ALP CHIP’S. LEVEL SHIFTER IS JNCE AGAIn 32 BITS. 2amlefom=cecna=wg 48.SEC §5,SEC THE 3US SAF RSRC +3V ANY FISLD 1 ' +3V TGO SECIND FROM PLACED SECTION FROM SRK CONTROL, SHIFTER WHICH IS LITERAL OF RITATED JQUTPUT INPUT IS UNDER LEVeL" SHORT MULTIPLE CH1IP mODULE: S3IT OR THE TO BE THE CONTAIN SHIFTING CUTPUT MULTIPLEXER ) [C#ARNDS l0=34.M8 1033048 103243 lo=31.M8 loa30aM8 i0a23a4R loa25.4%p 10-27_%3 28,29,30,31 24,25,26,27 16,17,19,19 03,09,10,11 12,13,11%,15 04,03,08,07 20,21,22,23 00,01,22,93 10m28.5~ l0a25.38 32,33,3%,% 25,29,30,31 FInNGERS GON 3JARN 10,ME 11 36 TOK: TI4ED OPSRATICH PROGRAMMARLE TN GENERATE CINTRJIL IWTERVAL [WTRRUPTS PART JUMBER: BEST DIAG:OSTICS: MODULE: CLUCK, ATl 1 YICRQO PRUGRAmMMARLE Se€CIdu CLICh, 19-14694 OP¥ DPM GATE MICRE’S ARRAY: ECKA3.£XE TOK TNK - SROUNDeelala=revcaswceadd48 KD 12 AB 19%..2¢<>] 0o 1<>47.WB 15 W 23ae3<>| 1€246.48 14 W3 24..4<>] leed43TOK 03C TIMER SERVICE (TRAP TO TIMER REFILL)weeSww! W8 31t 1€>43._WB 13 B 1B8..7<>1 1€>42.wB 11 W3 20..8<>]| 1€>41.48 10 WNE {7wea9<>] 1<>40.4w3 08 CLK 1<>39.#8 09 | wee3BGRIUND VeAnl2aal | wwe 37 M VCCaildual 1<>36.n8 07 N3 22a14<>1! lam3SLGROUND A8 21.15<>1 1€>34.4B 48 16.16<>] 1<>33.W8 05 3 CLK.17<0! 1€>32.%8 04 Nl Bl 1<>31.wB 02 Nel% lewd 0ol ’ D lowddan PROC IdIT.10.01 INTERUPTL1l.0l BUF ARLE INTERVALS, =] ENABLE.20..1 HCTRL 3-21--' 06 1€>29w8 01 l<>28-“5 03 00 ACTRL 1w22aa! 122748 WCTRL 4223wl SCTRL S.24..1 | e 26 aWCTRL leel2S5«%CTRL Q) 2 0 THIS SIDE TOWARDS FINGERS G BOARD - ] (1 #HZ FROM CCS) 37 LOO0O3 MIC #IC SLUT 3), THE 38 AEMIRY INTERCONNECT MODULLE (4IZ) %L0QU3 THE MEMAGRY INTERCONNECT MODULE IS THE SECIND MWAJOR PART CF THY CPU, IT 40iiSES THE DATA RCUTING AND ALIGAMINT LCGIC, ADDRESS LQOGIC, TRANSLATION BUFFFR, DATA CACHE, EXECUTICH BUFFERS, SEVERAL PC REGISTERS, VA (VIPTUAL AODRESS) AM MA (MENCRY ADDPESS) MUX, MOR’S (4EMORY RESISTEPS, DATA CMI LATCH, REGISTEP) AMD PA ¥DR (PHYSICAL ADDRESS) (WRITE ALL AODRESSES AND DATA PASS THROUGH THIS MODULE, THE INTERFACE TO ANR FROM THE DFN MODULE AND CMI DATA REGISTEK) IT PKRCVIDES oUS, 1T ALSO DETECTS UNIBUS ADDRESSES AND SIGNALS THE UYBI MODULE WITH A SIGNAL CALLED "UB REQ H" PIN <C4&5>, -~ DATA PARITY, CHECKING AND GENERATING LOGIC FOR B80TH AND TRANSLATION BUFFERS ARE LOCATED O¥ THE BOARD, THE MIC IS CONMECTED TQ THE & BUS, TMBUS, THE MICROOTAGNGSTICS ECKAC.EXE TAPE $2, CACHE AYD CMI. ECKAB.EXE TAPE #1 AND ECKAL.EXE TB AND CACHE DIAGNUSTICS WILL T=ST THE MIC #CLULE. GATSTARRAYS: ACV,ADD,ADK,CAK,CMK,dD0R,PRK,UTR ) 39 (TOP) THE #IC MODULE PINSE>>>> #LJO0G3 I CAK | | I ADK ! ! UTIR | PRK i | ACV CYK/CMLI | ADD1 | I MDRA | 1 | mpR1 | apD2 | i MORB | T | ADD3 | I »DRS | 1 | Rz i apd4 | I MOR7 | 1 | 0K3 | - =mi.l.l.l.E"B “|is.w3hu$Bf2laqiUmJD|1I e;ET..LT|:_|Iul_"—J;.LmuNG -| 1 14¢L4.M w }=f|I%i‘ “.wW“mM¥§ -m:u—H i TH18 i i TN c— gr— — IR SN WEAED GEN — e G AWD SV I D SR G Wiie " Cirhe GNIID Sammp Wy GEE — e M B e G AL G ARSE A I GMERS Tt VN CUN W ’_O LY NG e S S o o o e e e e — i o o e e e e ee MIC Block Diagram e ee ee e e e e e e e eo 40 v » 41 ACV: VIOLATION ACCESS CalP CAUSES CS PARITY SRRIR 4ICRG TRAPS, FPA RESZRVED OPERACLS, UNALLIGNED DATA, PAGE Aa7J3UNDRY VICLATICNS, A~ND ACCESS CCnTRCL THE ACV WORKS WITH THE UTR CEl¥¢ IO VIDLATICnS FkO¥ THS TB. CONTAINS THE MEMORY MAVAGEMENT ENADLE HANDLE MICRO=TRAPS, LATCH, (If 4E«. MGMNT, IS OFF, THE ACV #ILL “OVIIOR C5 FARITY AND FPA RESERVED OPERANDS 19-14699 PART NUMZER: BEST DIAGNOSTICS: MIC CPM TB MODULE: GATE MIC 0ONLY). MICRO’S MICRO’S + CACHE ARRAY: ECKAC.EXE ECKAB.EXE ECKAL.EXE ACV ACV CS 8US B Qualeaw==ec~ece=__48.D SIZE 9 o] |0=47B CLK 24..3<>] |l 38 PROC INIT PTE ACCESS CODES====> AC Qunb..l | | mwe=d> MICRU | eed5.PAGE BOUNDARY VIULATICK AC JecSa=l AC laabSaal AC 1<>44.%8 1€>43.wB 1€>4248 2aaawl TRAPawBaonl |l a4l ACCESS CONTROL VICLATIONanY9.-l LATCHED 3US O0all.al! LATCHED 3US 3all.! THIS SIDE 26 PHASE 1 la=40.FORCE 44 09 lew39LATCHED 4CTRL |l e 38 .GROUND Vaaal2..l VCCal3d.l T8 VALID (V 3IT)ald.l PTE CHECX OR PROJE.LIS..! MICRO VECTOR 0.lba-l MICRO VECTIR lallaal eNCODED MICRO TRAP 1.18.0l ENCODED MICRO TRAP 0.19.0l| GROUNDL20a | ENCGDED MICRO TRAP 2.21.0| PREFETCH.22.0]| CS PARITY ERRORa23.al LATCHED BUS 2.24.-l! 25 27 | e37LATCHED | e300 LLATCHED ) BUS 1 WwCTRL 0 3 | e« 35aGROUND le=344AD 00 | ee33.LATCHED WCTRL 1 |le32&MAD 01 lee31LATCHED W~CTIRL S le=30.D CLK ENABLE lee29.MAD 02 |lm=28LLATCHED WCTRL 2 l a2 7-LATCHED 4CTRL 4 law26aD SIZE 1 10-25_FP RESERVED OPERAND TOWARDS FINGERS QW 30ARD ADD: ADDRESS CHIPS COJ4TALJIS THe LOAD THE PATHS, A0D SU4PING 4 42 PC’S PLUS CHIPS THZ va AND COWTAIN PC CHIPS OR VA CIRCUIT, » SCURCE AN BY 2, ENARLE AUX IMTFRNAL 1, CHIP 4, ADDER FROM 31T SLICE <7=0> ADD 2 <15=8> ADD 3 <23=16> ADD 4 <31=24> BEST DIAGNOSTICS: AUD CONTRGLGS. CAPABLE CR 1 WNUM3ER: LIVES SELECT ADD PART “JOULE: AND A THT o LF 3uc., 19-14683 4IC MIC GATE MICRC®S ARRAY: ADC ECKAC.EXE (1 THROUGH 4) ADD ENABLE PAGE BOUND,PAGE BSRC VA SAVEwwlo.O===eececee__435_MAD BOUND,N,New2el SELECT VYombam! WB 06,14,22,30cwS5ea! 3 05,13,21,2% 48 07,15,23,3lacTeal bl ASRC SELECT SfawBaa! GEWERATE)CG1,CG1,CG1,Nan9oal |l @40 GRND,GRND,COIMP CG2,CG2,¥,No10aul BSRC SELECT Slaliooi lee39.MA VCCalidla! PROGAGATE)ICP,CP,CP,Nuil| d w3 04,12,20,28.15..1 ASRC SELZCT S2.16.<! N8 00,08,16,24n17 <! %83 03,11,19,27.18..1 w3 02,10,18,2519...1} ASRC wld SELECT lew30.XB Sil.20.t 01,09,17,25.21..1 (ACI)+3V,CX,CY,CZ.22.0]1 New2 3w | (ID)GRND,+3V,+3V,+3Vo24ol THIS SIDE SELECT MLCE,CCMP MCDE SO | «38.GROUND 10378 CLK |Ow3b.ENABLE PC SBSACKUP | we35.GRAUND | wee34LATCH 4A le=33.MAD 03,11,193,27 =3 2ah lme31.MAD 00,05,16,24 VALl 2l (CARRY 06,14,22,30 lee47.MAD 05,13,21,29 lew46-IC0,IC3,ICA,N | em45.MAD 07,15,23,31 |lew44.MAC 04,12,20,28 043 _ENABLE VA i 0md2EMNABLE PC |l w4l MA SELECT St Slumald.al ' (CARRY 0 Q) TOWARDS PC 01,%,N,N 10294 (ICI)+3V,IC0,ICG,ICC |lea28.MAD 02,10,19,26 |lea27-MAD 01,09,17,25 w26 .GEYND,FORCE MA 09,GRiL,GRND lew25<XB PC 09,4, ,N,N FINGEES ON BGARD 43 ADDRESS CJ~NTRIL CHIP ADK? FGR T3, MEMOrY #SALAGEMERMT, CONTAINS IPR COMPOMEMRTS (MEMSCE®S) AURXS #ITH ThE PRk, ADDC AND ADK TrE FLOP. AND THE RANOGCY FLIP N)TEs MDOR CrIPS. THE TO KHALF OJF DISABLE ADK DETECTS TB THE KHITS TB On A AnND MISSES. LIVE VMS SYSTEM? 1). REMOVE ALL USERS FROM THE SYSTEM TEMPORARILY 2). TYPE “P ON 4)., TYPE: >>>C THE CCNSOLE TERMINAL " 3). TYPE: >>>D/1 24 D (FOR GROULP 0) OR 19=14700 PART NUMBER:? 8EST v1AGMOSTICS: MagDULE: D/I 24 A (FGR GEGUP 1) MIC MIC GATE MICRC’S ARRAY: ECKAC.EXE AUK ALK AMUX S°JECT Slenloo====e==e==0_43_E CLX DSlanlawl IB GROUP 4R ( GROUP 1 20a=3<>| WB 2S5mad<>| w3 24a5<D| AR 27 mab€<>] leedlA¥JX SELECT SO |leed6aDST RMIDE o | wedSMMUX SELECT 1048 MRITE VECTOR 10ad3.SMAPSHOT CMI QB aal *? (HIT)ew9%-w! T8 HIT lallaal! ExABLE VAL1l1.01 ‘ VGALl 2! 3SRC WCTRL 2a14.<! SEL SO0ulSeal | ea35aGREUID lae34.TE LATCHED WCTRI S5alfaa! LATCHED WCTRL LATCHED WCTRL 3.18..! SEL Stai9..l 3SRC THIS 1lo24ce! SIDE BUS 3 |ee32-LATCHED J3US |031.PTE CHECK 0 l 1 w30 LATCHED 1029 INVALID LATCHED #CTIRL {a20eal LATCHED WCTRL 4.21.-1 CLK SELZCT Slallewl! PHASE PARITY ENABLE lme3d33-LATCHED 0al7 ! CLK SELECT Si1.23_.1 OCCUREL | e 38_GROUND lee37<D CLK ZNASLE | «e3b6-CS BUS 4 VCCel3aa! LATCHED S1 lee22PSU C4 (CIVMPATABILLITY le=edl1RITUT DIMNY4 10.40_STATUS VALID lee3d9M CLK £523LS (HIT ) ew7 w=l HIT T8 T8 B 3US PREFETCH le=23.CIMPATARILITY lew27LATCHED BUS 2 10.25.TB O TIwWARDS MOLE OUT?PUT EMARLE leel25DBUS SELZCT SO FINGEPS Al - % 33ARD MGCE) CAR: CACHE COaTRAOL CdIP COnTROLS {4E ZNABLIYG TRANSFER OF CATA VALIDATION, HIT ~UTE: TO D1SABLS TO RE=ENABLE ON A 1). 2). 3). LIVE 4t41 CACHKE T3 TYPE: TYPE: >>>D/1 25 1 >>>D/I 25 0 CACHE, C"IDS, THE AND CACHE >>>C PART NUMBER: BEST DIAGNOSTICS: 4IC 19-14791 “IC GATE + MICRC’S ECKAC.EXE CACEE ECKAL.EXE ARRAY: V8 27..2<>1 o B CLKaea3-0l 43 26aa4<>| GRNDenSaalt A8 INIT..7-0i AB 24ma8<>| CACHE HITaw9-al DATA PARITY TAG PARITY ROT SO |ee47.LATCYED 4CTRL G | -=46_LATCHED | em4S<LATCHED JCTAL JCTRL 2 | e=44-LATCHED BIS 1 25.u6<>1 CACHE | ==43.LATCHED 3US 9 | «=42.LATCHED l==41.LATCHED BUS AUS 2 ¢ 4 | ~=40.LATCKED 3US 3 |==39.LATCHED “CTRL | ==38GROUND |==37-LATCHED #CTRL | ==36_LATCHED wCTRL | 35=GRUUND |~=34.D CLX ENABLE Na10aal CMI.l1-0| VGAL12.al SHAPSHOT CAK CAK 00amlam========<=__49_CBUS 4AD CACHE O wOR SYSTE4: I3 CACHE The REMOVE ALL USFRS FRUY THE SYSTE® TEMPNRARILY T{PE “p? ON THe CONSOLE TERKIWNAL TYPE: >>>0/I 25 1 (OFF) UR D/I 25 0 (OW) 4)., MODULE: DISAELIHNG FRUGA TYPR: CACHE VMS AND AMD VCCai3aal ERROR.14.0l ERROR-15_.| GRNDw16.al |==33.0ST 3 1 5 PMODEZ Nel7eml l=e32.D 0 #R-18-l fe=31aD 3YTE 0w19.0| CACHE VALID ENABLE BYTE ENABLE 3YTE SIZE 10~30.STATUS 0.20..| 3.21.0] 1.22.0] 10-29IMVALID PREFETCH |==28.¥ CLK ENABLE 10-27.1/0 ADIRESS CACHE GROUP £NABLE ENARLE 440X 3YTE SELECT [HIS 2.23.0l S1-2%eal SIDE SIZE |==25-08US () ISWARDS 1aa25-MR20 FINGEES 0N 0 1 VALID RIT 01 wUARD 31 STVYORY cau CHK/CAL: INTFRRCLUNANNECT CRLP ANMITNRS AYD CONTROLS STGNALS Tu ASD FROM TAZ Cul &nl STALLS THE AICKRCCUDE NN CERTALE Ca%DLITIONS, NUTE S THIS IS THE ONLY CHIP THAT COUWTRCOLS THE CPI°S ACCeSS TC THE C41I 8dJdS. USE THE CAK/CML OPERATION (OF THE CMK/CML CHIO CAw BE VEmIEFIED BY DCING CONSOLE MODE DEPGSITS AND EXAWINES GF MAIN #emCRY WITH CACHE DISABLZD AND AGAIwn FROM kUM MODE «iICn LGES n~OT CHTP. 16-146937 PART NUMBER: BEST DIAGIGOSTICS: 40DULE: ¥IC MICRQO’S MIC GATE ARRAY: ECKAC.EXE CHK CvK ADDRESS B CLKealoO==eeccce«=__48_D CLK ENA3ZLE REGISTER ENABLE—a2-0l CMI DATA 27..3<>| LATCHED BUS 3acfmal LATCHED 84S 1oo5--| LATCHEL 3US 2acbeal [€>47.C4I CATA 2% 046 INVALID PREFETCH 1 045.CORR DATA INTEKRUFT 1044 WRITE VECTOR OCCURKELD o lea¢3.STATUS CMI M DATA 31..3<>| CS 3US 4au9-al CLK ENABLE-10a-| CMI DATA 29-11<>| | @38 GROUND 1<>37.CMI DATA 25 |lee3bSTATUS 1 |l e 35.GROUND =34 INHI3IT CMI VGA12_-| YCCa13oal LATCHED 3US 0o14_-| CMI DATA 23.15<>1 CMI DATA 30-16<>| HAD 01ul7-al MAD 00~18.-| CMI CPU 1033.CACHE |l mee 32CACHE PRIJRITY-19-0l DST RMODE=20a-| DSIZE 0.21--! DSIZE 1.22--| MMUX SEL 51-23a=| C4I HOLD-24-0]l THIS SIDE O 10a42.C4aI STATUS 00 |0=a41.GRANT STALL 10e40.C4TI STATJS 01 10039.STATUS VALID NewTee| Q) INTERUPT HIT lew3lanAll lee30PEASE 1 lee29UR INTERYUYPT GRANT |10.28.CMI DR3Z {027 ENABLE CVYI 1026 4ICR) SEQUeENCER INIT | 0mZS.SNAPSAOT CHMTY TOWARDS FIMGFRS ON BRARD »URS MEATGRY DAIA CONTALNS DATA BUS THE DATA I[N AND AULRESS QUT, TO A4C CHIP D BUS = ~rITEZDATA 4dX And FROM REGISTER, CJI*TRIL TAE CHMI, 1 ¢,8,16,24 MDR 2 1,9,17,25 MDR 3 2,10,143,26 MDR 4 3,11’19527 ADR 5 4,12,20,28 MDR 6 $,13,21,29 MDR 7 6,14,22,30 MDR 8 7,15,23,31 DATA NUMBER: BEST DIAGNISTICS: TMEMCRY LOGIC & sUS ECF BANL ¥ sllS, BITIS MDR PART ‘MGDULE: 3UFFRRS, PHYSICAL CRIPS DEFINITION: CHIRS £XECUTION REGISIZR, RUJTING 8 REGISTER BUS (AN INTERNAL BUS INSIDE ThE MUF CHIPS) 19=14681 MIC #IC GATE MICRO’S ARRAY: MDR ECKAC.EXE (1 THRQOUGH 3) MOR CLK CUK ADDRESS SELECT Slealaov~ewecccee__GA_MKUS SELZCT SO0wa2-<! O 10ud7.4BUS 8 Climelani low46_MbUS REGISTER ENAQLE~._4_0] | ENABLE CY¥loo5o01 X3. PC 00eebaal XB - XB PC 0l X8UF SNAPSHOT CMI,I0-0‘ 08,09,10,11,12,13,14,15.11..1 C~I CMI CMI w8 |o40.MAD #B wB 16,17,186,19,20,21,22,23.22..1 24,25,26,27,25,29,30,31aZ23al CACHdE 2%,25,26,27,28,29,30,31.24_.1! TYIS SIDE M4SRC 2 15,17,18019,20'21'22'23 |l ae38GROUND |lew37-MAD 00,01,02,03,04,05,06,07 |lew3b6a+3V, ALL NTHERS GROUKLED |l e 35GROUND le=w34.D8US SELECT lew33.DBUS SELZCT lew32.PAD |lw=w31.PAD SELECT St laeZ23oA4UX SELECT S¢ lew?2b-CACAC TOwaRDS 02,03,04,05,0¢6,0G7 lem29.ANMUX lew27.CACHE ) Si SO 16,17,18,19,20,21,22,23 08,09,10,11,12,13,14,15 lew30.N,N,PAD 90,91,02,03,04,05,06,07220cwl 08,09,10,11,12,13,14,15.2121 S1 00,01,02,03,04,(65,06,07 08,09,10,11,12,13,14,15 |--39-HAD VCCallaal DBUS ROT SO0.14..1} N8US RIAT SielSea! 24,45 25,27,28,29,30,31.16<>{ 16,17,18,19,20,21,22,23.17<>1 08,09,10,11.12.13.14.15-18<>| 00,01,02,03,04,05,06,07.19<>1 Wo 03,09,10,11,12,13,14,15 SELECT la=?l.LATCHED VGAul2aa! CHl 24,25,26,27,28,29,30,31 l0=42_M8US SELECTeawSeal 60,901,02,03,04,05,06,07<_9_21 24,25,25,27,28,29,39,31 16,17,18,19,20,21,22,23 | w=d3.MMUX wal XBUF 4 SitAD |0u44.i4BUS ENASLE l«=25.CACHE FIVGEFS i 092,01,02,03,04,05,06,07 78,79,10,311,12,13,14,15 1A,17,18,19,20,21,22,23 2:JARD ORK PREFFTCA CONTRCL CHIP USED Iv CONJUNCTIGY WITH Tre ADL, AKND wdR CHIP®S 1C MGuIICR WNHEN EXSCUTION BUFFERS AKE USAGE OF TIE EXSCUTION SUFFERS. E4BTY, OR A NE# ADORESS IS PLACED IN THE PC, THE PRK CEiP FORCES PREFETCHING NF A NEW INSTRUCTION FR0O4 YEACKY USING THE ADDRESS I4 THE PC (4%w ADDRE3SS Ix PC) uUR PC+d4 (32X, BUF. ERPTY). PREFETCHING IS INDEPENDANT GF THE MICROCIDE AND #ILL A/ FFEW WHENEVER A4 X3 IS E4PTY AND THERE IS &0 3JS CYCLE IN FRCGPESS. THE PRK ANILL STALL THE M CLOCK wHEN BOTH X3°S ARE EMPTY AND THE CPU ATTEMPTS AM IROt. (THIS CAN OUCCUR 4H4EN A DEVICE IS TYING UP THE CMI WITH [RANSFERS AMD THE PRK HAS TO wAIT FOF COMPLETION BEFORE IT CAN PREFETCH (CPU HAS A PRICKIIY CE 0)). THE PRK WILL ALSO HAVE TO STALL ~HENEVEKR THE PC GETS A KEW ADDRESS SUCH AS A BRANCHING INSTRUCTION JR A NEw PRGGRAM, THIS ALLOYS TIME TO PERFURM THE FIRST PREIFEICH FRCTM THE NEw PC PRIOR TO THE START OF NORMAL EXECUTION, PREFETCHES PART ARE NUMBER: LONGYORDS 19-14698 BEST DIAGNOSTICS: 40DULE: MIC GATE MIC ONLY! ¥ICRO’S ECKAC.EXE ARRAY: PRK PRK LATCHED MSRC lewmloo==se=ce===__43_LATCHED 4SRC 2 SHAPSHOT CMIo_2.0] O }=<47_LATCHED 43RC 3 B CLKeao3-0l le=d6_MA SELECT lee43_MA SELZCT S0 ENABLE ACV STALL(STOPS 4 Chi)mwbaal! lewd2.IRD1 MICRO SEQUENCER INITeo7-0l STALLZ.8.0]! j0-41_ISIZE 0 YCCal3aal! j~e35.DST R400<= |0.20.MIC LOAD G3R 10.39.1ISIZE 1 | «=38_GROUND lea372X5 PC 90 LATCH MA__9_.01| PREFETCHa1001 ENABLE VA SAVE_11.o0l VGAcl2mal lee35.GRCUMD lo=34_LATCHED MICRO TRAP.14.0l CLK ENA3UEe1S5awl M D CLK ENABLE.1l&ww| LATCHED BUS 3217l STATUS VALID.1R.0| LATCHED %CTRL 1-19.-1 X3 1 Id 'JSEL20.0 X2 0 IN USE_21.0l LATCHED #CTRL 3222l X3 SELECTa23-al ENABLE PC_24.0| TALS 351 l=e45.LATCHED ¥SRC 0 fewdd4 LATCHED MSRC 4 PHASE lamlea| AMUX SELECT SlewSewl! 0 SINS TO#AAROS RJS 0 <=3 3_LATCHED B34S 1 lew32.PSL CM (COMPATABILI1Y l<—31_LATCHED BUS 2 l—=30.X8 PC 21 lew29_LATCHEDY U3 4 leeZB_LATCHED #CTRL 0 ee?7-LAICHED iCTRL 2 lew20 LATCHED VCTRL S lee25-LATCHED WCT2L 4 FIWGeE3 On rCARD MODE) UTK: RICRY TRAP AONITORS TrhE JACHIWYE COYRITICHS THAT CAN CA'TSE A MICRC-(RAP, MICRU=VICTOR ADDRESSES, AMD DECONES THE HIGHEST GENERATES PRIORITY INPUTS 48 CdIP TRAP COWDITICV, THe UTR RECEIVZS FRI4 VARIOUS HARDAARE COVPIONENTS AND THIZR APPRIOPRIATE MICRN=-VECTUOR ADDRESSES TD CONTROL STIRES ADORESS LIRS w#HEN PERFIRMING PART NUMBER: BEST DIAGWNOSTICS: MODULE: MIC MIC GATE MICRN’S ARRAY: INTO THE 2 MICKO UTR IRAF. ) UTR TRAP ENCODED 1o_1_0=== ewcene=)_48_ ADDRESS MICRO TRAP 2-.2.0l TRAP—_3.0| VECTOR 3ewdeol| CHECK OR PROBE._5-.| MICRO VECTOR 1o_6-.l MICRG VETCUR MICRO 0Owo7eol| VECTOR 2._8_.| DEST DU lowddM |lee43.TB lewd42-TB le=d41.T8 iee40.TBE INHIBIT—_9.0| SERVICE.10_0]| VGAwl2enl XB 0 TRAP 0.14.0| HHLXXX-15-01 USE_17.0l RIT TAG 2 lew32.0 CLK INIT_18-01 1<>31.48B 24 1€>30.48 25 0220o.l 1€<>29.48 26 1a21ea| VALID.22.01 1€<>28.%8 27 STATUS 1 IN JSE.23_0| 8 CLKa24-0]| THIS SIDE ERRIR O DINH_19__| XB PARITY ACTRL RTUT SCATUS 1 3US |l w33LLATCHED JCTRL PROCESSOR STATUS EVASLE 1 O lwe34LATCHED SELECT-16o! IN KHIT () TOWA RDS ENASLE lew27-PHASE 1 |0e26.PREFETCH lew2S5INHIBIT CHvl FINGERS JN EnNABLE VICLATION ERPOK | @3 8GROUND lww372T8 TAG 0 PARITPY |l e 30LLATCHED 4CTRL 1 | e 35.CROUND VCCual3eal X8 BIT PARITY | 0w39LWRITE MSRC 'XBollev| MICRO ACTRL REGISTER lewd47.ACCESS CONTROL |leawd6.TE DATA PARITY | »=4SLATCHED 3US 3 o MICRO MICRO ENCODED TRAP ECKAC,EXE MICRO GENERATE MICEL DECOCES THEM 5F PLACED T 19=14702 ENCODED PTE INCODEL BOARD ERRQE INTEKUPT EERRCF ‘ 49 L0004 UBI ubl SLAOT 3). Tirm UMIHIGS 0 5 I TEREF ACE +“yDUuF (udI) 3L9001% THE UMIBUS THTERFACEZ #09ULE IS MUCH LI ANY Ud4IdLS ADAPTER AJITH THE EXCEPTION CF FAVING ADUOITIINAL LUGIC NN IT TO HANDUE COMMUNICATICMS FOR THE TU=53 AND CGOGAMSCLE AND ALSC HAMDLING ALL INTERUPTS ~ITHIM T48 CPU, ALL UWIEUS AND MASSBUS DEVICES INTERUPT VIA THE UBI. THE UBI CUN1AINS POWER FAIL LJGIC, THE T.0.Y. CLGCK AND CHARGING ClrRCUI1l, THE UNIRAUS DATA LATCH, 3 BUFFEREN UATA PATHS, 1 DIRECT LATA PATH, BYTIE SWAPPING LOGIC, ADDRESS THE U3I IS CONNECTED TUO THE w BUFFERS RUS, AND CMI, #APS, AND U4IBUS, THE DPM MICRO-CIAGNISTIC ECKAB.,EXE WILL TEST TQE COmMMUNICATIONS SECTIONS AAD THFE LEVEL TEST THE ADAPTER 3 DIAGWOSTIC ECCBA.EXE TAPE THE SECO4D UNIBUS QPTIOW (SUB ECC3A.EXE GATEARFAYS: a6 wILL SECTION, CON,INT,UCY,UDP MCOULE) wILL ALSDO BE TESTED RY 51 ‘--' LY X X X X K L K X J UCN | i utpkl 1 { upp2 | | UDF4 | I UDP3 | - - - SR AR G S . e s SN I PItsSd>>> GmEy MODULE 3LOGO4 YD (rne) THE UsI mceececaes | INT { f==l ! wcocsecceese l I | ceosccecenene CON1 1(TU=58) memeeeccas SR —— | CON2 | (CCnSOLE) | i | | | ! ! I | UB ADDRESS UB DATA <17:2> XCVR l . “ | I UNBUF BYTE SWAP DT ' _ ' | Yl co | | L2D0ER L A1,A0 oo MUX o e ! o /ADD. \ MUX ! G el G G GED T XcvR 1 | <AVTADS aooress 1) | | BUFFER 16 BITS SACE. SEL. BDP MUX ' LATCH | XCVR 2 3} ¥ ' UCN ' FUN/MASK FLAGS/CMI MUX l . \ & ADDRESS 3 2 1 01 BDP BUFS | ! CMI MUX COMPARE 2 ' 3 | ADDRESS MAP 512 X 19 l o 1 cMmi :> MUX | \ M GHENR WD GENG GNP N TS | GYNE NS o - o. J' UNIBUS <1:0>) l <B:2> [<23:9><14:0> |<31:26> RCAR l ' 69 )| Interface Block Diagram \ Coxns CINSOLE CHIP THE CGH 53 CHALIPS CIONSOLE COYVERT TERM4TINAL _PARALLEL TO T3 SERIAL PART NUM3KR: REST DIAGNOSTICS: SERIAL UCATA FriMm PARALLEL TATA FOR If ROUTIMG IN 4ICRC’S ECKAB.EXE uUBI DPM GATE MICRO CR 84S, OR OPPOSITZ CON ECCBA.EXZT (ITuUS8 AND INITao2<0l ACTRL Secd.=! CONSILE) (TUS58,CCHSALE) WCTRL 2wcical © lewd7CXD0 | " @S 3) DCNE R SYNC- (INTERNAL WCTRL TU/CON 10424 PANEL Hew7e0l LUCKEDmeSaal AB 16a15<>} INT Il 0=34.CLCI L,SERIAL (INTEZRNAL |l =3 3<GRND,HALT GRNDwul7ael BAUD lme32ACTRL RATE CLOCK.18...1 |0n3laM 19.19<>1 17.20<>]| 1<>30.0B 22 | a=29BREAK 48 18.21<>1 w28 oGP, INSTR wB A3 43 21222<5] 20.23<>1 23e24<>1 | O27=SET | 0a26at lew25EIA SIDE LIpa ILT () TIOWARDS FIsNGeRS Off DET L CLCCK kIG.ALS) SYNC CLK- 48 43 THIS SIGHALS) 1<>40.W3 25 1€<>39.ka 24 | mee 3 BoGROUND 1037l CLK ZMASLE lee36wCTRL 3 | me35<6GRAOUND N.16.01 TU/CON SYNC CLOCK CLK leedlTUS8 TU/CCN SERIAL INPUTew9.-1 (INTERMAL CLOCKX SIGHALS)1%%..! TU/CON T READY SYiCllol VGALl12.! VCClli. -l GRND,RD INTEZRUPT I4HIBITol4.| SIGHNALS) 1 0md45L+3V 1044.TU/CON T READY |0ed43.CLCO (INTESRNAL SYNC CLOCK ¢ GRAND,WCTRL Oo.S..l N,HALT DET BR SYNCawubaw! DONE 1lne NIRECTICHN, (LEVEL 0,43Varlone=cevnneea__48_TU/CON SEQUENCER +3V,FRONT CLDY MACRO ARRAY: CoN WCTRL THE [U«S58 ¥ 19-14585 DW7590 #0DULE: THE THE CLX,N FETECE BREAK,CON HALT TU/CON BUARD SERIAL CUTEUT INTERUFPT 54 CHIP THE IdTEZRJPT CHIP 3GThH “ASS3US AMD PERFOF S VALUES [NTZRUPT G+ THt ZINARLES UNIBUS, ARRITRATICS, MICRI-VECTOR fART NUVRER: BEST DIAGNGSTICS: UBI ANDLI«G PSL ISSUES OF ALL I[NTERUPI BITS <22~26 »US GRANTS, and AwxD FFQUEST: 1:L>, 1iSFRTS LIWFS, 19=14704 4ICRC’S DeM Dw750 MODULE: THE CCMTAI~S GATE ARRAY: MACRO ECKAB.,EXE £CCBA.EXE (LEVEL 3) INT IAT WRITE SPFI BUS ERROR INTERUPTawl 0==wceceee=g_ 43 $3Vaul2a0l INT.)wa3oo0l (SYdC POWER FAIL CORRECTED DATA INTERUPTwo4.0l 4eeSawl #CTRL lowdd.dPBGS (HIGHAEST BR) PRIUGRITY BG) Sl PHASE leaclwel leed43.HPBGE (HISHEST PRIORITY 8G) 22(=PSL 22)wa8<>| WB 23(=PSL 23)ua9<>] INITL10.01 PROCESSOR lea=42.SB&S WCTRL tal4..l WCTRL 3a15..i 25(=PSL 4B 25)al1h<>] 24 (=PSL 24).17<>1 A 26(=PSL 296).18<>| YCTRL MICRD 019, VECTOR (.20..1 MICKO VECTIR YICRO VECTOR 2a2iwel| 1.22-o1 MICRJ VECTNP THIS SIDE B8R) 3G) lee3ddeM CLK Sv¥A3LE 1€<>33.%8 16 (IPL) 1<>32L%B 17 (IPG) 1<>31.4#8 19 (IPL) |0a30.SERIAL TLIVE INTERUPT(COMNSULE) TRAPL23.01 BRAWCH.24_.1 (SYVCHRONOQUS lead4lAPBGS (HISHEST PRIGRITY lewdlaSBR?7 (SYVCAROINOUS BR) |lew39.58R6 (SYVCHRINOUS BR) lax38aGRIUND lee37SYMCHR RTSET B”G loa36.8 CLX | e 35GRIUND VGAL1 2.1 VCCal3..| #ICRO IVTERUPT WCTRL A8 WB TIVER 1047 INTERJUPT PENDING lae45.UB IITERUPT GRANT leed5o54R¢e (SYUCHRONOUS o} O TOWARDS lew29.D CLK 1<>28.48 18 £WA3LE (€227 (IPy) %8 20 (1I°L) lew26oPTE CASCX IR | 0e25.DC SERVICE FIAGEKS QN #0ARD OKOBE UNIBUS THE OATA 4Cxn PATH CHIP AQBITRATIIN SIGNALS aND THE IS5 URL1 CJUNTRJIL COGIROLS FIR THE CAT ROM CHI® THE CHI, STATUS CCP Unw THE #HAT FUNCTION NEEDS LINFES URJI PART AMUMBER: 1S«144893 3EST DIAGNOSTICS: TO FUNCTL IS, AWD FUR AL H04ITHRS USE THE BY UCWN (45 CHIP MICRO=ADDKTSS 8% DW7S50 C:HIP ISSUES CONTROLLED MICRS=ALNIRESS 40DULE: UBI 29 TIASLES INISUS ST »ICRCCCLE. PLACES LINSS Uil CUNRIRGL TheE AFCER FrRCPER DECCLING UCHE,. 4ACRC FCCBA.EXE (LEVEL GATE ARRAY: WCw 3) ) 1 Lo UBI UB1i BUFF UNIRUS CHI 3laclaee===ecce=-__4i_PE MSY awmla=l llawdeal lee47oTIME COUAT (TIMECUT) [0e46.CMI D33Z (DATA 5US BUSY) 10=25.C4I STATUS 90 | 0md44.CMI STATUS 01 o) AUDRESS Ul UNMIZUS ADDRESS (fammiwmal ADDRESS = UNIBUS (ADDY)awuSa=! ADORESS = CYMI (ADDQ)wcbumal ENABLE UCR ARE |l o433 _SSYN law+2LUNMIEUS REYUESTac7wwl lemdloUBI Clacfaal ARBITRATION DRaw9a0l A2(MICR0O CONTROL RG4)al10a0l! UBI 4ATCHZ11i<>| VGAL12..] |le=d0UsI lee39oUBI UCR A3(MICRO RBUFF CHMI CONTROL 28.14..! | e=35.GROUND lee3¢UBL BUFF RUM).16.0] lee33a3UT O AMalTaal lee32aUNIBUS Alaldaal loe31.8 1lwl9%..| BUF CHI THAIS 26m2%e=l! SINE COMTRCL POWM) lee30LiinIBUS Q) TGAARDS ud 25 AUDDRESS 19 ADIRESS 09 CONTROL |lem28UB8I LATCH lew?27=UBl LATCH lee26a5C 0 lewiSaliegl LATCH FINGERS CHAI CLK 10229.44P AQ(MICRO CONTROL R]04).21.01 J8I BUFF CMI 27.22--1 5C 12231 URI 29 30 |l e 33INTERUPT ClalSaal UT C4I C4I =3B LGRUUND 10a37<UCR A1 (MICRO BUT 2220l UCR BUFF 3UFF | VCCali.al UBI IIIT BUFF C¥I 00 3:JARD JUT DATA DATA ENAELE PATE SEL PATa StL GFFSET 1 O JLed Gilkids ZATA CONPLETZ 3 uNIBUSE BUFYEREY PROVIDFES CMI 3 AND pATYS A AND PATH DATA 1 PATES TIRECT, FOR ALL CUNTAL4rD 31Te 4IPS, IJIF¥3£ZT LUGIC. OATA 3£TNELN T8e BITS yoe unp yoe 2 3 0,1,8,9,16,17,24,25 2,3,10,11,13,19,26,27 4,5,12,13,20,21,28,29 UDP 4 6,7,14,15,22,23,30,31 19=14692 DIAGNOSTICS: AODULE: UBI A#D THZ3Z AlD ’ cHIP PART NUSBER: 14 Ss#APpPI G ADLRESSES ydATIBdUS, CHIPS BEST 56 C=1F O#750 ' MACRO ECCBA.EXE (LEVEL 3) GATE ARRAY: UDP (1 THROUGH 4) DATA DATA UDP (1 THRCUGH 4) 09,11,13,15aaldd=mcccwa=al>a4_UBI 03,10,12,14.-2<>1 0 1<>87,UBI SUFF BUFF UnWI3US DATA 00,02,04,08uc3<1 1<>46.C4I OATA UnIBUS CATA 01,03,05,07wed<>! 1<>45.CH#I DATA 08,10,12,14 N,ADDC,ADUC,ADDC(ADLRESS=CHI)aeSawl 1<>44.Ch1I DATA 01,93,C5,07 (ID)acbdesl 1<>43_URT BUFF C¥I ClKew7wd| 1<>42.CivI vATA 07,02,04,08 UNIBUS UnIBUS GRND,+3V,GRND,GRND 3 Alo8aal! 3DFC {(BUFF AlacFea! DATA. PATH).10..1 BDPC Q(BUFF DATA 08,10,12,14 1<>41.URI 3UFF CuI 91,03,05,07 0u0,02,04,06 | «=40_BDPC 2 (PORT CCNTROL) 1<>39.C41 DATA 16,18,20,22 VGAL1 2!l le=e38oGRAUNO 1<>37.CMI DATA 1<>36.URI IUFF | a=35oGROUMD C¥1 UBI VCCal3aal D3BZ.14.0}! PREV 25,27,29,31 PATH)-11ool | UBI C4I CH4I 929,11,13,15 09,11,13,15 17,19,21,23 16,16,20,22 ‘ DBBRZulSaal 1<>34.C4I DaTA UMIBUS ADUKESS 03,10,12,14.16<>1 1<>33.C¥T DATA 24,25,25,30 UNIBUS ADDRESS 16,08,05,07.17<>! 1<>32.UBI wIIFF CMI 17,19,21,23 UNIBUS ADDRESS 15,17,04,06.18<>| I<>31.U31 RUFF £41 25,27,29,31 1<>30.UBI sUFF CMI 24,26,28,30 SC 1 UNIRUS (SLAVE ADDRESS SC PRTC 0 (SLAVE 0 CONTROL)a19..1 02,09,11,13.20<>] (PORT lwe29.LATCH 1 (PORT PATH SELECT CONTROL)o2leal lew28-ADDC,ADDU,AdDU,AGDU CONTROL)wm22wwml 4ATCH.23<>| lew?27 LATCH lew2h=LATCHY UBRTI PRTC DATA CO&TROL) w24l THIS SICE ) TJIWARDS | wm2S5<PRTC FIUGeERS ON DATA PATH IFFSET 2 (PART 3JARD SELECT CONTRCL) 1 O D7 L0010 SUB e cam wwe N Sete coos com wmm awwe - EES LED BP SHND SIS SIS NS SIS SEED GPND GENS AN CEAS 58 LOED eGm 4ee feus et TUSE o=t b= -~ O P 1 jee = = SIID = ~| m=~ vensCUTS LENS AUIY SESP SUOT GOAD SATD GO ENGL AR SMIP GALG AN SOAS MADS WEAE SSAP Sate WS SO o[= Wb sete sess [ P | b ==1 1 ==11--1 [ 59 C1ION 1 PARIS INSEECT The basic Dw»750 option ccrhsist of the following hardware parts. CneCk tnat none are missing or damaded before ycu . ' procede, QUANTITY | CESCRIPTIUGN L0010 Secohd UNIBUS(SUE) Mogule 1 1 Riokon cable assembly consisting of: (3) 40=-conductor BCO6 and formed. - ricbon INSTALL mMy014 Iransition UnIBuS shcula have w“rargeid module Terminator and possicly an exparsicn catinet are -not part cf teen orderea separately. EQUIPMENT CHECK HARDWAKE REVISIUN LEVEL AND If vMs is running obring it either havimg the custorer PUWER SYSTEM LDOwn down in an orderly fashon by cring it down, or with his permission typing the following cofméand. EX: § Examine the CPU ssysSsystexsishutdown hardware revisicn level to assure comgatascilicy between the option and the CPLU. If the CPU is rnot at tne correct revision level, d¢ not procede with this cption installation until the CFU is uccdated and checked out, The follo#ing example sShcws ycu how to check the CPL rev, EX: >>> E/I (tor 3k I ululGU3E systems »itn 1exK 02005k 30 arrays) Ck 1 the systef Otrr usir¢ 111 Focwer ULuuuC3E systers witn lmneg [ (for m 2 option,but [+]] £4 “CTION DW750 tie M9302 There srould pe an expansion box, cabinet.Tne expansion box ana, or the caples, Ctne kKey 020GCSE4ds arrays) switcn, ‘ 2.2 INSTALL EXPANSION 3UX CK Cauglivel 2,2.1 Install excansion box Or cacinet cer d4pprobriate instellation docuimentation includea with the option. Expansicn caninet snoula te installed to CPU catcinet per the follcwiny examples. +----_----------+ 1: EXANPLE tre the rignht of | | | +?----§ i tomemns | | | | | | | TR | *----------------—------+-------------fi-l I VAX=11/75V T | | i | | T | S | L i T | R L [ | Y | N | PR TP P L P L | | I i | i | i { i | l---------------‘ii------GQ-—---' | I [ | i | [ | T ) L bl I EXILLLLL i | | | | | | I R TR I l IR i i [ | | (. i L L L] ELLIILLELLL P T T +P i | RT XY AL P L DL P UNIBUS 2nd ( P L r9642 Cabinet H904S CPU Cabinet EXAMPLE R i | | | | | L L L L L L L L L L L R IS11 Cabinet ) 2 *---------------6-------+---------------*---------------* { VAX=11/750 e |I | | e e T I B I I i | | R L L L L R R P L i { ( § D R L L L A LA L AL L L L LR (N | ( i | | | T ELIIIIT LI LI I | | 1 i il Ll it { i | - LR i | | [ e cnTecencccenyt | mercerncaccanrce { | | | | | | | | |eceraccsacacwcatcecenScecmasone$ LI EAE L DL L L idd LIt HYyo4sS CPu Caoinet Page | ] | | ahhidd ( 2 Ist onNIBLS i kit b dbdbdbdnd n9cd4e caciret i ) A hyo4Z2 Carinet ( Zhc ¢oleld ) 61 SET UF VELUSTAT KIT Pnv 29- 11762 Unfold The VELUSTAT mat tc full size (24x24). Attach the 157 ground corc to tne VELOSTAT snag tastener on the mat, ana the alligator clip of the groupa cora tc a good grouncd on the VAX=-11,/750. 2.3.3 Attach the wrist strar tc either wrist and tpe alligator clip to a converient portion of the mat. 2.4 UNPACK THE L0010 MODULE 2.4.1 Place the LO0U10 mwoaule »hile still in the box ¢cn the - VELOSTAT mat, Remove the module from the box and protective covering and lay it flat cn the VELOSTAT mat. 1hls wilil bring the module to the same potential as the CFU and static discharge eliminate camage. - Lw750 CPTiON INSTALL with the wrist strap still attacned to your wrist install the LOU10 module in a CFI ogption slot. The tirst Cil option slot is recomended (VaX=11/750 slot numoer 7) tc alleviate cabling Remove grant jumpers fror backplane slot where L0010 1is installea. Ko jumpers neec to oe aaaged for tne LW750 ortion because it has fixed acdresses, ana a tixed Cml Arpitration Level of _ 3. NCTE RH750s START WITk CMl Ax8ITRATIGn LEVEL (3), IF YOU nAvVe ONE Ck i#Ckie IN YUUR SYSTIeEs YUU MUST HMOVE THEM DCaN ONE CMI ARBITRATICN LEVEL, EXS RH75030 KH750%1 Ri75080 kn790%1 wITROUT Cw750 INSTALLED ADURESS F28000 ADDRESS F2a0V0 CMI ARp wEVEL C4I AkB LEVEL ADDRESS F28UU0 CM1 ARS LEVEL 2 #ITH Dw75C N W 2.5‘2 proolesxs. INSTALLED ADDRESS F2AUUU 1 cml ArRp Leével Cennect the tnree ripbton cacles tc tackplane sSlcts 2 4anc C as in tne MAS3bUS opbtion. Route the caule assempbly up tne tackriane To tnhe cCacle management rack, and then to the lert. %“ext route it cetween tne VAX=11/75u CPU cabinet, and the expansicn caocinet, then across tne pbottom ci tne exransion cecinet and ugp the tack to tne ©A DCX. Oee giagrean, Page 2 ‘ 62 wiBbGN CAELE ASSEADLY | —— _ / / | L { CABLE MANAGEMENT RACK L Lttty ettt & IXIXX*XXX " * [ i | X |emere ecvocnccny | | | } I1xi Ix1i Ixli X X X | | ) | | | | i %1 1xi X XLA i | | | | Ixi X[k | | 3 | Ixl x(C l | |ermccccXosecon| ) |svwraccncccncnccjen~aca]| toecmes X Ix| I | BA / | Ixi i | bOX |wweecec)ecc==|x]| X | i | XXXXXX | X} AL L L L L LD | R L L EXFANSIUN N cabinet eS¢ Install it . 20566 in Install UNIBUS 2,5.7 the on IN UNIEUS their last Instali your the (CAl DLD11 the Field cabinet viea the enad of slot ct the that el | ) the caple, anha expansion Dull are orn going install backpiane. tne secong manuals. UNIEUS Terminatcr module in slot Ab of backplane, uUNIBUS C81) Eack opticrns Service expansion to CFU installation Install the M9302 the 2.5.8 M90i4 ULUNIBUS per Y ( tne the { P DD11 in Exerciser Spares (UEBE) Kit backrlane. the backplane into module ( an slot Femove slot SFC M7855 ) fren in the NPG jumper wire where the USE located. 1s NOTE " Sw ay oo . UbE ANC ADLCRESS MUST BE SET VECTIGR SET FOR S10 FCKR 7700600 t SwlICHES ACCRESS Si CHN un S2 b G S3 oS4 Ch ch un cw S5 S6 (g ca UF ¢ urF S7 Cn ca Sy (E 125) | VECLUR N JFb (& aw) 63 CHECKA FCK POWER Aiwl GRCUMC SnCR1S IM EXPANSICN BUX CHeCK KEMOTE SENOE CABLE Check that remote sense cctle is connected trcm tne to the expansion caktinet. CPU POWER SISTEM CF Turn on ail breakers. on kKey s«#itchne. Turn BARCWAKE CHECKOUUT EXAMINE THE BUFFek DATA FATH REGISTERS OF SECOND UN1BULS Thnere are three ouffer data path registers, ana tney dare the at following addresses. F32004 CSR1 F3200% £3200C < [ 1] CSK2 CSk3 141 SECTION >>> E/P > rr r x K F32004 X X X X X J The register format of eacn of the recisters 1S as ftollcws. *--+--*--+--------------------------------—--+--+ 131130129120 P | | | L |I T +====== | | ¢$emce===es | 4oemerenma=== = nct usec == wljvul DR L L LR L DL DL L Dl ittt bbdndd S | ==wwec=c==¢ (PUR) PUIGe ReguUESt (UCE) Unccrrectecie trror (NXM) Non Existent iemory (ERK) Errcr Flag {CK or oils 2% & 3ul 64 3.4 EXANiINE SCek UF 1n& mAP REGISTenS UF Tac SeCLinu Uklpud They tall into the adgressSeS pet«éen F3z8u0 ana PILFFC and the recisters nave a8 fcrmatl as folloss. ‘ | | | | | | | i { | | i | | | | | | | | | | i | | i + | | . L adadadaded 4 0G 1 { Page Frame nunmcer concatenateao with cits<s:z> of tre UNIBUS to forr the 27z tit CMm{ o am wm o i ) 122121 @G { Ila DL R L L DAL L DL L L Dl ittt e rdiress, OP P 125} e e o e {311 not used it dde bt L DL LA S bbbl d PATH NUMBEK Direct Cata Path Buffereag Lata Fatrnr Bufttered Lata Path dufterea tata °Path (VYN SI F32FFC O to o--b-c;¢> F32800 ot e P DT DL L L BITE CeFSET cewaece=e Usea when addressing cdc byte boundaries. } i BIT VALID domecme=e~es If not set, treat cycle as a wQOF. 3.3 EXAMINE THE IPEC REGISTEKS 3.3.1 These registers are similar in furction to the UET reaisters of the Ual module. They &re physicallv located on the LGO10 module, ocut accessed via tne Second UnIBus. Theretore if you can examine these registers you have froven you can access the Second UNIBUS, and it is not nung. 772142 772144 172146 FBF462 FBF4c4 FBF4¢to Data register Contrcl register 1 Contrcl register 2 >>> 77214¢ FBEF4c0 Address reqister FBF460 E/a/P REGISTERS, KATHEK TdAlN EAT E/w USE LONG FrF40(C Face #CFC o LENGLR ,_. ¢ 1WREN EXAMINING Ck DeEPCS1.T N FURFA { wCRD PFCamAT, r[7 nCTE ‘H EX: UNLBUS ALUERSS CMI ACCLRESS IFEC REGISTERS 65 The followiny is a description cf the LPEC registers: ADCRESS KEGISTER FRe4eQ 115 001 ’---------------------------------------'------------+ This register contains sixteen of the address bpits used during an NPR transfer initiated by control : register 1., The upper twc bits, 16 and contained in control register 1. DATA REGISTER 17, are FBF462 *----------------------‘-------------—---------------+ 11S 001 *-‘--------------------‘-- -------------"------------+ This register has a duel funticn., For an WNFR cycle it contains the data either sent or received cy the APR, For a BR cycle it contains the vector passed witn the interrurt. FBF464 1 REGISTER CONIROL +--+--+--*--+--+--+--+--+--+--+--*--+--+--+--*--* 115114113112111110109108107106105104]103102101100 +--*‘-*-‘f--*--*-;*--+--+--+--+-'+--+--+--?--+--+ A ¢ L 1 N 1 I N T T D C g 1 A ¢C I B R 7 B R 6 B R S5 F E B R 4 T C F B A& 1t 7 A 1 b6 C 1 C 0 A F K E e 3 NPR = Setting tnis bit causes the cevice tc ao an NER cycle with tne data contained in tne address and data registers. If the pbit fails to clear ,it indicstes that the device was unable tc tecome rtus master. This bit is also cleared by INIT, C0, C1 = These pbits deterrine what tyre ot transfer pe done wnen APR 1is set. They &ére as rollows. C1 CC 0 C CATI 0 1 1 1 " 1 CATIF CATH Chichk »ill 66 Al7, A16 = Tnese bits are the ugper two oits of the addéress PB - register. Setting setting the register is TO = SSYN INIT this bit dCes nct simulates these a memorv gpits, rarity error BuUS Pr signal on the UHRIBUS when the read. This bit is clieared by 1\NIT. This bit indicates that was not returned. It is Clearec clear by IAIT. RFAD data a UNIBUS transfer timed out and reclocKed every transfer, and CNLY. - PE =« This bit indicates that BUS BB cn the UNIBUS occured during a DATI. It is reclccked everv DATI cvcle, and 3also Cleared by InIT. READ CNLY. BR7=-BR4 -~ These four bits cause the device tc assert thelr respective BR requests, and attempct to interrupt at thst level. They imay be set ir any combination to veritfy the arbitration logic. Once these oits are set tne 1FEC will attempt to interrupt until either the bit is cleared or the interruct has taken place. These Ltits are not cleared ty the interrurt taking by either writing by INIT before place, a ard must to tne zero they can te set te explicitally acprooriate a3gain to bit clearec positicn, initiate or another interrurt. ACIE = Tnis pbit is ACLG Irnterrugt tnable. when set, it will cause ah interrupt to vector 1lE4 on the leadinu edge of a UNIBUS ACLU signeal (power going co¥n) and again aprroxirmately 100 ms atter the tralling edqe of ACLJO (power comina ug)., Cleared ACLC1 = causes KEAC by INIT. Tnis an bit is interruct set bty if ACIe a8 power 1s GNLY INTCCNE that INIT This bit indicates caused Cleared conaition, py by writing one a of (1) an the to interrupt BR it tits or by has being taken set, CGNTROL REGISTER AT P LR LR LA 2 DRI L E L DAL L LRI L L X L L R 3 ) 11511491131121111101091C8iC71001051041031G2101100 e I A 838 B 8 8 V Vv V VvV V V OV VvV X & ¢ & R K R 8 7 & S5 + 3 2 1 7 o § 4 T 1T L s D C c G 2 > N E bit 1ulT. rBF46¢ LEL LR place The - This cit will initialize the internal logic when set. The outrut is undefined when reade. IFEC and » = was fail set, ¥ of the is 67 Vo=V(0 = Tnese bits specify the vector to the device to interrupt initiated oy Ccntrol kegister Tnese tits are 0T clearec ty InlI, BR7-BR4 = These ©its the same manner as Cleared by cause the Br bits be usec 2, by an interrupt in in Control register 1. InIT. ACLC2 « This oit wnen set will cause ACLO on the UNIGUS to te asserted for arproximately 1.5 ms. The bit -is self clearing. This bit i{s NOT affected ov 1NIT,.: INTDGNE = This pit works the same as the InNnTUONE pit in Control Register 1, tut for interrupts initiatea by by the 2., Register in Control bits BR This is kit cleared by writing a one to it or by INIT. EXIMOD - This pbit is reserved for future use, should kbe zero when EXAMINE A read., READ OnLY. UMIBUS EXERCISER Examine location FBF000, on the second UNIBUS. the UBE registers do, By examining a get out to tne BOCT UF REGISTER tnhis will aive you location 770000 For a description of what the consult tne UBE Users Manual, UBE register BA box. you are THE DIAGNOSTIC SUFERVISCR Minimur revision of pe is used checking that IN STAwDALOWE the Ciagnostic Supervisor bits you in cé&n. NCDE that can te (5.4). X B/710 where ATTACH T1his 1HE can program (XXXX) XXXX is tre boot device. DwW7S50 be done EVSBA o in by two »ays, doing a EX31 US> CS> PAGE EVSBA RUN L X X X N N N SELECT 9 ¥ either manual 2_J ALL by running attach. the Autg¢gsizer 68 US> ATTACH DW75(¢ DS> ATTACE UBE DS> SELECT 45 &9 40 Cw S» S 08> 3.7 RUN A THE UBI/O%w750 minimum of The program two is C¥I1I L#1 Dwi UgQ 770009 S10 Owil & SELECT &y & 0w uBo0 . - DIAGNCSTIC passes called cf this ECCEA, diagnostic ana shoula be run. should pe REV 1.3 or DEVICES uN THE SECGND diagnostics are necessary higher. EX: US> 03.8 RUN AFPPFUPRIATE fRun whatever RUN ECCBA DIAGNGSTICS other FOR acpprocrriate UNIBUS to verify the peripherals that were aaded toc the Dw750°S UNIBUS. These diagnostics can be determinea bty referring to the installation manuals for the aaded devics, lookirg ther up help file in £VaDX, as or by using the DSE> HELF LCEV XXXX (XXXX) is Diaanostic Supervisor follows. EX: where 3.9 REMGVE THE UNIBUS 3.9.1 Remcve the UBE 3.9.2 ReplacCe pins CA1 the tne (slot L of NPG BRING UF vmS EXERCISER mMmOCULE Jjumper SPC AinD wire in slot Grant an device you want know about, module. to CB1l Rerlace tre card on the where M78S5%S rtack in it‘’s backplane is (wire frorm installeag). original slct slot). RUN UETF ror infocrmation on settirg uUP and running VAX/VMS UETP User’s Guide (AA=Ccd3a=TE) RETURn SYSTEM TG CUSTCMER rage 10 UETF refer tcec tnre 69 L0005 CCS/WCS 70 CCsS THE CPJU (CCS) THE CPU COMTPAGL 3I0xe SLAT 3). CJJTRGL STARE THEZ SYST=4 (6X BY 80 YISC. SFLECT AND BAJK CONTAINS BIT3), A PARITY THe #ICRGCIDR "“EXT" ADDRESS GENERATOR L3IGIC 20LOJ0S RI4S FuK LATCH, (HI AWL NEXT FIELD CuaLY). THE CCS BOARD IS THE MQTHER BOARD FOr THAf 4CS (ARITEASLE CONTRGCL STORE) GPTION, THE »«CS IS PRESSZD 7Y THE PINS CN THE BOARD AND IF IT MUST BE REMOVED, USE A GRANT CARD AS A PRY BAR TU PREVENT IT FROM CRACKING. THZRE IS A JUA4FER ON SOME CCS BOARDS TO TIE BIT 13 OF THE "NEXT" FIELD JF THE MICRCCJODeE LOW, IT MUST BE REMOVED TO ENA3LE W“CS-USE, THERE IS NO DIAGNOSTIC TO TEST THE CCS RO# CONTENTS, The BEST WAY TC DSTERMINE THE CONDITION GF THE CCS IS T9 DC A PAKITY CHECK UNDER ROM MONEZ (RDM>PAR 0) IF YOU GET A PARITY SICP AT CSAD 17FD, IT IS UK. (A5 FAR AS AE CAN TELL) K&EEP IN MIND THAT DIFFEZRENT REVS. OF CCS BOARDS aILL CAUSz FAILURES UNDER THE WRONG REV, OF DIAGWJSTICS. THE REvVv. OF THE CCS CAN BE DETERMINED BY EXAMINING THE IPR 3E 3ITS 8«15 (SIC) THE NUMBER WILL BE IN H£X AND MUST Bi COWNVERTZD TO DECIMAL TO BE ABLE TO INTERPRET THE REV. LFVEL (EXA¥: 3% = REV 82) THE DPM AICRODIAGNOSTICS DO SOME MAINOR INTEGRITY TESTS CN THE CCS IF YOU WANT TGO RUN THEHM, RUN ECKAB.EXE DPM MICFG’S. THE CCS 4ICRNCODE FIELDS CCGNNECT T3 THE 40DULES THROUGH BACKPLANE JP4, «4IC, AND UEl WIKInG, THE ACS IF INSTALLED I3 CONNECTED TO THE CHI, THE WCS CAN 8E TESTED JSING ThE LEVEL 3 DIAGNOSTIC ECKAX.EXE, THE MODULE ALSO CONTAINS TWQ USCILLATORS OVEZ 13.75 MRZ FOK TARE SAC CHIP TO CRFATE SYSTEM CLOCKS, AnD ONZ 1 442 FOR THE TOK CHIP®S THE CCS COUNTERs MODULE HAS NGO GATE ARRAYS, ARITFEAGLE CU.TROL STOR< XU7%9 TRE KU7S50 WRITEASLE CUNTROL STORE UGPTION IS DESIGHED TC ALLCYW THE LOADING OF QPTIONAL H“ICROCNDE TO HANDLE FLCATING GRAMD AND HUGE INSTRUCTIQNS NOT NORMALLY SJPOIRTED BY TEE BASIC CFU MICROCAODE, THE WCS WILL ALSO ALUOW THE LOALIGG OF CUSTUMER ARITTEN ROUTINES IM MICRCCOLE PROVIDeD IbAL THE CODE IS WRITTEN IN THE PROPFR FORMAT AwD CARE IS TAKEN 10 CALCULATE CORRECT MICRO-FIELD USAGE AND PARITY, THE WCS IS LJOAUED VIA THE CMI BUS FROM AODRESSES BEGINMING EACH MICRO WCRD WILL REQUIRRA FOUR WRITES FROM F00003, ACROSS THE CMI TO ASSEMBULE ALL 80 2ITS. IF THE CODE IS DIGITAL’S FLJOATING POINT OPTIONAL PACKAGE TA=ZMN A LCAOEK ROUTINE WILL BE PART QOF AILL GIVEN BE PROVIDED ON EXPLAINI-G HC#¥ THE STARTUP CONYAND INSTALLATION: THE WCS A CASSETTE TAPE TO MAKE THE AMD LJUADING INSTRUCTIONS PKRUCESS A PRCCEEDURE. IS A SMALL PC BOARD WITH RAVM CKHIPS ON IT AND HAS NQO METAL FRAMEWCRK OR HANJLES., IT IS IMSTALLED "PIGGYBACK"TM ON THE CONTFPOL STORE (CCS L906GS) -#CCULE 8BY FIRST REMQVING THE PUSH O JUMPER (IF INSTAULEL) FROM THAE PINS PROTRUDING FROM THE CCS 30ARD, THIS JUMPER AAS INSERTED CONTROL ACCESS FROM NEXT OF NOTE: THIS BY MANUFACTURING "JNEXT" MICRO FIELD TO ADLCRESSES IN TO TIE GROUND THE W“CS 8IT 13 TrUYS RANGE BEING ACCEZSSED W“ITHOUT viCS TNSTALLZD, REMOVE (IF INSTALLED) THE PLASTIC PIN THE PIN PROTECT THE WCS THE CCS KIT, STORE CF THE PReEVErTING (2GCCG GUAKLS %) FRCM PORTS OM THE CCS. THRESE GUARDS SERVED TO THE PINS AWND ALSC ASSURE TH<Y ARE STRAIGHT, MEST BE C A RE F UL L Y PRESSZLC DCaN AGAINST AnND SECURED BY Twl NYLON SCREWS PFUVIUFC IN THE FINALLY TEXT IS RE=INSTALL INTENDED TIC THE BE CCS A 40ODJULE REMIIDER In OF THE ThE CPU, EASIC INSTALLATION PROCEEDPURE AND SAOCULD V9T BE SURSTITUTED FOR THE KU750 INSTALLATION GUIDE InN AdY wAdY,.. TESTING AND DIAGNOSIS: THE wCS CAN BE TESTED 3Y RUNNING THE LEVEL 3 MACRO DIAGHOSTIC ECKAX.EXE THIS TEST SEOULD BE RUYM IN THE MAMNUAL 40GDE (DS>E ECKAX/SEC:MANUAL) AND THE WCS FORMATTING TeST #ILL GI/E A WLAST ALDRESS" dF wCS. THIS ADDRESS SHOULD BE REYEMBZRED AMD LSED IN THE ATTACH COMMAND rOR THE XA7S0 CPu, IF THE DIAGHOSTIC FAILE AMD THE CPU IS {NGwd TG BE IN GOON CANDITION, TECH THEN THE WCS MUST SE REPLACED. TIP: “wHENL REPLACING THE «~CS USE A G727 UNIRUS GrA;.T CARD AS A PRY BAR TJ EVENLY CISTRIARUTRE THE PRESSUKRE LF RE4OVAL., IF A SCREWDRIVER IS USED, THERE IS & VEDI'Y GOOD CHANCE THAT YCOU «ILL CRAC< THZ PC RQar[. WwCS T2 CONT1IMUEDS NOTES THe 4CS KAITS (S DUF THEREFORE KEEP USER ACCESS: A HNT TO GOILiG THE TU vk PRCJECTLD STGCKED L9 IT IS LEFT JP TO SPARE O¥ HAND IF YJU FOR A USER TO ACCESS [N DENAID YoUx IN THE THE XFC SEND US VECTOR IF MACRQ] MUST A USER IS THE HOPEFULLY T[O THE OF A ADVENTURE CUSTOMER UP FIELD CARE SUAJECT THE OF JF THIS MICRGCCDE 3£ T4n SURE THAT ACCESS wCS FIRST 3E TO ¥CS HAVE TO THE 1T LGCATICKM OUR FINAL OF EXeCUTION~ HAVEZ )\ CCS B& GIVEWY AND THE JSER IN IN AnND TdA% AdY 2. 2001 CUK OF ThE AUOKESS 4ICROWIRD MUST BEFORE OF EGUAL MICRO4AJIRD AFTER THOROQUGHLY BITS MUST TRAP CCS DOCUMENTATION WRITTEN LOWEP #ILL SIMPLY TN MODE INSTRUCTIOW,. CALL) INSTRUCTIGN wILL THE TO OUFFICES GPTIGN. «RIITZ4 ATTZMPTING LOCATION WE ADDRESS THE ASSCCIATED NQTE: wF SOME RETURN RESEARCH CASE PICK "NEXT" 08VINUSLY AND THAT RETURH MICRORCUTINEZ IS SPARES GETIUY, RATIVE FUNCTION AT THE TRAT "XFC" SCBB+14 ADDRESS ROUTINE, IN A (EXTENDED TO THIS AID PROGRAM USE FlelL THIS INUIVIDUAL SUPPJIRT RCGUTINE IN THE WCS, HE/SHE AUST FIRSI THE REQUIRED MICROCODE 1S LCADED. HE/SHE YJUR FOR IM wnCS. SELECTIION CASE REFER SHCULD TU ATTSHPULING TRE Awn MAGNATUDE, YICROCUDEZ IS NOTP SUPPORTED BY L.E.C. 73 L0006 RDM/MTM QDM/MTH 74 SLOT 6). THE THE RE<OTE DIAGHCSTIC 130uhe (V1) 2LICOe THE REMNDTE TOQOL. IT MAIHTEMAJCE DIAGHASTIC IS WEVER 1CCL “UDULF CUSTNMEK -JCULE IS (4T4) CUNSIDERZD OWHED QR #LD0GA A THE TU=S8 MOVED I RODM TO 1IN CUSTCMER SLOT RUNWNING THE MICRCDIAGNOSTICS, AND THE ODC CENTERS, #HEN THE RoM IS AND CONSOLE THE 6. EGARD, RIGHT THIS AND SIGNAL CABLES ON SIDE ALLIOWS THE TU=S3 (VIFWED FROM THE THE THE CONSQLE TJ TO LUAD DIRECTLY INTO THE RAM ON THE RDm DIAGNQSTICS THROUGH THE RDM INTO CALLED vuT DOES wEMCTE INSTALLEC, BACKPLAwE RZAR) TALK (CUST.) IJIAGNISTIC REPAIRED TIME! O,E.M, CUSTIMERS CAN PURCHASE A SPECIAL CDULE THE MTH4 A0DULE WHICH ALLOWS RUNKING MICRO-DTAGNISTICS NOT ALLGW CONHECTION TO THE. DDC CENTERS. THE RDM ALLOWS DIAGNCSIS FROY (F.S.) YA MUST OF THE DIRECTLY TU THE YICRO=DIAGNOSTIC PROGRAMS BOARD OR LEVEL %AIN AE4DPRY, MACRC- 4 wHEN IN CONSOLE I/0 MODE, (>>>) A “P THEN “*0 WILL ENTER ROM MODE (RDM>), 4HEN A MICRUDIAGNOSTIC TAPZ IS LOADED, THE FIRST PROGRAM TN LOAD IS ECKAA.EXE QUR YICRD MOMITCE, QNCE LOADED, THE 4ICMON HANDLES THFE DIAGNQSTIC SXECUTICHN AND HAS QUITE A FEW QOF IT’S OwhN UNIQUE COYHMANDS, THE DIAGNQOSTIC MIN]I REFERENCE GUIDE LISTS TH& COMMANDS UNDER MICMON (MIC>), THE MICACH CAN BE LOJOADED 3Y ITSELF UNDER RDM MUDE BY THE COMMAMD KDOMDTE/C <CR> NQTE: MICRO=-DIAGNOSTICS THE RDHM’S OwN TAPE, 0 RUN COMMAND UADER *¥* THE THIS RD“ 4UST CONNECTS ANY MODULE *¥* THE HIGHEST THF THE IS ROM ALSO RDM HAS CONMECTED MODULE HAS NO TA BE AND RUxn DIRECTLY TROUBLYSA30TING IT 4,.XX UP HAVE ECKAF .EXL INTERNAL OIAGNOSTIC AT THE E~NC OF THZ RDM DILAGHOSTIC YAU 4UST USE A MICMON, (MICODI UM <CR>) DIAGMOSTIC MODULE REV, THE GATE I¥ TUO LOCATED CMI W A KNOWN THE O PRIORITY BUS, ARRAYS., CMT THE G330 TO CMI OF CPL! LACH MBS *=*x ALLOw 3US. ANY NEXUS FkE FINS *x¥ 15 CONTROL FUNCTIONS, RDM Enter RDM console mode Enter console mode Abort current command line Inhibit printing of text Retype current command line Cancel current function (repeat console command) Disable CPU output to active terminal Continue output to terminal after Control S onNaavOoOcCYL Control Control Control Control Control Control Control Control KEY TM = g . :>_ WBUS l—. CONSOLE el UART CONSOLE :: — CON CHIP TUs8 MODUM o~ ! ] ! ‘j UART | INTERNAL BUS UART e PR — 8085 REG (2) PROCESSOR S CSBUS | Aocaoe —1 STORE STORAGE REG _ I | PROM | TRACE MATCH ' s) ,_l RAM MICRO - .DIAGNOSTIC CONTROL PHONE REG i REG (2 REMOTE = UART LINE A H v | I l ooc | ocs l RAM L — CONTROL STORE DATA Remote Diagnostic Block Diagram , 76 OPTIJNS SLOTS #7,4%,9) OCPTION SLCTS THESE 3E CPU SLOTS INSTALLED SLUTS IS CAN OPTIONS IS IN SLOT THE MASBUS FOR THAT JUMPERS “MUST INSTALLATION MASBUS ON SECOND IT, NQTE: BE THE SLOT SET MUST IT THE THE SECOND THE THE CURRENT VSICH D3PTI)i OPTIIN, MUST IN WAHEA BACKOLAIE APPROPRIATE ACCOKDANCE OPTIONS OF FPA COMMON (MnA) THF IN ANY THE #ITH AVAILABLE AN IS REFERRED OF un1Isis, TO TFIS AS A ARBITRATICN THE IVCLUDE "SU3" SECOND DEVICES. BCOTELD FRUM OJPTION TEE (S=ZCIND UNI3US ANY OPIICN MUST BE AMND A SECOnND UNIBUS ADAPTEZR DIES NOT HAVE "COdTM CHIPS OR AN PURPOSE 2E THESE (MBA), UNIBUS THUS AND UP CONNECTION OF MURE UNI3JS THAT THE SYSTEM CAHdNOT 3E ON INSTALL ADAPTER GUIDE., ADAPTER ADAPTER., PLEASF #1) TO (EXCLUDING INSIALLED THE GRANT JUMPERS ON REMQVED THE dJSED AVAILASLE., IS TO DEVICES (SuU3), "INTTM CHIP UNIBUS) ALLOH 17 "LO007 MBA 78 THE RH7S50 MASSRUS ADAFTER IS A GENERAL PURPDSE INTERFACE RETWEEN THE CMI AND THE HIGH SFEED MASSEUS DRIVES. IT INTERFACES THE 32 RIT CMI DATA FATH TO THE 15 RBIT DATA FATH OF THE MASSEUS. GATE ARRAYS: MOF MASSBUS DATA FPATH (8 CHIFS) TO AND FROM THE CMI AND MASSEUS. RESFONSIELE FOR ROUTING DIATA AND ADDRESS INFORMATION BITS EACH. ALS0 TELL WHTCH MDC: MASSEUS DATA PATH CONTROL CHIF MCI: MASSEUS CMI EACH CHIF HANDLES 4 mBA Yoo WRE LoukIa For (1) CONTROLS AND MAINTAINS STATUS ON MAP PARITY AND VALIDITY. IT DETECTS THE EEGINNING AND END OF A DATA TRANSFERs AND MAINTAINS THE STATUS ON THE SUCCESS OF EACH TRAMNSFER. INTERFACE CONTROL HANDLES ARRITRATION, (1) COMMAND/ADDRESS CONTROL, GENERATION AND CHECKING INTERUFTS. MRC¢ MASSBUS REGISTER CONTROL MSC? MASSEUS SILO CONTROL CHIF THE STATUS . (1) DETECTS THE INITIATION OF DATA TRANSFERS AND FROINUCES IT ALSO FRODUCES THE DATA TRANSFER FUNCTION CODES. COMTROL ERUS. MASSEUS THE FOR SIGNALS THE CONTROL (1) CONTAINS THE REGISTERS NEEDED TO ADDRESS THE 32 RYTES OF SILO RAMs AND THE LOGIC USED TO DETECT SILO EMFTY IT CONTROLS THE GENERATION AND CHECKING AND! SILO FULL. THE CMI DATA MASK OF SILO AND MASSEUS DIATA BUS PARITY. FOR CUNTFDLLING FIELD CONTROL THE IS AS HERE 1S GENERATED THE FLOW OF DATA IN THE MDP CHIFS. BRUSSES: CONTROL EUS: DATA EUS:S THE MASSEUS CONTROL EUS IS AN ASYNCHRONOUS ERUS LINKING THE DRIVE CONTROL/STATUS REGISTERS WITH THE CONTROL EBUS IS INDEFENDANT OF THE THE CFU. DATA BUS» ALLOWING MNON DATA TRANSFER OFERATIONS TO BE INITIATED WHILE A DATA TRANSFER IS 1IN THERE ARE 31 SIGNAL LINES. FROGRESS. THE MASSRUS DATA BUE IS A HIGH SPEED SYNCHROMNOUS EUS USE FOR TR&NSFERRING ®LOCHS THE MRBA MUST BUFFER THE DaATA aAMD OF DATA. GENERATE MEMORY ADDRESSES. THERE ARE 23 SIGNAL LINMNES. ADAFTER. THERE ARE 32 ZIGMaL LIMES it} THE imn IMTERFACES ALL THE INTERMAL SIGHALE THAT CONTROL [ INTERNAL ERUS:S 79 (Tap) MBA THE | MODULE aLo0Q7 ! +4S8C I MDP3 | | #MDP2 | { MDP4 | I MOoP1 | I 4RC | ! ~MDPB8 | i MDPS | I MCI | | MDP7 | t “oP6 | I #DC i CMI MSG (BEA) CMI INTERFACE REGISTER CONTROL INTERNAL BUS SILO 4EA 16X 4 RAMS N7 MAP 4EA 268 X 4 RAMS Vi MDC DATA BUS CONTROL 1} 08 3l G DATA PATH MCH MRC < sSio CONTROL I INCOMING MAP ADDRESSES DATA 8US CONTROL BUS RH-750 MBA 5!MF'}F|5‘5 Block DlajrmM —> #ASSHIS 43A°S #“UST SE SET UP ADAPTER FOR IHSCALLATICN PROPER: JU=PERS 1. SILJO 2. "BA TRAJISFER NUM3ER (MBAD,MBAL 3o 1. BEFORE CESIRED ANY MBA SLOTI., INSTALLATION, (PREFERABLY FIRST SLOT 9 RATE IDENTIFICATICN OR v3A2) CMI ARBITRATIOJV (1,2 GR 3) REMUVE IF THIS ALL 3G IS5 THE JUNPERS -FRCM FIRST 2. SILO TRAWSFER RATE INVULVES A SINGLE JUMPER BETAZEN JF THE DESIRED SLOT. THIS JUMPER MUST BE INSTALL<D CONTAINING “BA’S., SECTION A OF THE DESIRED SLAT. 3. M8A IDENTIFICATION 4BA IS IN WHICH JUMPFERS SLOT. THE ARE REQUIRED JUMPFRS ARE TO INFIRY INSTALLEZD LEVEL PINS 43 AND 45 I[N ALL SLOTS THE AS ThE KBA) CPU WHICH FOLLG«S: 82 ALL JUMPERS IRSTALLED Iy SECTIJV A UF THE DESIRED SLUT noAd AS RKEuATeEw JUMPER A8A1 AS AS 51 PI~NS T S3 AND PevICE TO MUST BE GIveN BASICALLY IO THE LEVEL, (T4IS ALSU SOME THOUGHTI SACKPLANE WHEN THERE ITnEY Cml AS ARE ARB TO DEVICE CODE DBCX: ONLY TU TO 54 ol #HAT IS . SELECT SELECI THE SHOULL CMI TO SLOT A 4BAY) MbAl SELECT MBA2 0 ESTABLISH A C4f PRIJRITY LEVEL LEVEL ONLY TdREE 3: TO IN MIND THAT Ire THE 11/750 LINES TO INTERUPT THE CPU, ASSIeN NUMBER, GOOD BE RULE GIVEN OTHER TO TO AHICA Tht JF TdE m3A°s THUS SOME SLOT. HIGHER THUMB, ACCESS UfF USE TdoUGHT THE VOT A CAsSLES CAl KEWULKEMENT.) Ow THe OFTIONS, ARSITRATION . FOLLOWS: LEVEL 54 OWLY INSTALLING AREZ iC 53 TO HISHER ARB 52 DE3X: 52 THE MbA., KEgP UNIBUS BRS5/BGS DbAX: CODE 51 PINS CJUDE CMi ARBITRATION JUMFERS ARE FOR THe NOTE: DEVICE r0 RELATED JUMPER 4. PINS RELATED JUMPER MBAZ2 T0 82 LEVELS TO ASSISGNED TO M8A°s . INSTALL JUMPEK SECTIOAN A 64 INSTALL JUMPERS A 60 TO ©2 A1D 03 D 64 SECTION I1STaul JU2PERS 60 T0 02, ol T'1 83 Anl SeuCTIIJi A 02| o3 . [164 CMI Coed AR3 LEVEL 2: 59 ° '30 ol . Wi Aars 23 Lz vEL . Ll 2 o1 []92 63[]‘ >+ 295 . []60 54 TO Ao [F OThER T40 MORE CmL AND DEVICES ARE CMI LEZVELS ARe ARBR LEVEL 5: 5S e« 56 57 « 93 CMI ARB LEVEL 57 e 99 59 e 0f) TC RE 83 InSTALLED In RESEFVZID FOKk INSTALL JUMPER SECTION A 6 THE FUTURE 55 I4STALL JUMPER SECTIIN A [0 57 JPTLJi USt. 57 TO 59 SLAOTS, Idere ARE 84 EAAAPLES OF HECSAMAZADEIOD SZCIICGH aden INSTALLInG Ad UPTIUN, ALL 4ASIHUS AVAPTER A JF BG SILO RATE 43 435 47 . 49 . 51 DeSIRED JU4PERS SLOI mMUST 99 + 57 « 59 ., . THAT SLOT! « 44 43 .« 44 « 4o 45 « 46 45 « 46 . 43 47 . 48 47 . 4§ . 50 52 . 49 . . S50 51 . + 343 . 52 . S0 S1 52 54 AraAl 54 53 o 56 55 o 58 : oV ARS 09 FRI4 33 blfl 62 CMI 63 REAU/IED TRANSFER JU4PERS ABA2 . 8E : . S3 JUMPER CIIFISURATIUNS 1 , MBAO . 54 53 « o 56 55 « o 56 57T . o 58 356 ¢« o 98 59 . 60 $9 . .« 060 61 . flbZ CMI1 AFE 2 ol BOZ Cvl AkS o4 63 =) 64 53 . 00 5S 65 . . « ©6 e4 « GO scoT 7 ScoT B Seel 9 oo F 2 0o \ Fzs000 F1 o, 3 85 LOO11/16 CMC CAC SLUT #19), FIRST NOTE [HAT GR LOO1s QT THE CPJ MEMJRY MICROCCDE 86 TFE COY {FMIRY CI:iHTRULLAR THE (C47) S30ARD MUMoEF IN THIS COVTROLLER MCOULE CONTAINS 2LJ011 CR SLOT IS 3L0O015 LOO11 10, TD COGRTRAL MEMORY REFRESHES, IT’S DATA JwN BUFFERING, SELZCT TIMING (CAS AND RAS)., THE BOARD COJTAINS ERAUR CHECKING AND CUORRECTING LOGIC, STATUS REGISTERS, CONFIGURATION STATUS LOGIC, AND ThE BOOTSTRAP ROMmS, STATUS REGISTERS: BOOTSTRAP NOTE: ROMS: F20000 (EKRQOR CSR1 F20004 (DIAGNOSTIC REGISTER) CSR2 ¥20003 (MAEMORY REGISTER) SOCKET A F20400 SOCKET B F20500 ROM SOCKET C F20600 ROM SOCKET D F20700 EXAMINING OF CMC THE LEVEL MEMORY IS TEST EITHER THE 3 IN DEVICE TO TYPE XX THE XX CMI DIAGNOSTIC ECKAM.EXE PLEASE OWLY 44 44 THE TAPE NOTE vZ4JRY %S THAT AILL THE TEST THE DIAGNGSTIC ARRAY 0, YDU MuST BJARD OR RUN THE (ECKAC.EXE AVAILABLE M8728 SUPPORTS BOTh (48750 QF 8 TS TAPE #2), VERSICAS: SUPPIRTS A 1 256 KB MB728 AKRAY3S AND MEGABYTE BCTh TYPES AFE MIXED, INSTALLED DIRECTLY AFTER L0016 FNABLES CMC THE MODULE USE JF DETER4INED >>>E/1 RFSUIRES ONLY %8759 ARRAY 43°S) IF A (MAX, GIVING LS THYE 43728°S THZ 1 S£v., < M3°S) 4JQULES C MEG A “aAX, »uS&T 8”«% EBCARLE. 3ACKPLANE BIT 24 OF THE C4I ADDR<SS. BY EXAMIFING THE SYSTSY 1.0, vHICA TIhE KEV. FEGISTER 3& 200000635 02 00 XX X8 ADTCATZS E GATTARRAYS: 2US, TEST TWO FCM. (DDAQ) ANOTHRER LOO11: I DD TO LO016: BE = 1-7, CMC CAN THAT #ITH THE THE FOR LO ASCI1° ARRAYS MICRODIAGNOSTIC NOTE: THE THYE POSITIONS MIC HAS SICKETS, CUWNTAIN MNEMINIC AND CONTROLLER, S#4AP THIER WILL REGISTER) F20400 00F20400 CCNMECTED AND ROMS LOCATION >>>E/L/P P THE THE FIRST OF EXAHPLE: MAP ROM AHEN THE LATCHING ROM WORD EQUIVALENT WILL CSRO +4AF, 40L,"EC RLITIN A REV C BA(KXFPLANE ICuUMENT) 87 (rae) THE CHMC MODULE ! ¢LOCCG1t! MDL3 1 | CK sL0OO1l1o TMDL4 | | {i€C1 | i MEC2 |} | “4NLi i - | 0> GREEY C> RED LED LED MDbL2 | | (PNWER) (MEMORY CONFIGURATION MAP/A4ADI ERRUOR) R R I iot I I BOUT 1Ci I P EIREY bt RUMS | 4AP/MAD: ATMORY AP THE = “AP/MAD BUARD CHIP RED LED IF CHIP IT AMD DETECTS NUMBER:? BEST DIAGNJSTICS: CMCU cxC DATA CAT CMI DATA DATA A 8UsS MIC AICRG’S MACRC ARRAY: MEMDORY ECKAC.EXE ECKAM.EXE (LEVEL 3) “AP | 0adb.CHCK | 0ud4SCHCK 10a44.CHMCK STA 13 23 21 STA 20 17 STA STA 239l 1.10.01 FNGP3 1.11.0! VGALl12.-1 1037INTERAL 3US MEZCRY FERESENT 1036 INTERNAL |lma35GROUND |034FiGP3 2 | 0wd3INTERNAL |032.FNGP3 S 1031.FnuGP3 6 1030aINTERNAL | 0=29.FNGP3 4 | w28l l0=27FNGP3 3 | w28 -CH4CF MAR AJS “EXCRY PRESENT 3US SEMURY FRESENT BUS MEKORY PRESENT |0m25INTEZRNAL BUS PRESENT 0.14.01 FNGP3 0.1S.0l BUS ADDRESS MEM SEL1.17.01 oUS ADDRESS MEA SEL3.18.01 aus ADDRESS MEM SELOL19.01 SEL2.16.01 No20wa! INTERNAL THE MeiCkY. DATA NETM IMTERNAL OF PRESEMNT ADDRESS BUS TQ STA |0a43.CMCK STA 10wd2.INTERNAL 10l l1FNGP3 7 1060.CHHCK STA | w39 INTERNAL | ma3B8LGROUD BuS INTERNAL B8ITS ADDRESS GCFESET. €C4I, AnD LIGh1S CONFIGURATION MAP 19aclaa=====c=e=e0_43.C%CK 17an2aal o | Q4 7aCMCK VCCalld.al INTERNAL INTERMAL INTERNAL INTERNAL IHTERNAL MEMOQRY ADDRESS W&EHOPY ARRAY STARTIYS STATUS OnN TAE ILLEGAL 18an3.a! CHMI DATA 20wmiew! CMCF LATCH IAReaS-o0l MEMORY PRESENTwen6.0| CMI DATA 22acTea! C¥I DATA 21lacfaal C¥I IJTERNAL NXM JF SIZE 19=-14706 GATE CMI DECODING NXM°S, DETER“INXE MS750 mODULE: ThE NDETECT ISSUES PART CH1P MAD PERFORMS PGPULATICNS, MAP/MAD PRUCESSLF L0011 ENABLE MEMORY ARRAYS, THE 88 ADORESS ADDRESS MEM 8US AOURESS mE M4 3us ADDRESS ME 4 Nwollael SELS<22.01! SEL4.23.01 SEL6a240l THIS SIDE @ TOWARDS FIH#WGERS On 30ARD 3US AeLMOKY FRESELT 3US MEMCRY PRESENT 19 LATCH ADDPRESS m&W SEL7 4EMORY muLs THE MOL CHIPS FUMNCLICONM A0DULE, CvI AND 89 LOCGP CHIPS DATA THe£EY PASS ALL LIKE THE 4OR DATA AxD INTERMAL MEMORY BUSES. REGISTERS (CSR’S), T7) AND FRGM MCL B8IT SLIC® 1 <7=9> MDL 2 <15=8> MDL MDL 3 <23=16> 4 <31-24> PART NUMBER: 19-147907 BEST DIAGNOSTICS: ’ MIC MICRUG’S ECKAC.EXE MS750 SwODULE: CMC MACRI GATE ARRAY: 4ADL (1 00,08,16,24.-.2<>1 o ECKAM.EXZ MDL (1 THROUGH 4) DATA 1=27cu3aal N,MDL1 ADD HIT,MDL2 INTERNAL 3US DBO04,12,20,28 THIS RD.24.0i1<> SIDE DATA 1<>39.CM1I DATA 16.37-CSR 4R CY EJABLZ 1032 03,11,19,27 04,12,20,28 0,1,2,3 3US DB07,15,23,31 30S J806,14,22,30 RD IHNTERNAL AUS nB0S,13,21,29 RD <O10.31INTERNAL 3US DB00,08,18,24 RD INTERNAL BiUS D601,G9,17,25 RD €10z INTERIAL 3AUS 0k03,11,19,27 RC DATA €027 INTERNAL () TIOWARDS RD 103V l el B8ROM LATCH REG 1 MDL 0,1,2,3-21--! N,MDL1 E€RR nIT,¥DL2 ERR 4IT,N.22..! 0.23_.| 1<>41.CH4I <> 1034 INTERNAL AOG,A14,A22,1.19 | AG7,A15,323,CSR 0=31219aal a05,A13,A21,N_20__1 DATA DATA 91,09,17,25 DATA 97,15,23,31 DR ENABLE DATA 05'13'21'29 le=e3S5<GROUND HIT,Nol4-.] VGA,VGA,GRND,GRND (IDENT)Z15.01| VGA,GR¥D,VGA,GRND (IDE~T).16-0]| A04,A12,A20,CSR 1-28.17-| RCY IAR 1<>45.CM1I 1<>44.CH41I lew43.CMI .<>42-CHI lew30.D8 VCCal3aal ADD %) 4DR | e ADLATCH ADL OUTPUT CONTROL 1-.9.0| N,A09,A17,CSR 1=25-10uo! A02,A10,A18,CSR 1=26.11ox| : VGA~12-ol : 3) 10a347LINIT F LATCn REG 2 DL 0,1,2,3ccbcal MDL OUTPUT CONTROL 250l LATCH AUX MARwwbaw! “--7--' A03,A11,A19,CSR (LEZVEL THROUGH CMI DATA 06,14,22,30hualldvmnccacne=__43_LATCH CMI The THEY FRUVIUZ VARLIGUS S1ATUS AND A PATH FUR THE B30I3TSTRAP RCMS TUL HEZMORY, CHIP 4 CHIPS CHIPS 34 THE ¥IC ADURESSES lae2b=R0Y le=25<RO0% FI&GZRS OGN DATA DATA dIARD 3 8US 2 | Ds0d2 RO MEC: ME¥GRY ERROR CCRRECTIO DETECT USING AWl 2 A4YD CORRECT THE 4ICIFIFD DET&EIT DNUBLE CHIPS ALL SINGLE AAMAING B8IT ERRORS BIT SLICES 2 <31=16> DIAGNOSTICS: RIS, (UWCGRERECTAILE). MEC BEST ERRORS SYUDRI4E <15=9> 19-1470S MIC GATE MEC MICRG’S MACRO ARRAY: TMMEC (1 2) ARD ECKAC.EXE ECKAM.,EXE (1 AND (LEVEL 3) 2) MEC LATCHE DATA IlNealeaw=== 48 INTERVALL3U c<==<d S.DR10,26 >=0 BYTZ0 LOWWORD,HIGHAORDmw2ea| O € 10a47INTERNALLBUS_DBEQSE,24 OUTPUT MEC LATCH OUTPUTea3.0| INTERNALLBUSLDE05,21 INTERMALLBUSLDBO1,17 RDao4.0l1<> RD_.S-0I<> INTERNALLBUSLLB07,23 RDuwbanl<> INTESNALLBUSLDE03,19 RDead0i<> INTERNALLBUSLDB02,18 INTERNAL.BUSL.DB00,16 INTERNAL_BUS.D304,20 RDo.9.0}<> RDL10.0I<> RD_11_0}1<> €310-46.INTERNALLAUSL.DB15,31 |0-4S.MEC N,SIMGLE <1043 BUS C3 3US SYNDROMEO 2, INTL BUS C301 C3u4 SYNDROMEL16,INTL SYNDRONEQ2, INTL 8dS 3USs SYWDROMz32,INTL BUS LOwJ4ORD BYTZ CB | «=38.GROUND 10.37.CORRECT THIS D kD DISARLE RC,F SYNDO2 |le=35.GROUND | ww34.VGA,HINIRD |le33.LOGAWORD RD.22.01! SIDE 1 €| 03AINTERNALLIUSLCBO2 RD=18.01 RD.19.0} KD.20.01} RD.21.0l REGISTER,VGAL24.0| kD kD FD LOwiU,dinD 25 QUTPUT TQWARNDS SY NDROUME INTERNALLSISLCBOY RU,FE SIaDO1 <1031 INTERNALLIUSLCEODS RD,F SYNDUS <1030 INTERNALLAISLCB1G xD,F SYND16 <1029 INTERNALLBUS.CE T RE,F SYaD €| 0e2BINTERNALLBISLCRBO4 «C,P SYNDC4 RC,P SY:D3? €3 10a27INTERNALLBJSLCE32 @) e GEN,GARND <1032 |la=26.L3Ow40RD LATCH kKD OUTPUT <> lo0a3%9.INTERNALLBUSLDBLY, 27 T RDL17_01 C316 C302 €332 RD IRTERNALLANISLDBL G, 3¢ | a=41.0UTPUT ERROR.1S.0l T,INTL SYNDRUMEOQ1,INTL KD € 0ué2.l1TERIALLBUSDB13, 29 N,ERROR.16.01 SYNDROME LATCH <>10.44.INTERNALLSUS.DEL 2, 28 VCCal3..l INTERNALLBUS.DB06,22 RDL14.01<> v AND 1 NUMBER: cMC MEMOXY MEC MS750 T BIT CUDE CHIP PART 4ODULE: CiHlFs |0=25.F FIWGERS ON QUTPUT Ci SYNDRO4EQS,INTL 30ARD BuS,G RND £US C B0OR T RD 91 'M98313 UET - s e 0 0 o MPR SCwE READ (DATI) >>>0/1 USING 37 >>>D/W/P Tt UET PRIGRAME #AP RD® 1, 1 1 tPURGR ADD 1000 0 ' $SET UP UMIBUS >>>0/4/P FFF464 1 +SFT ~PR "GO" TEST RESULTS: THE 12345678 UJUET FFF460 2 >>>D/nW/P FFF464 1 PATHS "*¥x" AND FOR MANY ARITE READ S ADDRESS or : RESULT: get:1234 4AP FIELDS - CAN 8k BDP2 = 3DP3 = EXAMPLES. CAN BF LOAD ADDRESS 8). LOAD DATA REGISTER C). LOAD CONTROL or LGAD LOAD REGISTER DATA = 800920008 USING THIS FORMAT: THE FOLLJAING: (See Cnart) (Address oits 17 &nd 16) 17 &anc 16) = Sk4g) DATIP) ADDRESS CONTROL LOAD LCAL REGISTER REGISTER FFF460 FFF4e4 WITH DAT1P?P DATA REGISTER VJVITK JECTIR COTROL XEUISTER w#ITn THF CHAFT: 1 THE 80600098 C° FFF462 REGISTER FFFA464 WITH CR<O>=1 CR<2,1>=DATU or CAIG3 CR<4,3>=A17,A16 CR<11=3>=RR cL SURSTITJTIMG FFF460 or Cr<%,3>=A17,A10 FUwCTION BY 850400008 TRISD CR<CO>=1 CR<K2,1>=0ATI A)d. 8). USED DATOB) A). (DATI ) REGISTER: THE FOLLOWING: OTHER (DATC A). 8). ADOPESS get:5673 INCREMENT ] PFM =& 3IT FFF462 >>>D/wW/P DATA *CATA DIRECT " NPR 1 FFF460 Should NPR 3DP :SET UP MAP 0, VALLD, PEN = 1000 >>>D/w/P TEST THE SECOND DO>E /W FFFr462 THE o >>>0/P/L Should OTHER PF. eINIT F303004 >>>D/L/P £30800 80200008 >>>E/w AT 9, .o <0 Q| 0 = DATI 0 1 1 ¢+ 1+ = OATI? 2 = 24T 1 + 1 = DaTuE LEVrL THE FOLLUWING: (See Zhart) (Address 29its AJDRESS °FOLLUVINGS (Ixannla:CRCED=L; 115 114 T 113 T 112 T {11 110 UET UNIBUS ‘. ju7 ADDRESS {06 D Gy AP 105 D D WD P WS D G 104 193 S G S gy T WD G o T ap &S gy O 192 101 10C | REGISTCER ! | | 115 | 114 | 113 i 112 | 111 | 110 | | i | | | {04 | { 105 | i 106 ! | J07 i | 108 i | 109 | (03 | | 102 | |01 | N (0C | JET UNIBUS | | UNIBUS IMTIT | | | I i i InPE] i | ,(-------------)' had - o - ~ I | | | | i | | ! | i ERROUR i | 3US REQUEST UNI3US | PARITY i UET i SSYN | TIMEQUT | FORCE | PB { ADDRESS b | | J ! | EXTzZ« a e | @ i | ICO i Wer L i | P JA1TIALGICL | | | G | GO WEm ! | ! I | I3R7IBR6IBRSIBR4|PE 01 SED | { 02 WED | IFB | | { 33 UNI®IJS WEW | ITO | | | JINIT 04 G 965 e 06 GEn 07 24 08 e 929 Rm uIm @we wme 10 WEy 11 The wam 12 REGISTER g 13 DATA | (- 14 ~ ISSUe |08 W | 15 tFF464 109 - T n FEF462 T @ FFF460 T TRANSFER ISSUE SELECT | MNFR "GO" 94 SUFFERE)D BDP 1 = F30004 R 1311301291 T DATA PATH CSR’S 32P 2 = F30008 30P RITS 1 THROUGH 28 o ARe I ERRQOR 3 NGI = £3090C USED o o | 01 P ' BIT | | (OR OF BITS 30 (N NXm -- AND 29) IF UNIBUS DATA: IF CMI PURGE FIT SEND IT TU THE CMI DATA: CLEAR THE 3UFFEPR | UCE CMI ADDRESSES MAP DATA F30800 FIELDS THRQUGH F30FFC 31'30<------)26’25'24i23'22,21'20<------>15'14(-—-------------;-)0 I 99T b I63T 1 T YSED 19 IUSED IDPIDP| I | VALID ES THIS I MAP VALIC Lo DATA PATH n (SEE | BYTE USED T0 BYTE OFFSET | NOT | USEC | o | - BIT 1 THE p PAGE FRAME a SELECT B8IT BITS CHART)====e=e=ee<> CIRECT | l 3IT 22 | ACCESS anp BOUNDARIES WULMEER | 21 ——e=e-DATA PATH RUFF BUFF DATA DATA PATH PATH 1 2 BUFF CATA PATH 3 = = = 0 0 1 =1 | | | | 0 | 0 1 95 DIAGNOSTICS 96 DIAGNOSTICS AwD LEVELS THE SPFCIFIC LFVELS OF ALL DIAGMOSTICS CAd 3E FAUND IN EVNDX O~ 4ICRGrICHE, DIAGNOSTIC LEVEL 1) LEVELS RUNS QNLINE ONLY, WITHOUT DIAG. (UETP, ERRLOG, SDA ETC,) SUPERVISOR. LEVEL 2) RUNS ONLIME OR OFFLINE, !NDER DIAG. SUPERVISCR. (DISK FORMATTERS CR DEVICE RELIAARTILITY ETC.) LEVEZL 2R) RUNS OHNLINE ONLY, WITH DIAG, SUPERVISOR. _ (RESTRICTED DUE TO REQUIRED DEVICE DRIVER UNLER VMS) LEVEL 3) RUNS CFFLIME OWLY, UNDER DIAG. SUPERVISOR, (MAJORITY OF DIAGNOSTICS FOR REPALR LEVEL) LEVEL 4) RUNS OFFLINE ONLY, LEVEL S) MICRO=DIAGNGSTICS WITHOUT DIAG. SUPERVISOR. (STANDALONE AND BOCTA3i:£ DIAGHNGSTICS) DISTRIBUTIUN CF DIAGWISTTICS T DIAGNNSTICS TAPES AA) CANCSLLED TAPE 21) ECKAAEXE #2) SUbHJECT TO VAIIATIAON, 9T Lever TAPE TAPE IS ECKXAR,EXE 1 S AICAGHN ECKAF EXE tv RDM ECKAA.EXE 4§ S CSCKAF ,EXE 11 ECKAC,.EXE 1 DPM MAICRIDIAGMAOSTICS DIAGHOSTICS 4ICMON XIC MICRIDIAGNISTICS RDM DIAGVOSTICS TAPE #3) CANCELLED TAPE 24) CANCFLLED TAPE &5) ECXALEXE 4 CACHE AND ECKAM.EXE 3 MAIN ME4JRY ECKAX EXE 3 P"CLUSTSLR" TSCSAA.EXE N/A TAPE #6) £CSAA,4LP HELP ZVSBA.EXE EVS3A HLP 3 CONFIG,.CCM or FILES DIAG, VAX HELP FOR THE DIAGANOSTICS DIAGNGCSTICS EXERCISER SUPERVISAR FILE AUTOSIZER FILE UBIATT.COM 117750 TB : (CIONFIGURATICHN DIAGNISTICS) TAPE 7) EVKAALEXE 4 "HAKDCORE"TISTRUCTION TAPE #8) EVKAB.EXE 2 VAX=11 1TESTS ARCHZTECHURAL INSTRUCTIONS EVKAC,.,EXE 2 VAX=11 FLJATING PCINT EVKAD ,EXE 2 VAX=11 INSTRUCIIDNS CO4PATABILITY MCLE I1STRUCTIODIS TAPE %9) EVKAE,EXE 3 VAX=11 EVGOB.EXE 3 LOADASLE PRIVILZGED INSTRUCTTIINS ARCHETECTURE DJDRIVER FUR DRIVER FUR DRIVER FUR DRLVYER ¢CR RPD4/S5/6 EVJOR.EXE 3 LOADA3LE R4G3/5S EYANM . EXE 3 LOADA3LE RKQO6/17 TYANL . EXE 3 LOADARLE RLO2 CVAOA ZXE 2R EVRAA,EXE 2 . TV24C ., RXE 2 VAX=11 CR11 VAX=11 RP/I4/RK CIAGHOSTICS VAX=11 DIAGANCSTIC RP/R¥/RL FOR4ATTER ZeLIAzILITY UISX TAPE EVI4A,EXE 319) EVIXA TAPE #11) VAX=11 M3203 VaxX=11 C3M ZXE REPAILR IDP EVDAA, TXE DLIAGNUSTIC VAX=11 07211 ECSAA.EXE DIAG, EVREA, ZXE VAX=11 3 LEVEL REPAIR LINE PIAG. LEVEL ASYrMC. MUX SUPERVISOR A FART DIAG. RK611 - TAPE #13) EVREC.EXE VAX=11 R¥XA11 DIAG., PART EVRED,EXE VAX=11 RX61i1l DIAG. PAKRT EVREE,.EXE VAX=11 RR611 JIAG. PART VAX=11 RKB11/RK06/7 PART 1 D1V RX611/RX06/7 DKIVE EVREF,EXE o C m #12) VAX=11 RX611 DIAG. -PART B ta TAPE EVREBR,EXE FUNCTIONAL VAX=11 EVREG.EXE FUNCTIDnNAL TAPE #14) TAPE #15) PART . EXE EVGDR LOADAGSLE EVROA.EXE VAX=11 rRM03/S DISKLESS EVRNB,EXE VAX=11 R¥93/5 FUNCTIONAL EVATS.EXE LOADABLE VAX EVMAA EXE DRIVER NDRIVER EVMAD EXE VAX EVRFA,EXE #16) TS11 VAX=11 RLO2?2 EVRGAEXE VAX=11 RM89) EVRGB,EXF VAX=11 R¥317 INn DIAGHOISTICS THE STUQENT TH% 11/759 FIR PERIPHERAL FOJAIn TN DISK REFAIR SUBSYSTEn DISK FORMATTER DISKX CRIVE DTAGNCSTIC 3 RH750 (48A) OIAGNISTICS 3 N/B D4750 (U3T) DTASGNOSTICS DIAGHUSTIC LISTEC ABOVE ARE OMLY THESE ARE THE SYSTEM evioX UATA OIAGMUSTIC ECCAA, FXE GUIDES, "PACKAGES". NDEVICES AND AICRAIFICHE, SUP==VISCH THISE A4ICKF RAPPERK MAIN JIAGYQSTICS ADDITIONAL DIASGNISTICS COMMUNTICATION DIAG, TS=1t ECCAA,EXE ECSAA,EXE THE CIAG. DJIAGNASTIC FUNCTIUNAL 317 RM(O3I/S FCR SUBSYSTEM FUNTIONAL TAPE ¥FUGR TMO3/TS11/TU786 RELIAILITY TAPE 2 £ 1JIPMENT Ca> fCR et DIAG. cems ems hbe e DIAGHDOS ee Sues et A cout SeRS b UR S)E; . MEDIA ~1 seee s y v i COFPYING SeNm Sebe SESS GBS MG SGme SMH MG semd COFYING THE DIAGNOSTIC MEDIA TO THE SYSTEM REVICE. THE FROCEDURE IS5 EXFPLAINED FOR NOTE: THE 3 FOSSIBLE DIAGMOSTIC MEDIA. VERSION 3.X UMS TAKES UF COMSIDERARLY MORE DISK SFaCE THAN FREVIOUS VERSIONS. THERE WILL MNOT ®8E ROOM FOR ALL OF THE IT IS RECCOMMENDED THaAT VAX SYSTEM DIAGNOSTICS ON THE FACK. YOU RE SELECTIVE OF THE DIAGNOSTICS NEEDED OR FUT ALL DIAGNOSTICS ON A i. SEFARATE FACK OR MAGTAFE. TUS8 DIAGNOSTIC DISTRIRUTION Ae (RKO7 FACKAGE SYSTEMY ° IF THE DIAGNOSTIC UFDATE OR DIAGNOSTIC KIT HAS TO ENTERED INTQ THE SYSTEM FROM TUS8 CARTRIDGESs THE | FLX UTILITY MAY RE USED TO ACCOMFLISH THE TRANSFER. FERFORM THE FOLLOWING COMMANDS ONCE THE NEW VMS SYSTEM HAS EEEM INSTALLED AND BOOTED. LOG INTO THE SYSTEM MANAGER’S ACCOUNT TO FERFORM THIS FROCEDURE. $ RUN SYS$SYSTEM!SYSGEN SYSGEN:>CONNECT CONSOLE SYSGENFEXIT $ MOUNT CS1:/FOR $ SET DEF SYS$MAINTENANCE $ ' FLX MCR FLX>/RS=C51:%.%/RT : CFLX h. ALL THE DIAGNOSTICS AND FILES ON THIS TAFE HAVE REEM TRANSFERREDI TO THE CSYSMAINTI DIRECTORY aT THIS FOINT. INSERT THE NEXT TAFE AND REFPEAT THE FLX:> COMMANI ) TO COFY THE NEXT TAFE. FLX>» /RE=CS1!X.X/RT FLX> REFEAT THIS FROCESS UNTIL ALL TAFES HAVE BEEM TO G. A THE L[SYSMAINT] CONTROL Y FLX=TY WILL AREA. EXIT FROM THE FILEX UTILTY. TRANSFERRED 100 <. RKO7 VAXFAX DIAGNOSTIC DISTRIEBUTION (DUAL RKQ7 FPACKAGE SYSTEMS) A MOUNT THE VAXFAX DISK CARTRIDGE IM DRIVE 1. k. MOUNT THE NEWLY CREATED VUMS SYSTEM IN DRIVE O. c. BOOT THE NEW UMS SYSTEH FROM DRIVE O AMD LOG INTO THE SYSTEM MANAGERS ACCOUNT. PERFORM THE FOLLOWING COMMANDS TO TRANSFER THE VAXFAX DIAGNOSTICS TO THE SYSTEM DEVICE. $ MOUNT DIMA1: VAXFAX $ SET DEF SYS$MAINTENANCE ¢ COPY DMAL1:LCSYSMAINTIX.X5X X ¢ DIR/FULL DIAGROOT.EXE,ECSAA.EXE,»CONFIG.COM U MAKE CERTAIN THAT DIAGEROOT.EXE» ECSAA.EXE AND CONFIG.COM ARE CONTIGUOUS DLISK FILES. IF THEY ARE NOT COFY THEM TO THEMSELVES USING THE /CONTIG SWITCHs, THEMN FURGE THE OLD $ $ VERSIONS OUT OF THE DIRECTORY. COFY/CONTIG DIAGROOT.EXEsECSAA.EXEyCONFIG.COM FURGE DIAGEROOT.EXE,ECSAA.EXE-CONFIG.COM X THIS COMFLETES THE DIIAGNOSTIC TRANSFER TO THE SYSTEM DEVICE. YOU MAY WISH TO DELETE ANY OF THE DIAGNOSTICS WHICH RELATE TO THE 11/780 AND 11/730. - $ DELETE ESX.XjX $ 3. MAGTAFE FACKAGE VAXFAX DELETE ENX.XiX DIAGNOSTIC DISTRIRBRUTIONM (RMO3/TS11 OR RM80 SYSTEMS) A THIS FROM FROCEDURE WILL TRANSFER THE TS11 MAGTAFE TO THE B. BEOOT THE NEWLY CREATED VUMS SYSTEM AND LOG INTO THE SYSTEM MANAGERS ACCOUNT. FPERFORM THE FOLLOWING COMMANDS TO TRANSFER THE MAGTAFE DISTRIBUTIOM TQ THE CEYSMAINTI AREA OF THE NEWLY CREATELD DISK. ' ¢ MOUNT $ SET $ MSAO: VAXFAX DEF SYS$MAINTENANCE COFY MSAOIX.XyX X THIS TO THE DIAGNOSTIC MEDIA SYSTEM DEVICE DRAOZ. WILL TRANSFER ALL THE LCSYSMAINTI1 AREA THE DIAGNQSTICS OTM OF THE NEW UISK. THE MaAGTAPE MAKE CERTAIN THAT DIAGEOOT.EXE. ECSAA.EXE AND COMFIG.OOM ARE CONTIGUOUS DISK FILES. IF THEY ARE MOT COFY THEM TO THEMSELVES USING THE /CONTIG SWITCH: THEN PURGE THE OLD VERSIONS OUT OF THE DIRECTORY. $ $ v THIS COMFLETES THE DIAGHOSTIC TRANSFER TO TEUICE. YOU MAY WISH TO DELETE ady OF THE WHICH RELATE TO THE 11780 AdMD 11/730. =T 2 .,, e, COFY COMTIG DIAGHOQT.EXE-ECSAA.EXE.TONFIG.COM FURGE DIAGROOT.EXE,ECSAA.EXE,CONFIG. DM .E! B R :'c ._"'. Y THE S7E7Es DIaGm0s8 7105 4 101 Title: Autosizer Author: Processor Aprlicability: . VAX Family Have all your VAX 11/780 and 11/750 systems CONFIGURED for you using EVSBA,EXE released in the Diagnostic Update release 3, This program, available after November 1981, will pass configuration information on to the Diagnostic Supervisor, It builds a series of ATTACH commands pased on the hardware it found during its sizing process which {s passed on to the Supervisor and may be written to the console load media for later use, £ile! It will You will nolonger need to build a configuration command be built for you! PERTINANT INFORMATION 1. The program is a level 3 standalone program that runs under 2. It requires 256KB Memory, a Console Terminal and Load Device .+ The program operates in thrée modes: Default, Manual, and Selftest, tne Diagnostic in working Supervisor. order, To select any of these modes RUN EVSBA,EXE RUN RUN 3,1 type after the DS> . EVSBA.EXE/SECTION:MANUAL EVSBA.EXE/SECTION:SELFTEST prompt: for Default for Manual for Selftest Default: In the default mode the program sizes the system passing the configuration information on to the Diagnostic Supervisor. After the execution of the program this information may be seen by the operator by typing SHOw DEVICE after the DS> prompt. ALWAYS VERIFY this information when using this mode since the program makes educated guesses reguarding some necessary information. In particular UNIBUS devices which use floating addresses for their Control Status Registers and vectors may be configured incorrectly for a particular system, (See EVSBA,DOC for further information) 3.2 Manual: The Manual option may be executed by typing the following command after the DS> prompt: RUN EVSBA.EXE/SECTION:MAJUAL This causes the program to give the following prompt: COMMAND? Legal responses to thls prompt are: ATTACH, CHANGE, EXIT, HKELP, LIST, READ, SIZE, and WRITE. Explanations of these commanAis may be read by accessing the program’s help file. (DS> H EVSBa note: You must use an ATTACH command to pass information on to the Supervisor after in this mode, Commands READ and WRITE access only the the confizuration SIZEinq the system console media. HELP) 102 3.3 Selftest: command As in The atter the command Selftest the Manual {s DS> mode valid., option may be prompt: RUN EVSBA,EXE/SECTION:SELFTEST the The COMKAND? primary executed prompt difference i{s by typing given, between the Any these following manual two mode modes is that when using the S1ZE command in the Selftest mode all the configuration information is shown to the operator on the console, 4, Ther e is a A response "QUICK" execution of the program available in-all fiodes. of SET FLAG QUICK program will cause it to to a8 the DS> prompt prior to running the connected a DZ1i, For systems with a large number of terminals this can save considerable amount of time and the program will proceed very quickly. The the autosizer can be run from system diagnostic media, where A to ignore the presence of terminals mass storage devices recommended sequence 1. Boot Diagnostic 2. DS> SET QUICK P DS> the RUN either the console subsystem or from This fact can be useful in situations are inoperabple, of operation is: Supervisor, if quick execution i{s desired. EVSBA/SECSSELFTEST 4. COMMAND? SIZE S. COMMAND? CHANGE (only 1f configuration information needs change) 6. COMMAND? WRITE (writes configuation 1nfor§ation to console media) Te COMMAND? ATTACH (passes 8. _.COMMAND? EXIT (exit 9, DEVICE (to DS> SHOW (sizes system) 10, DS> CLEAR QUICK 11. DS> SELECT 12, DS> RUN 13, To copy see that results of informaticn autosizer) devices for running desired by program to diagnostic diagnostic you file created logged after into s MOUNT/FOR CS1: I S~ FLX>=CS1:CONFIG,COM/RT FLX>~Y SYSGEr S § MCR FLX CS1i: Booting VMS FIELD SERVICE) follows: DISMOUNT Supervisor) to the Supervisor) as $§ to (clears the QUICK FLAG) CONFIG.,COM utility from EVSBA back DESELECT desired (assuming FILEX or configuation [SYSMAINT] use the ScalAT Y Sl > CoanTl SYSefrs . CousolF VAX UUT-Ture LINK GENERIC FARAMETERS AALLK Dun’ ??73n CSR VCT BR 770460 350 S CR11 DL11 DMC: DMF11 DMR11 DUn Dun DUn Du¥n D¥n CRa 773 XMa XDan Xran CSR CSR CSR CSR CSR VCT VCT VCT VCT VCT BR BR BR BR BR 777160 230 4 760050 xxx DR11K DR11U DR780 BuP11 Dén Dun SBI Din 773 73 XFn XJa AD11X Dun Vi1 DH730 D780 DU780 D211 KA7S0 KA?780 KMC11 D¥n LPA11K DMa DMa DMan DMan DLa DLa DLan DLan RK0é RKO? - RKé611 Dln- RL11 DUn RLOZ RLO2 RMO3 RMOS RMB8O RHn DBan DBan RPO4 RPO7 RX02 RHn RHN DYa DBan DRan DYan TE1é NTa KTan Dun TUz7? Dun " TUu?8 UBE - xxx & v 777514 200 4 770460 350 S BR 170 764200 -] 8 S (RHO) 9 S (RH1) x CSR VCT BR 777440 210 S CSR VCT BR 774400 160 S CSR VCT BR 777170 264 S 772520 2224 S 776500 xxx x BR DDan CSR VCT BR CSR VCT BR UBan DUén DRIVE &_ VCT MFan MFa . TTan TTan TTan TTan TTa TTs TTa Note!: The turical column is only a rartial list because of the drest amount of rossibilities in confisurations sort 775000 3 4 (%1 UBA) 4 4 (42 UBA) 760100 xxx S EIA NG NO YES O ¢ No No 0 O -~ 770404 BR CSR NTan MTa TTa VTSo VCT MSan MTan HTs -TUS8 Uabus vTS2 VUTSS VT100 MFa D¥n TUAS ‘ _NTa RHn TS11 4 CSR VCT BR TR BR TR BR _ DYa ._RHn TM78: 124 xxx DRan REn RHn _TMO3 _ __ ___ . DRan DRan RPO4 RPOS RX211 . . DLa RHn RHn 772410 767770 é BR 7 RHN RHN RHN Dia xxx - MSn Dun cMl SBI SB1 BR BR TR MSn i VLT VCT CSR VLT BR TR BR NMPM PORT DRIVE # 1-3:34 . BR BR LAan MAn MBn NWS780 770400 BR CSR DUn SBl RHn PCL1L RH7S50 RH780 RH780 CSR CSR LPan LPan cHI BR LPa MA780 MBE AR NS750 VCT TYPICAL BR CSR VCT BR 'BR TR BR TR BR CSR VLT BR EIA/20MIL G H TOY uCS ACC 6 H HCS ACC TTan TTan TTan TTan LPan LPan LPan LPa LPa VCT CSR VCT CSR VCT TR BR CSR VCT XMan DN LP14 LP2S CSR 7 TTa TTs TTa TTa LPa LPa LPs LP11 . XVa DUn Dn Dun TTa KAn KAn Dn LA34 LA3S LA3B LA120 LA180 LPOS LPO6 CSR 77?3 DUn cnl SBI SBI Dn cMI SBI KWi1K _ ?%an DUn DR11B Ut O 3 1 Attaches of - these are by ne¢ aeans any standard. 3 = Alrha Character n = Numeric Character 104 SGYE 3ASIC CUNSOLE gNDER CJ4MAWDS CONSOLE EXAMINE I/9 >>>E/X/Y MIDE >>> (ADDRESS IN 3=83YTE W=WJRD X= Y= L=ULONGWORD (ADDRESS AEX) >>>D/X/Y INITIALIZE >>>1 START >>>8 CONTINUE >>>C 8347 >>>8/(FLAG)/(QUALIFIER) /710 /100 MODE FROM IM - - I=IPR (SPECIFY REGISTEK %) HEX) (SPECIFY REGISTIEER (DATA IN HEX) %) <CR> <ADDRESS> SOME FLAGS:/1 ®DM P=PHYSICAI VsVIRTUAL G=GPR PEPOSIT ‘ENIER <CR> CONSJILE I/0 (DEVICE) <CR> =CONVERSATIONAL R393T =DIAG.SUPERVISOR =SOLICIT MODE = FILE NAVE >>>°¢p >>>%D ENTER RDM MOOE FROW VMS = $?S5YSSSYSTEM:SHUTDOWN or S@[SYSEXE]ShUTDOwWN THEN >>>%D “P 105 SANE COPY COAMANDS FILEX COPY FROM DISK (NDEFAULT DRIVE) T TU=53 $ RUWN SYSSSYSTEM:SYSGEN SYSGEN>CONWECT NOTE: FILEX 00&S NOT USE ANY CONSOLE SYSGENDEXIT CCVTRILLER $ MOUNT CS1:/FOREIGY $§ SET DEFAULT (SYSMAINTI] $§ MCR fFLX FLX>CS1:/RT/ZE ZERC CNLY CCU. FLX>CS1:/RT/XX = {T0)} = OQUT EXISTI:NG : DIRECTORY CN TAPE (QPTIOMNAL) LIST DIRECTIORY (QPTIOMAL) (devicelfilenare.ext/RS <CR> FLX>CS1:/RRT/LI XX CONES, ‘ {FRO4} I» = TAAGE MODE DE = DELETE THE (zXE,ULB,SML,SYS,JLb,TSK) F8 = FORMATTED BIMARY FA = FORMATTED ASCII CO = RS = RT = CONTIGUOUS FIL= TO DISK (FIL=ZS COGmMING FROM DISK TC TAPE ARE ALAAYS CONTIGUCUS) RS=11 FORMAT (SYSTEM) RT=11 FORMAT (TAPE) SPFCIFIEC FILS (0BJ,ST3,3IN,LTCA) (ALL DOTHSR . EXTENSIGNS) FLX>*Y -3 TO CCPY FROM TUSE TO DISX (RKO07) ------------.-,.----------------- $ RUN SYSSSYSTFM:SYSGEN SYSGEN>DCONNECT CONSQOLE SYSGEND>EXIT $ MOUNT CS1:/FOREIGN $ SET DEFAULT [SYSMAINT] $§ MCR FLX FLX>DM0:/RS/7CO=CS1:filename.ext/RT {TD) {FROM)} FLX> “Y S AS SAME $ NCTZ: VAB.FEXE RE3UILD TO SET ASQVF COPY DEF PPOCSEDURE wUT [SY3FXE]) AHEN USING FILEX UNDFR (DBU) ¥AY 0T 45 |ECLIGNIZED VERSICN NAVMES 1493THAD 1IF DEVICE 3.X SIHCF NAES. V43, TiF vERSIOH DIVICT 3.X osFOUTJRATELY xNzZwC; I1CS LIKES LOGICAL FILEX LCES OT LIKE LIGICAL SA1ES. SIT4sRk S&T YJUR SC... TO AVIID e 3wy UEVICE ZRR0ES YCu »UST UEFAULT T THE CuwFECT SIPSCTIRY FIRST Abi o«IT THE SPEC, OESTIMALDION SXAMPLE S $ SET $ %C FLX> OR.,.. BE SURE EXAMPLF ¢ TO FLX> BEF SYSSMAISNTE 4ALCE FLX CS1:/RT=FILEHANE J£XT/RS USE THE FULL FILESPEC e ——————. F e e n L) My REDIJIREL BY VERSION CSI:/RT=DP03[SYSO.SYS%AIVP]FILRNAME.EXI/RS 106 L AS UVfl&.EYE W OTTE 3 1 $ Target MCR BOOTRLOCK 2 GEED T GuE CHED = i Y i & A AN —i ] 107 CUED CEND SUNS HEm COBS GMER THPe Gnen Sl EAS Shie CHN Mo MR G-t ON SLAS SIU SOSS TAFE STES SULE IUH oER TSCL OR SN UM SORR DISK S0s SORS RSO SevP seme WRITEROOQT Enter Szstem Device (and bootfile VEN to Boot File (default is Enter Lozd Address {(defsult if not VMB.EXE)...! 1)...! 1 or 2 iz 200) DDCU = sses 10000 or 200 DIDCUIfilerzme.ext or COOO0 $ DEVICE NAME. CONTROLLER -ANLD-UNIT (CSA1:,IIMADLs LEVEL THE 4 VAX FROGRAM MOTE: TO DIAGNOSTICS 11/7530 HAS NAME AND MONITORS ARE FOUR BOOTAELE FROGRAMS VEN LOADl 2 2 200 200 EC3AA.EXE 2 100600 ROOTSS.EXE 1 CO00 RERUILD A BOOTERLOCK NaAME (DDCUI)Y NOTE: WHEN USING (DDCU)Y NAMES ERRORS THE MAY LONG NOT BE OF MUST SYSTEM 3 UNDER AT ROOTARLE THIS FROGRAMS TIME... DESCRIFTION A HARDICORE TE AND CACHE DIAGNOSTIC BOOTSS8 DISK», # - SIMFLY . SUFERVISOR MONWNITOR SFECIFY THE <CR:x’S VERSION RECOGNIZED SIMCE 3.X VM5, VERSION THE 3.X DEVICE BE DIALOGUE EXAMFLE? THE STRIKE WRITERCOT INSTEAD YOU ON ANI ONLY ADDRESS EVURKAA.EXE ECKRAL .EXE DISK’S THE ETC.) DEVICE LIKES MNEMONICS - LOGICAL NAMES, S0... TO AVOID UMKMOWN DEVICE SURE TO USE THE CORRECT LOGICAL NAME 0OR USE FOR THE DEVICE AND DIRECTORY SFECS. DRAOICSYSOJ.SYSMAINTIFILENAME . EXT 108 REVCON 109 BACKPLAxE WIRLNG S3LOT REVISION INITIAL wike REGISTErR SECTION 39 « .« 40 41 . . 42 43 . WwRAP - 45 . 46 47 - 48 BIT REV, N - O REV. HAROWARE AAKONARE REV, W nARDAARE 49 S0 51 52 S3 54 55 56 S7T « o« 58 59 « .« 60 61 . o 62 ARE GRAOUND ‘ BREAKDOwWN oesesooeeseese PIN 56 55 5S¢4 S3 S0 49 48 46 . 3IT 0 1 2 3 4 5 ) 7 3E 00 IPR 3w ol REMOVE JUMPER 53«55 (FLJATS 3IT 1 HI) IPR sc AND RE-INSTALL vU®PER S4=56 (S5RJUNDS BIT G) REAOVE JUMPER 54=56 AND 53=55 IPKk 3e& 02 JU4PERS INSTALLED JUMPER 31TS 54=56 0 AND (FLOATS BIT 1) sTC, On PlIwnS IPR ALL »REMQVE (FLGOATS PUSH <7:9> 44 JUMPERS REV, 3& 3 JUMPERS HakDAARE IPR 44,51,52 44=36 S1=53 S2-54 pUSH OnN 46=48 49-51 S0=22 53=55 54-56 4 310 JUMPERS w - O FUrR JUMPER PART NUMBER = 12-=14314=0V O nI) 03 : 110 ai:g: ' 8/1/93 . CSSE VW01=-1/C0S 11/750 REVISION CONTROL DOCUMENT | | | I | | |vecvasvoccccccccaconea | o o « . Added compatibility chart (1.1) Added Kernal ID Register and SID Switeh Info Revised and updated 11750 Kernal Rev history o Added o Updated = Rev B and Rev MS750=CA {nfo C backplane memory on all option options TABLE OF compatibility info (3.0) (4.0) info | (5,2) i (5.0) ] CONTENTS Page i,0 INTRODUCTION cceescvecscoessssnccnsosnscsancne 1.1 11/750 2.0 REVISION 3,0 117750 3.1 3.2 3,3 KEgNAL VU B WA - b > B S B 3 Electrical Reguirements Imstallation Procedures SID Register Problenm Microcode Revision KERNAL REVISION HISTORYeeevoossvesccecs 8 KA750 Module Revision Charts KA750=00 Revision Summary (LR) KA750=01 KA750-02 KA750=03 XA750+-38 Revision Revision Summary Sumrary Revision Sumrary Summary Revision (VAX750=M=0001) (VAX7S5S0=R=0002) (VAX750-R=0003) : ' L4 ° WwN ° - OPTION REVISION CONTROL:eeseccocscosocencesesls US750=AA 48750=CA RH7S0 FP750 © KU7S0 WU |J ° ® S S.0 REVISION CONTROL.csoseoscssvenece 3 Kernal ID Register H/W Rev Level Input Device (SID Switch Pack) 11/750 i 4,0 2 Compatibility Chart CRITERIAcccescscocsvcsoscnssccectsnsne 3.,1.1 3.1,2 maanutioy v n Uodates: DW7S0 DR7S0 111 INTRODUCTION - This document is intended to define the revision history of the VAX 117750 system for purposes of i{dentifyirg the compatible diagnostics, ¢irmware, and operating system software, (All references to the 11750 aocply to the 11751 as well, unless otherwise noted,) This document will be updated on a quarterly basis and released to nicrofiche in the VAX Library Update and the Speed Bulletin, The following VAX LIBRARY CARDS will be reguired as reference to the revision control ©lan, This document will state the source of information necessary for understanding firmware, diagnostic, and system software compatibility, INITIAL STARTING DOCUMENTATION DESCRIPTION DOCUMENT ......--..------.-..-----..-..---.-—--‘--.-.-.-----..-..--.-----..’--. - 2Z-EVYNDX=W,0 - VAX Diagnestic Index ZZ=-ECOAB=1,0 VAX 11/750 Control Store 22=-ECOAD=-1,0 VAX 117750 Boot Rom Listing Microcode CMTOS0 Listing TUSS8 RKO7 RLO2 --‘-.-.-.....---..-.--...-.......-.-.-...-.-...-.-.......-......---.-f 1,1 117750 COMPATIBILITY CHART The ¢ollowing chart sumparizes the compatible hardware, sottware; sisreocode and diagnostic revision levels for each Kernal revision, For information concerning the module revisions for eech cption revision, see Section 5,0, 11750 KERNAL REV WITH SID | .00 | 10 | 20 130/38 | 11750 KERNAL REV w/0QUT SIDI 00 | 01 | 02 | 03 03 Of | | | | l o ©01 I | | | [V « 7 IVe T (IVeT |Ve=17]1 | ! | | i | 00 00 | | 0t 00 I | 02 00 | 1 | e | = 1 00 | | e 4 = - FPIS0 - - - S EE KU7S0 SR oR750 S nd750 = - oox: ¢+ pvabx) L aziease: “IZ33293E: ¢ | | | KA750 MST50=AA . i | i RHISO 06X | | | | | 4/d Jptions: ¥S750=CA 535X 4Xx 1 = | | = R | = & = | 1 | | | | | | | -0 014 = 4 U D R RS T S DR IR D S I 2.X 1 2.X 1 2.X 12.%X,3 | | | | 050 | 052 1 062 | 094 | | | CZhe=¢ VAX Diagnostic Evaluations (distributed {n the Speed BulletS €ar sucs that exist in a particular diacnostic release. | | | i Y REVISION Cables, CRITERIA power Should Subsystems, not cause revision hist ory 2 ventilatioen for a eqflipment. OF me chanical desi to the kernal gn revision levei, The VAX 11/750 particular Su bsysten OF opti on will be de sige change OPTION=XXN where, OPTION tional {s change change to the five letter description the code neumonic (4{.e, (1,2 01), ana Non=functional changes option, KA750), N is a XX is a fyne non=functional option include relayout of mo to an dules teo elim inate rework wires or change ation that do s to document net affect oper e ation of the sy Part numbers sten, Changes at the module to purechase level should NOt cause th to be rajses e hardware re either, Funect vision ional changes to any of the Kernal subsyste modules in the m (1.2, KA7S0 CP U an d MS750) tncremen revision, as ts each module well as the ke rnal revisien, a brady marker indicating under Pack be ECO control, setting ECOd and (L.,e, tne SID registers, * . - . VAX the is the register the to switch 11/7%0 pack sID . - - Telister consele processor System to Known decide type zodes ¢ tySe DOES an ECO that changes revision), settinqs‘added . contain a store because VAX intercep t the (SID). terminal bytes, code ¥hich Are s kernal control dllustrates shows there the the (See tne document Section switeh wili 3.1 for are,,, - figure 2} identiticatisn and when These L Code that change nevw - The seo a tyoe listed 3 11/7so ECO’d tnrough of uses by below, vaX the location s, is FPLA to . rp “Xx3f, functional., the This have-the 11/750 systenm 4ccessible to rae address are Frocessor DOt e s current revision, aicrocod IPR wnich describing does format of the Thnis register byte of field ricrocode diagnosties software Examination The s and of high byte coerating Operating on, 113 PROCESSOR undefined VAX 1177890 VAX 117750 TYPE CODE BYTE 00000000 00000001 00000010 VAX 11/730 00000011 Byte 2 of the SID register is always.zZero, Byte 1 of the SID register {s the microcode revision of the control store, This number is generated by the microprogrammer in the REV750,MIC file of the microcode 1isting ECOAB, There {s a MICRDO2 assembler directive called «SET/MICROREV=version at the too of the page which is upgraded for eacnh major assembly of the the microcode, In the MFPR microinstruction flows this equated value §s supstituted into the short literal £{eld of the microinstruction and becomes the microcode revision that appears in byte § of the SID register, The number following MICROREV is DECIMAL. You must convert the hex byte to decimal after examining the SID regByte 0 of tne SID register is the hardware revision of the ister. kernal., The hardware revision s programmable on tnhe CPU backplane, There {s a 74LS244 tri-state driver on the UBI module that interfaces to the CPU WBUS, The MFPR microinstruction £lows read this byte when referencing the SID register, At Limited Release (LR) this byte should pe 00, That means all the bits are arounded on the CPU backplane, (See e Electrical Regquirements of Kernal Revision Level Input Section Device.,) Each hardware change that changes the functionality of the hardware will INCREMENT the hardware revision by one, The number in byte 0 of the SID register i{s a BINARY revision level programmed on the SID input device, SID REGISTER FORMAT IPR ADDRESS ~X3E f +-.-.-.-----?---.#--.-..--..-..--?.--..-..----.-n*-----.-.----...¢ | ‘ | | | 00000010 | 00000000 I | | | 00110010 | I | 00000000 ! | I ’.--..-.--.c-.-.-*.--...-.-o.-.-.Q.-...-..--.-.-.#.-.-.---.---.--+ TYPE CODE = 2 MUST BE O Figure NITE! 2«1 MICRGCODE REYV = GL This example shows the type code as - - o4 2 (VAX 11/750), HARDWARE REV z 2 Microcode rev- {sion is 32 hex or S0 decimal, and the hardware revision level is equal to zerd zero. Kernal Identification Register Hardware Revision Level Input Device Description The Hardware revision level of the kernal that {s visibdle {n byte 0 of the SID register {s generated by a 16 pin DIP 8 sincle=pole single-throwv switcnes _gwitchpack consisting of that grouns or open SID dits <716> to produce & pinary number corresponding to the kernal revision level, Each dbit of pvte 0 of tne SID {s pulled yop to +5V through a resistor contained {in a 14 oi{n DIP pulle-up resistor rackegqe, 114 The Kernal Rev Level Input device (s manufactured usin3y a . 1.6" X 2,6" standard size fingerless board that has an edge mounted 40 pin AMP connector to oress on the backolane of the system on slot 4, There are 2 ICs on this device, they are the DIP switchepack assembly and -DIP pull=up resistor package, This SID switch, part number < -2222227 > is manufactured with shelf items listed below, Kernal Hardware Revision Level Input Device Parts List - Description 1 40 pin edge connector DIP rockereswitch 8. sw DIP 4,.,7K terminateor PC board 1.6 X 2,6" Housing backplane conn 1 1 1 1 3.1.1 DEC PN Qty. 12«11620-00 12-11164-04 13«00005«00 $0=-15141=00 12-16821=00 Electrical Reguirements of the Kernal Revision Level Input Device The kernal revision level {nput device requires +5V and ground to operate prooerly. The input signals SYS ID <7:0> H must also be interfaced to the input device, The electrical connection is made via the 40 pin AMP connecter that is oressed on the backplane., The following list describes signal locations on the backplane A signal with & dash "= implies a no connect and AMP connector., to the input device, GND - K M P S u W 27 29 31 33 3S 37 ) SYS ID 3 H. SYS ID 1 H - St s3 - -. "UU - 55 s7 - .- 8 - F - L N R T v X - 26 J - - Z 42 44 46 48 BB DD FF JJ SYS ID 7 H SYS IC 6 H $2 X NN RR - "SYS ID 2 H LL 50 49 MM PP 88 : Signal o) 40 39 AMP pin 22 28 30 32 34 36 38 41 43 45 47 KX 20 24 25 AA ccC EE HH SYS ID S H « 23 Y - - f E H - 400Bxx 21 C - - 19 A - .. 117750 Backplane AMP pin Signal 56 53 " TT ¥V SYS 1ID 4 H . "SYS ID O H T esY Power consurTption with all switches closed is acproximately equal t= 42 milliwatts, 115 1.2 Ker nal 1. 2. Revision Level Remove primary position, 4, Installation the by from system Procedure turninag CB1l te OFF plate by loosening 4 screws and lifting of¢g, Install the Backplane Connector Housing (12=-16821) on slot 4 of the CPU backplane so that the blind holes at each end of the connector cover pins B40017, B40018 on top, and B40059 and B40060 on the bottom, Set the bdbinary revision level on the switch to desired'number (see tadble two page Exanple {s for: SYS ID - NQTE: power Device Open rear door of the VAX 11750 and remove the backplane cover 3. Input <7> SWITCH 3) according the Hardware <6> S8 ON to <S> S7 OoN S6 OFF - following revision <4> <3> 88 ON level <2> Sé ON example,... S3 ON 20 Hex <1> <0> 52 ON St ON Early SID switeh modules'have the switch pack reversed, Use etched bit position switeh positions marked on on board for switch reference, pack. Disregard When the switch is ON, ground is connected to the input of the 74LS244 on the L0004 (UBI) module producing a "0" data bit in byte 0 of the SID register, If the switch {s OFF the current oath i{s removed and the inputs teo the 74LS5244 pulled up to +5V causing a "i" tc be generated in the bit position, Se Install the Kernal Rev connector housing with rignt the 7. side of the VAX are that Level Input Device in the backplane component side (Side 1) f£acing the 11750 CPU cabinet rear), (wnen viewed from ’ Secure backplane cover blate and rear and set the POWER QN ACTION switch to ON position, 4oor of the VAX 117750 HALT, Turn CBY to the Verify examining ister tne in hardware console >>>E/TI ) revision mode by level by typing...(at the the SID rege console) 3E<KCR> .1 O0O00C0O003E 02003E20 This example sgoQE a'Ker;alAtnat has CMT062 microéodé and a hardware revision of 20, {See Tables 1 and 2 on next page). 116 The following diagram show what the switch pack actually looks lixe; the section containing the bits that must be set is depicted in a larger scale at the right, $oocsvcsascveconnsd SYS ID i ’.' | wi | ‘.C éocmovenes 112345678 | - toccccccss I =E | = | = ! ! | | 5015141A bocscacensd ‘ | ! X T P | = | = = YT TT YT Y X ¥ | = YT YT Y | U ¢+= | i 5415142 IDIGITAL Y Y IRES PAK | SIDE 0 1 2 3 4 6°'S F F : REG BIT POSITION <= ETCHED ON BOARD 1l 3 2 3 4 s () 7 8 |I<. SWITCH NUMBER STAMPED ON '---d--.-.--....-....é.--| B0 e b b b v b 1l T T T T T N B B I (R I AR RN N SWITCHePAK - éccccncsccsonaasconacascavd | boveccccnny ! ) o §o.-..--....--?-.--.--...¢ | LiI1iientd | | l l 765‘3210 97 OFF = | t 1 1 {vocosssossovoonnePp TABLE 2 Hardware Revision Identifier : TABLE 1§ Field r ldentifie Microcode XXXXYYYY " 00110000 = ' = CMTO0S0 00110010 = 32 = CMTOS52 001311110 = 3E = CMTO062 01011110 = SE = C4T094 3.2 ’ | | [ | ARANTITY 00000000 = Kernal Rev 00 | 00111000 = Kernal Rev 38 | 00010000 = Kernal Rev 10 | 00100000 = Kernal Rev 20 | 00110000 = Kernal Rev 30 | S1D, Register Hardware Revision Problem The current design of the SID register hardware revision byte 0, has an 8 bit 74LS244 triestate driver chip interfaced to the bdbackplane, The cnip inputs are not inverted in the driver and are not pulled up either. so the resultant data with SID register byte 0 not programmed l1s FF. S{inece the inputs just "floats" at times the output may not always be FF This is a problem when running the DIAGNOSTIC SUPERVISCR, The supere visor "forgets" where it came from and the program data must be enter= ed manually to Jet the supervisor to "remember" where {t canme fronm, the This is time consuming, especially 1f the £ield engineer aust powerex= (s machine up and down to replace modules, The result is the MTIR LO, but or HI wired be must er to repair the machine, The regist tended be must supply power CPU wiring the bits HI is another problem, The 4 fails by sherting connected to the chip innuts directly., If the 741524 open, but if not, byrn vwill chip the lly the input pin to ground, hopefu +SV throuah a other damage could result, There shouid be a pulled up regist er switc” SID The pins., ane backpl unused l 1K resistor to severa B of pack and pullieup asserdly attaches 8CTOSS siots 3 and 4 section PC toard ani will protrude tnrougn the tne backplane, 3ack plane pins socket that {is easily grasced with 8 atns 3sed will have a female scope prode, 117 hicrocode Revision History - A comorehensive revision nistory of VAX 11/750 microcode is contained {n the microcode listing in the VAX LIBRARY £iche set, Revision W of the VAX LIBRARY contains the microcode listing for controcl store vers sion CMT0SO0, Since there have been numerous changes to the miecrocode since version CMTO050, it {s suggested that you read the microcode reve ision history contained in the REV7IS50,MIC £ile of the microcode list= ing., Changes to the VAX 11/750 microcode AFTER CHMT062 will be described briefly in this document and what the symotoms and corrective actions were, - 4,0 - 11/750 KERNAL REVISION HISTORY Listed below is the revision history of the 11750 kernal, the compatible module revisions for each hardware module revisions are separated by commas, This history nas been separated into twe charts: Chart § « 11/750 with a Rey "B" Chart 2 = SID Switch 11/750 SID KA750 Module Revision Charts Setting with Switch CHART a Rey Setting = indicating revision, Egquivalent ) backplane xXxxxXxXX0=7 "C" packplane = XXXXXXX2=F 1 11750 KERNAL REV WITH SID | 0;..-7..10 I 20 | 30 | 4Xx | SX | 11750 KERWAL REV w/OUT SIDI 00 1 O1 | 02 1| 03 1 I | “wooULE 1 swoT 1 01 TTLoco2z 12 4B te te reo 11y TTLeoos 13 1B ie tem o ren 11 TTLooos 1 4 UE U F U R LR 1T TTLocos 1 s 1o tE 4 F w01 TTLoots 1 10 1o 1o a0 ao a1 TTLoote 1 10 U aA Uwa LA LeA 41 TWerze . 1 1118 . 1e dec dec aec 11 1 TTReI13 1 28 a-B . LA 1A L AB LAB 11 Cluss 1 ustaus T F . UF 0P dF 11 TTruss 1 e 1B ie te s 1 1 CTeawr smert 1c de de e a0 B S ¥ = LR Release 118 CHART 2 11750 KERMNAL REV WITH SID | OO ! 10 | 20 |} 38 | 11750 KERNAL REV W/0UT SIDI ©00° t 0%t | 02 | 03 | 1 | o SLOT | MODULE 4x l | 5Xx | | ! ! | I | | .-'-.-.--..---.--.--.-.---.-...--..----..-.-..-......-.-......----.... - | B 1 ¢ I ¢ | ¢,0 |- | B | C I ¢0 1 C,D I | | 4 | E | F | H,d 1 H,J0 | i ! | S I D | E | F | H | | | Lo01i1 | 10 it D | D | D I N/A | 1 L0016 I 10 I #,A | *,A | =,A | ¥,A | I i M8728 | 11-i8 A - I C | C | C | | ! M8750 I 1ie-18 | N/A I NJA | N/A | N/A | i | L0002 | 2 L0003 | 3. L0004 | L000S | S - | - { ! Aa,8 | A,B | I A 4 A | 28 AeB Me313 tei| ein int tor tt iie edu b it e rtstatietdet TUSS | UNI BUS | F | F | F | F i | TUSS8 | CON | B | B | B I B | ! CONT PANEL | C I € I C I C | | BACKPLANE I C I C i C { C | ] | ' | | The L0011 or the L0016 controllers are valid for hardware revision the 00,01 (10) and 02 (20): however, these revisions will not suoport on MS750=CA memory ootion, The minimum accedtable revision £for inclusi n (Sectio chart option A MS750=C See 48, Rev e hardwar of the MS750=CA {s §,2) 4,2 for reguirenents, KA7S50-00 REVISION SUMMARY This is the initial introduction cof revision control on the *+ 11750 and represents the minimum module revision levels at FCS = - ;chooer 1980, B - + Compatible Revision Levels: <« CMTOSO, . micrascode version at FCS . VAX/V¥S version at FCS = 2.0, . Diagnscstics ~yrrent Diagnostic Release (s V, Refer to EVNDX and tions for each Diagnostlic Tes the VAX Diagnostic Evalua pelaey Smer mammatini{liey meamlagwe ----- frwmeoe Cmmms DYt 119 3E I >>>E/1 Quick Chetck = >>> 0000003E 02003200 ’ SID Register Switch Pack Setting = Set bits O to 7 td the 0N poesition 7 6 5 4 3 2 1 FI131 2 3 4 5 6 7 o F 8 |<== $ocvcoccscssoncsnsasswndand REG BIT POSITION ETCHED ON BOARD <K== 0 (Seg.nelow) SWITCH NUMBER STAMPED O ‘.------.a.-----..--.----' SWITCH PACK - tiotio1otioitolioriontott FINFINIINLINDINDINDINTINT $ocvesscscscsecsoccsocsaaveasnyd 4,3 KA7S50=01/Ka750=10 REVISION SUMMARY % This represents VAX750-M=0001 FCO = began shipping £from manufacturing 1271780, Fileld implementation began 3/8%, This FCO combines a microcode change and a hardware cnange to tnhne L0003, L0004, and LOOOS Modules, The CPU backplane is also modified, The following ECOs are incorporated,.. LO003=TWO0OL L0004=TW003 LO00S=TW002 70=16486=TW001 This FCO was i{mplemented to innhibit the possible interruption of an instruction that references the Unibus address space performing a DATIP, 1f the instruction is faulted because of a TB miss and external interrupts are pending, the Unibus {s hung until the DATOB 1s done after the microcode completes the translation., The following instruction would cause this possible . conflict: ADDY3 #12, physical translation to @#“XFFFF20 Part of this FCD also connects some signals £rom the CPU to the FPA (slot 1 to slcot 2) for FPA interfacing and also the drawing set of the FPA s modified for signal name contine uity. Conpatible Revision Levels: . Microcode = C¥T0S52- . to 2.0 VAX/VMS Version 2.2 = bickfiards compatible 120 ’ Diagnostics Current EVNDX release is W, The follbwing diagnostic Acompatibility problems have been identified: ECKAX = Test f£ails MACHINE CHECK TEST 7 with optional - WCS module installed, Diagnostic Bug. EVKAS = Intermittant failures on the CVIPL and other instructions, Absence of posteprocess CLKX bit? ECKAC = 4,0 or higher will fail test 7C 1: this FCO {s missing, ECKAM « {,2 f£fails with 8 arrsy boards present, Refer to EVNDX and the VAX Diagnostic Evaluations for each Diagnostic release (see Speed Bulletins) £or 1ncomnat1b111ties. * Quick Checx A, >>>E/I 3E I 0000003E 02003401 (w/out SID) I 0000003E 02003410 (with SID) 23> >>> B, Inspect L0003 module and look for a 7427 in chip position El, Also inspect the backplane assembly iook for a wire from i00B10 ‘to 200810 (MEM STALL SID Register Switch Pack Setting = Set bits 0 to 3 and S to 7 to set bit 4 ) REG BIT the ON position; to OFF position POSITION ETCHED ON BOARD 7 6 5 4 3 2 1 0 <== Fl1 2 3 4 S 6 7 8 I<== SWITCH NUMBER STAMPED 0 F ¢ovonscvecweccsoencccsscsvasnd l.--.-.-.-----o---.--.o..' ON SWITCH LIOTE31IdtIaliotiotiotiont FINFINFINVIFLINDINDINLINGY N A R AN {movoncvescvaccecconenvsnd (OFF = 1) PACK 121 KATS0=02/KA750=20 REVISION SUMMARY % This represents VAX750-4«0002 FCO, Filelld impleanentation began 6/8¢, M¥Mfa, began shipping 3/30/8%, This FCO corrects a large collection of problems in the microcode and hardware, The following ECDs are incorporated, There '4{s the possibility of Unexepected System Service Exceptions caused by the CON gate array that {s fixed with the . ECO to L0004 module, : LOOO0OS~-TWQ03 L0004=Tw004 Some systems in the ~ ECO when the FCO is ¢ield may have implemented, L0004 ECO without the Co@patibie Revision Levels: - . Microcode = CMT062 (replaces CMT052)., R VAX/V¥S . Di{agnostics £ile for Version 2.2 L000S a = 1ist of all backwards Refer to REVIS50.MIC £i{xes to compatible the to microcode, 2,0 Current EVNDX Release {s Y, The following problenms exist are in the uporade to CMT062 as far as 2iagnostics concerned: - ECKAL 2,0 Fails at PC S5N00FFF! ? Microcode chanje makes it impossible to force a TB Miss in both groups 9f the T8, Diagnostic attempted to read and write the T8DR which now causes a reserved operand fault, Fails a at TEST reserved i, The operand diacnostic fault when expects accessing IPR “X3F and it does not occur, This s becayse of the addition of the IPR *X3E which is called TBCHK, It allows the programmer to probe the TB at a VA and then branch on the state of the PSL VBIT indicating a TB hit, Diagnostie bug. " "ECXAX - 1,2 to 3.2 Fails at TEST yle., a ECXAN WCS 7 Diagnostic locaticrn tic bug. 1,2 Diagnostic does i _ with optional forces a with bad not worx KU750 machine paritv, mode check {n Diagnose prooerly wnen there are 8 arrvay b»oards {nstalled, Dces NOt Tepdrt correctavle errors carrectly. 122 Refer EYNDX to and the each Diagnostic release incompatibilities, Diagnostic Evaluations (see Speed Bulletins) for for . 3E = >>>E/1 Quick Check $ VAX I -0000003FE 02003E02 (W/out switch) I O0O000003E 02003E20 (With Switch) 25> > * SID Switeh Setting - Set SID register switch bit 0 te 4, 6 and 7 to ON position SID register switch bit Set 7 0 6 4 3 2 131 0 oo ¢svcvcvsacossosvsowcscccsscsany FI11 F S 2 3 4 5 6 7 8 |<== |ecacocacencccccoccssvanas| t1onioiiadtiatiolioliotioll TINFINLIFJINVIRIINTINGINDI NN A "TTYI XYY 4,5 Y R R PR X L R Y N LY L X 2 S to OFF position, (See below) REG BIT POSITION ETCHED OnN BOARD SWITCH NUMBER STAMPED ON SWITCH (OFF = PACK 1) 2 . KA750=03/KA750=30 REVISION SUMMARY % M¢g, began shioping 2/22/82: This reoresents VAX750=-R=0003 FCO, £{eld 1nplenentation began Januyary 1982, * This FCO {s based on ECD LO00OS=TWO00S L0004=-Tw004 and corrects interface problems witn the floating point accelerator FP750 wnich began shipping Jan=1982, Also, the layered software product DBMS must have this FCO {in order to operate correctily., This product will report to ooerator if the system does not have this ECO installed, X Compatible Revision levels: . . M{icraocode = CMT094 replaces CMT052 or CMTO062, REV7S0.MIC £ile :he microcede, T VAX/VHS for & 1list ot all Refer - Current version is 2.4 add {s pazkwards ccmpatible to 2,90, to f£ixes to 123 o Diagnostics Current EVNDX release {s 3,0, Refer to EVNDX and the VAX Diagnostic Evaluations for eacn Diagnostic release (see Speed Bulletins) for incompatibilities, Quick Check = Examine the SID register in console mode, >>>E/1 > Inspect part S1D 3E I 0000003E 0200SEO03 I 0000003E 02005E30 the L000S number Switech Set Set 932Fi, module for an IC {n location E27 switch switehn bit positions pit positions § and 7 toe the ON position to the OFF position REG POSITION ON BOARD BIT (K== '- ow .-.-.-..----...-...-.' SWITCH NUMBER STAMPED ON SWITCH PACK 1 o] t1ortdiiattoriotioftiold i N VINLIFHIFLINJINTLINDINGI i e HIFLIFLE b0 b T 1 (OFF= +- | 5 &4 3 2 1 0 -..-..-..--‘.....-.-..* Y 2 the 0 to 3, 4 and 5§ ETCHED 6 with Setting K(e= 7 “©110 L 3 4 S 6 7 8 #-.-----.-.---.-.-...---.* 1) teb KA750«38 REVISION SUMMARY 124 This represents VAX ECD 7016486=Tw002, which brings tne backplane rev to C, Manufacturing began shipoing 6/1/82, This ECO does not increase the hardware revision on the & ' kernal, . ECO was done to expand the backplane addressing capapilities ¥ to support the optional 1 megabyte memory array systenm, SYS ID Switen has been installed by manufacturing on all Rev C L This switch identifies both the kernal rev and backplanes, the backplane -addressing capanilities, Rev C backplane = last two hex digits will be reversed when the SID switeh s installeld, Last digit i{s used to indicate the backplane rev, ({,e., 8 = C backplane; 0 = B backplane) Set switcn bit positions 0 to 2, 6 and 7 to-the ON position, Set switeh ait_positions 3 to S to the OFF position, REG BIT POSITION ETCHED ON BOARD <e== 7 6 S 4 3 2 1 0 FJl1i 2 3 4 5 6 7 8 i<== SWITCH NUMBER STAMPED 0 4vccescovoccossraccacnssed F l----o--.-..---.-...'-----' ON SWITCH PACK 1101101101101 1011011011011 FINPINVIELIFLIFLINDIREINT b8 BIFLIFRIRIL (OFF= 1) 10 1L ¢mevocrosscaccvocanRTevewd S¢9 OPTION REVISION CONTROL The option interfaces and adaptors will nave a separate revision hi{story from the CPU, The KA750 CPU Kernal subsystem will include the following i{ntegral sudsystems, KA7S0 CPU : . 70=16486 CPU Backplane Asenbly §4=13489 M9313. -. TUS8 Tape Controller Unit UET Unibus Terainator/ . I ‘ L0011 MS750<=AA MB728 S 4S750=CA DPM Module MIC Module UBI MTModule CCS Module Tape Drive Unit L0002 L0003 L0004 L000S TUS8=XA L0016 MB87S50 ME728 ) Exerciser CuC Module 256KB array board Cantroller i¥3 array boarsd 256K3 array board 125 OFTION RH7S50 L0007 MBA Module KUT50-YG 5413865-C Add on dauanter boars PRS0 Loodt Fea woaule OW7S0 L0010 . 2nd Unibus Module SE;ES"""""';SSIZ""""'"2322;3222:;QZE'Z?E';;;;Ie ....-.....--.......--..-_..--.......--..---...------.-.-‘.-----. The internal options of the 11750, with the exception ot the MS750=AA and MS750=CA, will be tracked at the unit revision level only. 7This means that a functional change to the RH750, DwW750, FP750 and KU750 will not increment the kernal revision level, Each option revision summary will indicate any hardware, operating system, diagnostic and microcode constraints, The option will be considered compatible with the kernal hardware, VMS and microcode revisions used during the development of the opticen, Earlier compatible revisions will be noted only {f they have been tested and proven Pertinent revision, to diagnostics toc be if any) will also MS750=AA MS750=AA work, OPTION REVISION Revision I 00 Tweoune 1 oswaT- 1 Twootr 1 10 1o run for each be noted, option (and the required | | 04 | DESCRIPTION 1 ©O0% | 02 03 .05 1 L 0T 4o 4 T Twoots 1 10 LA twa 1T Twer2s ) tiets 1e e 10T TBACKPLANE 7T0-16486 18 1€ | 1 11 MS7S0AA=Q0 REVISION SUMMARY ¥ Creatiosn date {s October 1980, * This i{s the inftial Antroduction of revision»cofittol on the= . % MS75%=AA FCs., - Note tnat and represents the only minimur module revision : LOO11 memory controllers that the L0016 controller, wnich will the new 482757 memory arrays and will can also be used in a rRev 00 machine, levels at IR shiooed at support both be availaple FCS, Note the ¥8728 and in Q1FYS53, 126 ¥ Shortly after FCS, VAX7S50=-M=000{ was done which i{increased the Rev ot the backplane from A to B, Only 27 machines were shipoed with "A" backplanes, MS7SOAA=01 REVISION SUMMARY x Creation date July 82. * New revision of the backplane is introduced to increase the ¥ The LOO16 is Qot valid for Revision 01 « that combination (LOO:G addressing capabilities, and Rev C backolane) {s a new option designation = 4S750=CA (See below), ¥ The M8750 memory array will not function in an MS750=AA option ¥ Diagnostics = ECXAC and ECKAM,- Run ECKAC f£irst; run ECKAM in contiguration, | QUICK VERIFY MS750=CA mode, OPTION REVISION DESCRIPTION _MS750=CA Revision T ) | Y S 06 | 01 R | 02 1 A 03 | 04 A | 05 | Y YT T TReere 110 AT A e P T S N R R A T TTEACKPLANE 70-16488 1€ 1A 111 MS750CA=00 REVISION SUMMARY + Creation date = projected August 1982, ¥ This i{s the initial introduction of revision control for the MS750«CA and represents the minimum revision levels required for ch of tnis option = July 1982. - -é‘.'uote that the L0011 cannot be used 1n this oetion. ¥ Any mixture of M8728 and 48750 arrays will function. 3 howsever, #8750 arrays must occupy the slots adjacent to the LOO16 controller, starting with siot 1i, 127 % This option requires VMS V 3,0 or higher. * Minimum x Diagnostics Run 5.3 ECKAC kernal = ECKAC ECKAM f£irst:; rev Revision run 00 | L0007 | 7,8 6r 9 | A REVISION in 6,2) 2 4) this option = EVNDX QUICK VERIFY 7o is 48, (July 1982) mode, DESCRIPTION MODULE RH750=00 support rev, rev, ECKAM { SLOT to (min, (min, OPTION REVISION RH750 RH750 11750 § | o001 | 02 | 03 | 04 | 0S5 ! | | | | | Al,B | | [ L SUMMARY $ Creation * This reoresents the initial introduction of revision control ¥ Diagnostics for the date {s FCS = April the RH7S0 and represents L0007 module at FCS, RH750«01f = REVISION ECCAA and Creation 4 Represents RH7S50-R-0001 to problem of x ¥ . date {s £ix the 198, the minimum revision level for EVRAA, SUMMARY X Replace | 23-909A9 October, at 1981, FCO, data which consisted lates location E12 on nultiple with of ECO MASSBUS 23=969A9, LOOO7=TW002 systems, FCO done on "C" etch modules only, Ettech Revision "D", Module Rev "B" {5 a relaycut of the L0007 moduyle and is eguivalent to Etch Rev "C", Module Rev "Al", Diagnostics = ECCAA and EVRAA, v 128 & OPTION REVISION DESCRIPTION FP7S0 MODULE | SLOT | Loo0O!L | 1 i FP750=00 ©O01 | 00 I} FP750 Revision 02 | I R I C B 05 | | [ ! | | | | | | REVISION SUMMARY - Creation date is FCS = December 1981, * 04 | 03 ¢ o This represents the minimum module revision level required at FCsS, ¥ 11750 kernal rev must be at Rev 3 (Rev 94 microcode reauired)., ¢ Dilagnostics = ECKAB (min. reve 7.2) = EVNDX 4.0 (Jan 1982) EVKAB (min, rev. 2.,5) EVKAC FP750=01 (min, rev, 4.0) " = ) - REVISIJON SUMMARY ¥ Creation date is narcn,1981. % Represents FP750=R=0001 FCO consisting of ECO L0001-IW002, which g¢ixes the prodblem of the FPA not powering up "enabled”" duye to : incomplete initfalization of circuitry, Diagnostics = ECKAB (min, rev. 7,2) = EVNDX 4,0 (Jan 1982) + ESCAA rev, 6.,4) (min, " = . " EVKAB (min. rev, 2,5) = EVKAC (min, rev, 4,0) = KU750 OPTION REVISION DESCRIPTION | KUu750 Revision MODULE .5413855-C| attaches | | “ito LOOOS - . - . 01 € B I ! | | SLOT | ¢ o6 I 1 .= 4 062 } 03 | U - - 1 05 | | | R l | | 1 04 _ - | 129 REVISION SUMMARY KL750=-00 ’ x % xXx ¢ B K X & X X B 32 X ¥ § X J ¥ ryrxr 2 xryrx2x 3 * Creation date b This represents the minimum module revision level required is FCS =« March 82, at FCS. Reguires KU780«YG microcode rev at 2.0 or hignher, Diagnostic = ECKAX = 11750 Cluster Exerciser = EVNDX 7;0 (July 82) (minimum rev 3.4) 546 DW750 OPTION REVISION DW750 Revision MODULE | L0010 l DW750=00 FCS I SLOT REVISION scheduled 11750 kernal x Reguires L Diagnostics | for Version 02 1 03 | 04 | 0S.1| | ! | i | | ! | ! ! | ? 3.0 = ECSAA ECCBA ] J | o rev must be DR750 Revision L0014 0% September REVISION | § SUMMARY OPTION MODULE 00 | X DR750 DESCRIPTION SLOT or = = 1982, 30/38 or hisher, higher, min, min. rev 6,4 = rev 1,3~ EVNDX Release 4,0 (Jan DESCRIPTION 00 | | O ! ! ? I 02 | 03 | 04 | | ! | J | I ! 7,0 (July 0SS I 3 11750 kernal rev must be 40/48 or higher, . ¥ Requires x Diagnostics VvsS Version « | . 3,0, EVDFD « rev 1,0 = EVNDX EVDFE « Rev {,0 EVDFF EVDFG ECDFA e rev 1,0 =« = rev rey 1,0 1,0 ECDOFB = rev §,0 ECSAA = nin rey 6,7 Release | | FCS scheduled for September 1982, . 82) §2) 130 POWER REF -, 2 13- Jl= J2- 147 147 f2s58 { =53 3 3 PANEL = = M £3| . CONTROL - —E 1<) A =] 1 TLc JU_?PERQ p— ¢g : f— pu— oy gum OPTION SLOT BUS GRANTS 1 2 3 4 s 6 ? s s 10 g e ) = - Tuss e c ADM ABSENT P32 - AOOX 60 A0OX AQOX 77 | MATCHPULSE | COOSS ROM 23 | SACLOCK ROM 23 | SAST/SP c00873 OPM DPM oPM MIC DPM 17 17 17 O¢ 17 | MCLOCK | BASE CLOCK | BCLOCK MEM STALL 1 | PMASE 500209 800210 A00590 C00675 300208 ADC273 E ROM PRESENT ? 0 =) c ¢ —3 = =@ H - TEST POINTS 19 HAROWARE REV LEVEL {SYS (D) T PIN S 0 800458 8004 1 2 3 EX 800454 8003 800450 800449 800448 4 5 ] 7 LN J2 U 10 1 3 -~ X=SLOT7.89 = z 5 ADOX 67 8GS ] 8G7 E « AEMOVE JUMPER 8G4 ) > 369 TOSELECT ROM 8 28] 569 CONSOLE BAUD RATE CON 8R /' el t =—"30] o ¢ ;="\_4c7;| ¢ 0] 285V sense v 1] ' s I vitav] \C "LL t ADMMODEM C 2 &V INPUT > o ol o —— ] 1 ] RATE 300 600 1200 2400 A 0 0 1 0 2 0 1 1 0 4800 1 1 19200 0 1 3800 9600 38400 Pin= 0 1 0 1 1 1 ¢ 1 1 1 0 [ W ) 0 o 0 1 [ o 1 1 1 1 1 Y - 1 | COO64S | CODB4S | CO0649 | COOES5D JUMPER | mongq3 | COOBSa | COOSS5) | CO06S2 7O GND r:fl - OPTIO!‘.JSLOTSV er 1 258 - 321} . @TOY ACL@DC Jb= 8= Taa912 131 eJS GRANT Aded Ak UPT1ON ~HEM IWSTALLING SLCT 65 « IS Ad Jefiuls SLUT SECTION A JJMPERS NGT SuwOTS Jdieexd JF 7,8,9 ILJSTALLED. IN A CPTIOW, ALL BG OF SLOT THeE SLOT, EXTENDED ALL 8G HAe£X SECTION JUMPERS MUST oE INSTALLED! JUMPERS MUST BE REMOVED FRO4 THAT SLUT! SLJIT 7 . DESIREU 8 SLatr 60 b5 + 3 . bO 67(:::368 o8 67 [ 67 Lo 68 CEN romrs YUY 59 70 9=y 7V Il « 71 71 o 72 « .« 72 « o+ 72 73:::::!74 nPEg 73:::::74 75 70 75 « 16 75 77 2y 78 ik — L 1T 7 79 79 « 80 19 « « « .« 89 o <« L) . [ o 70 &C 132 ERROR LOGGER 133 EQROR THE 1)e A SET ANy 2). A ERFOR 0OF LUGGER EXECJTIVE RECOKDS PROCESS BUFFERS, DESCRIPTICK COnSISTS ROUTINES RELEVENT CALLED AND OF THE AND THAT THAT DETECT IMTO THE THRZE OF PARIS: EXRRURS AND EVENTS ERROKR LIAG RUFFER AM PERIODICALLY DESCRIPTIIONS STORES USKE RASICALLY IHFORMATION ERPRFMT.EXE TRANSFORMS STANDARD FCPRMAT FILE OKR DISKe. 3). LOG THE FORMATTED RE4PTIZS =SRRIORS INFORM4ATION A PROCESS CALLED SYE.EXE THAT GEHERATES READABLE FRGM THE INFORMATION FORMATTED BY ERRFMT.EXE, THE INTIO A IN A ' RZPGRIS THE EXECUTIVE ROUTINES AND ERRFMT.EXE EUin CONTINUQUSLY ~4THGUT USER INTERVEMTION TU FILL THE BUFFERS WITH RAA DATA IN EVERIY DETECTED =ZRROR AND EVENT, #HEM A BUFFER B8ECOMES FULL OR A PREDETERMINED TIME HAS EXPIRED, THE BUFFEk IS EMPTIED TO A FILE ON DISK, IF A SUDDEN BURST OF ERRCES CCCUR FASTZR THAN THEY CAN 8k FURMATTED AMD STOREND, THEY WILL 8E ASSIGNED A SEQUZANCE NUMNgER AND NO IN THE OTHER THE DATA FILE [SYSERR] CONCERNING WHICH THE CONTAINS DIRECTORY AND EVENT THE IS OR ERROR CALLED ERROR W“ILL BS INFORMATION ERRLOG.SYS. LOGGED, IS CONIAINED Wwrd&ch RU.WING SYL.EXE THE FILR SAQULD BE RENAMED T0 PKEVENT VERSIOd JUMBERS FROM ACCUMULATING. ANY NEW ERRORS ENCOUNTERED bY ERRFMT,SXE «ILL CAUSE . A nkEw ERRLOG.SYS TQ BE CREATED, TO $ SET $ REMAME $ DIR $§ RUN THE DEFAULT SYSSSYSTEM:SYE QUTPUT FILE? FILE? SYE.EXE SYSSDISK:(SYSERR] ERRLOG,.SYS PROGRAM I'IPUT RUN WILL ASK ERRLUG.OLD/WNEW_VERSINY or s SEVERAL #C SYE 9JUESTIOnS: (SPECIFY THFE £XACT FILE TO gExample: ERPLOG.ULD;Z23 Default: ERRLUG.OLD (THIS WILL Example: BE THE END MYFILE inEx Default: SYSSCUTIPULT LP wILL SENMD CUTPUYL 3= RESULT TJ A CImpPIgeD) N< SYr) PRINTcR 134 CPTIOKRS? (SCVERAL DOPTIDLS Default: ROLL=UP A AUICK #ITH NC K RGLL=J? ' K SKIEY o CRYPTIC S STAnDARD SUMMARY GF DETAILS ABUUT CORTAIMS A INCLUOING: CRYPTIC DEVICE ERROERS WITH STANDARD OF TEE SUM GFf DESCRIPTION FAILING ABOUT FACH H)., DEVICE A SEGUEMNCE NUMBER | A TIVME WHEN THE EZRRUR CPU ERROR ERROR HAS REGISTERS BUT AN AND CUMPONENT ERROK ONLY., TdE£ JNHICYHY ASSOCIATED nO EXPLANATION, AND A OF CAUSED LOGGEL WILL +Y“4AT BREAKDCwM THE REGISTEEKS ) DEVICE NAME? CIMDIVIDUAL DEVICE QR <CR> FOR ALL) ) DEVICES: cP Co CPU AND CMI CONFIGURATION ME MEMORY AND sY SYSTEM InFORAATION DMAX DBAX D RK’s ALL etc. DISK M ALL TAPES RP°s CHANGES ALERT A ID BUGCHECKS MT MF UNKNOWN YOU Example: CAN ALSO USE A "=" TO UNKnOwh DEVICE ERRARS DELETF CERTAIM DIVICES =D EVERYTHING BUT DISKS =/CONFIG EVERYTHING BUT MOUNTS AFTEP DATE? BeEFCORE DATE? (DESIPED FIRST (DESIKED LAST XX=YYY*1GZZ DAY £EXxample: HONTH DATE DATE DELTA TIME MIN GSEC SPECIFTED TiPe [HE AN JUTPUT CUMPLETIONMN JUTPUT FlILt,. EJTRY) OF EnNTRY) IF DESIRED 100ths 1¥ YOU DID NOT SPECIFY 24 AUTPUT FILE Jk wILul INSTRUCT YCU T3 ALIGN THE PAFPER ArD YCU QF OISHADUNTS 03:22:00.G0 HRS IF AND XXtXXeXXoXX YEAR 11{=-SEP=1981 SUCCESSFUL IT REGISTERS CUMPLETE DESCRIPTION ARE. WAS JUTPUT OF ENTRY A AND ERROR OR ERRORS CONTENTS DEVICE SRRCRS, HARDWARE C)., D). THE OF #ACHA INDIVIDJAL TYPE EVERY EVERY ' BRIEF FGR THE A). AND CONTAIN AVariigzLues) Options: THE TOTAL WILL EQUAL SOFTWARE EPRRORS. BRIEF Ave RCLL=-UP FILE HESSAGE, R AT DEVICZ, THeE SYE SIRIKE RETIK.I, REVICE, THIS TISE YO Y0UJ SHANILL £DULD FROGRAN RICEIVE 2IsT o= a 135 SDA 136 System Dumoc Analyzer (SLA) Thnis text is intended a systen crash. It is of the SDA, Procurerent to demonstrate how to oroc're a not intendea to cemonstrate the NOW normally the crash 4dump €file is contained within [(SYSEXE)] directory located on the system disk. Log in to SYSTEM MANAGER GDA report atter interoretstion the account. - Upon the advent of $§ promot, obtain a list of files cantainea within the directory (SYSEXE] The €file tnat must bha there {s: SYsoump,DMP EEXERER R SRR R RN R EE R AR RN R E R R R R KR SRR EA SRR REXRKRF X% * ¥ x DO ¥ NOT RENAME THIS FILE * ¥ EEXERE AR RN RN R RN SRR R E KRR Once ascertained present, then <CR>, a you have $ The the file is type: SDA MCR standard that RRRRE XS response to tnhat should be: Enter name of the dump filed The response to that statement 1is: ,DMP (SYSEXE]ISYSDUMP The response description to of typing tne [SYSEXE)STISDUMP,IMP dump and then a SDA is orief prompt: SDA> After " the SDA> prompt, SUA> SET SDA> SHOW SUMMARY SDA> SHOw~ CRASH SDA> S§HUY¥ STACK SUA> SHUw~ PROCESS SCA> EXAMINE/PO SCA> EXIT The QUTPUT EXIT Octain have directery. (XXX shoulc 'igd rave to vou S I1CY also PRI"T can S xxX be the you rtack directorv oe is following:? vour should your to initials) ULCu,. contain initials obtain a at this 3SDAOUYMP xxX file at a file for file tvoe) haracopy ¢f tne Aump, SHADUMP , xxXx look TYPFE do the (let returned This SODADUMP . XxxX @all in SDADUMP.xxx should a type vour terninal: 137 Bootstrap Process 138 BOOTSTRAP PROCESS The following lists the steps required to obfiain a running systém on a processor: VAX-11/750 up occurs. l. Power 2. The VAX-11/750 microcode detects power on and follows the power on strategy selected by the POWER-ON-ACTION switch located on the processor control panel. a. If a restart cannot be doné, bootstrap from will be done. the default automati& either an bootstrap device or a halt b. If the machine halts, the microcode program . gains' the console control. This program: (1) Issues the terminadl console prompt (>>>) at (2) Accepts interactive commands to bootstrap the system by means of the default bootstrap device or a ~user-specified bootstrap device The microcode program looks up and executes the bootstrap This ROM is 256 bytes and device read-only memory (ROM). and a subroutine. The entry) the (at routine contains a main main routine reads block 0 from the bootstrap device and jumps to the boot block entry. The main routine and the boot block routine use the ROM subroutine to read arbitrary blocks from the bootstrap device into memory. The boot block contains the logical block address, size, anad entry offset of the program to be executed in the bootstrap process. This program can be either (1) stand-alone BOOTSS, when the bootstrap device is the TUS8 console drive, or (2) - the system disk. VMB.EXE, when the bootstrap device.is a. If the bootstrap operation is performed from the console TUS8 tape cassette using stand-alone BOOTS8, the user types BOOTS58 commands to set up register input values and to load and start VMB.EXE. b. the If the bootstrap operation is perfiormed.directly m from es cderiv progra ode microc the E, VMB.EX using disk system the register input values. s VMB.EXE is the primary bootstrap program, which contain also It s. routine pendent CcPu-de and CPU~independent code contains a set of primitive non-interrupt-driven drivers for soorsi'm.y PROCESS 1 3 9 all possible system devices and a primitive locating and reading Level 2 files. Files-l1l Structure VMB.EXE performs the following steps: file Level 1 system for and Structure a. Saves the register values and some values calculated from b. Reads the system identification register to determine the processor type and to select the table of appropriate processor-dependent data and subroutines. the register values in the restart parameter block (RPB). - ¢. Determines the amount and pattern of memory. A page frame number (PFN) bitmap is constructed. Unless inhibited by a boot flag, memory 1is tested €for gross, uncorrectable parity errors. VMB.EXE contructs, in the RPB, a table indexed by nexus number of all memory controller and I/0 adapter types. d. 'Based on register values, one of the following 6ccurs: (1) A boot block at the designated logical block number (LBN) will be read into memory and given control. (2) A file named [SYSEXE]SYSBOOT.EXE will memory and given control. be (3) will A file named [SYSMAINT])DIAGBOOT.EXE into memory and given control. read into be read (4) A file'specified by the user in response toc a prompt will be SYSBOOT is the read into memory and given control. standard secondary bootstrap performs initialization suitable for environment. SYSBOOT performs the following program. the steps: It unmapped a. Reads current parameter settings b. Looks up the bootstrap information about it. device c. If register values so indicate, prompts the wuser to modify current system parameter settings. The user can change the start-up command procedure name and modify system parameters using SET or a previously created parameter file. New parameters become the “"current® parameters on the next bootstrap operation, d. Sets e. Reads the resident executive into high physical memory. £. Locates and transfers to INIT code. up SPT, SYSPHD, SCB, from SYS.EXE. driver : file INIT is part of SYS.EXE. (1) Enables maprping (2) Prints anéd the system stores and PFN data structures. The system initialization process consists of INIT, SYSINIT, STARTUP.COM, and SYSTARTUP.COM. a. and four stages: It performs the following: sets the PC to system space. announcement message BOOTSTRAP PROCEgS 1 4 O (3) 1f requested by means of the coot flag, stops at the (4) Initializes the system for paging. (5) (6) (7 XDELTA breakpoint. Deallocates available physical pages (PFN bitmap set .up by VMB) to the free page list. Initializes the system nonpaged pools. paged for table page and Initializes I/0 adapters using the list of present Initialization by VMB.EXE. generated adapters (only the space register adapter consists of mapping and number of pages actually used are mapped) calling adapter-specific routines to allocate and set up data structures and to initialize the adapter hardware. 1In addition, for UNIBUS adapters, the 8K byte 1/0 page of the UNIBUS is mapped. Data structures allocated are: MASSBUS -- adapter control block channel request block interrupt descriptor block UNIBUS =-- adapter control block (8) Performs additional process initialization tasks. Transfers the primitive VMB.EXE system device driver and saves the driver entry and into nonpaged pool; boot device control/status register (CSR) as virtual (rather than physical addresses) in the addresses RPB. (10) ) code Loads the CPU-dependent into image pool and links it into the system. nonpaged (11)° Loads the terminal handler into non-paged pool, and connects the interrupt vectors. Loads the driver image for the system device into nonpaged pool, connects its interrupt vector, and derives the name of the system disk. The rule for the system disk device name is as follows: where driver, primitive device name Examine the controller The controller designator is "aA," "B," the device name is stored. or "C" for the first, second, or third occurrence of this kind of adapter. adapter of the if the example, For second MASSBUS, system device is the (Note that for a the controller is B. configured generally possible command to use procedure controller name the to it system, is AUTOCONFIGURE derive incompatibly the with- is. some care INIT.. Consequently, when configuring multiple reguired controllers of possible system disks across multiple buses.) unit Passed .from R3. ’ VMB.EXE input, register BOOTSTRAP PROCESS 1 4 1 (12) Adds the prologues of (13) Performs initialization of resident drivers. (14) Moves completion code of ' example, MB, NL) the resident to the prologue list. INIT drivers the into (for and pool executes it. The completion code deallocates space occupied by INIT (and optionally XDELTA) to the free page 1list. The completion code then jumps to the scheduler, which ultimately results in SYSINIT being swapped in and started. SYSINIT performs the following: (1) If necessary or requested, p:dmpts for the time day. c. (2) Writes back (3) Creates some logical names. (4) Sets up swapping and paging files. (5) Installs the VAX-ll RMS 1image and file as pageable system sections. (6) Mounts the system disk (7) Creates the job controller, OPCOM, (8) Creates the system parameters to SYS.EXE. system (1) message - (ACP process created). and ERRFMT. STARTUP process. STARTUP reads input from the start-up command which causes of it to: procedure, Create logical names. (2) Ru; SYSSSYSTEM:SYSGEN to configure the I/0 system. (3) Install known images. (4) Invoke [SYSMGR]SYSTARTUP.COM. (S5) d. Log out. SYSTARTUP.COM is an empty command procedure dJdistributed by DIGITAL. The system manager can edit SYSTARTUP.COM to perform site-specific start-up functionms. SYSGEN is run by STARTUP or at any other time. a. SYSGEN: Provides for dynamic 1loading of and connecting todrivers. (The operator, null, and mailbox drivers are permanently part of the executive image.) Provides for the creation of new parameter have an encoded format). Creates paging, swapping, files and system dump {iles. (which 142 Instruction Decode 143 ONSTRATE THE FLOW OF A MACRO THIS IS AN ATTEMPTH TOTHEDEM11/ 730 DATA PATHS. INSTRUCTION THROUG INITIAL INPUT ARGUMENTS MOVL (R1)»R2 >>>D/L/P 100 005261D0 >>>0/6 1 1000 HALT | $>>D/L/P 1000 12345678 SET UP ADDRESS OF 1000 IN R1 SOME DATA IN 1000 1S DECODED BY THE AND WERE OFF... THE START COMMAND T INITIALIZE THE MACHINE. AND WILL FIRS CONSOLE MICROCODE IN CCS WE WRITE XB FLUSH WHENEVER CPU WILL PERFORMD AN WE KNOW THAT THESINC T COMMAND» STAR THE INSIDE WE SPECIFIE A NEW FC TO THE PC» AND ERE FLUS MEER REME H FLUS S PLACE. AN XB SENSELESS. DOES AN EXECUTION BUFF ’S TO HTHETAKE ! THAT WOULD BE CHIP WILL PERFORM NOT WRITE ALL ZERQTHAT WE WRITXB’S E THE PC» THE PRK ANY TIME IFIED IN THE FC NG THE VALUE SPECFIRS OPERATION BY TAKIRY. A DOUBLE PREFETCH BUS T FREFETCH SINCE THIS FROM MEMO AND PERFORMING A XBOs READ THE FC+4 G USIN R ANOTHER PREFETCH WILL OCCU HAS ONLY FILLED THAT WE NOUW XBl. IN RETURNED WILL BE PUTSTAR AND THE I-STREAM DATA ‘ THE NG TORI MONI T WILL OF DATAy THE PRK RUT HAVE THE XB’SANDFULL THE S FROM THE MDR CHIFTOS» EEANDMET. THE °*XB SELECT® LINEHIS PC BITS 1:0 TWO CONDITIONS FIELD OF THE MICROCODE LOOKING FOR > = 3 ED EY THE PC BITS <1:0 1). IS THERE AN EMPTY XB? DETERMIN D FIEL EUS TOR MONI RESS? 2), IS THERE A BUS CYCLE IN FROG ENT TO THE ING TOTALY TRANSFAR THE PRK IS WORK KEEP IN MIND THAT CONDITIONS IT’S EVER WHEN ETCH WILL INITIATE A FREF MICROCODE AND S FROGRAM. ARE MET OR THE PC GETS REPLACED BY THE USER OR THE USER THIS RRANCH INSTRUCTION WOULD REFLACE THE EXAMPLE: 2¢:: BRB 2% OFFSET. PC WITH THE PC PLUS THE EBRANCH E ROUTINE WAS FILLEDs, THE MICROCOD FINALLY AFTER THE FIRSTAN XEIRD1 NS... REGI AND THE WHOLE MESS FOR THE START COMMAND WILL DO 144 I THINK A BLOCK DIAGRAM WOULD BE NICE RIGHT AROUT NOW... BLOCK NUMBER 1 ' DFM b4 00 60 00 o 00 40 05 60 00 $6 @ 00 00 00 00 © 0 H H - : IRD1} eeecseedecscse: ROM 1 Ve T mat : : H - $ ¢ s s : : H H : : : H : \ y 107 : N me——e—y : : : ! ! ’ : MEMORY H 103 : » | XB DECODE BUS 1y 1 00 «ect IRD! OSRIL S [£MSQ3J | / o Yo XX CSACT | IRD o : A) 4 I tPRKJ‘--“->ECHKJ"" : Lo-> PCL120> : : gy { : H H 4 ' | PC+4 104 (/===\| ! € ) 100=00526110 !M ) 1000=12345678 S SR I\===/1 A y {J/==—===\! PC 100 1 RNUM ! ! W BUS / I\wm—oma= /% VA H 4 | MDR { M BUS H i\ » : ! LSPAJL~=~} : : ! IRDX N {! OSR ¢ esoeet ROM | | Vm———— MIC 4 b 102 101 100 : : ¢ XX : | DO :XBO : XX 8 XX 1XBl 106 105 ! 52 ! 61 (4 104 ] ccs M’ CLK s v y H ¢ V=21 : Vew=>iC ----- >18 >»>>>8 100! : A : D LETS BEGIN..., AFTER THE START COMMAND INITIALIZES THE MACHINE AND WRITES THE FPC» THE MICROCODED BUT FIELD GETS AN IRI. PC | PC+4 100 ¢ 104 1. IRD1 OCCURS ON AN IRD1 WE KNOW THAT TWO BYTES OF I-STREAM DATA WILL EE SOURCED FROM ONE OF THE XR’S OVER THE DECODE BUS TO THE IRD GATE ARRAY. SOURCING THIS DATA, MOVES AN OPCODE AND THE FIRST OPERAND SFPECIFIER INTO THE IRD CHIFs AND' THE OFCODE IS ALSO SENT TO THE IRD1 ROM FOR SINCE TWO BYTES WERE SOURCEDs WE RUMF THE FC BY 2. DECODING. PC | PC+4 102 1 106 - REFER TO BLOCK NUMEER 2 : ! : : ‘ 145 HCROWORD NUMBER 1 AT THIS TIME THE IRD1 ROM WILL LOOK AT THE OPCODE AND WHEN IT DECOIDES IT AS A MOVL INSTRUCTION, IT WILL OUTPUT BITS 3 THROUGH 9 OF THE ERASE CONTROL STORE ADDRESS WHICH WHICH WILL TAKE US TO THE PROFER MICROCODE ROUTINE. ALSO AT THIS POINT THE IRD CHIP WILL EVALUATE THE 1st OFERAND SPECIFIER AND OUTPUT THE CONTROL STORE ADDRESS BITS O THROUGH 3 GIVING US A TOTAL CSAD FOR OUR MOVL INSTRUCTION IN REGISTER DEFFERRED' MOLE. THE IRD CHIP WILL OUTPUT THE ENCODED VALUE FOR GPR 1 INTO THE RNUM REGISTER.(OSR DECODE) THE MDR WHICH CONTAINS GARBAGE WILL BE BACKED UP IN THE Q REGISTER. xx%x SEE BLOCK NUMBER 2 XXX BLOCK NUMEBER 2 DPM 4 4 | MIC 4 4 t4 MEMORY b4 /s 60 %6 60 00 00 0O 00 00 00 00 00 00 00 00 40 00 00 O | ] | : | PC+4 106 !/=-==\I $} ([ m————— \! PC 102 y : | 0 ¢t € ! 100=005261D ! [SPAJ<~=={ 1 RNUM ! | W BUS ! | 78 1000=123456 M i ! I\=mwmem—— /¢ VA ===2>1000 : : : I ¢ : Vemeea= >CGPR 11=>1/ : : ===/} i\ MDR | ! M BUS ¢ IRDX ’ ccccneVNeecmcccc {7 : I\ |y ———— N : : it OSR ¢ EPRKJ ‘‘‘‘‘‘ \‘ECHl\J" : H 0000 H RO" : : b PCL1202> : : | Vmm——— ! g ————- y : { IRD1: : : vesseessdesseser ROM | : H : : ' H : : : PC 100 102 V101 ! 103 : H : » ¢+ XR DECODE BUS | S I 52 1 XX ! XX Pt 00 eeet DO 1 61 IL P [MSQ3J ¢ ¢ S XXV XX P XX o XX LSACT | IRD - ¢ $ - : e ¢ 3 : cCs M CLK . D N 2z | | \"4 ., : pmmmmmmsee y ¢ [’ § V=103 K329 ‘e 107 106 105 PC+4 104 ¢ : i1XBO : 1XE1L WILL 146 RNUM»THE ITR BUS» INONTO THE NUMBER SEE’S GATE SARRAY THETHESPACONTENT WHEN OUT IT SEND AND R1 OF SELECT THROUGH THE B LEG BYPASS OF THE ALU AND OUT ON THE W BUS. THE MICROWORD WILL SET UP THE VA REGISTER TO RECIEVE THE OF 1000). W BUS (WHICH IS CARRYING OUR ADDRESS MICROWORD NUMBER 2 THE SECOND MICROWORD WILL CAUSE A BUS READ CYCLE TO OCCUR FROM MAIN MEMORY INTO THE MDR. xxx SEE BLOCK NUMBER 3 XXX BLOCK NUMBER 3 y 7 60 96 00 46 60 GO 90 06 GO 00 O¢ *0 %0 © ey ) H RNUM ! ! ESPAJL==] ¢ ' H ¢! IRDX | ym———— 1! OSR | eecseeit ROM | | Vm———— ’ y———— y i { IRD1} ‘ H ccsoceelesccses ROM I ’ : CCS ‘===>!1C —————>1S tA {D 1] READ FROM MAIN MEMORY y : H H : s M CLK i y y ([ mm——— \! PC 102 | PC+4 106 i/=-==\ t C ! W BUS | M >4 1000 ==—e==I\mm—e—— /% VA § I H V4 HAN < 8 12345467 MDR ! BUS ! M HE : '\ H H H H CPRK]======>[CMK]===' H : H Lea> PCL120> H H H H H : H : E PC H H ¢! 103 102 V101 N H H -y } XE DECODE BUS ! iy s ¢t 00 !} S2-1 XX $ eeet DO I 61 KL I ¢ CMSQl ° s o XX T XX o XX CSACT ¢ IRD M - MEMORY MIC DPM 107 106 ~10S PC+4 100 ¢ : XX 1XBO : XX 1XB1 104 100=003526 ino 1000=1234 5478 147 NOW THAT WE HAVE OUR DATA IN THE MDR, WE NEED SOMEPLACE TO FUT IT. NO MORE CAN BE DONE WITH THE 1st OPERANDs SO THE MICROCODE ROUTINE WILL DO AN IRDX TO BRING IN THE 2nd OPERAND. AN IRDX WILL SOURCE ONE BYTE FROM THE XE INTO THE IRD CHIF AND ALSO BUMF THE PC BY 1. PC | PC+4 103 ¢ 107 IRDX MICROWORD NUMBER 3 BE DECODED TO FIND WHEN THE OPERAND HITS THE IRD CHIP IT WILL QUT IF REGISTER MODE IS USED AND WHICH REGISTER TO GIVE RNUM IF NEEDED. THE IRD CHIP WILL SEND THE OPCODE TO THE IRDX ROMS TO SUFFLY AN ADDRESS THE IRDX (OSR) ROM WANTS TO KNOW TWO THINGS: 1. WHAT OP CODE IS IT? FOR A PARTIAL ADDRESS INTO THE ROM. 2)., WHAT MODE ARE WE IN? REGISTER MODE DETERMINED BY THE UFPER 4 BITS OF THE OPERAND SPECIFIER FROM THE IRD CHIP. AT THIS TIHE-THE IRDX ROM WILL OUTPUT AN ADDRESS THAT UILL SFECIFIER. PLACE US IN THE MICROCODE TO HANDLE THE NEEDED OPERAND THE ENCODED VALUE FOR GPR 2 IS SENT TO THE RNUM REGISTER AND LIKE BEFORE» THE SPA SELECTS THAT REGISTER BUT THIS TIME UWE WILL BE WRITING INTO IT. THE CONTENTS OF THE MDR WILL BE SENT ACROSS THE M BUS» THROUGH THE ALF CHIPS AND ONTO THE WBUS TO BE WRITTEN INTO THE SELECTED GFR AND THE MICRO ROUTINE WILL END UP WITH ANOTHER IRD1 FOR THE NEXT INSTRUCTION. %x%x SEE BLOCK NUMERER 4 XXX 148 BLOCK NUMBER 4 DPM ? 4 4 : : : : : H ) H : : : : 4 MIC 4 ' y MEMORY m—— : ——y | [mm————— \! PC 103 | PC+4 107 {/===\i y : 61D0 100=0052 1 € ! | ! CSPAJ<~-=-! 2 RNUM | | W BUS ! M ! 1000=12345678 ! I \mm——==/] VA H : : S : i/ : : : Vo SCBPR 2]<¢=== M BUS == MDR <====12345478 I\===/i : | TM Veeeee———— e ’ ' '\ REG. §y====-— MODE {! QSR ! eescees ROM ! | Vo : : : H : s I X - ym———— y { IRD1! Y ROM | I EPRKJ ““““ >[C"KJ"""' : Lo-> PCL1:0> -1 : H PC ! 103 V102 101 100 : : H : s ! BUS » | XB DECODE 1 s XX § XX 1 XX ! 00 : $ S oot DO 2 S22 IL I b £-17 o M T < XX P XX ! XX 1 XX LSACT | IRD T s o s I ¢ $ 3 ’ H 8 S : S 4 3 H M CLK cCs | S S 8 ‘=>IN/A Vem=>IN/A w1 10202 { WRITE MDR {t TOGPR 2 i IRD1 y (L= : : \ 107 ~106 : PC+4 105 ¢ : 1XBO H 1XB1 ’ 104 : ! ' HAVING JUST FINISHED THE MOVL INSTRUCTION» THE MICROCODE ROUTINE LEFT US WITH ANOTHER IRD1. AS BEFORE AN IRD1 WILL SOURCE TWO MORE BYTES OF I-STREAM DATA OVER THE XF DECODE BUS» INTO THE IRD CHIF AND ALSO UP TO THE IRD1 ROM. AS BEFORE THE PC WILL EE BUMFED BY 2. PC & PCt+4 105 ¢ 109 x%xx SEE BLOCK NUMBER S XXX 149 OSR ! ROM OS INH ! i1 PC+4 |S 9 4 PC {1 /===\1{ i €C 1| 100=005261D0 P M 1 1000=123454678 HE D S IN==—=/1{ - VA MDR : L ) Vmmma’ : HE pm————y : H { IRD1: : essssssdecssseetl ROM | H s 1 : Ve T : H 100 : » | XB DECODE BUS ¢ s eeed 00 1§ XX 1< # [MSQl LSACT IRD : H | | H : : : : ! ! P I ‘el Leo> PCL130> 103 102 : : : PC+4 H H H 101 100 ¢ - 00 1 XX i XX § XX XX 7 XX 1 XX 1 XX 107 106 . i1XBRO H 1XB1 105 104 cCcs @ PC e o e e e s oo o e DGO O 11 VoV Y vo . o e M CLK 9 ¢ P PRIR s 00 00 00 06 00 40 00 00 90 00 00 S0 00 O {{ RNUM 14 1 /======\} | W BUS |} I\=m=m———=/1 H : ¢t M BUS | HAN : NOTICE WHAT HAFPPENED TO THE PC AND PC+4... THE PC HAS REEN RUMFED TO 105 WHICH TELLS THE PRK CHIF THAT WE HAVE USED ALL THE DATA IN XBO. A FREFETCH CYCLE WILL OCCUR USING THE PC+4 AS OUR AIDRESS TO FETCH DATA FROM MAIN MEMORY. IF WE SEND THE ADNDRESS OF 109 OVER THE CMI WE WILL GET BACK THE LONGWORD ADDRESS CONTAINING 109. THIS5 IS ~ DUE TO THE FACT THAT THE CMI IGNORES RITS 0 AND 1 OF THE ADINNRESS THUS GIVING US A LONGWORD ADLDRESS OF 108 WHICH IS EXACTLY WHAT WE WANT. xxx SEE BLOCK NUMBER 6 XXX o y y ! ! ne 4 : ’ ¢! LSPAlL==]} : H { IRDX | ym———— MEMORY e MIC oo DPM S B NUMBER \ BLOCK 150 t M BUS AN ROM 0OS INH ¢ { pmmme— 11 OSR } o 00 00 00 06 06 ¢4 00 00 00 00 00 90 40 00 [2] 1/ | ‘o’ g mmmay { IRD1: = : H : . ceedosecce: : : ’ : ——, $ eeel 00 ! XX 1< s 31 s 3 © IRD ccs » -4 $ el Yeme31C Semmea>18 ‘A 'D . . H :00 ! XB DECODE BUS tMsQ@l ! £saca ! ; $ e s 3 :1} ROM H H H M CLK : C M I ! 100=005261D0 ! 1000=123454%78 \e===/1_ - MDR Lee> PCL1202 : PC+4 109 vio8 10B 10A XX ! XX ! XX ! XX J1oXX ! XX ! XX} XX 107 106 105 ~104 - me {(/===\i ow : H MEMORY e RNUM | ¢ W BUS | ¢ I\ mwe—=-=/1 VA i CSPA]L==] : | PC+4 109 y § y ) fmmmme=\}! PC 105 y : g : MIC . l-..-.--.-.n.-‘ -y P e Cw ow Ge Co oo ®e SO *0 S e o Se 9% =5 ’ - H o\ Be eom Be e ee oo we o6 Se oo nPM o= ew @ BLOCK NUMBER 6 IXEO iXBi PC s = : : : : EXECUTION OF THE NEW INSTRUCTION TAKES PLACE SIMUTANIOUSLY WITH THE PREFETCHs BUT NOTICE WHAT INSTRUCTION WE ARE USING... IT IS A HALT INSTRUCTION. WE KNOW THAT A HALT INSTRUCTION HAS NO OPERANDS ONLY AN OPCODE, THEREFORE SOMETHING MUST BE DONE TO PREVENT THE IRD CHIP FROM EVALUATING THE SECOND BYTE AS A 1st OFERANI SPECIFIER. WHAT HAPPENS IS WHEN THE IRD1 ROMS DECODE THE HALT OPCODE, (OR ANY ONE BYTE INSTRUCTION) A SIGNAL NAMED °"ROM 0S INHIEIT® WHERE IS OUTPUTED FROM THE ROM ITSELF AND SENT TO THE MSQ AND SAC CHIFS THE FREVENT WILL WHICH A*® IT DISABLES ANOTHER SIGNAL CALLED °LOD OSR UPDATING OF THE OSR COUNTER. THE SAME SIGNAL TELLS THE SAC CHIF TO WHICH WILL TELL THE PHR CHIP NOT TO GENERATE THE SIGNAL °*IRD LOD RNUM® THE °*LOD' OSR A° PREVENT THE SFA CHIP FROM LOOKING AT RNUMs AND FINNALY SIGNAL TELLS THE IRD CHIF NOT TO DECODE THE DATA ON THE OSR SECTION OF XB DECODE AS IT IS NOT REALLY AN OFERAND. THE HALT MICROCODE FLOW WILL NOW TEST THE CURRENT MODE TO SEE IF WE ARE IN KERNAL MODE AS YOU MUST EBE TO HALT THE CPU. ASSUMING THAT WE ARE IN KERNAL MODE, THE MICROCODE ROUTINE WILL ... 1). 2y, 2). 4)., SET UP A HALT CODE OF 06 IN A TEMFORARY REGISTER ADD 1 TO THE CURRENT PC GIVING US PC=106 AND FC+4=10A VARIOUS OTHER TASKS REQRUIRED TO SHUTLIOWN THE CFU AND FINALLY SENDN THE FC TO THE FRINT ROUTINE 151 THE MICROCODE PRINT ROUTINE WILL ALWAYS SUBRTRACT 2 FROM ANY GIVEN PC BEFORE ACTUALLY PC= SENDING 106 IT TO 00000104 - THE CONSOLE. 04 P> an 104 - THIS LEAVES US AT A PC OF 104 WHICH OPCODE OF THE HALT INSTRUCTION. - THE REASON FOR THIS >>> AND CONTINUE IS ONE BYTE AHEAD IS BECAUSE NOW WE CAN SIMPLY OF THE ACTUAL TYPE... C ON ONE FINAL NOTE: WITH THE NEXT OPCODE FOLLOWING THE HALT INSTRUCTION. DURING EXECUTION OF MACRO INSTRUCTIONSs IF ANY INSTRUCTION BLOWS UP AFTER BEING DECODED ON AN GIVEN IRD1, THE PC WOULD HAVE ALREADY BEEN UPDATED BY 2... SO0 THE PRINT ROUTINE CALLED IF WE WERE TO HALT THE CPU, WOULD SUBTRACT 2 FROM THE PC GIVING US THE CORRECT OPCODE ADDRESS OF THE FAILING INSTRUCTION. THIS ALSO CLARIFIES WHY WE HAVE TO AID 2 TO A MICRO-VERIFY ERROR HALT TO GET THE CORRECT FAILURE CODE. THE MICRO-VERIFY ROUTINE IS RESIDENT IN ZCS ROM AND IS NOT A MACFO PROGRAM AT ALL! THUS IT DOES NOT UPDATE THE PC IN ANY WAY» BUT IT STILL USES THE SAME PRINT ROUTINE FOR THE ERROR DISFLAY. THINK YOU’VE GOT THAT DOWN??? OF BEWILDERED ENGINEERS!!! GOOD LUCK. NOW TRY TO EXPLAIN IT TO A CLASS FULL 152 Machine and Bugchecks 153 11/750 MACHINE CHECK INTERFRETATION TO HELFP ALIVIATE ANY PROEBLEMS HAVING TO DO WITH MACHINE CHECKS IN THE 11/750 BELOW IS AN EXPLANATION OF WHY AND HOW THEY OCCUR ALONG WITH AN EXPLANATION OF HOW TO READ THE MACHINE CHECK LOGOUT. A MACHINE CHECK IS A UTRAF TO LOCATION 28 IN THE MICROCODE. THIS 1S CAUSED ONLY BY TWO CONDITIONS WITHIN THE LOGIC OF THE UTR CHIF. THESE CONDITIONS ARE AS FOLLOWSS - 1. TRANSLATION BUFFER PARITIY ERRORS IN DATA OR TAG 2. BUS ERROR THIS SOUNDS EASY BUT WHAT CAN CAUSE A BUS ERROR IS THE PROBLEM. PLEASE LOOK AT THE FOLLOWING CHART AND READ THE EXFLANATION RELOW IT. 6 s (MACHINE CHECK UCODE ADDRESS) 8 * * ® [ 4 [ ® EEEEREESI [ 4 000000 | J [ ® EEEXEERE 00600900 ® BUS ERRORS CACHE PARITY ERROR UNCORECTABLE DATA ON CMI *e oo 3 ¢0 o0 oo [ X ] 4 > L X 0 L X *® [X e (X4 UNCORECTABLE DATA L2 2 ¢® *® .0 o *0 e L 1 J *® *® L2 J oo D o 00 oo & 9O TB PARITY ERRORS NON EXISTANT .RLTO - MEMORY NXM ON CMI WE WILL USE THE AROVE CHART TO INTERPERT THE MACHINE CHECKN LOGOUT THAT IS OM FAGE 25 IN THE VAX 11/7S50 DIIAGNOSTIC MINI REFERENCE GUIDE. ATTACHED TO THIS SHEET IS A COPY OF THE LOGOUT ANI' A BREAKQUT OF THE NEEDED REGISTERS IF YOU HAVE NO MINI REFERENCE GUIDE. WE NEED TO CORRECT ONE AREA OF THE LOGOUT IN THE MINI REF. GUILDE BEFORE WE GO ON. AT LOCATION (SFP)+28 IT SHOULD READI MACHINE CHECK ERROR SUMMARY REGISTER AND NOT MEMORY CONTROL REGISTER. —_— 154 ALL RIGHT WE ARE OFF!!!! WHAT YOU SEE IN THE LOGOUT IS WHAT IS FUSHED ONTO THE STACK WHEN A MACHINE CHECK OCCURS WHILE NORMAL RUNNING OF VUMS *AFTER® THE VECTOR ADDRESS IS BROUGHT IN IN FROM SCBE+4 AND THE VECTOR RITS O AND 1 ARE CHECKED. WE WILL ATTACK THE STACK DUMF FROM TWO AREAS? LOCATION i. INFORMATION RELATING TO LOCATION OF FAULT (PC ETC) 2. CAUSE OF THE FAULT. ¢ - AT (SP)+8 IS THE VIRTUAL ADDRESS REGISTER. THIS REGISTER IS USED TO FETCH THE OPERAND DATA NEEDED BY THE INSTRUCTION. SO IT CONTAINS THE OPERAND ADDRESS IF THE MACHINE CHECX OCCURRED WHILE FETCHING OPERAND AT DATA. (SP)Y+C IS ' THE PC AT THE TIME OF THE EXCEFTION. THIS MAY BE USED WITH (SP)+2C WHICH IS THE ADDRESS OF THE OPCODE OF THE FAILING INSTRUCTION. EX: IF YOU ARE PREFETCHING AND USE AN INSTRUCTION AT ADDRESS 1000 AND THAT INSTRUCTION HAS S OPERAND SPECIFIERS THE ADDRESS OF THE OPCODE +2 IS STORED IN THE PC BACKUP REGISTER UNTIL THE NEXT OPCODE IS USED.(IRD1 TIME) AS YOU USE THE S OPERANDS IN THE INSTRUCTION THE PC (NOT PC BACKUP) IS INCREMENTED TO KEEP TRACK OF EXECUTION BUFFER USAGE. SO0 IF WE HAVE A MACHINE CHECK INVOLVED WITH EXECUTION BUFFER DATA» WE HAVE PUSHED ONTO THE STACK THE ACTUAL PC (SP+C) AND THE OPCODE OF THE INSTRUCTION (SF+2C). AT CAUSE? (SP)+30 WE HAVE THE STANDARD PSL. WE SHOULD FIRST LOOK AT THE SUMMARY FARAMETER COIE AT (SP)+4. GENERALLY SFEAKING YOU WILL ONLY HAVE NUMBERS 15256 OR 7. 156 AND 7 ARE BASICALLY THE SAME THING. THESE MEAN A CONTROL STORE PARITY ERROR OCCURRED OR SOMEHOW THE MACHINE WAS SENT TO AN UNUSED IRD OR UNKNOWN ROM LOCATION., THIS COULD HAPPEN FOR A FEW REASONSsy OF WHICH THE MOST LOGICAL IS THAT YOU HAVE A BAD CONTROL STORE» EAD MICROSEQUENCER ON THE DPM OR A BADI IRD DECODRE ON THE DPM. 155 THE MOST COMMON AND HARDEST TO FIGURE OUT IS THE COLE OF 2. THIS RELATES TO MEMORY ERROR»TR PARITY TIMEOUT ETC. YOU LIKE THAT ETC. DO YOU. WELL LETS TARKE THE CONFUSION OUT OF THE STATEMENT. IF YOU EVER SEE A 2 FOR A SUMMARY IS THE PARAMETER CODE THE FIRST THING YOU SHOULD LOOK AT CAN YOU 8. MACHINE CHECK ERROR SUMMARY REGISTER? (SF)+2 RELATE THIS REGISTER(MCESR) TO THE AROVE CHART BECAUSE IT WILL TELL YOU WHAT CAUSED YOU TO GET TO UCODE ADDRESS 28. FIND THE BREAKOUT OF THE MCESR (PAGE 28 IN MINI REF.GUIDE) AND YOU WILL SEE A FOUR BIT REGISTER. LET US MAKE THE NEEDED CHANGE. THERE IS NO LONGER AN UNALIGNED UNIEUS REFERENCE THAT CAUSES A MACHINE CHECK, SO CROSS IT OFF. BIT O WILL TELL YOU IF THE MACHINE CHECK OCCURED WHILE DOING A PREFETCH OR OPERAND FETCH.(THIS MAY HELF YOU TO FIGURE ON USING THE VA OR PC FOR LOCATION) HAPPENI&G IF BIT 0=0 THEN AN OPERAND FETCH WAS INSTRUCTION CAUSED IT. IF BIT O0=1 THEN A PREFETCH OF AN BITS 2 AND 3 WILL TELL YOU IF IT WAS A TE ERROR OR EBUS ERROR AS AN EXAMFLE WE WILL USE THE TB ERROR FIRST. TB PARITY ERROR WHILE FETCHING AN OPERAND WOULD CAUSE THE REGISTER TO LOOK LIKE THIS WHEN PUSHEDl ON THE STACK 00000004 BIT 2 SET AND O CLEAR. IF A TR ERROR OCURRED WHILE PREFETCHING IT WOULD RE AS FOLLOUWS? 00000005 RIT 2 SET AND O SET. EITHER WAY IF IT IS A TB ERROR YOU SHOULI' THEN LOOK AT(SF)+1C OR THE TRANSLATION GROUF REGISTER. THIS WILL TELL YOU WHICH GROUF (0 OR 1) AND IF IT WAS A TAG OR DATA ERROR. YOU MAY ALSO LOOK AT (SF)+14 WHICH IS THE SAVED MOLDE REGISTER. THIS WILL TELL YOU THE PROCESSOR ACCESS MOIE ANDI MEMORY MANAGEMENT STATES DURING THE LAST MICROCODE REFERENCE TO MEMORY. FROM THIS YOU SHOULD KNOW WHAT CAUSED THE MACHINE CHECK AND THE LOCATION. LET US RETURN TO THE MCESR AND ASSUME IT LOOKRED LIKE THISS 00000008 BIT 3 SET O CLEAR THIS WOULD MEAN A BUS ERROR HAFFENED DURING AN OFERAND FETCH. IF YOU LOOK AT THE CHART YOU WILL FIND THERE ARE TWO THINGS THAT CAN CAUSE A BUS ERROR. TO FIND OUT WHICH ONE IT WAS LOOK AT (SP)+24 THE BUS ERROR REGISTER. THE BUS ERROR REGISTER IS A FOUR BIT REGISTER IN THE MEMORY INTERCONNECT MODULE SLOT THREE.(NOT THE MEMORY CONTROLLER) THE EXAMPLE WE WILL USE FIRST IS UNCORECTABLE DATA CAUSED THE BUS ERROR. THE BUS ERROR REG. WOULD LOOK LIKE THIS# 00000004 THIS SAYS UNCORECTABLE DATA CAUSED THE ERROR:» THERE WERE NO LOST ERRORS(RECEIVED AN OTHER ERROR BEFORE THE LAST ONE WAS CLEARED) 111 ICORRECTED READ DATA DID NOT OCCUR. CORRECTED READ DATA CAUSES AN INTERRUPT NOT A MACHINE CHECK!!! IF YOU LOOK AT THE CHART YOU WILL FIND THAT UNCORRECTABLE DATA CAN BE CAUSED BY TWO THINGS# 1. CACHE PARITY ERROR 2. UNCORECTAELE DATA FROM THE CMI TO DETERMINE WHICH OF THESE CAUSED THE BUS ERROR LOOK AT (SP)>+20 WHICH IS THE CACHE ERROR REGISTER. THIS REGISTER CONTAINS INFORMATION ON THE DATA CACHE. IT IS A FOUR BIT REGISTER ON THE MIC MODULE THAT WILL TELL YOU IF THE LAST REFERENCE WAS A HIT; LOST ERROR AGAIN AS EREFORE AND IF YOU HAD A CACHE FARITY ERROR. IF THERE WAS NO CACHE PARITY ERROR SET IN THE REGISTER THEN THE EUS ERROR WAS CAUSED RY THE UNCORRECTARBLE DATA FROM THE CMI. 157 S0; CONTINUING RIGHT ON LET US ASSUME THAT THE BUS ERROR THE WAS CAUSED T BY A NON EXISTANT MEMORY. AS YOU CAN SEE BY THE AT LOOK LETS FIRST NXM. CAUSE CAN THINGS CHART THAT TWO BUS ERROR REGISTER. IT EQUALS? 00000008 BIT 3 SET = NXM THEN WE WOULD LOOK AT THE READ LOCK TIME OUT REGISTER (RLTQ) THIS IS A ONE BIT REGISTER THAT IF BIT 0 IS SET A READ' LOCK TIME OUT CAUSED THE NXM. WHAT IS A READ LOCK TIME OUT? GooD A READ QUESTION. IF THE CPU ATTEMPTS TO ACCESS THE CMI DURING ON ARRAY GATE CMK THE IN LOCK CONDITION A TIMER IS STARTED ) CORRECT IS (USEC USEC 64 FOR THE MIC MODULE. IF THE TIMER RUNS WILL THAT CHIP UTRAP THE TO NXM TES THEN THE CMK CHIF GENERA CAUSE A MACHINE CHECK. IF BIT O IS CLEAR IN THIS REGISTER ANL THE BUS ERROR REGISTER SAYS A NXM CAUSED THE MACHINE CHECK THEN IT WAS CAUSED RY NXM ON THE CMI. . THE ONLY THING THAT WAS PUSHED ONTO THE STACK THAT UWE HAVE NOT TALKED ABOUT IS (SP)+10s, THE MEMORY DATA REGISTER (MDR). THIS WILL CONTAIN THE LAST DATA FETCHED FROM CACHE OR MAIN MEMORY. HOPEFULLY THIS EXPANATIONs CHART AND HANLOUT WILL CLEAR UP SOME MISCONCEPTIONS CONCERNING THE 11/7350 MACHINE CHECK. ) 158 GENERAL 1. 11/750 MICROCODE FLOw MACHINE CHECK EXCEPTION CONDITION FOR A MACHINE CHECK OCCURS " THE VARIOUS TYPES ARE AS FOLLOUwS: A. BUS ERROR:===e> | NXM OFF CHI FROM: (NON EXISTANT MEMORY) ====> | | 1 -1 | l =e=> | { | ee<> } | CMC MODULE UBI MODULE (MEMORY CORTROLLER) (UNIBUS INTERFACE) . MBA MODULE (MASBUSS ADAPTER) wee) I {(CE evccscsaccccasceses) (UNCORRECTABLE ERROK)| i UCE FROM CMC (OR OTHER DEVICE) | . ERRQR ewee> CACHE PARITY | | e=e> RLTO (READ LOCK TIME 0QUT) 8., TE ERRURi===ee> TRANSLATION BUFFER TAG PARITY ERRGR } I ===> TRANSLAT1ON BUFFER DATA PARITY ERROK THE TWC CATEGORIES OF MACHINE CHECK CUNDITIONS CAM BE BROKEN LOWN INTO TwO MOKRE GKOUPS: > A. SOURCING DATA FROM I=STREAM:==> MSRC X3 TE ERROR SEE NOTE | EXXFXBEXEXE XL ELEXZEXLEXEZXEXEEREXSE ! | | | % TRAMSLATITON BUFFER BRRROR ¥ ENCOUNTERED wHEN SGURCING ®* THE BAD DATA FROM ThE * LXECUTION BUFFER | EEXFEESEEEEXXEFEBXXFXTERXEXNER ¥ = x ¥ | e==> MSRC X8 BUS ERRQOR EXFEFEFEEXEREEXEXREERXXREEERS * BUS * WHEN ERROR SQURCING ENCOUNTEKED * FRUM THE THE EBAD EXECUTION * DATA* BUFFER = BEXXXXXXXRXEBLXXIXRIEXEIRZXNXERX NGTE® wHEN A IGNORED TB OR UNTIL BUS ERROR OCCURS DURING A PREFETCH, THE EKkkOR =E ATTEMPT TO SOURCE THE BAD DATA FROM ThE 1S EXECUTION BUFFER. THIS IS 7T0 PREVENT UNNECCESSARY EXKOK HANDLING OF DATA THAT MIGHT ~nQYT GET USED ANYWAY, THE DATA IN THE XB IS NOT ALwAYS THe R1eHT DATA TOU BE EXECUTED, FOR EXAMPLE: 1F THE CURRENTLY EXECUTING INSTRUCTIOM IS A BRANCHING INSTRUCTION IT wlLL MUDIFY THE PC THUS CAUSING AN EXECUTION B8JUFFER FLUSH w#HICH CLEARS OUT TdE& XB AND FILLS 1T wITH THE DATA FROM THE NEwW PC AND PC+4. 159 B, ERROR DURING INSTRUCTION DECUDE:===<>B8YT X3 TB ERROR (IRD1/1RDX) - ] EXXEXXLEXERXETESXEEEIFEEELIEX } * | EEXXXXEXXEXTEFILXINIIXNEXSERS J TB ERROR * DURING AN | ~==>BUT XB BUS ENCOUNT1ERED IKD1 OR IKDX ¥ * ERRQOR EFFFXXXRXEXXXSIRXRSEXIEIXIFEER ¥ BUS ERROR # DURING AN ENCOUNTERED IRD1 QR IRDX * * EXXFXFEXEXXREEXXFEXEIZIXERREEES - - 2. MSQ, UTR AMD SAC CHIPS SET UP A MICRO VECTOR OF 0028 AT TRE OQUTPUT QF THE MICROSEQUENCEK, SENDING US TO THE PROPER MICRO AUDRESS AND THE MACHINE CHECK MICRO RCUTINE SETS UP QUR SCBB+4 AND BUILDS ThE STACK, 3., SCho+4 CONTAINS OUR MACRO VECTOR ADURESS 4, USE THE LOWER TwO BITS TO SELECT A STACK: VECTIOR BITS <1> | <0> o I 0 > USE KERNAL STACK UNLESS <1S> BIT 0 1 > USE INTERUPT STACK 1 0 > TRAP TO wCS ADDRESS 2001 IF 1 1 IS SET IN PSL »CS IS NCT PRESENT, TRAP TO 0001 IN CCS > HALT AT VECTOR PC POINIS TQ INTERUPTED OR FAULTED INSTRUCTION, 00600000 07 >%> 5. PUSH PSL, PC AND 11 OTHER LONGWORDS OF INFORMATIUK ON STACK. 6. LOWER T#0 BITS OF VECTOR GET ZEROS WHEN CROSSING CMI On ADDKESS THE AODRESS POINTED TO bY THE VECTOR wILL BE ThE STAkY CYCLE. OF THE MACRO MACHINE CHECK HASDLER ROUTLINE. 7. LRD1 OF mACRO ROUTINE TAKES PLACE, 160 GENERAL A ON MACHINE CHECK CAN CERTAIN SYSGEN THE EXCLPTION THE QVERALL SYSTEM | BE HANDLED MANY PARAMETERS OCCURRED., FACRO CHECK MACHINE AND THE CURRENT THE FOLLOWING RESPONSE TO LJG THE ERROR A CHART MACHIME FLOW DIFFERENT MODE IS OF wAYS DEPEMDING OPERATIUN DESIGNED TO CHECK. | l | USER OR | | CHECK THE MODE | | SUPERV1SOR S EXITLS UNLESS THE VMS MACRO HANDLER DETERMINES THAT IT CAN RECOVER FROM THE EXCEPT1ON. (NUN=FATAL) | KERNAL i | | | | | | BUGCHECK THE CPU (FATAL) | EXECUTIVE 1S THE SYSGEN "BUGCHKFATAL"TM YES: NQ: BIT TREAT LT LIKE KERNAL SET? MODE LOG THE USER OFF UNLESS THE VMS MACRO HANDLER DETERMINES THAT 1T CAN : RECOVER FROM THE EXCEPTION, (NON=FATAL) DOwh wHEN ShCw ONLY IF THE MACHINE CHECK TURNS INTO A BUGCHECK, IT WILL HAVE THE FOLLOWING RESULTS: | | BUGCHKFATAL | BIT CLEAR | i FATAL | | i CODE | BUGCHKFATAL | BIT SET | | KERNAL MODE | | | mopE | | SHUTDOWN THE CPU | eeewececwe=| | EXECUTIVEI | | | | LOG THE ERROR | LOG THE ERROR | ) THEN I SHUTDUWN | 1 REI ) THE CPU | 1 i | | PROCESS |PROCESS | i |DUES |HAS HAVE] INOT CK | BUGCHE IBUGCHECKI IPRIV. | | CJPRIV. | ISUPERVISORILOG THE | DO NOT | { ERROR [1LOG THE | MODE { { ERROR | | rewscacea=| THEN | BUT 'I T.S ISEXI 3 USER | NON=FATAL BUGCHECK CODE | MODE | ISEXITaS | D1SmISS THE ERROR THEN REI | | | i | 162 BUGCHECKS A T .5, BUGCHECK as a corrupted bBugchecks can failuyres, Softvare {s an internal inconsistency data structure or unexpected be the result of programming related Bugcnecks can be within a process or VmMsS, exception, detected errors or hardware guickly isolated from oy the information saved in the system dump file on a system crash and from source listings. Hardware related Bugchecks are not so easy to isolate because the hardware failure can occur long before VMS detects it. Later on we #1ll look occurs at how to troubpleshoot some Bugchecks are not always fatal while the CPU is in either User of to or the common 3ugcheck failures. the system. A Bugcheck that Supervisor mode w#will resuylt in teraination of the process that incurred the Bugcheck, providing the process does not have privilege to cause a Eugcheck., If the Bugachecx is not fatal, VMS will dismiss it and allow the process to continue, Jtnerwise gatal Bugcnecks will not crash the system from User or Supervisor moge. VMS protects itself and its data structures by using tne Bugcheck aechanism while in Executive or Kernel mode. kon=fatal Bugzchecks whicn occur in Execuytive or Kernel mode are dismisseg the same as those in Supervisor or User mode, unless the SYSBOOT parameter BUGCHECKFATAL s turned on, Nonefatal Bugchecks will be logged to the Error Log., Fatal Bugchecks will result in the orderly shutdown of the system, A small anount of information describing the Bugcheck is sent to the console terainal, a dumg f£ile is written to the disk and then a special coae is sent to the CON cnip’s console transmit cata puffer and a HALT instruction is executed, 7The systea will then be rebooted unless the SYSBOUT parameter f£lag BUGREBOOQOT {s cleared. Tne crash dump f£ile can be analyzed using the System Dump Analyzer (SDA). Tne size of the dump file must be four blocks larger than the number of pnysical pages in-tne system, If the space reser.ed on tne alsk tor the dump f£ile is too small, only the physical pages tnat can £it in the file will be written, A small dump file will not contain some of tne most crucial contents of physical memory (the system page tables) which may make analysis with SDA impossiple, | 163 BUGCHECK TROUBLESHCOTING The tools you must Know how to use to analyze a crash dump include -& VMS microfiche listings and the System Dump Analyzer. This discussion assumes you also know the VAX instruction set and understand how to read a MACKRO=32 listing. It is not necessary to understand the internals of VkS to troubleshoot some of the most common Bugchecks that are caused by nardware failures. Bugcnecks caused by program errors are beyond the scope 0f this discussion. ‘ ahen useful £or a Bugcneck occurs, isolating tne area information of code whicn information {s usually easy to identify. Address Array, thougn it is not lett on the stack which Bugcheck. the This s Note that this information is not always avallable on the stack, Sometimes the stack witnout a Vector Address array. Vector is caused a Signal Array can The first item to always available. be found on locate is the Tne AP will be pointing to tne Vector Address Array if it is on the stack. 7This array will give you the address on the stack of the signal and mechanism arrays. The mechanism array contains the contents of RO and Rl at the time of the Bugcheck. This information will be necessary for analyzing the code that Bugchecked., . VECTOR eswwesce) jeocsacvoncscsccscccacsancscersaccvascay ADDRESS | ARRAY 00000002 I jocnswvrcsavesscasswcesoceacaaaasd $oeccccas| <——-———-—-—-——-—¢-——c‘-—--——-—--—-—--—’- AP SIGNAL VECTOR | {eosanccccsscncnnscacnenvecaecwceawp DL L L | MECHANISM VECTOR { ’----------o--------------------+ | i The i | 0 | | ' | | | values contained 00000002 the 0 0 the the number VECTOR of MECHANISM ADDRESS longwords that VECTOR == a to the pointer to first the . | | | ¢pevccescnanccwrssscsenaracnecnsess toecc=)| 00000004 | PO | PSP TN INETRNCTNTOVODTRTTRNGD RSP STACK FRAME ADDRESS | +--.------'.--------------------* | | DEPTH COUNT | RO I +-------------------------------+ I are: follow in R1 | +-------------------------------* longword first the MECHANISM ARRAY. | ARRAY ADDRESS ARRAY, SIGNAL VECTOR == a pointer of the SIGNAL ARRAY, of [ == VECTUOR in MECHRANISM ARRAY longword 164 The o values contained in the MECHANISM ARRAY are: 00000004 == the number of longwords in tne MECHANISM ARRAY. In a MECHANISM the the stack value is always four. FRAME e« 0 DEPTH == the stack depth. (FFFFFFFD to FFFFFFFF) Look for this when tne Vector Array 1is not on the stack. 0 RO == © R1l == tne contents of R1 at the tine of the exception. contents of ;nis 0 tne add:gss ARRAY, of RO at the frame, time of the exception. SIGNAL ¢occvesccvacacscsscaccaveovevnenceaved cecscce) | NUMBER T Y YT | LYY Y OF Y Y LONGWORDS YL Y Y P L L J L Y L Y EXCEPTION CODE T ITYY PR YT XYY L e 2 i LYY S L T I UPTIUNAL ARGUMENTS J 00 03 S0 55 B 00 AP €D ET A3 FN BT G2 FO D (B €V B BV S TP KD KD 5D SV 9 €O B 49 6P P 49 WD ..-C---.-------,----.--flfi----QCQQ'- PRI TP Y PP Y I PP AR L L L LY PC LI R LD VL L | As P - an ARKAY 0 to 254 optional arguments can code go between and the the Exception §C. T | L PSL L L LD Ll DT : | Example: The values contained in the SIGNAL ARRAY for an Access Viclation Exception which caused a o ' 0000000S == the number of longwords contained in the SIGNAL ARRAY. For access violations tnis numper {s always 0 bBugchecCck are:? tive, EXCEPTION CODE == a code ' wnich icentifies the type of exception. 0 REASON MASK == tne longword wnose lowest three pits, 1f set, indicate that the instruction caused a Length Violation (oit 0), referenced the process page table (pit 1), and/or read/modify operation (bit 2), 0 VIRTUAL ADDRESS == the virtual tried to reference at the tire o PC == the Program Counter. 7The PC contains the address of the instruction that signaled the exception. 0 PSL == the processor status longword at the time ot the address tnat the systenm of the exception. exception, Signal arrays ciffer in length, f£rom 4 to 258 longworsds, depending on the kind 0of exception the system detects. See the VAX=11 Run Time Library Reterence Manual for details. - 165 The Signal Array contains more interesting information about the 1gchecx, The format of the Signal Array varies for different Bugchecks. 1@ Exception Code identifies what xind of error led to the Bugchecx, 1he rception Code indicates such errors as Access Violation, Opcode Reserved DEC, etc., Ffollowing the Exception Code are optional arguments. These .guments will vary in numoer and meaning for different Bugchecks., Next on the stack is the PC of tne instruction that would have been executed next, i1f an txception had not occurred. Once you have located the Exception Code enter the following on a running VAX/VMS system: within the Signal Array, -7 $ 8TT<Er> S EXIT $X<exception code><cr> ’ For access violations the EXCEPTION CODE is 0000000C. EXAMPLE? $§ 8TT<ce> $ LEXIT $X0C<cr> %SYSTEH-F-ACCVIO..access violation, reason mask=00, virtual address=0000000C, PC=7FFD3A%8, PSL=0004034 Now that you know wnat the Exception Coce means, you can look up a short explanation in tne VAX/VMS System Messages and Recovery Procedures Manual. For instance, continuing with the Access Violation example, you would looxup * ACCVIO ACCVIQ, on page 2=3 and find the following: access vioclation, reason masksxx, PC=location, PSL3XXXXXXXX Facility: VAX/VMS System virtual address=location, Services Explanation: An imnage attempted to read from memory location that is protected against tne or write to a current mode, This message indicates an exception condition and {is followed by a register and stack aump to help locate ) the error.,. User Action: Examine the PC and virtual address displayed in the message and checx the program listing to verify that instruction operands or procedure call arguments are correct, xanual " . The explanation given {in tne VAX/VMS System messages and Kecovery will give you an idea of what the software was attempting to do or a description of the Exception condition wnich led to the Bugcheck., The User Action may give you some i3dea of how to proceed in examining the crash dunp. Rememper that this manual was intended for programmers creating program errors and not for analyzing hardware failures, so some of the Explanations and User Actlions will tallure, not be approrriate to a hardware 166 NOow that you have some idea where the Bugcheck error was detected and wnat type of an error caused tne Bujcheck, you can attempt a bit of The above stack information may be avalilaole at the analysis using SDA. nsole or by using SDA and examining the stack,. Exactly how you proceed «-1th SDA will depend on your experience and the type of problem you are troubleshooting. For 1nstance. suppose you had an access violation caused by a length violation which led to a Bugcheck. 7The VA that failed can be found in the Signal Array. Try to examine this address using SDA, It _will Then probably not be possible because the page may not have been napped. check the process page table or system page table to tind out if the address is mapped and what protection exists. If the VA is an 800xxxxx value, then you can use the system map (SYS.MAP) and locate the VNS mogdule If the address is not mapped, it may indicate which contains the address. that tne program calculated the address incorrectly or dropped/picked a bit Iry to f£igure out what tne in the data paths because of a hardware error. address snould have been and if the VA that was generated is off by a From a single Maype one particular register dropped a bit. single oit. to a problem tne isolate to information enough nave ¢ailure you may not these 1In module. a swapping warrant to system the of area enough small cases it is better to wait tor additional crasnes and collect more intqrmation. Another possibility is that a device could cause an error, such as Be coastant interrupts, whicn could cause a system crasnh Or hang. especially suspicious of the system disk, MBA or Massbus if all of the tailures nappen while page faulting a page or swapping a process. A customer written device driver, or for that matter a DEC device If the VA or PC which cauyses the fallure ariver, could cause a Bugcnheckx. module which contains this address in the f£ind cannot you and is 800xxxxx the SYIS.MAP, then the address may be within a device driver or other V¥M$ coaponent such as KRMS. To £ind out if it is witnin & device driver, run The SHOW/DEVICES command will print out a list SYSGEN and SHOw /DEVICES. of address indicating where each device driver is loaded, and agdresses The ShOw where key structures within tne 1/0 data base can be found, the aadress that knowing Just used, be also could SDA under DEVICE command «nich caused the Bugcheck is associated with a particular device driver In the case of a suspected will give you some idea of where to start. customer written device driver, it would be wise to involve Software Support to nelp analyze the crash and look at the code of the device ariver, 167 BUGCHECK ANALYSIS NUMBER ONE Let’s try looking at an example of one BugchecX which was torced nardware error and see i{f we cCan determine where the problem lies. sx33 COMMENTS and SDA COMMANDS are SDA> SHOW indicated py "*" by xx3x CRASH SEXTXBEEETEEREE VAX/VMS System dump analyzer Dump taken on SSRYEXCEPT, Time 13=JUL=1981 Unexpected of system crashn: of systems Reason for BUGCHECK currently service 13=-JUL=1981 VAX/VMS Version Progcess 16:19:26.67 system 16:19:26.67 VERSION exception: executings exception V2,3 SSRVEXCEPT, Unexpected system neral IPL: exception SYSTEM Current image file name: _DRAOS[SYSEXEJDIRECTORY.EXE;3 Current service ¥* GETTING A DiRECIOR! (decimal) 0 registers: *%%3 THE s3xx MODIFIED $3%% TO RO R4 RS AP PSL Processor CONTENTS TAE BY OF THE BUGCHECK TFFEFE3S 80070EAQ TFFEF878 1FFECDS84 00000000 REGISIERS RO,R},SP, PC,& PSL HAVE BEEN THE PC IS PQINTING BUGCHECK HAnDLER. HANDLER FOR SYSTEM SERVICE EXCEPTION, R1 RS R9 FP 8000A122 7FFEAB38 R2 R6 JFFEF988 TJFFECD6C K10 Sp **xs x**= #**x» TFFEC200 TJEFEABEC TJFFEA790 R3 R7 R11 = = = TJFFEALGO 00000000 7FFEAZ10 TFFECD6C PC = 8&00O0A128 registers: POBR POLR PlLK 00000000 7F89B000 O01FFES7 SBR SLR 0007E400 00000700 . P1BR ISP KSP ESP 332 usp PCBB SCBB = = 0001A674 0007DA0OO ASTLVL -SISR ICCS = 00000004 = = 001850000 800000C1 80097000 8007F0Q00 TFFECD6C TJFEFEODBO TJFFEF818 TFFCC9C8 *x ** ACCS SBISC = = = 00008001 00040000 00000000 SBIMT = 00200200 SBIER = 00008002 SBIFS ICR = FFFFEE6B S8ITA = 20000601 TODR s SBIS s 00000000 ON THIS THIS IS 73BE01C0O SYSTEM, THIS 1S AN EMPTY THE CURRENT STACK *=* STACK *= 168 SDA> . SHOW PROCESS BZXEXEXZFEEXEXXEX Jcess Status ° 00040001 RES,PHDRES PCB address 80070EAQ JIB address PID PHO address State 00020016 80096600 CUR Subprocess count Swapfile disk address Termination mailbox Base priority 13 4o Mutex count 4 £001,004] 0 Master PID 00020016 4 Current priority waiting EF cluster Starting wait time ‘ - 0 1A180000 F7FFFFFF C8000001 00000000 Global cluster 2 pointer 00000060 Event tlag wait mask Local EF cluster ¢ Local EF cluster 1 Global cluster 3 pointer 00000000 8007A980 Creator PID 0000000¢ AST’s enabled " AST’s active AST’s remaining Buftered 1/0 count/linit Direct I/0 count/linmit BUFIO byte count/limit 0 00000000 0000 8 open files allowed left Timer entries allowed left Active page table count Process wS page count Global WS page count KESU " NONE 19 12/12 12/12 20480/20430 20 20 0 40 §5 169 A> SHOW STACK (EEETEIEIEL L rrent operating stack TJFFECD4C 7FFECDSO TFFECDS4 TFFECDSS JFFECDSC TFFECD6O 7FFECD64 TFFECD68 ~SP = 7FFECD6C TIFFECD70 TJFFECD74 7JFFECD78 TFFECD7C JFFECD80 JFFECDS84 TFFECDS8 7FFECDSC 7FFECD90 TFFECD94 JFFECD98 7FFECDIC TFFECDAO TFFECDA4 TFFECDA8 JFFECDAC TFFECDBO JFFECDB4 7FFECDBS 7FFECDBC 7FFECDCO 7FFECDC4 7FFECDCS 7FFECDCC 7FFECDDG JFFECDD4 7FFECDDS 7FFECDDC 7FFECDEO JFFECDE4 7FFECDES JFFECDEC 7FFECDFO JFFECDF4 JFFECDF8 TFFECDFC (KERNEL): 7FFEF988 TFFEA790 TFFEA210 TFFECDS84 TFFECD6C 1FFECD64 8000A128 00000000 00000000 00000000 1FFEA9S6 TFFECDCO 80000014 80011265 00000002 TFFECDA4 TFFECD90 00000004 TFFECDCO FFFFFFFE 00400005 T7FFeC000 00000005 00000444 00000000 80011A00 800119FD 00400000 80V0E39F 00000000 00CC0000 TFFEDDCS 1FFECDE4 80007658 00000000 TFFEAEQO TFFEABEC 00000000 00000000 00000000 TFFEDDCS TJFFEDDBO 8000A130 80000096 01800000 CTLSAG.CLIDATA+580 CTLSAGLCLIDATA CTLSGL.KSTKBAS+584 CTLSGL.KSTKBAS+56C CTLSGL.KSTKBAS+564 EXESEXCPIN+00G ' MMGSIMGACTBUF+156 CTLSGLLKSTKBAS+5CO SYSSCALL.HANDL+004 EXESREFLECT+14EL *%* THE VECTOR ARR. *** THE mMECHANISM *** *** THE NOw S1GNAL ARR FIND THE E CTILSGL.KSTKBAS+5A4 CTLSGLLKSTKBAS+590. {=====sSsS==2==S=3=ST=I=TITI=T CTLSGLLKSTKBAS+5C0 CTLSA.DISPVEC EXESIMGSTA+5C2 EXESIMGSTA+SBF EXESIAGACT+CAC CTLSGL.KSPINI+FCS CTLSGL.KSTKBAS+5E¢4 EXESCMKKkiL+018 MMGSIMGACTBUF+600 MMGSIMGACTBUF+vEC CTLSGLLASPINI+FCS CTLSGL.ASPINI+FB0 EXESEXCPTN+QCQE SYSSCMKKwL+006 ' 170 1f you have been following the crash so far, you should know that 5353 the Exception Code was a 444. Using the methoas shown earlier, you should nave been able to determine that the exception code indicates a PAGRDERK, Now looking that up in the VAX/VMS System Messages ana that is a PAGRDERR. Recovery Procedures Manual you would find the followings ®* PAGRDERR, page read error, reason masx=ix, virtual address=location, PC=location, Facility: PSL=XXXXXXXX VAX/VMS system services The system failed to read a page from aisk into Explanation: This message inaicates memory during a page fault operation. by a display of followed usually 1s and condition exception an the condition arguments, registers, and stack at the time of the exception. User Action: request, Check the status of the device and repeat the If the failure persists, notify the system manager,” Wwhile it Now what do you think would be a good area to examine? {s not possible from the information above to state conclusively that the Bygcheck was caused by a hardware fallure in the disk subsystem, thne This Bugcheck was in ine and then attempting offline/onl disk system g¢act caused by switching the was fairly Bugcheck this see, can you AS to perform a DIR command. If thnis straight forward and could be isolated to the daisk subsystem., Bugcneck occurred again and the hardware was available, you could look at the disk subsystem registers. You would £ind the Volume Valid bit reset. Froa this you would then be able to pursue the MBA or Disk drive to availaole evidence is pointing in that direction. determine why the Volume Valid bit was reset on the system disk, * : —cv—g——§-*Fop—'lnl;_‘lcbiall.‘luw.'———fm—.4|.[vN ).: |.wb ioo!!!SEE,wL2A% | _ 4 .: ! _“ ~v_ -Tx_ L.-LU blO—RB -BS|| TUTNSRNMNSSRSReU“i"PA RB = 11,(1011) _ON| B)-N _ C = 12.(1100) D = ” :‘— @ e l e t @ s e — l n l ' . ' l o l n u l b e = t y | s ' {.i ! ! _ .!! ”:. . A= 10.(1010) | I CHUKKIIEC L 13.01101) - - L= 14,0ty ] b § N ! J)e e Yy bV e t e — e —— com— e R e g e e e e — t—m—————— e : i BGold | i FPagse b pa 8] -1 w i Helr Frdnxt : : $m——————-— o UT1D0 Kewrza e o e o o e e S e itadale o : H i+ [N ] <« i rei -—§ 172 i o e e ee e 1+ e+ Del L Und L : Find + ‘ 1 et e + | Sect | Arrend | Del W i Command: Fill i Rerlece: Und W 1 Fom o e e Fr—————— Fmm—————— Fom—————— + i Advance! + e Hottom ¢ Tor | o o o e e trm—————— Fom ! Word ! EBackus Eol | ! ' ' H : iChnscase! Dlel Eoll Fro e etm—m————— e t Line H : P Cut ¢ Iel C ! Faste ! Und C ! e ————— tomm—————— + Char ! i Srecins. e e e e+ Select | ' Enter Subs | H H : Oren Line i Reset | : ———— e ——————— Fom ee tmm—————— + Backsrace [lelete Linefeed CTRL/A CTRL/7D CTRL/E CTRL/K CTRL/L CTRL/T CTRLAU CTRL/W CTRL/Z * Go to hegirmning of elete character [lelete to start of Comrute tab level lecresse tab level Incresse tsb level [efine Lkew Form feed Adjust tabs line word Ilelete to start of lirne Refresh screen Return to lime mode 173 EDNT Version 2 VUTS52 t-——————— tm—————— e : i1 H Gold i | : Hels i v e Fage | L Us : i Urnd L | : Rerlzce! ——— e ————— o v Del W ! Down | Find | Und W ! Sect | e e e e e Fm——————— tem—————— e Advance! i RBottom tom e ——— Fmmm————— Fr Bachkur | Tor | | | i Chrnigcssel Eol el t-——————— o : : Orern e o e o e e e+ el C ! Rizht Und C | Srecins! Eol! Cut | Left | Pa3ste | Arrend | ——— tmm— e ——S alededed L bt + Line e i Select | Enter | i | Subs | Reset e e o e $e e ——— tm—————— + Backsrace Go Ilelete [lelete character Linefeed [lelete to CTRL/A Comrute to heginminmg start tzb of line of word level CTRL/I [lecresse tsh level CTRL/E Increase tab level CTRLA/F Fill CTRL/K CTRL/L lefire lkew Form feed CTRLAT CTRLAU Aduust lelete CTRLA 4 CTRLAZ Fefresh screen FReturn to linme <« | e —————— t-—————— + | Line o e e+ ¥+ Command! Word : Frndmnxt i ¢ ——— N e it + el | H fmr————— o Kewrad text tabs to start of mode line 174 175 FOR INTERNAL USE ONLY KKK KKK IR KK KKK KK KKK KKK KKK KK KKK KKK KK KKK KKK KKK KKK KKk kkokk X THE INFORMATION IN THIS DOCUMENT IS SURJECT TO CHANGE WITHOUT X X NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL X X EQUIPMENT CORPORATION. DIGITAL EQUIPMENT CORFORATION ASSUMES X X NO RESPONSIBILITY FOR ANY ERRORS WHICH MAY APPEAR IN THIS .TEXT.X X PREPARED BY EDUCATIONAL SERVICES DEPARTMENT INSTRUCTORS OF X X KKK KK KKK ~ DIGITAL EQUIPMENT CORFPORATION X K KKK K KK KKK K KKK KKK KK KKK KK KKK K KKK KKK KKK KKK AR KR KK KKK K KKK FOR INTERNAL USE ONLY ANY SUGGESTIONS DIRECTED TO? OR COMMENTS CONCERNING THIS DOCUMENT DIGITAL EQUIFPMENT CORFORATION EDUCATIONAL SERVICES VAX 11/750 MAGIC ROOK 12 CROSBY DRIVE BRUO/ESS BEDFORDy MASSACHUSETTS 01730 OR CALL DTN-249-4497 (617) 276-4697 SHOULLD BE
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