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EK-CI780-UG-001
May 1983
42 pages
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Document:
CI780 User's Guide
Order Number:
EK-CI780-UG
Revision:
001
Pages:
42
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OCR Text
EX-CI780-UG-001 C1780 USER'S GUIDE Prepared by Educational Services of Digital Equipment Cormporation Copyright © 1983 by Digital Equipment Corporation All Rights Reserved The information in this document is subject 10 change without notice and should not be construed as a commitment by Digital Equipment Corporation. Digital Equipment Corporation assumes no responsibility for any errors that may appear in this document. Printed in USA. The manuscript for this book was created on a DIGITAL Word Processing System and, via a translation program, was sutomatically typeset on DIGITAL's DECset Integrated Publishing System. Book production was done by Educationsl Services Development and Publishing in South Lawrence, MA. The following are trademarks of Digital Equipment Corporation: mm DECiape Rainbow DECwriter DIBOL RSX UNIBUS DECnet MASSBUS VAX DECset PDP VMS DECsystem-10 DECSYSTEM-20 P/OS Professional VT Work Processor DATATRIEVE DECUS DEC DECmate RSTS TABLES CI7B0 SPeCifiCAtIONS ......oceooiiiiieeeierecciireste e es e et as e se e e ee e s tareseraans 1-4 Related Hardware and Software Document ..............cc.oooooiviiiiiiiiic e 1-5 Node Address SWitch SEtngS .............cceeeireveeieeceviieenririienecsnsereesseeeeesevsnens 2-19 SBI Address ASSIBNMENT ..........oooeiieeeirccrctvre v seeeere s eretes s Vereueseeisaneans B-1 SBI Configuration Register ........... eatesree i e ettt n e sae s re e cearenseareaan B-2 Port Maintenance Control and Status Register.............cccveveevevevveeneerineenns vevisernase B4 Maintenance AdAress REGISIET ..........c..ccrevieieceeiercceiecresesree s e s sassevenns B-6 Port Status REISLET ........c.cooiiiiiiriiiccirrrees e er e eae erererreeareaes e BT Port Error Status Regster ............oviiiiiiiiiier et saenas B-8 Port Parameter REGISIEr ...........uviiiiiiieiiececee e eeee e v cer e s e s B-10 CHAPTER 1 INTRODUCTION 1.1 THE COMPUTER INTERCONNECT The Computer Interconnect (C1) is a high-speed, serial data bus used to link computer subsystems (nodes) to form a CI cluster. Typically, the cluster is confined to a computer room environment. Nodes may consist of CPUs, memory, and intelligent mass storage, communication, and data acquisition subsystems. Features of the ClI include: Dual signal paths capable of simultaneoiis operation 70 megabit/sec path bandwidth Low error rates Packet-oniented transmission Immediately acknowledges successful packet receipt Contention arbitration (light loading) Round-robin arbitration (heavy loading) Each node within a CI cluster connects to the CI via an interface that provides two separate signal paths (Figure 1-1). Dual paths provide a high degree of data availability between nodes. One pair of nodes can communicate over one path (path A), while another pair of nodes communicates over the second path (path B). A single CI path consists of a pair of bus cables {one for transmit, one for receive). These cables connect a node and the signal distribution coupler for that path. For each path, a central Star Coupler (SC008) receives the data transmitted by a node and distributes this data to the other nodes within the cluster. VAX T T R e——] STAR COUPLER A i 117780 | 180 T R T R VAX [&] — J1 VAX 780 | 11/780 11 1i 11 STAR COUPLER B JT 1 1111 T A T R [o] o 11/780 | 180 VAX 780 | 1177280 T T P R T Figure 1-1 4-Node CI Cluster 1-1 8182 1.2 THE CI1780 INTERFACE The C1780 interface connects the Synchronous Backplane Interface (SBI) of a host VAX-11/780 system to the CI (Figure 1-2). NOTE References to VAX-11/780 imply the VAX-11/782 Primary Processor. The CI780 is an intelligent interface that functions as a buffered communications port. It uses the queue structures provided under the VAX/VMS operating system to transfer messages and blocks of data between the host system's memory and other nodes within the CI cluster. By providing the necessary data buffering, address translation, and serial encoding/decoding, the CI780 reduces the amount of overhead software processing required to complete typical high-level intercomputer communications. The C1780 may be inctalled in any 4 inch option slot in either the standard CPU cabinet or H9602-H SBI expansion cabinet of the host system. It consists of the following major components: Four extended hex “L” series module: padhodi s B ¢ ® Link Interface Module (IL1) LO100 Packet Buffer Module (IPB) L0101 Data Path Module (IDP) L0102 SBI Interface Module (ISI) L0104 Pressed pin backplane (P/N 70 17654) VAX 11/780 MEMORY ADAPTER UNIBUS _ © ADAPTER " MASSBUS ADAPTER I 1780 i TX/RX A TxRxe . ][ COUPLER A .t & STAR COUPLE R B T TEgidt Figure 1-2 Typical C1780 Connection 1-2 . e H7100 power supply with H7101 -5 V regulator (P/N 70 14956) e TX/RX cable sets (2) with attached bulkhead connectors (P/N 70 18527) NOTE C1 bus cables and SCO08 Star Couplers are separate options. They are not a part of the C1780 Interface option. Figure 1-3 shows the module-level block diagram of the C1780. For the CI780 to operate correctly, the host VAX-11/780 system must have: 1. 2. 3. . Hardware at revision leve! 4 or higher. Two (2) MBytes or more of memory installed. VAX/VMS software version 3.1 or higher installed. sai DATA PACKET LINK MODULE MODULE MODULE INTERFACE PATH L0104 Lo102 MODULE BUFFER LO10Y —. TXPATH A INTERFACE j#—————RX PATH A L0100 fms TX PATH B g RX PATH B R8I0 Figure 1-3 CI780 Block Diagram 1.3 CI1780 SPECIFICATIONS The C1780 specifications are outlined in Table 1-1. Table 1-1 CI780 Specifications Specification Description Data Format Manchester encoded serial packets Data Transfer Rate 5 MB/Sec maximum Data Throughput 3 MB/Sec sustained Modes Uninitialized SBI Priority Level TRI14 Uninitialized/Maintenance Disabled Disabled/Maintenance Enabled Enabled /Maintenance BR4 Half-duplex - BNCIA-XX shiclded coaxial cables, 45 meters CI Cluster Cabling (148 feet) maximum radius from coupler Power +5 V at 48.3A nominal -5.2 V at 10A nominal 10° C 10 40° C (50° F to 104° F) with a temperature gradient of Operating Temperature 20° C/hour (36° F/hour) Range Operating Relative 10% to 90% with a wet bulb temperature of 28° C (82°F), and a Humidity Range minimum dew point of 2° C (36° F) Operating Altitude Sea level to 2400 meters (8000 ft) Range 1.4 Derate the maximum allowable operating temperature by 1.8° C/1000 meters (1° F/1000 feet) for operation above sca level RELATED DOCUMENTS Table 1-2 lists the documents related to this guide. Table 1-2 Related Hardware and Software Documents Title Document Numbers CI780 Technical Description EK-CI1780-TD-00! SC008 S1ar Coupler User's Guide EK-SC008-UG-00! VAX-11/780 System Insiallation Manual EK-SI780-IN-002 1-4 DIGITAL personnel may order hardcopy documents from: Digital Equipment Corporation 444 Whitney Street Northboro, MA. 01532 Attn: Publishing and Circulation Services (NRQ3/W3) Order Processing Section Customers may order hardware documents from: Digital Equipment Corporation Accessories and Supplies Group Cotton Road Nashua, New Hampshire 03060 For information call: 1-800-257-1710 1-5 CHAPTER 2 INSTALLATION 2.1 INTRODUCTION The installation procedure for the C1780 requires: . . 1. Unpacking and inspecting the components 2. Mounting the components in either of the following cabinets: e ® The standard VAX-11/780 CPU cabinet The H9602-H SBI expansion cabinet 3. Connecting the components 4. Configuring the jumpers and switches 2.2 UNPACKING AND INSPECTING THE CI780 The CI780 is packaged for shipment in two cardboard containers placed on a wooden pallet and covered with a single outer carton (see Figure 2-1). The outer carton is secured to the pallet with two shipping straps. ‘ 1. Cut the shipping straps and remove the cuter carton. 2. Check each of the two inner containers for external damage such as dents, holes, or crushed corners. 3. Ncufy your DIGITAL Representative of any damage and list it on the appropriate installation report form. Clarify the extent of the damage. 4. Make sure the containers are sealed. NOTE Any opened containers should be called to the attention of the customer and documented on the appropriate installation report form. 5. Open the two containers and check their contents against the packing list (Figure 2-2). NOTE Packing materials such as foam fillers and piastic inserts should be retained if reshipment is . contemplated. Notify your DIGITAL Representative of any missing or incorrect items. 2-1 \ OUTER /CARTON el | | e A /T SHIPPING POWER SUPPLY CONTAINER 4 BACKPLANE CONTAINER SHIPPING PALLET TRE78a Figure 2-1 C1780 Quter Packaging BACKPLANE ASSEMBLY MODULE UTILIZATION LABEL MISC. HARDWARE e Figure 2-2 C1780 Backplane Container Arrangement 2-2 | | 6. . Inspect each component for damage such as scratches, dents, or breaks. Report any damage 10 shipping and record it on the appropriate installation report form. Notify your DIGITAL Representative of any damaged components that require immediate replacement. 2.3 MOUNTING THE C1780 IN THE CPU CABINET The following paragraphs describe the procedure for mounting the CI780 components in the standard VAX-11/780 CPU cabinet. Connecting the C1780 components is described in Section 2.5. 2.3.1 Turning Off the System and Removing AC Power NOTE Check with the system manager before shutting the system down, To turn off the system, and remove power, perform the following (Figure 2-3): 1. 2. Shut down the system from the console terminal. a. b. Login to the “SYSTEMTM account. Type @SYSSSYSTEM:SHUTDOWN. c. Answer any questions asked by the program. Set the front panel keyswitch to the OFF position. LOCAL LOCAL REMOTE DISABLE DISABLE @ SET KEYSWITCH U | gy mnnu mmn - ar i Wiy 1) ) il e N SET MAIN POWER llllll:::: :::::: DISCONNECT CIRCUIT BREAKER PRIMARY TO OFF (DOWN) POWER CABLE FROM OUTLET SHUTDOWN SYSTEM FROM CONSQLE TERMINAL TK87TQ Figure 2.3 VAX-11/780 System Turn-off 2-3 3. Set the main power circuit breaker to the OFF (down) position. 4. Disconnect the primary power cable from its outlet. ' 2.3.2 Mounting The C1780 Power Supply (H7100 with H7101 -5 V Regulator) NOTE If the C1780 will share a power supply with another VAX-11/780 option, then the H7100 with the H7101 -5 V regulator (P/iN 7014956) MUST be the power supply used. Retnove the existing option power supply in step 2 below. To mount the C1780 Power Supply (Figure 2-4): 1. Open the front and back CPU cabinet covers. 2. Remove the option power supply blank panel. a. From the front, remove the screw at the top center of the blank power supply panel. b. From the back, release the mounting chassis slide lock from the locking pin at the bottom ¢. 3. of the blank power supply panel. From the fronmt, slide the blank power supply panel out of the mounting chassis. Carefully slide the H7100 power supply (P/N 7014956) into the empty slot from the front. Be sure to align the rear locking pin of the power supply with the hole at the back of the mounting chassis. 4. Secure the back of the power supply to the chassis by engaging the mounting chassis slide lock 5. Secure the front of the power supply to the chassis with an 8 X 32 screw supplied. 2.3.3 over the power supply locking pin. Mounting The CI780 Backplane Assembly To mount the CI780 Backplane Assembly: I. From the back, remove and save the six 12* SBI jumper cables (P/N 1700087-01) connecting J1 through J6 of the System Far End Terminator (SFT) to J1 through J6 of the adjacent backplane to the right of the SFT. NOTE These cables will be used to connect the CI780 backplane assembly to the SFT in Section 2.5. 2. Remove the blank panel from the next empty 4* option slot (Figure 2-4). a. b. From the front, remove the four screws holding the blank panel to the bottom of the chassis. From the back, remove the two screws holding the blank panel to the top of the chassis. c. From the back, slide the blank panel out of the chassis. 2-4 ‘ 4" OPTION SLOTS ; @ POWER @ POWER @ SUPPLY vy POWER ISUPPLY [SuPPLY |FOR FLOAT PT SUPPLY \ POWER |FOR CPU |FORCPU ////// |MEMORY TIME-OF-YEAR CLOCK BATTERY % ) ZA \ MEMORY BATTERY BACKUP N (OPTION) LSH-11 OPTION POWER SUPPLY PANEL ono FRONT VIEW POWER SUPPLY REAR VIEW MOUNTING CHASSIS SLIDE LOCK TAaTYa Figure 2-4 CPU Cabinet Option Mounting Details Carefully slide the C1780 backplane assembly (P/N 7017654) into the empty slot from the back of the cabinet. Secure the backplane assembly to the front and back of the chassis using four 8 X 2 screws. Locate the C1780 Module Utilization Label (P/N 3618809-01) and remove its paper backing. From the front, place the label on the inside of the left vertical cabinet channel (Figure 2-11). 2.4 MOUNTING THE CI780 IN THE H9602-H SBI EXPANSION CABINET The following paragraphs describe the procedure for mounting the CI780 components in the H9602-H SBI expansion cabinet. The procedure for connecting the C1780 components is described in Section 2.5. Turning Off the System and Removing AC Power 2.4.1 NOTE Check with the system manager before shutting down the system. To turn off the system and remove power (Figure 2-3): Shut down the system from the consoic terminal. a. b. ¢. Login to the “SYSTEM” account. Type @SYSSSYSTEM:SHUTDOWN. Answer any questions asked by the program. 2. Set the front panel keyswitch to the OFF position. 3. Set the main power circuit breaker to the OFF (down) position. 4. Disconnect the primary power cable from the outlet. 2.4.2 Mounting the C1780 Power Supply (H7100 with H7101 -5 V Regulator) NOTE If the CI1780 is to share a power supply with another VAX 11/780 option, then the H7100 with the H7101 -5V regulator (P/N 7014956) MUST be the power supply used. Remove the existing option power supply in step 2 below. To mount the CI1780 Power Supply: 1. Open the front and back expansion cabinet covers. 2. Remove the blank power supply panel from the next empty power supply slot (Figure 2-5). a. b. From the front, remove the screw at the top center of the blank power supply panel. From the back, release the mounting chassis slide lock from the locking pin at the bottom of the blank power supply panel. c. From the front, slide the blank power supply panel out of the mounting chassis. Carefully slide the H7100 power supply (P/N 7014956) into the empty slot from the front. Be sure to align the rear locking pin of the power supply with the hole at the back of the mounting chassis. Secure the back of the power supply to the chassis by engaging the mounting chassis slide lock over the power supply locking pin. Secure the front of the power supply to the chassis with an 8 x 32 screw. 2-6 ~INimjeln]o HEEREREE d fwd | ad} ad | od | =t inlow{iunln|ln ZlZzlzlzZiZz|2 518/5]5|8|8 AN H7100 INSTALLED AS - - &POWER SS [POWER POWER SUPPLY NO.1 BECOMES DEDICATED ola o{SUPPLYSUPPLY TO OPTION SLOTS 1, 2, AND 3 SLOT NO.1 [siLOT INO.2 HP602 FRONT VIEW AN H7100 INSTALLED AS POWER SUPPLY NO.2 BECOMES DEDICATED TO OPTION SLOTS 4, 5, AND 6 [FTalml<]lo .u_: SEEEEE C1780 BACKPLANE MUST BE INSTALLED IN 5LOT 20R 3 IF H7100 INSTALLED AS alalalala @ 51616156158(8 ElE|EIEIEIE POWER SUPPLY NO.1 §|515|5|5|s - UPPLYJSUPPLY] [stot ~*lsLor NO.1 INO.2 HO602 FRONT VIEW Te 8172 OPTION SLOT 6 OPTIONSLOT S POWER EUPPLY] LOT 0.2 N POWER SUPPLY SLOT NO. 1 OPTION SLOT 4 OPTION SLOT 2 OPTIONSLOT 3 OPTION SLOT 1 r v A CI780 BACKPLANE MUST BE INSTALLED INSLOT40RS IF H7100 INSTALLED AS POWER SUPPLY NO. 2 HA602 FRONT VIEW a3 Figure 2-5 Expansion Cabinet Option Mounting Details 2-7 2.4.3 Relocating the System Far End Terminator (SFT) From the back of the cabinet: Remove and save the six 12* SBI jumper cables (P/N 1700087-01) connecting J1 through J6 of the System Far End Terminator (SFT) to J1 through J6 of the adjacent backplane to the right of the SFT. These cables will be me]:(t):Econnect the CI780 backplane assembly to the SFT in Section 2.5. Disconnect the cable harness plugs from J7, J8, and J9 on the lower portion of the SFT. Remove and save the ten screws that hold the SFT to the blank panel. Remove the SFT from the blank panel. Mount the SFT on a blank panel to the left of the 4* option slot that will contain the CI780 backplane assembly (Figure 2-5). Secure the relocated SFT to the blank panel using the ten screws saved in step 3. Connect plugs P7, P8, and P9 from the cabinet cable harness to J7, J8, and J9 on the SFT. 2.4.4 Mounting the C1780 Backplane Assembly To mount the CI780 Backplane Assembly: 1. Remove the blank panel from the 4 inch option slot that will contain the backplane assembly (Figure 2-5). a. From the front, remove the four screws holding the blank panel to the bottom of the chassis. b. From the back, remove the two screws holding the blank panel to the top of the chassis. c. From the back, slide the blank panel out of the chassis. Carefully slide the C1780 backplane assembly (P/N 7017654) into the empty slot from the back of the cabinet. Secure the backplane assembly to the front and back of the chassis using four 8 x 32. 2.5 4 Locate the C1780 module utilization label (P/N 3618809-01) and remove its paper backing. 5. From the front, place the label on the inside of the left vertical cabinet channel (Figure 2-12). CONNECTING THE C1780 Connect the C1780 components using the procedures in the following paragraphs. The procedure for configuring the C1780 jumpers and switches is described in Section 2.6. 2-8 2.5.1 Counecting the H7100 Power Supply To connect the H7100 Power Supply: Remove the exhaust plenum from the lower rear portion of the cabinet. 1. a. At the upper corners of the plenum, loosen the two captive thumb screws holding the plenum mounting brackets to the cabinet braces. b. Lift the plenum up and toward the rear to release the pins holding it to the lower cabinet braces. Locate the male end of the power supply AC power cable, and check that it is plugged into a switched outlet on the power controller (Figure 2-6). Locate and connect the female end of the power cable into J1 on the front of the power supply (Figure 2-7). ‘— SWITCHED OUTLETS UNSWITCHED SHUTDOWN TOTAL L UNSWITCHED OUTLETS SWITCHED SHUTDOWN snumown _ © DEC POWER CONTROL BUS ® ® (eSS 13 an) @ L L @ @ B t ,_12_'1 l ® @m PrASE 1 8 / fls rrast 2 L] gm ] SWITCHED QUTLETS 8890 SWITCHED OUTLETS PHAJE ? [} v-u\:E:]L— 7/ ] UNSWITCHED OUTLETS TR8TIS Figure 2-6 869B/869D Power Controllers (Rear Views! 2-9 ol © rower noRMAL H7100A O rLue v recuLaToR FaLURE 124 T2 2 O oven curnent O over voutace ‘gmg’ @ POWER INVERTER FAILURE @ OVER TEMP ® @ - H7100 POWER SUPPLY ) C WITH H7101 REGULATOR BOARD )8 15 PIN CONN -6V 830 AMPS m o900 EMP @ & +2 Q < < hd F3 k. [ 3 m - OUTPUT BUS YoV @ 75 wps BATTERY ADAPTOR TK-004 * Figure 2-7 4. * H7100 Power Supply (Front View) TMwarnm Figure 2-8 H7100 Power Supply (Rear View) Perform the following cable connections at the back of the power supply (Figure 2-8). a. Secure the two BLACK cables (P/N 7014249-0L) from the backplane assembly to the RETURN terminals on the left side of the power supply output bus using two 10 x 32 screws and lock washers. b. Secure the two RED cables (P/N 7014530-0L) from the backplane assembly to the +5V terminals on the RIGHT side of the power supply output bus using two 10 X 32 screws and lock washers. CAUTION Incorrect connection of the +5V (red) and return (black) power cables will cause serious damage to the components on the C1780 modules. c. d. Connect P6 on the ~5V cable (P/N 7018524-1F) to J6 (15-pin connector) on the power supply. Connect P1 on the AC LOW/DC LOW cable (P/N 7014212-0M) t0 J3 on the power supply. 2-10 2.5.2 e. Connect the OVER TEMP cable (P/N 7014213-0K) from J4 on the C1780 power supply to J4 on the next option power supply (if present). f. Locate and connect the cabinet harness OVER TEMP cable (P/N 7014213-4A in CPU cabinet, P/N 7016001-4A in H9602-H expansion cabinet) to J5 on the power supply. Connecting the C1780 Backplane Assembly NOTE All cable connections are made at the rear of the backplane. To connect the C1780 Backplane Assembly (Figures 2-9 and 2-10): 1. Connect P16 on the =5 V cable (P/N 7018524-1F) from the power supply to J16 on the backplane. 2. Connect P2 on the AC LOW/DC LOW cable (P/N 7014212-0M) from the power supply to 3. Locate and connect P3 (plug number may vary depending on the option slot) on the —5 V cabinet cable harness (P/N 7015073-00 in CPU cabinet, P/N 7015630-00 in H9602-H cabinet) to J15 on the backplane. 4. Connect six 4 inch SBI jumper cables (P/N 1700087-00) from J7 through J12 on the C1780 backplane to J1 through J6 on the adjacent backplane to the right of the CI780. J13 on the backplane. CAUTION Always connect SBI jumper cables with the “SIGNAL?” label on the outside of the loop. NOTE If the CI780 is the first option installed in an H9602-H cabinet, use the 18“ SBI jumper cables (P/N 1700087-03) supplied with the H9602-H cabinet when performing step 4. 5. 2.5.3 Connect the six 12 inch SBI jumper cables (P/N 1700087-01) removed in paragraphs 2.3.3 or 2.4.3, from J1 through J6 on the C1780 backplane to J1 through J6 on the SFT. Connecting the CI780 TX/RX Bulkhead Cable Assemblies Two sets of TX/RX bulkhead cable assemblies are supplied with the CI1780: one set for signal path A (P/N 7018527-00), and the other for signal path B (P/N 7017527-01). These cables should be routed and connected from the back of the cabinet. 1. Mount the bulkhead connector plate of each cable assembly, from the inside, to the MASSBUS cutouts on the I/0 panel at the bottom of the cabinet. Refer to Figure 2-11 (CPU cabinet) or Figure 2-12 (H9602-H expansion cabinet) for details. a. Secure the TX/RX B bulkhead connector plaie to the first available cutout on the right b. Secure the TX/RX A bulkhead connector plate to the next adjacent cutout on the left using four 6 X 32 screws. side of the panel using four 6 X 32 screws. 2-11 7Y2 L1 TP iA I D I I (S a8L1d <!o Q <|wm| P 145 2-12 © . J17 aF ~ n n ) 4 a2 8 | ] 7 =i ) » D C Py pd i 1o - haud 2 Ji8 TM e ® 5 39 J1t TA® - hed D 58 C R@3 - o ‘ ] g 2 J20 OJa| | n2 m RA @ = 1 — N3 415 N4 fo [oh 2lol2 |of >»—-asf alofa | 5y AN Figure 2-10 CI780 Backplane Connectors Route the four coaxial cables up through the cabinet cable ways to the backplane. Take care to avoid any sharp bends, kinks, or twists in the cables (Figure 2-11 or 2-12). Place a P-clamp over each cable, just behind the pin plug on the end, and carefully insert the plug into the proper jack on the backplane (Figure 2-10). Gradually push the cable plug into the an o jack until it is secured by the detent lock. Transmit B (TB) to J18 on the backplane. Transmit A (TA) to J19 on the backplane. Receive B (RB) to J20 on the backplane. Receive A (RA) to J21 on the backplane. 2-13 C1780 BACKPLANE . 77 v SFT CI780 MODULE UTILIZATION ‘ LABEL oo POWER | squv\ ‘ | 1i ] ' y R ! ‘ 1 ‘ by 2 fi " n ‘ / R "‘ e REAR VIEW 170 CONN PANEL ey CUTOUTS SIGNAL CABLES ! ' \-.‘ ) o TRANS A TRANS B RECV A RECV B ) €1780 o o o CABLE ASSEMBLY BULKHEAD CONNECTORS TX3788 Figure 2-11 CPU Cabinet Cable Assembly Connection Details 2-14 OPTION SLOT 4 OPTION SLOTS CI780 MODULE UTILIZATION LABEL SFT C1780 CABLE ROUTING IF OPTION MOUNTE D~ IN SLOT 5. Ci780 CABLE ROUTING IF OPTION MOUNTED IN SLOT2 30R 4. H7100 LOCATION=—"" tF OPTION MOUNTED IN SLOT4O0RS H7100 LOCATION 1F OPTION MOUNTED INSLOT20R 3. O 1/0 PANEL 310J9 48 J7 U6 J5 4 I3 J2 il —— MASSBUS CuTOUTS o} TRANS A TRANS B RECV A RECV B o O Q o) CABLE ASSEMBLY BULKHEAD CONNECTORS TR B89 Figure 2-12 Expansion Cabinet Cable Assembly Connection Details 4. Secure the P-clamp on each cable to the plastic cable support with a 10 X 32 screw, washer, and 5. Attach the exhaust plenum removed in paragraph 2.5.1 to the back of the cabinet. nut (Figure 2-13). 2.6 CONFIGURING THE CI1780 JUMPERS AND SWITCHES There are two types of jumpers on the C1780 backplane: ® A row of seventeen jumpers on header jack J17 that are used to select various hardware options via jumper plugs ® An additional wirewrap jumper located on slot 1, row C to connect the SBI interface logic to the desired TR arbitration level The C1780 is shipped with the backplane jumpers installed and slot CO1 pins wirewrapped for a single cluster configuration. This consists of one C1780 installed per VAX-11/780 system, set-up as follows: e e SBI TR Arbitration Level - 14 SBI BR Priority Level - 4 WASHE R P CLAMP I ,— 18 TA RB RA Az Lyum : I'__g 01 S W] PLASTIC CABLE SUPPORT BACK VIEW TR 3786 Figure 2-13 C1780 Backplane Cable Assembly Connection Deaails 2.6.1 Verifying the Backplane Jumper Configuration To verify the Backplane Jumper Configuration (Figure 2-14): 1. 2. Jumpers W2, W3, and W4 on J17 should be IN. All others should be OUT. Pin C01-53 should be wirewrapped to pin C01-87. NOTE For additional information on the backplane jumpers, refer to Appendix A. O - T SPSSESEEEEEEx233 ® ¢ 0 o & & & & & & ¢ v @ © & & ® o & 6 & & 9 O O O ° @ ¢ & —~— B e " & & & - 317 = 9 O - & A-\W“ 37 i Looed e C P J2 38 111l - TWINW J3 19 5 2 1 e s e e 4 5 7 & & @ o § B 1 9 1 o & - TM~ 10 J4 ~ ~ - N 85 s o 8§ g1 81 o o o 92 o 94 PIN BREAKOUT mm ) e m oo e ol 120 2 38.83 Oj4 | | 512 ~ J6 ~ s J19 2 \\ L4 TA® D 89 e o 80 SLOT €01 i - R8 & o 5 N o o B84 83 o J10 N« teem B7 — 4 L 5 j14 J2 R 13 Q\h—-RET o 202 0}3i0}3 1 [oh | ol { +5V T840 Figure 2-14 CI780 Backplane Jumper Pin Breakout 2-17 2.6.2 Configuring the Link Module Switches The switches on the Link Interface Module (LO100) provide the system with a unique node address within a Cl cluster. This address is typically a number from 0 to 15. To assign a node address, each of the two switch packs (S1 and S2) on the link module must be set to the binary value of the assigned number (Figure 2-15). Assign the system a node address. a. b. For CI780 installations that create a new CI cluster, assign a node address within the range of the number of CI1780s being installed. For CI780 instaliations that add a node to an existing CI cluster, determine the highest node address currently in use and assign the next higher sequential number. CAUTION Difficult to diagnose software failures will occur if two nodes in a cluster are assigned the same address. Without removing the link module from the CI780 backplane, set SI and S2 to the assigned address. The ON position of each switch represents a logic zero, and the OFF position a logic one (Table 2-1). a. b. Set S1-1 through S1-8 to the logic value of the assigned address. Set S2-1 through S2-8 to the logic value of the assigned address. SWITCHES SHOWN SET FOR NODE ADDRESS #3 o TMM F F (= I -] RN EIJ (1T <1 0 T = IR /0 “,l L0104 MODULE SLOT 1 \ s m Hs ‘ o N o L2 F L0102 MODULE SLOT #2 L0101 MODULE SLOT #3 | O EMPTY SLOT #4 =1 SLOT #6 [ ] BLANK MODULE E L0100 MODULE B . SLOT #6 »n TX-3767 Figure 2-15 Link Module Switch Details 2-18 . 3. Locate the correct node address identification label and remove its paper backing. This label is part of a set (P/N 3619264-17) shipped with the SC008 Star Coupler. NOTE Refer to the SC008 Star Coupler User’s Guide (EKSC008-UG-001) for additional information. 4. Place the label at eye level on the outside of the rear door of the cabinet which houses the CI780. Table 2-1 Node Address Switch Settings Node Address Node . . Number S8 S? S6 S§ -S4 S3 S? S1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 2 0 0 0 0 0 0 1 0 3 0 0 0 0 0 0 1 1 4 0 0 0 0 0 I 0 0 S 0 0 0 0 0 1 0 1 6 0 0 0 0 0 1 1 0 7 0 0 0 0 0 1 1 1 8 0 0 0 0 1 0 0 0 9 0 0 0 0 i 0 0 i 10 0 0 0 0 1 0 i 0 H 0 0 0 0 1 0 1 1 12 0 0 0 0 1 1 0 0 13 0 0 0 0 : i 0 1 14 0 0 0 0 1 1 1 0 15 0 0 0 0 1 | 1 I 0=ON 1 = OFF 2-19 CHAPTER 3 ACCEPTANCE TESTING 3.1 INTRODUCTION Acceptance testing of the CI780 is basically a two-step procedure: 1. The newly installed CI780 is operationally verified stand-alone (not connected to the CI). 2. The system is connected to the Computer Interconnect and operationally verified as a node within the CI cluster. Stand-alone verification consists of running the system microdiagnostics, which contain CI780 support, followed by the CI780 Level 3 diagnostics. Operational verification of the system within the Cl Cluster consists of: 1. Connecting the node to the CI and verifying the connection by running the CI Exerciser (CIE) program (EVXCI). 2. Running a copy of the User Environmental Test Package (UETP) on the node under test. NOTE If all VAX nodes within a CI cluster are being tested, UETP must be run on each node. 3.2 C1780 CHECK-OUT PROCEDURE (STAND-ALONE) To verify the CI780 installation: 1. 2. Power-up the system. Run the VAX-11/780 microdiagnostics. To determine if the C1780 is functioning properly, the following Level 3 diagnostic programs must be run. ESCGA - C1780 Repair Level Diagnostic | ESCGB - C1780 Repair Level Diagnostic 2 ESCGC - C1780 Repair Level Diagnostic 3 ESCGD - CI780 Repair Level Diagnostic 4 Before loading the diagnostics, make the following connections to the I/O connector panel at the back of the cabinet: 1. Using one of the attenuator pads (P/N 1219907-01) and two of the SC008 modularity cables (P/N 7018530-00) supplied in the CI780 CD Kit, connect the TRANSMIT A bulkhead connection to the RECEIVE A bulkhead connection. 3-1 2. Perform the same connection for path B using the other attenuator pad and two SC008 modalarity cables from the C1780 CD Kit to connect TRANSMIT B to RECEIVE B. — Use the following procedure to load the diagnostic programs into the system. Put the VAX-11/780 in a stable, halted condition. Initialize and unjam the SBI via the console commands. W INIT » UNJAM Load the Diagnostic Supervisor, ESSAA.EXE, via the command BOOT (or LOAD ESSAA.EXE/ST:FE00), from the diskette, or BOOT it from the system disk. Load the diagnostic program using LOAD ESCGA. Attach the device 10 be tested: DS) ATTACH C1780 SBI UNIT# (PAAO) TR (14) BR (4) NODE (0) Select the unit to be tested via the command SELECT (UNIT #). Set any desired supervisor flags. Start the diagnostic program. NOTE Diagnostics ESCGB and ESCGD contain manual intervention test sections. To run them once the diagnostic is loaded, type DS) START/SECTION:MANUAL and perform the required manual actions listed by the diagnostic printout. When running the diagnostics for the first time after installing the CI780, run them in ascending order from ESCGA to ESCGD and include the manual intervention test sections. After successfully running the four diagnostics, remove the attenuator pads and modularity cables from the 1/0 panel bulkhead connectors. 10. Locate the Cl bus cables (BNCIA-XX) and connect one end of each cable to the appropriate bulkhead connector. NOTE DO NOT unroll or route the CI bus cables at this time. Connect the two attenuator pads to the free ends of the CI cables. Be sure to connect TRANSMIT A to RECEIVE A and TRANSMIT B to RECEIVE B. 3-2 12. ‘ ' Run the EXTLOOP section of diagnestic ESCGD five times to test the Cl cables prior to routing and connecting them to the SC008 by typing: DS) START/SECTION:-MANUAL/PASS:5 3.3 13. Disconnect the Cl bus cables from the bulkhead and remove the two attenuators. 14. Carefully unroll, route, and connect the CI bus cables to the SC008 and the C1780 bulkhead. Refer to Section 2.4 of the SC008 Star Coupler User's Guide for the cable routing procedure. 15. Rerun the EXTLOOP section of diagnostic ESCGD five times to verify the cable connections. ON-LINF TESTING OF THE CI1780 AND THE C1 CLUSTER 1. Use the procedure described in Appendix C to update SYE with the SYE update kit supplied in the CI780 software box (BX-Q3113-TE) and the console floppy diskette with the CI780 microcode. . 2. Run the CI Exerciser program, EVXCI. Refer to the procedure Installing and Running the Ci Exerciser Software (AV-T311A-TE) supplied in the CI780 software box for operating instructions. 3. Run UETP on each VAX node where a CI1780 has been installed. Refer to the VAX/VMS UETP User's Guide (AA-D643C-TE) for operating instructions. 33 APPENDIX A BACKPLANE JUMPERS A.1 LONG TIMEOUT (W1) IN= 2048 SBI cycles OUT= 512 SBI cycles A.2 TR ARBITRATION LEVEL (W2, W3, W4, W7 and C01-53 Wirewrap) TR No. w2 w3 w7 W4 C01-53TO 1 2 3 ouT ouT OuUT OuT ouTt ouT ouT ouT IN ouT IN ouT C01-57 C01-63 Col1-62 5 6 ouT ouT IN IN ouT ouT OouT IN C01-69 C01-71 4 ouT OuUT IN IN 7 ouT IN IN ouT C01-73 8 ouT IN IN IN IN IN ouT OouT ouT OuUT IN ouT ouT IN IN IN C01-75 13 IN IN ouT ouT CO1-%6 14 IN IN ouT 9 10 11 12 15 IN IN IN OuT IN ouT IN . IN NOTE TR No. 0 is reserved as the HOLD line A.3 A4 C01-65 BR INTERRUPT PRIORITY LEVEL (W5 and Wé6) BR No. wé w5 4 ouT OouT 5 ouT IN 6 7 IN ouT IN IN PANIC MODE (W8) IN = Panic Mode Disabled OUT = Panic Mode Enabled A-1 OouUT Co1-77 CO1-81 C01-83 COI-85 C01-87 C01-88 A5 BOOT TIMER (W9, W10, W12, W13) Time (Sec) 1500 0000 W9 ouT ouT W13 OouT ouT w10 ouT ouT 0200 0300 0400 0500 0600 0700 0800 0900 1000 OuUT OouT OuT ouT ouT IN IN IN IN OouT IN IN IN IN ouT ouT ouT ouT IN ouT ouT IN IN OouT ouT IN IN 0100 1100 1200 1300 1400 ouT IN IN IN IN ouT IN IN IN IN A.6 RESERVED (W11) A.7 DISABLE ARBITRATION (W14) IN ouT ouT IN IN IN= Disable Normal Arbitration OUT= Allow Normal Arbitration A8 EXTEND HEADER/TRAILER (W15) IN= Extended Header/Trailer OUT= Normal Hrader/Trailer A9 ALTER DELTA TIME (W16) IN= Long Delta Time OUT= Short Delta Time A.10 EXTEND ACKNOWLEDGEMENT TIMEOUT (W17) IN= Long Timeout OUT= Short Timeout A-2 APPENDIX B CI780 REGISTER SUMMARY B.1 SBI REGISTER ADDRESS ASSIGNMENT The TR number selected for the CI780 determines which SBI addresses are assigned to the registers. To find the actual address of a register, add the byte offset specified for the desired register to the base address specified by TR number in Table B-1. The normal configuration for the CI780 is TR14. Table B-1 TR Number 30-Bit Physical Address 28-Bit SBI Address (Base 10) (Hex) (Hex) 1 2 2000 2060 2000 4000 2000 6000 800 0800 800 1000 800 1800 3 4 B.1.1 SBI Address Assignment 2000 8000 800 2000 5 6 2000 A00DO 2000 C000 800 2800 800 3000 7 2000 E0DO 800 3800 8 9 2001 0000 2001 2000 800 4000 800 4800 10 n 12 13 14 15 2001 4000 2001 6000 800 5000 800 5800 800 6000 800 6800 800 7000 800 7800 2001 8000 2003 A000 2001 C000 2001 E00O SBI Configuration Register (CNFGR) Byte offset = 0 Hex The CNFGR contains the SBI fault bits, port status bits, error bits, and the adaptor code for the CI780. This register 1s writable by longword only. It can be read by byte, word or longword reference. Any other mode of access results in error confirmation by the CI1780. Figure B-1 illustrates the register format. Each bit is described in Table B-2. B.1.2 Port Maintenance Control and Status Register (PMCSR) Byte offset = 4 or 10 Hex The PMCSR contains the port hardware error flags, interrupt and port initialization control bite Figure B-2 illustrates the register format. Each bit is described in Table B-3. BN 0N N NS5 MDD NN 20 19 W 17 W 165 4 13 127 %t 10 08 O OV OB O5 O4 O3 2 Ot O | J fefelrfr]r]efe]e] | el LI 1] Jofofelofof Ll | Jol ] Tefe] Y C1780 S8) ADAPTILR CODE CORRECTED POWER FAIL READ DATA DISABLE READ DATA TRANSMIT SUBSTITUTE COMMAND TRANSMIT ERROR DEAD e TRANSMIT — READ DATA FAIL TIMEQUT COMMAND TRANSMIT TIMEOUT —— POWER LP — POWER DOWN e TRANSMIT FAULT MULTIPLE TRANSMITTER FAULT —— UNEXPECTED READ DATA FAULT ~=— WRITE SEQUENCE FAULT L—-— PARITY FAULT asee Bit 3 Figure B-1 SBI Configuration Register Table B-2 SBI Configuration Register Function Description Parity Fault Set when the port has detected an SBI parity error. (PAR FLT) 30 29 28 27 26 Write Sequence Fault Set when the port receives a Write Mask or Interlock Write Mask command that (WSQ FLT) is not immediately followed by the cxpected write data. Unexpected Read Data Set when the port received read data and had not issued a Read Mask, Extended (URDFLT) Read or Interlock Read Mask command. Reserved Read as zero. Multiple Transmitter Set when port is transmitting information on the SBI and the ID bits transmitted Fault (MXT FLT) do not match the ID bits received. Transmit Fault Sct when the CI780 is the transmitter that asserts the SBI Fault line. (XMT FLT) 25:24 23 Reserved Read as zero. Power Down Indicates that the port is powering down. {PDN) 1. Set by assertion of ACLO when the port is in the uninitialized state. 2. Set by microcode control when the port is in the initialized state. 3. Cleared by writing a 1 to it, or when the Power Up bit sets. B-2 Table B-2 SBI Configuration Register (Cont) Bit Function Description 22 Power Up (PUP) Indicates that the por! has powered up 1. Set by the negation of AC LO 2. Cleared by writing a | to it, or when the Power Down bit sets. 21 Reserved Read as zero. 20 Command Transmit Timeout (CXTMO) Set when ro confirmation is received for a port-initiated SBI command transfer within 5§12 or 2048 SBI cycles (102.4 or 409.6 us). This count is jumper selectable 19 Read Data Timeout on the CI780 backplane. Set when the port initiates a SBI read command and receives no data within 512 (RDTO) SBI cycles (102.4 us). Command Transmit Error (CXTER) Set when the port receives an SBI error confirmation for a port-initiated SBI command. Read Data Substitute Set when the response 10 a port-initiated read command contains a read data sub- 16 Corrected Read Data {CRD) Set when the response to a port-initiated read command contains a corrected read data tag. 15:11 Reserved Read as zero. 10 Transmit Fail This bit is the input to the SB] FAIL driver and is set by the microcode. 18 17 (RDS) stitute 1ag. (T FAIL) 09 08 07:00 Transmit Dead (T DEAD) This bit is the input to the SBI DEAD dnver and is set by the microcode. Power Fail Disable When sct disables gateing Fail or Dead to the SBI. This enables the diagnostic to Adapter Code The CI780 adapter code equals 38 hex. (PFD) test the ability to generate these signals without affecting the SBI. B-3 16 15 4 3 2 11 3 08 08 07 08 05 04 W 2 O1 -l [T LI TP T TP T T T 1T PARITY ~J ERROA CONTROL STORE PARITY ERROR LOCAL STORE PARITY ERROR — RECEIVE BUFFER — PARITY ERROR TRANSMIT MULTIPLE =~ PARITY ERROR INPUT PARITY ——! ERRDR OQUTPUT PARITY o=l €RROR TAANSMIT BUFFER o PARITY ERROR UNINITIALIZED — STATE PROGRAMMABLE STARTING ADDRESS RESERVED — WRONG — PARITY MAINTENANCE INTERRUPT FLAG MAINTENANCE =~ —i INTERRUPT ENABLE MAINTENANCE = TIMER DISABLE MAINTENANCE =~ INITIALIZE TR Figure B-2 Port Maintenance Control and Status Register Table B-3 Port Maintenance Control and Status Register Bit Function Description li16 Rescrved Read as zero. Parity Error Set if any one or more of bits 8 through 14 are set. 1] (PB) 14 Conrol Store Parity Set by microcode when a parity error is detected in the control store RAM or Error (CSPE) PROM. Not used when the control store is accessed {from the SBI. 13 {.ocal Store Parity Error (LSPE) Set by microcode when a parity error is detected in the local store or VCDT. Not used when the local store is accessed from the SBI. 12 Receive Buffer Parity Error (RBPE) Set when a parity error is detected on the data path board while reading a receive buffer or transmit buffer (for loopback test) located on the packet buffer board. B-4 Table B-3 Port Maintenance Control and Status Register (Cont) Bit Fuactioa Description 1 Transmit Multiple Set when the link module detects a parity error in the data being transmitted. 10 Input Parity Error (IPE) Set when a parity error 1s detecied on a data transfer from the SBI transceivers to the Data Path board. Output Parity Error Set when a parity error is detected on a data transfer from the Data Path Transmit Buffer Parity Error (XBPE) Set when a parity error is detected while the link board is unloading the transmit buffer. Unitialized State Set when the port is in the Uninitialized state. The microcode is stopped and Programmable Starting Address (PSA) When set, the microcode will start at the address loaded in MADR when PICR is written with a “1" or a boot timeout occurs. When clear, the micro- 1)) 08 07 06 Parity Error (XMPE) {OPE) (UNIN) Board to the SBI transceivers. the port will not respond to CI traffic. This bit is read-only and is set by DEAD, PMCSR MIN, or PSR MTE. code will start at address 000 (in the PROM area). PSA is read/write and is cleared by DEAD or setting the MIN bit. 05 Reserved 04 Wrong Parity (WP) Set to generate and check for even parity on the Data Path board 1BUS. 03 Maintenance Interrupt Flag (MIP) When set, an interrupt has occurred and the PSR register is valid. This bit allows the diagnostic to operate the port with interrupts to the SBI disabled. 02 Maintenance Interrupt Enable (MIE) Interrupts are enabled when this bit is set. This bit is set by DC LO or by writing MIE with a one. It is cleared by setting the PMCSR MIN bit, SBI UNJAM, or by writing MIE with 0. 0l Maintenance Timer Disable (MTD) When set, the boot and sanity timers are disabled and cannot cause an imterrupt. When clear, the timers are enabled. Maintenance Initialize When set, an initialize signal is generated that clears all port errors and leaves 00 (MIN) the port in the uninitialized state. Setting this bit clears the PMCSR MIE bit, MIN is write-only and always reads as a zero. B.1.3 Maintenance Address Register (MADR) Byte Offset = 14 Hex The MADR is loaded with the address to be referenced in the port control store when initially loading the microcode or specifying the microcode starting address. Figure B-3 illustrates the register format. Each bit is described in Table B-4. 13 CONTROL STORE 12 v 10 SEGMENT SELECT RA —J BANK SELECT Maintenance Address Register B-5 0B 07 06 05 O4 03 02 0OV OO JEEEEEEEEEEERN MICROWORD Figure B-3 09 Y WORD SELECT A Table B4 Maintenance Address Register Bit Fuaction Description 313 Reserved Read as zero. 12 Al2 Selects a segment of the control store word. 0 = control store bits (31:00) 1 = control store bits (47:32) 11:10 9:0 B.1.4 All:A10 Selects a bank within the control store. A9:AD All AlO Bank Selected 0 0 i 1 0 1 0 1 0 (000-3FF PROM) 1 (400-7FF RAM) 2(800-BFF RAM) 3 (COO-FFF Reserved) Selects a word within the selected bank. Maintenance Data Register (MDATR) Byte Offset = 18 Hex The MDATR is used to access the contents of the control store location pointed to by the Maintenance Address Register. This register is used to initially load the port microcode. The MDATR register is both read and write accessible, bit is valid only when the port is in the uninitialized state. Figure B-4 illustrates the register format. B.1.5 Port Status Register (PSR) Byte Offset = 900 Hex NOTE The PSR is used by the port driver software and is only valid when the operational port microcode is loaded and running. 3 00 Ttz Figure B-4 Maintenance Data Register The PSR displays the cause of interrupts from the C1780. The PSR is read-only and writing to it can cause false interrupt indications to the Port Driver. Figure B-5 illustrates the register format; each bit is described in Table B-S. 07 (= 06 o] L MAINTENANCE ERROR 05 O4 03 02 0! 0O T 11T 11 ] SANITY TIMER EXPIRATION MEMORY SYSTEM ERROR DATA STRUCTURE ERROR PORT INITIALIZATION COMPLETE PORT DISABLE —— COMPLETE MESSAGE FREE — QUEUE EMPTY RESPONSE QUEUE ~ AVAILABLE TR A4 Bit 3 Function Maintenance Error (MTE) Figure B-5 Port Status Register ‘Table B-5 Port Status Register Description Set when the Port has detected an internal hardware failure. The exact error can be determined by reading the PMCSR and CNFGR. When set: 1. Port enters uninitialized state 2. Microcode is halted 3. An interrupt is generated (PSR (0:7) are invalid) 30:07 Reserved Read as zero 06 Sanity Timer Set when the Sanity or Boot timer has expired and the Port has entered the Uninitialized /Maintenance state. Memory System Error {MSE) Set when the Port has detected an uncorrectable data or non-existent memory error while accessing SBI memory. MSE can set as a result of CXTMO, 05 04 Expiration (SE) RDTO, CXTER or RDS in the CNFGR register. The PFAR register displays further information. Data Structure Error Set when the port encounters an ervor in a port data structure. Further infor- {DSE) mation can be found in the PFAR register. 03 Port Initialization Complete (PIC) When set indicates that the port has completed internal initialization and is the Disabled or Disabled/Maintenance state. 02 Port Disable Complete {PDC) When set the Port is disabled and ceases to process the command queues. The port will also cease to respond to incoming Cl transmissions (excepl maintenance class if enabled). The port is in the Disabled or Disabled/Maintenance state. 0l Message Free Queue Empty (MFQE) Set when Port attempted to remove an entry from the Message Free Queue and found it empty. 00 Response Queue Set when port has inserted an entry onto an empty response queue. Available (RQA) B-7 B.1.6 Port Failing Address Register (PFAR) Byte Offset = 938 Hex NOTE This register is used by the port driver software and is only valid when the operational port microcode is loaded and running. The PFAR register contains the memory address at which a failure occured after a MSE or DSE interrupt, or, after a response with buffer memory system error status. This address may be the exact address, an address in the same page as the failing address, or, in the case or DSE interrupts, and address in some part to the data structure. For DSE interrupts, PFAR contains a virtual address or offset; for MSE interrupts and buffer memory system errors, the PFAR contains a physicai address. PESR may contain further information about the contents of PFAR for DSE interrupts. Figure B-6 illustrates the register format. n L FAILING ADDRESS Figure B-6 B.1.7 J Port Failing Address Register Port Error Status Register (PESR) Byte Offset = 93C Hex NOTE This register is used by the port driver software and is only valid when the operational port microcode is loaded and running. The PESR register indicates which type of error resulted in a DSE interrupt. This register is read only by the port driver and is valid after a DSE interrupt. Table B-6 describes the contents of this register. Table B-6 Port Error Status Register Error Description Hex Code PFAR Coatents SYS_VA_FRM 1llega! system virtual address format (Bits (31:30) {) 10) } Virtual address Nonexistent system virtua! 2 Virtual address NX__SYS__VA address (VA(29:9) }= SPT_LEN) INV_SYs__PTE Invalid system PTE (Bits 3 {31.26,22) () 1 XX,000, or 001) INV_BLF__PTE Invahid buffer PTE (Bits 4 (31.26.22) () 1XX.000.001) NX_GLBL_Sva Virtual address (being mapped) PTE virtual address Nonexistent system global 5 virtual address (GPXT )= GPT__LEN) B-8 Virtual address . Table B-6 Port Error Status Register (Cont) Emor NX__GLBL__VA Description Hex Code Nonexistent buffer global 6 virtual address (GPTX )= GPT__LEN) PTE virtual address INV_SGLBL__PTE Invalid system global PTE PTE ({31,26,22) () 1 XX or 000) 7 INV_BGLBL_PTE Invalid buffer global PTE 8 Invalid system global PTE 9 Invalid buffer global PTE A INV_SGPTE_MAP INV_BGPTE_MAP PTE ({31,26,22) () 1 XX or 000) mapping. System virtual address of system globai PTE is globally mapped. mapping. System virtual address of buffer global PTE is globally PFAR Contents Virtual address PTE vinal address Virtual address PTE virwal address mapped. O_INTL_FAIL ILL_Q__ALIGN ILL_PQB__FRM REG_PROT__VIOL Queue interlock retry failure. B Queue head Hiegal queue offset alignment C Qucue head Nicgal PQB format. A field of D Register protocol violation. Register was written with wrong E Interlock was tested and found locked. (FLINK (2:1) () 0 or BLINK (2:1) (} 0) the PQP specified to be MBZ was found to be non-zero. value or under wrong conditions. B.1.8 virtual address Field offset in PQB in bytes Register byte offset from device base address Port Parameter Register (PPR) Byte Offset = 940 Hex NOTE This register is used by the port driver software and is only valid when the operational port microcode is loaded and running. The PPR is set up by microcode during the port initialization process and is valid in any state except the uninitialized state. This register displays the port number. Figure B-7 illustrates the register and Table B-7 describes the contents. B.1.9 Port Initialize Control Register (PICR) Byte Offset = 924 Hex The driver initializes the port and starts execution of the microcode by writing a 1 into bit (0) of the PICR. Figure B-8 illustrates the register format. B-9 * aonnonooos EODOS i A LENGTH = 3FD HEX PORY NUMBER SIZE = 0 e Figure B-7 Port Parameter Register Table B-7 Port Parameter Register Bit Function Description i) Size Initialized to zero, indicates 16 nodes maximum on the CL 30:28 Reserved Read as zero. 27:16 Length Indicates size of internal buffers and is preset to 3F9 hex. 15:8 Reserved Read as 0. 07:0 Port Number Indicates the CI node number selected by the switches on the ILI board. » oy e uez 0o ~J sty — e Figure B-8 Port Initialize Control Register B-10
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