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AH-8545D-MC

October 1985

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Document:	CZDMCD0 DMC11 DMC11 BSC W-R UPROC OCT 1985 bw
Order Number:	AH-8545D-MC
Revision:	000
Pages:	128
Original Filename:	CZDMCD0__DMC11__DMC11_BSC_W-R_UPROC__AH-8545D-MC__OCT_1985_bw.pdf

OCR Text

DMC11 BSC WR UPROC ~

CZDMCDO

AH-8545D-MC

10F1 OCT 1985

—

Eflfluflu
MADE IN USA

MACRO vV04.00

27-JUN-85 13:16:37 PAGE 1
REM

SEQ 1
1

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-

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-

S208C

IDENTIFICATION
PRODUCT CODE:

AC-8544D-MC

PRODUCT NAME:

CZDMCDO DMC11 BSC W/R UPROC

DATE:

17-JUN-1985

MAINTAINER:

MK NAC SOFTWARE ENGINEERING

AUTHOR:

BRUCE LUHRS

THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT
NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION.
OIGITAL EQUIPMENT CORPORATION ASSUMES
NO RESPONSIBILITY FOR ANY ERRORS THAT MAY APPEAR IN THIS
DOCUMENT.

NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF
SOFTWARE
ON
EQUIPMENT THAT IS NOT SUPPLIED BY DIGITAL OR
ITS
AFFILIATED
COMPANIES

1976,

1978,

1985 BY DIGITAL EQUIPMENT CORPORATION

caomc

ONONBUNFOO®IONDWN--GO®
N

WA+

DEDLELBDLDEEUWHEHNGWWRGIWMKKMLDLLLLN L LN L L T o Y o Y Y Y O Uy

NHOVRITNBUNN~OOD NIV ARG

MACRO v04.00

he-

SEQ 2

27-JUN-85 13:16:37 PAGE 2

ABSTRACT

THE FUNCTION OF

OPTION

THE DMC11 DIAGNOSTICS IS

OPERATES ACCORDING TO SPECIFICATIONS.

VERF1Y THAT

THERE ARE NO MALFUNCTIONS AND THE

OF THE DMC11 ARE CORRECT

IN ITS ENVIRONMENT.

PARAMETERS MUST BE SET UP TG

ALERT

THE

VERIFY

THAT

THE

THE DIAGNOSTICS

ALL

OPERATIONS

DIAGNOSTICS

THE

DMC11
CONFIGURATION,
THESE
PARAMETERS ARE CONTAINED IN THE
STATUS
TABLE
AND
ARE
GENERATED
IN
TWO
WAYS:
1)
MANUAL
INPUT - THE
OPERATOR
ANSWERS QUESTIONS.
2) AUTOSIZING - THE
PROGRAM DETERMINES THE PARAMETERS AUTOMATICALLY.

CZDMC TESTS THE DMC11 MICRO-PROCESSOR (M8200-YA OR
M82G0-YB).
IT
PERFORMS
WRITE/READ
TESTS
ON
THE DMC UNIBUS REGISTERS,
CHECKS THE MICRO-PROCESSOR OPERATION, CHECKS QUT MAIN
MEMORY,
SCRATCH
PAD
MEMORY,
THE ALU FUNCTIONS AS WELL AS INTERRUPTS

AND NPR OPERATION.
CZDMC PERFORMS NO TESTS ON THE
LINE
UNIT
OR
ANY CROM DEPENDENT TESTS.
IT DOES NOYT REQUIRE A LINE UNIT
TO RUN.
NOTE:
THIS DIAGNOSTIC WILL RUN ON A
KMC11
(M8204),
HOWEVER
IT
IS
NOT
ADVISED
THAT THIS DIAGNOSTIC BE USED TO

CHECK A KMC11, RATHER YOU SHOULD CHECK A KMC11 WITH THE
DIAGNOSTIC PACKAGE.

KMC11

CURRENTLY THERE ARE FIVE OFF LINE DIAGNOSTICS THAT ARE
TO
BE
RUN
IN
SEQUENCE
TO
INSURE THAT IF AN ERROR SHOULD OCCUR IT
WILL BE DETECTED AT AN EARLY STAGE.

NOTE:

ADDITIONAL DIAGNOSTICS MAY BE ADDED IN THE FUTURE.

THE FIVE DIAGNOSTICS ARE:

1.
2.

3.
4.
5.

CZDMC ([REV] BASIC W/R AND MICRO-PROCESSOR TESTS
CZDME [REV] DDCMP MODE LINE UNIT TESTS

DZDOMF [REV) BITSTUFF LINE UNIT TESTS
DZDMG [REV] JUMP AND CROM TESTS
DZDMHW [REV] FREE-RUNNING TESTS (HEAT TEST TAPE)

REQUIREMENTS

EQUIPMENT
ANY PDP11 FAMILY CPU (EXCEPT AN LSI-11) WITH MINIMUM 8K MEMORY
ASR 33 (OR EQUILIVALENT)
OMC11-AR (MB8200 YA OR A DMC11-AL (MB200-YB)

czome

SEQ 3

27-JUN-85 13:16:37 PAGE 3

2.2

STORAGE
PROGRAM WILL USE

ALL

MEMORY

EXCEPT

WHERE

ABL

AND

BOOTSTRAP
LOADER
RESIDE.
LOCATIONS 1500 THRU 1640;
CONTAIN
THE “STATUS TABLE~ INFORMATION WHICH IS GENERATED AT START
OF
DIAGNOSTICS
BY
MANUAL
INPUT
(QUESTIONS)
OR
AUTOMATICALLY

(AUTO-SIZING).

i et Pt Bt hn b g

OCNOUQGNMOOOQQUOWNO-

MACRO vO04.00

THIS AREA IS AN OVERLAY AREA AND SHOULD NOT BE

ALTERED BY THE OPERATOR.

LTADING PROCEDURE
METHOD

=2 0 4

ALL PROGRAMS ARE IN ABSOLUTE FORMAT AND ARE LOADED
USING
THE
ABSOLUTE LOADER.
NOTE: IF THE DIAGNOSTICS ARE ON A MEDIA SUCH
AS DISK ,MAGTAPE ,DECTAPE, OR
CASSETTE;
FOLLOW
INSTRUCTIONS

FOR

THE

MONITOR

MEDIA.

WHICH

HAS

BEEN

PROVIDED ON THAT SPECIFIC

OBDDLWUHLWWHNEWWHEDNDDDLND

ABSOLUTE LOADER STARTING ADDRESS %500
MEMORY
4K

8K
12K
16K
20K
24K
28K

& SIZE
17

37
57
77
117
137
157

3.1.1

PLACE ADDRESS OF ABS LOADER INTO SWITCH REGISTER.

3.1.2

DEPRESS

3.1.3

DEPRESS 'START KEY‘ ON CONSOLE AND RELEASE (PROGRAM SHOULD NOW
BE LOADING INTO CPU)

(ALSO PLACE ‘HALT'
'LOAD ADDRESS’

SW UP)

KEY ON CONSOLE AND RELEASE.

czomc

[)

VNAVAVNVIND
D0 0000 00 000l
Gl Ll Gl Gl RN
R DN D 2=+ =0 1t 0 3ot 1t 1ot 4n oo
N
NONBUINFOOENOUVPUNFHODOBVOVNIBWUN
O OB -JRWNE N+

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MACRO V04.90

27-JUN-85

SEQ 4

13:16:37 PAGE 4

STARTING PROCEDURE
A.
8.
C.

SET SWITCH REGISTER TO 000200
DEPRESS ‘LOAD ADDRESS' KEY AND RELEASE
SET SWR TO ZERO FOR *AUTO SIZING' OR SWR BITO=1 FOR MANUAL
INPUT (QUESTIONS) OR SWR BIT7=1 TO USE EXISTING PARAMETERS
SET UP BY A PREVIOUS
START
OR
A
PREVIOUSLY
RUN
DMCi1
DIAGNOSTIC.
DEPRESS 'START KEY' AND RELEASE.
THE
PROGRAM
WILL
TYPE
MAINDEC NAME AND PROGRAM NAME (IF THIS WAS THE FIRST START
UP OF THE PROGRAM) AND ALSO THE FOLLOWING:
MAP OF DMC11 STATUS

CSR

STAT1

001500 160010 145310
01510 160020 145320

STAT2

STAT3

177777
177777

000000
000000

THE PROGRAM WILL TYPE ‘R’ AND PROCEED TO RUN
THE
DIAGNOSTIC.
THE
ABOVE IS ONLY AN EXAMPLE.
THIS WOULD INDICATE THE STATUS
TABLE STARTING AT ADD.
1500 IN THE PROGRAM.
IN THIS
EXAMPLE
THE
TABLE CONTAINS THE INFORMATION AND STATUS OF TWO DMC11'’S.
THE STATUS TABLE MUST BE VERIFIED BY THE USER IF
AUTO
SIZING
52 PDONE.
FOR INFORMATION OF STATUS TABLE SEE SECTION 8.4 FOR
LP.

IF THE DIAGNOSTIC WAS STARTED WITH

PARAMETER

INPUT

THEN

THE

SW0O=1

INDICATING

MANUAL

FOLLOWING SHOWS AN EXAMPLE OF THE

QUESTIONS ASKED AND SOME EXAMPLE ANSWERS:
HOW MANY DMC11'S TO BE TESTED?1

01
CSR ADDRESS?160010
VECTOR ADDRESS?310
BR PRIORITY LEVEL?
(4,5,6,7)?5
DOES MICRO-PROCESSOR HAVE CRAM?
(Y OR NN
WHICH LINE UNIT?
1IF NONE TYPE “N”,
IF
M8201
M8202 TYPE “2*?1
IS THE LOOP BACK CONNECTOR ON?Y
SWITCH PAC#41 (DDCMP LINE#)?377
SWITCH PAC42 (BMB73 BOOT ADD)?377

TYPE

*i*,

1IF

FOLLOWING THE QUESTIONS THE
STATUS
MAP
IS
PRINTED
OUT
AS
DESCRIBED
ABOVE,
THE
INFORMATION
IN
THE
MAP REFLECTS THE
ANSWERS TO THE QUESTIONS.
IF THE DIAGNOSTIC WAS STARTED
WITH
SW00=0
AND
SK07=0
(AUTO-SIZING) THEN NO QUESTIONS ARE ASKED
AND ONLY THE STATUS-MAP IS PRINTED
OUT.
IF
AUTO-SIZING
1S
USED
THE
STATUS
INFORMATION
MUST BE VERIFIED TO BE CORRECT

(MATCH THE HARDWARE).
DIAGNOSTIC
MTMMUST
BE

ANSWERED.

IF IT DOES NOT MATCH THE
HARDWARE
THE
RESTARTED
WITH SWOO=1 AND THE QUESTIONS

czonc
58
59
60

62
63
64
65
66
67
68
69
70

71
72
73
74
75
76
77
78
79
80
81
82

83
84
85

MACRO V04.00

SEQ S

27-JUN-85 13:16:37 PAGE 4-1

4.1

CONTROL SWITCH SETTINGS
SW 15 SET:
SW 14 SET:

SW
SW
SW
SW
SW
SW
SW
SW

13
12
11
10
09
08
07
06

SET:
SET:
SET:
SET:
SET:
SET:
SET:
SET:

SW 05 SET:

SW 04 SET:

SW
SW
SW
SW

03
02
01
00

SET:
SET:
SET:
SET:

HALT ON ERROR
LOOP ON CURRENT TEST
INHIBIT ERROR PRINT QUT
INHIBIT TYPE OUT/ABELL ON ERROR.
INHIBIT ITERATIONS.
(QUICK PASS)
€ESCAPE TO NEXT TEST ON ERROR
LOOP WITH CURRENT DATA
CATCH ERROR AND LOOP ON IT
USE PREVIOUS STATUS TABLE.
HALT 1IN
ROMCLK
ROUTINE
BEFORE
CLOCKING
MICRO-PROCESSOR
RESERVED
RESERVED
RESELECT DMC11°'S DESIRED ACTIVE
LOCK ON SELECTED TEST
RESTART PROGRAM AT SELECTED TEST
BUILD NEW STATUS TABLE FROM QUESTIONS.
(IF SWO7=0
AND
SWO0=0
A
NEW
STATUS
TABLE
IS
BUILT BY
AUTO SIZING)

SWITCH 06 AND 08-15 ARE DYNAMIC AND CAN BE CHANGED
AS
NEEDED
WHILE THE DIAGNOSTIC IS RUNNING.
SWITCHES 00-03 AND SWITCH 07
AREG§3A¥IC. AND ARE USED ONLY ON STARTING
OR
RESTARTING
THE
DIAGNOSTIC.

b el ek L L L L Y R N Y VY Y VY VY XY ST YY) D Pt 10 b =t gt b ot Pt -t et
GOV NOVNLUNLOO®~IONS
R - OQO\IOM.O‘NPOQO\IOM&MNO‘

CczZomMC

| { Se—

MACRO V04.00

SEQ 6

27-JUN-85 13:16:37 PAGE S

4.1.2

SWITCH REGISTER OPTIONS (AT START WP)

SW 01

RESTART PROGRAM AT
SELECTED
TEST.
IT
IS
STRONGLY
SUGGESTED
THAT AT LEAST ONE PASS HAS BEEN MADE BEFORE
TRYING TO SELECT AR TEST, THE REASON BEING IS THAT
THE
PROGRAM
HAS
TO
CLEAR
AREAS
AND SET UP PARAMETERS.
WHEN THIS SWITCH IS USED THE DIAGNOSTIC WILL ASK
TEST
NO.?
ANSHWER BY TYPING THE NUMBER OF THE TEST DESIRED
AND CARRIGE RETURN TO BEGIN EXECUTION AT THE
SELECTED
TEST.

SH 02

LOCK ON SELECTED TEST.
THIS
SWITCH
WHEN
USED
WITH
SWO1
WILL CAUSE THE PROGRAM TO CONSTANTLY LOOP ON THE
SELECTED TEST.
HITTING ANY KEY ON
THE
CONSOLE
WILL
LET
IT
ADVANCE TO THE NEXT TEST AND LOOP UNTIL A KEY
IS HIT AGAIN.
IF
SW02=0
WHEN
SWO1
IS
USED.
THE
PROGRAM
WILL
BEGIN AT THE SELECTED TEST AND CONTINUE
NORMAL OPERATIONS.

SW 03

RESELECT DMC11'S DESIRED ACTIVE.
PLEASE NOTE
THAT
A
MESSAGE
IS
TYPED OUT FOR SETTING THE SWITCH REGISTER
EQUAL TO OMC11'S ACTIVE.
THIS MEANS IF THE SYSTEM HAS
FOUR
DMC11S;
BITS
00,01,02,03
WILL
BE SET IN LOC

‘DMACTV'
FROM
THE
SWITCH REGISTER.
USING
THIS
SWITCH(SWOO0)
ALTERS
THAT
LOCATION;THEREFORE IF FOUR
DMC11S ARE IN THE
SYSTEM
#+4D0
NOT##x
SET
SWITCHS
GREATER
THAN SW 03 IN THE UP POSITION.
THIS WOULD BE
A FATAL ERROR.
DO NOT SELECT MORE ACTIVE DMC11S
THAN
THERE IS INFORMATION ON IN THE STATUS TABLE.

METHOD: A:
8:

C:
D:

€:
F:

LOAD ADDRESS 200
START WITH SW 00=1

PROGRAM WILL TYPE MESSAGE
SET A SWITCH
FOR
EACH
DMC

DESIRED
ACTIVE.
EXAMPLE:
IF YOU HAVE 4 DMC'S BUT ONLY WANT 1O
RUN THE FIRST AND THE LAST SET SWR BITS 0
AND
3 = 1.
PRESS CONTINUE
NUMBER (IF
VALID)
WILL
BE
IN
DATA
LIGHTS
(EXCLUDING 11/05)
SET WITH ANY OTHER

PRESS CONTINUE.

SWITCH

SETTINGS

ODESIRED.

4.1.3

DYNAMIC SWITCHES
ERROR SWITCHES
SW
SW
SW
SW
SW

12
13
15
08
10

DELETE PRINT QUT/BELL ON ERROR.
DELETE ERROR PRINTOUT.
HALT ON THE ERROR.
GOTO BEGINNING OF THE TEST(ON ERROR).
GOTO NIXT TEST(ON ERROR).

SCOPE SWITCHES
1.

4.2

SWO06

HALT
IN
ROMCLK
ROUTINE
MICRO-PROCESSOR
INSTRUCTION.,

SWo9

3.
4.

SuWil
SWi14

BEFORE
CLOCKING
THIS
ALLOWS
THE

OPERATOR TO SCOPE A MICRO-PROCESSOR INSTRUCTION IN
THE
STATIC
STATE
BEFORE
IT
IS
CLOCKED.
HIT
CONTINUE TO RESUME RUNNING.
(IF ENABLED BY ‘SCOP1’') ON AN ERROR;
IF AN ‘s’ IS
PRINTED
1IN FRONT OF THE TEST NO.
(EX.
#TEST NO.
10
)
SWO9
IS
1INCORPORATED
IN
THAT
TEST
AND
THEREFORE
SW09 IS USUALLY THE BEST SWITCH FOR THE
SCOPE LOOP (SW14=0, SW10=0, SW09=1,
SW08=0).
IF
SW09
IS
NOT ENABELED:;
AND THERE IS A HARD ERROR
(CONSTANT);
SW08
IS
BEST.
(SW14=1,0,
SW10=0,
SW09=0, SW08=1).
FOR INTERMITTEMT ERRORS;
SW14=1
WILL LOOP ON TEST
REGUARDLESS
OF
ERROR
OR
NOT
ERROR.
(SW14=1, SW10=0, SW09=0, SW08=1,0)
INHIBIT INTERATIONS.
LOOP ON CURRENT TEST.

STARTING ADDRESS
STARTING ADDRESS IS AT 000200
THERE
ADDRESSES FOR THE OMC11 DIAGNOSTICS.
.

NOTE:

[%,]

AL oL L AL LI T TR T VY SY XY XY XY Y
Dbt
Dl
L

SEQ 7

27-JUN-85 13:16:37 PAGE 6

ol
o] ) Ty VYU

OCNOMQNNPOOOQOMAOIN“

MACRO VO4.00

VIO WM -

CZoMC

ARE
NO
OTHER
STARTING
(SEE SECTION 4.0)

IF ADDRESS 000042 IS NON-ZERO THE PROGRAM
ASSUMES
IT
IS
UNDER
ACT11I
OR
XXDP
CONTROL
AND
WILL
ACT
ACCORDINGLY AFTER ALL AVAILABLE DMC11‘S ARE TESTED THE
PROGRAM WILL RETURN TO ‘XXDP’ OR ‘ACT-11‘.

OPERATING PROCEDURE
WHEN PROGRAM IS INITIALLY STARTEC

SECTION 4.0
WILL
THE DIAGNOSTIC

BE PRINTED,

MESSAGES

DESCRIBED

1IN

AND PROGRAM WILL BEGIN RUNNING

czomC

SEQ &

27-JUN-85 13:16:37 PAGE 7

5.2

PROGRAM AND/OR OPERATOR ACTION

THE TYPICAL APPROACH SHOULD BE
1.

2.
3.
4,

N\ =5 - =2 et ot o pon o Pt g

OOONQ‘M&MNHOOO\JOM&U‘N”

MACRO V04.00

HALT

ON ERROR (VYA SW

1521) WHEN EVER AN ERROR OCCURS.

CLEAR SW 15.
SET S4 14:
(LOOP ON THIS TEST)
SET SW 13:
(INKIBIT ERROR PRINT OUT)

THE TEST NUMBER AND PC WILL BE
TYPED
OUT
AND
POSSIBILY
AN
ERROR
MESSAGE (THIS DEPENDS ON THE TEST) TO GIVE THE OPERATOR
AN IDER AS TO THE SOURCE OF THE PROBLEM.
IF IT
IS
NECESSARY
TO KNOW MORE INFORMATION CONCERNING THE ERROR REPORT;
LOOK IN

THE LISTING FOR THAT TEST NUMBER WHICH WAS TYPED QUT AND
THEN
NOTE THE PC OF THE ERROR REPORT THIS WAY THE EXACT FUNCTION OF
THE TEST CAN BE DETERMINED.

ERRORS

DOLLLLLDEDBWWNWHMWNGWKRWWUNNNNLN

AS DESCRIBED PREVIQUSLY THERE WILL ALWAYS BE A TEST NUMBER AND
PC TYPED OUT AT THE TIME OF AN ERROR (PROVIDING SW 13=0 AND SW

12=0).

IN MOST CASES ADDITIONAL INFORMATION WILL BE

SUPPLIED

%NEngRTHE ERROR MESSAGE TO GIVE THE OPERATOR AN INDICATION OF
H
OR.

6.2

ERROR RECOVERY

IF FOR SOME REASON THE
DMC11
SHOULD
‘HANG
THE
BUS'
(GAIN
CONTROL OF BUS SO THAT CONSOLE MANUAL FUNCTIONS ARE INHIBITED)
AN INIT OR POWER DOWN/UP IS NECESSARY FOR OPERATOR
TO
REGAIN
CONTROL
OF
CPU.
IF
THIS
SHOULD HAPPEN;
LOOK IN LOCATION
'TSTNO' C(ADDRESS 1226)FOR THE NUMBER
OF
THE
TEST
THAT
WAS
RUNNING
AT
THE
TIME OF THE CATASTROPHIC ERROR.
IN THIS WAY
THE OPERATOR WILL HAVE AN IDEA AS TO WHAT THE DMC1l WAS
DOING
AT THE TIME OF THE ERROR.
RESTRICTIONS

STARTING RESTRICTIONS

SEE SECTION 4.
(PLEASE)
STATUS TABLE SHOULD BE VERIFIED REGUARDLESS OF HOW PROGRAM WAS
STARTED.
ALSO IT IS IMPORTANT TO USE THIS LISTING ALONG WITH
THE INFORMATION
PRINTED
ON
THE
TTY
TO
COMPLETLY
ISOLATE

PROBLEMS.

CZOMC

SEQ 9

27-JUN-85 13:16:37 PAGE 8

7.2

OPERATING RESTRICTIONS
THE FIRST TIME A DMC11 DIAGNOSTIC IS LOADED INTO CORE AND
RUN
THE STATUS TABLE MUST BE SET UP.
THIS IS DONE BY MANUAL INPUT

L2 BT

YT B YT NYey

MACRO V04.00

(SW00=1) OR BY AUTOSIZING
(SWO0=0
AND
SW07=0).
THEREAFTER
HOWEVER
THE
STATUS
TABLE
NEED
NOT
BE SETUP BY SUBSEQUENT
RESTARTS OR EVEN LOADING THE NEXT DMC DIAGNOSTIC
BECAUSE
THE
STATUS
TABLE
IS
OVERLAYED.
THE
CURRENT PARAMETERS IN THE
STATUS TABLE ARE USED WHEN SW07=1 ON START UP.
7.3

HARDWARE CONFIGURATION RESTRICTIONS

DMC11(MB200)
JUMPER W1 MUST BE IN,
8 IN THE OFF POSITION.
KMC(MB8204)-

AND SWITCH 7 OF

E76

MUST

JUMPER W1 MUST BE IN.

MISCELLANEQUS

EXECUTION TIME
ALL DMC11 DEVICE DIAGNOSTICS WILL GIVE AN

(PROVIDING

ERRORS

AND

SW12=0)

'END

WITHIN

PASS'

4 MINS.

MESSAGE

THIS IS

ASSUMING SWii=1 (DELETE ITERATIONS) IS SET TO GIVE THE FASTEST
POSSIBLE EXECUTION.
THE ACTUAL EXECUTION TIME DEPENDS GREATLY
ON THE POP11 CPU CONFIGURATION AND THE AMOUNT OF MEMORY IN THE
SYSTEM.
8.2

PASS COMPLETE

NOTE:
EVERY TIME THE PROGRAM IS STARTED;
THE TESTS WILL
RULN
AS
IF
SWil
(DELETE
ITERATIONS)
WAS
UP
(=1).
THIS IS T0
‘VERIFY NO HARD ERRORS' AS SOON AS
POSSIBLE.
THEREFORE
THE
FIRST
PASS
-EACH
TIME
PROGRAM IS STARTED- WILL BE A ‘QUICK
PASS' UNTIL ALL
DMC11'S
IN
SYSTEM
ARE
TESTED.
WHEN
THE
DIAGNOSTIC HAS COMPLETED A PASS THE FOLLOWING IS AN EXAMPLE OF
THE PRINT OUT TO BE EXPECTED.
END PASS CZDMC CSR:
ERRORS:
000000

NOTE:

175000 VEC:

0300 PASSES:

000001

THE PASS COUNT AND ERROR COUNTS
ARE
CUMMULITIVE
FOR
EARCH
DMC11
THAT IS RUNNING, AND ARE SET TO ZERQO ONLY
WHEN THE DIAGNOSTIC IS STARTED.
THEREFORE
AFTER
AN
OVERNIGHT RUN FOR EXAMPLE, THE TOTAL PASSES AND ERRORS

FOR EACH DMC11 SINCE THE DIAGNOSTIC
REFLECTED IN PASSES:
AND ERRORS:.

WAS

STARTED

ARE

czomMc

SEQ 10

27-JUN-85 13:16:37 PAGE 9

8.4

KEY LOCATIONS

RETURN (1214)

VB AR

E NN -

MACRO V04.00

CONTAINS THE ADDRESS WHERE PROGRAM WILL RETURN

WHEN
ITERATION COUNT IS REACHED OR
TEST IS ASSERTED.

(1216)

TSTNO

(1226)

CONTAINS THE ADDRESS OF THE NEXT
PEFORMED.

CONTAINS THE NUMBER

(1316)

THE

TEST

8.4A

BEING

THE BIT IN ‘RUN' ALWAYS POINTS
TO
THE
CURRENTLY
BEING
TESTED,
EXAMPLE:
1302/0000000001000000 MEANS THAT
DMC11

DMC11
(RUN)
NO.G6

IS THE DMC11 NOW RUNNING.

DMCROO-DMCR17
DMSTO00-DMST17
(1500)-(1640)

710

NOW

PEFORMED.
RUN

IF LOOP ON

THESE LOCATIONS CONTAIN THE INFORMATION NEEDED
TO TEST UP TO 16 (DECIMAL) DMC11S SEQUENTIALY.
THEY
CONTAIN
THE
CSR,VECTOR
AND
STATUS
CONCERNING THE CONFIGURATION OF EACH DMC11.

DMACTV (1306)

ERCH BIT SET IN THIS LOCATION
INDICATES
THAT
THE
ASSOCIATED
DMC1i WILL BE TESTED IN TURN.
EXAMPLE:
(DMACTV) 1276/0000000000011111 MEANS
THAT DMC11 NO.
00,01,02,03,04 WILL BE TESTED,
EXAMPLE:
(DMACTV) 1276/0000000000010001 MEANS
THAT DMCil1 NO.
00,04 WILL BE TESTED.

DMCSR

$22¥AINS THE CSR OF THE

(1404)

*STATUS TABLE'

CURRENT

OMC11

UNDER

(1500-1640)

THE TABLE IS FILLED BY AUTO SIZING OR BY THE MANUAL
PARAMETER
INPUT (QUESTIONS) AS DESCRIBED PREVIQUSLY.
ALSO IF DESIRED BY
USER;
THE LOCATIONS MAY BE ALTERED BY HAND
(TOGGLED
IN)
TO
SUIT THE SPECIFIC CONFIGURATION.
THE EXAMPLE STATUS MAP SHOWN BELOW
CONTAINS
INFORMATION
FOR
TWO
DMC11'S.
THE
TABLE
CAN
CONTAIN
UP
TO
16
OMC11'S.
FOLLOWING THE HMAP IS A DESCRIPTION OF THE BITS
FOR
EACH
MAP
ENTRY
MAP OF DMC11 STATUS
...................

CSR

001500 160010 145310
o

STAT2

STAT3

177777
000000

000000
000000

001510 160020 016320

Cczomc
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78

81
82
83
84
85

MACRO V04.00

SEQ 11

27-JUN-85 13:16:37 PAGE 9 1

EACH MAP ENTRY CONTAINS
<URDS
WHICH
CONTAIN
THE
STATUS
INFORMATION
FOR
1
DMC11.
THE PC SHOWS WHERE IN CORE MEMORY
THE FIRST OF THE 4 WORDS IS.
1IN THE EXAMPLE ABOVE
THE
FIRST
DMC'S STATUS IS IN LOCATIONS, 1500, 1502, 1504, AND 1506.
THE
SECOND DMC STATUS IS LOCATED AT 1510, 1512,
1514,
AND
1516,
THE

INFORMATION

FOLLOWS:

CONTAINED IN EACH 4 WORD ENTRY

CSR:

CONTAINS DMC11 CSR ADDRESS

STAT1:

BITS 00-08 IS DMC11 VECTOR ADDRESS

IS DEFINED AS

BIT15=1 MICRO-PROCESSOR HAS CRAM
BIT15=0 MICRO-PROCESSOR HAS CROM
B8IT14=1 TURNAROUND CONNECTOR IS ON
BIT14=0 NO TURNAROUND CONNECTOR
B8IT13=0 LINE UNIT IS AN M8201
BIT13=1 LINE UNIT IS AN MB202
BIT12=1 NO LINE UNIT
BITS 09-11 IS DMC11 BR PRIORITY LEVEL
STAT2:

LOW BYTE IS SWITCH PAC#1 (DDCMP LINE NUMBER)
HIGH BYTE IS SWITCH PAC42 (BM873 BOOT ADD)

STAT3:

BITO=1 RUN FREE RUNNING TESTS ON KMC11
BIT1=0 DMC11-AR (LOW SPEED)
BIT1=1 DMC11-AL (HIGH SPEED)

czomc

27-JUN-85 13:16:37 PAGE

METHOD OF AUTO SIZING

8.5.1

FINDING THE

CONTROL

STATUS

THE AUTO-SIZING ROUTINE FINDS A OMC11 AS FOLLOWS:
IT
STARTS
AT ADDRESS 160000 AND TESTS ALL ADDRESS IN INCREMENTS OF 10 UP
TO AND INCLUDING ADDRESS 167760.
IF THE ADDRESS DOES NOT TIME
QUT,
THE FOLLOWING IS DONE, THE FIRST CROM ADDRESS IS WRITTEN
T0 A 125252 THEN IT IS READ BACK.
IF
IT
CONTAINS
A
-1
OR
125252
OR
626
OR
16520 A DMC11 OR KMC11 HAS BEEN FOUND, IF
NOT., THE ADDRESS IS UPDATED BY 10 AND THE SEARCH CONTINUES.
A
-1
INDICATES A DMC11 WITH NO CROM, A 125252 INDICATES A KMC1l
WITH CRAM, A 626 INDICATES A DMC11-AL AND A 16520 INDICATES
A
DMC11-AR.
FURTHER
TESTS
ARE
PERFORMED
AT
THIS
POINT TO
DETERMINE
WHICH
LINE
UNIT,
IF
ANY,
IS
INSTALLED,
IF
A
LOOP-BACK
CONNECTOR
IS INSTALLED AND VARIOUS SWITCH SETTINGS
ON THE LINE UNIT.
THIS
IS
WHY
THE
STATUS
TABLE
MUST
BE
VERIFIED
BY
THE
USER AND IF ANY OF THE INFORMATION DOES NOT
AGREE WITH THE HARDWARE THE DIAGNOSTIC MUST BE
RESTARTED
AND
THE
QUESTIONS
MUST
BE
ANSWERED.
ALL DMC11'S IN THE SYSTEM
WILL BE FOUND BY THE AUTO-SIZER.
IF IT DOES NOT FIND A
DMC11
THE DIAGNOSTIC MUST BE RESTARTED AND THE QUESTIONS ANSWERED.

[

VVAVIANANNLLLDLLDDLLDEGWWWGWMWWWNWENDNR

SEQ 12

8.5

0 Dt b Pt et b Pt e [
d i

L -2 ENT. YV ¥ NIV Ny (=27 1. RNY. YV I Y XY

MACRO V04.00

8.5.2

FINDING THE VECTOR AND BR LEVEL
THE

VECTOR

AREA

(ADDRESS

300-776)

FILLED

WITH

THE

INSTRUCTION IOT
AND
‘.+2'
(NEXT
ADDRESS).
THE PROCESSOR
STATUS IS STARTED AT 7 AND THE DMC IS PROGRAMMED TO INTERRUPT.
THE
PS
IS
LOWERED BY 1 UNTIL THE OMC INTERRUPTS, A DELAY IS

MADE AND IF NO INTERUPT OCCURES AT PS LEVEL 3

(BECAUSE

BAD DMC11) THE PROGRAM ASSUMES VECTOR ADDRESS 300 AT BR LEVEL
S AND THE PROBLEM SHOULD BE FIXED IN THE DIAGNOSTIC.
ONCE THE
PROBLEM IS FIXED;
THE PROGRAM SHOULD BE RE-SETUP AGAIN TO GET
CORRECT VECTOR.
IF AN INTERUPT OCCURED;
THE ADDRESS TO WHICH
THE
DMC1l
INTERUPTED
TO
IS
PICKED
UP AND REPORTED AS THE
VECTOR.
NOTE:
IF THE VECTOR REPORTED IS NOT THE
VECTOR
SET
ggNEBY
YOU;
THERE IS A PROBLEM AND AUTO SIZING SHOULD NOT BE
8.6

SOFTWARE SWITCH REGISTER
IF THE DIAGNOSTIC IS RUN ON AN 11/04 OR OTHER
CPU
MWITHOUT
A
SWITCH
REGISTER
THEN
A
SOFTWARE SWITCH REGISTER IS USED TO
ALLOW USER THE SAME SWITCH OPTIONS
AS
DESCRIBED
PREVIOUSLY.
IF
THE HARDWARE SWITCH REGISTER DOES NOT EXISY OR IF ONE DOES
AND
IT
CONTAINS
ALL
ONES
(177777)
THIS
SOFTWARE
SWITCH
REGISTER IS USED.

CONTROL:
TO OBTAIN CONTROL AT ANY ALLOWABLE TIME
DURING
EXECUTION
OF
THE
DIAGNOSTIC
THE
CPERATOR
TYPES
A CTRL G ON THE CONSOLE
TERMINAL KEYBOARD.
AS SOON AS THE CTRL G
IS
RECOGNIZED,
8Y
THE DIAGNOSTIC, THE FOLLOWING MESSAGE WILL BE DISPLAYED:

czonc

58
59
60
61
62
63

64
65
66
67
68
69
70

72
73
74
75
76
77
78
79
80
81
82
83
84
85

86
87
88
89

90
91
92
93
94
95

MACRO V04.00

SEQ 13

27-JUN-85 13:16:37 PAGE 10 1

SHR=XXXXXX NEW?
WHERE XXXXXX IS THE CURRENT CONTENTS OF
THE
SOFTWARE
SWITCH
REGISTER
IN
OCTAL.
THE
SOFTWARE CONTROL ROUTINE WILL THEN
AWAIT OPERATOR ACTION.
AT WHICH TIME THE OPERATOR IS REQUIRED
TO
TYPE
ONE
OR_
MORE OF THE LEGAL CHARACTERS:
1) 0 - 7, 2)
LINE FEED(<LF>), 3) CARRIAGE
RETURN(<CR>),
OR
4)
CONTROL-U
(CTRL
U).
NO
CHECK
IS
MADE
FOR
LEGALITY.
IF THE INPUT
CHARACTER IS NOT A <LF>, <CR>, OR CTRL U IT IS ASSUMED
TO
BE
AN OCTAL DIGIT.

7O CHANGE THE CONTENTS OF THE SSR THE
OPERATOR
SIMPLY
TYPES
THE
NEW
OESIRED
VALUE
1IN OCTAL - LEADING ZEROS NEED NOT BE
TYPED.
AND TERMINATES THE INPUT STRING WITH A
<CR>
OR
<LF>
DEPENDING
ON
THE
PROGRAM ACTION DESIRED AS DESCRIBED BELOW.
THE INPUT VALUE WILL BE TRUNCATED TO THE LAST 6 DIGITS
TYPED.
AT
LEAST
ONE
DIGIT
MUST BE TYPED ON ANY GIVEN INPUT STRING
PRIOR TO THE TERMINATOR BEFORE A CHANGE TO THE SSR WILL OCCUR.
WHEN THE INPUT STRING IS TERMINATED WITH A <CR> THE DIAGNOSTIC
WILL
CONTINUE
EXECUTION
FROM
THE
POINT
AT
MWHICH
IT WAS
INTERRUPTED.
IF A <CR> IS THE ONLY THING
TYPED
THE
PROGRAM
WILL CONTINUE WITHOUT CHANGING THE SSR.
THE <LF> DIFFERS FROM
ngaégl? B(Y) RESTARTING THE PROGRAM AS IF IT WERE RESTARTED
AT
A
200,

IF A CTRL U IS TYPED AT ANY POINT IN THE INPUT STRING PRIOR TO
THE
TERMINATOR
THE
INPUT
VALUE WILL BE DISREGARDED AND THE
PROMPT OISPLAYED (SWR = XXXXXX NEW?).
TO SET THE SSR FOR
THE
STARTING
SWITCHES,
FIRST
LOAD
DIAGNOSTIC, Tk°N HIT CTRL G, THEN START THE DIAGNOSTIC.

THE

MACRO V04.00
27-JUN-85 13:16:37 PAGE
<omC
INTRODUCTION TO DMC11 DIAGNOSCTIC

SEQ 14

1683

s8AC-8544C-MC

CZDMC

DO BASIC

DMC11

CONTROLLER

TEST

s#COPYRIGHT 1976.1978. DIGITAL EQUIPMENT CORP., MAYNARD, MASS. 01754
B

c e

meccoaan

meeeeccicne

cee

ameme

beccamanaa

;STARTING PROCEDURE
;LOAD PROGRAM
;LOAD ADDRESS 000200
;SWR=0
AUTOSIZE DMC11
;SW07=1
USE CURRENT DMC11 PARAMETERS
:SW00=1
INPUT NEW DMC11 PARAMETERS
;PRESS START

;PROGRAM WILL TYPE ~AC-8544C-MC
;PROGRAM WILL TYPE STATUS MAP

CZDMC-DO BASIC DMC11 CONTROLLER TEST*

sPROGRAM WILL TYPE “R* TO INDICATE THAT TESTING HAS STARTED

;AT THE END OF A PASS,

PROGRAM WILL TYPE PASS COMPLETE MESSAGE

sAND THEN RESUME TESTING
;SUBSEQUENT RESTARTS WILL NOT TYPE PROGRAM TITLE

;SWITCH REGISTER OPTIONS
| Bt it

100000
040000
020000
010000
004000
002000
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001

SK15=100000
SW14=40000
SW13=20000

;*1.HALT ON ERROR
+=1,LO00P ON CURRENT TEST
:=1,INHIBIT ERROR TYPEQUT

SW12=10000
SW11=4000
SW10=2000

;=1,DELETE TYPEOUT/BELL ON ERROR.
:=1,INHIBIT ITERATIONS
:=1,ESCAPE TO NEXT TEST ON ERROR

SW08=400
SW07+200
gugg-igo

:=1,L00P ON ERROR
;=1,USE CURRENT DMC11 PARAMETERS,
< ,AUTOSIZE DMC11
;=1, HALT BEFORE CLOCKING MICRO-PROCESSOR INSTRUCTION

SW04=20
SW03=10
SW02=4
SW01=2
SW00=1

sRESELECT DMC11'S TO BE TESTED (ACTIVE)
:LOCK ON TEST SELECT
sRESTART PROGRAM AT SELECTED TEST
;s INPUT DMC11 PARAMETERS

S$4W09=1000

:*1,L00P WITH CURRENT DATA

—

SEQ 15

CIOMC
MACRO vO4.00 27-JUN-B85 13:16:37 PAGE 18
GENERAL OEFINATIONS AND EQUIVALENCIES
0

000000
000001
000002
000003
000004
000005
000006

000007

RO+%0
R1=%1
R2 =42
R3=%3
R4 =%4
RS =%5
SP =46

PCau7?

;GENERAL REGISTER
:GENERAL REGISTER
;GENERAL REGISTER
sGENERAL REGISTER
;GENERAL REGISTER
;GENERAL REGISTER
:PROCESSOR STACK POINTER

;PROGRAM COUNTER

;:LOCATION EQUIVALENCIES
177776
001200

PS=177776
STACK=1200

;PROCESSOR STATUS WORD
sSTART OF PROCESSOR STACK

;INSTRUCTION DEFINITIONS
005746
005726
010046
012600
024646
022626

PUSH1SP=5746
POP1SP=5726
PUSHRO=10046
POPRO=12600
PUSH25P=24646
POP2SP=22626

;:BIT DEFINITIONS
100000
040000
020000
010000
004000
002000
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001

B8IT15-100000
BIT14=40000
8I713=20000
8IT12=10000
8IT11=4000
8171022000
8179=1000
BIT8+-400
BIT7=200
BIT6=100
B8IT5=40
BI74=20
8IT73=10
BIT2=4
BIT1=2
BITO=1

;DECREMENT PROCESSOR STACK 1 WORD
: INCREMUNT PROCESSOP STACK 1 WORD
;SAVE RO ON STACK
sRESTORE RO FROM STACK
;DECREMENT STACK TWICE
: INCREMENT STACK TWICE

MPACRO VO4.00
27-JUN-85 13:16:37 PAGE
TRAPCATCHER FOR UNEXPECTED INTERUPTS

SEQ 16

$:680888880804004088888884400884800008%0808004004008080800442800008000404%
.....................

;TRAPCATCHER FOR ILLEGAL INTERRUPTS
;THE STANDARD "TRAP CATCHER” IS PLACED

sBETWEEN ADDRESS O TO ADDRESS 776.
:IT LOOKS LIKE “PC+2 HALT".

000000

000024
000026
000030
000032
000034
000036

000040
00042
000044
000046

000052

000024
005336
000340
004750
000340
004716
000340
000040
000000
000000
000000
003522
000052
000000

.=24

.=40

.=52

PFAIL
340
HLT
340
. TRPSRV
340

:POWER FAIL HANDLER
;SERVICE AT LEVEL 7
;ERROR HANDLER
;SERVICE AT LEVEL 7
;GENERAL HANDLER DISPATCH SERVICE
;SERVICE AT LEVEL 7

0
0
0
$ENDAD

;SAVE FOR ACT-11 OR XXDP
:RETURN ADDRESS IF UNDER ACT 11 OR XXDP
:SAVE FOR ACT-11 OR XXDP
;FOR USE WITH ACT-11 OR XXDP

;:ACT-11 PROGRAM CHARACTERISTICS

000176

000174
000000
000000

.=174
DISPREG:
0
SWREG:
O

000200

000200
000137

.=200

001000
001016

001000
377
103

.=1000
MTITLE:

001200

.=1200

000174

;SOFTWARE DISPLAY REGISTER
;SOFTWARE SWITCH REGISTER

JMP

:GO TO START OF PROGRAM

.ASCII
.ASCIZ

«377><12>/AC-8544C-MC/<377>
/CZDMC-DO BASIC DMC11 CONTROLLER TEST/<377>

;INDIRECT POINTERS TO SWITCH REGISTER AND LIGHT DISPLAY
R

001200
001202

177570
177570

I G,

DISPLAY:177570
SWR:
177570

CZDMC

MACRO V04.00

PROGRAM PARAMETERS,

SEQ 17

27-JUN 85 13:16:37 PAGE 20

VARIABLES,

AND

TRAP CALLS.

sINDIRECT POINTERS TO TELETYPE VECTORS AND REGISIERS
001204
001206
001210
001212

177560
177562
177564
177566

TKCSR:
TKDBR:
TPCSR:
TPDBR:

177560
177562
177564
177566

sTELETYPE KEYBOARD CONTROL REGISTER
;TELETYPE KEYBOARD DATA BUFFER
s TELEPRINTER CONTROL REGISTER
;s TELEPRINTER DATA BUFFER

;PROGRAM CONTROL PARAMETERS
001214
001216
001220
001222
001224
001226
001230
001232
001234

000000
000000
000000
000003
000000
000000
000000
000000
000000

RETURN:
NEXT:
LoCk:
ICOUNT:
LPCNT:
TSTNO:
PASCNT:
ERRCNT:
LSTERR:

0O
O
0
3
O
©
0
0O
0

; SCOPE ADDRESS FOR LOOP ON TEST
:ADDRESS OF NEXT TEST TO BE EXECUTED
;ADDRESS FOR LOCK ON CURRENT DATA
;NUMBER OF ITERATIONS THAT CURRENT TEST WILL BE EXECUTED
:NUMBER OF ITEREATIONS COMPLETED
:NUMBER OF TEST IN PROGRESS
;:NUMBER OF PASSES COMPLETED
:TOTAL NUMBER OF ERRORS
;PC OF LAST ERROR CALL

:PROGRAM VARIABLES
001236
001240
001242
001244
001246

001250
001252

001254
001256
001260
001262
001264
001266
001270
001272
001274
001276
001300

000000
000000
000000
000000

000000
000000
000000

000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000

001302
001304
001306
001310
001312
001314
001316

000001
000000

000000

001320
001322

001472
001676

STRTSW:
STAT:
CLKX:
MASKX:
TEMPL:

0
0
O
0
O

TEMP4:
TEMPS:
SAVRO:
SAVR1:
SAVR2:
SAVR3:
SAVR4:
SAVRS:
SAVSP:
SAVPC:
ZERO:

O
O
0
O
O
0
¢
0
0
O
O

TEMP2:
TEMP3:

ONE :
MEMLIM:
DMACTV:
DMNUM:
SAVACT:
SAVNUM:
RgNéN
.EV
CREAM:
MILK:

;SWITCHES AT START OF PROGRAM
;DM STATUS WORD STORAGE

s TEMPORARY
; TEMPORARY
; TEMPORARY
: TEMPORARY

0
O

1
O
.BLKW
. BLKW
.BLKW
.BLKW
0

STORAGE
STORAGE
STORAGE
STORAGE

; TEMPORARY STORAGE
;RO STORAGE
:R1 STORAGE
;R2 STORAGE
:R3 STORAGE
;R4 STORAGE
:RS STORAGE
;STACK POINTER STORAGE
;PROGRAM COUNTER STORAGE

1
1
1
1

DM_MAP-6
CNT.MAP-4

sHIGHEST LOCATION FOR NPR'S
;DMC11'S SELECTED ACTIVE.
;OCTAL NUMBER OF DMC11'S.
;ORIGINAL ACTV
DEVICES
: WORKABLE NUMBER
;:POINTER TO RUNNING DEVICE.
; TABLE POINTER.
;:TABLE POINTER

CZOMC

MACRO V04.00

PROGRAM PARAMETERS,

SEQ 18

27-JUN-85 13:16:37 PAGE 21

VARIABLES,

AND

TRAP CALLS.

;PROGRAM CONTROL FLAGS
.

’

001324
001325
001326
001327

000
000
000
000

INIFLG:
ERRFLG:
LOKFLG:
QV.FLG:
EVEN

.BYTE
.BYTE
.BYTE
.BYTE

O
O
O
O

;PROGRAM INITIALIZATION FLAG
;ERROR OCCURED FLAG
;LOCK ON CURRENT TEST FLAG
;QUICK VERIFY FLAG.
;ON FIRST PASS OF EACH DMC11 ITERATIONS WILL BE SUPPRESSED.

;:DEFINITIONS FOR TRAP SUBROUTINE CALLS
;sPOINTERS TO SUBROUTINES CAN BE FOUND
;IN THE TABLE IMMEDIATLY FOLLOWING THE DEFINITIONS
R

001330
001330
001332

0C1334
001336
001340

104400
003576
104401
003736
104402
003766
104403
004050

104404

001362

004154
104405
004174
104406
004374
104407
004434
104410
004466
104411
004472
104412
005466
104413
005436
104414
005504
104415
005552

001364

005616

001342

001344
001346
001350

001352
001354
001356
001360

104416

.TRPTAB:
SCOPE=TRAP «0
.SCOPE
SCOP1=TRAP+1
.SCoP1
TYPE=TRAP+2
.TYPE
INSTR=TRAP+3
-INSTR

INSTER=TRAP+4

.INSTER
PARAM=TRAP .S
.PARAM
SAVOS=TRAP +6
.SAVOS
RESOS=TRAP+?
.RESOS
CONVRT=TRAP+10
.CONVRT
CNVRT=TRAP+11
.CNVRT
MSTCLR=TRAP.12
.MSTCLR
DELAY=TRAP+13
.DELAY
ROMCLK=TRAP+ 14
.ROMCLK
DATACLK=TRAP+15
.DATACLK

TIMER=TRAP+«16

.TIMER

PPPy

;CALL TO SCOPE LOOP AND ITERATION HANDLER
;CALL TO LOOP ON CURRENT DATA HANDLER
:CALL TO TELETYPE OUTPUT ROUTINE
;:CALL TO ASCII STRING INPUT ROUTINE

:CALL TO INPUT ERROR HANDLER
;CALL TO NUMERICAL DATA INPUT ROUTINE
;CALL TO REGISTER SAVE ROUTINE
;CALL TO REGISTER RESTORE ROUTINE

;CALL TO DATA OUTPUT ROUTINE

;CALL TO DATA OUTPUT ROUNTINE WITHOUT CR/LF.
:CALL TO ISUE A MASTER CLEAR
sCALL TO DELAY
;CALL TO CLOCK ROM ONCE
;CALL TO CLK DATA

;CALL TO DELAY A CLOCK TICK

.....................................................................

[

$: 885858800558 48044808 80

ktb

bbb ibbbbdbbididRddkbbbditbibhbbbsbbbbtts

CZOMC

MACRO v04.00

PROGRAM PARAMETERS,

SEQ 19

27-JUN-85 13:16:37 PAGE 22

VARIABLES,

AND TRAP CALLS.

;DMC11 CONTROL INDICATORS FOR CURRENT DMC11i UNDER TEST
................

001366
001370
001372

000000
000000
000000

STATi:
STAT2:
STAT3:

001374
001376
001400
001402
001404
001406
001410
001412
001414

000000
000000
000000
000000
000000
000000
000000
000000
000000

DMRVEC:
DMRLVL:
DMTVEC:
OMTLVL:
DMCSR:
DMCSRH:
DMCTL:
DMPO4:
oMPO6:

O
O
O
O
0
O
©
O
O

-_——m

;POINTER
;POINTER
:POINTER
:POINTER
;:POINTER
:POINTER
;POINTER
:POINTER
;POINTER

e
e mm.

TO
TO
TO
TO
TO
TO
TO
TO
TO

moaeaaa

DMC11
DMC11
DMC11
DMC11
DMC11
DMC11
DMC11
DMC11
DMC11

RECEIVER INTERRUPT VECTOR
RECEIVER INTERRUPT SERVICE PS
TRANSMITTER INTERRUPT VECTOR
TRANSMITTER INTERRUPT SERVICE PS
CONTROL STATUS REGISTER
CONTROL STATUS REGISTER HIGH BYTE.
CONTOL QUT REGISTER
PORT REGISTER(SEL &)
PORT REGISTER(SEL 6)

; TEMP STORAGE
0C1416

000000
001460

TEMP:

.*,+40

:DMC11 STATUS TABLE AND ADDRESS ASSIGNMENTS

001500
001500

001500

.*1500
DM HAP:
OMCROO:

OMS200:
DMS300:

.BLKW
.BLKW
.BLKW
.BLKW

1
1
1
1

;CONTROL STATUS REGISTER FOR CMC11 NUMBER 00
:VECTOR FOR DMC11 NUMBER 00
;D0OCMP LINE# FOR DMC11 NUMBER 00
+3RD STATUS WORD

001510
001512
001514
001516

DMCROL:
OMS101:
DMS201:
DMS301:

.BLKW
.BLKW
.BLKW
.BLKW

1
1
1
1

;CONTROL STATUS REGISTER FOR DMC11 NUMBER 01
:VECTOR FOR DMC11 NUMBER 01
;DDCMP LINE¢ FOR DMC11 NUMBER 01
:3RD STATUS WORD

001520
001522
001524
001526

OMCRO2:
DMS102:
DMS202:
DMSs302:

.BLKW
.BLKW
.BLKW
.BLKW

1
1
1
1

;CONTROL STATUS REGISTER FOR OMC11 NUMBER 02
;:VECTOR FOR DMC1l NUMBER 02
;D0CMP LINES¢ FOR DMC11 NUMBER 02
s3RD STATUS WORD

001530
001532
001534
001536

DMCRO3:
DMS1G3:
DMS203:
DMS303:

.BLKW
.BLKW
.BLKW
.BLKW

1
1
1
1

;CONTROL STATUS REGISTER FOR DMC11 NUMBER 03
;VECTOR FOR DMC11 NUMBER 03
;DDOCMP LINE4 FOR DMC1i NUMBER 03
:3RD STATUS WORD

001540
001542
001544
001546

DMCRO4:
DIHS104:
DMS204:
DMS304:

.BLKW
.BLKW
.BLKW
.BLKW

1
1
1
1

;CONTROL STATUS REGISTER FOR DMCi1i NUMBER 04
;VECTOR FOR DMC11i NUMBER 04
:DDCHMP LINE# FOR DMC11 NUMBER 04
;3RD STATUS WCRD

001550

DMCROS:

.BLKW

;CONTROL STATUS REGISTER FOR OMC1i NUMBER 05

001502

OMS100:

001504
001506

MACRO v04.00

DMS105:
DMS205:
DMS305:

.BLKW
.BLKW
.BLKW

Oy A

;VECTOR FOR DMC11 NUMBER 05
;:0DCMP LINE® FOR DMC11 NUMBER 05
;3RD STATUS WORD

001560
001362
001564
001566

DMCRO6.
DMS5106:
DMS206:
DMS306:

.BLKW
.BLKW
.BLKW
.BLKMW

;CONTROL STATUS REGISTFR FOR DMCil NUMBER 06
:VECTOR FOR DMC11 NUMBER 06
:DDCHMP LINE¢ FOR DMC11 NUMBER 06
;3RD STATUS WORD

001570
001572
001574
001576

DMCRC7:
DMS5107:
OMS207:
DMS307:

.BLKW
.BLKMW
.BLKW
.BLKW

T U

;CONTROL STATUS REGISTER FOR DMC11 NUMBER 07
:VECTOR FOR DMC11 NUMBER 07
;0DCMP LINE® FOR DMC11 NUMBER 07
;3RD STATUS WORD

001600
001602
001604
001606

DMCR10:
DMS110:
DMS210:
OMS310:

.BLKW
.BLKW
.BLKW
.BLKW

TP T

;CONTROL STATUS REGISTER FOR DMC1i NUMBER 10
;VECTOR FOR DMC11 NUMBER 10
;0DCMP LINE# FOR DMC11 NUMBER 10
;3RD STATUS WORD

001610
001612
001614
001616

DMCR11:
DMS111:
DMS211:
DMS31i:

.BLKW
.BLKW
.BLKW
.BLKW

;CONTROL STATUS REGISTER FOR DMC11 NUMBER 11
;VECTOR FGR DMC11 NUMBER 11
;:00CMP LINE4 FOR DMC11 NUMBER 11
;3RD STATUS WORD

001620
001622
001624
001626

DMCR12:
DMS112:
DMS212:
DMS312:

.BLKW
.BLKW
.BLKW
.BLKW

o O

;CONTROL STATUS REGISTER FOR DMC11 NUMBER 12
;sVECTOR FOR DMC11 NUMBER 12
;DDCMP LINE# FOR DMC11 NUMBER 12
;3RD STATUS WORD

001630
001632
001634
001636

OMCR13:
DMS5113:
DMS5213:
OMS313:

.BLKW
.BLKW
.BLKW
.BLKW

;CONTROL STATUS REGISTER FOR DMC1i NUMBER 13
;VECTOR FOR DMC11 NUMBER 13

001640
001642
001644
001646

OMCR14:
DMS114:
OMS214:
DMS314:

.BLKW
.BLKW
.BLKW
.BLKW

;CONTROL STATUS REGISTER FOR DMC11 NUMBER 14
;VECTOR FOR DMC11 NUMBER 14
;:00CMP LINE® FOR DMC11 NUMBER 14
:3RD STATUS WORD

001650
001652
001654
001656

DMCR1S5:
DMS115:
DMS215:
DMS31S:

.BLKW
.BLKW
.BLKW
.BLKW

:CONTROL STATUS REGISTER FOR DMC1l NUMBER 15
;sVECTOR FOR DMC11 NUMBER 15
;0DCMP LINE# FOR DMC11 NUMBER 15
:3RD STATUS WORD

001660
001662
001664
001666

DMCR16:
OMS116:
DMS216:
DMS316:

.BLKHW
.BLKW
.BLKW
.BLKW

;CONTROL STATUS REGISTER FOR DMC11 NUMBER 16
;VECTOR FOR DMC11 NUMBER 16
:DOCHP LINE4 FOR DMC1i NUMBER 16
;3RD STATUS WORD

001670
001672
001674
001676

DMCR17:
DMS117:
DMS217:
DMS317:

.BLKW
.BLKW
.BLKW
.BLKW

DM.END:

000000

001700

000000

Y e

ol o

001552
001554
001556

TRAP CALLS.

ol olel

AND

e et

VARIABLES,

SEQ 20

PROGRAM PARAMETERS,

27 JUN-85 13:16:37 PAGE 22

el
T T

CZomC

;00CMP LINES FOR DMC11 NUMBER 13
;3RD STATUS WORD

:CONTROL STATUS REGISTER FOR DMC1i1 NUMBER 17
;VECTOR FOR OMC11 NUMBER 17
;:DDCMP LINE4 FOR DMC11 NUMBER 17
;3RD STATUS WORD

SEQ 21

czomnc
MACRO V04.00
27-JUN-85 13:16:37 PAGE 23
PROGRAM PARAMETERS, VARIABLES, AND TRAP CALLS.

;DMC11 PASS COUNT AND ERROR COUNT TABLE
001702
001702
001704

000000

ERCT00:

;PASS COUNT FOR DMC11 NUMBER 00
;:ERROR COUNT FOR DMC11 NUMBER 00

001706
001710

000000
000000

PACTOL:

ERCTO1:

;:PASS COUNT FOR DMC11 NUMBER 01
;ERROR COUNT FOR DMC11 NUMBER 01

001712
001714

000000
000000

PACTO2:
ERCTO2:

;:PASS COUNT FOR DMC11 NUMBER 02
;ERROR COUNT FOR DMC11 NUMBER 02

001716
001720

000000
000000

PACTO3:
ERCTO3:

;:PASS COUNT FOR DMC11 NUMBER 03
:ERROR COUNT FOR DMC11 NUMBER 03

001722
001724

000000
000000

ERCTOA4:

PACTO4:

;PASS COUNT FOR DMC11 NUMBER 04
;ERROR COUNT FOR DMC11 NUMBER 04

001726
001730

000000
000000

PACTOS:

ERCTOS:

;PASS COUNT FOR DMC11 NUMBER 05
;:ERROR COUNT FOR DMC11 NUMBER 05

0C1732
001734

000000
000000

PACTO6:
ERCTO6:

OO0

;PASS COUNT FOR DMC11 NUMBER 06
;ERROR COUNT FOR DMC11 NUMBER 06

001736
001740

000000
000000

PACTO7:

:PASS COUNT FOR DMC11 NUMBER 07
;ERROR COUNT FOR DMC11 NUMBER 07

001742
001744

000000
000000

PACT10:

OO0

:PASS COUNT FOR DMC1i NUMBER 10
:ERROR COUNT FOR DMC11 NUMBER 10

001746
001750

000000
000000

PACT11:

OO0

:PASS COUNT FOR DMC11 NUMBER 11
;ERROR COUNT FOR DMC11 NUMBER 11

001752
001754

000000
000000

PACT12:

ERCT12:

OO0

;PASS COUNT FOR DMC11 NUMBER 12
;ERROR COUNT FOR DMC11 NUMBER 12

001756
001760

000000
000000

PACT13:
ERCT13:

©O0O

;PASS COUNT FOR DMC11 NUMBER 13
;ERROR COUNT FOR DMC11 NUMBER 13

001762
001764

000000
000000

PACT14:
ERCT14:

OO0

;PASS COUNT FOR DMC11 NUMBER 14

001766
001770

000000
000000

PACT1S:

ERCT1S:

00O

;PASS COUNT FOR DMC11 NUMBER 15
;ERROR COUNT FOR DMC11 NUMBER 15

001772
001774

000000
000000

PACT16:
ERCT16:

OO0

:PASS COUNT FOR DMCil NUMBER 16
;ERROR COUNT FOR DMCil NUMBER 16

001776
002000

000000
000000

PACT17:
ERCT17:

OO0

........

;PASS COUNT FOR DMC11 NUMBER 17
;ERROR COUNT FOR DMC11 NUMBER 17

000000

CNT.MAP:

PACTOO:

ERCTO7:

ERCT10:

ERCT11:

;ERROR COUNT FOR DMC11 NUMBER 14

SEQ 22

CZOMC
MACRO VO4.00
27-JUN-85 13:16:37 PAGE 24
PROGRAM PARAMETERS, VARIABLES, AND TRAP CALLS.

REM

FORMAT OF STATUS TABLE

0
L

----------------------

PO
I

I
I
I

S
1
1
1

IS OF T G
I
I

I
1

L
I

€

U
U
Uy

T
I

I
R %

-------------------------------------------

I
I
1
I
I
I
+«1Is
L
I
N
E
1
I
I
I
1
1
1

1
1

I
1

1Is&1Ias1
1
I
1

&+«
¥V
E
C
T
0
R
I
§ sXsIe
I
1
I
I
1
1
I
1
1
1
1
1

1
I

CSR

I
I

1
»1I
1
1

STATL

STAT2

----------------------

I
I
......................

I
I

I
I
e E

I
I
e

STAT3

T T

CSR:

CONTAINS OMC11 CSR ADDRESS

STATL:

BITS 00-08 IS OMC11 VECTOR ADDRESS

8I715=1 MICRO-PROCESSOR HAS CRAM

BIT15=0 MICRO-PROCESSOR HAS CROM

BIT14=1 ?27?? TURNAROUND CONNECTOR IS ON
BIT14=0 NO TURNAROUND CONNECTOR
BIT13=0 LINE UNIT IS AN M8201
BIT13=1 LINE UNIT IS AN M8202
BIT12=1 NO LINE UNIY
B8ITS 09-11 IS OMC11 BR PRIORITY LEVEL
STAT2:

LOW BYTE IS SWITCH PAC41 (DDCMP LINE NUMBER)

STAT3:

BITO=1 DO FREE RUNNING TESTS ON KMC
(MUST BE SET TO A ONE MANUALLY [PROGRAM DZDMI ONLY1)

HIGH BYTE IS SWITCH PAC#2 (BM873 BOOT ADD)

KMC MUST HAVE MICRO-CODE WRITTEN FROM RUNNING

DZOMG TEST 2 FIRST
BIT1=1 DMC11-AL LOCAL HIGH SPEED MICRO-CODE
BIT1-0 DMC11-AR REMOTE LOW SPEED MICRO-CODE

SEQ 23

CzomC

MACRO v04.00
27-JUN-85 13:16:37 PAGE 25
PROGRAM INITIALIZATION AND START UP.

;PROGRAM INITIALIZATICN
;:LOCK OUT INTERRUPTS
;SET UP PROCESSOR STACK
;SET UP POWER FAIL VECTOR
sCLEAR PROGRAM CONTROL FLAGS AND COUNTS

;TYPE TITLE MESSAGE

002002
002010
002014
002022
002030
002034
002040
002044
002052
002060
002066
002072
002074
002100
002102
002106
002114

013737
005037
105037
105037
012737
012737
012737
012700
005020
022700
001374
005037
012737
012737

002122
002126
002132
002140
002146
00215+
002162
002164
002166
002170
002176
002204
002210
002214
002220
002222
002230
002232
002236
002242
002250
002254
002256
002262
002270
002272
002276
002300
002304
002306
002312

013746
013746
012737
012737
012737
022777
001402
000407
022626
012737
012737
012637
012637
105737
001006
022737
001402
104402
004737
017737
005737
001402
005037
032737
001012
105737
100007
005737
001006
104402
000000

012737
012706
012737

000340
001200
005336
001310
010016
001325
001327
001470
001676
100000
001702

177776
000024
001314

001320
001322

000006
000004
002166
177570

177570
177777

MoV

234:

001226
001214

177020

001202
001200

003522

000042

001236
000001
001236

001306
007154

001236

CLR
cMp
BNE
CLR

MOV
MoV

000004
001202
001200

000176
000174
000004
000006
001324

001000
007606
176734
000042

MOV
MOV
MOV
MOV
CLR
CLRB
CLRB
MOV
MOV

MOV

001316

002002

001234
000001
002002

.START:

6%:
7%:

20¢%:

MOV
MOV
MOV
MOV
MOV
cMpP
BEQ
BR
cHe
MOV
MoV
MOV
MoV
1578
BNE
cHp
BEQ
TYPE
JSR

MOV

TST
BEQ
CLR
8IT
BNE

1518
8PL
757
SNE
TYPE,
HALT

#340,PS
;LOCK QUT INTERRUPTS
#STACK,SP
sSET UP STACK
# ,PFAIL, 8424
:SET UP POWER FAIL VECTOR
DMNUM, SAVNUM
:SAVE NUMBER OF DEVICES IN SYSTEM.
SWFLG
;CLEAR SOFT TYPEOUT FLAG
ERRFLG
;CLEAR ERROR FLAG
QV.FLG
+ZERO QUICK VERIFY FLAG
#DM.MAP-10,CREAM;GET MAP POINTER.
#CNT .MAP -4 ,MILK ;GET PASS COUNT MAP POINTER
#8IT15,RUN
:POINT POINTER TO FIRST DEVICE.
4CNT .HMAP RO
;PASS COUNT POINTER TO RO
(RO)»
;:CLEAR TABLE
4CNT _MAP+100,R0 ;DONE YET?
23%
:KEEP GOING
LSTERR
;CLEAR LAST ERROR POINTER
#1,TSTNO
+SET UP FOR TEST 1
@.START,RETURN
:SET UP FOR POMER FAIL BEFORE

:TESTING STARTS

806, -(SP)
:SAVE CURRENT VECTORS
844, -(SP)
864,504
#177570,SWR
:SET SWR TO HARD SWR ADDRESS
#177570,DISPLAY ;SET DISPLAY TO HARD SWR ADDRESS
#-1,85WR
;REFERENCE HARDWARE SWITCH REGISTER
6842
:IF = -1 USE SOFT SWR ANYWAY
74
;IF IT EXISTS AND NOT = -1 USE HARD SWR
(SP)+,(SP)
;ADJUST STACK
OSUWREG,
SWR
:POINTER TO SOFT SWR
#DISPREG,DISPLAY ;POINTER TO SOFT DISPLAY REG
(SP).+,.864
;RESTORE VECTORS
(SP)+,806
INIFLG
204
:BR IF YES
QSENDAD, 9042
;IF ACT-11 AUTOMATIC MODE, DON'T TYPE ID
20¢
;TYPE TITLE MESSAGE
LMTITLE
PC,CKSWR
;CHECK FOR SOFT SWR
OSWR ,STRTSH
sSTORE STARTING SWITCHES
8042
;IS IT RUNNING IN AUTO MODE?
.+6
;BR IF NO
STRTSW
;IF YES, CLEAR SWITCHES
#5K00,STRTSW
;:IF SWOOU=1, QUESTIONS ARE ASKED.
174
;:BR IF SWOO=1
STRTSW
;8IT7=127
174
:BR IF SWO7=0
DMACTY
;ARE ANY DEVICES SELECTED?
16}
;BR IF YES
NOACT
;:NO DEVICES SELECTED.

:SET UP FOR TIMEOUT

;HAS INITIALIZATION BEEN PERFORMED

;STOP THE SHOW

CZOMC

MACRO V04,00

SEQ 24

27-JUN-85 13:16:37 PAGE 25-1

PROGRAM INITIALIZATION AND START UP.

002314
002316
002322
002326
002330
002334
002336
002344
002346
002350
002354
00236¢
002364
002370
002374
002376
002402
002406
002412
002414
002416
002420

000776
004717
105737
001410

105737
100431
032737
001403
000424
005137
104402
012704
010437
012437
001411
012437
012437
012437
104410
007454
000762
012700

010512
001324

17%:
164 :

001236

000006

001236

001324

21%:
24s:

006224
001500
001246
001250

Ss:

BR
JSR
15718
BEQ
1578
8MI
BIT
BEQ
BR
coM

MBIT1!8I72,STRTSW;IS TEST NO. OR LOCK SELECTED
243
:IF NO THEN TYPE STATUS
1s
:IF YES DO NOT TYPE STATUS
INIFLG
+SET FLAG

MOV

ODM.MAP, R4
R4, TEMPL

.-2
PC,AUTO.SIZE

INIFLG

21%
iIRTSH

001500

1%:

MOV

sFIRST TIME?

;BR IF YES
:IF USING SAME PARAMETERS DONT TYPE MAP

+ XHEAD

;sTYPE HEADER

(R4)+, TEMP2

;SET CSR

(R4)+,TEMP3
(R4).,TEMP4
(R4).,TEMPS

;SET STAT1
:SET STAT2
;SET STAT3

001252
001254
001256

;:DISQUALIFY CONTINUE SWITCH
;GO DO THE AUTO SIZE

5¢
ADM.MAP,RO

;SET POINTER
:SET ADDRESS
;:ALL DONE IF ZERO

;:TYPE OUT STATUS MAP

;RO POINTS TO STATUS TABLE

808520804040
R A0SR A ARARARRAEASAARR SRS AR SRRk bbi it i Rbks

: s #AUTO SIZE
;:#THIS TEST
; ; #ADDRESSES
; ;#CHECK THE

TEST
VERIFYS THAT THE DMC11S AND/OR KMC11S ARE AT THE CORRECT FLOATING
FOR YOUR SYSTEM. IF THIS TEST FAILS, IT IS NOT A HAROWARE ERROR.
ADDRESSES OF ALL FLOATING DEVICES (DJ,DH,DQ,DU,DUP,LK,DMC,DZ,KMC).
;:oIF THERE ARE NO OTHER FLOATING DEVICES BEFORE THE DMC11, THE FIRST
:;*DMC11 ADDRESS IS 760070, KMC11i IS 760110. NO DEVICE SHOULD EVER BE AT
; : sADDRESS 760000. THIS TEST MAY REQUIRE 2 OR MORE ATTEMPTS TO GET THE
+ s sRIGHT ADDRESSES. AFTER YOU HAVE CHANGED THE ADDRESS TO WHAT IT TOLD
;:oYOU THE FIRST TIME, IT MAY COME BACK AND TELL YOU A DIFFERENT ADDRESS

;:oTHE NEXT TIME YOU RUN IT.

PLEASE HAVE PATIENCE,

THE FINAL ADDRESS

issWILL BE CORRECT (AS LONG AS ALL DEVICES IN FRONT OF THE DMC'S ARE
; 1 sCORRECT).

;5888888488008 82408488888444 084405808040 44 008880005004 0004 0000000000044

002424
002430
002434
002440
002444
002446
002452
002454
002456
002460
002466
002470
002472
002500
002502
002510
002512

002514

002520

013746
013746
005037
005037
005005
011037
001564
005705
001005
032760
001061
000404
032760
001454
012737
005705
001003
012703
000402

000004
000006
000006
001252
001404

100000

000002

100000

000002

002674

000004

000006

MOV
MOV
CLR
CLR
CLR
AUSTRT: MOV
BEQ
TST
BNE
BIT
BNE
BR
1s:
BIT
BEQ
2%:
MOV
TST
BNE
MOV
BR

844, -(SP)
896, -(SP)

806
TEMP3
RS

(RO) ,DMCSR

AUDONE

RS
13

#8I715,2(R0O)

SKIP
2
#8I715,2(R0O)
SKIP
INODEV , 504
RS
3
#6 ,R3

;SAVE LOC 4
;SAVE LOC 6
;CLEAR VEC.2
:CLEAR FLAG
;R5=0=DMC, RS5=-1=KMC
:GET NEXT DMC CSR
iBR IF DONE
sOMC OR KMC?
:BR IF KMC

sCHECK FOR DMC CSR
;SKIP IF NOT DMC

:JTS A DMC SO CONTINUE
;CHECK FOR KMC CSR
:SKIP IF NOT KMC

;SET UP FOR TIMEOUT
;OMC OR KMC?
1BR IF KMC
;:R3 IS COUNT OF DEVICES BEFORE OMC
;GO ON

SEQ 25

MACRO V04,00
27-JUN-85 13:16:37 PAGE 25-2
czonc
PROGRAM INITIALIZATION AND START UP.

002522
002326
002532
002536
002540
002342
002544
002346
002550
002552
002554
002562
002566
002570
002572
002600
002602
002604
002612
002614
002616
002622
002624
0C2630
002632
002636

002642
002644
002646
002652
002660
002664
002666
002672
002674
002676
002700
002704
002706
002710
002712
002720
002722
002724
002726
002730
002736
002742
002744
002746
002750
002752
002754
002756
002760
002762
002764

012703
012702
012701
005711
111204
060401
005201
040401
005703
001371
012737
010137
005705
001005
032760
001014
000404
032760
001407
005711
020137
001411
062701
000756
062700

011037

001470

000750
062700
062737
011037
001457
013701
000735
122243
000002
005737
001014
104402
007223
012737
104411
002770
104402
007277
012737
010137
104410
002776
005705
001003
104402
007320
000402
104402
007330
022626

000010
003010
160010

3s:
;
4%

#10,R3
#DEJTAB,R2
#160010,R1

FLOAT:

(R1)
(R2),R4

R4 .,R1

002700
003022

000004

100000

000002

100000

000002

FY:

1%:

BEQ
ADD

000010

R1,0MCSR
0K
#10,R1

000010
001404

SKIP:

003022

NODEV:
001252

002700

(R1)

24:

001404

000010
000010
001404

13
#BIT15,2(RO)
SKIP
2%
#81IT15,2(R0O)
SKIP

ERR:

ADD
MOV
BEQ
BR
ADD
ADD
MOV
B8EQ
MOV
BR
CMPB
RT1
TST
BNE
TYPE

CONERR

001276

CNVRT
ERRPC

#10,R0

(RO),DMCSR

AUDONE
FY
#10.R0
#1G,XLOC

(RO) ,DMCSR
AUDONE
XLOC,R1

(R2)+,-(R3)
TEMP3
14

®ERR
, SAVPC

1777717
001262

001252

1¢:

3s:
44

MoV

CONVRT
CONTAB

1587
BNE
TYPE
pMcH
BR
TYPE
KMCH
cHP

COUNT OF DEVICES BEFORE KMC
DEVICE TABLE PONTER
WITH ADDRESS 160010
ADDRESS IN R1
TIMEQUT, GET NEXT ADDRESS

;ANY MORE DEVICES TO CHECK FOR?
:BR IF YES
;OK ONLY OMC'S ARE LEFT, SET UP FOR TIMEOUT
:SAVE FIRST DMC/KMC ADDRESS
;:OMC OR KMC?

;BR IF KMC
;CHECK FOR DMC CSR
;:SKIP IF NOT DMC
;:ITS A DMC SO CONTINUE

;:CHECK FOR KMC CSR
;SKIP IF NOT KMC
;CHECK DMC ADDRESS
;:DOES IT MATCH
;BR IF YES
:GET NEXT DMC ADDRESS
;00 1T AGAIN
;SKIP TO NEXT CSR IN TABLE
iGET NEXT CSR
:BR IF DONE
;ELSE CONTINUE
:SKIP TO NEXT DMC CSR
;UPDATE EXPECTED DMC/KMC ADDRESS
;GET NEXT DMC/KMC CSR
;BR IF DONE
;GET EXPECTED DMC/KMC ADORESS
; CONTINVE
:ON TIMEQUT, INC R2, DEC R3

;RETURN

;:CHECK FLAG IF = 0 TYPE HEADER
:SKIP HEADER
;sTYPEOUT HEADER MESSAGE
;CONFIGURATION ERROR!!
;SAVE PC FOR TYPEOUT
sTYPE QUT ERROR PC

:TYPE REST OF HEADER

TYPE

CNERR
MOV

;R3 IS
;R2 IS
;START
;CHECK
3%5 :?

#-1,TEMPS
R1,SAVR1

:SET FLAG SO IT ONLY GETS TYPED ONCE

iSAVE R1 FOR TYPEQUT

:TYPZ CSR VALUES
;OMC OR KMC ?

RS
34

$tBR IF KMC

sCONTINVE

(SP)+,(SP).

;ADJUST STACK

SEQ 26

czonc

MACRO VO4.00
27-JUN-85 13:16:37 PAGE 25-3
PROGRAM INITIALIZATION AND START UP.

002766
002770
002772
002774
002776

003000
003002

003004
003006
003010
003011
003012
003013
003014
003015
003016

003017
003020
003022
003024
003026
003030
003034
003040
003042
003046
003052

003060
003062

003066
003070
003072

003100
003102
003106
003110
003112
003120
003124
003126
003132
003136
003140
003142
003144
003150

000727
000001
006
001276
000002
006
003022
006
001404
007
017
007
007
007
007
007
007
007

000000
005705
001005
012705
012700
000602
012637
012637
032737
001422

104402
005000
000000
027737
101404
104402
000000

000776
017737
013700
000000
012700
012701
010120
005021
022021
022700
001372

ERRPC:

002

CONTAB:

004

DEVTAB:

.EVEN
XLOC:
AUDONE:

1777717
001500
13:

001236

006144
176104

001312

006005

176064
001306

;BR TO GET ouT

XL0C

002

000006
000004
000010

BR
1
.BYTE
SAVPC
2
.BYTE

001306

000300
000302

2%:

34:
4% :

001000

.BYTE
DMCSR
.BYTE
.BYTE
.BYTE
.BYTE
.BYTE
.BYTE
.BYTE
.BYTE
.BYTE

;1KMC

]
TST

;OMC?

;DJ
;DH
;D@
;DU
;0UP
sLK

;OMC

BNE
MOV
MOV
BR

#DM.MAP,
RO

AUSTRT

(SP)+, 86
(SP)+.8%4

MoV

sBR IF KMC AND ALL DONE
sSET RS T0 -1 (KMC)
;RESET RO TO START OF TABLE
;GO DO XKMC'S
sRESTORE LOC 6
sRESTORE LOC 4
sSELECT SPECIFIC DEVICES??
sBR IF NO.

MOV
817
B8EQ
TYPE
CLR
HALT
cHe
8LOS
TYPE
HALT
B8R
MOV
MOV
HALT
MoV
MOV
MoV

+200,R%
#302,R1
R1,(RO).

cHp
cne
BNE

(R1).
(RO)+,(R1)~

:START PUTTING “PC+2 - MALT”
1IN VECTOR AREA.
;POP POINTERS

sBR IF NO.

#5H03, STRTSH
34
MNEM
RS

SSWR
, SAVACT
29

MEXRS

.-2
SSWR ,OMACTYV
DMACTV,RO

CLR

#1000,R0

sTYPE THE MESSAGE.
;ZERO DATA LIGHTS
tWAIT FOR USER TO TELL WHAT DEVICES TO RUN
11IS THE NUMBER VALID?
sBR IF NUMBER IS 0K.

sTELL USER OF INVALID NUMBER.
1STOP EVERY THING.
;RESTART THE PROGRAM AGAIN.
$GET NEW DEVICE PATTERN

sSHOW THE USER WHAT HE SELECTED.
sCONTINUE OYNAMIC SWITCHES.
;PREPARE TO CLEAR THE FLOATING
sVECTOR AREA. 300-776

sALL DONE??

:TEST START AND
L
L
R

003152
003156
003162
003166
003170
03176

001200

012706
013746
013746

000004

012737
005037

003234
000006

005000

000004

.BEGIN: MOV
MOV
MoV
CLR
nv
CLR

, SP
OSTACK
9986, -(5P)
RO
425,004
306

sSET UP STACK
sSAVE LOC 6
sSAVE LOC 4
sSTART AT O
sSET UP FOR TIME OUT
;TO AUTOSIZE MEMORY

czome

PROGRAM

MACRO

27-JUN-85

13:16:37

INITIALIZATION AND START uP,

003202
003204
003210
003212
003216
003222
003226
003232
003234
003236
003242
003246
003252
003254
003260
003262
003270
003276
003300
003304
003312
003220
003322
0C3330

003336
003344
003352
003354
003360

vO4.00

005720
022700
001374
162700
010037
012637
012637
000413
022626
162700
162700
022700
001361
012700
000756
012737
032737
001411
104402
012737
012737
000406
013737
013737
012737
032737
001002
104402
000177

PAGE

6%:

157776
007776
001304
000004
000006

7s:

2%:

000004
007776
030000
037400

177776
001236

006043
000240
000240

003612
003614

003730
003732
010060
000002

003612
003614
001214
001236

10s:

5€Q 27

157
cHp
BNE
SuB
MoV
MoV
MOV
BR
cHe
suB
suB
Cchp
BNE
MOV

000340
000004

005755
175630

MOV

817
8EQ
TYPE
MOV
MOV
BR
MOV
MOV

MOV

8IT
BNE

TYPE
JMp

(RO).
€157776,R0O
6%
47776 RO
RO, MEMLIM
(SP)., 304

(SP).,806
103
(SP)+,(SP)«

#4 RO
€7776.R0
430000,R0
73
#37400,R0
78
4340,PS

48IT2,5TRTSW
1s

LMLOCK

ONOP, TTST
MNOP,TTST.2
3
BRW,TTST

BRX,TTST«2
4CYCLE ,RETURN
45W01, STRTSK

S$
MR
SRETURN

sCHECK ADDRESS IN RO

;1S IT AT LEAST 28K
:BR IF NO
;SAVE 2K FOR MONITORS
;STORE MEMORY LIMIT
;RESTORE LOC 4

;RESTORE LOC 6
sCONTINVE
:ADJUST STACK
;GET LAST GOOD ADDRESS
;SAVE 2K FOR MONITORS
$IS IT 8K?
;BR IF NO

;IF 8K DON'T SAVE 2K
;LOCK OUT INTERRUPTS
;:CHECK FOR LOCK ON TEST
:BR IF NO LOCK DESIRED.

s TYPE LOCK SELECTED.
;ADJUST SCOPE ROUTINE.
sSET UP TO LOCK
; CONTINUE ALONG.

;PREPARE NORMAL SCOPE ROUTINE

;sLOCK NOT SELECTED, SET UP FOR NORMAL SCOPE LOOP
sSTART AT “CYCLE” FIND WHICH DEVICE TO TEST
sIS TEST NO. SELECTED?
;B8R IF YES
;TYPE R

;START TESTING

C2omC
END 0F

MACRO v04.00

SeQ 28

27-JUN-85 13:16:37 PAGE 26

PASS ROUTINE

;END OF PARSS

sTYPE NAME OF

TEST

;sUPDATE PASS COUNT
sCHECK FOR EXIT 70 ACT-11
sRESTART TEST
003364
000005
003366
005037
003372
105037
003376
005237
003402
013777
003410
104402
003414
104402
003420
104411
003424
104402
003430
104411
003434
104402
003440
104411
003444
104402
003450
104411
003454
013700
003460
013720
003464
013720
0C3470
005337
003474
001017
003476
112737
013737
003504
003512
013701
003516
001406
003520
000005
003522
004711
003522
003524
000240
003526
000240
003530
000240
003532
000240
003534
012737
003542
000137
003546
000001
006
003550
003552
001404
003554
000001
003556
004
003560
001374
003562
000001
003564
006
003566
001230
003570
000001
003572
006
001232
003574

001234
001325
001230
001230
005733
006072
003546
006100
003554
006106
003562
006117
003570
001322
001230
001232
001314

000377
001310
000042

.EOP:

RESET

CLR
CLRB

INC
MoV
TYPE

175570

TYPE
CNVRT
TYPE
CNVRT
TYPE
CNVRT
TYPE
CNVRT
MOV
MOV
MOV
DEC
BNE
MOvB
MoV
MOV

001327
001314

8EQ

LSTERR
ERRFLG

PASCNT
PASCNT,B8DISPLAY

MEPASS
»MCSRX
MVECX
+XVEC

«MPASSX

«XPASS
+MERRX
. XERR

MILK,RO
PASCNT,(RO).

ERRCNT, (RO).
SAVNUM
RESTRT
#377,QV.FLG
DMNUM, SAVNUM
3042 ,R1
RFSTRT

RESET
$ENDAD
:

010060
010060

001214

002

JSR
NOP
NOP
NOP
NOP
RESTRT: MOV
JMP
XCSR:
1
.BYTE
DMCSR
XVEC:
1
.BYTE
XPASS:

002

XERR:

002

gflRVEC

BYTE
PASCNT
1
.BYTE
ERRCNT

:MAKE THE
WORLD CLEAN AGAIN.
;CLEAR LAST ERROR PC
;CLEAR ERROR FLAG

;UPDATE PASS COUNT
;:DISPLAY PASS COUNT
; TYPE END PASS
;TYPE CSR
:SHOW IT

; TYPE VECTOR
;SHOW IT
; TYPE PASSES
;SHOW IT

;TYPE ERRORS

:SHOW IT

;GET POINTER TO PASS COUNT
;STORE PASS COUNT FOR THIS DMC1i
;STORE ERROR COUNT FOR THIS DMC11
;ARE ALL DEVICES TESTED?
;BR IF NO.
;SET THE QUICK VERIFY FLAG.
;RESTORE THE COUNT
;CHECK FOR ACT-11 OR DOP
;IF NOT, CONTINUE TESTING
;STOP THE SHOW--CLEAR THE WORLD

PC,(R1)

#CYCLE.RETURN
CYCLE
6,2

4,2

6.2

6,2

; SCOPE LOOP AND INTERATION HANDLER
003576
003602
003604

004737
010016
032777

007606

040000

175370

.SCOPE: JSR
MOV
BIT

PC,CKSHR
RO,(SP)
#81714,35WR

;:CKECK FOR SOFT SWR
iSAVE RO ON THE STACK
:'LOOP ON THIS TEST*?

c2omC
GENERAL

MACRO VO4.00

27-JUN-85

UTILITIES (TYPEOUT, ERROR,
003612
003614
003616
003622
003624
003630
003632
003640
003642
003646
003630
003654
003662
003664
003670
003674
003700
003706
003714
003716
003720
003724
003730
0C3732
0C3734

001407
000437
005737
001434
005037
000415
032777
001011
105737
001406
005237
0237%7

101414
105037
005037
005037
012737
013737
011600
022626
013701
000177
001407
000437

SCOPE,

ETC)

T71sT:

003734

003734
004000

175342

1%:

001327
001224
001224

001325
001224
001220
000020
001216

SEQ 29

13:16-37 PAGE 26-1

8EQ
B8R
1S7T
8EQ
CLR
BR
BIT
BNE
7578

1s
34
DONE
3s
DONE
23

INC

LPCNT
LPCNT, ICOUNT
3
ERRFLG
LPCNT
LOCK
20, ICOUNT
NEXT ,RETURN

B8EQ
001222

2%:

001222
001214

001404
175264

3s:

BRW:
BRX:
DONE:

000000

cHe
BLOS
CLRB
CLR
CLR

MOV
MoV
MoV
POP2SP
MOV

JMP
1407
437
0

45uW11, ISWR

(SP).RO

OMCSR,R1
SRETURN

:BR _IF NO.

;GOTO 3¢

(IF LOCK SWO1=1;

THIS LOC

=240)

(IF LOCK SWO1=1; THIS LOC =240)

;WAS TKCSR DONE SET?

;BR IF NO (LOCKED ON TEST)
;YES, CLEAR FLAG
:GO TO NEXT TEST
;DELETE ITERATION?
(QUICK PASS}
:BR IF YES
;HAVE PASSES BEECOMPLETED?
;BR IF QUICK PASS.
+UPDATE ITERATION COUNTER
;ARE ALL ITERATIONS DONE??
;BR IF NOT YET

;:PREPARE FOR NEW TEST

:START ICOUNTER AT 0
;RESET ITERATIONS
;GET NEXT TEST

:POP RO OFF OF THE STACK
;:FAKE AN "RTI”

:R1 CONTAINS BASE DMC ADDRESS
;GO DO THE TEST

;CHECK FOR FREEZE ON CURRENT DATA
003736

003742

003750
003752
003756
003760
003764

004737

032777
001405
005737
001402
013716

000002

007606
001000

175232

.SCOP1:

001220
001220

1s:

JSR

BIT
BEQ

TST
BEQ
MOV
RTI

PC.CKSWR
45K09, ISWR
14

LOCK
1s
LOCK, (SP)

;CHECK FOR SOFT SWR
;IS SW09=1(SET)?
:BR IF NOT SET.
;GOTO THE ADDRESS IN LOCK.
:G0 BACK.

s TELETYPE OUTPUT ROUTINE
003766
003770
003774
004002
004006
004010
004016
004020
004022

004024
004030
004034
004036

004042
004044
004046

010546
017605
062766
005737
001004
032777
001012
105715
100002
104402
105777
100375
112577
001357
012605
000002

.TYPE:

000002
000002
010016

000002

010000

175164

4%:

1$:

005672
175154

2%:

175150

MOV
MOV
ADD
TST
BNE
BIT
BNE
TST8
BPL
TYPE
1578
8PL
MOVB

RS5,-(SP)

32(SP) ,R5
92,2(SP)

SWFLG
13
#SW12, 3SWR
33

(R5)
24

MCRLF

8TPCSR
24
(R5).,3TPDBR

3s:

(SP)+,RS

;SAVE RS ON THE STACK.
:GET ADDRESS OF MESSAGE.
;POP OVER ADDRESS.
;SOFT SWR MESSAGE?
;IF YES TYPE IT OUT REGARDLESS OF SWi2
sINHIBIT ALL PRINT 0OUT??

:BR IF NO PRINT OUT WANTED (SW12=1)
;1S NUMBER MINUS? (MSB=1(BIT7))
;BR IF NUMBER IS PLUS
;TYPE A CR/LF?
;sTTY READY?
:BR IF NO.
;PRINT CURRENT CHAR.
;IF NOT ZERO KEEP PRINTING!
;END OF OUTPUT. RESTORE RS
;GO HOME

SEQ 30

CZOMC
MACRO vV04.00
27-JUN-85 13:16:37 PAGE 26 2
GENERAL UTILITIES (TYPEQUT, ERROR, SCOPE, ETC)

004050
004052
004054
004062
004070
004072
004074
004100
004104
004110
004112
004116
004122
004126
004130
004134
004136
004144
004146
004150
004152
004154
0C4160
004162

004164
004166
004170

004172

010346

010446
017637
062766

104402
000000
012704
012703
105777
100375
117714
142714

122427
001417
105777
100375
017777
005303
001356
012604
012603
104402
010346

.INSTR: MoV
000004
000002

004072
000004

007502
000007

175074

175070
000200
000015

175054
175044

005666

010446
000741
012604

175046

MOV

MoV
ADD
.INSTL: TYPE
MSG:
0
MOV
MoV
1s:
7578
8PL
MOVB
81C8
CHPB
BEQ
1578
2%:
BPL
MOV
DEC
BNE
MOV
MOV
.INSTE: TYPE
MOV
MOV
INSTR2:

012603

000002

B8R

MOV
:$¥

R3,-(5P)
R4,

(sP)

84(5P), .MSG
#2,4(5P)

sSAVE R3 ON STACK
;:SAVE R4 ON STACK

SINBUF ,R4
47,R3
8TKCSR
13
8TKDBR,(R4)
#200,(R4)

(R4)+,415
INSTR2
aTPCSR
23
8TKDBR,3TPDBR
R3
1s
(SP)+,R4
(SP)+,R3
MQM
R3,-(SP)
R4,-(5P)

.INST1

(SP)+,R4
(SP)+,R3

;RESTORE R4
;:RESTORE R3

;CONVERT ASCII STRING TO OCTAL
004174
004176
004200
004204
004210
004214
004220
004224
004230
004234
004236
004242
004246
004250
004254
004256
004262
004264
004270
004272
004276
004300
004302
004304

he-

010546
010446
016605
012537
012537
012537
112537
112537
010566
005005
012704
122714
001420
121427
002415
121427
003012
142714

152405
122714

001406
006305
006305
006305

000004
004364
004366
004370
004372
004373
000004

007502
000015
000060

000067

000060
000015

.PARAM: MoV
MOV
MOV
MOV
MOV
MOV
MOVB
Move
MoV
PARAML
: CLR
MOV

cHMPe

1¢:

R5,-(SP)
R4, -(SP)
4(SP).RS
(R3)-,LOLIM
(R5)¢,HILIH
(R5)+,DEVADR

(RS)+,LOBITS

(R5)+, ADRCNT
R5.4(5P)
RS
AINBUF R4

#15,(R4)

BEQ

PARERR

BLT
cMPB
86T
8IC8

PARERR
(R4),467
PARERR
#60,(R4)

CMPB
BEQ
ASL
ASL
ASL

#15,(R4)
LIMITS
RS
RS
RS

CcMPB

BI1S8

(R4),060

(R4)+,R5

SEQ 31

MACRO VO04.00
27-JUN-85 13:16:37 PAGE 26 3
czomC
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC)

004306
004310
004312

000760
104404
000750

PAREPR:

BR
INSTER
BR

PARAM1

;TEST TO SEE IF NUMBER IS WITHIN LIMITS
004714
004320

004322
004326
004330
004334

020537
101373

020537
103770
133705
001365

004366

LIMITS:

004364

CHP
BHI

cHp
BLO
8IT8
BNE

004372

R5,HILIM
PARERR
R5,LOLIM
PARERR
LOBITS,RS
PARERR

;STORE NUMBER AT SPECIFIED ADDRESS
004336
004342
004344
004350
004354
004356
004360
0C4362

004364
004366
004370
004372

013704
010524
062705
105337
001372
012604
012605
000002

004370

1%:

000002
004373

000000
000000
000000
000000
004373

MOV
MOV
ADD
DECB
BNE
MOV
MOV
RTI

DEVADR,R4
R5,(R4)+
#2.RS
ADRCNT
1s
(SP)+,R4
(SP)+,R5

LOLIM:
O
HILIM:
O
DEVADR: 0
LOBITS: 0
ADRCNT=LOBITS+1

;SAVE PC OF TEST THAT FAILED AND RO-RS
004374

016637

000004

001276

.SAVOS:

MOV

4(SP),SAVPC

:SAVE R7 (PC)

;SAVE RO-RS

004402

004406
004412
004416
004422
004426
004432

010537

010437
010337
010237
010137
010037
000002

001272

001270
001266
001264
001262
001260

SVoS:

MoV

MoV
MoV
MOV
MOV
MoV
RTI

RS5,SAVRS

:SAVE RS

R4 ,SAVR4
R3,5AVR3
R2,5AVR2
R1,SAVR1
RO, SAVRO

:SAVE R4
:SAVE R3
sSAVE R2
:SAVE R1
:SAVE RO
sLEAVE.

;RESTORE RO-RS
004434
004440
004444
004450
004454

004460
004464

013700
013701
013702
013703

001260
001262
001264
001266

.RES05: MOV
MOY
MOV
MoV

SAVRO, RO
SAVR1,R1
SAVR2,R2
SAVR3,R3

:RESTORE
sRESTORE
;sRESTORE
sRESTORE

013705
0,002

001272

MoV
RTI

SAVR5,RS5

tRESTORE R5
;:LEAVE

013704

001270

MoV

SAVR4 R4

RO
R1
R2
R3

sRESTORE R4

:CONVERT OCTAL NUMBER TO ASCII AND OUTPUT TO TELEPRINTER
[

ettt

iy Al Vg Ui

SEQ 32

CZOMC
MACRO vO4.C0
27-JUN-85 13:16:37 PAGE 26-4
GENERAL UTILITIES (TYPEQUT, ERROR, SCOPE, ETC)

004466
004472
004474
004476
004500
004502
004504
004510
004516
004522
004526
004532
004536
004544
004546
004554
004560
004564
004570
004572
004576
004602
0C4604
004606
004610
004612

004614
004616
004620
004622
004624
004630
004632
004636
004640
004644
004646
004652
004656
004660
004662
004666
004672
004674
004676
004700
004702
004704

004706
004710
004712

004714

104402
010046
010146
010346
010446
010546
017601
062766
012137
1121%7

112137
013137
122737

001003
042737
013704

113705
012700
010403
042703
062703
110320
000241
006604
000241

005672

000012
000002
004710
004712
004713

004714

.CONVR:
.CNVRT:

000012

1s:

000003

004712

177400
004714
004712
001416

004714

177770
000060

000000

007544
004712

CcMPB

2%:

3s:

44:

004713
000040
004713

007544
004710

MOV

MoV
MOV
MOV
MOV
ADD
MoV
MovB
Move

MOV

006004
000241

006004
005305
001362
012703
114023
105337
001374
105737
001405
112723
105337
001373
105013
104402
005337
001313
012605
012604
012603
012601
012600
000002
000000
000000
004713

TYPE
MOV

5¢:

6%:

BNE
BIC
MOV
Move
MoV
MoV
8IC
ADD
Move
CLC
ROR
CLC
ROR
CLC
ROR
DEC
BNE
MoV
move

DECB
BNE
1578
BEQ
MOVE
DECB
BNE
CLR8
TYPE
DEC
BNE
MoV
MoV
MOV
MOV

MOV

WROCNT:

RTI

JMCRLF
RO, -(SP)

R1i,-(5P)

R3,-(sP)
R4,-(SP)
R5, -(SP)
812(SP),R1
#2,12(sP)
(R1)+,WRDCNT
(R1)+,CHRCNT
(R1)+,SPACNT

8(R1)+,BINWRD

93 ,CHRCNT

24
#177400, BINWRD
BINWRD R4
CHRCNT RS
ATEMP, RO
R4 ,R3
#177770,R3
9060,R3
R3,(RO)+
R4
R4
R4

RS
33
OMDATA ,R3

-(RO),(R3)+

CHRCNT
43
SPACNT
64
€040,(R3).
SPACNT
54
(R3)
+MDATA
WRDCNT
i
(SP)+,RS
(SP)+,R4
(SP)+,R3
(SP)+,R1

(5P)+,RO

CHRCNT: 0O
SPACNT=CHRCNT+1
BINWRD: 0
;:TRAP DISPATCH SERVICE

CZDMC

GENERAL

MACRO VO4.00
U/(ILITIES

SEQ 33

27-JUN-85 13:16:37 PAGE 26-S

(TYPEOUT,

ERROR,

SCOPE,

ETC)

sARGUMENT OF TRAP IS EXTRACTED
sAND USED AS OFFSET TO OBTAIN POINTER
:sTO SELECTED SUBROUTINE
004716

011646nee.

004724
004730
004732

017616
006316
042716

004720

004736
004742

004746

162716

062716
017616

000136

000502
000000
177001

.TRPSR:

MOV

TRPOK:

001330
000000

(SP),-{SP)

;GET PC OF RETURN

MOV
ASL
BIC

8(SP),(SP)
(SP)
2177001, (SP)

iGET TRP
;MULTIPLY TRAP ARG BY 2
;CLEAR UNWANTED BITS

ADD
MOV

&.TRPTAB,(SP)
8(SP),(SP)

;POINTER TO SUBROUTINE ADDRESS
; SUBROUTINE ADDRESS

SUB

JHP

#2,(SP)

8(SP)s

;=PC OF TRAP

;GO TO SUBROUTINE

;ERROR HANDLER
004750
004754
004762
004764
004770
004772
005000
0C5006
005010

004737
032777
001406
105777
100003
112777
032777
001105
021637

005016
005022
005026
005030
005032
005036
005040
005042
005044
005046
005052
005056
005062
005066
005072
005076
005100
005104
005106
005112
005116
005122
005124
005130
005134
005140
005144
005150
005154
005162
005166

011637
105037
104406
011605
162705
011504
006304
061504
006304
042704
062704
012437
012437
011437
105737
001403
005737
001040
104402
104402
005737
001402
104402
104402
104411
104402
104411
104402
112737
005737
001402

005014

001404

007606
010000

174220

JHLT:

174220
000207
020000

174212
174174

001234

B8EQ

001234
001325
000002

177001
036362
005172
005204
005216
001325

005216
005672
005672
001220
006142
006130
005330
006217
005322
005672
177777
005172

XBX:

JSR
BIT
BEQ
TSTB
BPL
MOVB
BIT
BNE
cHP

001325

MOV
CLRB
1%:
SAVOS
MOV
SuB
MOV
ASL
ADD
ASL
BIC
ADD
MOV
MOV
MOV
1ST8
BEQ
TST
BNE
TYPMSG: TYPE
TYPE
ST
BEQ
TYPE
1$:
TYPE
CNVRT
TYPE
CNVRT
TYPE
MOVB
ST
BEQ

PC.CKSWR
aSW12, aSWR
XBX
9TPCSR
XBX
#207.8TPDBR
25W13, 3SWR
HALTS
(SP),LSTERR

;CHECK FOR SOFT SWR
:BELL ON ERROR?
:BR IF NO BELL
;TTY READY.
;DON'T WAIT IF TTY NOT READY.
;PUSH A BELL AT THE TTY.
;DELETE ERROR PRINT OUT?
;BR IF NO PRINT OUT WANTED.
;WAS THIS ERROR FOUND LAST TIME?

(SP),LSTERR
ERRFLG

;RECORD BEING HERE
;PREPARE HEADER
;SAVE ALL PROC REGISTERS
;GET THE PC OF ERROR
:GET ADDRESS OF TRAP CALL
;GET HLT INSTRUCTION
;MULT BY TWO
;DOUBLE IT
sMULT AGAIN
;CLEAR JUNK
:GET POINTER
iGET ERROR MESSAGE
;GET DATA HEADRER
;GET DATA TABLE
:TYPE HEADREER
;BR IF YES
;D0ES DATA TABLE EXIST?
;B8R IF YES.

(SP).RS
#2,RS
(RS) .R4
R4
(RS),R4
R4
9177001,R4
#.ERRTAB,R4
(R4)+,ERRMSG
(R4)+,DATAHD
(R4) ,DATABP
ERRFLG
TYPMSG
DATABP
TYPDAT
,MCRLF
JMCRLF
LOCK
13
MASTEK
MTSTN
,XTSTN
MERRPC
,ERTABO
MCRLF
¢-1,ERRFLG
ERRMSG
WRKO .FM

;BR IF YES

;SHOW IT
;TYPE PC.
;SHOW IT
:GIVE A CR/LF
:NO MORE HEADER UNLESS NO DATA TABLE.
;IS THERE AN ERROR MESSAGE?
:BR IF NO.

SEQ 34

MACRO vO04.00
CZomMC
27-JUN-85 13:16:37 PAGE 26-6
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC.

005170
005172
005174
005174
005200
005202
005204
005206
005212
005214
005216
005220
005222
005230
005232
005236
005240
005242
005246
005250
005252
005256
005264
0€5266
005274
005276
005304
005310
005314
005320
005322

TYPE
ERRMSG
: 0
WRKD.FM:
15T
BEQ
TYPE
DATAHD : 0
TYPDAT: 157
BEQ

104402
000000

005737
001402
104402
000000
005737
001402

005204

005216

104410

DATABP:
RESREG:

000000

104407
022737
001403
005777
100005

010046
016600
000000
012600
005237
032777

005324
005326
005330
005332
005334

001007
032777
001411
013737
012706
013701
000177
000002
000001
006
001276
000001
003
001226

005336
005336
005344
005346

012737
000000
000777

003522

000042

HALTS:

173744
1¢:

000002

001232
000400

173716

002000

173706

001216
001200
001404
173674

001214

EXITER:

1¢:

2%:
ERTABO:

002

XTSTN:

002

CONVRT
0
RESO5
CHp
BEQ

157
BPL
PUSHRO

;sTYPE

H
DATAHD
TYPDAT

DATABP
RESREG

;DATA HEADER?

;BR IF NO
; TYPE

:
DATA HEADER
;DATA TABLE?
;BR IF NO.
; SHOW

S$ENDAD, 9442
1s
SS5WR
EXITER

MOV
HALT
POPRO

2(SP),RO

INC
BIT
BNE
817
8EQ
MOV
MOV
MOV
JHP
RTI
1
.BYTE
SAVPC
1
.BYTE
TSTNO

ERRCNT
#5H08, §SWR
13
#SW10, ISWR
24
NEXT ,RETURN
#STACK,SP
DMCSR,R1
SRETURN

ERROR MESSAGE

DATA TABLE

;RESTORE PROC REGISTERS
:IF ACT-11 AUTOMATIC MODE, HALT!!
;HALT ON ERROR?

;BR IF NO HALT ON ERROR
;SAVE RO
;SHOW ERROR PC IN DATA LIGHTS
sHALT
;GET RO
;UPDATE ERROR COUNT
;GOTO TOP OF TEST?
;BR IF YES
;GOTO NEXT TEST?
:BR IF NO
;SET FOR NEXT TEST
;RESET SP
;SET UP R1
;GOTO SPECIFIED TEST
;RETURN

6,2

3'2

;ENTER HERE ON POWER FAILURE

005350

000024

PFAIL:

Mov
HALT
BR

ORESTART,
24

:SET UP FOR POWER UP TRAP
;HALT ON POWER DOWN NORMAL

sPROCESSOR WILL TRAP HERE WHEN POWER IS RESTORED
005350
005350
005356
005362
005366
005372
003376
005400
005404
005410

012737
012706
013701
005037
005237
001375
104402
104411
105037

005336
001200
001404
001416
001416

005675
005430
001325

000024

RESTAR:

#.PFAIL,24
#STACK,SP

DMCSR,R1
TEMP
TEMP
-4

JMPFAIL

"PFTAB
ERRFLG

+SET UP FOR POWER FAILURE
sRESET THE STACK POINTER
;RESTORE R1
;READY FOR TIMMER
;PLUS ONE TO THE TIMER!
;BR TIF MORE TO0 GO
;TYPE THE MESSAGE
;TELL WHAT TEST TO RETURN TO.
;START CLEAN

L
—

SEQ 35

MACRO VO4.00
27-JUN-85 13:16:37 PAGE 26-7
CZonc
GENERAL UTILITIES (TYPEQUT, ERROR. SCOPE, ETC)

005414
005420
003422
005424
005430
005432
005434

001234

012777
104414
121111

000020

005436
005436
005444
005446
005450
005450
005452
005454
005462
005464

104414
121224
032777
001772
000002

005466
005466
005474
005502

173564

PFTAB:
.BYTE

002

173746

173730

152777
142777
000002

000100
000300

173712
173704

000002
173676
000002
000100

173674

173452

005542
005550

152777
013677
062746
032777
001401
000000
1527717
142777
000002

000003
000007

173644
173636

005552
005552
005556
005562
005570
005576
005604
005610
005612

013637
062746
152777
027777
142777
005337
001364
000002

001416
000002
000020
173610
000020
001416

013637
062746

001416
000002

005614

005616
005616
005622
005626
005626
005630
005632
005640
005642
005642
005644

104414
021364
032777
001772
104414
021364

.DELAY:

1¢:

000020

005504
005504
005512
003516
005522
005530
005532
005534

005037
005011
104412
000177
000001
003
001226

173616
173606
173602

.MSTCLR:

.ROMCLK:

14:

LSTERR

MOV
ROMCLK
121111

€20,39MP04

ROMCLK
121224
-84
BEQ
RTI

.TIMER:

1$:

173552
2¢:

(R1)

SRETURN

SHHH

;CLEAR MAINT BITS

:START CLEAN UP OF DEVICE
:START DOING THAT TEST AGAIN.

;sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;POKE CLOCK DELAY BIT

#8174.20MP04
1

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sPORT4 _IBUS#11
;IS CLOCK BIT SET?
;BR IF NO

8158
8IC8
RTI

48176, 3DMCSRH
;SET MASTER CLEAR
98IT6!BIT7,80MCSRH
;CLEAR MASTER CLEAR AND RUN

BI1SB
MOV
ADD
BIT
BEQ
MALT
8ISB
81C8
RTI

#8IT1,80MCSRH
8(SP)+,80MPO6

.DATACLK:
MoV
ADD
i¢:
B1SB
cHp
8I1C8
DEC
BNE
3s:

000002

CLR
CLR
MSTCLR
JHP
1
3,2
TSTNO

RTI

;RETURN

:3"06.8$HR

ROMCLK
021364

BIT
BEQ

ROMCLK
021364

sHALT IF SW06 =1

:BR IF SWO6 =0
;HALT BEFORE CLOCKING INSTRUCTION

@8]IT1:!8IT0,8DMCSRH ;CLOCK INSTRUCTION
@8IT2!BIT1!BITO, 8CMCSRH
;CLEAR ROMO, ROMI, STEP

8(SP)+,TEMP
#8174, 3DMCSRH
80MCSR, 8DMCSR
#B8IT4, SDMCSRH
TEMP
1

.BLKW 1

MOV
ADD

;SET ROMI
;LOAD INSTRUCTION IN SEL6
;ADJUST STACK

;PUT TICK COUNT IN TEMP
;ADJUST STACK
:SET STEP LU

sWASTE TIME

sCLEAR STEP LU
;DEC TICK COUNT
iBR IF NOT DONE
sRETURN

8(SP)+,TEMP
¥2,-(5P)

;MOVE COUNT TO TEMP
sADJUST STACK

&2 ,80MP0O4
1¢

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;PORT4_IBUS+ REG11
;IS PGM CLOCK BIT CLEAR?
:BR IF YES
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;PORT4_IBUS* REG1L

SEQ 36

MACRO V04.00
27-JUN-85 13:16:37 PAGE 26-8
cZoMC
GENERAL UTILITIES (TYPEQUT, ERROR, SCOPE, ETC)

005646
005654
005656
005662
005664

032777
001372
005337
001361
000002

005666
005672
005675
005733
005755
005760
006005
006031
006043
006072
006100
006106
006117
006130
006142
006144
006217
06224
006263
006322
006374
006450
006510
006526

006606
006704

040
015
377
377
377
377
377
377
377
103
126
120
105
124
052
377
120
212
377
212
377
377
37
377
377
377
377

007016
007054
007114
007154
007205
007215
007223
007277
007320
007330
007340

377
377
377
377
377
116
377
377
040
040
377

007454
007456
007460
007462
007464
007466
007470
007472
007474
007476
007500

000005
006

006547

ll?/

001246
006
001250
006

001252

001256

000002

173536

001416

040
012
120
105
122
116
111
124
114

123
105
101
122
105
000
123
103

040
040
040
055
110

103
126

111

077

000

127
116
000
117
116
105
117
122
103
123
122
123

105

072
040
040
040
055

117
123
105
122

127

110

123
123

127
127
123
117
123
127
104
130

111
116
012
105
377

105
050
050
104

003

113
115

MQM:

MCRLF:
MPFAIL
:
MEPASS:
MR:

MERR2:
MERR3:

MTSTPC:

MLOCK:
MCSRX:
MVECX:

MPASSX:
MERRX:
MTSTN:
MASTEK
:
MNEW:

MERRPC
:

XHEAD:

BI17
BNE
DEC
BNE
RTI

42 ,3DMP04

.ASCIZ

.ASCIZ
.ASCIZ
.ASCIZ

.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCII
.ASCII
.ASCII

NUM:
CSR:
VEC:
PRIO:
CRAM:
MODU:

.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

LINE:
BM:
CONN:
NOACT:
SWMES:
SWMES]L
:
CONERR:
CNERR:
DMCH.
KMCM:
SPEED:

.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCI2
.ASCI1Z
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

.EVEN
XSTATQ:

003
003
003
002

.EVEN

5
.BYTE
TEMPL
.BYTE
TEMP2
.BYTE
TEMP3
.BYTE
TEMP4
.BYTE
TEMPS

;IS PGM CLOCK BIT SET?

2¢

;BR IF YES

TEMP

;DEC COUNT

:BR IF NOT DONE

;:RETURN

¢15><12>

<377>/PUR

FAILED.

<377>/END PASS

RESTART

CZDMC

TEST

<377>/R/
<377>/N0O DEVICES PRESENT./
<377>/INSUFFICIENT DATA!/
<377>/TEST PC-/

<377>/L0CK

SELECTED

TEST/

/CSR: /
/VEC: /
/PASSES: /
/ERRORS: /
/TEST NO: /
/’%/

;3Z7>;SET SWITCH REG TO DMC11'S DESIRED ACTIVE./
<212>/
<3775/
<«212>/

MAP OF DMC11 STATUS/

#PC

<377>/HOW MANY DMC11'S TO BE TESTED?/
<377>/CSR ADDRESS?/
<377>/VECTOR ADDRESS?/
<377>/BR PRIORITY LEVEL?

(4,5,6,7)?/

<377>/IF DMC HAS CRAM (M8204) TYPE *Y”, IF CROM (M8200) TYPE “N” 2/
<377>/WHICH LINE UNIT? IF NONE TYPE “N“”, IF M8201 TYPE "1“, IF M8202 TYPE

<377>/SWITCH PAC#1 (DDCMP LINE &)?2/

<377>/S5WITCH PAC#2

(BMB73 BOOT

ADD)?/

<377>/1S THE LOOP BACK CONNECTOR ON?/
<377>/NO DEVICES ARE SELECTED/
<377><12>/5UR= /

/NEN? /

<377><377>/0MC11 FOUND AT NON-STANDARD ADDRESS
<377>/EXPECTED
FOUND/

/7 (OMC) /
/7 (KMC) /

PC:

<377>/DMC11-AR(REMOTE,LOW SPEED) OR DMC11-AL(LOCAL,HIGH SPEED) TYPE

6,3
6.3
6,3
6,3
6,2

"R” OR

-t

SEQ 37

MACRO v04.00
27-JUN-85 13:16:37 PAGE 26 9
CczoMC
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC)

;BUFFERS FOR INPUT OUTPUT
007502

007544

INBUF
:
.=.+40
MDATA:
.=.+40

000000
007544
000000
007606

0
0

;ROUTINE USED TO CHANGE SOFTWARE SWITCH
;REGISTER USING THE CONSOLE TERMINAL
....................................

007606
007614
007616
007622
007624
007632
007640
007642
007650
007652
0C7654
007656
007660
007666
007670
007674
007700
007702
007704
007710
007714
007720
007722
007726
007730
007734
007736
007742
007744
007746
007752
007754
007756
007760
007762
007764
007772

007774
007776
010002
010006
010010
010012
010014

(S—

022737
001077
105777
100003
012737
022777
001404
022777
001061
010246
010346
010446
012737
005002
012704
104402
104411

010052
104402
004737

022703
001424
022703
001416
022703
001754

022703

001762
005004
042703
006302
006302
006302
050302
000752
012766
005704
001002
010277
005037
012604
012603
012602
000207

000176

001202

CKSWR:

1777717
000007

003734
171346

2%:

000207

171336

171362

CHP

177777

010016

177777
007205

000012

000025
000007

177770

171200
010016

CKSWR1:

BNE
MOV
MOV
MoV
MOV

CLR
MoV
TYPE
CKSWR2: CNVRT

SOFTSW

007215
010020
000015

002002

CMP
BNE
TSTE
8PL
MOV
cMP
BEQ

000006

CKSWR3: TYPE
CKSHWR4: JSR
cmp
BEQ
CHP
BEQ
cHP
BEQ
cMP
BEQ
CLR
BIC
ASL
ASL
ASL
8IS
BR
4%
MOV
Ss:
157
BNE
MOV
6%:
CLR
MOV
MOV
MoV
CKSWRS: RTS

4#SUWREG, SWR
CKSWRS
8TKCSR
24
#7,8TKDBR

13
#207,8TKDBR
CKSWRS
R3,-(SP)
R4, -(5P)
#-1,SWFLG
R2

SWMES
. SWMES]

PC . INCHAR
#15.R3
-1
#12.R3
44
#25,R3

CKSHR1
47,R3
CKSWR4
R4
4177770,R3

#.START,6(SP)
R4
64
R2,8S5WR
SWFLG
(SP). R4
(SP)+,R3
(SP)+,R2
PC

;IS THE SOFT SWR BEING USED?
;:BR IF NO
;IS DONE SET?
;GO ON IF NOT SET
;IF DONE SET, SET FLAG
;WAS CTRL G TYPED? (7 BIT ASCII)

;BR IF YES
;WAS CTRL G TYPED? (8 BIT ASCII)
;BR IF NO
:STORE R2
;STORE R3
;STORE R4
;SET SOFT TYPE OUT FLAG
;CLEAR NEW SWR CONTENTS
;SET FLAG TO ALL ONES
;TYPE “SWR=

*»

;TYPE OUT PRESENT CONTENTS

;0F SOFT SWITCH REGISTER

;TYPE

"NEW?

;GET RESPONSE
sWAS IT A CR?
:BR IF YES
;WAS IT A LF?
;BR IF YES
;WAS IT CTRL v?
:BR IF YES(START OVER)
sIF CNTL G GET NEXT CHAR
;IT MUST BE A DIGIT SO CLR FLAG
tONLY 0-7 ARE LEGAL SO MASK OFF BITS

;SHIFT R2 3 TIMES

;sADD LAST DIGIT
sGET NEXT CHARACTER
sLF WAS TYPED SO GO TO START
;IS FLAG CLEAR?
:IF NOT DON’'T CHANGE SOFT SWR
;IF YES THEN WRITE NEW CONTENTS TO SOFT SWR
;CLEAR TYPEQUT FLAG

;:RESTORE R4

;RESTORE R3

;RESTORE R2
;RETURN

SEQ 38

MACRG V04.00
27-JUN-BS 13:16:37 PAGE 26-10
czomc
GENERAL UTILITIES (TYPEOUT, ERROK, SCOPE, ETC)

010016

000000

010020
010024
010026
010032
010036
010040
010044
010050

105777
100375

017703
103777
100375
010377
042703
000207

010052
010054
010056

000001
006
000176

171160

SHFLG:

INCHAR:

7578
BPL
MOV
7518
BPL
MOV
8IC
RTS

8TKCSR
-4
STKDBR ,R3
8TPCSR
.-4
R3,8TPDBR
08IT7,R3
PC

SOFTSK:

1
.BYTE
SWREG

6,2

171154
171152

171146

000200

002

SEQ 39

CZOMC
MACRO VO4.00
27-JUN-85 13:16:37 PAGE 27
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC)

:ROUTINE USED TO "CYCLE* THROUGH UP TO 16 DMC1i'S

;THIS ROUTINE SETS UP THE CONTROL ADDRESS FOR THE DIAGNOSTIC
sAND RUNS THE SPECIFIED OMC11'S.
THIS ROUTINE #MUST»
;BE RUN FIRST BEFORE ENTERING THE DIAGNOSTIC FOR THE
:SETUP NECESSARY.
010060

010064
010066

010072
010074
010076
01010v
010104
010110
010116
010124
010132
010134
010142
010130
010156
010160
010164
010170
010174
010200
010206
010212
010216
010222
010226
010232
010236
010244

005737
-001004
104402
000000
000776
000241
006137
005537

001306
007154

001322
001320
001320

001500
001702
001316

001320
001322
001306

010302

001320
001322
001404
001374
177000
001366
001370
001372
001230
001232
000002
001404
001406
001406
001410
001410
001412
001412
001414

010306
010314
010320
010326
010332
010340

013737
060037
013737
060037
013737
060037

001374
001376
001376
001400
001400
001402

010344
010352
010354
010334
010360

032737
001450

000002

005737
001045

000042

010250

14:

001316
001316
000004
000010
001700

062737
062737
022737
001006
012737
012737
033737
001747
013700
013702
012037
011037
042737
012037
012037
012037
012237
012237
012700
013737
005237
013737
005237
013737
060037
013737
060037

010256
010262
010270
010274

CYCLE:

2%:

001374

001406
001410

001412

001414
001376

001400
001402

001236
43:

TST
BNE
TYPE
HALT
BR
CcLC
ROL

OMACTV
13

.NOACT

.-2

;ARE ANY DMC11'S TO BE TESTED?
:BR IF OK.
sNO DMC11'S SELECTED!!
;:STOP THE SHOW.

RUN
RUN
#4 ,MILK
#10, CREAM

;DISQUALIFY CONT. SM.
;CLEAR PROC. CARRY BIT.
sUPDATE POINTER
sCATCH CARRY FROM RUN
;UPDATE POINTER
;UPDATE ADDRESS POINTER.

CREAM,RO

;BR IF NO
sGET ADDRESS POINTER

ADC
ADD
ADD
cHe
BNE
MOV
HOV
8IT
BEQ
MOV
MOV
MOV
MoV
8IC
MOV
MOV
MOV
MOV
MOV
MOV
MOV
INC
MOV
INC
MOV
ADD
MOV
ADD

(RO)+,STAT1
(RO)+,STAT2
(RO)+,STAT3
(R2)+,PASCNT
(R2)+,ERRCNY
#2,R0
DMCSR, DMCSRH
DMCSRH
DMCSRH ,DMCTL
DHMCTL
DMCTL
, OMPO4
RO, DHMPO4
DMPO4
, DMPO6
RO ,DMPO6

HOV
ADD
MOV
ADD
MoV
ADD

DMRVEC ,DMRLVL
RO, DMRLVL
DMRLVL ,DMTVEC
RO, DNTVEC
DMTVEC ,DMTLVL
RO, OMTLVL

817
8EQ

#5M01, STRTSW

sIS TESY NO. SELECTED
:BR IF NO

1ST
BNE

942
74

sRUNNING IN AUTO MOOE?
18R IF YES

#0M.MAP+200, CREAM
24
;KEEP GOING; NOT ALL TESTED FOR.
#0M_ MAP, CREAM
;RESET ADDRESS POINTER.
SCNT
. MAP ,MILK
;RESET PASS COUNT POINTER
zgfl.DHACTV
3IS THIS ONE ACTIVE?

MILK,R2

(RO)+,OMCSR
(RO),OMRVEC

#177000, DMRVEC

1GET PASS COUNT POINTER
sLOAD SYSTEM CTRL. REG
sLOAD VECTOR
$CLEAR UNWANTED BITS
sLOAD STAT1
;LOAD STAT2
sLOAD STAT3
sLOAD PASS COUNT
sLOAD ERROR COUNT
:SAVE CORE THIS WAY!

sPTY LVL
3

;s TX VEC
H

sTX LVL

SEQ 40

czome
MACRO v04.00
27-JUN-85 13:16:37 PAGE 27-1
GENERAL UTILITIES (TYPEQUT, ERROR, SCOPE, ETC)
010362
104402
010366
104403
C10370
006130
010372
104405
010374
000001
210376
001000
010400
001226
010402
000
010403
001
010404
012700
010410
022710
010412
012737
010434
001020
010416
023760
010424
001014
010426
022760
010434
001010
010436
010037
010442
104402
010446
042737
010454
000412
010456
005720
010460
020027
010464
001351
010466
104402
010472
000730

010474
010502

010506

012737
013701
000177

005672

TYPE
INSTR
MTSTN
PARAM

JMCRLF

sGET TEST NO.

.BYTE
BYTE

012320

S$:

001226

000002

001226

000004

001214
005755
000002

001236

6%:

033776
005666
012320
001404

1000
TSTNO
O
1
MOV
cMP
MOV
BNE
cHp
BNE
cHp
BNE
MOV
TYPE
BIC
BR
187
o
BNE
TYPE

BR
001214

170502

7%:
8s:

MOV
MOV

JMP

41ST1,RO
(PC)+,(RO)
(PC).,8(PCH6%

TSTNO, 2(RO)
64
@TSTNO,4(RO)

63
RO,RETURN
MR
@SWO1,STRTSW
84

:CHMP FIRST WORD TO 12737
;B8R IF NOT SAME
sDOES TSTNO MATCH?
;BR IF NO
;IS LAST WORD OK?
:BR IF NO

;sIT IS A LEGAL TEST SO DO IT

(RO).

;POP RO

4TST1,RETURN
DMCSR.R1
SRETURN

;PREPARE RETURN ADDRESS
;:R1 = BASE DMCi1 ADDRESS
;GO0 START TESTING.

RO,&TLAST+10
54
MM
43

;AT END YET?
sBR IF NO
;:YES ILLEGAL TEST NO.
;TRY AGAIN

sROUTINE USED TO “AUTO SIZE” THE DMC1i
;CSR AND VECTOR.
THE CSR MAY BE ANY WHERE IN THE FLOATING
;NOTE:
ADDRESS RANGE (160000:164000)
AND THE VECTOR MAY BE ANY WHERE IN THE
FLOATING VECTOR RANGE (300:770)

010512
010512

010514

010520
0130522
010526
010530
010534
010540
010544
010552
010554
01056C
010566
010570
010572
010574

000005

012702

005022
022702
001374
005037
012702
005037
032737
001002
000137
012737
104403
006450
104405
000001

001500
001700
001310
001500
001306
000001

001236

011252
000001

001256

AUTO.SIZE:
RESET
CSRMAP: MOV
18:
CLR
cHpP
BNE
CLR
MOV
CLR
8IT
BNE
JMP
MOV
INSTR
NUM
PARAM
1

*DM_MAP,R2
(R2)«
40M_END,R2
14
DMNUM
4DM
. MAP ,R2
OMACTV

¢SW00, STRTSW
.+5
78
&1, TEMPS

;INSURE A BUS INIT.
;LOAD MAP POINTER.
;ZERQO ENTIRE MAP
;ALL DONE?
;BR IF NO
;SET OCTAL NUMBER OF DMCii'S T0 ©
;R2 POINTS TO DMC MAP
;CLEAR ACTIVE
;QUESTIONS?
;BR IF YES
;IF NO SKIP QUESTIONS
;START WITH &

SEQ 41

MACRO v04.00
27-JUN-85 13:16:37 PAGE 27-2
caomc
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC)

010576
000020
001252
010600
010602
000
010603
001
010604
013737
010612
104402
010616
104410
010620
012002
010622
005237
010626
104403
010630
006510
010632
104405
010634
160000
010636
164000
010640
001254
010642
000
010643
001
010644
013722
010650
104403
010652
006526
010654
104405
010656
000000
010660
000776
010662
001254
010664
000
010665
001
010666
013712
010672
104402
010674
006547
010676
004737
010702
022703
010706
101014
010710
022703

010714
010716
010722
010724
010726
010730
010734
010736
010740
010742
010744
012746
010750
010752
010756
013762
010764
010770
010772
010774
010776
011000
011002
011004

103411
012704
006303
005304
001375
042703
050312
000403
104402
005666
000752
104402
006606
004737
022703
001427
022703
001403
104402
005666
000763
104402
007340
004737

16.

TEMP3

001252
005672

001310

12%:

001256

.BYTE
.BYTE
MoV
TYPE

CONVRT
WHICH
INC

INSTR
CSR

1
TEMP3, DMNUM
JMCRLF

;OMNUM = HOW MANY
:TYPE WHICH DMC

TCMPS

IS BEING DONE

s TEMPS IS WHICH DMC

PARAM

160000
164000
TEMPA

.BYTE
.BYTE

001254

MOV

INSTR
VEC

TEMPA,(R2)+

:STORE CSR IN MAP

0
1
TEMP4, (R2)

;STORE VECTOR IN MAP

PARAM

0
776
TEMP4

.BYTE

001254

10s:

012266

000024

.BYTE
MOV
TYPE
PRIO
JSR

cMp

8HI

000027

cHP
8LO
MOV

000011

50%
27,R3
508

50%:

8s:

012266
000131
000116

DeC
BNE
8IC
8IS
BR

40¢:

10$

:TRY AGAIN

PC,INTTY
#131,R3
9s
€116,R3
403

HMQM
BR

TYPE
SPEED
JSR

:BR IF LESS THAN 4

.-4
#170777,R3
R3,(R2)
8s

TYPE
QM
BR
TYPE
CRAM
JSR
cMpP
BEQ
cMP
BEQ
TYPE

;ASK WHAT BR LEVEL
;GET RESPONSE

:BR IF GREATER THAN 7
;R4 = NUMBER OF SHIFTS
;SHIFT R3 LEFT
;DEC SHIFT COUNT
:BR IF NOT DONE
;BIC UNWANTED BITS
;PUT BR LEVEL IN STATUS MAP
: CONTINUE

ASL

170777

012266

PC,INTTY
924,R3

PC,INTTY

;RESPONSE IS OUT OF LIMITS

;DOES DMC HAVE CRAM?
;GET REFLY
;YES

;NG
iNOT A Y OR N
TYPE

;ASK AGAIN

;DMC11-AR OR DMC1i1-AL?
;GET RESPONSE

CZDMC
GENERAL

SEQ 42

MACRO vO4.00
27-JUN-85 13:16:37 PAGE 27 3
UTILITIES (TYPEOUT, ERROR, SCOPE, E€TC)
011010
011014
011016
011022
011024
011026

011030
011032
011040
011042
011046
011050
0.1052
011056
011062
011064
011070
011072
011076
011100
011102
011104
011106
011112
011114
011116
011122
011124
011126
011132
011136
011140
011144
011146
011150

011152
011154

011160
011162
011166

011166
011170
011172
011174
011176
011200
011202
011203
011204

011210
011212
011214
011216

011220
011222
011224
011225

022703
001414
022703
001403
104402
005666

000763
052762
000402

052712
104402

006704
004737
022703
001417
022703
001412
022703
001403
104402
005666
000760
052722
022222
000447
052712
104402
007114
004737
022703
001406
022703
001406
104402
005666

000763
052722

000402
042722

104403
007016
104405
000000
000377
001254
000
001
113722

104403
007054
104405
000000

000377
001254
000
001

000122

cHp
8EQ
cHp
8EQ
TYPE
MaM

000114

000002
100000

000004

41%:
9s:
163:

012266
000021

000116

020000

32%:
314:
30$:

012266
000131
000116

MOOV
JSR
cHp

MQM
BR
8IS
CcMP
BR
BIS
TYPE
CONN
JSR
cMp
8EQ
cMP

BEQ
TYPE

040000

17%:

040000

18¢:
19s:

001254

BIS
TYPE

BEQ
cMP
BEQ
cMP
BEQ
TYPE

000022

010000

BR
8IS
BR

MaM
BR
BIS

4122 ,R3

16$

¢114.,R3
414

#8IT1,4(R2)
163
BIT15,(R2)

PC,INTTY
#21,R3

30%
#22,R3
31

#116,R3

;IS
;BR
IS
:BR

IT
IF
IT
IF

R
REMOTE
L
LOCAL

; TRY AGAIN
;SET BIT1 IN STAT3
;CONTINUVE
;SET BIT 15 IF CRAM
;ASK WHICH LINE UNIT
;GET REPLY
="1"

;"20'

;'INI'

324

16¢
#1IT12,(R2)

(R2)+,(R2)+

33¢
#BIT13,(R2)

PC,INTTY
#131.R3
17%
€116 .R3

18¢

;IF NOT A 1,2 OR N TYPE

;SET BIT 13 IN STAT2 IF M8202
:ASK IF LOOP-BACK IS ON

;GET REPLY
:Y

;N
;IF NOT Y OR N TYPE "2

BR
8IC

304
#81IT14,(R2)+
194
#1T714,(R2)+

sNO TURNAROUND

INSTR
LINE
PARAM
0
377
TEMP4
.BYTE
.BYTE
Move

0
1
TEMP4,(R2)«

sSTORE SWITCH PAC IN MAP

INSTR
B8M
PARAM
0

377
TEMP4
.BYTE
.BYTE

"2~

: TRY AGIAN
:SET BIT 12 IN STAT2 IF NO LU
;POP OVER STAT2 AND STAT3

:TRY AGAIN

; TURNAROUND IS CONNECTED

SEQ 43

MACRO v04.00
27-JUN-85 13:16:37 PAGE 27-4
CZOMC
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC)

011226
011232
011234
011240
011242
011246
011252
011256
011264
011266
011270
011272

011276
011302
011304
011310
011314
011322
011326
011334
011336
011344
011346
011352
011360
011364

011370
011376
011400
011406
011410
011416
011420
011422

011430
011432
011436
011442
011450
011454
011462

011466
011474

011476

011502

011504
011512
011514
011520
011522
011530
011532
011540
011546
011552
011560

113722
005722
005337
001402
000137
000137
012701
012737
005011
005711
001172
005061
005761
001165
012711
005061

012761
052711
022761
001004
052762
000431
012711
012761
012711
012711
022761
001411
022761
001410
022761
001404
000516
052762

010122
012711
005061
012761
052711
012761
052711
122761
001003
052712
000436
032761
001403
052712
000427
032761
001023
012761
012761
052711
012761
052711

001254

001252

010612
011702
160000
011774

333

343
000004

7%:

2s:

000006
000006
002000
000004
125252
020000

000006

100000

000002

001000
100430
001400

000006

002000
016472

000006

016461

000006

177777

000006

000002

000006

000006
000004

010000

000002

MoV
MOV
CLR
TST
BNE

#160000,R1
464,004
(R1)
(R1)
3s
6(R1)

JHMP

CLR

000004

122113
000400
021264
000400
000377

TEMP4, (R2)+
(R2)+
TEMP3
344
12¢

TS7T

125252

001000
000004

“OVB
TST
DEC
BEQ
JHP

000004

060000

21%:

BNE
MOV
CLR
MOV
8IS
CHP
BNE
8IS
BR
MOV
MOV
MOV
MOV
cMP
BEQ
CHP
BEQ
cMP
BEQ
BR

133

6(R1)

3¢
4#8IT710,(R1)
4(R1)
#125252,6(R1)
eB8IT13,(R1)

4125252,4(R1)
21s
#BIT15,2(R2)
22$
#8179, (R1)
#100430,6(R1)

; JUMP IF NOT
; CONTINUE
;SET FOR FIRST ADDRESS T0 BE TESTED
;:SET FOR NON-EXISTANT DEVICE TIME OUT
;CLEAR SELO
;IF DMC11 OMCSR S/B 0O
;IF NO DEV ; TRAP TO 4. IF NO BIT 8 THEN NO DMC11
;CLEAR SEL6
;IF DMC11 THEN DMRIC S/B =0!
;:BR IF NOT DMC11
;SET ROMO
;:CLEAR SEL4
;WRITE THIS TO SEL6

;WRITE IT!

sWAS IT WRITTEN?
;IF NO IT IS NOT CRAM
:SET BIT15 IF CRAM

BNE
BIS
BR

.+10
MIT12,(R2)
204

BEQ
BIS
BR
BIT
BNE

;IS SWITCH A ONE?
.+10
;BR IF MB201
#BIT13!BIT14,(R2) :MB202 ASSUME CONNECTOR
203
sCONNECTOR ON)
#BIT3,4(R1)
;IS MRDY SET
204
sBR IF M8201 NO CONNECTOR (ON LINE)

B8IT

000100

000004
000006

MOV
HOV

98176,4(R1)
#122113,6(R1)

000006

MoV
8Is

#021264,6(R1)
#8178, (R1)

8IS

;BR IF NO
;IF YES, NO LINE UNIT,

SET STATUS BIT

1T71,4(R1)

000004

000400

;BR IF DONE

;SET ROMI
;PUT INSTRUCTION IN SEL6
481T9!BIT8,(R1) ;CLOCK INSTRUCTION (MICRO PROC PC TO 0)
#IT10,(R1)
;SET ROMO
#016472,6(R1)
;IS IT LOCAL CROM?
23¢
;:BR IF YES
#016461,6(R1)
;IS IT REMOTE CROM?
228
:BR IF YES
#-1,6(R1)
;NO CROM?
22%
:BR IF YES
3
;NOT A DMC
238:
8IS
BIT1,6(R2)
;SET BIT 1 IN STAT3
;AT THIS POINT IT IS ASSUMED THAT R1 HOLDS A DMC11 CSR ADDRESS.
22%:
MOV
R1,(R2)+
:STORE CSR IN CORE TABLE.
15s:
MOV
#8IT79.(RL)
;CLEAR LINE UNIT LOOP
CLR
4(R1)
;CLEAR PORT4
MoV
#122113,6(R1)
sLOAD INSTRUCTION (CLR DTR)
BIS
#8178, (R1)
;CLOCK INSTRUCTION
MOV
$021264,6(R1)
;LOAD INSTRUCTION
8IS
#IT8,(R1)
:CLOCK INSTRUCTION
cMPB
#377.,4(R1)
;IS IT ALL ONES?

000010

122113
000400
021264

;STORE SWITCH PAC IN MAP
:POP OVER STAT3
;:DEC DMC COUNT

98IT8,(R1)

;LOAD PORT4
;LOAD INSTRUCTION
;CLOCK INSTRUCTION(CSET DTR)
;LOAD INSTRUCTION
;CLOCK INSTRUCTIONCREAD MODEM REG)

veancams
et e

SEQ 44

MACRO V04.00
27-JUN-85 13.16:37 PAGE 27-5
CzZomMC
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC)

011564
011572
011574
011600
011602

032761
001402
052712
005722
012761

011614
011620
011626
011632
011636
011640
011642
011646
011654

156122
012761
012711
156122
005722
005011
005237
022737
001412

011610

011656
011660
011664
011670
011674
011676
011702
011706
011712
011714
011720
011724
011726
011732
011736
011740
011742

012711

011766
011770
011772
011774
012000

005011
005061
062701
022701
001402
000137
005037
005737
001423
013701
010137
000241
006137
005237
005301
001371
012737
013737
000137
104402
005000
000000
000776
012716
000002

012002
012004
012006

000001
002
001256

012010
012016
012020
012026
012034
012040
012044
012050
012052
012056
012060
012064

032737
001114
012737
012737
012702
012700
012701
010120
012721
022021
020127
101711

011750
011756
011762

000010

000004

BIT

040000

021324
001400
000004
021344
001400
000004
001310
000020

208
:

000006

001310

3s:

000006
000010
164000

DMACTV
DHACTV
R1
4%
96,844
DMACTV,SAVACT
VECMAP

000004
001312
5%:

011664

+MERR2

.-2
#144,(SP)

6$:

:IS MRDY SET NOW?
;BR _IF NO CONNECTOR
+SET STATUS BIT FOR CONNECTOR
;POP POINTER
;PUT INSTRUCTION IN PORT6

;PORT4_LU 15
;STORE DDCHMP LINE & IN TABLE
sPORT6 _INSTRUCTION
;CLOCK INSTR.

;STORE BM873 ADD IN TABLE
;:POP OVER STAT3
;CLEAR ROMI
;UPDATE DEVICE COUNTER
;ARE MAX. NO. OF DEV FOUND?
:YES DON’T LOOK FOR ANY MORE.
;CLEAR BIT 10
;CLEAR SEL 6
;UPDATE CSR POINTER ADDRESS

;BR IF DONE
s JUMP IF NOT
:WERE ANY DMC11’'S FOUND AT ALL?
;ERROR AUTO SIZER FOUND NO DMC11‘S IN THIS SYS.
:SAVE NUMBER OF DEVICES
;GENERATE ACTIVE REGISTER OF DEVICES.
:SET THE BIT
;BR IF MORE TO GENERATE
;:RESTORE TRAP VECTOR
:SAVE ACTIVE REGISTER
;G0 _FIND THE VECTOR NOW.
sNOTIFY OPR THAT NO DMC11’'S FOUND.
sMAKE DATA LIGHTS ZERO
;STOP THE SHOM
;:DISABLE CONT. SW.
;ENTERED BY NON-EXISTANT TIME-OUT.
;:RETURN TO MAINSTREAM

WHICH:

002

2,2

000001

001236

000340
012202
001500
000300
000302

000022
000020

001000

134
2%
DMACTV
DMNUM
5
DMNUM,
R1
R1,SAVNUM

44:

001306
001306

000004

#10,R1
4164000,R1

13s%:

001310
001314

000006
001306
012010
005760

6(R1)

14%:

011264
001306
001310

#81I73,4(R1)
204
#1IT14,(R2)
(R2).
4021324,6(R1)
#81I79!BIT8,(R1)
4(R1),(R2)+
#021344,6(R1)
#81T8!BI79,(R1)
4(R1),(R2)+
(R2).
(R1)
DMNUM
€20, DMNUM
134
(R1)

VECMAP:

ggHOO.STRTSH
€340,8022
44,8020

sSET IOT TRAP PRIO T0 7

#300,R0
#302,.R1
R1,(RO)+
44 ,(R1)

;FLOATING VECTORS START HERE.
:PC OF IOT INSTR.
;START FILLING VECTOR AREA

SDM_MAP ,R2

1¢:

CHP
8LOS

(RO)+,(R1)+

R1,41000
1$

;SET IOT TRAP VECTOR

;SET SOFTWARE POINTER

;WITH

.+2;

IOT

;ADD 2 TO RO +R1
;BR IF MORE TO FILL

hdl

SEQ 45

czomMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-6
GENERAL UTILITIES (TYPEOUT, ERROR, SCOPE, ETC)

012102
012106
012114
012116
012124
012130
012136
012142
012144

013737
006037
103063
012704
016437
011201
012761
012711
012761
012711

105200
001376
162704
001404

012146
012152
012154
012162
012164
012172
012174
012200
012202
012206
012214
012220
012222
012224
012226
012230
012234
012240
012242
012246
012250

000767
052762
005011
062702
000735
051662
042762
016405
006305
006305
006305
006305
042705
050562
022626
012716
000002
000207

012252
012254
012256
012260
012262
012264

000000
000000
000200
000240
000300
000340

012266
012272
012274
012300
012304
012306
012312
012316

105777
100375
017703
105777

016437

100375
010377
042703
000207

001306
001246

001246

000002

Hov
ROR
8CC
MoV
MOV
MOV
MOV
MoV
MOV
MOV
INCB
BNE
SuB
BEQ
MOV
BR
8IS
CLR
ADD
BR
BIS
8IC
MoV
ASL
ASL
ASL
ASL
BIC
8IS

R5
R5
#170777,RS
R5,2(R2)

012172

MOV

#3%,(SP)

;:CLEAR UNWANTED BITS
;PUT BR LEVEL IN STATUS TABLE
;POP IO0T JUNK OFF STACK
:SET FOR RETURN

sALL DONE WITH “AUTO SIZING”

000012
012252
000200
001000
121111
001400

2%:

177776
000004

000006
7%:

000002

012252

177776

005300

000002

000010
000002
000007
012254

000002

64:
34:

170777

DMACTV, TEMP1
TEMP1
S$
#12,R4
BRLVL(R4),PS
(R2).,R1
#200,4(R1)

#8I79,(R1)
#121111,6(R1)
;BIT9!BIT8.(R1)
0

gRLVL(R4).PS
$
#5300,2(R2)

(R1)

#10,R2

24
(sP),2(R2)
#7,2(R2)
BRLVL+2(R4),RS
RS
RS

(SP)+,(SP)«

cMP

Ss$:

RTI
RTS

BRLVL:

;LEVEL
sLEVEL
sLEVEL
sLEVEL
;LEVEL
;LEVEL

200
240
300
340

166712

166706
166704
166700
000240

INTTY:

7578
8PL
MOV
1578
8PL
MOV
8IC
RTS

;STORE TEMPORALLY
;BRING OUT A BIT
;BR IF ALL DONE
;R4 IS INDEX REGISTER
;SET PS 10 7

:SET ROMI
;PUT INSTRUCTION IN PORT6
;sFORCE AN INTERRUPT
:STALL
;FOR TIME TO INTERUPT
;GET NEXT LOWEST PS LEVEL
;BR IF R4 = 0
;MOVE NEXT LOWER LEVEL IN PS
;BR TO DELAY
;NO INTERUPT ASSUME 300 AT LEVEL S5 AND FIX DMC1i LATER
;CLEAR ROMI
;POP SOFTWARE POINTER
;KEEP GOING
;:GET VECTOR ADDRESS
;CLEAR JUNK
;:GET BR LEVEL OF DMC11
:SHIFT LEVEL 4 PLACES
;:TO THE LEFT FOR THE
:STATUS TABLE

~NOANDOO

012066
012074
012100

8TKCSR
.-4
8TKDBR,R3
aT:csa

;PUT CHAR IN R3
;WAIT UNTIL PRINTER IS READY

R3,8TPDBR

sECHO CHAR

3311729115.R3

sWAIT FOR DONE

;MASK OFF LOWER CASE

;RETURN

sabbkddbbntbbtbbbbhihibdbhihk

TEST

asskbdsnbbbbbbbdbsbddibhbds

s#VERIFY THAT REFERENCING UNIBUS DEVICE REGISTERS
;#DOES NOT CAUSE A TIME OUT TRAP
R

Ry Ry

Yy YT TY )

SEQ 46

czomc
MACRO V04,00
27-JUN-85 13:16:37 PAGE 27-7
OMC11 UNIBUS REGISTER TESTS

TEST 1

;
012320
012326
012334

012737
012737
012737

000001
012426
012366

012342

013701
012700
012737
012737
005711
000240

001404
000004
012420
000340

012346
012352
012360
012366
012370
012372
012374
012400
012402
012404
012412
012416
012420
012422
012424

104401
062701
005300
001371
012737
005037
104400
011602
104001
000002

001226
001216
001220

000004
000006

TST1:

1%:

000002
000006
000006

000004

24:

MoV
MOV
MoV

€1,TSTNO
4TST2,NEXT
#1%,L0CK

MOV
MoV
MOV
MOV

DMCSR,R1
#4,RO
#24.4
4340,6

TS8T

sSET UP TIMEOUT TRAP
sLEVEL 7
:REFERENCE DEVICE REGISTER

(R1)

NOP
SCOP1
ADD
DEC
BNE

;SW09=1?

#2,R1
RO
14
6,4
6

MOV
CLR
SCOPE
HOV
EMT
RTI

;R1 CONTAINS BASE DMC11 ADDRESS
;R1 CONTAINS BASE DMC11 ADDRESS
;4 REGISTERS TO BE TESTED

sNEXT REGISTER
:DEC REGISTER COUNT
:BR IF NOT LAST REGISTER
;RESTORE LOC 4
;RESTORE LOC 6
;SCOPE THIS TEST
;:GET PC OF TRAP

(sP),R2
1

; TIME-QUT ERROR

shdbhhbbshbhbdbbbbhbbbhhdbhk

TEST

;#VERIFY THAT RUN CAN BE CLEARED

012426
012434

012737

012442
012444
012446
012450
012452
012454

005011
005005
011104
001401
104002
104400

012737

000002
012456

001226

001216

I1ST12:

1s:

LTI

TEST 2

MoV
MoV

#2,TSTNO
#TST3,NEXT

CLR
CLR
MoV
BEQ
EMT
SCOPE

(R1)
RS
(R1),R4
1s
2

shdkbhdbhbbbbbhbshhdhhbbhhsk

;R1 CONTAINS BASE DMC1i ADDRESS

sCLEAR DMCSR
;:CLEAR “EXPECTED”
;PUT DMCSR IN “FOUND"
;B8R IF CLEARED
;ERROR DMCSR NOT CLEARED
;SCOPE THIS TEST

Sk hbbbitbabbbhishbhisbtttt

TEST

ssbbdddbdbbbddbbhbbbbbhdddk

+#UNIBUS REGISTER WORD DUAL ADDRESSING TEST
;#LOAD ALL REGISTERS WITH INCREMENTING PATTERN
;«READ BACK ALL REGISTERS TO VERIFY CORRECT ADDRESSING
R

;

Yy VP P

TEST 3

012456
012464
012472

012737
012737
012737

012500
012502
012506

104412
012700
005011

000003
012606

012506

001226
001216
001220

1573:

MOV
MOV
MOV
MSTCLR

000001
1¢:

HOV
CLR

3, TSTNO
#TST4, NEXT
o14,L0CK

#1,RO
(R1)

rerwyys

;R1 CONTAINS BASE DMC11 ADDRESS

sMASTER CLEAR DMC11

:START PATTERN AT 1
;CLEAR REGISTER

T e

yes

SEQ 47

MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-8
CZDMC
OMC11 UNIBUS REGISTER TESTS

012510

012512
012514
012516
012320
012522

012524
012526
012530
012532
012536
012340
012544
012550
012556

12560

012562
012564
012566
012570
012572
012574
012576
012602
012604

010005
010011
011104
020504
001401
104002
104401
005721
005200
022700
001363
013701
012700
012737
010005
011104
020504
001401
104002
104401
005721
005200
022700
001365
104400

MOV
MOV
MOV

cHp

000005
001404
000001
012556

001220

3s:

BEQ
7
SCoP1
ST
INC
cHP
BNE
MOV
MOV
MOV
MoV
MoV

CHp
BEQ
EMT
SCoP1

TST
INC

000005

cHp
BNE
SCOPE

RO,R5
RO,(R1)

(R1),R4

R5,.R4
24
2

(R1)«

DMCSR,R1
#1,R0O
#3$,L0CK
RO,R5

(R1),R4

R5,.R4
43
2

(R1)+

RO
#5,R0
34

;PUT DATA IN

"EXPECTED"

;WRITE DMC REGISTER WITH PATTERN
;READ DMC REGISTER INTO “FOUND”
;IS DATA CORRECT
;BR IF YES
;DATA ERROR
;SW09=1?
;NEXT REGISTER
;sINCREMENT DATA PPTTERN
;:LAST REGISTER?
;B8R IF NO
;:BASE DMC11
ADDRESS TO Ri
;RESTART PATTERN AT 1
;NEW SCOP1
;PUT DATA IN "“EXPECTED”

;READ DMC REGISTER INTO “FOUND"
;IS DATA CORRECT

;BR IF YES
;DUAL ADDRESSING ERROR

;SW09=1?

;:NEXT REGISTER
; INCREMENT PATTEFN
;:LAST REGISTER?
;BR IF NO

;SCOPE THIS TEST

ihskbbtbttbbbishhbthibkdhhkds

TEST

sssdstdsttddsibbsdsbttsssss

;*CONTROL STATUS REGISTER WRITE/READ TEST
;#SET BITO, VERIFY BITO WAS SET
:*CLEAR BITO, VERIFY BITO WAS CLEARED
JoRkRhkAAA

;
012606
012614

012622

012630
012632
012636
012642
012644
012646
012650
012652
012654
012656
012664
012670
012672
012674
012676
012700
012702

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401
104002
104401
012737
042711
0035005
011104
001402
104002
104401
104400

000004
012704
012632

001226
001216
001220

001404
000001

TS74:

1%:

001220

2%:
38

b hbd

i hibbddbbbbiibbbbbbibiddbdbdbtidis

TEST 4

MOV
MOV

MoV
MSTCLR
MoV
MOV
MOV
MoV

24 ,TSTNO
#TSTS,NEXT
#14%,L0CK

DMCSR,R1
#BITO,RS
R3,(R1)
(R1),R4

CcHP

R5.R4

EMT

BEQ

012664
000001

b iRt kb b i dtd

SCoP1
MOV
8IC
CLR
MOV
BEQ
EMT

sCoP1
SCOPE

3%,L0CK
#8IT0,(R1)
R3
(R1),R4
43
2

sMASTER CLEAR DMC11i
;PUT REGISTER ADDRESS IN R1
;:PUT DATA IN “EXPEZTED*
;WRITE BIT O
;READ CONTROL STATUS REGISTER
;IS DATA CORRECT
+BR IF YES
sDATA ERROR
:SHO9 UP?
:NEW SCOP1L
;CLEAR BIT 0
;CLEAR *“EXPECTED*
;READ CONTROL STATUS REGISTER
;BR IF ZERO
;DATA ERROR BITO NOT CLEARED
;SW09 LP?
;SCOPE THIS TEST

czomc

MACRO VO4.00 27-JUN-8S 13:16:37 PAGE 27-9

SEQ

DMC11 UNIBUS REGISTER TESTS

;8888864404000
0k bdbbddstbx

TEST

2assssssssttssdssbbsststsss

;#CONTROL STATUS REGISTER WRITE/READ TEST
;«SET BIT1, VERIFY BIT1 WAS SET
;#«CLEAR BIT1, VERIFY BIT1 WAS CLEARED

068080400 d

012737
012737
012737
104412
013701
012705

012742
012744
012746

011104
020504
001401

012752
012754

104401
012737

012766
012770
012772
012774
012776
013000

005005
011104
001402
104002
104401
104400

012740

012750

012762

010511

000005
013002
012730

001226
001216
001220

001404
000002

1$:

042711

000002

001220

24:

3s:

AAAASR kAR

Aih bkt hhtd kbbb kbbbbbnkihbndbd

MOV
MoV
MoV
MSTCLR
MOV
MOV

DMCSR,R1
#BIT1,RS

+MASTER CLEAR DMC11
;PUT REGISTER ADDRESS IN R1
;PUT DATA IN “EXPECTED"”

MOV
CHi
BEQ

(R1).R4
R5.R4
2%

;READ CONTROL STATUS REGISTER
;IS DATA CORRECT
:BR IF YES

SCoP1
MOV

#3¢,L0CK

; SW09 UP?
;NEW SCOP1

MOV

104002

012762

7TST15:

A A

TEST S

;:
012704
012712
012720
012726
012730
012734

kA hhR

13,31
BIC

CLR
MOV
BEQ
EMT
SCOP1
SCOPE

#5,TSTNO
#TST6 NEXT
#1%,L0CK

RS5,.(R1)

#B8IT1,(R1)

RS
(R1),R4
43
2

;WRITE BIT 1

;DATA ERROR

;CLEAR BIT 1

;sCLEAR "EXPECTED”
;READ CONTROL STATUS REGISTER
;BR IF ZERO
;:DATA ERROR BIT1 NOT CLEARED
;SW09 UP?
:SCOPE THIS TEST

kbbb dhbbdbdbbbbhdbibbbdnht

TEST

sxtbsskddbdsdsddbbbssbsdbns

;#CONTROL STATUS REGISTER WRITE/READ TEST
;#SET BIT2, VERIFY BIT2 WAS SET
;#CLEAR BIT2, VERIFY BIT2 WAS CLEARED

;i 00 RAAA AR AR AR AR AR SRS

;
013002
013010
013016
013024
013026
013032
013036
013040
013042
013044
013046
013050
013052
013060
013064
013066
013070
013072
013074

C—

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401
104002
10440t
012737
042711
005005
011104
001402
104002
104401

000006
013100
013026

001226
001216
001220

001404
000004

013060
000004

TST6:

14:

001220

2%:
3.

AR AAARARRRARAA

S AA AL AR AR AR AAREEEREAEaRES N

TEST 6

MOV
MOV
MOV
MSTCLR
MoV
MOV
MOV
MOV
cMP
BEQ
13,04
SCOP1
MOV
8IC
CLR
MOV
8EQ
EMT
SCoP1

#6,TSTNO
ATST7 NEXT
41¢,LOCK
DMCSR,R1
BIT2,RS
RS.(R1)
(R1),R4
R5,R4
2%
2
#33,L0CK
#8IT2,(R1)
RS
(R1).R4
43
2

;MASTER CLEAR DMC11
sPUT REGISTER ADDRESS IN R1
;PUT DATAR IN “EXPECTED*”
;WRITE BIT 2
;:READ CONTROL STATUS REGISTER
;IS DATA CORRECT
;BR IF YES
;DATA ERROR
:SW09 UP?
sNEW SCOP1
;CLEAR BIT 2
;CLEAR “EXPECTED"
;READ CONTROL STATUS REGISTER
;BR IF ZERO
;DATA ERROR BIT2 NOT CLEARED
;SW09 UP?

9 48

CZDMC

MACRO V04.00 27-JUN-85 13:16:37 PAGE 27-10

SEQ

DMC11 UNIBUS REGISTER TESTS
013076

104400

SCOPE

;SCOPE THIS TEST

sasbhsbbbbsbbhibbbbsbhtbshts

TEST

stsdstdsstsssddsosssssssdns

;sCONTROL STATUS REGISTER WRITE/READ TEST
:#SET BITS, VERIFY BITS WAS SET
:sCLEAR BITS, VERIFY BITS WAS CLEARED

FIAREAARAASARALEARRARARAASASAALARRARREAALAREE
400000444
RAR0

;.
013100
013106
013114
013122
013124
013130
013134
013136
013140
013142
013144
013146
013150

013156

013162
013164
013166
013170
013172
013174

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401
104002
104401
012737

042711

005005
011104
001402
104002
104401
104400

000007
013176
013124

001226
001216
001220

001404
000040

013156

000040

TST7:

is:

001220

2%:

3s:

4$:

TEST 7

MOV
MOV
MOV
MSTCLR
MOV
MOV
MOV
MOV
CHP
BEQ
EMT
SCOP1
MOV

8IC

CLR
MoV
BEQ
EMT
SCoP1
SCoPE

#7,TSTNO
#TST10,NEXT
#1%,L0CK

OMCSR,R1
#8IT5,R5
RS,(R1)
(R1),R4
R5,R4
24
2
#3%,L0CK

#B8ITS,(R1)

RS
(R1),R4
43
2

;MASTER CLEAR DMC11
;PUT REGISTER ADDRESS IN R1
;PUT DATA IN "EXPECTED"
1WRITE BIT S
sREAD CONTROL STATUS REGISTER
11S DATA CORRECT
1BR IF YES
sDATA ERROR
:SWO09 UP?
;NEW SCOP1

;:CLEAR BIT S

;CLEAR *EXPECTED”
;READ CONTROL STATUS REGISTER
:BR IF ZERO
;DATA ERROR BITS NOT CLEARED
:SHO9 UP?
;SCOPE THIS TEST

shbkbidbbbhbbbbbibbkibbistits

TEST

ssssdssbstbbbsssbbbbdsdbbibsd

;«CONTROL STATUS REGISTER WRITE/READ TEST
;#SET BIT6, VERIFY BIT6 WAS SET
;#CLEAR BIT6, VERIFY BIT6 WAS CLEARED

;
013176
013204
013212
013220
013222
013226
013232
013234
013236
013240
013242
013244
013246
013254
013260
013262

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401
104002
104401
012737
042711
005005
011104

000010
013274
013222

001226
001216
001220

001404
000100

013254
000100

TST10:

1s:

001220

24:

2s:

Y P

Y T

LT Trrvrrrrem

TEST 10

MOV
MOV
MoV
MSTCLR
MOV
Mov
MoV
MOV
cMP
BEQ
EMT
SCOP1
MOV
BIC
CLR
MoV

#10, TSTNO
TST11,NEXT
#14%,L0CK

DMCSR,R1
#I76,RS
R5,(R1)
(R1),R4
RS,R4
24
2
#3%,L0CK
#8I176,(R1)
RS
(R1),R4

sMASTER CLEAR DMC1t
;PUT REGISTER ADDRESS IN Ri
sPUT DATA IN “EXPECTED*
;WRITE BIT 6
;READ CONTROL STATUS REGISTER
+IS DATA CORRECT
:BR IF YES
:DATA ERROR
:SW09 UP?
:NEW SCOP1
;CLEAR BIT 6
:CLEAR “EXPECTED"
;READ CONTROL STATUS REGISTER

g 49

SEQ 50

MACRO v04.00
27-JUN-85 13:16:37 PAGE 27-11
czomC
OMC11 UNIBUS REGISTER TESTS

013264
013266
013270
013272

001402
104002
104401
104400

4s:

BEQ
EMT
SCOP1
SCOPE

43
2

;:BR IF ZERQ
;:DATA ERROR BIT6 NOT CLEARED
;SWO09 LP?
;SCOPE THIS TEST

ihbbbbbhbbbb
sttt bibbtsns
ht

TEST

ssttsssssssdsssissssossssss

;#CONTROL STATUS REGISTER WRITE/READ TEST
;#SET BIT7, VERIFY BIT7 WAS SET
;#CLEAR BIT7, VERIFY BIT7 WAS CLEARED

FINSARAAARASASAS AR ERAAASAAERARRARSAARAb
b RAAbAbbbbdb
ARbAR
hins

TEST 11

:
013274
013302
013310
013316
013320
013324
013330
013332
013334
013336
013340
013342
013344
013352
013356
013260
013362
013364
013366
013370

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401
104002
104401
012737
042711
005005
011104
001402
104002
104401
104400

000011
013372
013320

001226
001216
001220

001404
000200

TST11:

1¢:

MOV
MOV
MOV
MSTCLR
MOV
MoV
MOV
MOV

013352
000200

001220

3¢

44
:

DMCSR,R1
#8IT7,RS
R5,(R1)
(R1),R4

sMASTER CLEAR DMCi1
;PUT REGISTER ADDRESS IN R1
;PUT DATA IN “EXPECTED"
;WRITE BIT 7
;READ CONTROL STATUS REGISTER

;BR IF YES

CMP

R5.R4

cMT

MoV

934,L0CK

sNEW SCOP1

CLR
MOV
8EQ
EMT
SCOP1
SCOPE

RS
(R1).R4
44
2

;CLEAR *EXPECTED"
;READ CONTROL STATUS REGISTER

BEQ
2%:

€11,TSTNO
#T5T12,NEXT
#1¢,L0CK

SCOoP1

BIC

;IS DATA CORRECT
:DATA ERROR

®MIT?7, (R

;SW09 UP?

sCLEAR BIT 7
;:BR IF ZERO

:DATA ERROR BIT7 NOY CLEARED
:SW09 LUP?

:SCOPE THIS TEST

;888800000

btadtsssstthids

TEST

sdbtbssbssbbbsbssssdsssssnsd

;#CONTROL STATUS REGISTER WRITE/READ TEST
;#SET BIT9, VERIFY BIT9 WAS SET
;#CLEAR BIT9, VERIFY BIT9 WAS CLEARED

FiARARARSARSAREAANARRRRSRARAARA
RS040 AdbARRARR bbbt dbdbitisttts

:
013372
013400
013406
013414
013416
013422
013426
013430
013432
013434
013436
013440
013442

012737

012737
012737
104412
013701

012705
010511
011104
020504
001401
104002
104401
012737

000012
013470
013416

001226
001216
001220

001404
001000

TST12:

1$:

MOV
MOV
Hov
MSTCLR
MoV
Hov
MOV
MOV

cHMP

013450

001220

2%:

TEST 12

8EQ
EMT
SCOP1
MOV

#12,TSTNO
#TSTL3,NEXT
#1%,L0CK
DMCSR,R1
#BIT9,R5
R3,(R1)
(R1),R4

R5,R4
24
2

434,L0CK

sMASTER CLEAR DMC11
;PUT REGISTER ADDRESS IN R1
+PUT DATA IN “EXPECTED*
sWRITE BIT 9
;READ CONTROL STATUS REGISTER

+IS DATA CORRECT
sBR IF YES
;DATA ERROR
:SW09 UP?
sNEW SCOP1

SEQ 51

CZDMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-12
OMCi1 UNIBUS REGISTER TESTS
013450
013454
013456
013460
013462
013464
013466

042711
005005
011104
001402
104002
104401
104400

001000

3s:

B81IC

CLR
MOV
BEQ

13,14
4%
:

SCoP1
SCOPE

#8179, (R1)

RS
(R1).R4
44

;CLEAR BIT 9

;CLEAR "EXPECTED“
;READ CONTROL STATUS REGISTER
:BR IF ZERQ

:DATA ERROR BIT9 NOT CLEARED

:SWO9 LUP?
:SCOPE THIS TEST

jhsbbbbtbstsbhsdsbitttttssss

TEST

sssdsssssssssssssssdsatsssa

;#CONTROL STATUS REGISTER WRITE/READ TEST
;#SET BIT11, VERIFY BIT11i WAS SEY
s#CLEAR BITi1, VERIFY BIT11 WAS CLEARED

FIERAREAEEASRASARARARAEAEAAAELEA
S0 oAERRA00A0R0
AARAAREB
Ad04
A

TEST 13

;.
013470
013476
013504
013512
013514
013520
013324
013526
013530
013532
013534
013536
013540
013546

013552
013354

013356
013560
013562
013564

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401
104002
104401
012737
042711
005005
011104
001402
104002
104401
104400

000013
013566
013514

001226
001216
001220

001404
004000

013546
004000

TST13:

1$:

MOV
MOV
MOV

MSTCLR
MOV
MOV

MoV

001220

2%:

3s:

MoV
cHp
BEQ
EMT
SCoP1
MoV
8IC

CLR
MOV
BEQ
EMT
SCOP1
SCOPE

013, TSTNO
oTST14,NEXT
#1%,L0CK
DMCSR,R1
#8IT11,R5

R5,.(R1)

(R1),R4
R5,R4
2%
2

#34,L0CK
#8IT11,(RY)
RS
(R1).R4
43
2

sMASTER CLEAR DMC11
sPUT REGISTER ADDRESS IN R1
;PUT DATA IN "EXPECTED*

sWRITE BIT 11

sREAD CONTROL STATUS REGISTER
+IS DATA CORRECT
:BR IF YES
;:DATA ERROR
:1SW09 LUP?
sNEW SCOP1
;:CLEAR BIT 11

sCLEAR “EXPECTED*
sREAD CONTROL STATUS REGISTER
s8R IF ZERO
;OATA ERROR BIT11 NOT CLEARED
:SWO9 UP?
:SCOPE THIS TEST

4885000440008 00400800000004

TEST

484044080880 404800004800800

:CONTROL STATUS REGISTER WRITE/READ TEST

:sSET BIT12, VERIFY BIT12 WAS SET
:sCLEAR BIT12, VERIFY BIT12 WAS CLEARED

FI808EERRARGAAARINANSEREASAAE00044000004848540800000080000044

s
013566
013574
013602
013610
013612
013616
013622
013624
013626
013630

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401

000014
013664
013612
001404
010000

001226
001216
001220

TSTi4:

1%:

TEST 14

MOV
MOV
MoV
MSTCLR
MoV

#14,TSTNO
#TST15,REXT
#14,L0CK
OMCSR,R1

sMASTER CLEAR DMC1i
1PUT REGISTER ADDRESS IN Ri

MOV
MOV
CMP
BEQ

R3,(R1)
(R1).R4
RS.R4
2%

sWRITE BIT 12
sREAD CONTROL STATUS REGISTER
:IS DATA CORRECT
iBR IF YES

MoV

#8I712,.RS

sPUT DATA IN “EXPECTED*

SEQ 52

CZDMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-13
OMC11 UNIBUS REGISTER TESTS

013632

013634
013636
013644
013650
013652
013654
013656
013660
15 013662

104002

104401
012737
042711
005005
011104
001402
104002
104401
104400

013644
010000

001220

2%:
3%

EMT

SCoPL
MOV
8IC
CLR
MOV
8EQ
ENY
sCoP1
SCOPE

2
03%,L0CK
#8IT12,(R1)
RS
(R1),R4
ol
2

iDATA ERROR

:SWO9 UP?
;NEW SCOP1
;CLEAR BIT 12
;CLEAR “EXPECTED"
;READ CONTROL STATUS REGISTER
;B8R _IF 2€ERQ
;DATA ERROR BIT12 NOT CLEARED
:SW09 uP?
:SCOPE THIS TEST

jadbadsttsssssbidbbbistidsss

TEST

ssssdssasssssssssssstsssnsns

s#CONTROL OUT REGISTER WRITE/READ TEST
;#SET BITO, VERIFY BITO WAS SET
;#CLEAR BITO, VERIFY BITO WAS CLEARED

FiRE0AAAAAAAA0R
0000 R4044480040
RAAAA
08588800008
ARSR
840080008

TEST 15

:
’

013664
013672
013700
013706
013710
013714
013720

013722
013724
013726
013730
013732
013734
013742
013746
013750
013752
013754
013756
013760

012737
012737
012737
104412
013701
012705
010511
011104
020504
001401

104002
104401

012737
042711
005005
011104
001402
104002
104401
104400

000015
013762
013710

001226
001216
001220

001410
000001

013742
000001

TST15:

1s:

001220

2%:
34:

4%:

--------------

MOV
Muy
MOV
MSTCLR
nov
MOV
MOV
MOV
cHP
BEQ

EMT
SCOP1

MOV
81C
CLR
MOV
BEQ
EMT
SCoP1
SCOPE

#15,TSTNO
#TST16,NEXT
14,L0CK
DMCTL ,R1
#IT0,RS
R5,.(R1)

(R1),R4
RS.R4
a4

#34,L0CK
#8170, (R1)
RS
(R1).R4
49
2

sMASTER CLEAR DMC11
;PUT REGISTER ADDRCSS IN R1
iPUT DATA IN “EXPECTED*
+WRITE BIT O
tREAD CONTROL OUT REGISTER
+IS DATA CORRECT
iBR IF YES

1DATA ERROR
1SWO9 UP?

INEW SCOPL
1CLEAR BIT O
1CLEAR "EXPECTED”
$READ CONTROL OUT REGISTER
1BR_IF ZERO
10ATA ERROR BITO NOT CLEARED
$SHO9 UP?
1SCOPE THIS TEST

1888848440004 4000004000004048

TEST

s8sddssssssssssssnssssssss

1sCONTROL OUT REGISTER WRITE/READ TEST
s¢SET BITL1, VERIFY BIT1i WAS SET
ssCLEAR BIT1, VERIFY BIT1 WAS CLEARED

§:06808806008884880888400868000000848004808444040584804884400008008808

TEST 16

:
'

013762
013770
013776
014004
014006
014012
014016

012737
012737
012737
104412
013701
012705
010511

000016
014060
014006

001410
000002

001226
001216
001220

TST16:

18:

..............

MOV
MOV
MOV
MSTCLR
MOV
MOV
MoV

016, TSTNO
#TSTL7,NEXT
14,L0CK

OMCTL,R1
0BIT1,RS

RS.(R1)

{MASTER CLEAR DMC11
sPUT REGISTER ADDRESS IN R1
sPUT DATA IN “EXPECTED”
sWRITE BIT 1

SEQ S3

C20MC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27 14
OMC11 UMIBUS REGISTER TESTS
014020
014022
014024
014026
014030
014032
014040
014044
014046
014050
34052
014054
0:4056

011104
020504
001401
104002
104401
012737
042711
005005
011104
001402
104002
104401
104400

014040
000002

001220

28:
3s:

4%:

MoV
cHe
BEQ
eMT
SCoP1
MOV
81C
CLR
MoV
BEQ
EMY
SCOP1
SCOPE

(R1),R4
R5,R4
23
2
¢38,L0CK
8IT1,(R1)
RS
(R1),R4
43
2

0604000000000k

;READ CONTROL OUT REGISTER
:IS DATA CORRECT
;BR IF YES
;OATA ERROR
;SWO9 UP?
;NEW SCOP1
;:CLEAR BIT 1
;CLEAR "EXPECTED”
sREAD CONTROL OUT REGISTER
:BR IF ZERO
:DATA ERROR BIT1 NOT CLEARED
:SH09 UP?
:SCOPE THIS TEST

0000atdtdds

TEST

ss6sttssitstnsssststinssdss

s#CONTROL OUT REGISTER WRITE/READ TEST
;#SET BIT2, VERIFY BIT2 WAS SET
;#CLEAR BIT2, VERIFY B81T2 WAS CLEARED
358848548820

048884 0004088488880 04 0020545088000 00 0800008080000 00E

;

014060
014066
014074
014102
014104
014110

014114

012737
012737
012737
104412
013701
012705

010511

014116
014120
014122
014124
014126
014130

011104
020504
001401
104002
104401
012737

014142

005005

014136

014144

014146
014150
014152
014154

042711

000017
014156
014104

001226
001216
001220

001410
000004

014136
000004

TST17:

1¢:

TEST

MOV
MOV
MOV
MSTCLR
MOV
MoV

MOV

001220

2%:

3s:

011104

MoV
CHP
BEQ
eMT
SCoP1
MOV

8I1C

CLR

MOV

001402
104002
104401
104400

43:

BEQ
eMT
SCoP1
SCOPE

417,TSTNO
4TST20 ,NEXT
#18,L0CK

DMCTL,.R1
MIT2,RS

R5,.(R1)

(R1),R4
R5,R4
4
2

#3%,L0CK
BIT2,(R1)
RS

(R1),.R4

43
2

sMASTER CLEAR DMC11

;PUT REGISTER ADDRESS IN R1
sPUT DATA IN “EXPECTED”

;WRITE BIT 2

;READ CONTROL OUT REGISTER
;IS DATA CORRECT
:BR IF YES
sDATA ERROR
;SW09 LP?
sNEW SCOP1

sCLEAR BIT 2

;CLEAR "EXPECTED”

;READ CONTROL OUT REGISTER

;BR IF ZERO
sDATA ERROR BIT2 NOT CLEARED
:SW09 UP?
;SCOPE THIS TEST

b8kttt sbbbbbbbtbdbssdsds

TEST

stddsssdbbbdbibdbdddasbddid

;#CONTROL OUT REGISTER WRITE/READ TEST
:#SET BIT6, VERIFY BITé WAS SET
;sCLEAR BIT6, VERIFY BIT6 WAS CLEARED

FIAAARAALRAAASACALUERERARAARA
A0 RARA40ARARLARAARRNAAER0RAAALS

;

014156

014164
014172
014200

012737

012737
012737
104412

000020

014254
014202

001226

001216
001220

TST20:

MOV

TEST 20

MoV
MOV
MSTCLR

#20, TSTNO

#TST21 ,NEXT
#1%,L0CK

;MASTER CLEAR DMC11

SEQ 54

CZDOMC
MACRO VO4.00
27-JUN 85 13:16:37 PAGE 27 15
OMC11 UNIBUS REGISTER TESTS
014202

014206

014212
014214
014216
014220
014222
014224
014226
014234
0:4240
014242
014248
014246

014250
014252

013701

012705

010511
011104
020504
001401
104002
104401
012737
042711
005005
011104
001402
1040C2

001410

1s:

000100

014234
000100

001220

104401
104400

2%:
3s:

43:

MGV

DMCTL,P1

:PUT REGISTER ADDRESS IN R1

MOV

#8176,RS5

:PUT DATA IN “EXPECTED”

MOV
MOV
cHp
BEQ
EMT
sCoP1
Mov
BIC
CLR
MOV
BEQ
EM~

sCorP1
SCOPE

R5,(R1)
(R1).R4
R5,R4
4
2

#3s,L0CK
#8176, (R1)
R5
(R1),R4
43
2

;WRITE BIT 6
;READ CONTROL OUT REGISTER
;1S DATA CORRECT
:BR IF YES
;:DATA ERROR
:SWO9 UP?
:NEW SCOP1
;:CLEAR BIT 6
;:CLEAR "EXPECTED'

sREAD CONTROL OUT REGISTER

;BR IF ZERO
sORTA ERROR BIT6 NOT CLEARED
:SWO09 UP?
;SCOPE THIS TEST

;6008888488422 8204042004408438

TEST

tadsssssdssssssbbdberbssass

;¢CONTROL QUT REGISTER WRITE/READ TEST
;¢SET BIT7, VERIFY BIT7 WAS SET
;#CLEAR BIT7, VERIFY BIT7 WAS CLEARED
$18 0548 5824848

0008004004880 080000000400 00 0000000000000t 00tas

TEST 21

:
014254
014262
014270
014276
014300

014304

014310
014312
014214
014316
014320
014322
014324
014332
014336
014340
014342
014344
014346
014350

012737
012737
012737
104412

013701
012705
010511
011104
020504
001401
104002
104401
012737
042711
005005
011104
001402
104002
104401
104400

000021
014352
014300

001226
001216
001220

001410
000200

014332
000200

TST21:

1s:

001220

2%:

3s:

MOV
MOV
MoV
MSTCLR
MOV

MOV

MoV
MOV
cHP
BEQ
EMT
SCoPi
MOV
BIC
CLR
MOV
BEQ
EMT
SCOP1
SCOPE

#21,TSTNO
415722 ,NEXT
#18,L0CK

OMCTL ,R1
#MIT7,.RS
R5,(R1)
(R1),R4
R5.R4
24
2
933,L0CK
®IT7,(R1)
RS
(R1),R4
44
2

08480040kt

:MASTER CLEAR OMC11
;PUT REGISTER ADDRESS IN R1
;PUT DATA IN "EXPECTED”
sWRITE BIT 7
;READ CONTROL OUT REGISTER
;IS DATA CORRECT
:BR IF YES
sDATA ERROR
$SW09 LUP?
sNEW SCOP1
;:CLEAR BIT 7
:CLEAR "EXPECTED”
;READ CONTROL OUT RFGISTER
:BR IF ZERO
;ORTA ERROR BIT7 NOT CLEARED
:SWO9 LP?
;SCOPE THIS TEST

0b0bbattittbtsts

TEST

s2tsstdssddssssdsdddtbbsdtd

;#CONTROL OUT REGISTER WRITE/READ
TEST
;4SET BIT12, VERIFY BIT12 WAS SET
;#CLEAR BIT12, VERIFY BIT12 WAS CLEARED
FIBMAREASRARRRNEASIAASEAAAAAREAA0040400000400000000000000004044

;

014352

012737

000022

001226

7T5T22:

TEST 22

922, TSTNO

SEQ S5

HACRO V04.00
27-JUN-85 13:16:37 PAGE 27-16
c2omC
OMC11 UNIBUS REGISTER TESTS

014360
014366
014374
014376
014402
014406
014410
014412
014414
014416
014420
014422

014430
014434
014436
014440

014442
014444
014446

012737
012737
104412
013703
012705
010511
011104
020504
001401
104002
104401
012737
042711
005005

014450
014376

001216
001220

001410
010000

014430
010000

9TST23 NEXT
41%,L0CK

2%:

001220

011104
001402
104002
104401
104400

3s:

;WRITE BIT 12

;sREAD CONTROL OUT REGISTER
;IS DATA CORRECT
;:BR IF YES
;:DATA ERROR
;SW09 UP?
;NEW SCOP1
;:CLEAR BIT 12
;CLEAR “EXPECTED”
;READ CONTROL OUT REGISTER
:BR IF ZERO
:DATA ERROR BIT12 NOT CLEARED
;:SW09 WP?
:SCOPE THIS TEST

RS.R4
24
2

8€Q
EMT
SCOP1L
MOV
8IC
CLR

#34,L0CK

#BIT12,(R1)

R5
(R1),R4

MoV

4%
:

;MASTER CLEAR DMC11
;PUT REGISTER ADDRESS IN R1
;PUT DATA IN "EXPECTED”

OMCTL,
R
#81T12,R5
RS5,(R1)
(R1).R4

1%:

BEQ
EMT
SCoP1
SCOPE

ibhbbbbbbdibtbbbbdnbidibbsts

TEST

sasssdsbbdsbbsbbbsbbbshbdds

;#CONTROL OUT REGISTER WRITE/READ TEST
s#SET BIT13, VERIFY BIT13 WAS SET
;#CLEAR BIT13, VERIFY BIT13 WAS CLEARED

:
014450
014456

014464
014472
014474
014500
014504
014506
014510
014512

014514
014516
014520
014526

014532
014534
014536

014540
014542
16

014544

012737
012737
012737
104412
013701
012705

010511
011104
020504
001401
104002
104401
012737
042711
005005
011104
001402
104002
104401
104400

000023

014546
014474

001226
001216
001220

001410
020000

014526
020000

TS123:

2$:
3s:

MOV
MOV

MSTCLR
Mov
MOV
MOV
MoV
cHe
8EQ
EMT
SCoP1
MOV
8IC
CLR
MOV
BEQ
EMT

4s:

P Y

YRR

s T

TEST 23

MOV

1s:

001220

SCoP1
SCOPE

#23,TSTNO
415724 ,NEXT
#18,L0CK

DMCTL ,R1
98IT13,R5
R5,(R1)
(R1),R4
RS,R4
23
2
43$,L0CK
e8IT13,(R1)
RS
(R1).R4
44
2

sMASTER CLEAR DMC11
;PUT REGISTER ADDRESS IN R1
;PUT DATA IN "EXPECTED”
sWRITE BIT 13
;READ CONTROL OUT REGISTER
;IS DATA CORRECT
;:BR IF YES
;DATA ERROR
:SWO9 uP?
;NEW SCOP1
;CLEAR BIT 13
;:CLEAR "EXPECTED”
;READ CONTROL OUT REGISTER
:BR IF ZERO
;DATA ERROR B8IT13 NOT CLEARED

;SW09 UP?
:SCOPE THIS TEST

ihhbshkahbbdkbbbbbbdnbbbbbss

TEST

ssssdddddbhdddisddbdissbsds

;#PORT4 REGISTER WRITE/READ TEST
;#FLOAT A ONE THROUGH PORT4 REGISTER

;#FLOAT

A ZERO THROUGH PORT4 REGISTER

Yy Y

rryryyyrIIY

SEQ 56

CZoMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-17
OMC11 UNIBUS REGISTER TESTS

TEST 24

014546
01273%7
014554
012737
014562
012737
014570
104412
014572
013701
014576
012700
014602
014602
010005
014604
010511
014606
011104
14610
020504
014612
001401
014614
104002
014616
104401
014620
000241
014622
006100
014624
001366
014626
012737
014634
012700
014640
014640
005100
014642
010005
014644
010511
014646
011104
014650
020504
014652
001401
014654
104002
014656
104401
014660
005100
014662
000241
014664
006100
014666
001364
014670
104400

000024
014672
014602

001226

001216
001220

001412
000001

TST24:

64%:

65$:

014640
000001

001220

:
668

MOV

MoV
MOV
MSTCLR
MoV
MoV

4TST25 ,NEXT
9644 ,L0CK

:MASTER CLEAR DMC11
:PUT REGISTER ADDRESS IN R1
;:START WITH BITO

OMPO4,R1
#1.RO

MOV
MOV
HOV
CMP
BEQ
EMT
SCoP1
CLC
ROL
BNE
Mov
MoV

RO,RS
R5,(R1)
(R1),R4
R5,R4
654
2

RO
644
266$,L0CK
#1,R0

;SHIFT TO NEXT BIT
;BR IF NOT DONE YET?

CoM
MOV
MOV
MOV

RO
RO,RS
R5,(R1)
(R1),R4

;CHANGE TO A FLOATING ZERO

cHMP

;PUT

;:READ PORTA REGISTER
;COMPARE EXPECTED AND FOUND
;BR IF 0K
;WRITE/READ ERROR
;LOOP TO 64% IF SW09=1

;:CLEAR CARRY

:NEW SCOP1
;START WITH BITO
;PUT

SCoP1
coM

CLC

ROL
BNE
SCoPE

"EXPECTED” IN RS

;WRITE PORT4 REGISTER
;READ PORT4 REGISTER
;COMPARE EXPECTED AND FOUND
;:BR IF OK
:WRITE/READ ERROR
;:LOOP TO 66% IF SW09=1
:CHANGE BACK TO A FLOATING ONE

67%

EMT

"EXPECTED" IN RS

;WRITE PORT4 REGISTER

R5,R4

BEQ

67%:

924, TSTNO

;CLEAR CARRY

RO
664

sSHIFT TO NEXT BIT
;BR IF NOT DONE YET?
;SCOPE THIS TEST

shbbbdshbhbkbhibbhkbbhbhabbds

TEST

;#PORT6 REGISTER WRITE/READ TEST
;#FLOAT A ONE THROUGH PORT6 REGISTER
;#FLOAT A ZERO THROUGH PORT6 REGISTER

014672
014700
014706
014714
014716
014722
014726
014726
014730
014732
014734
014736

012737
012737
012737

000025
015016
014726

013701
012700

001414
000001

104412

010005
010511
011104
020504
001401

001226
001216
001220

TST25:

644:

;

TEST 25

atssskknhbbbbhkibdhbdbddhhk

Ty YT Y

YT Y

PP PP

VP POy

MOV
MOV
MOV
MSTCLR

425, TSTNO
415726 ,NEXT
9643 ,L0CK

MoV

DMPO6,R1

#1.R0

sMASTER CLEAR DMC11
;PUT REGISTER ADDRESS IN R1
:START WITH BITO

RO,R5
R5,(R1)
(R1).R4
R5.R4
65$

;PUT "EXPECTED” IN RS
+WRITE PORT6 REGISTER
;READ PORTE REGISTER
; COMPARE EXPECTED AND FOUND
;:BR IF OK

MOV
MoV
MoV
MoV
cMp
BEQ

SEQ 57

CZoMC
MACRO VO4.00
27-JUN-85 13:16:37 PAGE 27-18
OMC11 UNIBUS REGISTER TESTS

014740
014742
014744
014746
014750
014752
014760
014764
014764
014766
014770
014772
14774
014776
015000
015002
015004
015006
015010
015012
015014

104002
104401
000241
006100
001366
012737
012700

65%:

014764
000001

BNE
MOV
MOV

001220
66%$:

005100
010005
010511
011104
020504
001401
104002
104401
005100
000241
006100
001364
104400

EMT
SCoP1
CLC
ROL

67$:

coM

MOV
MOV
Hov
cHpP
BEQ
EMT

SCoP1
CoM
CLC
ROL
BNE
SCOPE

RO
644
9664 ,L0CK
#1,RO
RO
RO,RS
R5,(R1)

(R1),R4

R5,R4
67%
2

RO
RO
664

;WRITE/READ ERROR
;LOOP TO 64% IF SW09=1
;CLEAR CARRY
;SHIFT TO NEXT BIT
;BR IF NOT DONE YET?

;NEW SCOP1

;START WITH BITO
;CHANGE TO A FLOATING ZEROG

;PUT

"EXPECTED” IN RS

;WRITE PORT6 REGISTER
;READ PORT6 REGISTER

;COMPARE EXPECTED AND FOUND
;B6R IF OK

;:WRITE/READ ERROR
;LOOP TO 66% IF SW09=1
sCHANGE BACK TO A FLOATING ONE
;CLEAR CARRY
sSHIFT TO NEXT BIT
;BR IF NOT DONE YET?
;SCOPE THIS TEST

;b
bk bb
bbhhkdhihbhhks

TEST

sssdkddsbbbbbhkbhkbddibbkhbts

;#UNIBUS REGISTER BYTE DUAL ADDRESSING TEST
;sLOAC ALL REGISTERS WITH INCREMENTING PATTERN
;#READ BACK ALL REGISTERS TO VERIFY CORRECT ADDRESSING

LTI LTy
P T Py PrwPPe

:
015016
015024
015032

012737
012737
012737

015040
015042
015046
013050
015052
015054
015056
015060
015062
013064
015066
015070
015072
015076
015100

104412
012700

015104
015110
015116
015120
015122
015124
015126

105011

110005
110011
111104
020504
001401
104002
104401
105721
005200
022700
001363
013701
012700
012737
110005
111104
020504
001401
104002

000026
015146

015046

001226
001216
001220

000001

TST26:

1s:

2%:

000011
001404
000001
015116

MoV
MOV
MOV

926, TSTNO
ATST27 ,NEXT
#14,L0CK

MSTCLR
MoV
CLRB
Move
Move
MOVB
cHp
BEQ
EMT
scori

@1,R0
(R1)
RO,R5
RO,(R1)
(R1).,R4
hS,R4
24
2

INC

BNE
MOV
MOV
MOV
Move
MOVB

1s
DMCSR,R1
#1.R0
#3$,L0CK
RO,R5
(R1).R4

BEQ
EMT

4
2

T1ST8

CHP

001220

3s:

TEST 26

cHMP

(R1).

#11,R0

R5,R4

;R1 CONTAINS BASE DMC11 ADDRESS
sMASTER CLEAR DMC1i
;START PATTERN AT 1
;CLEAR REGISTER
;PUT DATA IN *EXPECTED*
sWRITE DMC REGISTER WITH PATTERN
;READ DMC REGISTER INTO "FOUND”
;IS DATA CORRECT
;BR IF YES
;DATA ERROR

;SHO9=1?

sNEXT REGISTER
;INCREMENT ODATA PATTERN
;LAST REGISTER?

;BR IF NO
:BASE DMC11

ADDRESS TO Ri
;RESTART PATTERN AT 1
sNEW SCOP1

;PUT DATA IN

"EXPECTED“

;READ DMC REGISTER INTO “FOUND”
;IS DATA CORRECT
:BR IF YES
;OUAL ADDRESSING ERROR

—

SEQ 58

CZDMC
MACRO +04.00
27-JUN-85 13:16:37 PAGE 27-19
DMC11 UNIBUS REGISTER TESTS

015130
015132
015134
015136
015142
015144

104401
105721
005200

022700
001365
104400

SCoP1L

1578
INC
cHp
BNE
SCOPE

000011

:SW09=1?

(R1).
RO
¢11,R0
k1

:NEXT REGISTER
: INCREMENT PATTERN
:LAST REGISTER?
;BR IF NO
;SCOPE THIS TEST

shsbksbbsbbbbbbbbdbbbdbhhddk

TEST

skbdsbhbhbbhkbrhbbbbbbkbbbdd

;sMAINTENANCE INSTRUCTION REGISTER TEST
:#VERIFY THAT THE MAINT IR CAN BE WRITTEN TO ALL ZEROS'
;#AND ALL ONES’'. VERIFY THAT IT IS CLEARED ON A BUS RESET.

SRS ASARARARAARRAAARAEERAARRAREAARARERRAARRERARRAARRARRRRAS
kk

TEST 27

015146
015154
015162

012737
012737
012737

015170
015172
015176
015200
015204
015210
015212
015214
/15216
015220
015226
015232
015236
015242
015244
015246
015250
015252
015260
015262
015264
015270
015274
015276
015300
015302
015304

104412
012711
005005
010561
016104
020504
001401
104023
104401
012737
012705
010561
016104
020504
001401
104023
104401
012737
005005
000005
012711
016104
020504
001401

104023
104401
104400

000027
015306
015200

001226
001216
001220

T187127:

003000
000006
000006

015232

177777

1%:

003000
000006

927,TSTNO
4TST30,NEXT
#1%,.L0CK

MSTCLR
MoV

:MASTER CLEAR DMC11
#BIT9!BIT10,(R1) ;SEL6 IS NOW THE IR

001220

2%:

3s:

RS
R5,6(R1)
6(R1),R4

;PUT "EXPECTED” IN RS
;CLEAR THE IR
:READ THE IR

BEQ
EMT
sCoPy
MoV
HOV
MoV
MOV

4
23

:BR IF YES
:ERROR IR IS NOT CLEAR

CHp

001220

4%
:

5¢:

BEQ
EMT
SCOP1
MOV
CLR
RESET
MOV
MOV

cHp

BEQ
6%:

:R1 CONTAINS BASE DMC11 ADDRESS

CLR
Hov
MOV

CcHP

000006
000006

015262

MOV
MOV
MOV

EMT

SCOP1
SCOPE

RS,R4

#3%,L0CK
#-1,R5
RS,6(R1)
6(R1),R4

RS5,R4

43
23

;IS IT CLEARED?

;1.00P TO ;¢ IF SW09=1
:NEW SCOP1
;PUT "EXPECTED” IN RS

;WRITE ALL ONES TO THE IR

;sREAD THE IR

sI5 IT ALL ONES?

:BR IF YES
;ERROR IR IS NOT = ALL ONES
;LOOP TO 3¢ IF SW09=1
454,L0CK
:NEW SCOP1
RS
;PUT "EXPECTED” IN RS
1BUS RESET
#B1IT9:18IT10,(R1) ;SEL6 IS IR
6(R1),R4
;READ THE IR
R5.R4
:IS IT CLEARED?
63
;BR IF YES
23
;ERROR, IR IS NOT CLEARED
:L00P TO 5¢ IF SW09=1
:SCOPE THIS TEST

shtkbbbbbkkbbbbhtbdbhibssbss

TEST

sstsdditsbssdtbdsddtssdbsss

;#*MAINTENANCE INSTRUCTION REGISTER TEST
;#VERIFY THAT THE MAINT IR CAN BE WRITTEN TO ALL ZEROS'
;#AND ALL ONES'. VERIFY THAT IT IS CLEARED ON A MASTER RESET.

3180 6RkA

kbR kA

TEST 30

a kA bA bbbt bbbt d bbbttt bhittbiibdbhkbtbbibhbdbs

SEQ 59

CZOMC
MACRO VO4.00
27-JUN-85 13:16:37 PAGE 27-20
OMC11 UNIBUS REGISTER TESTS

015306
015314
015322

012737
012737
012737

0135330
015332
015336
015340
015344

104412
012711
005005
010561
016104

015350

015352

015354
015356

015360
015366
013372
015376
015402
015404
015406
015410
015412

015420
015422
015426

015432
015436
015440
015442
015444
015446

020504

000030
015450
015340

001226
001216
001220

TST30:

003000
000006
000006

1s:

012737
012705
010561
016104
020504
001401

104023
104401
012737
005005
052711
012711
016104
020504
001401
104023
104401
104400

015372
177777
000006
000006

015422

230, TSTNO
#TST31,NEXT
#1%,L0CK

MSTCLR
MOV
CLR
MOV
MOV

:MASTER CLEAR DMC11
#BIT9!BIT10,.(R1) ;SEL6 IS NOW THE IR
RS
;PUT "EXPECTED” IN RS
R5,6(R1)
;CLEAR THE IR
6(R1),R4
;READ THE IR

BEQ

cHpP

001401

104023
104401

MOV
MOV
MoV

001220

2%:

3s:

001220

040000
003000
000006

4%:
5%:

6%:

EMT
SCoP1

MOV
MOV
MOV
MOV
chp
BEQ

EMT
SCOP1
MOV
CLR
8IS
MOV
MOV
cMp
BEQ
EMT
SCOP1
SCOPE

iR1 CONTAINS BASE DMC11 ADDRESS

R5,R4

;IS IT CLEARED?

;ERROR IR IS NOT CLEAR
;LOOP TO 1$¢ IF SW09=1

:BR IF YES

#34,L0CK
#-1,R5
R5,6(R1)
6(R1),R4
R5.R4
43
23

:NEW SCOP1
:PUT "EXPECTED" IN RS
;WRITE ALL ONES TO THE IR
;:READ THE IR
:IS IT ALL ONES?
;BR IF YES

;:ERROR IR IS NOT = ALL ONES
;LOOP TO 3¢ IF SWO09=1
#5¢,L0CK
:NEW SCOP1
R5
;PUT "EXPECTED” IN R5
#81714,(R1)
;MASTER CLEAR
#8IT9!BIT10,(R1) ;SEL6 IS IR
6(R1),R4
;READ THE IR
R5,R4
;IS IT CLEARED?
6
;:BR IF YES
23
:ERROR, IR IS NOT CLEARED
;LOOP TO 5¢ IF SW09-1
;:SCOPE THIS TEST

shoksbhbbbbsbbdbbtsbbbstsrts

TEST

ssudidbbbsbbdbddhbbbbdhbhak

;#MICRO PROCESSOR TEST
;#LCAD DMPO6 WITH A MICRO-PROCESSOR INSTRUCTION, CLOCK IT
;¢VERIFY INSTRUCTION EXECUTED PROPERLY
;#INSTRUCTION SHOULD MOVE IBUS#4 TO IBUS#*S, IBUS#4 IS ALL 1'S
;#AND IBUSe5 IS ALL 0'S. RESULT SHOULD BE ALL 1'S IN SEL4

LTI

¢+

TEST 31

T YTy

rIrTyrew

fommemem—m—————

015450
015456

012737
012737

015464
015466
015474
015500
015506
015512
015514
015520
015524
015526
015530

104412
012761
012711
012761
052711
000240
012705
016104
020504
001401
104003

000031
015534

000377
001000
121105
001400

177777
000004

001226
001216

000004

000006

TST31:

MOV
MoV

MSTCLR
MOV
MoV
MOV
8IS
NOP
MOV
MoV
cMp
BEQ
EMT

#31,TSTNO
#TST32 NEXT

;R1 CONTAINS BASE DMC1i ADDRESS

#377,4(R1)
#8I79,(R1)
#121105,6(R1)
OBIT8!BIT9,(R1)

4-1,R5
4(R1),R4
RS,R4
1s
3

sMASTER CLEAR DMC11
;:PORT4 HI-BYTE=0'S LO-BYTE=1'S
;SET ROMI
;INSTRUCTION TO PORT6
;CLK INTSRUCTION, MOVE IBUS#4 TO IBUSsS

;
;PUT “EXPECTED” IN RS
;PUT “FOUND* INTO R4
;IS DATA CORRECTY
;:BR IF YES
:ERROR

SEQ 60

CZOMC
MACRO V04.00
27-JUN-8S 13:16:37 PAGE 27-21
OMC11 MICRO PROCESSOR IBUSs TESTS

25 015532

104400

1$:

SCOPE

;SCOPE THIS TEST

ihsbbdssbbbbbbbdttbbbbddbhink

TEST

sstssbsssdsstdbbsdtdsstsbis

;«MICRO PROCESSOR IBUS* REGISTER WRITE/READ TEST
;#FLOAT A 1 THROUGH IBUSs REGISTER 0
;#FLOAT A O THROUGH IBUS#* REGISTER O
R

;
015534
015542
015550

012737
012737
012737

015556
015560
015564
015570
015570
015574
015602
015604
015606
015610
015612
015614

104412
012702
012700

015626
015630

010061
042761
104414
121100
104414
121005
010005
042705
116104
120504
001401
104004

015634
015636

000241
106100

015620
015624

015632
015640
015642
015650
015654
015656

015656
015662
015670
015672
015674

015676
015700
015702
015706
015712
015714
015716
015720
015722
015724
015726
015730
015732

000032
015734
015570

001226
001216
001220

000000
000001
000004
000030

64%:
000004

000030
000005

104401

001353
012737
012700
005100
010061
042761
104414
121100
104414

121005
010005
042705
116104
120504
001401
104004
104401
005100
000241
106100
001351
104400

TST32:

65¢%:

015656
000001
000004
000030

001220

694 :

67%:
000004

000330
000005

68%$:

LIS P

P Y

T TIrTTITIITY

TEST 32

MOV
MOV
MOV
MSTCLR
MOV
MOV

#32,TSTNO
#T5T33,NEXT
964 ,L0CK

:R1 CONTAINS BASE OMC11 ADDRESS

#0,R2
#1.RO

;MASTER CLEAR DMC11
;SAVE REGISTER ADDRESS FOR TYPEOUT
;START WITH BIT O

MOV
RO,4(R1)
BIC
#30,4(R1)
ROMCLK
121100!0
ROMCLK
1210051<0420>
MoV
RO,RS
8IC
#30,R5
MOvVB
S(R1),R4
CMPB
R5.R4
BEQ
654
EMT
4

;PUT PATTERN INTO PORT4
;CLEAR UNWANTED BITS
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5303
;MOV DATA TO IBUS# REGISTER 0
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS* REGISTER 0
+PUT EXPECTED IN RS
:CLEAR UNWANTED BITS
;:PUT “FOUND” INTO R4
;:DATA CORRECT?
;BR IF YES
;:ERROR

CLC
ROLB

:CLEAR CARRY
;SHIFT BIT IN RO

SCoP1

B8NE
MOV
MoV
CcoM

RO
644
#674,L0CK
91.R0

MoV
RO,4(R1)
8IC
#30,4(R1)
ROMCLK
1211000
ROMCLK

121005!<0#420>
MOV
RO.RS
BIC
#30,RS5
Move
S(R1),R4
CMPB
RS,R4
BEQ
684
EMT
4
SCoP1
CoM
RO
CLC
ROLB
RO
BNE
694
SCOPE

:SW09=1?

;IF RO=0 THEN DONE
;:NEW SCOP1
:START WITH BIT 0
;CHANGE TO FLOATING ZERO
;:PUT PATTERN INTO PORT4
;CLEAR UNWANTED BITS
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOV DATA TO IBUS* REGISTER O
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304

;READ FROM IBUS+ REGISTER 0
;PUT EXPECTED IN RS
:CLEAR UNWANTED BITS

;PUT “FOUND” INTO R4
;DATA CORRECT?
;:BR IF YES
;ERROR
:SW09=17?
;CHANGE TO FLOATING 1
;:CLEAR CARRY
;SHIFT BIT IN RO
;IF RO=0 THEN DONE
:SCOPE THIS TEST

SEQ 61

CZOMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-22
DMC11 MICRO PROCESSOR IBUS¢ TESTS
26
shatdsabhthbsbbsbibbbbbbintts

TEST

sssssstsssbbstabbsbddsbbsan

;#MICRO PROCESSOR IBUS+ REGISTER WRITE/READ TEST
;#FLOAT A 1 THROUGH IBUSs REGISTER 2

;#FLOAT
HEEI

:
015734
015742
015750

012737
012737
012737

015756
015760
015764
015770
015770
0135774
016002
016004
016006
016010
016012

104412
012702
012700
010061
042761
104414
121102
104414
121045
010005

016014

042705

016026
016030
016032
016034
016036

001401
104004
104401
000241
106100

016020
016024

016040
016042

016050
016054
016056
016056

016062
016070
016072
016074
016076
016100
016102
016106
016112
016114
016116
016120
016122
016124
016126
016130
27 016132

116104
120504

001353
012737

012700
005100
010061
042761
104414
121102
104414
121045
010005
042705
116104
120504
001401
104004
104401
005100
000241
106100
001351
104400

000033
016134
015770

001226
001216
001220

000002
000001
000004
000070

TST33:

6454
000004

000070

65%:

000004
000070

MOV
MOV
MOV

MSTCLR
MOV
MoV

693 :
67%:
000004

000070
000005

68$:

THROUGH

IBUS*
Iy

933, TSTNO
4TST34 ,NEXT
2643 ,L0CK

2 ,.R2
#1.R0

;:R1 CONTAINS BASE DMC11 ADDRESS
;MASTER CLEAR OMC11
sSAVE REGISTER ADDRESS FOR TYPEOUT
;START WITH BIT O

MoV
RO,4(R1)
8IC
#70,4(R1)
ROMCLK
12110012
ROMCLK
121005¢<2420>
MOV
RO,RS

;PUT PATTERN INTO PORT4
;CLEAR UNWANTED BITS
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUSs REGISTER 2
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUSs REGISTER 2
;PUT EXPECTED IN RS

MOVB
CMPB

;PUT “FOUND” INTO R4
;sDATA CORRECT?

BEQ
EMT
SCOP1
CLC
ROLB
BNE
MOV

001220

TEST 33

B8IC

000005

016056
000001

HOV
coM

#70,RS

5(R1),R4
R5,R4

654
4

RO
644
967$,L0CK
#1,R0
RO

MoV
RO,4(R1)
8IC
470,4(R1)
ROMCLK
121100!2
ROMCLK
1210051<2420>
MoV
RO,R5
BIC
970,R5
MOvB
5(R1).R4
CHPB
R3,R4
BEQ
683
EMT
4
SCoP1
CoM
RO
CLC
ROLB
RO
BNE
694
SCOPE

;:CLEAR UNWANTED BITS
:BR IF YES
;ERROR
;SW09=1?
;:CLEAR CARRY
;:SHIFT BIT IN RO

;IF RO=0 THEN DONE
sNEW SCOP1

:START WITH BIT 0
;CHANGE TO FLOATING ZERO
:PUT PATTERN INTO PORTA
;CLEAR UNWANTED BITS
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS+ REGISTER 2
;NEXT WORD IS INSTRUCTION, ROMCLK PC<5304
;READ FROM IBUS» REGISTER 2
;PUT EXPECTED IN RS
;:CLEAR UNWANTED BITS
;PUT “FOUND* INTO R4
+DATA CORRECT?
+BR IF YES
;ERROR
;5W09=17
;CHANGE TO FLOATING 1
;CLEAR CARRY
;SHIFT BIT IN RO
:IF RO=0 THEN DONE
:SCOPE THIS TEST

SEQ 62

CZOMC
MACRO v04.00
27-JUN-85 13:16:37 PAGE 27-23
OMC11 MICRO PROCESSOR IBUSs TESTS

i6kbA

bbb bnbhtibbbbdtsbts

TEST

sssdstsbdndbbsbsdbdnsssidd

;sMICRO PROCESSOR IBUSs REGISTER WRITE/READ TEST
;sFLOAT A 1 THROUGH IBUS+ REGISTER 4
;#FLOAT A O THROUGH IBUS+ REGISTER 4

016134
016142
016150

012737
012737
012737

016156
016160
016164
016170
016170
016174
016176
016200
016202

104412
012702
012700

016204

016206
016212
016214
016216
016220
016222
016224
016226
016230
016236
016242
016244
016244
016250
016252
016254
016256
016260
016262
016266
016270
016272
016274
016276
016300
016302
016304
016306

010061
104414
121104
104414
121105
010005
116104
120504
001401
104004
104401
000241
106100
001360
012737
012700
005100
010061
104414
121104
104414
121105
010005
116104
120504
001401
104004
104401
005100
000241

106100

001356
104400

000034
016310
016170

001226
001216
001220

000004
000001

TST34:

64%:

000004

000005

TEST 34

MoV
MoV
MOV

MSTCLR
MoV
MOV

016244
000001

000004

001220

69$:
67%:

000005

EMT
SCoP1
CLC
ROLB
BNE
MOV
MOV

con

68%:

¢4 ,R2
¢1,R0

654

RO
644
@674 ,L0CK
#1.RO
RO

MoV
RO,4(R1)
ROMCLK
121100!4
ROMCLK
121005!<4420>
MOV
RO,RS
Move
S(R1),R4

CHPB

8eQ
EMT
SCOP1

comM

CLC
ROLB
BNE
SCOPE

I I

T IITITIITYTYYYTM

#34,TSTNO
#TST35,NEXT
#64$ ,LOCK

MoV
R0,4(R1)
ROMCLK
121100!'4
ROMCLK
121005!<4420>
MOV
RO,RS
Move
5(R1),R4
CMPB
R5,R4

BEQ

65%:

R5,R4

684
4

RO
RO
69¢

;R1 CONTAINS BASE DMC11 ADDRESS
:MASTER CLEAR DMC11
;SAVE REGISTER ADDRESS FOR TYPEOUT
:START WITH BIT 0
;PUT PATTERN INTO PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOV DATA TO IBUS* REGISTER 4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;+READ FROM IBUS* REGISTER 4
;PUT EXPECTED IN RS
sPUT "FOUND” INTO R4
;DATA CORRECT?
;BR IF YES
;:ERROR
;SW09=1?
;CLEAR CARRY
;SHIFT BIT IN RO
;IF RO=0 THEN DONE
sNEW SCOP1
;START WITH BIT O

;CHANGE TO FLOATING ZERO

:PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUSs REGISTER 4
tNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sREAD FROM IBUS+ REGISTER 4
;PUT EXPECTED IN RS

;PUT “FOUND” INTO R4
;DATA CORRECT?
iBR IF YES
:ERROR
3SHO9=1?
;CHANGE TO FLOATING 1
sCLEAR CARRY
sSHIFT BIT IN RO
;IF RO=0 THEN DONE
:SCOPE THIS TEST

chhbbbbshbddhidbshhbbbbsbtss

TEST

ssssdtsstdtsketdtsdissbisns

;#MICRO PROCESSOR IBUS+ REGISTER WRITE/READ TEST
;¢FLOAT A 1 THROUGH IBUS+ REGISTER S
;:#FLOAT A 0 THROUGH IBUSs REGISTER S

SEQ 63

MACRO V04,00
27-JUN-85 13:16:37 PAGE 27-24
CZoMC
OMC11 MICRO PROCESSOR IBUSs TESTS
A

012737
012737
012737

016332
016334
016340

104412
012702
012700

000005
000001

010061

000004

016344
016344
016350
016352
016354
016356
016360
016362
016366
016370
016372
016374
016376
016400

016402

016404
016412
016416
016420
016420
016424
016426
016430
016432
016434
016436
016442
016444
016446
016450
016452
016454
016456
016460
016462

104414
121105
104414
121125
010005
116104
120504
001401
104004
104401
000241
106100
001360
012737
012700
005100

010061
104414
121105
104414
121125
010005
116104
120504
001401
104004
104401
005100
000241
106100
001356
104400

000035
016464
016344

001226
001216
001220

TST35:

64¢:

65%:

016420
000001

000004

MOV
MOV
MOV
MSTCLR
MOV
MoV

001220
694
:
67$:

000005

68$:

T IYTYYYYS

#35, TSTNO
#T5736 ,NEXT
2644 ,L0CK

;R1 CONTAINS BASE DMC1l ADDRESS
sMASTER CLEAR DMC11
;SAVE REGISTER ADDRESS FOR TYPEOUT
:START WITH BIT O

#5,R2
#1,R0

MOV
RO,4(R1)
ROMCLK
121100!5
ROMCLK
1210051 <5420>
MOV
RO,RS

MOvVB

000005

22t T

TEST 35

;
016310
016316
016324

CMPB
BEQ
EMT
SCoP1
CLC
ROLB
BNE
MOV
MOV
coM

S5(R1),.R4

R5,R4
654
4

BNE
SCOPE

sNEXT WORD IS INSTRUCTION, ROMCLK PC=530%
:MOV DATA TO IBUSs REGISTER S
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

;:READ FROM IBUS* REGISTER S

;PUT EXPECTED IN RS
;PUT “FOUND” INTO R4
;:DATA CORRECT?
;:BR IF YES

;ERROR

i SW09=1?

644
9674 ,L0CK
€1.R0
RO

MOV
RO,4(R1)
ROMCLK
12110015
ROMCLK
121005!<5420>
MOV
RO,RS
MOVB
S(R1),.R4
CMPB
RS,R4
BEQ
684
EMT
4
SCoP1
COM
RO
cLC

ROLSB

;PUT PATTERN INTO PORT4

694

4808400000

:CLEAR CARRY
;SHIFT BIT IN RO
;IF RO=0 THEN DONE
:NEW SCOP1
;START WITH BIT O
;CHANGE TO FLOATING ZERO
;PUT PATTERN INTO PORTS
sNEXT WORD IS INSTRUCTION, ROMCLK PCs5304
sMOV DATA TO IBUS#* REGISTER 5
{NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sREAD FROM IBUS*+ REGISTER S
;PUT EXPECTED IN RS

;PUT

“FOUND” INTO R4

;DATA CORRECT?
;BR IF YES

;ERROR

sSW09=1?
;CHANGE TO FLOATING 1
;CLEAR CARRY
sSHIFT BIT IN RO
sIF RO=0 THEN DONE
;:SCOPE THMIS TEST

n0bbbsidbsstbas

TEST

ssdtnttsdsssstsddssisddnssdsd

;#MICRO PROCESSOR IBUS+ REGISTER WRITE/READ TEST
;#FLOAT A 1 THROUGH IBUS+ REGISTER 10
s#FLOAT A O THROUGH IBUSs REGISTER 10
;#THE NPR RQ BIT (BIT 0) IS MASKED DURING THIS TEST
F iR RAAAARA

;

TEST 36

RS RA RN AR AR AE

RS AAA

A4 AARAERE00000000000000808004

SEQ 64

MACRO VO4.00
27-JUN-85 13:16:37 PAGE 27-25
CZDMC
DMC11 MICRO PROCESSOR IBUSs TESTS

016464

012737
012737
012737

016506
016510
016514
016520
016520
016524
016532

104412
012702
012700

016472
016500

016534
016536
016540
016342
016544
016530
016354
016556
016560
016562
016564
016566
016570
016572
016600
016604
016606
016606
016612
016620
016622
016624
016626
016630
016632
016636
016642
016644
016646
016650
016652
016654
016656
016660
016662

010061
042761
104414
121110
104414
121205
010005
042705
116104
120504
001401
104004
104401
000241
106100
001353
012737
012700
005100

010061
042761
104414
121110
104414
121205
010005
042705
116104
120504
001401
104004
104401
005100
000241
106100
001351
104400

000036
016664
016520

001226
001216
001220

000010
000001
000004
000141

TST36:

644

HMovBe
CcMPB
65%:

000004
000141

MSTCLR
MOV
MOV

936.TSTNO
OTST37,.NEXT
#6435 ,L0CK

410,R2
@1.RO

MOV
RO,4(R1)
8IC
#141.4(R1)
ROMCLK
12110010
ROMCLK
121005!<10420>
MoV
RO,R5
8IC
9141,RS

000004

000141
000005

016606
000001

MOV
MOV
MOV

001220
694:
674:
000004

BEQ
EMT
SCOP1
CLC
ROLB
BNE
MOV
MOV
coM

S(R1),.R4
R5,R4

65¢
4

RO
644
#67%,L0CK
#1,R0

;PUT PATTERN INTO PORT4

121005!<10420>
MoV
RO,R5
BIC
4141 ,R5
MOve
S(R1),R4

sREAD FROM IBUS+ REGISTER 10

CcHPB

8EQ
684:

;PUT PATTERN INTO PORT4
;CLEAR UNMWANTED BITS
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS* REGISTER 10
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS* REGISTER 10
;:PUT EXPECTED IN RS
;CLEAR UNWANTED BITS
;PUT “FOUND” INTO R4
;DATA CORRECT?
;B8R IF YES
;ERROR
:SW09=1?
;CLEAR CARRY
;SHIFT BIT IN RO
:IF RO=0 THEN DONE
;sNEW SCOP1
:START WITH BIT 0
;CHANGE TO FLOATING ZERO

MOV
RO,4(R1)
8IC
4141 ,4(RL)
ROMCLK
12110010

ROMCLK

000141
000005

:R1 CONTAINS BASE DMC11 ADDRESS
;MASTER CLEAR DMC11
;:SAVE REGISTER ADDRESS FOR TYPEOUT
;START WITH BIT O

EMT
SCoP1
CoM

cLC

ROLB
BNE
SCOPE

RS,.R4

684
4

RO
RO
694

sCLEAR UNWANTED BITS

iNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS* REGISTER 10
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;PUT EXPECTED IN RS
:CLEAR UNWANTED BITS
sPUT “FOUND* INTO R4
sDATA CORRECT?
:8R IF YES
;ERROR

;SW09=17

;CHANGE TO FLOATING 1
;CLEAR CARRY
sSHIFT BIT IN RO
sIF RO=0 THEN DONE
;SCOPE THIS TEST

;88804488885 8804888400804088

TEST

sstttsssdssdsssbbdddbsssbids

s+ sMICRO PROCESSOR IBUS+ REGISTER WRITE/READ TEST
;#FLOAT A 1 THROUGH IBUSs REGISTER 11
;#FLOAT A O THROUGH IBUSs REGISTER 11
ssTHE BR RQ BIT, PGM CLOCK BIT, FORCE POMWER FAIL BIT
;#(BITS 7,4,1) ARE ALL MASKED DURING THIS TEST
FIARRSOAARRRSSARAARE0AAAAS400A00004004000500400404000000408008

TEST 37

SEQ 65

CZonC
MACRO v04.00
27-JUN-85 13:16:37 PAGE 27-26
OMC11 MICRO PROCESSOR IBUSs TESTS

016664
016672
016700

012737
012737
012737

016706
016710
016714
016720
016720
016724
016732
016734
016736
016740
016742
016744
016730
016754
016760
016764
016766
016770
016772
016774
016776
017000
017002
017010

104412
012702
012700

017014
017016
017016
017022
017030
017032
017034
017036
017040
017042
017046
017052
017056
017062
017064
017066
017070
017072

017074

017076
017100
017102

010061
042761
104414
121111
104414

121225
010005
042705
032705
116104
052704
120504
001401
104004
104401
000241
106100
001347
012737
012700
005100
010061
042761
104414
121111
104414
121225
010005
042705
052705
116104
052704

120504
001401
104004
104401
005100
000241
106100
001345
104400

000037
017104
016720

001226
001216
001220

000011
000001

000004
000262

TST37:

644:
000004

000262
000020
000005
000020

654:

017016
000001

000004
000262

001220

694:
67%:
000004

MOV
MOV
MOV

MSTCLR
MOV
MOV

937, TSTNO
#1ST40,NEXT
9644 ,L0CK

#11,R2
#1.R0

MOV
RO,4(R1)
BIC
9262,4(R1)
ROMCLK
12110011
ROMCLK
121005!<11+20>
MoV
RO,R5
BIC
#262,R5
8Is
420,R5
MOVB
S(R1),R4
BIS
920,R4
CMPB
R5,R4
BEQ
654
EMT
4
SCoP1
cLC
A0LB
RO
BNE
643
MOV
#674,L0CK
MOV
#1,R0
coM
RO

sPUT PATTERN INTO PORT4

MOV
BIC
ROMCLK

sPUT PATTERN INTO PORT4
sCLEAR UNWANTED BITS
+NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
1MOV DATA TO IBUSs REGISTER 11
+NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sREAD FROM IBUSs REGISTER 11
sPUT EXPECTED IN RS
1CLEAR UNWANTED BITS
sADD THESE BITS

RO,4(R1)
9262,4(R1)

121100!11
ROMCLK
121005¢¢<11420>
MOV
RO,R5
8IC
#262 RS
BIS
#20,R35
MOV
SC(R1),R4
815
#20,R4
CHPB
RS,R4
BEQ
604

000262
000020
000005
000020

68%:

;R1 CONTAINS BASE DMC11 ADDRESS
;MASTER CLEAR DMC11
;SAVE REGISTER ADDRESS FOR TYPEOUT
;START WITH BIT O

EMT

SCOP1
com
CLC
ROLB
BNE
SCOPE

RO
RO
694

;CLEAR UNWANTED BITS

iNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOV DATA TO IBUSs REGISTER 11
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

;READ FROM IBUS+ REGISTER 11
;PUT EXPECTED IN RS

;CLEAR UNWANTED BITS
:ADD THESE BITS

:PUT *"FOUND* INTO R4
;ADD THIS BIT
;:DATA CORRECT?
1BR IF YES
$ERROR

:SW09=1?

sCLEAR CARRY
sSHIFT BIT IN RO
:IF RO=0 THEN DONE
sNEW SCOP1
sSTART WITH BIT ©
sCHANGE TO FLOATING ZERO

1tPUT “FOUND* INTO R4
tADD THIS BIY
1DATA CORRECT?

1BR IF YES

;ERROR
1SW09=1?
sCHANGE TO FLOATING 1
sCLEAR CARRY
:SHIFT 8IT IN RO
1IF RO=Q0 THEN DONE
1SCOPE THIS TEST

1688086000088448080000805408

TEST 40

$804448800002000800080000000s

;sMICRO PROCESSOR IBUS REGISTER WRITE/READ TEST

$oFLOAT A 1 THROUGH IBUS REGISTER O

1sFLOAT A O THROUGH IBUS REGISTER 0

SEQ 66

CZOMC
MACRO v04.00 27-JUN-8S 13:16:37 PAGE 27-27
OMC11 MICRO PROCESSOR IBUS TESTS
3:08008840454884008384848088484858050808808803048840400

80480040484048

TEST &0

017104
017112
017120

012737
012737
012737

017126
017130
017134
017140

104412
012702
012700

000000
000001

010061

000004

017140

017144

017146

017150

017152
017154
017156
017162
017164
017166
017170
017172
017174
017176
017200
017206
017212
017214
017214
017220

017222
017224
017226

017230
017232
017236
017240
017242
017244

01’7246

017250
017252
017254
017256

104414

000080
017260
017140

001226
001216
001220

TST40:

122100

010061
104414
122100
104414
021005
010005

116104
120504

&40, TSTNO
#TSTAL NEXT
4643, 0CK
:R1 CONTAINS BASE DMC11 ADDRESS

MSTCLR
MOV
MOV

00,R2
&1.R0

MOV

RO,4(R1)

sMASTER CLEAR DMC11
:SAVE REGISTER ADDRESS FOR TYPEOQUT
:START WITH BIT O

;PUT PATTERN INTO PORT4

ROMCLK

sNEXT WORD IS INSTRUCTION,

ROMCLK PC=5304

ROMCLK

sNEXT WORD IS INSTRUCTION,

ROMCLK PC=5304

122100!0

304414

021005
010005
116104
120504
001401
104005
104401
000241
106100
001360
012737
012700
005100

MOV
MoV
MOV

000005

65%:

017214
000001

001220
693
67%:

000004

000005

21005! <0#20>
MOV
RO,RS
MOV8
S(R1),.R4
cMPB
RS .R4
BEQ
65%
EMT
5
SCoP1
CLC
ROLB
RO
BNE
643
MOV
#674 ,LOCK
MOV
#1.RO
CoM
RO

;READ FROM IBUS REGISTER 0
;PUT EXPECTED IN RS
sPUT “FOUND” INTO R4
;sDATA CORRECT?
;BR IF YES
;ERROR
:SW09=1?
;CLEAR CARRY
sSHIFT BIT IN RO
;IF RO=0 THEN DONE
sNEW SCOP1
;:START NITH BIT O
;CHANGE TO FLOATING ZERO

MOV
RO,4(R1)
ROMCLK
122100!0
ROMCLK
21005!<0+20>
MOV
RO,RS

;PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304

BEQ
EMT

;BR IF YES
;ERROR
:SUW09=12

MovVB
cMPB

001401
104005

104401
005100

68%$:

000241
106100
001356
104400

sMOV DATA T0 IBUS REGISTER ©

;MOV DATA TO IBUS REGISTER O
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5204
;:READ FROM IBUS REGISTER O

:PUT EXPECTED IN RS
;PUT "FOUND” INTO R4
sDATA CORRECT?

S(R1),R4
RS.R4
68¢
S

SCoP1
comM
CLC
ROLB
BNE
SCOPE

;CHANGE TO FLOATING 1

;sCLEAR CARRY
;SHIFT BIT IN RO
;IF RO=0 THEN DONE
sSCOPE THIS TEST

RO
694

;00bbsabbbshbttbntdinabitss

TEST

stsstsssdbntddddstidtdbsdig

:#MICRO PROCESSOR IBUS REGISTER WRITE/READ TEST
;#FLOAT A 1 THROUGH IBUS REGISTER 1
;#FLOAT R O THROUGH IBUS REGISTER 1
R

;
017260

012737

000041

001226

T1ST41:

MOV

Ty T

TEST 41
#41,TSTNO

VY Py P

YTy YTITTTIIvYYY

SEQ 67

CZDMC
MACRO vO4.00
27-JUN-8S 13:16:37 FAGE 27 28
OMC21 MICRO PROCESSOR IBUS TESTS
17266
0i7274

012737
012737

017302

104412
012702
012700

017304
017310
017314
017314
010061
017320
104414
017322
122101
017324
104414
017326
021025
017330
010005
017332
116104
017336
120504
017340
001401
017342
104005
017344
104401
017346
000241
017350
106100
017352
001360
017354
012737
017362
012700
017366
005100
017370
017370
010061
017374
104414
017376
122101
017400
104414
021025
017462
017404
010005
017406
116104
017412
120504
017414
001401
017416
104005
017420
104404
017422
005100
017424
00C241
017426
106100
017430
001356
017432
104400

017434
017314

001216
001220

MOV
MOV

815742 ,NEXT
9643 ,L0Cv

;R1 CONTAINS BASE DMC11 ADDRESS

MSTCLR
MOV
MOV

000001
000001

sMASTER CLEAR DMC11

#1,R2
#1,R0

;SAVE REGISTER ADDRESS FOR TYPECUT
;START WITH BIT O

648

000004

MOV
ROMCLK

RO,4(R1)

;PUT PATTERN INTO PORT4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 1

1221001

ROMCLK

000605

65$:

017370
000001

001220

698
67%:

000004

sNEXT WORD IS INSTRUCTION, ROMCLK PCs5304
;READ FROM IBUS REGISTER 1

21005 <1420>
MOV
RO,RS
Move
S(R1),R4
(P8
RS ,R4
BEQ
65%
EMT
S
SCoP1
CLC
ROLB
RO
BNE
644
MOV
2673 ,L0CK
MOV
21,R0
com
RO

;PUT EXPECTED IN RS
;PUT “FOUND” INTO R4
;DATA CORRECT?
;sBR IF YES
;:ERROR
:S5W09217?

sCLEAR CARRY
sSHIFT BIT IN RO
;IF RO=0 THEN DONE
sNEW SCOP1
sSTART WITH 81T ©

;CHANGE TO FLOATING ZERO

MOV
RO,4(R1)
ROMCLK
1221001
ROMCLK
21005! <1420>
MOV
RO,RS
Move
5(R1),R4

000005

68¢:

tMP8
BEQ
Mt
SCoPL
com
CLC

:PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 1
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 1

;PUT EXPECTED IN RS

;PUT “FOUND* INTO R4
;DATA CORRECT?
:BR IF YES
;:ERROR

RS.R4
683
5

;SW09=1?

ROLB

BNE
SCOPE

694

:CHANGE TO FLOATING 1
iCLEAR CARRY
;SHIFT BIT IN RO
:IF RO=0 THEN DONE
;:SCOPE THIS TEST

;ebbdstdadbdibihbddibrsdbitis

; #MICRO PROCESSOR

TEST

IBUS REGISTER

;#FLOAT A 1 THROUGH IBUS REGISTER 2

;#FLOAT
5

012737
012737
012737

017456
017460

104412
012702

000042
017610
017470

000002

001226
001216
001220

TS742:

THROUGH

TEST

IBUS REGISTER 2

888804484454 00A0R 400000402020 00008004d0002 00t

:
017434
017442
017450

stsssdtsdsdsisddbidddsnssss

WRITE/READ

dakibdiidddd

TEST &2

MOV
MOV
HOV

MSTCLR
MOV

242, TSTNO
#TST43 NEXT

0643 ,L0CK

92,R2

;R1 CONTAINS BASE DMC11 ADDRESS
sMASTER CLEAR DMC11
;SAVE REGISTER ADDRESS FOR TYPEQUT

SEQ 68

CZDMC
MACRO v04.00
27 JUN 85 13:16:37 PAGE 27-29
OMC11 MICRO PROCESSOR IBUS TESTS
017464
017470
017470
017474

017476
017500
017502
017504
017506
017512
017514
017516
017520
017522
017524
017526
017530
017536

017542

012700

000001

010061
104414
122102
104414
021045
010005
116104
120504
001401
104005
104401
000241
106100
001360
012737

000004

012700
005100

017544
017544
017550
017552
017554
017556
017560

104414
021045
010005

017566
017570
017572

120504
001401
104005

017562

017574
017576

017600
017602
017604
017606

64%:

000005

65%:

017544

000001

010061
104414
122102

000004

116104

000005

001220

694 :

67$:

MOV

MOV
RO,4(R1)
ROMCLK
12210012
ROMCLK
21005!<2420>
MOV
RO.RS
Move
S(R1),.R4
cMPB
R5.R4
8€Q
654
EMT
S
SCOP1
CLC
ROLB
RO
BNE
64
MOV
8674 ,L0CK

MOV
com

684:

000241
106100
001356
104400

¢1,RO
RO

;START

WITH BIT 0O

;:PUT PATTERN INTO PORTA4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 2

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sREAD FROM IBUS REGISTER 2
;PUT EXPECTED IN RS
sPUT “FOUND” INTO R4
;DATA CORRECT?
:BR IF YES
;ERROR
;SW09=17?
;CLEAR CARRY
:SHIFT BIT IN RO
;IF RO=0 THEN DONE
sNEW SCOP1
;:START WITH BIT 0

;CHANGE TO FLOATING ZERO

MOV
RO,4(R1)
ROMCLK
122100:2
ROMCLK
210051 <2420>
MOV
RO RS

;PUT PATTERN INTO PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 2
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 2
;PUT EXPECTED IN RS

cMPB
BEQ
eMT

:DATA CORRECT?
:BR IF YES
;ERROR

HOovB

104401
005100

91,R0O

sCoPt
CoM

cLC
ROLB
BNE
SCOPE

S(R1),R4

R5,R4
684
5

RO
RO
694

:PUT “FOUND” INTO R4

:SW09=1?
;CHANGE TO FLOATING 1
:CLEAR CARRY
;SHIFT BIT IN RO
;:IF RO=0 THEN DONE
:SCOPE THIS TEST

;680 hs a0 b0 0000000
bbbt
00k
dnks

TEST

sannsbrbddbddddhdohkbbbbbhdk

;#MICRO PROCESSOR IBUS REGISTER WRITE/READ TEST
;¢FLOAT A 1 THROUGH IBUS REGISTER 3

;#FLOAT A O THROUGH IBUS REGISTER 3

$:0084 04048008800k b Akt htiiRRbbhbbbbbihiiRbdnibhtbbihinkitd

;

017610
017616
017624

012737
012737
012737

017632
017634
017640
017644
017644
017650
017652

104412
012702
012700
010061
104414
122103

000043
017764
017644

000003
000001
000004

001226
001216
001220

TST43:

644:

TEST 43

MOV
MOV
MOV
MSTCLR
MOV
Mov

#43,TSTNO
#TS744 ,NEXT
4643 ,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

43.R2
¢1,.R0

MOV
RO,4(R1)
ROMCLK
122100!3

;MASTER CLEAR DMC11i
sSAVE REGISTER ADDRESS FOR TYPEOUT
;START WITH BIT O
;PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 3

SEQ 69

HACRO v04.00
27-JUN-85 13:16:37 PAGE 27-30
c2oMC
OMC11 MICRO PROCESSOR 1BUS TESTS

017654
104414
017656
021065
010005
017660
017662
116104
017666
120504
017670
001401
017672
104005
017674
104401
017676
000241
017700
106100
027702
001360
017704
012737
017712
012700
005100
017716
017720
017720
01C061
017724
104414
017726
122103
017730
104414
017732
021065
017734
010005
017736
116104
017742
120504
001401
017744
017746
104005
017750
104401
017752
005100
017754
000241
017756
106100
017760
001356
017762
104400

ROMCLK
210051 <3420>
MOV
RO,RS

Mmove

000005

65%:

017720
000001

001220
694
67%:

000004

000005

68¢:

cMPB
BEQ
ENT
SCoP1
CLC
ROLB
BNE
MOV
MOV
coM

S(R1),R4

RS5,R4
65%
5

RO
644
4673 ,1.0CK
#41,R0O
RO

MOV
RO,4(R1)
ROMCLK
12210013
ROMCLK
210051 <3+20>
MOV
RO,R5
MOVB
S(R1),R4
cMPB
R5,R4
BEQ
68$
EMT
5
SCOP1
CoM
RO
CLC
ROLB
RO
BNE
69
SCOPE

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 3
;PUT EXPECTED IN RS
;PUT “FOUND” INTO R4
;DATA CORRECT?
;:BR IF YES
;ERRCR
:SW09=17?
;CLEAR CARRY
;SHIFT BIT IN RO

;IF RO=0 THEN DONE

:NEW SCOP1
;START WITH BIT 0
;CHANGE TO FLOATING ZERQ

;PUT PATTERN INTO PORT4
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 3
¢NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER
3
;PUT EXPECTED IN RS
;PUT “FOUND" INTO R4
;DATA CORRECT?
;BR IF YES

;ERROR

;SW03=17?

;CHANGE TO FLOATING 1
;CLEAR CARRY
;:SHIFT BIT IN RO

;IF RO=0 THEN DONE

;SCOPE THIS TEST

shshbbnbbabbdbhbiibbbdbdiad

TEST

sshkhhsdbbdbhbbbishbbdbdbsd

;#MICRO PROCESSOR IBUS REGISTER WRITE/READ TEST
;#FLOAT A 1 THROUGH IBUS REGISTER 4

;#FLOAT A O THROUGH IBUS REGISTER 4

017764
017772
020000

012737
012737
012737

020006
020010
020014
020020
020020
020024
020026
020030
020032
020034
020036
020042

104412
012702
012700
010061
104414
122104
104414
021105
010005
116104
120504

000044
020140
020020

001226
001216
001220

TST44:

000004
000001
000004

000005

644

;

TEST 44

MOV
MoV
MOV
MSTCLR
MoV
MOV

T Ty
Y T T T
T
T Ty ppes

444, TSTNO
QTST45 NEXT
9644 ,L0CK

4,82
@1,R0

MOV
RO,4(R1)
ROMCLK
12210014
ROMCLK
21005¢ <4420>
MOV
RO,RS

MOVB
CcMPB

S5(R1),R4
R5.R4

;R1 CONTAINS BASE DMC11 ADDRESS

sMASTER CLEAR DMC11
:SAVE REGISTER ADDRESS FOR TYPEQUT
:START WITH BIT O

;PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 4
;PUT EXPECTED IN RS

;PUT “FOUND“ INTO R4
;DATA CORRECT?

SEQ 70

CZDMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-31
OMC11 MICRO PROCESSOR IBUS TESTS
020044
020046
020050
020052
020054

020056
020060

020066
020072

020074
020074
020100
020102
020104
020106
020110
020112
020116
020120

020122
020124
020126
020130

020132

020134
020136

001401
104005
104401
000241
106100
001360
012737
012700
005100
010061

104414
122104
104414
021105
010005
116104
120504
001401
104005
104401
005100
000241
106100
001356
104400

65%:

020074
000001

001220

69¢:
67$:

000004

BEQ
EMY
scoP1
cLC
ROLB
BNE
MOV
MOV

com

68%:

RO
644
#67$,L0CK
¢1.R0

sBR IF YES
;ERROR
;SW09=17
;CLEAR CARRY
sSHIFT BIT IN RO
; IF RO=0 THEN DONE
;NEW SCOP1
;START WITH BIT O

;CHANGE TO FLOATING ZERO

MoV
RO,4(R1)
ROMCLK
122100!4
ROMCLK
21005! <4420>
MOV
RO,RS

;PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:MOV _DATA TO IBUS REGISTER 4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:READ FROM IBUS REGISTER 4
;PUT EXPECTED IN RS

cMPB
BEQ
EMT
SCOP1
com
CLC

:DATA CORRECT?
iBR IF YES
+ERROR
:SW09=1?
;CHANGE TO FLOATING 1
:CLEAR CARRY

MOve

000005

65$
5

ROLSB

BNE
SCOPE

S5(R1),R4

R5,R4
684
5
RO

:PUT "FOUND" INTO R4

;SHIFT BIT IN RO

694

:IF RO=0 THEN DONE
;SCOPE THIS TEST

shbbsbbbddbbhbbhbbbhahbhihht

TEST

sassbksbkbbibbbbhkbhhbhdhhhhs

;*MICRO PROCESSOR IBUS REGISTER WRITE/READ TEST

s#FLOAT A

THROUGH IBUS REGISTER 5

;4FLOAT A O THROUGH IBUS REGISTER S
;iR

;s
020140
020146
020154

012737
012737
012737

020162
020164
020170
020174
020174
020200
020202
020204
020206
020210
020212
020216
020220
020222
020224
020226
020230

104412
012702
012700

000005
000001

010061

000004

104414
122105
104414
021125
010005
116104
120504

001401
104005
104401
000241
106100

000045
020314
020174

001226
001216
V01220

TSTA4S:

644:

ARkkAb AR AR b b Akt dh bbbk kb kbbb bbbk bk hkb kb khkk kb hkhkhhhhk bk

TEST 45

MOV
MOV
MOV

MSTCLR
MOV
MOV

945, TSTNO
#7ST46 ,NEXT
9644 ,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

#5,R2
#1,R0

MOV
RO,4(R1)
ROMCLK
122100¢5
ROMCLK
21005 <5420>
Hov
RO,RS

MoV

000005

65%:

cMP8
BEQ
EMT
SCoP1
CLC

ROLSB

S5(R1),R4

RS.R4
65¢
5

iMASTER CLEAR DMC11
:SAVE REGISTER ADDRESS FOR TYPEOQUT
;START WITH BIT O
sPUT PATTERN INTO PORTA
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOV DATA TO IBUS REGISTER 5
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER S
:PUT EXPECTED IN RS

sPUT “FOUND* INTO R4

:DATA CORRECT?
:BR IF YES
;ERROR
:SW09=1?
:CLEAR CARRY

;SHIFT BIT IN RO

SEQ 71

CZOMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-32
OMC11 MICRO PROCESSOR IBUS TESTS
020232

020234
020242
020246

020250
020250
020254
020256
020260
020262
020264
020266
020272
020274
020276
020300
020302
020304
020306
020310
020312

001360
012737
012700
005100

010061
104414
122105
104414
021125
010005
116104
120504
001401
104005
104401
005100
000241
106100
001356
104400

020250
000001

001220
69$:
67%:

000004

BNE
MOV
MOV

CoM

644
#67$ ,LOCK
#'

MOV
RO,4(R1)
ROMCLK
122100!5S
ROMCLK

21005!
<5 20>

MOV
MOvB

000005

68$:

CMPB
BEQ
EMT
SCoP1
COM
CcLC

ROLB

BNE
SCOPE

RO,R5

S(R1),R4

R5,R4
68$
5

; IF RO=0 THEN DONE

;NEW SCOP1
;START WITH BIT O
:CHANGE TO FLOATING ZERO
;PUT PATTERN INTO PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 5
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:READ FROM IBUS REGISTER S
sPUT EXPECTED IN RS

;PUT

"FOUND”

INTO R4

;DATA CORRECT?
;BR IF YES
;ERROR
:SW09=1?

sCHANGE TO FLOATING 1
;CLEAR CARRY
;SHIFT BIT IN RO
:IF RO=0 THEN DONE
:SCOPE THIS TEST

RO
69¢

bbb bbhbkbbnbbbbrbbbhhbhbbhds

TEST

sandsskhbhhbhbbbhkbbbhbthdds

;#MICRO PROCESSOR IBUS REGISTER WRITE/READ TEST

;#FLOAT

THROUGH IBUS REGISTER 6

;#FLOAT A 0 THROUGH IBUS REGISTER 6

$i0RAAARRRARRARRRARLAARERRRRARARRARR
AR AR AR A RRRE
ARERAR
SRS kb kS

:
020314
020322
020330

012737
012737
012737

020336
020340
020344
020350
020350
020354
020356
020360
020362
020364
020366
020372
020374
020376
020400
020402
020404
020406
020410
020416
020422
020424

104412
012702
012700
010061
104414
122106
104414
021145
010005
116104
120504
001401
104005
104401
000241
106100
001360
012737
012700
005100

000046

020470
020350

001226

001216
001220

TST46:

MOV
MOV
MOV
MSTCLR

000006
000001

MoV
MoV

000004

000005

65¢:

020424
000001

TEST 46

001220
69$:
67$:

#46, TSTNO
@TST47 ,NEXT
9644 ,L0CK

#6,R2
#1.R0

MOV
RO,.4(R1)
ROMCLK
12210016
ROMCLK
21005!<6420>
MOV
RO,RS
MOV
S5(R1),R4
cHPB
R5.R4
BEQ
65¢
EMT
5
scoPt
CLC
ROLS
RO
BNE
644
MoV
#67%,L0CK
MoV
#1,R0
coM
RO

;R1 CONTAINS BASE DMC11 ADDRESS
:MASTER CLEAR DMC11
;SAVE REGISTER ADDRESS FOR TYPEQUT
;:START WITH BIT 0
;PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 6
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 6

;PUT EXPECTED IN RS

;PUT “FOUND” INTO R4
;DATA CORRECT?

;:BR IF YES
;ERROR
;SW09=1?

;CLEAR CARRY
;SHIFT BIT IN RO
:IF RO=0 THEN DONE
;NEW SCOP1
;START WITH BIT ©
;CHANGE TO FLOATING ZERO

SEQ 72

CZOMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-33
OMC11 MICRO PROCESSOR IBUS TESTS
020424
020430
020432
020434
020436
020440
020442
020446
020450
020452
020454

020456
020460
020462
020464
020466

010061

104414
122106
104414
021145
010005
116104
120504
001401
104005
104401
005100
000241
106100
001356
104400

000004

MOV
RO,4(R1)
ROMCLK
1221006
ROMCLK
21005! <6420>
MOV
RO,RS

MovVB

000005

cMPB
BEQ

68¢:

emMT

SCoP1

COoM

cLC
ROLB
BNE
SCOPE

S(R1).R4

R5,R4
684

RO
RO
694

;PUT PATTERN INTO PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV DATA TO IBUS REGISTER 6
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 6

;PUT EXPECTED IN RS
:PUT "FOUND"” INTO R4
;DATA CORRECT?
;BR IF YES
;ERROR

;SW09=17

;:CHANGE TO FLOATING 1
;CLEAR CARRY
+SHIFT BIT IN RO
:IF RO=0 THEN DONE

:SCOPE THIS TEST

shhkbbskbkbhbbbhhhhhbhhkkhhbhhk

TEST

sasrktbksshbbbbbbbssdhnshbsd

;*MICRO PROCESSOR IBUS REGISTER WRITE/READ TEST
;#FLOAT A 1 THROUGH IBUS REGISTER 7
;#FLOAT A O THROUGH IBUS REGISTER 7

:
020470
020476
020504

012737
012737
012737

020512

104412
012702
012700

020514
020520
020524
020524
020530
020532
020534
020536
020540

020542
020546
020550
020352
020554
020556
020560
020562
020564
020572
020576
020600
020600

020604
020606
020610
020612

010061
104414
122107

104414
021165
010005
116104
120504
001401

000047
020644
020524

001226
001216
001220

000007
000001
000004

010061
104414
122107
104414
021165

65%:

020600
000001

000004

MOV
MOV
MoV

#47,TSTNO
#TSTSO,NEXT
9644 ,L0CK

#7,R2
#1,R0

MoV
RO,4(R1)
ROMCLK
122100!7
ROMCLK
21005!<7420>
MOV
RO,RS
Hove
S(R1),R4

000005

001220

69$:
67%:

cmpP

R5,R4

ROLB
BNE
MOV

RO
644
#674,.L0CK

coM

MOV

RO,4(R1)

BEQ
EMT
scoP1
CcLC

MoV

rywrwm

TEST 47

MSTCLR
MOV
MoV

104005
104401

000241
106100
001360
012737
012700
005100

TST47:

654
5

#1,R0

ROMCLK
122100!7
ROMCLK
21005!<7420>

:R1 CONTAINS BASE DMC11 ADDRESS
:MASTER CLEAR DMC11
;SAVE REGISTER ADDRESS FOR TYPEC.T
;START WITH BIT 0
;PUT PATTERN INTO PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC-5304
sMOV DATA TO IBUS REGISTER 7
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 7
:PUT EXPECTED IN RS
;PUT "FOUND” INTO R4
;DATA CORRECT?
;BR IF YES
sERROR
;SW09=17?
;CLEAR CARRY
sSHIFT BIT IN RO
:IF RO=0 THEN DONE
sNEW SCOP1
:START WITH BIT ©
;CHANGE TO FLOATING ZERO

+PUT PATTERN INTO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOV DATA TO IBUS REGISTER ?
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER 7

SEQ 73

HMACRO v04.00
27-JUN-85 13:16:37 PAGE 27-34
CZDMC
OMC11 MICRO PROCESSOR IBUS TESTS

020614
020616
020622
020624
020626
020630
020632
020634
020636
020640
020642

010005
116104
120504
001401
104005
104401
003100
000241
106100
001356
104400

MOV
MOVB

000005

cHpPB

68%:

8EQ
EMT
SCoP1
coM
CLC
ROLB
BNE
SCOPE

RO,RS
S(R1),R4

;PUT EXPECTED IN RS
;PUT "FOUND” INTO R4

684
S

:BR IF YES
;ERROR
;SW09=17?
;CHANGE TO FLOATING 1
:CLEAR CARRY
sSHIFT BIT IN RO
;IF RO=0 THEN DONE
:SCOPE THIS TEST

R5,.R4

:OATA CORRECT?

RO
RO
69

bk bsbbbadbbbtbbitdtstbbsks

TEST

ssssssdbdbbdbsbtbatbbbhdhns

;#MICRO PROCESSOR IBUS DUAL ADDRESS TEST
;#WRITE ALL IBUS REGISTERS WITH INCREMENTING PATTERN
ssREAD ALL IBUS REGISTERS TO VERIFY CORRECT ADDRESSING

R
Ty
y
PP PP
Prw

:
020644

020652

020660

020666
020670

020674
020676
020700
020704
020712
020716
020720
020722
020724
020726
020730
020732

020740
020744

020746
020750
020752
020756
020760
020762
020764
020766
020770
020772
020776

021000
021006
021012

021014
021016

012737
012737
012737

104412
012700
005002
010203
010061
042737
050337

104414
122100
006303
006303
006303
006303
042737
050337
104414
021005
010005
116104
120504
001401
104005
104401
005200
005202
022702
001337
012737
012700
005002
0035003
042737

000050
021072
020676

001226
001216
001220

T75750:

020720

1s:
020720

5¢:

000360
020746

MOV
MOV
MOV

#50,TSTNO
#TST51,NEXT
@#1¢,L0CK

sR1 CONTAINS BASE DMC11 ADDRESS

MSTCLR

000001

000004
000017

TEST 50

8I1C

020746

6%:

000005

2%:

000010

021016
000001

001220

000360

021032

MOV
CLR
MOV
MoV
8IC
BIS
ROMCLK
122100
ASL
ASL
ASL
ASL

815
ROMCLK
21005
MOV
Move
cMPe
BEQ
EMT
sCoP1
INC
INC
CHp
BNE
MOV

3s:

MOV
CLR
CLR

BIC

#1.RO
R2
R2,R3
RO,4(R1)
917,58
R3,5¢
R3
R3
R3
R3

#360,64

R3.64

RO,R5
S(R1),R4
RS.R4
23
5
RO
R2
#7+1 ,R2
13
#3$,L0CK

#1.,RO
R2
R3

4360,7$

iMASTER CLEAR DMCi1

:START WITH A ONE
;R2 CONTAINS ADDRESS OF REGISTER
iR3=REGISTER ADDRESS
:WRITE DATA TO PORT4
:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE DATA TO IBUS REGISTER
:SHIFT ADDRESS
;4 TIMES TO GET
;IT T0 BITS 4-7
;OF NEXT INSTRUCTION

;CLEAR ADDRESS FIELD

;ADD ADDRESS TO INSTRUCTION
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;READ FROM IBUS REGISTER
;PUT "EXPECTED* IN RS
;PUT “FOUND” IN R4

:IS DATA CORRECT?
;BR IF YES
;:DATA ERROR
1SW09=1?
;INCREMENT PATTERN
: INCREMENT REGISTER ADDRESS
;LAST ADDRESS DONE?
;BR IF NO
:NEW SCOP1

;RESTART PATTERN T0 1
;RESTART AT ADDRESS 0
;sRESTART AT ADDRESS O

;CLEAR ADDRESS FIELD OF INSTRUCTION

SEQ 74

MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-35
CZDMC
OMC11 MICRO PROCESSOR IBUS TESTS

021024
021030
021032
021034
021036
021042
021044
021046
021050
021052
021054
021056
021062
0210€6
021070

050337
104414
021005
010005
116104
120504
001401
104005
104401
005200
005202
062703
022702
001353

021032

BIS

ROMCLK
7s:

000005

21005
MOV
MovB
CHPB

4%;

000020
000010

104400

SCOPE

R3,7s$

;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:READ FROM IBUS REGISTER
;PUT “EXPECTED"” IN RS

RO,RS

S(R1),R4

:PUT

RS,.R4
43
5

RO
R2
#20,R3
#7+1,R2
3

"FOUND” IN RS

:DATA CORRECT?
:BR IF YES
;DUAL ADDRESSING ERROR
;SW09=1?
;sINCREMENT PATTERN
:NEXT ADDRESS
:ADD 1 TO ADDRESS IN R3(SHIFTED 4 TIMES)

;LAST ADDRESS DONE?

;BR IF NO
:SCOPE THIS TEST

bbbt bbbbbbbbbkbkidhbbhhbdn

TEST

;#*MICRO PROCESSOR BR REGISTER TEST
s#FLOAT A 1 THROUGH THE BR
;#FLOAT A 0 THROUGH THE B8R
PRI

;
021072
021100
021106

012737
012737
012737

021114
021116

104412
012700

021122
021126

010061
104414

021122

021130

021132
021134
021136
021140
021144
021146
021150
021152
021154
021156
021160
021162
021170
021174
021176
021176
021202
021204
021206
021210
021212
021214

120500
104414
061225
010005
116104
120504
001401
104006
104401
000241
106100
001360
012737
012700
005100
010061
104414
120500
104414
061225
010005
116104

000051
021242
021122

001226
001216
001220

000001

TST51:

644
:

000004

000005

65%:

021176
000001

000004

001220
694:
67%:

stsskbkdidbbbbbdbbtbbbbsdss

Py Y

S Tt

IITTTIITIIY

7YY

TEST 51

MOV

#51,TSTNO

MoV

#64$,L0CK

MoV

MSTCLR
MOV

MOV
ROMCLK
120500
ROMCLK
061225
MOV
MovB
cMPB
BEQ
ENT
SCoP1
cLC
ROLB
BNE
MOV
MoV
coM
MoV
ROMCLK

#TST52 ,NEXT

#1,R0
RO,4(R1)

RO,R5
SCR1),R4
RS,R4
654
6

RO
644
#674,L0CK
#1,R0
RO

RO,4(R1)

120500

000005

S]1

ROMCLK
061225
MOV
MOvB

RO,R5
S(R1),R4

;R1 CONTAINS BASE DMC11 ADDRESS
:MASTER CLEAR DMCi1
;START PATTERN WITH BITO
;WRITE PATTERN IN PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE DATA TO THE BR REGISTER
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5204
:MOVE BR TO PORT S
;PUT “EXPECTED" IN RS

;PUT "FOUND” IN R4
:DATA CORRECT?
:BR IF YES
:DATA ERROR

:CLEAR CARRY
;SHIFT BIT IN RO
;sDONE IF RO=0
sNEW SCOPL
+START PATTERN WITH BITO
;CHANGE TO FLOATING ZERO

sWRITE PATTERN IN PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE DATA TO THE BR REGISTER
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORT S
sPUT “EXPECTED” IN RS
;PUT “FOUND” IN R4

CZDMC

SEQ

MACRO V04.00 27 JUN-85 13:16:37 PAGE 27 36

DMC11 MICRO PROCESSOR IBUS TESTS
021220
021222
021224
021226
021230
021232

021234
021236
42 021240

120504
001401
104006
104401
005100
000241

683 :

106100
001356
104400

cMPB
BEQ
EMT
SCoP1
com
CLC

ROLB
BNE
SCOPE

R5,R4
684
6

;DATA CORRECT?
;BR IF YES
;DATA ERROR

;CHANGE BACK TO A ONE
;CLEAR CARRY
;SHIFT BIT IN RO
;DONE IF RO=0
;SCOPE THIS TEST

RO
694

jhbkbdbkhbbb
bbb bbhbhkbhhdk
kbk

TEST

;#SCRATCH PAD TEST

;#FLOAT A

Rtskbshdbbdsbbbbdhbdbbhhbbd

THROUGH EACH SCRATCH PAD LOCATION

:*#FLOAT A O THROUGH EACH SCRATCH PAD LOCATION
sihbbkh

:
0c21242
021250
021256

012737
012737
012737

021264
021266
021270
021274
021302
021306
021312
021314

104412
005002
012700
042737
050237
010061
104414
123100

021316

021324
021330
021332
021334
021336
021340
021342
021346
021350
021352
021354
021356
021360
021362
021364
021372
021376

021400
021406
021412

021416
021420
021422
021430
021434

042737

050237
104414
040600
104414
061225
010005
116104
120504
001401
104007
104401
000241
106100
001344
012737
012700
005100

042737
050237
010061

104414
123100
042737
050237
104414

000052
021510
021274

000001
000017
021314
000004
-

000017

021332

001226
001216
001220

021314

021332

TSTS52:

64%:

65%:

66%:

000005

67%:

021300
000001

001220

000017
021420
000004

021420

000017
021436

021436

73%:
69:

70$:

kR kb bk kb hk kb

d kA kA bk kb

hah bk kh kAR bbb bbb ki bs

TEST 52

MOV
MOV
MOV
MSTCLR
CLR
MOV
BIC
BIS
Mov
ROMCLK
123100

BIC

8IS
ROMCLK
040600
ROMCLK
061225
MOV
MOVB
CMPB
8EQ
MY
SCOP1
CLC
ROLB
BNE
MoV
MOV
coM

BIC
8IS
MOV

kA bbb

ROMCLK
123100
BIC
8IS
ROMCLK

#52,TSTNO
#TST53 ,NEXT
#644$ ,1.0CK

;:R1 CONTAINS BASE DMC11i ADDRESS

R2
#1,R0O
817,654
R2,65$
RO,4(RY)

#17,66¢$

R2.66%

RO.RS
S(R1),R4
RS5,.R4
674
7
RO

644
9694 ,L0CK
#1.R0

RO
¢17,70¢
R2,70¢
RO,4(R1)

17,718
R2.71%

sMASTER CLEAR DMC11
;START AT ADDRESS ZERO
:START WITH BITO
;:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sWRITE PATTERN TO PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

sWRITE SCRATCH PAD(ADDRESS IN R2)

:CLEAR ADDRESS FIELD OF INSTRUCTION

:ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV SP TO BR
{NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:MOVE BR TO PORTS
:PUT "EXPECTED” IN RS
;:PUT “FOQUND” IN R4
+DATA CORRECT
;B8R IF YES
;DATA ERROR
;SW09=17?
;CLEAR CARRY
;SHIFT BIT IN RO
;:DONE IF RO=0
;NEW SCOP1
;START WITH BITO
;CHANGE TO FLOATING ZERO
sCLEAR ADDRESS FIELD OF INSTRUCTION
;:ADD ADDRESS TO INSTRUCTION
;WRITE PATTERN TO PORT4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;WRITE SCRATCH PAD(ADDRESS IN R2)
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

7
@

CZDMC

MACRO Vv04.00 27-JUN-85 13-16:37 PAGE 27-37

SEQ

DMC11 SCRATCH PAD TESTS
021436
021440
021442
021444

040600
104414
061225
010005

021454
021456
021460
021462
021464
021466
021470
021472
021476
021500
021504
a3 021506

001401
104007
104401
005100
000241
106100
001342
012700
005202
022702
001273
104400

021446
021452

116104
12CS504

71%:

000005

040600
ROMCLK
061225
MOV

MOov8
CcMPB8
72%:

000001

000020

BEQ
EMT
SCOP1
coM
CLC
ROLB
BNE
MOV
INC
cMP
BNE
SCOPE

;MOV SP T0 BR
;NEXT WORD IS INSTRUCTION,
;MOVE BR TO PORTS
;PUT “EXPECTED” IN RS

RO,RS

S(R1),R4
RS5,R4
724
7
RO
RO
734
#1,R0
R2
#20,R2
644

ROMCLK PC=5304

:PUT “FOUND” IN R4
;DATA CORRECT

;BR IF YES
;DATA ERROR
;SW09=17?
;CHANGE BACK TO A ONE
;CLEAR CARRY
;SHIFT BIT IN RO
:DONE IF RO=0
;RESTART AT BIT O
sNEXT SP ADDRESS
;LAST ADDRESS?
;:BR IF NO
:SCOPE THIS TEST

shbbb
kb bbbdb
dbkbbhhhbbhbhd

TEST

sassdbdbbbhbbhbdbsbbdbsoibts

;#SCRATCH PAD DUAL ADDRESSING TEST
;#WRITE AN INCREMENTING PATTERN IN ALL SP LOCATIONS
:#READ ALL SP LOCATIONS TO VERIFY CORRECT ADDRESSING
LI

;
021510
021516
021524

012737
012737
012737

021532
021534
021540
021542

104412
012700
005003
010302

021544
021552
021556
021562
021564
021566

021574
021600
021602
021604
021606

021610
021612
021616
021620
021622
021624
021626
021630
021632
021636

042737
050237
010061
104414
123100
042737

050237
104414
060600
104414
061225

010005
116104
120504
001401
104007
104401
005200
005203
022703
001341

000053
021732
021542

001226
001216
001220

TSTS3:

000001

000017
021564
000004

021564

000017

021602

1%:

2%:

3s:

000005

43 :
000020

TRy

IRt

IYYYY

TEST S3

MOV
MOV
MOV
MSTCLR
MOV
CLR
MOV

B8IC
BIS
MOV
ROMCLK
123100
8BIC

BIS
ROMCLK
60600
ROMCLK
61225

MOV
“OVB
cMPB8
BEQ
EMTY
SCOP1L
INC
INC
cHP
BNE

#53,TSTNO
#4TSTS4 ,NEXT
#14,L0CK

+R1 CONTAINS BASE DMC11 ADDRESS
#1,R0
R3
R3.R2

817,24
R2,24
RO,4(R1)
917,38

R2.3%

+MASTER CLEAR DMC11
;START WITH A 1
;ADDRESS 0
sMOVE ADDRESS TO R2

;CLEAR ADDRESS FIELD
;ADD ADDRESS TO INSTRUCTION
;WRITE PATTERN TO PORTA
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:WRITE SP(ADDRESS IN R2)
;:CLEAR ADDRESS FIELD OF INSTRUCTION

;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV SP TO BR
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV BR TO PORTS
;PUT “EXPECTED” IN RS
;PUT “FOUND* IN R4

RO,RS5
S(R1),.R4
RS5.R4
44
7

;DATA CORRECT?

RO
R3
#20,R3
1s

;sINCREMENT PATTERN
;NEXT ADDRESS
sLAST ADDRESS DONE?
;BR IF NO

;BR IF YES

;DATA ERROR
; SW09=0

7
a6

—

Sn—

——

e
e

RSSO
NI
W

GIIENEL
L

DrnRBNE
.

hed

SEQ 77

CZOMC
MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-38
OMC11 SCRATCH PAD TESTS
021640

012737

021646
021652
021654
021656
021664
021670
021672
021674
021676
021700
021702
021706
021710
021712
021714
021716
021720

012700
005003
010302
042737
050237
104414
060600
104414
061225
010005
116104
120504
001401
104007
104401
005200
005203

021726
47 021730

001352
104400

021722

022703

021654

001220

000017
021672

021672

000001

MOV

5¢:

64:

000005

7%:

000020

MOV
CLR
MOV
8IC
8IS
ROMCLK
60600
ROMCLK
61225
MoV
MOVB
cMPB
8EQ
EMT
SCoP1
INC
INC

CHMP

BNE
SCOPE

#5¢,L0CK

;NEW SCOP1

€1,.RO
R3
R3,R2
417,64
R2.64

RO,R5
5(R1),R4
R5,.R4
7%
7
RO
R3

420,R3
5

;:RESTART PATTERN AT 1
:RESTART AT ADDRESS ZERO
;PUT ADDRESS IN R2
:CLEAR ADDRESS FIELD OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV SP TO BR
;NEXT WORD TS INSTRUCTION, ROMCLK PC=5304
;MOV BR TO PORTS
;PUT "EXPECTED" IN RS
;PUT “FOUND* IN Ra
;OATA CORRECT?
:BR IF YES
;SP ADDRESSING ERROR
:SW09=17
s INCREMENT PATTERN
:NEXT ADDRESS

;LAST ADDRESS DONE?

:BR IF NO
:SCOPE THIS TEST

ishbbbbbdsbibbhbbbtbbhkinbhhds

TEST

sstststsdhkdssbsbdhsbhdsbhs

;«INTERRUPT TEST
;«TEST THAT DEVICE CAN INTERRUPT TO VECTOR A

FIARRRARARREIRAA AR AR

;
021732
021740

012737
012737

021746
021750

000005
005011

021752
021756
021760
021762

021764
021772
022000
022002
022004
022010
022012
022014
022016
022020
022024

004537
022020
022016
340

012737
012761
104414
121111
005037
000240
104010
000403
104011
012706
104400

000054
022026

001226
001216

TSTS4:

340
000340
000200

177776
000004

1$:

177776

001200

TEST 54

MOV
MOV
RESET
CLR

034642

2%:
38
4%:

RS ARRRAAABARSAAS
S SRR haARARRARARE
RRSRAE
RS

JSR
3
23
.BYTE

MOV
MOV
ROMCLK
121111
CLR
NOP
EMT
BR
EMT
MoV
SCoPE

054, TSTNO
#TSTS5,NEXT
(R1)
R5,SETVEC
340,340
9340,PS
9200,4(R1)
Ps
10
4%
11
#STACK,SP

sR1 CONTAINS BASE DMC11 ADDRESS
;BUS RESET
sCLEAR RUN

sSET UP VECTORS
1 XX0
s XX4
sLEVEL 7

;PS = LEVEL 7
;WRITE PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:SET BR RQ IN IBUS+ REG 1i
sALLOW INTERRUPT

:NO INTERRUPT
:WRONG VECTOR
sRESET STACK
sSCOPE THIS TEST

;6682000400008
04 0000080048508

TEST

ssbsstssdsssssssssssrsisssns

;sINTERRUPT TEST
;#TEST THAT DEVICE CAN INTERRUPT TO VECTOR B

$iRASAAEERERREEAAAAEAAREARAAARARARAAANEAREAS
0000 0000400044

SEQ 78

MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-39
czomc
OMC11 INTERRUPT TESTS

TEST SS

;

fommemmemmemnnn

022026
022034

012737
012737

022042
022044
022050
022052
022054
022056
022064
022072
022074
022076
022102

104412
004537
022110

022104
022106
022110

022112
022116

022112
340

012737
012761

104414
121111

000055
022120

340
000340
000300

177776

012706

001200

104400

TST55:

034642

005037
000240
104010
000403

104011

001226
001216

177776
000004

1%:

MoV
MoV

055, TSTNO
0TSTS6 ,NEXT

MSTCLR
JSR
24
3
.BYTE
MOV
HOV
ROMCLK
121111
CLR
NOP
EMT
BR
EMT
HOV
SCOPE

;R1 CONTAINS BASE DMC11i ADDRESS

RS,SETVEC

340,340
4340,PS
0300,4(R1)

PS
10
a3
11
#STACK,SP

;MASTER CLEAR DMC1}

;SET UP VECTORS

3 XXO
: XX4

sLEVEL 7
iPS = LEVEL 7
sWRITE PORTS
sNEXT WORD IS INSTRUCTION, ROMCLK PC»5304
;SET BR RQ IN IBUS# REG 11
sALLOW INTERRUPT

iNO INTERRUPT

sWRONG VECTOR
;RESET STACK
:SCOPE THIS TEST

jhbbsbbbtbdbbbibddbbsdkiiiss

TEST

ssskssssssssdsssddbtsdsdbss

:#PRIORITY INTERRUPT TESTS
;#SET PS TO ALL BR LEVELS EQUAL OR GREATER THAN
;#THE DMC11 LEVEL,VERIFY THAT DMC1i1 DOES NOT INTERRUPT

I I

TEST 56

I TR

Tryyyyrow

jomemeacmancean

022120
022126

012737
012737

022134
022136
022142
022146
022152
022154
022156
022160
022162
022166
022172

104412
012702

022174

022176
022200
022206
022210
022212
022216
022220
022222
022224
022230
022232

010237
013700
006200
006200
006200
006200
042700
004537
022234
022234
340
012761
104414
121111
010237
000240
020002

001403

162702

000770
104400

000056
022240

001226
001216

TST56:

000340
1771776
001366

177437
034642
340
000200

117776

000004

44:
Ss:

000040
1s:

MOV
MOV

MSTCLR
Mov
MOV
MOV
ASR
ASR
ASR
ASR
8IC
JSR
24
24
.BYTE
MoV
ROMCLK
121111
MOV
NOP
cHp
8EQ
SUB
BR
SCOPE

#56, TSTNO
#TSTS7,NEXT

#340,R2

R2,PS
STAT1.RO
RO

RO
RO
RO

#177437,
RO
R5,SETVEC
340,340
#200,4(R1)
R2,PS

RO,R2
14
#40,R2
S

sR1 CONTAINS BASE DMC11 ADDRESS
sMASTER CLEAR DMC11
;PUT LEVEL 7 IN R2
;SET PRIORITY TQ 7
1GET BR LEVEL OF DMC11i
sSHIFT RO 4 TIMES
:TO GET PROPER LEVEL

sCLEAR UNWANTED BITS
$SET UP VECTORS
sA VECTOR
18 VECTOR
tPRIORITY 7
:LOAD PORT4A
:NEXT WORD IS INSTRUCTION., ROMCLK PC=5304
+SET BR REQUEST
+PUT LEVEL IN R2 IN PS
315 PRESENT PS LEVEL = TO OMC LEVEL

:BR IF YES
iNO GET NEXT LOWER LEVEL IN R2
$AND CONTINUE WITH TEST

;SCOPE THIS TEST

SEQ 79

MACRO v04.00
27-JUN-85 13:16:37 PAGE 27-40
CzomMC
DMC11 INTERRUPT TESTS

022234
022236

104020
000002

2%:

13,

RT1

;ERROR UNEXPECTED INTERRUPT

$604808400048000s0dnsnsbtitss

TEST

sssssstasssasassnscssssssss

ssPRIORITY INTERRUPT TESTS
s¢SET PS TO ALL BR LEVELS LESS THAN THE DMC11 LEVEL

ssVERIFY THAT THE DMC11 WILL INTERRUPT

$:8880848440
080888885
0800
004 8048000050
8808
0000000000
4828
00004000
3

TEST 57

;s
022240
022246

012737
012737

022254
022256
022262
022266
0c2272
022274
022276
022300
022302
022306
022310
022314
022320
022322
022324
022326
022334
022336
022340
022344
022346
022350
022354
022356
022362
022364
022366
022372
022374
022376
022802

10442
012702
010237
013700
006200
006200
006200
006200
042700
010002
162702
004537
022366
022374
340
012761
104414
121111
010237
000240
104010
022702
001403
162702
000761
104400
012716
000002
104011
012716
000002

000057
022404

001226
00i216

T1ST57:

MoV
MOV

sR1 CONTAINS BASE OMCi1 ADDRESS
sMASTER CLEAR DMC11
:PUT LEVEL 7 IN R2
;SET PRIORITY TO 7
sGET BR LEVEL OF DMC11
;SHIFT RO 4 TIMES
:TO GET PROPER LEVEL

MSTCLR

000340
177776
001366

MOV
MOV
MOV

4340 ,R2
R2,PS
STAT1,RO

ASR

177437
000040
034642

340
000200

#57,TSTNO
4TST60 ,NEXT

000004

4s:

177776

5$:

000140

6%:

000040
1s:

022350

2%:
3s:

022350

ASR
ASR
ASR
8IC
MoV
SUB
JSR
2%
3
.BYTE
MoV
ROMCLK
121111
MOV
NOP
EMT
e
CEQ
SUB
BR
SCOPE
MOV
RTI
EMT

MoV

RTI

RO
RO
RO
€177437,R0
RO,R2
#40,R2
RS,SETVEC

;:CLEAR UNWANTED BITS
:PUT DMC LEVEL IN R2
;GET NEXT LOWER LEVEL IN R2
+SET UP VECTORS
:A VECTOR
;B VECTOR

340,340
4200,4(R1)

;PRIORITY 7
;LOAD PORTS
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;SET BR REQUEST

R2,PS

;PUT LEVEL IN R2 IN PS

10
4140,R2
13
940,R2
43

;ERROR, NO INTERRUPT

:IS IT DOWN TO LEVEL 3 YET?
s YES,DMC DID NOT INTERUPT, ERROR
;PUT NEXT LOWER LEVEL IN R2
sCONTINUE TEST
:SCOPE THIS TEST
;SET UP FOR RTI

063,(SP)
11

;ERROR, WRONG VECTOR
;SET UP FOR RTI

6$,(5P)

;8800 tsabbbbhbdntbbbsdbtsdd

:#NPR TEST
;#TEST OF DATO,

022404
022412

012737
012737

000060
022510

001226
001216

T5760:

LTy

;

TEST 60

MOV
MOV

TEST

sséstdtbdsdddsbbsbddsddtsns

1 WORD FROM UPROC TO 11 MEMORY

#60, TSTNO

aTST61 . NEXT

Tryrem

CoOMC
TMMACRO v04.0n
OMC11 NPR TESTS
022420
022422
022424
022430
022434
022436
022440
022442
022444
022450
022456
022460
022462
022464
022470

022474

022476

022500
022502
022504
022506

000005
005011
005061
004537
000000

177777
022506
022504
005037
012761
104414
121110
000240
012705
013704
020504
001401
104012
108400
000000
000000

SEQ 80

27-UN-85 13:16:37 PAGE 27-41

;R1 CONTAINS BASE DMC11 ADDRESS

RESET

CLR
CLR

000004
034664

022504
000021

JSR
0
1
Is
2
CLR
MOV
ROMCLK
683110

000008

177777
022504

MOV
MOV

43
:

2s:
3s:

cMP
BEQ
EMT
SCOPE
0

;:BUS RESET

(R1)
4(R1)

RS ,NPRSET

;CLEAR RUN
;CLR PORTA
;SET UP IBUS REG O 7
;IN DATA
;:0UT DATA
;IN BA

;OUT BA
;CLEAR 28

821,4(R1)

;WRITE PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sSET NPR BITS IN IBUS+ REG 11

#-1,R5
2% R4
RS ,R4
4
12

sPUT "EXPECTED' IN RS
sPUT "“FOUND” IN R4
;DATA CORRECT?
;BR IF YES
;ERROR NPR FAILED

;SCOPE THIS TEST
;0UT BA

;IN BA

jhbddabdsntabbbsnstdisitnihs

;#NPR TEST

;4TEST OF DATI,

TEST

sasssssbhbstdbbbbassstssssnst

1 WORD FROM 11 MEMORY TO UPROC

$108 404828 8 2808 840004004
btl it kbt
400
b bibahibibtb
0k
bhiiibks

:
022510

012737
012737

022524
022526

104412
005061
004537
000000
177777
022622
022620
012737
012761
104414
121110
000240
012705
104414
021004
104414
021025
016104
020504
001401
104012
104400
000000

022516

022532

022536
022540
022542
022544
022546
022554
022562
022564
022566
022570
022574
022576
022600
022602
022604
022610
022612
022614
022616
022620

000061
022624

001226
001216

TST61:

177777

MOV
MOV
MSTCLR

000004
034664

000001

TEST 61

022622
000004

1777717

000004

CLR
JSR
0
-1
33
2%
MOV
MOV
ROMCLK
agéllo

4(R1)
RS,NPRSET

MOV
ROMCLK
021004
ROMCLK
021025
MOV

¢-1,R5

CHMP

BEQ
4s:
2%:

961,TSTNO
975762 ,NEXT

EMT
SCOPE
0

0-1,38
41 ,4(R1)

4(R1),R4

RS5.R4
43

;R1 CONTAINS BASE DMC11 ADDRESS

;MASTER CLEAR DMC11i

;CLR PORT4
;SET UP IBUS REG 0 7
;IN DATA
;OUT DATA
;IN BA
;0UT BA
:PUT DATA IN 3%
;WRITE PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:SET NPR BITS IN IBUS& REG 11
;PUT "EXPECTED” IN RS
;sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
+MOVE IN DATA LOW BYTE TO PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;sMOVE IN DATA HIGH BYTE TO PORTS
;PUT "FOUND” IN R4

;DATA CORRECT?

;BR IF YES

;ERROR NPR FAILED
sSCOPE THIS TEST
;0UT BA

CZ0MC
MACRO V04.00
OMC11 NPR TESTS
56

022622

SEQ 81

27-JUN-85 13:16:37 PAGE 27-42

000000

3s:

:IN BA

;0848040500000 04000dbbdtdstd

;sNPR TEST

;¢TEST OF DATOB.
P

012737
012737

022640
022642
022646
022652
022654
022656
022660
022662
022666
022674
022676
022700
022702
022706
022712
022714
022716
022720

104412
005061
004537

022722
022724

000000

000062
022726

001226
001216

75T62:

177777

022724
022723
005037
012761
104414
121110
000240
012705
013704

020504
001401
104012
104400
000000
000000

022722
000221

MOV
MOV

YYrurreey

;MASTER CLEAR DMC11i
sCLR PORT4
;SET UP IBUS REG O 7
;IN DATA
;0UT DATA
;IN BA

sCLEAR 2
;WRITE PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;SET NPR BITS IN IBUSs REG 11

#177400,RS
2% R4
R5.R4
4

EMT

38,

;0UT BA
2
#221,4(R1)

MOV
MOV
cMp
BEQ

4(R1)
RS ,NPRSET

ROMCLK
&S%11o

177400
022722

1 BYTE FROM UPROC TO 11 MEMORY

:R1 CONTAINS BASE DMC11 ADDRESS

CLR
MOV

000004

sttssstbstnssssdossssbbbtas

962, TSTNO
#TST63,NEXT

MSTCLR
CLR
JSR
0
-1
3s
231

000004
034664

TEST 62

:
022624
022632

TEST

SCOPE
0
0

;PUT “EXPECTED” IN RS
;PUT “FOUND” IN R4
;DATA CORRECT?
sBR IF YES
;ERROR NPR FAILED

;SCOPE THIS TEST
;0UT BA
;IN BA

;688084040400

000000

bbdbtd

TEST

stdkksddbdsdbtinbbibbbbbshss

s#TEST OF EA BITS 16 AND 17
;#D0 A DATO TO AN ADDRESS USING OUT BA BITS 16 AND 17
;#VERIFY CORRECT RESULTS

022726
022734

012737
012737

022742
022744
022752
022760
022764
022766
022770
022772
022774
023002
023004

104412
013737
013737
004537
000000

000063
023064

001412
001412
034664

001226
001216

022772
022770

125252

000000
000000
012761
104414
121111

000014

TST63:

000004

2$:
1s:

TEST 63

MOV
MOV
MSTCLR
MoV
MOV
JSR
0
i25252
0
0
MOV
ROMCLK
121111

963, TSTNO
#TST64 ,NEXT

DMPO4, 1$
DMPO4,2$
R5,NPRSET

#14,4(R1)

TP YT PPEPEre

;R1 CONTAINS BASE DMC11 ADDRESS

sMASTER CLEAR DMC11
;USE SEL4 FOR ADDRESS
;USE SEL4 FOR ADDRESS
;sLOAD BA AND DATA
;IN DATA
;0UT DATA
:IN BA
;0UT BA
;LOAD SEL 4 WITH OUT BA16 AND 17
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;SET OUTBA 16 AND 17

CZDMC

MACRO VO4.00 27-JUN-85 13:16:37 PAGE 27 43

OMC11 NPR TESTS
023006
023014
023022
023026
023032
023034
023040
023042
023044

023046
023050
023054
023056
023060
023062

012761
012761
012711
052711
000240
012705
104414
021044
104414

021065
016104
020504
001401
104012
104400

000021
121110
003000
000400

000004
000006

MOV
MOV
MoV
BIS
NOP
MOV
ROMCLK
021044
ROMCLK

121110

000004

3s:

021065
MoV
cHp
BEQ
EMT
sCoPE

921,4(R1)
;LOAD SELA
€121110,6(R1)
;PUT INSTRUCTION IN SEL6
eBIT9!8IT10,(R1);SET CROMI AND CROMO!!
#8178, (R1)
;CLOCK IT!
:WAIT FOR NPR
#121110.R5
;PUT "EXPECTED” IN RS
;NEXT WORD IS INSTRUCTION,
;MOVE OUT DATA LB TO SEL4
;NEXT WORD IS INSTRUCTION,

4(R1),R4
R5.R4
3¢
12

sMOVE OUT DATA HB TO SELS
;PUT “FOUND" IN R4
;CORRECT RESULTS ?
;:BR IF YES
;ERROR BA 16 AND 17 FAILED
;SCOPE THIS TEST

ihbbhbhkbbbdbbbtndbbbdbhbdhss

TEST

ROMCLK PC=5304
ROMCLK PC=5304

ssdbtddsbhtdsdbsbsbbbbsddas

;#TEST OF EAR BITS 16 AND 17
:#D0 A DATI USING IN BA BITS 16 AND 17
;*VERIFY CORRECT RESULTS

:
023064
023072

012737
012737

023100
023102
023110
023116

104412
013737
013737
004537

023122

023124
023126
023130
023132
023140
023146
023152
023156
023160
023164
023166
023170
023172
023174
023200
023202
023204
023206

000000

125252
000000
000000
012761
012761
012711
052711
000240
012705
104414
021004
104414
021025
016104
020504
001401
104012
104400

000064
023210

001412
001412
034664

000015
121110
003000
000400

001226
001216

TST64:

MOV
MOV

2%:
1$:

121110

000004

3s:

LTy

YT T

rrwwrwre

TEST 64

MSTCLR
MOV
MOV
JSR

023130
023126

000004
000006

125252
0
0
MOV
MOV
MOV
BIS
NOP
MoV
ROMCLK
021004
ROMCLK
021025
MoV
cHp
BEQ
EMT
SCOPE

#64,TSTNO
ATST6S ,NEXT

;R1 CONTAINS BASE DMC11 ADDRESS

DMPO4,1$
DMP04,2¢
RS .NPRSET

;MASTER CLEAR DMC11
;USE SEL4 FOR ADDRESS
;USE SEL4 FOR ADDRESS
;LOAD BA AND DATA

;IN DATA

;0UT DATA
:IN BA
;0UT BA
;LOAD SEL4

#15,4(R1)
#121110,6(R1)
;PUT INSTRUCTION IN SEL6
#BIT9!BIT10,(R1);SET CROMI AND CROMO!!
#8178, (RL)
sCLOCK IT!
:WAIT FOR NPR
#121110,RS
;PUT "EXPECTED* IN RS
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE IN DATA LB TO SEL4
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;sMOVE IN DATA HB TO SELS
4(R1),R4
;PUT “FOUND* IN R4
R5,R4
sCORRECT RESULTS ?
33
:BR IF YES
12
;ERROR BA 16 AND 17 FAILED
;SCOPE THIS TEST

shkbbbddbibbnbbhbbdbhkhbbbit

TEST

sksbtsssbsdtbissdsdbtidodss

;&«NPR NON-EXISTENT MEMORY TEST
;2D0 A DATO TO A NON-EXISTENT ADDRESS
s&VERIFY THAT THE NON-EXISTENT BIT SET IN IBUS REG 1t

Q 82

CZOMC
MACRO V04.00
OMC11 NPR TESTS

SEQ 83

27-JUN-85 13:16:37 PAGE 27-44

3808008885080 82060

012737
012737

023224
023226

104412
004537

023232
023234
023236
023240
023242
023250
023252
023254
023262
023264
023266
023270
023272
023274
023300
023304
023310
023312
023314
0 023316

000000
000000
177320
177320
012761
104414
121111
012761
104414
121110
000240
104414
121225
012705
116104
042704
020504
001401
104012
104400

000065
023320

001226
001216

7TS5T65:

MOV
MOV
MSTCLR
JSR

034664

000014

000004

000021

000004

000001
000005
177776

1s:

ASAARA

kbbb bhbbA

TEST 65

;
023210
023216

A44SR ARSbAbAA RSk

0
0
177320
177320
MOV
ROMCLK
121111
MOV
ROMCLK
121110
NOP
ROMCLK
121225
MOV
HOVB
BIC
CHP
BEQ
EMT
SCOPE

065, TSTNO
#TST66 ,NEXT

:R1 CONTAINS BASE DMC11 ADDRESS

RS ,NPRSET

#14,4(R1)
#21,4(R1)

#1,RS
S(R1).R4
#177776,R4
R5.R4
14
12

:MASTER CLEAR DMC11
;LOAD IBUS REGISTERS 0-7

;IN DATA
;0UT DATA
;IN BA
;:OUT BA
:SET OUT BA BITS 16+17 IN PORTA
+NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:SET OUTBA 16 AND 17
:SET NPR REQUEST BITS IN PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOV IBUS* 4 TO IBUS* 10

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sMOV IBUS#11 TO IBUS*S
;:PUT “EXPECTED” IN RS
;PUT "FOUND” IN R4
;CLEAR UNWANTED BITS
;+DATA CORRECT?
;BR IF YES
;ERROR NON-EXISTENT MEM BIT FAILED TO SET
;SCOPE THIS TEST

it kkdbd bbbkt bbddbhhkbhhbthshk

TEST

kkdhhdkhrkddbhdbhdbhbbbbhhhs

;#NPR NON-EXISTENT MEMORY TEST
:%D0 A DATI FROM A NON-EXISTENT ADDRESS
;&VERIFY THAT THE NON-EXISTENT BIT SET IN IBUS REG 11

sitkkbbh
bbb bk bbbk
bbdb
bk hbhh kb
kbdh
r bk k bk kb kb kib
hkbdhdhk ik

;
023320
023326

012737
012737

023334
023336
023342
023344
023346
023350
023352

104412
004537
000000
000000
177320
177320
005061

023360
023362
023370
023372

121111
012761
104414
121110

023400

121225

023356

023374
023376

104414

000240
104414

000066
023426

001226
001216

MOV
MOV
MSTCLR
JSR
0
0
177320
177320
CLR

034664

000004
000015

TST66:

TEST 66

ROMCLK

000004

121111
MOV
ROMCLK
121110

NOP
ROMCLK

121225

£66, TSTNO
€TST67 ,NEXT

;R1 CONTAINS BASE DMC11 ADDRESS

RS ,NPRSET

4(R1)
#15,4(R1)

sMASTER CLEAR DMC11
;LOAD IBUS REGISTERS 0-7
sIN DATA
;0UT DATA
;:IN BA
;0UT BA

sNEXT WORD IS INSTRUCTION,

ROMCLK PC=5304

sNEXT WORD IS INSTRUCTION,
;MOV IBUSa11 TO IBUSs5S

ROMCLK PC=5304

;CLEAR NON-EXISTENT BIT
;SET NPR REQUEST BITS IN PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOV IBUS4 4 10O IBUS* 10

MACRO v04.00
C20MC
OMC11 NPR TESTS

27-JUN-85

023402
023406
023412
023416
023420
023422

000001
000005
177776

023424

012705
116108
042704
020504
001401
104012

SEQ 84

13:16:37 PAGE 27-45

104400

18:

MOV
MOVB
8IC
cHp
BEQ
EMT

SCOPE

1,R5
5(R1),R4
#177776,R4
R5,R4
1s
12

;PUT "EXPECTED” IN RS
;PUT “FOUND' IN R4
:CLEAR UNWANTED BITS
;DATA CORRECT?
;BR IF YES
;ERROR NON-EXISTENT MEM BIT FAILED TO SET

:SCOPE THIS TEST

jhdbbkbdbadbbhbbbhibbbbhbbis

TEST

sbdbhbkbbbbbhtbsbbbbbbbadds

;&NPR TEST
;%USING DATO, NPR A BINARY COUNT (0-377 )

;#FROM MICRO-PROCESSOR TO ALL AVAILABLE MEMORY
sobhbbdbbhhbdhbh bk

:
023426
023434
023442

012737
012737
012737

023450
023452
023456
023460
023464
023464
023470
023474
023500
023502
023506
023512
023514
023516
023520
023522
023524
023532,
023534
023536
023540
023542
023544
023546
023550
023552
023554
023556
023562
023566
023570
023572
023574
023576
023602
023604

104412
005037
005000
012702
010037
010237
032702
001402
000337
004537
000000
000000
000000
000000
105012
012761
104414
121110
000240
010005
111204
120504
001401
104021
104401
005200
042700
005737
001402
005700
001412
005202
023702
001330
012702

000067
000003
023624

001226
001222
001216

TST67:

023622
036566

1s:

023514
023520
000001

023514
034664
2s:
44:
000221

000004

3s:
177400
023622

001304
036566

6%:

bbbk bbbk

ki kb h kb

kb kb kb b khkk k4

TEST 67

MOV
MoV
MOV

MSTCLR
CLR
CLR
MoV
MOV
MoV
BIT
BEQ
SWAB
JSR
0
0
0
0
CLR8
MOV
ROMCLK
121110
NOP
MOV
MOVB
cHPB
8EQ
EMT
SCOP1
INC
8IC
75T
BEQ
157
BEQ
INC
cHP
BNE
MoV

#67,TSTNO
43, ICOUNT
#TST70,NEXT

5
RO
#CORMAX, R2
RO,2¢
R2,4%
#BIT0,R2
.+6
2%
RS ,NPRSET

(R2)
#221,4(R1)

RO,R5
(R2),R4
RS.R4
3s
21
RO
#177400,R0
53
6%
RO
7%
R2
MEMLIM,R2
13
#CORMAX, R2

;R1 CONTAINS BASE DMC11 ADDRESS
;MASTER CLEAR DMC11
;START FLAG AT 0
;DATA
; ADDRESS

;LOAD DATA
;LOAD BA
;IS BA ODD?
:BR IF NO
:IF ODD PUT DATA IN HI-BYTE
;LOAD NPR REGISTERS
:IN DATA
;0UT DATA
:IN BA
;0UT BA
;CLEAR MEMORY LOCATION
;LOAD PORT4
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;DO THE NPR
:PUT “EXPECTED“ IN RS
;PUT “FOUND” IN R4
;IS DATA CORRECT?
:BR IF YES
;ERROR, DATA INCORRECT
'
sNEXT CHARACTER
;USE ONLY LOW BYTE
;HAS MAX MEMORY BEEN REACHED YET?
;BR IF NO
;O0NE PATTERN?
;BR IF YES
;INC BA
;REACHED MEMORY LIMIT YET?
;B8R IF NOT
;RESTART BA AT FIRST ADDRESS

cZoMC
MACRO VO4.00
OMC11 NPR TESTS
023610
023616
023620
023622

012737
000722
104400
000000

SEQ 85

27-UUN-85 13:16:37 PAGE 27-46

177777

023622

Hov

7%:

#-1,5%

BR 13
SCOPE

;SET FLAG TO END TEST AT END OF

DATA PATTERN

s CONTINUVE
;SCOPE THIS TEST

i THIS LOCATION IS A FLAG,

IT STARTS AT O,

;AND IS SET TO -1 WHEN LAST MEMORY ADDRESS
;IS USED, TEST IS THEN ENDED WHEN PATTERN IS FINISHED

;hsbstbbbbbbdbbbbbdtbbbhbssd

TEST

sesstbibssbtstbstbbsbrbsbbs

:s«MAIN MEMORY TEST
;#FLOAT A 1 THROUGH ALL MAIN MEMORY LOCATIONS
RIS

012737
012737
012737

023646
023650
023652
023656
023664
023670
023672
023674
023700
023702
023704
023706
023710
023712
023714
023716
023722
023724
023726
023730
023732
023734
023736
023740
023742
023746
023750

104412
005002
012700
042737
050237
104414
010000
010061
104414

122500
104414
040620
104414
061225
010005
116104
120504
001401
104013
104401
000241
106100
001347
005202
022702
001341
104400

000070
023752
023656

000001
000377
023672

001226
001216
001220

023672

7S170:

1¢:

65%:

66%:

000004

000005

67%:

MOV
MOV
MOV
MSTCLR
CLR
MOV
BIC
8IS
ROMCLK
010000
MOV
ROMCLK
122500
ROMCLK
040620
ROMCLK
61225
MoV
MovB
cMPB
BEQ
EMT

sCoP1

CcLC

ROLB
8NE
INC
CHP
BNE
SCOPE

000400

2 Ry

TP PPN

TEST 70

;
023624
023632
023640

€70, TSTNO
#TST71 ,NEXT
965%,L0CK

;R1 CONTAINS BASE DMC1i ADDRESS

;MASTER CLEAR DMC11
;START WITH ADDRESS 0
sSTART WITH BIT 0O
;:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:LOAD MAR WITH ADDRESS IN R2
;WRITE PATTERN IN PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE PORT4 TO MEMORY
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE MEMORY TO BR
;NEXT WORD IS INSTRUCTION, .OMCLK PC=5304
;MOVE BR TO PORTS
;PUT "EXPECTED” IN RS
;PUT “FOUND” IN R4
+DATA CORRECT?
:BR IF YES
:DATA ERROR

R2
@1.RO
9377,66%
R2,66%

RO,4(R1)

RO,RS
S(R1),R4
R5,R4
674
13

:SW09=17?

;CLEAR CARRY

RO
65%
R2
4400 ,R2
1%

:SHIFT BIT IN RO
;:DONE IF RO=0
:NEXT ADDRESS
:LAST ADDRESS
:BR IF NO
:SCOPE THIS TEST

i hbbdbdbbbbhhhibthsibbbbbbds

TEST

skssdddidbbhrbidbdddbddbsdbn

:sMAIN MEMORY TEST

;«FLOAT A O THROUGH ALL MAIN MEMORY LOCATIONS
R

LI TP R

TEST 71

...............

023752
023760

012737
012737

000071
024104

001226
001216
-

TST71:

MO
MOV

971,TSTNO
#TST72 ,NEXT

SEQ 86

czomc
MACRO v04.C0
27-LUN-85 13:16:37 PAGE 27-47
OMC11 MAIN MEMORY TESTS

023766

012737

023774
023776
024000
024004
024006
024014
024020
024022
024024
024030
024032
024034
024036
024040
024042
024044
024046
024052
024054
024056
024060
024062
024064
024066
024070
024072

104412
005002
012700
005100
042737
050237
104414

024074
024100
024102

010000
010061
104414
122500
104414
040620
104414

061225
010005
116104

120504

024006

001220

000001

000377

024022

1s:
64%:
65¢:

66%;

000004

000005

001401
104013
104401
005100

000241
106100
001345
005202
022702
001337
104400

MOV

67%:

MSTCLR
CLR
MOV
com
8IC
8IS
ROMCLK
010000
MoV
ROMCLK
122500
ROMCLK
040620
ROMCLK
61225
MOV
MOvB

iR1 CONTAINS BASE DMC11 ADDRESS

R2
#1,R0
RO
#377,66%
R2.66$

RO,4(R1)

sMASTER CLEAR DMC11
:START WITH ADDRESS 0
:START WITH BIT ©
:CHANGE TO FLOATING 0
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:LOAD MAR WITH ADDRESS IN R2
:WRITE PATTERN IN PORT4
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOVE PORT4 TO MEMORY
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE MEMORY TO BR
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORTS
;PUT “EXPrCTED” IN RS
:PUT "FOUND”" IN R4

CMPB
BEQ
EMT

RO,RS
S(R1),R4
R5,R4
67¢
13

COM

:CHANGE TO FLOATING 1

ROLB
BNE
INC

RO
64
R2

;SHIFT BIT IN RO
;:DONE IF RO=0
sNEXT ADDRESS

BNE
SCOPE

SCOoP1

CcLC

CMP

000400

9654 .L0CK

:DATA CORRECT?
:BR IF YES
;:DATA ERROR

;SW09=1?

;:CLEAR CARRY

€400 ,.R2

;sLAST ADDRESS

:BR IF NO
;SCOPE THIS TEST

ihdbsbbdbbbbbbbbbhitkihtbnkd

TEST

tssdssdbbkbbbhbdbsbddbnidsd

;*MAIN MEMORY DUAL ADDRESSING TEST
;#LOAD EACH MEMORY LOCATION WITH ITS OWN ADDRESS
;#READ BACK EACH LOCATION TO VERIFY CORRECT ADDRESSING

024104
024112
024120

012737
012737
012737

024126
024130
024132
024140
024144
024146
024150
024154
024156
024160
024162
024164

104412
005002
042737
050237
104414
0100C0
010261
104414
122500
104414
040620
104414

000072
024304
024132

001226
001216
001220

15772

MOV
MOV
MoV

#72,TSTNO
@TST73 ,NEXT
#14,L0CK

MSTCLR

000377
024146
000004

024146

1¢:

2%:

CLR
8IC
BIS
ROMCLK

010000
MOV
ROMCLK
122500
ROMCLK
040620
ROMCLK

R2
#377,2%
R2,2$

T YT PrTPYT

:R1 CONTAINS BASE DMC11i ADDRESS

:MASTER CLEAR DMC11

:START AT ADDRESS 0
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR

R2.4(R1)

:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE PORT4 TO MEMORY
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sMOVE MEMORY TO THE BR
sNEXT WORD IS INSTRUCTION,

ROMCLK PC=5304

SEQ 87

czomc
MACRO V04 .70
27-JUN-85 13:16:37 PAGE 27 48
OMC11 MAIN MEMORY TESTS

024166
024170
024172
024176
024200
024202
024204
024206
024210
024214
024216
024224
024226
024234
024240
024242
024244
024246
024250
024252
024254
024256
024262
024264
024266
024270
024272
024274
024300
024302

061225
010205
116104
120504

000005

001401

104013
104401
005202
022702
001346
012737
005002
042737
050237
104414
010000
104414
040620
104414
061225
010205
116104
120504
001401
104013
104401
005202
022702
001352
104400

3s:
000400

024226

001220

000377
024242

024242

4%
:

S$:

000005

61225
MoV
Move
CcHMPB
BEQ
EMT
SCOP1L
INC
CcHp
BNE
MOV

CLR
8IC
8IS

ROMCLK
010000
ROMCLK
040620
ROMCLK
61225
MOV
Move

CMPB

64%:

000400

BEQ
EMT
SCoP1
INC
cHp

BNE
SCOPE

R2,R5

S(R1).R4
R5,R4
34
13
R2
#400,R2
1s
#44,0L0CK

R2
#377.5%
R2,5¢

;MOV BR TO PORTS
;:PUT “EXPECTED” IN RS
;PUT "FOUND” IN R4
;:DATA CORRECT?
;BR IF YES
;DATA ERROR

:SW09=17?

sNEXT ADDRESS
;LAST ADDRESS
:BR IF NO
;NEW SCOPE 1
;+RESTART AT ADDRESS 0
;:CLEAR ADDRESS FIELD OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD THE MAR
;NEXT WORD IS INSTRUCTION,

R2,R5
5(R1),R4
R5,R4
64
13
R2
#400,R2
44

;MOVE MEMORY TO THE BR
;NEXT WORD IS INSTRUCTION,
;:MOV BR TO PORTS
;PUT "EXPECTED” IN RS

:PUT

“FOUND” IN R4

;SWO09=17?

:NEXT ADDRESS
;IS IT THE LAST
;B8R IF NO
;SCOPE THIS TEST
TEST

;#MAR TEST
; #PERFORM DUAL ADDRESSING TEST
;«USING MAR AUTO-INC FEATURE

012737
012737

024320
024322
024324
024326
024330
024336
024340
024342
024344
024350
024352
024354
024356
024362

104412
005002
104414
010000
032737
001402

000073
024440

100000

001226
001216

TST73:

104414

004000
010261
104414
136500
005202
022702
001370

000400

1¢:

sbbsbkdkdbbbbbbbdhbdbbtohbddss

LT R Ty
PP T T
I
I
Ty ryw

;

TEST 73

MOV
MOV

#73,TSTNG
STST74 ,NEXT
R2

81T
BEQ
ROMCLK

#B8IT15,STATL
.+6

MOV
ROMCLK
136500
INC

R2.,4(R1)
R2

BNE

4000

000004

MSTCLR
CLR
ROMCLK
010000

001366

ROMCLK PC=5304

;DATA CORRECT?
:BR IF YES
; ADDRESSING ERROR

ihdhhbbbkdbbbdhk
bbb hkhkhhbhhk
h

024304
024312

ROMCLK PC=5304

CcMP

#400,R2

;R1 CONTAINS BASE DMC11 ADDRESS
sMASTER CLEAR DMC11
sSTART WITH A ZERO

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR

;0MC?
;BR IF YES
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MAR HI _ 0 (KMC ONLY)
;WRITE DATA TO PORT4

:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MEM AUTO-INC MAR
; INCREMENT DATA
;DONE YET?
;BR IF NO

SEQ 88

MACRO V04.00
27-JUN-85 13:16:37 PAGE 27-49
CZ0oMC
DMC11 MAIN MEMORY TESTS

024364
024366
024370

024372
024400
024402
024404
024406
024406
024410
024412
024414
024420
024422
024424
024426
024430
024434
024436

005002
104414
010000
032737
001402
104414
004000

104414
055224
010205
016104
120504
001401
104014
005202
022702
001364
104400

100000

CLR
ROMCLK
010000
8IT
BEQ
ROMCLK
4000

001366

#BIT1S5,STATL
.+6

;MAR HI

2%:
ROMCLK

055224

MOV
MOV

000004

000400

CHPB
BEQ
EMT
INC

CHP
BNE
SCOPE

;RESTART WITH A ZERO
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;OMC?
;BR IF YES
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
_ O

(KMC ONLY)

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE MEM TO PORT4

R2,R5

4(R1),R4
R5,R4
34
14
R2
#400,R2

;PUT

“EXPECTED” IN RS

;PUT “FOUND” IN R4
;DATA CORRECT?
:BR IF YES
;MAR ERROR
;NEXT ADDRESS
;DONE YET?

;BR IF NO

;SCOPE THIS TEST

ihtbk
bbbt
kdbhb
bbhbbhbdhbh
b
ik

TEST

shbsbsbhbdbbhbtsbbbhbhbbdbds

;#ALU C BIT TEST
;#TEST THAT AN ADD OF 377 AND 377 WILL SET THE C BIT
L

:
024440
024446
024454

012737
012737
012737

024462
024464
024470
024472
024476
024500
024500
024502
024504
024506
024510
024512
024514
024516
024520
024524
024530
024532
024534
024536
024540

104412
004737
024542
004737
024542

024542
024545

024550

| [ V—

104414
010000
104414
054400
104414
040421
104414
061224
012705
016104
120504
001401
104015
104401
104400
377
000
000

000074
024552
024500

001226
001216
001220

TST74:

034726
034762
1%:

000001
000004

2%:
000
000
000

000
000

TDATA:

.EVEN

Y rvvpy

TEST 74

MoV
MOV
MOV

MSTCLR
JSR
TDATA
JSR
TDATA

474, TSTNO
#TST75 ,NEXT
914,L0CK

:R1 CONTAINS BASE DMC11 ADDRESS

PC,MEMLD
PC,.SPLD

sMASTER CLEAR DMC11

;LOAD MAINMEM DATA
;:POINTER 7O DATA
:LOAD SP DATA
;POINTER TO DATA

ROMCLK
::EgTOHORD IS INSTRUCTION,
010000
iMAR _
ROMCLK
sNEXT WORD IS INSTRUCTION,
054400!<0420>
:ADD 377 AND 377, TO SET C
ROMCLK
sNEXT WORD IS INSTRUCTION,
040401 ¢<1420>
;ADD 0 AND O AND THE C BIT
ROMCLK
;NEXT WORD IS INSTRUCTION,
61224
;PUT RESULTS IN PORT4
MOV
#1,R5
;PUT "EXPECTED" IN RS
MOV
4(R1),R4
;PUT "FOUND" IN R4
cMPe
RS,R4
;DATA CORRECT?
8EQ
2%
;BR IF YES
EMT
15
;ERROR C BIT NOT SET
SCoP1
;SW09=1?
5COPE
:SCOPE THIS TEST
.8ytr¢
-1,0,0,0,0,0,0,0

ROMCLK PC=5304

ROMCLK PC=5304
BIT

ROMCLK PC=5304

C2OMC
MACRO V04.00
DMC11 ALU TESTS

SEQ 89

27-JUN-85 13:16:37 PAGE 27-50

73
5846
k0 000tk
4600
bktbbbdbtttt

TEST

s4sstsddsstsbbddbdbsbabtnss

;sALU TEST
s»TEST OF ALU FUNCTION SEL B WITH C BIT CLEARED
;&ALU FUNCTION (8)
CODE=11
;4L 0AD MAIN MEM AND SP WITH 8 WORDS OF DATA

;#PERFORM THE FUNCTION,
0k

;
024552
024560
024566

012737
012737
012737

024574
024576
024600
024604
024610

104412
005000
012702
004737
035052

024612
024616
024620

024624
024632
024636
024640

042737
050037
104414
010000

024650
024654
024656
024660
024662
024664
024666
024672
024674
024676
024700
024702
024704
024706
024712
024714
024716
024721

050037
104414
040620
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
000
377

024642

024724
74

004737
035062
004737

042737

125

000075
024726
024620

001226
001216
001220

TST75:

034762

035026
000017
024640

024640

000017

024656

1¢:

2%:

3s:

000004

4s:

000010
3
125

252

MOV
MOV
MOV

000
252

5%:

JSR
SPDAT
JSR

BIC
BIS
ROMCLK
010000

B8IC

VERIFY

THE RESULTS

AR AR ARAAARRAAR AR AR

bbb didtthdRbbbbdbbnittns

TEST 715

MSTCLR
CLR
MOV
JSR
MEMDAT

024716
034726

024656

R A

#75,TSTNO
415776 ,NEXT
£18,L0CK
RO
45%,R2
PC,MEMLD
PC,SPLD

PC,CLRC
017,28
RO,2$

217,3¢

;R1 CONTAINS BASE DMC11 ADDRESS
;MASTER CLEAR DMC11t
;MEM + SP ADDRESS
sPOINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;CLEAR C BIT!

;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR

sCLEAR ADDRESS OF INSTRUCTION

8IS
RO,3$
;ADD ADDRESS TG INSTRUCTION
ROMCLK
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
040400!<11220>
;BR _ SEL B
ROMCLK
sNEXT WORD IS INSTRUCIION, ROMCLK PC=5304
61224
sMOVE BR TO PORT4
MOV
(R2).RS
;PUT “EXPECTED* IN RS
nove
4(R1),R4
:PUT *FOUND* IN R4
CMP8
R5,R4
;OATA CORRECT?
BEQ
44
;B8R IF YES
EM7
15
;sALU ERROR
SCOP1
;SW09=1?
INC
R2
sNEXT DATA
INC
RO
;:NEXT ADDRESS
cMe
#10,.R0
;DONE YET?
BNE
14
;BR IF NO
SCOPE
;SCOPE THIS TEST
.BYTE
0,-1,0,-1,125,252,125,252

.EVEN

shdbbbbbbdbhdbdisdhdbitbbbans

TEST

s4tsbststtsssdddsssidssssss

;#ALU TEST
s#TEST OF ALU FUNCTION SEL A WITH C BIT CLEARED
s#ALU FUNCTION (R)
CODE=10
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;SPERFORM THE FUNCTION, VERIFY THE RESULTS

MACRO V04.00
cZpnc
OMC11 ALU TESTS

SEQ 90

27-JUN-85 13:16:37 PAGE 27-51

;1888888568858

448884002 005445080440 842 0540000200088 0080004000000

TEST 76

;
024726
024734
024742

012737
012737
012737

024750
024752
0247354
024760
024764
024766
024772
024774
025000
0235006
023012
025014

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000

025016
025024

025030
025032

025034
025036
025040
025042
025046
025050
0235052
025054
025056
025060

025062
025066
025070
025072

025075
025100

042737
050037

104414
040600
104414
061224
111205
116104
120504
001401
104015

104401
005202
005200

022700
001342
104400
000

377
252

000076
025102
024774

001226
001216
001220

T1ST76:

025072
034726
034762
035026
000017
025014

000017
025032

025014

025032

1s:

2%:

3¢:

000004

4%:
000010

000
125
252

377
125

S%:

MOV
MOV
MoV

#76,TSTNO
#TST77 ,NEXT
41%,L0CK

:R1 CONTAINS BASE DMC11 ADDRESS

MSTCLR
CLR
RO
MOV
#54,R2
JSR
PC,MEMLD
MEMOAT
JSR
PC,SPLD
SPDAT
JSR
PC,CLRC
8IC
17,24
8IS
RO,24
ROMCLK
010000
8IC
917,3%
8IS
RO,3$
ROMCLK
040400!<10%20>
ROMCLK
61224
Move
(R2),R5

;:MASTER CLEAR DMC11i
:MEM + SP ADDRESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;:CLEAR C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
sADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:BR _ SEL A
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOVE BR TO PORT4
;PUT “EXPECTED” IN RS

CcHMPB

;DATA
" CORRECT?

MOve

4(R1),R4

BEQ
EMT
SCoPt
INC
INC
cMp
BNE
SCOPE
.8YTe

44
15

RS,R4

;PUT “FOUND” IN R4

:BR IF YES
;ALU ERROR
;SW09=1?
R2
sNEXT DATA
RO
:NEXT ADDRESS
#10,R0
;:DONE YET?
14
:BR IF NO
:SCOPE THIS TEST
0,0,-1,-1,125,125,252,252

.EVEN

ihba bbb bbbt bbdbshbtbsbststs

TEST

ssstssssssssssssssssisdssss

ssALU TEST
;»TEST OF ALU FUNCTION A OR NOTB WITH C BIT CLEARED
s#ALU FUNCTION (A OR NOTB)
CODE=12
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
s#PERFORM THE FUNCTION, VERIFY THE RESULTS

FIRSERARRANARRSARAAARERAMARARAAAA00A00004
05000000000 0004004040

;
025102

0235110
025116

012737

012737
012737

000077

025256
025150

001226

001216
001220

71ST77:

TEST 77

MOV

077.1STNO

MOV

013,L0CK

HOV

0TST100, NEXT

1R1 CONTAINS BASE DMC11 ADDRESS

CZDMC

MACRO VO4.00 27-JUN-85 13:16:37 PAGE 27-S2

SEQ

OMC11 ALV TESTS
025124

025126
023130
025134
0235140
025142
023146
025150
025154
0235162
025166
025170
023172
025200
025204
025206
025210
025212

025214
025216
025222
025224
025226
025230
025232
025234
025236
025242
023244
025246
025251
025254

104412

005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040640
104414
061224

111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
377
377
252

MSTCLR

025246
034726
034762
035026
000017
025170

000017
025206

025170

025206

1s%:

2%:

3%:

HMOvB
MOVB
CMP8

000004

4%:
000010

000
377
377

CLR
RO
MOV
@54 ,R2
JSR
PC ,MEMLD
MEMDAT
JSR
FC.SPLD
SPOAT
JSR
PC,CLRC
8IC
017,24
BIS
RO,2%
ROMCLK
010000
BIC
217,33
8IS
RO,33
ROMCLK
040400!<12+20>
ROMCLK
61224

377
125

5%:

BEQ
EMY
scoP1
INC
INC
cMP
BNE
SCOPE
.BYTe

(R2),R5
4(R1),.R4
R5.R4
43
15

;MASTER CLEAR DMC11

;:MEM + SP ADDRESS
;:POINTER TO CORRECT DATA
:LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;:LOAD 8 WORDS OF SP
;:POINTER TO DATA
:CLEAR C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:LOAD MAR
:CLEAR ADDRESS OF INSTRUCTION
;:ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;BR _ A OR NOTB
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORT4

1PUT “EXPECTED* IN RS
;PUT *FOUND* IN R4
;:DATA CORRECT?

:BR IF YES
:ALU ERROR
+SW09=1?
R2
sNEXT DATA
RO
sNEXT ADDRESS
#10,R0
sDONE YET?
13
sBR IF NO
sSCOPE THIS TEST
-1,0,-1,-1,-1,125,252,-1

.EVEN

400 ubbdbstshssbbdsstdtsdss

;oALU TEST

TEST

100

soessesssssssssstsstssststs

:»TFST OF ALU FUNCTION A AND B WITH C BIT CLEARED

s8ALU FUNCTIOM (A AND B)
CODE=13
ssLOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
s#PERFORM THE FUNCTION, VERIFY THE RESULTS

$: 088884848848 8088 040484845408 408840480808480448828088485800800804

TEST 100

s+
'

025236
025264
025272

012737
012737
012737

025300
025302
025304
025310
025314
025316
025322
025324

104412
005000
012702
004737
035052
004737
035062
004737

000100
025432
025324

001226
001216
001220

TST100: MOV
nov
MOV

025422

034726

034762
035026

--------------

1%:

MSTCLR
CLR
MoV
JSR
MEMDAT
JSR
SPDAT
JSR

4100, TSTNO
#7ST101, NEXT
#14,L0CK

sR1 CONTAINS BASE DMC1i ADDRESS

RO
#58,R2
PC.MEMLD
PC,SPLD
PC.CLRC

tMASTER CLEAR DMC11
sMEM + SP ADDRESS
sPOINTER TO CORRECT DATA
1LOAD 8 WORDS OF MAIN MEMORY
sPOINTER T0O DATA
sLOAD 8 WORDS OF SP
;POINTER TO DATA
sCLEAR C BIT!

9
9

HMACRO v04.00
C2omC
DMCiL Av TESTS

27-U1TMN-85

025330
025336
025342
025344
025346
025354
025360
025362
025364
025366
025370
025372
025376
025400
025402
025404
025406
025410
025412
0c5416
025420
025422
025425
025430

000017
025344

025344

000017
025362

025362

042737

050037
104414
010000
042737
050037
104414
040660
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
000
377
000

2%:

3s:

000004

BIC
8IS
ROMCLK
010000

917,2¢
RO,2$

815

RO,3s$

8IC

CcMPB

8EQ
EMT
SCOP1
INC
INC

CHpP

000010

000
000

S5s:

;:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:LOAD MAR

817,38

;CLEAR ADDRESS OF INSTRUCTION

sAOD ADDRESS TO INSTRUCTION

ROMCLK
040400 <13+20>
ROMCLK
61224
MOVB
(R2),RS

Hove

4s:

000
125
252

SEQ 92

13:16:37 PAGE 27 53

BNE
SCOPE
.ByTe

;NEXT WORD IS INSTRUCTION,
:BR _ A AND B
;NEXT WORD IS INSTRUCTION,
;MOVE BR TO PORT4
sPUT "EXPECTED” IN RS

4(R1),R4

;PUT

R5,R4

"FOUND”

ROMCLK PC=5304
ROMCLK PC=5304

IN R4

:DATA CORRECT?

43
15

;BR IF YES
;ALU ERROR
:SW09=1?
:NEXT DATA
sNEXT ADDRESS

R2
RO

210,.R0

;DONE YET?

;BR IF NO
;SCOPE THIS TEST
0,0,0,-1,125,0,0,252

.EVEN

shisb

bbbt bbdbbhibibihbsis

TEST

101

sdsbdsdsbbstibbibbbibsnbtas

;#ALU TEST
;#TEST OF ALU FUNCTION A OR 8 WITH C BIT CLEARED
;#ALU FUNCTION (A OR B)
CODE=14
:#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS
0080400040040

;
025432
025440
025446

012737
012737
012737

025454
025456
025460
025464
025470
025472
025476
025500
025504
025512
025516
025520
025522
025530
025534
025536

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040700

000101
025606
025500

001226
001216
001220

TST101:

000017
025536

MOV
MOV
MOV

JSR

MEMDAT

034762

035026
000017
025520

TEST 101

MSTCLR
CLR
MOV

025576
034726

025520

025536

1s:

JSR
SPDAT

JSR

8IC
8IS

2s:

Is:

00002 8040000044400 04000 004000 0titdRbitdidiRathdd

ROMCLK
010000

0101,TSTNO
8TST102,NEXT
#1%,L0CK

;R1 CONTAINS BASE DMC1i1 ADDRESS

RO
@54 ,R2
PC,MEMLD

PC,SPLD

PC,.CLRC
17,24
RO,2%

8IC
#17,3¢
BIS
RO,3s
ROMCLK
040400!¢14420>

;MASTER CLEAR DMC11t
sMEM « SP ADDRESS
;POINTER TO CORRECT DATA

;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA

;LOAD 8 WORDS OF SP
;POINTER TO DATA

;:CLEAR C BIT!

;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:BR
A ORB

MACRO V04.00
C20mC
DMC11 ALU TESTS

025540
025542
025544
025546
025552
025554
025556
025560
023562

025564

025566
025572
025574
025576
025601
025604

104414
061224
111205
116104
120504
001401
104015
104401
005202

005200

022700
001342
104400
000
377
377

27-JUN-85

ROMCLK
61224
HOvB
Move

000004

cMpPe

4s:

000010

377
125
252

SEQ 9%

13:16:37 PAGE 27-54

377
377

5%:

BEQ
EMT
SCOP1
INC
INC
cmp
BNE

iNEXT WORD IS INSTRUCTION,
;MOVE BR TO PORTA
;PUT “EXPECTED" IN RS
;PUT "FOUND' IN R4

(R2).RS
4(R1),R4

R5,R4

;DATA CORRECT?

4%
15

:BR IF YES
;ALU ERROR
;SW09=17?
;NEXT DATA
sNEXT ADDRESS
;O0NE YET?
:BR IF NO

R2
RO
#10,R0
1s

SCOPE
.BYTE

ROMCLK PC=5304

:SCOPE THIS TEST
1,-1,-1,125,-%1, 1,252

.EVEN

stkh
bbbt
aAbs
dbtbbdibht
at
nk

TEST

102

sakbsbbddhhkbbbbbdbbbdbbbbsn

;#ALU TEST
;#TEST OF ALU FUNCTION A XOR B WITH C BIT CLEARED
s#ALU FUNCTION (A XOR 8)
CODE=15
;%LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;*PERFORM THE FUNCTION,

VERIFY THE RESULTS

HEAL

:
025606
025614
025622

012737
012737
012737

025630
025632
025634
025640

104412

025644
025646
025652
025654
025660
025666
025672
025674
025676
025704
025710
025712

025714

025716
025720
025722
025726
025730
025732
025734

005000
012702
004737
035052
004737
035062
004737
042737
050037

104414
010000
042737
050037
104414
040720
104414
061224
111205
116104
120504
001401
104015
104401

000102
025762
025654

001226
001216
001220

TST102:

000017
025712

MOV
MoV
MoV

MOV

034762

025674

025712

1s:

2s:

JSR
MEMDAT
JSR
SPDAT
JSR
8IC
BIS
ROMCLK
010000
BIC
8IS

AT RS

E Yy

;R1 CONTAINS BASE DMC11 ADDRESS

958 ,.R2

PC.MEMLD
PC.SPLD
PC,CLRC
917,24
RO,2$

817,38
RO,3$

:MASTER CLEAR DMC11
sMEM » SP ADDRESS

;POINTER TO CORRECT DATA

;LOAD 8 WORDS OF MAIN MEMORY
;sPOINTER TO DATA
;LOAD 8 WORDS OF SP
;:POINTER TO DATA
;:CLEAR C BIT!
:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
+LOAD MAR
sCLEAR ADDRESS OF INSTRUCTION
sADD ADDRESS TO INSTRUCTION

MovB

4(R1),R4

;PUT

BEQ

EMT

Yy Y

#102,TSTNO
#TST103,NEXT
1%,L0CK

;NEXT
;BR _
sNEXT
:MOVE

CcMP8

4%
:

ROMCLK
040400!<15420>
ROMCLK
61224

MovBe

000004

TEST 102

MSTCLR
CLR

025752
034726

035026
000017
025674

SCopP1

(R2),RS5

R3,R4
15

WORD IS INSTRUCTION,
A XOR B
WORD IS INSTRUCTION,
BR TO PORT4

:PUT "EXPECTED” IN RS
"FOUND” IN R4

;DATA CORRECT?
;BR IF YES

;ALU ERROR

;SW09=1?

ROMCLK PC=5304

CZ0MC
MACRO v04.00
DMC11 ALY TESTS
025736
025740
025742
025746
025750
025752
025755

005202
005200
022700
001342
104400

SEQ 94

27-JUN-85 13:16:37 PAGE 27-5S
INC
INC

000010

377
m

025760

Ss:

CHp
BNE
SCOPE
.BYTE

R2
RO
#10,R0
1s
0,

sNEXT DATA
sNEXT ADDRESS
;:DONE YET?
;:BR IF NO

1,-1,0,0,

;SCOPE THIS TEST

1,-1,0

.EVEN

ibbbddbbbbbbbbbhibhbbdbiinths

TEST

;#ALU TEST

103

srsssssbbbsbbbssbbbdabdssds

;#TEST OF ALU FUNCTION ADD WITH C BIT CLEARCD
s#ALU FUNCTION (A PLUS B)
CODE=00
;4LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS
HEE LI

;.
025762
025770
025776

012737
012737
012737

026004
026006
026010
026014
026020
026022
026026
026030
026034
026042
026046
026050
026052
026060
026064
026066
026070
026072
026074
026076
026102
026104
026106
026110
026112
026114
026116
026122
026124
026126
026131
026134

104412

005000
012702
004737
035052
004737
035062

004737

042737
050037
104414
010000
042737
050037
104414
040400
104414
061224
111205
116104

120504

000103
026136
026030

001226
001216
001220

TST103:

000017
026066

026050

026066

1s:

2%:

3s:

104400
000
376
377

377
377

5$:

ATy

LYy

L T

Tyryrrwes

#103,TSTNO
4TST104,NEXT
#14,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

RO
#5¢,.R2
PC,MEMLD
PC,SPLD

PC,CLRC
417,28
RO,2$

17,3
RO,3s

040400!<00420>

ROMCLK
61224
Hove

(R2),R5

4(R1),.R4

cMPB
BEQ
EMT

R5,R4
44
15

INC
INC

R2
RO

BNE
SCOPF
.BYTE

ScorP1

CcHp

000010

377
252
124

JSR
SPDAT
JSR
8IC
8IS
ROMCLK
010000
8IC
BIS
ROMCLK

HMOvB

000004

001401

104015
104401
005202
005200
022700
001342

MOV
MOV
MOV

MoV
JSR
MEMOAT

034762

TEST 103

MSTCLR
CLR

026126
034726

035026
000017
026050

TR T

#10,R0

sMASTER CLEAR DMC11t
;MEM + SP ADDRESS

;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
:POINTER TO DATA

:L.OAD 8 WORDS OF SP
;POINTER TO DATA
-CLEAR C BIT!
;:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:LOAD MAR
;:CLEAR ADDRESS OF INSTRUCTTM
!
;ADD ADDRESS TO INSTRUCTIC
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

;BR _ ADD

;NEXT WORD IS INSTRUCTION,
;:MOVE BR TO PORT4
:PUT "EXPECTED” IN RS

;PUT “FOUND" IN R4
:DATA CORRECT?
;BR IF YES
;ALU ERROR

:SW09=1?

sNEXT DATA
;NEXT ADDRESS

:DONE YET?

;:BR IF NO
sSCOPE THIS TEST
0,-1,-1,376,252,-1,-1,124

ROMCLK PC=5304

CZOMC
MACRO Vv04.00
DMC11 ALV TESTS

SEQ 95

27-JUN-8S 13:16:37 PAGE 27-56

.EVEN

isbbssssbbsbbbhbstsbhbbiitnst

TEST

104

ssasdtstsssnssbbsssstbtssas

;sALU TEST
ssTEST OF ALU FUNCTION 2A W/C WITH C BIT CLEARED

s#ALU FUNCTION

PLUS

A PLUS

CODE=6

;+#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
ssPERFORM THE FUNCTION, VERIFY THE RESULTS

026136
026144
026152

012737
012737
012737

026160
026162
026164
026170
026174
026176
026202
026204
026210
026216
026222
026224
026226
026234
026240
026242
026244
026246
026250
026252
026256
026260
026262
026264
026266
026270
026272
026276
026300
026302
026305
026310

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042/37
050037
104414
040540
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
000
376
124

000104
026312
026204

001226
001216
001220

TST104:

HEE

;

TEST 104

MOV
MoV
MOV
MSTCLR

CLR
MOV

026302

034726

JSR

034762

035026
000017
026224
000017
026242

026224

026242

1%:

2%:

3s:

4%:
000010

376
252

5S%:

22 S

Move
CMPB
BEQ
EMT
SCOP1
INC
INC
cHP

BNE
SCOPE

.BYTE

LIt

Yyen

#104,TSTNO
#TST105,NEXT
#1$%,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

RO
454%,R2
PC ,MEMLD
PC,SPLD

PC,CLRC
BIC
#17,2%
8IS
RO,2%
ROMCLK
010000
8IC
917,38
BIS
RO,3$
ROMCLK
040400!<6420>
ROMCLK
61224

HMOVB

000004

200
252
124

MEMDAT
JSR
SPDAT
JSR

EZ 22

(R2),RS

4(R1),R4
R5,R4
44
15

R2
RO

€10,R0

;MASTER CLEAR DMC11

sMEM + SP ADDRESS
;POINTER TO CORRECT DATA

;LOAD 8 WORDS OF MAIN MEMORY

;POINTER TO DATA
;:LOAD 8 WORDS OF SP
;:POINTER TO DATA
;CLEAR C BIT!

;CLEAR ADDRESS FIELD OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:BR _ 2A W/C
;NEXT WORD IS INSTRUCTION, Ry ICLK PC=5304
:MOVE BR TO PORT4

;PUT "EXPECTED” IN RS

;PUT "FOUND” IN R4
sDATA CORRECT?
:BR IF YES
;ALU ERROR
:SW09=1?
:NEXT DATA
sNEXT ADDRESS
;DONE YET?

;BR IF NO
;SCOPE THIS TEST

0,0,376,376,252,252,124,124

.EVEN

shddkbbbbbhdbhbhbbbbhbsdbss

TEST

105

stssstsastsdbtbdbisddstbssssd

;*ALU TEST
;#TEST OF ALU FUNCTION SUB WITH C BIT CLERRED
;#ALU FUNCTION (A-B)
CODE=16
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA

CZDMC
MACRO v04.00
DMC11 ALU TESTS

SEQ 96

27-JUN-85 13:16:37 PAGE 27-57

ssPERFORM THE FUNCTION,
$:08 8

bnts

TEST 105

;
026312
026320
026326

012737
012737
012737

026334
026336
026340
026344

104412
005000
012702
004737

026350

026352
026356
026360
026364
026372
026376
026400

026402
026410
026414

026416

026420
026422
026424
026426
026432
026434
026436
026440
026442
026444
026446
026452
026454
026456
026461
026464

035052

004737
035062
004737
042737
050037
104414
010000

042737
050037
104414

000105
026466
026360

001226
001216
001220

026456
034726

MEMDAT

034762
035026
000017
026400

000017
026416

1s:

026400

026416

2%:

3s:

104414
061224
120504
001401
104015
104401
005202
005200
022700
001342
104400
000
000
125

JSR
SPDAT
JSR

4%:

000010
377
253

Ss:

€105, TSTNO
4757106, NEXT
418,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

RO
45¢ ,R2
PC,MEMLD
PC,SPLD

PC,CLRC
8IC
#17,2¢
8IS
RO,2$
ROMCLK
010000
BIC
#17,3$
BIS
RO,3$
ROMCLK
040400!<16420>
ROMCLK
61224

MovB
HMovse

000004

001
000
000

MOV
MOV
MOV

MSTCLR
CLR
MoV
JSR

040740

111205
116104

TST10S:

VERIFY THE RESULTS

0884848408004 08884 4840284008880 0 440804804kt ttttbtbbbb

CMPB
BEQ
EMT
SCoP1
INC
INC
cHpP
BNE
SCOPE
.BYTE

(R2),RS5
4(R1),R4

R5,R4
4%
15

R2
RO

#10,R0
1¢

;MASTER CLEAR DMC11
;MEM + SP ADDRESS
;POINTER TQO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY

;:POINTER TO DATA

;LOAD 8 WORDS OF SP
;POINTER TO DATA
;:CLEAR C BIT!

;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:LOAD MAR
sCLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT
;:BR _
;NEXT
;MOVE

WORD IS INSTRUCTION,
SUB
WORD IS INSTRUCTION,
BR TO PORT4

ROMCLK PC=5304

;PUT "EXPECTED” IN RS
;PUT “FOUND” IN R4

:DATA CORRECT?
:BR IF YES
;:ALU ERROR
;SW09=1?
;NEXT DATA
sNEXT ADDRESS

;:DONE YET?
;BR IF NO

:SCOPE THIS TEST
0,1.-1,0,0,253,125,0

.EVEN

shdhdb btk kbbhbbbbdbhbbsnbis

TEST

106

snsbkstdbbkbtbbbbdbhbddhdbds

;*ALU TEST
s&«TEST OF ALU FUNCTION ADD W/C WITH C BIT CLEARED
;#ALU FUNCTION (A PLUS B PLUS C)
CODE=01
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS

sohhbbkbhkbsbhkbhhkbbkbhdbbbbhb
bbb bbhk kbbb bi bbb dbhhbhdbbhhbhihibi

;

026466

026474
026502

012737

012737
012737

000106

026642
026534

001226

001216
001220

TST106: fiOV

MOV
MoV

TEST 106

#106, TSTNO

¢TST107 ,NEXT
#14,L0CK

MACRO V04.00
€Z0OMC
OMC11 ALU TESTS

026510
026512
026514
026520
026524
026526
026532
026534
026540
026546
026552
026554

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000

026564
026570
026572
026574
026576
026600
026602
026606
026610
026612
026614
026616
026620
026622
026626
026630
026632
026635
026640

050037
104414
040420
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
000
376
377

026556

042737

27-JUN-85

026632
034726
034762

035026
000017
026554

000017

026572

026554

026572

1¢:

2%:

000004

4% :
000010

377
252
124

SEQ 97

13:16:37 PAGE 27-58

377
377

MSTCLR
CLR
MOV
JSR
MEMDAT
JSR
SPDAT
JSR
B8IC
BIS
ROMCLK
010000

8IC

RO
#5%,R2
PC,MEMLD
PC,S5PLD

PC,.CLRC
#17,2%
RO,2$

£17,3¢

;R1 CONTAINS BASE DMC11 ADDRESS
+MASTER CLEAR DOMC11
;MEM + SP ADDRESS
;+POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
:POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;:CLEAR C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
;sNEXT WORD IS INSTRUCTION,
;LOAD MAR

ROMCLK PC=5304

;CLEAR ADDRESS OF INSTRUCTION

B1S
RO,3$
:ADD ADDRESS TO INSTRUCTION
ROMCLK
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
040400!<01%x20>
:BR _ ADD W/C
ROMCLK
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
61224
+MOVE BR TO PORT4
MOVB
(R2).R5
;:PUT “EXPECTED” IN RS
MOvB
4(R1),R4
;PUT "FOUND” IN R4
CMPB
R5,.R4
;DATA CORRECT?
BEQ
4%
;BR IF YES
EMT
15
sALU ERROR
SCOP1
;SW09=1?
INC
R2
;sNEXT DATA
INC
RO
sNEXT ADDRESS
cHP
#1060 70
;DOONE YET?
BNE
1s
;BR IF NO
SCOPE
;SCOPE THIS TEST
.BYTE
0,-1,-1,376,252,-1,-1,124
~

.EVEN

shhbdbdbbddbittbidssiitbsnss

TEST

107

sessssstssddbisdbdddbsddstsn

;#ALU TEST
;#TEST OF ALU FUNCTION SU8 W/C WITH C BIT CLEARED
;#ALU FUNCTION (A-B-C)
CODE=2
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS
_
RSP

:+
026642
026650
026656

012737
012737
012737

026664
026666
026670
026674

104412
005000
012702
004737

026700
026702
026706

035052
004737
035062

000107
027016
026710

027006
034726
034762

001226
001216
001220

T1ST107:

T Y

Ry Py

TTTTTITTTYr

TEST 107

MOV
MOV
MOV
MSTCLR
CLR
MOV
JSR

MEMDAT
JSR
SPDAT

#107,TSTNO
STST110,.NEXTY
#1$,LOCK

;:R1 CONTAINS BASE DMC11l ADDRESS

RO
#5% ,R2
PC,MENLD
PC,SPLD

;sMASTER CLEAR DMC11
;MEM + SP ADDRESS
;POINTER TO CORRECTY DATA
;LOAD 8 WORDS OF MAIN MEMORY

;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
-

MACRO V04.00
CZ0oMC
OMC11 ALV TESTS

27-JUN-85

026710
026714
026722
026726

035026
000017
026730

026730
026732
026740
026744
026746
026750
026752

026754

026756
026762
026764
026766
026770
026772
026774
026776
027002
027004
027006

027011
027014

004737
042737
050037
104414
010000
042737
050037
104414
040440
104414
061224
111205
116104
120504
001401

000017
026746

026730

026746

1$:

2%:

JSR
8IC
8IS

PC,CLRC
217,24
RO,24

ROMCLK
010000

B81C

17,3

815
ROMCLK

3s:

RO,3¢

040400!<2420>
ROMCLK
61224
MOVB
Move
cMPB

000004

(R2),RS
4(R1),R4
R5,R4

BEQ

104015
104401

005202
005200
022700
001342
104400
377
377
124

SEQ 98

13:16:37 PAGE 27-59

EMT

4%
:

000
377
377

376

252

5¢:

:NEXT WORD IS INSTRUCTION,
;:LOAD MAR

;ADD ADDRESS TC INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

:BR _ SuUB W/C

:NEXT WORD IS INSTRUCTION,
;MOVE BR TO PORT4

:PUT "EXPECTED"” IN RS

:BR IF YES

INC
INC

R2
RO

;NEXT DATA
;NEXT ADDRESS

BNE
SCOPE
.BYTE

#10,R0

ROMCLK PC=5304

;PUT “FOUND” IN R4
:DATA CORRECT?

;ALU ERROR

SCopP1

ROMCLK PC=5304

;CLEAR ADDRESS OF INSTRUCTION

CcMP

000010

;CLEAR C BIT!
.CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION

:SW09=17

;:DONE YET?

;BR IF NO
:SCOPE THIS TEST
-1,0,376,-1,-1,252,124,-1

.EVEN

shhhbbtbshbibbbbbhbbbbnihhtd

TEST

110

sssssssbdsdssbsssssssbsssss

;sALU TEST
s#TEST OF ALU FUNCTION INC A WITH C BIT CLEARRED

i#ALU FUNCTION (A PLUS 1)
CODE=3
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESUWLTS

027016
027024
027032

012737
012737
012737

027040
027042
027044

104412
005000
012702

027050
027034
027056
027062
027064
027070
027076
027102
027104
027106
027114
027120

004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414

000110
027172
027064

001226
001216
001220

TST110:

LTS DI

MOV

MOV
MOV

MSTCLR

027162

034726

034762

035026
000017
027104

000017
027122

027104

027122

14:

2%:

CLR
MOV
JSR
MEMDAT
JSR
SPDAT
JSR
BIC
8IS
ROMCLK
010000
BIC
BIS
ROMCLK

PP r

VPP PTPPPPPPIRN

#110,TSTNO

@TST111,NEXT
413%,L0CK

RO
454 ,R2
PC ,MEMLO
PC,SPLD
PC,CLRC
#17,24
RO,2$

#17,3%
RO, 3

:R1 CONTAINS BASE DMC11 ADDRESS

sMASTER CLEAR DMC11

sMEM +» SP ADORESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;:LOAD 8 WORDS OF SP

;POINTER TO DATA
;:CLEAR C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR

;CLEAR ADDRESS OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION,

ROMCLK PC=5304

MACRO v04.00
czomc
OMC11 ALV TESTS

027122
027124
027126
027130
027132
027136
027140
027142
027144
027146
027150
027152
027156
027160
027162
027165
027170

040460
104414
061224
111235
116104
120504
001401

27-JUN-85

3s:

000004

104400
001
000
253

000010

001
126
253

0404001<3420>
ROMCLK
61224
MOVB
(R2),R5
MOVB
4(R1),R4

cHMPB

104015

104401
005202
005200
022700
001342

SEQ 99

12:16:37 PAGE 27-60

000

126

5¢:

BEQ
EMT
SCoP1
INC
INC
CMP
BNE
SCOPE
.BYTE

:BR _ INC A
;NEXT WORD IS INSTRUCTION,
;MOVE BR TO PORT4
;PUT
;PUT

R5.R4

RUMCLK PC=5304

"EXPECTED" IN RS
"FOUND"” IN R4

;:DATA CORRECT?
;:BR IF YES
;ALU ERROR
;SW09=1?
iNEXT DATA
;sNEXT ADDRESS
;DONE YET?
;BR IF NO

4%
15

R2
RO
#10,R0
1s

;SCOPE THIS TEST

1,1,0,0,126,126,253,253

.EVEN

shbkkdbhhkbbhbknhkbhhbhkhnhhis

TEST

111

sstbskdbbbshbbbbsbbhbbdsdds

;%ALY TEST
;#TEST OF ALU FUNCTION 2A WITH C BIT CLEARED
;#ALU FUNCTION (A PLUS R)
CODE=5
;4LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;PERFORM THE FUNCTION, VERIFY THE RESULTS
sidhdbbkkdbhbbbhkh

;
027172
027200
027206

012737
012737
012737

027214
027216
027220
027224
027230
027232
027236
027240
027244
027252
027256
027260
027262
027270
027274
027276
027300
027302
027304
027306
027312
027314
027316

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040520
104414
061224
111205
116104
120504
001401
104015

000111
027346
027240

001226
001216
001220

TST111:

034762

035026
000017
027260

000017
027276

027260

027276

1$:

2%:

3$:

000004

kb dR kb kb bk kb kbbb hk bk bk

b kbbb bbb dbbhhbhhd

TEST 111

MoV
MOV
MOV
MSTCLR

027336
034726

CLR
Mov
JSR
MEMDAT
JSR
SPDAT
JSR
8IC
8IS

ROMCLK
010000

#111,TSTNO
ATST112,NEXT
#1%,L0CK

RO
#5¢,R2
PC,MEMLD
PC,SPLD
PC,CLRC
817,24
RO,2¢

BIC
#17,3$
8IS
RO,3¢
ROMCLK
0404001 <5420>
ROMCLK
61224

Move
MoV
cMPB
8EQ
EMT

(R2),R5
4(R1),R4
RS.R4
44
15

;R1 CONTAINS BASE DMC11 ADDRESS
;MASTER CLEAR DMC11

;MEM

SP ADDRESS

;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;CLEAR C BIT!
;+CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;SSXT :RRD IS INSTRUCTION, ROMCLK PC=5304
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sMOVE B8R TO PORT4
;PUT “EXPECTED” IN RS
;PUT “FOUND* IN R4
;DATA CORRECT?
;BR IF YES
;ALU ERROR

CZDMC
MACRO V04.00
DMCI1 ALU TESTS
027320
027322
027324
027326
027332
027334
027336
027341
027344

104401
005202
005200
022700
001342
104400
00C
376
124

SEQ 100

27-JUN-85 13:16:37 PAGE 27-61
43

000010

000

252
124

376

252

5%:

SCoP1
INC
INC
cMP
BNE
SCOPE
.BYTE

; SW09=1?
:NEXT DATA

R2
RO
#10,R0
1s

sNEXT ADDRESS
;DONE YET?
;:BR IF NO
;SCOPE THIS TEST
0,0,376,376,252,252,124,124

.EVEN

idbshbkrdbsadhbbbdbhbbbbhbhhhs

TEST

;*ALU TEST

112

ssssssssssstsstssssntssssss

;#TEST OF ALU FUNCTION A PLUS C WITH C BIT CLEARED

:%ALU FUNCTION (A PLUS C)
CODE=4
:#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;*PERFORM THE FUNCTION, VERIFY THE RESWLTS
LI

;

027346
027354
027362

012737
012737
012737

027370

104412

027372
027374
027400
027404

027406
027412
027414

027420

005000
012702
004737
035052

004737
035062
004737

042737

027426
027432
027434
027436
027444
027450
027452
027454
027456
027460
027462
027466
027470
027472

050037
104414
010000
042737
050037
104414
040500
104414
061224
111205
116104
120504
001401
104015

027476
027500
027502
027506
027510
027512
027515

005202
005200
022700
001342
104400
000
377

027474

000112
027522
027414

001226
001216
001220

TST112:

034762
035026
000017

027434

000017
027452

1s:
027434

027452

2%:

3¢:

000004

104401

43:
000010
000
125

377
125

5%:

Lty

I T

YTy

TEST 112

MOV
MOV
MOV

#112,TSTNO
#TST113,NEXT
#13,L0CK

MSTCLR

027512
034726

CLR
RO
MOV
954 ,R2
JSR
PC,MEMLD
MEMDAT
JSR
PC,SPLD
SPDAT
JSR
PC,CLRC
8IC
17,24
8IS
RO,2%
ROMCLK
010000
81C
17,38
81S
RO.3$
ROMCLK
040400!<4520>
ROMCLK
61224
MOVB
(R2),R5
Move
4(R1),R4

cMPB
BEQ
EMT

RS,.R4
43
15

INC
INC
cHP
BNE
SCOPE
.BYTE

R2
RO
#10,R0
1$

SsCoP1

;R1 CONTAINS BASE DMC11 ADDRESS
:MASTER CLEAR DMC11
;MEM + SP ADDRESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
:POINTER TO DATA

:LOAD 8 WORDS OF SP
;POINTER TO UATA
:CLEAR C BIT!

:CLEAR ADDRESS FIELD OF INSTRUCTION

:ADD ADDRESS 7O INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADORESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;BR _ A PLUS C
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORT4
;PUT “EXPECTED"” IN RS
:PUT "FOUND” IN R4

;:DATA CORRECT?
;BR IF YES
:ALU ERROR

:SW09=1?

;NEXT DATA
;NEXT ADDRESS
;DONE YET?
;B8R IF NO
;SCOPE THIS TEST
0,0,-1,-1,125,125,252,252

CZPMC
MACRO V04.00
OMC11 ALV TESTS
027520

252

SEQ 101

27-JUN-85 13:16:37 PAGE 27 62
252

.EVEN

ihbhdbbbiabbbhbbbbbbbbbsstds

TEST

113

sseshbdakssbbdstnbssbsbnbbnst

;¢ALU TEST
;#TEST OF ALU FUNCTION 2'S COMP SUB WITH C BIT CLEARED
;#ALU FUNCTION (A-8B 1)
CODE=17
;sLOAD MAIN MEM AND SP WITH 8 WORDS OF DATA

;#PERFORM
R

;
027522
027330
027336

012737
012737
012737

027544
027546
027550
027554
027560
0275€2
027566

104412
005000
012702
004737
035052
004737
035062

027570

027574
027602
027606
027610
027612
027620
027624
027626
027630
027632
027634
027636
027642
027644
027646
027650
027652
027654
027656
027662
027654
027666
027671
027674
88

004737

042737
050037
104414
010000
042737
050037
104414
040760
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
377
377
124

000113
027676
027570

001226
001216
001220

TST113:

034762
035026

000017
027610

027610

000017
027626

027626

1s:

2%:

3s:

000004

4%:
000010
000
377

377

MOV
MOV
MOV

376
252

5%:

JSR

THE

FUNCTION,

VERIFY
I

THE

RESULTS
Ry

Tty

#113,7TSTNO
#T57T114,NEXT
#1$,L0CK

#5%,R2
PC,MEMLD
PC,.SPLD
PC,CLRC

;R1 CONTAINS BASE DMC1i ADDRESS
iMASTER CLEAR DMC11
:MEM + SP ADDRESS

;POINTER TO CORRECT DATA
:LOAD 8 WORDS OF MAIN MEMOQRY
;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;:CLEAR C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
:NEXT WORD' IS INSTRUCTION, ROMCLK PC=5304
;:LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
+ADD ADDRESS TO INSTRUCTION
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
iBR _ 2'S COMP SUB

BIC
417,24
BIS
RO,2¢
ROMCLK
010000
8IC
€17,3$
8IS
RO,3$
ROMCLK
040400!<17420>
ROMCLK
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
61224
:MOVE BR TO PORT4
MOV8
(R2),R5
;PUT “EXPECTED” IN RS
MOV
4(R1),R4
;PUT “FOUND* IN R4
CMPB
RS,R4
:OATA CORRECT?
BEQ
43
iBR IF YES
EMT
15
:ALU ERROR
sCoP1
:SW09=1?
INC
Re
sNEXT DATA
INC
RO
;NEXT ADDRESS
cnp
#10,R0
;DONE YET?
BNE
13
;B8R IF NO
SCOPE
;SCOPE THIS TEST
.BYTE
-1,0,376,-1,-1,252,124,-1

.EVEN

ihbsksbsbsdbbbabbbbnsibisss

TEST

114

sisssssasststsssnssssssssies

;#ALU TEST
;#«TEST OF ALU FUNCTION DEC A WITH C BIT CLEARED
;#ALU FUNCTION (A-1)
CODE=7

TEST 113

MSTCLR
CLR
MOV
JSR
MEMDAT
JSR
SPDAT

027666
034726

CZOMC
MACRO VC4.00
OMC11 ALV TESTS

SEQ 102

27-JUN-85 13:16:37 PAGE 27 63

;#LORD MAIN MEM AND SP WITH 8 WORDS OF DATA
;sPERFORM THE FUNCTION, VERIFY THE RESULTS

027676
027704
027712

012737
012737
012737

027720
027722
027724
027730
027734
027736
027742

104412
005000
012702
004737
035052
004737
035062

027744
027750
027756
027762
027764

004737
042737
050037
104414
010000

027766
027774

042737
050037

030002

040560

030000
030004
030006

030010
030012
030016
030020
030022

030024
030026
030030
030032
030036
030040
030042
030045
030050

104414

000114
030052
027744

001226
001216
001220

030042
034726
034762

035026
000017
027764

027764

1s:

2%:
000017
030002

030002

3s:

104414
061224

111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
377
376
251

TST114:

LRSS

;

TEST 114

MOV
MOV
MOV

MSTCLR
CLR
MOV
JSR
MEMDAT
JSR
SPDAT

44:

000010
n
124
251

376
124

5%:

222

7TIYITMTM

#114,TSTNO
#4TST115,NEXT
#14,L0CK

:R1 CONTAINS BASE DMC11i ADDRESS

:MASTER CLEAR DMC11
:MEM + SP ADDRESS
:POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA

RO
#5¢,R2
PC,MEMLD

PC,SPLD

JSR
8IC
BIS
ROMCLK
010000

PC,CLRC
917,2¢
RO,2$

;CLEAR C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:LOAD MAR

BIC
8IS

917,38
RO,3$

;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION

ROMCLK

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

040400!<7420>
ROMCLK
61224

000004

Move
HOVB
cMPB
BEQ
EMT

SCoP1
INC
INC
cHp
BNE
SCOPE
.BYTE

:BR _ DEC A

;NEXT WORD IS INSTRUCTION,
:MOVE B8R TO PORT4

(R2),RS5
4(R1),R4
R5,R4
43
15

ROMCLK PC=5304

;PUT "EXPECTED” IN RS
;PUT *FOUND” IN R4
:DATA CORRECT?
:BR IF YES
;ALU ERROR

:SWO09=17
sNEXT DATA
sNEXT ADDRESS
sDONE YET?
:BR IF NO
;SCOPE THIS TEST
-1,-1,376,376,124,124,251,251

R2
RO
€10,R0
1

.EVEN

shbdbbbkbbbbbhbibntsdbibtdss

;sALU TEST

TEST

115

setsssssstssdssnidstssdsstas

;#TEST OF ALU FUNCTION SEL B WITH C BIT SET

;#ALU FUNCTION (8)
CODE=11
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;*PERFORM THE FUNCTION, VERIFY THE RESULTS
;2000

;

030052

030060

012737

000115

030226

001226

001210

TST115: fiO

MoV

Rk AR ARk

bb AL A4 EAR 0400044000448 5000808000085480880848448

TEST 115

#115,.TSTNO

OTST116,NEXT

CZ0OMC
MACRO V04.00
DMC11 ALV TESTS
030066

012737

030074
030076
030100
030104
030110
030112

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737

030116
030120
030124
030132
030136
030140
030142

030150
030154

030156
030160
030162
030164
030166
030172
030174
030176
030200
030202
030204
030206
030212
030214
030216
030221
030224

050037
104414
040620
104414

061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
000
377
125

SEQ 103

27-JUN-85 13:16:37 PAGE 27-64

030120

001220

L1}

030216
034726
034762

035040
000017
030140

000017
030156

030140

030156

14:

2%:

3s:

000004

377
125
252

sMASTER CLEAR DMC11
sMEM + SP ADDRESS
;POINTER TO CORRECT DATA
:LOAD 8 WORDS OF MAIN MEMOQRY
:POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;SET C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;BR _ SEL 8
;sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORTA
;PUT *EXPECTED* IN RS
;PUT “FOUND” IN R4

8EQ
EMT

4%
15

:BR IF YES
;ALU ERROR

INC
INC

R2
RO

BNE
SCOPE
.BYTE

SCOoP1

CcMP

000010

000
252

S$:

;R1 CONTAINS BASE DMC11 ADDRESS

MSTCLR
CLR
RO
MOV
458 ,R2
JSR
PC,MEMLD
MEMDAT
JSR
PC,SPLD
SPDAT
JSR
PC,SETC
BIC
217,24
81S
RO,2$
ROMCLK
010000
BIC
17,3
BIS
RO,3$
ROMCLK
040400!<11420>
ROMCLK
61224
MOVB
(R2),R5
MOVB
4(R1),R4

CcMPB

#1$,L0CK

R5,.R4

:DATA CORRECT?

;SW09=1?

;NEXT DATA
;NEXT ADDRESS

#10,R0

;:DONE YET?

18R IF NO
;SCOPE THIS TEST
0,-1,0,-1,125,2%2,125,252

.EVEN

(0848 s80bssbtsbbttsbttdnd

TEST

116

2tssdtnssdsdbtdsdbsdtsdsnnds

;sALU TEST
;«TEST OF ALU FUNCTION SEL A WITH C BIT SET
;#ALU FUNCTION (A)
CODE=10
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;*PERFORM THE FUNCTION, VERIFY THE RESULTS

030226
030234
030242

012737
012737
012737

030250
030252

104412
005000
012702
004737
035052
004737

030254
030260
030264
030266

000116
030402
030274

030372
034726
034762

001226
001216
001220

TST116:

LT LT T

TEST 116

HOV
MoV
Mov
MSTCLR
CLR
MOV
JSR
MEMDAT
JSR

Yy Y

T TTIIITY Y

#116,TSTNO
#TST117 NEXT
#14,L0CK

RO
#5%,R2
PC.MEMLD
PC,SPLD

:R1 CONTAINS BASE DMC11 ADDRESS

sMASTER CLEAR DMC11
sMEM » SP ADDRESS
;POINTER TO CORRECT DATA
sLOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
:LOAD 8 WORDS OF SP

czonc
MACRC VO4.00
OMC11 ALV TESTS
030272
030274
030300

030306
030312
030314
030316
030324
030330
030332
030334
030336
030340
030342
030346
030350
030352
030354
030356
030360
030362
030366
030370
030372
030375
030400

035062
004737
042737
050037
104414
010000
042737
050037
104414
040600
104414
061224
111205
116104

120504

035040
000017
030314

000017
030332

030314

030332

1¢:

2%:

3s:

MOVB
cMPB
BEQ
EMT
sCoPi
INC
INC

CMHpP

000010

000
125
252

SPDAT
JSR
PC,SETC
BIC
217,24
8IS
RO, 2%
ROMCLK
010000
81C
017,34
8IS
RO,3$
ROMCLK
040400 <10£20>
ROMCLK
61224

Hova

000004

001401
104015

104401
005202
005200
022700
001342
104400
000
377
252

SEQ 104

27-JUN-85 13:16:37 PAGE 27-65

377

125

5%:

BNE
SCOPE
.BYTE

(R2),RS5

4(R1),R4
R5,R4
44
15

R2
RO

#10,R0
14

;POINTER TO DATA
;SET C BIT!
;CLEAR ADORESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;:CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
iBR _ SEL A
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORT4

;PUT “EXPECTED” IN RS
;PUT “FOUND” IN R4
:DATA CORRECT?
:BR IF YES
:ALU ERROR
$SW09=1?
sNEXT DATA
:NEXT ADDRESS

;DONE YET?

$1BR IF NG
;:SCOPE THIS TEST
0,0,-1,-1,125,125,252,252

.EVEN

j6hsds
bt bbbbbb
bdssinibdisind

TEST

117

tdstssidsdnssstsssdssssdbtns

ssALU TESY
;#TEST OF ALU FUNCTION A OR NOTB WITH C BIT SET
s#ALU FUNCTION (A OR NOTB)
CoDE=12
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
i#PERFORM THE FUNCTION, VERIFY THE RESULTS

§:0088804000 4540404440 0400004000044

:
030402
030410
030416

012737
012737
012737

030424
030426
030430
030434
030440
030442
030446
030450
030454
030462
030466
030470
030472
030500

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037

000117
030556
030450

001226
001216
001220

T1ST117:

030546
034726

034762

035040

000017
030470

030470

000017
030506

030506

1%:

2s:

0katdd0dRdbtts

TEST 117

MOV
MoV
MOV

#117,7STNO
#TST120, NEXT
#14,L0CK

MSTCLR
CLR

MOV
JSR
MEMDAT
JSR
SPDAT
JSR

8IC
BIS
ROMCLK
010000

8IC
8IS

4400000

34,R2
PC,MEMLD
PC.SPLD

PC,SETC
07,24
RO.2%

017,34
RO, 3¢

iR1 CONTAINS BASE DMC11 ADDRESS
tMASTER CLEAR DMC11
sMEM + SP ADDRESS

1POINTER TO CORRECT DATA
sLOAD 8 WORDS OF MAIN MEMORY
sPOINTER TO DATA
;LOAD 8 WORDS OF SP
1POINTER TO DATA
sSET C BIT!

sCLEAR ADDRESS FIELD OF INSTRUCTION
+ADD ADORESS TO INSTRUCTION
iNEXT WORD IS INSTRUCTION, ROMCLK PCs=5304

;iLOAD MAR

;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION

CIOMC

MACRO V04.00 27-JUN 85 13:16:37 PAGE 27 66

0
S€Q 105

OMCIT ALU TESTS
030504
030506
030510
030512
030514
030516

1C4414
040640
104414
061224
111205
116104

030522
030524
030526

120504
001401
104015

030332
030534
030536
030542
030544
030546
030551
030554

005202
005200
022700
001342
104400
377
377
252

030530

000004

104401

43:

000010
000
377
377

377
125

5Ss%:

ROMCLK
0404001<12420>
ROMCLK
61224
MOVB
(R2),RS
HOovB
4(R1),R4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORTA

cHP8
BEQ
13,31

;:DATA CORRECT?
;BR IF YES
;ALU ERROR

SCOP1

INC
INC
CcHP
BNE
SCOPE
.8YT¢

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:BR _ A OR NOTB
)

;PUT
sPUT

R5.R4
44
15
R2
RO
€10,R0
13

-1.0,-1,

“EXPECTED” IN RS
“FOUND~ IN R4

;SW09=1?

sNEXT DATA
;NEXT ADDRESS
;:DONE YET?
:BR IF NO
:SCOPE THIS TEST
1,-1,125,252.-1

.EVEN

stk bsbbbbhtsbbbtbbtssttibkes

TEST

120

ssssssstssdbstssddssdbdbdis

s#ALU TEST
;¢TEST OF ALU FUNCTION A AND B WITH C BIT SET
i#ALU FUNCTION (A AND B)
CobE=13
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS
Fi0888 8454004040444

:
030556
030564
030572

012737
012737
012737

030600
030602
030604
030610
030614
030616
030622
030624
030630
030636
030642
030644
Q30646
030654
030660
030662
030664
030666
030670
030672
030676
03570C

104412
005000
012702
004737
035052
004737
035062
004727
042737
050037
104414
010000
042737
050037
104414
040660
104414
061224
111205
116104
120504
001401

000120
030732
030624

001226
001216
001220

TST120:

030722
034726
034762
035040
000017
030644

000017
030662

030644

030662

1%:

2s:

3s:

000004

MOV
MOV
MoV

0400 000000 40RtabttkkbbbkbdidbdRbbatbidtn

TEST 120
4120, TSTNO
4TST121,NEXT
#13,L0CK

MSTCLR
CLR
RO
MOV
5% ,Re
JSR
PC.MEMLD
MEMDAT
JSR
PC,SPLD
SPDAT
JSR
PC.SETC
BIC
017,2¢
BIS
RO,2s
ROMCLK
0106000
BIC
€17,38
BIS
RO,3s
ROMCLK
040400!<13420>
ROMCLK
61224
Move
(R2).RS
Move
4(R1),R4
CcMP3
R5.R4
BEQ
4%

;R1 CONTAINS BASE DMC11 ADDRESS

sMASTER CLEAR DMC11i
sMEM + SP ADDRESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;:LOAD 8 WORDS OF SP
;POINTER TO DATA
;SET C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
iNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;BR _ A AND B
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOVE BR TO PORT4
;PUT "EXPECTED” IN RS
;PUT "FOUND” IN R4

;:DATA CORRECT?
;BR IF YES

MACPO vO4.00
codMC
OMC11 ALU TESTS

030702
030704
030706
030710
030712
030716
030720
030722
030725
070730

104015
104401
005202
005200
022700
001342
104400
000
377
000

27-JUN-85

000010

000
125
252

SEQ 106

13:16:37 PAGE 27-67

000
000

S5s:

EMY
SCoP1
INC
INC
oy
BNE
SCOPE
.BYTE

;ALU ERROR
;SWC9=1?
sNEXT DATA
;:NEXT ADDRESS
;DONE YET?
;:BR IF NO
;SCOPE THIS TEST

R2
RO
€10.RO

-EVEN

shbsbadbsbbstdbidianbbbbbans

TEST

121

sssdtbhbbbbobsdbsbbdbbdisds

;#ALU TEST
;#TEST OF ALU FUNCTION A OR B WITH C BIT SET
s#ALU FUNCTION (A OR B)
CODE=14
;sLOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
s sPERFORM THE FUNCTION, VERIFY THE RESULTS
$:0884505804548

;
020732
030740
030746

012737
012737
012737

030754
030756
030760
030764
030770
030772
020776
0%1000
031004
031012
031016
031020
031022
031030
031034
031036
031040
031042
031044
031046
031052

104412
005000
012702

031054
031056
031060
031062
031064
031066
031072
031074
031076

004737

035052

004737
035062
004737
042737
050037
104414
010000
042737
050037
1044124
040700
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
000

000121
031106
03100C

001226
001216
001220

TS5T121:

031076
034726

034762
035040
000017
031020

000017
031036

031020

031036

1s:

2%:

000010

5s:

kbbb kbbbt bbbt hbihbtbbihhtidd

TEST 121

MOV
MOV
Mov
MSTCLR
CLR
MOV
JSR
MEMDAT
JSR
SPDAT
JSR

BIC
81S
ROMCLK
010000
BIC
8IS

€121 ,TSTNO
#TST122 ,NEXT
#18,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS
sMASTER CLEAR DMCi1
sMEM + SP ADDRESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;PCINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;SET C BIT!
:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC 5304
;:LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION

RO
45%,R2
PC,MEMLD

PC,SPLD
PC,SETC
917,28
RO,28

17,3
RO,3s

ROMCLK
040400!<14420>
ROMCLK
61224

MovBe

000004

0040808880000

sNEXT WORD IS INSTRUCTION,

(R2),RS

Move

4(R1),R4

CMPB
BEC
EMT
SCOP1
INC
INC
CHp
BNE
SCOPE

R5,.R4
43
15

.BYTE

;PUT

“FOUND” IN R4

;OATA CORRECT?
;BR IF YES
;ALU ERROR
:SW09=1?
sNEXT DATA
;NEXT ADDRESS
;:DONE YET?

R2
RO
#10,R0
1s
0,-1,

;BR IF NO
1,

ROMCLK PC=5304

:BR _
AORB
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sMOVE BR TO PORT4
;PUT "EXPECTED” IN RS

1,125,

:SCOPE THIS TEST

1,252

ZOMC
MACRO v04.00
DMC11 ALV TESTS

031101
031104

377
377

SEQ 107

27-JUN-85 13:16:37 PAGE 27 68
125
252

377
.EVEN

shbbabbbbbbbstitbbbbbiittths

TEST

122

ssstbbsbbbbassttbbdbbssass

;#ALU TEST
saTEST OF ALU FUNCTION A XOR B WITH C BIT SET
;#ALU FUNCTION (A XOR B)
CODE=15
;+LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS
BRI

;
031106
031114
031122
021130
031132
031134
021140
021144
031146
031152
031154
031160

031166

031172
031174

031176

031204
031210
031212
031214
031216
031220
031222
031226
031230
031232
031234
031236
031240
031242
031246
031250
031252
031255
031260
95

012737

012737
012737
104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040720
104414
061224
111205
116104
120504
0014901
104015
104401
005202
005200
022700
001342
104400
000
000
377

000122
031262
031154

001226
001216
001220

TST122:

MOV
MOV
MOV

CLR

MOV

JSR

MEMDAT
JSR

034762

035040
000017
031174

031174

1s:

000017
031212

031212

ROMCLK
010000

BIC

3s:

000004

000010

377
000
000

SPDAT
JSR
BIC

8IS
2s:

Ss:

22 RS

ITTTTYYYY

#122,TSTNO
#TST123,NEXT
#1s,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

;MASTER CLEAR DMC11i

;:MEM + SP ADDRESS

#5% ,R2

;POINTER TO CORRECT DATA

PC,SPLD

;POINTER TO DATA
;LOAD 8 WORDS OF SP

PC . MEMLD

PC,SETC
817,28

RO,23%

#17,3¢

;LOAD 8 WORDS OF MAIN MEMORY

;POINTER TO DATA
;SET C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION

;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION,
;LOAD MAR

;MOVE BR TO PORT4
;PUT “EXPECTED” IN RS
;PUT “FOUND” IN R4

BEQ

;BR IF YES

CcHMPB

RS ,R4

emM7

;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC-5304
;BR _ A XOR B
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304

:DATA CORRECT?
:ALU ERROR

SCoP1
INC
INC

R2
RO

SCOPE
.8BYTe

;SCOPE THIS
0,-1,-1,0,0,-1,-1,0

#10,R0
13

ROMCLK PC=5304

sCLEAR ADDRESS OF INSTRUCTION

81S
RO,3s
ROMCLK
040400!<15+20>
ROMCLK
61224
MOV8
(R2),RS
MovB
4(R1),R4

CMP
BNE
377
377

TEST 122

MSTCLR
031252
034726

:SW09=1?
;NEXT DATA
;NEXT ADDRESS

;:DONE YET?
;BR IF NO

TEST

.EVEN

ihski bbdsbhdbbihhkbhbbhdhsbss

TEST

123

stskrbsbdssbhbbkbbbdbsbdsdsts

;#ALU TEST
;#TEST OF ALU FUNCTION ADD WITH C BIT SET

czomC
MACRO V04,00
DMC11 ALU TESTS

SEQ 108

27-JUN-85 13:16:37 PAGE 27-69

ssALU FUNCTION (A PLUS B)
CODE=00
;sLOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;sPERFORM THE FUNCTION, VERIFY THE RESULTS

031262
031270
031276

012737
012737
012737

031304
031306
031310
031314
031320
031322
031326
031330
021334
031342
031346
031350
031352
031360
031364
031366
031370
031372
031374
031376

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040400
104414
061224
111205
116104

031402
031404
031406
031410
031412
031414
031416

031422
031424
031426
031431
031434

120504
001401
104015
104401
005202
005200
022700
001342
104400
000
376
377

000123
031436
031330

001226
001216
001220

157123:

LIRS R

TEST

MOV
MOV
MOV

T TE L

CLR

MoV

034762
035040
000017
031350

000017
031366

031350

031366

1s:

2%:

3s:

000004

377
377

5$:

TTYIYTM

#123,TSTNO
4757124 ,NEXT
#1%,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

&5%,R2

PC,MEMLD

PC,SPLD
PC,SETC
#17,2¢
RO,2$

sMASTER CLEAR DMCi1

;MEM « SP ADDRESS

;POINTER TO CORRECT DATA

;:LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;:LOAD 8 WORDS OF sSP
;sPOINTER TO DATA
:SET C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR

BIC
917,38
BIS
RO,3$
ROMCLK
040400 <00+20>
ROMCLK
61224
Move
(R2),RS

;NEXT WORD IS INSTRUCTION,
:BR _ ADD
sNEXT WORD IS INSTRUCTION,
:MOVE BR TO PORT4
;PUT "EXPECTED” IN RS

CcMPB

;DATA CORRECT?

HMove

4(R1),R4

BEQ
EMT
SCoP1
INC
INC

44
15

BNE
SCOPE
.BYTE

CcHP

000010

377
252
124

JSR
MEMDAT
JSR
SPDAT
JSR
BIC
BIS
ROMCLK
010000

123

MSTCLR

021426
034726

RS,R4

R2
RO

#10,R0

;:CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
ROMCLK PC-5304

ROMCLK PC=5304

:PUT "FOUND” IN R4
;:BR IF YES
;:ALU ERROR
;SW09=1?
:NEXT DATA
sNEXT ADDRESS

;:DONE YET?

;BR IF NO
;SCOPE THIS TEST
0,-1,-1,376,252,-1,-1,124

.EVEN

shbbbddbhbbdbhbbhbhbhkhithhksd

TEST

124

ssbhddsdsdtskbissbbbstbddin

;#ALU TEST
;#TEST OF ALU FUNCTION 2A W/C WITH C BIT SET
;#ALU FUNCTION (A PLUS A PLUS C)
CODE=6
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS

R Yy
YT
YT T
T
I
Ty

:
031436

012737

000124

001226

TSTi24:

MOV

TEST 124
#124,TSTNO

CZimc
MACRO VO4.00
OMC11 ALV TESTS

031444
031452

012737
012737

031460
031462
031464
031470

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040540

031474
031476
031502
031504
031510
031516
031522
031524
031526
031534
031540
031542
031544
031546
031550
031552
021556
031560
031562
031564
031566
031570
031572
031576

031600

031602
031605
031610

031612
031504

001216
901220

"oV
Mov

4TST125,NEXT
91%,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

MSTCLR

031602
034726
034762
035040
000017
031524
000017
031542

031524

031542

1s:

2%:

3s:

104414

061224

111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
001
377
125

SEQ 109

27-JUN-85 13:16:37 PAGE 27-70

000004

000010

001
253
125

377
253

5$:

CLR
MOV
JSR
MEMDAT
JSR
SPCAT
JSR
8IC
8IS
ROMCLK
010000
8IC
BIS
ROMCLK

RO
#5%,R2
PC ,HEMLD
PC,SPLD
PC,SETC
€17,24
RO,2$

¢17,3$
RO,3s

040400!<6420>

sMASTER CLEAR DMC11

+MEM « SP ADDRESS
;POINTER TO CORRECT DATA
:LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;:LOAD 8 WORDS OF SP
:POINTER TO DATA
:SET C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:BR

_ 2R W/C

ROMCLK
61224
MovB
Move
CMPB
BEQ
EMT
SCoP1
INC
INC
o
BNE

R2
RO
#10,R0
1s

.BYTE

1,1,-1,-1,253,253,125,125

SCOPE

(R2),RS
4(R1),R4
R3,R4
43
15

:NEXT WORD IS INSTRUCTION,
;MOVE BR TO PORTA
;PUT "EXPECTED" IN RS
;PUT “FOUND” IN R4
;DATA CORRECT?
;:BR IF YES
;ALU ERROR
:SW09=1?
:NEXT DATA
:NEXT ADDRESS
;:DONE YET?
;BR IF NO

ROMCLK PC=5304

:SCOPE THIS TEST

.EVEN

shbbkbbbbbbbbbsbibhbibtbkbhihis

;%ALY TEST

TEST

125

atdkdktsdsbnhbbbddbdbdddddhs

;#TEST OF ALU FUNCTION SUB WITH C BIT SET
:*ALU FUNCTION (A-B)
CODE=16
;4LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS

031612
031620
031626

012737
012737
012737

031634
031636
031640
031644
031650

104412
005000
012702
004737
035052

000125
031766
031660

031756
034726

001226
001216
001220

TST125:

;

TEST 125

MoV
MOV
MOV
MSTCLR
CLR
Hov
JSR
MEMDAT

T IT

#125,TSTNO
#T5T126,NEXT
#14%,L0CK

;R1 CONTAINS BASE DMC11 ADDRESS

RO
#5¢,R2
PC,MEMLD

;MASTER CLEAR DMC11t
;MEM + SP ADDRESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA

MACRO V04.00
CZDMC
OMC11 ALV TESTS

031652
031656
031660
03166/
03167
031676
031700
031702
031710
031714
031716
031720
031722
031724
031726
031732
031724

031736
031740
031742
031744
031746
031752
031754
031756
031761
031764

004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040740
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
000
000
125

SEQ 110

27-JUN-85 13:16:37 PAGE 27-71

034762

035040
000017
031700

000017
031716

031700

031716

1s:

JSR
SPDAT
JSR
BIC
8IS
ROMCLK
010000

3s:

8IC
217,38
BIS
RO,3$
ROMCLK
040400!<16420>

MOvVB

377
253

5%:

;sNEXT WORD IS INSTRUCTION,

;MOVE BR TO PORT4
;PUT "EXPECTED” IN RS

(R2),R5

4(R1),R4

ROMCLK PC=5304

:PUT “FOUND" IN R4
;:DATA CORRECT?
;BR IF YES

cMPB
BEQ

R5,R4
48

SCOP1
INC
INC
CMP
BNE
SCOPE
.BYTE

;SW09=1?
R2
;NEXT DATA
RO
sNEXT ADDRESS
#10,R0
;:DONE YET?
1
;BR IF NO
:SCOPE THIS TEST
0,1,-1,0,0,253,125,0

EMT

000010

:LOAD MAR

;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:BR _ suB

ROMCLK

61224
MovB

44:

;LOAD 8 WORDS OF SP
;:POINTER TO DATA
:SET C BIT!
:CLEAR ADDRESS FIELD OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

PC,SETC
#17,2¢
RO,2$

2%:

000004

001
000
000

PC,SPLD

;ALU ERROR

.EVEN

idtbdbbbdhddbbbbhhibbhhtiihbs

;*ALU TEST

TEST

126

skskkbstbbssdbbddbdddddhdss

;#TEST OF ALU FUNCTION ADD W/C WITH C BIT SET
s#ALU FUNCTION (A PLUS B PLUS C)
CODE=01
:¢LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;«PERFORM THE FUNCTION, VERIFY THE RESWLTS

031766
031774
032002

032010
032012
032014
032020
032024
032026
032032
032034
032040
032046
032052
032054
032056

012737
012737

012737

104412
005000
012702
004737
035052
004737
035062

004737
042737
050037
104414
010000
042737

001126
032142
032034

001226
001216
001220

034762
032054

000017

032072

TST126: MOV
MoV
Mov

032132
034726

035040
000017
032054

1¢:

2%:

MSTCLR
CLR
MOV
JSR
MEMDAT
JSR
SPDAT
JSR
8IC
8IS
ROMCLK
010000
BIC

IR I

T FT

IR R

22 Py y ey

€126, TSTNO
ATST127,NEXT
414,L0CK
RO
#5%,R2
PC.MEMLD
PC,SPLD
PC,SETC
7,28
RO,2$

#17,3$

T ITTITITITTYTYYwe

;R1 CONTAINS BASE DMC11 ADDRESS

:MASTER CLEAR DMC11
:MEM + SP ADDRESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;:LOAD 8 WORDS OF SP
;POINTER TO DATA
;SET C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION

CZDMC

MACRO v04.00 27-JUN-8S 13:16:37 PAGE 27-72

DMC1: ALU TESTS

032064
032070
032072
032074
032076
032100
032102
032106
032110
032112
032114
032116
032120
032122
032126
032130
032132
032135
032140

050037
104414
040420
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400
001
377
000

032072
3s:

000004

48 :

000010
000
253
125

000
000

5¢:

81S
RO,3$
;ADD ADDRESS TO INSTRUCTION
ROMCLK
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
040400!<01420>
;BR
ADD uW/C
ROMCLK
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
61224
:MOVE BR TO PORT4
HMovBe
(R2),RS
;PUT "EXPECTED” IN RS
MOovVe
4(R1),R4
;PUT “FOUND” IN R4
CMPB
R5,R4
;DATA CORRECT?
BEQ
43
;:BR IF YES
EMT
15
;ALU ERROR
SCoP1
:SW09=17
INC
R2
;NEXT DATA
INC
RO
:NEXT ADDRESS
cHP
#10,R0
;:DONE YET?
BNE
1s
:BR IF NO
SCOPE
;SCOPE THIS TEST
.BYTE
1,0,0, 1,253,0,0,125

.EVEN

shhbhkbbbbddbbsbbdhhbbbihhnnd

;#ALU TEST

TEST

127

sbssdhbbhhhbbrbbbbbhbohdddd

;«TEST OF ALU FUNCTION SUB W/C WITH C BIT SET
s#ALU FUNCTION (A-B-C)
CODE=2
:%LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM 1HE FUNCTION, VERIFY THE RESULTS
kbbb bt bbbk dd

;
032142
032150
032156

012737
012737
012737

032164
032166
032170
032174
032200
032202
032206
032210
032214

104412
005000
012702
004737
035052
004737
035062
004737
042737

032226
032230
032232
032240
032244
032246
032250
032252
032254
032256
032262

104414
010000
042737
050037
104414
040440
104414
061224
111205
116104
120504

032222

050037

000127
032316
032210

001226
001216
001220

TST127:

032306
034726
034762
035040
000017

032230
000017
032246

032230

032246

1$:

24%:

3s:

000004

nbdbbhhkdh kbbb

kbbbt bbbk bbbk khhhdd bk

TEST 127

MOV
MOV
MoV
MSTCLR
CLR
MOV
JSR
MEMDAT
JSR
SPDAT
JSR
BIC

8IS

bbbk

#127,TSTNO
#TST130,NEXT
#14%,L0CK

;:R1 CONTAINS BASE DMC11 ADDRESS

RO
454 ,.R2
PC,MEMLD

PC,SPLD
PC,SETC
917,24

RO,.2$

ROMCLK
010000
BIC
#17,3¢
8IS
RO,3$
ROMCLK
040400 <2420>
ROMCLK
61224
MOove
(R2) K5
MOV
4(R1),R4
cMPB
R5,R4

sMASTER CLEAR DMC11i
sMEM + SP ADDRESS
;POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;LOAD 8 WORDS OF SP
;sPOINTER TO DATA
+SET C BIT!
;:CLEAR ADDRESS FIELD OF INSTRUCTION

sADD ADDRESS TO INSTRUCTION

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:LOAD MAR
sCLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sBR _ SuB W/C
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
s+MOVE BR TO PORT4
;PUT “EXPECTED” IN RS
;PUT “FOUND” IN R4
;DATA CORRECT?

@11

MACRO v04.00
CZ0MC
DMC1i ALV TESTS

032264
032266
032270
032272
032274
032276
032302
032304
032306
032311
032314

001401
1040135
104401
005202
005200
022700
001342
104400
000
000

125

27-JUN-85

4s:

000010

001

000

SEQ 112

13:16:37 PAGE 27-73

377
253

S5¢:

B8EQ
Ent
SCOP1
INC
INC
cHp
BNE
SCOPE
.BYTE

;BR IF YES

15
R2
RO
€10,RO

1¢
9,1,

;ALU ERROR
;:SW09=17
JNEXT DATA

;:NEXT ADDRESS
;DONE YET?

;:BR IF NO

;SCOPE THIS TEST

1,0,0,253,125.,0

.EVEN

100

shbbkb
kbhb
bhbhbdhbkd
bbh
dhhhik

TEST

130

shkbdsdiddndbdbbbibdddhtsbss

;%ALU TEST
;#TEST OF ALU FUNCTION INC A WITH C BIT SET
:*ALU FUNCTION (A PLUS 1)
CODE=3
;*LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA

;#PERFORM THE FUNCTION, VERIFY THE RESULTS
sihbkdbbbdbhhba kbbb kb kb hhkkhk kR

:
032316
032324
032332

012737
012737
012737

032340
032342
032344
032350
032354
032356
032362
032364
032370
032376
032402
032404
032406
032414
032420
032422
032424
032426
032430
032432
032436
032440
032442
032444
032446
032450
032452
032456
032460

104412
005000
012702
004737
035052
004747
035062
004737

042737
050037
104414
010000
042737
050037

104414

000130
032472
032364

001216
001220

TST130:

034762
035040
000017
032404

000017
032422

032404

032422

1¢:

2%:

3s:

000004

000010

TEST 130

MOV
MOV
MoV
MSTCLR
CLR
MOV
JSR
MEMDAT
JSR

032462
034726

040460

104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400

001226

Akhkkhkd bbb h bk kbbb kb At bbbk kb bk A

SPOAT

JSR

#130,TSTNO
#TST131,NEXT
#14,L0CK

;R1 CONTAINS BASE DMC1i ADDRESS

PC,SPLD

sMASTER CLEAR DMC11
;MEM + SP ADDRESS
;POINTER TO CORRECT DATA
iLOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;LOAD 8 WORDS OF SP

PC,SETC

;SET C BIT!

RO
454 ,R2
PC,MEMLD

;POINTER TO DATA

8IC
917,24
8IS
RO,2%
ROMCLK
010000
8IC
#17,3%
BIS
RO, 3%
ROMCLK
040400 <3420>
ROMCLK
61224

:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sLOAD MAR
sCLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;:BR _ INC A
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOVE BR TO PORT4

CMPB
BEQ
EMT
SCoP1
INC
INC
cMP
BNE
SCOPE

;:DATA CORRECT?
sBR IF YES
:ALU ERROR
:SW09=17
sNEXT DATA
sNEXT ADDRESS
1DONE YET?
:BR IF NO
;SCOPE THIS TEST

Mov8e
MOvVB

(R2) ,RS
4(R1),R4

RS,R4
4%
15

R2
RO
¢10,R0
1s

;PUT "EXPECTED" IN RS
;PUT "FOUND" IN R4

CZDOMC
MACRO VO4.00
OMC11 ALV TESTS

032462
032465
032470

001
000
253

SEQ 113

27-JUN-85 13:16-37 PAGE 27-74

001
126
253

000
126

5s:

-BYTE

1.1,0,0,126,126,253,253

.EVEN

101

shbbdbsbabhbinatbbbbsbdbbiais

TEST

131

ssdssbbbssbdabbsbbbbstnssns

:sALU TEST
;#TEST OF ALU FUNCTION 2A WITH C BIT SET
;#ALU FUNCTION (A PLUS A)
CODE=5
;sLOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;#PERFORM THE FUNCTION, VERIFY THE RESULTS
B

;
032472
032500
032506

012737
012737
012737

032514
032516
032520
032524
032530
032532
032536
032540
032544
032552
032556
032560
032562
032570
032574
032576
032600
032602
032604
032606
032612
032614
032616
032620
032622
032624

104412
005000
012702
004737
035052
004737
035062
004737
~
/37
¢.,0037
104414
010000
042737
050037
104414
040520
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200

032632
032634
032636
032641
032644

001342
104400
000
376
124

032626

102

022700

000131
032646
032540

001226
001216
001220

TST131:

032636
034726

034762
035040
000017
032560

000017
032576

13:

032560

032576

2s:

3s:

000004

000010
000
252
124

5%:

T IITTIIITYTYYY

TEST 131

MOV
MOV
MOV

€131,TSTNO
#TST132,NEXT
#1%,L0CK

MSTCLR
CLR
RO
MOV
454 ,R2
JSR
PC,MEMLD
MEMOAT
JSR
PC,.SPLD
SPDAT
JSR
PC,SETC
8IC
217,24
8IS
RO,2%
ROMCLK
010000
BIC
217,3¢
BIS
RO,3¢
ROMCLK
040400!<5220>
ROMCLK
61224
MOVe
(R2),RS
HMOVB
4(R1),.R4
cMPB
R5,R4
BEQ
44
EMT
'S5
SCOP1
INC
R2
INC
RO

CHMP

376
25¢

BNE
SCOPE
.BYTE

#10,R0
1

;R1 CONTAINS BASE DMC11 ADDRESS

;MASTER CLEAR DMC11
:MEM + SP ADDRESS
;POINTER TO CORRECT DATA
:LOAD 8 WORDS OF MAIN MEMORY
;:POINTER TO DATA
sLOAD 8 WORDS OF SP
;POINTER TO DATA
;SET C BIT!
;CLEAR ADDRESS FIELD OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
tBR _ 2A
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORT4
;PUT “EXPECTED“ IN RS
;PUT "FOUND” IN R4
:DATA CORRECT?
;BR IF YES
;ALU ERROR
;SW09=1?
;sNEXT DATA
sNEXT ADDRESS

;:DONE YET?

;B8R IF NO
:SCOPE THIS TEST
0,0,376,376,252,252.124,124

.EVEN

ihbhdddd
bbb kbbsshbibhbssbdd

;#ALU TEST

TEST

132

sesstssbssnkdbdssdbidbssssn

CZDOMC
MACRO V04.00
DMC11 ALU TESTS

SEQ 114

27-JUN-8S 13:16:37 PAGE 27-75

;#TEST OF ALU FUNCTION A PLUS C WITH C BIT SET
;#ALU FUNCTION (A PLUS C)
CODE=4
;#LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;sPERFORM THE FUNCTION, VERIFY THE RESULTS

388580
A0 440kt04
bibbbbbRkb
08
bb bbb 40
bhddbbbbdit
k
dhids

;
032646
032654
032662

012737
012737
012737

032670
032672
032674
032 00
032704
032706
032712
032714
032720
032726
032732
032734
032736
032744
032750
032752
032754
032756
032760
032762
032766
032770
032772
032774
032776
033000
033002
033006
033010

104412
005000
012702
004737
035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040500
104414
061224
111205
116104
120504
001401
104015
104401
005202
005200
022700
001342
104400

033012
033015
033020
103

001
000
253

000132
033022
032714

001226
001216
001220

TST132: MOV
MOV
MOV

033012
034726
034762
035040
000017
032734
000017
032752

1s:

032734

032752

24:

3¢:

000004

44:
000010

001
126
253

000
126

TEST 132

5¢:

#132,TSTNO
@TST133,NEXT
#1%,L0CK

MSTCLR
CLR
RO
MOV
458,R2
JSR
PC,MEMLD
MEMDAT
JSR
PC,SPLD
SPDAT
JSR
PC,SETC
BIC
€17,24
BIS
RO,2$
ROMCLK
010000
8IC
917,38
8IS
RO,3$
ROMCLK
040400!<4420>
ROMCLK
61224
MOVB
(R2),RS
MoV
4(R1),R4
CMPB
RS.R4
8EQ
43
EMT
15
SCoP1
INC
R2
INC
RO
cHP
#10,R0
BNE
1s
SCOPE

.BYTE

:R1 CONTAINS BASE DMC11 ADDRESS

;MASTER CLEAR DMC11
:MEM + SP ADDRESS
:POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
:LOAD 8 WORDS OF SP
;POINTER TO DATA
:SET C BIT!

;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION
:ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;BR _ A PLUS C
:NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOYE BR TO PORT4
;PUT “EXPECTED" IN RS
sPUT "FOUND” IN R4
;DATA CORRECT?
iBR IF YES
;ALU ERROR
:SW09=17?
;NEXT DATA
:NEXT ADDRESS
sDOONE YET?
:BR IF NO
;SCOPE THIS TEST
1,1.0,0,126,126,253,253

.EVEN

;ahbbbbbsbbbkbdtshhbbbdibbns

TEST

133

stsrtssdissddsdasbidddidttnsd

;#ALU TEST
;#TEST OF ALU FUNCTION 2'S COMP SUB WITH C BIT SET
;#ALU FUNCTION (A-B-1)
CODE=17
:4LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA

;#PERFORM THE FUNCTION,

VERIFY

THE RESULTS

FihAAARASRASRARASA
AR AAAEARAAAREREAA0s
b0t 000408000008 00004000

;

TEST 133

MACRO V04.00
czomc
DOMC11 ALU TESTS

033022
033030
033036

012737
012737
012737

033044
033046
033050
033054
033060
033062
033066
033070
033074

104412
005000
012702
004737
035052
004737
035062
004737
042737

033102

033106
033110
033112
033120
033124
033126

050037

104414
010000
042737
050037
104414
040760

033130
033132
033134
033136
033142
033144
033146

104414
061224
111205
116104
120504
001401
104015

033152
033154

005202
005200

033162
033164
033166
033171
033174

001342
104400
377
377
124

033150

033156

000133
033176
033070

001226
001216
001220

TST133:

033166
034726

034762
035040
000017
033110
000017
033126

033110

033126

1¢:

24:

000004

4 :

000010

000
377
377

MOV
MOV
MoV

€133,TSTNO
#T5T134
, NEXT
e18,L0CK

MSTCLR
CLR
MOV
JSR
HEMDAT
JSR
SPDAT
JSR
8IC

RO
#5% ,R2
PC,MEMLD

PC,SPLD
PC,SETC
#17,2¢
RO,2¢

8IS

3s:

104401

022700

SEQ 115

27-JUN-85 13:16:37 PAGE 27-76

ROMCLK
010000
BIC
#17,3%
BIS
RO,3$
ROMCLK
040400!<17+20>

ROMCLK
61224
MOvVBe
MOv8
cMPB
BEQ
EMT

(R2),RS
4(R1),R4
R5,R4
43
15

INC
INC

R2
RO

BNE
SCOPE
.BYTE

sCor1

cHp

376
252

5%:

€10,R0

;R1 CONTAINS BASE DMC11 ADDRESS
:MASTER CLEAR DMC11
;MEM + SP ADDRESS
:POINTER TO CORRECT DATA
;LOAD 8 WORDS OF MAIN MEMORY
;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
:SET C BIT!
;:CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION

;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:BR _ 2'S COMP SUB
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;MOVE BR TO PORTA
;PUT "EXPECTED” IN RS
;PUT

“FOUND” IN R4

;OATA CORRECT?
;:BR IF YES
;ALU ERROR
:SW09=1?
;NEXT DATA
sNEXT ADDRESS
;OONE YET?
:BR IF NO
;:SCOPE THIS TEST

-1,0,376,-1,-1,252,124,-1

.EVEN

104

(8884000004000

00000000k0sks

TEST

134

stsddssddssbididbbsdbdsssss

;#ALU TEST
;#TEST OF ALU FUNCTION DEC A WITH C BIT SET
;#ALU FUNCTION (A-1)
CODE=7
:«LOAD MAIN MEM AND SP WITH 8 WORDS OF DATA
;«PERFORM THE FUNCTION, VERIFY THE RESULTS

033176
033204
033212

012737
012737
012737

033220
033222
033224
033230

104412
005000
012702
004737

000134
033352
033244

033342
034726

001226
001216
001220

TST134:

TEST 134

MOV
MoV
MOV
MSTCLR
CLR
MoV
JSR

T Y

YT T TT

9134, TSTNO
#TST135,NEXT
#14,L0CK

454 ,R2
PC,MEMLD

;R1 CONTAINS BASE DMC11 ADDRESS
;MASTER CLEAR DMC11

sMEM « SP ADDRESS

;POINTER TO CORRECT DATA
:LOAD 8 WORDS OF MAIN MEMORY

MACRO V04.00
CZOMC
OMC11 ALV TESTS

033234
033236
033242
033244
033250
033256
033262
033264
033266
033274
033300
033302
033304
033306
033310
033312
033316
033320
033322
033324

033326
033330
033332
033336
033340
033342

033345

033350

035052
004737
035062
004737
042737
050037
104414
010000
042737
050037
104414
040560
104414
061224

111205
116104
120504
001401
104015
104401
005202
005200

022700
001342
104400
377
376
251

SEQ 116

27-JUN-85 13:16:37 PAGE 27-77

034762

035040
000017
033264
000017
033302

033264

033302

1¢:

2%:

PC,SETC

8IS

RO,2¢

81IC

ROMCLK
010000
8IC

8IS

4%:

000010
376
124

5%:

PC.SPLD

017,28

cMPB
BEQ
EMT
SCOP1
INC
INC
CMP
BNE
SCOPE
.BYTE

;POINTER TO DATA
;LOAD 8 WORDS OF SP
;POINTER TO DATA
;:SET C BIT!

;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;LOAD MAR
;CLEAR ADDRESS OF INSTRUCTION

017,38
RO,3$

ROMCLK
040400!<7420>
ROMCLK
61224
MOVB
(R2),R5

Move

000004

377
124
251

HEMDAT
JSR
SPDAT
JSR

4(R1),.R4

R5,R4
44
15

;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION,
sBR _ DEC A
:NEXT WORD IS INSTRUCTION,
:MOVE BR TO PORTA
;PUT “EXPECTED” IN RS

ROMCLK PC=5304
ROMCLK PC=5304

;PUT "FOUND* IN R4

;iDATA CORRECT?
;BR IF YES
;ALU ERROR
:SW09=1?
R2
;NEXT DATA
RO
sNEXT ADDRESS
#10,R0
;:DONE YET?
13
;BR IF NO
;SCOPE THIS TEST
-1,-1,376,376,124,124,251,251

.EVEN

105

ishsbb bbb bbsbbbbdbbbdbbiids

TEST

135

ssdssdadstddbsbhsnntossssss

;sTEST OF PROGRAM CLOCK BIT
;%00 A MASTER CLEAR, WRITE THE PROGRAM CLOCK BIT TO A ONE,
;sVERIFY THAT IT CLEARS, AND THEN SETS SOME TIME LATER

;

T T

T YT vrywre

TEST 135

foeremcmmmnn———

033352
033360

012737
012737

033366
033370
033374
033400
033404
033412

104412
005037
005037
012702
012764
152761
012761
152761
012761
152761
142761
016104
005005
120504

033420
033426
033434
033442
033450
033456
033462
033464
033466

001401

000135
033544
001416
001246
000011
000020
000002
121111
000003
121224
000003
000003
000004

001226
001216

TST135: MOV
MOV
MSTCLR
CLP

000004
000001
000006
000001
000006

000001
000001

1¢:

CLR
MOV
MoV

B8ISB

#135,TSTNO
#TST136,NEXT

;R1 CONTAINS BASE OMC11 ADDRESS

TEMP
TEMPL
¢11,R2
#20,4(R1)

eIT1,1(R1)

sMASTER CLEAR DMC11
sPREPARE FOR

:DELAY
sSAVE FOR TYPEQUT
;LOAD PORT 4

1SET ROMI

MOV
81sB
MoV

#121111,6(R1)
;SEL6 _ INSTRUCTION
#8IT1!8I70,1(R1);SET CLOCK BIT
#121224,6(R1)
;LOAD NEXT INSTRUCTION

8ICB

®BIT1!B8IT0,1(R1);CLEAR MAINT BITS

B8ISB
MoV

CLR
CMPB
8EQ

#8IT71!8170,1(R1);READ CLOCK BIT

4(R1),.R4

RS
RS,R4
28

;PUT “FOUND* IN R4

;PUT “EXPECTED" IN RS
;IS PGM CLOCK CLEAR?

CczomC
MACRO V04.00
DMC11 ALV TESTS

106

ggg:]’g

104016

033472
033474
033476
033504
033506
033514
033520
033526
033530
033534
033540
033542

104414
121224
122761
001416
062737
005537
022737
001361
012705
016104
104016
104400

SEQ 117

27-JUN-85 13:16:37 PaGE 27-78

000020
000001
001246
000006

EMT
ROMCLK
121224
CcMP8

000004
001416

001246

000020
000004
34

BEQ
ADD
ADC
CHp
BNE
MoV
MOV
EMT
SCOPE

;ERROR, PGM CLOCK IS NOT CLEAR

#20,4(R1)

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;PORT4 _LU11
;IS PGM CLOCK SET?

3
#1,TEMP
TEMP1
96, TEMP1
23
#20.R5
4(R1),R4
16

:BR IF YES
; INCREMENT DELAY
; INCREMENT DELAY

:IS DELAY DONE
:BR IF NO
:PUT “EXPECTED” IN RS
;PUT "FOUND* IN R4
;ERROR PGM CLOCK NOT SET
:SCOPE THIS TEST

shstdkbhbsbsdisbtniesbdtddds

TEST

136

stsdsbdssssdssssbsbnsbsstss

;#FORCE POWER FAIL TEST
+#SET FORCE POWER FAIL BIT VERIFY THAT PROCESSOR TRAPS TO 24
;#GOING DOWN AND COMING UP. VERIFY ALSO THAT BUS INIT WAS
:#BLOCKED FROM GETTING TO THE DMC DURING TH® POWER FAIL
1#THIS TEST MAY HANG ON SOME PROCESSORS IF AN M9301 IS PRESENT.

1370 AVOID HANGING SWO2 (POWER ON REBOUT ENABLE) ON THE M9301
+sMUST BE IN THE OFF POSITION. THIS TEST WILL ALSO FAIL IF THE
:sCPU POMER FAIL VECTOR IS SET TO ANY LOCATION OTHER THAN 24.
1sIF THIS TEST HANGS OR FAILS DUE TO EITHER REASON ABOVE THE

isFOLLOWING PATCH MAY BE INSTALLED TO SKIP THIS TEST:

LOC 33362

Fi80 804040 RE

WAS 33544
AERR AL

S8 33736
AAAARE RS0 AR

tktiadbitts

TEST 136

jo--ecmcmeceana

033544
033552

012737
012737

033560
033562

104412
005037

033566

013746

000136
033766

000024

012737
012761
012711
012761
012711
005237
001375

033636
000002
001000
121111
001400
001416

033636
033644
033650

012737
010637
000000

033654
033652

033654
033660
033662
03%666
033674

013706
022626
012637
022737
001406

033652

104017
000426

000000

TST136: MOV
MOV
MSTCLR
CLR

001416

033572
033600
033606
033612
033620
0336c4
033630

033632
033634

001226
001216

000024
005336

MOV

000024
000004

000006
5%:

000024

13:

24:
3:
000024

MOV
MOV
MOV
MOV
MOV
INC
BNE

EMTY
B8R

HOV
MOV
HALT

MOV
POP2SP
MOV
cHp
BEQ

#136,TSTNO
#TST137, NEXT
TEMP

9024, -(SP)

1R1 CONTAINS BASE OMC11 ADDRESS

tMASTER CLEAR DMC11i
;PREPARE FOR DELAY

1STORE POWER FAIL ADDRESS

14,0024
:SET UP FOR FORCE POWER FAIL
2,4(R1)
1LOAD PORT4
#8179,(R1)
$SET ROMI
€121111,6(R1)
;LOAD INSTRUCTION
#8IT9:8I78,(R1) ;CLOCK INSTRUCTION
TEMP
sWAIT FOR POMER FAIL
54
18R _IF DELAY NOT DONE

17
43

1ERROR, NO POWER FAIL

34,0024
SP,24

1PONER UP ADDRESS
1STORE STACK
sWAIT FOR POWER UP SEQUENCE

2¢,5pP

sRESTORE STACK
sPOP STACK TWICE
+RESTORE TRUE POWER FAIL ADDRESS
+IS IT CORRECT?
sBR IF YES

(SP)+, 0024
. PFAIL, 9424
43

C20MC
MACRO vO4 OO0
OMCi1 ALU TESTS
033676
033700

033706

033712
033716
033720
033724
033726
0°%730
033732
033734
033736
033742
033746
033752
033756
033760
033762

07 033764

104017
012737

012706

005737
001407
012701
005007
005300
001375
005301
001373
013701
012711
012705
016104
020504
001401
104025

SEQ 118

27-JUN-8S 13:16-37 PAGE 27-79

005336

001200

000024

000042

000140

64:
8s:

001404
0C3000
121111
000004

104400

EMTY
411"

17
9.PFAIL 3024

18T
BEQ
MoV
CLR
DEC
BNE
DEC
BNE
MOV
MOV
MOV
MOV
cHP
BEQ
EMT

04?2
; CHECK FOR ACT-11 OR DODP
7s
4140, Ri
RO
; DELAY TO WAIT FOR RKOS TO BECOME
RO
; READY AFTER POWER FAIL
8s
Rl
€s
DMCSR,R1
;RESTORE ADDRESS. R1 CLOBBERED ON 11/84 PWRFAIL
#BIT9!BITI0,(R1);SEL6 = MAINT IR
£121111,R5
;RS = EXPECTED
4(R1),R4
;R4 = FOUND
RS5.R4
sMAINT IR SHOULD = 12111
.+4
;BR IF 0K
25
;IF = 0 THEN BUS INIT WAS

MoV

#STACK ,SP

:ERROR, STACK IS INCORRECT
sPESTORE TRUE POWER FAIL ADDRESS
;RESTORE

STACK

;NOT BLOCKED FROM CLEARING
;THE DMC-11%
;SCOPE THIS TEST

SCOPE

;8884580000004 000080dkkbbbda

TEST

137

sssddtdsssssbhsbibbbbbbsbdsss

;sMICRO-PROCESSOR NOISE TEST
s#WRITE ALL ZERO'S THEN ALL ONE'S THEN A DATA PATTERN
;470 THE IBUSs AND IBUS REGISTERS AND TO THE SP AND MAIN MEM
;«THEN GO BACK AND READ THE DATA PATERNS
TO VERIFY THAT
;#READING AND WRITING OF OTHER LOCATIONS AND REGISTERS
;#DID NOT CHANGE THE DATA.

$:8088
0004500000
480
0 ddbbbbbbbbb
844
hhhbbiibbbi
080
ibhdtbihhbk
400
hsk

s
033766
033774

012737
012737

034002
034004
034006
034014
034022
034030
034032
034034
034036
034042
034044
034046
034054
034062
034070
033074

104412
005002
042737
156237
116261
104414
121100
005202
022702
001361
005002
042737
C42737
042737
050237
050237

034100
034104
034110
034112

050237
105061
104414
122100

000137
003364

000017
034626
034634

001226
001216

034032
034032
000004

TST137:

1s:

2%:

000005
000017
000017
000017
034112
034124

034112
034124
034134

3s:

034134
000004

TEST 137

MOV
MOV
MSTCLR
CLR
B8IC
B8ISB
MOVB
ROMCLK
121100
INC
cMP
BNE
CLR
BIC
81C
8IC
BIS
BIS
BIS
CLRB
ROMCLK
122100

#137,TSTNO
#.E0P NEXT

;R1 CONTAINS BASE DMC11 ADDRESS

217,28
30$(R2),28
31%(R2),4(RY)
R2
85.R2
13
R2
817,44
€17,5%
£17,6%
R2,4%
R2,5%
R2.6%
4(R1)

;MASTER CLEAR OMC11
;R2 IS INDEX REGISTER
;CLEAR ADDRESS FIELD
;ADD IBUS# REG ADDRESS TO INSTRUCTION
;LOAD PORT4
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;WRITE IBUSs REGISTER
:INC INDEX REGISTER
;DONE YET?
;BR IF NO
sR2 IS IBUS REGISTER ADDRESS
sCLEAR ADDRESS FIELD OF INSTRUCTIONS
;ADD IBUS REG ADDRESS TO INSTRUCTION

;CLEAR PORTS
sNEXT WORD IS INSTRUCTION,

;WRITE O TO IBUS REG

ROMCLK PC=5304

CIOMC
MACRO VO4.00
OMC11 ALY TESTS
034114
034122
034124
034126
034132
034134
034136
034140
034144
034146
034150
034136
034164
034172
034176
034202
034206
034212
034214
034216
034224
034226
024230
024234
034236
0343240
034242
034246
034250
034252
034254
034256
034262
034264
034266
034274
034276
034300
034304
034306
034310
034312
034316

112761
104414
122100
110261
104414
122100
005202
022702
001340
005002

042737

042737
042737
050237
050237
050237
105061
104414
123100
112761
104414
123100
110261
104414
123100
005202
022702
001340
005002
104414
010000
105061
104414
122500
112761
104414
122500
110261
104414
136500
005202
022702
001357

SEQ 119

27-JUN-8S 13:16:37 PAGE 27 80
000377

000004

MOVB

4377.4(R1)

ROMCLK

Ss:

000004

MOV
ROMCLK

000010

000017
000017
000017
034214
034226
034236
000004

000377

034214
034226
034236

78:

122100
INC
cHp
BNE
CLR
B8IC
8IC
BIC
BIS
81S

BIS
CLRB

ROMCLK

8s:

000004

123100

HMovB

9s:

000004

ROMCLK
123100

MOVB
ROMCLK

10¢:
000020

000004

000377

122100

11s¢:

123100

INC

cMP
BNE
CLR
ROMCLK
010000
CLR]

ROMCLK

122500

000004

#10,R2

€17,8%
®17,9¢
€17,10¢
R2.8%

R2,9¢
R2,10$
4(R1)

#377,4(R1)

R2,4(R1)

€20,R2

7
R2

4(R1)

MOVB
ROMCLK

R2.4(R1)

INC
cMP
BNE

sWRITE ALL ONES TO IBUS REG

R2
#400,R2
114

ROMCLK PC=5304

;:LOAD PORT4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;WRITE ITS OWN ADDRESS TO IBUS REG
:NEXT ADDRESS

;:DONE YET?
;BR IF NO

;START AT SP ADDRESS 0

:CLEAR

ADDRESS FIELD

;ADD ADDRESS TO INSTRUCTION

:CLEAR PORT4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;WRITE ZERO TO SP

:LOAD PORT4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sWRITE ALL ONES TO SP

;:LOAD PORTA

;NEXT WCRD IS INSTRUCTION, ROMCLK PC=5304
;WRITE SP ADDRESS TO ITSELF

:NEXT SP ADDRESS
;:DONE

YET?

;B8R IF NO
;R2 = MAIN MEM ADDRESS
;:EéT HgRD IS INSTRUCTION,

ROMCLK PC-5304

;CLEAR PORT4

;NEXT WORD IS INSTRUCTION,

#377,4(R1)

136500

000400

Mov8
ROMCLK

122500

000004

R2.4(R1)

sLOAD PORT4
sNEXT WORD IS INSTRUCTION,

sWRITE ZEROS TO MEM

ROMCLK PC=5304

;LOAD PORT4

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;WRITE ONES TO MEM

;LOAD PORT4

sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304
;WRITE TO MEM IT OWN ADDRESS

:NEXT MEM ADDRESS
;DONE YET?
i8R IF NO

;NOW GO BACK AND READ EVERYTHING
034320
034322
034324
034332
034334
034336
034340
034342
034350
034354
034356

104414
010000
032737
001402
104414
004000
005000
042737
116002
010203
006303

100000

000360
034626

001366

034400

12%:

ROMCLK
010000
BIT
BEQ
ROMCLK
4000
CLR
BIC
MOov8
MOV
ASL

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304

#BIT15,5TATL
.+6

sMAR_O

;OMC?

:BR IF YES

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
sMAR HI _ O (KMC ONLY)

RO
#360,13%

;RO IS INDEX REGISTER
;CLEAR ADDRESS FIELD

R2,R3
R3

;PUT IBUS+« ADDRESS IN R3
;SHIFT ADDRESS TQ BITS 4-7

30$(R0O),R2

;R2 = IBUSs ADDRESS

CIOMC
MACRO VO4.00
DMCi11 ALU TESTS
034360
034362
034364
034366
034372
034376

034400
034402

034406
034410
034412
034414
034416
034422
034424
034426
034434
034436
034440
024442

034444
034446
024432

0344354
034456
034460
034464
034466
034470
034472
034474

034500
034502
034504
034512
034516
034520
034522
034524
034526
034530
034534
034536
034540
034542
034544
034550
034552
034554
034756
034360
034566
034570
034572
034574
034576
034600

006303
006303
006303
050337
116005
104414

121004
016104
120504
001401
104004
005200
022700
001347
005002
042737
010203
006303
006303
006303
006303
050337
010205
104414
021004
016104
120504
001401
104005
005202
022702
001352
005002
042737
050237
104414
040600
010205
104414
061224
016104

120504
001401

104007
005202
022702
001355
005002
104414
010000
032737
001402
104414
004000
010205
104414
055224

SEQ 120

27-JUN-85 13:16:37 PAGE 27 81

034400
034634

13s$:

000004

000005

000360

034456

14s:

034456
15¢:

000004

000010

000017
034520

034520

16%:
17s:

000004

121004
MOV
CHPB
BEQ
EMT
INC
cHp
BNE
CLR
8IC
MOV
ASL
ASL
ASL
ASL
8IS
MOV
ROMCLK
021004
MoV
CMPB
BEQ
EMT
INC
cMpP
BNE
CLR
8IC
BIS
ROMCLK
040600
MOV
ROMCLK
061224
MoV

CcMPB
BEQ

000020

100000

ASL
ASL
ASL
BIS
HMovB
ROMCLK

001366

18s:

EMT
INC
CMP
BNE
CLR
ROMCLK
010000
817
BEQ
ROMCLK
4000
MoV
ROMCLK
055224

R3
R3
R3
R3,13s

31$(RO).RS

;RS =

"EXPECTED”

iNEXT WORD IS INSTRUCTION, ROMCLK PC=530a
;:PORT4 _ IBUS& REGISTER

4(R1),R4
R5.R4

;R4 = “FOUND"
:IBUS* CONTENTS OK?
;:BR IF YES

.+4

:IBUSs DATA ERROR

;INC COUNTER

#5,R0
12$
R2
4360,15$
R2,R3
Rg

;DONE YET?
:BR IF NO
;R2 = IBUS REG ADDRESS
;:CLEAR ADDRESS FIELD OF INSTRUCTION
:R3 = IBUS ADDRESS
;SHIFT ADDRESS TO BITS 4-7

R
R3
R3
R3,15%
R2,R5

;ADD ADDRESS TO INSTUCTION
;RS = "EXPECTED”

;NEXT WORD IS INSTRUCTION,
;:PORT4 _ IBUS REG

4(R1),R4

R5,R4
.+4
S
Re
#10,R2
14
R2
#17,17¢
R2,17¢

;AD. ADDRESS TO INSTRUCTION

;R4 =

ROMCLK PC=5304

"FOUND"

1 1BUS CONTENTS 0K?
;BR IF YES
;:IBUS DATA ERROR
;NEXT IBUS REGISTER
;O0ONE YET?
:BR IF NO
:R2 = SP ADDRESS
;CLEAR ADRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION

:ngT ggRD IS INSTRUCTION, ROMCLK PC=5304

R2.RS

4(R1).R4
RS .R4
.+4
7
R2
#20,R2

16
R2

;RS =

"EXPECTED”

;NEXT WORD IS INSTRUCTION,
;:PORT4 _ BR

ROMCLK PC=5304

;R4 = "FOUND*
;:SP CONTENTS 0OK?
;BR IF YES
:SP DATA ERROR
;NEXT SP LOCATION
;DONE YET?

;:BR IF NO
;R2 = MEMORY ADDRESS

;NEéT HgRD IS INSTRUCTION, ROMCLK PC-5304
iMAR

#IT15,5TAT1
.+6

;OMC?
;BR IF YES

R2.RS

;MAR HI _ O (KMC ONLY)
;RS = "EXPECTED"”

:NEXT WORD IS INSTRUCTION,

ROMCLK PC=5304

sNEXT WORD IS INSTRUCTION,
;PORT4 _ MAIN MEM

ROMCLK PC=5304

czomc
MACRO VO4.00
OMCL1 ALU TESTS
034602
034606
034610

034612

034614
034616

016104

120504
001401
1C4013
005202
022702
001364
104400

MOV

000004

cmPB
BEQ

EMT
INC

000400

034631

000
005

002
010

003

30%:

cMp
BNE
SCOPE
.BYTE

034634
034637

001
006

003
010

004

.EVEN
31s:

.BYTE

034622

034624

034626

110
i11
112
113
114
115 034642
116
117
118 024642
119 024646
120 034652
121 034656
122 034662
123
124

134 034706
135 034710
136 034712
137 034714
138 034720
139 034722
140 034724

141
142
143 034726
144
145
146
147 034726
148 034730
149 034734
150 034740
151 034742
152 034744

13
R2
#400,R2
18

0,2,3.5.10

1.3.4,6,10

iR& =

"FOUND*

sMAIN MEM CONTENTS OK?
;BR IF YES

;MAIN MEM DATA ERROR
sNEXT MEM ADDRESS
;DONE YET?
;BR IF NO
;SCOPE THIS TEST

; SUBROUTINES
SETVEC:

012577
012577
112577
112577
000205

144526
144526
144520
144520

; THIS SUBROUTINE LOADS THE VECTORS AND VECTOR LEVELS
MOV

MOV

MOVB
MovB
RTS

(R5)+,8DMRVEC

(RS5)+ ,8DMTVEC

(R5)+, 8DMRLVL
(R5)+,3DMTLVL
RS

;LOAD BASE VECTOR

;LOAD VECTOR + 2

:LOAD VECTOR
;LOAD VECTOR
;RETURN

+ 4
+ 6

NPRSET:

; THIS SUBROUTINE LOADS IBUS REGISTERS 0-7
sWITH NPR INFORMATION (INBA, OUTBA, OUT DATA)

127

129 034664
130 034666
131 034670
132 034674
133 034702

4(R1),.R4

RS .R4
.+4

LEVEN

125 034664
126

128

SEQ 121

27-JUN-85 13:16:37 PPGE 27-82

010246
005002
112561
042737
050237
104414
122100
005202
022702
001363
012602
000205

MOV

000004
000017
034710

034710

1¢:

28:

CLR
MOove

BIC
BIS
ROMCLK

;SAVE R2

#17,2¢
R2.2%

;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
sNEXT WORD IS INSTRUCTION, ROMCLK PC=5304

R2
#10,R2
13
(SP)+,R2

;NEXT ADDRESS
;ALL DONE?
;BR IF NO
;RESTORE R2

122100

INC
cMP
BNE
MOV

000010

R2,-(SP)

Rr2
(R5)+,4(R1)

RTS

;START AT IBUS REG 0
;LOAD PORT4

;MOVE PORT4 TO IBUS REG

sRETURN

MEMLD:

; THIS SUBROUTINE LOADS THE FIRST 8 LOCATIONS OF MAIN
013605
062746
012704
104414
010000
112577

000002
000010

144442

:MEMORY WITH THIS DATA:

0,-1,,0,-1,125,252,125,252

MOV
ADD

;PUT POINTER TO DATA IN RS
;:ADJUST STACK

MOV

1$:

ROMCLK
010000
MovB

9(SP)+,RS
#2,-(5P)

#10,.R4

(R5)+,8DMPO4

;00 B LOADS

sNEXT WORD IS INSTRUCTION,
iMAR < O
;LOAD PORT4

ROMCLK PC=5304

CZOMC
MACRO VO4.00
OMC11 ALV TESTS

153 034750
154 034752
155 034754

156 034756

104414
136500
005304

000207

166
167
168
169

013605
062746
005004
112577
042737
050437
104414
123100
005204
022704
001363
000207

170
171
172
173

034762
034764
034770
034772

034776
035004
035010
035012

174 035014
175 033016
176 035022
177 035024
178
179
180 035026
lgé
1
183 035026
184 035030
185 035032

186 035034
187 035036
188
189
190 035040
191
192
193 035040
194 035042
195 035044
196 035046
197 035050

198
199
200 035052

ROMCLK
136500
DEC
BNE
RTS

001372

157 034760
158
159
162 034762
163
}g;

SPLD:

000002

144414
000017
035012

000010

104414
010000
104414
040400
000207
SETC:

104414
010003
104414
040403
000207
377

202
207
208
209
€10
€11

377
377
N
377
377

125
125
115
115
102

252

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOV DATA TO MEM, AUTO INC MAR
;DECREMENT COUNT
:BR IF NOT DONE

;RETURN

;THIS SUBROUTINE LOADS THE FIRST 8 SCRATCH PAD
;LOCATIONS WITH: 0.0, 1,-1,125,125,252,252
MOV
ADD
CLR
Move
8IC
BIS
ROMCLK
123100
INC
CMP
BNE
RTS

a(sP).,RS
&#2,-(5P)
R4
(R5).,30MP04
417,2%
R4 ,2$
R4
#10,R4
1
PC

;PUT POINTER TO DATA IN RS
sADJUST STACK
;START AT SP ADDRESS 0
:LOAD PORT4 WITH DATA

;CLEAR ADDRESS FIELD OF INSTRUCTION
;ADD ADDRESS TO INSTRUCTION
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:MOVE DATA TO SP
;INCREMENT COUNT
;:DONE YET?
;BR IF NO
;RETURN

:THIS SUBROUTINE CLEARS THE MICRO PROCESSOR C BIT

;NEXT WORD IS INSTRUCTION,
iMAR_O
;NEXT WORD IS INSTRUCTION,
;CLEAR C BIT
;RETURN

MEMDAT:

.BYTE

0,-1,0,-1,125,252,125,252

377
125

SPDAT:

.BYTE

0,0,-1,-1,125,125,252,252

.EVE
€EM1:
EM2:
EM3:
EM4:
EMS:

.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

<«377>/UNIBUS REGISTER ADDRESSING TIME-OQUT/
<377>/UNIBUS REGISTER WRITE, READ TEST/
<377>/MICRO PROCESSOR TEST/
<377>/MICRO PROCESSOR WRITE, READ TEST/
<377>/BR REGISTER TEST/

116
116
111
111
122

ROMCLK PC=5304

;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
iMAR_3
;NEXT WORD IS INSTRUCTION, ROMCLK PC=5304
:SET C BIT
:RETURN

000

252

ROMCLK PC=5304

;THIS SUBROUTINE SETS THE MICRO PROCESSOR C BIT

ROMCLK
010003
ROMCLK
040403!<0%20>
RTS
PC

125
252
000
125

252

R4
13
PC

ROMCLK
010000
ROMCLK
040400!<0420>
RTS
PC

377
125
000
377

035072
035137
035201
035227
035271

1s:

2%:

035055
035060
201 035062
035065
035070

035012

CLRC:

000

SEQ 122

27-JUN-B8S5 13:16:37 PAGE 27-83

czomc
MACRO V04.00
DMC11 ALU TESTS

212 035313
213 035335
214 035371
215 035435
216 035447
217 035471
218 035503

219 035515
220 035541
221 035571
222 035617
223 035652
224 035721
225
226 035760
227 036021
228 036057
229 036100
230 036142
231 036203
232
233
234 036240
235 036242
236 036244
237 036246
238 036250
239 036252
240 036254
241 036256
242 036260
243 036262
244 036264
245 036266
246 036270
247 036272
248 036274

249 036276

250 036300
251 036302
252 036304
253 036306
254 036310
255 036312
256 036314
257 036316
258 036320
259 036322
260 036324
261 036326
262 036330
263 036332
264 036334
265 036336
266 036340
267 036342
268 036344

377
377
377
377
377
377
377
377
377
377
377
377
377

125
104
115
120

103
105
105
120
101
101
114
122
117
116
115
101
117

377
377
377
377
377
377

122
105
105
105
105
105

105
130
130
130
130
130

000002
006
001262
006
001264
000003
006
001272
006
001270
006
001262
000002
006
001272
006
001270
000003
003
001272
003
001270
002
001264
000003
003
001272
003
001270
006
001264
000002
003
001272
003

SEQ 123

27-JUN-85 13:16:37 PAGE 27-84

123
104
104
116
115
115
101
120
106

015

EM6:
EM7:
ENn10:
EM11:
EMi2:
emMi3:

EM14:
EM1S:
EM16:
EM17:
€EM20:
EM21:
EM22:

DHL:
DH2:
DH3:
DH4:
DHS:
DH6:
.EVEN
DT1:

002

004

0T2:

004

002

004

0713:

002

007

D74:

011

002

007

DTS:

007
002

DT6:

<377>/SCRATCH PAD TEST/
<377>/DEVICE FAILED TO INTERRUPT/
<377>/DEVICE INTERRUPTED TO WRONG VECTOR/

.ASCIZ
.ASCIZ
.ASCI1Z
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

<377>/PROGRAM

.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

<377>/POWER

.ASCIZ

.ASCIZ
ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

.BYTE
SAVR1
.BYTE
SAVR2
.BYTE
SAVRS
.BYTE
SAVR4
.BYTE
SAVR1

.BYTE
SAVRS
.BYTE
SAVR4
3
.BYTE
SAVRS
.BYTE
SAVR4
.BYTE
SAVR2
.BYTE
SAVRS
.BYTE
SAVR4
.BYTE
SAVR2

.BYTE
SAVRS
.BYTE

<377>/NPR

TEST/

<377>/MAIN MEMORY TEST/
<377>/MAR TEST/
<377>/ALU TEST/
CLOCK

TEST/

<377>/FORCE POWER FAIL ERROR/
<377>/UNEXPECTED INTERRUPT/
<377>/0MC11 CONFIGURATION ERROR/

<377>/MAINTENANCE

FAIL

INSTRUCTION

INITIALIZE

<377>/REGISTER
<377>/EXPECTED

<377>/EXPECTED
<377>/EXPECTED
<377>/EXPECTED
<377>/EXPECTED

6,15
6,2

6.4

6,4

6,2
6.4
6,2

3,7

3,11

2.2
3,7

3.7
6,2

3,7

3,2

FAILURE/

TRAPPED

FOUND
FOUND/
FOUND
FOUND
FOUND

FROM/
REGISTER/

IBUS* REGISTER/
IBUS REGISTER/
ADDRESS/

TEST/

CZDMC
MACRO V04.00
DMC11 ALV TESTS
269 036346
001270
270 036350
000002
271 036332
006
272 036354
001262
273 036356
006
274 036360
001404
275 036362
276 036362
000000
277 036364
000000
278 036366
000000
279 036370
035072
280 036372
035760
281 036374
036240
282 036376
035137
283 036400
036021
284 036402
03¢252
285 036404
035201
286 036406
036057
287 036410
036270
288 036412
035227
289 036414
036100
290 036416
036302
291 036420
035227
292 036422
036142
293 036424
036302
294 036426
035271
295 036430
036057
296 036432
036336
297 036434
035313
298 036436
036203
299 036440
036320
300 036442
035335
301 036444
000000
302 036446
000000
303 036450
035371
304 036452
000000
305 036454
000000
306 036456
035435
307 036460
036057
308 036462
036270
309 036464
035447
310 036466
036203
311 036470
036320
312 036472
035471
313 036474
036203
314 036476
036320
315 036500
035503
316 036502
036057
317 036504
036336
318 036506
035515
319 036510
036100
320 036512
036302
321 036514
035541
322 0356516
000000
323 036520
000000
324 036522
035571
325 036524
000000

SEQ 124

27 -JUN-85 13:16:37 PAGE 27-85

004

DT7:

002
.ERRTAB:

SAVR4
2
.BYTE
SAVR1
.BYTE
DMCSR

0
0
Y
EM1
DH1
DT1

EM2
DH2
DT2
EM3
DH3
DT3
EM4
DH4
DT4
EM4
OHS
D714
EM5
DH3
DT6
EM6
DH6
DTS5
EM7
0
0
EM10
0
0
EM11
DH3
DT3
£mM12
DH6
DTS
EM13
DH6
DTS

EM14
DH3
D76
EM1S
DH4
DT4
EM16
0
0
EM17
0

6.4

6,2

:EMT

sEMT
(EMT

JEMT
sEMT
SEMT

sEMT
;EMT

;EMT

(EMY

(EMT

JEMT

sEMT

(EMT

CZDMC

MACRO V04.00

DMC1t ALU TESTS
326 036526
327 036530
328 036532
329 036534
330 036536
331 036540
332 036542
333 036544
334 036546
335 036550
536 036552
337 036554
338 036556
339 036560
340 036562
341 036564
342
343
344 036566

349

27-JUN-85

000000
035435
036203
036320
035617
036057
036350
035652
036057
036270
035617
000000
000000
035721
036057
036270

000001

SEQ 125

13:16:37 PAGE 27-86

EM11
DH6
DTS5
EM20
DH3
D77
EM21
DH3
DT3
EM20

EM22
DH3
DT3
.EVEN
CORMAX;

SEMT

EMT

;EMT

SEMT

;EMT

CZDMC
MACRO v04.00
SYMBOL TABLE
ADRCNTe 004373
AUDONE
003024
AUSTRT
002446
AUTO.S
010512
BINWRD
004714
8IT0
= 000001
8IT1
= 000002
BIT10 = 002000
8ITi1 = 004000
8IT12 = 010000
81713 = 020000
BIT14 = 040000
BIT1S5 = 100000

BIT2
BITS
BIT4
8175
BIT6é
8I77
BIT8
8IT9

=
=
=
=
=
=
=
=

BRLVL
BRW
BRX
CHRCNT
CKSWR
CKSWR1

CKSWR2
CKSWR3

CKSWR4

000004
000010
000020
000040
000100
000200
000400
001000
007054

012252
0C3730
003732
004712
007606
007666

007700
007704

007710

DH5
DH6
DISPLA
OISPRE
DMACTV
DMCH
DMCROO
DMCROL1
DMCRO2
DMCRO3
DMCRO4
DMCROS
DMCRO6

DMCRO7
DMCR10
DMCR11
OMCR12
DMCRL3
DMCR14
DMCR15
DMCR16

DMCR17

DMCSR
DMCSRH
DMCTL
DMNUM
DMPO4
DMPO6

DMRLVL
DMRVEC

DMS100

CKSWR5
CLKX
CLRC

010014
001242
035026

CONERR
CONN
CONTAB

007223
007114
002776

CORMAX
CRAM
CREAM

036566
006606
001320

DMS104
DMS105
DMS106
DMS107
OMS110
OMS111
DMS112
DMS113
DMS114
DMS115

CSRMAP
CYCLE

010514
010060

DMS117
DMS200

DATAHD

005204

CNERR
007277
CNT.MA
001702
CNVRT = 104411

CONVRT=

CSR

104410

0065190

OMS101
DMS102
OMS103

036142
036203
001200
000174
001306
007320
001500
001510
001520
001530
001540
001550
001560

001570
001600
001610
001620
001630
001640
001650
001660

001634
001644
001654
001664
001674
001506
001516
001526
001536
001546
001556
001566
001576

001606
001616
001626
001636
001646
001656
001666
001676

001376
001374

OMTVEC
DM.END
DM.MAP
DONE
DT1
DT2

D713
D714

001400
001700
001500
003734
036240
036252

001502

DTS

001670

001404
001406
001410
001310
001412
001414

DMTLVL

001512
001522
001532

D76
D17
Ent

001572
001602
001612
001622
001632
001642
001652

EM13
EM14
EM15
EM17
EM2
£M20

001672
001504

EM22
EM3

001542
001552
001562

001662

DATABP
005216
DATACL+ 104415

DMS201
DMS202

DELAY =
DEVADR
ODEVTAB
DH1
OH2
DH3
OH4

DMS204
DMS205
DMS206
DMS207
DMS210
DMs211
DMS212

001514
001524
001534
001544
001554
001564
001574
001604
001614
001624

DMS203

0MS213
DMS214
OMS21S
DMS216
DMS217
DMS300
DMS301
DMS302
DMS303
DMS304
DMS305
OMS306
DMS307

DMS310
DMS311
DMS312
DMS313
DMS314
DMS315
DMS316
DMS317

DMS116

104413
004370
003010
035760
036021
036057
036100

SEQ 126

27-UUN 85 13:16:37 PAGE 27-87

EM10
EM11
EM12

EM16

001402

ERCTO06
ERCTO7
ERCT10
ERCT11
ERCT12
ERCT13
ERCT14
ERCT1S
ERCT16
ERCT17
ERR
ERRCNT
ERRFLG

ERRMSG
ERRPC
ERTABO
EXIT
=
EXITER
FLOAT
FY
HALTS
HILIM

ICOUNT

INBUF
INCHAR

001734
001740
001744
001750
001754
001760
001764
001770
001774
002000
002700
001232
001325

005172
002770
005322
000205
005252
002536
002566
005222

004366

001222

MPFAIL
MQM
MR
MRESET=
MSTCLR=
MTITLE
MTSTN
MTISTPC
MVECX
NEXT
NOACT
NODEV
NPRSET

005675
005666
005755
004000
104412
001000
006130
006031
006100
001216
007154
002674
034664

PACTOS

001726

NUM
0K
ONE
PACTO0
PACTO1
PACTO02
PACTO3
PACT04

PACTO6

006450
002646
001302
001702
001706
001712
001716
001722
001732

007502
010020

PACTO7
PACT10

001736
001742

INIFLG
001324
INSTER= 104404
INSTR = 104403

INSTR2
INTTY

004166
012266

PACT11
PACT12
PACT13

001746
001752
001756

036320

KMCM

007330

PACT16

001772

035371
035435
035447

LOCK
LOKFLG
LOLIM

001220
001326
004364

PARBIT= 040000
PARERR
004310
PASCNT
001230

036270
036302

036336
036350
035072

LIMITS
LINE
LOBITS

004314
007016
004372

035471
035503
035515

LPCNT
LSTERR
MASKX

001224
001234
001244

035571
035137
035617

MCRLF
MCSRX
MDATA

035541

MASTEK

EM21

035652

MEMDAT

EM4
EMS
EM6
M7
ERCTO0
ERCTO1
ERCT02
ERCTO3
ERCTO4
ERCTOS

035227
035271

MEPASS
MERRPC
MERRX
MERR2
MERR3
MILK
MLOCK
MNEW
MODU
MPASSX

035721
035201

035313

035335
001704
001710
001714
001720
001724
001730

MEMLO
MEMLIM

PACT14
PACT15

001762
001766

PACT17
001776
PARAM = 104405
PARAM1
004234

005672
006072
007544

PERFOR=
PFTAB
POPRO =
POP1SP=
POP2SP=
PRIO
PS
=

034726
001304

PUSH1S= 005746
PUSH25= 024646

006142

035052

005733
006217
006117
005760
006005
001322
006043
006144
006704
006106

004537
005430
012600
005726

022626
006547
177776

PUSHRO= 010046
QV.FLG
RESREG

001327
005220
RESTAR
005350
RESTRT
003534
RESOS = 104407
RETURN
001214
ROMCLK= 104414
RUN
001316
SAVACT
001312
SAVNUM
001314

MACRO v04.00
TABLE

SAVPC
SAVRO
SAVR1
SAVRZ
SAVR3
SAVR4
SAVRS
SAVSP

001276
001260
001262
001264
001266
001270
001272
001274

SWit
SWi2
SW13
SWid
SW15
TOATA
TEMP
TEMP1

SAVOS = 104406
SCOPE = 104400
SCOP1 = 104401
SETC
035040
SETVEC
034642
SKIP
002632
SOFTSW
010052
SPACNT= 004713
SPDAT
035062
SPEED
007340
SPLD
034762
STACK = 001200
STAT
001240

STATL
STAT2
STAT3

STRTSW
SVOS
SWFLG
SWMES
SWMESL
SWR
SWREG
SWQ0
=
SWoL
=
SW02

SWO03
SW04
SWOS
SWo6
SWO7
SWO8
SW09
SW10
.

=
=
=
=
=
=
=
=

7ST10
TST100
TST101

001236
004402
010016
007205
007215
001202
000176
000001
000002
000004
000010
000020
000040
000100
000200
000400
001000
002000

036566
000000
ERRORS DETECTED:

=
=
=
=
=

004000
010000
020000
040000
100000
024542
001416
001246

TEMP2
001250
TEMP3
001252
TEMP4
001254
TEMPS
001256
TIMER = 104416
TKCSR
001204
TKOBR
001206
TLAST = 033766
TPCSR
001210
TPDBR
001212
TRPOK
004730
TSTNO
001226
TST1
012320

001366
001370
0C1372

TST102
757103
TST104
TST105
TST106
TST107
TST11
TST110
TST111
TST112
TST113
TST114
TST115
TST116
TST117
TST12
T5T120
TST121

ABS,

StQ 127

27 JUN-85 13:16:37 PAGE 27-88

013176
025256
025432

025606
025762
026136
026312
026466
026642
013274
027016
027172
027346
027522
027676
030052
030226
030402
013372
030556
030732

000
001

VIRTUAL MEMORY USED:
53760 WORDS
( 210 PAGES)
DYNAMIC MEMORY AVAILABLE FOR
71 PAGES
CZDMCD .BIN,CZDMCO. SEQ=CZDMCD.P11

TST122
157123
157124
TST125
757126
T5T127
TST13
157120
T5T131
TST132
TST133
757134
TST135
T5T136
757137
15714
TST15
TST16
15717
1872
75720
Ts121
15722

15723
757124
TST25
15726
TS727
TS13
TST30
157131
15732
TS733
TST34
TST35
15736
15737
7574
15740
75741
TST42

031106
031262
031436
031612
031766
032142
013470
032316
032472
032646
033022
033176
033352
033544
033766
013566

013664
013762
014060
012426
014156
014254
014352
014450
014546
014672
015016
015146
012456
015306
015450

015534
015734
016134
016310
016464
016664
012606
017104
017260
017434

TST43

T7ST44
15745
15746
157147
TST5
15750
TST51
TST152
TST153
TS154
TSTSS
TST56
TST57
1576
TST60
TST61
TST62
TST63
157164
15765
15766
15767
1877
75770
TST71
15172
TST73
15174
TST75
157176
15177
TTST
TWOSYN=
TYPDAT
TYPE
=
TYPMSG
VEC
VECMAP
WHICH
WROCNT

017610
017764
020140
020314
020470
012704
020644
021072
021242
021510
021732
022026
022120
022240
013002
022404
022510
022624
022726
023064
023210
023320

023426
013100
023624
023752
024104
024304
024440
024552
024726
025102
003612
010000
005206
104402
005106
006526
012010
012002
004710

WRKO.F
XBX
XCSR
XERR
XHEAD
XLOC
XPASS
XSTATQ
XTSTN
XVEC

005174
005009
003546
003570
006224
003022
003562
007454
005330
003554
ZERO
001300
$CRAP = 177777
$ENDAD
003522
000137
$S
000141
sy
000017
.BEGIN
003152
.CNVRT
004472
.CONVR
004466
.DATAC
005552
.DELAY
005436
.EOP
003364
.ERRTA
036362
LHLT
004750
.INSTE
004154
.INSTR
004050
004070
.INSTY
.MSG
004072
MSTCL
005466
.PARAM
004174
.PFAIL
005336
.RESO5
004434
.ROMCL
005504
.SAVOS
004374
003576
.SCOPE
.SCOP1
003736
002002
.START
. TIMER
005616
.TRPSR
004716
.TRPTA
001330
.TYPE
003766
L
B )

CZOMC
SYMBOL