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AH-8529H-MC

October 1981

132 pages

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Document:	CZDLDH0 KD11-Z,DL11-W DL11-W-1144 MFM SLU OCT 1981 bw
Order Number:	AH-8529H-MC
Revision:	000
Pages:	132
Original Filename:	CZDLDH0__KD11-Z,DL11-W__DL11-W-1144_MFM_SLU__AH-8529H-MC__OCT_1981_bw.pdf

OCR Text

R e

r2L.DN0 CL1T=W 117446 MFM SLU

MAZRO M111'3

C7-Ju.~81

15:03

8
PAGE 2

SEQUENCE

.REM

IDENTIFICATION

PRODUCT

(ODE:

A(~852CH-M(

PRODUCT

NAME
:

CZDLDHO DL11-w/1744 MFM SLU

DATE (REATED:

JuLy,

MAINTAINER:

DIAGNOSTIC ENGINEERING

A JTHOR:

DAN CASALETTO

REVISED BY:

DAN MILLEVILLE

"HE

INFORMAT[ON

1981

THIS

DOCUMENT

SUBJECT

(HANGE

W]THOUT

NOTICE AND SHOULD NOT BE (ONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION, DIGITAL EQUIPMENT CORPORATION ASSUMES
NO RESPONS'B'LITY

FOR ANY

NO RESPONSIBILITY

IS ASSUMED FOR

SOF TWARE ON EQUIPMENT

AFFILIATED

COMPANEIS.

(C)

THE

1975,

FOLLOWNG ARE

DIGITAL
DEC

THAT

ERRORS

THAT MAY APPEAR

S NOT

THE USE

THIS

DOCUMENT,

OR RELIABILITY OF

SUPPLIED BY DIGITAL

]TS

1981 BY DIGITAL EQUIPMENT CORPORATION

TRADEMARKS OF

PDP
CECUS

DiGITAL

UNIBUS
DE(TAPE

EQUIPMENT

CORPCRATI]ON:

MAS SBUS

MACRO M1113

07-JuL-81

15:03

PAGE

¢
3

SEQUENCE

HISTCRY SECTION

CZDLDDO WAS RELEASED OCT 79
THE

FOLLOWING

IN THE
1.

CHANGES WERE MADE.

COMMENT

USE

ALL

FIELD:

CHANGES ARF

MFPT

?gs?gT

IF ERROR FLAGS TESTS AND BREAKX TESTS ARE
ENABLED ,PERFORM THESE TESTS ONLY FOR THE SLU
AT 176500.PERFORM THESE TESTS FOR THE CONSOLE

INSTRUCTION,AND

THE

INDICATED

THE

CPU

PERFORM READER ENABLE

IS A

11/44:

AND RECEIVER ACTIVE

IF BITO3 OfF SWR IS ADDITIONALLY SET.

SLU

WHILE IN MAINTENANCE MODE DO NOT WRITE AND READ
A “P OR AN ASCI] 220. THIS WIL. FORCE THE CONSOLE

INTO °'CONSOLE MODE'.

IN THE CLOCK REPEATARBILITY TEST, ALLOW FOR A
TOLERANCE OF 2 BETWEEN CLOCK COUNTS. THIS IS TO

ALLOW ENOUGH TOLERANCE
AND REFRESH CYCLES ARE

WHEN MOS MEMORY
OCCURING.

IS JSED

2. BECAUSE 11/44
SLU INTERRUPT REQUESTS ARE DEPENDANT ON A MFM (LO(K
ENOUGH TIMEF MUST BE GIVEN FOR THEM TO OCCUR. THEREFORE, ALL TESTS
ASSOCIATED WITH XMIT & RECEIVE INTERRUPTS SHOULD HAVE
A MINIMUM OF & NOP'S ACTING AS WAIT FOR INTERRUPT,

IT WAS FOUND THAT A"

THE

SENT

ATTACHED TUS8 WOULD BE ACTIVATID

DJAGNOSTIC,/nND,AS

A RESULT,(CHARACTERS WOULD

TO THE RECEIVER BUFFER.

THIS WOULD

CAUSE

SOME

TESTS

TO FAIL.

THEREFORE

ANY COMMUN]ICATION TO THE TUS8 FROM THE DIAGNOSTIC:
A.ENABLE MAINTENANCE
THE XMITTER.

B.IN ALL
TEST:

TESTS

MODE

THAT WITE

DELAY ENOUGH

JTQISEIGHT BE

TIME

IN ALL

TESTS

THAT

INHIBIT

WRITE

710

TO XMITTER AND BEFORE [ EAVING
TO ALLOW ANY

CHARA(TERS

IN THE PROCESS OF BEING XMITTED TO

C.DISARLE MAINTENANCE MODE FOR PURYQOSE OF ERROR PRINTING
ONLY TO THE SLU WHICH THE TERMI..AL [S ATTACHKED.
4.

IT WAS FOUND

THAT UPON POWERUP ANu WwITH THE

TUS8 ATTACHED,

(HARACTERS WOJLD BE SENT TO THE RECEIVER FROM THE TUSS8.

SOME RECEIVER TESTS WOULD FAIL DUE TO THIS. THEREFORE,
ON ALL TESTS THAT PERFOPM RFCEIVER TESTS AND FOLLOWING
MAINTENANCE MODE BEING ENABLED,DELAY ENOUGH TIME TO ALLOW
TO ALLOW ANY

(HARA(TERS

THAT MIGHT BE

BEING RECEIVED TO FINISH.
A,]

(2DLDH0 DLY1=W 11/44 MFM SLU

ADD SOFTWARE THAT WILL
11/44 T/A (CONSOLE TEST

IN THE

PROCESS Of

[MPLEMENT AUTO INJTJATION OF
VIA WRAF (CABLE FROM TuUS8 TO CNNSOLE

CZDLDHO DLI1=W 11/44 MFM SLU
9%
97

MACRO M1113

07-JuL-81

15:03

1
D
PAGE 3-1

PORIS.

SEQUENCE

IT IS SELECTED BY SWR BITOZ2 AND IS PERFORMED

ONltv AFTER ALL

SLUS ARE

TESTED.

(ZOLDHO DL11=W 11/44 MFM SLU

MACRO M'113

07-JuL-81

15:03

E
PAGE 4

SEQUENCE

(ZDLDEO WAS RELEASED JuL 80
1.

PROGRAM WAS (HANGED

TO WORK WITH VECTORS GREATER THAN 377.

CZDLDFO WAS RELEASED OCT 80
1.

WAS CHANGED TO A (MOV) INSTRUCTION TO SET INTERRUPT ENABLE
AND CLEAR DONE FLAG ALL WITH ONE INSTRUCTION.

2.
3.

WLNW&UU%LNW
O 00

D
D
h
h
D
D el ad edh
d —d —D i
D e
d
b —d
e
e
h =Dl
d

WAL
N
Mg = OV~ W BWNI 20000 NN

108

—t

IN TESTS 17 THROUGH 22 THE CLOCK DONE FLAG CAN GET SET
BE "WEEN THE TIME THAT IT IS CLEARED (BIC) AND THE TIME THAT
INTERRUPTING IS ENABLED (BIS).,
THE (BI(-BIS) COMBINATION

IN TEST 20,

SUFFICIENT

3 (NOP)'S WERE ADDED BEFORE ERROR +47 TO ALLOW

TIME BETWEEN CLOCK FLAG AND CLOCK

INTERRUPT,

IN TEST 23, THE COUNT DIFFERENCE ALLOWED WAS (HANGED ON
11/44'S ONLY FROM 2 TO 3.
TEST 45 HAD SEVERAL

PROBLEMS.

PROGRAM (AN KICK OUT OF

ERROR +113 DID NOT PRINT.

DELAY WAS ADDED.

DE'AY

LOOF PREMATURELY.

A FIXED

A RESET WAS ADDED [MMEDIATELY

BEFORE THE ERROR (CALL TC BFEAK
C. CLKCNT WAS NOT INITIALIZED.

THE MAINTENANCE WRAPAROUND.

(2DLDGO WAS RELEASED APR 81
1.

THE LINE CLOCK SYNCHRONIZING PROBLEM, WHI(CH WAS CORR"TM "TED RY
PATCH ORIGINALLY IN (CZDLDD, WAS REMOVED IN THE NEW REVISION.

;gggEEgRE.
LEM,

TEST 20 NOW CONTAINS THE PAT(CH TO CORRECT THIS

RANDOM ~Q'S READ ON ANY

INPUT MODE WILL BE

THE $SCOPE AND $ERROR ROUTINES NOW CHECK FOR BIT O OF
CPU ERROR REGISTER BEING SET (POWER MONITOR BlT).

WAS A PROBLEM WITH CERTAIN SYSTEM HOOKUPS.

IGNORED.

THI!S
THE

€7DLDHO WAS RELEASEC JuL 81
1.

IN TEST

36,

THE

PURPOSE
READ.

THAT

'‘CLR @RBUF'' INSTRUCTION WAS CHANGED

“'TST QRBUF'' BECAUSE

AN '1/24 DOES ONLY A WRITE,

INSTRUCTION

THAT

POSITION WAS

AND THE

TO DO A

—

CZDLDHO DL11~w 11/44 MFM SLU
140
141

MACRO M1113
1.0

07-JUL-81
GENERAL

Fo1

15:03

PAGE 5

SEQUENCE

INFORMATION

-42

143

144

145

1.1
THIS DIAGNOSTIC

146
147

THE

3 Velo RNTo RV PV To8 o

o p —D
D e
d
b e

TEST

TO VERIFY

DL11-w SERIAL LINE/REAL

[V, IV, IV, IV IV, IV TV, [V, 1V, ]

IS A LCGIC

FOLLOWING MODULES:

11744

TIME

THE

CLOCK

MULTIFUNCTION MODULE

OPERATION OF

THE

INTERFACE

THE PROGRAM WIlL RUN WITHOUT ANY SPECIAL TEST FIXTURES BY DEFAULT.
HOWEVER, THE FO_LOWING OPTIONAL TESTING IS PROVIDED:

TEST TO VERIFY XMIT AND RECEIVE OF THE UARTS WITH
A WRAP CABLE. THE UART UNDER TEST IS LOOPED BACK ON

ITSELF. THIS IS SELECTED VIA CPERATIONAL SWITCH SETTING
BIT 7, AND IS APPLICABLE TO THE DL11W AND 11/44 MFM,

AUTOMATIC INITIATION OF THE T/A CONSOLE TEST OF THE 11/44
MFM. THE TU58 PORTS ARE LOOPED TO THE CONSOLE PORTS
THIS IS SELECTED VIA OPERATIONAL SWITCH SETTING BIT 2
AND 1S APPLICABLE TO 11/44 MFM ONLY.
(SEE CKKFBAO FOR T/A CONSOLE TEST EXPLANATION)

THIS DIAGNOSTIC OPERATES ON THE

CONSOLE

SERIAL LINE

AND CLOCK

AS WELL AS UP TO FIFTEEN(15) ADDITIONAL IDENTICALLY CONFIGURED
SERIAL LINE INTERFACES. THE DEFAULT ADDRESSES ARE:
A.

CONSOLE - 177560
177546

B. OTHER SERIAL

INTERFACES

SERIAL LINE
CLOCK

LINE - 776500

FIRST SERIAL LINE ADDRESS
OF 15 CONSECUTIVE SERIAL
LINE ADDRESSES

THE PROGRAM IS DESIGNED TO RUN ON ANY PDP=11 WITH 8K OF
. JT CAN BE RUN UNDER XXDP,APT, AND ACT MONITORS,
AND ON PROCESSORS WITH NO HARDWARE SWITCH REGISTER,

MEMORY

SOF TWARE SWITCH REGISTER - LOCATION 176

EOUERPFAILURE
ACKUP.

NOTE :

IS SUPPORTED FOR SYSTEMS WITH CORE MEMORY OR BATTERY

THIS DIAGNOSTIC WITH TH= SWR = 000020
(CLOCK

TESTS ONLY)

SHOULD BE USED ON SWITCHLESS CPU'S

TO TEST KW=11L LINE CLOCK MODULES.
1.2

SYSTEM REQUIREMENTS

STANDARD 11

AND 8K OF

FAMILY(COMPUTER WITH A CONSOLE OUTPUT DEVICE

MEMORY.

-——

-—

L ————

CZOLOWD DL Y11= 11764 MEM SLU
|

MACRO M1113

197

<00
201
202
203
204
205
206
207

15:03

:
OPTIONAL

198

G 1
PAGE 5-1

1.L00P CABLE

07-JuL-81

SEQUENCE

FOR UART LOOP BACK ON

[TSELF

2.WRAP CABLE FOR 11/44 MFM T/E TESTING
(SEE DWG. #7016942 WRAP AROUND CABLE
AND SECTION 5.0 OF THIS DOCUMENT)

1.2.2

STORAGE
THE

PROGRAM USES SK WORDS OF

MEMORY

MACRO M1113
1.3

07-JuL-81

15:03

PAGE 6

SEQUENCE

IF THE UNIT UNDER TEST (UUT) IS THE CONSOLE , THE PROGRAM WwILL
ASSUME THE REAL TIME CLOCK (RTC) IS ENABLED AND WILL TEST IT

UNLESS THE TESTS ARE DISABLED BY BIT6 OF

OO0 D NN

ASSUMPT ICNS

00D

N2 OO0

AINLALNINLNL
LA NV AN ININD)

f20L0M0 DLIT=W 11744 MFM SLU

AN =9

THE UUT

FOR

THE

IS NOT

THE

CONSOLE,

THE RTC

THE SWR.

IS NOT

TESTED FOR THAT DEVICE.

DL'1-W:

THE

PROGRAM WI.L

ASSUME

THE ERROR FLAG BITS AND THE BREAK

OF THE DL11-W ARE DISABLED AND WwILL NOT TEST THESt FUNCTIONS
UNLESS ENABLED BY BIT10 (FOR ERROR FLAGS) AND BIT8 (FOR BREAK)
OF THE SWR. THE DEFAULT C(HARACTER SIZE IS 8 BITS (SEE PARA 2.3.2).
FOR THE

FUNCTION

11/44:
THE

PROGRAM ASSUMES

THAT

THE

ERROR

FLAG BITS AND

THE

BREAK FUNCTION ARE DISABLED, AND WILL NOT TEST THESE FUNCTIONS
HOWEVER, IF BIT 10 (FOR ERROR FLAGS) AND BIT 08 (FOR BREAK)
OF SWR ARE SET, THEN ERROR FLAGS AND BREAK TESTS ARE PERFORMED
FOR THE TU5S8 SLU ONLY. IF BITO3 OF SWR IS ALSO
SET THEN THESE TESTS WILL BE ENABL.D FOR THE CONSOLE.
READER ENABLE AND RECEIVER ACTIVE TESTS
AREC??B SERFORMED SINCE THE 11/44 MFM DOES NCT IMPLEMENT
FUN

2.0

OPERATING

THESE

NS.

INSTRUCTIONS

USE STANDARD PROCEDURE FOR PDP-11

2.2

ABSOLUTE BINARY FORMATTED TAPES.

STARTING PROCEDURE

LOAD

THE

SWITCH REGISTER WITH SETTING
NOTE:

USING A CPU WITHOUT

HARDWARE

SWITCH REGISTER

SOF TWARE SWITCH REGISTER LOCATION = 176.

(FOR A 11/44 (PU USE MFM CONSOLE FOR DEPOSITING
SWITCH REGISTER. TYPE “P TO ENTER CONSOLE)

START AT 200.
AFTER CHECKING THE TRANSMITTER, THE PROGRAM WILL PRINT [TS [DENTIFICATION
AND REPORT THE NUMBER OF DEVICES UNDER TEST (NUMBER IS OCTAL).
Uggng¢§§¥ IS PRINTED AFTER A FULL PASS HAS BEEN MADE ON ALL DEVICES

START AT 204.

snxsaNOTEwnew

THE "¥CHO'' TEST WILL BE EXECUTED. AN "'*'' IS PRINTED AT THE
BEG'NNING OF THE TEST. THE ECHO TEST READS A (HARA(TER FROM

CZDLDHO DL11=-w 11/44 MFM SLU
266
267
268
g;g

271

272
273
274
275
g;g

278

279

MACRO M1113

07-JuL-81

15:03

1
I
PAGE 6-1

SEQUENCE

THE TERMINAL ,WRJTES THAT (CHARACTER TO THE TERMINAL AND
REPORTS ANY ERROR F_LAGS SET IN THE RECEIVER BUFFER.
A CONTROL=C HALTS THE TEST AND PRINTS ‘'STOP''
AT THE TERMINAL
CONTINUING RESTARTS THE ECHO TEST.

C. START AT 210.

wes
cexeNOeTE

THE TERMINAL OUTPUT TEST WI.L BE EXECUTED. DEPRESSING ANY (HARACTER
AT THE TERMINAL, HALTS THE TEST. CONTINUING RESTARTS THE TEST.
THE TEST OQUTPUTS 32 CHARACTERS ON A LINE AND REPEATS THE
PATTERN EVERY THREE LINES. THE PATTERN IS AS FOLLOWS
(OCTAL

CODE 040 --> 377):

THSERT (I xe = /0123456789 ;<=>?

280

@ABCDEF GH] JKLMNOPQRSTUVWXYZ[\]~_

283
Sgg

THIS BOTTOM LINE COULD BE THE FOLLOWING IF
DOES NOT KAVE LOWER CASE:

Sg;

%gg
°88

289

290
291
292

*ABCDEF GHIJKLMNOPQRSTUVWXYZ

SABCDEFGHI JKLMNOPQRSTUVWXYZ [\
e

(OCTAL CODE)

(040 =-=> 077)

(100 =-=> 137)

(140 ==> 177)

[LOWER CASE ALPHA]

THE TERMINAL
[{UPPER CASE ALPHA]

aNOTEnran

IF THE TESTING ON TERMINIALS OTHER THAN THE CONSOLE S DESIRED
FOR TESTS B OR C,SEE SECTION 2.3.4. AND 2.3.5. OF THIS DOCUMENT.

Doee
HF

(ZDLDHO DL11=w 11/44 MFM SLU

—

)

NN - o

)
d

b id e
—

OO ~NO

INNIN NN W W

294
295
)
297
298
299
300
30
302
303
304
305
306
307
308
309

MACRO M1113

07-0UL-81

J
PAGE 7

15:03

SEQUENCE

2.3

OPERATING PROCEDURE

2.3.1

OPERATIONAL SWITCH SETTINGS
THE

DIAGNOSTIC

WILL

CHECK

FOR EXISTENCE

IS AVAILABLE

SWITCH

THE PROGRAM

WILL AUTOMATICALLY USE THE
CONTENTS OF LOCATION
176 AS THE SOFTWARE SWITCH REGISTER. THE USER SHOULD

SET

THIS LOCATION BEFORE

HARDWARE

SWITCH

STARTING THE PROGRAM.

IS AVAILABLE

AND A SOF TWARE

DESIRED,LOAD ALL 1'S INTO LOCATION 177570.(ALL
UP IF PHYSICAL SWITCHES ARE AVAILABLE)

BIT1S

- HALT ON ERROR

BIT13
BIT12
BITI
BIT10
BIT09
BIT08
BIT07
BIT06
BITO5

=
=
=
-~
=
-~

BIT14

- LOOP ON PRESENT

BI1T04
BITO03

SWR{LOC.

176)

SWITCHES

TEST

INHIBIT ERROR TYPEOUT
UNUSED
UNUSED
ENABLE ERROR FLAGS TESTS
LOOP ON ERROR
ENABLE BREAK FUNCTION TESTS
ENABLE DATA TEST THROUGH LOOP-BA(CK CONNECTOR
INHIBIT RTC TESTS (ALLOW ONLY SLU TESTS)
ALLOW MANUAL SETTING OF "'SDEVM'' (DEVICE MAP)

= INHIBIT SLU TESTS (ALLOW ONLY LINE CLOCK TESTS)
~ FOR 11/44 MFM: ENABLE BOTH °'BREAK TESTS' AND °‘ERROR FLAG
TESTS'

ONLY

BITO02

FOR

THE

CONSOLE

IF BIT10 OR

SLU.

(THIS BIT

BITO8B IS SET.)

VALID

~11/46 MFM OPTION: SELETTM AUTO INITIATION
OF

T/A CONSOLE

TEST

VIA WRAP (ABLE

FOR DL11-W:

If THE SOF TWARE SWITCH REGISTER IS USED(LOC. 176) THEN
BUILT INTO THE PROGRAM IS THE ABILITY TO DYNAMICALLY CHANGE THE
CONTENTS OF SWREG DURING PROGRAM EXECUTION. BY STRIKING *G
(CNTL G) ON CONSOLE TTY THE OPERATOR SETS A REQUEST FLAG TO CHANGE
THE

CODE

CONTENTS OF

(IE)

APPL1CABLE

THE

SWREG,

WHICH

ERROR ROUTINES,
AREAS.

SERJAL

TYPEOUTS AT

BECAUSE

LINE,

THAT

THE

TIME

PROCESSED

IN KEY AREAS OF

AFTER HALTS END OF
THIS

DIAGNOSTIC

USES

CONTROL~-G SHOULD BE

THE

MAINTENANCE

BIT

THE

PASS, AND OTHER
THE

MAINTENANCE

PROGRAM
BIT

ISSUED DURING PROGRAM
SURE

TO BE

CLEAR.

If A CONTROL=G IS DETECTED, UPON EXECUTION THE CONTENTS OF THE SWREG ARt
DUMPED IN OCTAL ON THE CONSOLE TTY AND ANY C(HANGES ARE REQUESTED
(1)

POSSIBLE RESPONSES ARE:

SWR XXXXXX

NEW-

—

MACRO M1113

07-JuL-81

15:03

PAGE 7-1

<CR>

6 DIGITS 0-7

FOR

11/44

SINCE

SEQUENCE
IF

NO CHANGES ARE

TO BE MADE

TO REPRESENT IN OCTAL

VALUC

THE NEW SWITCH REGISTER

,LAST DIGIT FOLLOWED BY <CR>.

TO ALLOW REENTERING VALUE

KEYING

IN SWREG VALUE.

IF ERROR IS COMMITIED

(PU:

THE 11/44 HAS A HARDWARE SWITCH PEGISTER LOADED BY THE MFM (ONSOLE

THEN THE DIAGNOSTIC SHOULD ALWAYS FIND “XISTENCE OF 177570.
WHEN OPERATING ON THE 11/44 (CPU, DYNAMI( CHANGING OF SWREG(177570)
PROGRAM EXECUTION CAN BE ACEOMPLISHED BY USING
TME MFM CONSOLE. TYPING *P<CR> ON THE CONSOLE TTY WILL ENTER THE

CONSOLE.

THIS

TO EXAMINE

I5 CONSIDERED ‘‘CONSOLE MODE''.

SWREG

TYPE

SW<CR>

TO THE

CONSOLE

PROMPT.

TO LOAD

DURING

THE

SWREG TYPE ' D SW DATA<CR> ' WHERE 'DATA'' IS AN OCTAL NUMBER.
IN ORDER FC® THE DIAGNOSTIC TO TYPE TO THE TTY IT IS NECESSARY
TO HAVE THE 11/44 MFM IN 'PROGRAM 1/0 MODE''. THIS (AN BE ACCOMPLISHED
BY TYPING ' C<CR> ' TO THE CONSOLE PROMPT. THEREFORE,WHEN CONSOLE
USE IS COMPLETED, PLACE THE MFM IN 'PROGRAM [/0 MODE''.
BECAUSE THIS DIAGNOSTIC USES THE MAINTENANCE BIT, “P WILL
NOT BE ACKNOWLEDGED DURING THESE
DURING PROGRAM TYPEOUTS. AT THIS
WILL BE CLEARED.

TESTS.THEREFORE, ISSUE “P
TIME THE MAINTENANCE BIT

CZDLDHO DL11=w 11/44 MFM SLU

CZDLDHO DL11=-W 11/44 MFM SLU
375
376
377
378
379
380

MACRD M1113
2.3.2

07-JuL-81 15:03

PAGE 8

SEQUENCE

SETTING BITS PtR CHARA(CTER
THIS PROGRAM DEFAULTS TO TESTING 8 BITS PER (CHARACTER.

SERIAL LINE IS SET FOR 5-->7 BITS PER CHARA(CTER, SET THE

THE

MEMORY LOCATION ''SUSWR'' AS FOLLOWS:

CHAR.

SIZE
(# OF BITS)
8

100000000
0100009000
001000000
000100000

7
6
5
"$USWR'' IS USED

"SUSWR'' CONTENTS
(BINARY)
(OCTAL)
400

200
100
40

IN THE DATA PATH TESTS

TO LIMIT

THE BINARY

ng?T TE?TEPATTERN TO THE NUMBER OF BITS SELECTED ON THE
SERIAL LINE.

RUNNING UNDER APT

THE APT MAILBOX IS LOCATED AT LOCATION 500,

TO ALLOW ADDITIONAL SERIAL

LINE VECTOR ASSIGNMENTS TO THE 400 AREA OF MEMORY.
FOR DL11W:

THE DEFAULT EXECUTION TIMES PROVIDED($TSTM, $PASTM) ARE FOR EXECUTION
WITH AN 11/34 PROCESSOR, CORE MEMORY , AND 110 BAUD.
FOR 11/44:

THE

EXECUTION TIMES PROVIDED

IN THE APT SCRIPT

IN SECT. 2.4 ARE FOR EXECUTION WITH A 11/44 PROCESSOR,

THAT FCLLOWS AND

CACHE,

16K CORE MEMORY, AND 300 BAUD.
THE FOLLOWING IS A PROGRAM LOAD FILE USED BY APT:
1. E TABLE 'A' IS USED FOR APT DUMP MODE AND RUN TIME MODES.

TWO SLU'S ARE TESTED.($SWREG BIT05=1 AND $DEVM-3)
A SLU AT 177560(DEFAULT CONSOLE SLUW) AND AT 176500
(BASE ADDRESS CODE).
THE ERROR FLAG AND BREAK TESTS ARE

SELECTED FOR THE

AT 176500(TUS8 SLU IN MFG.)
($SWREG BIT 10 AND 8 =1)
THE 'ENABLE DATA TEST THROUGH LOOP-BACK CONNECTOR'

IS ENABLED TO ALLOW TEST 44 TO EXECUTE

SLU

TEST
($SWREG BIT 7 -1).

2. E TABLE 'B' IS USED FOR APT Qv,
IT ACCOMPLISHES WHAT E TABLE ‘A’
DOES, WITHOUT THE ENABLE DATA TEST THROUGH THE LOOPBACK CONNECTOR, BUT
ADDITIONALLY [T SUPPRESSES ALL

SELECTS AUTO TESTING OF
1ST PASS
RUN TIME

TYPEOUTS TO THE TERMINAL

T/A CONSOLE TEST VIA WRAP CABLE

LONGEST
TEST TIME

ADD
[ T JONAL
RUN TIME

(SENVM=240)

AND

($SWREG BITOZ 1).

——
-

- CZDLDKO DL11-W 11744 MFM SLU
432
633
634
435
636
437
438
439

MACRO M1113

07-JuL-81

15:03

PAGE 8-1

SEQUENCE

£ ~MODE
/ S=MODE
(SENVM/SENV)

TABLES

2007000

2407001

440
441

SWITCH REGISTER 1

002640

002404

4463

SWITCH REGISTER 2

000400
00/0000
000700000000
000700000000
000700000000
000700000000
0000
0000

000400
0070000
000700000000
000/00000000
000700000000
000/00000000
€000
0000

000003

000000
000000

442

445

446
447

448
449
450
5
452
453
454
455
456

($SWREG)

CPU TYPE/OPTIONS
MEMORY MAP (ODE 1
MEMORY MAP (CODE 2
MEMORY MAP CODE 3
MEMORY MAP (CODE 4
BUS PRIORITY/INTERRUPT 1
BUS PRIORITY/INTERRUPT 2
BUS ADDRESS CODE
DEVICE MAP (ODE
($DEVM)

CTLR.
CTLR.

SPECIFIC WORD 1
SPECIFIC WORD 2

176500

457

458
459
460
461
462
463
464
465
466

MACRC M1113
2.3.4

07-JuL-81 15:03

RUN WITH ALTERNATE

473
674
475
476
477

478
479
4«80

487
488
489

490
491
492
493
494
495
496
4G7
498
4«99

CONSOLE ADDRESS

THAN 60,

THE OPERATOR MUST SUPPLY THE PROGRAM WITH THE

CORRECT ADDRESSES BY INSERTING THEM AT THE TAG LABELED ''CRCSR'':
ADDRESS OF RECEIVER RCSR
CRCSR:
(RBUF:
ADLRESS OF RECCIVER BUFFER
CTCSR:
ADURESS OF TRANSMITTER CSR
CTBUF:
ADDRESS OF TRANSMITTER BUFFER
CRVECT: ADDRESS OF RECEIVER VECTOR
CRPSW:
ADDRESS OF ASSOCIAED PSW
CTVECT: ADDRESS OF TRANSMITTER VECTOR
CTPSW:
ADDRESS OF ASSOCIATED PSW

2.3.5

TESTING ADDITIONAL

SERIAL

TH]S PROGRAM WILL SUPPORT

LINES

TESTING OF MULTIPLE

SLU'S.

IT REQUIRES

THE ADDRESS OF THE FIRST ADDITIONAL RCSR (STORED AT ''$BASE'') AND
ITS INTERRUPT VECTOR (STORED AT “'SVECT1'); AND WILL BE ABLE
TO ADDRESS ANY

15 CONSECUTIVE

SLU

STARTING AT

DEVICES.

EXAMPLE :

481

482
483
484
485
486

SEQUENCE

TO USE A CONSOLE ADDRESS OTHER THAN 177560, OR VECTOR OTHER

L67

468
469
470
6«
472

PAGE 9

THE

$BASE:

PROGRAM WILL

$VECT1:
BE

ABLE

SPECIFIED BASE

ADDRESS UP

300

TEST

THE

CONSOLE

PLUS ANY

776500 =-=> 776660

$RASE AND SVECT1 DEFAULT TO 776500 AND 300 RESPECTIVELY.
THE

PROGRAM ASSOCIATES UNIT NUME_RS TO DEVICES AS FOLLOWS:
(NUMBERS [N PARENTHESIS ARE OCTAL)

UNIT# O -->
UNIT# 1 ==>
UNITH 2 -=>
JNIT# 3 -->

UNIT# & -->

UNIT#15

==>

776500

ADDITIONAL DL11-W SLU'S WITHIN THE RANGE

| <

(ZOLDHO DL11=W 11/44 MFM SLU

(ONSOLE "ADDRESS STORED AT °'(RCSR'’]
BASE ADPRESS STORED AT ''SBASE'’
ASSOCIA'ED BASE VECTOR'SVOREP AT SVECTT"
.
BASE ADDRESS ¢+ (10)
BASE VECTOR + (10)
BASE ADDRESS + (20)
BASE VECTOR ¢ (20)
BASE ADDRESS ¢+ (30)
BASE VECTOR + (30)

BASE ADDRESS ¢ (160)
BASE VEITOR + (160

CZDLDOHO DLIT=w 11/44 MFM SLU
S08
509
510
2};

513

518
516

519
520
gg;

MACRO M1113

07-JuL~-81 15:03

B 2
PAGE 10

STARTING AT LOCATION 200 AND HAVING BITS5 OF SWR CLEAR, THE PROGRAM WILL SELF
SIZE THE NUMBER OF DEVICES (STARTING AT THE BAS ADDRESS) AND
STORE A BIT MAP AT "SDEVM'' (DEVICE MAP) TO INDICATE WHICH UNIT NUMBERS
ARE PRESENT AND WILL BE TESTED:

esseccccccccccccccccncs scceecccecccccesccccccece—e-

D UNIT
L
B

D UNIT
T
/S

r i nenes CUNIT
2

P OUNIT
!
1

CONSOLE!
!

A BIT MAP CAN BE ENTERED AT "SDEVM'‘ PRIOR TO STARTING THE PROGRAM
SETTING BITS OF THE SWR INHIBITS THE SELF-SIZING ANC DEVICE MAP
GENERATION,AND USES THE VALUE STORED B8Y THE OPERATOR.

ggz

EXAMPLE :

525
526
ggg

SWR = 000040
$RASE:
776500
SVECT1: 300

%%3

$DEVM:

THE PROGRAM W]LL

532
533
534

SEQUENCE

[BINARY

0 000 000 000 100 0001]

[BINARY - 0 000 000 GOO 001 011]
TEST -

UNIT# O = CONSOLE
UNITH 1 = 776500 ;
UNIT# 3 = 776520 ;

300
320

CZDLDHO DL11=w 11/44 MFM SLU
535
s}
537

MA“RO M1113
2.4

07-JuUL-81 15:03

PAGE 11

SEQUENCE

EXECUTION TIMES s==essecccccce-

538
539
540
22;

FOR DL11-w: (110 BAUD)
LONGEST SUBTEST TIME = S0 SECONDS
PASS TIME
= 60 SEC"NDS
ADDITIONAL DEVICES
- 55 SECONDS/DEVICE

543
544
545
546

FOR 11/44: (300 BAUD)
LONGEST SUBTEST TIME
PASS TIME
ADDJTIONAL DEVICES

50 SECONDS
60 SECONDS
55 SECONDS/DEVICE

’

——

CZDLDHO DL11=w 11/44 MFM SLU

MACRO M1113

3.0

07-JUL-81

15:03

PAGE

D
2
12

SEQUENCE

ERROR REPORTING

If A ROUTINE FAILS AND THE INHIBIT ERROR TYPEQUT

IS NOT SET, A PRINTOUT RESULTS

IN THE FORM:

"'(SOME ASCI1 MESSAGE)''
TEST#
ERR PC
R(CSR
XXXXXX
XXXXXX
XXXXXX

NOTE:
WHERE

(BIT13) OF

CANY APPLICABLE DAT

THE SWR

HEADINGS]

[ANY APPLICABLE DATA]

'RCSR''
IS DEPENDENT ON THE FAILURE
€ THEREFORE COULD BE TCSR,RBUF,TBUF,OR LKS

*XXXXXX'' IS AN OCTAL NUMBER.

THIS ERROR PRINTOUT OCCURS PROVIDED THE ERROR THAT EXISTS
WOULD NOT HINDEK THE TYPECUT. IN CASES WHERE IT IS NOT POSSIBLE
TO PRINT AN ERROR MESSAGE (J.E. FATAL CONSOLE TRANSMITTER
FAILURES), A HALT OCCURS AND THE PC CAN BE EXAMINED BY THE OPERATOR
TC FIND THE ERRCR INFORMATION IN THE PROGRAM LISTING.

NOTE:

FOR SOFTWARE

SWITCH OPERATION.,

THE

SWITCH REGISTER (AN

THE

OLD

CHANGED BY TYPING & CONTROL-G AT THE CONSOLE DURING ERROR PRINTGUTS.

AFTER COIRTINIIING FROM THE

ERROR HALT

SWR CONTENTS

IS DISPLAYED AND THE NEW CONTENTS CAN BE ENTERED.
IF ERROR HALTS ARE DISABLED, THE CONTROL-G RESPONSE OCCURS
IMMEDIATELY FOLLOWING THE TYPEOUT.

IF THE CPU THIS DIAGNOSTIC WILL BE RUN ON DOES NOT HAVE A (PU ERROR
REGISTER (ADDRESS 17777766), THE FOLLOWING SECTION DOES NOT APPLY,
SINCE THE ROUTINES MENTIONED PILANS FOR THAT POSSIBLITY.
IF

AN ERROR SHOULD OCCUR WHEN CHECKING THE POWER MONITOR BIT

[N THE

SCOPE ROUTINE, THE ERROR WILL BE CALLED FROM THAT ROUTINE.
If THE
BIT BECOMES SET AFTER THE SCOPE ROUTINE, AND AN ERROR OCCURS FOR ANY
REASON, *TWO* ERRORS WILL CALL.
THE PCWER MONITOR BIT ERROR WILL CALL
FIRST, THEN THE ERROR TO BE CALLED WILL CALL.
IT IS A DEFIN]!L POSSI-

BILITY THAT THE ERROR WAS CAUSED BY THE POWER SUPPLY(S) THAT WERE OUT
OF SPECIFICATION, AND REPAIR SHOULD BE EXECUTED BEFORE RELYING ON THE
RESULTS OF

THt

FAILURE.

CZDLDHO DL11=w 11/44 MFM SLU
585
586
587
88
589
gg?

MACRO M1113

07-JuL=-81

15:03

PAGE

E_2
13

4.0

SUBRCUTINE ABSTRACTS
esesccccmcccccecca---

6.1

TRAPCAT(CHER

SEQUENCE

592
593
ggg

THIS IS A SERIES OF INSTRUCTIONS STARTING AT LOCATION O DESIGNED TO
DETECT AND ISOLATF UNEXPECTED TRAPS TO THE TRAP AND INTERRUPT VECTOR
AREA OF MEMORY.

596
597
598
288

EACH VECTOR ENTRANCE ADDRESS IS LOADED WITH THE ADDRESS OF THE NEXT
LOCATION. THE NEXT LOCATION IS LOADED WITH A BREAK POINT TRAP (000003).
THUS AN ILLEGAL TRAP OR INTERRUPT CAUSES A TRAP THROUGH THE BPT VECTOR(14)
WHICH POINTS TO THE "'CATCH'' ROUTINE.

60
602
603
604
605
606
gg;

THE "'CATCH'' ROUTINE REPORTS THE PC THAT CAUSED THE ORIGINAL TRAP AND
THE LOCATION OF THE TRAP VECTOR (IF UNDER APT, AN ERROR [S INDICATED TO APT).
AFTER REPORTING THE ERROR THE PROGRAM HALTS. THE PROGRAM MUST BE RESTARTED
AT THIS POINT.

609
610
611
612
613

2}2

616
617
618
2;8

&.?

WRPSW

THIS ROUTINE iS USED TO WRITE THE PSW BY POPPING VALUES FROM THE
STACK, THIS METHOD IS USED TO BE COMPATIBLE WITH ALL 11 FAMILY
PROCESSORS.
4.3

SCOPE

THIS ROUTINE CALL IS PLACED BETWEEN EACH SUBTEST. T RECORDS THE STARTING
ADDRESS OF EACH SUBTEST AS IT ]S BEING ENTERED AND UPDATES THE
TEST NUMBER. If A SCOPE LOOP IS REQUESTEL, IT WILL JUMP TO THE START OF THE
SUBTEST AT WwHI(CH THE SCOPE LOOP IS REQUESTED.

- CZDLDHO DL11=wW 11/44 MFM SLU

623
6%2
&L

07-JuL-81

4.4

ERROR

626
627
628
€29

4.5

4.6

643

SEQUENCE

$POWER

CKSWR

IS USED TO DETECT

THE RECEPTION OF

A CONTROL=G

FROM THE CONSOLE. THE CALL USES ''SREAD'' TO PERFORM THE CONROL=G
SEQUEMNCE OF DISPLAYING THE CONTENTS OF THE SOF TWARE SWITCH REGISTER
AND THE ENTERING THE NEW CONTENTS FROM THE TERMINAL.

5.0

AUTOMATIC

INITIATION OF

11/44

T/A CONSOLE

TEST

vI4 WRAP CABLE
ceseesssssscccsscaccc—ccccemmccccmcceece—eae===
PURPOSE:

THE T/E(OR T/A) CONSOLE TEST CAN BE IMPLEMENTED
BY MANUALLY TYPING T/E(OR T/A) ON THE KEYROARD
OF THE TERMINAL WHEN [N CONSOLE MODE. IN ORDER TO
IMPLEMENT THIS TEST IN AN AUTOMATIC WAY [N MANUFACTURING
WHILE UNDER APT, THE USE OF A WRAP (ABLE FROM

THE

TUS8 TO THE CONSOLE CAN BE USED ALLOWING THIS

DIAGNOSTIC TO ISSUE THE 'T/A' COMMAND TO THE CONSOLE.
THE DIAGNOSTIC WILL ISSUE THE APPROPRIATE SEQUENCE
OF COMMANDS TO THE CONSOLE VIA THE WRAP (ABLE WHEN
BIT02 OF SWR -1. THE DIAGNOSTIC WILL THEN MONITOR
THE EXPECTED RESPONSE FROM THE CONSOLE VIA THE WRAP
CABLE AND HALT ]F THERE IS AN ERROR. THE T/A TEST
IS DONE ONLY AFTER ALL SLUS ARE TESTED. IF T/A IS SUCCESSFUL

6bb

665

666

ggg

"END PASS'

669

FIGURE

IS PRINTED AND THE DIAGNOSTIC STARTS AGAIN.

SHOWS

THE PROPER WRAP (ABLE

SETUP AND

REQUIREMENTS FOR AUTOMATICALLY

672
&73
674
675
676

FOR THE TERMINAL TO MONITOR ALL COMMUNICATION FROM
THE CONSOLE OUTPUT DURING EXECUTION OF THE DIAGNOSTIC
IN *WRAP MODE'".

671

6?7

678
679

camas

THIS ROUTINE CALL

64b
645
gzg

650
651
652
¢53
654
655
656
657
65
659
660
661
652
663

F
2
14

THIS ROUTINE SAVES ALL GENERAL REGISTERS DURING POWER=DOWN
AND RESTORES THEM AT POWER-UP. [F A POWER FAILURE OCCURS
"POWER'' IS PRINTED AT THE CONSOLE At TER POWER IS RESTORED.

6%8

648
649

PAGE

USING ‘'SERRTYPE''.

€36
637
640
22;

15:03

THIS ROUTINE CALL IS PLACED WHEREEVER AN ERROR REPORT
1S DESIRED. THE LOWER BYTE OF THIS CALL IS USED AS THE ERROR NUMBER
AND AS A POINTER INTO THE ERROR TABLE . THIS ROUTINE REPORTS ERRORS
TO APT USING ‘‘SAPTYPE'' AND TYPZS ERROR REPORTS TO THE CONSOLE

630

631
632
633

2%2

MACRO M1113

INITIATING T/A FROM THE

THE DIAGNOSTIC.NOTICE THAT THIS ARRANGEMENT ALLOWS

TYPEOUT EXAMPLES

e e meee-e-

WITH THE CONFIGURATION OF

FIGJRE

1 AND ‘WRAP MODE'* SELECTED

(ZDLDHO DL11=wW 11/44 MFM SLU
680

681

ggg

684

685

686
687
688

689

690
691
692

693

694
695

696

697
698
699

700

MACRO M1113

(07-JuL=81 15:03

PAGE 14-1

SEQUENCE

THE PROGRAM MAY BE LOADED BY APT.
THE

FOLLOWING WOULD BE

SEEN ON

THE

TERMINAL:

*pP

CONSOLE-TESTR
Dd>O>T/A

CONSOLE=-TESTR

END PASS *P
CONSOLE
>>>T/A

CONSOLE-TESTB

DESCRIPTION: REFERING TO THE

708

LOCAL

SECTION

END PASS “P
CONSOLE

;82

707

TABLF B' OF

>>T/A

END PASS “P

706

°F

C7DLDHO DL11-W/1144 MEM SLU

02 DEVICES UNDER TEST
CONSOLE

;8;

705

2.3.3 WERE USED WITH THE EXCEPTION OF ALLOWINC TYPEQUTS(SENVM-200)

...

THE DIAGNOSTIC

BAOVE PRINTOUTS:
IS LOADED WITH THE

TI"£ BEING PRINTED.

B. TWwO SLU DEVICES(CONSOLE.TUSB) ARE SPECIFIED
(. BOTH SLUS ARE

709

TESTED COMPLETELY.

THIS POINT

THE

THE DIAGNOSTIC ISSUES “© TO THE WRAP CABLE.

“P TYPED ON THE TERMINAL IS THE MFM CONSOLE ECHO.
CONSOLE PERFORMS [TS OWN SELF TEST BY TYPING

THE CONSOLE ENTERS CONSOLE MODE AND

710
14k

THE
THE

713

THE DIAGNOSTIC

715
716
717
718
719

THE MFM THEN PERFORMS THE T/A TEST SHOWN BY THE TERMINAL
TYPING *CONSOLE~TESTR'.THE DIAGNOSTIC LOOKS FOR THE
*B' IN THIS TYPEQUT.AND WHEN FOUND , CONSIDERS
THE TEST A SUCCESS. THE DIAGNOSTIC wlil TYPE END PASS
INDICATING A SUCCESSFUL PASS OF THE DIAGNOSTIC.

712

714

720
721

*CONSOLE® FOLLOWED BY >>>,
THEN [SSUES

SHOWS THE CONSOLE ECHO OF

THE CONSOLE PROMPT.

T/A AND

THIS.

THE

TERMINAL

THE DIAGNOSTI( C(ONTINUES WITH FURTHER PASSES OF
DIAGNOSTIC.

THE

p——

——————

t (ZDLDHO DL11=w 11/44 MFM SLU
723
724

725

726

727
728
729
730

731

732
733
734
735
736
737

738
739
740

741

MACRO M1113

07-JuL=-81

15:03

PAGE 15

SEQUENCE

"E TABLE B' OF 2.3.3 WERE USED WITH TYPEOUTS SUPPRESSED

($ENVM=240)
NOTICED:

AS STATED,

CONSOLE

>>>T/A

(ONSOLE~TESTB*P
CONSOLE

>>>T/A

CONSOLE=-TESTR*P
CONSOLE

>>>T/A

CONSOLE-TESTB*P

THEN THE FOLLOWING TYPEOUTS WOULD BE

CZDLDHO DL11=w 11/44 MFM SLU

MACRO M1113

07-JuL-81

743
744

PAGE

FIG.

1= WRAPAROUND (ONFIGURATION - AUTO INITIATION OF
117644

747
748

15:03

SEQUENCE

T/A

CONSOLE

7[,9

;t.'ttt'tt'l't"tt'ltttttttttttfit.fittt

;29

;g%

754

;

755
756
757
758
759
760
761
762
763

TESTM

eessssccscccccccccscsccccscccccececccccc—ccea-

:
:
:
N
N
:
:
;

| 224232222222

EERRAEEE R AN SRR NE N ]

WRAP AROUND CABLE

TUS8

INPUT

OuUTPUT

]
.
.
]
.
.
.
.

CONSOLE

TTY PORT

INPUT

ouTePUT

;
.
!
}
!
(1
!
L et
D
+ [ m———— +
S1/ +(2
]
)
3
\

temmcc
e
ac——-

.
!
i

Le
L
+

764
765
766
767
;gg

N
;
:
:
:

770
771
772
773

;
.
:
N

WHEN THE

;

THIS ALLOWS THE USE OF THE TERMINAL WITH THE CONSOLE

776
777
778
779
780

;
:
N
:
;

WHEN THE

THE

;gz

THIS

785
786
787

: BEFORE THIS TEST CAN BE RUN THE CONSOLE UART,TTY,TUS8 MUST BE AT
: THE SAME BAUD RATE. THE CONSOLE AND TUS8 UART,AND THE TTY SHOULD BE
JSET UP WITH THE SAME STOP BIT SETTING,

;

WITH PAR]TY

790

;

FOR MORE

793

ttt.tttttt'tt.ttttitttl'Qt'tt.'.'tt.'fitttttnt.-tttt't'.t't."tt""titt'l

;;g

;g;

;gg

;3;

;

!
]
)
)
TTY PRINTER

SWITCH

/
!
.
!
TTY KEYBOARD

IN "NORMAL'‘' MODE CONTACTS ARE:
S1-C2 IS CLOSED
S1-C1 IS OPEN
S3-C3 IS OPEN

SWTICH IS

THIS ALLOWS
TTY

THE

IN 'WRAP'' MODE CONTACTS ARE
S1-C1 CLOSED
S1-C2 OPEN
S2=C3 CLOSED
TUS8 PORT TO COMMUN]CATE WITH THE

TO MONITOR

THE

CONSOLE

IS ALL DONE WITH A DPDT

OuTPUT

INFORMATION SEE

THE MFM PRINTS AND

7016942

PORT

AND FOR

SWIT(CH

INHIBITED AND WITH A UORD LENGTH OF

CABLE DRAWING NUMBER:

CONSOLE

7 OR 8B BITS

THE WRAP AROUND

‘

- CZDLDHO DL11=w 11744 MFM SLU

MACRO M1113

07-JUL~81

15:03

J_2

PAGE 17

SEQUENCE

80%

AT AT AT AT AT AT AT A7 AT A7 &Y AT Ad AT AT AF AT AT AT AV AT ST AT AT AT AT 2V a7 AF &Y £ 7 4% &% &Y A

807

Jrewnensnnannnnnnnnnensr

808
g?g

g}}

* ARGUMENTS :

813

$1) ADRESS ==

IF NON-BLANK=ADDRESS OF USER ERROR ROUTINE

815

TYPEOUTS,

804
805
806

814

816

817
818

g;g

AT AT ST AT A7 AT AT A 20 AT AT A7 A0 AT AT AT AT AT AT A0 AT AV AT AY ST AT AV AF A0 AL AF AF A7 &Y &)

:
;

IF BLANK AND SW13 [S USED TO INHIBIT ERROR

NOTE:

;
;

;

826

$3) INSTR2 ==

830

SNOTE:

833
834
ggg

:SwW10=1 BELL ON ERROR
;SW13=1 INHISIT ERROR
:SW15=1 HALT ON ERROR

831
832

:
.

IF NON-BLANK WILL REPLACE THE LAST INSTRUCTION (RTI).

THIS ROUTINE IS CONDITIONALLY ASSEMBLED BY $SWR

:
FOR SWO09,SW10,5W13,8S5W1S
:SW09=1 LOOP ON ERROR

21y

841

(AR AAAE RS

SAS

Y XY XY XY 2Y 2Y ¥

ARl

¥ 2F XY AV IV

RSttt

tld)

Y AV AV A¥ 2 2V 2V XY 2V Y 2¥ 2 2V IV AW 2 2N 2¥ XY 2¥ 2¥ 2¥

;’.’t’t't’t‘t't’!’l’t‘t"’t‘t,t't”t't’t’t,.’Q‘.‘t't’t‘l‘t"","t't't't

1254

seasannnennanrnnnwnnare

1255
1256
;Sgg

;
;.$ERRTYP IS USED
;ITS INTENDED USE

1259

*ARGUMENTS:

1260

;

;gg%

;

1264

1266

;

1265

'YPEOUTS

TYPE AN ASCIZ STRING (.STYPE) DEPENDING ON $SWR

1251

1261

TYPEOUTS A *'CR'* AND 'LF'' WILL ALWAYS
BE THE LAST THING TYPED AND IS PROVIDED

REFER TO ARGUMENT 2 (INSTR) FOR AN EXAMPLE OF USE.
BE SURE TO PROVIDE AN RTI FOR EXITING THE ROUTINE.

gzg

}gg%

TYPED.

OF THE ROUTINE
(EXAMPLE OF USE
<<MOV R1,SAVR1>>
NOTE:
INSTR CAN BE A MACRO I.E. <<SAVE <R1,R2,R3,R4>>>)

*ROUTINES REQUIRED:

843

THE '‘ERROR'' WILL BE

IF NON-BLANK WILL BE THE FIRST INSTRUCTION

:
;
;

g%g

842

THE PC OF

IF SW13 IS USED TO INHIBIT ERROR

BY THIS ROUTINE

i20 INSTR ==

827
gsg

wonensanwnannnnnwnennn

:.$ERROR IS THE ERROR HANDLER

821

822
823
ggg

GERRAOR

;

SERRTYP

wrnnnnnnnsensnnnennnr

TO REPORT ERRORS
IS TO BE IN CONJUCTION WITH .SERROR

BLANK ALL

DATA

IN THE

‘DATA TABLE'*(DT)

BE OCTAL NUMBERS AND ARE TYPED AS SUCH.

ARE

ASSUMED

IF NON-BLANK THE ‘DT’' CAN CONTAIN BOTH OCTAL AND DECIMAL

NUMRERS WITH THE

NUMBER IS TO BE

'DATA FORMAT '(DF)

TYPED.

[NDICATING HOW EACM

THE 'DF'' MUST BE A BYTE DATA STRING

CZDLDHO DL11=W 11/44 MFM SLU

MACRO M1113

07-JuL-81

15:03

;

1267
1268

K_2
PAGE 17-1

WITH "0'" FOR OCTAL AND '"1'' FOR DECIMAL.

éROUTINES REQUIRED:
51)
.STYPOCT

c69

1270
1271
1272
1273
1274
1275
1276
1277
1278
1279

TYPE AN OCTAL NUMBER

52)
.STYPDEC
éVOTES:
51)

1280
1281
1282

TYPE A DECIMAL NUMBER (ONLY NEEDED IF ''A"" IS NON=-BLANK).

THIS ROUTINE PROVIDES AN AUTOMATIC '‘CARRIAGE RETURN-LINE FEED"'

FOR "EM'',

"DH'' AND "DT"".

j?)

TWO(2) SPACES ARE TYPED AFTER EACH NUMBER FOR 'DT'’,

.SERROR SERRTYP

ifXAMPLE OF USE WITH .$ERROR

1283
1284
1285
1286
1287

SEQUENCE

.SERRTYP

Jo$ERRTYP IS ENTRY POINT OF .S$ERRTYP

2."DT"" CONTAINS OCTAL AND DECIMAL NUMBERS

[

"t.'t!"t'itttl’fittfitfi'ttitttt'ttfitt't'tttt'tfitt'.tt'..

MCALL

.MCALL
.MCALL

MCALL

.SBTTL

001100
104000

000004

NEWTST,$SNEWTEST,.$TYPE,.$TYPOC,.$TRAP
.SETUP,STARS,PUSH,POP,SETUP,
. .EQUIV
.$APTHDR,.$APTBLS,.$ACT11
.$CMTAG,.SEOP,.SREAD
.EQUAT

BASI( DEFINITIONS:

c*INITIAL ADDRESS OF
STACK=
1100
ERROR=EMT

STACK POINTER s+

1100 «w»

SCOPE=]O0T

s*MISCELLANEOUS DEF INITIONS

000011
000012
000015
000200

HT=

177772
177570
177570

PIRQ-

177772

000000
000001

RO=

177776
177776
177774

THE

LFCR=
CRLF=
PS=

:;CODE

;§C7gg

;. PROCESSOR STATUS WORD

12
15
200

STKLMT- 177774

FOR HOR]ZONTAL

TAB

;. CODE FOR LINE FEED
:;CODE FOR CARRIAGE RETURN
;:CODE FOR CARRIAGE RETURN-LINE FEED
;s STACK LIMIT REGISTER

; .PROGRAM INTERRUPT REQUEST REGISTER

DSWR=
177570
; ;HARDWARE SWITCH REGISTER
DDISP=
177570
;. HARDWARE DISPLAY REGISTER
; *GENERAL PURPOSE REGISTER DEF INITIONS

R1-

s ;GENERAL REGISTER
;s GENERAL REGISTER

. CZDLDRO DL1T-W 11/44 MFM SLU
BASIC DEF INITIONS

000002
000003
000004
000005
000006
000007
000006
000007
000000
000040
000100
000740
000200
000240
000300
000340
100000

040000
020000
010000
004000
002000
001000
000400
000200
000100
000040
000020
000010
000004
000002
J00001
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001
100000

040000
020000
010000
004000
002000

MACRO M1113

07-JUL-81

R2=

) ¥4

R6=

%16

R3R4=
RS=

R7SP=
PC-

15:03

PR?7-

L_2

17-2

SEQUENCE

; GENERAL REGISTER

%3
%4
%5

;s GENERAL REGISTER
;s GENERAL REGISTER

X7
%6
X7

;o GENERAL REGISTER
;:STACK POINTER
;s PROGRAM COUNTER

J*PRIORITY LEVEL
PRO0
PR1=
40

PR2=
PR3=
PR4~
PRS=
PR6=

PAGE

;s GENERAL REGISTER

;. GENERAL REGISTER

DEFINITIONS
:;PRIORITY LEVEL

100
140
200
240
300

340

JJPRIORITY
:;PRIORITY
:;PRIORITY
;:PRIORITY
J;PRIORITY
JsPRIORITY

O
LEVEL 1
LEVEL 2
LEVEL 3
LEVEL 4
LEVEL S
LEVEL 6

;:PRIORITY LEVEL 7

;" 'SWITCH REGISTER'® SWITCH DEFINITIONS
SW15=
100000
SWi440000

Swi13=

20000

SwW12=
Swlil=

10000
4000

SW05=

SW10=
SW09=
SW08=
SW07=
SW06=

Swo4=
SW03=
SW02=
swi1=
SWO0=

2000
1000
400
200
100

20
10
4
2
1

Sw8=Sw08
SW7=Sw07
SW6=SW06
SW5=SwW05S
SW4=SW04
SW3=Sw03
Sw2=Sw0?
SW1=Sw01
SW0=SW00

;*DATA BIT DEFINITIONS

BIT15=
BIT14=
8IT13=
BIT12=
B8IT11=
BIT10=
817T09=
BIT08=
BIT07=
BIT06=
BITO5=
BIT04=

100000
40000
20000
10000
4000
2000
1000
400
200
100
40
20

(BITO0 TO BIT1S5)

- (ZDLDHO DL11-w 11/44 MFM SLU

-BASIC DEF INITIONS

1435

1636
1437
1438
1439
1440
1441
1442
1443
1444

1461
1462 000042
1463

1464
1466
1467
1468

1469 000174
1470 000176
1471

SEQUENCE

000004
000010
000014
000014
000014
000020
000024
000030

ERRVEC= &
RESVEC= 10
TBITVEC=14
TRTVEC= 14
BPTVE(C= 14
10TVEC= 20
PWRVE(= 24
EMTVEC= 30

. TIME OUT AND OTHER ERRORS
;;RESERVED AND ILLEGAL INSTRUCTIONS
;20T BIT
;. TRACE TRAP
; sBREAKPOINT TRAP (BPT)
;s INPUT/0UTPUT TRAP (]OT) ««SCOPEx=*
;;POWER FAIL
;sEMULATOR TRAP (EMT) ==ERRORww

000060
000064

TKVEC=
TPVEC=

;.TTY KEYBOARD VECTOR
J2TTY PRINTER VECTOR

000240

000007

10
4
2
1
BIT9=BIT09 .
B8118=B]T08
8117=BI1T107
B8116=B]T106
BIT5=BIT05
BIT4=BIT04
BIT3=B]T03
BIT2=81T02
BIT1=K1T01
BIT0=31T00
;*BASIC ''CPU'' TRAP VECTOR ADDRESSES

TRAPVE(C=34

MFPT-7

176500

000000

;:"'TRAP'' TRAP

60
64

PIRQVE(C-240

ABASE=

000300
000400
000001
161000
000003

AVECT1=
AUSWR=
$TN
$SWR=
BPT-

. :PROGRAM INTERRUPT REQUEST VECTOR
176500

300
400
1
161000
000003

.-0

RN R

AR AR AR RN AN

;THIS IS THE COMMAND FOR A TRAP
:
THROUGH 14 (BPT TRAP)

AN R AN R A RARRA R AR N AN R AR R ANR AR AR AR R AR

RN RN

AR AR

J*ALL UNUSED LOCATIONS FROM 4-776 CONTAIN A ‘' +2,BPT"’
;*SEQUENCE TO CATCH ILLEGAL TRAPS & INTERRUPPTS

}22;

;228 000016

PAGE 17-3

BIT03=
BIT02=
B8IT01=
BITO00=

1445
1446

1656
1457
1458 000014

07-JuL-81 15:03

00001C
000004
000002
000001
001000
000400
000200
000100
000040
000020
000010
000004
00000¢
000001

000034

1434

MACRO M1113

;*LOCATION O CONTAINS O TO CATCH IMPROPERLY LOADED VECTORS

000014
014520

.-14
.WORD

.WORD

340

000042
000000

.=
.WORD

42
O

000174
000000
000000

."
DISPREG: .WORD
SWREG:
.WORD

000340

CATCH

174
0
O

;THE BPT TRAP VECTOR POINTS "0 THE
;
JLLEGAL TRAP HANDLER ''CATCH''

CZDLDHO DL11=w 11/44 MFM SLU

BASIC DEF INITIONS
1672
16473 000200

1474 000204
1475 0002°C

00020C
000137

000137
000137

003046
017600
020020

MACRO M1113

07-JuUL-81

.=200

JMP

IMP

JMP

15:03

START

ECHO

ouTTST

PAGE

N_2
17-¢4

SEQUENCE

;DO INTERFACE TEST
;DO ECHO TEST
;DO OUTPUT TEST TO TERMINAL

(IDLDHO DLY1=~w 11744 MFM SLY
1

ASIC DEFIN l TIONS
1477
1478

00050C

MACRO M1113

LSBTTL
A

000046

000052

000500
00004 6
014376
000052
000000
000500

07-JuL=-81

15:03

o3
500
ACT11 HOOKS

2222283222202

B 3
PAGE 18

20220

*HOOKS REQUIRED BY ACT11

SEQUENCE

ARl iRttt
iR 2]

sszzc=.

:SAVE PC

iégng

::1)SET LOC.46 TO ADDRESS OF SENDAD IN .$EOP

WORD

.=$SVP(

;:2)SET LOC.52 TO ZERO
:; RESTORE PC

(ZDLDHO DL11=W 11/44 MFM SLU

APT PARAMETER BLOCK

1480

MACRO M1113

07-JuUL~81 15:03

.SBTTL
A2

PAGE 19

APT PARAMETER BLOCK

.' L2222 2222222222282 22222220

000024
000044

3322323323232 2322322222322200200233200df2RiRiRRsRRRiRRtRRRRRS
Rl d]

SSET LOCATIONS 24 AND 44 AS REQUIRED FOR APT
000500
000024
000200
000044
000500
000500

SEQUENCE

CEX=,
.=24
200
. =44
SAPTHDR
.$X

2222002 22222l

dlRR

iRl n

R d

;. SAVE CURRENT LOCATION
;.SET POWER FAIL TO POINT TO START OF PROGRAM
;;FOR APT START UP
;.POINT TO APT INDIRECT ADDRESS PNTR.
;;POINT TO APT HEADER BLOCK
;;RESET LOCATION COUNTER

N tfitttt*tQfi'**t*ttt*ttt'it*ttt*tfitfitfi.tktttitttfifitttttt'tt't'tfi'

*SETUP APT PARAMETER BLOCK AS DEFINED IN THE APT-PDP11 DIAGNOSTIC

000500

000500
000502
000504
000506
000510
0C0512

00000C
0010€6
000050
000060
000055
000030

. INTERFACE SPECL.
$APTHD:

$HIBTS:
$MBADR:
$TSTM.
$PASTM:
$UNITM:

.WORD
.WORD
_WORD
_WORD
_WCRD
.WORD

0
;.TWO HIGH BITS OF 18 BIT MAILBOX ADDR.
SMAIL
;;ADDRESS OF APT MAILBOX (BITS 0-15)
50
;:RUN TIM OF LONGEST TEST
60
;;RUN TIME IN SECS. OF 1ST PASS ON 1 UNIT (QUICK VERIFY)
55
;;ADDITIONAL RUN TIME (SECS) OF A PASS FOR EACH ADDITIONAL UNIT
SETEND-SMAIL/Z2 ;;LENGTH MAILBOX-E
TABLE (WORDS)

CZDLDHO DL11=w 11/44 MFM SLU

COMMON TAGS

1482

MACRO M1113

07-JuL-81 15:03

.SBTTL

PAGE 21

SEQUENCE

COMMON TAGS

::'Qt"ttti'QQQ'.Q'*"Q""'Qt't'iit'fiitttttt'tt'ttt'tt.tt't".li

;*THIS

001000001000

001002
001003
001004
001006
001010
001012
001014
001015
001016
001020
001022
001024
0C1026
001030
001032
001034
001035
001036
001040
001042
001044

001046
001050
001052
001054
001055
001056
001057
001060
001062
0C1063
001064

TABLE

CONTAINS

000000
000
000
000000
000000
000000
000000
000
001
G0O0O0QO0
000000
000000
000000
000000
000000
000000
000
000
000000
177570

;*USED IN THE PROGRAM.
.=1000
$CMTAG:
.WORD
0
$TSTNM: .BYTE
©
$ERFLG: .BYTE
0
$ICNT:
.WORD
O
$LPADR: .WORD
0
$LPERR: .WORD
O
SERTTL: .WORD
O
$ITEMB: .BYTE
O
$ERMAX: .BYTE
1
$ERRPC: .WORD
0
$GDADR: .WORD
0
$8DADR: .WORD
O
$GDDAT: _WORD
O
$8DDAT: .WORD
0
.WORD
0
WORD
0
$AUTOB: .BYTE
0
$INTAG: .BYTE
0
.WwORD
O
SWR:
.WORD
DSWR

177562
177564
177566
000
002
012
000
000000

$TKB:
177562
$TPS:
177564
$TPR:
177566
$NULL:
.BYTE
$FILLS: .BYTE
$FILLC: .BYTE
$TPFLG: .BYTE
SESCAPE:0

001000

177570
177560

077
015
012

DISPLAY: .WORD
$TKS:
177560

000

VARIOUS COMMON STORAGE

;s START OF

LOCATIONS

COMMON TAGS

;s CONTAINS
;s CONTAINS
;s CONTAINS
;. CONTAINS
;s CONTAINS
;. CONTAINS
2 ;CONTAINS
;. CONTAINS
;s CONTAINS
;. CONTAINS
;s CONTAINS
;. CONTAINS
.. CONTAINS

THE TEST NUMBER
ERROR FLAG
SUBTEST ITERATION COUNT
SCOPE LOOP ADDRESS
SCOPE RETURN FOR ERRORS
TOTAL ERRORS DETECTED
ITEM CONTROL BYTE
MAX. ERRORS PER TEST
PC OF LAST ERROR INSTRUCTION
ADDRESS CF 'GOOD* DATA
ADDRESS OF °'BAD' DATA
°'GOOD' DATA
°'BAD' DATA
s ;RESERVED-=NOT TO BE USED
;oAUTOMATIC MODE INDICATOR
5 INTERRUPT MODE INDICATOR
;. ADDRESS OF SWITCH REGISTER

DDISP

2 ;ADDRESS OF DISPLAY REGISTER
2. TTY KBD STATUS

;. TTY KBD BUFFER
;:TTY PRINTER STATUS REG. ADDRESS
2:TTY PRINTER BUFFER REG. ADDRESS
2 sCONTAINS NULL CHARACTER FOR FILLS
;s CONTAINS # OF FILLER CHARACTERS REQUIRED
;o INSERT FILL CHARS. AFTER A "LINE FEED''
;. 'TERMINAL AVAILABLE'' FLAG (BIT<07>=0=YES)
;;ESCAPE ON ERROR ADDRESS

0
2

1¢
O

$QUES:
$CRLF:
$LF:

.A3ITL
ASCII
LASCIZ

/2/
<15
12>

;s QUESTION MARK
;. CARRJAGE RETURN
J;LINE FEED

"SBTTL

APT MAILROX-ETABLE

';tt'*ttifi'fitt‘t'!*!ttttt"ttt*ttt*fittfiitttfititttttttt.tttttt.'tt

;:tt'tt'tifi'tttt'tttfitfit'fitt't!fififittfi.ttt!'tit'tttiitli'tt'ttttt!

001066

.EVEN

001066
001070
001072
001074
001076
001100
001102
001104

000000
000000
000000
000000
000000
000000
000000
000000

001106
001107
001110
001112

000
000
000000
000400

001106

SMAIL :

; sAPT MAILBOX

$MSGTY:
$FATAL:
$TESTN:
$PASS:
$DEVCT:
SUNIT:
$MSGAD:
$MSGLG:

.WORD
.WORD
.WORD
.WORD
.WORD
.WORD
.WORD
.WORD

AMSGTY
AFATAL
ATESTN
APASS
ADEVCT
AUNIT
AMSGAD
AMSGLG

$ENV:
$ENVM:
$SWREG:
$USWR:

.BYTE
_BYTE
.WORD
_WORD

AENV
;- ENVIRONMENT BYTE
AENVM ; ENVIRONMENT MODE BITS
ASWREG
;;APT SWITCH REGISTER
AUSWR
;;USER SWITCHES

$ETABLE :

;;MESSAGE TYPE (ODE
;FATAL ERROR NUMBER
;;TEST NUMBER
;;PASS COUNT
;;DEVICE COUNT
;;1/0 UNIT NUMBER
;;MESSAGE ADDRESS
;;MESSAGE LENGTH

;. APT ENVIRONMENT TABLE

CZDLDHO DL11-w 11/44 MFM SLU
APT MAILBOX-ETABLE

001114

00000C

MACRO M1113

07-JuUL-81

$CPUOP:

.WORD

15:03
ACPUOP

E
3
PAGE 21-1

SEQUENCE

4=01,11/05=02,11/20=03,11/40-04,11/45-C5
70=06,PDQ=07,0=10

000
000

001120

000000

001122
001123
001124
001126
0C1127
001130
001132
001133
001134
001136
001140
001142
001144
001146

0CO
000
000000
00

:
:
:
:
:
:
:
:
:
:

000000

JBYTE

.BYTE

AMAMS1
AMTYP1

900 NSEC CORE=001
300 NSEC BIPOLAR=002
500 NSEC MOS=003

AMTYP?

;;HIGH ADDRESS.,BLKA
MEM.LAST ADDR.=3 BYTES,THIS WORD AND LOW OF '‘TYPE'' ABOVE
J:;HIGH ADDRESS.M.S. BYTE
M.
TYPE ,BLKA#?2
:sME

AMAMS
3
AMTYP3
AMADR3

;:;HIGH ADDRESS,M.S.BYTE
;;MEM,.TYPE ,BLKA3
:;MEM.LAST ADDRESS.BLK#3

.WORD

AMADR1

.BYTE
JBYTE
.WORD
JBYTE
JBYTE
.WORD
JBYTE
BYTE
WORD
.WORD

AMAMS2

.WORD
.WORD
. WORD

L TIME CLOCK
BI T 10-R
F
T
OATING
POINT PROCESSOR
BI
T
MEMORY
NANAGEMENT
Bl
HIGH ADDRESS.M.S. BYTE
:;MEM, TYPE ,BLK#1
MEM_TYPE BYTE
-(HIGH BYTE)

AMADR?

AMAMS4
AMTYP4
AMADR&
AVECT1
AVECT?2
ABASE
ADEVM

;:MEM,LAST ADDRESS.BLK#Z2

;:HIGH ADDRESS.,M.S.BYTE
TYPE ,BLKAS
2 ;MEM,

;:MEM,LAST ADDRESS.BLK#4

:: INTERRUPT VECTOR#1,BUS PRIORITY#

;2 INTERRUPT VECTOR#2BUS PRIORITYA?

;;BASE ADDRESS OF EQUIPMENT UNDER TEST
;;DEVICE MAP

- (ZDLDHO DL1T=-w 11/44 MFM SLU
ERROR POINTER TABLE

MACRO M1113

07-JUL-81

.SBTTL

15:03

PAGE 22

SEQUENCE

ERROR POINTER TABLE

;*THIS TABLE (ONTAINS THE INFORMATION FOR EACH LRROR THAT CAN OCCUR.
;*THE INFORMATION IS OBTAINED BY USING THE [NDEX NUMBER FOUND IN

;*LOCATION SITEMB. THIS NUMBER INDICATES WHICH ITEM IN THE TABLE IS PERTINENT.

;*NCTE:
;*NOTEZ2:
.

[

001146
001146
001150
001152
001154

020104
024265
025046
0000C0

EM
DH

. w

001146

IF SITEMB IS O T HE ONLY PERTINENT DATA IS

$ERRTR:
.SERRTR:

EACH ITEM IN THE

s sPOINTS

s sPOINTS
s ;POINTS
;;POINTS

TABLE

TO THC
TO THE
TO THE
TO THE

(SERRP().
CONTAINS & POINTERS EXPLAINED AS FOLLOWS:
ERROR MESSAGE
DATA HEADER
DATA
DATA FORMAT

EM]
DH1
DT1
0

;"'CAN NOT ACCESS TCSR''
T(SR"'
;''TESTA ERR PC
R
P(,TCS
N,SERR
JSTEST

;"'CAN NOT ACCESS TBUF''
:'TESTA ERR PC TRUF"'

001156
001160
0C1162
001164

020130
024312
025056
000000

EM?
DHZ
DT2
0

001166
001170
001172
001174

020154
024265
025046
000000

EM3
DH1
DT
C

;"'TCSR DONE NOT CLEARED WITH TBUF

020221
024265
025046
000000

EMS
DH1
DT1

;"'TCSR DONE NOT SET'

020243
024265
025046
000000

EMS
DH]

sTCSR DONE NOT SET WITH RESET
"(SR"'
;'TEST# ERR PC

020300
024337
025066
J00000

EMG

:"'CAN NOT ACCESS RCSR''

DT6

,
TBUF
;STESTN,SERRP(

;JU'TESTA ERR PC
T(SR''
JBTESTN,SERRPC,TCSR

:"'TEST# ERR PC
T(SR"'
JSTESTN,SERRPC,TCSR

JSTESTN,SERRPC,TCSR

;'TESTAH ERR PC
R(SR"'
;STESTN,SERRPC
,RCSR

FULL'®

CZDLDHO DL1T=w 11/44 MiM SLU

ERROR POINTER

TASLE

MACRO M11'3

07-JuL-81

15:03

G.3
PAGE 23

SEQUENCE

1513 001226
1514 001230
1515 001232

020324
024364
025076

EM?
DH?
D17

;"'CAN NOT ACCESS RBUF''
;'TESTA ERR PC
RBUF'’
;STESTN,SERRPC
,RBUF

*518 001236
1519 001240
1520 0012642
: 25; 001244

020350
024411
025106
000000

EM10
DH10
D110
0

;"'CAN NOT ACCESS LKS''
;'TESTA ERR PC
LKS''
JSTESTN,SERRPC,LKS

1523 001246
1524 001250

020373
024265

EM11
DH1

;'BITO OF TCSR NOT CLEAR AFTER RESET
JV'TEST# ERR PC
TCSR

1528 001256
1529 0012€0

020436
024265

EM12
DH1

:"'CAN NOT SET BITO OF TCSR''
J'TESTA ERR PC
TCSR"

1533 001266
1534 001270

020467
024265

EM13
DH1

;"'CAN NOT CLEAR BITO OF
J'TESTA ERR PC
T(CSR"

;2%9 001274

000000

:2;9 001234

1525 001252
;259 001254

1530 001262
}2%} 001264

1535 001272

000000

025046
000000

(25046

DT
0

DT1
0

JSTESTN,$ERRPC,TCSR

;STESTN,SERRPC,TCSR

T{SR''

JSTESTN,SERRP(C,TCSR

1538 001276
1539 001300
1540 001302
;gz; 001304

020522
024265
025046
000000

EM14
DH1
DTi
0

;"RESET DID NOT CLEAR BITO Of
J'TESTH ERR PC
TCSR"'
JSTESTN,SERRPC,T(SR

1543
1544
1545
Jg:g

001306
001310
001312
001314

020563
024265
025046
000000

EM15
DH1
DT,
0

;'BIT2 OF TCSR NOT CLEAR AFTER RESET''
J'TESTA ERR PC
T(SR"
;$TESTN,SERRPC,TCSR

1548 001316
1549 001320

020626
024265

EM16
DH1

;"'CAN NOT SET BITZ2 OF T(CSR"
JU'TESTA ERR PC
T(CSR"'

;gg; 001324

000000

1553
1554
1555
1556

020657
024265
025046
000000

1550 001322

091326
001330
001232
001334

025046

EM17
DH1
DT1
0

J$TESTN,SERRPC,TCSR

;"'CAN NOT CLEAR B]IT2 OF
J'TESTAH ERR PC
T(SR"
;STESTN,SERRP(C,T(SR

T(SR'’

T(SR"

(ZDLDKRO DL1T=w 11/44 MFM SLU

ERROR POINTER

TABLE

MACRO M1113

07-JuL-81 15:03

PAGE 24

SEQUENCE

1557 001336
1558 001340
1559 001342

020712
024265
025046

EM20
DH1
DT

J"RESET DID NOT CLEAR BITZ OF
J'TESTAH ERR PC
T(SR"'
;STESTN,SERRPC,TCSR

*562 001346
1563 001350

020753
024265

EM21
DH1

:'BIT6 OF TCSR NOT CLEAR AFTER RESET?2
JU'TESTA ERR PC
T(SR"

Jggg 001354

000000

;289 001344

1564 001352

000000

025046

1567 001356

021016

EM2?

32;9 001364

000G00

1568 001360
1569 001362

1572
1573
1574
;g;g

024265
025046

DH1
DT1

JSTESTN,SERRP(C,T(SR

S XMIT

INTERRUPT WITH PRIORITY 7°°

J'TESTA ERR PC
T(SR"
JSTESTN,SERRPC,TCSR

001366
001370
001372
001374

021053
024265
025046
000000

EMS3
DH1
oM
0

;"'CAN NOT SET BIT6 OF T(SR'
J"'TESTH ERR PC
T(SR"'
JSTESTN,SERRPC,TCSR

1577 001376
1578 001400
1579 001402

021104
024265
025046

EM24
DH1
DT

:"'CAN NOT CLEAR BIT6 OF
J'TESTH ERR PC
T(SR"
;STESTN,SERRPC,TCSR

1582 001406

021137

EM2S

;"RESET

1584 001412
;ggg 001414

025046
000000

DT
0

;STESTN,SERRPC,TCSR

1587 00141€¢
1588 001420

021200
024337

EM26
DH6

}gg? 001424

000000

1592 001426
1593 001430
1594 001432

021243
024337
025066

EM27
DH6
DT6

;'RCVR INTERRUPT WITH PRIORITY
J'TESTH ERR PC
R(SR"
;STESTN,SERRPC
,RCSR

1597
1598
1599
1600

021302
024337
025066
000000

EM30
DH6
DT6
0

;''CAN NOT SET BIT6 OF RCSR''
JUTESTAH ERR PC
R(SR''
¢STESTN,SERRP(C
,R(SR

}gg? 001404

1583 001410

1589 001422

;ggg 001434

091436
001440
001442
001444

000000
024265

025066

00000C

DH1

DT6

T(SR''

DID NOT

;J'TESTA ERR PC

TSR''

CLEAR BIT6é OF

T(SR"'

T(SR'

;'BIT6 OF RCSR NOT CLEAR AFTER RESET''
J'TESTAH ERR PC
R(SR"
;STESTN,SERRPC
,R(SR

7°*

CZOLDHO DL1V=w 11/44 MFM Sty
ERROR POINTER TABLE

MACRO M1113

07-JuL=-81

15:03

[

PAGE 25

SEQUENCE

EM31

;"'CAN NOT (LEAR BIT6 OF RCSR'’

DT6

;STESTN,SERRPC,R(SR

1604 001454
1605
001456
001460
00146¢2
001464

021332
024337
025066
000000

021366
024337
025066
000000

DH6
D16
0

001466
001470
001472
001474

021434
0244611
025106
000000

EM33
DH10
DT10

;'BIT6 OF LKS NOT CLEAR AFTER RESET''

001476
001500
00150¢
001504

021476
024411
025106
000000

EM34
DH10
DT10
0

;'LKS INTERRUPT WITH PRIORITY 7*'

001506
001510
001512
001514

021534
024411
025106
000006

EM35
DH10
DT10
0

;'CAN NOT SET BITS OF (kS
LKS'
J'TEST# ERR PC
;STESTN,SERRPC,LKS

001516
001520
001522
001524

021564
024411
025106

000000

EM36
DK1C
DTi0
0

00152¢
001530
001532
001534

021616
024411
025106
000000

EM37

001536
001540
001542
001544

021656
024435
025116
000000

EM&LO
DH4LO
D740
0

091546
001550
001552
001554

221704
024411
025106
000000

EM4
DH10
DT10
0

"601

001446

1602 001450
1603 001452

DH6

EM32

DK10
DT10
0

;'TESTA ERR PC

R(SR"’

;"'CAN NOT CLEAR BJT6 OF RISR WITH RESET?
J'TEST ERR PC

R(SR"

JSTESTN,SERRPC,R(SR

J'TESTAH ERR PC

LKS''

;$TESTN,$ERRPC,LKS

J'TESTA ERR PC

LKS''

JSTESTN,SERRPC,LKS

;"'CAN NOT CLEAR BIT6 OF LKS''

;JU'TESTA ERR PC

LKS''

;$TESTN,SERRPC,LKS

;"RESET DID NOT CLEAR BIT6 OF LKS''
L KS''
J'TESTH ERR P(C
JSTESTN,SERRPC
,LKS

:"DUAL ADDRESSING ERROR''
BAD''
:'TEST# ERR PC GOOD
JSTESTN,SERRP(C,$GDADR,$BD(SR

;"BIT7 OF LKS NOT SET AFTER RESET?
LKS''

JTESTAH ERR PC

JSTESTN,$ERRP(,LKS

(ZDLDHO DL11=-W 11/44 MFM SLU

ERROR POINTER

1645 001556

1646 001560
1647 001562

1648 001564

TABLE

021744
024411
025106

MACRO M1113

07-JuL-81

EML2
DH10

oT10

15:03%

PAGF 26

SEQUENCE

:''CAN NOT CLEAR BIT? OF LKS''

J'TESTA ERR PC
LKS''
JSTESTN,SERRPC,LKS

000000

"650 001566
1651 001570
1652 001572
1653 001574

021776
024411
025106
000000

EML3
DH10

J'BIT7 OF LKS DOES NOT SET'’

001576
001600
001602
001604

022027
024411
025106
000000

EM4S

DH10
DT10
0

;"RTC INTERRUPT AT PRIORITY 7°°
J'TESTA ERR PC LKS''

001606
001610
001612
001614

022063
024411
025106
000000

EM4S
DH10
DT10
0

J'RTC INTERRUPTS WHEN DISABLED'’
J'TESTH ERR PC
LKS''

1665 001616

EM46

001622
001624

022120
024411
025106
000000

;"RTC INTERRUPT DID NOT OCCUR'
J''TEST# ERR PC LKS''

001626
001630
001632
001634

022120
024411
025106
000000

EM4L7
DH10
DTi0
0

:"RTC INTERRUPT DID NOT OCCUR''
J'TESTH ERR PC LKS"
JSTESTN,$ERRPC,LKS

00163¢€
001640
001642
001644

022154

024411
025106
000000

EMS0
DR10
DT10
0

;"RTC DOUBLE INTERRUPT''
;' 'TESTH ERR PC LKS''

001646
001650
001652
001654

022201
024411
025106
000000

EM51
DH10
DT10
0

001656
001660
001662

022231
024411

EMS?2
DH10
DT10
0

1649

1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664

1666 001620

1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688

001664

025106
000000

DT10
0

DH10
0T10
0

:'TESTA ERR PC
LKS''
JSTESTN,SERRP(C,LKS

;STESTN,SERRPC,LKS

sSTESTN,SERRPC,LKS

JSTESTN,SERRPC,LKS

;'RESET DID NOT CLEAR RTC INTERRUPT®’

;'TEST# ERR PC

LKS'

;STESTN,SERRPC,LKS

J"RTC _INTERRUPT DID NOT CLEAR WITH BIT7 OF LkS''

;' 'TESTH ERR PC
LKS''
JSTESTN,SERRPC,LKS

(ZDLDHO DL '1=w 11/44 MFM SLU

ERROR POINTER TABLE

MACRO M1113

07-JuUL-81

15:03

K_
3
PAGE 27

SEQUENCE

1689 001666

02230€

EMS3

1691 001672
;gg% 001674

025130
000000

DHS3

DT53
0

;"'TESTH ERR PC

‘694 001676
1695 001700

022332
024265

EMS4
DH1

J"XMIT INTERRUPTS WHEN DISABLED''
J'TEST# ERR PC
TCSR"

qggg 001704

000000

1699 001706
1700 001710

022470
024265

EMSS
DH

};8% 001714

000000

1690 001670

1696 001702

1701

001712

024471

025046

LKS

CNT1

(NTZ2"

;STESTN,$ERRPC,LKS,FIRST,SECND

JSTESTN,SERRPC,TCSR

JUXMIT DID NOT
;"'TESTA ERR PC

INTERRUPT''
T(SR''

025046

1704 001716
1705 001720
1706 001722

022370
024265
025046

000000

EM56
DH1
DT

JUXMIT INTERRUPT AT PRIORITY 7°'
;"'TEST# ERR PC
T(SR"
;$TESTN,SERRP(C,TCSR

1709 001726
1710 001730
1711 001732

022426
024265
025046

EMS7
DH1
DT1

J'XMIT INTERRUPTS WITH ENABLE
J'TESTAH ERR PC
T(SR"'
;S$TESTN,SERRPC,TCSR

1714 001736

022470

EM60

;XMIT DID NOT

;;}g 001744

000000

};8; 001724

};}% 001734

1715 001740
1716 001742

000000
024265
025046

DH1
DT

JSTESTN,SERRPC,TCSR

INTERRUPT''

;' 'TESTA ERR PC
T(SR"
JSTESTN,SERRPC,T(SR

1719 001746
1720 001750
1721 001752

022517
024265
025046

EMET
DH1
DT

' XMIT RE-INTERRUPTED"'
J'TESTH ERR PC
T(SR"'
JSTESTN,SERRPC,TCSR

1724 001756
1725 001760
1726 001762
};gg 001764

022543
024265
025046
000000

EM62
DH1
DT
0

;"'LOADING TBUF DID NOT
;'TESTH ERR PC
TCSR''
JSTESTN,SERRPC,TCSR

1729 001766
1730 001770
}731 001772

022610
024337
025066

EM63
DH6
DT6

;"RCVR ACTIVE NOT SET''
;'TESTH ERR PC
RCSR"'
JSTESTN,SERRPC ,RCSR

?;S% 001754

732 001774

000000

CLEAR'

CLEAR INTERRUPT''

CZOLDHO DL11-w 11/44 MFM SLU

ERROR POINTER TABLE

MACRO M1113

07-JuL-81

15:03

PAGE 28

SEQUENCE

1733 001776
1734 002000
1735 002002

022634
024337
025066

EM6S
DH6
DT6

:'RECEIVER DONE NEVER SET''
J'TEST# ERR PC
RC(SR'
;STESTN,SERRPC
,RCSR

1738 002006
1739 002010
17640 002012

022660
024337
025066

EM6S
DH6
DT6

;'RCVR ACTIVE NOT CLEARED WITH DONE
;"'TESTA ERR PC
R(SR''
JSTESTN,SERRPC
,RCSR

1743
1744
1745
1;29

002016
002020
002022
002024

022726
024337
025066
000000

EM66
DH6
DT6
0

;"RESET DID NOT CLEAR RCVR DONE''
;'TESTA ERR PC
RCSR"'
JSTESTN,SERRPC
,RCSR

1748 002026
1749 002030
1750 002032

0227€4
024337
025066

EME?
DH6
DT6

;"RDR ENABLE SET DID NOT CLEAR RCVR DONE''
;'TESTH ERR PC
R(SR"’
JSTEST*,
$ERRPC ,RCSR

1753 002036

(23027

EM70

:'READING RBUF DID NOT CL£AR RCVR DONE'’

?;gg 002044

000000

002046
002050
002052
002054

023074
024337
025066
000000

EM71
DH6
DT6
0

J"RCVR INTEPRUPTS WITH ENABLE
;J'TESTA ERR PC
R(SR"
JS$TESTN,SERRP(C,RCSR

1763 002056

023243

EM7?2

;'RCVR DID NOT INTERRUPT"'

1768 002066
1769 002070
1770 002072
;;;} 002074

023136
024337
025066
000000

EM73
DH6
DT6
0

:"RCVR INTERRUPTS AT PRIORITY 7°'
J"'TESTA ERR PC
R(SR"’
;STESTN,SERRPC
,RCSR

1773 002076

023174

EM7¢4

;"RCVR INTERRUPT REQUEST PASSED WITH ENABLE (LEAR'’

1775 002102
1776 002104

025066
000000

DT6
0

;$TESTN,SERRPC
,RCSR

};gg 002004

;;2; 002014

} ;g; 002034

17564 002040
1755 002042

1758
1759
1760
};2;

1764 002060
1765 002062
};2? 002064

1774 002100

000000

024337
025066

024337
025066
000000

024337

DH6
DT6

DH6
DT6
0

DH6

SET?2

J'TESTH ERR PC
R(SR'
JSTESTN,SERRPC
,RCSR

CLEAR''

J'TESTA ERR PC
R(SR"’
;$TESTN,SERRPC
,RCSR

;'TESTA ERR PC

RCSR"'

CZDLDHO DL11-W 11/44 MFM SLU

ERROR POINTER TABLE

MACRO M1113

07-JuL-81

023242
024337
025066
000000
023272
024337
025066

EM7S

002126
002130
002132
002134

023316
026337
025066

EM?77

17N
1792
1793
1794
1795

002136
002140
002142

1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811

1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789

002106

1790

1796

002124

0
EM76
DH6
DT6
0

M3
PAGE 29

SEQUENCE

;'RCVR DID NOT INTERRUFT'
;"'TESTA ERR PC

RCSR''

,RCSR
;STESTN,SERRPC

:"RECEIVER RE-INTERRUPTED''
;'TESTA ERR PC
R(SR"
JSTESTH,$ERRPC
,RCSR

DH6

;"READING RBUF DID NOT CLEAR INTERRUPT''
;"'TESTH ERR PC R(SR"'

023363
026337
025066
000C00

EM100

;'RESET DID NOT CLEAR RCVR INTERRUPT''

002146
002150
002152
002154

023426
026337
025066

EM101

002156

023454
024337
025066
000000
023513
024536
025144
000000

EM102
DH6

DH103
DT103

:"BREAK DID NOT TRANSMIT ALL ZEROES''
J'TESTA ERR PC RCSR DATA'
JSTESTN,SERRPC
,RCSR, $SBDDAT

023551
024337
025066
000000

EM104
DH6

;''TEST# ERR PC

023606
024573
025156

EM105
DH105
DT105

002144

002160
002162

002164
002166
002170
002172
002174

0~ 76

1812 002200

1813 002202

1814
1815
1816
1817
1818
1819

000000

DH6
DT6

15:03

002204

002206
002210
002212
00214

000000

DT6
0
DH6
DT6
0

DH6
DT6
0

DT6

EM103

DT6

JSTESTN,SERRP(C
,RCSR

;'TEST# ERR PC

R(SR'’

,RCSR
JSTESTN,$ERRPC

:"""OR'

FLAG DID NOT SET''

JSTESTN,SERRPC
,RCSR
;'""ERROR'

NOT SET WITH

;"'TESTH ERR PC R(SR"
,RCSR
;STESTN,SERRPC

'OR'

FLAG"

;'BREAK DID NOT SET FRAMING ERROR''
R(CSR"’

,RCSR
JSTESTN,SERRPC

:'DaTA COMPARE ERROR''

;''TESTA ERR PC

RCSR

GOOD

JSTESTN,SERRPC,RCSR,GD,BD

BAD''

—

CZDLDHO DL11-W 11/44 MFM SLU
ERROR POINTER TABLE

—

MACRO M1113

07-JuL-81

15:03

PAGE

SEQUENCE

1820 002216
1821 002220
1827 002222

23631
024573
025156

EM106
DH105
DT105

;" 'LOOP-BACK DATA COMPARE ERROR''
:"'TEST# ERR PC
RCSR
GOOD
BAD'
JS$TESTN,S$ERRPC ,RCSR,GD,BD

1825 002226
1826 002230

023666
024337

EM107
DH6

;"‘TIMEOUT IN EXERCISER TEST''
:"TEST# ERR PC
R(SRTM

}ggg 002234

000000

1830 002236

023720

EM110

;ggz 002244

000000

?ggé 002224

1827 002232

1831 002240
1832 002242

000000

025066

DT6

024637
025172

:$TESTN,$ERRPC,RCSR

;"'INCORRECT RECEIVE COUNT

DH110
DT110

:'TESTH ERR PC
RCSR
TRANS
RCV'
:$TESTN,SERRPC
,RCSR, XMTCNT ,RCVCNT

1835
1836
1837
?ggg

002246
002250
002252
002254

023750
024573
025156
000"

EM111
DH105
DT105
0

:'DATA COMPARE ERROR IN EXERCISER'’
:''TEST# ERR PC
RCSR
GOOD
BAD''
:$TESTN,SERRPC ,RCSR,GD,BD

1840
1841
1842
4342

002256
002260
002262
0022¢6%

024010
024703
025206
000000

EM112
DH112
DT112
0

:""TRAP CATCHER'
:'TEST#
ERR PC
RCSR
OLDPC
TRAP ADR'
*STESTN,SERRPC,RCSR,OLDPC
,BDVECT

1845 002266
1846 002270
1847 002272

024025
024411
025106

EM113
DH10
DT10

:*NO CLK INTERRUPT IN EXERCISER''
STESTA
ERR PC
LKS''
:$TESTN,SERRPC,LKS

1850
1851
1852
;ggz

002276
002300
002302
002304

024063
024337
025066
000000

EM114
DHb
0Té
0

:"""ERROR' NOT SET WITH
P"'TESTA ERR PC
RCSR''
*STESTN,SERRPC
,RCSR

1855
1856
1857
}ggg

002306
002310
002312
002314

024122
024337
025066
000000

EM11S
DH6
DTé
0

;RCV ACTVIE NOT CLEAR WITH INIT
S'TESTH ERR PC
RCSR''
:$TESTN,SERRPC
,RCSR

1860 092316
1861 002320
1862 002222

024161
024337
025066

EM116
DH6
DTé

;RCV ACTIVE WITHOUT "'START'* BIT
2'TESTA ERR PC
RCSR'’
:$TESTN,SERRPC
,RCSR

1865
1866
1867
}ggg

002326
002330
002332
002334

024220
024337
025066
000000

EM117
DH6
DT6
0

:RDR ENABLE NOT CLEAR WITH RCV ACTIVE
:"'TEST# ERR PC
RCSR''
:STESTN, SERRP( ,RCSR

1870
1871 002336
1872 002340
1873 002342

000000
000000
000000

}gfig 002274

}ggz 002324

1874 002344
1875 002346
1876 002412

000000

; STORAGE LOCATIONS
FIRST:
.WORD
0
LOCT:
.WORD
O
LOC2:
.WORD
O

SAVEQ:
SAVLOC:
ENDSTK:

.WORD
.BLKW
.BLkW

0
22
10

'FR'

FLAG'

;TIMER LOOP COUNTER
:TIMER LOOP COUNTER

*STORAGE FOR LOCATIONS
$THAT T/E USES
*JIMS SPECIAL STACK (WRAP AROUND

CZDLDHO DL11=w 11/44 MFM SLU

ERROR POINTER TABLE
1877 002432
1878 002434

1879
1880
1881
1882
1883

002436
002440
002442
002444
002446

1884 002450
1885 002452

1886 002454
1887 002564
1888 002566
;ggg 002610
1891

1892
1893
1894
1895
1896
1897
1898
1899
1900
1901

00000C
000000

000000
000000
00CJ00
000000
000000

136
124

.WwORD
.WORD

O
0

SRPSW:
SCPSW:

.WORD
.WORD

O
O

120
057

000
101

BUF :
CNTLP:
PROMPT:
TA:

0000CO
000090
000000

SECND:
OLDPC:
BDVECT:

002624
002626

000000
009000

CTSTFL:
TMP1 :

}ggé

000000
000000

002€34
002636
002640
002642

000000
000000
000000
000000

002652

000000

002644
002646
002650

000000
000000
000000

;g%g
1917
1918
1919
1920
1921

000

15:03

JIMSTK:
SAVEPS:

OLDSUM:
RCVCNT:
XMTCNT:
CLKCNT:
STPSW:

000000
000000

020

(07-JuL-81

002616
002620
002622

1902 002630
1903 002632

1906
1907
1908
1909
1910
1911
1912
1812

MACRO M1113

TMP2:
TMP3:

.WORD
.WORD
.WwORD
.WORD
.WORY

BLKW
_ASCIZ
_ASCI]
LASCIZ
.EVEN

0
0
O
O
0

SEQUENCE

:SAVE FSW AREA

; CHECKSUM STORAGE

44
<20>
/*P/<0><CR><LF>/CONSOLE/<CR><LF>/>>>/<377>
ST/ASKCROCLF>

.WORD
.WORD
.WORD

0
Q
O

.WORD
.WORD

O
0

.WORD
.WORD

B 4
PAGE 30-1

0
0

;CONSLE UNDER TEST FLAG
;TEMP LOCATION FOR TABLE OFFSETS

;TEMP LOCATION FOR DEVICE COUNT
;LOCATION FOR DEVICE MAP BIT TEST MASK

JREGISTER AND VECTOR ADDRESSES FOR THE

RCSR:
RBUF :
TCSR:
TBUF :

RVECT:
RPSW:
TVECT:

TPSW:

.WORD
.WORD
.WORD
.WORD

.WORD
.WORD
.WORD

.WORD

DL-11W UNDER TEST

O
0
0
0
O
0
0
0

;CONSOLE REGISTER AND VECTOR ADDRESSES FOR THE DL-11W
002654
002656
002660
002662
002664

1922 002666
1923 002670
;ggg 002672
1926
1927 002674
1928 002676

}ggg 002700

1931 002702
1932 002742
1933 003002

177560
177562
177564
177566
000060

000062
000064
000066

CRCSR:
CRBUF:
CTCSR:
CTBUF:
CRVECT:

177560
177562
177564
177566
60

;ADDRESS OF RECEIVER COMMAND/STATUS REGISTER
;ADDRESS OF RECEIVER BUFFER
;ADDRESS OF TRANSMITTER COMMAND/STATUS REGISTER
;ADDRESS OF TRANSMITTER BUFFER
JRECEIVER INTERRUPT VECTOR

CRPSW:
62
CTVECT: 64
CTPSW:
66

;TRANSMITTER INTERRUPT VECTOR

177546
000100
000102

JREAL TIME CLOCK REGISTER AND VECTOR ADDRESSES
LKS:
LWORD
177546
RTCVT:
.WORD
100
RTCPSW: .WORD
102

000000

ADRTBL:
VCTIBL:
FLAG44:

.BLKW
.BLKW
.WORD

20
20
O

CZDLDHO DL11=W 1 /44 MFM SLU
ERROR POINTER TABLE
1934
1935
1936
1937
1938

003004
003006
003010
003012

MACRO M1113

TURCSR:
TURBUF:
TUTCSR:
TUTBUF:

17650C
176502
176504

176506

*939

1942
1943
1944
1945
1646
1947
1948
1949
1950
1951
1952
1953
1954
1955

.WORD
.WORD
.WORD
.WORD

;SUBROUTINE

1940
1941

07-JuL-81

003014
003020
003024
003026
003032
003034
003040
003042
003044

012702
013700
010001
062701
010022
062700
020001
003773
000207

002702
001142

003046

005037
005037
005037
005037
005037
005037
005037
005737
001003
012737
012737
012737

001070
001066
001072
0026<4
001076
001100
003002
001112

003110
003116
003124

DEVADR: MOV

000170

18:

000010

000400
000006
000003

1%:

.SBTTL

003132
003136
003140
003144
003146

012706
005026
022706
001374
012706

001000

003152

012737
012737
012737
012737
012737
012737
012737
012737

012737
012737

015374
000340
014544
000340
017522
000340
015212
000340
014356
001060
000001
003252
003260

013746

000004

003160
003166
003174
003202
003210
003216
003224

003232
003240
003244
003252
003260
003266

013737
005037
112737

17
17
176504
17

TO GENERATE DEVICE ADDRESS TABLE

N#ADRTBL ,R2

;POINT R2 TO THE DEVICE ADDRESS TABLE

$8ASE RO
RO R1

;LOAD BASE DEVICE ADDRESS IN RO
;

MOV
ADD
CMP
BLE

RO, (R2)+
#10,R0
RO,R1
1%

;MOVE DEVICE ADDRESS TO TABLE
;JPOINT RO TO NEXT DEVICE ADDRESS
;FINISHED GENERATING TABLE?
;BR, IF LAST DEVICE ADDRESS NOT LOADED

ADD

#170,R1

JPOINT R1 TO LAST DEVICE ADDRESS

(LR
CLR
CLR
CLR
CLR
CLR

SFATAL
$MSGTYP
$TESTN
CTSTFL
$DEVCT
SUNIT

;CLEAR
;CLEAR
;CLEAR
JCLEAR
JCLEAR
;CLEAR

TST
BNE

$USWR
1%

;1S SUSWR LOADED?
;BR IF YES

CLR

001112
000004
000006

SEQUENCE

MOV
MOV

RTS

START:

15:03

4
C
PAGE 30-2

FLAG&44S

;x CLEAR 11/44 (PU FLAG

mMov

#400,3USWR

MoV

43,46

MOV

46, aH6

INITIALIZE

THE

ERROR NO.
MESSAGE TYPE
TEST NO.
CONSOLE UNDER TEST FLAG
DEVICE COUNT
UNIT NUMBER

;JELSE, DEFAULT TO SUSWR-400
JINITIALIZE

;

TIMEOUT VECTORS

CATCHER ROUTINE

TO TRAP

COMMON TAGS

;;CLEAR THE COMMON TAGS ($CMTAG) AREA
MoV
CLR

#$CMTAG,R6
(R6)+

;oFIRST LOCATION TO BE CLEARED
;s CLEAR MEMCRY LOCATION

BNE
MOV

=6
#1000, SP

;.LOOP BACK IF NO
;;SETUP THE

CMP

001040
001000
000020
000022
000030
000032
000034

000036
000024
000026
014350

001015
001006
001010

#SWR,R6 ; ;DONE?

JoINITIALIZE A FEW VECTORS

STACK POINTER

MOV

#$SCOPE ,a¥#IOTVEC

;,;]OT VECTOR FOR SCOPE ROUTINE

MOV

H#SERROR ,a#EMTVEC

;,EMT VECTOR FOR ERROR ROUTINE

MOV

MOV
MOV
MOV
MOV
MOV
CLR
MOVB

MOv

MOV

#340,a#10TVEC+2 ; LEVEL 7

#340,34EMTVEC+2 ;;LEVEL 7

H#STRAP ,a#TRAPVEC ;. TRAP _VECTOR FOR TRAP CALLS
#340,3#TRAPVEC+2;LEVEL 7
#SPWRDN ,a#PWRVEC ;;POWER FAILURE VECTOR
#340,INPWRVEC+2 ;;LEVEL 7
SENDCT,$EOPCT
;;SETUP END-OF ~PROGRAM COUNTER
$ESCAPE
;. CLEAR THE ESCAPE ON ERROR ADDRESS
#1,SERMAX
;;ALLOW ONE ERROR PER TEST

#..,8LPADR

#.,SLPERR

;s INITIALIZE THE LOOP ADDRESS FOR SCOPE
.:SETUP THE ERROR LOOP ADDRESS

;.SIZE FOR A HARDWARE SWITCH REGISTER. IF NOT FOUND OR IT IS
;.EQUAL TO A '*=1"°, SETUP FOR A SOFTWARE SWITCH REGISTER.
MOV

@#ERRVEC,-(SP)

;;SAVE

ERROR VECTOR

(ZDLDKHO OL11-W 11/44 MFM SLU
INITI ALIZE THE COMMON TAGS

003272
003300
003306
003314
003322

012737
912737
012737
022777
001012

003324
003326
003332
003334
003342
003350
003354
003360
003366
003370
003376

000403
012716
000002
012737
012737
012637
005037
132737
001403

012737

002326

177570
177570
177777

MACRO M1113

000004
001040
001042

MOV
MOV
MOV

175516

64%:

003234
000176
000174
000004
001074
000200

001040
001042

001110

007040

07-JuL-81

65%:
66%:

001107
67%:

15:03

4
D
PAGE 30-3

#6468, ANERRVEC

#DSWR, SWR
#DDISP ,DISPLAY

CMP
BNE

#~1,aSWR

65%

MOV
RTI
MOV
MOV
MOV

CLR
BITB
BEQ
MOV

66%

#65%, (SP)

SEQUENCE

J2SET UP ERROR VECTOR
;;SETUF FOR A HARDWARE SWICH REGISTER
;+AND A HARDWARE DISPLAY REGISTER
;. TRY

TO REFERENCE

HARDWARE

SWR

;sBRANCH IF NO TIMEOUT TRAP OCCURRED
THE HARDWARE SWR IS NOT = -1
;;AND
J;BRANCH [F NO TIMEOUT

;2SET UP FOR TRAP RETURN

#SWREG,
SWR
;.POINT TO SOF TWARE SWR
#D]ISPREG,DISPLAY
(SP) + ,a#ERRVEC
;;RESTORE ERROR VECTOR

$PASS

#APTSIZE ,$ENVM

67%

#ESWREG,
SWR

;. CLEAR PASS COUNT

;o TEST USER SIZE UNDER APT
;s YES ,USE NON-APT SWITCH
;sNO,USE APT SWITCH REGISTER

003510
003512
003516
003522
003526
003532
003540
003544
003550
003552
003556

003562
003566
003572
003576
003602
003604

012637
032777
001404
005237
000137
132737
001404
132737
001056
032777
001052

004737
005037
005037
013703
012737
013700
062700
005710
005237

013700

175370

11%:

002624
004620
000001

001106

000200

001107

000040

175330

003014
002630
001144
000004
003562
001142
000160

001144
002630
001000
001144
000010
001142
002654

INIT:

:
MANL

SIZE:

BIT

BEQ
INC
JMP
BITB
BEQ
BITB
BNE
BIT
BNE

JSR
(LR
(LR

3%:

MOV
MOV
MOv
ADD
TST

4%:

MOV

000004

INC
1nC

SU3
(MP
BLE

MoV

1%
#11%,(SP)

(SP)+,a#10
#8174 ,aSWR
INIT
CTSTFL
1D

#BI1T0,SENV

MANL

#B1T7,8ENVM

APTSZD

#B]TS,aSWR

APTSZD

PC,DEVADR

=
»
»
»>

»
»

8,8,

»
»

000010
000020

MOV
RTI
MOV

10%:

003436

11%

A1, Q¥FLAGGLS

003002

#1,R0

0,0,

060001

CMPR
BNE
BIS
BR

000001

a#410,~(SP)

#10%,a410

001007
052737
000403
012716
000002

MOV
MOV
MFPT

000010

%N,

122700

000010
003430

013746
012737
000007

003376
003402
003410
003412
003416
003420
003426
003430
003434
003436
003442
003450
003452
003456

:SIZE FOR 11/44 (CPU
SAVE VECTOR
SET UP FOR TRAP

WHAT CPU??
ARE WE A 11744
NO GO RESET VECTOR
YES SET FLAG

SKIP RTI
SET STACK RETURN

RETURN

s** RESTORE VECTOR
sTEST CLOCK ONLY?
;BR IF NOT
JELSE, SET CONSOLE TEST FLAG TO ENABLE CLOCK TESTS
;
AND JUMP TO TYPE PROGRAM ID
JCHECK IF ON APT
;BR IF NOT APT
;DID APT SIZE
;BR, IF APT SIZED

JWAS "SDEVM'’ MANUALLY SET?
;IF YES, SKIP SELF-SIZING

HLS
, N

;GENERATE DEVICE ADDRESS TABLE
;CLR TEMP LOCATION TO KEEP DEVICE COUNT
;CLEAR DEVICE MAP
;SAVE TIMEOUT VECTOR
JSET TIMEOUT POINTER

#160,R0
(RO)
$DEVM
TMP?2
#1000,
SP
$DEVM
#10,R0

sPOINT RO TO NEXT DEVICE NUMBER

TMP?
$DEVM

6 ,R3

$BASE RO

$BASE ,RO
33
CRCSR,RO

;LOAD BASE ADDRESS
JPOINT RO TO UNIT #15 (UNIT#0 CONSOLE)
sCHECK FOR DEVICE EXISTANCE
;INDICATE DEVICE EXISTANCE IN DEVICE MAP
s INCREMENT DEVICE COUNT
JRESET STACK POINTER
;ADJUST DEVICE MAP FOR NEXT UNIT CHECK
JFINISHED SIZING?
;BR, IF BASE ADDRESS HAS NOT BEEN CHECKED
;LOAD CONSOLE DEVICE ADDRESS

CZDLDKHO DL11~w 11744 MFM SLU
INITIALIZE THE COMMON TAGS

MACRO M1113

(07-JuUL-81 15:03

000004

#5846

;SET UP TIMEOUT POINTER

INC

$DEVM

“INDICATE CONSOLE EXISTANCE

MOV

R3, a4

VL TADR

:BR TO GENERATE VECTOR ADDRESS TABLE

CLR
MOV

TMP2
$DEVM,R2

012737
005710
005237
005237
010337

2028 003670
2029 003674
2030 003700
2031 003704
2032 003706
2033 003712
2034 003714
2035 003720
2036 003722
2037
2038
2039
2040 003724
2041 003730
2042 003732
2043 003734
003736
003740
003742
003744
003746
003750
003752
003754
003760
003762
003766
003770

012702
013700
042700
010001
062701
010022
062700
020001
003773

062701
000301
032701
001764
010137

000060

ROLB
ASL
ROLB
ADD

000020

BIT

003774
004002
004006
004014
004016
004020
004024

052737
005037
032737
001001
000414
005237
012700

000002
002626
000001

001144
002630
000004

5% :

000415
005037
013702
005702

002630
001144

005237
006302
001407
000771
004737

002630

100002

ASTSZD:
TSTDVM:
1%:

003014

DVADT:

SEQUENCE

Moy

2008 003610
2009 003616
2010 003620
2011 003624
2012 003630
2013
2014 003634
2015
2016 003636
2017 003642
2018 003646
2019 003650
2020 003652
2021 003656
2022 003660
2023 003662
2024 003664
2025

002630

4
E
PAGE 30-4

INC

(RO)

TMP?2

STEST FOR CONSOLE EXISTANCE

- INCREMENT DEVICE COUNT

IN DEVICE MAP

*RESTORE TIMEOUT VECTOR

TST
BPL

R2
1%

:CLEAR TEMP LOCATION TO KEEP DEVICE (NT
*MOVE DEVICE MAP TO R2
STEST MSB OF DEVICE MAP
*BR, IF MSB IS ZERO

ASL

“SHIFT NEXT BIT

BR
JSR

TSTDVM
PC.DEVADR

INC

BEQ

TTMMP2

DVADT

*INCREMENT DEVICE COUNT, IF MSB 1
“BR,

INTO MSB POSITION

IF NO OTHER BITS ARE SET

IN $DEVM

SCONTINUE CHECKING SDEVM, IF MORE BITS SET
- GENERATE DEVICE ADDRESS TABLE

:GENERATE VECTOR ADDRESS TABLE
002742
001136
177000

000170

000010

VCTADR: MOV
MOV
BIC
MOV

#VCTTBL ,R2
QHSVECTT,RO
#177000,R0
RO,R1

:GET LOCATION OF VECTOR TABLE
1 COPY BASE VECTOR
*CLEAR UPPER BITS
;

1%:

RO, (R2)+
#10,R0

*PUT VECTOR ADDRESS IN TABLE
*POINT RO TO NEXT VECTOR ADDRESS

ADD

MOV
ADD

cMP
BLE

#170.R1
RO,R1
1%

“POINT R1 TO LAST DEVICE VECTOR

“FINISHED GENERATING VECTOR TABLE?
*BR, IF LAST VECTOR IS NOT LOADED

:MOVE DEVICE COUNT INTO DEVICE COUNT MESSAGE

013700
005001
000300
006300
006300
006300

002630

SHIFT:

106101

006300
106101

TMP2,RO
R
RO

;COPY DEVICE COUNT INTO RO
*CLEAR AUXILARY REGISTER
*PUT DEVICE COUNT IN UPPER BYTE OF

ASL
ROLB
ASL

RO
RI
RO

*PUT MSB OF COUNT INTO CARRY
“MOVE MSB OF COUNT INTO R1
*MOVE NEXT BIT TO CARRY

*MOVE DIGIT TO UPPER BYTE

ASL
ASL

SWAS

BEQ
MOV

025016

002624
002654

MOV
CLR
SWAB

002632

RO
RO

RI
RO
RI
#60,R1

#B]T4,R1
SHIFT
R1,M2A

*MOVE MSB OF
*MSB OF RO

COUNT

INTO

*MOVE INTO R1
*MOVE LAST BIT OF DIGIT
YINTO R1
*CONVERT DIGIT TO ASCII

*HAVE BOTH DIGITS BEEN MOVED TO R1°
‘BR, IF NOT
*MOVE DEVICE

COUNT

TO OUTPUT MESSAGE

BEGIN:

BIS

#MBIT1,TMP3

SSET UP BIT MASK TO TEST $DEVM FOR DEVICES EXCEPT CONSOLE

TCONS:

BR
INC

TSTDEV
CTSTFL
#CRCSR,RO

“BR. TO TEST OTHER DEVICES
SINDICATE CONSOLE UNDER TEST

001144

CLR
BIT
BNE
MOV

TMP1
#8110, $DEVM
TCONS

SCLEAR LOCATION TO STORE TABLE OFFSETS
©1S CONSOLE TO BE TESTED?
:BR, IF CONSOLE IS TO BE TESTED
JSET UP CONSOLE

DEVICE

ADDRESSES

(Z0LDHO DLV 1-w 11744 MFM SLU
INITIALIZE THE COMMON TAGS

2065 004030
2066 004034
2067 004036
2068 004042
069 00404«
2070
2071
2072 004050
2073 004056
2074 004060
2075 004064
2076 004072
2077 004076
2078
2079 004100
2080 004104
2081 004110
2082 004114
2083 004122
2084 004126
2085 004132
2086 004134
2087 004140
2088 004144
2089
2090 004146
2091 004152
2092 004154
2093 004160
2094 004164
2095 004166

012701
01201
022701
002374
000137

002634

033737
001010
006337
062737
005237
000764

002632

005237
006337
013702
062737
016200
012701
010021
062790
030027
001372

001100
002632
002626
000002
002702
002634

016200

002742

010021
062700
030027

001372
000137

MACRO M1113

07-JuL-81

1%:

002652
004172

002632

000002
001100

000002
000006

004172

001144

:PREPARE

MOV
MOv
“MP
BGE
JMP

BNE

SETADR:
(02626
ADR:

30-5

#R(CSR,R1
(RO)+,(R1)+
#TPSW,R1
1%
TST1

SEQUENCE

JPOINT R1

TO UUT ADDRESS TABLE

s TRANSFER CONSOLE

ADDRESSES

;FINISHED TRANSFER?
;BR, IF NOT
;GO TEST CONSOLE INTERFACE

TMP3 SDEVM

SETADR

:CHECTFTQEEEE IF DEVICE IS TO BE
:BR,
JSHIFT MASK

ASL
ADD
INC

TMP3
#2,TMP1

SUNIT
TSTDEV

JINCREMENT TABLE INDEX
S INCREMENT UNIT NUMBER
;GO TEST NEXT BIT OF DEVICE MAP

INC
ASL

SUNIT
TMP3

;UPDATE UNIT NUMBER
;UPDATE DEVICE MAP TEST MASK

MOV
ADD
MOV
MOV
MOV
ADD

TMP1 ,R2
#2,TMP1
ADRTBL (R2) ,RO
#RCSR,R1
RO, (R1)+
#2 RO

BNE

ADR

MOV
MOV
ADD
8IT
BNE
JMP

VCTTBL (R2) ,RO
RO, (R1)+

BIT

VECT:

PAGE

ADDRESSES AND VECTORS fFOR WT

TSTDEV: BIT

002626

15:03

RO, 46

#Z,R0
RO, #6
VECT

TST1

TESTED

TO CHECK NEXT S$DEVM BIT

;MOVE TABLE OFFSET TO R2

;JUPDATE

TABLE OFFSET

FOR NEXT DEVICE

;PUT WUT ADDRESS INTO RO
;JPOINT R1 TO STORAGE AREA FOR UUT ADDRESSES
. TRANSFER WUT

ADDRESS

sPOINT TO NEXT WUT REGISTER
JF INISHED TRANSFER?
:BR,

IF NOT

sPUT WT VECTOR INTO RO
s TRANSFER WUT

VECTORS

JPOINT TO NEXT VECTOR
;F INISHED

:BR,

TRANSFER?

[F NOY

;GO TEST DEVICE

TO ACTIVE

TABLE

AREA

CZOLDHO DL11=w 11/44 MFM SLU
TEST ® 1

MACRO M1113

- TEST ABILITY TO REFERENCE

TCSR

2096

07-JuL=-81

LSBTTL

G ¢
PAGE 31

15:03

TEST # 1

- TEST ABILITY TO REFERENCE

;*TEST
R

004172
2097 004174
2098 004200
2099 004206
518? 004212

000004
013703
012737
005777
000412

000004
004214
176426

2102 004214
2103 004216
2104 004222

022626
005737
00100¢

002624

2106 004226
2107 004230

000404

2105 004224

004230

004234
2108 004236

S]I??) 0C4240
PARA

2112

00000°
000000

010337

TEST
R

000004

T(SR
I

TO REFERENCE

TCSR

SCOPE
MOV
MOV
TST
BR

¥ ,R3
S, onl
alC{SR
43

s SAVE TIMEOUT VECTOR
sSET UP TIMEOUT VECTOR
JREFERENCE THE XMIT COMMAND/STATUS REG.
. GO TO END CF TEST

1%:

(MP
TST
BNE

(SP)+,(SP)+
CTSTFL
2%

JRESTORE SP AFTER TIMEOUT
JCHECK IF DEVICE IS CONSOLE
;1F YES, SKIP ERROR TYPEQUT

¢BR TO END OF

JSR

P(C,3ATYS

MOV

R3,a#4

000004

ERROR

015714

ABILITY

TST1:

104001

004737

SEQUENCE

2%:
3%:

1
HALT

+1]

;REPORT ERROR TO APT & TTY
TEST

c;ONLY REPORT A FATAL ERROR
;:THE ERROR NUMBER

JRESTORE TIMEOUT VECTOR

(FROM APT []ST)

MACRO M1113
(ZD.DHO DL11=w 11/44 MFM SLU
TEST # 2 - TEST ABILITY TO REFERENCE TRUF
2113

07-JUL=-81

SRTTL

15:03

TEST # 2 -

PAGE 32

SEQUENCE

TEST ABILITY TO REFERENCE

TBUF

'."tt'.'tlt".."lt.fl'..""!'.'.tt'.'.l".'ttfifi"l'tt.tt"Qt't'!

J*TEST 2

TEST

ABILITY

TO REFEREN(CE

TBUF

NTe SV P o)
[ XN, NE T e R ofs R

D
)
d
)
d
el
d
ed
d

POPUNININY
= s 2 b 2 —

—_—
—

NNy
[ R
]

ST, NY,NT, VLS. NY,.NT, VT, N1

','t't'.'.'tt'i.'t.'tt.'"'.Q"t.‘."'.'ttfifi"t't"'titt.'ttttt't'

004264
0046246
004252
004260
004264

000004
013703
012737
005777
000412

004266
004270
004274
004276
004300
004302
004302

022626
005737
00100¢

004306
004310
0C4312

000004
004266
176356

002624

1ST12:!
000004

1%:

104002

000404

004737
000002

000000
010337

015714
000004

2$:
3%:
(%:

SCOPE

¥4 R3

MOV
MOV
TST
B8R

nS axl
@ TBUF
43

(MP
TST

CTSTFL

BNE
ERROR
BR

JSR
l
HALT
MOV

;SAVE TIMEOUT VECTOR
sSET UP TIMEOUT VECTOR
JREFERENCE

THE

:GO TO END OF

(SP)+,(SP)+

JRESTORE

2%
+2

JREPORT ERROR

TEST

SP AFTER

TIMEOUT

sCHECK IF DEVICE IS CONSOLE
;IF YES, SKIP ERROR TYPEOQUT
;BR TO END OF

TO APT & TTY

TEST

;;ONLY REFPORT A FATAL ERROR
;;THE ERROR NUMBER (FROM APT LIST)

PC,SATYS

R3, 44

XMIT BUFFER

JRESTORE

TIMEQUT VECTOR

[_4
PAGE 33

(ZDLDHO DLY1=w 11/44 MFM SLU
MACRO M1113 07-.UL-81 15:03
TEST & 3 ~ TEST THAT BIT2(MAINT, BIT) CAN BE SET & RESET
227

.SBTTL

SEQUENCE

TEST # 3 = TEST THAT BIT2(MAINT, BIT) (AN BF SET & RESET

.';ttt"ttttt'tttttttttttt't'tttttttt'tttt.tttttt't'ttttttt'ttttt'

:*TEST

TEST

THAT BIT2(MAINT,

BIT)

CAN BE

SET & RESET

.'"t'tttttttittt'tt'.tQ'"'ttt.!tttt.tttt.tt'ttttttttt'.tti'tt"'t

006316
2128 004320

000004
000005

032777
001411

000004

2132 004332

005737

002624

5;%2 004342

000404

2129 004322
S}%? 004330

2133 004336
2134 004340

2137 004344

004344

004350
g;%g 004352

001002
104015

004737

000015
000000

1S73:

1%:
2%:

052777
032777
00100

000004
000004

ngg 004372

104016

2146 0046374
2147 004402
g}zg 004410

042777
032777
001411

000004
000004

2150 004412
2151 004416
2152 004420

005737
001002
104017

002624

176256
176250

176236
176230

000404

3%:

5%:

004737
000017
000000

015714

2157 004434
2158 004442

052777
000005

000004

176176

S}g? 004452

001404

032777

000004

176166

2162 004454
2163 004462
5;2%

042777
104020

000C04

176156

2166 004464

000240

2159 004444

8l7
BEQ

MIT2,aT(SR
33

TST

CTISTFL

B8R

BNE
ERROR

015714

2140 004354
2141 004362
S}zg 004370

2153 004422
2154 004426
004424
004430
S}Eg 004432

17630

SCOPE
RESET

6$:

7%:

10$:

1%
+15

;CLEAR EVERYTHING

:TEST "OR BITZ2 OF TCSR CLEAR
:BR IF CLEAR

;CHECK ]F DEVICE IS CONSOLE
JIF YES,
:BIT2 OF

SKIP ERROR TYPEOUT
TCSR NOT CLEAR AFTER RESET

JSR

PC,$3ATYS

8IS
BIT
BNE

#MIT2,aTCSR
#BIT2,aTCSR
A Y

;SET BIT2 OF T(CSR
:TEST FOR BIT2 SET
;BR IF SET

ERROR

+16

:BIT2 OF

BIC
BIT
BEQ

#IT2,aTCSR
MIT2,aTCSR
7%

:CLEAR BIT2 OF TCSR
;TEST BITZ2 CLEAR
;BR IF CLEAR

TST
BNE
ERROR
BR

CTSTFL
5%
+17

;CHECK IF DEVICE IS CONSOLE
:1F YES, SKIP ERROR TYPEOUT

JSR
17
HAL 7

PC.3ATYS

::ONLY REPORT A FATAL ERROR
;:THE ERROR NUMBER (FROM APT LIST)
:BITO OF TCSR WILL NOT CLEAR

BIS
RESET

#MIT2,aTCSR

:SET BIT2 OF TCSR
;CLEAR BITZ WITH RESET

BEQ

108

15
HALT

::THE ERROR NUMBER (FROM APT LIST)

TCSR WILL NOT SET

#MIT2,38TCSR

BIC
ERROR

#MIT2,aTCSR
+20

NOP

::ONLY REPORT A FATAL ERRGR

JTEST FOR BIT2 CLEAR
;xv IF

CLEAR, GO TO NEXT TEST

;CLEAR BIT2,

TO PRINT ERROR

JRESET DID NOT (LEAR BITZ2 OF

T(SR

(ZDLDHO DL11~-W 11/44 MFM SLU
TEST & & - TEST

THAT

MACRO M1113

T(SR BIT7(DONE)

07-JuL-81

CLEARS WHEN XBUF

2167

IS LOADE

TEST # 4 -

.SBTTL
AR

15:03

4
J
PAGE 34

TEST

THAT

SEQUENCE

TCSR BIT7(DONE)

CLEARS WHEN XBUF

IS LOADED

2222022220 2222202022022
20R22222222
2R
2 R

SeTEST &

TEST

THAT

TCSR BIT7(DONE)

CLEARS WHEN XBUF

IS LOADED

'"tt'.ttitt'fitttttfiiifi'it'ttititttttt'ttt'fi'ttttttttttttittt*ttt!

2176 004520
2177
2178 004522
2179 004526
2180 004530

2181 004536
004540
2183 004542
004542
004546
004550
004552
004554
004560

004562

105777

176140
176132

005077
105777

176 26
176 20

005737
001005
042777

002624

100021

100014

176142

1874

000004

BPL

CLR

TST8B
BPL

17622

104003

004737
000003

015714

004566

005737
001005
042777

000004

004602
004604
004606
024606
004612
004614
004616

004737
000004
000000
000427

015714

004620
004620

042777

000004

2204 004626
004634
004636
004642
004644
2209 004650

023737
001412
005737
001007
005737
001004

000042

001076

CTSTFL
1%

JSR

PC,8ATY4

BMI]
INC
BNE
TST
BNE
BIC

;% ENABLE MAINT. WRAP
;LOAD ~BUF
s CHECK DONE
;BR IF CLEAR
JFILL SECOND BUFFER, BECAUSE REFRESH (OULD CAUSF
FIRST TEST TJ FAIL
;
;FILL DOUBLE BUFFER
s CHECK DONE
:BR IF CLEAR

sCHECK IF DEVICE IS CONSOLE
;IF YES, SKIP ERROR TYPEOUT
;*» DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
sxx WITH TERMINAL.
;DONE NOT CLEARED WITH TBUF FULL
;BR TO END OF TEST

;;ONLY REPORT A FATAL ERROR
.. THE ERROR NUMBER (FROM APT

RO
aTCSR
1D
RO
4%

;CLEAR TIMER
;CHECK FOR XMIT DOME
;IF DONE SETS, BR TO END OF
s INCREMENT TIMER
;BR IF TIMER NOT DONE

CTSTFL

;CHECK IF DEVICE IS CONSOLF

#BIT2,aCTCSR

;**~ DISASBLE MAINTENANCE MODE FOR
;%% CONSOLE TO ALLOW FOR COMMUNICATICN

;*+ WITH

TEST

TERMINAL.

;TCSR 'DONE'* DOES NOT SET

JSR

PC.,$ATYS

HALT
BR

ENDB?7

;% BR TO NEXT TEST,

176032

BIC

#BIT2,aCTCSR

;**x DISABLE MAINTENANCE MODE FOR

000046

(MP
BEQ

G2, QN6
6$

JUNDFR ACT11?

5¢%:

TST
BNE
TST
BNE

L IST)

;TCSR "DONE'' NOT CLEARED WITH TBUF FULL

ERRCR
BR

000405

001074

+3
3%

1ST8

104004

aTBUF
aTCSR

ERROR
BR

CLR

176056

aTBUF
al(SR
3%

#B172,CTLSR

HALT

002624

W#RIT2,3TCSR

TST
BNE
BIC

176060

001373

SCOPE
BIS
CLR
TSTB

000404

004564

004572
C04574

000004

2172
2173
2174 004510
2175 004514

000004
052777
005077

004466
2168 004470
2169 004476
2170 004502
21N 004506

$PASS

6%
$DEVCT
6%

;BR TO END OF TEST

;;ONLY REPORT A FATAL ERROR
::THE ERROR NUMBER (FROM APT LIST)

;** AND SKIP THE TYPEOUT THAT FOLLOWS
;**
BECAUSE OF THIS FAILURE

;** CONSOLE TO ALLOW FOR COMMUNICATION
;**x WITH TERMINAL.

;IF

YES,

SKIP IDENT.

TYPEOUT

;IS THIS THE FIRST PASS?

JIF NOT BR TO NEXT TEST & SKIP THE

oIS THIS THE FIRST SUBPASS?
;IF NOT, BRTO NEXT TEST

IDENTIFICATION TYPEQUTS

SEQUENCE

MACRO M1113 (07-JUL-81 15:03 PAGE 34-1
CZDLDHO DL11=W 11/44 MFM SLU
TEST # 4 - TEST THAT TCSR BIT7(DONE) CLEARS WHEN XBUF IS LOADE
2210 004652
2211 004654
2212 004656
2213 004660
2214 004662
2215 004670
2216 004672
2217 004676
2218 004676
004700

004712

;TYPE

TYPE

104401

024754

032777
001402
000137
005000
012701
005300
001376
005301
001374

INDENTIFICATION

;TYPE NUMBER OF

104401

025014

PROGRAM

000020

005536
000002

174150

6%:

ENDB7:
40%:

#B1T4 ,aSWR

TEST

;CLOCK TEST ONLY?

ENDB?

. %

TCLOCK

DEVICES UNDER

¢ kK

BR IF NOT

JELSE, JUMP TO TEST CLOCK

#2,R1

DELAY ENOUGH TIME TO ALLOW ANY (HARACTERS
T THAT MIGHT BE IN THE PROCESS OF BEING

L0%

R1
408

TRANSMITTED TO FINISH BEFORE MAINTENANCE
WRAP FOR THE UART UNDER TEST IS DISABLED.
DRN THIS WILL INHIBIT ANY COMMUNICATION
Lan TO HARDWARE MEDIA SUCH AS TU58 THAT MIGHT
- kW
BE ATTACHED TO UART UNDER TEST.

.(ZDLDHO DL11=W 11744 MFM SLU

MACRO M1113 07-JuL-81 15:03 PAGE 35

SEQUENCE

TEST # 5 = TEST THAT TCSR 'DONE'' SETS WITH RESET

2219

.SBTTL

TEST # 5 - TEST THAT TCSR 'DONE'‘ SETS WITH RESET

L
L
R TR AL
Y

J*TEST S

TEST THAT T(CSR ‘DONE‘'' SETS WITH RESET

004714
2220 004716

2221 004724
2222 004730

2223 004734

000004
052777

005077
105777

100375

2224 004736
2225 004742
2226 004744
2227 004746
Sggg 004752

005077
000240
000005
105777
100401

%%%? 004754

1040C5

2232 004756
2233

000240

000004

175712
175704

175714

1ST5:
1%:

175700
175666

eI
e
R e
L

SCOPE
BIS
CLR
TSTB

BPL
CLR
NOP
RESET
TSTR
BM]
ERROK

10%:

NOP

#RIT2,’TCSR
aTBUF
al{SR

s*~ ENABLE MAINT. WRAP
;LOAD “RANSMIT BUFFER
JWAIT FOR DONE

aTBUF

;LOAD SECOND BUFFER

aTCSR
10%

;CLEAR DONE WITH RESET
;CHECK FOR DONE SET
;%% BR TO NEXT TEST IF DONE SET

;TCSR "DONE’' DOES NOT SET WITH RESET
S

CZDLDKO DL11=w 11/44 MFM SLU
TEST & € - TEST

ABILITY

MACRO M1113

TO ACCESS R(CSR

07-JUL-81

.SBYTL

2235

[ BA

15:03

SEQUENCE

PAGE 36

TEST # 6 ~ TEST ABILITY TO ACCESS RCSR

L3222 2320232220222d0R

20 RRRRRRAS2RR0RRRSRRRRRRRAN]

TEST ABILITY TO ACCESS RCSR

S*TEST 6

':t'tt'ti"tttittt*ttfit'tt'fii*fittt.tttttltfittttt*tttttttttfitttt't

004760
2236 004762
2237 004766
2238 004774
2239 005000
2240
2241 005002
2242 005004
2243 005006

000004
013703
012737
005777
000402

000004
005002
175634

010337

000004

SCOPE

MOV

a4 ,R3

s SAVE TIMEOUT VECTOR

1ST

aRCSR

;ACCESS RCSR

MOV

000004

BR
1%:

022626

104006

T876:

2%:

CMP

ERROR

MOV

1S, axnb
2%

;SET UM TIMEOUT VECTOR
;BR TO END OF

TEST

(SP)+,(SP)+

JRESTORE

R3, a4

JRESTORE TIMEOUT VECTOR

SP AFTER TIMEOUT

s CAN NOT ACCESS RCSR

CZDLDHO DL11=-W 11/44 MFM SLU
TEST # 7 - TEST

ABILITY

MACRO M1113

TO ACCESS RBUF

2244

07-JuL-81

LSBTTL
MR

15:03

N_ &
PAGE 37

SEQUENCE

TEST # 7 - TEST ABILITY TO ACCESS RBUF

ALAEES

SeTEST 7

at R ttddtliiiliililsdis
it
s
R 2222

TEST ABILITY TO ACCESS RBUF

;:"tttttttttttttfitfiitttt'tttttttttttttttt"tttttttttttttttttt'tt

2245
2246
2247
2248
2249
2250
2251
2252

005012
005014
005020
005026
005032

000004
013703
012737
005777
000402

005034
005036
005040

022626

104007

010337

000004
005034
175604

7S17:

000004

a4 ,R3
AL $Y A

TST

1%:

000004

SCOPE
MOV
MOV

2%:

(MP

ERROR
MoV

;SAVE TIMEOUT VECTOR
sSET Ul TIMEOUT VECTOR

aRBUF

sACCESS

(SP)+,(SP)+

JRESTORE

+7
R3, a4

RBUF

;BR TO END OF

TEST

SP AFTER

TIMEOUT

s CAN NOT ACCESS RBUF
JRESTORE TIMEOUT VECTOR

B S
MACRO M1113 07-JuUL-81 15:03 PAGE 38
TEST # 10 ~ TEST THAT BITO(BREAK BIT) CAN BE SET & CLEARED € R
2253

.SBTTL

—~

TEST # 10 - TEST THAT SITO(BREAK BITM)

CAN BE SET & CLEARED & RESET

'“'tt'tttt!'l!t'tt'tti't"t'tt'tittltfi‘tfiifitttittttttit'ttt'tttt'

S*TEST 10

TEST THAT BITO(BREAK BIT)

CAN BE

SET & CLEARED & RESET

:.'tQtt'tttt*'t'!tfittll"t"tt".QtQfittt.t'fi'tfitt'tfi*'tt'i*'ttttttt

2263 005102

001462

2265 005104
2266 005106
2267 005114
2268 0C5116
2269 005122
2270 005124
005126
2272 005130
005130

000005
032777
001411

005737

001002
104011
000404

000010

000001

005134
2273 005136

2275 005140
2276 005146
2277 005154

052777
032777
001001

000001
000001

2279 005156

104012

005160

042777
032777

2295 005240
2296 005246
2297 005250

173736

000001
000001

BEQ
BIT

9%
#RITO3,aSWR

BEQ

108

RESET

BIT

BEQ
TST

BNE
ERROR

175472
175464

175452

175444

PC.SATYS

2%:

JSR
1

HALT

3%:

BIS

#B170,aTCSR
#31T0,aTCSR

A ¥

000001

175412

000001

175402

000001

175372

BIT
BNE

TEST,

;*% BR TO NEXT

;% IS THIS A 11/44

-xex

;x*
;ox

YES THIS
SLU

-xx

THIS

11/44.

THE

CONSOLE

MR LSST BE PERFORMED
R

IF NOT
IS

;BITO WAS NOT CLEAR AFTER RESET
;;ONLY REPORT A FATAL ERROR
;s THE ERROR NUMBER (FROM APT LIST)

;SET BITO IN TCSR
;TEST BITO OF

TCSR

BIC
BIT

#B1T0,3TCSR

:CLEAR BJT0 OF TCSR

TST
BNE
ERROR
BR

CTSTFL

+13
7$

JSR

PC.SATYS

7%:

BIS
RESET
BIT
8tQ
BIC
ERROR
NCP

#3170,aTCSR

#3]170,aTCSR
108

#MIT0,a8TCSR
+14

THE BREAK

;CHECK BITO OF TCSR CLEAR
;BR IF CLEAR

;BITO OF TCSR WILL NOT SET

HALT

CONSOLE

;CLEAR EVERYTHING

+12

THE

ERROR

;?ITO,STCSR

THIS

SLU.SHOULD

;BR IF SET

6%:

10%:

;1S BREAK FUNCTION ENABLED?

BEQ

5%:

052777

CTSTFL
1%
+11

002624

015714

#3170,aTCSR
3%

1%:

004737
000013
000000

000240

9%:

002624

015714

8EQ
TST

HR1T8,3SWR
108
ABITO,FLAGLS
9%
CTSTFL

BIT

007002

175524

SCOPE
BIT

BEQ

002624

004737
000011
000000

001411
005737
001002
104013
000404

TST10:

001404
032777

000001

173764

2260 005072
005074

000400

000004
032777
001475
032737
001407
005737

005044
005046
005054
005056
005064
005066

2254
2255
2256
2257
2258

SEQUENCE

(ZDLDHO DL11=W 171/44 MFM SLU

sJTEST BITO OF

T(CSR

;BITO OF TCSR WILL NOT (CLEAR
;;ONLY REPORT A FATAL ERROR
;s THE

ERROR NUMBER

(FROM APT

JSET BITO IN T(SR
:FVEAR BITO WITH RESET
;TEST BITO CLEAR
;** BR IF CLEAR
:CLEAR BIT0, TO PRINT ERROR
JRESET DID NOT CLEAR BITO OF T(CSR
b

2 J

LIST)

CZDLDMO DL11-W 11/44 MFM SLU
33 & 11

TEST

THAC B116(XMIT

INT EN)

2298

07-JUL-81

CAN BE

.SBTTL
A

SET

000004
000005
017703
012777
004737
000340
032777
001404

TEST # 11

005312
01450¢

*175360

000100

175334

005310

000402

005312
005314

022626

005316
005324
005332

052777
032777
001001

005334

104023

005336
005344
005352
005354

042777
032777
001401

005356
005364
005366
005374

052777
000005
032777

00537¢

104025

005400

010377

TEST THAT BITO6(XMIT

2%:

000100
000100

175274
175266

3%:

104024

000100

175254

000100

175244

TVECT,R3

#1$,aTVECT
PC,WRPSW

.WORD
340
#BIT6,ITCSR
251
+

CMP
ERROR

(SP)+,(SP)+

+22

BIS
BIT
BNE

#B176,aTCSR
#B1T6,aTCSR
3$

ERROR

+23

BIC
BIT
BEQ
ERROR

H#BIT6,QTCSR
#B1T6,aTCSR
49

BIS

A#31T6,8TCSR

BIT

#81T6,aTCSR

ERROR

+25

MOV

R3,aTVECT

RESET

BEQ

5%:

INT EN)

RRRRRRR022202R

SCOPE

RESET
MOV
MoV
JSR

BEQ

1%:

SEQUENCE

= TEST THAT BIT6(XMIT

SRR

ERROR

104022

001401

Aie222020

BIT

104021

5
c
PAGE 39
CAN BE

SET & RESET

i it
2222222222222 2822
RR X

i§T11:
175366

15:03

& RESET

TRTEST 11

NWNWWWWN

MACRO M1113

+24

CAN BE

223222

SET & RESET

RRRRXR

]

;CLEAR EVERYTHING

:SAVE ~MIT VECTOR

;SET UP INTERRUPT VECTOR FOR ERROR REPORT

;SET PSW TO PRIORITY=7

;TEST BIT6 OF TCSR

:BR IF ZERO

;BIT6 IN TCSR NOT CLEAR AFTER RESET
JRESTORE SP AFTER INTCRRUPT

JXMIT INTERRUPT OCCURRED

PRIO=7

JSET BIT6 OF TCSR
;TEST BIT6 OF T(SR
;BR, IF SET

;CANNOT SET BIT6 OF T(CSR
;CLEAR BIT6 OF T(CSR
;TEST BIT6 OF

;BR IF CLEAR

TCSR

;CANNOT CLEAR BIT6 OF TCSR
JSET BIT6 OF TCSR
;JCLEAR BIT6 WITH RESET
;TEST BIT6 OF TCSR
;BR IF CLEAR

s CANNOT CLEAR BIT6 OF TCSR WITH RESET
JRESTORE

XMIT

VECTOR

—

(ZDLDHO DL11=W 11/44 MFM SLU
TEST # 12 - TEST

THAT BIT6 OF

MACRO M1113

RCSR CAN BE

2335

07-JUL-81

SET & RESET

.SBTTL

15:03

0D 5
PAGE 40

SEQUENCE

TEST # 12 - TEST THAT BIT6 OF RCSR CAN BE SET & RESET

;.'tttttttt'ttttttttttttttt'ttttt'tttttttttttttttttttttt!t.titttt'

s*TEST

TEST

THAT BIT6 OF RCSR CAN BE SET & RESET

'-‘-ttttttt!'t'ttt.tttttt'tttttt'tt'tttttttttttt'ttttttt'ttt'tt'tt'

005404
2336 005406
2337 005410
2338 005414
2339 005422
2340 005426
2341 005430
2342 005436
2343 005440

000004
000005
017703
012777
004737
000340
032777
001404
104026

g%fig 005442

000402

2347 005444
2348 005446

022626
104027

2351 005450
2352 005456
g%gz 005464

052777
032777
001001

2355 005466
gggg

104030

2358 005470
2359 005476
Sggg 005504

042777
032777
001401

2362 005506

104031

2365 005510
2366 005516
2367 005520
Sggg 005526

052777
000005
032777
001401

2370 005530
2371

104032

2344

Sgég

Sggz

2372 005532
2373 005536

010377
012737

TST12:

175230
005444
014502

175222

000100

175176

1%:

000100
000100

175156
175150

175136
175130

000100

175116

000100

175106

175106
000012

001002

2%:

3%:

4$:

SCOPE
RESET
MOV
MOV
JSR
BIT
BEQ
ERROR

@RVECT.R3
#1$,3RVECT
P( ,WRPSW
.WORD
340
#IT6,3RCSR
23
+2¢

B8R

CMP
ERROR

(SP)+,(SP)+
+27

8IS
BIT
BNE

#R]T6,aRCSR
#3]76,3RCSR
3%

ERROR

+30

BIC
BIT
BEQ

#BIT6,a8RCSR
#B1T6,3RCSR
43

ERROR

+31

BIS
RESET
BIT
BEQ

#8]T6,3RCSR

ERROR

+32

5%:
MOV
TCLOCK: MOV

#3176,3RCSR
Ss

R3,3RVE(CT
#12,8TSTNM

:CLEAR EVERYTHING
:SAVE NECEIVE VECTOR
:SET UP INTERRUPT VECTOR FOR ERROR REPORT
;SET PSW TO PRIORITY-?7
:TEST BIT6 OF RCSR
:RIT6 OF RCSR NOT CLEAR AFTER RESET

:RESTORE SP AFTER INTERRUPT
:RCVR INTERRUPT WITH PRIORITY-7

;SET BIT6 OF RCSR
:TEST BIT6 OF KCSR
:BR, IF SET
:CANNOT SET BIT6 OF RCSR

;CLEAR BIT6 OF RCSR

;TEST BIT6 OF RCSR
:BR, IF CLEAR

:CANNOT CLEAR BIT6 OF RCSR
;SET BIT6 OF RCSR
;CLEAR BIT60F RCSR WITH RESET
;TEST BIT6 CF RCSR
;BR, IF CLEAR
;CANNOT CLEAR BIT6 OF RCSR WITH RESET

JRESTORE RECEIVE VECTOR
JADJUST TEST NUMBER TO (NEXT TEST = 1)

MACRO M1113
(ZDLDHO DL11=w 11/44 MFM SLU
TFST # 13 - TEST ABILITY TO ACCESS LKS
374

07-4uL~-81

LSBRTTL

2380
2381 005604
2382 005606
2383
2384 005610
385

000004
005737
001420
032777
001014
013703
012737
005777

00040¢

000100
000004
005604
175072

TEST # 13 - TEST ABILITY TO ACCESS LKS

3822332322328222220222220230200RRR2iRdR
it RidRRiidRistiadRld]

104010

010337

173256

000004

SCOPE
TST
BEQ
BIT
BNE

MoV
MOV
TST
B8R

000004

1%:

022626

SEQUENCE

3332323332323 0232222222222020222
2020222222 R R 2R iRitRitsRRsl ]

1$713:

002624

5
E
PAGE 41

SeTEST 13
005544
2375 005546
005552
005554
005562
2376 005564
2377 005570
2378 005576
2379 005602

15:03

CMP
ERROK
MOV

TEST ABILITY

CTSTFL
TST14
#B1T6,aSWR
TST14

TO ACCESS LKS

;IS CONSOLE UNDER TEST?

;1F NO7, SKIP THIS TEST
JARE LINE CLOCK TESTS INHIBITED?

;IF

YES,

SKIP THIS TEST

1S, a4l
aLKS

sSAVE TIMEQUT VECTOR
;SET UP TIMEOUT VECTOR
JACCESS LKS
;NO TIMEOUT - BR TO END OF

(SP)+,(SP)

JRESTORE SP AFTER TIMEOUT

R3,a44

JRESTORE

k6 ,R3

+10

;CAN NOT ACCESS LKS
TIMEOUT

VECTOR

TEST

CZDLDHO DL1T=w 11/44 MFM SLU
TEST ® 14 =~ TEST

THAT BIT6 OF

MACRO M1113

LKS CAN BE

2386

07-JUL~81 15:03

SET & RESET

JSBTTL

F_5

PAGE 42

SEQUENCE

TEST # 14 = TEST THAT BIT6 OF LKS CAN BE SET & RESET

":".""Q"..Q.tfi..'.t'"""t!t'ttt".Qttlt'ttttt'ttt".'tt"ttt

T*TEST

TEST

THAT BIT6 OF

LKS

CAN BE

SET & RESET

.'"."."l"l.t...'t.."""t."".t.t.tt'.'.t't't'tttttiQttttt'tt

005614
2387 005616
005622
005624
005632
2388 005634
2389 005636
2390 005642
2391 005650
2392 005654
2393 005656
2394 005664
2395 005666
239
gggg 005670

000004
005737
001460
032777
001054
000005
017703
012777
004737
000340
032777
0014C4
104033

2399 005672
2400 005674

022626
104034

548}

T$774:

002624
000100

173206

175034
005672
014502

17502¢

000100

175010

SCOPE
TST

CTSTFL
1ST15
#B1T6,aSWR
15715

;1S CONSOLE UNDER TEST?
*1F NO~, SKIP THIS TEST
SARE LINE CLOCK TESTS INHIBITED?
S1F YES, SKIP THIS TEST

;SAVE LINE CLOCK VECTOR
*SET UP INTERRUPT VECTOR FOR ERROR REPORT
*SET PSW TO PRIORITY 7

ERROR

8RTCVT,R3
#18,3RTCVT
PC,WRPSW
.WORD
340
#31T6,aLKS
2%
+33

cMp
ERROR

(SP)+, (SP)+
+34

;RESTORE SP AFTER INTERRUPT

BIS
BIT
INE

#31T6,aLKS
#BIT6.aLKS
38

;3ET BIT6 OF LKS
:TEST BIT6 OF LKS
‘BR IF SET

ERROR

+35

BEQ
BIT
BNE
RESET
MGV
MOV
JSR
BIT
BEG

000402
18

;TEST BIT6 OF LKS
:BIT6 OF LKS NOT CLEAR AFTER RESET

:LKS

INTERRUPT WITH PRIORITY-7

2403 005676
2404 005704
5282 005712

052777
032777
001001

2407 005714
%283

104035

2410 005716
2411 005726
2412 005732
2413 C05734
2614
2415 005736
2616 005744
2617 005746
2418 005754

042777
032777
001401
104036

000100
000100

174750
174742

3$:

BIC
BIT
BEQ
ERROR

#31T6,8LKS
#3iT6.aLKS
4$
+36

052777
000005
032777
001401

000100

174730

4$:

#B1T6,aLKS

000100

174720

BIS
RESET
BIT
BEQ

2420 005756
2421

104037

ERROR

MOv

R3,@RT(VT

2622 005760

010377

00C100
060100

174712

174770
174762

2$:

5%:

#31T6,aLKS
5%

;CANNOT SET BIT6 OF LKS

;CLEAR BIT6 OF LKS
:TEST BIT6 OF LK
;CANNOT CLEAR BIT6 OF LKS
“SET BIT6é OF LKS
:(LEAR BIT6 OF LKS WITH RESET
STEST BIT6 OF LKS
:BR IF CLEAR

s CANNOT CLEAR BIT6 OF LKS WITH RESET

JRESTORE LINE CLOCK VECTOR

MACRO M1113 07-JuL-81
TEST # 15 ~ TEST FOR DUAL ADDRESSING OF REGISTERS

(ZOLDRO DL11=w 11/44 MFM SLU

2623

.SBRTTL
A

2428

2629

2430
2631
26432
2433

2634
2635
2436
2637
2638
2439
2640
26461
2442
2443
2444
2445
2646
2647
26448
24649
2450
2451
2652
2653
2656
2455
2456
2457

SEQUENCE

TEST # 15 - TEST FOR DUAL

ADDRESSING OF

REGISTERS

SE E2Z22223222 2222222222222
22222 RRRRRRRRRRRARlRRRERSRRAS)

SeTEST 15
LYY
2625
2426
2627

G_ 5
PAGE 43

15:03

000004
013703
013704
012737
012737
000005
012700
032777
001404

013737
000403
013737
013737
040037
023737
001002
050037

017737
052777
032777
001011
013777
000401
022626
006300
105700
100343
000401

000004
600006

000002
000020

173012

002674

001020

002634

001020
001022

001020
001022
001020
001022

172722

000100
000100
001024

172712
172702

BIT
BEQ
MOV

MOV
MOV

3¢:

BIC
(Mp
BNE
BIS
MOV
BIS

BIT
BNE

172674

MOV

5¢:

000004
000006

SCOPE

ADDRESSiNG OF

REGISTERS

;SAVE TIMEOUT VECTOR
;SAVE TIMEOUT PSW

MOov

MOV
MOV
RESET
MOV

V01022
001024

FOR DUAL

MOV

104040

01033/
010437

15715

000004
000006
006130
000340

TEST

X222 2222222222R22R22RRARARRRRsdRRRRRRRRRlRRRR
Rl RlRR RS

B8R
cMP

ASL
TSTR

#340,a#6

#IT1,R0

7@174.aswa

LKS,$GDADR
2%

RCSR, $GDADR

$GDADR, $BDADR
RO, $BDADR
§2DADR,$BDADR
RO, $BDADR
@$8DADR, $SGDDAT
#3]176,3%BDADR
#3176,a$GDADR
6%

ggDDAT,GsebADR

(SP)+,(SP)+
RO
RO

JSET UP TIMEOUT VECTOR

JKEEP PRIO=7
;CLEAR EVERYTHING
JsSET UP BIT MASK
JCLOCK TEST ONLY?
;BR IF NOT

JELSE, MOVE GOOD LKS ADDRESS INTO $GDADR
;MOVE GOOD RCSR ADDRESS INTO S$GDADR
;MOVE

GOOD ADDRESS

INTO

TEST ADDRESS LOCATION

;CREATE BAD ADDRESS BY COMPLEMENTING ONE BIT
;ARE ADDRESSES

;1F

NOT,

TEST

IDENTICAL?

THIS ADDRESS

JELSE, BT SET THIS BIT POSITION TO GENERATE BAD ADDRESS
;SAVE

CONTENTS OF

BAD ADDRESS

IfF

IT EXISTS

;SET BIT6 USING BAD ADDRESS
;CHECK TO SEE IF GOOD ADDRESS CONTAINS BITé6
:BR IF SET =-=-=> ERROAR
:RESTORE ANY MEMORY LOCATION THAT WAS ALTERED
JBR TO CONTINUE TEST
;RESTORE SP AFTER TIMEOUT
:SHIFT BIT MASK

TO NEXT POSITION

;COMPLEMENTED ALL BI'S FROM 1
;BR,

NOT.

BPL
BR

;BR TO NEXT

6%:

ERROR

+40

;DUAL ADDRESSING ERROR
;$BDADR = DUAL ADDRESS
:$GDADR = GOOD ADDRESS

7%:

MOV
MOv

R3,ans
R4, a¥0

JRESTORE
JRESTORE

TEST

TIMEOQOUT
TIMEOUT

VECTOR
PSW

~ 7?

R
R

CIOLDHO DLYT=Ww 11744 MEM SLU
TEST & 16 ~

TEST

THAT BIT 7 OF

MACRO M1113

07-JuL=-81

LKS SETS & (AN BE

24658

C(LEARED

15:03

PAGE 44

SEQUENCE

LSBTTL

TEST # 16 - TEST THAT BIT7? OF LKS SETS £ CAN BE CLEARED

J*TEST

:""."."..'.'.'.."'.""""'.'Q".Q....'.'Q'..".....'..."'.

TEST

THAT BIT7 OF

LKS SETS & CAN BE

CLEARED

.'.’.'."'...'Q..l'..'Q'.'.""'..'"...".'.'."Q"".....""'"'

006154
2659 006156

0000046
005737

002624

006164

032777

000100

006162

006172
2460 006174
2661 006176
Szg% 006202

001437
001033
000005
105777
1004601

%22% 006204

104041

2466 006206
2467 Q06214
2468 006222
2669 006226

042777
032777
001410
142777

54;; 006240

0014601

2470 0C6232

032777

’

T1ST16:

000200
000200
300200

000200

176460
174452

CTSTFL

;1S CONSOLE UNDER TEST?

BI7

#[T6,aSWR

JARE LINE CLOCK TESTS INHIBITED?

B8EQ

172646

.
174472

SCOPE
TST

2%:

74442

17443

BNE
RESET
TST8
BM]

TIST17

aLkS
2%

JIF YES, SKIP THIS TEST
;CLEAR EVERYTHING & SET BIT7 OF LKS
JTEST FOR BIT7 OfF LKS
JBR [F SET

ERROK

+41

JBIT7 OF LKS DID NOT SET WITH RESET

BI(
8IT
BEQ
BIC

#3177, aLKS
#8177 ,aLKS
3%
M1T7,aLKS

JCLEAR BIT?7 OF LKS
;TEST BIT? OF LKS

BEQ

8I7

TST17

JIF NO7, SKIP THIS TEST

#1717, aLKS

;TRY ONE MORE TIME BECAUSE THE (LOCK

;

MAY HAVE SET [MMEDIATELY AFTER THE FIRST (LEAR

[

%2;2 006242

104042

2475 006244
2476 006246

005000
105777

2477 006252
2478 006254
5458 006256

100403
005200
001373

1744622

bt §
{ONT:

ERROR

+42

;CAN NOT (CLEAR BIT? OF LKS

(LR
TSTR

RO
alLKS

;CLEAR TIMER
JTEST FOR BIT7 OF LKS

ERROR

+43

JBIT7 OF

8M]
INC
BNE

15117
RO
CONT

;BR, [F SET
;s INCREMENT TIMER
JCONTINUE UNTIL TIME EXPIRES

2481

006260

104047

LS DOES NOT SET

5
I
MACRO M1113 Q7-JuL=81 15:03 PAGE 45
TEST &4 17 -~ TEST THAT THE REAL TIME CLOCK INTERRUPTS PROPERLY

SEQUENCE

C20LDHO DL11=w 171/44 MFM Sl
U

.SBTTL

2L8?

TEST # 17 - TEST

2223322222222

SeTEST 17

. 2222332323202

0N62¢?
2683 006264
006270
006272
006300
2484 006302
2485 006306
006310
2487 006314
006320
006326
006334
006340
006346
006352
006354
006360
006366
006372
006374
006376

000004
005737
001514
032777

001110
004737
000340
017703
017704

012777
012777
005077
012777
105777

100375

005077
012777
105777
100375
000240
000402

006400
006402

022626

006404
006410
006416
006422
006424
006430
006432
006434
0064 36

005077
012777
004737

006440
006442

022626

006444
006452
006460
006466
006472
006474

012777
042777
052777

006476
006500
006502
006504
006512
006516

104046
000401

15117:

01450¢
174362

MOV

000100

1764360

006400
000340

174334
000100
174322

174314
000100

174302

172540

MOv

174350
176344
174326

1746300

MOV

(LR

1%:

174264
006440
014502

174260

4%:

105777
100375

006502
000200
000100
174202

174224
174214
174206

022626
042777
010377
010477

174160
174156

.WORD

340

aRTCVT,R3

R4
aRT(PSW,
#38 ,QRTCVT
#340,aRTCPSW
aLkKS

#B1T6,3LKS
aLKS
1%
aLKS
#5]76,aLKS
aLKS

TIME CLOCK INTERRUPTS PROPERLY
2Rt

RiddtiitRitstttRs

;1S CONSOLE UNDER TEST?

;IF NOT, SKIP THIS TEST
JARE

LINE

CLOCK

TESTS

INHIBITED?

JIF YES, SKIP THIS TEST

;SET PSW TO PRIORITY 7
;SAVE
sSAVE

LINE
LINE

CLOCK VECTOR
CLOCK PSW VECTOR

;SET RTC INTERRUPT VECTOR TO ERROR REPORT
JKEEP PRIORITY AT

;CLEAR DONE FLAG AND
sSET CLOCK INTERRUPT ENABLE

JWAIT FOR RTC DONE (INTERRUPT REQUEST)

;CLEAR DONE FLAG AND
JSET CLOCK INTERRUPT ENABLE
JWAIT FOR RTC

DONE (INTERRUPT REQUEST)

;GIVE TIME FOR ANY INTERRUPTS
;JBR, IF NO INTERRUPT OCCURS
JRESTORE

CLR

aLKS$

#5% ,aRTCVT
PC,WRPSW

;DISABLE RTC INTERRUPTS B CLEAR DONE
JSET RTC INTERRUPT VECTOR FOR ERROR
; CHANGE PSW TO PRIORITY 5

alLKS

JWAIT

TSTR
BPL
NOP
NOP
BR

6%:

MOV

7%:

1ST8B

BIC
BIS

BPL
NOP

174162

PC,WRPSW

INTERRUPTS PROPERLY

(SP)+,(SP)+
+44

ERROR

000100

CTSTFL
15720
#BIT6,aSWR
TST20

CLOCK

(MP
ERROR

cMP
ERROR

8%:
9%:

THE REAL

22220232022222

TIME

5¢:

000240

TEST THAT

THE REAL

22222202 RZ2RRiRtRddiRRssdRRastRlld

JSR

000402
104045

MOV
1STR
B8PL
NOP

MOV

20%:

1742464

MOV
1STR
B8PL

(LR

104044

000240
105777
100375
000240
000240

SCOPE

TST
BEQ
BI7
BNE
JSR

002624

THAT

22230222020

(MP
8l

MOV

.WORD

240

20%

JRTC

SP AFTER

INTERRUPT

INTERRUPTS AT PRIORITY

FOR DONE

(INTERRUPT REQUEST)

;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
;IF NO INTERRUPT = BR TO CONTINUE TEST

(SP)+,(SP)+

JRESTORE SP AFTER INTERRUPT

#8% ,aRTCVT

;POINT RTC VECTOR TO END OF TEST
;CLEAR CLOCK DONE FLAG
JALLOW INTERRUPTS

+45

#B]T7,aLKS
AIT6,dLKS
alLKS
7%

+46
9%

(SP)+,(SP)+

#MIT6,aLKS
R3,aRTCVT

Ré4 ,aRT(PSW

JRTC

;WAIT

INTERRUPTS WITH

FOR RTC

INTERRUPTS DISABLED

DONE

;GIVE TIME FOR INTERRUPT
JRTC

INTERRUPT

DID NOT OCCUR

;BRANCH OVER STA(CK (ORRECTION
JRESTORE SP AFTER [NTERRUPT
JDISABIE INTERRUPTS
JRESTORE
JRESTORE

LINE
LINE

CLOCK VECTOR
(LOCK PSW VECTOR

CZDLDHO DL11-w 11/44 MFM SLU
TEST # 20 - TEST RTC

FOR DOUBLE

MACRO M1113
INTERRUPTS

2530

07-JuL-81

LSBTTL

TEST # 20 -~ TEST RTC

000240

005077
012777

105777
100375
005077
012777
105777
100375
000240
000240
104047
000401
022626
012777

004737
000240

174072

000100

174060

174052
000100
174040

006676
014502

—
-

174064

1764044

174020

006702
006710
006714

042777
010377
010477

000100
173762

173760

173764

TST

.WORD
CLR

2%:

3%:

A ¥

5%:

104050

SCOPE

RESET
MOV
MOV
MOV
MoV
JSR

1%:

6%:

TEST RTC

FOR DOUBLE

ti3222 2222222202022

BEQ
BIT
BNE

0N0240
000240
000240
000240
000402
022626

INTERRUPTS

[@P

——

000340
014502

174126
174124
006646

FOR DOUBLE

172300

——

000100

SEQUENCE

2332222222223 2Z2220222222R22020RR2RRRR
iR
RRARSRRsll R

1$720:

002624

J
5
PAGE 46

SeTEST 20
000004
005737
001473
032777
001067
000005
017703
017704
012777
012777
004737

15:03

MOV

1STR
BPL
CLR

MOV
T1STR
BPL
NOP
NOP

ERROR
B8R
(MP
MOV

JSR
.WORD
NOP
NOP
NOP
NOP
BR
CMP

CTSTFL

15121
#B]1T6,aSWR
TST21

dRTCVT ,R3

R4
aRTCPSW,
438 aRTCVT
#340,aRTCPSW
PC,WRPSW

240

disRRRRRRRRRlRRld]

;1S CONSOLE UNDER TEST?
;IF NOTM, SKIP THIS TEST
JARE

LINE

CLOCK

TESTS

INHIBITED?

JIF YES, SKIP THIS TEST
;CLEAR EVERYTHING
sSAVE LINE CLOCK VECTOR
sSAVE LINE CLOCK PSW VECTOR
;SET UP RTC INTERRUPT VECTOR
;DISALLOW INTERRUPTS AFTER THE INTERRUPT
;SET PRIORITY TO 5

aLKS
#B1T6,aLKS
aLKS
1%
aLKS
#B1T6,aLKS

;CLEAR DONE FLAG AND

.BRANCH BACK IF NOT DONE

aLKS

+47
4%
(SP)+,(SP)+
#5%,aRTCVT
PC,WRPSW

240

6%
(SP)+,(SP)+

ERROR

+50

B8IC

#BI1T6,aLKS
R3,aRTCVT

MOV
MOV

INTFRRUPTS

iRt

R4 ,aRTC(PSW

JSET CLOCK INTERRUPT ENASLE

JWAIT

FOR DONE

;BRANCH BACK IF NOT DONE
;CLEAR DONE FLAG AND
;SET CLOCK INTERRUPT ENABLE
;WAIT FOR DONE

;GIVE TIME FOR ANY INTERRUPT

;GIVE

TIME FOR ANY INTERRUPT

JRTC INTERRUPT DID NOT OCCLR
;BRANCH OVER STACK CORRECTION
JRESTORE SP AFTER INTERRUPT
sPOINT RTC VECTOR TO ERROR REPORT
;JSET PSW TO PRIORITY 5

;GIVE SOMC TIME FOR AN INTERRUPT

;GIVE SOME TIME
;GIVE SOME TIME
;GIVE SOME TIME
;NO INTERRUFT -

FOR AN INTERRUPT
FOR AN INTERRUPT
FOR AN INTERRUPT

BR TO END OF TEST

JRESTORE SP AFTER INTERRUPT
JINTERRUPT SEQUENCE DID NOT CLEAR

JINTERRUPT REQUEST

sDISABLE CLOCK INTERRUPTS
JRESTORE

LINE

CLOCK VECTCR

JRESTORE LINE CLOCK PSW VECTOR

———
——

CZDLDHO DL11=w 11/44 MFM SLU
TEST # 21

= TEST

THAT RTC

MACRO M1113

07-JuL-81

INTERRUPT (LEARS WITH RESET

2568

LIBTTL
SR

K_5
PAGE 47

15:03

TEST # 21

SEQUENCE

~ TEST THAT RTC

INTERRUPT CLEARS WITH RESET

232222222222 222222222R22RRdRRR2d22R2Ri22R
Rt R dRRRRRRRRRARARE R

LeTEST 21

TEST

THAT

RTC

INTERRUPT

e 2223222222222
R
PRl

006720
2569 006722
006726
006730
006736
2570 006740
2571 006744
2572 006746
2573 006752
2574 006760
2575 006764
2576 006772
2577 006776
2578 007000
2579 007004

2580 0C7012
2581 007016
2582 007020
2583 007022
2584 007024
2585 007030
2586 007032
2587 007034
2588 007042
2589

2590 007044
2591 007046
2592
2593 007050

000004
005737
001452
032777
001046

004737
000340
017703
012777
005077
012777
105777
100375

005077
012777

105777
100375
000240
000005
004737
000240
000240
042777
000402

00100

173724
007044
173710
000100
173676

172102

173670
000100
173656

73662

MOV

CLR

1%:

104051

173622

MOV
TSTB

BPL

CLR

2%:

MOV
TSTR
BPL
NOP
RESET

MIT6,aSWR
TST22

PC,WRPSW

. WORD
340
ARTCVT
R3
#38 ,aRTCVT
alLKS

#MIT6,aLKS
oLKS
1%
olLKS

#MBIT6,aLKS

aLKS

2Rl

;SAVE LINE CLOCK VECTOR
;POINT RTC VECTOR TO ERROR REPORT
;CLEAR DONE FLAG AND
JSET CLOCK INTERRUPT ENASBLE
;WAIT

FOR DONE

(INTERRUPT REQUEST)

;CLEAR DONE FLAG AND

JSET CLOCK INTERRUPT ENASBLE

JWAIT FOR DONE

(INTERRUPT REQUEST)

;GIVE TIME FOR ANY INTERRUPT
;CLEAR PENDING INTERRUPT WITH RESET

;SET PRIORITY TO 5

NOP
8IC
B8R

#81T6,aLKS
43

3¢

(MP
ERROR

(SP)+,(SP)+
+51

JRESTORE

SP AFTER

4%:

MOV

R3,aRTCVT

JRESTORE

LINE

173632

RRR

;IF NO~, SKIP THIS TEST
JARE LINE CLOCK TESTS INMIBITED?
JIF YES, SKIP THIS TEST
:SET PRIORITY TO 7

PC,WRPSW

.WORD

21S CONSOLE UNDER TEST?

CTSTFL

TST22

JSR

014502
000100

MOV

173716

173702

SCOPE
dtv
BIT
BNE
JSR

014502

022626
010377

1$121:

002624

CLEARS WITH RESET

240

;GIVE TIME FOR ANY INTERRURT

;DISALLOW INTERRUPTS
;BR TO END OF TEST

INTERRUPT

JRESET DID NOT CLEAR INTERRUPT
CLOCK VECTOR

CIDLDHO DL11-W 11/44 MFM SLU
TEST # 22 = TEST

THAT RTC

MACRO M1113

INTERRUPT

07-JuUL-81

15:03

CLEARS BY CLEARING BIT7 OF

2594

_SBTTL

5
L
PAGE 48

SEQUENCE

TEST # 22 - TEST THAT RTC INTERRUPT CLEARS BY CLEARING BIT7 OF LKS

;:"tit'ttt'.t.tfi**ittttitttttttfittt'l’ttfitttttfifittt.tttttt.ttt'tt

TRTEST 22

TEST THAT RTC

INTERRUPT CLEARS BY CLEARING BIT7 OF

LKS

;"ttttttfififitttilfitfitttttt"*'ttttt*ttttfitttttitttttttt'tttttttttt

007054
2595 007056
007062
0070645

000004
005737
001457
032777

2597 007100
2598 007102
2599 007106
2600 007114
2601 007120
2602 007126
2603 007132
2604 007134
2605 007140
2606 0C7146
2607 007152
2608 007154
2609 007156
2610 007164
2611 007170
2612 007172

000340
017703
012777
005077
012777
105777
100375
005077
012777
105777
100375
000240
042777
004737
000240
000240

Sg}g 007202

000402

000100

007072 001053
2596 007076 004737 014502

2613 007174

042777

2616
2617 007204
gg}g 007206

022626
104052

2620 007210
2621 007214
2622 007220

010377
004737
000340

7§722:

002624

173570
007204
173554
000100
173542
173534
000100
173522

171746

173526

000200
014502
-

173510

000100

173472

173462
014502

BNE
JSR

173562
173546

SCOPE
TST
BEQ
BIT

1$:

2%:

MOV
MOV
CLR
MOV
TSTB
BPL
CLR
MOV
TSTB
BPL
NOP
BIC
JSR
NOP

CTSTFL
1ST23
#BIT6,aSWR

T1ST23
PC ., WRPSW

LWORD
340
ARTCVT,R3
#3$,9RTCVT
ALK S
#BIT6,BLKS
aLKS
1$
ALKS
HRIT6,aLKS
aLKS
2%
#BIT7 ,GLKS
PC,WRPSW
LWORD
240

;1S CONSOLE UNDER TEST?
:1F NOT, SKIP THIS TEST
*ARE LINE CLOCK TESTS INHIBITED?

*IF YES, SKIP THIS TEST
:SET PRIORITY TO 7

;SAVE LINE CLOCK VECTOR
*POINT RTC VECTOR TO ERROR REPORT
:CLEAR DONE FLAG AND
:SET CLOCK INTERRUPT ENABLE
‘WAIT FOR DONE (INTERRUPT REQUEST)
;CLEAR DONE FLAG AND
*SET CLOCK INTERRUPT ENABLE
:WAIT FOR DONE (INTERRUPT REQUEST)
;GIVE TIME FOR ANY INTERRUPT
:CLEAR DONE & INTERRUPT
SALLOW INTERRUPTS

:GIVE

TIME FOR ANY INTERRUPT

BIC

#BIT6O,ALKS

3$:

CMP
ERROR

(SP)+,(SP)+
+52

;RESTORE SP AFTER INTERRUPT
:CLEARING BIT7? OF LKS DID NOT CLEAR INTERRUPT

4%:

MOV
JSR
.WORD

R3,3RTCVT
PC . WRPSW
340

;RESTORE LINE CLOCK VECTOR
*RESTORE PRIORITY TO 7

:DISALLOW INTERRUPTS
:BR TO END OF

TEST

CZOLDHO DL11=W 11/44 MFM SLU

MACRO M1113

TEST # 23 ~ TEST CLOCK REPEATABILITY

2623

07-JuL-81 15:03

LSBTTL

PAGE 49

SEQUENCE

TEST # 23 - TEST CLOCK REPEATABILITY

'-.'t't't'ttttttttttt'ttt.""'tttttfittt!t'tttttttttttttttttttt't.t

TeTEST 23

TEST CLOCK REPEATABILITY

".'"'ttt!'t'tttltt.tit""'tt!t'!ttttttttt"tttttttttttttttttttt'

007222
2624 007224
007230
007232
007240
Sggg 007242

000004
005737
001467
032777
001063
042777

2627 007250
2628 007252
2629 007256
2630 007260
2631 007264
2632 007270
2633 007272
2634 007276
2635 0C7302

005000
012701
005002
005077
105777
100375
005077
105777
100003

2637 007306
2638 007312
2639 007314
2640 007316
2641 007320
2642 007322
2643 007326
2644 007330
2645 007334
2646 007336
2647 007340
2648 007342
2649 007350
2650 007352
2651
2652 007356
2653 007360
§2§§ 007364

005077
005200
001370
005201
001003
010237
000753
013701
160201
100001
005401
032737
001403
020127

2636 007304

005202

000402

000100

171600

000100

173424

177777

28:

173376
173372

002336
002336

000001

003002

000002

2656 007366

010237

002616

2659 007374
2660 007402
2661 007404

032777
001402
000137

000020
014326

SCOPE
ST
BEQ
BIT
BNE
BIC

CTSTFL
TST24
#B1T6,aSWR
15724
#B1T6,aLKS

;1S CONSOLE UNDER TEST?
“IF NOT, SKIP THIS TEST
“ARE LINE CLOCK TESTS INHIBITED?
YIF YES, SKIP THIS TEST
*DISALLOW INTERRUPTS

CLR
MOV
CLR
CLR
TSTB
8PL
CLR
TSTR
8PL

RO
¥-1,R1
R2
aLks
aLKS
2
ALKS
@LKS
49

:CLEAR A TIMER
“SET A FLAG INDICATING FIRST PASS THRU THIS LOOP
*CLEAR CLOCK COUNTER
*CLEAR DONE
*SYNC ON DONE

INC

173362

000001

104053

1$:

173410
173404

020127
003403

Sggg 007372

7ST23:

002626

6$:
7%

5$:

;IF DONE, INCREMENT CLOCK COUNT

BLE

CMP

R1,41
5%

*CLEAR DONE
- INCREMENT TIMER
*BR IF TIME REMAINS
*INCREMENT LOOP PASS FLAG
‘BR If TwO PASSES HAVE BEEN MADE
“IF NOT, STORE FIRST CLOCK COUNT
:DO LOOP AGAIN
"RECALL FIRST CLOCK COUNT
" ALCULATE DIFFERENCE OF TWO COUNTS
“IF POSITIVE,SKIP NEGATION OF DIFFERENCE
‘MAKE DIFFERENCE A POSITIVE NUMBER
taw IS THIS A 11744
tee NO
‘e YES: COMPARE DIFFERENCE WITH DESIRED
tax TOLERANCE OF 2
tae
" COMPARE DIFSERENCE WITH DESIRED TOLFRANCE
‘BR, IF LOWER/EQUAL TO TOLERANCE

MOV

R2,SECND

;STORE SECOND COUNT

BIT
BEQ
JMP

#B1T4,aSWR
1ST24
$EOP

;CLOCK TESTS ONLY?
*BR IF NOT
JELSE, JUMP TO END OF PASS ROUTINE

BR 7%

ERROR

171436

RZ2

CLR
aLKS
4$:
INC
RO
BNE
3s
INC
R1
BNE
CMPARE
MOV
R2.FIRST
BR
1$
CMPARE: MOV
FIRST,R1
sUB
R2.R1
BPL
TOLER
NEG
R1
TOLER:
BIT #BITO,FLAG4
BEQ 6%
CMP
R1, 42

;CLEAR DONE
*IS CLOCK DONE?
;BR IF NOT , TO INCREMENT TIMER

+53

*CLOCK REPEATABILITY ERROR

(ZOLDHO DL11=W 11/44 MFM SLU
TEST # 264 < TEST

THAT

XMIT

MACRC M1113

07-JuL-8]

INTERRUPTS ONLY WHEN ENABLED

2662

LSBTTL

15:03

N
S
50

PAGE

SEQUENCE

TEST # 24 - TEST THAT XMIT INTERRUPTS ONLY WHEN ENABLED

":t'.’tt'tittt.'fifi'fit't'.""ttt'*fifi"fit'fit*.'.tttt.'.'.tfit...'ti.

;*TEST 24

TEST

THAT

XMIT

INTERRUPTS ONLY WHEN ENABLED

.'.‘ti't*tt"ttfi"*fi‘ti'ti"t'fitttt".'Q'fitt'.'fit'.tt.tit"t.'t".'

007410
2663 007412
2664 007420
2665 007424
2666 007432
2667 007436
2668 007440
2669 007444
Sg;? 007446

000004
042777
017703
012777
105777
100375
004737
000140
000402

2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685

007450
007452

022626
104054

007454
007462
0C7470
007472
007474
007476
007500
007502
007504
007506
007514

012777
052777
000240
000240
000240
000240
104055
000401
022626
042777
010377

000100
173224
007450
173202

173220
173216

TST24:

;CLEAR TRANSMIT INTERRUPT ENABLE
sSAVE AMIT VECTOR
JPOINT XMIT VECTOR TO ERROR REPORT
;WAIT FOR DONE

#RIT6,aTCSR
9TVECT ,R3
428 ,dTVECT
aTCSR
1%
PC,WRPSW
.WORD
140
3$

2%:

CMP
ERROR

(SP)+,(SP)+
+54

JRESTORE SP AFTER INTERRUPT

3%:

MOV
BIS
NOP
NOP
NOP
NOP
ERROR
B8R
CMP
BIC
MOV

448, QTVECT
#B1T6,aTCSR

1%:

014502

007504
000100

000100
173130

173166
173150

173126

SCOPE
BIC
MOV
MOV
TST8
BPL
JSR

4%:
S%:

+55
5%
(SP)+, (SP)+
ABIT6,3TCSR
R3,aTVECT

JSET PSW TO PRIORITY 3

JXMIT INTERRUPTS WITH INTERRUPT ENABLE (LEAR
SET XMIT VECTOR TO END OF TEST
;ENABLE INTERRUPTS
sALLOW
;TIME
:FOR
s INTERRUPT
JXMIT DID NOT INTERRUPT
;sBRANCH OVER STACK CORRECTION
JRESTORE SP AFTER INTERRUPT
sDISABLE INTERRUPTS
JRESTORE XMIT VECTOR

—

- (ZDLDHO DL11=-W 11/44 MFM SLU
TEST # 25 = TEST

THAT XMIT

MACRC M1113

07-JUL-81 15:03

INTERRUPTS DO NOT OCCUR WHEN DISABL

2¢86

.SBTTL

PAGE 51

SEQUENCE

TEST # 25 = TEST THAT XMIT INTERRUPTS DO NOT OCCUR WHEN DISABLED

.'"'t.""Qt"."Q"fl.Qt't"""'.iitttt.Q.tttfl"ttitt'tt.tt'tktt't

SHTEST 25

TEST

THAT

XMIT

INTERRUPTS DO NOT OCCUR WHEN DISABLED

""l"'.'...t't"fi.fi.'t.i"".tttfitt"tttt.t'"tfitttt'ttttttttttt'

007520
2687 007522
2688 007530
2689 007534
2690 007536
2691 007542
2692 007550
2693 007554
2694 007556
2695 007564
2696 007566
2697 007570
2698 007572
2699 007574

000004
042777
004737
000340
017703
012777
105777
100375
052777
000240
000240

022626
104056

2705
2706
2707
2708
2709
2710
2711
5;}%

012777
004737
000140
000240
000240
000240
000240
000402

007610
007616
007622
007624
007626
007630
007632
007634

2714 007636

2715 007640
2716
2717 007642

173110

173106
007576
173064

173100

000100

173054

TST25:

18:

000240
000240
000402

2701 007576
2702 007600
2703

2704 007602

000100
014502

042777

000100

007636
(014502

173032

MOV
MOV
TSTB
BPL
BIS
NOP
NOP

173002

;DISABLE INTERRUPTS
:SET PZW TO PRIORITY 7
;SAVE XMIT VECTOR
:POINT XMIT VECTOR TO ERROR REPORT
;WAIT FOR DONE
:ENABLE INTERRUPT
;ALLOW
;TIME
:FOR
s INTERRUPT
:CONTINUE TEST

2%:

CMP
ERROR

(SP)+,(SP)+
+56

;RESTGRE SP AFTER INTERRUPT

3$:

BIC

#B81T6,TCSR

:CLEAR INTERrUPT ENABLE

4%:

104057

#RITE,ATCSR
PC,wRPSW
.WORD
340
aTVECT,R3
#28 ,RTVECT
QTCSR
13
#B1T6,aTCSR

NOP
NOP
BR

MOV
JSR
NOP
NOP
NOP
NOP
BR

022626

010377

173030

SCOPE
BIC
JSR

cMP

#4$ ,TVECT
PC,WRPSW
.WORD
140

;XMIT INTERRUPTS AT FRIORITY-7

:POINT XMIT VECTOR TO ERROR REPORT
:5ET PSW TO PRIORITY 3

;ALLOW
s TIME
;FOR
: INTERRUPT
:BR TO END OF

TEST-NO INTERRUPT

ERROR

+57

(SP)+,(SP)+

;RESTORE SP AFTER INTERRUPT

MOV

R3,ATVECT

;XMIT INTERRUPT OCCURES WITH BIT6 CLEAR
:RESTORE XMIT VECTOR

—

MACRO M1113 07-JuL-81
CZDLDHO DL11=W 11/44 MFM SLU
, TEST # 26 = TEST TRANSMITTER FOR DOUBLE INTERRUPTS
2718

.SBTTL

15:03

c.6
PAGE 52

SEQUENCE

TEST # 26 ~ TEST TRANSMITTER FOR DOUBLE

INTERRUPTS

BE 2232222823322
20200222232
22222
0f0dtiRRRRRRRRRRRRR

T*TEST 26

TEST TRANSMITTER FOR DOUBLE

INTERRUPTS

'"'ttttttt'lfi"'tfitt'fi""t"'fi.fititttfitt't.tfi'fitttttQttfittt'.'t'

2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732 007732
2733
2734 007734
2735 007736
007740
2737 007742
2738 007750
2739 007754
2740 007756
2741 007760
2742 007762
2743 007764
2744 007766
2745 007774
2746
2747 007776
2748 010000
2749
2750 010002
2751 010006
2752

000004
042777
017703
017704
012777
012777

0C+737

000140

105777
100375

052777
000240
000240
000240
000240

000100
172766
172764
007740
000340
014502

172762

1%:
172714

104060

000401
022626
012777
004737
000140
000240
000240
000240

000240
042777
000402

007776
014502

000100

022626
104061

010377
010477

172642
172640

172700

SCOPE
BIC
MOV
MOV
MOV
MOV
JSR

172754
172750

172724

000100

T$7126:

2%:
25%:

172644

#RIT6,aTCSR

dTVECT ,R3

aTPSW, R4

#28 ,aTVECT

#340,aTPSW
PC.,WRPSW

.WORD

140

TSTB
BPL
BIS
NOP
NOP
NOP
NOP

aT(SR
1%
#B176,8TCSR

ERROR
BR
(MP

+60
25%

MOV

JSR
.WORD
NOP
NOP
NOP
NOP
BIC
BR

cMp
ERROR

5¢:

MOV
MOV

s CLEAR INTERRUPT ENABLE
sSAVE AMIT VECTOR
;SAVE XMIT PSW VECTOR
JSET UP XMIT VECTOR

JSET PIO 7 AFTER INTERRUPT
;SET PSW TO PRIORITY 3
JWAIT FOR DONE

;ENABLE INTERRUPTS
cALLOW
; TIME

.FOR

;. INTERRUPT

(SP)+,(SP)+
#6S ,ITVECT
PC,WRPSW
140

sXMIT

INTERRUPT DID NOT OCCUR

;BRANCH OVER STACK CORRECTION INTERRUPT
JRESTORE SP AFTER INTERRUPT
JPOINT XMIT VECTOR TO_ERROR

;SET PSW TO PRIORITY 3

JALLOW
;TIME

.FOR

#B8176,aTCSR
5%

JINTERRUPT
;DISABLE INTERRUPTS
JBR TO END OF TEST

(SP)+,(SP)+

JRESTORE

R3,QTVECT

JXMIT RE-INTERRUPTED
JRESTORE XMIT VECTOR

+61

R4 ,aTPSW

JRESTORE

SP AFTER

XMIT

INTERRUPT

PSW VECTOR

CZDLDHO DL11=-W 11/44 MFM SLU
TEST # 27 - TEST

THAT

XMIT

MACRO M1113

INTERRUPT

07-JUL-81

15:03

CLEARS WITH LOADING TBUF

LSBTTL

2753

PAGE

D_
6
53

SEQUENCE

TEST # 27 - TEST THAT XMIT INTERRUPT CLEARS WITH LOADING TBUF

'.'Q'titttttt't'tttfitttfi't""fi.t'ttt*.fit.'itttt'tttittttttttt't.t

S*TEST 27

TEST THAT XMIT INTERRUPT CLEARS WITH LOADING TBUF

.'.'Qttttfit*ttttt!'*'*t!t""tfit.!Qfitttt*tt.ttttt'*t't'tfittittt'ttt

010012
2754 010014
2755 010022
2756 010026
2757 010030
2758 010034
2759 010042
2760 010050
2761 010056
2762 010062
2763 010066
2764 010070
2765 010074
2766 010100
2767 010102
2768 010104
2769 010106
2770 010110
2771 010112
2772 010120
2773
2774 010122
2775 010124

000004
042777
004737
000340
017703
012777
052777
052777
005077
105777

2776 010132

104062

2777
2778 010134
2779
2780 010140
010142
010146
010150
010152
010154

100375

005077
004737
000140
000240
000240
000240
000240
042777
000405
022626
042777

010377
0050n"
012701
005300
001376
005301
001374

000100
014502
172614
010122
000004
000100
172560
172552

172616

TST27:

1726
172570

172562

1¢:

172546

000100

172520

000004

172526

000uC22

BIC
JSR
MOV
MOV
BIS
BIS
CLR

TSTB
BPL

CLR
JSR

014502

172510

SCOPE

NOP
NOP
NOP
NOP

BIC
BR
c$:

3$:

40%:

CMP

BIC

#RIT6,ITCSR
PC,wRPSW
.WORD
340
dTVECT ,R3

;DISABLE INTERRUPTS
JSET PSW TO PRIORITY 7

?;CSR

;JWAIT

#2$ ,aTVECT
#BIT2,aTCSR
#BIT6,RTCSR
aTBUF

;SAVE XMIT VECTOR
;POINT XMIT VECTOR TO ERROR
;** ENABLE MAINT. WRAP
JENABLE INTERRUPTS
;LOAD TBUF
FOR DONE

(INTERRUPT)

aTBUF
PC,WRPSW
.WORD
140

JFILL SECOND BUFFER TO PFSET
;ALLOW INTERRUPTS

#BI1T6,aTCSR

;DISABLE INTERRUPTS

(SP)+,(SP)+

H#BIT2,aCTCSR

INT.

SALLOW
s TIME
;FOR
s INTERRUPT

:BR TO END OF

TEST

JRESTORE SP AFTER INTERRUPT

s*+ DISABLE MAINTENANCE MODE FOR

s** CONSOLE TO ALLOW FOR COMMUNICATION
;** WITH

TERMINAL.

ERROR

+62

MOV

R3,aTVECT

;LOADING TBUF DID NOT CLEAR INTERRUPT.
JRESTORE XMIT VECTCR

CLR
MOV

RO
#2,R1

sx* DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;** THAT MIGHT BE IN THE PROCESS OF BEING

BNE
DEC
BNE

40%
R1
40$

DEC

;**

TRANSMITTED TO FINISH BEFORE MAINTENANCE

;** WRAP FOR THE UART UNDER TEST IS DISABLED.
s*+ THIS WILL INHIBIT ANY COMMUNICATION
;** TO HARDWARE MED]A SUCH AS TUS8 THAT MIGHT

;v* BE ATTACHED TO UART UNDER TEST.

p—

(ZDLDHO DL11=Ww 11/44 MFM SLU
TEST # 30 = TEST

MACRO M1113

07-JuL-81

THAT RCVR ACTIVE & DONE SET & CLEAR

2781

.SBTTL

15:03

PAGE

SEQUENCE

TEST # 30 ~ TEST THAT RCVR ACTIVE & DONE SET & CLEAR

':ttt'tt".'Qt'tt't'i"'itttttlttt'tfi*fiQttitl*tflttttttt'ttQtOtt.t

LRTEST 30

TEST

THAT RCVR ACTIVE

& DONE

SET & CLEAR

'°"'tl*ttt'tfi""'*ttt"t"ttti'tt'it"'tttt't'tQt'tt'tt"'ttt'tt'

010170
010172
2786 010200
010202

2787
2788
2789

2791
2792
2793

010206
010212
010214
010216
010220
010222
010224
010230
010236
010240
010242
010244

105777

00530C
001374
005301

001372
005000
005077
032777
001006
005200
001372
042777

000001

003002

000004

172440

TST30:

BIS

000002
42%:

000004

172376

WACTV:

#IT2,aTCSR

RO
#2,R1

TST8
DEC
BNE
DEC
BNE

aRBUF
RO
423
R1
423
RO
aTBUF
#81T11,3RCSR

CLR
CLR
BIT
BNE
INC

BNE
8IC

172406

MRITO,FLAGSLS
RCVDON

CLR

MOV

172424

172412
004000

SCOPE
BIT
BNE
RESET

WACTV

#B1T2,aCTCSR

:t'
;tt

sCLEAR EVERYTHING
sSET MAINTENANCE WRAP
;** DELAY ENOUGH TIME TO ALLOW ANY (CHARACTERS
;*v THAT MIGHT BE IN THE PROCESS OF BEING
;** RECEIVED TO FINISH AFTER MAINTENANCE
;** WRAP FOR THE UART UNDER TEST [> ENABLED.

010166

000004
032737
001067
000005
052777
005000
012701

Sevs 0.0,

010156
010160

;** READ
b

* KK
kN

;tt

;CLEAR A TIMER
sLOAD TRANSMIT BUFFER
JTEST RCVR ACTIVE BIT
;sBR IF SET
s INCREMENT TIMER IF NOT SET
JCONTINUE WAIT IF TIME REMAINS
;** DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
;*x WITH

2794
2795 010252

104063

2797 010254
010254
010256
010262
010264
010266
010270

005000
012701
005300
001376
005301
001374

2%:
000002

40%:

ERROR

+63

CLR
MOV
DEC
BNE
DEC
BNE

22 ,R1

RO
40%
R1
40%

000005
032777
001401

004000

RESET

172332

104115

005000
052777
062700
005200
001374

3¢:

bR
B 4
bR
& 1

* %
* AR
84
R
8

DID NOT

SET WHILE RECEIVING

DELAY ENOUGH TIME

TO ALLOW ANY (HARA(CTERS

THAT MIGHT BE IN THE PROCESS OF BEING
TRANSMITTED TO FINISH BEFORE MAINTENANCE
WRAP FOR THE UART UNDER TEST IS DISABLED.
THIS WILL INHIBIT ANY COMMUNICATION

TO HARDWARE MEDIA SUCH AS TUS8 THAT MIGHT

BE ATTACHED TO UART UNDER TEST.

BIT
BEQ

#81711,3RCSR
3%

SJVERIFY “'INIT'" CLEARS RCV ACTIVE

ERROR

+115

JINIT DID NOT CLEAR RCV ACTIVE

CLR
BIS
ADD
INC

RO
#BIT2,dTCSR

;CLEAR A TIMER
;SET MAINTENANCE WRAP

BIT11,3RCSR

JVERIFY RCV ACTIVE STILL CLEAR
:BR IF CLEAR
;*~ DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION

000004
000000

172322

033777
001404

004000

172300

BIT

2812 010336

042777

000004

172314

BIC

#B1T2,aCTCSR

2813 010344
2814

104116

ERROR

+116

WwTl:

TERMINAL.

JRCVR ACTIVE

2798 010272
2799 010274
2800 010302
2801
2802 010204
2803
2804 010306
2805 010310
2806 010316
2807 010322
2808 010324
2809 010326
2810 010334
2811

TO CLEAR DONE

2782
2783
2786
2785

BEQ

#0,R0O
RO
wT

RCVDON

JWAIT AT LEAST ONE BIT

;v WITH

TERMINAL
.

TIME

;JRCV ACTIVE WITHOUT ''START'' BIT

MACRO M1113
07-JuL-81
Z DLDHO DL11=-W 11/44 MFM SLU
TEST
# 30 - TEST THAT RCVR ACTIVE & DONE SET £ CLEAR
3
2815 010346
2816 010354
2817 010356
2818 010362
2819 010366
2820 010370
2821 010372
2822 010374

052777
005000
005077

2823 010402

1040564

010404
010412
010414
010422
010424

032737

2824
2825
2826
2827
2828
2829
2830

2831 010432
2832
2833
2834 010434
2835 010436
2836 010442
2837

105777
100406

005200
001373
042777

001010
032777
001404
042777

000004

172264

172260
172246

000004

RCVDON:

BIS

:
WDONE

TST8B
BMI
INC
BNE
BIC

172256

000001

003002

004000

172212

000004

172226

5¢:

104065

000005

105777

172172

2838 010444

042777

000004

2839 01045¢
2840
2841
2842 010454
2843 C10454

164065

001404

042777

000004

6%:

172206

172176

CLR
CLR

15:03

#B1T72,aTCSR

RO
aTBUF
aR(SR

RO
WDONE
#3172,aCTCSR

ERROR

+64

BIT
BNE
BIT
BEQ
BI(

ggITO.FLAG44
121T11,8RCSR

ERROR

+65

RESET
TST8B

SEQUENCE

JSET MAINTENCE WRAP
;CLEAR TIMER
;LOAD TRANSMIT BUFFER
sCHECK FOR RECEIVER DONE
.BR, IF DONE
s INCREMENT TIMER, [F NOT DONE
JCONTINUE WAIT [F TIME REMAINS
s** DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
;** WITH TERMINAL.
JRECEIVER DONE

#BI1T2,8CTCSR

BEQ

aRCSR
7%

8I(

#BIT2,3CTCSR

ERROR

+66

BIC

#B1T2,aCTCSR

7%:

PAGE 54-1

ser

NEVFR

SET

1176422

;e* DO NOT EXECUTE THIS SECTION
JCHECK FOR RCVR ACTIVE CLEAR
;B8R, IF CLEAR
.+v DISABLE MAINTENANCE MODE FOR
Jx* CONSOLE TO ALLOW FOR COMMUNICAT]ION
;x* WITH

TERMINAL.

cRCVR ACTIVE

DID NOT

(LEAR WITH RCVR DONE

sCLEAR DONE WITH RESET
JCHECK FOR DONE CLEAR

;** DISABLE MAINTENANCE MODE FOR
c** CONSOLE TO ALLOW FOR COMMUNICATION

;*+ WITH TERMINAL.

JRESET

DID NOT

(CLEAR RCVR DONE

;** DISABLE MAINTENANCE MODE fOR
s** CONSOLE TO ALLOW FOR (OMMUNICATION
s*v WITH

TERMINAL.

CZDLDHO DL11=w 11/44 MFM SLU
TEST

# 31

= TEST

MACRO M1113

THAT READING RBUF

07-JuL=-81

CLEARS RECEIVER DONE

2844

.SRTTL
T

15:03

TEST # 31

G 6
PAGE 55

- TEST

THAT READING RBUF

RAN TR EAN R AN A RARANAANANT R AN

LeTEST 31

TEST

THAT

SEQUENCE

READING RBUF

N 2233222223022 22232022222228222302

T3131;

010462
284S 010464
<846 010466
2847 010474
010476

000004
000005
052777
005000
012701

000004

010502
010506
010510
010512
010514
010516
010522
010526
010530
010534

105777

17213C

005300
001374
005301
001372
005077
1057277
100375

172102
0000C4

105777

172066

001401

010552

00024C

42%:

172120
172106

SCOPE

RESET

8IS
(LR
MOV

00000¢

017700
042777

010542
010546
010550

172144

'%:

1ST8B
DEC
BNE
DEC
BNE

CLR

TSTR
BPL

MoV

172116

BIC
1818

BEQ
ERROR

104070
10%:

NOP

(LFARS RECEIVER DONE

RN ANANNANPRRNRNANAANARNNAANNTANPRNORADY

#IT2,3TCSR

RO
#2.R1

CLEARS RECEIVER DONE

2222232223222

222222232ZZ2RadZRaZs 2]

sCLEAR EVERYTHING
sSET MAINTENANCE WRAP
v~ DELAY ENOUGH TIME TO ALLOwW ANY (HARA(TERS
;**

THAT M]IGHT BE

THE

PROCESS OF

s**
;**

WRAP FOR THE UART UNDER
READ TO CLEAR DONE

BEING

s** RECEIVED TO FINISH AFTER MAINTENANCE

aRBUF
RO

TEST

ENABLED.

629
R1

42%

aTBUF
aR(SR
1%

aRBUF ,RO
#BIT2,aCTCSR
adR(SR
10%
+70

;tt
:tt

;LOAD TRANSMITTER
JWAIT

FOR RECEIVER DONE

JREAD RECEIVE BUFFER
;** DISABLE MAINTENANCE MODE FOR
s** CONSOLE TO ALLOW FOR COMMUNICATION

s** WITH

TERMINAL.

;CHECK FOR RECEIVE DONE CLEAR
;** BR, IF CLEAR TO NEXT TEST
JREADING RBUF

DID

NOT

CLEAR RCVR

DONE

CIDLDHO DLIT=w 11/44 MFM SLU
MACRO M1113 07-4UL-81 15:03
£
ST
a3 2 = TEST THAT RDR ENABLE CLEARS RECEIVER DONE FLAG

’859

.SBTTL

PAGE

TEST # 32 -~ TEST

SEQUENCE

THAT RDR ENABLE CLEARS RECEIVER DONE FLAG

'.'t"".'t...t"'i...'."'t.'.".Q'..".....'."..'.."".""'..

TeTEST 32

TEST

THAT

RDR ENABLE

C(LEARS RECEIVER DONE

FLAG

D I EAARARARA RSS2
R
2222222 dR 2] ]

010554
010556
010564
010566
010570
010576
010604
010606
010612
010616
010620
010622
010624
2866 010626
2867 010632
2868 010636
2869 010640
2870 010646
2871
2872 010650
2873
2874 010652
2875 010660
2876 010664
2877 010666

2878 010674
2879
2880 010676

000004

032737
001044
000005
052777
052777
005000
012701

000001

105777

172020

0053C0
001374
005301
001372
005077
105777
100375

03277
001401

000001
000004

003002

T$7132:

172036
172034

42%:

172010
171776

1¢:

171766

052777

000001

171754

001404
042777

000004

171764

171750

#31T70,3RCSR

TSTR

DEC
BNE
DEC
BNE
(LR
TSR
BPL

2%:

108

#MJT2,aTCSR

RO
42 ,R1

BRBUF
RO

«2$

R1
423
o TBUF
aR(SR
18

v
s*~

11744 77
YES DO NOT EXECUTE

;**

THAT M]GHT BE

;**
;**

WRAP FOR THE UART UNDER
READ TO (LEAR DONE

THIS

TEST

. CLEAR EVERYTHING
JSET RDR ENABLE
;SET MAINTENANCE WRAP
;** DELAY ENOUGH TIME TO ALLOW ANY (HARA(TERS
IN

THE

PROCESS OF

BEING

;** RECEIVED TO FINJSH AFTER MAINTENANCE
TEST

[S ENABLED.

)

]

bR
2

[

;LOAD TRANSMITTER
JwWAIT

FOR RECEIVER DONE

#B]T0,aRCSR
2%

sVERIFY RCV ACTIVE

ERROR

+117

;RDR ENASBLE

BIS

#3]1T0,aRCSR

BEQ

BIC

108
#B1T2,aCT(SR

;CLEAR DONE BY SETTING RDR ENABLE
sCHECK FOR DONE CLEAR
;*+ BR, IF CLEAR TO NEXT TEST
;** DISABLE MAINTENANCE MODE FOR
s** CONSOLE TO ALLOW FOR COMMUNICATION

ERROR

+67

BIT
BEQ

104067

000240

BIS
BIS
CLR
MOV

104117

105777

#RITO,FLAGLS
108

RESET

000002

000001

SCOPE

BIT
BNE

TSTB

aR(SR

;BR IF CLEAR

Jv* WITH

NOT

CLEARED RDR ENABL
E

CLEARED WwITH RCV ACTIVE

TERMINAL.

JSETTING RDR ENABLE

DID NOT

(LEAR RCVR DONE

(ZDLDHO DL11=w 11/44 MFM SLU

TEST & 33 - TEST

THAT RCVR

MACRQ M1113

07-JuL-81 15:03

INTERRUPTS ONLY WHEN ENABLED

2881

.SBTTL
S

010732

010736

010740
010742
010744
010746
010752
010760
010764
010766
010772
010776
011000

000002

105777

171700

005300
001374
0053C1
001372
017703
012777
004737
000140
005077
105777
100375
042777

011010
011010

042777

000004

»HONO

NNN
b
——

=2
b

~NNN

—

#MRIT6,aTCSR

RO
#2,R1

aTBUF
aRCSR
1%

wVion

el
—

000004

042777

3s:

;SET MAINTENANCE WRAP
;** DELAY ENOUGH TIME TO ALLOW ANY (HARA(TERS
THAT MIGHT BE

THE

PROCESS OF

BEING

b8
b

140

#BIT2,aCTCSR

2%:

sDISABLE TRANSMIT INTERRUPTS
;DISAR_E RECEIVER INTERRUPTS
;**

#2% ,3RVECT
PC.,WRPSW

171652

171642

INTERRUPTS ONLY WHEN ENABLED

;** RECEIVED TO FINISH AFTER MAINTENANCE
;#* WRAP FOR THE UART UNDER TEST IS ENABLED.
;#« READ TO CLEAR DONE

429
aRVECT ,R3

1%:

—
b

011060
000100

BIC

#BIT2,aCTCSR

ERROR

(SP) +,(SP)+
+71
#4% ,aRVECT
#B1T6,aRCSR

“SAVE RECEIVE VECTOR

*POINT RCV VECTOR TO ERROR REPORT

“SET PSW TO PRIORITY 3
;SEND A CHARACTER
;WAIT

FOR RECEIVER DONE

;** DISABLE MAINTENANCE MODE FOR

;** CONSOLE TO ALLOW FOR COMMUNICATION
;** WITH

TERMINAL.

;CONTINUE TEST

;** DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
J** WITH TERMINAL.
JRESTORE SP AFTER INTERRUFPT

JRECEIVER INTERRPUTS WITH INT. ENABLE CLEAR
JPOINT RCV VECTOR

TO END OF

ENABLE RCV INTERRUPTS
» GIVE ANY INTERRUPTS TIME

TEST

.** GIVE ANY INTERRUPTS TIME
;*~ GIVE ANY INTERRUPTS TIME
171604

104072
000401

010377

RCVR

#3116,aRCSR
#31T2,aTC(SR

.WORD

#B1T2,aCTCSR

000100
000004
171542

+72

1544
1562

LEEIR

OoONOON
N

O
o

2913 011076

THAT

012777
052777
000240

022626
042777
042777

TEST

ARBUF
RO
429
R1

71664

—

g
Guur
G
G
G
Py Qi
R

b el —b

X
R
e

e
—

42%:

104071

000240
000240
000240

SCOPE
BIC
BIC
BIS
MoV

171650
171636

000004

15133:

CLR

17 1672
011010
014502

8222222202222 20RiER2RRRRdRRRRRRRRRRSRRRRRRRR
R

23322332202020228220220202KFR22R22
20
RRRRdittfRdRRtRRARARRlA

022626

OOOOOO0O0C

—

000405

2912

000100
000100
000004

012701

011006

OOOOO

2908

000004
042777
042777
052777
005000

—_—

010700
2882 010702
2883 0107210
010716
2885 010724
010726

SEQUENCE

TEST # 33 = TEST THAT R{VR INTERRUPTTMS ONLY WHEN ENABLED

2222222323222

S*TEST 33
e

[_6
PAGE 57

4%:

(SP)+,(SP)+
#MIT6,dRCSR

#MIT2,aCTCSR
R3,IRVECT

;*« GIVE ANY INTERRUPTS TIME
;** DISABLE MAINTENANCE MODE fOR
;** (ONSOLE TO ALLOW FOR COMMUNICATION

s+ WITH TERMINAL.

JRCVR DID NOT INTERRUPT
;BRANCH OVER STACK CORRECTION
JRESTORE SP AFTER INTERRUPT
;DISABLE INTERRUPTS
;*~ DISABLE MAINTENANCE MODE FOR

s** CONSOLE TO ALLOW FOR COMMUNICATION

tee WITH TERMINAL
.

:RESTORE RECEIVE

VECTOR

CZOLDHO DL11=w 11/44 MFM SLU
TEST # 34 =

TEST

THAT RCVR

MACRO M1113

07-JuL-81

INTERRUPTS DC NOT OCCUR WHEN DISABL

2914

.SBTTL
a2l

2945 011264

2946
2947 011266
2948 011266

2949 011274
2950 011276
2951
2952 011300

000004

000005
004737
000340
017703
012777
052777
005000
012701

105777
005300
001374
005301
001372

014502
171524

011216
000004
060002

2Rl

TEST

THAT

RCVR

’2%:

171470

167666

6%:

005077

171452
171440

1%:

052777
000240
000240
000240
000240
000405

000100

042777

000004

105777
100375

1714630

171434

2%:

022626
000100
011266
014502

000004

104073

042777
012777
004737
000140
000240
000240
042777

1376
1400

171374

000405

042777

000004

171364

104074

171340

JSR

PC,wWRPSW

MOV
MOV

#2% ,3RVECT

5%:

.WORD
340
aRVECT,R3

8IS
CLR

#MIT2,aTCSR
RO

TSTR
DEC
BNE
DEC
BNE

ARBUF
RO
42%
Ri

TSTB

BPL

CLR

T1STB
BPL
BIS
NOP
NOP
NOP

#2.R1

RS2

R2RRRRRRRRRRR

INTERRUPTS DO NOT OCCUR WHEN DISABLED

42%
a$TPS
6%

"'!'

aTBUF
aRCSR
1%
#B1T6,aRCSR

#BIT2,aCTCSR

CMP
ERROR

(SP)+,(SP)+

+73

#31T6,8RCSR

#4S ,IRVECT
PC,WRPSW

.WORD

sxx THAT MIGHT BE [N THE PROCESS OF BEING
;*#* RECEIVED TO FINISH AFTER MAINTENANCE
;** WRAP FOR THE UART UNDER TEST IS ENABLED.
;** READ TO CLEAR DONE
* AR

BIC

;SAVE RECEIVE VECTOR
JPOINT RCVR VECTOR TO ERROR REPORT
;SET MAINTENANCE WRAP
;*~ DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

MR8

MOV
JSR

;CLEAR EVERYTHING
JSET PSW TO PRIORITY 7

bR
A 4

NOP
BR

140

NOP
NOP
BIC

#BIT2,dCTCSR

4%:

022626

010377

SCOPE

RESET

MoV

gOV\J\I% OSNIONESNVOONNY
oo

11226

18734

—

WWNIN) = —

POPNOPNONUNININ)
= 2 D
D b
a0
—
b
b
b —d
[0 YV IV, IV, IV, ¥ N N

d e
wmd

Qs G

SEQUENCE

':'tt't'i't'."l'fi"fi.fi'fit't'ttfit'i'.'tttttlttttttttt!tfit"'t'ti'

Jaur Qi

— e

Gunr Ganry

c9ooogdog
3=
)

d ad

D
e
e
)
d

b e—d

e
d
d
)

e
d i
D

) i
—

id e

d —ed

ed mad e

2935
2936
2937
2938
2939
2940
2941
2942
2943
2944

—

2931
2932
2933
2934

ed e

elololeolalolololololololelalololole]

2924
2925
2926
2927
2928
2629
<930

J
6
PAGE 58

TEST # 34 - TEST THAT RCVR INTERRUPTTMS DO NOT OCCUR WHEN DISABLED

A4 AR

TRTEST 34

2922

15:03

#31T2,’aCTCSR
(MP
ERROR

+74

MOV

R3,aRVECT

(SP)+,(SP)+

JTEST

FOR XMIT

READY

JWAIT

FOR RECEIVER DONE

sLOOP IF NOT
;SEND A CHARACTER

sENABLE INTERRUPTS
;** GIVE TIME FOR INTERRUPT
;** GIVE TIME FOR INTERRUPT
;** GIVE TIME FOR INTERRUPT
;*~ GIVE TIME FOR INTERRUPT
;CONTINUE TEST
s*x DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
s*x WITH TERMINAL.

sRESTORE SP AFTER INTERRUPT

JRCVR INTERRUPTS AT PRIORITY 7
;CLEAR INTERRUPT ENABLE
sPOINT RCVR VECTOR TO_ERROR REPORT

;SET PSW TO PRIORITY 3

;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
s*~ DISABLE MAINTENANCE MODE FOR
;%% CONSOLE TO ALLOW FOR COMMUNICATION
J** WITH TERMINAL.
;sBR TO END OF TEST, IF NO INTERRUPT
;** DISABLE MAINTENANCE MODE FOR
s** (ONSOLE TO ALLOW FOR COMMUNICATION

;** WITH

TERMINAL.

JRESTORE SP AFTER INTERRUPT

;RCVR

INTERRUPT

REQUEST

JRESTORE RECEIVE VECTOR

PASSED WITH BIT6 (LEAR

CZDLDHO DL11=w 11/44 MFM SLU

MACRO M1113

CTEST # 35 = TEST RECEIVER FOR DOUBLE

Q7-JuL-81 15:03

INTERRUPTS

2953

LSBTTL

PAGE 59

SEQUENCE

TEST # 35 - T"EST RECEIVER FOR DOUBLE INTERRUPTS

.'"'tfit'tttttttttt'tti"Q"'i't...l!."..'Q".'."".'....'....'..

;*TEST 35

TEST RECEIVER FOR DOUBLE

INTERRUPTS

""ttttt't'.ttttttlttttt"'tttttttQ."t.t'.'!.".""..."'.""..

011304
2956 011306
2955 011310
2956 011314
2957 011320
2958 011326
2959 011334
2960 011340
2961 011342
2962 011350
011352

000004
000005
017703
017704
012777
012777
004737
000140
052777
005000
012701

011356
011362
011364
011366
011370
011372
011376
011402
011404

105777
005300
001374
005301
001372
005077
105777
100375
042777

2967 011412
2968 011420
2969 011422
2970 011424

052777
000240
000240
000240

2963
2964
2965
2966

Sg;} 011426

2973 011430
2974 011432
2975 011434
2976 011436
2977 011444
2978 011450
2979 011452
2980 011454
2981 011456
2982 011460

2983 011462

2984 011470
2985 011474
Sggg 011500

2988 011502
2989 011504
2990
2991

011506

TST35:

171330
171326
011434
0030340
014502
0000046

171316
171312
171270

BIS
CLR
Mov

000002
171254

62%:

171244
171232

1%:

000004

171246

000100

171214

000240

004737
000140
000240
000240
000240
000240

042777

010377
010477
000402

RO
#2 ,R1

TST8
DEC
BNE
DEC
BNE
CLR
1STB
BPL
BIC

ARBUF
RO
42%

BIS
NOP
NOP
NOP

#B176,aRCSR

ERROR

011502

014502

000100

171150
171146

022626
104076
010377

dRVECT ,R3
aRPSW R4
#2% ,ARVECT
#340,3RPSW
PC,WRPSW
.WORD
140
#B1T2,aT(SR

R1
42%
aTBUF
aR(SR
1%
#BIT2,aCTCSR

NOP

104075

000401
022626
012777

SCOPE
RESET
MOV
MOV
MOV
Mov
JSR

171132

171200

2%:
25%:

B8R
CMP
MoV

JSR
.WORD

NOP
NOP
NOP
NOP

171144

;SET MAINTENANCE WRAP
;** DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
s~ THAT MIGHT BE IN THE PROCESS OF BEING
;%% RECEIVED TO FINISH AFTER MAINTENANCE
;** WRAP FOR THE UART UNDER TEST [S ENABLED.
;*~ READ TO CLEAR DONE
M
M

Jaw
Ml
JSEND A CHARACTER
JWAIT FOR RCVR DONE

s+~ DISABLE MAINTENANCE MODE FOR
s** CONSOLE TO ALLOW FOR COMMUNICATION
J*~ WITH TERMINAL.
JENABLE RCV INTERRUPTS
;*x GIVE SOME TIME
;*~ GIJVE SOME TIME
;%% GIVE SOME TIME
;%% GIVE SOME TIME

+75

25%
(SP)+,(SP)+
#3% ,@RVECT

P(C,WRPSW
140

8I1C

#BI1T6,aRCSR

3$:

cmMp
ERROR

(SP)+,(SP)+
+76

49:

MOv

R3,aRVECT

MOV
MOv
BR

;CLEAR EVERYTHING
;SAVE RECEIVE VECTOR
sSAVE RECEIVE PSW VECTOR
JPOINT RCV VECTOR TO CONTINUE TEST
;SET PRIORITY TO 7 AFTER INTERRUPT
;SET PSW TO PRIORITY 3

R3,aRVECT
R4, 3RPSW
4%

JRCVR INTERRUPT DID NOT OCCUR
sBRANCH OVER STACK CORRECTION
JRESTORE SP AFTER INTERRUPT
;POINT RCV VECTOR TO ERROR REPORT
JRESET PSW TO PRIORITY 3
;**
;*x
J*x*
;%%

GIVE
GIVE
GIVE
GIVE

SOME
SOME
SOME
SOME

TIME
TIME
TIME
TIME

;CLEAR INTERRUPT ENABLE

JRESTORE RECEIVE VECTOR
SRESTORE RECEIVE PSW VECTOR
;BR TO END OF TEST

JRESTORE SP AFTER INTERRUPT
;RECEIVER RE=-INTERRUPTED
JRESTORE RECEIVE VECTOR

CZDLDHO DL11-W 11/44 MFM SLU
TEST # 36 - TEST

THAT RCVR

MACRO M1113

07-JUL-81 15:03

INTERRUPT CLEARS BY READING RBUF

2992

.SBTTL

PAGE 60

SEQUENCE

TEST # 36 = TEST THAT RCVR INTERRUPT CLEARS BY READING RBUF

:"tt"'.**"!"'fit*fifit'."tt'tfi'itttfifiittittttttfit'iittt*tfi't't't

SRTEST 36

TEST THAT RCVR INTERRUPT CLEARS BY READING RBUF

.'.‘tt*tfi*t'ttttt!’tt*ttfit"'ttt'ttfitt"t*'fitt'tt*fitti*fittttttt.tt*tt

011512
2993 011514

000004
000005

2995 011522

000340

2994 011516

2996 011524
2997
2998
2999
3000

011530
011536
011544
011552
011554
011560
011564

004737

017703

TST36:

014502

171114

012777
052777
052777
005000
012701

011646
000100
000006

105777
005300

171052

001374
005301
001372
005077
105777

171042
171030

3004 011606

042777

000006

3005
3006
3007
3008
3009
3010
3011
3012

011614
011620
011624
011626
011630
011632
011634
011636

005777
004737
000140
000240
000240
000240
000240
042777

3015 011646
%8}9 011650

022626
104077

3018 011652

010377

3003 011604

;8;2 011644

100375

000402

JSR

MOV

171106
171070
171066

000002

011566
011570
011572
3001 011574
3002 011600

SCOPE
RESET

42%:

LWORD

; CLEAR EVERYTHING
340

SRVECT,R3

MOV
BIS
BIS
CLR
MOV

#2$ ,BRVECT
#BIT6,3RCSR
#BIT2.QTCSR
RO
#2.R1

TSTB
DEC

@RBUF
RO

BNE
DEC
BNE
CLR
TSTB

B8PL

428
R1
42%
aTBUF
@RCSR

*SET PSW PRIORITY TO 7

:SAVE RECEIVE VECTOR

:POINT RCV VECTOR TO ERROR REPORT
*SET RCVR INTERRUPT ENABLE
*SET MAINTENANCE WRAP
tx* DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
ixx THAT MIGHT BE IN THE PROCESS OF BEING
ixx RECEIVED TO FINISH AFTER MAINTENANCE
‘xx WRAP FOR THE UART UNDER TEST

i«x READ TO CLEAR DONE
e

IS ENABLED.

P
tax
Jxx
*SEND A CHARACTER
:WAIT FOR DONE (INTERRUPT)

BIC

#BIT2,8CTCSR

171016
014502

ST
JSR

000100

NOP
NOP
NOP
NOP
BIC

ARBUF
PC , WRPSW
.WORD
140

#BIT6,RCSR

;%%
Txx
ixx
Txx
*NO

2%:

(MP
ERROR

(SP)+,(SP)+
+77

;RESTORE SP AFTER INTERRUPT
*READING RBUF DID NOT CLEAR INTERRUPT

3s:

MOV

R3,3RVECT

;RESTORE RECEIVE VECTOR

170766

171044

PC,WRPSW

170770

B8R

;+* DISABLE MAINTENANCE MODE FOR
ix« CONSOLE TO ALLOW FOR COMMUNICATION
Pxx WITH

TERMINAL.

*READ RBUF TO CLEAR PENDING INTERRPUT
:SET PSW TO PRIORITY 3
ALLOW TIME FOR ANY ERRONEOUS
ALLOW TIME FOR ANY ERRONEOUS
ALLOW TIME FOR ANY ERRONEOUS
ALLOW TIME FOR ANY ERRONEOUS
INTERRUPT-CLEAR INT. ENABLE

;DPMO02

INTERRUPT
INTERRUPT
INTERRUPT
INTERRUPT

CZDLDHO DL11-w 11/44 MFM SLU

MACRO M1113

TEST # 37 = TEST THAT RESET CLEARS RECEIVE

3019

07-JUL-81 15:03

INTERRUPT

.SBTTL

PAGE 61

SEQUENCE

TEST # 37 - TEST THAT RESET CLEARS RECEIVE INTERRUPT

;:ttitt'*tfittfittfitttt*t.'itttttt't*ttttttfittfi*ttttfitfit.ttttitittt

;*TEST 37

TEST THAT RESET CLEARS RECEIVE

INTERRUPT

".'*tttfitt'ttitt.tfitktfit"Q'*'tittQtt.t'*tttfififittt*ttt"tttt'*t'.t

011656
3020 011660

3021 011662
3022 011666
3023 011670
3024 011674
3025 011702
3026 011710
3027 011716
011720
011724

011730
011732
011734
011736

3028 011740
3029 011746
3030 011752

000004
000005

004737
000340
017703
012777
052777
052777
005000
012701

TST37:

014502

170750

012004
000100
000004

170706

012777
105777

000377
170662

100375

3031 011754
3032 011756
3033 011762
3034 011764
3035 011766
3036 011770
3037 011772
\3038 011774
3039 012002

000005
004737
000140
000240
000240
000240
000240
042777
000402

3042 012004
%822 012006

022626
104100

3045 012010

010377

JSR

MOV
MOV
BIS
BIS

170742
170724
170722

CLR
MOV

000002

105777

005300
001374
005301
001372

42%:

170674

1%:

170630

TSTB

aARBUF

RO
42%
R1
42%

BPL

MOV
TSTB

NOP
NOP
NOP
NOP
81C
BR

170632

PC,WRPSW
.WORD
340
RVECT ,R3
#28 ,aRVECT
#B176,3RCSR
#B1T2,aTCSR
RO
#2,R1

DEC
BNE
DEC
BNE

RESET
JSR

014502

000100

SCOPE
RESET

#377 ,aTBUF
aRCSR
PC ,WRPSW
.WORD
140

;CLEAR EVERYTHING

JSET PSW TO PRIORITY 7

;SAVE RECEIVE VECTOR
sPOINT RCV VECTOR TO ERROR REPORT
sSET RCV INTERRUPT ENABLE
;SET MAINTENANCE WRAP

;%% DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;*% THAT MIGHT BE IN THE PROCESS OF BEING
J*~ RECEIVED TO FINISH AFTER MAINTENANCE
s*%x WRAP FOR THE UART UNDER TEST

;** READ TO CLEAR DONE

IS ENABLED.

bk
Jx*
JEx
SN

;SEND AN ALL 1'S CHARACTER
JWAIT FOR RCV DONE
;CLEAR RCV INTERRUPT & RBUF
;SET PSW TO PRIORITY 3

#B1T6,aRCSR
3%

J*% ALLOW TIME FOR AN ERRONEOUS
J** ALLOW TIME FOR AN ERRONEOUS
;** ALLOW TIME FOR AN ERRONEOUS
;*% ALLOW TIME FOP AN ERRONEOUS
;NO INTERRUPT~CLEAR INT. ENABLE
;CONTINUE TEST

INTERRUPT
INTERRUPT
INTERRUPT
INTERRUPT

2%:

CMP
ERROR

(SP)+,(SP)+
+100

JRESTORE SP AFTER INTERRUPT
JRESET DID NOT CLEAR RCVR INTERRUPT

3%:

MOV

R3,aRVECT

JRESTORE RECEIVE VECTOR

CZDLDHO DL11=W 11/44 MFM SLU
TEST # 40 ~ TEST

THAT

THE

MACRO M1113

07-JuUL-81

"OR'' ERROR & 'ERROR'' CAN BE

.SRTTL

15:03

SET

PAGE 62

TEST # 40 - TEST THAT

SEQUENCE

THE 'OR’’ ERROR £ 'ERRORP’’' CAN BE SET

:.'Qttttttt'tttttttttttttitttttttttttttttttfittttttt*tt'ttttttttttt

:*TEST 40

TEST THAT

THE 'OR''

ERROR & 'ERROR'' CAN BE SET

'-.-tttttttttttttttttttttt'tttttttt'ttt" \§ 8323223222332

012014
30647 012016
3048 012024

000004
032777
001465

3050 012034

001407

3049 012026
%82% 012036

002000

167014

032737

0000017

003002

005737

002624

TST40:

SCOPE
BIT
BEQ

#RIT10,aSWR
TST41

;1S THIS TEST ENABLED
;IF NOT ENABLED, BR TO NEXT TEST

BEQ

;x* NO

BIT
TST

#81T0,FLAG4LS
CTSTFL

(v IS THIS A 11/44

Ja% gfa THIS IS 11/44.
.

3053 012042
3054 012044

001404
032777

012052
012054
012056
012064

001452
000005
052777
005000

3055
3056
3057
3058
3059

3060
3061
3062
3063
3064
3065

012066

012072
012076
012100
012102
012104
012106
012112
012116
012122
012124
012126

3066 012130

000010

000004

105777
005300
001374
005301
001372
012700
005077
105777
100375
005300
001371

170540

42%:

000003
170524
170516

1%:
2%:

042777

000004
040000

3072 012150

032777

100000

012156
012160

012162
012162
0121+
012170
012172
012174
012176

9% :

000002

032777
001001
104101

3073
3074
3075
3076
3077

170554

012701

3067 012136
3068 012144
3069 012146

%8;?

166766

001001
104102

005000
012701
005300
001376
005301
001374

9s
#B1T03,aSWR

BEQ
RESET
BIS
CLR

TST41

170472

170460

TSTB
DEC
BNE
DEC
BNE
MOV
CLR
TSTR
BPL
DEC
BNE

BIC

3$:

4%:
000002

BEQ
BIT

MOV

170522

40%:

322%22222222ZX2]

#BIT2,aTCSR
RO

#2,.R1

@RBUF
RO
42%
R1
42%
#3,R0
ATBUF
aTCSR
2%
RO
1%

#BIT2.,aCTCSR

BIT
BNE
ERROR

#B1T14,RBUF
3$
+101

BIT

H#BIT15,aRBUF

BNE
ERROR
CLR
MOV
DEC
BNE
DEC
BNF

1S THIS THE CONSOLE

;x* NO
;%% THIS IS THE CONSOLE SLU.SHOULD THE OVERRUN

%% ERROR TEST BE PERFORMED
%% NO
:CLEAR EVERYTHING
:SET MAINTENANCE WRAP
;x* DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

;** THAT MIGHT BE IN THE PROCESS OF BEING
;%* RECEIVED TO FINISH AFTER MAINTENANCE
:x*

WRAP FOR

THE

UART

UNDER

TEST

;** READ TO CLEAR DONE
Jaw
Jaw
Jaw
Jaw
;SET CHARACTER COUNT TO SEND 3 CHAR.
:LOAD TRANSMIT BUFFER
;WAIT FOR TRANSMIT DONE

ENABLED.

:DECREMENT CHARACTER COUNT
:BR IF ALL CHARACTERS NOT TRANSMITTED

:x* DISABLE MAINTENANCE MODE FOR

;%% CONSOLE TO ALLOW FOR COMMUNICATION

;xx WITH TERMINAL.

;TEST FOR "OR'' ERROR FLAG
:BR, IF SET

;"OR'* ERROR +LAG DID NOT SET
:TEST "ERRUR'' FLAG

4%
+102

;BR,

IF SET

RO
#2.R1
RO
40%
R1
40%

;**
;*~
;x*
;%
;*x
;*~

DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
THAT MIGHT BE IN THE PROCESS OF BEING
TRANSMITTED TO FINISH BEFORE MAINTENANCE
WRAP FOR THE UART UNDER TEST IS DISABLED.
THIS WILL INHIBIT ANY COMMUNICATION
TO HARDWARE MEDIA SUCH AS TUS8 THAT MIGHT

* kR

:"ERROR'* FLAG DID NOT SET WITH 'OR'' FLAG

ATTACHED

TO LART UNDER

TEST.

—

MACRO M1113 07-JuUL-81
CZOLDHO DL11=W 11/44 MFM SLU
TEST # 41 - TEST THAT BREAK TRANSMITS ALL ZEROES
.SBTTL

TEST # 41

170354

170370

9%:

BEQ
BIT

#BIT03,aSWR

BEQ

TST42

RESET
BIS

CLR

000002

MOV

#BIT2,aTCSR

RO
#2.R1

105777

166602

012256
012262
012264
012266
012270
012272
012300
012304
012306
012312
012320
012322
012330
012332
012334

000010

TST

s W

012336
012344

0605300
001374
005301
001372
012777
105777
100375
005077
052777
005000
117737
100411

177777
170330

170342

170324
000001

170320

170306

001026

aRBUF
RO
42%
R1

428

#-1,9TBUF
aRCSR
1%

1%:

aRBUF

A#BITO,3TCSR
RO
IRCSR, $BDDAT
CONT41

2%:

005200
001372
042777
042777

000001
000004

#BIT0,aTCSR
#RI1T2,aCTCSR

170274

170306

012352
012354
012360
012362
012370

105777
001407

042777
042777

170256

000001
000004

CONT4:
170250

170262

TSTB

aRBUF

BEQ
BIC

BIC

3%
#BI170,3TCSR
#BIT2,3CTCSR

sTRANSMIT ALL ONES TO RCVR
JWAIT FOR RCVR DONE

;CLEAR DONE

;CLEAR A TIMER

;WAIT FOR RCVR DONE
.BR IF DONE
JIF NOT, INCREMENT TIMER

.BR IF

000001
000004

170232
170244

3%:

BIT

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

WITH TERMINAL.

;BREAK DID NOT TRANSMIT ANYTHING
;CHECK RECEIVE BUFFER FOR ZERO
;BR, IF ZERO
;CLEAR BREAK BIT
Nk

042777
042777

TIME REMAINS

;CLEAR BREAK

* A%

012400
012406

(LEAVING ALL ONES IN RBUF)

;s TRANSMIT BREAK

104103

TO CLEAR DONE

c k%

012376

READ

* AR

+103

DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.

* %

ERROR

MR
& ]

)

104103

NO
YES THIS IS 11/44. IS THIS THE CONSOLE
SLU
NO
THIS IS THE CONSOLE SLU.SHOULD THE BREAK
TSST BE PERFORMED

sCLEAR EVERYTHING
;SET MAINTENANCE WRAP
b81

42%:

ZEROES

;IS BREAK FUNCTION TEST ENABLED?
;BR TO NEXT TEST, IF NOT ENABLED
b
IS THIS A 11/44
%

000004

002624

ARIT8,aSWR
TST42
#BITO,FLAGLS
9%
CTSTFL

BB BB B

001466
000005
052777
005000
012701

003002

SCOPE
BIT
BEQ
BIT
BEQ

012236
012240
012242
012250
012252

000001

1ST41:

TRANSMITS ALL

dR222002d 20RARSR2ARRSRRRSR
R

001404
032777

166630

THAT BREAK

012226
012230

000400

TEST

2222222222020

LR B

e |3 333222224822

000004
032777
001501
032737
001407
005737

- TEST THAT BREAK TRANSMITS ALL ZEROES

2332322222822 2222002222222
iR
RRRRRdRR Rl

SRTEST 41
012200
0122C2
012210
012212
012220
012222

SEQUENCE

»
»

B.7
PAGE 63

LTI
T
T
R
TR YRR ¥

3078

15:03

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

WITH TERMINAL.

ERROR

+103

;BREAK DID NOT TRANSMIT ALL ZEROES

BIC
BIC

#B110,aTCSR
#BIT2,aCTCSR

;CLEAR
KN

- kN

’

* NN

’

BREAK BIT

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

WITH

TERMINAL.

CZDLDHO DL11-W 11/44 MFM SLU

MACRO M1113

TEST & 42 -~ TEST THAT 'FR'' ERROR CAN BE

3116

07-JUL-81 15:03

SET DURING BREAK

JSBTTL

PAGE 64

SEQUENCE

TEST # 42 - TEST THAT '*FR'' ERROR CAN BE SET DURING BREAK

.'"*."*'t't"'t‘l’*'**t'""'"'tt'**l"t't.'fifi't'it't'*t'ttittt"i.

J*TEST 42

TEST THAT 'FR'' ERROR CAN BE SET DURING BREAK

""ttt'ttl'!ttti'tfl.*ti'tt'*t*"'i*fittttttfitt'tt'ttkfit.t"t't'QQ"t

012414
3117 012616
3118 0124264
3119 012426
3120 012434
3121 0126436
3122 012444
g%sz 012446

000004
032777
001464
032777
001460
032737
001407
005737

3125 012452
3126 012454
3127

001404
032777

3128 012462

3129 012464
3130 012466
3131 012474
012476

001445
000005
052777
005000

002000

166414

000400

166404

000001

003002

0026264
000010

000004

012701

000002

012502
012506
012510
012512
012514
3132 012516
3133 0125264
3134 012530
3135 012534
3136 012536
3137 012544

105777
005300
001374
005301
001372
052777
005077
105777
100375
042777
042777

170130

3138 012552

032777

3141 012562
3142
3143 012564
%}zg 012572

104104

%}28 012560

3146 012574
3147
3148 012576

001001

032777
001001

TST42:

166356

170144

9%:

SCOPE
BIT
BEQ
BIT
BEQ
BIT
BEQ
TST

#RIT10,SWR
TST43
#3]178,aSWR
TST43
#BITO,FLAGLS
9%
CTSTFL

;1S THE ''TEST ERROR FLAGS'' BIT SET
JBR TO NEXT TEST, IF NOT SET
;1S BREAK FUNCTION ENABLED
sBR TO NEXT TEST, IF NOT SET
Jxx IS THIS A 11744
;e NO
HLA EES THIS IS 11/44. IS THIS THE CONSOLE

BEQ
BIT

93
#R1T03,aSWR

BEQ
RESET
BIS
(LR

TST43

s+~ NO
;*% THIS IS THE CONSOLE SLU.SHOULD THE FRAME
;*% ERROR TEST BE PERFORMED

MOV

#2,R1

000001
170112
170100

170114

000001
000004

170074
170106

TSTB
DEC
BNE
DEC
BNE
BIS
CLR
TSTR
8PL
BIC
BIC

020000

170056

BIT

#B1T13,aRBUF

ERROR

+104

BIT
BNE

#B1T15,aRBUF
3%

ERROR

+114

100000

42%:

ABIT2,aTCSR
RO

1%:

170044

BNE

2%:

104114
3$:

aRBUF
RO
42%
R1
42%
#B1T0,aTCSR
a TBUF
aR(SR
1%
#B170,aTCSR
#81T2,aCTCSR

;** NO
;CLEAR EVERYTHING
JSET MAINTENANCE WRAP
;*% DELAY ENOUGH TIME TO ALLOW ANY (CHARACTERS
;»+ THAT MIGHT BE

IN THE PROCESS OF BEING

;%% RECEIVED TO FINISH AFTER MAINTENANCE

;** WRAP FOR

THE

UART UNDER

TEST

IS ENABLED.

;%% READ TO CLEAR DONE
Lk
Mo
SR
Jhw
s SEND BREAK
sTRANSMIT A CHARACTER TO TIME BREAK
;JWAIT FOR RCVR DONE
;CLEAR BREAK BIT
s~ DISABLE MAINTENANCE MODE FOR

;*x CONSOLE TO ALLOW FOR COMMUNICATION
s** WITH TERMINAL.
;CHECK FOR FRAMING ERROR FLAG
;BR,

SET

JBREAK DID NOT SET FRAMING ERROR
;TEST "ERROR'FLAG
;BR, IF SET

;"ERROR'' FLAG DID NOT SET WITH "OR'' FLAG

MACRO M1113

15:03

TO REC USING MAINT WRAP

LSETTL
SR

TEST # 43 - TEST DATA PATH FROM XMIT TO REC USING MAINT WRAP

A2 RARARSRRdR2RRRRRRR2R
2
2R
R2RRRdR 2]

SeTEST 43

TEST DATA PATH FROM XMIT

3322220330800l

000004

012600
012602

000005
052777

012610
012612

005000
012701

000002

012616
012622
012624
012626
012630
3157 012632
012634
012636
012644
012646
012652
012654
012660
012662
012666
012672
012674
012700
012704
012706
012710
012712
012714
012716
012722
012726

105777

170014

005300
001374
005301
001372
005001
105201
032737
001406

000004

000001

122701

000020

122701

000220

001770
001765
010177
105777
100375

017702
043701
020102
001003

105701
001411
000747

010137
010237
042777

012734

104105

012736
012736

042777

170030

003002

1¢%:

5%:
2%:

167754

167762
167736
001112

RESET
BIS

#B1T2,aTCSR

CLR

DEC
BNE
DEC
BNE
CLR
INCB
BIT
BEQ
CMPS
BEQ
CMPB
BEQ
MoV
TSTB
BPL
MOV

BIC
CMP
BNE

000004

167724

167714

]

s TRANSMIT A LiNARY COUNT PATTERN - UP
;TO THE BIT POSITION INDICATED BY THE

;CONTENTS OF LOCATION ‘‘SUSWR''

;*+ DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
s**

THAT MIGHT BE

THE PRGCESS OF

THE

UART

;*~ READ TO CLEAR DONE

BEING

UNDER

TEST

IS ENABLED.

s AN
c %R

*ww
3

#BITO,FLAGSLS
5%
#20,R1
1%
#220,R1
18
R1,aTBUF
aR(SR

2%
aRBUF ,R2
,R1
a¥8USWR
R1.R2

ERROR

+1095

BIC

ABIT2,aCTCSR

;CLEAR EVERYTHING
;SET MAINTENAMCE WRAP

;** WRAP FOR

MOV
MOV

BIC

4%:

]

;**~ RECEIVED TO FINISH AFTER MAINTENANCE

R1
4%
1%
R1,$GDDAT
R2,$8DDAT

BEQ
3%

#2,R1

TSTB

001024
001026
000004

SCOPE

MOV

42%:

TO REC USING MAINT WRAP

RdRtRsllRititii il

18743:

012576

SEQUENCE

#BIT2,a(CTCSR

:CLEAR REGISTER FOR TEST DATA
: INCREMENT THE TEST DATA
‘ex 11/44 CPU

3149

7
D
PAGE 65

‘wx

TEST ALL

DATA

-«x CHECK
FOR CONT-P IN TEST DATA
:ex DO NOT XMIT P

TEST # 43 - TEST DATA PATH FROM XMIT

07-JuL-81

.81

CZDLDHO DL11=W 11/44 MFM SLU

i*x DO NOT XMIT 220

IXMIT A CHARACTER
:WAIT FOR RECEIVER DONE

JGET RECEIVED CHARACTER
;CLEAR LOWEST UNUSED DATA BIT POSITITON IN TEST DATA
; COMPARE DATA
;BR, IF NON-COMPARE
JTEST XMIT DATA FOR ZERO
;BR, IF FIN]JSHED
;CONTINUE IF NOT
;STORE THE EXPECTED DATA
;STORE RECEIVED DATA
;ex DISABLE MAINTENANCE MODE FOR
%% CONSOLE TO ALLOW FOR COMMUNICATION
;ex WITH TERMINAL.

;DATA COMPARE DATA

;** DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
;** WITH TERMINAL.

(ZDLDHO DL11=~w 11/44 MFM SLU

MACRO M1113

07-JuL-81

TEST # 44 = TEST DATA PATHS USING LOOP-BACK CONNECTOR

3185

.SBTTL

000004
032777
001442
000005
005001

012762
012764
012772
012774
013002
013004
013010
013012
013016
013020
013022

105201

032737
001404
023727
001427
010177
005000
105777
100403

000200

166064

003002

002634

177560

TEST # 44 - TEST DATA PATHS USING LOOP-BACK

104064

013026
013032
013036
013040
013042
013044
013046
013050
C*305¢

017702
043701
020102
001003

232322222222 22222222RRRRRR22
222022
R0 dRRRdRRlRRlll]

18744:

1%:

167632

5%:

167616

2%:

013060

104106

167604

3%:

105701

001406
000745
010137
010237

TEST DATA PATHS USING LOOP-BACK

SCOPE
BIT
BEQ

#1177 ,3SWR
TST4S

CLR

INCR
BIT
BEQ
(MP
BEQ

R1
#BITO,FLAGLS

MOV

CLR

5%
RCSR,#177560
TST4S5
R1,aTBUF

Y
A

sTRANSMIT A BINARY COUNT PATTERN =~ UP
;7O THE BIT POSITION INDICATEDL BY THE

;CONTENTS OF LOCATION '‘SUSWR''
s INCREMENT THE TEST DATA

211744 CPU

JTEST ALL DATA

;1S THIS 11/44 CONSOLE TERMINAL SLJ?
;YES, SKIP THIS TEST
;JXMIT A CHARA(CTER

;CLEAR A TIMER

FOR RECEIVER DONE

;BR IF DONE
; INCREMENT TIMER IF NOT
;BR

TIME REMAINS

ERROR

+64

JRECEIVER DONE

MoV

aRBUF ,R2
¥SUSWR ,R1
R1,R2

;GET RECEIVED CHARACTER
sCLEAR LOWEST UNUSED DATA BIT POSITITON IN TEST DATA
; COMPARE DATA
:BR, IF NON-COMPARE

BIC
MP
BNE

;TEST

TSTB

001024
001026

CONNECTOR

;1S THIS TEST ENABLED
;BR, 17 NOT
;CLEAR EVERYTHING
;CLEAR REGISTER FOR TEST DATA

;WAIT

TSTB
BMI
INC

8NE

001112

CONNECTOR

005200
001373

013024

SEQUENCE

231222323232 3322222322222234232322222222
2202
R2i0d0RSRRRRRRdRS

RESET

000001

7
E
PAGE 66

SeTEST 44
012744
012746
012754
012756
012760

15:03

BEQ
BR

XMIT

NOT

SET

DATA FOR

;BR, IF FINISHED
;CONTINUE IF NOT
;STORE EXPECTED LDATA

ZERO

MOV
MOV

R1,$GDDAT
R2,$BDDAT

sSTORE RECEIVED DATA

ERROR

+106

;DATA (OMPARE ERROR USING LOOP-BACK C(ONNECTOR

MACRO M1113 07-JUL-81 15:03 PAGE 67
CZOLDHO DL11=w 11/44 MFM SLU
CTEST & 45 - TEST DL1'-w LOGIC BY EXERCISING THE XMIT,REC, & CL
3218

LSBTTL

SEQUENCE

TEST # 45 - TEST DL11-w LOGIC BY EXERCISING THE XMIT,REC, & CLOCK

':"'Qt.'.t"Qttt'"t'..i"'Qtttfi'tli".Qt!"..fil’""'.'tt'.t".'

TRTEST 45

TEST DL11-W LOGIC BY EXERCISING THE XMIT,REC,

& CLOCK

'"t.t"'t"tt'tl'..t.fi""tQ.tfi.'t"it'tt.t.tt't'ittt.'fil""'QQ'

013212
0132¢u
013226
0132%
013236

013242
013246
013250
013252
013254
013256
013264
013272
013276

3242
3243
3244
3245
3246 013302
3247 013304
3248 013206
3249 013312
13316
3250
3322
3251
3252
3253
3254
3255
3256

3257
3258
3259
3260
3261
3262 013354

000004
000005
005037
004737
000340
017703
017704
017705
017737
017737
017737
012777
012777
012777
012777
005737
001415
032777
001011
012777
012777
oS2/77
052777
005000
012701
105777
005300
001374

005301
001372
052777
052777
005037
005037
005001
005000
012702
005077
004737
000140

000240
000240
062700
062700
001371
032777
001402
000005
104107

TS$T4S:
002644
014502
167544
167534
167562
167532
167520
1675644

013542
000200
013614
000200
002624

JSR
. WwORD

MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MoV
TST

002446
002450
002452
167504
167500
167464
67460

000100

165636

013630
000300
000100
000004

167464
167460
167446
167404

BEQ
BIT
BNE
MOV
MOV

1%:

000002

000100
002442
002440

BIS
BIS
CLR

Mov

167570

000100

SCOPE
RESET
CLR

42%:

PC ,WRPSW

340
aTVECT ,R3
RS
@RVECT
RS
aRTCVT

ATPSW,STPSW
aRPSW, SRPSW

ARTCPSW,SCPSW

MXMIT
, RTVECT

#200,aTPSW

#RCV,aRVECT

#200,aRPSW
CTSTFL
13
#R1T6,aSWR

19
#CLK,aRTCVT

#300,aRTCPSW
#BIT6,aLAS

#BI1T2,aTCSR

RO
42 ,R1

.WORD

2%:

#0,R0
#1,R0

167270
RESET

ERROR

JIF NOT SKIP CLOCK SET UP

IF YES, ARE CLOCK TEST DISABLED?
JIF YES, SKIP CLOCK SET UP
JPOINT VECTOR TO CLOCK INTERRUPT ROUTINE
sNO MULT INTERUPTS
JENABLE CLOCK INTERRUPTS
;SET MAINTENANCE WRAP
;*x DELAY ENOUGH TIMF TO ALLOW ANY CHARACTERS
THAT MIGHT Bt

THE

PROCESS OF

BEING

TEST

IS ENABLED.

* kN

JENABLE TRANSMIT INTERRUPTS
;ENABLE RECEIVE INTERRUPTS
;CLEAR XMIT INTERRUPT COUNTER
;CLEAR RCV INTERRUPT COUNTER
;CLEAR A REGISTER FOR TEST DATA USE
;CLEAR TIMER
JPOINT R2 TO RECEIVE DATA STORAGE

140

2%
#B1T6,3TCSR
3%
+107

21S CONSOLE UNDER TEST?

* kW

NOP

000000
000001

;POINT RECEIVE VECTOR TO RECEIVE ROUTINE
sNO MULT INTERUPTS

* N

a TBUF

PC,WRPSW

sPOINT TRANSMIT VECTOR TO TRANSMIT ROLTINE
sNO MULTIPLE INTERUPTS ALLOWED

;** READ TO CLEAR DONE

#BUF ,R2

014502

XMIT VECTOR
RECEIVE VECTOR
CLOCK VECTOR
XMIT PSW VECTOR
RECEIVE PSW VECTOR
(LOCK PSW VECTOR

;** WRAP FOR THE UART UNDER

XMTCNT
RCVCNT
R1
RO

167324

;SAVE
:SAVE
;SAVE
;SAVE
;SAVE
;SAVE

s** RECEIVED TO FINISH AFTER MAINTENANCE

#81T76,aT(SR
#B1T6,aRCSR

167354
167342

;SET PRIORITY TO 7

;**

dRBUF
RO
429
R1
423

002454

000100

sCLEAR EVERYTHING
JINITIALIZE CLOCK_COUNT TO ZERO

CLKCNT

;SEND FIRST (HARACTER
;SET PSW TO PRIORITY 3
;WAIT FOR INTERRUPTS
;STALL
sSTALL

JADD INSTRUCTIONS ARE USED TO LENGTHEN LOOP TIME
;
TO COVER THE SLOWEST BAUD RATE ON THE FASTEST

;FINISHED ENTIRE TRANSMISSION
;BR, [F INTERRPUTS ARE DISABLED (FINISHED)

;CLEAR EVERYTHING
sTRANSMIT

INTERRUPT

TIMEOUT

IN MAIN.

DATA TEST

(PU

G_7
15:03
PAGE 67-1
TEST # 45 =~ TEST DL11-w LOGIC BY EXERLISING THE XMIT,REC, g (L

(IDLDHO DLiV=W 11/44 MFM SLU

013542
013546

023737
001402
000005

002442

002440

07-J)uL-81

38:

104110

005737
001411

032777
001005
005737
001002
0000C5
104113
000005
012700
0059001
022001
001014
105201

032737
001403

002624
000100

165432

002444

5¢%:
(OMP:

000001

003002

9%:

122701
001770
032701
001763
000405

000020
000040

8%:

014037
010137

001026
001024

6%:

010377
010477
010577
013777
013777
013777
000137

167144
167134
167162

7%:

002446
002450
002452
014272

005237

002442

032737
001403

000001

105201
122701

001770
032701
001404
042777
000402
110177
005000
000002

;COMPARE THE NUMBER OF
;BR, [F EQUAL
;CLEAR EVERYTHING

ERROR

+110

REC‘IVER DID NOT GET

rnNONO

-2
e

XMIT:

003002

1$:

000020
2%:

000040

000100
167032

TST
BEQ
BIT

CTSTFL
5%
MBIT6E,aSWR

TST

CLKCNT

RESET
MOV

CLR

BNE
INCB
BIT
BEQ
8EQ
BIT
BEQ
BR
MOV
MOV

ERROR

106111

XMTCNT ,RCVONT
4%

BNE
RESET
ERROR

002454

167036
X(ONT:
XRET:

SEQUENCE

CMP
BEQ

RESET

_—

3263
3264 013356
3265 013364
3266 013366
2267
7268 013370
3269
3270
3271
3272 013372
3273 013376
3274 013400
3275 013406
3276 013410
3277 013414
2278 013416
3279 013420
3280
3281 013422
3282 013424
3283 013430
3284 013432
3285 013434
3286 013436
3287 013440
3288 013446
3289 013450
3290 013454
3291 013456
3292 013462
3293 013464
3294
3295 073466
3296 013472
3297 013476
3298
3299 013500
3300 013504
3301 013510
3302 013514
013522
013530
013536

MACRO M1113

MOV
MOV
MOV
MOV
MOV
MOV
JMP

INC
INCB
BIT
8tQ

BEQ
BIT
BEQ
BI¢
MOVB

CLR

RTI

5%
5%

+113

#BUF ,RO

R1
(RO)+,R1

6%
R1
#BITO,FLAG4LS
8%
#20,R1
9%

#1TS,R1

INTERRUPTS

FULL

TRANSMISSION

IF RCVCNT= 0, NO DATA RECEIVED

IF RCVCNT=?, THEN (XMTCNT=RCVCNT)
EQUALS THE NO, OF INTERRUPTS LOST.
IS CONCOLE UNDER TEST?
;IF NOT, SKIP CLOCK COUNT CHECK

:1F YES. ARE CLOCK TESTS DISABLED?
JIF YES, SKIP CLOCK COUNT CHECK
sCHECK FOR AT LESST ONE CLOCK INTERRUPT
;BR IF INTERRUPTS OCCURRED
;CLEAR MAINTENANCE WRAPAROUND
sNO CLOCK

INTERRUPTS

IN EXERCISER

. CLEAR EVERYTHING
;LOAD RECEIVED DATA POINTER T0O RO
JSET UP REGISTER FOR (OMPARISON
;COMPARE XMIT & RCV DATA
;BR, IF NOT EQUAL
. INCREMENT (OMPARE DATA
;117644

CPU?

JYES, SKIP

JSKIP 20 DATA IF 11744
;SKIP 20
JFINISHED

CHECKING RECEIVED

DATA?

(OMP
7%

;BR, IF NOT FINISHED
;BR TO END OF TEST

~(RO)
, $BDDAT
R1, $GDDAT
111

sSTORE BAD DATA FOR ERROR REPORT
;STORE GOOD DATA FOR ERROR REPORT
;DATA COMPARE ERROR IN EXERCISER

R3,QTVECT

JRESTORE

XMIT VECTOR

R5,aRTCVT
STPSW,aTPSW
SRPSW,aRPSW
SCPSW,aRT(CPSW
ENDEV

JRESTORE RECEIVE VECTOR
JRESTORE CLOCK VECTOR
JRESTORE XMIT PSW VECTOR
JRESTORE RECEIVE PSW VECTOR
JRESTORE CLOCK PSW VECTOR
;GOTO NEXT TEST

XMTCNT
R1

JINCREMENT XMIT INTERRUPT (OUNTER
s INCREMENT TEST DATA

R4 ,IRVECT

#RITO,FLAGLS
2%

#20,R1
1%
#3]1T5,R1
XCONT
#IT6,aT(SR
XRET
R1,aTRUF
RO

;11764 CPU
;TEST ALL DATA

;CHECK DATA FOR “*P
;DO NOT XMIT “P
:SEND DATA PATTERN FROM 00 --> 37
;BR, IF MORE DATA TO BE SENT
;CLEAR XMIT INTERRUPT ENABLE
JRETURN,

WITHOUT

SENDING ANY MORE

JSEND NEW CHARACTER
:CLEAR TIMER

:RETURN

DATA

MACRO M1113 07-JuL=81 15:03 PAGE 67-2
(2 DLDHO DL11=w 11/44 MFM SLU
TEST
® 45 -~ TEST DL11=w LOGIC BY EXERCISING THE XMIT,REC, & (L
£
3320
3321 013614
3322 013620
3323 013624
3324 013626
3325
3326 013630
3327 013634

017722
005237
005000
000002
005237
000002

167016

002440

RCV:

MoV

INC
CLR

RTI

002444

LK:

INC

RT]

ARBUF , (R2) +
RCVCNT
RO

CLKCNT

SEQUENCE

;STORE RECEIVED DATA
; INCREMENT RCV
;CLEAR TIMER

INTERRUPT COUNTER

:RETURN

; INCRENMENT CLOCK

JRETURN

INTERRUPT (COUNT

(Z0LDHO DL11~w 11/44 MFM SLU

MACRO M1113

TEST # 46 =~ TEST CONSOLE WITH WRAP AROUND

3328

07-JuL-81

LSBTTL

15:03

7
[
PAGE 69

SEQUENCE

TEST # 46 ~ TEST CONSOLE WITH WRAP AROUND

';.‘t'ttt."'tt'fi.tfit"t't't"tfi.tt't'it""Qt'l't'fl.it'!"t"..t

SSTEST 46

TEST CONSOLE WITH WRAP AROUND

';'t"'ttt'ltt.l"tti'.'.‘tt'fi't"..t..!.""."ttitt"t".l'tttt

0136306

15746:

000004

SCOPE

;'tltt"t'tt.'.t'tttt'tt't"tt'ititQtit'tttt'fit"tt"tt"tt'*ttt'Q'ttt""

WRAPAROUND

TESTING~ AUTO

RCSR58
RBUF 58
TCSR58
TBUF58

1726500
176502
176504
176506

003014
325222

BGNADD

=
=
=
=

INITIATION OF

T/A

CONSOLE

TEST

176500
176502
176504
176506

= DEVADR

ENDADD = ENDADR

;"..'ttttti.tt'tfitttttt"tififi'*tk'fii't'fi'*ttt.ttttt'ttt't"ittttt'tt!'t.'

; MAIN LINE TEST

¢ THIS TEST PUTS (OMMANDS OUT OVER THE SERIAL LINE WHICH IS WRAPPED
;

AROUND

;

CONTROL P IS SEND TO GET THE CONSOLE'S ATTENTION AND THEN

;s
.

THE

CONSOLE

AND RECEIVES

T/ACA FOR APT) IS SENT.
THE PROGRAM CAN NOT SEE

THE

RESPONSES

SINCE THE CPU IS HALTED DURING THE TESTING
THE CHARS RETURNING, THUS THE PROGRAM WILL

; SIT IN A LOOP WAITING FOR A 'B'' TO BE PRINTED BY THE CONSOLE AS A
; SIGNAL TO APT THAT THE TESTING IS DONE. ALSO SINCE THE TESTING
; INVOLES WRITTING TO THE CPU'S MEMORY A CHECKSUM IS CALCULATED AND THE
. MEMORY TO BE USED INSIDE THIS PROGRAMS SPACE IS SAVE BEFORE TESTING
; AND RESTORED AFTER TEST WITH ANOTHER CHECKSUM CA_CULATION
’

:Qtttfit'ttttt.tfitfittttttt't'*t'ttfit't'tfitt'tt‘ttt"t't*ttt't""...t'....'

013640
C13646

032777
001451

013650
013656
013664

013737
01273/
012706

000340

013670
013674

005037
012737

002340
000100

013702

004537

013706
013712

BIT

#BIT2,aSWR

LRUN THIS TEST ONLY IF

MOV
MoV
MoV

PSW,SAVEPS
#340,PSW

#JIMSTK,SP

;SAVE OLD PSW
JPUT IN NOW PSW
JUSE MY STACK (SO NO CLOBER)

CLR
MOV

LOC1
#100,L0C2

;TIMING LOOP COUNTERS

014202

JSR

RS, SAVETE

JSAVE LOCATIONS T/A WRITES

004537
010437

014010
002436

MOV

JSR

RS, CHKSUM

s CALCULATE CHECKSUM

3372 013716
013722

(12700
004537

002564
014030

MOV

#CNTLP,R)

RS,PUTLIN

;SEND OUuT (ONTROL P

013726
013732

012700
004537

002566
014062

MOV
JSR

#PROMPT
RO
RS,GETLIN

;GET CRLF

012700
004537

002610
014030

MOV

#TA RO

3371

3377
33/8 013736

3379 013742
3380

000004

1€5172

177776

002434

002432

177776

002342

WRAP :

BEQ

JSR

10%

R4 ,0LDSUM

RS5,PUTLIN

JSW BIT 2 IS ON

JSAVE OLD CHEC(KSUM

CONSOLE>>>

JSEND OUT T/A<CRLF>

(ZDLDHO DL11~W 11/44 MFM SLU

MACRO M1113

TEST # 46 ~ TEST CONSOLE WITH WRAP AROUND

07-JuL-81 15:03

PAGE 69-1

SEQUENCE

%%%} 073746

004537

0146126

JSR

RS.GETB

;GET THE A FROM '"'-TESTR''

%%gz 013752

004537

014236

JSR

RS ,RESTTE

JRESTORE LOCATIONS T/A WRITES

3285
3386
3387
3388
3389
2390
%gg}

004537
020437
0014601
000000
012706
013737
000137

014010
002436

JSR
CvP
BEQ
HALT
MOV
MOV
JMP

RS, CHKSUM
R4 ,OLDSUM
108

;RECALCULATE CHECKSUM

#1000,SP
SAVEPS ,PSW
$EOP

:RETURN THEIR SP
;RETURN PSW
:BR TO END Of PASS ROUTINE

013756
013762
013766
013770
013772
013776
014004

001000
002434
014326

177776

3393

15%:

3394

:tfitt.ttttt't*fittttttt't't'ttttttttttttt'tttttttfittfittttttttt'i'ttt'ttt't'

3395

;

%%gg

;

TO CALCJLATE

* INPUT CONDITIONS

g
%gg
3400

%28;

CHECKSUM ON PROGRAM

BGNADD - ADDRESS TO START CHECK SUM (INCLUSIVE)

3403

ENDADD = ADDRESS TO END CHECK SUM (EXCLUSIVE)

: OUTPUT CONDITIONS

3404
3405
3406

:
h
:

3407

3408
3409
3610
3471
3412
3413
3414
%2}2

ROUTINE

014010
014014
014016
014020
01460246
014026

012700
005004
062004
022700
001374
000205

003014

REGS4 = CHECK SUM

A AN A AT A NANA N AN A

CHKSUM:

MOV
CLR
ADD
(MP
BNE
RTS

1%:

025222

3417

R AR R RAAN NN N AN R

#8GNADD RO
R4
(RO) +,R4
#ENDADD ,RO
1%
RS

R RS AN ANARI AN R AR RN AR

AN AN AR

!GET STARTING ADDRESS
JRESET SUM
;ADD WORD TO SUM
;CHECK FOR END
;IF NOT DONE LOOP
;DONE RETURN

31.18

.'tt't*tt'ttttttttttt*ttit'!ittttfltttttfi'fittttttttttttttttttittttfit‘ttttttt

3419
3420
gzs;

;
;
;

3423

:'tttttfittttttttt*tfittfifit'titt'tltttfittttttttttttttitttttttt'tt'tttt't"ttt

3424
3425
3426 014030
3427 014032
3428 014034
3429 014040
3430 014046
3431 014050
3432 014054
%2%2 014060

112001
001412
004537
032737
001772
110137
000137
000205

THIS ROUTINE OUTPUTS TO THE SERIAL LINE CHARS STARTING AT
THE ADDRESS IN REGO UNTIL IT HIiTS A <377>

PUTLIN:
014162
000200

176506
014030

176504

MOVB
BEQ
JSR
BIT
BEQ
MOVB
JMP
RTS

1%:

10%:

3435

3436
3437

:
;

R R NN

(RO)+,R1
10%
RS, TIMER
#8177,TCSRS8
1%
R1,7BUFS8
PUTLIN
RS

AN AR RN R AR RN AN A R AR RN

THIS ROUTINE

;GET DATA
:END OF DATA
;PROVIDE FOR TIMOUT
(TEST FOR XMIT READY
JWAIT FOR XMIT READY
;OUTPUT (CHAR
;REPETE
RETURN

R R AR AN AN RN A NN P RN R AR

N RN TR AAT RPN

INPUTS A CHARS FROM THE SERIAL LINF AND C[OMPARES

RNy

—

CZDLDHO DL11=-w 11744 MFM SLU
TEST # 46 -~

TEST

MACRO M1113

CONSOLE WITH WRAP AROUND

07-JUL=-81

15:03

PAGE 69=2

SEQUENCE

%2%%

;

2640
34641

;'t'.tttnt'ttttt.ttttttttttt'tttttttttttnt'tt'ttttttttttttttttttttttttttti

3442

3443 014062
346464 016064
3445 0164066
3646 014070
3447 014072
3448 014076
3449 014104

112001
105201
001416
105301
004537
032737
001772

34651
3652
3453
3454
3455
3456
3457

042702
120102
001760
000000
000205

3450 074106

0164112
0146116
014120
014122
014124

113702

IT WITH THE EXPECTED VALUES POINTED TO BY REGO UNTIL NULL<OO>

GETLIN:

014162
000200

176500

MCVB
INCR
BEQ
DE(CB
JSR
8IT
BEQ

1%:

176502

(RO)+,R1
R1
10%

R1
RS, TIMER
#8117 ,RCSRS8
1%
RBUFS8,R2
#BIT7,R2
R1,R2
GETLIN

MOvVB

000200

BIC
CMPR
BEQ
HALT
RTS

10%:

;
:

3463

Ettttiittttt*tttttttttttttttttttfitttttttttttttttttttttttttttt*tttttttttttt

TNPUTS (HARS UNTIL

; AND THZN RETURNS

34664
3465

3666 014126
3467 014132

014140
014142
014146
014152
014156
014160

004537
032737
001772
113702
042702
122702
001363
000205

014162
000200

176500

GETRB:

JSR
BIT

B8EQ
MOVB
8IC
(MPR
BNE
RTS

176502
000200
000102

%283 01420C

3491

ARA RN

;STRIP PARITY
;CHECK FOR 'B'’
sNOT ‘B'' REPETE
JWAS 'B'' RETURN

;
; THIS ROUTINE IS USED AS A TIME OUT FEATURE
; WHEN THE TIMING LOOPS BOTH REACH O THIS ROUTINE WILL
. CAUSE A HALT
:

3488 014176

JNOT DONE YET

3476
3477
3478
3479
3480

3486 014170
2487 014174

;0UT TIMING LOOP OUT
JTEST OFR REC READY

3482
3483
3484 014162
3485 014166

1T GETS THE CHAR 'B'’

RS, TIMER
#8177 ,RCSRS8
GET8
RBUFS58,R2
#B1T7,R2
#102,R2
GETB
RS

R R R AN RN RN AN RN RN

2475

3481

;STRIP PARITY
JARE THEY THE SAME
:SAME GET MORE
JNOT SAME HALT
JRLTURN

THIS ROLTIME

R AN

;PROVIDE FOR TIMOUT
;TEST FOR REC READY
;WAIT FOR REC READY

3459
3460

3468
3469
3470
3471
3472
%2;2

cIF NULL EXIT

2458

3322;

JGET EXPECTED CHAR

R
s
s

005337
001004
005337
001001
000000
000205

002340

TIMER:

DEC
BNE
DEC
BNE
HALT
RTS

002342
10%:
N

LOCT
10%
LOC?2
10%

;DECREMPNT TIMING LOOPS
;IF

ZERO THIS ROUTINE

JEXECUTED R3 TIMES

2492

R A R R AR AR R AR R AR RN R R AR AN AR R AR AR RN RN AR RN A AR NN AR N AR R AR AT NRRAR AN AN

3494

: THIS ROUTINE SAVES THE LOCATIONS WRITTEN BY THE T/A CONSOLE TEST

(____;

CZDLDHO DL11~-w 11/44 MFM SLU
TEST # 46 - TEST

MACRO M1113

CONSOLE WITH WRAP AROUND

07-JuL-81

15:03

PAGE 69-3

SEQUENCE

; SO THEY MAY BE RESTORED LATER

3495

'-"t.'t.lt"'ttttt'ifittt""ti'tttttt'ittt'tttttflQttfit"ttttttttttttt'ittt

3499
3500
3501
3502
3503
3504
3505
3506
3507

014202
014210
014214
014220
014222
014224
014226
014232
014234

013737
012702
012701
011221
000241
006102

020227
100772
000205

000000
000002
002346

002344

SAVETE :
1%:

MOV
MOV

cLc

ROL

025222

CMP
BM]
RTS

0,SAVEOD

#2,R2

#SAVLOC,R1
(R2).(R1)+

R2,#ENDADD
1%
RS

;SAVE LOCATION O
;SET UP INDJRECT PNTER
JSET UP STORAGE LOC. PNTER
;GET WORD AND SAVE
;DONT ROT IN ANY BITS
;SET NEXT ADDRESS
;SEE IF AT END
;NO REPETE

".tt't'*ttittt.tt'ittfit"ttttttt!tttttttttttt'fil'.tttttt'tttttii'*t‘.'.t...

: THIS ROUTINE RESTORES THE SAVED LOCATIONS THAT T/A WRITES INTO
[

.'t.i'.t'fi'l‘t"'tttt*tttttttttttfitttttt*tfitttfit*fitt'tfi*'*ttttt'tfii"t"i'i'

3516 014236
3517 014244
3518 014250
3519 014254
3520 014256
3521 014260
3522 014262
3523 014266
35246 014270

013737
012702

012701
012112
000241
006102
020227
100772

000205

002344
000002
002346

0252¢2¢

000000

RESTTEL:
1%:

MoV

MOV
MOV

MOV
cLc

ROL

SAVEQ,O
#2,R2

#SAVLOC
,R1
(R1)+,(R2)

R
R2,#ENDADD
1%
RS

;SET UP INDIRECT PNTER
;SET UP STORAGE LOC. PNTER
.GET WORD AND RESTORE
sDONT ROT IN ANY B'TS
sSET NEXT ADDRESS

;SEE IF AT END
sNO REPETE

(ZOLDHO DL11-w 11/44 MFM SLU
TEST # 46 ~ TEST

3525

3526 014272

3527 014276
3528 014302
3529 014310
3530 014312
3531 014316
3532 014322

MACRO M1113

CONSOLE WITH WRAP AROUND

005037

005237
023737
001002
000137
005037
000137

001002

001076
002630
013640
002624
004050

07-JUL-81 15:03

ENDEV:
001076
NOECP:

PAGE 70

SEQUENCE

.END OF DEVICE PASS ROUTINE

(LR

INC
CMP
BNE
JMP
(LR
JMP

$STSTNM

$DEVCT
TMP2 ,SDEVCT
NOEOP
WRAP
CTSTFL
TSTDEV

sCLEAR TEST NO. COUNT FOR SCOPE ROUTINE
s INCREMENT DEVICE COUNTER
JALL DEVICES TESTED
;BR, IF NO
JEXECUTE WRAP AROUND AFTER ALL DEVICES
;CLEAR CONSOLE UNDER TEST FLAG
;GO TEST NEXT DEVICE

(ZDLDHO DL11=-W °

END OF

PASS ROUT]

L4 MFM SLU

MACRO M1113

3534

(07-JuUL-81

.SBTTL

END OF

15:03

PAGE

SEQUENCE

PASS RCUTINE

'"Q.tti'ttfi'tti'ttfi'fittt'QQ"'!Q""'Q'!Q.'Qttl.'."'.'t'.'.t..'t

**INCREMENT THE PASS NUMBER ($PASS)
“«]F THERES A MONITOR GO TO IT
014326
014326
014330
014334
014340
014346
014350

014352
014354

“«]F THERE ISN'T JUMP TO GOAGIN

000004
005037
005237
042737
005327
000001
003015
012737
000001
014350

$EOP:

001002
001074

100000

001074

000137
014432
377

377

000

3535 014416

015

012

105

104401

013700
001405
000005
004710
000240
000240
000240

81C
$EOPCT:

014356
014360
014362
014366
014372
014374
014376
014400
014402
014404
014406
014406
014410
014412

$ENDCT:
014416
000042

SCOPE
CLR
INC

$GET42:
$ENDAD:

$DOAGN:
$SRTNAD:

S$ENULL:
ENDMG:

DEC
.WORD

BGT

MOV

$TSTNM
$PASS
#100000, $PASS
(PC)+
1
$DOANN
(PO)+,a(PC)+

csJERO THE TEST NUMBER
;o INCREMENT THE PASS NUMBER
;:DON'T ALLOW A NEG. NUMBER
;. :LO0OP?

. YES

;;RESTORE

COUNTER

.WORD
$EOP(CT

MOV
8EQ

a#62,.RO
$DOAGN

JSR
NOP
NOP
NOP

PC,(RD)

;2G0 TO MONITOR
;s SAVE ROOM
;JFOR
JSACTI

JMP

a(PC)+

2 sRETURN

.BYTE

=1,-1,0

;sNULL CHARA(CTER STRING

TYPE

RESET

.WORD

.EVEN
ASCIZ

. ENDMG

GOAGIN

;. TYPE

"END PASS''

;;GET MONITOR ADDRESS
. sBRANCH IF
;3CLEAR

<CR><LF>/END PASS /

NO MONI]TOR

THE WORLD

(ZDLDHO DL11-W 11/44 MFM SLU

END OF

PASS ROUTINE

3537 01443¢
3538 014434
3539 014436

3540
3541
3542
3543
3544
3545
%229

014440
014442
014446
014452
014460
014462
014466

00504€
005216
000240

001375
062706
005037
022737
001004
012706
000137

3548 014472
%ggg 014476

005037
000137

3551

011646

014502

2552 014504
3553 014512
%ggg 014516

%ggg
3558
3559
3560
3561

017666
062716
000002

014520
014522
014526
014532

012600
162700
010037
016637

3564 014542

000000

ggg% 014540

MACRO M1113

104112

07-JuL-81

GOAGIN:
1%:

000002
001076
000001

000002

SEQUENCE

=(SP)
(SP)

BNE
ADD
CLR
CMP
BNE
MOV
JMP

1%
#2,SP
$DEVCT
#1,TMP?
RSTRT
#1000,SP
TST1

RSTRT:

(LR
JMP

SUNIT
BEGIN

;CLEAR UNIT NUMBER

WRPSW:

MOV

(SP) ,-(SP)

;COPY RETURN PC

001000
004172

000002
000002

B_8
PAGE 72

CLR
INC
NOP

002630

001100
003774

15:03

MOV
ADD
RTI

@2(SP) ,2(SP)
#2,(SP)

MoV
SUB
MOV
MOV

(SP)+,RO
#4 ,RO
RO,BDVECT
2(SP) ,0LDPC

;CLEAR ANOTHER LOCATION ON STACK
s INCREMENT STACK LOCATION
;TAKE UP SOME MORE TIME

;BRANCH BACK UNTIL ZERO AGAIN
;CLEAN THE LOCATION OFF THE STACK
;CLEAR DEVICE COUNT
;1S THCRE ONLY ONE DEVICE UNDER TEST?
;BR, IF NOT
JRESET STACK POINTER
;60 DO ANOTHER PASS

;MOVE NEW PSW TO STACK
JADJUST JSR RETURN OVER PRIORITY REQUESTED
;POP RETURN PC & NEW PSW

;SUBROUTINE TO REPORT UNEXPECTED OR ERRONEOUS TRAPS OR INTERRUPTS

000004
002622
000002

CATCH:

002620

ERROR

HALT

+112

JGET ADDRESS OF TRAP VECTOR + 4
;ADJUST TO POINT TO TRAP ADDRESS
;STORE TRAP OR INTERRUPT ADDRESS
;OET PC WHERE TRAP OR INTERRUPT OCCURRED
JREPORT ERROR

;PROGRAM MUST BE RESTARTED AT

THIS POINT

—

CZDLDHO DL11-W 11/44 MFM SLU
END OF PASS ROUTINE
35¢6
3507
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579 014544
3580 014544
2581 014550
3582 014552
3583 014560
3584 014564
3585 014570
3586 014576
3587 014604
3588 014612
3589 014614
3590 014620
3591 014624
3592 014624
3593 014632
3594 014634
3595 014642
3596 014646
3597 014647
014650
014652
014656
014660
014662
014664
014672
014674
014700
014704
014706
014712
014712
014720
014722
014724
014724

MACRO M1113

07-JuL-81 15:03

c.8
PAGE 73

SEQUENCE

ii3333232222200883222Ri2RidfRRRR3002

0022002000

RdRRsd]

:*THIS ROUTINE WILL INCREMENT THE ERROR FLAG AND THE ERROR COUNT,
:*SAVE THE ERROR ITEM NUMBER AND ADDRESS OF THE ERROR CALL

:«AND GO TO SERRTYP ON ERROR
;*THE

SWITCH OPTIONS PROVIDED BY
HALT ON ERROR

;*SW15=1
*SW13=1
:+SW09=1
s =CALL

THIS ROUTINE

ARE:

INHIBIT ERROR TYPEOLTS
LOOP IN ERROR

ERROR

; ;ERROR-EMT AND N-ERROR

ITEM NUMBER

".'ttt'ttt'i'i'ttttttl*'ttitl’ttttttttfi*tttifik*fiitt*ttttt*ttt'tfit'i

105237
001775
013777
005237
011637
162737
117737
032777
001004

004737
104401

122737
001007
113737

$ERROR:
7%:

001003

001002
001012
001016
000002
164214

020000

164262

001106

004737

001014
015714

014646

000777
005777

164162

100001
000000
104406

032777
001402
013716
005737
001402
013716
022737
001001
000000
000002

001000

SuB

<0%:

164146

001060
000042

CMPB
BNC

HAPTENV
, SENV

JRUNNING

JSR
BYTE
.BYTE

PC,3ATYS4
0
0

JREPORT FATAL

22%:
2%:

BR
TST

3%:

CKSWR

5%:

6%:

;SET THE ERROR FLAG
JDON'T LET FLAG GO TO ZERO
;DISPLAY TEST NUMBER AND ERROR FLAG
s INCREMENT ERROR COUNT
;GET ADDRESS OF ERROR INSTRUCTION

PC,$ERRTYP

BIT
BNE
JSR
TYPE

mMovB

4%:

$ERFLG
7%
$TSTNM, aDISPLAY
$ERTTL
(SP) ,$ERRP(
#2 ,8ERRPC
@$ERRPC,SITEMB

;STRIP AND SAVE THE ERROR ITEM CODE
;SKIP TYPEQ''T IF SET
;SKIP TYPEOUTS
;GO TO USER ERROR ROUTINE

MOVB

21%:

001010
001060

014376

INC

MOV

164226

000001

000
000

MOV

001016
001014

014726
001063

INCB
BEQ

BPL
HALT

BIT
BEQ
MOV
TST
BEQ
MOV

CMP
BNE
HALT
RT]

H#BI1T13,aSWR
20%

.SCRLF

2%
$SITEMB,21$

IN APT MODE

;NO, SKIP APT ERROR REPORT
JSET ITEM NUMBER AS ERROR NUMBER
ERROR

22%

;APT ERROR LOOP

sSKIP IF CONTINUE

ASWR

#B1T09,3SWR

4%
$LPERR, (SP)

$ESCAPE
5%
$ESCAPE, (SP)

HSEND
, AD
¥4 2
6%

JHALT

TO APT

ON ERROR

JHALT ON ERROR!

sTEST FOR CHANGE IN SOFT-SWR
;LOOP ON ERROR SWITCH SET?
;BR IF NO
;FUDGE RETURN FOR LOOPING
;CHECK FOR AN ESCAPE ADDRESS
;BR IF NONE
;FUDGE RETURN ADDRESS FOR ESCAPE
;ACT=11 AUTO-ACCEPT?
;BR IF NO
;YES
JRETURN

CZDLDHO DL11-w 11/44 MFM SLU

END OF

PASS ROUTINE

MACRO M1113

3617
3618

07-JuL-81

ERROR MESSAGE

.SBTTL
M

S22

15:03

228

PAGE

D 8
74

SEQUENCE

TYPEOUT ROUTINE

002 RRRR2280dRRRRRRRaR
s
22222222 RN 222202222

:*THIS ROUTINE USES THE ''ITEM CONTROL BYTE'' (SITEMB)

;*ERROR IS TO BE REPORTED.

IT THEN OBTAINS, FROM THE 'ERROR TABLE'' (SERRTB),

:«AND REPORTS THE APPROPRIATE

014726
014726
014732
014734
014736
014742

010046
005000

014744

013746

14250
014752
014754
014760
014762
014766
014770
014772
014774
014776
015000
015004
015010
015012
015014
015016
015022
015026
015030
015032
015034
015040
015042
015044
015046
015052
015054
015054
015056

104401

001063

153700

001014

001004

104401

012037
001404

104401

000207

1%:

000177

015076
100%:

001146
015014

110%:

2%:

001063
015032

3.
4%:

001063

015076

015106

BNE

;oIF

001063

RO
RO
RO
RO
#$ERRTB,RO
(RO)+,2%

BEQ
TYPE
.WORD
TYPE
MOV
BEQ
TYPE
.WORD
TYPE

120

015176

124

015146
117
105

127
123

PFECWS:
PFECEM:
PFECDH:

00°072

001016

015674

PFECDT:

0
LSCRLF
(RO)+,4%
5%

THE

ERROR

JUST

;;SAVE $ERRPC FOR TYPEOUT

. sERROR ADDRESS

;:G0 TYPE--OCTAL

csGET ouT

ASCII(ALL

DIGITS)

;IS THIS THE POWER MONITOR BIT CALL

..ADJUST THE INDEX SO THAT IT WILL
M
WORK FOR THE ERROR TABLE
..FORM TABLE POINTER
::PICKUP '"ERROR MESSAGE'' POINTER

;:SKIP TYPEQUT IF NO POINTER
::TYPE THE 'ERROR MESSAGE''
;" ERROR MESSAGE'' POINTER GOES HERE
;' 'CARRIAGE RETURN'' & ‘LINE FEED'
;:PICKUP 'DATA HEADER'®' POINTER
;:SKIP TYPEOUT IF O

I8 3

;:G0 TYPE THE DATA

RTS

MOV

a(RO)+,-(SP)

(RO) ,RO
(SP)+,R0
LS$CRLF

;:PICKUP 'DATA TABLE'' POINTER

;sRESTORE RO
2" 'CARRJAGE RETURN'' & "LINE FEED'
;sRETURN

::SAVE a(RO)+ FOR TYPEOUT

(RO)

;.60
;1S

TYPE--OCTAL ASCII(ALL
THERE ANOTHER NUMBER?

.8%

,,TYPE

BEQ

BR
.eegfil

7%
/
/

.WORD
.ASCIZ
.éSELZ
EV

PFECEM, PFECDH,PFECDT
,PFECDF
7?POWER MONITOR BIT WAS FOUND
2TESTNO
ERR PC
(CPUERR?

.WORD

DPMOO1

BRANCH IF NOT
DPMOO1
:MOVE ADDRS OF PWR MUNITOR BIT ERR 10 RO DPMOO1
JBRANCH TO CALL THE ERROR
DPMO01

BNE

TYPE

8%:

THE

;:TYPE THE 'DATA HEADER''
::"DATA HEADER'' POINTER GOES HERE
;2"'CARRIAGE RETURN'' & "LINE FEED'’

TYPOC
TST

000

1008
#PFECWS.RO
110%

ITEM NUMBER IS ZERO,

;. TYPE

0
.SCRLF

MOV
TYPE

040

DEC
ASL
ASL
ASL
ADD
MOV

6%:

015072

$ERRPC,-(SP)

#177 ,R0O

MOV

A4S TEMB,RO

CMPB

BNE
MoV
BR

5%:

104402

015072

;2 'CARRIJAGE RETURN'' & '"LINE FEED"'
;s SAVE RO
JsPICKUP THE ITEM INDEX

TYPOC

013046
005710
001770

.SCRLF
RO,=(SP)
RO

MOV

104401

000000
104401
011000
001004
012600

000771
040

015176

001016

INFORMAT:ON CONCERNING THE ERROR.

TrPE
MOV
CLR

B8ISR

106402

0004 34
122700
001003
012700
600406
005300
006300
006300
006300
062700
012037
001404
104401
000000

104401

015106
015146

$CRRTYP:

TO DETERMINE WHICH

;:BR [F NO

TWO(2)

SPACES

LOOP
..TUO(Z) SPACES

$TESTN,SERRPC,CPSAVE,Q

SET?

DIGITS)

—

CZDLDOHO DL11=~w 11/644 MFM SLU
ERROR MESSAGE

%19 015206

TYPEOQUT ROUTINE

0ocC

000

MACRO M1113

000

07-JuL-81 15:03

PFECDF:

.BYTE

E 8
PAGE 74-1

0,0,0,0

SEQUENCE

(ZOLDHO DL11=w 11/44 MFM SLU
ERROR MESSAGE TYPEQUT ROUTINE

MACRO M1113

07-JuL-81

.SBTTL

15:03

PAGE

SEQUENCE

POWER DOWN AND UP ROUTINES

::tt"ttttt't..'fi"ifittt"t'.fltti.l'tflt'fitt'.t.t.tt"it't"'ttt.t

:*POWER DOWN ROUTINE
Sa A3

015212
015220
015226
015230
015232
015234
015236
015240
015242
015246
015252
015260
015262

012737
012737
010046
010146
010246
010346
010446
010546
017746
010637
012737
000000
000776

015356
000340

000024
000026

2222222228222

$PWRDN:

163572

015362
015264

000024

MOV

MOV
MOV
MOV
MOV
MOV
MOv
MOV
MOV
MOV
MOV
HALT

B8R

R2RdR2d0

#SILLUP ,a#PWRVEC

22220

;SET

R2RRdRRRRdRRt

FOR FAST

;PRIO:/
JPUSH RO
;PUSH R1
;PUSH R2
:PUSH R3

RS,-(SP)
aSWR,=(SP)
SP,$SAVR6

JPUSH RS ON STACK
;PUSH aSWR ON STACK
. SAVE SP

JHANG UP

R4 ,~-(SP)

#SPWRUP ,a#PWRVEC

#3490 ,34PWRVEC+2
RO,-(SP)
R1,-(SP)
R2,~(SP)
R3,-(SP)

ON
ON
ON
ON

STACK
STA(K
STACK
STA(K

;PUSH R4 ON STACK

;SET

UP VECTOR

::ttttt'itfi'fi'fittttfifi'ttiit'ttt.‘tfit"tttttttttfi'ttttt'itktttfi'i'

;*POWER UP ROUTINE
':'tQ'*Qfit"tttfi'.t'tfitfi'it'Qt't"'.tfi*tfitttfi't'fitttt.tttt'ttttt'

015264
015272
015276
015302
015304
015306

015310

015312
015314
015316
015324

012737
013706
012677
012605
012604
012603
012602
012601
012600
012737
012737
005037
005237
001375

015356
015362

000024

163536

015212
000340
015362
015362

000024
000026
1$:

104401

015364
013716
000002

$PWRUP:

$PWRMG:

001006

MOV

MOV
ov
MOV
MOV
MOV
MOV
MoV
MOV
MOV
MOV

CLR
INC

BNE

TYPE

.WORD

MoV
RTI

$ILLUP: HALT
02

120

$SAVR6:
$POWFR:

0
.AS(CIZ

H#SILLUP ,@#PWRVEC

$SAVRG6, SP

(SP)+,aSWR
(SP)+,RS
(SP)+ R4

(SP)+,R3
(SP) +,R2
(SP) +,R1
(SP)+,RO

#SPWRDN ,a#PWRVEC

,SET

FOR FAST

;GET SP

DOWN

;POP STACK

INTO aSWR

JPOP STACK

INTO R4

;POP
JPOP
JPOP
JPOP

STACK
STACK
STACK
STACK

;SET UP

INTO
INTO
INTO
INTO

THE

R3
R2
R1
RO

POWER DOWN VECTOR

#540,3#PWRVEC+2
$SAVR6
$SAVRE
1%

;PRIO:7
JWAIT LOOP FOR THE
JWAIT FOR THE INC
;OF WORD

$POWER
$LPADR, (SP)

;JPOWER FAIL MESSAGE POINTER
s CHOCOLATE FUDGE RETURN TO BEGINNING OF

=2
<15><12>"POWER"’

TTY

;REPORT THE POWER FAILURE
;RETURN TO

THERE

:THE

POWER UP

;PUT

THE

: BEFORE

SEQUENCE

WAS

STARTED

THE POWER DOWN WAS COMP_ETE

SP HERE

TEST

(ZDLDHO DL11=w 11/44 MFM SLU

POWER DOWN AND UP ROUTINES

MACRO M1113

3668
3669

07-JuL-81

.SBTTL
B2

15:03

PAGE

SEQUENCE

SCOPE HANDLER ROUTINE

2222323022333 42232324322242222222223232233223222222222222RR3Z222XX2R
R0 X

-THIS ROUTINE

CONTROLS

THE

LOOPING OF

;*AND LOAD THE TEST NUMBER(STSTNM)
;tAND LOAD THE ERROR FLAG ($ERFLG)
;*THE

SWITCH OPTIONS PROVIDED BY

;*SWl4=1
;*SW09=1
;*CALL

;"
15374
015374
015376
015404

10440¢

032777
001125

$SCOPE:

040000

000416

015410
015414
075427
015426
015432
015434
015436
015442
015444
015444
015452
015454
015460
015462
015466
015474
015502
015510

013746
012737
005737
012637
000474
022626
012637
000462

000004
015434
177060
000004

022737
001447
005227
001005
013746
012737
013737
032737
001423
042737
017746
042777

177777

104177

105737

015610
015616

001412
032777
001404
013737
000420

1%:

(KSWR
BIT
BNE

$XTSTR:

000024

5%:

000004

075674

177777

00004

015542
000001

177766

000004
015674
015674

000001

177766

001000

163306

162314

177777

900%:

1999%:

000004

910%:

20018:
163232

001010

001006

#1714 ,3SWR
$OVER

CODE

FOR

THE

XOR

;s TEST
FOR CHANGE IN SOFT=-SWR
::LO0OP ON PRESENT TEST?
;o YES IF SWi4=1
TESTERAA#AN

MOV

o#ERRVEC,-(SP)

;,;SAVE

MOV

(SP)+ ,a#ERRVEC

#5% ,a#ERRVEC
a#177060
(SP)+,a#ERRVEC
$SVLAD
(SP)+,(SP)+

"XOR'' TESTER CHANGE

;:THIS INSTRUCTION TO A "NOP'' (NOP-240)
THE

CONTENTS OF

THc

ERROR VECTOR

;2;SET FOR TIMEOUT
;s TIME OUT ON XOR?
;:RESTORE THE ERROR VECTOR
.:G0 TO THE NEXT TEST
;:CLEAR THE STACK AFTER A TIME
;.;RESTORE

THE

ERROR VECTOR

MOV
MOV
MOV

4,-(SP)
#1999% .4
177766, CPSAVE

;SAVE TIMEOQOUT VECTOR AT 4
JSET VECTOR TO LOCATION BELOW
JMOVE CPU ERR REG VALUE TO LOC

MOV

aSWR,~(SP)

;SAVE

(SP)+,aSWR

;RESTORE

BIT
BEQ
BIC

7%:

#31700, CPSAVE
2000%
#B1T00,177766
#31709,aSWR
+177

BR
_MP
MOV

20008
(SP)+,(SP)+
#-1,CPSAVE

B8R

910%

INC

2000%:

001000

INCREMENT

ARE:

;2
1F RUNNING ON THE

BIC
EMT

177777

001003

ROUTINE

MOV

015674

THIS

BR
MOV
ST
MOV
BR
CMP

WILL

oQuUT

BR
7%
;:LO0OP ON THE PRESENT TEST
68 :;ARAREND OF CODE FOR THE XOR TESTERAANAN
$:
(MP
#-1,CPSAVE
JSEE IF TIMEOUT WAS PREVIOUSLY RECORDED ;DPMOO1
BEQ
20018
;BRANCH AROUND ROUTINE IF SO
:DPMOOT
INC
#-1
;TEST FOR 1ST TIME THROUGH
:DPMOO1
BNE
900%
;BRANCH IF NOT
:DPMO01

163300

015562

::SCOPE=]0T

SCOPE

JRBaRRSTART

015406

012677
000407
022626
012737
005237
000403
005227
001002
012637

163434

LOOP ON TEST
LOOP ON ERROR

SUBTESTS.

INTO THE DISPLAY REG.(D]JSPLAY<7:0>)
INTO DISPLAY<15:08>

20008+2

INC

n-1

7SIR

$ERFLG

BNE
MOV

B8EQ

2001%
(SP)+,4

$SVLAD

BIT

#3]709,aSWR

MOV
Br

$LPERR,SLPADR
$OVER

B8EQ

FOR

TST

;SEE [F THE POWER MONITOR BIT IS ON
;BRANCH TO CONTINUE ROUTINE [F CLEAR
:CLEAR THE BIT FOUND TO BE SET
SWR VALUE

;DPMOOT
:DPMO01
:DPMOO1

;DPMOOT
:DPMOO1
;DPMOO1
:DPMO01

JDON'T ALLOW LOOP ON ERROR ON THIS ERROR;DPMQO1
;CALL SPECIAL POWER FAIL BIT ERROR CALL ;DPMOO1
SWR TC ORIGINAL VALUE

;BRANCH OVER TIMEOQUT SECTION
:CLEAN UP THE STACK AFTER TIMEOUT
JMOVE =1 TO (PSAVE = NO CPU ERR REG

;INCREMENT 1ST TIME THROUGH LOCATION

;BRANCH OVER 1ST TIME THROUGH TEST
;TEST FOR 1ST TIME THROUGH
;BRANCH IF NOT
JRESTORE LOCATION 4

;.BR IF NO

;.LO0P ON ERROR?

;oSET LOOP ADDRESS

TO LAST

:DPMOOT
:DPMOOT
:DPMQOUO1

;DPMOO1

: DPMOO1

:DPMOO1
:DPMO0OT
;DPMOO

; JHAS AN ERROR OCCURRED?

;:BR IF NO

:DPMOOT

SCOPE

(ZDOLDHO DL11=-w 11/44 MFM SLU
SCOPE

HANDLER ROUTINE

015620
015624

105037
105237

001003
001002

015636
015642
015646

011637
011637
005037

001006
001010
001060

015660
015666
015672

013777
013716
000002

015630

015652

015674

113737

112737

0G0OV00

MACRO M1113

001002

001072

000007

001015

001002
001006

163154

07-JuL-81 15:03

4%:
$SVLAD:

$OVER:

CPSAVE:

PAGE 76-1

SEQUENCE

CLRB
IN(B

SERFLG
$TSTAM

;. ZERO THE ERROR FLAG
2 COUNT TEST NUMBERS

MOV
MOV
CLR

(SP) ,SLPADR
(SP) ,SLPERR
$ESCAPE

;- SAVE SCOPE LOOP ADDRESS
;s SAVE ERROR LOOP ADDRESS
;;CLEAR THE ESCAPE FROM ERROR ADDRESS

MOVB

STSTNM STESTN

mMCvB

41, SERMAX

.WORD

MOV
MOV
RTI

;. SET TEST NUMBER''IN APT MAILBOX

2;ONLY ALLOW ONE (1) ERROR ON NEXT TEST

$TSTAM,QaDISPLAY ;;DISPLAY TEST NUMBER
$LPADR, (SP)
;:FUDGE RETURN ADDRESS
;. FIXES PS

JLOCATION TO SAVE (CPU ERR REG CONTENTS

;DPMOO1

CZDLDKO DLY1=-w 11/44 MFM SLU
SCOPE HANDLER ROUT INE

MACRO M1113

3672

(07-4uL-81 15:03

PAGE 77

SEQUENCE

3673

3674

LSBTTL

APT COMMUN]CAT]IONS ROUTINE

MOVB

2675

3676

2677 015676

112737

3678 0157064
3679 015712
3680 015714

112737
000403
112737

3682 015722
3683 015724
3684 015726
3685 015732
3686 015734
2687 015742
3688 015744
3689 015752
3690 015754
3691 015760
3692 015766
3693 015772
3694 015774
3695 016000
3696 016002
3697 016004
3698 016010

010046
010146
105737
O0C1450
122737
001031
132737
001425
017600
062766
005737
001375
010037
105720
001376
163700
006200

3681 015722

3699 016012
3700 016016

3701 0160264
3702 016026
3703 016034

3704 016042

3705 016046
3706 C16052
3707 016054
3708 016054
3709 016060
3710 016062
3711 016066
3712 016070
3713 015074
3714 016C76
3715 016104

3716
3717
3718
3719
3720

016110
016116
016122
016126
016132

3721 016134

3722 016136
3723 016140
3724 016141
g;gz 016142

3727
3728

010037
012737

000413
017637
062766

013746

000001

016142

$ATY1:

000001

(16142

$ATYvéL:
SATY(:

C00001

$ATY3:

016740
000001

Q01106

000100

001107

000004
000002
001066

000004

001102

1%:
2%:

0061102
001104
000004

001066

000004
000002

016052
00CCO4

177776

004737
000000

016144

105737
001413
005737
001410
005737
001375

016142

062766
105037
105037
105037
012601

000002
016142
016141
016140

017637
005237

016140

3%:

000004
001066

11%:
001070

000004

MOVR
B8R
MOVR

12%:

012600

#1,8FFLG

# SMFLG
$ATY(
”,8FFLG

R AR RN AP R P A N R R AN A AN

;70O REPORT FATAL ERROR

;70 TY"E A MESSAGE

;TO ONLY REPORT FATAL ERROR

5%
@4 (SP) ,4%
#2,4(SP)

JSR
LWORD

PC.$TYPE
O

TSTR
BEQ
TST
BEQ
TST
BNE

$FFLG
129
$ENV
12%
$MSGTYPE
1%

;SHOULD REPCRT FATAL ERROR?
;IF NOT: BR
JRUNNING UNDER APT?
JIF NOT: BR
JFINISHED LAST MESSAGE?
JIF NOT: WAIT

ADD
CLRB
(LRB
CLRB
MOV

#2,4(SP)
$FFLG
$LFLG
SMFLG
(SP)+ R

;BUMP RETURN ADDRESS
;CLEAR FATAL FLAG
JCLEAR LOG FLAG
;CLEAR MESSAGE FLAG
;POP STACK INTO R1

MOV
INC

RTS
.BYTE
L.BYTE

$MFLG:
$LFLG:

000200

APT51ZE 200

.BYTE

EV EN

RO, $MSGLGT
#6,SMSGTYPE

177776 ,=-(SP)

@4 (SP) ,$FATAL
SMSGTYPE

(SP)+,R0O

PC
O
0
O

KRR AR RN

BR
MOV
ADD

MOV

$FFLG:

R R RN R R AN R

RO,=(SP)
R1,-(SP)
MFLG
5%
#APTENV, SENV
3t
#APTSPOOL ,$ENVM
3%
@4 (SP) RO
#2,4(SP)
$MSGTYPE
1%
RO, SMSGAD
(RO) +
%
$MSGAD ,RO
RO

000207
000
000
000

R AR R R R R

AR R R AR RANR

MoV
MOV
ISR
BEQ
(MPR
BNE
8118
BEQ
MOV
ADD
TST
BNE
MOV
TSTR
BNE
SuB
ASR

MOV

001106

R TR AN I TP R R NN NN AR RN RS RARR R T RO AR AN

A R R AN

MOV
MOV

4%:
5¢:
10%:

001066

AR R R R AR

;PUSH RO ON STACK
;PUSH R1 ON STACK
;SHOULD TYPE A MESSAGE?
;IF NOT: BR
;OPERATING UNDER APT?
JIF NOT: BR
; SHOULD SPOOL MESSAGE?
;1F NOT: BR
;GET MESSAGE ADDRESS
;BUMP RETURN ADDRESS
JSEE IF DONE W/ LAST XM]SSION?
JIF NOT: WAIT
;PUT ADDRESS IN MAILBOX
;FIND END OF MESSAGE
.SUB START OF MESSAGE
;GET MESSAGE LENGTH IN WORDS
;PUT LENGTH IN MALBOX
;TELL APT TO TAKE MESSAGE

;PUT MSG ADDR IN JSR L INKAGE
;BUMP RETURN ADDRESS

JPUSH 177776 ON STACK
;CALL

TYPE MACRO

JGET ERROR #
JTELL APT TO TAKE

;POP STACK INTO R1
<RETURN

JLOG FLAG
JFATAL FLAG

ERROR

C(ZDLDHO DL11=w 11/44 MFM SLU
APT

COMMUNICATIONS ROUTINE

3729
3730
37

3732

000001
000100
000040

MACRC M1113

07-JuL-81 15:03

APTENV=001
APTSPOOL=100
APTCSUP=040

PAGE 77-1

SEQUENCE

100

(ZOLDKO DL11=w 11/44 MFM SLU

APT

(OMMUNICATIONS ROUTINE

MACRO M1113

3734

3735

07-JuL-81 15:03

.SBTTL

PAGE 78

SEQUENCE

TYPE ROUTINE

""fi*ti'tt't't**tttfit.**"i"tfi*!"ttttfi'**tfi*fittltit‘fi"t"fiti"'

:*ROUTINE
:*THE

TO TYPE ASCIZ MESSAGE. MESSAGE MUST

ROUTINE WILL

INSERT A NUMBER OF

TERMINATE WITH A O BYTE.

NULL CHARACTERS AFTER A LINE

FEED.

J*NOTE1:

$NULL CONTAINS THE CHARACTER TO BE USED AS THE FILLER CHARACTER.

;*NOTE3:

$FILLC CONTAINS THE CHARA(CTER TO FILL AFTER.

;*NOTEZ2:

$FILLS CONTAINS THE NUBER OF FILLER CHARACTERS REQUIRED.

;=CALL:
:*1) USING A TRAP INSTRUCTION
:*OR
TYPE
.MESADR

016144
016150
016152
016154

016156
016160
016164
016172
016174
016202
016204
016210
016214
016216
016224
016226
016230
016232

016234
016236
016242

016244
016250

016252

016256
016260
01662

016264
016266
016272
016274
016300

016304
016306

016312
016316
016320
016324
016330

105737
100002

001057

000000
000430

010046
017600
122737
001011
132737
001405
010037
004737
000000
132737
001003
112046
001005

000002

TYPE
ME SADR

$TYPE:

TSTIB
BPL
HALT
BR

1%:

000001

001106

000100

001107

016214
015704

000040

I
o*

001107

61%:
62%:
2%:

005726

012600
062716
000002

(000002

60%:
3%

000011

122716

000200

122716
001430

001006
005726
1046401

001063
105037
000755
004737
123726

001350
013746

105366
002770
004737
105337
000770

016356
001056

5%:
6%:

001054

000001
016356
016504

7%:

(SP)+

;o
1F TERMINATOR POP IT OFF

MOV
ADD
RTI

(SP)+ RO
#e,(SP)

CMPB

#CRLF ., (SP)

CMPB
BEQ

#HT, (SP)
8%
b}
(SP)+

$CRLF
CLRB
BR
JSR
(MPB
BNE
MOV

DECB
BLT
JSR
DECB
BR

JHOR]ZONTAL

AN ASCIZ STRING

;s]S THERE A TERMINAL?
;:BR IF YES
;sHALT HERE
;. LEAVE

RO,-(SP)
a2(SP) RO
RAPTENV, SENV
62%
#APTSPOOL ,$ENVM
62%
RO,61%
PC.$ATY3
0
AAPTCSUP,SENVM
60%
(RO)+,-(SP)
A3

TST

[S FIRST ADDRESS OF

MOV
MOV
C(MPR
BNE
BITB
BEQ
MOV
JSR
.WORD
BITB
BNE
MOVB
BNE

BNE
TST
TYPE

016504

$TPFLG
1%

:;MESADR

IF NO TERMINAL

;:SAVE RO
::GET ADDRESS OF ASCiZ STRING
csRUNNING IN APT MODE
;sNO,GO CHECK FOR APT CONSOLE
; ;SPOOL MESSAGE TO APT
JsNO,GO CHECK FOR CONSOLE
;;SETUP MESSAGE ADDRESS FOR APT
;s SPOOL MESSAGE TO APT
; sMESSAGE ADDRESS
;;APT CONSOLE SUPPRESSED
;:YES,SKIP TYPE OUT
:sPUSH CHARACTER TO BE TYPED ONTO STACK
;2BR IF IT ISN'T THE TERMINATOR
:;RESTORE RO
;;ADJUST RETURN P(C
;sRETURN

THE STA(K

;;BRANCH IF <HT>

::BRANCH [F NOT <CRLF>
1:POP
<CR><LF> EQUIV
;:TYPE A CR AND LF

$CHARCNT
2%
PC,$TYPEC
$FILLC, (SP)+

::CLEAR CHARACTER COUNT
;2GET NEXT CHARACTER
;:GO TYPE THIS (CHARACTER
;21S IT TIME FOR FILLER CHARS.?

1(SP)
6%
PC,$TYPEC
$CHARCNT
I4 $

;sDOES A NULL NEED TO BE TYPED?
::BR IF NO--GO POP THE NULL OFF OF
;260 TYPE A NULL
;D0 NOT COUNT AS A COUNT
. LOOP

2%
$NULL ,-(SP)

TAB PROCESSOR

J:1F NO GO GET NEXT CHAR.
;oGET # OF FILLER CHARS. NEEDED

;.AND THE NULL CHAR.

STACK

101

p——————

CZDLDHO DL11-W 11744 MFM SLU
TYPE ROUTINE

016332
016336
016342
016350
016352
016354
016356
016356
016362

11271¢€

000040
016356
000007

MACRO M1113

MOVR

;;REPLACE TAB WITH SPACE

BNE

,(SP)
PC,S$TYPEC
#7 ,$CHARCNT
9%

(SP)+

;. TAB STOP

;.POP SPACE OFF

9% :

JSR
BITBR
TST

105777
100022

162462

122716

000023

105777
100375
117716

162436

017746
042716
001012

042716
122716

001366

$TYPE(:

162456
177600

101¢:

162432
177600
000021
102%:

105777

100375
126627
0014620
116677
122766

001003

105037
000406
122766
001402
105227
000000
000207

10%:

162414

000002

000021

000002
000015

000002

000212

000002

1%:

a$TKS

;;CHAR [N KYBD BUFFER?

;MJD001

MOV
BIC

a$TKB,-(SP)
#177600, (SP)

;:GET CHAR
::STRIP EXTRANEOUS BITS

;MJDOOT
:MJDOOT

TSR
BPL
MOVB
BIC

a%$TKS
1018
a$TKB, (SP)
#177600, (SP)

J:WAIT FOR (HAR

TST

(SP)+

;:FIX STACK

TSTR
BPL

Q$T1PS
108

J;WAIT UNTIL PRINTER IS READY

BEQ
MOVR

$TYPEX
2(SP) ,a%7P8B

;sBRANCH IF YES
::LOAD CHAR TO BE TYPED INTO DATA REG.

CMPR
BNE

(MPB
BNE

.SBTTL

J:GET NEXT CHARACTER

108

#SEXOFF , (SP)
102%

#EXON, (SP)
101%

J:BR IF NOT

;MJD001

;:WAS CHAR XOFF
;.BR IF NOT

:MJDOO
;MJD0O01

;MJDOOT
;MJDOO1
;MJD0O01
:MJDOO01
;MJIDOOT

::GET CHAR
;:STRIP IT

JsWAS IT XON?
;:BR IF NOT

;MJDO01
:MJD0O01

2{(SP) ,A$XON

::1S CHARACTER A RANDOM XON?

(MPB

#(CR,2(SP)

;1S CHARACTER A CARRIAGE RETURN?

CLRB

$CHARCNT

CMPB
BEQ
INCB

#LF ,2(SP)
$1YPEX
(PC)+

RTS

B8R

$CHARCNT: .WORD
$TYPEX:

STACK

TSTR

BNE

016504

;2 TYPE A SPACE
;sBRANCH IF NOT AT

CMPR

162376

SEQUENCE

B8PL

005726

3736

15:03

8%:
016504

L 8
PAGE 78-1

07-JuUL-81

;MJDOOT

;RANOO1

;sBRANCH IF NO

;3YES=-=-CLEAR CHARACTER COUNT

$TYPEX

BINARY TO OCTAL

:MJDOOT
;MJD0O01
;MUDOO1

JEXIT

;218 CHARACTER A LINE FEED?
:;BRANCH IF YES
;s COUNT THE CHARACTER

;; CHARACTER COUNT STORAGE

(ASCII) AND TYPE

".'t!ttttt*t*tttt*tttt*tttttt*l'tt*ttl’t*tttt*tttit*fitt*tttttttttttt

:*THIS ROUTINE IS USED TO CHANGE A 16-BIT BINARY NUMBER TO A 6-DIGIT
:+OCTAL (ASCII) NUMBER AND TYPE IT.
:«$TYPOS---ENTER HERE

J«CALL:

TO SETUP SUPPRESS ZEROS AND NUMBER OF

DIGITS TO TYPE

MOV

NUM,-(SP)

;:NUMBER TO BE TYPED

b
o

BYTE
BYTE

N
M

J:N=1 TO 6 FOR NUMBER OF DIGITS TO TYPE
::M=1 OR O

o
;%

TYPOS

;.CALL

FOR

TYPEOUT

::1=TYPE LEADING ZEROS
;:0=SUPPRESS LEADING ZEROS

s *$TYPON--=-ENTER HERE

;*$TYPOS OR $TYPOC

J*CALL:

M
< %

MOV

TYPON

TO TYPE OUT WITH THE SAME PARAMETERS AS THE LAST

NUM, - (SP?}

::NUMBER TO BE TYPED

:;CALL FOR TYPEOQUT

;*$TYPO(C---ENTER HERE FOR TYPEQUT OF A 16 BIT NUMBER

102

—

C(ZDLDHO DLI1=w 11/44 MFM SLU

BINARY TO OCTAL

017646
116637
112637
062716
000406
112737

000000
000001
016735
000002
000001

(016733

016550
016556
016560

112737
010346
010446

000005

016732

016564
016570
016572
016576

113704
005404
062704
110437

016735

016606
016612
016614
016616
016620
016622
016624
016626
016630
016632
016636
016640
016644
016646
016650
016652
016654
016660
016664
016670
016674
016700
0156702
016704
016706
016710
016712
016714
016716
016724
016726
016730
016731
016732
016733
016734

016605
005003
006105
0004604
006105
006105
006105
010503
006103
105337
100016
042703
001002
005704
001403
005204
052703
052703
110337
104401
105337
003347
(02402
005204
000744
012605
012604
012603
016666
012616
000002
000
000
000
000
000000

000012

016562

016602

112737

010546

113704

(70006

016733

016735

016733

177770

000060
000040
01673C
016730
016732

000004

SEQUENCE

;:NUMBER TO BE

$TYPOS: MOV
MOVB
MOVB
ADD
BR
$TYPOC: MOVB

a(SP) ,-(SP)
1(SP),$0FILL
(SP)+_,$0OMODE+1
#2,(SP)
$TYPON
#1,80FILL

;;PICKUP THE MODE
;:LOAD ZERO FILL SWITCH
;.NUMBER OF DIGITS TO TYPE
:sADJUST RETURN ADDRESS

$TYPON: MOVB
MOV
MOV

#5,30CNT
R3,-(SP)
R4 ,-(SP)

J:SET THE ITERATION COUNT
; :SAVE R3
;.SAVE R4

MOVB

#6,3$0MODE +1
RS5,-(SP)

MOVB
NEG
ADD
MOVB

$OMODE +1,R4
R4
#6 R4
R4, $OMODE

MOV
CLR
1%:
ROL
i
BR
2%:
ROL
ROL
ROL
MoV
3%:
ROL
DE(CB
BPL
BIC
BNE
TST
BEQ
4%:
INC
BIS
5%:
BIS
MOVB
TYPE
7%.
DE(B
BGT
BLT
INC
BR
6%:
MOV
MOV
MOV
MOV
MOV
RTI
8%:
BYTE
.BYTE
$OCNT:
.BYTE
$OFILL: .BYTE
$OMODE: .WORD

12(SP) ,RS
R3
R5
3s
RS
RS
RS
RS ,R3
R3
$OMODE
7%
#177770,R3
4%
R4
5%
R4
#'0,R3
#' ,R3
R3,8%
,8%
$OCNT
2%
6%
R4
2%
(SP)+ RS
(SP) + R4
(SP)+,R3
2(SP) ,4(SP)
(SP)+,(SP)

MOVB

016734

PAGE 78-2

NUM,=(SP)

TYPOC

MOV

000006
016734

000002

07-JuL-81 15:03

;*CALL:
I%
MOV
1w

016510
016514
016522
016526
016532
016534

016542

3737

(ASCII) AND TYPE

MACRO M1113

$OFILL.,RG

O
0
0
0
0

;2CALL

FOR

TYPED

TYPEOUT

;¢SET THE ZERO FILL SWITCH

;<SET FOR SIX(6) DIGITS
;sSAVE RS

J:GET THE NUMBER OF DIGITS TO TYPE
;sSUBTRACT IT FOR MAX. ALLOWED
;:SAVE IT FOR USE

;:GET THE ZERO FILL SWITCH
:JPICKUP THE INPUT NUMBER
;;CLEAR THE OUTPUT WORD
;;ROTATE MSB INTO ''C"
;:GO DO MSB
;JFORM THIS DIGIT

::GET LSB OF

THIS DIGIT

;eTYPE THIS DIGIT?
;:BR IF NO
;<GET RID OF JUNK
;oTEST FOR O
;s SUPPRESS THIS 0?

;:BR IF YES
::DON'T SUPPRESS ANYMORE 0'S
;:MAKE THIS DIGIT ASCII
::MAKE ASCI] IF NOT ALREADY
;:SAVE FOR TYPING
;260 TYPE THIS DIGIT
;:COUNT BY 1
;:BR IF MORE TO DO
;:BR IF DONE
;o INSURE LAST DIGIT ISN'T A BLANK
;:G0 DO THE LAST DIGIT
:;RESTORE RS
;;RESTORE R4
; JRESTORE R3
;:SET THE STACK FOR RETURNING

;;RETURN
;;STORAGE FOR ASCII DIGIT
::TERMINATOR FOR TYPE ROUTINE
;;OCTAL DIGIT COUNTER
;:IERO FILL SWITCH
;:NUMBER OF DIGITS TO TYPE

103

—

—_—

CZDLDHO DL11=W 11/644 MFM SLU

BINARY TO OCTAL

(ASCII)

AND TYPE

MACRO M1113

3739
3740

07-JuUL-81

LSBTTL

15:03

SEQUENCE

TTY INPUT ROUTINE

IINNAANRRRANNNANRARRS

.ENABL

N 8
PAGE 79

AR R R R AN AR R AR RN AN AR R AN R AN

I AN OINRARI NN A NS

LSB

.'.'tttttttttt'tt.lQt'tfii"t'tttttt.t..'ttt't'.'."..Q...Q."Q'l".

;~SOF TWARE SWITCH REGISTER CHANGE ROUTINE.

J*ROUTINE

]S ENTERED

FROM THE

TRAP HANDLER,

AND WILL

;*SERVICE THE TEST FOR CHANGE IN SOF TWARE SWITCH REGISTER TRAP (ALL
016736
016744
016746
016752

022737
001074
105777
100071

000176

016760

042716

1775600

016754

016764
016770
016772
017000
017002
017006
017012
017016
017020

162066

022726
001062
123727
001456
104401
1C_401
013746

000007

017024
017026
017030
017034
017036
017042
017046
017052
017056
017060
017064
017066
017072
017074
017100
017102
017110
017114
017120
017126

005046
005046
105777
100375
117746
042716
021627
001005
104401
062706
000757
021627
001022
005766
001403
016677
062706
104401
123727
001003

017136
017140
017144
017150
017152
017156
017160
017164
017170
017172
017174
017176

000002
(04737
021627
002420
021627
003015
042726
005766
001403
006316
006316
006316

017130

012777

: *WHEN OPERATING

$CKSWR:

162072

117746

104402
104401

001040

BIC

#~C177,(SP)

MovB

162004

000025

9%:

017466
000006

20%:

000015

10%:

(€0G001

017473
017500
000176
017511
162010

177600

000004
000002
000006
001063
001035

000001

000100

161706

016356
000060
000067
000060
000002

161730

1'%:
14%:

15%:
168:

FLAG MODE.

#SWREG, SWR
15%
a$TKS
15%

CMP
BNE
CMPS
BEQ
TYPE
$GTSWR: TYPE
MOV
TYPOC
TYPE
19%:
CLR
CLR
7$:
TSTB
BPL
MOVB

001034

IN TTY

CMP
BNE
TSTB
BPL

BItL

CMP
BNE
TYPE
ADD
BR
CMP
BNE
TST
BEQ
MOV
ADD
TYPE
(MP8
BNE
MOV

RT]
JSR
cmp
BLT
(MP
BGT
BIC
TST
BEQ
ASL
ASL
ASL

;:1S THE SOFT-SWR SELECTED?
s ;BRANCH IF NO
;. CHAR THERE?
s 1F NO, DON'T WAIT AROUND

a$TkB,-(SP)

::SAVE

#7,(SP)+
15%
$AUTOB, #1
15%
LSCNTLG
. SMSWR
SWREG,~(SP)

218 IT A CONTROL G?
ssNO, RETURN TO USER
;;ARE WE RUNNING IN AUTO-MODE?
:JBRANCH IF YES
s;ECHO THE CONTROL-G (*G)
;s TYPE CURRENYT CONTENTS
;. SAVE SWREG FOR TYPEOUT

- SMNEW
~(SP)
-(SP)
a$TKS
7$
a%$TKB,~(SP)

THE CHAR

;s STRIP-OFF THE ASCII

;.60 TYPE-=-OCTAL ASCII(ALL
;;PROMPT FOR NEW SWR

DIGITS)

(SP) 425
108
LSCNTLU
#6,SP
19%
(SP) 415
16$
4 (SP)
11%
2(SP) ,aSWR
#6,SP
.SCRLF
$INTAG, #1
15%

;. CLEAR COUNTER
;. THE NEW SWR
;s CHAR THERE?
;.
1F NOT TRY AGAIN
;.PICK UP CHAR
;oMAKE IT 7-BIT ASCII
;218 IT A CONTROL-U?
; ;BRANCH IF NOT
JoYES, ECHO CONTHROL=U (*U)
;s IGNCRE PREVIOUS INPUT
JoLET'S TRY IT AGAIN
1S 1T A <(R>?
s sBRANCH [F NO
J;YES, IS 1T THE FIRST (HAR?
s .BRANCH IF YES
;s SAVE NEW SWR
;s CLEAR UP STACK
;,ECHO <CR> AND <LF>
;o RE-ENABLE TTY KBD INTERRUPTS?
;sBRANCH IF NOT

PC,STYPEC
(SP) ,#60
18%
(SP) 467
18%
#60, (SP)+
2(SP)
17%
(SP)
(SP)
(SP)

;s sRETURN
;sECHO CHAR
;. CHAR < (?
s sBRANCH IF YES
;. CHAR > 7?
; sBRANCH IF YES
;s STRIP-OFF ASCII
;. 1S THIS THE FIRST CHAR
;oBRANCH IF YES
;sNO, SHIFT PRESENT
;.
CHAR OVER TO MAKE
;.
ROOM FOR NEW ONE.

#-C177,(SP)

#100,a8TKS

;;RE-ENA3LE

TTY KBD

INTERRUPTS

104

CZDLDHO DL11-W 11/44 MFM SLU

208

TYPE

.DSABL
a2

BR
LS8

,$QUES

«CALL
:

017310
017316
017320
017326
017330
017336
07340
017346

026627
001744

017306

001013

105777
100375
117746
042716

000002

161604
177600

000004
000004

000004

000023

161556

000021

026627

000004

000140

000004

000175

000040

000004

003003
042766
000002

3%:

Q17352

017356
017362

017364

017366
017370
017374
017376
017402
017404
017410
017414
017420
017422

010346
012703
022703
101405
104407

105063

017456
017466

(SP>+, 421
2$
1¢
4 (SP) , #$XON
1%
4(SP) 4140

SIS IT A CONTROL-Q?
+<IF NOT DISCARD IT
::YES, RESUME
221S IT A RANDOM XON?
SBRANCH IF YES
:31S IT UPPER CASE?

4(SP) ,#175
4%
#40,4 (SP)

:2IS IT A SPECIAL CHAR?
S BRANCH IF YES
TIMAKE IT UPPER CASE

RTI

@$TKS

L (SP) 423
3%

#AC177.(SP)

L
$RDL IN:
1$:

MOV
MOV

10%:

001062

4%:

017454
017454
000015

3¢

2:IS IT A CONTROL-S?
;:BRANCH IF NO

S:MAKE IT 7-BIT ASCII

S :BRANCH IF

1:GO BACK

;RANOO1
*RANOO1

YES

TO USER

2322333832243¢23223322232423323324238242222323322323232222222232R22X2¢%]

INPUT A STRING FROM THE TTY

RETURN HERE
R3,-(SP)
#STTYIN,R3

CMP
BLOS

#STTYIN+8.,R3
4%

MOVR
CMPB

(SP)+, (R3)
#177.(R3)

TYPE
BR

L$QUES
is

RDCHR

177777

CMP
BNE
BR
CMP
BEQ
CMP

RDL IN

000177

2:WITH PARITY BIT STRIPPED OFF

MOVB

2$:

::CHARACTER IS ON THE STACK

SSWAIT FOR A CHARACTER
S:LOOP UNTIL ITS THERE
1:GET CHARACTER

CMP
BGT
BIC

- xCALL :

017250

::INPUT A SINGLE CHARACTER FROM THE TTY

(SP),=(SP)
4(SP),2(SP)

'E:IS ROUTINE WILL

TTY

Q$TKS
2%
@$TKB,-(SP)

BLT

48 :

CHARACTER FROM THE

1%
@$TKB.4(SP)
#~C<177>,4(SP)

BIC

000004

7<CR><LF>

:;PUSH DOWN THE PC
**SAVE THE PS
SWAIT FOR
**A CHARACTER
:SREAD THE TTY
::GET RID OF JUNK IF ANY

CMP
BNE
TSTR
BPL

161552
177600

000021

002407
026627

RDCHR

$RDCHR: MOV
MOV
1%:
TSTB
BPL
MOVB
BIC
2%:

022627
001366
000750

LSTYPE

*:SIMULATE CONTROL=-U

INPUT A SINGLE

RETURN HERE

o
000004
161610

CHAR

S:SET IN NEW CHAR
“SGET THE NEXT ONE

3283233233223 232322332232242322332232232223240R¢F222222Z382222202323
X223 ZXRX]

011646
016666
105777
100375
117766
042766
026627

:;KEEP COUNT OF

18%:

2(SP)

<2(SP), (SP)
7$

001062

INC

BIS
BR

17%:

000002
177776

ngnxs ROUTINE WILL

017220
017222
017230
017234
017236
017244
017252
017260
017262
017266
017270
017274
017300
017304

105

104401

000720

SEQUENTE

00526¢€
056616
000707

B 9
PAGE 79-1

15:03

INPUT ROUTINE

07-JUL-81

TTY

MACRO M1113

BNE

MOVB
TYPE

(MPB
BNE
CLRB

(R3),9%

,9%

#15,(R3)+
2%
-1(R3

::INPUT A STRING FROM THE TTY

S :ADDRESS OF FIRST CHARACTER WILL BE ON THE STACK
::TERMINATOR WILL BE A BYTE OF
:2SAVE R
::GET ADDRESS

::BUFFER FULL?
LiBR IF YES
>:GO READ ONE

ALL

CHARACTER FROM THE

S:GET CHARACTER
SIS IT A RUBOUT

S SKIP IF NOT

SITYPE A '2°
::CLEAR THE BUFFER AND LOOP

$ECHO THE CHARACTER

:;CHECK FOR RETURN
23 L00P IF NOT RETURN
;. CLEAR RETURN (THE 15)

0'S

TTy

_ASCIZ

P
e
ey
gy
e
gt

: sRETURN
;:STORAGE FOR ASCII CHAR. TC TYPE
;s TERMINATOR
:sRESERVE 8 BYTES FOR TTY INPUT
:;CONTROL "U
;s CONTROL ''G'*

S$MNEW:

0
0
8.
/2U/7<15><12>
/2G/<15><12>
<15><12>/SWR =
/
NEW =/

——

015
015
123
116

#STTYIN,4L(SP)

;ADJUST THE STACK AND PUT ADDRESS OF THE
332
FIRST ASCI] CHARACTER ON IT

000004

(SP) ,=-(5P)
4(SP) ,2(SP)

;TYPE A LINE FEED
:;RESTCRE R3

125
107
012
040

017456

000002

JSLF
(SP)+,R3

—

136
136
015
040

000004

TYPE
MOV
MOV
MOV
MOV
RTI
9% :
BYTE
BYTE
$TTYIN: .BLKB
$CNTLU: .ASCIZ
SCNTLG: .ASCIZ
$MSWR:
L.ASCIZ

106

——

3741

017444
017452
017454
017455
017456
017466
017473
017500
017511

001064

SEQUENCE

0174346
0176436

104401
012603
011646
016666
012766
000002
000
000

017426
017632

PAGE 79-2

INPUT ROUTINE

07-JuL-81 15:03

TTY

MACRO M1113

—

CZDLDHO DL11=W 11/44 MFM SLU

——

CZDLDHO DL11-W 11/44 MFM SLU

TTY

INPUT ROUTINE

MACRO M1113

3743
3744
3745

07-JuL-81 15:03

.SBTTL

D 9
PAGE 80

SEQUENCE

107

TRAP DECODER
AR

AR AR AR

RN RN AR

AR R

RN AR RN RN AN

RA NN AR RN RN RN

;*THIS ROUTINE WILL PICKUP THE LOWER BYTE OF THE ''TRAP'' INSTRUCTION
J*AND USE I7 TO INDEX THROUGH THE TRAP TABLE FOR THE STARTING ADDRESS

;*OF THE DESIRED ROUTINE. THEN USING TIIE ADDRESS OBTAINED IT WILL
;*G0 TO THAT ROUTINE.

017522
017524
017530
017532
017534
017536
017542

010046
016600
005740

000002

006300
016000
000200

017556

017544
017546
017554

011646
016666
000002

000004

$TRAP:

111000

(00002

MOV

RO,-(SP)

::SAVE RO

TST
MOVB
ASL
MOV

-(RO)
(RO) RO
RO
$TRPAD (RO) ,RO

;;BACKUP BY 2
;:;GET RIGHT BYTE OF TRAP
;;POSITION FOR INDEXING
;> INDEX TO TABLE

MOV

2(SP) ,R0O

RTS
::THIS IS USE
$TRAPZ2: MOV

RO
;2G0 TO ROUTINE
TO HANDLE THE ''GETPRI'’ MACRO
(SP) ,-(SP)
;;MOVE THE PC DOWN

MOV

.SBTTL

;*THIS

4(SP),2(SP)

RT1
TRAP TABLE

TABLE

::GET TRAP ADDRESS

CONTAINS

THE

:;MOVE THE PSW DCWN

;JRESTORE

THE

PSW

STARTING ADDRESSES OF

;*BY THE '‘TRAP'' INSTRUCTION.

THE

ROUTINES

CALLED

ROUT INE

3746

017556
017560
017562
017564
017566
017570
017572
017574
017576

017544
016144
016534
016510
016550

017006
016736

017220
017350

$TRPAD: .WORD

STYPE
$TYPOC
$TYPOS
$TYPON
$GTSWR
$CKSWR
$RDCHR
$RDLIN

$TRAP2

;:CALL=TYPE
;.CALL=TYPOC
;. CALL=TYPOS
;. CALL=TYPON
;;CALL=GTSWR
;. CALL=CKSWR
;. CALL=RDCHR
;. CALL=RDLIN

TRAP+1(104401)
TTY TYPEOUT ROUTINE
TRAP+2(104402)
TYPE OCTAL NUMBER (WITH LEADING ZEROS)
TRAP+3(104405)
TYPE OCTAL NUMBER (NO LEADING ZEROS)
TRAP+4(104404)
TYPE OCTAL NUMBER (AS PER LAST CALL)
TRAP+5(104405)
GET SOFT-SWR SETTING
TRAP+6(104406)
TEST FOR CHANGE IN SOF T-SWR
TRAP+7(104407)
TTY TYPEIN (HARACTER ROUTINE
TRAP+10(104410) TTY TYPEIN STRING ROUTINE

MACRO M1113

DLDHO DL11-U 11744 MFM SLU

100023
052701
036100
001403
004737
017752
006301
030100
001403
004737
017763
006301
030190
001403
004737
017775
042700
022700
001337
004737
020070
000000
000726

013600
062746

105777
100375

112077
105710
001371
000207
015
d

163040

163034

163026

163052

.SBTTL

R AR

ECHO TEST

RN AN R AR AN AR AN R R

2333220222222

2S:

163036

RESET
MOVR

TSTR

8PL
MOVR
MOV
BPL

BIS
8IT
BEQ
JSR

017724
3%:

017724
AN

017724
5%:

000200
000003

E 9
PAGE 81

15:03

017724

MPAR

ASL
BIT
BEQ
JSR
MFR
ASL

BIT
BEQ
JSR
MOR
BIC
(MP
BNE
JSR

#'~

( TBUF

ggRCSR

MSG:

MOV

WAIT:

ISTB

117

123

RN R AR

MPAR :
MFR:
MOR :
MSTOP:

LASCI
JASCI
LASCI
(ASC]

R ANN RS

CONTINUING

AR
RRRRRS )

;CLEAR EVERYTHING
:TRANSMIT PROMPT ''s'’
JWAIT FOR

INPUT

JSHIFT MASK TO TEST "FR'' FLAG

;SHIFT MASK TO TEST "DR’’ FLAG

R1.RO
3%
PC .MSG

R1,R0
4%
PC ,MSG
R1,R0
PC _MSG

JCHECK
FOR PARITY ERROR FLAG
;BR IF NOT SET
;REPORT PARITY ERROR
:TEST FOR FRAMING ERKOR FLAG
;BR IF NOT SET
JREPSORT FRAMING ERROR
;TEST

FOR OVERFLOW ERROR

;BR IF NOT SET

JREPORT OVERFLOW ERROR

#3117 .R0O

;CLEAR ANY PARITY BIT

;BR

#3,R0

P( ,MSG

a(SP)+,R0

#2,~(SP)
a£}$SR

(RO)+,a( TBUF
(RO)
WAIT
PC

120

AR AR RAN

JECHO INPUT
;STORE INPUT
:BR IF 'ERROR'NOT SET
;SET PARITY ERROR TEST MASK

162716

106

I AN

oCRBUF ,a( TBUF
a(RBUF RO
5%
#MIT12.R1

cLHO

162722

AN A AN

2d03RRARRR222222

MSTOP

000002

SEQUENCE

;*THIS ROUTINE WILL ECHO ANY CHARACTER TYPED
;*AT THE CONSOLE
;*THE TEST IS HALTED BY TYPING A CONTROL-C
;*TEST CAN BE RESTARTED AFTER HALTING BY JUST

010000

— el — —h

017700

000052

Nnroron

112777
105777
100375
117777

ECHO:

OOOO

000005

—

3789 017732
3790 017736
3791 017740
3792 017744
3793 017746
3794 017750
3795
3796 017752
3797 017763
3798 017775
3799 020010

LR4

OCO

3786
3787 017724
3788 017726

(VL LV RV,|

3748
3749
3750
3751
3752
3753
3754
3755 017600
3756 017600
3757 017602
3758 017610
3759 017614
3760 017616
3761 017624
3762 017630
2763 017632
3764 017636
3765 017640
3766 017642
3767 017646
3768 017650
3769 017652
3770 017654
3771 017656
3772 017662
3773 017664
3774 017666
3775 017670
3776 017672
3777 017676
3778 017700
3779 017704
3780 017710
3781 017712
3782 017716
3783 017720
3784 017722
3785

07-JuL-81

;WAS

INPUT

IF NOT

;REPORT

CONTROL=-C

PROGRAM STOP

JEND OF TEST HALT
JAFTER END CF
:

PRESS

TEST HALT

CONTINUE

TO RESTART

JPICK UP MESSAGE POINTER
;ADJUST RETURN PC
;WAIT FOR XMIT DONE

JSEND CHARACTER
;1S THIS END OF MESSAGE?
;BR IF NOT
JRETURN

<CR><LF>/PAR]ITY/
<CR><LF>/FRAMING/
<CR><LF>/0OVERFLOW/
<CR>XLF>/STOP/

FCHO

TEST

108

{ZDLDHO DL11=w 11744 MFM SLU

07-JuL-81

15:03

PAGE 82

SEQUENCE

109
oA

ECHO TEST

MACRO M1113

YT MY

3801
3802
3803

.EVEN

;*THIS ROUTINE

;*THE OCTAL

WILL

OUTPUT ALL

CODE 040 --> 377

LA ASRASARRRRRERRSRRRRRRR

WRITABLE

THE

(HARACTERS

FOR

.‘:'."Qtt"lt'fi".'.fi.i"‘i'..t.tli't.

;%32 CHARACTERS ARE PRINTED ON EACH LINE
;*THE

3812

PATTERN

IS REPEATED EVERY

THREE

LINES

3813

020050

001370
004737

020054 "001063
105777
020056
100404
020062
032701
001353
020072
000754
020074
020100
020102

005077
000000
000746

;LOAD FIRST WRITABLE

a(TCSR
2%

;WAIT FOR DONE

MOV

TSTR
BPL

MOV
INCB

TSTR

aCRCSR

JANY

8IT
BNE

#3177 ,R1
OUTTST

sFINISHED ONE PASS OF WRITABLE
;BR IF YES
s IF NOT WRITE NEXT LINE

(LR

a(RBUF

BMI]

000260

BR
162556

3%:

(HARA(TER

CHAR COUNT PER LINE

;s TRANSMIT A CHARACTER
; INCREMENT CHARACTER (CODE

$CRLF

162572

;LOAD

Ri,a( TBUF
R1

DEC
BNE
JSR

017724

#40,R0

HALT
Bk

RO
2%
PC,.MSG

38
1%

OUTTST

162620

105201
005300

162624

#40,R1

1$:

010177

100375

QUTTST: MOV

000040
000040

_—

012701
012700
105777

".'"..'Q'*i'filt't'fi.itt"""iQitti*tt*'tfi'.t.t"tt'fitt"ttittttl

3814
3815 020020
3816 020024
3817 020030
020034

TERMINAL OUTPUT TEST

.SBTTL

;DECREMENT CHAR COUNT
JBR IF LINE NOT COMPLETE
sSSUE CR,LINE FEED

(HARACTER RECEIVED?

;BR IF YES

;CLEAR RECEIVER

;STOP TEST
JRESTART TEST

CONTINUED

(HARACTERS?

TERMINAL

3836
3837
3838
3839
3840
3841
38462
3843
3844
3845
3846
3847
3848
3849
3850
2851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889

QUTPUT

TEST

MACRO M1113

020104
020130
020154
020221
020243
020300
020324
020350
020373
020436
(020467
020522
020563
020626
020657
020712
020753

103
103
124
124
124
103
103
103
102
103
103
122
102
1C3
103
122
102

101
101
103
103
103
101
101
101
m
101
101
105
1M
101
101
105
mm

116
116
123
123
123
116
116
116
124
116
116
123
124
116
116
123
126

EMI1:
EMZ:
EM3:
EMé6:
EMS:
EM6:
EM7:
EM10
EM1I
EM12
EM1
EMI14
EM15
EMI16:
EM17:
EM20:
EM21:

021476
021534
021564
021616
021656
021704
021744
021776
022027
022063
022120
022120
022154
02201
022231
022306
022332
022370
022426
022470
022470
022517
022543
022610
022634
3890 022660
3891 022726
3892 022764

114
103
103
122
104
102
103
102
122
122

113
101
10
105
125
111
101
1
124
124

123
116
116
123
101
126
116
124
103
103

EM34:
EM35:
EM36:
EM37:
EM4O:
EM4T:
EM42:
EM43:
EM44:
EM4S:
EMG7:
EM46:
EM50:
EMS]:
EMS2:
EMS3:
EMS4:
EMS6:
EMS7:
EMSS:
EM60:
EM61:
EM62:
EM63:
EM64:
EM6S:
EMo6:
EM67:

021016
021053
021104
021137
021200
021243
021302
021333
021366
021434

130
103
103
122
102
122
103
103
103
102

115
101
101
105
m
103
101
101
101
111

111
116
116
123
1264
126
116
116
116
124

122
122
122
122
103
130
130
130

124
124
105
124
114
115
115
115

103
103
123
103
117
111
111
111

130
130
114
122
122

115
115
117
103
103

111
111
101
126
126

122
122
122

103
105
104

126
123
122

EM22:
EMZ23:
EM26:
EMZ5:
EM26:
EM27:
EM30:
EM31:
EM3Z:
EM33:

07-JUL-81

LASCIZ
.ASCIZ
LASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
LASCIZ
LASCIZ
.ASCIZ
LASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

15:03

PAGE 83

SEQUENCE

/CAN NOT ACCESS TCSR/
/CAN NOT ACCESS TBUF/
/TCSR DONE NOT CLEARED WITH TBUF FULL/
/TCSR DONE NOT SET/
/TCSR DONE NOT SET WITil RESET/
/CAN NOT ACCESS RCSR/
/CAN NOT ACCESS RBUF/
/CAN NOT ACCESS LKS/
/BITO OF TCSR NOT CLEAR AFTER RESET/
/CAN NOT SET BIT0 OF TCSR/
/CAN NOT CLEAR BITO OF T(CSR/
/RESET DID NOT CLEAR BITO OF T(SR/
/BIT2 OF TCSR NOT CLEAR AFTER RESET/
/CAN NOT SET BiTZ2 OF TCSR/
/CAN NOT CLEAR BIT2 OF TCSR/
/RESET DID NOT CLEAR BIT2 OF TCSR/
/BIT6 OF TCSR NOT CLEAR AFTER RESET/

ASCIZ
.ASCIZ
LASCIZ
.ASCI1Z
.ASCIZ
.ASCIZ
.ASCIZ
LASCIZ
LASCIZ
ASCIZ

LASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
ASCIZ
.ASCIZ
LASCIZ
ASCIZ
ASCIZ

/XMIT INTERRUPT AT PRIORITY 7/
/CAN NOT SET BIT6 OF TCSR/
/CAN NOT CLEAR BIT6 OF T(CSR/
/RESET DID NOT CLEAR BIT6 OF T(SR/
/BIT6 OF RCSR NOT CLEAR AFTER RESET/
/RCVR INTERRUPT WITH PRIORITY 7/
/CAN NOT SET BIT6 OF RCSR/
/CAN NOT CLEAR BIT6 OF RCSR/
/CAN NOT CLEAR BIT6 OF RCSR WITH RESET/
/BIT6 OF LKS NOT CLEAR AFTER RESET/
/LKS INTERRUPT WITH PRIORITY 7/
/CAN NOT SET BIT6 OF LKS/
/CAN NOT CLEAR BIT6 OF LKS/
/RESET DID NOT CLEAR BIT6 OF LKS/
/DUAL ADDRESSING ERROR/
/BIT6 OF LKS NOT SET AFTER RESET/
/CAN_NOT (LEAR BIT7 OF LKS/
/BJT7 OF LKS DOES NOT SET/
/RTC INTERRUPT AT PRIORITY 7/
/RTC INTERRUPTS WHEN DISABLED/

LASCIZ
.ASCIZ
ASCIZ
LASCIZ
LASCIZ
LASCIZ
LASCIZ
CASCIZ

/RTC INTERRUPT DID NOT OCCUR/
/RTC DOUBLE INTERRUPT/
/RESET DID NOT INTERRUPT/
/RTC INTERRUPT DID NOT CLEAR WITH BIT7 OF LKS/
/CLOCK REPEATABILITY/
/XMIT INTERRUPTS WHEN DISABLED/
/XMIT INTERRUPTS AT PRIORITY 7/
/XMIT INTERRUPTS WITH ENABLE CLEAR/

LASCIZ
LASCIZ
ASCIZ
ASCIZ
.ASCIZ
.ASCIZ
LASCIZ
.ASCIZ

/XMIT DID NOT INTERRUPT/
/XMIT RE=-INTERRUPTED/
/LOADING TBUF DID NOT CLEAR
/RCVR ACTIVE NOT SET/
/RCVR DONE NEVER SET/

INTERRUPT/

/RCVR ACTIVE NOT CLEARED WITH DONE SET/
/RESET DID NOT CLEAR RCVR DONE/
/RDR ENABLE DID NOT (LEAR RCVR DONE/

110

ArA
A
A

TIDLDHO DL11=w 11/44 MFM SLU

3949

[e Yo 3o Yo Ve No Yo No Yo Yo Yo

L —
b wd —
) ——d
d
wd el
) e

001072
001072
001072
000000

EM71:
EM?73:
EM74:
EM72:
EM7S:
EM76:

EM?77:

EM100:
EM101:
EM102:

EM103:
EM104:
EM10S:
EM106:
EM107:
EM110:

LASCIZ
LASCIZ
LASCIZ
JASCIZ

LASCIZ
JASCIZ

LASCIZ

.ASCIZ
.ASCIZ
.ASCIZ

.ASCI2Z

EM114:
EM115:
EM116:
EM117:

.ASCIZ
.ASCI?
.ASCIZ
.ASCIZ
.ASCIZ
_ASCIZ
LASCIZ
.ASCIZ
_ASCIZ
.ASCIZ
_ASCIZ
L.ASCIZ

DH1:
DHZ:
DH6:
DH7:

ASCIZ
ASCIZ
LASCIZ
ASCI2Z

DH4LO:

JASCIZ

EM111:
EM112:

EM113:

SEQUENCE

/READING RBUF DID NOT CLEAR RCVR DONE/
/RCVR INTERRUPTS WITH ENABLE CLEAR/

/RCVR
/RCVR

INTERRUPTS AT PRIORITY 7/
INT RQST PASSED WITH ENABLE

CLEAR/

/RCVR DID NOT INTERRUPT/
/RCVYR RE=INTERRUPTED/
/READING RBUF DID NOT CLEAR INTERRUPT/
/RESET DID NOT CLEAR RCVR INTERRUPT/

/'OR' FLAG DID NOT SET/
/'ERROR' NOT SET WITH 'OR' FLAG/
/BREAK DID NOT XMIT ALL ZEROES/
/BREAK DID NOT SET °'FR' ERRCR/
/DATA (OMPARE ERROR/

/LO0OP-BACK DATA (OMPARE ERROR/
/TIMEOUT IN EXERCISER TEST/
/INCORRECT RECEIVE COUNT/
/DATA (OMPARE ERROR IN EXER(CISER/
/TRAP CATCHER/
/NO CLK INTERRUPT IN EXERCISER/

/' ERROR'' NOT SET WITH "FR'' FLAG/
/RCV ACTIVE NOT CLEAR WITH INIT/

/RCV ACTIVE WITHOUT °''START'' BIT/
/RDR ENABLE NOT

CLEAR WITH RCV ACTIVE/

ERROR#
ERR PC
ERR PC
ERR PC
ERR PC
ERR PC

T(CSR/
[BUF/
RCSR/
RBUF/
LKS/
GOOD

BAD/

_ASCI?Z
.ASCIZ

/TESTH
/1EST#
/TESTH
/TESTR

ERR
ERR
ERR
ERR

RC(CSR
RCSR
RCSR
RCSR

DATA/
GO0D
TRANS
OLDPC

M1:

<CR><LF>?CZDLDHO DL11=-W 11/44 MFM St U?

040

M2:
M2A:

LASCIZ
EVEN
ASCI1]
ASCIZ

DI1:
DT2:
DT6:

.EVEN
.WORD
.WORD
.WORD

DT10:
DT40:

. WORD
.WORD

cnd

w—d et

)

b ——)

/TESTA
/TESTA
/TESTH
/TESTH
/TESTH
/TESTH

002640
002642
002634
002636
002674
001020
002674

002634
002634
002634
002634

DH10:

ASCIZ

DH53:

JASCIZ

DH110:
DH112:

.ASCI2
ASCIZ
.EVEN

DH103:
DH105:

DT?7:

DTS3:
DT103:
DT105:
DT110:
DT112:

ENDADR:

.WORD

.WORD
.WORD
.WORD
.WORD
.WORD

.WORD

/TESTH

ERR PC
PC
PC
PC
PC

LKS

DEVICES UNDER TEST

(NT

(NT2/
8AD/

RCV/
TRAP ADR/

$STESTN,SERRPC,TCSR,0
$TESTN,SERRPC,TBUF
,0
$TESTN,SERRPC ,RCSR,0Q
$TESTN,SERRPC
,RBUF ,0
$TESTN,SERRP(C,LKS,0
STESTN, SERRPC, SGDADR, $BDADR, 0
$TESTN,SERRPC,LKS,FIRST
,SECND,O
$TESTN,SERRPC ,RCSR,$8DDAT,0
$TESTN,SERRPC ,RCSR,$GDDAT ,$8DDAT, 0
$TESTN,SERRPC ,RCSR,XMTCNT ,RCVCNT 0
$TESTN, SERRPC ,RCSR,OLDPC ,BDVE(T,0
0
JEND ADDRESS FOR C(HECKSUM AND SAVE
;OF WRAP AROUND C(ONSOLE TEST

m
_a_ds
A
A

EM?70:

H
9
PAGE 83-1

15:03

b
)
—

B ONO = =NOONINCNONIN
O = S WIS NVNNVW=—-O0NOr
PNV
DO

—)—l—l—lo—l—d-—l—l—l—l—l—l—l-—l—l—l—l—fl
D
—

POPLNLPLALNLNNINVNND
WWWWINWWWWWWN

001072
001072
001072
001072
001072
001072
001072
001072

—

015
040

oro

012

07-JuL-81

(VARG LV AV, AV, LV, RV, AV, LV, LV

o
i
—
b
d
b
D
e
b ed
e
el
e
)
ed
e
md
el ed
o

QOOOO—=NO—===0NNO-0000
B NWNWWNINND 0N =2 NN WVNIWNTVHNWNG

—

b —d
b
b
D
b rd ed
—d md

M BV
=N =000
2NV

D
—ed
e
D
b
b ——d
md
ved

015

—

3946
3947 025222
3948

105

OOOO0OOOOCOOO

3943
3944
3945

——

3898
3899
3900
3901
3902
3903
3904
2905
3906
3907
2908
3909
3910
3911
3912
3913
3914
3915
3916 024220
3917
3918 024265
3919 024312
3920 024337
3921 024364
3922 024411
3923 024435
3924 024471
3925 024536
3926 024573
3927 024637
3928 024703
3929
3930 024754
3931
3932 025014
3933 025016
3934
3935
3936 025046
3937
3938
3939
3940
3941
3942

S BN
NN

2897

QOOOOOOO0OO

3893 023027
3894
3895
3896

OOOC
WA

TEST

OVLVNINLNLNUMNLNUNNON)

TERMINAL OUTPUT

NUNNVO
OO

MACRO M1113

CZDLDKO DL11-w 11/44 MFM SLU

AREA

CZDLDHO DLY1=w 11/44 MFM SLU
TERMINAL

3950

QUTPUT

TEST

000001

MACRO M1113

07-JuL-87 15:03
.END

1.9
PAGE 83-2

SEQUENCE

112

"
[

000003
000014
002454
014520
014010
104406

AMSGL G=
AMSGTY=

AMTYP1=
AMTYP?2=

AMTYP3=

AMTYP4=

APASS =
APR]IOR=
APTCSU=
APTENV=
APTSI1Z=
APTSPO=
APTSZD

ASWREG= 000000
ATESTN=

AUNIT

AUSWR

AVECQI1
AVECTZ2=
BOVECT
BEGIN
003774

013630
002444
007330
002564

013432

006246
012354
015674
000015
002656
002654
000200
002666
002664
002662
002660
002672
002624
002670
177570
003014
024265
024411
024536

023454
023513
023551
023606
023631
023666
020373
023720
023750
024010
024025
024063
024122
024161
024220

020436
020467
020522
020563
020626
020657
020130
020712
020753
021016
021053
021104
0:1137

FIRST
FLAG44

MPAR
MSG

025014
025016
014316
002620
002436
020020
015206
015146

022370

002336
002002

015176
015106
015076
177772

= 000240
002566
000000
000040
000100
000140
000200
000240
000300
000340
177776

177776
PSW
PUTLIN
014030
PWRVE(C= 000024
RBUF
002636

RBUF 58= 176502
RCSR

002634

RCV
RCVCNT
RCVDON
RDCHR =
RDLIN =
RESTTE

013614
002440
010346

RCSRS58= 176500

104407
104410

014236

masmas
o
oA
&
&

017763
017775
017752
017724
020010
024754

MOR

022426
020300
022470
022517
022543
022610
022634
022660
022726
022764
020324
023027
023074
023243
023136
023174
023243
023272
023316
025222
025222
004676
014272
014416
002612
104000
000004

EM6
EM60
EM6]
EM62
EM63
EM64
EM6S
EM66
EM67
EM7
EM70
EM71
EM72
EM73
EM74
EM75
EM76
EM77
ENDADD=
ENDADR
ENDB7
ENDEV
ENDMG
ENDSTK
ERROR =
ERRVEC=

MFR

EMS7

EMS56

014126

014062
014432
104405
HT
000011
004620
iD
INIT
003462
IOTVEC= 000020
002432
JIMSTK
LF
= 000012
002674
LKS
LOC1
002340
LOC2
002342
MANL
003502
= 000007
MFPT

001000

025066
025076
003664
017600
000030
020104
020350
023363
023426

GETB
GETLIN
GOAGIN
GTSWR

[

000004
000010
000020
000040
000100
000200
000400

025056
025116
025130

021200
021243
020154
021302
021333
021366
021434
021476
021534
021564
021616
020221
021656
021704
021744
021776
022027
022063
022120
022120
020243
022154
022201
022231
022306
022332
022470

100000

000774
12,570
025046
025106
025144
025156
025172
025206

EM26
EM27
EM3
EM30
EM31
EM3?
EM33
EM34
EM3S
EM36
EM37
EMé
EM4O
EM41
EML2
EM43
EMb4
EM&S
EM46
EM47
EMS
EM50
EMS1
EM52
EMS3
EM54
EM55

——
——
=

N) = b
b =
VSN
—=O

[
T
)

o odooRveNocdvedooRookoo)

BIT3

000100
000200
000400
001000
000002
002000
004000
010000
020000
040000

024573
024637
024703
024312
024435
024471
024337
024364
001042

ADEVCT
ADEWM
ADR
ADRTBL
AENV
=
AENVM =

—_——

TR T

TAN ]

000000
000000

DH105
DH110
DH112
DH?2
DH4LO
UHS3

000000
000000

TR
T U
R I

003014
000001
000001
000002
000004
000010
000020
000040

SEQUENCE

176500

J
9
PAGE 83-3

ABASE
ACDW]
ACDWS
ACPUOP

15:03

TABLE

SYMBOL

(07-JuL-81

R
po]

(ZDLDHO DLI1=W 11744 MFM SLU

MACRO M1113

—

. ABS.

025224
000000
ERRORS DETECTED:

000
001

013062
013636

001003
001015

$PASS
$PASTM

$EOPCT

014350

$OVER

015660

.$X

1817
TURBUF
TURCSR
TUTBUF
TUTCSR
TVECT
TYPE =
TYPOC =
TYPON =
TYPOS =
VCTADR
VCTTBL
VECT
WACTV
WAIT
WDONE
WRAP
WRPSW
wT
XCONT
XMIT
XMTCNT
XRET
$APTHD
$SATYC
$ATY1
$ATY3
$ATY4
$AUTOB
$8BASE
$8DADR
$8DDAT
$CHARC
$CKSWR
$CMIAG
$CM3 =
$CNTLG
SCNTLU
$CPUOP
SCRLF
$DEVCT
$DEVM
$DOAGN
$ENDAD
SENDCT
SENULL
SENV
$ENVM
$EOP

005012
003006
003004
003012
003010
002650
104401
104402
104404
104403
003670
002742
004152
010230
017732
010362
013640
014502
010316
013604
013542
102442
013610
000500
015722
015676
015704
015714
001034
0011472
001022
001026
016504
016736
001000
000000
017473
017466
001114
001063
001076
001144
014406
014376
014356
014412
001106
001107
014326

SERROR
$ERRPC
$ERRTB
$ERRTY
$ERTTL
$ESCAP
$ETABL
$ETEND
$FATAL
$FFLG
$FILLC
$FILLS
$GDADR
$GDDAT
$GET42
$GTSWR
$HIBTS
$ICNT
$ILLUP
$INTAG
$SITEMB
SLF
SLFLG
SLPADR
SLPERR
$MADR1
$MADRZ
$MADR3
SMADR4
SMAIL
sMaMS1
$MAMS?2
$MAMS3
SMAMSS
$MBADR
SMFLG
SMNEW
$MSGAD
SMSGLG
SMSGTY
$MSWR
sMTYP1
sMTYP2
$MTYP3
$MTYP4
SNULL
SNWTST=
$OCNT
SOMODE

014544
001016
001146
014726
001012
001060
001106
001146
001070
016142
001056
001055
001020
001024
014366
017006
000500
001004
015356
001035
001014
001064
016141
001006
001010
001120
001124
001130
001134
001066
001116
001122
001126
001132
000502
016140
017511
001102
001104
001066
017500
001117
001123
001127
001133
001054
000001
016732
016734

001074
000506

$POWER 015364
$PWRDN 015212
$PWRMG 015346
$SPWRUP 015264
$QUES
001062
$RDCHR 017220
$SRDLIN 017350
$RDSZ = 000010
SRTNAD 014410
$SAVR6 015362
$SCOPE 015374
$SETUP= 000137
$STUP = 177777
$SVLAD 015624
$SVPC = 000500
$SWR = 161000
$SWREG 001110
$SWRMK= 000000
$STESTN 001072
$T7KB
001046
$TKS
001044
$TN
= 000047
$TP8
001052
$TPFLG 001057
$TPS
001050
$TRAP
017522
$TRAP2 017544
$TRP = 000011
$TRPAD 017556
$TSTM
000504
$STSTNM 001002
$STTYIN 017456
STYPE
016144
S$STYPEC 016356
$TYPEX 016506
$TYPOC 016534
$TYPON 016550
$TYPOS 016510
SUNIT
001100
SUNITM 000510
$USWR
001112
$VECT1
001136
SVECT2 001140
$XOFF = 000023
$XON = 000021
$XTSTR 015406
$$GET4= 000000
$OFILL 016733
.SERRT
001146
= 000500

ALl
AN

005536
004020
002640
176504
014162
000060
002626
002630
002632
007342
002652
000064
000034
000014
004050
003646
004172
005044
005252
005404
005544
005614
005764
006154
006262
004244
006522
006720
007054
007222
007410
007520
007646
010012
004316
010156
010462
010554
010700
011102
011304
011512
011656
004466
012014
012200
012414
012576
012744

$ERFLG
$ERMAX

TST45
TST46

TCLOCK
TCONS
TCSR
TCSR58=
TIMER
TKVEC =
TMP1
1MP2
TMP3
TOLER
TPSW
TPVEC =
TRAPVE=
TRTVEC=
TSTDEV
TSTDVM
TST1
TST10
TST11
TST12
TST13
TST14
TST15
TST16
TST17
TST2
TST20
TST21
TST22
1ST23
TST24
TST25
TST26
18127
TST3
TST30
TST31
TST32
TST33
TST34
TST35
TST36
TST37
TST4
TST40
TST41
TST42
TST43
TST44

004714
004760

TA
002610
TBITVE= 000014

RSTRT
014472
RTCPSW 002700
RTCVT
002676
RVECT
002644
R6
=X000006
R7
=%000007
SAVEPS 002434
SAVETE 014202
SAVED
002344
SAVLOC 002346
SCOPE = 000004
SCPSW
002452
SECND
002616
SETADR 004100
SHIFT
003740
SIZE
003512
SRPSW
002450
STACK = 0C1100
START
003046
STKLMT= 177774
STPSW
002446
SWR
001040
SWREG
000176
SWw0
= 000001
SWO00 = 000001
sw01
= 000002
SwO2 = 000004
Sw03 - 000010
SW04 = 000020
SWO5
= 000040
Sw06 = 000100
Sw07 = 000200
SWw08 = 000400
SWw09 = 001000
Sw1
- 000002
Sw10 = 002000
SW11
- 004000
Swi2 = 010000
Sw13 = 020000
SwW14 = 040000
Sw15 = 100600
swZ2
= 000004
sw3
= 000010
Swé
= 000020
WS
= 000040
Swé6
= 000100
sw7
= 000200
Sw8
= 000400
SWw9
= 001000

1STS
TST6

114

TBUF
002642
TBUF 58= 176506

SEQUENCE

RESVEC= 000010
RPSW
002646

K_9
PAGE 83-¢

TABLE

07-JUL-81 15:03

AR A

SYMBOL

MACRO M1113

(ZDLDHO DL11-w 11/44 MFM SLU

(ZDLDHO DL11~W 11/44 MFM SLU
SYMBOL

TASLE

MACRO M1113

07-JuL-81 15:03

VIRTUAL MEMORY USED:
40488 WORDS
( 159 PAGES)
DYNAMIC MEMORY:
20034 WORDS
( 77 PAGES)
ELAPSED TIME:
00:17:06
CZDLDH.BIN,CZDLDH/CR/~SP/NL
: TO(C=CZDLDH.MLB/ML ,CZDLDH.P11

PAGE 83-5

SEQUENCE

115

SYMBOL CROSS REFERENCE
SYMBOL
ABASE
ACOWY
ACDW2
ACPUOP
ADDWO
ADDW1
ADDW10
ADDW11
ADDW12

ADDW13

ADDW14
ADDW1S
ADDW2
ADDW3
ADDW4
ADDWS
ADDW6
ADDW?7
ADDW8
ADDW9
ADEVLT
ADEVM

ADR
ADRTBL
AENV
AENVM
AFATAL
AMADR1

AMADR?2
AMADR3

AMADRY
AMAMS1
AMAMS
2
AMAMS
3
AMAMSS
AMSGAD
AMSGLG
AMSGTY

APASS
APRIOR
APTCSU
APTENV
APTS12
APTSPO
APTSZD
ASWREG
ATESTN
AUNIT

ON 7-JuL-81 AT 15:10

REFERENCES

#17-1435

116
VO

21-1482

482
682

482

482
482

21-1482

#77-3731

73-3592
30-1967
77-3688
30-1988

000000

21-1482

PAGE 1

SEQUENCE
CREF

21-1482

—

AMTYP1
AMTYP?2
AMTYP3
AMTYP4

MACRO

—l-—l—l-—l—l-—l—l—l—l-—l-—l—l—l—l—l—l—i_&—lm—l—l—l—)—)—l—l-—)—l—l—fl—l—l—l—l N
~ SN
O (¥ L ¥ ¥ 3 ¥ o F W
o] ©0 00 0000
W 00 00 00 00 00 G0 000030 00
—
wvinonoroNorOrN PRI~
~N RN

CREATED BY

*®r
¥
NONLALALNLNLNLNLALNL
NN NV NPV NN NN WWWNNI NI NDALNL N NNV N AL AL NV NN N PO PN
B
T R
I
e e
e R R
R
R
e I R
e
R
B
R
Py
]

CZDLDH

21-1482
21-1482
21-1482

21-1482
21-1482
30-2088
30-1942
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
21-1482
78-3735
77-3686
#77-3728
#77-3730
30-1990
21-1482

21-1482
21-1482

30-2083

N77-3729

78-3735
#30-2016

78-3735

54~-2805
56-2864
58-2944
63-3090
67-32
40
#17-1433
#17-1433
#17-1433
#17-1433
40-~2351
42-2403
45-2483
47-2569
49-2625
52-2744
58-2938

67-3242

000200

#17-1433

BIT8
BIT9

000400
001000
000003
000014

#17-1433
#17-1433
#17-1440
#17-1433

69-3429

[ Fa W W

63-3086

64-3126

73-3603
43-2429
64-3117
54-2799

76-3669

54-2809

56-2828

33-2141
342203
56-2822
57-2893

33-2146
35-2220
54-2830
57-2897
60-2999
64-3130

33-2147
53-2759
54-2838
57-2907
60-3004
64-3137

4£3-2430

49-2659

60-2365
42-2415
45-2527
48-2595
51-2687
57-2882

39-2321

44-2469

33-2157
53-2775
54-2843
57-2912
61-3026
65-3152

33-2159
54-2785
55-2846
58-2920
62-3058
65-3177

33-2162

39-2322
40-2367
42~24617
46-2531
68-2601
51-2694
57-2883
61-3025

39-2327
41-2375
43-2441
46-2540
48-2605
51-2704
57-2902

422387
43-2442
46~2544
48-2613
52-2719
57-2911

40-2341
42-2393
642459
66-2565
49-2624
52-2728
58-2927

44=2470

45-2518

4£8-2609

66-3186

e o

]

38-2282
56-2869
64-3132

62-3054

76-3669

38-2281
56-2863
64=3121

FaValala ¥

38-2261

76-3669

38-2276
56-2860
63-3114

30-1981
30-1989
39-2304

40-2352
42-2404
45-2491
47-2575

50-2663
53-2754
59-2967
67-3243
30-1987
69-3448
38-2254

T T

73-3587
76-3669
64-3143
33-2140

364-2193
564-2815
57-2884
59-2961
63-3110
30-2053
67-3291
39-2314
40-2358
42-2410
45-2495

47-2579

50-2676
53-2760
59-2983

67-3258

44-2666

69-3451
63-3079

59-2966

63-3115

60-3012
67-3315
69-3470

TM
AlNAIa

81-3778

61-3038
82-3828

36-2329

67-3235

IAIAIAIA

62-3067
62-3072
33-2129
34-2180
56-2812
56-2877
58-2948
63-3104
69-3357

54-2793

25-2852
58-2934
62-3066
65-3181

67-3239

34-2168

38-2275
54-2826
63-3109

#17-1433

#17-14
#17-1
#17-1
#17-1
#17-1
”7-1
#17-1
#17-1
#17-1
#17-1
#17-1
#17-1433
#17-1433
#17-1433
#17-1433

63-3096
67-3287

38-2266
54-2782
63-3103
67-3309

38-2256

6£9-2648

T I
[ O
T
T
A
I
T
I
T
T
I

#17-1433
#17-1433

BIT7

BPTVEC

30-2060
38-2295
63-3081
66-3194

38-2291
56-2874
64-3136

000010
000020
000040
000100

83-3946

BIT6

100000
000004

21-1482

#30-1894
#30-2058
#69-3336
#17-1433

BITS

000001
000002
000004
000010
000020
000040
000100
000200
000400
001000
000002
02000
004000
010000
020000
040000

21-1482
21-1482

BIT3

BIT4

BIT00
BITO
BIT02
BITO3
BITO4
317105
BIT06
BIT07
BITO8
BITO9
BITI
BIT10
BIT11
BIT12
BIT13
BIT14
BIT1S
BITZ2

TR T I

BITO

REFERENCES
¥17-1437
#17-1436

PAGE ¢
117
SEQUENCE
CREF
vO1

AVECT?

BDVECTY
BEGIN
BGNADD

AT 15:10

000400
000300
000000
002622
003774
03014
000001

AUSWR
AVECT

ON 7-JuL-81

O‘J\JVTJ\J\J\I\J
L)
)

SYMBOL CROSS REFERENCE
SYMBOL
VALUE

MACRO

PN
N N A NP
N
NN NN NN N W
N
N NN N N N N NN NN

CREATED BY

(ZDLDH

CZDLDH

CREATED BY

SYMBOL CROSS REFERENCE
SYMBOL
VALUE
BUF
002454
CAT(CH
014520
CHKSUM
014010
= 104406
CKSWR
CLK
013630
CLKCNTY
002444
(MPARE
CNTLP
comMp
CONT
CONT4I
CPSAVE
(R
CRBUF
CRCSR
CRLF
(RPSW
CRVECT
CTBUF
CTCSR

002656

002654
= 000200
002666
202664
002662
002660

(TPSW
CTSTFL

002672
002624

CTVECT
DDISP
DEVADR
DH1

002670
= 177570
003014
024265

DH10D

024411

DH103
DH105
DH110
DH112

024536
024573
024637
024703
024312
024435
024471
024337

DHZ

DH40

DHS3
DH6

DH7

DISPLA
DI SPRE
DSWR
DT1

024364
001042
000174

= 177570

025046

MACRO

ON 7-JuL-81

REFERENCES
#30-1886

PAGE
AT 15:10
SEQUENCE
CREF

67-3248

67-3282

6€9-3385

#69-3410
#80-3745

*67-3220

67-3276

17-1458

#72-3558

73-3602

76-3669
#67-3326

69-3369
67-3237

#30-1882
49-2641
#30-1887
#67-3284
#46=2476

63-3099

764-3618
217-1433

#49-2644

642475
#63-3107
76~3669

#30-1918
#30-1917
#30-1922
#30-1921
#30-1920
#30-1919

81-3757
34-2180

¥17-1433

54-2838
58=-2944
65-3177

#30-1924
#30-1900

34-2191

47-2569
#30-1923

#17-1433
#30-1942

22-1485
23-1549
27-17)0
23-1519
26-1656
29-1807
29-1817
30-1831
30-1841
22-1490
25-1637
27-1690
22-1510
28-1744
29-1787
30-1866
23-1514

#21-1482
#17-1469
#17-1433

22-1486

B 10

*67-3326

69-3372
67-3292

30-1888
81-3799
81-3760
30-2007

81-3798

3
118
vO1

78-3735

*76-366%

30-1888
83-3930

81-3761

30-2064
78-3735

76-3669

30-1889
83-3932
82-3832
81-3758

*76-3669
71-3535

#76-3669
78-3735

78-3735

31-3796

81-3797

54~2812
57-2907

54-2822
57-2912
63-3115

54-2830
58-2934
64-3137

33-2150

82-3826

81-3760
36-2193
55-2852

82-3819

59-2966
81-3789

81-3791
34-2203
56-2877
60-3004
82-3817

$3-2775
57-2893
62-3066

54=2793
57-2897
63-3104

63-3110

*30-1957
38-2258
48-2595

+30-1983
38-2268
49-2624

*30-2063
38-2284
62-3051

31-2103
41-2375
63-3083

32-2120
4£2-2387

44-2459

45-2483

67-3272

342178
46-2531
*70-3531

21-1482

30-1967
30-2024
22-1500

23-1524
24-1568
27-1720
25-1627
26-1676

24-1578

23-1534

23-153%9
24-1583

23-1544
27-1695

25-1642
26-1686

26-1646
30-1846

#83-3922

25-1607
28-1769
30-1826

27-1730
28-1774
30-1851

28-1734
29-1778
30-1856

28-1739
29-1782
30-1861

23-1530

23-1535

23-1540

23=1545

56-2843
58-2948
65-3181

30-1992
22-1495
23-1554

27-1705
25-1612
26-1661

27-1710
25-1617
26-1666

69-3336
22-1505
24-1563
27-1715
25-1622
26=1671

30-1821

30-1836

#83-3926

24-1588
28-1749
29-1792

24-1593
28-1754
29-1798

24-1598
28-1759
29-1803

25-1602
28-1764
29-1812

*30-1967
30-1967
21-1482
22-1496

*30-1967

73-3582

76-3669

30-1967
22-1501

22-1506

23-1525

#83-3925

#83-3927
#83-3928
#83-3919
#83-3923
#83~3924

#83-3920
#83-3921

24-1558

64-3123

33-2132

67-3233

#83-3918

26-1651

D110

025106

DT103
DT105
DT110
DT112
DT2

025144
025156
02%172
025206
025056

D153
D16

025130
025066

DT40

D17

ODVADT

ECHO
EMTVEC
EM1
EM10
EM100
EM101
EM102
EM103
EM104
EM105
EM106
EM107
EM1
EM110
EM111
EM112
EM113
EM114
EM115
EM116
EM117
EM12
EM13
EM14

EM15
EVi6
EM17
EM2
EM20

EM21
EM22
EM23
EM24
EM25
EM26

025116

025076

003664

017600
= 000030
020104
020350
023363
023426
023454
023513
023551
023606
023631
023666
020373
023720
023750
024010
024025
024063
024122
024161
024220
020436
020467
020522

00563
020626
020657
020130
020712

020753
021016
021053
021104
021137
021200

ON 7-JuL=~81 AT 15:10

REFERENCES

PAGE

SEQUENCE
CREF

c 10

119
VOl

24-1564
27-1716
25-1623%
26-1672

23-1550
27-1701
23-1520
26-1657
29-1808
29-1818
30-1832
30-1842
22=14N
25-1638
27-1691
22=-1511
28-1745
29-1788
30-1867
23-1515

241574
271726

—25-1633

26-1682

24-1579

24~-1584

27-1696

25-1643
26-1687

26-1647
30-1847

#83-3940

27-1731
28-1775
30-1852

28-1735
29-1779

#83-3936

26-1652

#83-3944

246=1594
28-1755
29-1799

30-2022

81-2784
*30-1967

17-1474
#17-1433

22-1484
23-1518
29-1791
29-1797
29-1802
¢9-1806
29-1811
29-1816
30-1820
30-1825
23-1523
30-1830
30-1835
30-1840
30-18.5

)

SYMBOL CROSS REFERENCE
SYMBOL
VALUE

MACRO

N ENTo Yo RV, To AV, F W

CREATED BY

[s Yo

CZDLDH

#83-3859

24=1599
28-1760
29-1804

25-1603
28-1765
29-1813

25-1608
28-1770

30-1827

30-1857

28-1740
29-1783
30-1862

CZDLDH

(REATED BY

SYMBOL CROSS REFERENCE
SYMBOL

EM27
EM3
EM30
EM31

EM32
EM33
EM34
EM35
EM36
EM37
EM4
EM4O
EM41
EM4L2
EM43

EMLS
EM4S
EML6

EM4L7

EMS
EM50
EMS1
EMS2
EMS3
EMS4
EMS5
EMS6
EMS7
EM6
EMO0
EM61
EM62
EME3
EM6L
EMOS
EM66
EMG7
EM7
EM70
EM71
EM72
EM73
EM74
EM75
EM76
EM77
ENDADD

ENDADR
ENDB7
ENDEV
ENDMG
ENDSTK

VALUE

021243
020154
021302
021333

021366
021434
021476
021534
021564
021616
020221
021656
021704

MACRO

ON 7-JuL-81 AT 15:10

REFERENCES

264-1592
22-1694
24=1597
25-1601

#83-3860
#83-3840
#83-3861
#83-3862

26-1650

#83-3872

021744

25-1606
25-1611
25-1616
25-1621
25-1626
25-1631
22-1499
¢5-1636
25-1641
26-1645

022027
022063
022120

26~1655
26-1660
26-1665

021776

922120

020243
022154
022201
022231
022306
022332
022470
022370
022426
020300
022470
022517
022543
022610
022634
022660
022726
022764
020324
023027
023074
023243
03136
023174
023243
023272
023316
- 025222

025222
004676
014272
014416
002412

26-1670

22-1504
26-1675
26-1680
26-1685
27-1689
27-1694
27-1699
27-1704
27-1709
22-1509
27-1714
27-1719
27-1724
27-1729
28-1733
28-1738
28-1743
28-1748
23-1513
28-1753
28-1758
28-1763
28-1768
28-1773
29-1777
29-1781
29-1786
#69-3337

69-3337
34-2198
67-3305
71-3534
#30-1876

PAGE 5

SEQUENCE
120
CREF
vO1

#83-3863
#83-3864
#83-3865
#83-3856
#83-3867
#83-3868
#83-3841
#83-3869
#83-3870
#83-3871
#83-3873
#83-3874
#83-3876

#83-3875

#85-384¢
#83-3877
#83-328/78
#83-3879
#83-3880
#83-3581
#83-3884
#83-3882
#83-3883
#83~3843
#83-3885
#83-3886
#83-3887
#83-3888
#83-3889
#83-3890
#83-3891
#83-3892
#83-3844
#83-3893
#83-3894
#83-3897
#83-3895
#83-3896
#83-3898
#83-3899
#83-3900
69-3413

#83-3947
34-2215
#70-3526
#71-3535

69-3505
#34-2217

69-3522

D10

r—

CREATED BY

CZDLDH

SYMBOL CROSS REFERENCE
VALUE
SYMBOL
= 104000
ERROR

MACRO

ON 7-JuL-81 AT 15:10

REFERENCES
#17-1433

35-2230
39-2318
42~2395

45-2502

50-2681
54-2823
58-2950
64-3141

016126
014062
T

014432

GOAGIN
GTSWR

104405

000011
004620

LKS

LOC1
L0C2

MANL
MFPT
MFR
MOR
MPAR
MSG
MSTOP

M1
M2

M2A
NOEOP

OLDPC
oLDSUM
oUTTST
PFECDF
PFECDH

ID
INIT
IOTVEC
JIMSTK
LF

wNEANERR

GETB
GETLIN
GNS

FLAMGGSL

= 000004
002336
003002

ERRVEC
FIRSY

002674

002340
002342
003502
- 000007
017763
017775
017752
017724
020010
024754
025014

025016
014316

015146

72-3562
217-1433
#30-1871

#30-1933

63-3081
69-3381
69-3376
80-3745
80-3745

71-3534
#80-3745
#17-1433

65-3178

30-1967

+30-1967

*30-1960
64-3121

80-3745
80-3745

*30-1976
65-3159
69-3468
69-3453
80-3745
80-3745

78-3735

#30-1893
#30-1879
17-1475

764~3618
74-3618

67-3262

54-2795
57-2899
62-3074
67-3268

49-2657
54-2802
57-2908

63-3105
67-3279

41-2382
44-2481

50-2673
54-2813
58-2936
63-3112
67-3297

*76~3669

£9-2648

67-3287

56-2782
67-3309

54-2826

56-2860

62-3049

80~3745
80-3745

80-3745
80'3345

80-3745
80-3745

80-3745

71-3535

78-3735

81-3796

81-3797

42-2404
66-2469
(°-2504
662543
47-2580
48-2613

42-2410
64-2470
45-2508
462544

42-2411

662540
47-2578
4£8-2606

44-2467
45-2496
46=2541
47-2579
48-2609

42-2415
45-2490
45-2519
46-2565

42-2417
45-2491
45-2520
47-2574
48-2602
49-2633

81-3771

81-3776

81-3781

#81-2787

82-3823

*69-3370

83-3946
69-3386
82-3829

82-383%4

#69-3466
#69-36443

#72-353%7

34-2187

*30-1967

41-2378

46-2461

45-2494
46-2539
47-2576
48-2605
492637

*69-3364
*69-3365

#81-3797
#81-3798
#81-3796

34-2213

52-2748
56-2872
61-3043
66-3217

40-2370

44-2473

34=2194
39-2311

*76-3669

81-3772
81-3777
81-3767
81-3766
81-3782

*30-2055
70-3529

40-2362
442464
£8-2618

60-2348
42-2420
66-2562

34=-2181
39-2306

*76-3669

#30-1989

34-2211

33-2163
38-2296

76--3669

30-1986

#17-1434

52-2734
55-2855
60-3016
66-3205

332144
38-2279

*30-1967
83-3942
38-2256
66-3194
69-3472

*{9-2642

81-3798

#30-1872
#30-1873

59-2989

E 10

121
vO1

40-2343
42-2413
46-2549

51-2702
54-2831
59-2973
64-3146

69-3362
30-1488
81-3799

43-2632
452492
45-2527
47-2575
48-260¢4
49-2634

33-2134
38-2270

42-2400
45-2515

#30-1985

#30-1927

SEQUENCE
CREF

31-2105
36-2242
39-2324

30-1984
30-1982

#17-1433
#30-1877
#17-14633

PAGE

£9-2644

34-2195

#34~202

*30~-1967

30-1888
83-3930

42-2393

44-2466
45-2495

67-3239
*€9-348¢4
*69-3486

30-1889
83-3932

42-2403

83-3940

83-3942

4£7-2587
69-2625

30-1973

#81-3799
#83-3930
#83-3932
#83-3933
#70-3531
*72-3561
#82-3815
#74-3618
#74-3618

442476
65-2518
66-2545
4£8-2600
49-2630

48-2601
69-2631

CREATED BY

CZDLDH

| symeoL CROSS REFERENCE
| SYMBOL
PFECOT
PFECEM
PFECWS
PIRG

| PIRGVE

PR4

PRS
PRG
PR7
PS

PSW

| PR2
' PR3

PWRVE
C

RBUF

RBUF 58

RCSRS8

RCV

RCVONT
RCVDON
RDCHR
RDL IN
RESTTE
RESVEC
RPSW
RSTRT
RTCPSW

RTCVY

RVECT

R7
SAVEPS
SAVE TE

SAVEQD

SAvLOC

REFERENCES
#74-3618
764-3618
874-3618
764-3618
#74-3618
74-3618
#17-1433
#17-1433

000200
000240
000300
000340

177776

014030
000024
002636

PUTL IN

RCSR

ON 7=JuL=-81 AT 15:10

AGE

SEQUEN CE
CREF

122

vOl

69-3375

|PROHPT
PRO
PR1

MACRO

176502

002634

= 176500

013614
002440
010346

- 104407
- 104410

#17-1433

69-3373

#17-1433
#30-1907

60-3000
646-3131

#69-3333

#30-1906

40-2365
55-2849
57-2902
60-3002
66-3196
#69-3332
67-3231
#30-1880

54-2783
79-3740

.5
#80-37
69-3382

014236
= 000010
002646
014472
002700

#30-1929

002676

#30-1928

#17-1433
#30-1911
72-3544

67-3304

46-2533
48-2620

002644

#30-1910

=%000006
-2000007

#17-1433
#17-143%
#30-1878

002434
014202
002344
002346

58-2919
60=2997

69-3367

#30-1874
#30-1875

17-1433

69-3360
69-3379
*30-1967
37=-2247
60-3005
54-3138
69-7450
30-2065

*69-3361

#69-3425%

*30-1967
54-2786
61-3027
64-3143
69-3469
30~-2084

*69-3390
69-3432
*75-3626

55-2847

62-3059
65-3156

*75-3627
55-2851

62-3067
65-3168

*75-3636
56-2865

62-3072
66-3207

40-2351

*75-3644

57-2885
63-3091

67-3241

40-2352
564-2818
56-2875

*75-3653

58-2921
63-3095
67-3321

40-2358
54-2828

*75-3654
59-2962

63-3107
83-3939

40-2359
54-2835
57-2891
60-2998

36-2238
56-2789
56-2867
58-2927
61-3029
83-3938

40-23461

67-3254

*67-3322

83-3945

59-2956

59-2958

59-2985

67-3227

67-3232

67-3303

45-2487

4£5-2489

452529

46-2534

46-2536

462567

€7-3228

67-3238

42-2389
66-2535

42-2390
662552

462566

472572

45-2486

£5-2488
472573

65-2505

47-2593

65-2517
48-2598

45-7528

40-2338

40-2372

57-2886
59-2957
61-3045

57-2887
59-2976
67-3224

57-2901
59-2984
67-3231

572913
59-2991
67-3300

58-2918
60~2996

40-2367

55-2853
57-2911
60~-3012
66-3200
69-3448

#67-3321

*67-3245
54~2810

#80-3745

43-24634

56-2863
58-2925
61-3025

67-3263
69-3467
#54-2815

56-2799
56-2869
58-2938
6i-3038
83-3943

54-2809
56-2874
59-2964
63-3093
83-3944

59-2967
63-3098
83-3945

57-2883
59-2983
64-3134
83-3946

65-3166

#69-3516

#72~3548

67-3237

67-3225
4£0-2337
58-2939
60-3018
*30-1967

58-2952
61-3023
*30-1967

*69-3360

69-3390

*6£9-3499
69-3501

69-3516
69-3518

#69-3499

42-242°2

67-3301

59-2955
61-3024
30-1967

‘8‘«’599

CZDLDH

(REATED BY

SYMBOL TROSS REFERENCE
SYMBOL

SCOPE

VALUE

MACRO

ON 7-JuL-81 AT 15:10

REFERENCES

217-1633
39-2298
48~259¢4
57-2881

SCPSw
SECND
SETADR

002452
002616
004100

66-3185
#30-1885
#30-1892
30-2073

SIZE
SRPSW
STACK
STARY
STRLMT
STPSW

003512
002450
= 001100
003046
= 177774
00c&st

#30-1992
#30-1884
#17-1433
17-1473
#17-1633
#30-1883

SHIFTY

SWR

003740

001040

#30-2045

#21=-1482
38-2254
48-2595

SWRE G
SwC
Sw00
Sw(?
Sw02
SW03
SWO4
Sw0S

SWio
<407

SwW08

64-3126
75-364¢€
#17-1470

000176
000001
00000
000002
000004
000010
000020
000040

#17-1433
#17-1633
#17-1433
#17-1433
#17-1433
#17-1433
#17-163%

= 000400

#17-1433

=
=
=
=
=
=

= 000100
= 000200

SW09
Sw1
SW10
Swll
Sw12
w13
SW1é
SW15
Sw2
SW3
S

=
=
=
=
=
=
=
=
=
=
=

000010
000020

#17-1433
#17-1433
#17-1433
#17-1432
#17-1433
#17-1433
2#17-1433
#17-1433
#17-1433
#17-1433
#17-1433

Swb

= 000100

#17-14633

= 000400
= 001000

#17-1433
#17-1433

SwWS

SwW?7
Sw8
SW9

TA
TBITVE

TBUF

001000
000002
002000
004000
010000
020000
040000
100000

#17-1633
#17-1433

= 000040

= 000200
002610
= 000014

002642

31-2096
40-2335
49-2623
58-2914

67-3218
«67-3228
*49-2656
#30-2079

PAGE 8
123
SEQUENCE
CREF
vO?

32-2113
41-2374
50-2662
592953

69-3328
67-3304
83-3942

G 10

33-2127
42-2386
51-2686
60-2992

34-2167
63-2423
52-2718
61-3019

35-2219
44-2458
53-2753
62-3046

36-2235
45-2482
54-2781
63-3078

37-2244
46-2530
55-2844
64-3116

38-2253
47-2568
56-¢859
65-3149

71-3534

30-2054

«67-3227

67-3303

#30-1954

+67-3226

67-3302

30-1967
38-2261

«30-1967
412375

30-"967
42-2387

*3(1=1967
43-2430

*30-1967
442459

30-1981
45-2483

30-1989
46-2531

342214
47-2569

66-3"86
70=-3669
30-19¢7

67-3235
7¢6=3669
79-3740

67-3274
76-3669
79-3740

69-3357
76=366%

73-3587
76=-3669

73-3599
79-3740

73-3603
79-3740

75-3634

492624

49-2659

62-3047

62-3054

63-3079

63-3086

64-3117

64-3119

17-1433
17-1433
17-1433
17-1433
17-1433
17-1433

17-1433
17=-1433

17-1433

17=1433

#17-1433

#17-1433
#30-1889
#17-1433

#30-1909
54-2817
63-3092

69-3378

32=-2116
55-2848
64-3133

34-2169
56-2866
65-3165

34=2174
57-2890
66-3198

35-2221
58-2924
67-3249

35-2224

59-2963
67-3317

532761

60-300
83-3937

53-2764

61-3028

54-2788

62-3061

t CZDLDH

CREATED BY

| SYMBOL CROSS REFERENCE
SYMBOL

| TBUF
58
TCLOCK

;rcows
T{SK

TMR

TTMP?

TMP3
TOLER

TPSW

TPVEC

TRAPVE
TRTVEC

TSTDEV

TSTDVWM

TST1
1S110
TST1Y

TST12

TST13%
T1ST14
IST1S

1ST16

TST17

#69-3335

004020
002640

#30-1908

005536

176504

014162
000060
002626
002630

00263¢
007342

002652
000064
000034
000014
004050
003646
004172
005044
005252
005404
005544
005614
005764
006154

IST2
TST20
TSt

TST22

15123
TST24
15125

TS1%7

B
e
) ol el
—

T1ST33

TST134
1ST35
15736

TST26

18127
TST3
TST30
TST31
TS132

REFERENCES

VALUE
176506

TCSRS58
TIMER
TKVE(C

MACRO

ON 7=-JuL-81

342216
30-2061
33-2162
38-2275
39-2315
51~2687
53-2759
57-2882
53~3096
67-3242

#69-3334

69-3428

#17-1433
#30-1901
#30-1902
#30-1903
49-2646
#30-1913
#17-1433
#17-14633
#17-1433

30-2062

#30-2018

30-2069

#38-2253

°5:10

PAGE 9

SEQUENCE
CREF

124
VO

*69-343

#60-2373%
#30-2063

31-2099
34-2168
38-2276
39-2321
51-2692
53-2760
57-2884
63-3103
67-3258
69-3429
69-3447

33-21461
34-2186
38-2291
39-2329
52-2719
56-2785
60-2999
64-3130

33-2129
34-2170
38-2281
39-2322
51-2694
53-2762
58-2920
63-3109
67-3315

84642458
44-24 )59
#32-2112

45-2483
46-2531
47-2569
48-2595
£9-2624
#51-2686
£52-2718
#53-2753
#33-2127
#54-2781
#55-2844
#56-2859
#57-2881
#58-2914
#59=295%

38-2293
50-2663
52-2726
54-2805
61-3026
64-3132

38-2295
50-2666
52-2728
54-2815
62-3058

64-3136

#69-3484

+*30-2059
+30-1993
«30-2058

+30-2075
*30-2001

30-2072

30-2081
*30-2011
»30-2074

+30-2082
*30-2016
*30-2080

*30-2020

30-2040

7u=3528

30-2067

§52=2721

52-2723

52-2751

67-3226

67-3230

67-3302

*30-1967

#30-2072

30-2023
30-2095

30-2077

70-3532

#31-2096

72-354€

41-2375
42-2387

#42-2386
#63-24623

442459

44~2477

#65-2482

45-2483
46-2531
47-2569
4£8-2595
L9-2624

#46-2530
#47-2568
#48-2594
#469-2623
49-2660

#50-2662

8692648

#60-2335

42-2387

33-2147
35-222¢

33-2157
35-2227
39-2304
50-2676
52-2744
55-2846
62-3062
65-3152

33-2146
35-2220

69-3466

#39-2298

#61-2374
412375

H 10

33-2159
38-2266
39-2314
50-2684
53-2754
56-2864
63-3090
67-3240

72-3543

CZ0LDH~

CREATED BY

SYMBOL
SYMBOL

CROSS REFERENCE
VAL UE
004466

1ST4
1S140
TST4Y
TST42
TST43
TST44

01201¢
012200
012-14
012576
012744

013062
013636

TST145S

1ST46
1S7S
1876
1817
TURBUF
TURCSR

TUTBUF
TUTCSR
TVECTY

TYPE

TYPON
TYPOS

vCTADR
vCTTBL
VECT

WACTV
WAIT
WDONE

WRAP
WRPSW

wT
XCONT
XMIT
XMTCNT
XRET

$APTHD
$ASTAT
SATY(
$ATY1

SATY3
$ATYS

$SAUTOB
$BASE
$8DADR
$BDDAT
$CHARC

ON 7-JuL-81

014502

REFERENCES

015722
015676

015704
015714

001034
001142
001022
001026
016504

110

125
SEQUENCE
vO1
CREF

64=-3120

64-3128

#65-3149

66-3187

66-2197

66-3212

#67-3218

51=-2691
53-2778
34-2210
764-3618

39-2300
51-2705
67-3223
34-2212
7«=3618

39-2301
51=2717
67-3229
71-3534
75-3658

39-2334
52-2720
67-3299
73-3590
78-3735

50-2664
52=2722

50-2665

50-2675
52-2750

50-2685
53-2757

51-2690
532758

764-3618
78-3736
79-3740

74-3618

79-3740
#80-3745

76-3618
79-3740

74-3618
79-3740

764-3618
79-3740

30-2014

#30-2(28

46-2537
51-2706
59-2977

46-2553
52-2724
60-2994

47-2584
53-2755

#72-7551

452506
51-2688
59-2959

47-2570

67-3250

45-2484
50-2668
58-2940

*67-3244

67-3264

=67-3307

83-3945

32-2124

33-213%7

332154

34-218%

34-2196

38-2272

38-2288

32-2124

33-2137

33-2154

34-2183

34-2196

38-2272

38-2288

73-3595

79-3740
30-1943

79=-3740
30-1997

79-3740
30-2005

43-243%7

*43-2439

43-2440

43-2441

43=2444

83-3941

«78-373S

#78-3735

#66-3185

#69-3328
#35-2219
#36-2235
#37-2244
#30-1935
#30-1934
#30-1937
#30-1936
#30-1912

#30-1932
#30-2991
#54-2789
#81-3789
#54-2818
#69-3357

39-2302

48-2596

53<2755
61-3032

#30-1881

#63-3078
#64-3116

002442
013610
200500
&

PAGE

62-305¢
63-3088

#54-2806

LA R

5:10

#62-3046
62-3048
63-3080
64-3118

010316

013604
013542

#36-267

79-3740
74-3618
#80-3745
#80-3745

TYPO(

MACRO

79-3740
74-7618

30-2028
30-2094
54-2792

81-3790

54-2821
70-3530
40-2339
48-2610

57-2888
67-3221
54-2808

67-3314
67-3229

#67-3317
#67-3307

67-3316

#67-3318
#19-1480

19-1480

31-2107

77=-3679
877-3677
#77-3678

31-2107

#77-3680
#21-1482
#21-1482
#21-1482
#21-1482
*+78-3735

#77-3681

78-3735

79-3740
79-3740

30-2090

81-3793
42-2391
48-2621
58-2916

243-2435

+43-2436

+78-3735

78-3735

*63-3098

79-3740
#80-3745S

52-2737

~65-3176

*66-3215

*67-3295

83-3943

83-3944

52-2738
60-3006

61-3021

CZOLDN

CREATED BY

| SYMBOL CROSS REFERENCE
SYMBOL

$CKSWR
SCMTAG
- $CM3
$CNTLG

VALUE

MACRC

ON 7-JuL-81 AT 15:10

REFERENCES

PAGE 11
SEQUENCE
126
CREF
VOl

016736
001000
= 000000
017473

#79-3740
#21-1482
#21-1482
79-37640

80-3745
30-1967
21-1468¢
#79-3740

80-3745
30-19¢7

$CRLF

001063

#21-1482

73-3590

764-3618

$OEVCT
$DEVM
$DOAGN
$ENDAD
SENDCT

001076
001144
014406
014376
014356

#21-1482
#21-1682
71-3534
18-1478
30-1967

+30-1958
+30-1994
71-3536
#71-3534
#71-3534

BENV
SENVM

001106
001107

#21-1482
#21-1482

30-1985
30-1967

SEOPCT
$ERFLG
SERMAX
$ERROR
$ERRP(

014350
201003
001015
014544
001016

*30-1967
#21-1482
#21-1482
30-1967
#21-1482
83-3939

#71-3534
+73-3580
+30-1967
#73-3579
+73-2584
83-3940

$CNTLU
$CPUOP

SENULL

$EOP

$SERRTB

017466
001114

014412

014326

001146

79-3740
#21-1482

79-3740

#71-3534

4£9-2661

#22-14872

30-1907

30-1967

74-3618

764-3618

74-3618

78-3735

34-2208
+30-2000
#71-3534
73-3610

+«70-3527
+30-2003

70-3528
*30-2010

*72-35642

30-2060

30-2072

73-3592
30-1987

77-3686
77-3688

77-3710
78-3735

78-3735
78-3735

71-3534
76-3669
+76-3669

76-3669
76-3669

*76~-3669
76~3669

76-3669

+73-3585
83-3941

73-3586
83-2542

83-3943

74-3618

83-3936

73-3608

*76-3669

«77-3717
78-3735

n77-3725
4£3-2442

83-3941
83-3944

#79-3740

79-3740

69-3391

74-3618

79-3740

#71-3534

SERRTY
SERTTL
$ESCAP
$ETABL
$ETEND
$FATAL
$FFLG
$FILLC
$FILLS
$GDADR
$GDDAT
$GET42
$GTSWR
$HIBTS
$ICNT
$ILLUP

014726
001012
001060
001106
001146
001070
016142
001056
001055
001020
001024
014366
017006
000500
001004
015356

73-3589
#21-1482
#21-1482
#21-1482
16-1480
#21-1482
*77-3677
#21-1482
#21-1482
#21-1432
#21-1482
#71-3534
#79-3740
#19-1480
#21-1482
75-2626

#74-3618
+73-3583
+30-1967

73-3606

#21-1482
+30-1954
«77-3680
78-3735
78-3735
*43-2632
*43-2440

«77-3714
77-3708
78-3735
78-3735
+43-2434
43-2444

80-3745

75-3644

#75-3662

SITEMB

001014

#21-1482

+73-3586

73-3594

S$INTAG

SLF
SLFLG
$LPADR
$LPERR
$MADR1
$MADRZ2
$MADR3
$MADRS

SMAIL
SMAMS 1

001035

001064
016141
001006
001010
001120
001124
001130

001134

001066
001116

#21-1482

79-3740

#21-1482
*77-3718
#21-1682
#21-1482
#21-1482
#21-1482
#21-1482

78-3735
#77-3724
*30-1967
+30-1967

10-1480
#21-1482

19-1480

#21-1482

J 10

82-3825

43-2435
+65-2175

74-3618

30-2017

83-3944

+66-3214

*67-3296

79-374C

79-3740

78-3735

79-3740

75-3660
73-3605

+76-3669
76-3669

*76-3669
*76-3669

76-3669
76-3669

#21-1482

30-1967

76-3669

78-3735

74-3618

83-3945

76-3669
76-3669

83-3937
83-3946

76-3669

78-3735

83-3938

CZDLDH

CREATED BY

'SYMBOL CROSS REFERENCE

MACRO

ON 7-JuL=~81 AT 15:10

VALUE
001122
001126
001132
000502

REFERENCES
#21-1482
#21-1482
#21-1482
#19-1480

SMNEW

017511

79-37640

#79-3740

79-37240

#79-3740

MFLG

016140

*77-3678

$MSGAD
SMSGLG
SMSGTY

001102
001104
001066

#21-1482
#21-1482
#21-16482

tMTYPY

001117

#21-1482

sMTYP3
SMTYPS

001127
001133

#21-1482
#21-1482

SMSWR

SMTYP?
SNULL

SNWTST

017500

001123
001056
= 000001

016732
016734
015660
001074

$PWRDN

018272

$PASTM
$POWER
$PWRMG
$PWRUP

$QUES

$RDCHR

000506
015364

*77-3694
#77-3699
*30-1955

77-3697

«77-3715

30-2096
33-2167

78-3735
#31-2096
#34=2167

78-3735
'31-2113
#34~2219

31=-2113
34-2219

#32-2113
#35-2219

#35-2235

32-2127
35-2235

#33=2127
#36-2235

#39-2335
#462-2423
#45-2530

30-2335
L2-2423
65-2530

#40-2335
#43-2423
w46-2530

#60-2374
#43-2458
#46-2568

40-2374
432458
46-2568

2612374
W#44<-2458
W#47-2568

#61-2386
#44-2482
#47-2594

L41-2386
442482
47-2594

#42-2386
#45-2482
#48-2594

*78=3736
+78-3736
76-3669
#21-1482

*78-3736
+78-3736
76-3669
+30-1967

«78-3736

*78-373¢

#78-3736

*71-3534

71-3534

30-1967

#75-3665
#75-3626

79-3740

]
79-5740

79-3740

*75-3455

*75-3656

#75-3664

#17-1465
17-1465
30-1967

17-1465
#17-1465

#17-1465
30-1967
30-1967

17-1465
30-1967
30-1967

#17-1465
30~1967
30-1967

#21-1482

#30-2096
#33-2167

#48-2623
#51-2718
#54-2844
#57-2914
#60-3019
#63-3116
#66-3218

#19-1480
75-3659

78-3735

36=2244

(8~2623
51=2718
54-2844
57-2914
60-3019
63-3116
66-3218

#37-2244

#4L9-2623
#52-2718
#55-2844
#58-2914
#61-3019
#64=-3116
#67-3218

#78-3736
78-3736
#76-3669
34-2206

80-3745

#79-3740

80~-3745

80-3745

SRDOCT
$RDSZ
$RTNAD

= eneseen
= 000010
014410

$SAVRE
$SAVR6
$SCOPE
$SETUP

- wewexe
015362
015374
= 000137

F R22222

#21-1482
80-3745

80-3745
#79-3740
#71-3534

#75-3644

78-3735

#37-2253

#49-2662
#52-2753
#55-2859
#58-2953
#61-3046
#64=-3149
#68-3328

37-2253

492662
§52=2753
55-2859
58-2953
61-3046
64-3149
68-3328

#38-2253

#50-2662
#53-2753
#56-2859
#59-2953
#62-3046
#65-3149
#69-3328

#32-2127

#38-2298

#50-2686
#53-2781
#56-2881
#59-2992
#62-3078
#65~3185

38-2298

50-2686
53-2781
56-2881
59-2992
62-3078
65-3185

#39-2298

#51-2686
#54=-2781
#57-2881
#60~2992
#63-3078
#66-3185

75-3653

#79-3740

17350

#77=-3723

77=-3712

017220

001062

vOI

«77-3700

#75-3659
75-3636

= txsnrn

$R2A

«77=-3719

015346
015264

SRODEC

$RDL IN

77-3684

127

77-3692

#36-2244

SOCNT
$OMODE
$OVER
$PASS

PAGE 12

SEQUENCE

CREF

SYMBOL
SMAMS 2
SMAMS 3
SMAMSS
SMBADR

K 10

78-3735

79-3740

80-37/,5

80-3745
*75-3635
30-1967
#17-1465
17-1465
30-1967
76-3669

75-3645
#76-3669
17-1465
#17-1465

30-1967

79-3740

30-1967

17-1465
30-1967

71-3534

#17-1465
30~1967
71-3534

CREATED BY

CZDLDH

ISYHBOL CROSS REFERENCE
$SVLAD
$SvPC

$SWR

v ALUE

1772777

"nn

SYMBOL
$STUP

015624
000500

161000

$SWREG
$SWRMK
$TESTN

001110
002000
001072

$7KB

001046

$TKS

001044

$TN

000047

MACRO

ON 7-JuUL-81 AT 15:10

$TRAP?2
$TRP

001052
001057
001050
017522
017544
000011

$TRPAD
$TSTM
$TSTNM

017556
000504
001002

$TTYIN
$TYPBN
$TYPDS
$TYPE

017456
L2 2

L2288
84

016144

L 10

SEQUENCE
128
V0!I
CREF

REFERENCES
#17-1465
#17-1465
#17-1465
#17-1465
76-3669
76~3669
18-1478
#18-1478
#17-1439
21-1482

17=-1465
#76-3669

61-2374

4£2-2386

44-2458

71-3534
76-3669

71-3534
76-3669
76-3669

31-2096
40-2335
49-2623
58-2914
67-3218
76-3669

76-3669
#21-1482
76-3669
#21-1482

83-3941

#21-1482
79-3740
#21-1482
79-3740
#17-1438
#33=-2127
#36-2235
#39-2298
41-2386
#44-2458

46-2531
4£8-2623
#51-2686

$TP8
$TPFLG
$TPS
$TRAP

PAGE

#54-2781
#57-2881
#60-2992
#63-3078
#66-3135
#21-1482
#21-1482
#21-1482

30-1967

#80-3745
#80-3745

32-2113

50-2662
59-2953
69-3328

76-3669
76~3669
30-1967

*30-1956

83-3942

78-3735
79-3740
78-3735
79-3740

30-2096
33-2167
36~22644
39-2335

42-2386
442459
4£6-2568
49-2623

51-2718
564-2844

57-2914
60-3019
63-3116
66-3218
78-3735
78-3735
58-2922
#80-3745
80-3745

80-3745

17-1465

#17-1665
#17-1465

21-1482
33-2127

76-366%

76-3669
76-3669

74-3618

*76-3669

78-3735

78-3735
79-3740
31-209¢

34-2167
37-2244

40-2335
#462-2386
44-2482
47-2568
#49-2623

52=2718
55-2844

58-2914
61-3019

64-3116
67-3218
78-3735
78-3735
78-3735

17=1465
17-1465

30-1967
35-2219

30-1967
36~2235

30-1967
37-2244
46-2530
55-2844
64-3116
71-3534

30-1967
38-2253
47-2568
56-2859
65-3149

30-1967
39-2298

76-3669
76-3669

76=3669
76-3669
76=-3669

45-2482

542781
63-3078
71-3534

76-3669
76-3669

48-2594
57-2881

66-3185

76-3669
76-3669

83-3937
83-3946

83-3938

83-3939

83-3940

79-3740

78-3735

79-3740

#31-2096
#34-2167
#37-2244
#60-2335
42-2387
45-2482
#47-2568
49-2624
#52-2718
#55-2844
#58-2914
#61-3019
#64-3116
#67-3218
78-3735
78-3735
78-3735

31-2113
34-2219
37-2253

32-2113
35-2219
38-2253

#32-2113
#35-2219
#38-2253
41-2374
#463-2423

32-2127
35-2235
38-2298

33-2127
36-2235
39-2298
41-2375
44-2458

78-3735

*40-2373
42-2423
#45-2482
47-2569
49-2662

40-2374
43-2423
45-2483
47-2594
50-2662

55-2859
58-2953
61-3046
64-3149
68-3328

56-2859
59-2953
62-3046
65-3149
69-3328

52=2753

53-2753

45-2530
48-2594

#50-2662

#53-2753
#56-2859
#59~2953
#62-3046
#65-3149
#69-3328

#41-1374

4£3-2458
46-2530
#48-2594
50-2686

#46-2530
48-2595
51-2686

56-2881
59-2992
62-3078
65-3185

57-2881
60-2992
63-3078
66-3185

80-3745
80-3745

80-3745
80-3745
80-3745

53-2781

564-2781

78-3735
#80-3745

80-3745
80-3745

#80-3745

#80-5745

80-3745
80~-3745
80-3745

#80-3745

80-3745

80-3745
80-3745
80-3745
80-3745

80-3745

#80-3745

*70-3526

*71-3534

73-3582

76-3669

*76-3669

76=3669

76-3669

79-3740

#79-3740

80-3745

80-3745
80-3745

80-3745
80-3745
80-3745

#80-3745

80-3745
80-3745

#80-3745

#21-1482
76-3669

79-3740

*40-2373
76-3669
79-3740

77-3705

#78-3735

80-3745
80-3745

#17-1465
#17-14665

83-3936
83-3945

#80-3745

#17-1465
#17-1465

83-3944

80-3745
80-3745
80-3745
80-3745
80-3745

#19-1480

-1465
=1465

53-2753
62-3046

51-2686
60-2992

83-3943

#17-1465
#17-1465

80-3745

CZDLDH

CREATED BY

SYMBOL CROSS REFERENCE
SYMBOL
VALUE
STYPEC
016356
STYPEX
016506
$TYPOC
016534
$TYPON
016550
$TYPOS
016510
SUNIT
001100
SUNITM
000510
SUSWR
001112
SVECT]
001136
SVECT?2
f
$XOF
$XON
$XTSTR
$SGE TS
$OF ILL
016733
A REN
$40CAT
. SERRT
001146
. $X
000500

MACRO

ON 7-JuL-~81 AT 15:10

REFERENCES

78-3 735
78-3735
#78-3736
78-3736

#78-3736
#21-1482
#19-1480
#21-1482
#21-1482
#21-1482

78-3735

78-3735
#7€-3669
#71-3534
«78=-3736
76~-3669
#22-148%
#19-1480

PAGE

m10

129
SEQUENCE
vO1
CREF

78-3735
78-37325

#78-3735
#78-3735

79-3740

*30-2076

*30-2079

*72-3548

*30-1963

65-3169

66-3208

78-3735

79-3740

71-3534
*78-3736

78-3736

#78-3736

78-3735
78-3735

80-3745

#78-3736

80-3745
*30-1959
30-1951
30-2029
78-3735

19-1480

80-3745
80-3745

—

CZDLDH

CREATED BY

MACRO

ON 7-JuUL-81

MACRO CROSS REFERENCE
MACRO NAME
REFERENCES
#17-1378
#61-2375
CLKTIST

COMMEN
CTESTS
DISMNT

#17-1433
#17-1386
#17-1399

ENOCOM
ENDPAS
ESCAPE

#17-1433
#17-1382
#17-1433
#17-1433
#17-1433
#17-1433
#17-1428

GETPR]

GE TSWR
MULT
NEWTST

54-2843
59-2966

38-2298
4(8-2623
58-2953

#60-2373

34-2180
55-2852
60~3004

AT 15:10

#6-2531

34-2193

34-2203
57-2893
63-3104

53-2775
57-2897
63-3110

54-2793
57-2907
63-3112

56-2877
62-3066

#17-1433

£9-2662
59~2992

30-2096
40-2374
50-2686

41-2386

60-3019

51-2718
61-3046

54-2786
64-3131

55-2847
65-3156

56-2865
67-3241

39-2335

#17-1433

#31-2107

#32-2124

80-3745

#17-1433
#'7-1433

SWRSU
TRMTRP
TYPBIN
TYPDEC

TYPNAM
TYPNUM

TYPOCS
TYPOCT
TYPTXT
XMTDLY

$CLKTS
$SCMRE
SSCMTM
$$FSCA

31=-2096
36-2235

41-2374
46-2530
51-2686
56-2859
61-3019
66-3185
75=-3625
79-374(

#17-1433
#80~-3745
#17-1433

#17-1433
#17-1433
#17-1433
#17-1433
#17-1433
#17-1433
#17-1405
#17-1371
#20-1482
#20-1482
#17-1433

#47-2569

#48-2595

#69-2624

54-282°2
$8-2934
65-3177

54-2830
58-2944
65-3181

54-2838
58-2948

#71-3534

REPORT

#17-1433
#17-1433
#17-1394
#17-1429

SEQUENCE
130
CREF ~ vO
#45-2483

#17-1433
#17-1433

#17-1433
#80-3745
#17-1429

N 10

#44-2459

#17-1429
#17-1429
#17-1415

SETPRI
SETTRA
SETUP
SriP
SLASH
SPACE
STARS

#42-2387

POP
PUSH
RECDLY

63-3091

PAGE

#17-1433

31-2096
36-2235

31-2113

52-2753
62~3078

36-2219
44-2482
54-2844

45-2530

64-3149

55-2859
65-3185

35-2235

36-2244

47-2594

66-3218

57-2914
68-3328

62-3059

58-2921

59-2962

60-3000

61-3027

#33-2137

#33-2154

#34-2183

#34-2196

#38-2272

#38-2288

80-3745

80~-3745

80-3745

17=1444

18-1478

19-1480

21-1482
34-2167
39-2298

21-1482
352219
40-2335

30-1967

32-2113
37-2244

32-2113

37-2244
42-2386
47-2568
52-2718
57-2881
62-3046

38-2253
43-2423
48-2594
53-2753
58-2914
63-3078

75-3643

76-3669

42-2386
47-2568
52-2718

75-3625
79-3740
#30-1967

75~3641
79-3740

#30-1967

74-3618

79-3740

#34-2218
41-2375

#53-2780
42-2387

#54-2797
44-2459

57-2881
6°-3046

19-1480

33-2127

67-3218
80-3745

34-2167
39-2298

642458
49-2623

44-2458
49-2623

54-2781
59-2953
64-3116

56-2781
59-2953
64-3116

69-3328

58-2914
63-3078
69-3328

81-3749

81-3754

82-3807

82-3813

#62-3077
45-2483

46-2531

47-2569

£8-2595

77-3673

71-3534
77-2675

73-3567
78-3735

37-2253

46-2568
56-2881

57-2885

41-2374
46-2530
51-2686
56-2859

61-2019
66-3185

32-2127

42-2423

45-2482

50-2662
55-2844
60-2992
65-3149
73-3577
78-3736

49-2624

21-1482
35-2219
40-2335
45-2482
50-2662
55-2844
60-2992
65-3149
74-3618
79-3740

(ZDLDh

(REATED BY

MACRO

ON 7-JuL-81 AT 15:10

MACRO CROSS REFERENCE
MACRO NAME
REFERENCES
#17-1428
#17-1433
SINEWT

$$SET
$SSETM
$$SKIP
.ECUAT
.EQUIV

.SETUP
CBACTT
.$APTB
.BAPTH
LSCMTA
.SEOP
.$ERRO
.SERRT
.SREAD
.$SCOP
.$TRAP
.S$TYPE
CSTYPO

38-2298
(8-2623
58-2953

#80-3745
#30-1967
#17-1433
#17-143%2
#17-1391
17-1433
17-1433
#17-1429
#17-1430
#17-1430
#17-1430
#17-1431
#17-1431
#17-844
#17-1289
#17-1431
#17-1025
#17-1428
#17-1428
#17-1428

36-2335

49-2662
59-2992

#80~3745
#30-1967

#17-1433

#17-7429

17-1433
17-1433

#17-1465

18-1478

#21-1482
#19-1480
#20-1482
71-3534

#74-3618

79-3740

76-3669
#80-3745
78-3735
#78-3736

30-209¢6

PAGE

B 11

131
SEQUENCE
CREF
vO1
312113

32-2127

36-2219
442482

36-2244
46-2568
56-2881

40-2374
50-2686

41-2386
51-2718

42-2423
52-2753

#80-3745

#B80-3745

#80-3745

17-1433
17-1433
17-1433

17-1433
17-1433

60-3019

61-3046

62-3078

66-3218

37-2253

47-2594

57-2914
68-3328