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AH-8529F-MC

February 1981

111 pages

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Document:	CZDLDF0 KD11-Z,DL11-W DL11-W-1144 MFM SLU FEB 1981 bw
Order Number:	AH-8529F-MC
Revision:	000
Pages:	111
Original Filename:	CZDLDF0__KD11-Z,DL11-W__DL11-W-1144_MFM_SLU__AH-8529F-MC__FEB_1981_gray.pdf

OCR Text

DL11-W/1144

MFM

CZDLDFO

SLU

AH-8 529F-MC
FICHE 1 OF 1

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COPYRIGH T

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-

05-NOV-80 12:32

B
PAGE 2

1
SEQUENCE 1

.REM

IDENTIFICATION
PRODUCT CODE:

AC-8528F-M(C

PRODUCT NAME:

CZDLDFO DL11-W/1144 MFM SLU

DATE CREATED:

OCTOBER, 1980

MAINTAINER:

DIAGNOSTIC ENGINEERING

AUTHOR:

DAN CASALETTO

REVISED BY:

DAN MILLEVILLE

W BWN

PRI NI PNININD

b s

2O YO NO VWA

2O 000 NN

—

CIDLOFO DLiT1=W/1144 MFM SLU

MACRO M1113

THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT
NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION. DIG!TAL EQUIPMENT CORPORATION ASSUMES
NO RESPONSIBILITY FOR ANY ERRORS THAT MAY APPEAR IN THIS DOCUMENT.
NO RESPONSIBILITY IS ASSUMED FOR THE USE OR RELIABILITY OF
SOF TWARE ON EQUIPMENT THAT IS NOT SUPPLIED BY DIGITAL OR ITS
AFFILIATED COMPANEIS.

CIGITAL
DEC

PDP
DECUS

UNIBUS
DECTAPE

MASSBUS

CIDLDFO DLI1=W/1144 MFM SLU

MACRO M1113 05-NOV-80 12:32 PAGE § SEQUENCE 2

40
“1

&
wh

HISTORY SECTION

CZDLDDO WAS RELEASED OCT 79
THE FOLLOWING CHANGES WERE MADE. ALL CHANGES ARE INDICATED
BY ;*+ IN THE COMMENT FIELD:

1. USE THE MFPT INSTRUCTION,AND IF THE CPU IS A 11/44:

A. ?2;?2' PERFORM READER ENABLE AND RECEIVER ACTIVE
B. IF ERROR FLAGS TESTS AND BREAK TESTS ARE
ENABLED ,PERFORM THESE TESTS ONLY FOR THE SLU

AT 17650C.PERFORM THESE TESTS FOR THE CONSOLE SLU

IF BITO3 OF SWR IS ADDITIONALLY SET.
C. WHILE IN MAINTENANCE MODE DO NOT WRITE AND READ
A “P OR AN ASCII 220. THIS WILL FORCE THE CONSOLE
INTO 'CONSOLE MODE'.
D. IN THE CLOCK REPEATABILITY TEST, ALLOW FOR A
TOLERANCE OF 2 BETWEEN CLOCK COUNTS. TWIS IS TO
ALLOW ENOUGH TOLERANCE WHEN MOS MEMORY IS USED
AND REFRESH CYCLES ARE OCCURING.

. BECAUSE 11/44 SLU INTERRUPT REQUESTS ARE DEPENDANT ON A MFM CLOCK
ENOUGH TIME MUST BE GIVEN FOR THEM TO OCLUR. THEREFORE, ALL TESTS
ASSOCIATED WITH XMIT & RECEIVE INTERRUPTS SHOULD HAVE
A MINIMUM OF & NOP'S ACTING AS WAIT FOR INTERRUPT.

. IT WAS FOUND THAT AN ATTACHED TUS8 WOULD BE ACTIVATED
BY THE DIAGNOSTIC,AND,AS A RESULT,CHARACTERS WOULD BE

SENT TO THE RECEIVER BUFFER.
THIS WOULD CAUSE SOME TESTS TO FAIL. THEREFORE TO INWIBIT
ANY COMMUNICATION TO THE TUS8 FROM THE DIAGNOSTIC:

A.gzeaksl??égrsuAnce MODE IN ALL TESTS THAT WRITE TO

B.IN ALL TESTS THAT WITE TO XMITTER AND BEFORE LEAVING
TEST: DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

SREC2ETRIEAR

;?a{salcur BE IN THE PROCESS OF BEING XMITTED T0

C.DISABLE MAINTENANCE MODE FOR PURPOSE OF ERROR PRINTING
ONLY TO THE SLU WHICH THE TERMINAL IS ATTACHED.

. IT WAS FOUND THAT UPON POWERUP AND WITH THE TUS8 ATTACHED,
CHARACTERS WOULD BE SENT TO THE RECEIVER FROM THE TUS8.
SOME RECEIVER TESTS WOULD FAIL DUE TO THIS. THEREFORE,
ON ALL TESTS THAT PERFORM RECEIVER TESTS AND FOLLOWING
MAINTENANCE MODE BEING ENABLED,DELAY ENOUGH TIME TO ALLOW
TO ALLOW ANY CHARACTERS THAT MIGHT BE IN THE PROCESS OF
BEING RECEIVED TO FINISH,

. ADD SOFTWARE THAT WILL IMPLEMENT AUTO INITIATION OFf
11744 T/A CONSOLE TEST VIA WRAP CABLE FROM TUS8 TO CONSOLE

CIOLDFO DLIT=W/1144 MFM SLU

97
98
99
100
101
102
103
104
105
106

S WO O®NOVEWN=O

D
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D
D ed
D
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PORDIRININY
b o cd
i
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107

MACRO M1113 05-NOV-80 12:32 PAGE 2-1 SEQUENCE 3
PORTS. IT IS SELECTED BY SWR BITO2 AND IS PERFORMED
ONLY AFTER ALL SLUS ARE TESTED.

CZDLDEO WAS RELEASED JuL 80

1. PROGRAM WAS CHANGED TO WORK WITH VECTORS GREATER THAN 377.
CZOLDFO WAS RELEASED OCT 80
1. IN TESTS 17 THROUGH 22 THE CLOCK DONE FLAG CAN GET SET

BETWEEN THE TIME THAT IT IS CLEARED (BIC) AND THE TIME THAT
INTERRUPTING IS ENABLED (BIS). THE (BIC-BIS) COMBINATION
WAS CHANGED TO A (MOV) INSTRUCTION TO SET INTERRUPT ENABLE
AND CLEAR DONE FLAG ALL WITH ONE INSTRUCTION.

2. IN TEST 20, 3 (NOP)'S WERE ADDED BEFORE ERROR +47 TO ALLOW
SUFFICIENT TIME BETWEEN CLOCK FLAG AND CLOCK INTERRUPT.

3. IN TEST 23, THE COUNT DIFFERENCE ALLOWED WAS CHANGED ON
11/44°S ONLY FROM 2 TO 3.

4. TEST 45 HAD SEVERAL PROBLEMS.

A. PROGRAM CAN KICK OUT OF DELAY LOOP PREMATURELY. A FIXED
:
DELAY WAS ADDED.

B. ERROR +113 DID NOT PRINT. A RESET WAS ADDED IMMEDIATELY
BEFORE THE ERROR CALL TO BREAK THE MAINTENANCE WRAPAROUND.
C. CLKCNT WAS NOT INITIALIZED.

CIDLDFO DLI1=W/1144 MFM SLU

FOLLOWING MODULES:

THE

1. DL11-W SERIAL LINE/REAL TIME CLOCK INTERFACE
2. 11/44 MULTIFUNCTION MODULE

THE PROGRAM WILL RUN WITHOUT ANY SPECIAL TEST FIXTURES BY DEFAULT.
HOWEVER, THE FOLLOWING CPTIONAL TESTING IS PROVIDED:
1. TEST TO VERIFY XMIT AND RECEIVE OF THE UARTS WITH
A WRAP CABLE. THE UART UNDER TEST IS LOOPED BACK ON

ITSELF. THIS IS SELECTED VIA OPERATIONAL SWITCH SETTING
BIT 7, AND IS APPLICABLE TO THE DL11W AND 11/44 MFM.

2. AUTOMATIC INITIATION OF THE T/A CONSOLE TEST OF THE 11/44
MFM. THE TUS8 PORTS ARE LOOPED TO THE CONSOLE PORTS

THIS IS SELECTED VIA OPERATIONAL SWITCH SETTING BIT 2

AND IS APPLICABLE TO 11/44 MFM ONLY.
(SEE CKKFBAO FOR T/A CONSOLE TEST EXPLANATION)

THIS DIAGNOSTIC OPERATES ON THE CONSOLE
SERIAL LINE AND CLOCK INTERFACES
AS WELL AS UP TO FIFTEEN(15) ADDITIONAL IDENTICALLY CONFIGURED

SERIAL LINE INTERFACES. THE DEFAULT ADDRESSES ARE:
A. CONSOLE - 177560
177546

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1
SEQUENCE &

GENERAL INFCORMATION

THE

bt 2k b W

E
PAGE &

THIS DIAGNOSTIC IS A LOGIC TEST TO VERIFY THE OPERATION OF

2F 2F 2k

05-NOV-80 12:32

1.1

D
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D

1.0

Al Al AV IV IV IV IV IV. P X

NN
- p— b

N NN (N W NN NN ~N

126
127
128

MACRO M1113

SERIAL LINE
CLOCK

B. OTHER SERIAL LINE - 776500

FIRST SERIAL LINE ADDRESS
OF 15 CONSECUTIVE SERIAL
LINE ADDRESSES

THE PROGRAM IS DESIGNED TO RUN ON ANY PDP-11 WITH 8K OF MEMORY
. IT CAN BE RUN UNDER XXDP,APT, AND ACT MONITORS,
AND ON PROCESSORS WITH NO HARDWARE SWITCH REGISTER,
SOF TWARE SWITCH REGISTER = LOCATION 176
POWER FAILURE IS SUPPORTED FOR SYSTEMS WITH CORE MEMORY.

~NOWN
=0V

b
i
i
il
i
i
il
-

OO0 NNNNN~N

NOTE:

THIS DIAGNOSTIC WITH THE SWR = 000020
(CLOCK TESTS ONLY) SHOULD BE USED ON SWITCHLESS CPU'S
TO TEST KW=11L LINE CLOCK MODULES.

1.2

SYSTEM REQUIREWENTS

1.2.1

STANDARD 11 FAMILY(COMPUTER WITH A CONSOLE OUTPUT DEVICE

MACRO M1113

SN OV~

i
i
b
i
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—

VOO

05-NOV-80 12:32

F
1
PAGE 4-1

SEQUENCE 5

AND 8K OF MEMORY.
OPTIONAL:
1.LO0P CABLE FOR UART LOOP BACK ON ITSELF

CIDLDFO DLi1=W/1144 MFM SLU

2.WRAP CABLE FOR 11/44 MFM T/E TESTING
(SEE DWG. #7016942 WRAP AROUND CABLE
AND SECTION 5.0 OF THIS DOCUMENT)

1.2.2

STORAGE
THE PROGRAM USES 5K WORDS OF MEMORY

CZDLDFO DLIT1=-W/1144 MFM SLU
196

MACRO M1113

05-NOV-80 12:32

1.3

ASSUMPTIONS

6
PAGE 5

1
SEQUENCE 6

IF THE UNIT UNDER TEST (UUT) IS THE CONSOLE , THE PROGRAM WILL
ASSUME THE REAL TIME CLOCK (RTC) IS ENABLED AND WILL TEST IT
UNLESS THE TESTS ARE DISABLED BY BIT6 OF THE SWR.

IF THE UUT IS NOT THE CONSOLE, THE RTC IS NOT TESTED FOR THAT DEVICE.
FOR THE DL11-W:

THE PROGRAM WILL ASSUME THE ERROR FLAG BITS AND THE BREAK FUNCTION
OF THE DL11-W ARE DISABLED AND WILL NOT TEST THESE FUNCTIONS
WN =

NI N LN LN IS [N
e b cd o o

UNLESS ENABLED BY BIT10 (FOR ERROR FLAGS) AND BIT8 (FOR BREAK)
OF THE SWR. THE DEFAULT CHARACTER SIZE IS 8 BITS (SEE PARA 2.3.2).
FOR THE 11/44:

NNV =0O 0V

INSAAS AN LS SIS TS TN TN
POPOPNI A PO NIND = b

NO WV

THE PROGRAM ASSUMES THAT THE ERROR FLAG BITS AND THE
BREAK FUNCTION ARE DISABLED, AND WILL NOT TEST THESE FUNCTIONS
HOWEVER, IF BIT 10 (FOR ERROR FLAGS) AND BIT 08 (FOR BREAK)
OF SWR ARE SET, THEN ERROR FLAGS AND BREAK TESTS ARE PERFORMED
FOR THE TUS8 SLU ONLY. IF BITO3 OF SWR IS ALSO
SET THEN THESE TESTS WILL BE ENABLED FOR THE CONSOLE.
READER ENABLE AND RECEIVER ACTIVE TESTS

?SSC??BNZERFOR"ED SINCE THE 11/44 MFM DOES NOT IMPLEMENT THESE

2.0

OPERATING INSTRUCTIONS

2.1

USE STANDARD PROCEDURE FOR PDP-11 ABSOLUTE BINARY FORMATTED TAPES.
2.2

STARTING PROCEDURE

LOAD THE SWITCH REGISTER WITH SETTING
NOTE: IF USING A CPU WITHOUT HARDWARE SWITCH REGISTER

SOF TWARE SWITCH REGISTER LOCATION = 176.

(FOR A 11/44 CPU USE MFM CONSOLE FOR DEPOSITING

SWITCH REGISTER. TYPE “P TO ENTER CONSOLE)

START AT 200.

AFTER CHECKING THE TRANSMITTER, THE PROGRAM WILL PRINT ITS IDENTIFICATION
AND REPORT THE NUMBER OF DEVICES UNDER TEST (NUMBER IS OCTAL).
UfiggRP¢§§¥ IS PRINTED AFTER A FULL PASS HAS BEEN MADE ON ALL DEVICES
START AT 204.

seaaNOTEwnen

THE "ECHO' TEST WILL BE EXECUTED. AN ‘'+"' IS PRINTED AT THE
BEGINNING OF THE TEST. THE ECHO TEST READS A CHARACTER FROM

CZOLDFO DLi1-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

253
254
255
ggg
258
259
260

261
262
ggz

265

266

A CONTROL=C WALTS THE TEST AND PRINTS “'STOP'* AT THE TERMINAL
CONTINUING RESTARTS THE ECHO TEST.

START AT 210.
teaaNQTERe
THE TERMINAL OUTPUT TEST WILL BE EXECUTED. DEPRESSING ANY CHARACTER
AT THE TERMINAL, HALTS THE TEST. CONTINUING RESTARTS THE TEST.

THE TEST OUTPUTS 32 CHARACTERS ON A LINE AND REPEATS THE
PATTERN EVERY THREE LINES. THE PATTERN IS AS FOLLOWS
(OCTAL CODE 040 ==> 377):

1HSXR () w4, =, /0123456789: ;<=>?

270
S;;

THIS BOTTOM LINE COULD BE THE FOLLOWING IF
DOES NOT HAVE LOWER CASE:

275

276

277
278
279

——————

THE TERMINAL,WRITES THAT CHARACTER TO THE TERMINAL AND
REPORTS ANY ERROR FLAGS SET IN THE RECEIVER BUFFER.

SABCDEFGHIJKLMNOPQRSTUVMXYZ NI

%;2

P ———

SEQUENCE 7

267

%gg

PAGE S5-1

*ABCDEF GH1JKLMNOPQRS TUVWXYZ

SABCDEF GHIJKLMNOPQRS TUVWXYZ [\

(OCTAL CODE)

(040 ==> 077)

(100 ==> 137)

(140 ==> 177) [LOWER CASE ALPHA)
THE TERMINAL

(UPPER CASE ALPHA]

et NOTErwnn

IF THE TESTING ON TERMINIALS OTHER THAN THE CONSOLE IS DESIRED
FOR TESTS B OR C,SEE SECTION 2.3.4. AND 2.3.5. OF THIS DOCUMENT.

s
sste

CIDOLDFO DLI1=W/1144 MFM SLU

MACRO M1113

2.3

05-NOV-80 12:32

I
PAGE 6

1
SEQUENCE 8

OPERATING PROCEDURE

2.3.1
THE DIAGNOSTIC WILL CHECK FOR EXISTENCE OF

SWITCH

REGISTER AT 177570.
IF NO SWITCH REGISTER IS AVAILABLE THE PROGRAM
WILL AUTOMATICALLY USE THE
CONTENTS OF LOCATION
176 AS THE SOFTWARE SWITCH REGISTER. THE USER SHOULD
SET THIS LOCATION BEFORE STARTING THE PROGRAM. IF A
HARDWARE SWITCH IS AVAILABLE AND A SOF TWARE SWR(LOC. 176)

DESIRED,LOAD ALL 1'S INTO LOCATION 177570.(ALL SWITCHES
UP IF PHYSICAL SWITCHES ARE AVAILABLE)

HALT ON ERROR

ENABLE DATA TEST THROUGH LOOP-BACK CONNECTOR
INHIBIT RTC TESTS (ALLOW ONLY SLU TESTS)
ALLOW MANUAL SETTING OF ''SDEVM'' (DEVICE MAP)
INHIBIT SLU TESTS (ALLOW ONLY LINE CLOCK TESTS)
FOR 11/44 MFM: ENABLE BOTH 'BREAK TESTS' AND 'ERROR FLAG
TESTS'

BIT02

FOR THE CONSOLE SLU.

(THIS BIT

IS VALID

ONLY IF BIT10 OR RITO8 IS SET.)
=11/44 MFM OPTION: SELECT AUTO INITIATION
OF T/A CONSOLE TEST VIA WRAP CABLE

FOR DL11-W:

b o

NN NN N N A

NN N

OOV
NN
WM =

LOOP ON PRESENT TEST
INHIBIT ERROR TYPEOUT
UNUSED
UNUSED
ENABLE ERROR FLAGS TESTS
LOOP ON ERROR
ENABLE BREAK FUNCTION TESTS

321

IF THE SOFTWARE SWITCH REGISTER IS USED(LOC. 176) THEN
BUILT INTO THE PROGRAM IS THE ABILITY TO DYNAMICALLY CHANGE THE
CONTENTS OF SWREG DURING PROGRAM EXECUTION. BY STRIKING *G
(CNTL G) ON CONSOLE TTY THE OPERATOR SETS A REQUEST FLAG TO CHANGE
THE CONTENTS OF SWREG, WHICH IS PROCESSED IN KEY AREAS OF

THE PROGRAM

CODE (IE) ERROR ROUTINES, AFTER HALTS END OF PASS, AND OTHER
APPLICABLE AREAS. BECAUSE THIS DIAGNOSTIC USES THE MAINTENANCE BIT
OF THE SERIAL LINE, THE CONTROL-G SHOULD BE ISSUED DURING PROGRAM
TYPEOUTS AT THAT TIME THE MAINTENANCE BIT IS SURE TO BE CLEAR.

IF A CONTROL-G IS DETECTED, UPON EXECUTION THE CONTENTS OF THE SWREG ARE
DUMPED IN OCTAL ON THE CONSOLE TTY AND ANY CHANGES ARE REQUESTED
(1E)

POSSIBLE RESPONSES ARE:

SWR=XXXXXX

NEW=

MACRO M1113

05-NOV-80 12:32
1.

J 1

PAGE 6-1

<CR>

6 DIGITS 0-7

SEQUENCE 9
IF NO CHANGES ARE TO BE MADE

TO REPRESENT IN OCTAL THE NEW SWITCH REGISTER

VALUE ;LAST DIGIT FOLLOWED BY <(CR>.

TO ALLOW REENTERING VALUE IF ERROR IS COMMITTED

KEYING IN SWREG VALUE.

FOR 11744 CPU:

SINCE THE 11/44 HAS A HARDWARE SWITCH REGISTER LOADED _BY_THE MFM CONSOLE
THEN THE DIAGNCSTIC SHOULD ALWAYS FIND EXISTENCE OF 177570.
WHEN OPERATING ON THE 11/44 CPU, DYNAMIC CHANGING OF SWREG(177570) DURING
PROGRAM EXECUTION CAN BE ACCOMPLISHED BY USING
TME MFM CONSOLE. TYPING “P<CR> ON THE CONSOLE TTY WILL ENTER THE

CONSOLE. THIS IS CONSIDERED '‘CONSOLE MODE''.
TO EXAMINE SWREG TYPE ' E SW<CR> ' TO THE CONSOLE PROMPT. TO LOAD THE
SWREG TYPE ' D SW DATACCR> ' WHERE 'DATA" IS AN OCTAL NUMBER.
IN ORDER FOR THE DIAGNOSTIC TO TYPE TO THE TTY IT IS NECESSARY
TO HAVE THE 11/44 MFM IN ''PROGRAM 1/0 MODE''. THIS CAN BE ACCCMPLISHED
BY TYPING ' C<CR> ' TO THE CONSOLE PROMPT. THEREFORE ,WHEN CONSOLE

USE IS COMPLETED, PLACE THE MFM IN ''PROGRAM 1/0 MODETM.

BECAUSE THIS DIAGNOSTIC USES THE MAINTENANCE BIT, “P WILL
NOT BE ACKNOWLEDGED DURING THESE TESTS.THEREFORE, ISSUE *P
DURING PROGRAM TYPEOUTS. AT THIS TIME THE MAINTENANCE BIT
WILL BE CLEARED.

CIOLDFO DLI1=W/1144 MFM SLU

CIZOLDFO DLI1=-W/1144 MFM SLU

MACRO M1113

2.3.2

K 1

05-NOV-80 12:32

PAGE 7

SEQUENCE 10

SETTING BITS PER CHARACTER
THIS PROGRAM DEFAULTS TO TESTING 8 BITS PER CHARACTER.

IF THE
SERIAL LINE IS SET FOR 5-=>7 BITS PER CHARACTER, SET THE
MEMORY LOCATION ''SUSWR'' AS FOLLOWS:

CHAR. SIZE

(# OF BITS)

6
5

"'SUSWR'' CONTENTS

(BINARY)

(OCTAL)

100000000

400

001000000
000100000

100
40

010000000

200

"'SUSWR'' IS USED IN THE DATA PATH TESTS TO LIMIT THE BINARY
ggg?;LngaePATTERN TO THE NUMBER OF BITS SELECTED ON THE

2.3.3

RUNNING UNDER APT

THE APT MAILBOX IS LOCATED AT LOCATION 500, TO ALLOW ADDITIONAL SERIAL
LINE VECTOR ASSIGNMENTS TO THE 400 AREA OF MEMORY.
FOR DL11W:

THE DEFAULT_EXECUTION TIMES PROVIDED($TSTM, $PASTM) ARE FOR EXECUTION
WITH AN 11/34 PROCESSOR, CORE MEMORY , AND 110 BAUD.
FOR 11/44:

THE EXECUTION TIMES PROVIDED IN THE APT SCRIPT THAT FOLLOWS AND

IN SECT., 2.4 ARE FOR EXECUTION WITH A 11/44 PROCESSOR,
16K CORE MEMORY, AND 300 BAUD.

CACHE,

THE FOLLOWING IS A PROGRAM LOAD FILE USED BY APT:
1. E TABLE 'A' IS USED FOR APT DUMP MODE AND RUN TIME MODES.

A. TWO SLU'S ARE TESTED.(SSWREG BIT05=1 AND SDEVM=3)
A SLU AT 177560(DEFAULT CONSOLE SLU) AND AT 176500
(BASE ADDRESS CODE).

B. THE ERROR FLAG AND BREAK TESTS ARE SELECTED FOR THE SLU
AT 176500(TUS8 SLU IN MFG.)
($SSWREG BIT 10 AND 8 =1)
C. THE 'ENABLE DATA TEST THROUGH LOOP-BACK CONNECTOR' TEST
IS ENABLED TO ALLOW TEST 44 TO EXECUTE (SSWREG BIT 7 =1).

2. E TABLE 'B' IS USED FOR APT QV.
IT ACCOMPLISHES WHAT E TABLE 'A'
DOES, WITHOUT THE ENABLE DATA TEST THROUGH THE LOOPBACK CONNECTOR, BUT

ADDITIONALLY IT SUPPRESSES ALL TYPEOUTS TO THE TERMINAL (SENVM=240) AND

SELECTS AUTO TESTING OF T/A CONSOLE TEST VIA WRAP CABLE ($SWREG BIT02=1).
1ST PASS
RUN TIME

LONGEST

TEST TIME

ADD
I T IONAL
RUN TIME

CZOLDFO DLi1-W/1144 MFM SLU
L4
L4g
443
Giak
LS
)
47

MACRO M1113 05-NOV-80 12:32 PAGE &-1 SEQUENCE 11
50

E TABLES
A

SWITCH REGISTER 1

002640

002404

SWITCH REGISTER 2
CPU TYPE/OPTIONS
MEMORY MAP CODE 1
MEMORY MAP CODE 2
MEMORY MAP CODE 3

000400
0070000
000700000000
000700000000
000700000000

000/00000000

000400
00/0000
000700000000
000700000000
000700000000
000700000000

BUS ADDRESS CODE
DEVICE MAP CODE

176500
000003

000003

CTLR. SPEC IFIC WORD 1
CTLR. SPEC IFIC WORD 2

000000
000000

E-MODE /S-MODE
(SENVM/SENV)

($SWREG)

MEMORY MAP CODE &

BUS PRIORITY/INTERRUPT 1
BUS PRIORITY/INTERRUPT 2
($DEVM)

2007000

2407001

CIOLDFO DLI1=-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

L
PAGE 8
SEQUENCE 12

471

472
473

L74
475
476
477
478
479
480
481
482
483
484
485
486
487
4,88

2.3.4

RUN WITH ALTERNATE CONSOLE ADDRESS

TO USE A CONSOLE ADDRESS OTHER THAN 177560, OR VECTOR OTHER
THAN 60, THE OPERATOR MUST SUPPLY THE PROGRAM WITH THE
CORRECT ADDRESSES BY INSERTING THEM AT THE TAG LABELED ''CRCSR'':
CRCSR:
ADDRESS OF RECEIVER RCSR
CRBUF:
ADDRESS OF RECEIVER BUFFER
ADDRESS OF TRANSMITTER CSR
CTCSR:
ADDRESS OF TRANSMITTER BUFFER
CTBUF:
CRVECT: ADDRESS OF RECEIVER VECTOR
CRPSW:
ADDRESS OF ASSOCIAED PSW
CTVECT: ADDRESS OF TRANSMITTER VECTOR
CTPSW:
ADDRESS OF ASSOCIATED PSW
2.3.5

TESTING ADDITIONAL SERIAL LINES

THIS PROGRAM WILL SUPPORT TESTING OF MULTIPLE SLU'S.

IT REQUIRES
THE ADDRESS OF THE FIRST ADDITIONAL RCSR (STORED AT ''$SBASE'') AND
ITS INTERRUPT VECTOR (STORED AT "'SVECT1''); AND WILL BE ABLE
TO ADDRESS ANY SLU STARTING AT THE SPECIFIED BASE ADDRESS UP TO
15 CONSECUTIVE DEVICES.

:
EXAMPLE

$BASE:
776500
$VECT1: 300

THE PROGRAM WILL BE ABLE TO TEST THE CONSOLE PLUS ANY

ADDITIONAL DL11-W SLU'S WITHIN THE RANGE 776500 =-=> 776660

$BASE AND SVECT1 DEFAULT TO 776500 AND 300 RESPECTIVELY.
THE PROGRAM ASSOCIATES UN TM “UMBERS TO DEVICES AS FOLLOWS:
(NUMBERS IN PARENTHES:!S ARE OCTAL)

UNIT# 0 ==>
UNIT# 1 ==>

—

T ppp——

UNITH /

U
v

UNIT# * - >

I
U

UNLT#S

(O LV LV LV LV LV LV LV LV LV LV LV LV ]
PONONDND
= b cd b ed e d d d

W= O VNV
W=

UNIT# 2 -->

CONSOLE CADDRESS STORED AT ''CRCSR')
BASE ADDRESS STORED AT "‘$BASE'
&
ASSOCIATED BASE VECTOR STORED AT''SVECT1
BASE ADDRESS + (10)
BASE VECTOR + (10)
BASE ADDRESS + (20)
BASE VECTOR + (20)
BASE ADDRESS + (303
BASE VECTOR + (30)

BASE ADDRESS + (16?)
BASE VECTOR + (160

VI VI

VWAL

WWWWWNI
N NN
S NN 2OV ~NOMWN

CIZDLDFO DL11=W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

PAGE 9

SEQUENCE 13

STARTING AT LOCATION 200 AND HAVING BIT5 OF SWR CLEAR, THE PROGRAM WILL SELF
SIZE THE NUMBER OF DEVICES (STARTING AT THE BAS ADDRESS) AND
STORE A BIT MAP AT "'SDEVM'' (DEVICE MAP) TO INDICATE WHICH UNIT NUMBERS
ARE PRESENT

AND WILL BE TESTED:

' UNIT

UNIT

cooccecones ! UNIT

seeovvecennt

UNIT

CONSOLE!

A BIT MAP CAN BE ENTERED AT ''SDEVM'' PRIOR TO STARTING THE PROGRAM
SETTING BITS OF THE SWR INHIBITS THE SELF=SIZING AND DEVICE MAP
GENERATION,AND USES THE VALUE STORED BY THE OPERATOR.
EXAMPLE:

SWR = 000040
$BASE:
776500
$VECT1: 300
$DEVM:

C(BINARY

0 000 000 000 100 0001

CRINARY = 0 000 000 000 001 0111

{HE PROGRAM WILL TEST -

UNIT# 0 = CONSOLE

UNIT# 1 = 776500 : 300
UNIT# 3 = 776520 ; 320

:(lDLDFO DLIT=W/1144 MFM SLU

MACRO M1113

2.4

B 2
PAGE 10 SEQUENCE 14

05-NOv-80 12:32

EXECUTION TIMES FOR DL11=w:

(110 BAUD)

LONGEST SUBTEST TIME = 50 SECONDS
PASS TIME

ADDITIONAL DEVICES

FOR 11/44:

= 60 SECONDS

= 55 SECONDS/DEVICE

(300 BAUD)

LONGEST SUBTEST TIME = 50 SECONDS

PASS TIME

ADDITIONAL DEVICES

3.0

= 60 SECONDS

55 SECONDS/DEVICE

ERROR REPORTING

IF A ROUTINE FAILS AND THE INMIBIT ERROR TYPEOUT (BIT13) OF THE SWR
IS NOT SET, A PRINTOUT RESULTS IN THE FORM:
"'(SOME ASCII MESSAGE)"’
TEST#
ERR PC
RCSR

XXX

XXXXXX

CANY APPLICABLE DAT HEADINGS)
[ANY APPLICABLE DATA]

NOTE: "RCSR'' IS DEPENDENT ON THE FAILURE
€ THEREFORE COULD BE TCSR,RBUF ,TBUF ,OR LKS
WHERE ""XXXXXX'' IS AN OCTAL NUMBER.
THIS ERROR PRINTOUT OCCURS PROVIDED THE ERROR THAT EXISTS

WOULD NOT HWINDER THE TYPEOUT. IN CASES WHERE IT IS NOT POSSIBLE

TO PRINT AN ERROR MESSAGE (1.E. FATAL CONSOLE TRANSPITTER
FAILURES), A HALY OCCURS AND THE PC CAN BE EXAMINED BY THE OPERATOR
TO FIND THE ERROR INFORMATION IN THE PROGRAM LISTING.

NOTE: FOR SOF TWARE SWITCH OPERATION, THE SWITCH REGISTER CAN
BE CHANGED BY TYPING A CONTROL=-G AT THE CONSOLE DURING ERROR PRINTOUTS.
AFTER CONTINUING FROM THE ERROR HALT THE OLD SWR CONTENTS
IS DISPLAYED AND THE NEW CONTENTS CAN BE ENTERED.
IF ERROR HALTS ARE DISABLED, THE CONTROL-G RESPONSE OCCURS
IMMEDIATELY FOLLOWING THE TYPEOQUT.

MACRO M1113

05-NOv-80 12:32

PAGE 11

SEGUENCE 15

4.0

6.1

THIS IS A SERIES OF INSTRUCTIONS STARTING AT LOCATION O DESIGNED TO
25;5(5'A=g'639LA?E UNEXPECTED TRAPS TO THE TRAP AND INTERRUPT VECTOR

EACH VECTOR ENTRANCE ADDRESS IS LOADED WITH THE ADDRESS OF THE NEXT
LOCATION. THE NEXT LOCATION IS LOADED WITH A BREAK POINT TRAP (000003).
THUS AN ILLEGAL TRAP OR INTERRUPT CAUSES A TRAP THROUGH THE BPT VECTOR(14)
WHICH POINTS TO THE "'CATCH'' ROUTINE.

O ~NO WV

ooooOrOrOrOrOMOM

R
—

NN —-O

333332

CIOLDFO DLIT=W/1144 MFM SLU

THE "'CATCH'' ROUTINE REPORTS THE PC THAT CAUSED THE ORIGINAL TRAP AND
THE LOCATION OF THE TRAP VECTOR (IF UNDER APT, AN ERROR IS INDICATED TO APT),
AFTER REPORTING THE ERROR THE PROGRAM HALTS. THE PROGRAM MUST BE RESTARTED

AT THIS POINT,

4.2

THIS ROUTINE IS USED TO WRITE THE PSW BY POPPING VALUES FROM THE
g;sg:gsszgs METHOD IS USED TO BE COMPATIBLE WITH ALL 11 FAMILY

6.3

THIS ROUTINE CALL 1S PLACED BETWEEN EACH SUBTEST. IT RECORDS THE STARTING
ADDRESS OF EACH SUBTEST AS IT IS BEING ENTERED AND UPDATES THE
TEST NUMBER. IF A SCOPE LOOP IS REQUESTED, IT WILL JUMP TO THE START OF THE
SUBTEST AT WHICH THE SCOPE LOOP IS REQUESTED.

CIDLDFO DLI1=W/1144 MFM SLY

MACRO M1113

05-NOv-80 12:32

D_2

PAGE 12

SEQUENCE 16

L.4

THIS ROUTINE CALL IS PLACED WHEREEVER AN ERROR REPORT

IS DESIRED. THE LOWER BYTE OF THIS CALL IS USED AS THE ERROR NUMBER
AND AS A POINTER INTO THE ERROR TABLE . THIS ROUTINE REPORTS ERRORS
TO APT USING '‘SAPTYPE'' AND TYPES ETROR REPORTS TO THE CONSOLE

USING "‘SERRTYPE'',

4.5

$POWER

THIS ROUTINE SAVES ALL GENERAL REGISTERS DURING POWER-DOWN
AND RESTORES THEM AT POWER-UP. IF A POWER FAILURE OCCURS
"POWER'' IS PRINTED AT THE CONSOLE AFTER POWER IS RESTORED.
4.6

THIS ROUTINE CALL IS USED TO DETECT THE RECEPTION OF A CONTROL-G
FROM THE CONSOLE. THE CALL USES '‘SREAD'' TO PERFORM THE CONTROL-G

SEQUENCE OF CISPLAYING THE CONTENTS OF THE SOF TWARE SWITCH REGISTER

AND THE ENTERING THE NEW CONTENTS FROM THE TERMINAL.

5.0

AUTOMATIC INITIATION OF
VIA WRAP CABLE

PURPOSE:

11/44 T/A CONSOLE TEST

THE T/E(OR T/A) CONSOLE TEST CAN BE

IMPLEMENTED

BY MANUALLY TYPING T/E(OR T/A) ON THE KEYBOARD
OF THE TERMINAL WHEN IN CONSOLE MODE. IN ORDER TO
IMPLEMENT THIS TEST IN AN AUTOMATIC WAY IN MANUFACTURING
WHILE UNDER APT, THE USE OF A WRAP CABLE FROM
THE TUS8 TO THE CONSOLE CAN BE USED ALLOWING THIS
DIAGNOSTIC TO ISSUE THE °'T/A' COMMAND TO THE CONSOLE.
THE DIAGNOSTIC WILL ISSUE THE APPROPRIATE SEQUENCE
OF COMMANDS TO THE CONSOLE VIA THE WRAP CABLE WHEN
BIT02 OF SWR =1. THE DIAGNOSTIC WILL THEN MONITOR
THE EXPECTED RESPONSE FROM THE CONSOLE VIA THE WRAP

CABLE AND HALT IF THERE IS AN ERROR. THE T/A TEST

IS DONE ONLY AFTER ALL SLUS ARE TESTED. IF T/A IS SUCCESSFUL
'END PASS'

IS PRINTED AND THE DIAGNOSTIC STARTS AGAIN.

FIGURE 1 SHOWS THE PROPER WRAP CABLE SETUP AND
REQUIREMENTS FOR AUTOMATICALLY INITIATING T/A FROM THE
THE DIAGNOSTIC.NOTICE THAT THIS ARRANGEMENT ALLOWS
FOR THE TERMINAL TO MONITOR ALL COMMUNICATION FROM
{:E'£g=§0hgbggTPUT DURING EXECUTION OF THE DIAGNOSTIC
TYPEOUT EXAMPLES

699
700
0

E 2
PAGE 12-1

05-NOV-80 12:32

SEQUENCE 17

THE PROGRAM MAY BE LOADED BY APT, IF "E TABLE B' OF SECTION

2.3.3 WERE USED WITH THE EXCEPTION OF ALLOWING TYPEOUTS(SENVM=200)
THE FOLLOWING WOULD BE SEEN ON THE LOCAL TERMINAL:
CZOLDFO DL11-W/1144 MFM SLU
02 DEVICES UNDER TEST *“P
CONSOLE

>>>T/A

CONSOLE-TESTB
END PASS *P
CONSOLE
>>T/A

CONSOLE-TESTB
ENDP PASS *P
CONSOLE
>T/A

CONSOLE-TESTB
..... ETC.
END PASS *P

DESCRIPTION: REFERING TO THE ABOVE PRINTOUTS:
o>

CIDLDFO DLI1=-W/1144 MFM SLU

MACRO M1113

. THE DIAGNOSTIC IS LOADED WITH THE TITLE BEING PRINTED.
. TWO SLU DEVICES(CONSOLE,TU58) ARE SPECIFIED
. BOTH SLUS ARE TESTED COMPLETELY. AT THIS POINT
THE THE DIAGNOSTIC ISSUES “P TO THE WRAP CABLE.
THE CONSOLE ENTERS CONSOLE MODE AND

THE “P TYPED ON THE TERMINAL IS THE MFM CONSOLE ECHO.
D. THE CONSOLE PERFORMS ITS OWN SELF TEST BY TYPING
*CONSOLE® FOLLOWED BY >>>, THE CONSOLE PROMPT.
E. THE DIAGNOSTIC THEN ISSUES T/A AND THE TERMINAL
SHOWS THE CONSOLE ECHO OF THIS.
F. THE MFM THEN PERFORMS THE T/A TEST SHOWN BY THE TERMINAL
TYPING 'CONSOLE-TESTB'.THE DIAGNOSTIC LOOKS FOR THE
'B' IN THIS TYPEOUT,AND WHEN FOUND , CONSIDERS
THE TEST A SUCCESS. THE DIAGNOSTIC WILL TYPE END PASS
INDICATING A SUCCESSFUL PASS OF THE DIAGNOSTIC.

G. TSEA2582¥?2TIC CONTINUES WITH FURTHER PASSES OF THE

CIOLDFO DLI1=W/ 1144 MFM SLU
742

743
744

745
746
747
748
749

750
751
752
753
754
755
756

757

758

759

760

MACRO M1113

05-NOv-80 12:32

F_o2

PAGE 13

SEQUENCE 18

2. IF "E TABLE B' OF 2.3.3 WERE USED WITH TYPEOUTS SUPPRESSED
(SENVM=240) AS STATED, THEN THE FOLLOWING TYPEOUTS WOULD BE
NOTICED:

ap
CONSOLE
»>T/A

CONSOLE-TESTB*P
CONSOLE
>>T/A

CONSOLE=TESTB*P
CONSOLE

»>T/A

CONSOLE-TESTEB*P ..... ETC.

05-NOv-80 12:32

PAGE 14

SEQUENCE 19

FI1G. 1= WRAPAROUND CONFIGURATION = AUTO INITIATION OF
11744 T/A CONSOLE TEST

id])
2222222
Rttt
2222322
2 22 2222222222
(22222222222222222222
L

WRAP AROUND CABLE
R
I
I T
TS TR I
T
T

IN?UT

OUT?UT

IN?UT

OU[PUI

ceccce= ¢ [mmcmcaa +
e cec
fmmmmc

:
:

T
T
T

i
!

S1/ TCZ

jeceteccccccccccnccccccccrcccccceccccenane +

\ s3
b

TTY PRINTER

CONSOLE TTY PORT

TUS8

TTY KEYBOARD

WHEN THE SWITCH IS IN ''NORMAL'' MODE CONTACTS ARE:
$1-C2 IS CLOSED
THIS ALLOWS THE USE OF

$1-C1 IS OPEN
$3-C3 IS OPEN
THE TERMINAL WITH THE CONSOLE

WHEN THE SWTICH IS IN '"'WRAP'' MODE CONTACTS ARE
$1-C1 CLOSED
$1-C2 OPEN

$2-C3 CLOSED
THIS ALLOWS THE TUS8 PORT TO COMMUNICATE WITH THE CONSOLE PORT AND FOR
THE TTY TO MONITOR THE CONSOLE OUTPUT
THIS IS ALL DONE WITH A DPDT SWITCH

BEFORE THIS TEST CAN BE RUN THE CONSOLE UART,TTY,TUS8 MUST BE AT

THE SAME BAUD RATE. THE CONSOLE AND TU58 UART,AND THE TTY SHOULD BE
SET UP WITH THE SAME STOP BIT SETTING,

WITH PARITY INHIBITED AND WITH A WORD LENGTH OF 7 OR 8 BITS
FOR MORE INFORMATION SEE THE MFM PRINTS AND THE WRAP AROUND
CABLE DRAWING NUMBER: 7016942

TM~

CIDLDFO DLIT1=W/1144 MFM SLU

MACRO M11 13

' 2322223322222 2222222z2z23z3z222 2322222223223

22223202

tld)

MACRO M1113

05-NOv-80 12:32

«MCALL

.STYPE,.$TYPOC, .STRAP
.SETUP,STARS ,PUSH,POP,SETUP,.EQUIV, .SERRTYP

LMCALL
.SBTTL

.EQUAT
BASIC DEFINITIONS

HT=

.:E:LL

.MCALL
.MCALL

001100

104000
000004

000011
000012
000015
000200
177776
177776
177774
177772
177570
177570

000000
000001
000002
000003
000004
000005
000006
000007
000006
000007

000000
000040
000100
000140
000200
000240
000300
000340
100000

040000
020000

H 2
PAGE 15 SEQUENCE 20

.SAPTHDR,.SAPTBLS,.$ACT11,.$SCOPE
.SCMTAG,.SEOP,.SREAD

;*INITIAL ADDRESS OF THE STACK POINTER ##+ 1100 w««
STACK= 1100
ERROR=EMT
SCOPE=10T
;*MISCELLANEOUS DEFINITIONS
LF=
(R=

CRLF=
PS=

12
15

200
177776
PSW=PS

;;CODE FOR HORIZONTAL TAB
;;CODE FOR LINE FEED
;;CODE FOR CARRIAGE RETURN
:;CODE FOR CARRIAGE RETURN-LINE FEED
; ;PROCESSOR STATUS WORD

;s STACK LIMIT REGISTER
STKLMT= 177774
; ;PROGRAM INTERRUPT REQUEST REGISTER
PIRQ=
177772
; sHARDWARE SWITCH REGISTER
DSWR=
177570
DDISP= 177570
; s HARDWARE DISPLAY REGISTER
; *GENERAL PURPOSE REGIST ER DEFINITIONS
RO=
X0
: ;GENERAL REGISTER
R1=
21
; ;GENERAL REGISTER
R2=
X2
: ;GENERAL REGISTER
R3=
X3
: sGENERAL REGISTER
R4=
14
: ;GENERAL REGISTER
R5=
x5
: GENERAL REGISTER
R6=
X6
: ;GENERAL REGISTER
R7=
X7
: sGENERAL REGISTER
X6
SP=
;s STACK POINTER
; : PROGRAM COUNTER
PC=
X7
;*PRIORITY LEVEL DEFINITIONS
PRO=
0
:sPRIORITY
PR1=
40
;:PRIORITY
PR2=
100
;sPRIORITY
PR3=
140
::PRIORITY
;sPRIORITY
PR&=
200
;sPRIORITY
PRS=
240
::PRIORITY
PR6=
300
PR7=
340
ssPRIORITY

LEVEL
LEVEL
LEVEL
LEVEL

LEVEL
LEVEL
LEVEL

LEVEL

s« 'SWITCH REGISTER' SWITCH DEFINITIONS

SW15=
SWwi4=
Swi3=

100000
40000
20000

NOAWVES
W
—-O

CIDLDFO DLIT=W/1144 MFM SLU

Ll T

e L

CEEECEELTCCT
eleolelelalelolel]
O =W
VNN OO

SEQUENCE 21

00 0o Co Co 0o 0o o o

]

)
]
)
]
]
]
o

Huunnaunnannnnenenn»

] — — — — ]
— o

s
s bs
s
b0
b9 B

40000

AP VECTOR ADDRESSES

::TIME OUT AND OTHER ERRORS
:;gggnggo AND ILLEGAL INSTRUCTIONS

P:TRACE TRAP

——

R —

SW1=Sw01
SW0=5w00
8%5 DSBINITlONS (BITOO TO BIT15)

000004
000010
000014
000014

PAGE 15-1

SW0

O CO O GO O O O D=+

040000
020000
010000
004000
002000
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001

05-NOV-80 12:32

Bt B0 b9 B2 b

100000

Sw1
Sw1
)

s B2 b

010000
004000
002000
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001
001000
000400
000200
000100
000040
000020
000010000004
000002
000001

‘BASIC DEFIN ITIONS

MACRO M1113

00 0D 0D OO C0 OO €O T

CIDLDFO D% i 1=W/1144 MFM SLU

'CIDLDFO DL11=W/1144 MFM SLU
'BASIC DEFINITIONS

MACRO M1113 05-NOV-80 12:32 PAGE 15-% SEQUENCE 22
J

; sBREAKPOINT TRAF (BPT)
;s INPUT/OUTPUT TRAP (IOT) #«SCC Ew«

BPTVEC= 14
10TVEC= 20
PWRVEC= 24
EMTVEC= 30
TRAPVEC=34
TKVEC= 60

000014

TPVEC=

;s POWER FAIL

; sEMULATOR TRAP (EMT) #+ERROR*+

::'TRAP'' TRAP
::TTY KEYBOARD VECTOR
;:TTY PRINTER VECTOR
; ;PROGRAM INTERRUPT REQUEST VECTOR

PIRQVEC=240

MFPT=

ABASE
AVECT1

000400
000001
161000
000003

176500

AUSWR=

?00

BPT=

000003

$TN=
$SWR=

161000

;THIS IS THE COMMAND FOR A TRAP
THROUGH 14 (BPT TRAP)
:

.=0

000000

T R
T
R IL

;*ALL UNUSED LOCATIONS FROM 4=776 CONTAIN A ''.+2 ,BPT"

:«SEQUENCE TO CATCH ILLEGAL TRAPS §& INTERRUPPTS

:*LOCATION O CONTAINS O TO CATCH IMPROPERLY LOADED VECTORS
000014
014412
000340

=14
.WORD
.WORD

3
914 000042

000042
000000

"WORD

921 000174
92% 000176

000174
000000
000000

DISPREG: .WORD

925 000200
926 000204
927 000210

000200
000137
000137
000137

SWREG

003046
017170
017410

. WORD

.=200

JMP
JMP
JMP

g:BCH

;THE BPT TRAP VECTOR POINTS TO THE

ILLEGAL TRAP HANDLER "‘CATCH"

oo —

910 000014
91; 000016

START
ECHO
QUTTST

;D0 INTERFACE TEST
;D0 ECHO TEST
;D0 OUTPUT TEST TO TERMINAL

———

A——

'CZDLDFO DLi1-W/1144 MFM SLU
gaA51c DEF INITIONS
929
.
930

000500

MACRO M1113 05-NOV-80 12:32 PAGE 16 SEQUENCE 23
JSBTTL

.=
500
ACT11 HOOKS

: ;'.'."'."...""""'."'""""".'.""'...".""""".'Q

000500
000046

“HOOKS REQUIRED BY ACT11
$SVPC=.
=46

863%;3

segng

000052 000000

"WORD

000046

000500

.=$SVP(

:SAVE PC

:1)SET LOC.46 TO ADDRESS OF SENDAD IN .SEOP

::2)SET LOC.52 TO ZERO
;s RESTORE PC

'CIDLDFO DLi1=W/1144 MFM SLU

'APT PARAMETER BLOCK
|

932

MACRO M1113

05-NOV-80 12:32

.SBTTL

v
L2
PAGE 17 SEQUENCE 24

APT PARAMETER BLOCK

:;l""""'tt't"""""""""'.Q'tt""'t'tt""""""'Qt'

SET LOCATIONS 24 AND 44 AS REQUIRED FOR APT

|
i

t"""'t"i'.""""""""".."'Qfi"'tt"""""""""t

000024
000044

000500
000024
000200
000044
000500
000500

;s SAVE CURRENT LOCATION
;sSET POWER FAIL TO POINT TO START OF PROGRAM

;:FOR APT START UP

.=.9X

;sPOINT TO APT INDIRECT ADDRESS PNTR.
:sPOINT TO APT HEADER BLOCK
;sRESET LOCATION COUNTER

"t'ttt't"'t"""""""""Q'..""'.tt"'tttt""t""'t'Q

SETUP APT PARAMETER BLOCK AS DEFINED IN THE APT=PDP11 DIAGNOSTIC
000500
000500
000502
000504
000506
000510
000512

: INTERFACE SPEC.

000000
001066
000050
000060
000055
000030

:
$APTHD
$HIBTS:
$MBADR:
$TSTM:
SPASTM:
SUNITM:

.WORD
.WORD
.WORD
.WORD
.WORD

.WORD

0
SMAIL
50
60
55

;:TWO HIGH BITS OF 18 BIT MAILBOX ADDR.
;;ADDRESS OF APT MAILBOX (BITS 0-15)
;sRUN TIM OF LONGEST TEST
;sRUN TIME IN SECS. OF 1ST PASS ON 1 UNIT (QUICK VERIFY)
;sADDITIONAL RUN TIME (SECS) OF A PASS FOR EACH ADDITIONAL UNIT

SETEND=-SMAIL/2 ;;LENGTH MAILBOX=-ETABLE (WORDS)

—

—————————

|CZDLDFO DLTM 1-W/1144 MFM SLU

MACRO M1113

COMMON TAGS

934

05-NOV-80 12:32

.SBTTL

fi'uz'

PAGE 19

—

SEQUENCE 25

COMMON TAGS
L

LR
LT R R TR Y

;*THIS TABLE CONTAINS VARIOUS COMMON STORAGE LOCATIONS
001000
001000
001002
001003
001004
001006
001010
001012

001015
001016
001020
001022

: *USED IN THE PROGRAM.
.=1000

001000

$SCMTAG:

000000
000
000
000000
000000
000000
000000
000
001
000000
000000
000000

$TSTNM:
$ERFLG:
$ICNT:
$LPADR:
SLPERR:
SERTTL:
S$ITEMB:
SERMAX:
$SERRPC:
$GDADR:
$BDADR:
$GDDAT:
$BDDAT:
$AUTOB:
$INTAG:

001054
001055
001056
001057
001060
001062
001063
001064

000
002
012
000
000000
077
015
012

000

.WORD

.BYTE
.BYTE

.WORD
.WORD
.WORD
.WORD
.BYTE

.WORD
.WORD
.WORD
.WORD
.WORD
.WORD
.WORD

.BYTE
.WORD
.WORD
SWR:
DISPLAY: .WORD
177560
$TKS:
177562
$TKB:
:
177564
$TPS
:
177566
$TPB
.BYTE
$NULL:
SFILLS: .BYTE
SFILLC: .BYTE
$TPFLG: .BYTE
SESCAPE :0
$QUES:
LASCII
$CRLF:
LASCII
LASCIZ
$LF:
R

;:START OF COMMON TAGS

[elelelelelelelelelePlelelolelelele]le)]

;sCONTAINS THE TEST NUMBER
: sCONTAINS ERROR FLAG
; sCONTAINS SUBTEST ITERATION COUNT
;s CONTAINS SCOPE LOOP ADDRESS
:sCONTAINS SCOPE RETUKY FOR ERRORS
; ;CONTAINS TOTAL ERRCORS DETECTED
; ;CONTAINS ITEM CONTROL BYTE
; ;CONTAINS MAX. ERRORS PER TEST
; sCONTAINS PC OF LAST ERROR INSTRUCTION
;s CONTAINS ADDRESS OF 'GOOD' DATA
; ;CONTAINS ADDRESS OF °'BAD' DATA
: sCONTAINS 'GOOD*' DATA
; ;CONTAINS °'BAD' DATA
; sRESERVED=--NOT TO BE USED
:sAUTOMATIC MODE INDICATOR
;s INTERRUPT MODE INDICATOK
; ;ADDRESS OF SWITCH REGISTER
: sADDRESS OF DISPLAY REGISTER

;:TTY
::TTY
;:TTY
::TTY

; sCONTAINS NULL CHARACTER FOR FILLS
:;CONTAINS # OF FILLER CHARACTERS REQUIRED

;s INSERT FILL CHARS. AFTER A ''LINE FEED'
::'TERMINAL AVAILABLE'' FLAG (BIT<07>=0=YES)
: ;ESCAPE ON ERROR ADDRESS
s sQUESTION MARK
: s CARRIAGE RETURN
::LINE FEED

/?/
A5
<A2>

222223323233 22 2322222222222 022302

"SBTTL

KBD STATUS
KBD BUFFER
PRINTER STATUS REG. ADDRESS
PRINTER BUFFER REG. ADDRESS

APT MAILBOX-ETABLE

3220222000

R 00

RRdRddd)

::t.ttttt.iitt'""t"t'"ttii""i.t'tttt.'Qtlt'ttt"i'i.'ittttt

001066
001066
001070

001074
001076
001100
001102
001104
001106
001106
001107
001110

000000
000000
0000
000000
000000
000000
000000
000000

000
000
000000

.EVEN
SMAIL:
$SMSGTY:
SFATAL:
$TESTN:
$PASS:
$DEVCT:

.WORD
.WORD
.WORD
.WORD
.WORD
.WORD
SUNIT:
$SMSGAD: .WORD
$MSGLG: .WORD

SETABLE:
.BYTE
SENV:
$ENVM:
$SWREG: .WORD

AMSGTY
AFATAL
ATESTN
APASS
ADEVCY
AUNIT
AMSGAD
AMSGLG
AENV
AENVM
ASWREG

;sAPT MAILBOX
s sMESSAGE TYPE CODE

s sFATAL ERROR NUMBER
;s TEST NUMBER
: sPASS COUNT

ssDEVICE COUNT
::1/70 UNIT NUMBER
s sMESSAGE ADDRESS
s sMESSAGE LENGTH
:sAPT ENVIRONMENT TABLE
;s sENVIRONMENT BYTE
: sENVIRONMENT MODE BITS
::APT SWITCH REGISTER

r—

—

—_———

—

|CZDLDVO DLi1-W/1144 MFM SLU
APT MAILBOX-ETABLE

~No~

—

-b

—

[=1=]
oo

001112
001114

000400
000000

000
000

001120

000000

001122

000

MACRO M1113

05-NOV-80 12:32

SUSWR:
$CPUOP:

.WORD
.WORD

AUSWR
ACPUOP

$MAMS1: .BYTE

AMAMS!

i
i
e
i
i
P

SMTYP1:

i
v
v

$MADR1:

.BYTE

;:USER SWITCHES
::CPU TYPE,OPTIONS

BiTS 15-11=CPU TYPE
11/04:01.11/05 02 11/20 03,11/40=04,11/45=05
11/70=06.PDOBIT 10=REAL TIME CLOCK
BIT 9=FLOATING POINT PROCESSOR
BIT 8=MEMORY MANAGEMENT

;:HIGH ADDRESS,M.S. BYTE
::MEM. TYPE,BLKAI

== (MIGH BYTE)
MEM.TYPE BYTE
900 NSEC CORE=001
300 NSEC BIPOLAR=002

500 NSEC M0S=003

AMADR1

;:HIGH ADDRESS,BLKA1

$MAMS2: .BYTE
SMTYP2: .BYTE

AMAMS2
AMTYPZ

;:;HIGH ADDRESS,M.S. BYTE
::MEM.TYPE,BLKA2

$MAMS3:

AMAMS3

;;:HIGH ADDRESS,M.S.BYTE

.WORD

.BYTE

SMTYP3: .BYTE
$MADR3:
$MAMS4:
SMTYP4:

.WORD
.BYTE
.BYTE

SVECT1:
SVECT2:
$BASE:

.WORD
.WORD
.WORD

SMADR4:

176500

SEQUENCE 26

.WORD

SMADR2:

000000

AMTYP1

N 2
PAGE 19-1

:gggzo

.WORD

"WORD

AMADR2

AMTYP3

AMADR3
AMAMS4
AMTYP4
AMADR4

AVECT1
AVECT2
ABASE
ADEVM

MEM.LAST ADDR.=3 BYTES,THIS WORD AND LOW OF "TYPE'" ABOVE

::MEM.LAST ADDRESS,BLKA#2

::MEM.TYPE,BLKA3

;:MEM.LAST ADDRESS,BLKA3
;:HIGH ADDRESS,M.S.BYTE
::MEM.TYPE ,BLKNG
;:MEM.LAST ADDRESS,BLK#4

::INTERRUPT VECTORA1,BUS PRIORITYA1
::INTERRUPT VECTORA2BUS PRIORITYA2
::BASE ADDRESS OF EQUIPMENT UNDER TEST
::DEVICE MAP

——

CIOLDFO DLI1=W/1144 MFM SLL

ERROR POINTER TABLE

—

e ——————

—

MACRO M1113 05-NOV-80 12:32 PAGE 30 SEQUENCE 27
.SBTTL

ERROR POINTER TABLE

;«THIS TABLE CONTAINS THE INFORMATION FOR EACH ERROR THAT CAN OCCUR.

:«THE INFORMATION IS OBTAINED BY USING THE INDEX NUMBER FOUND IN

:«LOCATION SITEMB. THIS NUMBER INDICATES WHICH ITEM IN THE TABLE IS PERTINENT.

:eNOTE1:
'NOTEZ

.
|

‘e

$ERRTB:

001146

935 001146

936 001146
937 001150
938 001152
gzg 001154

017474
023655
024434
000000

941 001156
942 001160
943 001162
g:g 001164

.SERRTB:

DM
DT

If SITEMB IS O THE ONLY PERTINENT DATA IS5 (SERRPC).
EACH ITEM IN THE TABLE CONTAINS & POINTERS EXPLAINED AS FOLLOWS:
;:POINTS TO THE ERROR MESSAGE
::POINTS TO THE DATA MEADER
“POINTS TO THE DATA
::POINTS TO THE DATA FORMAT

EM1
DH1
DT1
0

:""CAN NOT ACCESS TCSR'
STEST# ERR PC TCSR"
SSTESTN,SERRPC, TCSR

017520
023702
02444é
000000

EM2
DH2
DT2
0

:"'CAN NOT ACCESS TBUF''
STEST# ERR PC TBUF'
*$TESTN, SERRPC , TBUF

946 001166
947 001170
948 001172
ggg 001174

017544
023655
024434
000000

EM3
DH1
DT
0

:"'TCSR DONE NOT CLEARED WITH TBUF FULL''
TTEST# ERR PC TCSR"
S$TESTN,SERRPC,
TCSR

951 001176

017611

EM&

:"'TCSR DONE NOT SET'

953 001202
322 001204

0244 34
000000

DT1
0

S$TESTN,SERRPC, TCSR

¥56 001206

017633

EMS

:TCSR DONE NOT SET WITH RESET

958 001212

0244 &

DT1

*$TESTN,SERRPC,
TCSR

952 001200

957 001210

323 001214

961 001216
962 001220
963 001222
964 001224

023655

DH1

000000

017670
023727
024454

EM6
DH6
DT6

000000

STESTA# ERR PC

“TEST# ERR PC

TCSR"

:"'CAN_NOT ACCESS RCSR"
“TESTA ERR PC RCSR'
*$TESTN,SERRPC
,RCSR

CIOLDFO DLi1=W/1144 MFM SLU

ERROR POINTER TABLE

MACRO M1113 05-NOv-80 12:32 PAGE 51 SEQUENCE 28

965 001226
966 0015

017714
053754

EM7
DH7

:"'CAN NOT ACCESS RBUF''
STESTA ERR PC RBUF"'

970 001236
971 001240
972 001262
3;‘ 001244

017740
024001
024474
000000

EM10
DH10
D710
0

:'CAN NOT ACCESS LKS"
“TESTH ERR PC LKS''
*$TESTN, SERRPC ,LKS

975 001246

017763

EM11

977 001252
g;g 001254

024434
000000

DT1
0

980 001256
981 001260
982 001262

|
.

967 001232
ggg 0012

024464

D17
0

*$TESTN, SERRPC , RBUF

:"BITO OF TCSR NOT CLEAR AFTER RESET"

TCSR

DH1

“TESTH ERR PC

020026
023655
024434

EM12
DH1
DT

:"'CAN NOT SET BITO OF TCSR"
“TESTA ERR PC TCSR"
‘$TESTN, SERRPC, TCSR

985 001266
986 001270

020057
023655

EM13
DH1

.“'CAN NOT CLEAR BITO OF TCSR"
““TESTA ERR PC TCSR"

990 001276
991 001300

020112
023655

024434
000000

EM14
DH1

DT1
0

;“RESET DID NOT CLEAR BITO OF TCSR"
SUTESTH ERR PC TCSR"

995 001306
996 001310

020153
023655

EM15
DH1

:'BIT2 OF TCSR NOT CLEAR AFTER RESET"'
“TESTA ERR PC TCSRTM

1000 001316
1001 001320
1002 001322

020216
023655
0244 34

EM16
DH1
DT1

:"'CAN NOT SET BIT2 OF TCSR"
““TESTH ERR PC TCSR"'
*$TESTN,SERRPC,
TCSR

1005 001326
1006 001330
1007 001332

020247
023655
024434

EM17
DH1
DT1

-“'CAN NOT CLEAR BIT2 OF TCSR'
““TESTH ERR PC TCSR"
*$TESTN,SERRPC,
TCSR

976 001250 023655

ggz 001264

987 001272
ggs 001274

992 001302
gg‘ 001304

997 001312
333 001314

}882 001324

1008 001334

000000

024434
000000

000000

DT1
0

*$TESTN,SERRPC,
TCSR

*$TESTN, SERRPC, TCSR

WN=O
NO WV
NO VNS WN =200V
W
=2 OO0V

N=2OO0VE~NOW S NN = O 00~

RRRRRERRER
VYWALY

88 8888 8888 ==

$
OOOOOOOOOOOOOOO§ 30
PNOINIRNINININNIRNININ)
= = b b cd = b e s D

b
i
D D i
i i
D e
D
D i
D i e
D D D D i

D i

D il

D D e

el=lelelelelelelelalelelelel-]

D i
i
D i
i
i
e
D e
—

[=l=la

1144 MFM SLU
ABLE

02030
02365
024434
000000

MACRO M1113 05-NOV-80 12:32 PAGE 32
EM20
DH1
DT
0

EM21
DH1
T
0

SEQUENCE 29

;"RESET DID NOT CLEAR BIT2 OF TCSR"

TCSR"
;"'TESTH ERR PC
sSTESTN,SERRPC,TCSR

;'BIT6 OF TCSR NOT CLEAR AFTER RESET?
;"'TEST# ERR PC TCSR"

;STESTN,SERRPC,TCSR

;"'XMIT INTERRUPT WITH PRIORITY 7"

000000

EM22
DH1
DT
0

020443
023655
024434
000000

EM23
DH1
DT
0

020474
023655
024434
000000

EM24
DH1
DT
0

020527
023655
024434
000000

EM25
DH1
DT
0

;STESTN,SERRPC,TCSR

020570
023727
024454
000000

EM26

;"BIT6 OF RCSR NOT CLEAR AFTER RESET"

020633
023727
024454
000000

EM27

020672
023727
024454
000000

EM30
DH6

DH6
DTé

DHé
DTé

DTé

;"'TEST# ERR PC

TCSR"

;STESTN,SERRPC,TCSR

;''CAN NOT SET BIT6 OF TCSR"

;"'TESTH ERR PC

TCSR"

;STESTN,SERRPC,TCSR

;"'CAN NOT CLEAR BIT6 OF TCSR"
;"'TESTH ERR PC TCSR"

;STESTN,SERRPC,TCSR

;"'RESET DID NOT CLEAR BITé OF TCSRTM
;"'TESTH ERR PC TCSR"

;"'TEST# ERR PC

RCSR"

PC
,RCSR
;STESTN,SERR

;"'RCVR INTERRUPT WITH PRIORITY 7"
;"'TESTH ERR PC RCSR"
;STESTN,SERRPC,RCSR

:"'CAN NOT SET BIT6 OF RCSR'

;"'TESTH ERR PC RCSR"
,RCSR
;STESTN,SERRPC

CIDLDFO DLi1=-W/1144 MFM SLU
ERROR POINTER TABLE
1053 001446
1054 001450

:"'CAN NOT CLEAR BIT6 OF RCSR"

;"'TESTH ERR PC

RCSR"

:$TESTN,SERRPC ,RCSR

;"'CAN _NOT CLEAR BIT6 OF RCSR WITH RESETZ

021024
024001
024474
000000

EM33
DH10
DT10
0

:'BIT6 OF LKS NOT CLEAR AFTER RESET"'

021066
024001
024474
000000

EM34
DH10
DT10

;"'LKS INTERRUPT WITH PRIORITY 7'

021124
024001
024474
000000

EM35
DH10
DT10
0

;''CAN NOT SET BITé OF LKS''

021154
024001
024474
000000

EM36
PH10
DT10
0

:"'CAN NOT CLEAR BIT6 OF LKS'"

021206
024001
024474
000000

EM37
DH10
DT10
0

021246
024025
024504
000000

EM4LO
DH4O0
DT40
0

:"'DUAL ADDRESSING ERROR'
:"TESTH ERR PC GOOD
BAD"'
:STESTN,SERRPC,$GDADR, $BDCSR

021274
024001
024474
000000

EMT
DH10
DT10
0

:"BIT7 OF LKS NOT SET AFTER RESET?

EM32

NONON)
= -.a_.g
SO0
~MNO

b
i
d D
-

DH6
DTé

8888 8888

~
o

EM31

E.3
PAGE 23 SEQUENCE 30

020756
023727
024454

71 001504

05-NOV-80 12:32

VAWV

OO
~NOo~
o

3433 33

1055 001452
1056 001454
1057
1058 001456
1059 001460
1060 001462
001464

020723

MACRO M1113

000000

DHé
DTé

:"TEST# ERR PC

RCSR"

:STESTN,SERRPC ,RCSR

;"TESTH ERR PC
LKS"
:STESTN,SERRPC,LKS

;"TESTA ERR PC

LKS'

:STESTN,SERRPC,LKS

:"TEST# ERR PC
LKS"
RPC,LKS
:$TESTN,$ER

(TESTH ERR PC
LKS"
:$TESTN,$ERRPC,LKS

;"RESET DID NOT CLEAR BIT6 OF LKS"

:"TEST# ERR PC
LKS'
;STESTN,SERRPC,LKS

(“TESTH ERR PC

LKS"

:$TESTN,SERRPC,LKS

;'BIT7 OF LKS DOES NOT SET"
;"'TESTA ERR PC LKS"
;STESTN,SERRPC,LKS

572
574

021366
024001
024474
000000

OoUOMm

576
600
602
604

0214617
024001
024474
000000

EM&LS
DH10
DT10

;"RTC INTERRUPT AT PRIORITY 7"

_o_c_-g
~NO

021453
024001
024474
000000

EM4S
DH10
DT10

;"RTC INTERRUPTS WHEN DISABLED"
;"'TESTH ERR PC LKS"'

N
~N oo

EMé46
DH10
DT10

;"'RTC

624

021510
024001
024474
000000

001626
630

024474
000000

EM47
DH10
DT10
0

;"'RTC INTERRUPT DID NOT OCCUR"

632
634

021510
024001

001636
001640
001642
001644

021544
024001
024474
000000

EMSO
DH10
DT10

;"'RTC DOUBLE INTERRUPT''

001646
650
652
654

021571
024001
024474
000000

EM51
DH10
DT10

;"'RESET DID NOT CLEAR RTC INTERRUPT"

001656
001 660
001 662
001 664

021621
024001
024474
000000

EM52
DH10
DT10

;"RTC INTERRUPT DID NOT CLEAR WITH BIT7 OF LKS"

N-

—

000

e
D
b —

o 00

v
~

566

000000

024474

:"'CAN NOT CLEAR BIT? OF LKS"
'TESTH ERR PC LKS"
;STESTN,SERRPC,LKS

-“Ir
=

564

562

F
3
PAGE 24
SEQUENCE 31

021334
024001

05-NOV-80 12:32

OoOOWw

556
360

MACRO M1113

ovom

—
e

333
S NN
OV~

— e
-

i
il

D il
D

el it D
D

D il D
D
i

D D e e e
D D e e

D D e
D D D

D o
D i

NN NN N NN NIMNMNOINININ = el e

b e

D i e
D i
D D D i i

D D e e i
D i D D i

D D e
D i e

b 2 B B 2 OO0 OO0

D e
D D

OO00O

oo~

ERROR PO

1=-W/1144 MFM SLU
ER TABLE

8 888 8888 8888 88388 8888 =P

CIOLDFO

;''TESTH ERR PC

LKS''

;STESTN,SERRP(C,LKS

;$TESTN,SERRPC,LKS

INTERRUPT DID NOT OCCUR"

;"'TESTH ERR PC LKS"'
;STESTN,SERRPC,LKS

;"'TESTH ERR PC

LKS"

;STESTN,SERRPC,LKS

;"'TESTA ERR PC

LKS"

;STESTN,SERRPC,LKS

;"'TESTH ERR PC

LKS"'

;STESTN,SERRPC,LKS

;"'TESTH ERR PC
LKS"
;STESTN,SERRPC,LKS

CZDLDF 0 DLi1-w
ERROR POINTER

1141 001666
114% 001670
1143 001672
1144 001674
1145
1146 001676
1147 001700
1148 001702
1149 001704
1150
1151

001706

1152 001710
1153 001712
1154 001714
1155
1156 001716
1157 001720
1158 001722
1159 001724

1160
1161 001726
1162 001730
1163 001732
1164 001734
1165
1166 001736
1167 001740
1168 001742
1169 001744
1170
1171 001746
1172 001750
1173 001752
1174 001754
1175
1176 001756

1177 001760
1178 001762
1179 001764
1180
1181 001766
1182 001770
1183 001772
1184 001774

;"'TESTH ERR PC
LKS
(NT1
CNT2"
;STESTN,SERRPC,LKS ,FIRST,SECND

;"XMIT INTERRUPTS WHEN DISABLED'
;"'TESTH ERR PC TCSR
;STESTN,SERRPC,TCSR

;''XMIT DID NOT INTERRUPT"

022060
023655
024434
000000

;"'TESTAH ERR PC
TCSR"
;STESTN,SERRPC,TCSR

021760
023655
024434
000000

EM56

022016
023655
024434
000000

EM57
DH1
DT

022060
023655
024434
000000

EM60
DH1

;"'XMIT INTERRUPT AT PRIORITY 7"

;"'TESTH ERR PC
TCSR"'
;STESTN,SERRPC,TCSR

;"'XMIT INTERRUPTS WITH ENABLE CLEAR''
;"'TESTH ERR PC
;STESTN,SERRPC,TCSR

;"'XMIT DID NOT INTERRUPT"

;"'TESTH ERR PC

;STESTN,SERRPC,TCSR

;"'XMIT RE-INTERRUPTED"'

022107
023655
024434
000000

EM61
DH1
DT

;"'TESTH# ERR PC

022133
023655
024434
000000

EM62

:"'LOADING TBUF DID NOT CLEAR INTERRUPT"'

EM63

;"'RCVR ACTIVE NOT SET'
;"'TESTH ERR PC RCSR"

022200
023727
024454
000000

DH1
DT

DH6
DT6

TCSR"
;$TESTN,SERRPC,TCSR

;"'TESTH ERR PC
TCSR"
;STESTN,SERRPC,TCSR

,RCSR
;STESTN,SERRPC

CIDLDFO DLIT1=W/1144 MFM SLU

ERROR POINTER TABLE

MACRO M1113

05-NOV=-B0 12:32

PAGE 26

SEQUENCE 33

1185 001776
1186 002000

022224
023727

EMb4
DH6

;"RECEIVER DOME NEVER SET"
;"'TEST# ERR PC RCSR"

1190 002006
1191 002010

022250
023727

024454
000000

EM65
DH6

DTé
0

:"RCVR ACTIVE NOT CLEARED WITH DONE SET2
;'TEST# ERR PC RCSR"

1195 002016
1196 002020
1197 002022

022316
023727
024454

EM66
DHé
DTé

;"RESET DID NOT CLEAR RCVR DONE'’
;"'TESTH ERR PC RCSR"
;STESTN,SERRPC
,RCSR

1200 002026
1201 002030

022354
023727

EM67
DHé

;"'RDR ENABLE SET DID NOT CLEAR RCVR DONE'
;"'TESTH ERR PC RCSR"

1205 002036
1206 002040

022417
023727

EM70
DHé

;"'READING RBUF DID NOT CLEAR RCVR DONE'’
;'TESTH ERR PC RCSR"

1210 002046
1211 002050

022464
023727

EM71
DH6

;"'RCVR INTERRUPTS WITH ENABLE CLEAR"
;"'TEST# ERR PC RCSR"

1215 002056

022633

EM72
DHé
DTé
0

:"RCVR DID NOT INTERRUPT'

;"'TESTA ERR PC RCSR’
RPC
;STESTN,SER,RCSR

1220 002066
1221 002070

022526
023727

EM73
DHé

;"'RCVR INTERRUPTS AT PRIORITY 7
;"'TEST# ERR PC RCSR"

1225 002076

022564

EM74

;"RCVR INTERRUPT REQUEST PASSED WITH ENABLE CLEAR"

1227 002102

024454

D16

RPC
;STESTN,SER,RCSR

1187 002002
}}gg 002004

119§ 002012
}}g‘ 002014

}}gg 002024

1202 002032
}%82 002034

1207 002042
}ggg 002044

121% 002052
}g}‘ 002054

1216 002060
1217 002062
}g}g 002064

1222 002072
}g%z 002074

1226 002100
1228 002104

024454
000000

000000

024454
000000

023727
024454
000000

024454
000000

023727
000000

D16
0

DTé
0

DHé
0

;STESTN,SERRPC
,RCSR

;STESTN,SERRPC ,RCSR

RPC
;STESTN,SER,RCSR

RPC
;$TESTN,SER,RCSR

;STESTN,SERRPC ,RCSR

RPC
;STESTN,SER,RCSR

:"'TEST# ERR PC

RCSR"

CIDLDFO DLi1-W/1144 MFM SLU

ERROR POINTER TABLE

MACRO M1113

05-NOV-80 12:32

PAGE 27 SEQUENCE 34

12%9 002106

022633

EM75

;"'RCVR DID NOT INTERRUPT"'

1231 002112
1232 002114
1233 002116

024454
000000
022662

DT6
0
EM76

:$TESTN,SERRPC,RCSR

1235 002122
1236 002124

024454
000000

1238 002126
1239 002130

1243 002136
1244 002140

1230 002110 023727
1234 002120 023727

1240 002132
1241 002134

1245 002142
1246 002144

1247
1248

1249 002146

1250 002150
1251 002152
1252 002154

DH6

:'TEST# ERR PC

RCSR"

;"RECEIVER RE-INTERRUPTED'

DHé

:"'TESTH ERR PC

022706
023727

EM77
DH6

'?EADING RBUF DID NOT CLEAR INTERRUPT"'
““TESTH ERR PC RCSR'

022753
023727

EM100
DH6

;"RESET DID NOT CLEAR RCVR INTERRUPT"'
:"TEST# ERR PC RCSRTM

023016

EM101

;"""OR' FLAG DID NOT SET"

024454
000000

023727
024454
000000

DT6
0

DH6
DT6
0

RCSR"

:$TESTN, SERRPC ,RCSR

:STESTN,SERRPC ,RCSR

:$TESTN, $SERRPC ,RCSR

SSTESTN,SERRPC,RCSR

1254 002156
1255 002160
1256 002162

023044
023727
024454

EM102
DH6
DT6

;"""ERROR' NOT SET WITH 'OR' FLAG"
“““TESTH ERR PC RCSR'
:S$TESTN,SERRPC ,RCSR

1258 002166
1259 002170

023103
024126

EM103
DH103

:"BREAK DID NOT TRANSMIT ALL ZEROES'
“"'TESTH ERR PC RCSR DATATM

1263 002176
1264 002200

023141
023727

EM104
DH6

;"BREAK DID NOT SET FRAMING ERROR''
;"'TEST# ERR PC R(SR"

1268 002206
1269 002210

023176
024163

EM105
DH105

:"DATA COMPARE ERROR'’
”TEST# ERR PC RCSR GOOD

1257 002164

1260 002172
1461 002174

1265 002202
1266 002204

1270 002212
1271 002214

000000

024532
000000

024454
000000

024544
000000

DT103
0

DT6
0

DT105
0

STESTN $ERRPC ,RCSR,$BDDAT

:$TESTN,SERRPC
,RCSR

:$TESTN,SERRPC ,RCSR,GD,BD

BAD''

~N
N
~
~N

o
o

GOOD

DHé
DT6

:$TESTN,SERRPC,RCSR

:"'INCORRECT RECEIVE COUNT
TRANS
:"TEST# ERR PC RCSR

023340
024163
024544
000000

:"'DATA COMPARE ERROR IN EXERCISER'
BAD"'
600D
;"'TESTH ERR PC RCSR

023400
024273
024574
000000

;"'TRAP CATCHER'

023415
024001
024474
000000

;''NO CLK INTERRUPT IN EXERCISER"

;STESTN,SERRPC ,RCSR,GD,BD

J'TESTA

ERR PC

R{SR

OLDPC

;STESTN,SERRPC ,RCSR,OLDPC,BDVECT

TRAP ADR"

;"'TESTH ERR PC
LKS"
;STESTN,SERRPC,LKS

;"""ERROR" NOT SET WITH 'FR' FLAG"

EM114

023453
023727
024454
000000

;''TEST# ERR PC

DHé
DTé

RCSR"

PC
,RCSR
;STESTN,SERR

;RCV ACTIVE WITHOUT ''START' BIT
;'TESTH ERR PC RCSR"

023610

EM117

EM116
DH6

000000
000000
000000
000000

RCV'

;STESTN,SERRPC ,RCSR,XMTCNT ,RCVCNT

023551
023727
024454
000000

BAD'

:"'TIMEOUT IN EXERCISER TEST"
S"'TESTH ERR PC RCSR"

EM107

sRCV ACTVIE NOT CLEAR WITH INIT

b e =D b cd ed cch b e

i SWNN=OOVoN oWV

RNPONIN)

RCSR

EM115

o
o

wWNN=O

D D cd

D D i i il
D D e

D i

NN N NN NN

D i
i
D ) i
)
—

SEQUENCE 35

“$TESTN,SERRPC ,RCSR,GD,BD

023512
023727
024454
000000

;'TESTH ERR PC RCSR"
PC
,RCSR
;STESTN,SERR

DH6
DTé
0

,RCSR
;STESTN,SERRPC

DTé

:RDR ENABLE NOT CLEAR WITH RCV ACTIVE
;'TESTH# ERR PC

DH6
DTé

000000

RCSR"

PC
,RCSR
;STESTN,SERR

: STORAGE LOCATIO NS

FIRST:

.WORD

SAVLOC:
ENDSTK:

.BLKW
.BLKW

LOC1:
LOC2:
SAVEQD:

.WORD
.WORD
.WORD

—NOOOO
on

D D e

$EEL8EE 288 233
8888 8888 88 82 8
£
g
28 ¢
02 002276

STEST# ERR PC

8T105

nNOOr

88 8888 8888=F

SR IERRAREEISIA
IR g

S5
i

0? 002274

D i

D il e

D i

WWWN
N

98 002270

PAGE 28

:"'LOOP=-BACK DATA COMPARE ERROR''

EM106
DH105

024560
000000

97 002266

LN U U U AN U AN U U U O

05-NOv-80 12:32

2 002256

D D e

D D

D D D i e

D i

D B e

AN NN
NN N NN
00

MACRO M1113

:TIMER LOOP COUNTER
:TIMER LOOP COUNTER
:STORAGE FOR LOCATIONS

;THAT

T/E USES

;JIMS SPECIAL STACK (WRAP ARGUND)

——

e —

{

HrSEMa

.WORD
.WORD
.WORD
.WORD

0
0
0
0
0

.WORD
.WORD

BUF :

BLKW

44
20>

$T/ASSCRY<LF>

000000
000000
000000

SECND:
OLDPC:
BDVECT:

.WORD
.WORD
.WORD

0
0
0

CTSTFL:
TMP1:

5 002632

000000
000000
000000
000000
000000
000000

RCSR:

LASCIZ

33333 T
-0V~

RCVCNT:
XMTCNT:

TA:

2 002624
3 002626

A
P

00
000000
000000
000000

9 0026564

0 002656

888

228

1 002660

S
N

oaug

9 002674

002702
002742
5 003002

SEQUENCE 36

:SAVE PSW AREA

;CHECKSUM STORAGE

/*P/<0><CROCLF>/CONSCLE/<CR><SLF>/>>>/<377>

0
;CONSLE UNDER TEST FLAG
0
sTEMP LOCATION FOR TABLE OFFSETS
TMP2:
.WORD
:TEMP LOCATION FOR DEVICE COUNT
0
TMP3:
.WORD
)
sLOCATION FOR DEVICE MAP BIT TEST MASK
;REGISTER AND VECTOR ADDRESSES FOR THE DL=11W UNDER TEST

RBUF :

.WORD
.WORD

.WORD

TCSR:

.WORD

RVECT:
RPSW:
TVECT:
TPSW:

.WORD
.WORD
.WORD
.WORD

TBUF :

.WORD

0
0
0
0
0
0
0
0

;CONSOLE REGISTER AND VECTOR ADDRESSES FOR THE DL-11W

— ———————_yp—
N
N

0
0

.WORD
.WORD
.WORD

LASCIZ
.ASCII

WA N NN NN N NN
SNINSNNY
W =O
S W

S
N

JIMSTK:
SAVEPS:
OLDSUM:

PAGE 28-1

CNTLP:
PROMPT:

4 002630

05-NOV-80 12:32

CLKCNT:
STPSW:
SRPSW:
SCPSW:

6 002622

[

MACRO M1113

NN
&S HSW
WA -0

I Y

s
F
~N

PP
—-—— -

=W/11446 MFM SLU

R_TABLE

& 002616
5 002620

N AN AN N N

ERR

U‘U‘UWWWU‘U‘WU‘S
SLERRUKZES
30)
—
r
8
888388888888
~N
NN
=4 =t

| CZOLDF

177560
177562
177564
177566

000060
000062
000064
000066
177546
000100
000102

CRCSR:
CRBUF:
CTCSR:
CTBUF:
CRVECT:
CRPSW:
CTVECT:
CTPSW:

;TRANSMITTER

INTERRUPT VECTOR

sREAL TIME CLOCK REGISTER AND VECTOR ADDRESSES

LKS:

RTCVT:
RTCPSW:
ADRTBL:

000000

;ADDRESS OF RECEIVER COMMAND/STATUS REGISTER
;ADDRESS OF RECEIVER BUFFER
sADDRESS OF TRANSMITTER COMMAND/STATUS REGISTER
sADDRESS OF TRANSMITTER BUFFER
;RECEIVER INTERRUPT VECTOR

177560
177562
177564
177566
60
62
64
66

VCTTBL:
FLAG44:

.WORD

177546
100
102

.BLKW

20
20
0

.WORD
.WORD

.BLKW
.WORD

Pr—

———

————

'CZIOLDFO DLI1-W/1144 MFM SLU
ERROR POINTER TABLE
1386 003004
176500
1387 0N3006 176502
1388 003010 176504
}ggg 003012 176506

MACRO M1113

TUTBUF:

}%3%

c——

05-NOV-80 12:32

TURCSR:
TURBUF:
TUTCSR:

1391

.WORD
.WCRD
.WORD

.WORD

PAGE 28-2

SEQUENCE 37

176500
176502
176504

176506

;SUBROUTINE TO GENERATE DEVICE ADDRESS TABLE

1394 003014

012702

1396 003024

010001

1395 003020

1397 003026

1398
1399
1400
1401
1402
1403

—

003032
003034
003040
003042
003044

013700
062701

010022
062700
020001
003773
000207

002702

001070
001066
001072
002624
001076
001100

1413
1414
1415
1416
}2};

005737
001003
012737
012737
012737

001112

005037

MOV

000010

005037
005037
005037
005037
005037
005037

003102
003106
003110
003116
003124

MOV

000170

1406 003046
1407 003052
1408 003056
1409 003062
1410 003066
1411 003072

1412 003076

DEVADR: MOV

001142

1419

012706

001000

003140
003144
003146

022706
001374
012706

001040

003152
003160
003166

012737
012737
012737

015136
000340
014436

000020
000022
000030

003202

012737

017112

000034

003216
003224
003232
003240
003244
003252

012737
012737
013737
005037
112737
012737

014754
000340
014254
001060
000001
003252

000024
000026
014246

001000

003174 012737 000340 000032

003210 012737 000340 000036

3260

003266

012737
013746

003260
000004

RO, (R2)+
#10,R0
RO,R1
1%
PC

;MOVE DEVICE ADDRESS TO TAB..E
;POINT RO TO NEXT DEVICE ADLRESS
;FINISHED GENERATING TABLE?
:BR, IF LAST DEVICE ADDRESS NOT LOADED

;:LOAD BASE DEVICE ADDRESS IN RO

#170,R1

START:

CLR
CLR
CLR
CLR
CLR
CLR

SFATAL
$MSGTYP
$TESTN
CTSTFL
$DEVCT
SUNIT

:CLEAR
:CLEAR
:CLEAR
;CLEAR
;CLEAR
;CLEAR

TST
BNE
MOV
MOV
MOV

SUSWR
1%
#400,8USWR
’6,304
#3346

:1S SUSWR LOADED?
:BR IF YES

1%:

FLAG4L4

:POINT R1 TO LAST DEVICE ADDRESS

ERROR NO.
MESSAGE TYPE
TEST NO.
CONSOLE UNDER TEST FLAG
DEVICE COUNT
UNIT NUMBER

:«x CLEAR 11/44 CPU FLAG

:ELSE, DEFAULT TO SUSWR=400
:INITIALIZE TIMEOUT VECTORS TO TRAP
:
CATCHER ROUTINE

INITIALIZE THE COMMON TAGS

::CLEAR THE COMMON TAGS (SCMTAG) AREA
MOV
#SCMTAG,R6
;:FIRST LOCATION TO BE CLEARED

003132

005026

ADD

.SBTTL

003136

RO,R1

MOV
ADD
CMP
BLE
RTS

CLR

001112
000004
000006

:POINT R2 TO THE DEVICE ADDRESS TABLE

$BASE , R0

1%:

003002

000400
000006
000003

#ADRTBL ,R2

001015
001006

001010

CLR

(R6) +

::CLEAR MEMORY LOCATION

MOV
MOV

#340,3#I10TVEC+2 ;;LEVEL 7
#SERROR,#EMTVEC ;;EMT VECTOR FOR ERROR ROUTINE

MOV

#STRAP,@#TRAPVEC ;:TRAP VECTOR FOR TRAP CALLS

CMP
#SWR,R6 ;;DONE?
BNE
.6
::LOOP BACK IF NO
MOV
#1000, SP
::SETUP THE STACK POINTER
;s INITIALIZE A FEW VECTORS
MOV
#$SCOPE ,a#I0TVEC ;;10T VECTOR FOR SCOPE ROUTINE

MOV

mov
MOV
mov
CLR
MOVB
mov

MoV

l!kO.iJéHTVEC*Z ssLEVEL 7
llko.altRAPVECOZ:LEVEL 7

#SPURDN,3#PWRVEC ;;POWER FAILURE VECTOR
#340,9#PURVEC+2 ;;LEVEL 7
SENDCT,$EOPCT
:;SETUP END-OF -PROGRAM COUNTER
$ESCAPE
::CLEAR THE ESCAPE ON ERROR ADDRESS
#1,SERMAX
:2ALLOW ONE ERROR PER TEST
#..3LPADR
;2 INITIALIZE THE LOOP ADDRESS FOR SCOPE

#.,.SLPERR

::SETUP THE ERROR LOOP ADDRESS

OFERRVEC ,-(SP)

;;SAVE ERROR VECTOR

;:SIZE FOR A HARDWARE SWITCH REGISTER. IF NOT FOUND OR IT IS
;;EQUAL TO A *'=1"", SETUP FOR A SOF TWARE SWITCH REGISTER.
mov

1435 003452
16436 003456
1437 003462
1438 003470
1439 003472
1440 003500
1441 003502
1442 003510
1443
1444 003512

1445 003516
1446 003522
1447 003526
1448 003532
1449 003540
1450 003544
1451 003550
1452 003552
1453 003556
1454 003562
1455 003566
1456 003572
1457 003576
1458 003602
1459 003604

CMP
BNE

:
6548

003334

000176
000174
000004
001074
000200

001040
001042

001110

001040

65%:
66$:

001107

MoV
RTI
MoV
Mov
MoV
CLR

BITB
BEQ

67%:

MoV

#64% ,aFERRVEL
#DSWR, SWR
#ODISP,DISPLAY
#-1,3SWR

::SET UP ERROR VECTOR
::SETUP FOR A HARDWARE SWICH REGISTER
ssAND A HARDWARE DISPLAY REGISTER
ssTRY TO REFERENCE HARDWARE SWR

65%

:sBRANCH IF NO TIMEOUT TRAP OCCURRED
:;AND
THE HARDWARE SWR IS NOT = -1
::BRANCH IF NO TIMEOUT

#SWREG, SWR

: ;POINT TO SOFTWARE SWR

$PASS

:sCLEAR PASS COUNT
;sTEST USER SIZE UNDER APT
s :YES,USE NON-APT SWITCH
:sNO,USE APT SWITCH REGISTER

66%

#65%, (SP)

:3SET UP FOR TRAP RETURN

#DISPREG,DISPLAY
(SP)+ ,3#ERRVEC
:sRESTORE ERROR VECTOR
#APTSIZE ,SENVM

67%

#$SUREG,
SWR

000001

003002

003436

108:

000010
000020

11$:

175370

002624
004620
000001

001106

000200

001107

000040

175330

INIT:

:
MANL

SIZE:

003014
002630
000004

3%:
4%:

MoV
RTI
MoV

BIT
BEQ

INC
JMP
BITB
BEQ
BITB
BNE
BIT
BNE

JSR
CLR
CLR
MoV
MOV
MOV
ADD
TST
INC

INC

001142

MOV
ASL
sus
CMP

002654

MOV

BLE

#1,R0
11%
#1,a#FLAGLS
11%
#118,(SP)

»
»

%
%

CMPB
BNE
BIS
BR

000001

»
%

000010

a#10,-(SP)
#10%.,a710

%
%

MoV
MOV
MFPT

»
>

000010
003430

»
»

;SIZE FOR 11/44 CPU

»
»

1430 003430
1431 003434
1432 003436
1433 003442
1434 003450

MoV
MoV
MoV

%
%

1420
14621
16422
1423 003376
1424 003402
1425 003410
1426 003412
1427 003416
1428 003420
1429 003426

177777

000004
001040
001C42
175516

(SP)+,an10

#BITL,aSWR

INIT
CTSTFL
1D
#B1T0,SENV

MANL

#BIT7,3ENVM
APTSZD
#BITS5,aSWR
APTSZD

»
»

003324
003326
0033
003334
003342
003350
003354
003360
3366
3370
003376

MACRO M1113 05-NOV-80 12:32 PAGE 28-2 SEQUENCE 38

DLDFO DLi1-W
ITIALIZE TH

00327
003300
003306
003314
003322

SAVE VECTOR
SET UP FOR TRAP
WHAT CPU??
ARE WE A 11/44
NO GO RESET VECTOR
YES SET FLAG

SKIP RTI
SET STACK RETURN

RETURN
RESTORE VECTOR

;TEST CLOCK ONLY?
:BR IF NOT
sELSE, SET CONSOLE TEST FLAG TO ENABLE CLOCK TESTS
AND JUMP TO TYPE PROGRAM ID
:
;CHECK IF ON APT
:BR IF NOT APT
:DID APT SIZE
:BR, IF APT SIZED

;WAS ''SDEVM'' MANUALLY SET?
:IF YES, SKIP SELF-SIZING

$BASE ,RO

:GENERATE DEVICE ADDRESS TABLE
:CLR TEMP LOCATION TO KEEP DEVICE COUNT
:CLEAR DEVICE MAP
sSAVE TIMEOUT VECTOR
;SET TIMEOUT POINTER
:LOAD BASE ADDRESS

$BASE ,RO
3%
CRCSR,RO

s INCREMENT DEVICE COUNT
;RESET STACK POINTER
;ADJUST DEVICE MAP FOR NEXT UNIT CHECK
;POINT RO TO NEXT DEVICE NUMBER
;FINISHED SIZING?
:BR, IF BASE ADDRESS HAS NOT BEEN CHECKED
:LOAD CONSOLE DEVICE ADDRESS

PC,DEVADR

TMP2
$DEVM

a4 ,R3

#4S, a0

#160,R0
(RC)
$OEVM
TMP2
sP
#1000,
SDEVM
#10,R0

;POINT RO TO UNIT #15 (UNIT#0=CONSOLE)
:CHECK FOR DEVICE EXISTANCE
;INDICATE DEVICE EXISTANCE IN DEVICE MAP

LDFO DLi1-W/1144 MFM SLU

MACRO M1113

1460 003610
1461 003616
1#6% 003620
1463 003624
}2g§ 003630

012737
005710
005237
ooszgr
010337

000004

}229 003634

000415

1468 003636
1469 003642
1470 003646
1471 003650
1472 003652
1473 003656
1474 003660
1475 003662
}2;9 003664

005037
013702
005702
100002
005237
006302
001401
000771
004737

TIALIZE TNS COMMON TAGS

003630

001144
002630
000004

05-NOV-80 12:32

5%:

002630
001144

003014

}2;8

SEQUENCE 39

MOV
ST
INC
INC
MOV

958,304
(RO)
$DEVM
TMP2
R3, a0

;SET UP TIMEOUT POINTER
:TEST FOR CONSOLE EXISTANCE
SINDICATE CONSOLE EXISTANCE IN DEVICE MAP
- INCREMENT DEVICE COUNT
:RESTORE TIMEOUT VECTOR

VCTADR

:BR TO GENERATE VECTOR ADDRESS TABLE

TMP2
$DEVM,R2
R2
1%
TMP2
R2
DVADT
TSTOVM
PC,DEVADR

:CLEAR TEMP LOCATION TO KEEP DEVICE CNT
:MOVE DEVICE MAP TO R2
:TEST MSB OF DEVICE MAP
:BR, IF MSB IS ZERO
: INCREMENT DEVICE COUNT, IF MSB=1
:SHIFT NEXT BIT INTO MSB POSITION
:BR, IF NO OTHER BITS ARE SET IN SDEVM
:CONTINUE CHECKING SDEVM, IF MORE BITS SET
:GENERATE DEVICE ADDRESS TABLE

APTSZID: CLR
MOV
TSTDVM: TST
BPL
INC
1%:
ASL
BEQ
BR
DVADT: JSR

002630

PAGE 28-4

:GENERATE VECTOR ADDRESS TABLE

1480 003670

012702

002742

VCTADR: MOV

#VCTTBL,R2

:GET LOCATION OF VECTOR TABLE

1482 003700
1483 003704

042700
010001

177000

BIC
MOV

#177000,R0
RO,R1

:CLEAR UPPER BITS
;

1485 003712

010022

RO, (R2)+

*PUT VECTOR ADDRESS IN TABLE

1487 003720
}233 003722

020001
003773

1481 003674 013700 001136

1484 003706 062701

MOV

000170

1%:

1486 003714 062700 006010

013700
005001
000300
006300
006300
006300
106101
006300
106101
006300
106101
062701
000301

1506 003766

001764

1509

1510 003774

1511 004002
1512 004006
1513 004014
1514 004016
1515 0064020
1516 004024

#170,R1

#10,R0
RO,R1
1%

:COPY BASE VECTOR

*POINT R1 TO LAST DEVICE VECTOR

*POINT RO TO NEXT VECTOR ADDRESS

‘FINISHED GENERATING VECTOR TABLE?
‘BR, IF LAST VECTOR IS NOT LOADED

:MOVE DEVICE COUNT INTO DEVICE COUNT MESSAGE

1492 003724
1493 003730
1494 003732
1495 003734
1496 003736
1497 003740
1498 003742
1499 003744
1500 003746
1501 003750
1502 003752
1503 003754
1504 003760

}ggz 003770

ADD

CMP
BLE

}23?

1505 003762

ADD

MOV

A¥#SVECT1,RO

002630

SHIFT:

000060

032701

000020

010137

024404

052737

000002

005037
032737
001001
0004 i4
005237
012700

902626
200001
002624
002654

MOV
CLR
SWAB
ASL
ASL
ASL
ROLB
ASL
ROLB
ASL
ROLB
ADD
SWAB

TMP2,R0
R1
RO
RO
RO
RO
R1
RO
R1
RO
R1
#60,R1
R1

;COPY DEVICE COUNT INTO RO
sCLEAR AUXILARY REGISTER
:PUT DEVICE COUNT IN UPPER BYTE OF RO
:MOVE MSB OF COUNT INTO
:MSB OF RO
:PUT MSB OF COUNT INTO CARRY
:MOVE MSB OF COUNT INTO R1
:MOVE NEXT BIT TO CARRY
:MOVE INTO R1
:MOVE LAST BIT OF DIGIT
LINTO R1
:CONVERT DIGIT TO ASCII
‘MOVE DIGIT TO UPPER BYTE

BEQ

SHIFT

:BR, IF NOT

BIT

002632

BEGIN:

001144

TCONS:

#B1T4,R1

MOV

R1,M2A

BIS

_ #BIT1,TMP3

CLR
BIT
BNE
BR
INC
MOV

THPI
#B1T0,$DEVM
TCONS
TSTDEV
CTSTFL
#CRCSR,RO

*HAVE BOTH DIGITS BEEN MOVED TO R1?

*MOVE DEVICE COUNT TO OUTPUT MESSAGE

’

:SET UP BIT MASK TO TEST SDEVM FOR DEVICES EXCEPT CONSOLE
:CLEAR LOCATION TO STORE TABLE OFFSETS
IS CONSOLE TO BE TESTED?
:BR, IF CONSOLE IS TO BE TESTED
‘BR, TO TEST OTHER DEVICES
“INDICATE CONSOLE UNDER TEST
*SET UP CONSOLE DEVICE ADDRESSES

DLDFO DLi1-W
ITIALIZE THE

M SLY
TAGS

1545 004160
1546 004164
1547 004166

MACRO M1113 05-NOV-80 12:32 PAGE !3-5 SEQUENCE 40

002634

1517 004030
1518 004034
1519 004036
15%0 004042
1521 004044
1522
1523
1526 004050
1525 004056
1526 004060
1527 004064
1528 004072
1529 004076
1530
1531 004100
1532 004104
1533 004110
1534 004114
1535 004122
1536 004126
1537 004132
1538 004134
1539 004140
1540 004144
1541
1542 004146
1543 004152
1544 004154

1%:

002652
004172

002632
002632
000002
001100

001144

002626

000002
000006

002742
000002
000006
000137

004172

MOV
MOV
CMP
BGE
JMP

#RCSR,RT
(RO)+,(R1)+
#TPSW,R1
1%
TMwn

;POINT R1 TO UUT ADDRESS TABLE
; TRANSFER CONSOLE ADDRESSES

;FINISHED ;IANSFEI?

:BR,

IF NO

;GO TEST CONSOLE INTERFACE

;PREPARE ADDRESSES ANC VECTORS F OR UUT

TSTDEV: BIT
BNE
ASL
ADD

SETADR:

001100

002792
002634

002626
ADR:

VECT:

INC
BR

TMP3,SDEVM
SETADR
TMP3
#2,THP1
SUNIT
TSTDEV

INC
ASL
MoV
ADD
MOV

SUNIT
TMP3
TMP1,R2
#2,THP1
ADRTBL
(R2) ,RO

MOV
MOV

#RCSR,R1
RO, (R1)+

MOV
MOV
ADD
BIT
BNE
JMP

VCTTBL(R2)
,RO
RO, (R1)+
#2,R0
RO, #6
VECT
TsTm

ADD
BIT
BNE

#2,R0
RO,#6
ADR

;CHECK TO SEE IF DEVICE IS TO BE TESTED
:BR, IF YES

;SHIFT MASK TO CHECK NEXT SDEVM BIT
s INCREMENT TABLE INDEX
s INCREMENT UNIT NUMBER
;G0 TEST NEXT BIT OF DEVICE MAP
;UPDATE UNIT NUMBER

;UPDATE DEVICE MAP TEST MASK
;MOVE TABLE OFFSET TO R2
;UPDATE TABLE OFFSET FOR NEXT DEVICE
;PUT UUT ADDRESS INTO RO
sPOINT R1 TO STORAGE AREA FOR UUT ADDRESSES
: TRANSFER UUT ADDRESS

;POINT TO NEXT UUT REGISTER
;FINISHED TRANSFER?
:BR, IF NOT

;PUT UUT VECTOR INTO RO

sTRANSFER UUT VECTORS TO ACTIVE

;POINT TO NEXT VECTOR
;FINISHED TRANSFER?
:BR, IF NOT
;GO TEST DEVICE

TABLE AREA

€

IDLDFO DL11=w/1144 MFM SLU

MACRO TCSR
M1113 05-NOv-80 12:32 PAGE 59 SEQUENCE 41

1 EST # 1 = TEST ABILITY TO REFERENCE

1548

LSBTTL

TEST # 1 = TEST ABILITY TO REFERENCE TCSR

CrRRRRRRRRRERRRRRRRRRERRCCEROEOOERRRRRRARRRORRORRNROOEOCERRORROROOOROEQROERETY

TeTEST 1 = TEST ABILITY TO REFERENCE TCSR
004172

000004

1549 004174
1550 004200
1551 004206
}ggi 004212

013733
012737
005777
000412

1554 004214

022626

1555 004216
1556 004222
1557 004224
1558 004226

CrRRRRRRRRRARRRREERRRRCEOECCERRROEOERRRRARRRRRNRNCEROEROROOROEROONOOOCROOOCETTS

000004
004214
176426

005737
001002
104001
000404

002624

004230
004234

004737
000001

015326

}gg} 004240

010337

000004

1559 004230

1560 004236

1563
1564

000000

$§11:
000004

1%:

2%:

3%:

SCOPE

MOV
MOV
TST
BR

(d, [

v ,R3
AR
aTCSR
43

;SAVE TIMEOUT VECTOR
sSET UP TIMEOUT VECTOR
:REFERENCE THE XMIT COMMAND/STATUS REG.
: GO TO END OF TEST

(SP)+,(SP)+

;RESTORE SP AFTER TIMEOUT

TST
BNE
ERROR
&

CTSTFL
2%
+1
4%

JSR
1

PC,SATYL

MOV

R3304

HALT

:CHECK IF DEVICE IS CONSOLE
:1F YES, SKIP ERROR TYPEOUT
:REPORT ERROR TO APT & TTY
:BR TO END OF TEST

::;ONLY REPORT A FATAL ERROR
::THE ERROR NUMBER (FROM APT LIST)
:RESTORE TIMEOUT VECTOR

CIOLDFO DLI1=W/1144 MFM SLU

MACRO M1113 05-NOV-80 12:32 PAGE go SEQUENCE 42

TEST # 2 = TEST ABILITY TO REFERENCE TBUF
1565

SBTYL
R

TEST # 2 = TEST ABILITY TO REFERENCE TBUF

'TEST 2 = TEST ABILITY TO REFERENCE TBUF

004244

000004

1566 004246
1567 004252
1568 004%60
}ggg 004264

013703
012737
005777
000412

1571 004266
1572 004270
1573 004274

0226%6
005737
001002

1574 004276
1575 004300
1576 004302

004302
004306

1577 004310
1578 004312

000004
004266
176356

002624

104002
000404

004737
000002

000000
010337

015326
000004

TSTZ:
000004

1%:

2%:
3%:
4%:

SCOPE

T T

TR T

MOV
MoV
TSt
BR

N6 ,R3
s, an
aTBUF
31

;SAVE TIMEOUT VECTOR
;SET UP TIMEOUT VECTOR
;REFERENCE THE XMIT BUFFER
;GO TO END OF
TEST

CMP
TST
BNE

(SP)+,(SP" ¢
CISTFL
2%
+2
31

;RESTORE SP AFTER TIMEOUT
;CHECK IF DEVICE IS CONSOLE
;IF YES, SKIP ERROR TYPEOUT

JSR
2

PC,SATYS

ERROR
BR

HALT
MOV

R3,a#4

T
R

T Y
R R

;REPCRT ERROR TO APT & TTY
;BR TO END OF TEST

s;ONLY REPORT A FATAL ERROR
;:THE ERROR NUMBER (FROM APT LIST)
;RESTORE TIMEOUT VECTOR

MACRO M1113 05-NOV-80 12:32 PAGE 51 SEQUENCE 43

(2 DLDFO_DLi1-W/1144 MFM SLU
THAT BIT2(MAINT. BIT) CAN BE SET & RESET

TE ST # 3 = TEST

1579

LSBTTL

TEST # 3 - TEST THAT BIT2(MAINT. BIT) CAN BE SET & RESET

:'Q""'Qt'Q""""""""""'Qt"..."""""'Q"""""t"

;*TEST 3 = TEST THAT BIT2(MAINT. BIT) CAN BE SET & RESET

;:'."t't'.Qt""""""""""'t""'t"."""""'"Q"'Q"'

O
B

VIV

VAL

004316
80 004320
81 004322
82 004330
3
84 004332
85 004336
86 004340
87 004342
8
89 004344
004344

1592 004354
1593 004362
1594 004370
1595
1596 004372
1597
1598 004374
1599 004402
1600 004410
1601
1602 004412
1603 004416
1604 004420
1005 004422
1606 004424

004424
004430
1607 004432

b
i
b
i
D
id
b
-

,_.--.___..___

ooocororOrO
O O

1608
1609 004434

000004
000005
032777
001411

1ST13:

000004

005737
001002
104015
000404

002624

004737
000015
000000

015326

052777
032777
001001

000004
000004

176310

1%:

176256
176250

000004
000004

005737
001002

002624

176236
176230

104017
000404

015326

052777
000005
032777
001404

000004

176176

000004

176166

042777

000004

176156

104020

000240

#BIT2,aTCSR

CLEAR EVERYTHING
TEST FOR BIT2 OF TCSR CLEAR
BR IF CLEAR

TST
BNE
ERROR
BR

CTSTFL
1%
+15

CHECK IF DEVICE IS CONSOLE
IF YES, SKIP ERROR TYPEOUT
BIT2 OF TCSR NOT CLEAR AFTER RESET

JSR
15

PC,8ATY4

;sONLY REPORT A FATAL ERROR
;:THE ERROR NUMBER (FROM APT LIST)

HALT

3$:

BIS
BIT
BNE

TEST FOR BIT2 SET
BR IF SET

ERROR

BIT2 OF TCSR WILL NOT SET

SET BIT2 OF TCSR

CLEAR BIT2 OF TCSR

BIC
BIT

#BIT2,aTCSR
#BIT2,3TCSR
7%

TST
BNE

CTSTFL

CHECK IF DEVICE IS CONSOLE
IF YES, SKIP ERROR TYPEOUT

PC,SATY4

6%:

JSR
17
HALT

;;ONLY REPORT A FATAL ERROR
::THE ERROR NUMBER (FROM APT LIST)
BITO OF TCSR WILL NOT CLEAR

7%:

BIS

#BIT2,3TCSR

BIT
BEQ

#BIT2,9TCSR
10¢

SET BIT2 OF TCSR
CLEAR BIT2 WITH RESET
TEST FOR BIT2 CLEAR
*+ [F CLEAR, GO TO NEXT TEST

BIC
ERROR

#BIT2,aTCSR

CLEAR BIT2, TO PRINT ERROR

4%:

BEQ

5%:

004737
000017
000000

BIT
BEQ

2%:

104016

042777
032777
001411

SCOPE

RESET

108:

ERROR
BR

RESET

NOP

TEST BIT2 CLEAR
BR IF CLEAR

5%
+17
7%

+20

RESET DID NOT CLEAR BIT2 OF
i

TCSR

CZDLDFO DLi1-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # & = TEST THAT TCSR BIT7(DONE) CLEARS WHEN XBUF IS LOADE

1619

JSBTTL

PAGE 32

SEQUENCE 44

TEST # & = TEST THAT TCSR BIT7(DONE) CLEARS WHEN XBUF IS LOADED

L LR
L L
A E S AL

;*TEST & = TEST THAT TCSR BIT7(DONE) CLEARS WHEN XBUF IS LOADED
004466
1620 004470
1621 004476
1622 004502
1623 004506

000004
052777
005077
105777
100021

1625
1626 004510
1627 004514
}g%g 004520

005077
105777
100014

1630 004522
1631 004526
1632 004530

005737
001005
042777

1633 004536
1634 004540

104003
000404

004542
004546
1636 004550

004737
000003
000000

015326

1638 004554

105777

176060

1624

1635 004542

1637 004552

1639 004560

005000

100417

1640 004562
}g:} 004564

005200
001373

1043 004566

005737

1644 004572
1645 004574

1646 004602

001005
042777

000405

164S 004614

000000

004606
004612

004737
000004

1650 004616
1651

000427

gT
L e

#BIT2,aTCSR
aTBUF
aTCSR
3%

;** ENABLE MAINT. WRAP
;LOAD XBUF
: CHECK DONE
:BR IF CLEAR

176126
176120

CLR
TSTB
BPL

aTBUF
aTCSR
3%

;
FIRST TEST TO FAIL
;FILL DOUBLE BUFFER
: CHECK DONE
:BR IF CLEAR

002624

TST
BNE
BIC

CTSTFL
1%
#BIT2,39CTCSR

ERROR
BR

+3
3$

PC,SATYL

2%:

JSR
3
HALT

4$:

TSTB

aTCSR

000004

176142

176122

1%:

3%:

002624
000004

176056

104004

1647 004604
1648 004606

SCOPE
BIS
CLR
TSTB
BPL

000004
176140
176132

TST4:

5%:

015326

::ONLY REPORT A FATAL ERROR
::THE ERROR NUMBER (FROM APT LIST)
:TCSR "'DONE'' NOT CLEARED WITH TBUF FULL

BMI]

INC
BNE

RO
48

:1F DONE SETS, BR TO END OF TEST

TST

CTSTFL

;CHECK IF DEVICE IS CONSOLE

BNE
BIC

5%
#BIT2,3CTCSR

ERROR

JSR
4

PC,SATY4

ENDB7

HALT

;:CLEAR TIMER

:CHECK FOR XMIT DONE

: INCREMENT TIMER
;BR IF TIMER NOT DONE

;#+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
s+ WITH TERMINAL.

;TCSR "'DONE'' DOES NOT SET
:BR TO END OF TEST

;sONLY REPORT A FATAL ERROR
;s THE ERROR NUMBER (FROM APT LIST)
;** BR TO NEXT TEST,
;*+« AND SKIP THE TYPEOUT THAT FOLLOWS

;*+

1655 004620

042777

000004

176032

1656 004626
1657 004634
1658 004636

023737
001412
005737

000042

000046

1660 C04644

005737

1659 004642

;CHECK IF DEVICE IS CONSOLE
;1F YES, SKIP ERROR TYPEOUT
;*+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
;*+ WITH TERMINAL.
:DONE NOT CLEARED WITH TBUF FULL
:BR TO END OF TEST

CLR

}ggg

1654 004620

;FILL SECOND BUFFER, BECAUSE REFRESH COULD CAUSE

001007

ID:

BIC

#BIT2,3CTCSR

001074

CMP
BEQ
TST

CTAYAC LT
6%
$PASS

001076

TST

$DEVCT

BNE

BECAUSE OF THIS FAILURE

;#+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
;*+ WITH TERMINAL.

;UNDER ACT11?
:1F YES, SKIP IDENT. TYPEOUT
;1S THIS THE FIRST PASS?

;1F NOT BR TO NEXT TEST & SKIP THE IDENTIFICATION TYPEOUTS
;1S THIS THE FIRST SUBPASS?

G &
MACRO M1113 05-NOV=-80 12:32
PAGE 32-1
TEST # & - TEST THAT TCSR BIT7(DONE) CLEARS WHEN XBUF 1S LOADE

SEQUENCE 45

CIOLDFO DLIT1=W/1144 MFM SLU
1661 004650
1662 004652

1663 004654

001004

TYPE

024344

005000
012701
005300
001376
005301
001374

s IF NOT, BRTO NEXT TEST

; TYPE PROGRAM INDENTIFICATION

;:TYPE NUMBER OF

104401

024402
032777
001402
000137

004712

BNE

104401

000020

005536
000002

1764150

6%:

ENDB7:
40%:

#BIT4L ASWR

ENDB7

TCLOCK

RO
#2 ,R1
RO
408
R1
408

DEVICES UNDER TEST

;CLOCK TEST ONLY?
kR
BR IF NOT
;ELSE, JUMP TO TEST CLOZK
.

L DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
s THAT MIGHT BE IN THE PROCESS OF BEING
‘%
TRANSMITTED TO FINISH BEFORE MAINTENANCE
fee WRAP FOR THE UART UNDER TEST IS DISABLED.
M

THIS WILL INHIBIT ANY COMMUNICATION

TO HARDWARE MEDIA SUCH AS TUS58 THAT MIGHT

BE ATTACHED TO UART UNDER TEST.

CIOLDFO DLI1=W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 5 = TEST THAT TCSR “DONE'' SETS WITH RESET

LSBTTL

167

PAGE 33

SEQUENCE 46

TEST # 5 = TEST THAT TCSR "DONE'* SETS WITH RESET

2
Rl iRl ldld)
3222
R d Rttt
2 223222222222 22 22322222

TCSR 'DONE'* SETS WITH RESET
TaTEST S = TEST THAT
lll})
dRRl Rl2
222
Rttt
223
23222222 222
222222

004714
1672 004716
1673 004726
1674 0047

000004
052777
005077
105777

000004
175712
175704

1676 004736

005077

175700

1678 004744
1679 004746

000005
105777

}gg% 004754

104005

1684 004756

000240

1675 004734

1677 004742

}gg? 004752

1685
1686

100375

000240

100401

175714

TST5:

1$:

SCOPE
BIS
CLR
1ST8

#BIT2,3TCSR
aTBUF
aTCSR

;*+ ENABLE MAINT. WRAP
;LOAD TRANSMIT BUFFER
;WAIT FOR DONE

CLR

aTBUF

;LOAD SECOND BUFFER

RESET
1STB

aT(SR

;CLEAR DONE WITH RESET
;CHECK FOR DONE SET

ERROR

;TCSR "'DONE'* DOES NOT SET WITH RESET

BPL

NOP

175666

BMI

108:

NOP

10%

;*« BR TO NEXT TEST IF DONE SET

goe

CZDLDFO DLT1-W/1144 MFM SLU

MACRO M1113

TEST # 6 = TEST ABILITY TO ACCESS RCSR

1687

05-NOV-80 12:32

LSBTTL

I 4

PAGE 34

SEQUENCE 47

TEST # 6 - TEST ABILITY TO ACCESS RCSR

HMAALAAAAL L

EA LA

ALAAARAALALAAAL

ARl

;*TEST 6 = TEST ABILITY TO ACCESS RCSR

;:"""QQ"'.Q""""'"""'Q".QQ'.'Q."""".QQQ""""'0'

004760

1688 004762

000004

1690 004774

0057

175634

1689 0047

}gg% 005000
1693 005002
1694 005004
1695 005006

01 g?
0004

022626
104006
010337

0950%2

TST6:

000004

ars R3

;SAVE TIMEOUT VECTOR

TST

aRCSR

:ACCESS RCSR

MOV
BR

1$:

000004

SCOPE

MOV

2%:

CMP
ERROR

Mov

s, ang
2%

(SP)+,(SP)+
+6

R3, 344

:SET UP TIMEOUT VECTOR
:BR TO END OF TEST
;RESTORE SP AFTER TIMgOUT
;CAN NOT ACCESS RCSR
;RESTORE TIMEOUT VECTOR

CIDLDFO DLi1-W/1144 MFM SLU

TEST # 7 - TEST

MACRO M1113

ABILITY TO ACCESS RBUF

1696

RTTIEE

0S-NOV-80 12:32

LSBTTL

PAGE 35

SEQUENCE 48

TEST # 7 = TEST ABILITY TO ACCESS RBUF

:'"'Q".'t"."""""'""""."'Q""Q."'."""Q'Q'""."

*TEST 7 = TEST ABILITY TO ACCESS RBUF

':t"""".'."Q"""'Q'"t""'..."'.'.""'QQ"Q'Q"Q'QQ'Q"

005012

000004

1697 005014
1698 005020

013703
012737

170% 005034
1703 005036

022626
104007

1999 0050%%
}78? 0050

1704 005040

005777
000402

010337

000004
005034

175604

TST7:
000004

¥4 RS
s, an

;SAVE TIMEOUT VECTOR
;SET UP TIMEOUT VECTOR

CMP
ERROR
Mov

(SP)+,(SP)+
+7
R3,a¥4

;RESTORE SP AFTER TIMEOUT
;CAN NOT ACCESS RBUF

TST
BR

1$:

000004

SCOPE

MOV
MoV

2%:

aRBUF
2%

;ACCESS RBUF
:BR TO END OF TEST

;RESTORE TIMEOUT VECTOR

CZOLDFO DLI1=W/1144 MFM SLU

MACRO M1113

05-NOvV-80 12: 32

&
'TEST # 10 = TEST THAT BITO(BREAK BIT) CAN BE SET & CLEARED

L1705

LSBTTL

PAGE 36

SEOUENCE 49

TEST # 10 - TEST THAT BITO(BREAK BIT) CAN BE SET & CLEARED & RESET

: ;tt""t'tt""Q'Q"'"Q'tt"t"t"'tt'QQQ'tt't""t'tt""t't"

S¢TEST 10 = TEST THAT BITO(BREAK BIT) CAN BE SET & CLEARED & RESET

005044 000004

. ; (23222222222 222222222222222222223332223322333233232322322223222222%§3;]

1706 005046
005054
1707
1708 005056

032777
001475
032737

000400

173764

000001

003002

};}? 005066

005737

002624

1709 005064

001407

1712 005072

001404

1714
};}2 005102

001462

1713 005074

032777

1717 005104
1718 005106
1719 005114

000005
032777
001411

1722 005124

104011

1720 005116
1721 005122

1723 005126
1724 005130

005737
001002

000010

000001

015326

1727 005140
1728 005146
};gg 005154

052777
032777
001001

000001
000001

};%} 005156

104012

1733 005160
1734 005166

042777
032777

1735 005174
1736 005176
1737 005202
1738 005204
1739 005206

1740 005210

001411
005737
001002
104013
000404

005210

004737

;;41 005216

000000

005214

000013

1743 005220
1744 005226
1745 005230
1746 005236
1747 005240

052777
000005
032777

1749 005250

000240

1748 005246

001404
042777

104014

N e ————————
e
—————————————————————

9% :

1%:

000000

000001
000001

;1S BREAK FUNCTION ENABLED?
tex BR TO NEXT TEST, IF NOT
;++ IS THIS A 11/44

TST

CTSTFL

A ;ES THIS IS 11/44. 1S THIS THE CONSOLE

175472
175464

175452
175444

175412

000001

175402

000001

175372

;Qt

iev NO

tex THIS IS THE CONSOLE SLU.SHOULD THE BREAK

#B1T03,3SWR

BEQ

108

;e+ TEST BE PERFORMED
iex NO

RESET
BIT
BEQ

#BIT0,aTCSR
3$

;CLEAR EVERYTHING
;CHECK BITO OF TCSR CLEAR
‘BR IF CLEAR

ERROR

+11

;BITO WAS NOT CLEAR AFTER RESET

'BR

CTSTFL
1%

:;ONLY REPORT A FATAL ERROR
::THE ERROR NUMBER (FROM APT LIST)

PC,8ATYL

2%:

HALT

3$:

BIS
BIT
BNE

#B1T0,3TCSR
#B170,3TCSR
43

:SET BITO IN TCSR
STEST BITO OF TCSR
‘BR IF SET

ERROR

+12

;BITO OF TCSR WILL NOT SET

BIC
BIT

#B1T0,aTCSR
#BIT0,aTCSR

:CLEAR BITO OF TCSR
:TEST BITO OF TCSR

4$:

5%:

000001

iex NO

JSR
1"

002624

015326

BIT

ST
BNE

000404

004737
000011

#BIT8,asWR
108
#BITO,FLAG44

BEQ

173736

175524

SCOPE

BIT
BEQ
BIT

BEQ

002624

005130
005134

;;gz 005136

T§110:

BEQ
3
BNE
ERROR
BR

JSR

68:

HALT

7%:

BIS
RESET
BIT
BEQ
BIC

10$:

ERROR
NOP

7%
CTSTFL
11
+13
7%

:BITO OF TCSR WILL NOT CLEAR

::ONLY REPORT A FATAL ERROR

PC,3ATYS
#BIT0,aTCSR

::THE ERROR NUMBER (FROM APT LIST)

#B1T0,aTCSR

:SET BITO IN TCSR
CLEAR BITO WITH RESET
STEST BITO CLEAR

+14

RESET DID NOT CLEAR BITO OF TCSR

108
#B1T0,3TCSR

i«x BR IF CLEAR
*CLEAR BITO, TO PRINT ERROR
Y

—

0 LDFO DLI1=W/1144 MFM SLU
(TEST # 11 = TEST THAT BITO6(XMIT

MACRO M1113 05-NOV-80 12:32 PAGE &7 SEQUENCE 50
INT EN) CAN BE SET & RESET

1750

LSBTTL
A

TEST # 11 = TEST THAT BIT6(XMIT INT EN) CAN BE SET & RESET

A AR

R RRdRRdRdRdRRRRRdRdRRdd])

S#TEST 11 = TEST THAT BIT&(XMIT INT EN) CAN BE SET & RESET
[VLSLSLSTS
N LN LN

5 RIAXNSRELR

S 88888888
VIV
TV

-‘ggiifii‘dCF\fljcuflNhfl

Iy
I
R
e JUee W
Tl
e
e
R

T$111:

104021

005310

000402

175366

005312
014400

175360

000100

175334

BIT
BEQ
ERROR

1%:

2%:

000100
000100

104023

80 005364
81 005366
82 005374
3
84 005376
v

1
1
1
1
1
1
1

NN NSNSNSNNN
oo
oo

1772
1773 005336
1774 005344
1775 005352
1776 005354
1 77
1 778
1 79 005356

86 005400

042777
032777
001401

3$:

000100
000100

000100

175254

000100

175244

4%:

104025

010377

@TVECT,R3

#18,3TVECT
PC,WRPSW

.WORD

340

#BIT6,aTCSR

2%
+21

175244

CMP
ERROR

(SP)+,(SP)+

+22

#BIT6,aTCSR

BIS
BIT
BNE

ggl!é.iTCSR

ERROR

+23

BIT

5%:

;SET UP INTERRUPT VECTOR FOR ERROR REPORT
;SET PSW TO PRIORITY=7
:TEST BIT6 OF TCSR
;BR IF ZERO
;BIT6 IN TCSR NOT CLEAR AFTER RESET

;RESTORE SP AFTER INTERRUPT
;XMIT INTERRUPT OCCURRED

PRIO0=7

;SET BIT6 OF TCSR
;TEST BIT6 OF

:BR, IF SET

TCSR

;CANNOT SET BIT6 OF TCSR

:BR IF CLEAR

;CANNOT CLEAR BIT6 OF TCSR

BIS

#BIT6,aTCSR

BIT
BEQ

#BIT6,aTCSR

ERROR

+25

MoV

R3,aTVECT

RESET

;CLEAR EVERYTHING

;SAVE XMIT VECTOR

;CLEAR BIT6 OF TCSR
;TEST BIT6 OF TCSR

BIC

BEQ
ERROR

104024

052777
000005
032777
001401

SCOPE

RESET
Mov
Mov
JSR

022626
104022

052777
032777
001001

SNNNNNNNNNNNSNSNSNSN
Vi
VIV AWV
oo

';t.'Q'"'tt""""""'"'""".".t'".'QQ""""Q"""""

;SET BIT6 OF TCSR
;CLEAR BIT6 WITH RESET
;TEST BIT6 OF TCSR
:BR IF CLEAR

;CANNOT CLEAR BIT6 OF TCSR WITH RESET
;RESTORE XMIT VECTOR

{

2 DLDFO DLi1=W/1144 MFM SLU

MACRO M1113 05-NOV-80 12:32
ITEST # 12 = TEST THAT BIT6 OF RCSR CAN BE SET & RESET

.SBTTL

1787

SEQUENCE 51

TEST # 12 - TEST THAT BITé OF RCSR CAN BE SET & RESET

':'."""'."""""""'""'.""'.t't.""""""""""'t

;*TEST 12 = TEST THAT BIT6 OF RCSR CAN BE SET & RESET
t§112:

33333
32332

SRR AR RN RN AR RN NA R

000100

175176

BIT

104026

BEQ
ERROR

ORVECT,RY
#1%,9RVECT
PC,WRPSW
340
.WORD
#BIT6,aRCSR

000402

CMP
ERROR

+27

175222

MOV
MoV
JSR

»
N

8
w

D
D
D e

001404

022626

1%:

104027

2%
+26

(SP)+,(SP)+

5504

b
-

000100
000100

052777
032777
001001

2%:

—

000100
000100

042777
032777
001401

104030

-t

b
o

3%:

104031
Vi

ed e

oo PORON) b b e e e b
VISW20V~ OV

D
D
- e
D
)
D
)
) el
D el
)
)
—

WN=O

D el

)

D e

SESSSR S22 g3
33
3

SCOPE

RESET

RN RN

175230
005444
014400

7
;94 005436

0o 0o 00 00 0o 0o 0o 0o OO 0o O 0o OB OO OO OO

no4

PAGE 38

052777
000005
032777
001401

5530

104032

010377
012737

000100

175116

000100

175106

000012

001002

4%:

5%:

BIS
BIT
BNE

#BIT6,3RCSR
#BIT6,aRCSR

ERROR

+30

BIC

#B81

BIT
BEQ

#B1
4%

ERROR

+31

BIS

#BIT6,aRCSR

BIT

BEQ

#BIT6,aRCSR
5%

ERROR

+32

MOV

R3,aRVECT

RESET

TCLOCK: MOV

#12,8TSTNM

RN NNRRRNNRAARAAARAAAAANOOORONRORTS

;CLEAR EVERYTHING
;SAVE RECEIVE VECTOR
sSET UP INTERRUPT VECTOR FOR ERROR REPORT
;SET PSW TO PRIORITY=7
;TEST BIT6 OF RCSR
;BIT6 OF RCSR NOT CLEAR AFTER RESET
sRESTORE SP AFTER INTERRUPT

;RCVR INTERRUPT WITH PRIORITY=7
;SET BIT6 OF RCSR

;TEST BIT6 OF RCSR

:BR, IF SET

;CANNOT SET BIT6 OF RCSR
;CLEAR BIT6 OF RCSR
;TEST BIT6 OF RCSR
:BR, IF CLEAR
s CANNOT CLEAR BIT6 OF RCSR

;SET BIT6 OF RCSR
;CLEAR BIT60F RCSR WITH RESET
;TEST BIT6 OF RCSR
:BR, IF CLEAR

;CANNOT CLEAR BIT6 OF RCSR WITH RESET
;RESTORE RECEIVE VECTOR
;ADJUST TEST NUMBER TO (NEXT TEST = 1)

—

'CIDLDFO

TEST # 13

——
-

——————

——

—

———

DLI1=W/1144 MFM SLU

———

——

MACRO M1113

= TEST ABILITY TO ACCESS LKS

1826

———
.

S——————

—

et
.

05-NOV-80 12:32

.SBTYL

PAGE 39

SEQUENCE 52

TEST # 13 = TEST ABILITY TO ACCESS LKS

HAMAAALAA LA

LA AR

;*TEST 13 = TEST ABILITY TO ACCESS LKS

005544 oooogt.

1827 005546

005552
005554
005562

1828 005564

1829 005570
1830
005576

005737

0016;0
032777
001014

81370

127;
005777

}3%} 005602 000402
1833 005604

022626

}ggg 005610

010337

}ggg 005606

té113: score

002624

000100

000004

005604
175072

104010
000004

173256

R R

NG ,R3

:SAVE TIMEOUT VECTOR

MOV
ST

(AR I
aLKS

R R RRddddRdRRRRdRdddd
)]

;1S CONSOLE UNDER TEST?

TST14
#BIT6,8SWR
TST14

B8R

CTSTFL

BEQ
BIT
BNE

MOV

000004

:IF NOT, SKIP THIS TEST
sARE LINE CLOCK TESTS INHIBITED?
:1F YES, SKIP THIS TEST
SET UP TIMEOUT VECTOR
*ACCESS LKS

INO TIMEOUT = BR TO END OF TEST

1%:

CMP
ERR]OR

(SP)+,(SP)+
+10

:RESTORE SP AFTER TIMEOUT

2%:

MOV

R3,a#4

JRESTORE TIMEOUT VECTOR

;CAN NOT ACCESS LKS

C20L DFO DLi1=W/1144 MFM SLU

TEST # 14 = TEST THAT BIT6 OF

MACRO M1113

8 §

05-NOV-80 12:32

PAGE 40

LKS CAN BE SET & RESET

1838

.SBTTL
PR

¥ =

SEQUENCE 53

TEST # 14 = TEST THAT BITé OF LKS CAN BE SET & RESET

RRRRRNRERARRNNE R RN ERORRRRAROERARRNARARRRNIARNRONARROAOORORQOOCEROORTSE

:#TEST 14 = TEST THAT BITé OF LKS CAN BE SET & RESET
005622

ONS~N
VINON
N
VIS NO~N

1839 005616

S8x3833
=N

005614

002624
000100
175034

0
1 005672

AR AR

nglk:
173206

005672
014400

175026

000100

175010

CTSTFL
TST15

BIT

#BIT6H,aSWR

RESET
MoV
MoV

aRTCVT,R3

BNE

JSR

TST15

18 ,RTCVT
PC,WRPSW

.WORD

340

#BIT6,aLKS

104033

000402

CMP
ERROR

(SP)+,(SP)+

022626
104034

1%:

’%:

174770
174762

9 005714
W
= O

BIT
BEQ
ERROR

000100
000100

SCOPE
IS8T
BEQ

0462777
032777
001401

000100
000100

174750
174742

3s:

104036

052777
000005
032777
001401

000100

174730

000100

174720

4$:

104037

010377

174712

5%:

2%
+33

+34

BIS
BIT
BNE

#BI1T6,aLKS
#BITE,ALKS

ERROR

+35

BIC
BIT
BEQ
ERROR

#B1T6,aLKS
#BIT6,aLKS
4%

BIS
RESET

#B176,aLKS

BEQ

+36

#B176,aLKS

ERROR

+37

Mov

R3,aRTCVT

R R

R RARARRRRRRRRRRRRRRARARDD)

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INMIBITED?
;IF YES, SKIP THIS TEST

;SAVE LINE CLOCK VECTOR
sSET UP INTERRUPT VECTOR FOR ERROR REPORT

;SET PSW TO PRIORITY 7
;TEST BIT6 OF LKS

;BIT6 OF LKS NOT CLEAR AFTEP RESET

sRESTORE SP AFTER INTERRUPT

;LKS INTERRUPT WITA PRIORITY=7
;SET BIT6 OF LKS
;TEST BIT6 OF

;BR IF SET

LKS

;CANNOT SET BIT6 OF LKS
;CLEAR BIT6 OF LKS
;TEST BIT6é OF LK

s CANNOT CLEAR BIT6 OF LKS
;SET BIT6 OF LKS
;CLEAR BIT6 OF LKS WITH RESET
;TEST BIT6 OF LKS

:BR IF CLEAR

;CANNOT CLEAR BIT6 OF LKS WITH RESET
;RESTORE LINE CLOCK VECTOR

CZOLDFO DLI1=W/1144 MFM SLU

MACRO M1113

05-NOV-B0 12:32

TEST # 15 = TEST FOR DUAL ADDRESSING OF REGISTERS

1875

LSBTTL

€

FPAGE 41

SEQUENCE 54

TEST # 15 = TEST FOR DUAL ADDRESSING OF REGISTERS

':.'Q"'.'Q'.Q""""""""""'.l""'."""""'""""'Q'

DUAL ADDRESSING OF REGISTERS
;*TEST 15 = TEST FOR
2322222222022 22222220000 R R dRRRRdRRlRilillddd)
'

005764

000004

1876 005766
1877 005772
1878 005776

013703
013704
012737

1880 006012
1881 006014

000005
012700

1883 006026

001404

2223222222223 222

000004
000006
006130

1ST15:
000004

1879 006004 012737 000340 000006
000002

1882 006020 032777 000020

173012

1884 006030

013737

002674

001020

1886 006040
1887 006046
1888 006054
1889 006060
1890 006066
1891 006070
1892 006074
1893 006102
1894 006110
1895 006116
1896 006120
1897 006126
1898 006130
1899 006132
1900 006134
1901 006136
}38§ 006140

013737
013737
040037
023737
001002
050037
017737
052777
032777
001011
013777
000401
022626
006300
105700
100343
000401

002634
001020
001022
001020

001020
001022

1904 006142
1905

104040

1908 006144
1909 006150

010337
010437

1885 006036

000403

001022
172722

000100

001024
172712
172702

001024

172674

are ,R3
ar6 R
00, an

:SAVE TIMEOUT VECTOR
:SAVE TIMEOUT PSW
:SET UP TIMEOUT VECTOR

RESET
MoV

#BIT1,R0

:CLEAR EVERYTHING
:SET UP BIT MASK

MOV
BIT

BEQ

1$:
2%:

001022

000100

SCOPE

MOV
MOV
MOV

38:

L%
5¢:

6$:

#340,a06
#BIT4L,aSWR
18

:KEEP PRIO=7

:CLOCK TEST ONLY?
:BR IF NOT

MOV

LKS,$GDADR

:ELSE, MOVE GOOD LKS ADDRESS INTO SGDADR

MOV
MOV
BIC
CMP
BNE
BIS
MOV
BIS
BIT
BNE
MOV
BR
CMP
ASL
TSTB
BPL
BR

RCSR,$GDADR
$GDADR,$BDADR
RO, $BDADR
$GDADR,$BDADR
3
RO, $BDADR
aSBDADR,$GDDAT
#B1T6,38BDADR
#BIT6.38GDADR
6%
$GDDAT,3$BDADR
5$
(SP)+,(SP)+
RO
RO
2%
7%

:MOVE GOOD RCSR ADDRESS INTO $GDADR
:MOVE GOOD ADDRESS INTO TEST ADDRESS LOCATION
:CREATE BAD ADDRESS BY COMPLEMENTING ONE BIT
;ARE ADDRESSES IDENTICAL?
:1F NOT, TEST THIS ADDRESS
CELSE, BIT SET THIS BIT POSITION TO GENERATE BAD ADDRESS
:SAVE CONTENTS OF BAD ADDRESS IF IT EXISTS
:SET BIT6 USING BAD ADDRESS
:CHECK TO SEE IF GOOD ADDRESS CONTAINS BITé
:BR IF SET ===> ERROR
i
;RESTORE ANY MEMORY LOCATION THAT WAS ALTERED
:BR TO CONTINUE TEST
:RESTORE SP AFTER TIMEOUT
SSHIFT BIT MASK TO NEXT POSITION
:COMPLEMENTED ALL BITS FROM 1 - 77
i3 8¢
:BR, IF NOT.
3309
:BR TO NEXT TEST

ERROR

+40

:DUAL ADDRESSING ERROR
:$BDADR = DUAL ADDRESS

:$GDADR = GOOD ADDRESS

}389

000004
000006

78:

MOV
MOV

R3,a44
R4 ,a¥6

;RESTORE TIMEOUT VECTOR
:RESTORE TIMEOUT PSW

CIDLDFO DLi1-W/1144 MFM SLU

TEST # 16 = TEST THAT BIT7

MACRO M1113

05-NOvV-80 12:32

OF LKS SETS & CAN BE CLEARED

1910

.SBTTL
M

D 5

PAGE 42

SEQUENCE 55

TEST # 16 = TEST THAT BIT7 OF LKS SETS & CAN BE CLEARED

ARARt
R0 R
R dRRRdRdRRdRRRdRRdddddd)

S+TEST 16 = TEST THAT BIT? OF LKS SETS & CAN BE CLEARED
006154

1911 006156

006162
006164
006172

000004

005737

001437
032777
001033

':'".'.t.'Q"'t"""'"'.""""."..'Q""'."Q'Q".'Q"QQ"'

T$116:

002624

000100

;cope
ST

CTSTFL

;1S CONSOLE UNDER TEST?

aLKS

;CLEAR EVERYTHING & SET BIT7 OF LKS
;TEST FOR BIT7 OF LKS

ERROR

+41

;BIT7 OF LKS DID NOT SET WITH RESET

BIC
BIT
BEQ
BIC
BIT

;CLEAR BIT7 OF LKS
;TEST BIT7 OF LKS

BEQ

#BIT7,3LKS
#BIT7,3LKS
3%
#BIT7,3LKS
#B1T7,aLKS
3%

ERROR

+42

;CAN NOT CLEAR BIT7 OF LKS

CLR
TSTB
BMI

RO
aLKS
TST17

;CLEAR TIMER
;TEST FOR BIT7 OF LKS
:BR, IF SET

CONT

;CONTINUE UNTIL TIME EXPIRES

BEQ
BIT
BNE

172646

1912 006174
1913 006176

000005
105777

}g}g 006204

104041

1918
1919
1920
1921
1922

006206
006214
006222
006224
006232

042777
032777
001410
042777
032777

}g%z 006242

104042

1927 006244
1928 006246
1929 006252

005000
105777
100403

}gg% 006256

001373

BNE

104043

ERROR

}g}g 006202

}ggz 006240

1930 006254

1933 006260

100401

001401

005200

174472

1$:

000200
000200

174460
174452

000200
000200

174442
174434

174422

28%:

3%:
CONT:

RESET
1STB

BMI

INC

TST17
#BIT6H,ASWR
ST17
2%

+43

;IF NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INMIBITED?
;1F YES, SXIP THIS TEST
;BR IF SET

;:TRY ONE MORE TIME BECAUSE THE CLOCK
;
MAY HAVE SET IMMEDIATELY AFTER THE FIRST CLEAR

: INCREMENT TIMER

;BIT7 OF LKS DOES NOT SET

CIDLDFO DLi1-W/1146 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 17 = TEST THAT THE REAL TIME CLOCK INTERRUPTS PROPERLY
|

1934

LSBTTL

E S

PAGE 43

SEQUENCE 56

TEST # 17 = TEST THAT THE REAL TIME CLOCK INTERRUPTS PROPERLY

R 2222222222222

2332222222222 2222222222220

RdRRdRRRdRlRdd)

CLOCK INTERRUPTS PROPERLY
THAT THE REAL TIME22 2322222222020
(#TEST 17 = TEST2222322
200220 RRRdRldll)
2222222232222

222222222232

006262
1935 006264
006270
006272

000004
005737
001503
032777

1937 006306
1938 006310
1939 006314

000340
017703
017704

TST17:

002624

SCOPE
TST

CTSTFL
18720
#BIT6,aSWR

014400

BEQ
BIT
BNE
JSR

174362
174360
006356

MoV
MoV
MoV

.WORD
340
aRTCVT,R3
dRTCPSW, R4
#2% ARTCVT

1942 006334
1943 006342

012777
105777

000100
174326

Mov
TSTB

#BIT6,3LKS
aLKS

1945 006350
1946 006352
}gzz 006354

000240
000240
000402

1949 006356

022626

1952 006362
1953 006366
1954 006374

005077
012777
004737

174306
006416
014400

1956 006402

105777

174266

0063
1936 006302

1940 006320

001077
004737

000100

172540

174350

1941 006326 012777 000340 174344
1944 006346

}gg? 006360

1955 006400

100375

000240

100375
000240

}gg? 006414

000402

1$:

174302

022626
104045

1965 006422
1966 006430
1967 006436
1968 006444

012777
042777
052777
105777
100375

}3;? 006452

000240

1972 006454
1973 006456
1974 006460
1975 006462
1976 006470
1977 006474

104046
000401
022626
042777
010377
010477

BPL

174246
174236
174230

174204

;CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE
;WAIT FOR RTC DONE (INTERRUPT REQUEST)

CMP

ERROR

(SP)+,(SP)+

+44

;RESTORE SP AFTER INTERRUPT

3%:

CLR
Mov
JSR

aLKS
#48 ,ARTCVT
PC,WRPSW

;:DISABLE RTC INTERRUPTS & CLEAR DONE
;SET RTC INTERRUPT VECTOR FOR ERROR
; CHANGE PSW TO PRIORITY 5

20%:

1STB

aLKS

;WAIT FOR DONE (INTERRUPT REQUEST)

BPL
NOP

.WORD

240

20%

;RTC INTERRUPTS AT PRIORITY 7

;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT

;1F NO INTERRUPT - BR TO CONTINUE TEST

4$:

CMP
ERROR

(SP)+,(SP)+
#45

;RESTORE SP AFTER INTERRUPT
;RTC INTERRUPTS WITH INTERRUPTS DISABLED

58:

MoV
BIC
BIS
TSTB

#7% ,aRTCVT
#BIT7,3LKS
#BIT6,aLKS
aLKS

;POINT RTC VECTOR TO END OF TEST
;CLEAR CLOCK DONE FLAG
sALLOW INTERRUPTS
;WAIT FOR RTC DONE

6%:

BPL

NOP

000100
174202
174200

;KEEP PRIORITY AT 7

;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;BR, IF NO INTERRUPT OCCURS

NOP

006460
000200
000100
174224

#340,3RTCPSW

;SAVE LINE CLOCK VECTOR
;SAVE LINE CLOCK PSW VECTOR
;SET RTC INTERRUPT VECTOR TO ERROR REPORT

NOP
NOP
BR

000240

1962 006416
}ggz 006420

1969 006450

Mov

2%:

104044

1957 006406
1958 006410

1959 006412

174332

15120
PC,WRPSW

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
sARE LINE CLOCK TESTS INHIBITED?
;IF YES, SKIP THIS TEST
;SET PSW TO PRIORITY 7

7%:
38%:

ERROR
BR
CMP
BIC
MOV
MoV

+46
8%
(SP)+,(SP)+
#BIT6,aLKS
R3,aRTCVT
R4 ,aRTCPSW

;GIVE TIME FOR INTERRUPT

;RTC INTERRUPT DID NOT OCCUR
;BRANCH OVER STACK CORRECTION
;RESTORE SP AFTER INTERRUPT
;DISABLE INTERRUPTS
;RESTORE LINE CLOCK VECTOR
;RESTORE LINE CLOCK PSW VECTOR

MACRO M1113
TEST RTC FOR DOUBLE INTERRUPTS

9 DLDFO DLi1=-W/1144 MFM SLU

TE ST # 20

1978

05-NOv-80 12:32

.SBTTL

E.
3
PAGE 44
SEQUENCE 57

TEST # 20 - TEST RTC FOR DOUBLE

INTERRUPTS

;‘""'."".""'"""""""""'Qt"".'Q"'.'."'Q"Q"""

S#TEST 20 - TEST RTC FOR DOUBLE INTERRUPTS
A

006500

1979 006502

000100

~
o

gg 8&

NN
VIS
oo~

174150
174146

012777
004737
000240
012777

80
383838883258

1980 006520
1981 006522
1982 006526

09
006602
04

2003 006626
2004 006630
2005 006632
2006
2007 006634
2008 006636
2009
2010
2011 006640
2012 006646
2013 006652

1§120:

002624

006506
006510
006516

105777
100375

174136
174132

000100

174112

1%:

104047

006634

014400

174062

104050

042777
010377
010477

2%:
25%:

3%:

022626

000100
174024
174022

174026

SCOPE

TST
BEQ

BNE
RESET
MOV
MOV
MOV
MGV
JSR

000240
000240
000240
000240

000401
022626
012777
004737
000240
000240
000240
000240
000240
000402

AR AR

BIT

172322

006604
000340
014400
174106

AA R

4%:

MOov
1STB
BPL
NOP
NOP
NOP
NOP

ERROR
BR
CMP
MOV
JSR

CTSTFL

TST21

#BIT6,3SWR

TsT21

aRTCVT,R3

R4
dRTCPSW,
#2% ARTCVT

#340,3RTCPSW
PC,WRPSY

.WORD

240

#BIT6,aLKS
aLKS
1%

AR RRRRRRRRRRRRRRRRRdd)

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INHIBITED?
;1F YES, SKIP THIS TEST
;CLEAR EVERYTHING
;SAVE LINE CLOCK VECTOR
;SAVE LINE CLOCK PSW VECTOR
;SET UP RTC INTERRUPT VECTOR

;DISALLOW INTERRUPTS AFTER THE INTERRUPT
;SET PRIORITY TO 5
;CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE
;WAIT FOR DONE

;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT

;GIVE TIME FOR ANY INTERRUPT

(SP)+,(SP)+

;RTC INTERRUPT DID NOT OCCUR
;BRANCH OVER STACK CORRECTION
;RESTORE SP AFTER INTERRUPT

PC,WRPSW

;SET PSW TO PRIORITY 5

+47

25%

#3% ,9RTCVT

.WORD

240

sPOINT RTC

VECTOR TO ERROR REPORT

;GIVE SOME TIME
;GIVE SOME TIME
;GIVE SOME TIME
;GIVE SOME TIME
:NO INTERRUPT =

FOR AN INTERRUPT
FOR AN INTERRUPT
FOR AN INTERRUPT
FOR AN INTERRUPT
BR TO END OF TEST

NOP
NOP
NOP
NOP
BR

CMP
ERROR

+50

(SP)+,(SP)+

;RESTCRE SP AFTER INTERRUPT
; INTERRUPT SEQUENCE DID NOT CLEAR
s INTERRUPT REQUEST

#BIT6,aLKS
R3,aRTCVT
R4 ,ARTCPSW

;DISABLE CLOCK INTERRUPTS
;RESTORE LINE CLOCK VECTOR
sRESTORE LINE CLOCK PSW VECTOR

BIC

MOV
MOV

CZOLDFO DLI1=-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 21 = TEST THAT RTC INTERRUPT CLEARS WITH RESET

JSBTTL

2014

PAGE 45

SEQUENCE 58

TEST # 21 = TEST THAT RTC INTERRUPT CLEARS WITH RESET

: ;'Q'"".'..'Q""""""""""'Q""Q"""Q'QQ"t'.""""

S#TEST 21 = TEST THAT RTC INTERRUPT CLEARS WITH RESET

: ;'.'..'"""""""""""""""""'.Q'.""."'Q"Q"Qt"

006656

000004

2015 006660
006664
006666
006674

005737
001442
032777
001036

2017 006702
2018 006704

000340
017703
012777

2016 006676
2019 006710
2020 006716
2021 006724

2022 006730

2023 006732
2024 006734

2025 006740

2026 006742
2027 006744
2028 006746
2029 006750
2030 006752
ggg; 006760

004737

012777
105777
100375

000005
004737

000240

000240
000240
000240
000240
042777
000402

2033 006762
gggg 006764

022626
104051

2036 006766

010377

t§121:

002624
000100

172144

000100
173744

173760
173750

18:

173704

;1S CONSOLE UNDER TEST?
:IF NOT, SKIP THIS TEST
ARE LINE CLOCK TESTS INHIBITED?
1F YES, SKIP THIS TEST

MOV
MOV

LWORD
340
SRTCVT,R3
#28 ,3RTCVT

;SAVE LINE CLOCK VECTOR
:POINT RTC VECTOR TO ERROR REPORT

MOV
TSTB
BPL

RESET
JSR

014400

000100

CTSTFL
15122
#B1T6,aSWR
18122

JSR

014400
173766
006762

SCOPE

TST
BEQ
BIT
BNE

PC,WRPSW

:SET PRIORITY TO 7

#B176,aLKS
aLKS

*CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE
:WAIT FOR DONE (INTERRUPT REQUEST)

PC,WRPSW

;CLEAR PENDING INTERRUPT WITH RESET
:SET PRIORITY T0 5

MORD

240

NOP
NOP
NOP
NOP
BIC
BR

#B1T6,aLKS
3%

;GIVE TIME FOR ANY INTERRUPT
“GIVE TIME FOR ANY INTERRUPT
GIVE TIME FOR ANY INTERRUPT
GIVE TIME FOR ANY INTERRUPT
:DISALLOW INTERRUPTS
:BR T0 END OF TEST

28:

CMP
ERROR

(SP)+,(SP)+
+51

:RESTORE SP AFTER INTERRUPT
;RESET DID NOT CLEAR INTERRUPT

3%:

MOV

R3,aRTCVT

;RESTORE LINE CLOCK VECTOR

173714

CIOLDFO

TEST # 22

DLIT1=W/1144 MFM SLU

MACRO M1113

05-NOV-B0 12:32

= TEST THAT RTC INTERRUPT CLEARS BY CLEARING BIT7 OF

2037

LSBTTL

PAGE 46

SEQUENCE 59

TEST # 22 = TEST THAT RTC INTERRUPT CLEARS BY CLEARING BIT7 OF LKS

:'""'.".."'Q"""""""""".Q'.""Q".l'"'Q""""Qt'

;#TEST 22 = TEST THAT RTC INTERRUPT CLEARS BY CLEARING BIT7 OF LKS
e

006772
2038 006774
007000
007002
007010

000004
005737
001447
032777
001043

2040 007016
2041 007020
2042 007024
2043 007032
2044 007040
2045 007044
2046 007046
2047 007054
2048 007060
2049 007062
2050 007064
2051 007066
2052 007070
2053 007072
2054 007100

000340
017703
012777
012777
105777
100375
042777
004737
000240
000240
000240
000240
000240
042777
000402

2057 007102
gggg 007104

022626
104052

2060 007106
2061 007112
2V62 007116

010377
004737
000340

2039 007012

004737

TST22:

002624
000100

172030

014400
173652
007102
000100
173630

000200
014400

000100

173564
014400

SCOPE
TST
BEQ
BIT
BNE

JSR

173644
173634

1$:

173620

MoV
MOV
MOV
TSTB .
BPL
BIC
JSR

NOP
NOP
NOP
NOP
BIC
BR

173574

AR A

CTSTFL
15123
#BIT6,aSWR
15123

PC,WRPSW

.WORD
340
aRTCVT,R3
#2% ,ARTCVT
#B1T6,aLKS
@LKS
1%
#BIT7,3LKS
PC,WRPSW
240
.WORD

RRRRRRRRdRidd)

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INMIBITED?
;1F YES, SKIP THIS TEST

;SET PRIORITY TO 7

;SAVE LINE CLOCK VECTOR
;POINT RTC VECTOR TO ERROR REPORT
;CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE
;WAIT FOR DONE (INTERRUPT REQUEST)

;CLEAR DONE & INTERRUPT
;ALLOW INTERRUPTS

#BIT6,aLKS
3%

;:GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
;DISALLOW INTERRUPTS
""" TO END OF TEST

2%:

CMP
ERROR

(SP)+,(SP)+
+52

.ntSTORE SP AFTER INTERRUPT
;CLEARING BIT7 OF LKS DID NOT CLEAR INTERRUPT

3%:

MOV
JSR
.WORD

R3,aRTCVT
PC,WRPSW
340

;RESTORE LINE CLOCK /ECTOR
;RESTOKE PRIORITY TO 7

CZOLDFO

TEST # 23

DLI1=W/1144 MFM SLU

MACRO M1113

= TEST CLOCK REPEATABILITY

05-NOV-80 12:32

.SBTTL

2063

1.5

PAGE 47

SEQUENCE 60

TEST # 23 - TEST CLOCK REPEATABILITY

2222222222232 2223222222222 222222222022 00

TATEST 23 - TEST CLOCK REPEATABILITY

Rttt

L 2222222222222 2322222232 2322222222222 223222222020

007120

000004

2064 007122
007126
007130
007136
%822 007140

005737
001467
032777
001063
042777

2067 007146

005000

2068 007150
2069 007154

2070 007156
2071 007162
2072 007166
2073 007170
2074 007174
2075 007200
2076 007202
2077 0072064
2078 007210
2079 007212
2080 007214

2081 007216
2082 007220
2083 007224
2084 007226

2085 007232
2086 007234

2087 007236

2088 007240
2089 007246

2090 007250
2091
2092 007254

012701
005002

005077
105777
100375
005077
105777
100003
005202
005077
005200
001370
005201

001003
010237

000753
013701
160201
100001
005401
032737
001403

020127

1§123:

002624
000100

171702

000100

173526

177777

1$:

173512
173506

2%:

173500
173474

173464

4$:

002336

003002

2096 007264

010237

002616

2099 007272
2100 007300

032777
001402

000020

%83; 007270 104053
2101 007302

000137

014224

CLR

:CLEAR A TIMER

aLKS
@LKS
2%
aLKS
aLKS
48
R2
ALKS
RO
33
R1

*CLEAR DONE
*SYNC ON DONE

MOV
CLR

CLR
TSTB
BPL
CLR
TSTB
BPL
INC
CLR
INC
BNE
INC

#-1,R1
R2

CMPARE
R2,FIRST

BEQ 6$

6% :

2093 007256 020127 000001
003403

;1S CONSOLE UNDER TEST?
“IF NOT, SKIP THIS TEST
“ARE LINE CLOCK TESTS INMIBITED?
‘1F YES, SKIP THIS TEST
*DISALLOW INTERRUPTS

CMP R1,#3

000402

gggg 007262

CTSTFL
TsT24
#B1T6,aSuR
TST24
#BIT6,aLKS

1%
BR
FIRST,R1
CMPARE: MOV
R2,R1
SUB
TOLER
BPL
NEG
R1
TOLER: BIT #BITO,FLAGAL4

000003
7%:

BR 7%

S$:

*SET A FLAG INDICATING FIRST PASS THRU THIS LOOP
*CLEAR CLOCK COUNTER
:CLEAR DONE
1S CLOCK DONE?
‘BR IF NOT , TO INCREMENT TIMER
“IF DONE, INCREMENT CLOCK COUNT
*CLEAR DONE
:INCREMENT TIMER
‘BR IF TIME REMAINS
:INCREMENT LOOP PASS FLAG

‘BR IF TWO PASSES HAVE BEEN MADE
*1F NOT, STORE FIRST CLOCK COUNT
‘DO LOOP AGAIN
‘RECALL FIRST CLOCK COUNT

*CALCULATE DIFFERENCE OF TWO COUNTS
*IF POSITIVE,SKIP NEGATION OF DIFFERENCE
‘MAKE DIFFERENCE A POSITIVE NUMBER

tex IS THIS A 11744
sex NO

‘e YES: COMPARE DIFFERENCE WITH DESIRED
t«+ TOLERANCE OF 3

Tan

*COMPARE DIFFERENCE WITH DESIRED TOLERANCE

CMP

R1,#1

MOV

R2,SECND

:STORE SECOND COUNT

BIT
BEQ

#B1T4.35WR
15724

:CLOCK TESTS ONLY?
‘BR IF NOT

BLE

ERROR

171540

000 dRRRRRllldl)

ST
BEQ
BIT
BNE
BIC

BNE
MOV

002336

000001

SCOPE

llldld)

JMP

+5%

$EOP

‘BR, IF LOWER/EQUAL TO TOLERANCE

*CLOCK REPEATABILITY ERROR
;ELSE, JUMP TO END OF PASS ROUTINE

CIOLDFO DLI1=W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 24 - TEST THAT XMIT INTERRUPTS ONLY WHEN ENABLED

LSBTTL

2102

J 5
PAGE 48 SEQUENCE 61

TEST # 24 = TEST THAT XMIT INTERRUPTS ONLY WHEN ENABLED

2222222222222 2222222222220 2222222202000t
RRdRRlllll))

22222222223 222222

NS WNN =200

vt
&~
s

8888 88
38383838888
N
O NNSNNSNNSNSNSN

D i

POPNOMNIMNINININ = cd b

D i

be o

S i

D il

o0 [ole]l=]
NO NS W= S3RIAKIRE

NN
NN
NN N

INTERRUPTS ONLY WHEN ENABLED
;*TEST 24 = TEST THAT XMIT22220
iRl RRddRdlllllld)

7350

000100
173326
007346
173304

173322
173320

15124
1%:

SCOPE
BIC
MoV
MoV

TSTB

BPL

JSR

014400

2%:

022626
104054

104055
000401
022626

062777
010377

aTVECT,R3

#2% ,8TVECT
aTCSR
1%

;CLEAR TRANSMIT INTERRUPT ENABLE
;SAVE XMIT VECTOR

;POINT XMIT VECTOR TO ERROR REPORT

;WAIT FOR DONE

PC,WRPSW
140
.WORD

;SET PSW TO PRIORITY 3

(SP)+,(SP)+

;RESTORE SP AFTER INTERRUPT

000402

012777
052777
000240
000240
000240
000240

#BIT6,aTCSR

3%:

007402
000100

CMP
ERROR
MOV

BIS
NOP

+54

#4% ,ATVECT
#B176,aTCSR

173226

4%:

5%:

;SET XMIT VECTOR TO END OF TEST
;ENABLE INTERRUPTS
‘%

E.'

NO?
NOP
NOP

ERROR
BR
CMP
BIC
MOV

sXMIT INTERRUPTS WITH INTERRUPT ENABLE CLEAR

+55
5%

(SP)+,(SP)+
#B1T6,aTCSR
R3,9TVECT

sXMIT DID NOT INTERRUPT
;BRANCH OVER STACK CORRECTION
:RESTORE SP AFTER INTERRUPT
;DISABLE INTERRUPTS
;RESTORE XMIT VECTOR

‘

CZDLDFO DLI1=W/1144 MFM SLU

MACRO M1113

05-NOV=-80 12:32

TEST # 25 = TEST THAT XMIT INTERRUPTS DO NOT OCCUR WHEN DISABL

2127

SBTYL

K S

PAGE 49

SEQUENCE 62

TEST # 25 = TEST THAT XMIT INTERRUPTS DO NOT OCCUR WHEN DISABLED

Qt""t"""'Q""""""'"""'.Q'QQ"'.'Q"Q""Q'Q"""'

'TEST 25 = TEST THAT XMIT INTERRUPTS DO NOT OCCUR WHEN DISABLED

007416 000004

2128 007420

042777

2130 007432
2131 007434
2132 007440
2133 007446
2134 007452
2135 007454

000340
017703
012777
105777
100375
052777

%}20 007472

000402

2142 007474
2143 007476
2144
2145 007500
2146 007506
2147 007514
2148 007520

022626
104056

3123 007532

000402

2155 007534

022626

2129 007426

2136 007462
2137 007464
2138 007466
2139 007470

2149 007522
2150 007524
2151 007526
2152 007530

2156 007536

2157

P
S
S———

2158 007540

004737

000240
000240
000240

CARRRRRARRARRARRRRRR
RN NN R R AN
NANNARRANNREE

000100

014400

173212

173210
007474
173166

173202

000100

173156

TSTZS:

1$:

#BIT6,aTCSR

MOV
MoV
1STB
BPL
BIS

LWORD
340
aTVECT,R3
#2% ,TVECT
aTCSR
1%
#BIT6,aTCSR

NOP
NOP
NOP

NOP

2%:

000100
007534
014400

173132 3$:
173134

000240
000240
000240
000240

4$:
173104

5%:

PC,WRPSW

SRR

ROROCORER

;DISABLE INTERRUI.

;SET PSW T0 PRlORlT' 7
;SAVE XMIT VECTOR
:POINT XMIT VECTOR TO ERROR REPORT
:WAIT FOR DONE
;ENABLE INTERRUPT
§ee
3o
S
g

;CONTINUE TEST

CMP
ERROR

(SP)+,(SP)+
+56

;RESTORE SP AFTER INTERRUPT

BIC
Mov
JSR

#BIT6,aTCSR
#48,9TVECT
PC,WRPSW
140
LWORD

NOP
NOP
NOP
NOP

104057

010377

BIC

JSR

000240

042777
012777
004737
000140

SCOPE

;XMIT INTERRUPTS AT PRIORITY=7
:CLEAR INTERRUPT ENABLE
:POINT XMIT VECTOR TO_ERROR REPORT
;SET PSW TO PRIORITY 3
;o0
;e
§00
b

;BR TO END OF TEST=NO INTERRUPT

CMP

(SP)+,(SP)+

;RESTORE SP AFTER INTERRUPT

ERROR

+57

MoV

R3,aTVECT

;XMIT INTERRUPT OCCURES WITH BITé CLEAR
;RESTORE XMIT VECTOR

—

CZOLDFO DLi1-W/1144 MFM SLU

SRS

MACRO M1113 05-NOV-80 12:32 PAGE %0 SEQUENCE 63

'TEST # 26 = TEST TRANSMITTER FOR DOUBLE
|

2159

INTERRUPTS

LSBTTL
M

TEST # 26 = TEST TRANSMITTER FOR DOUBLE INTERRUPTS

AR AR ARt
RRiRidliiRdRR R
RRdRdRdRRdRRdRtRRRdd)

:#TEST 26 = TEST TRANSMITTER FOR DOUBLE INTERRUPTS
AR AR

007544
2160 007546
2161 007554
216% 007560
2163 007564
2164 007572
2165 007600
2166 007604
2167 007606
2168 007612
2169 007614
2170 007622
2171 007624
2172 007626
%};2 007630

000004
042777
017703
017704
012777
012777
004737
000140
105777
100375
052777
000240
000240
000240
000240

2175 007632
2176 007634
2177 007636
2178 007640
2179 007646
2180 007652
2181 007654
218; 007656
2183 007660
2184 007662
2185 007664

104060
000401
022626
012777
004737
000140
000240
000240
000240
000240
042777

3139 007672
1

2188 007674
%}38 007676
2191 007700
%}gg 007704

000402

000100
173070
173066
007636
000340
014400

173056
173052

173026
000100

007674
014400

000100

022626
104061
010377
010477

173064

TST26:

18:
173016

173002

2%:
25%:

172746

5%:

#B1T6,aTCSR

aTVECT,R3

R4
ATPSW,
#2%,3TVECT

#340,aTPSW

PC,WRPSW

LWORD

1ST8
BPL
BIS
NOP
NOP
NOP
NOP

?rcsn

ERROR
BR
CMP
MoV
JSR
.WORD
NOP
NOP
NOP
NOP
BIC

+60
25%

48:
172744
172742

SCOPE
BIC
MOV
MoV
MOV
MoV
JSR

CMP
ERROR
MOV
MoV

140

#BIT6,aTCSR

iaiiiiiRdRRd

RRRtRRRdd)

sCLEAR INTERRUPT ENABLE
:SAVE XMIT VECTOR
sSAVE XMIT PSW VECTOR
;SET UP XMIT VECTOR
;SET P10 7 AFTER INTERRUPT
;SET PSW TO PRIORITY 3
;WAIT FOR DONE
;ENABLE INTERRUPTS

;tt

:tt

‘%

(SP)+, (SP)+
#48,aTVECT
PC,WRPSW

140

sXMIT

INTERRUPT DID NOT OCCUR

:BRANCH OVER STACK CORRECTION INTERRUPT
sRESTORE SP AFTER INTERRUPT
;POINT XMIT VECTOR TO_ERROR

;SET PSW TO PRIORITY 3

;GIVE TIME FOR ANY INTERRUPTS

;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;DISABLE INTERRUPTS
:BR TO END OF TEST

(SP)+,(SP)+

;RESTORE SP AFTER INTERRUPT

#BIT6,aTCSR

+61

R3,3TVECT

R4 ,aTPSW

:XMIT RE-INTERRUPTED

sRESTORE XMIT VECTOR
;RESTORE XMIT PSW VECTOR

|
i

CIZOLDFO
|

TEST # 27

DLI1=W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

= TEST THAT XMIT INTERRUPT CLEARS WITH LOADING TBUF

2194

LSBTTL

L J
PAGE 51 SEQUENCE 64

TEST # 27 = TEST THAT XMIT INTERRUPT CLEARS WITH LOADING TBUF

:'"Q.""'Q.t"t""""""'0""""."'.'Qt""""""'""'

;*TEST 27 = TEST THAT XMIT INTERRUPT CLEARS WITH LOADING TBUF
007710 000004

2195 007712

042777

2197 007724
2198 007726
2199 007732
2200 007740
2201 007746
2202 007754
2203 007760
2204 007764
2205 007766
2206 007772
2207 007776
2208 010000
2209 010002
2210 010004
2211 010006
2212 010010
%%}2 010016

000340
017703
012777
052777
052777
005077
105777
100375
005077
004737
000140
000240
000240
000240
000240
042777
000405

2196 007720

004737

2215 010020
2216 010022

022626
042777

2217 010030
2218
5233 010032

104062
010377

2221 010036
010040
010044
010046
010050
010052

005000
012701
005300
001376
005301
001374

000100

014400

172716
010020
000004
000100
172662
172654

172720

T§127:

1%:

172650
014400

172622

000004

172630

172612

000002

SCOPE

R R

R R ddRddRdRRdiddildd)

#B1T6,3TCSR

:DISABLE INTERRUPTS

MOV
MOV
BIS
BIS
CLR
TSTB
BPL
CLR
JSR

.WORD
ino
aTVECT,R
#28,3TVECT
#BIT2,aTCSR
#BIT6,aTCSR
aTBUF
@TCSR
1%
aTBUF
PC,WRPSW
LWMORD
140

:SAVE XMIT VECTOR
:POINT XMIT VECTOR TO ERROR
iex ENABLE MAINT. WRAP
:ENABLE INTERRUPTS
:LOAD TBUF
:WAIT FOR DONE (INTERRUPT)
.
sFILL SECOND BUFFER TO RESET INT.
sALLOW INTERRUPTS

NOP
NOP
NOP
NOP
BIC
BR
28:

BIC

JSR

172710
172672
172664

000100

PC,WRPSW

#BIT6,aTCSR
3%

:SET PSW TO PRIORITY 7

:GIVE TIME FOR ANY INTERRUPTS
:GIVE TIME FOR ANY INTERRUPTS
:GIVE TIME FOR ANY INTERRUPTS
:GIVE TIME FOR ANY INTERRUPTS
:DISABLE INTERRUPTS
:BR TO END OF TEST

CMP
BIC

(SP)+,(SP)+
#BIT2,aCTCSR

ERROR

+62

3%:

MOV

R3,aTVECT

:LOADING TBUF DID NOT CLEAR INTERRUPT.
;RESTORE XMIT VECTOR

40%:

CLR
MOV
DEC
BNE
DEC

RO
#2.R1
RO
4L0%
R
40%

s«x DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
:*+ THAT MIGHT BE IN THE PROCESS OF BEING
;*« TRANSMITTED TO FINISH BEFORE MAINTENANCE
;% WRAP FOR THE UART UNDER TEST IS DISABLED.
tex THIS WILL INHIBIT ANY COMMUNICATION
:#* TO HARDWARE MEDIA SUCH AS TUS8 THAT MIGHT

BNE

;RESTORE SP AFTER INTERRUPT
;x« DISABLE MAINTENANCE MODE FOR
%« CONSOLE TO ALLOW FOR COMMUNICATION
i« WITH TERMINAL.

;*+ BE ATTACHED TO UART UNDER TEST.

——

'CZDLDFO DLI1-W/1144 MFM SLU

MACRO M1113 05-NOV-80 12:32
TEST # 30 - TEST THAT RCVR ACTIVE © DONE SET § CLEAR
2222

SBTTL

N_5S
PAGE 52 SEQUENCE 65

TEST # 30 - TEST THAT RCVR ACTIVE & DONE SET & CLEAR

HAAAAAAAA AL A

AR AR

AR AR AR

ARl

Rttt

)

'TEST 30 = TEST THAT RCVR ACTIVE & DONE SET & CLEAR

55
dééggdd
S;CFC’

pury

(elelelelelele]

NNORNON
OO
oo

~NOoOWVES
W

AR E ARl
iR RRRRR
iR
R R R RRdRRRRRRddRRRRRl)

005000
012701

000001

003002

000004

172542

t130:

SCOPE
BIT

BNE
RESET
BIS

CLR

000002

MoV

#BITO,FLAGLS
RCVDON
#BIT2,3TCSR
RO
.M

;Qt
e

;CLEAR EVERYTHING
;SET _MAINTENANCE WRAP

"
‘hh

172526

172514
004000

NJC>8:2a9$U<>CFJ‘RQC>sE

s
>
b
NONIN) =

D e
D

D
D

D e
D
D

e
D

d e

W
=20 O
¥9~uuuyganv

NN
NN

[=lelelelelelelelelelels]

[=lelelelelelelelelelela]

105777

000004

42%:

172500

WACTV:

1ST8
DEC
BNE
DEC
BNE
CLR
CLR
BIT
BNE
INC
BNE
BIC

172510

aRBUF
RO
42%
R1

42%

RO
aTBUF

#BIT11,3RCSR

RO
WACTV
#BIT2,3CTCSR

chn
kR

:CLEAR A TIMER

sLOAD TRANSMIT BUFFER
;TEST RCVR ACTIVE BIT
IF SET

; INCREMENT TIMER IF NOT SET
;CONTINUE WAIT IF TIME REMAINS
:tt

:t'

000002

40$%:

;RCVR ACTIVE DID NOT SET WHILE RECEIVING

CLR

RO
02 R1

MOV

DEC

sk
kR

40s

‘R

172434

CLR

wl:

ADD

194116

TO HARDWARE MEDIA SUCH AS TUS8 THAT MIGHT
BE ATTACHED TO UART UNDER TEST.

;VERIFY "'INIT'" CLEARS RCV ACTIVE

+115§

;INIT DID NOT CLEAR RCV ACTIVE

RO
#BIT2,aTCSR
#0,R0
RO

;CLEAR A TIMER
sSET MAINTENANCE WRAP
;WAIT AT LEAST ONE BIT TIME

172424

004000

172402

BIT11,3RCSR

sVERIFY RCV ACTIVE STILL CLEAR

000004

172416

#B1T2,3CTCSR

RCVDON

IF CLEAR

s
Q'

2254 010242

THAT MIGHT BE IN THE PROCESS OF BEING
TRANSMITTED TO FINISH BEFORE MAINTENANCE
WRAP FOR THE UART UNDER TEST IS DISABLED.
THIS WILL INHIBIT ANY COMMUNICATION
.

#BIT11,3RCSR

3%:

DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

000004

000000

0462777

WITH TERMINAL.

+63

aos

004000

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

ERROR

chk

2239
2240 010172
2241 010200
2242
2243 010202
2244
2245 010204

READ TO CLZAR DONE

‘hh

2%:

DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.

+116

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

WITH TERMINAL.

IRCV ACTIVE WITHOUT “'START'* BIT

_m-&-

MACRO M1113 05-NOV-80 12:32 PAGE 22-1 SEQUENCE 66

LDFO_D Li1=W/1144 MFM SLU
T#30 = TEST THAT RCVR ACTIVE © DONE SET & CLEAR

2255
2256 010244
%257 010252
258 010254
2259 010260
2260 010264
2261 010266
2262 010270
2263 010272

2264 010300
2265
2266
2267 010302
2268 010310
2269 010312
2270 010320
2271 010322

000004
172362
172350

000004

172360

RCVDON: BIS
CLR
CLR
TSTB
WDONE:
BMI
INC
BNE
BIC
ERROR

104064

032737
001010
032777
001404
0462777

aTBUF
aRCSR

RO
WDONE
#BIT2,aCTCSR

+64

zEIYO.FLAGkk

5%:

003002

004000

172314

#BIT11,3RCSR

000004

172330

#BIT2,9CTCSR

ERROR

000005
195777
001404

172274

0462777

000004

2280 010350

104066

104065

0462777

lngZ.GTCSR

000001

2272 010330
2273
2274
2275 010332
2276 010334
2277 010340
2278
2279 010342

2¢81
2282
22%3 010352
2284 010352

172366

000004

6$:

172310

172300

7%:

RESET

+65

1STB

BEQ

aRCSR
7%

BIC

#B1T2,aCTCSR

ERROR

+66

BIC

#BIT2,3CTCSR

;SET MAINTENCE WRAP
;CLEAR TIMER
;LOAD TRANSMIT BUFFER
;CHECK FOR RECEIVER DONE
:BR, IF DONE
; INCREMENT TIMER, IF NOT DONE

;CONTINUE WAIT IF TIME REMAINS
;*+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
;v WITH TERMINAL.

;RECEIVER DONE NEVER SET
s 1174427

;** DO NOT EXECUTE THIS SECTION
;CHECK FOR RCVR ACTIVE CLEAR
:BR, IF CLEAR
;*+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
s** WITH TERMINAL.

;RCVR ACTIVE DID NOT CLEAR WITH RCVR DONE
;CLEAR DONE WITH RESET
;CHECK FOR DONE CLEAR

s+ DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
s+ WITH TERMINAL.

;RESET DID NOT CLEAR RCVR DONE
;*+ DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
;t* WITH TERMINAL.

'CIDLDFO
DLI1=W/1144 MFM SLU
MACRO M1113 05=NOV-80 12:32 PAGE §3 SEQUENCE 67
"TEST # 31 = TEST THAT READING RBUF CLEARS RECEIVER DONE
|

2285

LSBTTL

'TESY 31 = TEST THAT READING RBUF CLEARS RECEIVER DONE

TEST # 31 = TEST THAT READING RBUF CLEARS RECEIVER DONE

:"fi"'.""'i""""'""""""""'0"'."""Q"QQ'QQ""Q'

'""""."""""""Q"'"Q'.Q"QQ'."Q"""""'Q"Q'lt"

010360 000004

2286 010362
2287 010364

2288 010372
010374
010400

010404
010406
010410
010412

2289 010414
2290 010420
2291 010424
2292 010426
2293 010432

2294 010440
2295 010444
2296 010446
2297

5398 010450

000005
052777

005000
012701

TST31
000004

172246

000002

105777

172232

42%:

005077
105777
100375
017700
042777

172222
172210

1%:

005300
001374
005301
001372

105777
001401
104070

172204
000004

172220

=
B
S
am——

CLR
Mov

#BIT2,3TCSR
RO
”.mM

1ST8

aRBUF

DEC
BNE
DEC
BNE

CLR
1ST8
BPL
MoV
BIC

TSTB
BEQ
ERROR

172170

000240

SCOPE

RESET
BIS

108:

NOP

RO
42%
R1
42%

aTBUF
aRCSR
1%
aRBUF ,RO
#BIT2,aCTCSR

aRCSR
108
+70

;CLEAR EVERYTHING
;SET MAINTENANCE WRAP
;*+ DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;e« THAT MIGHT BE IN THE PROCESS OF BEING
;e« RECEIVED TO FINISH AFTER MAINTENANCE
;** WRAP FOR THE UART UNDER TEST IS ENABLED.
;** READ TO CLEAR DONE
39
§ee
e
st

:LOAD TRANSMITTER
;WAIT FOR RECEIVER DONE
;READ RECEIVE BUFFER
;*+ DISABLE MAINTENANCE MODE FOR

;++ CONSOLE TO ALLOW FOR COMMUNICATION
;ee WITH TERMINAL.

:CHECK FOR RECEIVE DONE CLEAR
;** BR, “IF CLEAR TO NEXT TEST

;READING RBUF DID NOT CLEAR RCVR DONE

CIOLDFO DLiI1=W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 32 = TEST THAT RDR ENABLE CLEARS RECEIVER DONE FLAG

2300

.SBYTL

D 6
PAGE 54 SEQUENCE 68

TEST # 32 - TEST THAT ROR ENABLE CLEARS RECEIVER DONE FLAG

JERRRRRRERRRRARETRERRCCCERCCOCERORRRRARARARRRRRRERRANRRNOOOOOEROONRORTTSE

'TEST 32 = TEST THAT ROR ENABLE CLEARS RECEIVER DONE FLAG
CRRRRARRARARARACRRRRRRRACRORNNCRRRRNARRARARONANANRRNARERARROOOOROTOTRTTSE

010510
010514
010516
010520
010522
010524
2307
2308 010530
2309 010934
2310 01C536
2311 010544
2312
2313 010546
2314
2315 010550
2316 010556
2317 010562
2318 010564
2319 010572
2320
2321 010574

012701

000002

105/77
005300

172122

000001

SCOPE
BIT

1%:
172070

104117

052777
105777

001404
042777

000001
172052

172056

000004

172066

2%:

104067

000240

#BITO,FLAGLS
10%
#BIT0,aRCSR
#BIT2,aTCER
RO
”.R

42%:

172112
172100

001401

TST32:

W~
oo

~N~

000001
000004

003002
—

000001

—

010452
2301 010454
2302 010462
2303 010464
2304 010466
2305 010474
2306 010502
010504

10%:

;*+ YES DO NOT EXECUTE THIS TEST
;CLEAR EVERYTHING
;SET RDR ENABLE
;SET MAINTENANCE WRAP

s*+ DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;*+
;**
;**
;**

THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.
READ TO CLEAR DONE

aRBUF
RO
42%
R1
42%
aTBUF
aRCSR
1%
#BITO,aRCSR

;VERIFY RCV ACTIVE CLEARED RDR ENABLE
:BR IF CLEAR

+117

;RDR ENABLE NOT CLEARED WITH RCV ACTIVE

BIC

#BIT0,aRCSR
aRCSR
10%
#BIT2,3CTCSR

ERROR

+67

NOP

sev 117464 7

‘hw
‘h%

‘R

:LOAD TRANSMITTER
;WAIT FOR RECEIVER DONE

:CLEAR DONE BY SETTING RDR ENABLE

;CHECK FOR DONE CLEAR

;** BR, IF CLEAR TO NEXT TEST
i+« DISABLE MAINTENANCE MODE FOR

;** CONSOLE TO ALLOW FOR COMMUNICATION
s+ WITH TERMINAL.

;SETTING RDR ENABLE DID NOT CLEAR RCVR DONE
chh

MACRO M1113 05-NOV-80 12:32 PAGE ES SEQUENCE 69

DLDFO Li1=W/1144 MFM SLU
STe3 = TEST THAT RCVR INTERRUPTS ONLY WHEN ENABLED

LSBTTL

2322

TEST # 33 - TEST THAT RCVR INTERRUPTS ONLY WHEN ENABLED

:'Q.""."'QQ'""Q'""'""'.""t'Q"Q""l""""'tt""t't

;*TEST 33 = TEST THAT RCVR INTERRUPTS ONLY WHEN ENABLED

';'t""".'.t"'"""'""""'."'Q'.""".Q'Q"Q'Q"Q'Q'Q'QQ

000004
062777
042777
052777
005000
012701
105777

2328 010650
2329 010656
2330 010662
2331 010664
2332 010670
2333 010674
2334 010676

005300
001374
005301
001372
017703
012777
004737
000140
005077

105777
100375

042777

T§133:

000100
000100
000004

#BIT6,aTCSR
#BIT6,aRCSR

:ngZ.aTCSR

171774

010706
014400

171766

171752
171740

000004

010726
010734
0
0
0
0

000004

171744

010756
000100

000004

171706

2%:

3%:

010377

171644

000100
000004

—

000401
022626
0462777
0462777

104072

2354 010774

140

012777
052777
000240
000240
000240
000240
062777

42%
aRVECT,R3
#2% ,9RVECT

;QQ

aTBUF
aRCSR
1%
#BIT2,3CTCSR

171754

PC,WRPSW
1%:

022626
104071

42%

.WORD

—

0
0

s h®

000405

062777

;** READ TO CLEAR DONE

aRBUF
RO

42%:

172002

1646
1664

4%:

5%:

;e DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
s+ THAT MIGHT BE IN THE PROCESS OF BEING
;*« RECEIVED TO FINISH AFTER MAINTENANCE
;*+ WRAP FOR THE UART UNDER TEST IS ENABLED.

#2.R1

000002

sDISABLE TRANSMIT INTERRUPTS
;DISABLE RECEIVER INTERRUPTS
sSET MAINTENANCE WRAP

BiC

#BIT2,3CTCSR

CMP
ERROR

(SP)+,(SP)+
+1

MOV
BIS
NOP
NOP
NOP
NOP
BIC

#48 ,9RVECT
#BI1T6,3RCSR

ERROR

+72

CMP
BIC
BIC

#B1T6,3RCSR
#BIT2,9CTCSR

MOV

R3,3RVECT

#BIT2,aCTCSR

5%
(SF)+,(SP)+

sSAVE RECEIVE VECTOR
sPOINT RCV VECTOR TO ERROR REPORT

sSET PSW TO PRIORITY 3

;SEND A CHARACTER
;WAIT FOR RECEIVER DONE

;*+ DISABLE MAINTENANCE TMODE FOR
;*#+ CONSOLE TO ALLOW FOR COMMUNICATION
s+ WITH TERMINAL.
;CONTINUE TEST
;*+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
;*+ WITH TERMINAL.
;RESTORE SP AFTER INTERRUPT
;RECEIVER INTERRPUTS WITH INT. ENABLE CLEAR

;POINT RCV VECTOR TO END OF TEST
;ENABLE RCV INTERRUPTS
;** GIVE ANY INTERRUPTS TIME
;** GIVE ANY INTERRUPTS TIME
;*+ GIVE ANY INTERRUPTS TIME
;** GIVE ANY INTERRUPTS TIME
s*+ DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
st WITH TERMINAL.

sRCVR DID NOT INTERRUPT
;BRANCH OVER STACK CORRECTION
sRESTORE SP AFTER INTERRUPT
;DISABLE INTERRUPTS
;*+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
s+ WITH TERMINAL.

;RESTORE RECEIVE VECTCR

# 34 - TEST THAT RCVR INTERRUPTS DO NOT OCCUR WHEN DISABL

94
LDFO DLI1=W/1144 MFM SLU
TEST

MACRO M1113

05-NOV-80 12:32

SBTYL

2355

PAGE 56

smctrmy

SEQUENCE

TEST # 34 = TEST THAT RCVR INTERRUPTS DO NOT OCCUR WHEN DISABLED

't'"'."'""'""'""""""'."""'Q"'Q""Q""'"0""

'TESY 34 = TEST THAT RCVR INTERRUPTS DO NOT OCCUR WHEN DISABLED
2

000004

012701

MOV
MOV
BIS

1620
1606

171626
011114
000004

SCOPE

RESET

JSR

014400
Y

011000
2356 011002
2357 011004
2358 011010
2359 011012
2360 011016
2361 011024
2362 011032
011034

2222223232223 2222222202222 0222222220

TSTBL:

(LR

000002

MOV

105777

2364 011060
2365 011062
2366 011066
2367 011072
2368 011074
2369 011102
2370 011104
2371 011106
2372 011110
2373 011112

005300
001374
005301
001372
105777
100375
005077
105777
100375
052777
000240
000240
000240
000240
000405

2575 011114

062777

2376 011122
2377 011124
2378
2379 011126
2380 011134
2381 011142
2382 011146
2383 011150
2384 011152
2385 011154

022626
104073

2374 011114

0462777
012777
004737
000140
000240
000240
042777

42%:

171572

TSTB
DEC

BNE
DEC
6%:

167770

171554
171542

000100

000004

000100
011164
014400

000004

1%:

171532

171536

171500
171502

2%:

3%:

BNE
1ST8
BPL

CLR

TSTB
BPL
BIS
NOP
NOP
NOP
NOP

.WORD
340
aRVECT,R3

#2% ,aRVECT
#BIT2,aTCSR
RO
#2,R1

;SAVE RECEIVE VECTOR
:POINT RCVR VECTOR TO ERROR REPORT
;SET MAINTENANCE WRAP
ML

"
A]

aRBUF
RO

000405
062777

022626
104074

000004

171466

THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.
READ TO CLEAR DONE

42%

42%
a$TPS
6%

;TEST FOR XMIT READY

a TBUF
aRCSR
1%
#BITE,ARCSR

;LOOP IF NOT
;SEND A CHARACTER

;WAIT FOR RECEIVER DONE

;ENABLE INTERRUPTS

BIC

#BIT2,9CTCSR

CMP
ERROR

(SP)+,(SP)+
+73

BIC

#BIT6,aRCSR
#4% ,aRVECT
PC,WRPSW

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION
'i
WITH TERMINAL.
:RESTORE SP AFTER INTERRUPT
"t

.WORD

140

#BIT2,aCTCSR

;RCVR INTERRUPTS AT PRIORITY 7

;CLEAR INTERRUPT ENABLE
:POINT RCVR VECTOR TO ERROR REPORT

;SET PSW TO PRIORITY 3

;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
kR

:'i

BIC

#BIT2,3CTCSR

CMP

(SP)+,(SP)+
+74

ERROR

INTERRUPT
INTERRUPT
INTERRUPT
INTERRUPT

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

WITH TERMINAL.
R
:B TO END OF TEST,

‘N

2386 011162
2387
2388 011164
2389 011164

DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

MOV
JSR

RRdRlldlll)

:SET PSW TO PRIORITY 7

GIVE TIME FOR
GIVE TIME FOR
A
GIVE TIME FOR
:t'
GIVE TIME FOR
;CONTINUE TEST

NOP
NOP
BIC

171476

;CLEAR EVERYTHING

PC,WRPSW

011040
011044
011046
011050
011052
2363 011054

.
.

IF NO INTERRUPT

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

WITH TERMINAL.

:RESTORE SP AFTER INTERRUPT

;RCVR INTERRUPT REQUEST PASSED WITH BIT6 CLEAR

CIOLDFO DLI1=W/1144 MFM SLU

MACRO M1113 05-NOv-80 12:32 PAGE g? SEQUENCE 71

TEST # 35 = TEST RECEIVER FOR DOUBLE

2392 011176
239

010377

INTERRUPTS

5%:

171442

LSBTTL

MOV

R3,IRVECT

RESTORE RECEIVE VECTOR

TEST # 35 = TEST RECEIVE R

FOR DOUBLE INTERRUPTS

2
RldRll])
2022
Rl
R
22 2222222222322 22222222

2222222222232

TeTEST 35 = TEST RECEIVER FOR DOUBLE INTERRUPTS

011254
011260
011262
011264
011266
2404 011270
2405 011274
2406 011300
2407 011302

2408 011310
2409 011316
2410 011320
2611 011322
2412 011324
2413
2614 011326
2415 011330
2416 011332
2417 011334
2418 011342
2419 011346
2420 011350
2421 011352
2422 011354
2423 011356
2424 011360
2425 011366
2426 011372
2427 011376
2428
2429 011400
2430 011402
2431
2432 011404

000004

012701

000002

105777

171356

005300
001374
005301
001372
005077
105777
100375

062777
052777
000240
000240
000240
000240

P
o

—

15135
—

011202
2395 011204
2396 011206
2397 011212
2398 011216
2399 011224
2400 011232
2401 011236
2602 011240
2403 011246
011250

171372

171346
171334

1%:

000004

171350

000100

171316

171302

171234

R4
aRPSW,

#2% ARVECT

#340,3RPSW

;SET PSW TO PRIORITY 3

BIS
(LR

#B1T2,aTCSR
RO
#2,R1

;SET MAINTENANCE WRAP

TSTB

aRBUF
RO
42%

;*+ READ TO CLEAR DONE

DEC
BNE
DEC
BNE
CLR

TSTB
BPL

LWORD

140

42%
aTBUF

?RCSR

BIC

$
#BI1T2,aCTCSR

BIS

#BIT6,aRCSR

ERROR

+75

CMP

(SP)+,(SP)+
#3% ,aRVECT

MOV

JSR

25%

PC,WRPSW

140

#BIT6,aRCSR

R3,3RVECT

R4 ,aRPSW
Ly

3%:

CMP
ERROR

(SP)+,(SP)+
+76

4%:

MOV

R3,aRC(T

hl ]

;CLEAR EVERYTHING
;SAVE RECEIVE VECTOR
;SAVE RECEIVE PSW VECTOR
;POINT RCV VECTOR TO CONTINUE TEST
sSET PRIORITY TO 7 AFTER INTERRUPT

PC,WRPSW

.WORD
NOP
NOP
NOP
NOP
BIC
MOV
MOV
BR

171246

022626
104076

010377

2%:
25%:

aRVECT,R3

JSR

NOP
NOP
NOP
NOP

104075

000401
022626
012777
004737
000140
000240
000240
000240
000240
062777
010377
010477
000402

SCOPE

RESET
MOV
MOV
MOV
MoV

MoV

42%:

2222222222222

;*+ DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;#« THAT MIGHT BE

IN THE PROCESS OF BEING
;#+ RECEIVED TO FINISH AFTER MAINTENANCE
;*+ WRAP FOR THE UART UNDER TEST IS ENABLED.
2]
hR

2
;.t'

sSEND A CHARACTER

JWAIT FOR RCVR DONE

;*+ DISABLE MAINTENANCE MODE FOR
;#+ CONSOLE TO ALLOW FOR COMMUNICATICN

s*+ WITH TERMINAL.

;ENABLE RCV INTERRUPTS
;*+ GIVE SOME TIME
;*+ GIVE SOME TIME
;*+ GIVE SOME TIME
;*+ GIVE SOME TIME
;RCVR INTERRUPT DID NOT OCCUR
;BRANCH OVER STACK CORRECTION
sRESTORE SP AFTER INTERRUPT
sPOINT RCV VECTOR TO ERROR REPORT

;RESET PSW TO PRIORITY 3

;*+ GIVE SOME TIME
;*+ GIVE SOME TIME
;*+ GIVE SOME TIME
;*+ GIVE SOME TIME
;CLEAR INTERRUPT ENABLE
;RESTORE RECEIVE VECTOR
;RESTORE RECEIVE PSW VECTOR
:BR TO END OF TEST
;RESTORE SP AFTER INTERRUPT

;RECEIVER RE-INTERRUPTED
;RESTORE RECEIVE VECTOR

MACRO M1113 05-NOV-B0 12:32
g%b F 0 DLI1=W/1144 MFM SLU
# 36 - TEST THAT RCVR INTERRUPT CLEARS BY READING RBUF

LSBTTL

PAGE 58

SEQUENCE 72

TEST # 36 = TEST THAT RCVR INTERRUPT CLEARS BY READING RBUF

;"tt"""."""""'Q""'Q"""Q'Q"""""""""Q'.".'t

S#TEST 36 = TEST THAT RCVR INTERRUPT CLEARS BY READING PBUF

':"'Q'".Q""'Q""""'""""."'QQ"."."'..'Q""Q""'Q'

2442 011472
2443 011476
2444 011502
2445 011504

2446 011512
2447 011516
2448 011522
2449 011524
2450 011526

2451 011530
2452 011532
2453 011534
11542

2456 011544
2457 011546
2458
2459 011550

105777
005300
001374
005301
001372
005077
105777
100375
062777

005077
004737
000140
000240
000240
000240
000240
042777
000402

~N -~ —
oo

i
—

—_—r

000002

MOV

42%:

171154

171144
171132

000004

000100

022626
104077

010377

BIS
BIS
CLR

171070

1%:

171146

TSTB

DEC
BNE
DEC
BNE

CLR

#2% ,3RVECT
#BIT6,aRCSR
#BIT2,3TCSR
RO
¥2.R1

42%

aRBUF
PC,WRPSW

NOP
NOP
NOP
NOP
BIC
BR

‘R

CLR
JSR

;SEND A CHARACTER

;WAIT FOR DONE

#B172,aCTCSR

LWORD

;*+ THAT MIGHT BE IN THE PROCESS OF BEING
;*+ RECEIVED TO FINISH AFTER MAINTENANCE
;*+ WRAP FOR THE UART UNDER TEST IS ENABLED.
R

42%

TSTB
BPL

;SAVE RECEIVE VECTOR
sPOINT RCV VECTOR TO ERROR REPORT
;SET RCVR INTERRUPT ENABLE
;SET MAINTENANCE WRAP
;#* DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

;*+ READ TO CLEAR DONE

aRBUF
RO

aTBUF
aRCSR
1%

BIC

171072

.WORD
340
aRVECT,R3

;CLEAR EVERYTHING
;SET PSW PRIORITY TO 7

IR
TETE
TR TR

011456
011462
011464
011466
011470

MOV
MoV

PC,WRPSW

2441

171216

011544
000100
000004

SCOPE

RESET

JSR

014400
N~~~

000340
017703
012777
052777
052777
005000
012701

15136:

—_—

000004
000005
004737

140

(INTERRUPT)

;*+ DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
s*+ WITH TERMINAL.
;READ RBUF TO CLEAR PENDING INTERRPUT
;SE1 PSW TO PRIORITY 3

#BIT6,aRCSR

;#+ ALLOW TIME FOR ANY ERRONEOUS
;** ALLOW TIME FOR ANY ERRONEOUS
;*+ ALLOW TIME FOR ANY ERRONEOUS
;*+ ALLOW TIME FOR ANY ERRONEOUS
;NO INTERRUPT-CLEAR INT. ENABLE

INTERRUPT
INTERRUPT
INTERRUPT
INTERRUPT

2%:

CMP
ERROR

(SP)+,(SP)+
+77

;RESTORE SP AFTER INTERRUPT
;READING RBUF DID NOT CLEAR INTERRUPT

3%:

MOV

R3,aRVECT

;RESTORE RECEIVE VECTOR

‘»

MACRO M1113 05-NOV-80 12:32
DLDFO DLi1-W/1144 MFM SLU
ST # 37 - TEST THAT RESET CLEARS RECEIVE INTERRUPT
.SBTTL

2460

I 6
PAGE 59 SEQUENCE 73

TEST # 37 ~ TEST THAT RESET CLEARS RECEIVE INTERRUPT

SR 222222223222 2232233222233
20 22 00 RRRRRRRRRld)

S#TEST 37 = TEST THAT RESET CLEARS RECEIVE INTERRUPT
B

011554
2461 011556
2462 011560

2463 011564
2464 011566
2465 011572
2466 011600
2467 011606
2468 011614

11616

011622
011626
011630
011632
011634

2469 011636
2470 011644
2471 011650
2472 011652
2473 011654
2474 011660
2475 011662
2476 011664
2477 011666
2478 011670
2479 011672

2480 011700

2483 011702
2484 011704
2485
2486 011706

000004
000005
004737
000340
017703

005000
012701
105777
005300
001374
005301
001372
012777
105777
100375
000005
004737
000140
000240
000240
000240
000240
062777
000402

014400

SCOPE

RESET
JSR

171052
011702
000100
000004

MOV
MOV

000002

MoV

BIS
BIS
CLR

42%:

171010

000377
170764

170776

000100

104100
170732

TSTB
DEC
BNE
DEC

BNE

1%:

014400

022626

010377

2222223222222 2322 2222222223223 2222 22222200000 000

T§137:

MOV
TSTB
BPL
RESET
JSR

NOP
NOP
NOP
NOP

;CLEAR EVERYTHING

PC,WRPSW

340
.WORD
aRVECT ,R3
#2% ,aRVECT
#BIT6,aRCSR
#BIT2,3TCSR
RO
#2.R1
aRBUF
RO
42%
R1
42%
#377 ,8TBUF
aRCSR
1%

PC,WRPSW

.WORD

RRRRRRRlRlll])

140

;SET PSW TO PRIORITY 7
;SAVE RECEIVE VECTOR
;POINT RCV VECTOR TO ERROR REPORT
;SET RCV INTERRUPT ENABLE
;SET MAINTENANCE WRAP
s*« DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;*+
;*«
;*+
;**

THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.
READ TO CLEAR DONE

sk
®
ch®
a2
;tt

;SEND AN ALL 1'S CHARACTER
;sWAIT FOR RCV DONE

;CLEAR RCV INTERRUPT & RBUF
;SET PSW TO PRIORITY 3
;*+
;#+
;**
s*+«

ALLOW TIME
ALLOW TIME
ALLOW TIME
ALLOW TIME

FOR
FOR
FOR
FOR

AN ERRONEOUS
AN ERRONEOUS
AN ERRONEOUS
AN ERRONEOUS

:NO INTERRUPT-CLEAR INT. ENABLE
;CONTINUE TEST

BIC
BR

#BIT6,aRCSR

2%:

CMP
ERROR

(SP)+,(SP)+
+100

;RESTORE SP AFTER INTERRUPT

3%:

MOV

R3,aRVECT

;RESTORE RECEIVE VECTOR

170734

INTERRUPT
INTERRUPT
INTERRUPT
INTERRUPT

;RESET DID NOT CLEAR RCVR INTERRUPT

CZDLDFO DLI1=-W/1144 MFM SLU

MACRO M1113

J 6
PAGE 60 SEQUENCE 74

05-NOV-80 12:32

TEST # 40 - TEST THAT THE "'OR'* ERROR & ''ERROR'' CAN BE SET

24LB7

LSBTTL

MAAAAA R

TEST # 40 - TEST THAT THE ''OR'" ERROR & ''ERROR'' CAN BE SET

AR A

AR AR A

AR AR

ARl

S#TEST 40 - TEST THAT THE "‘OR'' ERROR & "‘ERROR'' CAN BE SET
MAALRAAR AR AR

|
|
|

011712
2488 011714
24B9 011722

000004
032777
001465

2691 011732
%235 011734

001407
005737

2490 011724

2494 011740

2495 011742
2496
2497 011750
2498 011752
2499 011754
2500 011762
011764
011770
011774
011776
012000
012002

032737
001404

032777
001452
000005
052777
005000
012701
105777
005300
001374
005301
001372

002000

167116

000001

003002

000010

167070

000004

170656

000002
170642

42%:

1%:
2%:

012700
005077
105777
100375
005300

000003
170626
170620

2507 012026

042777

000004

170624

2508 012034
2509 012042
2510 012044

032777
001001
104101

040000

170574

2513 012046
2514 012054
2515 012056
2516
2517 012060
2518 012060
012062
012066
012070
012072
012074

032777
001001
104102

100000

52}}

001371

005000
012701
005300
001376
005301

000002

40%:

001374

3$:

AR ARl Rttt
ld)

;1S THIS TEST ENABLED
:1F NOT ENABLED, BR TO NEXT TEST

BEQ
TST

9%
CTSTFL

iev NO
i ;Ea THIS IS 11744, 1S THIS THE CONSOLE

#BITO,FLAGLL

BEQ

BEQ
RESET
BIS
CLR
MOV

TST4

#BIT2,aTCSR
RO
#2.R1

1STB
DEC
BNE
DEC
BNE

aRBUF
RO
42%
R1
42%

#B1T03,aSWR

:++ IS THIS A 11744
SL
v
iev NO

iev THIS IS THE CONSOLE SLU.SHOULD THE OVERRUN
;*+« ERROR TEST BE PERFORMED
;% NO
;CLEAR EVERYTHING
;SET MAINTENANCE WRAP
sx« DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
:x* THAT MIGHT BE IN THE PROZESS OF BEING
s« RECEIVED TO FINISH AFTER MAINTENANCE
;x« WRAP FOR THE UART UNDER TEST

;«* READ TO CLEAR DONE
en
jew
jew
pee

MOV
CLR
TSTB
BPL
DEC

#3,R0
a TBUF
aTCSR
2%
RO

BIC

#BIT2,aCTCSR

BIT
BNE
ERROR

#BIT14,3RBUF
3$
+101

BIT
BNE
ERROR

#BIT15,3RBUF
48
+102

:TEST "ERROR'' FLAG
:BR, IF SET

CLR
MOV
DEC
BNE
DEC
BNE

RO
#2.R1
RO
408
R

:x+
:+x«
s*+
:«+
txs

BNE

48:

[ E————

170562

#BIT10,aSWR
TST41

BIT
9%:

SCOPE
BIT
BEQ

BIT

002624

2501 012004
2502 012010
2503 012014
2504 012020
2505 012022
2506 012024

78140:

40%

IS ENABLED.

SSET CHARACTER COUNT TO SEND 3 CHAR.
;LOAD TRANSMIT BUFFER
sWAIT FOR TRANSMIT DONE
;DECREMENT CHARACTER COUNT

:BR IF ALL CHARACTERS NOT TRANSMITTED

:** DISABLE MAINTENANCE MODE FOR
;%% CONSOLE TO ALLOW FOR COMMUNICATION
;«x WITH TERMINAL.
:TEST FOR ''OR'' ERROR FLAG
:BR, IF SET

:"'OR'* ERROR FLAG DID NOT SET

:""ERROR'' FLAG DID NOT SET WITH "'OR'' FLAG
DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
THAT MIGHT BE IN THE PROCESS OF BEING
TRANSMITTED TO FINISH BEFORE MAINTENANCE
YRAP FOR THE UART UNDER TEST IS DISABLED.
THIS WILL INHIBIT ANY COMMUNICATION

:*+ TO HARDWARE MEDIA SUCH AS TUSB THAT MIGHT
;t+ BE ATTACHED TO UART UNDER TEST.

94 LDFO DLI1=W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TES T # 41 = TEST THAT BREAK TRANSMITS ALL ZEROES

LSBTTL

2519

PAGE 61

SEQUENCE 75

TEST # 41 = TEST THAT BREAK TRANSMITS ALL ZEROES

:""'Q.'.""."""""""""'QQ..'."Q""""'Q"Q"""'t'

THAT BREAK TRANSMITS ALL ZEROES
;*TEST 41 = TEST2223222222222
)
0222200 R RRRdRRRRddRRRRRllll

012156
012160
012162
012164
012166
2533 012170

105777

170456

253 012176
2535 012202
2536 012204
2537 012210
2538 012216
2539 012220
2540 012226
2541 012230
2542 012232
2543
2544 012234
2545 012242
2546 012250
2 547
2548 012252
2549 812258

003002

100411

000010

9%
#BIT03,aSwR

001407
0462777
0462777

;BR TO NEXT TEST, IF NOT ENABLED
IS THIS A 11/44
=+

170426
000001
170410

42%:

170444

170422

001026

2%:

170360

;CLEAR EVERYTHING
;SET MAINTENANCE WRAP

;#+ THAT MIGHT BE IN THE PROCESS OF BEING

;#« RECEIVED TO FINISH AFTER MAINTENANCE
;#* WRAP FOR THE UART UNDER TEST IS ENABLED.
;*+ READ TO CLEAR DONE
R

Rk
kR

;TRANSMIT ALL ONES TO RCVR

;WAIT FOR RCVR DONE

;CLEAR DONE (LEAVING ALL ONES IN RBUF)
: TRANSMIT BREAK

;CLEAR A TIMER
;WAIT FOR RCVR DONE
:BR IF DONE
;1F NOT, INCREMENT TIMER
:BR IF TIME REMAINS

+103

aRBUF

;CHECK RECEIVE BUFFER FOR ZERO

#BIT0,aTCSR
#B1T2,3CTCSR

000001
000004

;CLEAR BREAK BIT
;*+ DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
s+ WITH TERMINAL.
;BREAK DID NOT TRANSMIT ANYTHING

#BIT0,aTCSR
#BIT2,aCTCSR

CONT41:

T TR

;** DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

CONT41

170376
170410

TEST BE PERFORMED

#BIT2,3TCSR
RO
#2.R1

000001
000004

e+ THIS IS THE CONSOLE SLU.SHOULD THE BREAK

TST42

aRBUF
RO
42%
R1
42%
#-1,3TBUF
aRCSR
1%
aRBUF
#B1T0,aTCSR
RO
aRCSR,$BDDAT

1%:

000002

IS THIS THE CONSOLE

)

9%:

«+ YES THIS IS 11744,
w+ SLU

170472

166704

104103
105777

;1S BREAK FUNCTION TEST ENABLED?

002624

005200
001372

042777
062777

#BIT8,aSWR

TST42
#BITO,FLAGALS
9%
CTSTFL

177777
170432

005000
117737

SCOPE
BIT

005300

000001

T5141:

”»

000004

166732

001466
000005
052777
005000
012701

001404
032777

000400

000004
032777
001501
032737
001407
005737

012076
2520 012100
2521 012106
2522 012110
2523 012116
2524 012120
2525
2526 012124
2527 012126
2528
2529 012134
2530 012136
2531 012140
2532 012146
012150

2222222222232

»
Ed

:BR, IF ZERO
;CLEAR BREAK BIT
;*+ DISABLE MAINTENANCE MODE FOR

;** CONSOLE TO ALLOW FOR COMMUNICATION
;*+ WITH TERMINAL.

104103

0462777
062777

000001
000004

3%:

ERROR

+103

;BREAK DID NOT TRANSMIT ALL ZEROES

BIC
BIC

#B1T0,aTCSR
#B112,3CTCSR

;CLEAR BREAK BIT
;** DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
s+ WITH TERMINAL.

'CZOLDFO DLi1=W/1144 MFM SLU

MACRO M1113

05-NOv-80 12:32

TEST # 42 - TEST THAT "FR' ERROR CAN BE SET DURING BREAK
LSBTTL

2557

PAGE 62

SEQUENCE 76

TEST # 42 = TEST THAT "FR'

ERROR CAN BE SET DURING BREAK

;'"""".'.t"""'"i"""'".Q'"'."t""""t""""""'

:#TEST 42 = TEST THAT "‘FR'' ERROR CAN BE SET DURING BREAK

SsSNSN

£ J‘x”flflfl&hd-fl

001404
032777

001445
000005
052777
005000
012701

S O
Vi

d
d
o
d
D

NN
NN
N NN NN

N
WWw

OO0

A NAY S AN S O 0o

005737

NN
W

OO0OO0O0OO0OO0O0CO

2222222222223 2222223222320 2222 202222222 202 R

NNNO
e
*J

NN
NN
N
VIV
T T A VAT

012364

002000

166516

000400

166506

000001

003002

TST42:

000004

BIT

BEQ
BIT
BEQ
BIT
BEQ

002624

000010

SCOPE

TST

170246

9%
#B1T03,3SWR

BEQ
RESET
BIS
CLR

TST43

9%:

000002

Mov

lngZ.iTCSR
#2,R1

TO NEXT TEST,

;Ea THIS IS 11/44.

012412
2573 012414
2574 012422
2575 012426
2576 012432
2577 012434
2578 012442

42%:

000001
170214
170202

0462777
062777

1$:

000001
000004

TSTB

DEC
BNE
DEC

aRBUF
RO

BNE
BIS
CLR

42%
R1
42%
#BI1T0,aTCSR
o TBUF

BIC
BIC

#BITO,QTCSR
#BIT2,3CTCSR

1ST8
BPL

aRCSR
1%

THIS IS THE CONSOLE SLU.SHOULD THE FRAME
ESROR TEST BE PERFORMED

;CLEAR EVERYTHING
;SET MAINTENANCE WRAP
ML DELAY ENOUGH TIME
TO ALLOW ANY CHARACTERS
‘h%

5 24

2582 012460

2583
2584 012462
2585 012470
2586
2587 012472
2588
2589 012474

032777
001001

020000

106104

032777
001001

100000

170146

2%:

104114

3%:

#B1T13,3RBUF
2%

ERROR

+104

BIT
BNE

#B1T15,3RBUF

ERROR

+114

READ TO CLEAR DONE

Rk
‘R
:tt

: SEND BREAK

;TRANSMIT A CHARACTER TO TIME BREAK

;WAIT FOR RCVR DONE

;CLEAR
;tt

;tt

BIT
BNE

THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.

2579 012450
2580 012456
2581

IS THIS THE CONSOLE

170232

IF NOT SET

BREAK FUNCTION ENABLED
TO NEXT TEST, IF NOT SET
IS THIS A 11/44

105777

RdRdRdRRlRRll)

THE '‘TEST ERROR FLAGS'' BIT SET

#B81110,aSwR
TST43
#BIT8,aSWR
TST43
#BITO,FLAGALS
9%
CTSTFL

BEQ

BIT

166460

BREAK BIT

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION
WITH TERMINAL.

;CHECK FOR FRAMING ERROR FLAG
IF SET

;BREAK DID NOT SET FRAMING ERROR
;TEST "'ERROR''FLAG
IF SET

:"ERROR'' FLAG DID NOT SET WITH "'OR'" FLAG

f—

———

————

ICZDLDFO DLIT=W/1144 MFM SLU

————

né

MACRO M1113 05-NOV-80 12:32 PAGE 63 SEQUENCE 77

TEST # 43 - TEST DATA PATH FROM XMIT TO REC USING MAINT WRAP

2590

LSBTTL

TEST # 43 = TEST DATA PATH FROM XMIT TO REC USING MAINT WRAP

::'Q'""".Q.Q""""""Q"""'."..""""l'"""""'Q"'

s*TEST 43 = TEST DATA PATH FROM XMIT TO REC USING MAINT WRAP
Q"Q"
;;'t"""""t"""""'""""..""'.""""'Q"""'

2591 012474

000004

2592 012476
2593 012500
2594
2595

000005
052777

2596
2597 012506

012510
012514

012520
012522
0125264
012526

2598 012530
2599 012532
2600 012534
2601 012542
2602 012544
2603 012550
2604 012552
2605 012556
2606 012560
2607 012564
2608 012570

2609 012572

2610 012576

2611 012602
2612 012604
2613 012606
2614 012610
2615 012612
2616 012614
2617 012620
2618 012624

%g;g 012632
2621 012634

2622 012634

TST43:

000004

170132

SCOPE

RESET
BIS

#BIT2,3TCSR

CLR
Mov

RO
lZ.Ri

005000
012701
105777

005300
001374
005301
001372

005001
105201
032737
001406
122701
001770
122701
001765
010177
105777
100375
017702

043701

020102
001003
105701
001411
000747
010137
010237
042777

000002
170116

000001

42%:

003002

000020
000220

5%:
2%:

170056
170044
170040

001024
001026
000004

000004

CLR
INCB
BIT
BEQ
CMPB
BEQ
CMPB
BEQ
Mov
TSTB
BPL
MoV

BIC

001112

38:

170026

104105

042777

1%:

1ST8

DEC
BNE
DEC
BNE

170016

CMP
BNE
1ST8
BEQ
BR
MoV
MOV
BIC

aRBUF
RO
42$

425

R1
R1
#BIT0,FLAGALS
5%
#20,R1
1%
#220,R1
1%
R1,aTBUF
aRCSR
2%
aRBUF ,R2

a#SUSWR,R1

R1.R
3%
R1
48
1%
R1,8GDDAT
R2,$BDDAT
#BIT2,3CTCSR

ERROR

+105

BIC

#BIT2,38CTCSR

;CLEAR EVERYTHING
:SET MAINTENANCE WRAP
:TRANSMIT A BINARY COUNT PATTERN = UP
:TO THE BIT POSITION INDICATED BY THE

:CONTENTS OF LOCATION '‘SUSWR’
;** DELAY ENOUGH TIME TC ALLOW ANY CHARACTERS
;e« THAT MIGHT BE IN THE PROCESS OF BEING
;e« RECEIVED TO FINISH AFTER MAINTENANCE

;** WRAP FOR THE UART UNDER TEST IS ENABLED.

;** REAC TO CLEAR DONE
§oe
'i
§oe
goe

;CLEAR REGISTER FOR TEST DATA
: INCREMENT THE TEST DATA
sev 11744 CPU
;ee TEST ALL DATA
;** CHECK FOR CONT-P IN TEST DATA
;** DO NOT XMIT *P
§oe
;*+ DO NOT XMIT 220
;XMIT A CHARACTER
;WAIT FOR RECEIVER DONE
;GET RECEIVED CHARACTER

:CLEAR LOWEST UNUSED DATA BIT POSITITON IN TEST DATA
: COMPARE DATA
:BR, IF NON-COMPARE
;TEST XMIT DATA FOR ZERO
:BR, IF FINISHED
;CONTINUE IF NOT
:STORE THE EXPECTED DATA
:STORE RECEIVED DATA
;*+ DISABLE MAINTENANCE MODE FOR

i+« CONSOLE TO ALLOW FOR COMMUNICATION
;e« WITH TERMINAL.

:DATA COMPARE DATA

;*+ DISABLE MAINTENANCE MODE FOR

iex CONSOLE TO ALLOW FOR COMMUNICATION
;e« WITH TERMINAL.

2623
2624

[——gLDIODLIT1=W/1144 MFM SLU

MACRO M1113 05-NOV-80 12:32
TEST # 44 - TEST DATA PATHS USING LOOP-BACK CONNECTOR

2626

LSBTTL
Cr

PAGE 64

SEQUENCE 78

TEST # &4 = TEST DATA PATHS USING LOOP-BACK CONNECTOR

AR AN NN E RN E R RN RN AR RN AR RN RRRANNNNNANNENROONORNOOOOOROOETST

:#TEST 44 = TEST DATA PATHS USING LOOP-BACK CONNECTOR
%7

000004

032777

eamen 001442

012654
se
012656
631
zesg
263
5634 012660
635 012662

000200

166166

T§144:

105201
032737

001404
(23727
001427
010177
005000
105777
100403
005200

%gzg 012722

104064

2648 012724
2649 012730
2650 012734
2651 012736
2652 012740
2653 012742
2654 012744
2655 012746
goge 012752

017702
043701
020102
001003
105701
001406
000745
010137
010237

2658 012756

104106

SCOPE

BIT

BEQ

RESET
CLR

000005
005001

2636 012670
2637 012672
2638 012700
2639 012702
2640 012706
2641 012710
2642 012714
2643 012716

ggzg 012720

':"Q'Q".'QQ""'""""""""."'Q'."'..""""".'Q"""

000001

003002

002634

177560

18:

167734

5% :

167720

28:

001373

167706
001112

001024
001026

3s:

48:

INCB
BIT

BEQ
CMP
BEQ
MOV
CLR
TST8
BMI
INC

#BIT7,3SWR
TST4LS

lS TNXS TEST ENABLED

*CLEAR REGISTER FOR TEST DATA

R1
#BITO,FLAGLS

5%
RCSR,#177560

TsT45

NOT

CLEAR EVERYIHING

STRANSMIT A BINARY COUNT PATTERN = UP
:T0 THE BIT POSITION INDICATED BY THE

SCONTENTS OF LOCATION '‘SUSWR'

:INCREMENT THE TEST DATA

;11/ & CPU

sTEST ALL DATA

:1S THIS 11/44 CONSOLE TERMINAL SLU?

BNE

RO
2%

:YES, SKIP THIS TEST
:XMIT A CHARACTER
:CLEAR A TIMER
:WAIT FOR RECEIVER DONE
:BR IF DONE

ERROR

+64

;RECEIVER DONE NOT SET

MOV
BIC
CMP
BNE
TST8
BEQ
BR
MOV
MOV

aRBUF ,R2
a¥SUSWR,R1
R1,R2

;GET RECEIVED CHARACTER
;CLEAR LOWEST UNUSED DATA BIT POSITITON IN TEST DATA

4%
R1
TST4S
1%
R1,9GDDAT
R2,$BDDAT

:BR, IF NON-COMPARE
;TEST XMIT DATA FOR ZERO

ERROR

+106

;DATA COMPARE ERROR USING LOOP-BACK CONNECTOR

R1,3TBUF

RO
aRCSR

: INCREMENT TIMER IF NCT
:BR IF TIME REMAINS

: COMPARE DATA

BR, IF FINISHED

*CONTINUE IF NOT

*STORE EXPECTED DATA
*STORE RECEIVED DATA

f————

MACRO M1113 05-NOV-80 12:32c PAGE 65
l(lDLOFO
DLI1=W/1144 MFM SLU
1esgbg945 = TEST DL11-W LOGIC BY EXERCISING THE XMIT,REC

.SBTTL

SEQUENCE 79

TEST # 45 = TEST DL11-W LOGIC BY EXERCISING THE XMIT,REC, & CLOCK

't'.""""'t""""""""".'tt."""."""""'"'t"t'

'TEST 45 = TEST DL11-W LOGIC BY EXERCISING THE XMIT,REC, & CLOCK

012760

2660 012762

""t"""t"iQ"""""""'"t"'l""'t"".".""""t"

000004

t4745:

000005

SCOPE

RESET

CLR

2661 012764 005037 002444
2662 012770 004737 014400
2663 012774 000340

JSR

PC,WRPSW

*SET PRIORITY TO 7

MOV
MOV

ATVECT,R3
FRVECT. R4

:SAVE XMIT VECTOR
*SAVE RECEIVE VECTOR

aTPSW,STPSW
ORPSU,SRPSU
SRTCPSW,SCPSW

*SAVE XMIT PSW VECTOR
:SAVE RECEIVE PSW VECTOR
+SAVE CLOCK PSW VECTOR

WorD

017703
017704

167646
167636

2667 013012
2668 013020
2669 013026

017737
017737
017737

167634
167622
167646

002446
002450
002452

MOV
MOV
MOV

2673 013056
2674 013064
2675 013070
2676 013072
2677 013100

012777
005737
001415
032777
001011

000200
002624

167562

MOV
TST
BEQ
BIT
BNE

2664 012776
2665 013002

2666 013006 017705 167664
2670 013034
2671 013042
2672 013050

2678 013102
2679 013110
2680 013116
2681 013124

2682 013132
013134
013140

013144
013146
013150
013152

2683 013154
2684 013162
2685 013170
2686 013174
2687 013200
2688 013202
2689 013204
269C 013210

2691 013214

2692 013220
2693
2694 013222
2695 013224

012777
012777
012777

012777
012777
052777
052777

005000
012701

013440
000200
013512

000100

165740

013526
000300
000100

167566
167562
167550

000004

167472

052777
052777
005037
005037
005001
005000
012702
005077

000100
000100
002442
002440

004737

000140

167506

167456
167444

002454
167426
014400

2699 013240

032777

2%:

5;85 013250

000005

2703 013252

104107

2700 013246 001402

000100

MOV
MOV
BIS
BIS

CLR
MOV

167372

340

ARTCVT.RS

#XMIT,aTVECT
#200,3TPSW
#RCV,aRVECT
#200,aRPSW
CTSTFL
1%
#BIT6,aSWR
1

#CLK,aRTCVT
#300 aRTCPSW
#B1TH,aLKS
#BIT2,3TCSR

RO
#2.R1

BIS
BIS
CLR
CLR
CLR
CLR
MOV
CLR

#BIT6,aTCSR
#B1T6,aRCSR
XMTCNT
RCVCNT
R1
RO
#BUF ,R2
aTBUF

NOP
NOP

LWORD

140

ADD
ADD

#0,R0
#1,R0

BIT

#B1T6,TCSR

BNE

‘NO MULT INTERUPTS
:IS CONSOLE UNDER TEST?
:IF NOT SKIP CLOCK SET UP
:IF YES, ARE CLOCK TEST DISABLED?
“IF YES. SKIP CLOCK SET UP

POINT VECTOR TO CLOCK INTERRUPT ROUTINE
:NO MULT INTERUPTS
*ENABLE CLOCK INTERRUPTS
:SET MAINTENANCE WRAP
;%% DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
't' THAT MIGHT BE IN THE PROCESS OF BEING
;% READ TO CLEAR DONE

RO
42%
R1
42%

PC,WRPSW

POINT TRANSMIT VECTOR TO TRANSMIT ROUTINE
*NO MULTIPLE INTERUPTS ALLOWED
POINT RECEIVE VECTOR TO RECEIVE ROUTIMC

:*+ WRAP FOR THE UART UNDER TEST IS ENABLED.

aRBUF

DEC
BNE
DEC
BNE

:SAVE CLOCK VECTOR

." RECEIVED TO FINISH AFTER MAINTENANCE

TSTB

JSR

000240
000240

001371

1%:

42%:

2696 013226 062700 000000
2697 013232 062700 000001
2698 013236

MOV
MOV
MOV

000002

105777

005300
001374
005301
001372

MOV

167606
167602
167566

:CLEAR EVERYTHING

TINITIALIZE CLOCX COUNT TO ZERO

CLKCNT

Jht
pen
T
Tan

:ENABLE TRANSMIT INTERRUPTS
*ENABLE RECEIVE INTERRUPTS
;CLEAR XMIT INTERRUPT COUNTER
:CLEAR RCV INTERRUPT COUNTER
:CLEAR A REGISTER FOR TEST DATA USE
‘CLEAR TIMER
POINT R2 TO RECEIVE DATA STORAGE
sSEND FTRST CHARACTER

SET PSW TO PRIORITY 3

;WAIT FOR INTERRUPTS
PSTALL
SSTALL

*ADD INSTRUCTIONS ARE USED TO LENGTHEN LOOP TIME
: TO COVER THE SLOWEST BAUD RATE ON THE FASTEST CPU
:FINISHED ENTIRE TRANSMISSION

BEQ

OR IF INTERRPUTS ARE DISABLED (FINISHED)

ERROR

+107

:TRANSMIT INTERRUPT TIMEOUT IN MAIN. DATA TEST

RESET

*CLEAR EVERYTHING

wo
NN~ =~

wweo

£ 1
MACRO M1113 05-NOV-80 12:32 PAGE 65-1
Li 1=-W/11446 MFM SLU
L
TEST DL11-w LOGIC BY EXERCISING THE XMIT,REC, g CL

DFO

023737
001402
000005

002442

002440

38:

NI NN

002624

000100

4%:

165534

002444

W
D

W
W
&~
o

e
e
d
-

2737 013370
2738 013374
2739
2740 013376
2741 013402
2742 013406
2743 013412
2744 013420
2745 013426
2746 013434
2747
2748 013440

000005
012700
005001
022001
001014
105201
032737
001403
122701
001770
032701
001763
000405

‘Gg‘dfifflg

SRSNIFR

e D
- d

5%:

002454

COMP:

000001

003002

9%:

; COMPARE THE NUMBER OF INTERRUPTS

ERROR

+110

;RECEIVER DID NOT GET FULL TRANSMISSION

TST

CTSTFL
5%

;BR, IF EQUAL
;CLEAR EVERYTHING

BEQ
BIT
BNE

#BIT6,aSWR

IF RCVCNT= 0 NO DATA RECEIVED
:
IF RCVCNT=?, THEN (XMTCNT=RCVCNT)
:
EQUALS THE 'NO, OF INTERRUPTS LOST.
;
;1S CONCOLE UNDER TEST?
;1F NOT, SKIP CLOCK COUNT CHECK
;IF YES, ARE CLOCK TESTS DISABLED?

ERROR

+113

:CLEAR MAINTENANCE WRAPAROUND
;NO CLOCK INTERRUPTS IN EXERCISER

5%
CLKCNT
5%

#BUF ,RO
R1
(RO +,R1

R1
#BITO,FLAGALS

000020

;IF YES, SKIP CLOCK COUNT CHECK
:CHECK FOR AT LESST ONE CLOCK INTERRUPT
:BR IF INTERRUPTS OCCURRED

;CLEAR EVERYTHING

;LOAD RECEIVED DATA POINTER TO RO
;SET UP REGISTER FOR COMPARISON
:COMPARE XMIT & RCV DATA
;BR, IF NOT EQUAL
; INCREMENT COMPARE DATA
;11744 (CPU?
;YES,

SKIP

:SKIP 20 DATA IF 11/44
:SKIP 20

#20,R1
9%
#BITS5,R1
COMP
7%

:BR, IF NOT FINISHED
:BR TO END OF TEST

:FINISHED CHECKING RECEIVED DATA?

000040

8%:

014037
010137

001026
001024

6%:

=(RO),$BDCAT
R1, tGDDn(
+111

:STORE BAD DATA FOR ERROR REPORT
;STORE GOOD DATA FOR ERROR REPORT
;DATA COMPARE ERROR IN EXERCISER

010377

167246
167236
167264

7%:

R3,3TVECT

;RESTORE XMIT VECTOR
;RESTORE RECEIVE VECTOR
;RESTORE CLOCK VECTOR
;RESTORE XMIT PSW VECTOR
;RESTORE RECEIVE PSW VECTOR
;RESTORE CLOCK PSW VECTOR
:GOTO NEXT TEST

1041

014170

167232
167220
167244

002442
000001

OO0O0O0O0O0O

XMTCNT ,RCVCNT
3}

TST
BNE
RESET

000005
104113

NINININNN NN NN NN

005737
001411
032777

(MP BEQ

RESET

104110

SEQUENCE 80

003002

SCPSW,aRTCPSW
ENDEV

XMIT:
1%:

000100
1

005000

167134

g?YCNT

#BITO,FLAGLS

2%
#20,R1

000020
2%:

000040

R4 ,ARVECT
RS ,@RTCVT
STPSW,aTPSW
SRPSW,aRPSW

167140
XCONT:
XRET:

1%
#BIT5,R
XCONT
#B176,aTCSR
XRET
R1,3TBUF
RO

; INCREMENT XMIT INTERRUPT COUNTER
s INCREMENT TEST DATA
;11744 CPU
;TEST ALL DATA

:CHECK DATA FOR *P
;D0 NOT XMIT “P

SEND DATA PATTERN FROM 00 --> 37

IF MORE DATA TO BE SENT
:CLEAR XMIT INTERRUPT ENABLE
sRETURN, WITHOUT SENDING ANY MORE DATA
: SEND NEW CHARACTER
;CLEAR TIMER

CZOLDFO

(TEST # 45

DLI1=W/1144 MFM SLU

MACRO M1113

2760 013510000002

167120

2763 013516
2764 013522

005237
005000

002440

2767 013526

005237

002444

e e

RCV:

000002

2768 013532

e .
e

CLK:

SEQUENCE 81
;RETURN

MOV

aRBUF , (R2)+

INC
(LR

RCVCNT
RO

RTI

000002

PAGE 65-2

RTI

2762 013512 omg;
5;22 013524

05-NOV-80 12:32

= TEST DL11-W LOGIC BY EXERCISING THE XMIT,REC, & CL

INC

CLKCNT

RTI

;STORE RECEIVED DATA

: INCREMENT RCV INTERRUPT COUNTER
;CLEAR TIMER
;RETURN

; INCREMENT CLOCK INTERRUPT COUNT
:RETURN

e ———————————
e e
— =

'CIOLDFO DL11-W/1144 MFM SLU

MACRO M1113

WRAPAROUND TESTING= AUTO INITIATION OF

2769

05-NOv-80 12:32

T/A CONSOLE

TEST

PAGE 66

SEQUENCE 82

;

2770

RL
e

.SBTTL

WRAPAROUND TESTING=- AUTO INITIATION OF T/A CONSOLE TEST

%;;5

WRAPAROUND TESTING= AUTO INITIATION OF

2773
2774
2775
2776
2777
2778
2779
2780

176500
176502
176504
176506
003014
024610

RCSR58
RBUFS58
TCSRS58
TBUF58
BGNADD
ENDADD

=
=
=
=
=
=

176500
176502
176504
176506
DEVADR
ENDADR

T/A CONSOLE

TEST

CIZDLDFO DLI1=W/1144 MFM SLU

MACRO M1113

TEST # 46 - TEST CONSOLE WITH WRAP AROUND

2782

05-NOV-80 12:32

LSBTTL
A

F_7
PAGE 67 SEQUENCE 83

TEST # 46 - TEST CONSOLE WITH WRAP AROUND

SATEST 46 = TEST CONSOLE WITH WRAP AROUND
2783
2784

01353¢

AR AR

000004

T$T46:

SCOPE

RRRRRRRRRdRR

dl)

RRRdddldl)

:'tt'tt"t'ttt't"""""""'"t"ttt""'Q't'tt'tt'ttt't"'tttttt"ttt!
3

%;gz

; MAIN LINE TEST

2787

: THIS TEST PUTS COMMANDS OUT OVER THE SERIAL LINE WHICH IS WRAPPED

2790

: CONTROL P IS SEND TO GET THE CONSOLE'S ATTENTION AND THEN

2792
2793
2794
2795
2796

:
:
;
:
:

%;gg

: AROUND TO THE CONSOLE AND RECEIVES THE RESPONSES

2791

g;g;

IS SENT.

SINCE THE CPU IS HALTED DURING THE TESTING

THE PROGRAM CAN NOT SEE THE CHARS RETURNING, THUS THE PROGRAM WILL
SIT IN A LOOP WAITING FOR A 'B'' TO BE PRINTED BY THE CONSOLE AS A
SIGNAL TO APT THAT THE TESTING IS DONE. ALSO SINCE THE TESTING
INVOLES WRITTING TO THE CPU'S MEMORY A CHECKSUM IS CALCULATED AND THE
MEMORY TO BE USED INSIDE THIS PROGRAMS SPACE IS SAVE BEFORE TESTING

: AND RESTORED AFTER TEST WITH ANOTHER CHECKSUM CALCULATION

2799

2800
2801

T/ACA SOR APT)

Etttt"tt.tttt'tt"ttt"i"t"'ttt.'ttt"'tttt'tttt't"tlt"tt""'tt'tttt

2802 013536

032777

000004

165274

BIT

#B1T72,3SWR

:RUN THIS TEST ONLY IF

2805 013546
2806 013554
ggg; 013562

013737
012737
012706

177776
000340
002432

002434
177776

MOV
MOV
MOV

PSW,SAVEPS
#340,PSW
#JIMSTK,SP

;SAVE OLD PSW
:PUT IN NOW PSW
:USE MY STACK (SO NO CLOBER)

2809 013566
gg}? 013572

005037
012737

002340
000100

CLR
MOV

LoC1
#100,L0C2

:TIMING LOOP COUNTERS

gg}g 013600

004537

014100

JSR

RS,SAVETE

:SAVE LOCATIONS T/A WRITES

2814 013604
gg}g 013610

004537
010437

013706
002436

JSR
MOV

RS, CHKSUM
R4 ,0LDSUM

:CALCULATE CHECKSUM
:SAVE OLD CHECKSUM

2817 013614
%g}g 013620

012700
004537

002564
013726

MOV
JSR

#CNTLP,RO
RS,PUTLIN

:SEND OUT CONTROL P

2820 013624
%g%; 013630

012700
004537

002566
013760

MOV
JSR

#PROMPT,RO
RS,GETLIN

:GET CRLF CONSOLE>>>

2823 013634
%ggg 013640

012700
004537

9002610
013726

MOV
JSR

#TA,RO
RS,PUTLIN

:SEND OUT T/A<CRLF>

%ggg 013644

004537

014024

JSR

RS,.GETB

:GET THE A FROM ''-TESTB"

%g%g 013650

004537

014134

JSR

RS,RESTTE

;RESTORE LOCATIONS T/A WRITES

2830 013654
2831 013660
2832 013664
2833 013666
2834 013670

004537
020437
001401
000000
012706

013706
002436

JSR
CMP
BEQ
HALT
MOV

RS, CHKSUM
R4 ,0LDSUM
10%

:RECALCULATE CHECKSUM

#1000, SP

:RETURN THEIR SP

gggz 013544

001451

001009

WRAP:

002342

108 :

BEQ

108

:SW BIT 2 IS ON

CIDOLDFO DLI1=W/1144 MFM SLU

MACRO M1113

TEST # 46 = TEST CONSOLE WITH WRAP_AROUND

2835 013674
2836 013702

£838
%839

013737
000137

002434
014224

177776

05-NOV-80 12:32

6_7
PAGE 67-1

MOV
JMP

TM,

SEQUENCE 84

SAVEPS,PSW
$EOP

:RETURN PSW
:BR TO END OF PASS ROUTINE

:"Q':'."'Q.'Q"'"""""'t""tt"."'t".t"t.".tt't'ttt"""'t""

840

5321

; ROUTINE TO ‘®M\UATE CHECKSUM ON PROGRAM

5%2%

* INPUT CONDITIONS

%gzg

2845

2848

BGNADD = ADDRESS TO START CHECK SUM (INCLUSIVE)
ENDADD = ADDRESS TO END CHECK SUM (EXCLUSIVE)

: OUTPUT CONDITIONS

2849
%gg?

:
3

2852

;t'Q'tt'tt"t""""""'t"'t".'t"t't'tttt'tfittt't't"tttt't'tt'ttt"'

282

2855 013706
2856 013712

012700
005004

003014

2858 013716
2859 013722
%gg? 013724

022700
001374
000205

024610

2857 013714 062004

CHKSUM:

1%:

REG4L = CHECK SUM

MOV
CLR

#BGNADD ,RO
R4

:GET STARTING ADDRESS
;RESET SUM

CMP
BNE
RTS

#ENDADD ,RO
1%
RS

:CHECK FOR END
:1F NOT DONE LOOP
:DONE RETURN

ADD

(RO)+,Ré&

;ADD WORD TO SUM

2862
2863
2864
2865

:t't't"t'..t't"'it""'tt'"t'ttttttttttttttt'ttttt'tt't"'tt'tt't'tQt't
3
: THIS ROUTINE OQUTPUTS TO THE SERIAL LINE CHARS STARTING AT

2668

Ett.t.ttttt'ttttt'"ttt"tt"'t'ttttt'ttt'ttttlttt"ttttt'ttt"ttt'tQ"lt'

: THE ADDRESS IN REGO UNTIL IT HITS A <377>

gggg

2869
2870

2871 013726
2872 013730
2873 013732
2874 013736
2875 013744
2876 013746
2877 013752
gg;g 013756

112001
001412
004537
032737
001772
110137
000137
000205

PUTLIN:

014060
000200
176506
013726

176504

1%:

108:

MOVB
BEQ
JSR
BIT
BEQ
MOVB
JMP
RTS

(RO)+,R1
108
RS, TIMER
#BIT7,TCSRS8
1%
R1,TBUFS8
PUTLIN
RS

:GET DATA
:END OF DATA
;PROVIDE FOR TIMOUT
:TEST FOR XMIT READY
:WAIT FOR XMIT READY
:OUTPUT CHAR
;REPETE
:RETURN

;ittttittttttt'ttitttttt'tt"tttt'itttti'it'ttttttt'ttt'..'tttt'itit'tttt'
:

2880
2881

2882

: THIS ROUTINE INPUTS A CHARS FROM THE SFRIAL LINE AND COMPARES

2885

;ttttttttttfltt'Qtttt't""'tt't't"'tt"ttttittt'ttt"i"tt'fit"titit't'tt

2 IT WITH THE EXPECTED VALUES POINTED TO BY REGO UNTIL NULL<00>

gggz

2886
2887

2888 013760
2889 013762
2890 013764
2891 013766

112001
105201
001416
105301

GETLIN:

MOVB
INCB
BEQ
DECB

(RO) +,R1
R1
10%
R1

:GET EXPECTED CHAR
;1F NULL EXIT

CZOLDFO DLI1-W/1144 MFM SLU

MACRO M1113

TEST # 46 - TEST CONSOLE WITH WRAP AROUND

014060
000200

2892 013770
2893 013774
2894 016002
2895 014
2896 014010
2897 014014
2898 014016
2899 014020
014022

JSR

RS, TIMER

;PROVIDE FOR TIMOUT

BEQ
MOovB
BIC
(MPB
BEQ
HALT
RTS

1%
RBUF 58,R2
#BIT7,R2
R1,R2
GETLIN

sWAIT FOR REC READY

BIT

176502

°§§%§§%§%§§°”

000200

108:

SEQUENCE 85

sTEST FOR REC READY

#B117,RCSRS8

;STRIP PARITY
;ARE THEY THE SAME
;SAME GET MORE
sNOT SAME HALT
sRETURN

2
lll)
222232
2222220000ttt
2 222222 22222222
X 222222222222232222

: THIS ROUTINE INPUTS CHARS UNTIL IT GETS THE CHAR 'B"
: AND THEN RETURNS

lll)
3222222222222 23222232222233223 2222322222222 2222200ttt

-h

2913 014036

2914 014040
2915 014044
2916 014050
2917 014054
2918 014056
2919
2920

PAGE 67-2

176500

2911 014024
2912 014030

05-NOV-80 12:32

004537
032737
001772
113702
042702
122702

001363
000205

014060
000200

176500

GETB:

JSR
BIT
BEQ

RS, TIMER
#B177,RCSR58
GETB

;OUT TIMING LOOP OUT
;TEST OFR REC READY
;NOT DONE YET

BIC
(MPB

#B1T7,R2
#102,R2

;STRIP PARITY
;CHECK FOR 'B"’

RTS

:WAS "B'* RETURN

MOVB

176502

000200
000102

BNE

RBUF
58 ,R2

INOT "B’ REPETE

GETB

)
3222333
R0 R Rttt
2322332
2222222232222
X 222222222222222222333

: THIS ROUTINE IS USED AS A TIME OUT FEATURE

: WHEN THE TIMING LOOPS BOI!H REACH O THIS ROUTINE WILL
; CAUSE A HALT

Qt'.'.'tt.t'l""'t""'tt"i"'t"".'tt'iti'!.t"tttlt.tt'it't't't'tt't

2929 014060
2930 014064
2931 014066
2932 014072
2933 014074
293§ 014076

005337
001004
005337
001001
000000
000205

TIMER:

002340
002342

108:

DEC

LOC1

DEC
BNE
HALT

LOC2
10%

BNE

RTS

;DECREMPNT TIMING LOOPS

10%

;'F ZERO THIS ROUTINE

;EXECUTED R3 TIMES

RRld)
233233
22022 0 00000ttt
232323
2232333232332
2323232232222 222222222223222322

: THIS ROUTINE SAVES THE LOCATIONS WRITTEN BY THE T/A CONSOLE TEST
; SO THEY MAY BE RESTORED LATER

3222222223222 223222222223233223 32232333233 222 3222222220200t RRRRRRRil

3
2944 014100
2945 014106
2946 014112
2947 014116

000000
000002
002346

002344

SAVETE :
1%:

MOV

0 suvso

MOV

ISAVLOC R

MOV

# R

(R2), (R1)+

)

:SAVE LOCATION 0

*SET UP INDIRECT PNTER

‘SET UP STORAGE LOC. PNTER

:GET WORD AND SAVE

MACRO M1113
94 DLDFO DLi1=-W/1144 MFM SLU
TE ST # 46 - TEST CONSOLE WITH WRAP AROUND
|

d
-

NO SN

s
h

WINNON

%968 014120

000241
006102

05-NOV-80 12:32
CLC

ROL

(MP
BMI

024610

000205

RTS

2223222222232

1.7

PAGE 67-3

SEQUENCE 86

:DONT ROT IN ANY BITS
;SET NEXT ADDRESS

R2
R2,#ENDADD

:SEE IF AT END

;NO REPETE

2232222232222 2222222

2222222222 R0

iRttt

RRRlld)

: THIS ROUTINE RESTORES THE SAVED LOCATIONS THAT T/A WRITES INTO
.

2222222223222

—

2960
2961 014134
2962 014142
2963 014146
2964 014152
2965 014154
2966 014156
2967 014160
2968 014164
2969 014166

013737
012702
012701
012112

000241
006102
020227
100772
000205

002344
000002
002346

024610

000000

RESTTE:
1%:

2322222222222

MoV
MOV
MOV
MOV

cLC

ROL

CMP
BMI
RTS

222222222202

SAVED,O

#2 ,R2

#SAVLOC,R1

(R1)+,(R2)

R2
R2 ,#ENDADD
1%
RS

ittt

RtRdRRRRddd)

;SET UP INDIRECT PNTER
;SET UP STORAGE LOC. PNTER
;GET WORD AND RESTCRE
;DONT ROT IN ANY BITS
sSET NEXT ADDRESS
;SEE IF AT END
:NO REPETE

CIDLDFO DLi1-W/1144 MFM SLU

MACRO M1113

TEST # 46 = TEST CONSOLE WITH WRAP AROUND

2970

2971 014170
2972 014174
2973 014200
2974 014206
2975 014210
2976 014214

2977 014220

005037
005237
023737
001002
000137
005037

000137

001002
001076
002630
013536
002624

004050

05-NOV-80 12:32

ENDEV:
001076
NOEOP:

J 7

PAGE 68

SEQUENCE 87

;END OF DEVICE PASS ROUTINE

(LR
INC
CMP
BNE
JMP
(LR

JMP

$STSTNM
$DEVCT
TMP2 ,$DEVCT
NOEOP
WRAP
CTSTFL

TSTDEV

;CLEAR TEST NO. COUNT FOR SCOPE ROUTINE
s INCREMENT DEVICE COUNTER
;ALL DEVICES TESTED
:BR, IF NO
;EXECUTE WRAP AROUND AFTER ALL DEVICES
;CLEAR CONSOLE UNDER TEST FLAG

16O TEST NEXT DEVICE

a——
_

CIDLDFO DL71-/1146 MFM SLU
'END OF PASS ROUTINE

2979

05-NOV-80 12:32

.SBTTL

PAGE 69

SEQUENCE 88

END OF PASS ROUTINE

:;'Q"..'"".""""""""""".Q".'."'l"""""""t"'

PPt

eSS
SFPRES LRy

;*INCREMENT THE PASS NUMBER (SPASS)
;*1F THERES A MONITOR GO TO IT
(=lelelelelelele]

MACRO M1113

;*1F THERE ISN'T JUMP TO GOAGIN

$€0P:
001002
001074

100000

001074

014314
000042

SCOPE
CLR
INC
BIC
DEC
$EOPCT: .WORD
BGT
MoV
SENDCT: .WORD
$EOPCT
TYPE

$GET42: MOV
BEQ

RESET

$ENDAD: JSR
NOP
$DOAGN:

014306
014310

2980 014314

STSTNM

;s JERO THE TEST NUMBER
;s INCREMENT THE PASS NUMBER
;;DON'T ALLOW A NEG. NUMBER
::LOOP?

$DOAGN

{PC)O,G(PC)O

3: V¢S
s sRESTORE COUNTER

.ENDMG

::TYPE "END PASS"

$PASS
#100000,$PASS
{PC)’

aniL2,RO
$DOAGN
PC,(RO)

NOP
NOP

000

SRTNAD:

SENULL:

JMP
.WORD

105

ENDMG:

.EVEN
.ASCIZ

:sGET MONITOR ADDRESS

;;BRANCH IF NO MONITOR

;sCLEAR THE WORLD
;:G0 TO MONITOR
;s SAVE ROOM
;:FOR
LsACTN

a(PC)+
GOAGIN
-1,-1,0

: ;RETURN

:sNULL CHARACTER STRING

<CR><LF>/END PASS

'CZDLDFO DLT1=4/1164 MFM StV

(END OF PASS ROUTINE

298§ 014330
298 016;32
2984 014 gz
2985 014
2986 014340
2987 014344
2988 014350
2989 014356
2990 014360

1$:

299% 014370

299; 014374
299
2996 014400
2997 014402
2998 014404
2999 014410
3000
3001
3002
3003 014412
3004 014414
3005 014420
3006 014424
3887 014432

3008
3009 014434

000137

002630

001100
003774

INC
NOP

BNE
ADD
CLR
CMP

BNE
MoV
JMP

001000
004172

2381 014364

MACRO M1113 05-NOV-80 12:32 PAGE &0 SEQUENCE 89
GOAGIN: CLR

000002
001076
000001

(SP)

;CLEAR ANOTHER LOCATION ON STACK
s INCREMENT STACK LOCATION

1%
" ,sP
SDEVCT
#1,THP2

;BRANCH BACK UNTIL ZERO AGAIN
;CLEAN THE LOCATION OFF THE STACK
;CLEAR DEVICE COUNT
;1S THERE ONLY ONE DEVICE UNDER TEST?

=(SP)

RSTRT
#1000,5P
TMsNn

RSTRT:

(LR
JMP

WRPSW:

MOV(SP),=(SP)
a(SP)+,(SP)
MOV
ADD
#2,-(SP)

000002

SUNIT
BEGIN

RTI

: TAKE UP SOME MORE TIME

:BR, IF NOT

;RESET STACK POINTER
PASS
ANOTHER
;GO DO

;CLEAR UNIT NUMBER

:COPY RETUN PC

;MOVE NEW PSW TO STACK

;ADJUST JSR RETURN

;:POP RETURN PC & NEW PSW

INE TO REPORT UNEXPECTED OR ERRONEOUS TRAPS OR INTERRUPTS
: SUBROUT

104112

000000

000004
002622
000002

CATCH:
002620

MOV
SuB
Mov

(SP)+,RO
#4,R0
RO,BOVECT

ERROR

+112

MOV

HALT

2(SP),0LDPC

;GET ADDRESS OF TRAP VECTOR + &
;ADJUST TO POINT TO TRAP ADDRESS
:STORE TRAP OR INTERRUPT ADDRESS
;GET PC WHERE TRAP OR INTERRUPT OCCURRED
;REPORT ERROR
;PROGRAM MUST BE RESTARTED AT THIS PCINT

pro
e
——

—

CZOLDFO DLIT1=W/1144 MFM SLU

END OF PASS ROUTINE

—

—————

c—

——

05-NOV-80 12:32

—

a—————————

—

n7
PAGE 71
SEQUENCE 90

:;'.'"QQQ'Q"""""'Q"'"Q""""'Q'Q'Q""'t""'QQ'QQQ'QQ'

1
14
15
16
17

s*THIS ROUTINE WILL INCREMENT THE ERROR FLAG AND THE ERROR COUNT,
s*SAVE THE ERROR ITEM NUMBER AND ADDRESS OF THE ERROR CALL

s*AND GO TO SERRTYP ON ERROR

s*THE SWITCH OPTIONS PROVIDED BY THIS ROUTINE ARE:

;*SW15=1

3018
3019
3820
21

;*SW13=1
s *SW09=1
s*CALL
e
ERROR

3022

HALT ON ERROR

INHIBIT ERROR TYPEOUTS
LOOP IN ERROR
N

; ;ERROR=EMT AND N=ERROR ITEM NUMBER

;;'t""t'.'"Q'Q""Q""Q"t""t'tt"t"t"'t""tt"Q't"'t"

;826 014436

$ERROR:

3025 014436
3026 014442
27 014444
28 014452
29 014456
3030 014462
3031 014470
3032 014476
3033 014504
3034 014506
3035 014512
3036 014516
3037 014516
;gSl 8165 4

105237
001775
013777
005237
011637
162737
117737
032777
001004
004737
104401

001003

122737
001007

000001

001106

3040 014534
3041 014540

004737
000

001014

015326

014540

014526

3045 014541

113737

3043 014542
3044 014544
3045 014550
3046 014552
3047 014554

000
000777
005777
100001
000000
104406

3049 014564
3050 0145

001402
013716

3048 014556
3051 014572
3052 014576
;822 8}2282

3055 014604
3056 014612
3057 014614
3058 014616
3059 014616

MACRC M1113

1"
gg‘g

—

032777

005737
001402
013716

022737
001001
000000
000002

001002
001012
001016
000002
164322
020000

7%:

164370
001016
001014
164334

014620
001063

22%:
2%:

164254

3s:

001010
001060

4$:

001060

014274

SERFLG
7%
STSTNM,SDISPLAY
SERTTL
(SP) ,SERRPC
#2,3ERRPC
@SERRPC,SITEMB
#BIT13,3SWR
208
PC,SERRTYP
JSCRLF

:SET THE ERROR FLAG
sDON'T LET FLAG GO TO ZERO
;DISPLAY TEST NUMBER AND ERROR FLAG
s INCREMENT ERROR COUNT
sGET ADDRESS OF ERROR INSTRUCTION

CcmMPB
BNE

#APTENV,SENV
2%

JRUNNING IN APT MODE
:NO, SKIP APT ERROR REPORT

JSR
.BYTE

PC,SATYS
0

;REPORT FATAL ERROR TO APT

MOVB
21%:

_
164¢70

001000

208:

INCB
BEQ
MOV
INC
MOV
suB
MOVB
BIT
BNE
JSR
TYPE

000042
6%:

.BYTE
ER
TST
BPL
HALT
CKSWR

$I1TEMB,21%

22%
aSWR
3%

BIT

#B1T09,aSwWR

TST
BEQ
MOV

S$SESCAPE
5%
$ESCAPE, (SP)

BEQ
MOV

CMP
BNE
HALT
RTI

4%
$LPERR, (SP)

#SENDAD ,a#42
6%

;STRIP AND SAVE THE ERROR ITEM CODE
;SKIP TYPEOUT IF SET
:SKIP TYPEOUTS
;G0 TO USER ERROR ROUTINE

:SEf ITEM NUMBER AS ERROR NUMBER
:APT ERROR LOOP
sHALT ON ERROR
sSKIP IF CONTINUE
sHALT ON ERROR!
sTEST FOR CHANGE IN SOFT-SWR

:LOOP ON ERROR SWITCH SET?
sBR IF NO
;FUDGE RETURN FOR LOOPING

:CHECK FOR AN ESCAPE ADDRESS
:BR IF NONE
;FUDGE RETURN ADDRESS FOR ESCAPE
:ACT=11 AUTO-ACCEPT?
:BR IF NO
;YES
;RETURN

—————

'CZOLDFO DLI1-W/1144 MFA SLU

MACRO M1113

|END OF PASS ROUTINE

3668

05-NOV-80 12:32

.SBTTL

N 7

PAGE 72

SEQUENCE 91

ERROR MESSAGE TYPEOUT ROUTINE

33 RRERRARRARARRRRCRCCEECECEOECERQOOCRORARRNARNRANRARARANANNAOOONOOCEROONETD

;*THIS ROUTINE USES THE ‘‘ITEM CONTROL BYTE'' (SITEMB) TO DETERMINE WHICH
;*ERROR IS TO BE REPORTED. IT THEN OBTAINS

001063

TYPE

MoV
CLR
B1sS8
BNE

001014

SCRLF

68.-(sr)

::SAVE RO
::PICKUP THE ITEM INDEX

::1F ITEM NUMBER IS ZERO, JUST

aFSITEMB
RO

#SERRTB,RO
(RO)+,2%

3064

2%:

3s:

(RO)+,48
5%

4$:

0
+SCRLF
(RO) RO
7%
(SP)+,RO
.SCRLF

6%:
7%:

::SAVE SERRPC FOR TYPEOUT

:sERROR ADDRESS

+SCRLF

;sFORM TABLE POINTER
::;PICKUP "'ERROR MESSAGE'' POINTER
::SKIP TYPEOUT IF NO POINTER
::TYPE THE ''ERROR MESSAGE''
::"'ERROR MESSAGE'' POINTER GOES MERE

::"'CARRIAGE RETURN'' & "'LINE FEED"
::PICKUP '‘DATA HEADER'' POINTER
::SKIP TYPEOUT It 0
::TYPE THE ''DATA HEADER'
::"'DATA HEADER'' POINTER GOES HERE

::"'CARRIAGE RETURN'' & ""LINE FEED'
::PICKUP ''DATA TABLE'' POINTER
;.60 TYPE THE DATA
:sRESTORE RO

::"'CARRIAGE RETURN'® & "‘LINE FEED'

s sRETURN

a(RO) +,-(SP)

;. SAVE @(RO)+ FOR TYPEOUT
::60 TYPE--OCTAL ASCIICALL DIGITS)
::1S THERE ANOTHER NUMBER?
::BR _IF NO
::TYPE TWO(2) SPACES

014750
040

::TYPE THE PC OF THE ERROR

::6G0 TYPE==OCTAL ASCIICALL DIGITS)
::GET OUT
::ADJUST THE INDEX SO THAT IT WILL
WORK FOR THE ERROR TABLE
83

1%:

5%:

::"CARRIAGE RETURN'' & "'LINE FEED'

$ERRPC,~(SP)

001016

014712
014716
014720
014722
014724
014730
014732
014732
014734
014736
014740
014742
014746
014750

FROM THE "ERROR TABLE'' (SERRTB),

:«AND REPORTS THE APPROPRIATE INFORMATION CONCERNING THE ERROR.
$ERRTYP:

000

8s:

::LOOP

;:TWO(2) SPACES

[

CZDLDFO DLY1-U/1144 WFW SLU
|

|ERROR MESSAGE TYPEOUT ROUTINE
'

T
S

—

A a——

WACRO M1113 0S-NOV-80 12:32 PAGE 73 SEQUENCE 92

3066
3067

.SBTTL

POWER DOWN AND UP ROUTINES

3068

L
L A i L

3070

3069

; *POWER DOWN ROUTINE
L

AR LA

3071 014754 012737 015120 000024 $PWRDN: MOV

#SILLUP,S#PWRVEC ;SET FOR FAST UP

3079 015004
3080 015010
3081 015014

aSWR,=(SP)
sPUSH aSWR ON STACK
SP,$SAVR6
sSAVE 5P
#SPURUP,3#PWRVEC ;SET UP VECTOR

3072 014762
3073 014770
3074 014772
3075 014774
3076 014776
3077 015000
3078 015002

012737
010046
010146
010246
010346
010446
010546

3082 015022

000000

3083 015024
3084
3085

017746
010637
012737

000340

164030
015124
015026

000026

HALT

000776

BR
R

3087

3088

3094 015050
3095 015052
3096 015054
3097 015056
3098 015060
3099 015066
3100 015074
3101 01..00
3102 015104
3103 015106
3104 015110
3105 015112
3106 015116
3107 015120
3108 015122
3109 015124
g}}? 015126

MOV
MOV
MOV

000024

3086

3089 015026
3090 015034
3091 015040
3092 015044
3093 015046

MOV
MOV
MOV
MOV
MOV
MOV
MOV

012737
013706
012677
012605
012604

015120
015124
163774

012603
012602
012601
012600
012737
012737
005037
005237

014754
000340
015124
015124

013716

001006

001375
104401
015126
000002

000000
000776
000000
015

012

000024

1%:

;HANG UP

LR
R R iRl
L

R Rl

#SILLUP,3#PWRVEC ;SET FOR FAST DOWN
$SAVRG,SP
;GET SP
(SP)+,aSWR
;sPOP STACK INTO aSwWR
(SP)+,RS
(SP)+,R4
sPOP STACK INTO R4

MOV
MOV
MOV
MOV
MOV
MOV
CLR
INC

(SP)+,R3
;POP STACK INTO R3
(SP)+,R2
:POP STACK INTO R2
(SP)+,R1
sPOP STACK INTO R1
(SP)+,R0O
sPOP STACK INTO RO
#$PWRDN,3#PWRVEC ;SET UP THE POWER DOWN VECTOR
#340,3#PWRVEC+2 ;PRIO:7
$SAVRS
sWAIT LOOP FOR THE TTY
$SAVRE
sWAIT FOR THE INC

MOV

$POWER
SLPADR, (SP)

BNE
TYPE
$PWRMG: .WORD
RTI

120

;PRIO:7
;PUSH RO ON STA(CK
sPUSH R1 ON STACK
sPUSH R2 ON STACK
sPUSH R3 ON STACK
sPUSH R4 ON STACK
:PUSH RS ON STACK

;*POWER UP ROUTINE

S$PWRUP: MOV
MOV
MOV
MOV
MOV

000024
000026

#340,9#PWRVEC+2
RO,=(SP)
R1,=-(SP)
R2,=-(SP)
R3,-(SP)
R4 ,-(SP)
RS,=(SP)

SILLUP: HALT
BR
$SAVR6: 0
SPOWER: .ASCIZ

=2
<15><12>"'POWER"’

;0F WORD
sREPORT THE POWER FAILURE
sPOWER FAIL MESSAGE POINTER

:CHOCOLATE FUDGE RETURN TO BEGINNING OF TEST
sRETURN TO THERE

:THE POWER UP SEQUENCE WAS STARTED
; BEFORE THME POWER DOWN WAS COMPLETE
sPUT THE SP HERE

D 0 DLI1=-W/1144 MFM SLU
CZDLDF

POV 3 R DOWN AND UP ROUTINES

MACRO M1113

31 1 3
3n 4

05-NOV-80 12:32

.SBTTL
L

C 8
PAGE 74 SEQUENCE 93

SCOPE HANDLER ROUTINE
L

L TR

S R

;*THIS ROUTINE CONTROLS THE LOOPING OF SUBTESTS. IT WILL INCREMENT

;*AND LOAD THE TEST NUMBER(STSTNM) INTO THE DISPLAY REG.(DISPLAY<7:0>)
;*AND LOAD THE ERROR FLAG (SERFLG) INTO DISPLAY<15:08>

;*THE SWITCH OPTIONS PROVIDED BY THIS ROUTINE ARE:
LOOP ON TEST
LOOP ON ERROR

s*SW14=1
;*SW09=1

s»CALL

5
5136

‘e

104406

$SCOPE:

032777
001052

015150

000416

015152
015156
5164
170

013746
012737
005737
012637

000004
015176
177060
000004

012637
000407

000004

105737

001003

174
176

00
204

D e

[elelelelelelelelelelalelelelelelelelelalelel]

5140
5146

000421
022626

)

001412

040000

D
D -l
i
D
)
e

N AL

BIT

BNE
;WRRRRSTART OF

5$%:

163616

001010

001006

MOV
MOV

000004

001000

001003
001002
001002
001006
001010
001060
000001
001002
001006

—

1%:

CKSWR

$XTSTR: BR

3115

163672

001072

::SCOPE= 107

SCOPE

TST
MOV
BR

;s TEST FOR CHANGE IN SOFT-SWR
;;LOOP ON PRESENT TEST?
;. YES IF SW14=1

#BIT14,aSWR
$OVER
ngE FOR THE XOR TESTERARAAR

;:1F RUNNING ON THE ''XOR'' TESTER CHANGE

= (SP)
ANERRVEC,
#5% a#ERRVEC

ar177060

MOV

(SP)+,a#ERRVEC
$SVLAD
(SP)+,(SP)+
;EP)*.OOERRVEC

MOVB

#1,SERMAX

CMP

ssTHIS INSTRUCTION TO A ''NOP'' (NOP=240)

:;SAVE THE CONTENTS OF THE ERROR VECTOR
;sSET FOR TIMEOUT
;s TIME OUT ON XOR?
:sRESTORE THE ERROR VECTOR
;:60 TO THE NEXT TEST

:sCLEAR THE STACK AFTER A TIME OUT
:;RESTORE THE ERROR VECTOR
;:LOOP ON THE PRESENT TEST

BR
6S:;#MRRNEND OF CODE FOR THE XOR TESTERAMNNAN
::HAS AN ERROR OCCURRED?
S$ERFLG
2%:
TSTB
$SVLAD
BEQ
:.BR IF NO
#B1T09,aSwWR
BIT
::LO0OP ON ERROR?
;:BR IF NO
L%
BEQ
7%:
MOV
SLPERR,SLPADR
:2SET LOOP ADDRESS TO LAST SCOPE
$OVER
BR
4%:
CLRB
SERFLG
:;ZERO THE ERROR FLAG
$TSTNM
$SVLAD: INCB
:;COUNT TEST NUMBERS
MOVB
STSTNM, STESTN
:sSET TEST NUMBER IN APT MAILBOX
(SP) ,SLPADR
MOV
::SAVE SCOPE LOOP ADDRESS
,SLPERR
(SP)
MOV
:sSAVE ERROR LOOP ADDRESS
SESCAPE
CLR
:sCLEAR THE ESCAPE FROM ERROR ADDRESS

$SOVER:

MOV
MOV
RTI

ssONLY ALLOW ONE(1) ERROR ON NEXT TEST

STSTNM, GDISPLAY ;;DISPLAY TEST NUMBER
$."ADR, (SP)
;sFUDGE RETURN ADDRESS

;:FIXES PS

N U U

PAGE 75

SEQUENCE 94

132737

001425
017600
062766

MMAAAAAAAL AL AL AR

"SBTTL

APT COMMUNICATIONS ROUTINE
AR

000001
000001

$SATY:

MovBe
Move

#1,8FFLG
1 ,SMFLG

;TO REPORT FATAL ERROR
;7O TYPE A MESSAGE

000001

SATYL:
SATY(:

move

#1,8FFLG

;TO ONLY REPORT FATAL ERROR

MoV
MOV
1STB

RO,=(SP)
R1,-(SP)
SMFLG

;PUSH RO ON STACK
;PUSH R1 ON STACK
;SHOULD TYPE A MESSAGE?
:IF NOT: BR

$SATY3:

015552
000001

001106

000100

001107

000004
000002
001066

000004

001102

BEQ
CMPB
BNE
BITB
BEQ

1%:

2%:

001102

001104
000004

NE2 2o
\h\h\fi\h\h\fl\h\h:z;c:c:g\hz;\h
g&DNN?CDShUEB

d
d
D o
e
e
i
e
D e
e
e
D e

AWM AT VAL W ViAWY
P
VIWVAVAWNLSES
~
~
S WNOOONSO

e
e
b

VIV

elelelelelelelelelelelelelelelelelelalele
)

000000
105737
001413
005737
001410
005737
001375
017637

000004
000002
177776
015556

001066

015464
000004

3%:

4%:
5%:

015554

108:

001106

MOV
ADD
TST
BNE
MOV
TSTB
BNE
SuB
ASR
MOV
MOV

001066
001070

000004

12%:

(R0O)+

, RO
$MSGAD
RO
RO,$SMSGLGT

;FIND END OF

MESSAGE

:SUB START OF MESSAGE

MOV
ADD
MOV

34 (SP)
, 48
#2,4(SP)

;PUT MSG ADDR IN JSR LINKAGE
;BUMP RETURN ADDRESS

JSR
.WORD

zc.srvpe

;CALL TYPE MACRO

TSTB

SFFLG
12%
SENV
12%
SMSGTYPE
11%
@4 (SP) ,SFATAL
SMSGTYPE
#2,4(SP)
$FFLG
SLFLG
SMFLG
(SP)+,R1
(5P)+,RO

BtQ

BEQ

TST
BNE
MoV
INC
ADD
CLRB
CLRB
CLRB

MOV
RTS

.BYTE
.BYTE

.EVEN

llh

;OPERATING UNDER APT?
:1F NOT: BR
g:PTSPOOL.$ENVH ;SHOULD SPOOL MESSAGE?
:1F NOT: BR
@4 (SP) ,RO
sGET MESSAGE ADDRESS
#2,4(SP)
;BUMP RETURN ADDRESS
$MSGTYPE
;SEE IF DONE W/ LAST XMISSION?
1%
;IF NOT: WAIT
RO, SMSGAD
;PUT ADDRESS IN MAILBOX
#APTENV, SENV

#4 ,SMSGTYPE

MOV

SMFLG:
SLFLG:
$FFLG:

;GET MESSAGE LENGTH IN WORDS
;PUT LENGTH IN MAILBOX
;TELL APT TO TAKE MESSAGE

TST

11%:

AARRAARAAARAALARR

SATYC

177776,-(SP)

105737

001450
122737
001031

D D D D i

N N NN U

05-NOV-B0 12:32

OoOoOO

WIN
N WWNW

[« 0 X

W WWWNWIWWWWNNW
' »
3 &~ o

VIV IV IV IV IV, ) Vi
T AWDAWDN

N NN

D D D D il

D D il

N N N N N N N N AN N N

D i
D D

N N O

010046
010146

) D e

N U

112737
112737
000403
112737

) D e

Y G

D i
D D e

N N N U U
A

D ) D

N U

D e

N U N O U U

D i il

U U W
N U

A U

MACRO M1113

;"."""t.""""""""""'Q"Q"""l"""."""'t"t"'

WN=O VNV WN2OYoeN
'N‘i\“’°W>gx=gs>04’OflfiU“flU“flU“fl\fivnhihbJ\bJ\FJNbJ"WflVfldgfl:xyNUfldU“UN"UAHUAHURMUHLJ—*—'
W = O VN VS WN 2OV
NO VS WN =200V~
N=OOVE~N

ANDLER ROUTINE

D D D D D il D

NN N W

LDFO DL11=-W/1144 MFM SLU

;PUSH 177776 ON STACK

;SHOULD REPORT FATAL ERROR?
;1F NOT: BR
sRUNNING UNDER APT?
;IF NOT: BR
sFINISHED LAST MESSAGE?
sIF NOT: WAIT
sGET ERROR #
;TELL APT TO TAKE ERROR
:BUMP RETURN ADDRESS
:CLEAR FATAL FLAG
sCLEAR LOG FLAG
;CLEAR MESSAGE FLAG
:POP STACK INTO R1
sPOP STACK INTO R1
:RETURN

:LOG FLAG

JFATAL FLAG

CZOLDFO DLI1=-W/1144 MFM SLU

'APT COMMUNICATIONS ROUTINE

o
A
L
37
L

3178

377

000200
000001
000100

000040

MACRO M1113

05-NOv=-80 12:32

APTS17E=200
APTENV=001
APTSPOOL =100
APTCSUP=040

E 8
PAGE 75-1

SEQUENCE 95

CZDLDFO DLI1=-W/1144 MFM SLU

APlsgggHUNlCATXONS ROUTINE

MACRO M1113

3180

05-NOv-80 12:32

.SBTTL

PAGE 76

SEQUENCE 96

TYPE ROUTINE

"t.'Q"QQ".""""""'""""."Q""'"'."""""'.Q'Q'

S%ROUTINE TO TYPE ASCIZ MESSAGE. MESSAGE MUST TERMINATE WITH A 0 BYTE.
*«THE ROUTINE WILL INSERT A NUMBER OF NULL CHARACTERS AFTER A LINE FEED.
'NOTE1
$NULL CONTAINS THE CHARACTER TO BE USED AS THE FILLER CHARACTER.

$FILLS CONTAINS THE NUMBER OF FILLER CHARACTERS REQUIRED.

TeNOTE:

$FILLC CONTAINS THE CHARACTER TO FILL AFTER.

;*NOTE3:
°'

s«CALL:
:»1) USING A TRAP INSTRUCTION

.OR
M

TYPE

,MESADR

::MESADR IS FIRST ADDRESS OF AN ASCIZ STRING

]

.
i

TYPE
ME SADR

015556
015562
015564
015566
015570
015572
015576
015604
015606
015614
015616
015622
015626
015630
015636

015640
015642
015644
015646
015650

015654
015656
015662
015664
015670
015672
015674

015676

015700
015704
015706
015712
015716
015720

015724
015730
015732
015736
015742

105737
100002
000000
000430
010046
017600
122737
001011
132737
001405
010037
004737
000000
132737
001003

112046
001005
005726
012600
062716

000002
122716
001430
122716
001006
005726
104401

001063

001057

1%:

000002
000001

001106

000100

001107

015626
015316
000040

001107

61%:
62%:

2%:
000002

60%:
3%:

000011

4%:

000200

105037
000755
004737
123726
001350
013746

016104

105366
002770
004737
105337

000001

000770

$TYPE:

015770
001056

MOvB
BNE
TST
MOV
ADD

RTI
CMPB
BEQ
(MPB
BNE
TST
TYPE

$CRLF

5%:
6%:

001054
015770
016104

TSTB
BPL
HALT
BR
MOV
MOV
(MPB
BNE
BITB
BEQ
MOV
JSR
.MWORD
BiTB
BNE

7%:

$TPFLG
1%

::1S THERE A TERMINAL?
:iBR IF YES
:sHALT HERE IF NO TERMINAL
3%
:sLEAVE
RO,-(SP)
:+SAVE RO
a2(SP),RO
::GET ADDRESS OF ASCIZ STRING
#APTENV, SENV
:RUNNING IN APT MODE
62%
:2NO,GO CHECK FOR APT CONSOLE
#APTSPOOL ,$ENVM ;;SPOOL MESSAGE TO APT
62%
::NO,GO CHECK FOR CONSOLE
::SETUP MESSAGE ADDRESS FOR APT
RO,61%
..SPOOL MESSAGE TO APT
PC,SATY3
O
: sMESSAGE ADDRESS
#APTCSUP.SENVM ;;APT CONSOLE SUPPRESSED
::YES,SKIP TYPE OUT
60%

(RO)+,=-(SP)
4%
(SP)+
(SP)+,RO
#2,(SP)

s sPUSH CHARACTER TO BE TYPED ONTO STACK
::BR IF IT ISN'T THE TERMINATOR
::1F TERMINATOR POP IT OFF THE STACK
:sRESTORE RO
::ADJUST RETURN PC

#HT, (SP)
8%
#CRLF, (SP)
5%
(SP)+

::BRANCH IF NOT <CRLF>

: :RETURN
:;BRANCH IF <HT>

::POP <CR><LF> EQUIV
;:TYPE A CR AND LF

CLRB
BR
JSR
CMPB
BNE
MOV

$CHARCNT
2%
PC,STYPEC
SFILLC,(SP)+
2%
$NULL ,-(SP)

::CLEAR CHARACTER COUNT
::GET NEXT CHARACTER
1260 TYPE THIS CHARACTER
::1S IT TIME FOR FILLER CHARS.?
:21F NO GO GET NEXT CHAR.
::GET # OF FILLER CHARS. NEEDED

DECB
BLT
JSR
DECB

1(SP)
6%
PC,STYPEC
SCHARCNT

::DOES A NULL NEED TO BE TYPED?
::BR IF NO--GO POP THE NULL OFF OF STACK

7%
BR
;HORIZONTAL TAB PROCESSOR

::AND THE NULL CHAR.

;.60 TYPE A NULL
::D0 NOT COUNT AS A COUNT
;.LOOP

—

—oO

/114646 MFM SLU

744

D i

OOO0O0COO0O0O

TYPE ROU

CIDLDFO

112716

004737

132737

001372
005726
000724
105777

100375
116677
105777
100021

017746
042716
022726
001012
105777
100375
017746
042716
022726
001366
122766
001003
105037
000406
122766
001402

000040
015770
000007

MACRO M1113

8% :

016104

$STYPEC:

000002
163034

163046

BITB
BNE

#7.SCHARCNT
9%

BR
TSTB
BPL

2%
@$TPS
$TYPEC

JSR

MOVB

1STB

000023
3$:

163010

000021

000015

000002

2%:

000002

18$:

016104
000012

105227

2(SP),asTPB
a$TkS

#177600, (SP)
#23,(SP)+
2%
@$TKS
38

BIC

#177600, (SP)

CMPB

#CR,2(SP)

(MPB

#LF,2(SP)

CMP
BNE

BNE
CLRB
BR

$TYPEX: RTS

a$TKB,
= (SP)

a$1kB,

SEQUENCE 97
:;REPLACE TAB WITH SPACE

::TYPE A SPACE

;sBRANCH IF NOT AT
:sTAB STOP

;:POP SPACE OFF STACK
:3GET NEXT CHARACTER

;sWAIT UNTIL PRINTER IS READY

BIC
CMP
BNE
TSTB
BPL

BEQ
INCB
$CHARCNT:.WORD

.SBTTL

(SP)+

MOV

163004
177600

PC,ETYPEC

8PL

MOV

163030
177600

000000
000207

3181

9%:

,(SP)

MOVB
ST

163054

G 8
PAGE 76-1

05-NOV-80 12:32

- (SP)

#21,(SP)+
3$

1%
S$CHARCNT
$TYPEX

$TYPEX
(PC)+
0
PC

;:LOAD CHAR TO BE TYPED INTO DATA REG.
;sSEE IF KEYBOARD IS TALKING.
;sBRANCH IF IT ISN'T,
; sPUSH CHARACTER ONTO STACK.
;:BIT CLEAR TOP BYTE AND PARITY BIT.
;sSEE IF THIS IS A *S.
;;BRANCH TO CONTINUE IF IT ISN'T.
;sWAIT FOR ANOTHER INPUT.

; ;BRANCH BACK IF NOT READY.
s sPUSH NEXT CHARACTER ON STACK.
;:BIT CLEAR TOP BYTE AND PARITY BIT.
;;SEE IF THIS IS A *0.
; ;BRANCH BACK FOR MORE WAIT IF NOT.
;s 1S CHARACTER A CARRIAGE RETURN?
; ;BRANCH IF NO
::E§§;-CLEAR CHARACTER COUNT

*'1S CHARACTER A LINE FEED?
“'BRANCH IF YES
*'COUNT THE CHARACTER
*'CHARACTER COUNT STORAGE

BINARY TO OCTAL (ASCII) AND TYPE

t'ttti"."l"t"'t"'t'""i"!"t'l.t"t."lt"ttt"t"."t"

S*THIS ROUTINE IS USED TO CHANGE A 16-BIT BINARY NUMBER TO A 6=DIGIT
T«OCTAL (ASCII) NUMBER AND TYPE IT.

:«$TYPOS=--ENTER HERE TO SETUP SUPPRESS ZEROS AND NUMBER OF DIGITS TO TYPE
:-CALL

MOV

,
= (SP)
NUM

v
i

.BYTE
BYTE

N
M

TYPOS

:NUMBER TO BE

TYPED

..CALL FOR TYPEOUT
;sN=1 T0 6 FOR NUMBER OF DIGITS TO TYPE
::M=1 OR 0
::1=TYPE LEADING ZEROS

::0=SUPPRESS LEADING ZEROS

:t
:t

;*$TYPON=-=--ENTER HERE TO TYPE OUT WITH THE SAME PARAMETERS AS THE LAST
S«$TYPOS OR $TYPOC
;'CALL:

e
HL

MOV

TYPON

,
= (SP)
NUM

: sNUMBER TO BE TYPED
;s CALL FOR TYPEOUT

;*$TYPOC-=-ENTER HERE FOR TYPEOUT OF A 16 BIT NUMBER

[

—————

NSO

=
=

—
s
s

-d
b b

o000

e e
e e

s*CALL:

17646
16637
12637

000000
000001
016335

‘.

016333

MOV

TYPOC

$TYPOS: MOV

MOVB

,
= (SP)
NUM

a(sP),=(SP)

1(SP).SOFILL

+1
(SP)+.SOMODE

: sNUMBER TO BE TYPED
;s CALL FOR TYPEOUT
:;PICKUP THE MODE
:;LOAD ZERO FILL SWITCH
; sNUMBER OF DIGITS TO TYPE

BINARY TO OCTAL (ASCID) AND TYPE

PORIRIRI
NI NI
= = o
b b b —d o pey
b
NOO SN
ONOSNNOOO ~N

LD
D
B
D LD
D LD LD LD LD
D
D
— o

ooooororOrOrOFOMONMCOCMCOCMCOMCOO o

(eleleleleolelelelelelelelelelele] o

016126
016132
016134

MACRO M1113

000002

ADD

000001
000006
000005

Move
Move
Mova
MOV
MoV
MoV
Move
NEG
ADD
MOvB

016335
000006
016334
016333
000012

Move
MOV

o
SRS

Q-

6224
016226

016240

177770

d
-

NN
Al
ak o
OO~

016334

016232
=lelele

05-NOV-80 12:32

;:SET THE ZERO FILL SWITCH

R4 ,=(SP)

;sSAVE R4

#5,80CNT
R3,=(SP)

R5,=(SP)
$OMODE +1,R4

R4
#6,R4
R4 ,$0MODE

SOFILL,R4

12(SP) RS

:sSET FOR SIX(6) DIGITS
;3SET THE ITERATION COUNT
:SAVE R3

::SAVE RS

:GET THE NUMBER OF DIGITS TO TYPE

;;SUBTRACT IT FOR MAX. ALLOWED
::SAVE

IT FOR USE

ssGET THE ZERO FILL SWITCH
sPICKUP THE

INPUT NUMBER

ssCLEAR THE OUTPUT WORD

2%:

ROL
ROL
ROL
MOV
ROL

::FORM THIS DIGIT

4%:

5%:

)

78:

#1,80FILL
#6,$0MODE
+1

:sROTATE MSB INTO ''C''

P
T
I
e
N
B

3182

: sADJUST RETURN ADDRESS

ROL

6%:

000002

SEQUENCE 98

1%:

3%:

000060
000040
016330
016330
016332

CLR

H 8
PAGE 76-2

#2,(SP)
$TYPON

000004

8%:
$OCNT:
$OFILL:
:
$OMODE

;.60 DO MSB

DECB
BPL
BIC
BNE
TST
BEQ
INC
BIS
BIS
MOvVB

;3GET LSB OF THIS DIGIT

BGT
BLT

.BYTE
.BYTE
.WORD

;sGEY RID OF JUNK

::TEST FOR 0

; SUPPRESS THIS 0?
;:BR IF YES
;sDON'T SUPPRESS ANYMCRE 0°'S
;sMAKE THIS DIGIT ASCII
IF

NOT ALREADY

;:G0 TYPE THIS DIGIT

TYPE

MOV
MOV
MOV
MOV
MOV
RTI

THIS DIGIT?

;:BR

;SAVE FOR TYPING

DECB

INC
BR

;s TYPE

ssMAKE ASCII

(SP)+,RS
(SP)+ R4

(SP)+,R3
2(SP) ,4(SP)
(SP)+,(SP)

[=lelelele

CIDLDFO DLi1-W/1144 MFM SLU

;sCOUNT BY 1
::;BR IF MORE TO DO
::BR IF DONE
;s INSURE LAST DIGIT ISN'T A BLANK
;:G0 DO THE LAST DIGIT
;sRESTORE RS
;sRESTORE R4

:sRESTORE R3
;3SET THE STACK FOR RETURNING
;;RETURN
;:STORAGE FOR ASCII DIGITY
;:TERMINATOR FCR TYPE ROUTINE
;sOCTAL DIGIT COUNTER
:sIERO FILL SWITCH
; sNUMBER OF DIGITS TO TYPE

1_8
MACRO M1113 05-NOv-80 12:32 PAGE 77 SEQUENCE 99
CZDLDFO DLIT1-W/1144 MFM SLU
BINARY TO OCTAL (ASCID) AND TYPE
318 4
.SBTTL
TTY INPUT ROUTINE
3185

;'"Q."Q."'.'!"'Q"""""'"'Q"Q""'Q"Q"'Q"'Q"'""Q"

"ENABL

LSB

::tlt"".'.'.""""""""""'"""'.'"Q"""t"""'t"'

;*SOFTWARE SWITCH REGISTER CHANGE ROUTINE.

;*ROUTINE IS ENTERED FROM THE TRAP HANDLER, AND WILL

;*SERVICE THE TEST FOR CHANGE IN SOFTWARE SWITCH REGISTER TRAP (ALL
; *WHEN OPERATING IN TTY FLAG MODE.

$CKSWR: CMP

BNE
1ST8
BPL

162472
162466
177600

MOVB

BIC
CMP
BNE
(MPB
BEQ

000007

001034

000001

017063
017070
000176

$GTSWR:

017101

19%:

7%:

162410
162404
177600

9%:

017056
000006

208:

000015

10%:

162306

oS —

000100

-d

000001

000060
000002

006316

162330

000002
000006
001063
001035

000004

000067

CLR
1ST8
BPL

MOVB

000025

015770
000060

TYPE
TYPE
MOV
TYPOC
TYPE
CLR

15%:
16%:

BIC
CMP
BNE

#SWREG,
SWR

15%
asTKS
15%
as$TKB,=(SP)

#1
SAUTOB,
15%

L$CNTLG
"$MSWR

SWREG,=(SP)

LSMNEW

<(SP)
-(SP)

asTKS
7%
3$TKB, - (SP)

#1772, (5P)

(SP) ,#25

; ;BRANCH IF YES

:sECHO THE CONTROL-G (*G)
;s TYPE CURRENT CONTENTS

:sSAVE SWREG FOR TYPEOUT
::G0 TYPE=-=OCTAL ASCIICALL DIGITS)
: :PROMPT FOR NEW SWR

;sCLEAR COUNTER
;:THE NEW SWR

:;CHAR THERE?

;s
1F NOT TRY AGAIN

;:PICK UP CHAR

JsMAKE IT 7-BIT ASCil

;318 IT A CONTROL-U?

: ;BRANCH [F NOT

2218 IT A <CR»?
; sBRANCH IF NO

::YES, IS IT THE FIRST CHAR?
: sBRANCH IF

#100,387KS
PC,$TYPEC

(SP),#60

BLT

18%

BGT
BIC

18%
#60,(SP)+

BEC

ASL
ASL
ASL

::1S IT A CONTROL G?

:sYES, ECHO CONTROL=-U (*U)
: : IGNORE PREVIOUS INPUT
::LET'S TRY IT AGAIN

MOV
ADD
TYPE

TST

:21F NO, DON'T WAIT AROUND

::NO, RETURN TO USER
::ARE WE RUNNING IN AUTO-MODE?

#7,(SP)+
15%

BR
CMP
BNE
TST
BEQ

CMP

:;BRANCH IF NO

::CHAR THERE?

::SAVE THE CHAR
::STRIP=-0FF THE ASCII

TYPE
ADD

CMPB
BNE
MOV
RTI
JSR
CMP

::1S THE SOFT=-SWR SELECTED?

#C177,(SP)

(SP) ,#67

2(SP)
(
(
(

042716

001040

VOO

100071
117746

000176

NV
N

022737
001074
105777

YES

;sSAVE NEW SWR
;sCLEAR UP STACK
::ECHO <CR> AND <LF>
::RE-ENABLE TTY KBD INTERRUPTS?
; ;BRANCH IF NOT
:;RE-ENABLE TTY KBD INTERRUPTS
:;RETURN

;sECHO CHAR
::CHAR < 0?
: sBRANCH IF YES

::CHAR > 7?

:;BRANCH IF YES

:iSTRIP=-OFF ASCII
::1S THIS THE FIRST CHAR
: ;BRANCH IF YES

:iNO, SHIFT PRESENT
CHAR OVER TO MAKE
23
32

ROOM FOR NEW ONE.

Li1=W/1144 MFM SLy
ROUT INE

005266
056616
000707
1044M

000720

MACRO M1113

000002
177776

17%:

001062

18%:

05-NOV-80 12:32

.DSABL
A

INC
BIS
BR
TYPE
BR
LSB

J_8

PAGE 77-1

2(SP)
=2(SP), (SP)

7%
$QUES

208

SEQUENCE 100

ssKEEP COUNT OF (HAR
::SET IN NEW CHAR
;:GET THE NEXT ONE
::TYPE 2<CR><LF>
:sSIMULATE CONTROL=U

A2 AR
R
R
R R
RS
RRRRRRRd )

;*THIS ROUTINE WILL INPUT A SINGLE CHARACTER FROM THE TTY

s*CALL:
. *
*

000004

000002

162204
177600

000004
000004
000023

162210

00C004

162156

$RDCHR: MOV
is:

2%:

162152
177600

042766
000002

MOV

1ST8B
BPL

000004

000140

000004

000175

000040

000004

3%:

4%:

(SP),=(SP)
4(SP),2(SP)
asTKS
1%

MOVB

as$TKB,4(SP)

1ST8

asTKS
2%
a$TKB,=(SP)

BIC
CMP
BNE
BPL

MOvB

000021

016706
016710
016716
016720
016726
016730
016736

RDCHR
RETURN HERE

BIC
CMP
BNE
BR

CMP

BLT
CMP
BGT
BIC
RTI

#AC1?7> ,4(5P)
g;sp).czi

#°C177,(SP)
(SP)+,#21
2%

1%
4(SP),#140
43
4(SP), 175
43
#40,4(SP)

;s INPUT A SINGLE CHARACTER FROM THE TTY
: sCHARACTER IS ON THE STACK
;:WITH PARITY BIT STRIPPED OFF
;sPUSH DOWN THE PC
;:SAVE THE PS

::WAIT FOR

;A CHARACTER

;sREAD THE TTY
::GET RID OF JUNK IF ANY
2318 IT A CONTROL=-S?
;;BRANCH IF NO

::WAIT FOR A CHARACTER

;sLOOP UNTIL ITS THERE
::GET CHARACTER
::MAKE IT 7=-BIT ASCII
;31S IT A CONTROL=-Q?
ssIF NOT DISCARD IT
;sYES, RESUME
::1S 1T UPPER CASE?
:;BRANCH IF YES
;318 IT A SPECIAL CHAR?
:sBRANCH IF YES
ssMAKE

IT UPPER CASE

::G0 BACK TO USER

22222222220
RRRRRRRRRRRRR R
R RRRRRRRRRRRRRRRRRRRRRRRR D)

:*THIS ROUTINE WILL INPUT A STRING FROM THE TTY
s*CALL:

RDLIN

RETURN HERE

—

el od

—h

PoEPSNSRS

017046
017056

$SRDLIN: MOV
1%:
MOV
2%:
CMP
BLOS

RDCHR

000177

108:

MOVB
CMPB

001062

4%:

TYPE

017044
017044
000015

3%:

177777

001064

BNE

MOVB
TYPE

CMPRB
BNE
CLRB
TYPE

R3,-(SP)
#S$TTYIN,RDY
#STTYIN+8.
,R3
4%

(SP)+,(R3)
#177,(RY)

$QUES

(R3),9%
.9%

#15,(R3)+
2%
=1(RY)
JOLF

;s INPUT A STRING FROM THE TTY
;sADDRESS OF FIRST CHARACTER WILL BE ON THE STACK
;s TERMINATOR WILL BE A BYTE OF ALL 0'S
:sSAVE R3

:3GET ADDRESS
;sBUFFER FULL?
;:BR IF YES
;G0 READ ONE CHARACTER FROM THE TTY
::GET CHARACTER
::1S IT A RUBOUT
;sSKIP IF NOT
ssTYPE A '?°

ssCLEAR THE BUFFER AND LOOP
ssECHO THE CHARACTER

;s CHECK FOR RETURN
::LOOP IF NOT RETURN

:sCLEAR RETURN (THE 15)

::TYPE A LINE FEED

'C%eLDGO DLI1=W/1144 MFM SLU
1

MACRO M1113

INPUT ROUTINE

017024
017026

011646
016666

017044
017045
017046
017056
017063
017070

000
000

017034
017042

017101

017022

012766
000002

136
136
015

040

012603

000004

017046

05-NOV-80 12:32
MOV
MOV

000002

000004

125
107
012

040

015
015
123
116

SMNEW:

(SP) ,=(SP)
4(SP),2(SP)

MOV
RTI

#STTYIN,L(SP)

.ASCIZ

.BYTE
BYTE
$TTYIN: .BLKB
SCNTLU: .ASCIZ
SCNTLG: .ASCIZ
SMSWR: LASCIZ
9%:

K_8

PAGE 77-2

Mov

SEQUENCE 101
::ADJUST THE STACK AND PUT ADDRESS OF THE
33
FIRST ASCII CHARACTER ON IT

: ;RETURN
:sSTORAGE FOR ASCII CHAR. TO TYPE
0
:;TERMINATOR
0
:;RESERVE 8 BYTES FOR TTY INPUT
8.
/7*U/<15><12>
;;CONTROL 'V
/*G/<15<12>
::;CONTROL ''6''
<15><12>/SWR = /
NEW =/

(SP)+,R3

; ;RESTORE R3

CIDLDFO
TTY

DLI1=W/1144 MFM SLU

INPUT ROUTINE

MACRO M1113 05-NOV-80 12:32 PAGE 58 SEQUENCE 102

3188
3189
3190

.SBTTL

TRAP DECODER

'tQ"QttQQ""""Q"""""'.QQ."Q'QQQ'Q""QQ"'Q""QQQ"'

S#THIS ROUTINE WilL PICKUP THE LOWER BYTE OF THE '‘TRAP'' INSTRUCTION

“«AND USE IT TO INDEX THROUGH THE TRAP TABLE FOR THE STARTING ADDRESS

:+OF THE DESIRED ROUTINE. THEN USING THE ADDRESS OBTAINED IT WILL

017112

010046

017120
017122
017124
017126

005740
111000
006300
016000

«GO TO THAT ROUTINE.

$TRAP:

017114 016600 000002

017132

017134
017136
017144

000200

011646
016666
000002

017146

MOV

RO,=(SP)

::SAVE RO

ST
MOVB
ASL
MOV

-(RO)
(RO),RO
RO
$TRPAD(RO) RO

: :BACKUP BY 2
S:GET RIGHT BYTE OF TRAP
::POSITION FOR INDEXING
;:INDEX TO TABLE
160 TO ROUTINE

MOV

RTS

2($P) RO

::GET TRAP ADDRESS

::THIS 1S USE TO HANDLE THE "'GETPRI'' MACRO

000004

000002

$TRAP2: MOV
MOV
RTI
.SBTTL

(SP),=(SP)
4(SP),2(SP)

TRAP TABLE

::MOVE THE PC DOWN
::MOVE THE PSW DOWN
:RESTORE THE PSW

:«THIS TABLE CONTAINS THE STARTING ADDRESSES OF THE ROUTINES CALLED
:*BY THE ''TRAP'' INSTRU/CTION.
ROUT INE
;

017146

319

017150
017152
017154
017156
017160
017162
017164
017166

017134

015556
016134
016110
016150
016406
016336
016620
016740

$TRPAD: .WORD

S$TYPE
$TYPOC
$TYPOS
$TYPON
$GTSWR
$CKSWR
$RDCHR
$RDLIN

STRAP2

::CALL=TYPE
;;CALL=TYPOC
;;CALL=TYPOS
;;CALL=TYPON
::CALL=GTSWR
;;CALL=CKSWR
; ; CALL=RDCHR
;;CALL=RDLIN

TRAP+1(104401)
TRAP+2(104402)
TRAP+3(104403)
TRAP+4(104404)
TRAP+5(104405)
TRAP+6(104406)
TRAP+7(104407)
TRAP+10(104410)

TTY TYPEOUT ROUTINE
TYPE OCTAL NUMBER (WITH LEADING ZEROS)
TYPE OCTAL NUMBER (NO LEADING ZEROS)
TYPE OCTAL NUMBER (AS PER LAST (ALL)
GET SOFT=-SWR SETTING
TEST FOR CHANGE IN SOFT-SWR
TTY TYPEIN CHARACTER ROUTINE
TTY TYPEIN STRING ROUTINE

MACRO M1113

LN AN N N N N AN N N NN is

—

LDFO D LiT=w/1144 MFM SLU
TEST

193

05-NOV-80 12:32
LSBTTL

19‘

;*AT THE CONSOLE

197
198

;*THE TEST IS HALTED BY TYPING A CONTROL=C
;«TEST CAN BE RESTARTED AFTER MALTING BY JUST CONTINUING

';t"'Q'Qt"t't""t"""t""QQ".'QQ.tt"'t"tt't"""'t""t

199

201 017170
202 017172
203 017200
3204 017204
3205 017206
3206 017214
3207 017220
3208 017222
3209 017226
3210 017230
3211 017232

000005
112777
105777
100375
117777
017700
100023
052701
030100
001403
004737

3213 017240

006301

217 017252

017353

3214 017242
3215 017244
3216 017246

218 017254

3219 017256
gzgo 017360
221 017262

017342

030100
001403
004737

ECHO:
000052
163450

163462

163444
163436

163446

030100
001403
004737

017365

3224 017274
3225 017300
3226 017302

022700
001337
004737

017314

3%:
017314

3228 017310
3229 017312

000000
000726

4s:
017314

5%:

3223 017270 042700 000200

gggg

3232 017314
3233 017316
3234 017322

3235 017326
32%6 017330

3237 017334

017400

013600
062746
105777
100375
112077

105710

3238 017336
ggzg 017340

001371
000207

3241 017342
3242 017353
3243 017365
3244 017400

015
015
015
015

28:

010000

006301

3222 017266

3227 017306

ECHO TEST

:*THIS ROUTINE WILL ECHO ANY CHARACTER TYPED

196

3212 017236

SEQUENCE 103

:;tQQ't..t't""'t"t"0'0""'"'Q"t't't't.'tt'."."""'tQ'QQ

195

200 017170

PAGE 79

000003

017314

BPL
MOVB
MOV
BPL
B1S
BIT
BEQ
JSR
MPAR

ASL

BIT
BEQ
JSR

MFR

ASL

BIT
BEQ
JSR

MOR

MSG:
WAIT:

163326

MPAR:
MFR:
MOR:
MSTOP:

2%
SCRBUF ,aCTBUF
aCRBUF ,RO
5%
#BIT12,R1
R1,RO
3%
PC,MSG

R1,RO
48
PC,MSG

:CLEAR EVERYTHING
:TRANSMIT PROMPT ‘'«''
:WAIT FOR INPUT

;ECHO INPUT
;STORE INPUT
:BR IF "'ERROR''NOT SET
:SET PARITY ERROR TEST MASK
;:CHECK FOR PARITY ERROR FLAG
:BR IF NOT SET
:REPORT PARITY ERROR

:SHIFT MASK TO TEST "'FR'' FLAG

;TEST FOR FRAMING ERROR FLAG
:BR IF NOT SET
:REPSORT FRAMING ERROR

:SHIFT MASK TO TEST "‘OR'' FLAG

R1,RO
S$
PC,MSG

:TEST FOR OVERFLOW ERROR
:BR IF NOT SET
:REPORT OVERFLOW ERROR

#3,.R0
2%
PC,MSG

#B81T7,R0

:CLEAR ANY PARITY BIT

HALT
BR

ECHO

:END OF TEST MALT
:AFTER END OF TEST HALT

MOV
ADD
TSTB

a(SP)+,RO
#2,-(SP)
CTCSR

:PICK UP MESSAGE POINTER
:ADJUST RETURN PC
:WAIT FOR XMIT DONE

(RO)

:SEND CHARACTER
;1S THIS END OF MESSAGE?

BPL
MOVB

TSTB

120
106
117
123

#'+« 3CTBUF
aCRCSR

CMP
BNE
JSR

BIC

MSTOP

000002
163332

012
012
012
012

RESET
MOVB
1ST8

WALT
(RO) +,aCTBUF

:WAS INPUT CONTROL=-C
:BR IF NOT
:REPORT PROGRAM STOP

PRESS CONTINUE TO RESTART ECHO TEST

:BR IF NOT
:RETURN

BNE
RTS

WAIT
PC

.ASCIZ
JASCIZ
LASCIZ
.ASCIZ

<CR><LF>/PARITY/
<CR><LF>/FRAMING/
<CR><LF>/OVERFLOW/
<CR><LF>/STOP/

—

|CIDLDFO DLi1=w/1144 MFM SLU
ECHO TEST

MACRO M1113

05-NOvV-80 12:32

PAGE 80

SEQUENCE 104

.EVEN

.SBTTL

TERMINAL OUTPUT TEST

.""""'.Q'Q""""""'Q""""""."."'.'."""t".'QQ

;*THIS ROUTINE WILL OUTPUT ALL WRITABLE CHARACTERS FOR THE

;*THE OCTAL CODE 040 -=> 377

:#32 CHARACTERS ARE PRINTED ON EACH LINE

'THE PATTERN IS REPEATED EVERY THREE LINES

3277 017464

3¢78 017470
3279 017472

—

—O==00

3
W =

NO
N&N

O = =
WO
O

3260 017410
3261 017414
3262 017420
3263 017424
3264 0174%6
3265 017432
3266 017434
3267 017436
3268 017440
.
3269
3270 017444
3271 017446
3272 017452
3273 017454
3274 017460
3275 017462
3276

wvironN
88832
8°.a_n
N =2 N NNSN
~NW
&
CDSE‘%
W~
NWVINO
-5
NW
NO g3 'Q'i*dSBCD

".Q"Q'Q.'Q."'t""""""Q""."'Q'.Q'.'Q"'Q.."Q'.'t'tt"'

000040
000040
163234

2%:

#40,R0
ggTCSR

;LOAD FIRST WRITABLE CHARACTER
;LOAD CHAR COUNT PER LINE
;WAIT FOR DONE

R1,aCTBUF
R1
RO
2%
PC,MSG

sTRANSMIT A CHARACTER
; INCREMENT CHARACTER CODE
;DECREMENT CHAR COUNT
;BR IF LINE NOT COMPLETE
;SSUE CR,LINE FEED

aCRCSR
3%

sANY CHARACTER RECEIVED?
:BR IF YES

BNE
BR

OQUTTST
1%

.BR IF YES
;IF NOT WRITE NEXT LINE

CLR

aCRBUF

sCLEAR RECEIVER

ouTTSY

sRESTART TEST IF CONTINUED

MOV
;3:8
MOV
INCB
DEC
BNE
JSR

163230

017314

SCRLF

1STB
BMI

163202

BIT

000200

163166

#40,R1

OngSY MOV

3%:

HALT

#B177,R1

;FINISHED ONE PASS OF WRITABLE CHARACTERS?

;STOP TEST

—

———

CIDOLDFO DLi1=W/1144 MFM SLU
3%85 017544
3286 017611
3287 017633
3288 017670
3289 017714
3290 017740
3291 017763
3292 020026
3293 020057
3294 020112
3295 020153
3296 020216
3297 020247
3298 020302
3299 020343
3300 020406
3301 020443
3302 020474
3303 020527
3304 020570
3305 020633
3306 020672
3307 020723
3308 020756
3309 021024
3310 021066
3311 021124
3312 021154
3313 021206
3514 021246
3315 021274
3316 021334
3317 021366
3318 021417
3319 021453
3320 021510
3321 021510
3322 021544
3323 0215

3324 021621

3325 021676
3326 021722

3327 021760
3328 022016

3329 022060
3330 022060
3331 022107
3332 022133
3333 022200
3334 022224

3335 022250
3336 022316
3337 022354

/RTC INTERRUPT DID NOT OCCUR/
/RTC DOUBLE INTERRUPT/
/RESET DID NOT INTERRUPT/

EM53:
EMS4:

.ASCIZ
ASCIZ

/CLOCK REPEATABILITY/
/XMIT INTERRUPTS WHEN DISABLED/

EMS57:

.ASCIZ

122
122
122

124
124
105

103
103
123

EM3:
EM&:
EMS:
EM6:
EM7:
EM10:
EM1:
EM12:
EM13:
EM14:
EM15:
EM16:
EM17:
EM20:
EM21:
EM22:
EM23:
EM24:
EM25:
EM26:
EM27:
FM30:
EM31:
EM32:
EM33:
EM34:
EM35:
EM36:
EM37:
EM4O:
EM4I:
EM&2:
EM43:
EM44:
EM45:
EM4T:
EM46:
EMS0:
EM51:

103
130

114
115

117
111

115

111

115
115
117
103
103

111
111
101
126
126

130
130
130
114
122
122

122
122
122

—

.ASCIZ
.ASCIZ
.ASCIZ

116
116

130

/CAN NOT ACCESS TCSR/
/CAN NOT ACCESS TBUF/

101
101

122

LASCIZ
LASCIZ

EMI1:
EM2:

103
103

124
124
124
103
103
103
102
103
103
122
102
103
103
122
102
130
103
103
122
102
122
103
103
103
102
114
103
103
122
104
102
103
102
122
122

——

MACRO M1113 05-NOV-80 12:32 PAGE 31 SEQUENCE 105

TERMINAL OUTPUT TEST

3281
3282
3283 017474
3284 017520

—

103
103
103
101
101
101
11
101
101
105
m
101
101
105
1M1
115
101
101
105
m
103
101
101
101
m
113
101
101
105
125
11
101
m
124
124

124

115

103
105
104

123
123
123
116
116
116
126
116
116
123
124
116
116
123
124
111
116
116
123
126
126
116
116
116
124
123
116
116
123
101
124
116
124
103
103

103
111

126
123
122

EMS2:
EMS6:

EM55:
EM60:

EM61:
EM62:
EM63:
EM64:
EM6S:
EM66:
EM67:

.ASCIZ
.ASCIZ
.ASCIZ
ASCIZ
ASCIZ
.ASCIZ
ASCIZ
ASCIZ
ASCIZ
ASCIZ
ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
ASCIZ
ASCIZ
.ASCIZ
ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
ASCIZ
ASCIZ
ASCIZ
ASCIZ
ASCIZ
ASCIZ
.ASCIZ
.ASCIZ
ASCIZ
ASCIZ
.ASCIZ
ASCIZ
. ASCIZ
.ASCIZ

.ASCIZ
.ASCIZ

.ASCIZ
.ASCIZ
ASCIZ
ASCIZ
ASCIZ

ASCIZ
.ASCIZ
.ASCIZ

/TCSR DONE NOT CLEARED WITH TBUF FULL/
/TCSR DONE NOT SET/
/TCSR DONE NOT SET WITH RESET/
/CAN NOT ACCESS RCSR/
/CAN NOT ACCESS RBUF/
/CAN NOT ACCESS LKS/
/BITO OF TCSR NOT CLEAR AFTER RESET/
/CAN NOT SET BITO OF TCSR/
/CAN NOT CLEAR BITO OF TCSR/
/RESCT DID NOT CLEAR BITO OF TCSR/
/BIT2 OF TCSR NOT CLEAR AFTER RESET/
/CAN NOT SET BIT2 OF TCSR/
/CAN NOT CLEAR BIT2 OF TCSR/
/RESET DID NOT CLEAR BIT2 OF TCSR/
/BIT6 OF TCSR NOT CLEAR AFTER RESET/
/XMIT INTERRUPT AT PRIORITY 7/
/CAN NOT SET BIT6 OF TCSR/
/CAN NOT CLEAR BITé OF TCSR/
/RESET DID NOT CLEAR BITé OF TCSR/
/BIT6 OF RCSR NOT CLEAR AFTER RESET/
/RCVR INTERRUPT WITH PRIORITY 7/
/CAN NOT SET BITé OF RCSR/
/CAN NOT CLEAR BITé OF RCSR/
/CAN NOT CLEAR BIT6 OF RCSR WITH RESET/
/BITé OF LKS NOT CLEAR AFTER RESET/
/LKS INTERRUPT WITH PRIORITY 7/
/CAN NOT SET BITé OF LKS/
/CAN NOT CLEAR BIT6é OF LKS/
/RESET DID NOT CLEAR BITé OF LKS/
/DUAL ADDRESSING ERROR/
/BIT6 OF LKS NOT SET AFTER RESET/
/CAN_NOT CLEAR BIT7 OF LKS/
/BIT7 OF LKS DOES NOT SET/
/RTC INTERRUPT AT PRIORITY 7/
/RTC INTERRUPTS WHEN DISABLED/

/RTC INTERRUPT DID NOT CLEAR WITH BIT7 OF LKS/
/XMIT INTERRUPTS AT PRIORITY 7/

/XMIT INTERRUPTS WITH ENABLE CLEAR/
/XWIT DID NOT INTERRUPT/
/XWIT RE-INTERRUPTED/
/LOADING TBUF DID NOT CLEAR INTERRUPT/
/RCVR ACTIVE NOT SET/
/RCVR DONE NEVER SET/

/RCVR ACTIVE NOT CLEARED WITH DONE SET/
/RESET DID NOT CLEAR RCVR DONc/
/RDR ENABLE DID NOT CLEAR RCVR DONE/

s Bt B0 Bt D0 B0 B0 b B—t B0 b0 bt B8 b0 s Bd P D0 o

sb b

NNNN
PNANNANNNNNNNNNNNNNNNN
NNNNNNNNN

/TEST#
/TESTH#
/TEST#
/TEST®
/TEST#
/TEST#

B 3my Gy ed Bt bt Beend b—

> > > >

Lnunnm

wuuvmumummummumumuomummumumoumom

D e

D) D

D e

D o

e e

e e e

e e

NNV STONO = =NOONINNONIN
DNNNO
VOO =S WWVMINSVVINDNDW
=000 OONON—

— e

d e e

D e

D D

NNV
WWWWNWWWIWNWWNW

—_

(W LW AV LN AN AN AV AV LV AV AV, )

/RCVR DID NOT INTERRUPT/
/RCVR RE~INTERRUPTED/

/RCVR INTERRUPTS AT PRIORITY 7/

/RCVR INT RQST PASSED WITH ENABLE CLEAR/

/READING RBUF DID NOT CLEAR INTERRUPT/
/RESET DID NOT CLEAR RCVR INTERRUPT/
/'0OR' FLAG DID NOT SET/
/'ERROR' NOT SET WITH "OR' FLAG/
/BREAK DID NOT XMIT ALL ZEROES/
/BREAK DID NOT SET 'FR' ERROR/
/DATA COMPARE ERROR/
/LOOP=BACK DATA COMPARE ERROR/
/TIMEOUT IN EXERCISER TEST/
/INCORRECT RECEIVE COUNT/
/DATA COMPARE ERROR IN EXERCISER/
/TRAP CATCHER/

/NO CLK INTERRUPT IN EXERCISER/

/''ERROR'' NOT SET WITH "'FR'" FLAG/

/RCV ACTIVE NOT CLEAR WITH INIT/

/RCV ACTIVE WITHOUT ‘'START'' BIT/

/RDR ENABLE NOT CLEAR WITH RCV ACTIVE/

/TEST#

/TEST#
/TEST#

ERROR¥
ERR PC
ERR PC
ERR PC
ERR PC
ERR PC

TCSR/
TBUF/
RCSR/
KBUF/
LKS/
GOOD

BAD/

ERR PC

RCSR

DATA/

ERR PC

ERR PC
ERR PC

LKS

RCSR

o
o
e
e
e
o
e
e

CNT1

CNT2/

GOO0D

BAD/

TRANS
OLDPC

RCSR
RCSR

RCV/
TRAP ADR/

<CR><LF>/CZDLDFO DL11-W, 1144 MFM SLU/

onN

/READING RBUF DID NOT CLEAR RCVR DONE/
/RCVR INTERRUPTS WITH ENABLE CLEAR/

oooooorOrOFOFOMONONOM

o
(%]

WNWWWwWW
NWWWVINN
SO = N=NINWVNWVWVIWWNW

—_— > b
OO00O0
— D D D D D D D D D D D D D D D D D D
COO0O=NO===DONNO 20000
P

eT T

=lelelelelelelelal=l]
pure

.AS

SEQUENCE 106

$TESTN,SERRPC, TCSR,0
STESTN.SERRPC
. TBUF .0
STESTN.SERRPC .RCSR. o
$TESTN.SERRPC.RBUF .0

~ -

(==

.AS
.AS

c 9
PAGE 81-1

o
e
D e
e
d e
e

024560
024574
024610

015

—

HW
SN

V1V]

=00
WN

uuuwg
V0O

[« ]-]
NN
P o

SEEES

AN N AN N N NN NN

3370 024126
3371 024163
3372 024227
3373 024273
3374
3375 024344
3376
3377 024402
3378 024404
3379
3380
3381 024434
3382 024444
3383 024454
3384 024464
385 024474
024504
024516

elelelelelelelalelele]

3369 024061

e D e i D e e D D e
NNV
S SSDDSS

3338 022417
3339 022464
3340 022526
3341 022564
3342 022633
3343 022633
3344 022662
3345 022706
3346 022753
3347 023016
3348 023044
3349 023103
3350 023141
3351 023176
3352 023221
3353 023256
3354 023310
3355 023340
3356 023400
3357 023415
3358 023453
3356 023512
3360 023551
3361 023610
3362
3363 023655
3364 023702
3365 023727
3366 023754
3367 024001
3368 024025

e e (D) e e e
e e e d B DD D D d
i e e D
DNV
=2NNO =N =000
SN
NN
NONNNNONES S =SS NONNNNINNON
NN

TERMINAL OUTPUT TEST

05-NOV-R0 12:32

> > >» > >
eI IIPEIBBB>> VLunn;m

'CZDLDFO DLi1-W/1144 MFM SLU

MACRO M1113

DEVICES UNDER TEST

STESTN. SERRPC.LKS,0

$TESTN. SERRPC .SGDADR, $BDADR, 0
$TESTN.SERRPC .LKS,FIRST,SECND,0
STESTN.SERRPC .RCSR, $BDDAT,0
STESTN. SERRPC .RCSR.$GDDAT. SBDDAT, o
;0
STESTN.SERRPC .RCSR.XMTCNT ,RCVCNT

$TESTN.SERRPC .RCSR.OLDPC,BDVECT,0
0

“END ADDRESS FOR CHECKSUM AND SAVE AREA
*0F WRAP AROUND CONSOLE TEST

CIDLDFO DLi1-W/1144 MFM SLU

'TERMINAL OUTPUT TEST

3394
3395

000001

MACRO M1113

05-NOV-80 12:32

.END

D 9
PAGE 81-2

SEQUENCE 107

AMADR1= 000000
AMADR2= 000000
AMADR3= 000000
AMADR4= 000000
AMAMS1= 000000
AMAMS2= 000000
AMAMS3= 000000
AMAMS4= 000000
AMSGAD= 000000
AMSGLG= 000000
AMSGTY= 000000
AMTYP1= 000000
AMTYP2= 000000
AMTYP3= 000000
AMTYP4= 000000
APASS = 000000
APRIOR= 000000
APTCSU= 000040
APTENV= 000001
APTS1Z= 000200
APTSPO= 000100

APTSZD 003636
ASWREG= 000000
ATESTN= 000000
AUNIT = 000000
AUSWR = 000400
AVECT1= 000300
AVECT2= 000000
BOVECT 002622
003774
BEGIN

100000
000004
000010
000020
000040
000100
000200
000400
001000
000003
000014
002454
014412
013706
104406

024163

EM27
EM3
EM30
EM31
EM32
EM33
EM34
EM35
EM36
EM37
EM&
EM4O
EM41
EM42
EM43
EM4s
EM4S
EM46
EM4L7
EM5
EM50
EM51
EM52
EM53
EM54
EMS55
EM56
EMS7
EM6
EM60
EM61
EM62
EM63
EM64
EM65
EM66
EM67
EM?7
EM70
EM71
EM72
EM73
EM74
EM75
EM76
EM77
ENDADD=
ENDADR
ENDB7
ENDEV
ENDMG
ENDSTK
ERROR =
ERRVEC=
FIRST
FLAG&L4
GETB

633

000004
002336
003002
014024

GETLIN

024227
DH110
DH112
024273
DH2
023702
024025
DH40
DHS3
024061
023727
DH6
023754
DH7
DISPLA 001042
DISPRE 000174
DSWR = 177570
024434
DT
024474
DT10
024532
DT103
DT105
024544
024560
DT110
024574
DT112
024444
DT2
DT40
024504
024516
DT53
DT6
024454
D17
024464
003664
DVADT
017170
ECHO
EMTVEC= 000030
017474
EMI
017740
EM10
022753
EM100
023016
EM101
EM102
023044
023103
EM103
023141
EM104
023176
EM105
023221
EM106
023256
EM107
017763
EM11
023310
EM110
023340
EM111
023400
EM112
023415
EM113
023453
EM114
EM115
023512
023551
EM116
023610
EM117
020026
EM12
020057
EM13
020112
EM14
020153
EM15
020216
EM16
020247
EM17
017520
EM2
020302
EM20
020343
EM21
020406
EM22
020443
EM23
020474
EM24
020527
EM25
020570
EM26

NN = b
e ek d 2 O OO [elelelele] oo
VIS
W =O
Voo~ O NS 4
VIS

—

— -y

O O O

0 bt

] e

Pt
P

] oy
] e

bt D0 Pt P

e
] e
]
]
]

e bt Pt bt bt b

e o
e

000000
000000
000000
000000
C00000
000000
000000
000000
000000
004132
002702
000000

000000
000000

) o

ADDW15=
ADDW2 =
ADDW3 =
ADDW4 =
ADDWS =
ADDW6 =
ADDW7 =
ADDW8 =
ADDW9 =
ADEVCT=
ADEVM =
ADR
ADRTBL
AENV

bt bt bt bt bt

ADDW14= 000000

BITO

0D 0 €D 0D G T €D O O 0D CO T 0D €O T CO D T

ADDW11= 000000
ADDW12= 000000
ADDW13= 000000

BGNADD

SEQUENCE 108

003014
000001
000001
000002
000004
000010
000020
000040
000100
000200
000400
001000
000002
002000
004000
010000
020000
040000

176500
000000
000000
000000
000000
000000
000000

E 9
PAGE 81-3

'ABASE =
ACDW1 =
ACDW2 =
ACPUOP=
ADDWO =
ADDW1 =
ADDW10=

[SYMBOL TABLE

05-NOV-80 12:32

MACRO M1113

e Lo Lo e - et
= OO0O0O0DO00 [elelolelelelelelelelelelelelelelelelelelelelelelelelelelelelolelelelelele
ST NP SN NN LS LN o D el
=P LSLST
OO —=—=0OMNNN MNONIMNINLNININ = NN NFTLNLNLNLMNL =N
OOONO
N LN N N N e
N N L
S
A L L
e
PSP
O O O O
a8 LS L
w VIOV
S S WWWWNONONN)
= = OO NNONWY
= = OO
O W—-00nONN OONWVWNON S S NWWWHWNONOIN)
N &~
NSNS W= O NN S = Owvnhornowvifng
NN
= = N=NNOWOONN—
O = b NN = = O N
o S NOOWNO OO0
O P e VL NP
NSO OSTOWNOOO
OSSO
OOO NNDWSOWS

'CIDLDFO DL1-W/1144 MFM SLU

002566
000000
000040
00010C
000140
000200
000240
000300
000340
177776
177776

013726
000024
002636
176502
002634
176500
013512
002440
010244
104407
104410
014134
000010
002646
014370
002700
002676
0026«4

'CZDLDFO DLi1-W/1144 MFM SLU

'SYMBOL TABLE

MACRO M1113

05-NOV-80 12:32

PAGE 81-4

SEQUENCE 109

Ré
=%000006
|R7
=%000007
I SAVEPS 002434
[SAVETE 014100

TCSR
002640
TCSR58= 176504

1817
TURBUF

005012
003006

$ERMAX
SERROR

001015
014436

$PASS
$PASTM

001074
000506

| SAVLOC 002346
SCOPE = 000004
SCPSW
002452
SECND
002616
SETADR 004100
SHIFT
003740
003512
SIZE
SRPSW
002450
STACK = 001100
003046
START
STKLMT= 177774
STPSW
002446
SWR
001040
SWREG
000176
sSWw0
= 000001
SW00 = 000001
SWw01 = 000002
sSw02 = 000004
sSw03 = 000010
Sw04 = 000020
SWw05 = 000040
Sw0é = 000100
Sw07 = 000200
Sw08 = 000400
Sw09 = 001000
sWw1
= 000002
sWw10 = 002000
SW11 = 004000
swi2 = 010000
SWw13 = 020000
sSWwi4 = 040000
sWw15 = 100000
= 000004
sw2
= 000010
sw3

TMP2
002620
TMP3
002632
TOLER
007240
TPSW
002652
TPVEC = 000064
TRAPVE= 000034
TRTVEC= 000014
TSTDEV 004050
TSTDVM 003646
004172
ST
TST10
005044
TST11
005252
TST12
005404
TST13
005544
TST14
005614
005764
TST15
G06154
TST16
006262
TST17
004244
TST2
TST20
006500
006656
TST21
TST22
006772
007120
TS123
007306
1ST24
007416
TST25
1ST26
007544
007710
1ST27
004316
TST3
010054
TST30
010360
TST31
010452
TST32
010576
TST33
011000
TST34
011202
TST35

TMP1

002626

TUTCSR

003010

SERRTY

014620

$PWRMG

015110

TCONS

004020

TST36
TST37
TST4
TST40
TST41
TST42
TST43
TST44
TST45
TST46
TSTS
TST6

011410
011554
004466
011712
012076
012312
012474
012642
012760
013534
004714

TVECT
002650
TYPE = 104401
TYPOC = 104402
TYPON = 104404
TYPOS = 104403
VCTADR 003670
VCTTBL 002742
VECT
004152
WACTV
010126
017322
WAIT
WDONE
010260
WRAP
013536
WRPSW
014400
wT
010214
XCONT
013502
013440
XMIT
XMTCNT 002442
013506
XRET
$APTHD 000500
SATYC
015334
015310
$ATY1
$ATY3
015316
015326
$ATYL
$AUTOB 001034
001142
$BASE
$BDADR 001022
$BDDAT 001026
$CHARC 016104
$CKSWR 016336
$CMTAG 001000
$CM3 = 000000
$CNTLG 017063
$CNTLU 017056
$CPUOP 001114

$ERFLG

. ABS.

024612
000000

| SAVED

TIMER
014060
TKVEC = 000060

002344

= 000020
Swé
= 000040
SWw5
= 000100
swé
= 000200
sw7
= 000400
Sw8
= 001000
w9
TA
602610
TBITVE= 000014
002642
TBUF
IBUF 58= 176506
TCLOCK 005536
000
001

004760

TURCSR
TUTBUF

$CRLF
SDEVCT
SDEVM
$DOAGN
SENDAD
$ENDCT
SENULL
$ENV
SENVM
$EOP
SEOPCT

003004
003012

001063
001076
001144
014304
014274
014254
014310
001106
001107
014224
014246
001003

$ERRPC
$ERRTB

$SERTTL
S$ESCAP
SETABL
SETEND
$FATAL
$FFLG
$FILLC
$FILLS
$GDADR
$GDDAT
$GET42
$GTSWR
$HIBTS
$ICNT
$ILLUP
$INTAG
$ITEMB
SLF
SLFLG
$LPADR
SLPERR
$MADR1
$MADR2
$MADR3
$MADR4
SMAIL
$MAMS1
$MAMS?2
$MAMS3
$MAMS4
$MBADR
SMFLG
SMNEW
$MSGAD

001016
001146

001012
001060
001106
001146
001070
015554
001056
001055
001020
001024
014264
016406
000500
001004
015120
001035
001014
001064
015553
001006
001010
001120
001124
001130
001134
001066
001116
001122
001126
001132
000502
015552
017101
001102

$MSGLG 001104
$MSGTY 001066
017070
$MSWR
SMTYP1 001117
$MTYP2 001123
SMTYP3 001127
$MTYP4 001133
001054
SNULL
SNWTST= 000001
016332
$SOCNT
$OMODE 016334
SOVER

015274

$SPOWER
$PWRDN

015126
014754

SPWRUP 015026
$QUES
001062
$SRDCHR 016620
SROLIN 016740
$RDSZ = 000010
SRTNAD 014306
$SAVR6 015124
$SCOPE 015136
$SETUP= 000137
$STUP = 177777
$SVLAD 015240
$SVPC = 000500
$SWR = 161000
$SWREG 001110
$SWRMK= 000000
$TESTN 001072
001046
$TKB
001044
$TKS
= 000047
$TN
$TPB
001052
$TPFLG 001057
$TPS
001050
017112
$TRAP_
$TRAP2 017134
$TRP = 000011
$TRPAD 017146
000504
$TSTM
$TSTNM 001002
$TTYIN 017046
015556
$STYPE
$TYPEC 015770
$TYPEX 016106
$TYPOC 016134
$STYPON 016150

$TYPOS 016110
001100
SUNIT
SUNITM 000510
001112
SUSWR
SVECT1 001136
SVECT2 001140
$XTSTR 015150
$$GET4= 000000
$OFILL 016333
.SERRT 001146
= 000520
.$x

CZOLDFO DLi1=-W/1144 MFM SLU

'SYMBOL TABLE

'ERRORS DETECTED:

MACRO M1113

05-NOV-80 12:32

'VIRTUAL MEMORY USED:
36008 WORDS
( 141 PAGES)
PAGES)
78
(
WGRDS
20346
MEMORY:
'DYNAMiC

|ELAPSED TIME:

00:06:14

CZDLDF .BIN,CZDLDF .SEQ/=SP/NL:TOC=CZDLDF .MLB/ML,CZDLDF.P11

PAGE 81-5

SEQUENCE 110