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AH-8529F-MC

February 1981

111 pages

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Document:	CZDLDF0 KD11-Z,DL11-W DL11-W-1144 MFM SLU FEB 1981 bw
Order Number:	AH-8529F-MC
Revision:	000
Pages:	111
Original Filename:	CZDLDF0__KD11-Z,DL11-W__DL11-W-1144_MFM_SLU__AH-8529F-MC__FEB_1981_bw.pdf

OCR Text

DL11-W/1144

MFM

CZDLDFO

SLU

AH-8 529F-MC
FICHE 1 OF 1

FeB s
w0 v usa
COPYRIGH T

= ]‘ LI
oEAmmc
-

MACRO M1113

05-NOV-80 12:32

B
PAGE 2

IDENTIFICATION

PRODUCT CODE:

AC-B8528F-MC

PRODUCT NAME:

(ZDLDFO DL11-W/1144 MFM SLU

DATE CREATED:

OCTOBER, 1980

MAINTAINER:

DIAGNOS
TIC ENGINEERING

AUTHOR:

DAN CASALETTO

REVISED BY:

DAN MILLEVILLE

(¥,] PWN

(ST, 01,51, V1, VY, N

2O O

i QU

NO VWA

i P

)

OO0

1
SEQUENCE 1

.REM

N —

CI0LOF0 DLI1-W/1144 MFM SLU

THE INFORMATION IN THIS DOCUMENT [S SUBJECT TO CHANGE WITHOUT
NCTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL
EQUIPMENT CORPORATION. DIG!TAL EQUIPMENT CORPORATION ASSUMES
NO RESPONSIBILITY FOR ANY ERRORS THAT MAY APPEAR IN THIS DOCUMENT.
NO RESPONSIBILITY IS ASSUMED FOR THE USE OR RELIABILITY OF

SOF TWARE ON EQUIPMENT THAT IS NOT SUPPLIED BY DIGITAL OR ITS

AFFILIATED COMPANEIS.

CIGITAL
DEC

PDP

DECUS

UNIBUS

DECTAPE

MASSBUS

CJ0LDFO DL 11-w/1144 MM SLU

MACRO M1113

05-NOV-B0 12:32

¢
PAGE 3

1
SEQUENCE 2

40
6

HISTORY

SECTION

CZ0LDDO WAS RELEASED OCT 79
THE FOLLOWING (HANGES WERE MADE. ALL CHANGES ARE
BY ;*~ IN THE COMMENT FIELD:

INDICATED

1. USE THE MFPT INSTRUCTION,AND IF THE CPU IS A 11/44:

A ggs¥2r PERFORM READER ENABLE AND RECE[VER ACTIVE

8. If ERROR FLAGS TESTS AND BREAK TESTS ARE
ENABLED ,PERFORM THESE TESTS ONLY FOR THE SLU

AT 17650C.PERFORM THESE TESTS FOR THE CONSOLE SLU

If BITO3 OF SWR IS ADDITI-NALLY SET.
C. WHILE IN MAINTENANCE MODE DO NOT WRITE AND READ
A “P OR AN ASCIi 220. THIS WILL FORCE THE CONSCLE
INTO ‘CONSOLE MODE".
D. IN THE CLOCK REPEATABILITY TEST, ALLOW FOR A
TOLERANCE OF 2 BETWEEN CLOCK COUNTS. THIS IS TO
ALLOW ENOUGH TOLERANCE WHEN MOS MEMORY 1S USED
AND REFRESH CYCLES ARE OCCURING.

. BECAUSE 11/44 SLU INTERRUPT REQUESTS ARE DEPENDANT ON A MFM (L (K
ENOUGH TIME MUST BE GIVEN FOR THEM TO OC.UR. THEREFORE, ALL TESTS
ASSOCIATED WITH XMIT & RECEIVE INTERRUPTS SHOULD HAVE
A MINIMUM OF & NOP'S ACTING AS WAIT FOR INTERRUPT.

. 1T WAS FOUND THAT AN ATTACHED TU58 WOULD BE ACTIVATED
BY THE DIAGNOSTIC,AND,AS A RESULT,CHARACTERS WOULD BE

SENT TO THE RECEIVER BUFFER.
THIS WOULD CAUSE SOME TESTS TO FAIL. THEREFORE TO INHIBIT
ANY COMMUNICATION TO THE TU58 FROM THE DIAGNOST'C:

A.%NQBLSI??égTENANCE MODE IN ALL TESTS THAT WRITE TO
HE

B.IN ALL TESTS THAT WITE TO XMITTER AND BEFORE LEAVING
TEST: DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;?A{SHIGHT BE IN THE PROCESS OF BEING XMITTED TO
NISH.

C.DISABLE MAINTENANCE MODE FOR PURPOSE OF ERROR PRINTING
ONLY TO THE SLU WHICH THE TERMINAL IS ATTACPED.

. 1T WAS FOUND THAT UPON POwcRUP AND WITH THE TUS8 ATTACHED,
CHARACTERS WOULD BE SENT TO THE RECEIVER FROM THE TUS8.
SOME RECEIVER TESTS WOULD FAIL DUE TO THIS. THEREFORE,
ON ALL TESTS THAT PERFORM RECEIVER TESTS AND FOLLOWING
MAINTENANCE MODE BEING ENABLED,DELAY ENOUGH TIME TO ALLOW
TO ALLOW ANY CHARACTERS THAT MIGHT BE IN THE PROCESS Of
BFING RECEIVED TO FINISH.

. ADD SOF TWARE THAT WILL IMPLEMENT AUTO INITIATION Of
11/44 T/A CONSOLE TEST VIA WRAP (ABLE FROM TUS8 TU CONSOLE

CI0LDFO DLIV=W/11446 MFM SLU

MACRO M1113

05-NOV-80 12:3¢

}8%
}8?
b
D
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o
D
il
D ol
el
il
D
il
o
D
el el
D

POMNVININIAY
b ed cd e ad o it e e 0 OO O
S NN
OO
NOWVE NN 2000~

106

SEQUENCE 3

ONLY AFTER ALL SLUS ARE TESTED.

C.DLDED WAS RELEASED JuL 80

1. PROGRAM WAS CHANGED TO WORK WITH VECTORS GREATER THAN 377.
CI0LDFO WAS RELEASED OCT 80

1. IN TESTS 17 THROUGH 22 THE CLOCK DONE FLAG CAN GET SET
BETWEEN THE TIME THAT [T [S CLEARED (BIC) AND THE TIME THAT
THE (BIC-BIS) COMBINATION
INTERRUPTING IS ENABLED (BIS).
WAS CHANGED TO A (MOV) INSTRUCTION TO SET INTERRUPT ENABLE
AND CLEAR DONE FLAG ALL WITH ONE INSTRUCTION.

2. IN TEST 20, 3 (NOP)'S WERE ADDED BEFORE ERROR +47 TO ALLOW
SUFFICIENT TIME BETWEEN CLOCK FLAG AND CLOCK INTERRUPT.

PAGE 3-1

PORTS. IT IS SELECTED BY SWR BIT02 AND IS PERFORMED

}8(1)

IN TEST 23, THE COUNT DIFFERENCE ALLOWED WAS CHANGED ON

11/644'S ONLY FROM 2 TO 3.

TEST 45 HAD SEVERAL PROBLEMS.
A. PROGRAM CAN KICK OUT OF DELAY LOOP PREMATURELY. A FIXED
DELAY WAS ADDED.

B. ERROR ¢113 DID NOT PRINT. A RESET WAS ADDED IMMEDIATELY
BEFORE THE ERROR CALL TO BREAK THE MAINTENANCE WRAPAROUND.
C. CLKCNT WAS NOT INITIALIZED.

CI0LDFO DLI1-W/1144 MFM SLU
126
127
128
.
130

131
}g%

MACRO M1113

05-NOV-80 12:32

E
PAGE &

1.0

GENERAL INFCRMATION
eessssscscssecccecs=

1.1

ABSTRACT

134

1
SEQUENCE 4

THIS DIAGNOSTIC IS A LOGIC TEST TO VERIFY THE OPERATION OF

}gg

THE

137

FOLLOWING MODULES:

THE

1. DL11-W SERIAL LINE/REAL TIME CLCCK INTERFACE

}gg

2. 11/44

MULTIFUNCTION MODULE

140
}2;

THE PROGRAM WILL RUN WITHOUT ANY SPECIAL TEST FIXTURES BY DEFAULT.
HOWEVER, THE FOLLOWING CPTIONAL TESTING IS PROVIDED:

143
144
145

1. TEST TO VERIFY XMIT AND RECEIVE OF THE UARTS WITH
A WRAP CABLE. THE UART UNDER TEST IS LOOPED BACK ON
ITSELF. THIS IS SELECTED VIA OPERATIONAL SWITCH SETTING

148
149

2. AUTOMATIC INITIATION OF THE T/A CONSOLE TEST OF THE 11/44
MFM. THE TU58 PORTS ARE LOOPED TO THE CONSOLE PORTS

}29

BIT 7, AND IS APPLICABLE TO THE DL11W AND 11/44 MFM,

150

THIS IS SELECTED VIA OPERATIONAL SWITCH SETTING BIT 2

151
}g%

AND IS APPLICABLE TO 11/44 MFM ONLY.
(SEE CKKFBAO FOR T/A CONSOLE TEST EXPLANATION)

154

THIS DIAGNOSTIC OPERATES ON THE CONSOLE

155
}g?

SERIAL LINE AND CLOCK INTERFACES

AS WELL AS UP TO FIFTEEN(15) ADDITIONAL IDENTICALLY CONIIGURED
SERIAL LINE INTERFACES. THE DEFAULT ADDRESSES ARE:

158
{28

A. CONSOLE - 177560
177546

SERIAL LINE
CLOCK

161
162
}22

B. OTHER SERIAL LINE - 776500

FIRST SERIAL LINE ADDRESS
OF 15 CONSECUTIVE SERIAL
LINE ADDRESSES

165
166
167
}gg

THE PROGRAM IS DESIGNED TO RUN ON ANY POP-11 WITH 8K OF MEMORY
. 1T CAN BE RUN UNDER XXDP,APT, AND ACT MONITORS,
AND ON PROCESSORS WITH NO HARDWARE SWITCH REGISTER,
SOF TWARE SWITCH REGISTER = LOCATION 176

};?

POWER FAILURE IS SUPPORTED FOR SYSTEMS WITH CORE MEMORY.

N= OOV~
N

b
D
il
el
el el el
—

COODOD
N ~N~NN~N~N

172
173

NOTE:

THIS DIAGNOSTIC WITH THE SWR = 000020
(CLOCK TESTS ONLY) SHOULD BE USED ON SWITCHLE>S CPU'S
TO TEST KW-11L LINE CLOCK MODULES.

1.2

SYSTEM REQUIRERENTS

1.2.1

EQUIPMENT

STANDARD 11 FAMILY(COMPUTER WITH A CONSOLE OUTPUT DEVICE

000 ~NONV B

MACRO M1113

(05-NOV-80 12:32
AND 8K OF

PAGE 4-1

SEQUENCE 5

MEMORY.

OPTIONAL:
1.L00P CABLE FOR UART LOOP BACK ON [TSELF

2.WRAP CABLE FOR 11/44 MFM T/E TESTING
(SEE DWG. #7016942 WRAP AROUND CABLE
AND SECTION 5.0 OF

THMIS DOCUMENT)

2O
S NN

o
e
i
h
D
d
i
e
e
e

~O O O O O 00 0B 0O OO GO OO 0P

CIOLDFO DLi1=W/T1144 MFM SLU

1.2.2

STORAGE
THE

PROGRAM USES SK WORDS OF

MEMORY

CZ0LDFO DLIT-W/1144 MFM SLU
196
197
198
199

MACRO M1113
1.3

200
20
202
203
204
205
206
207
208
209

0S-NOV-80 12:32

6
PAGE 5

1
SEQUENCE 6

ASSUMPTIONS

IF THE UNIT UNDER TEST (UUT) IS THE CONSOLE , THE PROGRAM WILL
ASSUME THE REAL TIME CLOCK (RTC) IS ENABLED AND WILL TEST [T
UNLESS THE TESTS ARE DISABLED BY BIT6 OF THE SWR.

If THE UUT IS NOT THE CONSOLE, THE RTC IS NOT TESTED FOR THAT DEVICE.
FOR THE OL11-W:

THE PROGRAM WILL ASSUME THE ERROR FLAG BITS AND THE BREAK FUNCTION
OF THE DL11-W ARE DISABLED AND WILL NOT TEST THESE FUNCTIONS

PONIAL MNPV
NI N NN NN ~no
—
POPIND) =2 b md ed b B e b
N2 OO0 NN
NN = o

UNLESS ENABLED BY BIT10 (FOR ERROR FLAGS) AND BIT8 (FOR BREAK)
OF THE SWR. THE DEFAULT CHARACTER SIZE IS 8 BITS (SEE PARA 2.3.2).
FOR THE 1°/44:

THE PROGRAM ASSUMES THAT THE ERROR FLAG BITS AND THE

BREAK FUNCTION ARE DISABLED, AND WILL NOT TEST THESE FUNCTIONS
HOWEVER, IF BIT 10 (FOR ERROR FLAGS) AND BIT 08 (FOR BREAK)
OF SWR ARE SET, THEN ERROR FLAGS AND BREAK TESTS ARE PERFORMED
FOR THE TUS8 SLU ONLY. IF BITO3 OF SWR IS ALSO
SET THEN THESE TESTS WILL BE ENABLED FOR THE CONSOLE.
READER ENABLE AND RECEIVER ACTIVE TESTS

?REC¥?8 EERFORHED SINCE THE 11/44 MFM DOES NUT IMPLEMENT THESE
UN

2.0

NS.

OPERATING INSTRUCTIONS

2.1

USE STANDARD PROCEDURE FOR PDP-11 ABSOLUTE BINARY FORMATTED TAPES.
2.2

STARTING PROCEDURE

LOAD THE SWITCH REGISTER WITH SETTING

NOTE: IF USING A CPU WITHOUT HARDWARE SWITCH REGISTER
SOF TWARE SWITCH REGISTER LOCATION = 176.
(FOR A 11/44 (CPU USE MFM CONSOLE FOR DEPOSITING
SWITCH REGISTER. TYPE “P TO ENTER CONSOLE)
A. START AT 200.

AFTER CHECKING THE TRANSMITTER, THE PROGRAM WILL PRINT ITS IDENTIFICATION
AND REPORT THE NUMBER OF DEVICES UNDER TEST (NUMBER IS OCTAL).
GSSERP¢EE¥ IS PRINTED AFTER A FULL PASS HAS BEEN MADE ON ALL DEVICES

tensNOTERnee
B. START AT 204.
THE ''ECHO'' TEST WILL BE EXECUTED. AN ‘"' [S PRINTED AT THE

BEGINNING OF THE TESY. THE ECHO TEST READS A CHARACTER FROM

CZ0LDFO DLI1-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

253

261

262
ggz
265

266

SEQUENCE 7

THE TERMINAL,WRITES THAT CHARACTER TO THME TERMINAL AND

2564
255
52?
258
259
260

PAGE 5-1

REPORTS ANY ERROR FLAGS SET IN THE RECEIVER BUFFER.
A CONTROL=C HALTS THE TEST AND PRINTS ''STOP'' AT THE TERMINAL
CONTINUING RESTARTS THE ECHU TEST.
C.

START AT 210.
teeepOTER
e
THE “ERMINAL QUTPUT TEST WILL BE EXECUTED. DEPRESSING ANY CHARA(CTER
AT THE TERMINAL, HALTS THE TEST. CONTINUING RESTARTS THE TEST.

THE TEST QUTPUTS 32 CHARACTERS ON A LINE AND REPEATS THE

PATTERN EVERY [HREE LINES.
(OCTAL CODE 040 ==-> 377):

THE PATTERN IS AS FOLLOWS

1HSXR () ve =, /0123456789 ;<=>?

267

QABCDEFGHIJKLHNOPQRSTUVUXYlt\]“_

270
g;;

THIS BOTTOM LINE COULD BE THE FOLLOWING IF
DOES NOT HAVE LOWER CASE:

%gg

%;z
275

276

77
278
279

*ABCDEFGHIJKLMNOPQRSTUVWXYZ

SABCDEFGHI JKLMNOPQRSTUVWXYZL\

(OCTAL CODE)

(040 ==> 077)

(100 =-=> 137)

(140 ==> 177) [LOWER CASE ALPHA]
THE

TERMINAL

[UPPER CASE ALPHA]

renxeNOTErwen

IF THE TESTING ON TERMINIALS OTHER THAN THE CONSOLE 1S DESIRED
FOR TESTS B OR C,SEE SECTION 2.3.4. AND 2.3.5. OF THIS DOCUMENT,

ot
A

CIOLDFO DLI1=-W/1144 MFM SLU

MACRO M1113

(05-NOV-B0 12:32

[

PAGE 6

SEQUENCE 8

2.3

OPERATING PROCEDURE

2.3.1

OPERATIONAL SWITCH SETTINGS
THE DIAGNOSTIC WILL

CHECK FOR EXISTENCE OF

SWITCH

REGISTER AT 177570.
IF NO
SWITCH REGISTER IS AVAILABLE THE PROGRAM
WILL AUTOMATICALLY USE THE
CONTENTS OF LOCATION
176 AS THE SOFTWARE SWITCH REGISTER. THE USER SHOULD
SET THIS LOCATION BEFORE STARTING THE PROGRAM. IF A
HARDWARE SWITCH IS AVAILABLE AND A SOF TWARE SWR(LOC. 176)

DESIRED,LOAD ALL 1'S INTO LOCATION 177570.CALL SWITCHES

UP IF PHYSICAL SWITCHES ARE AVAILABLE)

NS
- O 00 ~NO

322

=
=
-~
=
=
-

HALT ON ERROR
LOOP ON PRESENT TEST
INHIBIT ERROR TYPEOUT
UNUSED
UNUSED
ENABLE ERROR FLAGS TESTS
LOOP ON ERROR
ENABLE BREAK FUNCTION TESTS
ENABLE DATA TEST THROUGH LOOP-BACK CONNECTOR
INHIBIT RTC TESTS (ALLOW ONLY SLU TFSTS)

BITOS
BIT04
BIT03

- ALLOW MANUAL SETTING OF ‘'SDEVM'' (DEVICE MAP)
-~ INHIBIT SLU TESTS (ALLOW ONLY LINE CLOCK TESTS)
~ FOR 11/44 MFM: ENABLE BOTH "BREAK TESTS' AND 'ERROR FLAG

BIT02

ONLY IF BIT10 OR RITO8 IS SET.)
=11/44 MFM OPTION: SELECT AUTO INITIATION

NN WA AN AN LA LN AN AN A
n — d d b D b b b

—

BIT15
BIT14
BIT13
BIT1?
BITI
BIT10
BITO9
BIT08
BITO7
BIT06

TESTS'

FOR THE

CONSOLE

SLU.

(THIS BIT

IS VALID

T/A CONSOLE TEST VIA WRAP CABLE

FOR DL11-W:

If THE SOFIWARE SWITCH REGISTER IS USED(LOC. 176) THEN

BUILT INTO THE PROGRAM IS THE ABILITY TO DYNAMICALLY CHANGE THE
CONTENTS OF SWREG DURING PROGRAM EXECUTION. BY STRIKING *G
(CNTL G) ON CONSOLE TTY THE OPERATOR SETS A REQUEST FLAG TO CHANGE
THE CONTENTS OF

SWREG, WHICH IS PROCESSED

IN KEY AREAS OF

THE PROGRAM

CODE (IE) ERROR ROUTINES, AFTER HALTS END OF PASS, AND OTHER
APPLICABLE AREAS. BECAUSE THIS DIAGNOSTIC USES THE MAINTENANCE BIT
OF THE SERIAL LINE, THE CONTROL-G SHOULD BE ISSUED DURING PROGRAM
TYPEOUTS AT THAT TIME THE MAINTENANCE BIT

IS SURE

TO BE CLEAR.

IF A CONTROL-G IS DETECTED, UPON EXECUTION THE CONTENTS Of THE SWREG ARE

DUMPED IN OCTAL ON THE CONSOLE TTY AND ANY CHANGES ARE REQUESTED
(1e)

POSSIBLE RESPONSES ARL:

SWR=XXXXXX

NEW=

CZOLOFO DLi1-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

PAGE 6-1

<( R>
6 DIGITS

0-7

SEQUENCE 9
IF NO CHANGES ARE TO BE MADE

TO REPRESENT IN OCTAL THE NEW SWITCH REGISTER

VALUE ;LAST DIGIT FOLLOWED BY <(CR>.

TO ALLOW REENTERING VALUE IF ERROR IS COMMITTED

KEYING

IN SWREG VALUE.

FOR 11/44 (CPU:

SINCE THE 11/44 HAS A HARDWARE SWITCH REGISTER LOADED BY THE MFM (ONSOLE
THEN THE DIAGNCSTIC SHOULD ALWAYS FIND EXISTENCE OF 177570.
WHEN OPERATING ON THE 11/44 CPU, DYNAMIC CHANGING OF SWREG(177570) DURING
PROGRAM EXECUTION CAN BE ACCOMPLISHED BY USING

TME MFM CONSOLE. TYPING “P<CR> ON THE CONSOLE TTY WILL ENTER THE

CONSOLE. THIS IS CONSIDERED ''CONSOLE MODE''.

TO EXAMINE SWREG TYPE ' E SW<CR> ' TO THE CONSOLE PROMPT. TO LOAD THE

SWREG TYPE ' D SW DATACCR> ' WHERE ''DATA'' IS AN OCTAL NUMBER.
IN ORDER FOR THE DIAGNOSTIC TO TYPE TO THE TTY IT IS NECESSARY
TO HAVE THE 11/44 MFM [N ''PROGRAM /0 MODE''. THIS CAN BE ACCCMPLISHED
BY TYPING ' C<CR> ' TO THE CONSOLE PROMPT. THEREFORE ,WHEN CONSOLE
USE IS COMPLETED, PLACE THE MFM IN ''PROGRAM 1/0 MODE"'.
BECAUSE THIS DIAGNOSTIC USES THE MAINTENANCE BIT, *P WILL
NOT BE ACKNOWLEDGED DURING THESE TESTS.THEREFORE, ISSUE *P
DURING PROGRAM TYPEQUTS. AT THIS TIME THE MAINTENANCE BIT
WILL BE CLEARED.

CIDLDFO DLI1-W/1144 MEM SLU
384
385
386

5000000

MACRO M1113

2.3.2

389
390
%g;

05-NOV-80 12:32

PAGE 7

SETTING BITS PER CHARACTER

THIS PROGRAM DEFAULTS TO TESTING 8 BITS PER CHARACTER. [F
SERJAL LINE IS SET FOR 5-=>7 BITS PER CHARACTER, SET THE
MEMORY LOCATION "'SUSWR'' AS FOLLOWS:

393
ggg

CHAR. SIZE
(# OF BITS)

396
397
398

8
7
6

zgg

28;
409

THE

"'SUSWR'' CONTENTS
(BINARY)
(OCTAL)
100000000
010000000
001000000

4«01

402
403
404
405
406

SEQUENCE 10

000100000

400
200
100

"'SUSWR'' IS USED IN THE DATA PATH TESTS TO LIMIT THE BINARY
COUNT TEST PATTERN TO THE NUMBER OF BITS SELECTED ON THE
SERIAL LINE.

2.3.3

RUNNING UNDER APT
THE APT MAILBOX

IS LOCATED AT LOCATION 500,

TO ALLOw ADDITIONAL SERIAL

2}?

LINE VECTOR ASSIGNMENTS TO THE 400 AREA OF MEMORY.

2}%

FOR DL11W:

414
2}2

THE DEFAULT EXECUTION TIMES PROVIDED(STSTM,$PASTM) ARE FOR EXECUTION
WITH AN 11/34 PROCESSOR, CORE MEMORY , AND 110 BAUD.

Z}g

FOR 11/44:

419
420

THE EXECUTION TIMES PROVIDED IN THE APT SCRIPT THAT FOLLOWS AND
IN SECT. 2.4 ARE FOR EXECUTION WITH A 11/44 PROCESSOR,
CACHE,
16K CORE _MEMORY, AND 300 BAUD.
THE FOLLOWING IS A PROGRAM LOAD FILE USED BY APT:
1. E TABLE 'A' IS USED FOR APT DUMP MODE AND RUN TIME MODES.

421

422
423

424
425
426
627

428
429
430

2%;

433
434

435

2%9

(38
439

440

A. TWO SLU'S ARE TESTED.(SSWREG BITO5=1 AND $DEVM=3)
A SLU AT 177560(DEFAULT CONSOLE SLU) AND AT 176500
(BASE ADDRESS CODE).

B. THE ERROR FLAG AND BREAK TESTS ARE SELECTED FOR THE SLU

AT 176500(TUS8 SLU IN MFG.)
($SWREG BIT 10 AND 8 =1)
C. THE "ENABLE DATA TEST THROUGH LOOP-BACK CONNECTOR'

TEST

IS ENABLED TO ALLOW TEST 44 TO EXECUTE ($SWREG BIT 7 =1).

2. E TABLE 'B' IS USED FOR APT QV,
IT ACCOMPLISHES WHAT E TABLE ‘A’
DOES, WITHOUT THE ENABLE DATA TEST THROUGH THE LOOPBACK CONNECTOR, BUT

ADDITIONALLY IT SUPPRESSES ALL TYPEOUTS TO THE TERMINAL (SENVM=240) AND

SELECTS AUTO TESTING OF T/A CONSOLE TEST VIA WRAP CABLE ($SWREG BIT02=1).
1ST PASS

RUN TIME

LONGEST

TEST TIME

ADD
I TIONAL

RUN TIME

CZOLDFO DLi1-W/1144 MFM SLU

MACRO M1113 05-NOV-80 12:32 PAGE %-1 SEQUENCE 11
1

E TABLES

L45
L4

47
448
L49
450
&5
452

453
&54
455
456
457
458
459
460
461
462
463
464
465

466

467
468
469

1y
L6¢
443
L4

SWITCH REGISTER 1

002640

002404

SWITCH REGISTER 2
CPU TYPE/OPT]ONS

000400
00/0000
000/00000000
000700000000
000700000000
000700000000
0000
0000

000400
00/0000
000/00000000
000700000000
000700000000
000/00000000
0000
0000

000003

000000
000000

000000
000900

E-MODE/S-MODE
(SENVM/SENV)
($SWREG)

MEMORY MAP CODE 1
MEMORY MAP CODE 2

MEMORY MAP (ODE 3
MEMORY MAP CODE &

BUS PRIORITY/INTERRUPT 1
BUS PRIORITY/INTERRUPT 2
BUS ADDRESS CODE
DEVICE MAP CODE
($DEVM)

CTLR. SPECIFIC WORD 1
CTLR. SPECIFIC WORD 2

200/000

176500

260/001

176500

CIOLDFO DLI1-W/1144 MFM SLU
L7
472
473
L74
675
L76

MACRO M1113

2.3.4

492

493
494
495
496
497
498
499

L
PAGE 8
SEQUENCE 12

RUN WITH ALTERNATE

CONSOLE ADDRESS

TO USE A CONSOLE ADDRESS OTHER THAN 177560, OR VECTOR OTHER
THAN 60,

THE OPERATOR MUST SUPPLY THE PROGRAM WITH THE

CORRECT ADDRESSES BY INSERTING THEM AT THE TAG LABELED ''CRCSR'':

478
479
480
481
482
483
484
485
486
487
488
489
490
N

05-NOV-80 12:32

CRCSR:
CRBUF:
CTCSR:
CTBUF:

CRVECT:
CRPSW:

ADDRESS
ADDRESS
ADDRESS
ADDRESS

OF
OF
OF
OF

RECEIVER RCSR
RECEIVER BUFFER
TRANSMITTER (SR
TRANSMITTER BUFFER

ADDRESS OF RECEIVER VECTOR
ADDRESS OF ASSOCIAED PSW

CTVECT: ADDRESS OF TRANSMITTER VECTOR
CTPSW:

2.3.5

ADDRESS OF

ASSOCIATED PSW

TESTING ADDITIONAL SERIAL LINES

THIS PROGRAM WILL SUPPORT TESTING OF MULTIPLE SLU'S.

IT REQUIRES

THE ADDRESS OF THE FIRST ADDITIONAL RCSR (STORED AT ''$BASE'') AND
ITS INTERPUPT VECTOR (STORED AT ''SVECT1''); AND WILL BE ABLE
TO ADDRESS ANY SLU STARTING AT THE
15 CONSECUTIVE DEVICES.

EXAMPLE:

$BASE:
SVECT1:

THE PROGRAM WILL BE ABLE

SPECIFIED BASE ADDRESS UP TO

776500
300

TO TEST THE

CONSOLE PLUS ANY

ADDITIONAL DL11-W SLU'S WITHIN THE RANGE 776500 --> 776660
$BASE AND SVECT1 DEFAULT TO 776500 AND 300 RESPECTIVELY.
THE

PROGRAM ASSOCIATES UN TM “'UMBERS TO DEVICES AS FOLLOWS:
(NUMBERS IN PARENTHE.
'S ARE OCTAL)

UNITN 0 -->
UNIT# 1 -->

= O 000NN
NN =

(O LU LU LU LV LV [V LV LV LV LV ]V 1V}
PNONIAINA)
b cod ed cad b o b b b

UNIT# 2 -->
UNIT# * - >

UNITH /

-->

UNIT#15

-->

CONSOLE [ADDRESS STORED AT '‘CRCSR'‘]
BASE ADDRESS STORED AT ‘‘$BASE''
5
ASSOCIATED BASE VECTOR STORED AT'‘SVECT1
BASE ADDRESS + (10)
BASE VECTOR + (10)
BASE ADDRESS + (20)
BASE VECTOR + (20)
BASE ADDRESS + (30
BASE VECTOR + (30)
A

’

BASE ADDRESS + (16?)
BASE VECTOR ¢+ (160

CZOLDFO DLi1-W/1144 MFM SLU

MACRO M1113

N1
PAGE 9
SEQUENCE

05-NOV-B0 12:32

STARTING AT LOCATION 200 AND HAVING BITS5 OF SWR CLEAR, THE PROGRAM WILL SELF
SIZE THE NUMBER OF DEVICES (STARTING AT THE BAS ADDRESS) ANC
STORE A BIT MAP AT ''SDEVM'' (DEVICE MAP) TO INDICATE WHICH UNIT NUMBERS
ARE PRESENT

AND WILL BE TESTED:

P UNIT D
T

UNIT

eaaeea.s '

UNIT
2

! UNIT !
!
1!

CONSOLE!
!

A BIT MAP CAN BE ENTERED AT ''SDEVM'' PRIOR TO STARTING THE PROGRAM
SETTING BITS OF THE SWR INHIBITS THE SELF-SIZING AND DEVICE MAP
GENERATION,AND USES THE VALUE STORED
BY THE OPERATOR.
EXAMPLE:

SWR

000040

(BINARY

$BASE:
776500
$VECTi: 300

SDEVM:

{HE PROGRAM WILL

0 000 000 000 100 0003

(BINARY - 0 000 000 000 001
TEST

UNIT# O = CONSOLE

UNITH 1 = 776500 ; 300
UNIT# 3 = 776520 ; 320

0111

CIOLDFO DLI1-W/1144 MFM SLU
559
560
561
962
563
564
565

MACRO M*113

2.4

SEQUENCE

(Y10 BAUD)

ADDITIONAL DEVICES

FOR 11/44:

570
571
572

= 60 SECONDS

= 55 SECONDS/DEVICE

(300 BAUD)

LONGEST SUBTEST TIME = 50 SECONDS
PASS TIME
ADDITIONAL DEVICES

573
574

593
594
595
596
597
598
599
600
601
602

PASS TIME

569

592

LONGEST SUBTEST TIME = SO SECONDS

567
568

583
584
585
586
587
588
589
590
591

PAGE

EXECUTION TIMES FOR DL11-w:

9566

575
576
577
578
579
580
581
582

05-NOV-80 12:32

3.0

= 60 SECONDS
55 SECONDS/DEVICE

ERROR REPORTING

IF A ROUTINE FAILS AND THE INHIBIT ERROR TYPEOUT (BIT13) OF THE SWR
IS NOT SET, A PRINTOUT RESULTS [N THE FORM:
"'(SOME ASCI1 MESSAGE)"

TEST#
XXX

ERR PC
XXXXXX

NOTE:

RCSR
XXXXXX

CANY APPLICABLE DAT HEADINGS]
[ANY APPLICABLE DATA]

'RCSR'' IS DEPENDENT ON THE FAILURE

,OR LKS
t THEREFORE COULD BE TCSR,RBUF,TBUF

WHERE "XXXXXX'' IS AN OCTAL NUMBER.
THIS ERROR PRINTOUT OCCURS PROVIDED THE ERROR THAT EXISTS

WOULD NOT HINDER THE TYPEOUT. IN CASES WHERE IT IS NOT POSSIBLE
TO PRINT AN ERROR MESSAGE (].E. FATAL CONSOLE TRANSPITTER
FA'LURES), A WALY OCCURS AND THE PC CAN BE EXAMINED BY THE OPERATOR
TO FIND THE ERROR

INFORMATION IN THE PROGRAM LISTING.

NOTE: FOR SOF TWARE SWITCH OPERATION,

THE SwiTCH REGISTER CAN
BE CHANGED BY TYPING A CONTROL-G AT THE CONSOLE DURING ERROR PRINIOUTS.
AFTER CONTINUING FROM THE ERROR HALT THE OLD SWR CONTENTS
IS DISPLAYED AND THE NEW CONTENTS CAN BE ENTERED.
1F ERROR HALTS ARE DISABLED, THE CONTROL-G RESPONSE OCCURS
IMMEDIATELY FOLLOWING THE TYPEQUT.

CZOLDFO DLI1=-W/1144 MFM SLU

604
605
606

607

608
609
610
611
612
613

MACRO M1113

6.0

12:32

PAGE

SEGUENCE

SUBROUTINE ABSTRA(TS

[

THIS

IS A SERIES OF

INSTRUCTIONS STARTING AT LOCATION O DESIGNED TO

DETECT AND ISOLAYE UNEXPECTED TRAPS TO THE

AREA OF

614

MEMORY.

TRAP AND INTERRUPT VECTOR

EACH VECTOR ENTRANCE ADDRESS IS LOADED WITH THE ADDRESS OF THE NEXT
LOCATION. THE NEXT LOCATION IS LOADED WITH A BREAK POINT TRAP (000001).

615

616

617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
63?
638
639
640

0S5S-NOV-80

THUS AN ILLEGAL TRAP OR INTERRUPT CAUSES A TRAP THROUGH THE BPT VECTCR(14&)
WHICH POINTS TO THE '‘CATCH'' ROUTINE.
THE '"CATCH'' ROUTINE REPORTS THE PC THAT CAUSED THE ORIGINAL TRAP AND
THE LOCATION OF THE TRAP VECTOR (IF UNDER APT, AN ERROR IS INDICATED TO APT),
A§T$RI§E38$T%NG THE ERROR THE PROGRAM HALTS. THE PROGRAM MUST BE RESTARTED
AT

INT.

6.2

THIS ROUTINE

IS USED TO WRITE

THE PSW BY POPPING VALUES FROM THE

g;eggésszés METHOD IS USED TO BE COMPATIBLE WITH ALL 11 FAM]LY

4.3

THIS ROUTINE CALL 1S PLACED BETWEEN EACH SUBTEST. IT RECORDS THE STARTING
ADDRESS OF EACH SUBTEST AS IT IS BEING ENTERED AND UPDATES THE
TEST NUMBER. IF A SCOPE LOOP IS REQUESTED, IT WILL JUMP TO THE START OF THE
SUBTEST AT WHICH THE SCOPE LOOP IS REQUESTED.

CIOLDFO DLI1=-MW/1144 MFM <Ly
642

643

644
645
646

647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663

MACRO M1113

670

PAGE

02
12

SEQUENCE

THIS ROUTINE CALL

IS PLACED WHEREEVER AN ERROR REPORT

1S DESIRED. THE LOWER BYTE OF THIS CALL IS USED AS THE ERROR NUMBER

AND AS A POINTER INTO THE ERROR TABLE . THIS ROUTINE REPORTS ERRORS
TO APT USING "'SAPTYPE'' AND TYPES t~ROR REPORTS TO THE CONSOLE

USING "‘SERRTYPE''.

4.5

$POMWER
THIS ROUTINE SAVES ALL GENERAL REGISTERS DURING POWER-DOWN
AND RESTORES THEM AT POWER-UP. IF A POWER FAILURE OCCURS
"POWER’' IS PRINTED AT THE CONSOLE AFTER POWER IS RESTORED.

4.6

THIS ROUTINE

CALL

IS USED TO DETECT

THE RECEPTION OF

A CONTROL-G

FROM THE CONSOLE. THE CALL USES "'SREAD'' TO PERFORM THE CONTROL-G
SEQUENCE OF DISPLAYING THE CONTENTS OF THE SOF TWARE SWITCH REGISTER

664
665
666

607
668
669

05-NOV-80 12:32

AND

5.0

THE ENTERING THE NEW CONTENTS FROM THE

AUTOMATIC

INITIATION OF

VIA WRAP CABLE

11/44 T/A CONSOLE

TERMINAL.

TEST

671

672
673
674
675
676

PURPOSE:

677

CONSOLE

TEST CAN BE

IMPLEMENTED

WHILE UNDER APT, THE USE OF A WRAP CABLE FROM
THE TUS8 TO THE CONSOLE CAN BE USED ALLOWING THIS

678
679
680
681
682
683
684
685
686

687
688
689
690
691
692
693
694
695
696
697
698

THE T/E(OR T/A)

BY MANUALLY TYPING T/E(Ok T/A) ON THE KEYBOARD
OF THE TERMINAL WHEN IN CONSOLE MODE. IN ORDER TO
IMPLEMENT THIS TEST IN AN AUTOMATIC WAY IN MANUFACTURING
DIAGNOSTIC TO ISSUE THE ‘'T/A'
THE DIAGNOSTIC WILL

COMMAND TO THE CONSOLE.

ISSUE THE APPROPRIATE SEQUENCE

OF COMMANDS TO THE CONSOLE VIA THE WRAP CABLE WHEN
B1702 OF SWR =1. THE DIAGNOSTIC WILL THEN MONITOR

THE EXPECTED RESPONSE FROM THE CONSOLE VIA THE WRAP

CABLE AND HALT IF THERE IS AN ERROR.

THE T/A TEST
IS DONE ONLY AFTER ALL SLUS ARE TESTED. IF T/A 1S SUCCESSFUL
'END PASS' IS PRINTED AND THE DIAGNOSTIC STARTS AGAIN.

FIGURE 1

SHOWS THE PROPER WRAP CABLE SETUP AND

REQUIREMENTS FOR AUTOMATICALLY
THE DIAGNOSTIC
. NOTICE

INITIATING T/A FROM THE

THAT THIS ARRANGEMENT ALLOWS

FOR THE TERMINAL TO MONITOR ALL COMMUNICATION fROM
THE CONSOLE OUTPUT DURING EXECUTION OF THE DIAGNOSTIC
IN ''WRAP MODE''.
TYPEOUT

EXAMPLES

1. WITH THE CONFIGURATION OF FIGURE 1 AND '‘WRAP MODE'' SELECTED

CI0LDFO DLIT=-W/1144 MFM SLU
699
700
;8;
703

MACRO M1113

(05-NOV-B0 12:32

E_2

PAGE 12-1

SEQUENCE 17

THE PROGRAM MAY BE LOADED BY APT, [F °'E TABLE B' OF SECTION
2.3.3 WERE USED WITH THE EXCEPTION OF ALLOWING TYPEOUTS{(SENVM=200)
THE FOLLOWING WOULD BE SEEN ON THE LOCAL TERMINAL:

704
705
706
707

C20OLDFO DL11=-W/1144 MFM SLU
02 DEVICES UNDER TEST *P

709
710
711
712

CONSOLE~-TESTB
END PASS *P
CONSOLE
O>T/A

71
715
716
717

CONSULE-TESTB
END PASS *P
CONSOLE
»>T/A

719

END PASS *P

708

718

;g?

;g%

724
725
726
727
728
729
730
/3
732
733
734
735
736
73%7
738

739
740

CONSOLE
OT/A

CONSOLE-TESTB

..... ETC.

DESCRIPTION: REFERING TGO THE ABOVE PRINTQOUTS:

A. THE DIAGNOSTIC IS LOADED W!TH THE TITLE BEING PRINTED.
B. TWO SLU DEVICES(CONSOLE,TU58) ARE SPECIFIED
C. BOTH SLUS ARE TESTED COMPLETELY. AT THIS POINT
THE THE DIAGNOSTIC ISSUES “P TO THE WRAP CABLE.
THE CONSOLE ENTERS CONSOLE MODE AND
THE “P TYPED ON THE TERMINAL IS THE MFM CONSOLE ECHO.
D. THE CONSOLE PERFORMS ITS OWN SELF TEST BY TYPING
"CONSOLE' FOLLOWED BY >>>, THE CONSOLE PROMPT.
E. THE DIAGNOSTIC THEN ISSUES T/A AND THE TERMINAL
SHOWS THE CONSOLE ECHO OF THIS.
F. THE MFM THEN PERFORMS THE T/A TEST SHOWN BY THE TERMINAL
TYPING "CONSOLE-TESTB'.THE DIAGNOSTIC LOOKS FOR THE
'B* IN THIS TYPEOUT,AND WHEN FOUND , CONSIDERS
THE TEST A SUCCESS. THE DIAGNOSTIC WILL TYPE END PASS
INDICATING A SUCCESSFUL PASS OF THE DIAGNOSTIC.

G. THE DIAGNOSTIC CONTINUES WITH FURTHER PASSES OF THE
DIAGNOSTIC.

CIOLDFO DLi1-Ww/ 7144 MFM SLU
742

743
744

745
746
747

7«8

749

750
751
752
753
754
755
756

757

758

759
760

MACRC M1113

05-NOV-80 12:32

Fo2

PAGE 13

SEQUENCE 18

IF 'E TABLE B' Of 2.3.3 WERE USED WITHA TYPEOUTS SUPPRESSED
(SENVM-240) AS STATED, THEN THE FOLLOWING TYPEOUTS WOULD BE

NOTICED:

CONSOLE

>T/A

CONSOLE-TESTB"P

CONSOLE
>T/A

CONSOLE-TESTB*P
CONSOLE

»>T/A

CONSOLE-TESTB*P

..... FT1C.

CIOLDFO DLIV=W/1144 MFM SLU
762

763

SEQUENCE 19

FIG. 1= WRAPAROUND CONFIGURATION - AUTO INITIATION OF

264

PAGE 14

(05-NOV-80 12:3¢

MACRO M1113

11/44

T/A CONSOLE

TEST

essesccccecccececscccc-csccsco-ccccccccccccccas

766

767
768

X222 X2 2252222222222 22022020 Rdd

I I

I R

;98

WRAP AROUND CABLE

CONSOLE TTY PORT

TUS8

;;%
INPUT

773

774
775
776

784

786
;gg

;
.

!
TTY PRINTER

!
TTY KEYBOARD

798
799

gg?
gg%

804
805

806

gg;
809
810
811
812

813

Gy e o O,y wo
By By By 8o By

795
796
797

Be Do Be Be e Ve Ve By o Wy We B,

789
790
791
792
;32

e Be

785

;

.
!

€1

)

WHEN THE SWITCH IS IN "'NORMAL'' MODE CONTACTS ARE:
S$1-C2 IS CLOSED
S1=C1 IS OPEN
$3-C3 IS OPEN
THIS ALLOWS THE USE OF THE TERMINAL WITH THE CONSOLE
WHEN THE SWTICH IS IN ""WRAP'' MODE CONTACTS ARE
$1-C1 CLOSED
S1-C2 OPEN

$2-C3 CLOSED
THIS ALLOWS THE TUS8 PORT TO COMMUNICATE WITH THE CONSOLE PORT AND FOR

THE TTY TO MONITOR THE CONSOLE OUTPUT
THIS IS ALL DONE WITH A DPDT SWITCH

BEFORE THIS TEST CAN BE RUN THE CONSOLE UART,TTY,TUS8 MUST BE AT
THE SAME BAUD RATE. THE CONSOLE AND TUSB UART,AND THE TTY SHOULD BE

SET UP WITH THE SAME STOP BIT SETTING,

WITH PARITY INHIBITED AND WITH A WORD LENGTH OF 7 OR 8 BITS
FOR MORE INFORMATION SEE THE MFM PRINTS AND THE WRAP AROUND
CABLE DRAWING NUMBER: 7016942

777
778
779
780
781
782
783

.
i
)

ouTPUT

INPUT

ouTpPuT

222

2222220022222 AR

R AR AR

R Rl

CIOLDFO DLiT-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:3¢

PAGE 15

SEQUENCE 20

822
829
833
837

841

842
849
850
856
866
878
879
880

881
882
883

MCALL
.MCALL

. STYPE,.STYPOC,.STRAP
.SETUP,STARS,PUSH,POP,SETUP,
.EQUIV, .SERRTYP

.MCALL
.SBTTL

.EQUAT
BASIC DEFINITIONS

LMCALL
.MCALL

884
885

.SAPTHDR, .$APTBLS,.$ACT11, . $SCOPE
.SCMTAG, .SEOP,.SREAD

001100

;*INITIAL ADDRESS OF THE STACK POINTER #«+ 17100 #ee
STACK=
1100

000011
000012
000015
000200
177776

;*MISCELLANEOUS DEFINITIONS
HT=
1
;. CODE FOR HORIZONTAL TAB
LF=
12
., CODE FOR LINE FEED
(R=
15
;. CODE FOR CARRIAGE RETURN
CRLF=
200
;;CODE FOR CARRIAGE RETURN-LINE FEED
PS=
177776
; :PROCESSOR STATUS WORD

104000
000004

177776

177774
177772
177570
177570

000000

000001
000002
000003
000004
000005
000006
000007
000006
000007

000000
000040
000100
000140
000200
000240
000300
000340
100000

040000
020000

ERROR=EMT
SCOPE=]0T

PSW=PS

STKLMT= 177774
;s STACK LIMIT REGISTER
PIRQ=
177772
: ;PROGRAM INTERRUPT REQUEST REGISTER
DSWR=
177570
; ;HARDWARE SWITCH REGISTER
ODISP=
177570
. ;HARDWARE DISPLAY REGISTER
s *GENERAL PURPOSE REGISTER DEFINITIONS

RO=

R1=
R2=
R3=
R4=
RS=
R6=
R7=
SP=
PC=

X1
X2
X3
T4
15
X6
X7
X6
X7

PRO=
PR1=
PR2=
PR3=
PR&=
PRS=
PR6=
PR7=

0
40
100
140
200
240
300
340

Swié=
sw13=

40000
20000

;s GENERAL REGISTER

s ;GENERAL REGISTER
;s GENERAL REGISTER
; ;GENERAL REGISTER
: :GENERAL REGISTER
: ;GENERAL REGISTER
;s GENERAL REGISTER
: sGENERAL REGISTER
s :STACK POINTER
. . PROGRAM COUNTER

;*PRIORITY LEVEL DEFINITIONS

;;PRIORITY
::PRIORITY
;;PRIORITY
;;PRIORITY
;PRIORITY
;;PRIORITY
;PRIORITY
;PRIORITY

LEVEL
LEVEL
LEVEL
LEVEL
LEVEL
LEVEL
LEVEL
LEVEL

;¢ 'SWITCH REGISTER"' SU[TCH DEFINITIONS
Sw15=
100000

0
1
2
3
&
5
6
7

CIDLDFO DLi1=-W/1144 MFM SLU

BASIC DEFINITIONS

MACRO M1113

05-NOV-80 12:32

010000
004000
002000
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001
001000
000400
000200
000100
000040
000020
000010
000004
000002
000001

Swi2=
SWil=
Swi0=
sw09=
Sw08=
swo7=
Swo6=
SWi5=
SWo4=
Swo3=
Sw02=
Swo1=
Swo0=

100000
040000
020000
010000

BIT15=
BIT14=
BIT13=
B1T12=

BIT11=
BIT10=
BIT09=
B81708=
BIT07=
BIT06=

000004
000002
000001
001000

BIT02=
BITO1=
8I1T00=

000400
000200
000100
000040
000020
000010
000004
000002
000001
000004
000010

000014

SEQUENCE 21

10000
4000
2000
1000
400
200
100
40
20
10
4
2
1
SW9=Sw09
Sw8=5w08
SW7=5w07
SW6=SW06
SW5=SW05
SW4=SW04
SW3=5w03
SW2=5w02
SW1=Sw01
SW0=5w00

;*DATA BIT DEFINITIONS (BITOO TO BIT15)

004000
002000
001000
000400
000200
000100

000040
000020
000010

[
2
PAGE 15-1

BIT05=
BITO4=
BITO3=

100000
40000
20000
10000

4000
2000
1000
400
200
100
40
20
10
&
2
1
BIT9=BIT09
B178=B1108
BIT17=B1T107
BIT6=BIT06

BIT5=BIT0S
BIT4=B]T04
BIT3=BIT03
BIT2=B1T02
BIT1=B81T01
B170=B1100

;*BASIC "'CPU'' TRAP VECTOR ADDRESSES

ERRVEC= &
RESVEC= 10

TBITVEC=14
TRTVEC= 14

;. TIME OUT AND OTHER ERRORS
¢ ;RESERVED AND ILLEGAL INSTRUCTIONS

2T BIT
. TRACE TRAP

CIOLDFO DLI1-W/1144 MFM SLU

BASIC DEFINITIONS

895

000000

892
ggz

896

MFPT=7
ABASE=
AVECT1=
AUSWR=
$TN=
$SWR=

BPT=

000003

: :PROGRAM INTERRUPT REQUEST VECTOR

176500
300
400
1
161000

000003

;*SEQUENCE TO CATCH ILLEGAL TRAPS & INTERRUPPTS

;«LOCATION O CONTAINS O TO CATCH IMPROPERLY LOADED VECTORS

909

000014

8}; 000016

000340

=14

CATCH

014412

.WORD
.WORD

340

913
914 000042

000042
00000C

.=
.WORD

42
0

920
921 000174
gg% 000176

000174
000000
000000

.=
DISPREG:.WORD
SWREC
.WORD

174
0
0

924

000200

925 000200
926 000204
927 000210

:THIS IS THE COMMAND FOR A TRAP
THROUGH 14 (BPT TRAP)
;.

:*ALL UNUSED LOCATIONS FROM &4=776 CONTAIN A '',+2,BPT''

ggg

915
916
Y18
919

SEQUENCE 22

.=0

898

910 000014

PAGE 15-2

;;fittt"tt't't'i'i"'t"'ttttt't"Qttttttfitttt'ttttttt"'tt'tt'tt

897

908

; :BREAKPOINT TRAF (BPT)
:: INPUT/OUTPUT TRAP (10T) #«SCC Ewe
::POWER FAIL
; ;EMULATOR TRAP (EMT) #*ERRORe**
;" '"TRAP'' TRAP
::TTY KEYBOARD VECTOR
::T7Y PRINTER VECTOR

PIRQVE(C=240

000240

000007
176500
000300
000400
000001
161000

05-NOV-80 12:32

BPTVEC= 14
I0TVEC= 20
PWRVEC= 24
EMTVEC= 30
TRAPVEC=34
TKVEC= 60
TPVEC= 64

000014
000020
000024
000030
000034
000060
000064
886
887
888
889
890
891

MACRO M1113

000137
000137
000137

003046
017170
017410

.=200

JMP
JMP
JMP

START
ECHO
QUTTST

;THE BPT TRAP VECTOR POINTS TO THE

;

ILLEGAL TRAP HANDLER '‘CATCH"

;D0 INTERFACE TEST
:00 ECHO TEST
;D0 OUTPUT TEST TO TERMINAL

CI0LDFO DLI1=W/1144 MFM SLUY

BASIC DEFINITIONS

929
930

000500

MACRO M1113

(05-NOV-80 12:32

SBTTL

PAGE 16

SEQUENCE 23

.z
500
ACT11 HOOKS

; :""'."""fi"."""""""'"""."'.".'..""'.'..""'.

00050C

"HOOKS REQUIRED BY ACT11

$SVPC=.

-SAVE PC

838523

$ENDAD

.:1)SET LOC.46 TO ADDRESS OF SENDAD IN .SEOP

000052 000000

'WORD

000046

000500

246

"Z$SVPC

2:2)SET LOC.52 TO ZERO
" “RESTORE PC

CIOLDFO DLI1-W/1144 MFM SLU

APT

PARAMETER BLOCK

932

MACRO M1113

05-NOV-80 12:32

.SBTTL

PAGE 17

SEQUENCE 24

APT PARAMETER BLOCK

;;tt't"'t"i"'t"'t"'"t""'QQ'Qt'i""""'."'Q"""".'t'

;SET LOCATIONS 24 AND &4 AS REQUIRED FOR APT

;;t"tt'""0"""""'i'"""'t""t""'t"""""""t""t

000024
000044

000500
000024
000200
000044
000500

000500

.$X=.
.=24
200
.=bd
SAPTHDR
.9X

;;SAVE CURRENT LOCATION
;sSET POWER FAIL TO POINT TO START OF PROGRAM
;.FOR APT START UP
:;POINT TO APT INDIRECT ADDRESS PNTR.
;;POINT TO APT HEADER BLOCK
;;RESET LOCATION COUNTER

'tt"t't"t""""t""'i""t't'.""tt"i"ti'."'t.'.t"t"

SETUP APT PARAMETER BLOCK AS DEFINED IN THE APT-PDP11 DIAGNOSTIC

000500

000500
000502
000504
000506
000510
000512

000000
001066
000050
000060
000055
000030

. INTERFACE SPEC.
$APTHD:

$HIBTS: .WORD
SMBADR: .WORD
$TSTM:
_WORD
$PASTM: .WORD
SUNITM: _WORD
.WORD

O
::TWO HIGH BITS OF 18 BIT MAILBOX ADDR.
SMAIL
;;ADDRESS OF APT MAILBOX (BITS 0-15)
50
;;RUN TIM OF LONGEST TEST
60
:sRUN TIME IN SECS. OF 1ST PASS ON 1 UNIT (QUICK VERIFY)
55
;;ADDITIONAL RUN TIME (SECS) OF A PASS FOR EACH ADDITIONAL UNILT
SETEND-$MAIL/2 ;;LENGTH MAILBOX-ETABLE (WORDS)

MACRO M1113

CIOLDFO DL 1-w/1144 MFM SLU

COMMON TAGS
934

05-NOV-80 12:32

SBTTL

M2
PAGE 19 SEQUENCE 25

COMMON TAGS

tt'lt't'tt"'t""""'t""t""'t"'Q""'t"'."""""""

001000
001000
001002
001003
001004
001006
001010
001012
001014
001015
001016
001020
001022
001024
001026
001030
001032
001034
001035
00103y
001040
001042
001044
001046
001050
001052
001054
001055

001056
001057

001060
001062
001063
001064

;*THIS TABLE CONTAINS VARIOUS COMMON STORAGE LOCATIONS
:*JSED IN THE PROGRAM,
=1000
$CMTAG:
;s START OF COMMON TAGS
WORD
0
$TSTNM: .BYTE
0
:sCONTAINS THE TEST NUMBER
SERFLG: .BYTE
0
: sCONTAINS ERROR FLAG
$ICNT:
.WORD
O
;s CONTAINS SUBTEST ITERATION COUNT
SLPADR: .WORD
0
;s CONTAINS SCOPE LOOP ADDRESS
SLPERR: .WORD
0
:sCONTAIN> SCOPE RETUKY FOR ERRORS
SERTTL: .WORD
0
;s CONTAINS TOTAL ERRCRS DETECTED
SITEMB: .BYTE
O
;;CONTAINS ITEM CONTROL BYTE
SERMAX: .BYTE
1
;s CONTAINS MAX. ERRORS PER TEST

001000
00000

000
000
000000
000000
000000
000000
000
001
000000
000000
000000
000000
000000
000000
000000
000
000
000000
177570
177570
177560
177562
177564
177566
000
002

$ERRPC:
$GDADR:
$BDADR:
$GDDAT:
$BODAT:

$AUTOB:
$INTAG:

.WORD
.BYTE
.BYTE
WORD

SWR:
.WORD
DISPLAY: .WORD
$TKS:
177560
$TKB:
177562
$TPS:
177564
$TPB:
177566
$NULL:
.BYTE
$FILLS: .BYTE

012
000

000000
077
015
012

.WORD
,WORD
.WORD
.WORD
.WORD
WORD

$FILLC: .BYTE
$TPFLG: .BYTE

000

SESCAPE:0
$QUES:
.ASCII
$CRLF:
LASCII
SLF:
LASCIZ

O
O
0
0
0
0

; ;CONTAINS PC OF LAST ERROR INSTRUCTION
;s CONTAINS ADDRESS OF 'GOOD' DATA
;s CONTAINS ADDRESS OF 'BAD' DATA
;s CONTAINS 'GOOD' DATA
;s CONTAINS 'BAD' DATA
: ;RESERVED--NOT TO BE USED

0
0
0
O

:;AUTOMATIC MODE INDICATOR
;s INTERRUPT MODE INDICATOK

DSWR
DDISP

O
2

; ;ADDRESS OF SWITCH REGISTER
: sADDRESS OF DISPLAY REGISTER
;. TTY KBD STATUS
;. TTY KBD BUFFER
;;TTY PRINTER STATUS REG. ADDRESS
;:TTY PRINTER BUFFER REG. ADDRESS
;s CONTAINS NULL CHARACTER FOR FILLS
:sCONTAINS # OF FILLER CHARACTERS REQUIRED

/?/
<1%>
12>

:;ESCAPE ON ERROR ADDRESS
s sQUESTION MARK
:: CARRIAGE RETURN
s LINE FEED

12
O

;s INSERT FILL CHARS, AFTER A ''LINE FEED'’
3" TERMINAL AVAILABLE'' FLAG (BIT<07>=0=YES)

::"t".ttt'fi't'iiit'i"'t"'ii't"tfi"tt'ittittttti'tttiitfitlttt

.SBTTL

APT MAILBOX-ETABLE

;;itt'tt.filti""""t't"'tit""i'tt'tttttttttlti'tt'ittii!i"t

001066
001066
001070
001072
001074
001076
001100
001102

001104
001106
001106
001107
001110

.EVEN

000000
000000
000000
000000
000000
000000
000000

000000
000
000
000000

SMAIL:
$MSGTY: .WORD
SFATAL: .WORD
$TESTN: .WORD
$PASS:
.WORD
$DEVCT: .WORD
SUNIT:
_WORD
$MSGAD: .WORD

$MSGLG: .WORD
SETABLE:
$ENV:
.BYTE
$ENVM:
_BYTE
$SWREG: .WORD

AMSGTY
AFATAL
ATESTN
APASS
ADEVCY
AUNIT
AMSGAD

;s APT MAILBOX
;;MESSAGE TYPE CODE
;;FATAL ERROR NUMBER
;;TEST NUMBER
;;PASS COUNT
;;DEVICE COUNT
;:1/0 UNIT NUMBER
; ;MESSAGE ADDRESS

;;MESSAGE LENGTH
;s APT ENVIRONMENT TABLE
AENV
; ENVIRONMENT BYTE
AENVM ; ENVIRONMENT MODE BITS
ASWREG ;:APT SWITCH REGISTER

AMSGLG

001114

000400

000000

$USWR:
$CPUOP:

.WORD
.WORD

N
2
PAGE 19-1

AUSWR
ACPUOP

AMS1:
TYP1:

.BYTE
.BYTE

AMAMS?
AMTYR

i e

000
000

XX e

GRS
s e

]

001116
001117

001120

000000

$MADR1:

.WORD

AMADR1

001122
001123
001124
001126
001127
001130
201132
001133
001134
001136
001140
001142
001144

001146

000
009
000000
000
000
000000
000
000
000000
000300
000000
176500
000000

SMAM2S:
SMTYPZ:
$MADRZ:
$MAMSI:
SMTYP3:
$MADR3:
$MAMSS¢
SMTYPL:

$SMADRG:

SVECT1:
SVECTZ:
$BASE:
$DEVM:
$SETEND:
MEX]T

.BYTE
.WORD
.BYTE
.WORD
.BYTE
.BYTE
.WORD
.WORD
.WORD
.WORD
.WORD

AMAMS?2
AMTYP?
AMADR2
AMAMS3
ANTYP3
AMADR3
AMAMSL
AMTYP4
AMADR4

AVECT1
AVECT?

ABASE
ADEVM

SEQUENCE 26

001112

05-NOV-80 12:32

Bl
Bl
BI

10=R

1/05=02,11/20=03,11/40=04,11/45=05
00=07,0=10
oCK

~—

APT MAILBOX-ETABLE

MACRO M1113

~OSNHrVOX
— NC—m
BOO
=W
MO~
= — 0O
«- s <2
S P—2VDWN

CIDLDFO DLi1-W/1144 MFM SLU

9=f
ING POINT PROCESSOR
8=MEMORY MANAGEMENT

HIGH ADDRESS,M.S. BYTE
MEM. TYPE,BLKM
===
(HIGH BYTE)
ME M.TYPE BYTE
900 NSEC CORE=001

300 NSEC BIPOLAR=002
S00 NSEC M0S=003

;sHIGH ADDRESS,BLKM

MEM.LAST ADDR.=3 BYTES,THIS WORD AND LOW OF ''TYPE'' ABOVE
::HIGH ADDRESS,M.S. BYTE

JMEM.TYPE ,BLK#?

s ;MEM,.LAST ADDRESS,BLK#?2
:sHIGH ADDRESS,M.S.BYTE
::MEM_ TYPE,BLKAZ

ssMEM_LAST ADDRESS,BLK#3
:sHIGH ADDRESS,M.S.BYTE

s :MEM.TYPE ,BLK#G

s sMEM, LAST ADDRESS,BLK#4
:: INTERRUPT VECTOR#1,BUS PRIORITYM
:: INTERRUPT VECTOR#Z2BUS PRIORITYN?2
:;BASE ADDRESS OF EQUIPMENT UNDER TEST
;;DEVICE MAP

CI0LDFO DLiT=W/1144 MFM SL

ERROR POINTER TABLE

MACRO M1113

05-NOV-80 12:32

.SBTTL

PAGE 20

SEQUENCE 27

ERROR POINTER TABLE

;*THIS TABLE CONTAINS THE INFORMATION FCR EACH ERROR THAT CAN OCCUR.
;*THE

INFORMATION

IS OBTAINED BY USING THE

INDEX NUMBER FOUND

:*LOCATION SITEMB. THIS NUMBER INDICATES WHICH ITEM IN THE TABLE [S PERTINENT.
IF SITEMB IS O THE ONLY PERTINENT DATA |5 (SERRP().
EACH JTEM IN THE TABLE CONTAINS & POINTERS EXPLAINED AS FOLLOWS:
J*NOTEZ:
.9
EH
;;POINTS TO THE ERROR MESSAGE
v
DM
;;POINTS TO THE DATA HEADER
‘e
0T
;POINTS TO THE DATA
"O
DF
;.POINTS TO THE DATA FORMAT

;eNOTEY:

SERRTB:
.SERRTB:

001146
001146
001146
001150
001152
001154

017474
023655
024434
000000

001156
001160
001162
001164

017520
023702
024444
000000

EM2
DHZ

001166
001170
001172
001174

017544
023655
024434
000000

EM3
DH1
T
0

:"'TCSR DONE NOT CLEARED WITH TBUF FULL"'

001176
001200
001202
001204

017611
023655
024434
000000

EMé
DH1
T
0

;'TCSR DONE NOT SET"

J'TESTH ERR PC
T(SR"
;STESTN,SERRPC,TCSR

017633
023655
0244 &
00000C

EMS

:TCSR DONE

017670
02372°
02445+
000000

EM6
DH6

EM1
DH1
b1
0

D12
0

DH1
DT

DTé
0

:"'CAN NOT ACCESS TCSR'
;'TESTA ERR PC T(SR''
TCSR
:STESTN,SERRPC,

:'"CAN NOT ACCESS TBUF'

TBUF"
;"'TESTH ERR PC
TBUF
;STESTN,SERRPC,

JUTESTH ERR PC
TCSR"
JOTESTN,SERRPC,TCSR

NOT

;'TESTH ERR PC

SET WITH RESET

T(CSR"

+STESTN,SERRPC,TCSR

:"'CAN NOT ACCESS RCSR''
;'TESTH ERR PC RCSR"
PC
,RCSR
;STESTN,$ERR

CI0LDFO DLI1=-w/1144 MFM SLU
ERROR POINTER TABLE

MACRO M1113

05-NOV-80

12:3¢

3
¢
PAGE 21
SEQUENCE 28

;"'CAN NOT ACCESS RBUF'

9¢7 001232
968 001234

017714
023754
0246464
000000

EM?
DH?
D17
0

001236
001240
001242
001244

17740
024001
0246474
000000

EM10
DH10
D110
0

;" CAN NOT ACCESS LKS"
JU'TEST® ERR PC LKS''

001246
001250

017763
023655
024434
000000

EM11
DH1

:"BITO OF TCSR NOT CLEAR AFTER RESET"

sSTESTN,SERRPC,TCSR

001256
001260
001262
983 001264
984
985 001266
986 001270
987 001272
001274

020026
023655
026434
000000

Em2

;"'CAN NOT SET BITO OF T(SR"
;"'TESTH® ERR PC T(CSR"

020057
023655
026434
0006000

EM13

001276
001300
001302

EM14

001304

020112
023655
024434
000000

001306
001310
001312
001314

965 001226
966 001230

969
970
9
972
973
974
975
970
977
978
979
980
981
982

1005
1006
1007
1008

001252
001254

DH1
DT
0

DHY
0T
0

;'TESTA ERR PC

RBUF'"'

F
PC
,RBU
;STESTN,SERR

;STESTN,SERRP(,LKS

;"'TEST® ERR PC

TCSR

;$TESTN,SERRPC,TCSR

:"'CAN NOT CLEAR BITO OF TCSR''
;"'TEST# ERR PC

T(SR"

;STESTN,SERRP(C,TCSR

JU'RESET DID NOT CLEAR BITO OF T(SRTM

DH1

TCSR"
;'TESTH ERR PC
SSTESTN,SERRPC,TCSR

020153
023655
0246434
000000

EM1S

;'BIT2 OF TCSR NOT CLEAR AFTER RESET"

001316
001320
001322
001324

020216
023655
0244 34
000000

EM16
DH1
DT

T(CSR"
;"'TESTH ERR PC
;STESTN,SERRPC,TCSR

001326
001330
001332
001334

020247
023655
024434
000000

EM17
DH1
011

TCSR"
;'TESTAH ERR PC
;STESTN,SERRPC,TCSR

pT1
0
DH1
DT

;'TESTAH ERR PC

TCSR"

;STESTN,SERRPC,TCSR

:"'CAN NOT SET BIT2 OF T(SR"

;""CAN NOT CLEAR BIT2 OfF T(SR"

CZ0LDFO DLT1-W/1144 MFM SLU
ERROR POINTER TABLE

MACRO M1713

05-NOV-80 12:32

0
3
PAGE 22
SEQUENCE 29

0 001340
001342
001344

020302
023655
024434
000000

EmM20
DH1
DT
0

;"'RESET DID NOT CLEAR BIT2 OF

001346
001350
001352
001354

L 20343
023655
024434
000000

EM
DH1
DT
0

;'BIT6 OF TCSR NOT (LEAR AFTER RESET?
;'TEST# ERR PC T(SR"

001356
001360
001362
001364

020406
023655

EM22
DH1
DT
0

;STESTN,SERRPC,TCSR

1024
1025
1026
1027

001366
001370
001372
001374

020443
023655
024434
000000

EM23
DH1

J"'TESTH ERR PC

1029
1030
1031
1032
1033
1034
1035
1036

001376
001400
001402
001404

020474
023655
026434
000000

EM24
DH1

;"'TESTH ERR PC

001406
001410
001412

EM25

;"'RESET DID NOT CLEAR BIT6 OF T(SRTM

1037 001414

020527
023655
024434
000000

001416
001420
001422
001424

020570
023727
024454
000000

001426
001430
001432
001434

020633
023727
024454
000000

001436
001440
001442

020672
023727
024454
000000

1
1

1
1
1

NN —

e ead oD e

= O 000 ~NO NS

o PORIN) —P ek cd e

1
1
1

[ofelolelelelolololelololole]

1009 001336

1038
1039
1040
1061
1042
1 043

1 044
1
5
1 046
1 047 7
1 048
1 049 9
1 (30
1 051

1 052 001444

024434
000000

0T
0

;''TESTA ERR PC
T(SR''
;STESTN,SERRPC,TCSR

TCSR'

;STESTN,SERRPC,TCSR

;'XMIT INTERRUPT WITH PRIORITY 7'
;"'TESTH ERR PC TCSR"
;"'CAN NOT SET BIT6 OF TCSR"
T(CSR"

;STESTN,SERRPC,TCSR

:"'CAN NOT CLEAR BITé OF TCSR"
TCSR"

;STESTN,SERRPC,T(SR

DH1
oM

T(SR"
;"'TESTH ERR PC
R
ERRPC,TCS
;STESTN,S

EM26

;'BIT6 OF RCSR NOT CLEAR AFTER RESET'
;"'TESTH# ERR PC R(SR"

DH6
D16
0

EM27

DH6
D16
0

EM30
DH6
D16

PC
,RCSR
;STESTN,SERR

;''RCVR INTERRUPT WITH PRIORLTY 7%
;"'TESTH ERR PC RCSR"
;$TESTN,SERRPC,RCSR

:"'CAN NOT SET BIT6 OF RCSR"
;"'TEST# ERR PC R(SR"

,RCSR
;STESTN,SERRPC

CIOLDFO DL11=-W/1144 MFM SLU
ERROR POINTER TABLE

MACRO M1113

05-NOV-80 12:32

E_3
PAGE 23 SEQUENCE 30

:"'CAN NOT CLEAR BIT6 OF RCSR''

020723
023727
024454
000000

EM31
DHé
DT6
0

;'TEST# ERR PC

020756
023727
024454
000000

EM32

DHé
DTé

;"'CAN NOT CLEAR BIT6 OF RCSR WITH RESET?

1063 001466

001470
001472
001474

021024
024001
024474
000000

EMS3
DH10
DT10
0

001476
001500
001502
001504

021066
024001
024474
000000

EM34
DH10
DT10

;"'LKS INTERRUPT WITH PRIORITY 7°
;U'TESTH ERR PC LKS''

1074 001510
1075 001512
1076 001514

021124
024001
024474
000000

EM3S
DH10
DT10

;''CAN NOT SET BIT6 OF LKS'
;'TEST# ERR PC LKS''

1079 001520
1080 001522
1081 001524

021154
024001
024474
000000

EM36
PH10
DT10
0

:"'CAN NOT CLEAR BIT6 OF LK3"
;'TEST# ERR PC LKS"

EM37
DH10
D110

;"'RESET DID NOT CLEAR BIT6é OF LKS''

1086 001534

021206
024001
024474
000000

021246
024025
024504
000000

EM4O
DH4O
D140
0

:"'DUAL ADDRESSING ERROR'
BAD"'
;"'TESTH ERR PC GOOD

021274
024001
0246474
000000

EM4T
DH10
D110
0

;'BIT7 OF LKS NOT SET AFTER RLSET?
;U'TESTH ERR PC LKS"

1053 001446
1054 001450

1055 001452
1056 001454

1057
1058 001456
1059 001460
1060 001462
1061 001464
1062

1064
1065
1066
1067
1068
1069
1070
1071

1072
1073 001506

1677
1078 001516

1082
1083 001526
1084 001530
1085 001532

1087
1088 001536
1089 001540
1090 001542
1091 001544
1092
1093 001546
1094 001550
1095 001552
1096 001554

RCSR"

;STESTN,SERRPC,RCSR

RCSR"
;'TESTH# ERR PC
PC
,RCSR
;STESTN,SERR

;'BIT6 OF LKS NOT CLEAR AFTER RESET''

JU'TEST# ERR PC
LKS''
;STESTN,SERRPC,LKS

;STESTN,SERRPC,LKS

:$TESTN,SERRPC,LKS

J'TESTAH ERR PC LKS"
;STESTN,SERRPC,LKS

;STESTN,SERRPC,$GDADR,$BD(SR

;$TESTN,SERRP(C,LKS

CIOLDFO DLi1-W/1144 MFM SLU

ERROR POINTER TABLE

MACRO M1113

05-NOV-80 12:32

1097 001556
1098 001560

021334
024001

EMéL2
DH10

:}8? 001564

000000

1099 001562

024474

0710

fF
3
PAGE 24
SEQUENCE 31

;"'CAN NOT CLEAR BIT? OF LKS"
;'TESTA ERR PC
LKS"
;STESTN,SERRPC,LKS

1102 001566
1103 001570
1106 001572

021366
02400
024474

EM43
DH10
DTi0

:'BIT7? OF LKS DOES NOT SET"
J'TESTAH ERR PC
LKS''
;$STESTN,SERRPC,LKS

1107 001576
1108 001600
1109 001602

021417
024001
024474

EM4S
DH10
DT10

;"'RTC INTERRUPT AT PRIORITY 7"
J'TESTH ERR PC
LKS"
;STESTN,SERRP(C,LKS

1112
1113
11146
};}2

001606
001610
001612
001614

021453
024001
024474
000000

EM4S
DH10
D110
0

;''RTC_INTERRUPTS WHEN DISABLED'
;"'TESTH ERR PC
LKS"
;STESTN,SERRPC,LKS

1117 001616
1118 001620

021510
024001

EMé&S
DH10

;''RTC INTERRUPT DID NOT OCCUR'
;'TESTA ERR PC
LKSTM

}}%9 001624

000000

1122 001626
1123 001630

021510
024001

EM&7
DH10

}}32 001634

000000

}}82 001574

}}}? 001604

1119 001622

1124 001632

00000C

000000

024474

0T10

024474

DT10

1127 001636

021544

EMSO

}}g? 001644

000000

1128 001640
1129 001642

024001
024474

DH10
pT10

;$TESTN,SERRPC,LKS

;"'RTC INTERRUPT DID NOT OCCUR'
J'TESTH ERR PC
LKS''
;$TESTN,SERRPC,LKS

;''RTC DOUBLE

INTERRUPT"

J'TESTA ERR PC
LKS''
sSTESTN,SERRPC,LKS

1132 001646
1133 001650
1134 001652
}}gg 001654

021571
024001
024474
000000

EMST
DH10
0110
0

;''RESET DID NOT CLEAR RTC
;'TESTH ERR PC
LKS"
;$TESTN,SERRP(C,LKS

1137 00165¢

021621

EMS?

;"RTC INTERRUPT DID NOT CLEAR WITH BIT7 OF LKS"

1139 001662
1140 001664

024474
000000

DT10
0

;STESTN,SERRPC,LKS

1138 001660

024001

DH10

;'TESTH ERR PC

LKS"

INTERRUPT'

CIOLDFO DLIT=W/1144 MEM SLU
ERROR POINTER TABLE

MACRO M1113

05-NOV-80

12:3¢

PAGE

SEQUENCE 32

021676
024061
024516
000000

£ M$
0 HS
0 TS5
0

001676
001700
001702
001704

021722
023655
024434
000000

EM5¢4
DH1

001706
001710
001712
001714

022060
023655
024434

001716
001720
001722
001724

02176C
023655
024434

000000

DH1
b11
0

001726
001730
001732
001734

022016
023655
026434
000000

EM57
DH1
DT
0

001736
001740
001742

001744

022060
023655
024434
000000

EM60
DH1
pT

001746
001750
001752
001754

022107
023655
024434
000000

EM6T
DH1
DT

;U'XMIT RE-INTERRUPTED''
;"'TESTA ERR PC T(CSR"

001756
001760
001762
001764

022133
023655
024434
000000

EM62
DH1
DT

:"'LOADING TBUF DID NOT CLEAR INTERRUPT''
;'TESTH ERR PC TCSR"

001766
001770
001772
001774

022200
023727
024454
000000

EM63

:"'RCVR ACTIVE NOT SET"
;'TESTH ERR PC R(SR"

000000

001670
001672
001674

001666

;'TESTH ERR PC

LKS

(NT

(NT2"

SOTESTN,SERRPC,LKS,FIRST,SECND

;'XMIT INTERRUPTS WHEN DISABLED''
;'TESTH ERR PC
TCSR"
;STESTN,$ERRPC,TCSR

EMS5S

;'XMIT DID NOT INTERRUPT'
;U'TESTH ERR PC TCSR"
;STESTN,SERRPC,T(SR

EM56

;'XMIT INTERRUPT AT PRIORI[TY 7'

DH1
M
0

DH6
D16

;"'TESTH ERR PC

T(CSR'

;STESTN,SERRPC,TCSR

:'XMIT INTERRUPTS WITH ENABLE CLEAR''
;"'TESTA ERR PC

TCSR"

;STESTN,SERRPC,TCSR

;'XMIT DID NOT INTERRUPT'

;U'TESTH ERR PC TCSRTM
;STESTN,SERRPC,TCSR

;STESTN,SERRPC,TCSR

;$TESTN,SERRPC,TCSR

PC
,RCSR
;STESTN,SERR

PAGE 26

SEQUENCE 33

;"'RECEIVER DOME NEVER SET"

DH6
DTé

;"'TEST# ERR PC

002006
002010
002012
002014

022250
023727
024456
000000

EM6S

;"'RCVR ACTIVE NOT CLEARED WITH DONE SET?

002016
96 002020
002022
002024

022316
023727
024454
000000

DHé
DTé
0

022354
023727
024454
000000

DH6
DT6
0

o] oo ~NOo~

N LAV LSET o
el

S e
R
S

05-NOv-80C 12:3¢
EMb4

bbb D e b b D
D
b
~O <O O O O 00 0o 0o Co OB

S
DI S

MACRO M1113

022226
023727
024654
000000

5 001776
002000
002002
002004

99
00 002026

POPON) =

CI0LDFO DLI1-wW/1144 MFM SLU
tERROR POINTER TABLE

002030
002032
002034

RCSR''

;STESTN,SERRPC,RCSR

;"'TEST# ERR PC

RCSR"

DH6
DT6

;STESTN,SERRPC,RCSR

EM66

;"'RESCT DID NOT CLEAR RCVR DONE'’

EM67

;"'TESTA ERR PC

RCSR"

PC
,RCSR
;STESTN,SERR

:"'RDR ENABLE SET DID NOT CLEAR RCVR DONE'’
;"'TESTH ERR PC
RCSR"
,RCSR
;STESTN,SERRPC

;"'READING RBUF DID NOT CLEAR RCVR DONE'’

002030
002040
002042

EM70

002044

022617
023727
024454
000000

002046
002050
002052
002054

022464
023727
024454
000000

EM71

002056
002060
002062
002064

022633
023727
024454
000000

EM72
DH6
DTé
0

;STESTN,SERRPC,RCSR

002066
002070
002072
002074

022526
023727
024456
000000

EM73

:"'RCVR INTERRUPTS AT PRIORITY 7'

22
225 002076
226 002100
227 002102
228 002104

022564
023727
026454
000000

DHé
DT6
0

DH6
DT6

;'TESTH ERR PC

RCSR"'

;STESTN,SERRPC,RCSR

;"'RCVR INTERRUPTS WITH ENABLE CLEAR"

;"'TEST# ERPR PC

RCSR"

,RCSR
;STESTN,SERRPC

:"RCVR DID NOT INTERRUPT'
;'TESTHA ERR PC RCSR"

;'TEST# ERR PC

RCSR"

DH6
D16

,RCSR
;STESTN,SERRPC

EM74

;"'RCVR INTERRUPT REQUEST PASSED WITH ENABLE CLEAR'

DH6
D16

;'TEST# ERR PC

RCSR"

,RCSR
;STESTN,SERRPC

CIOLDFO DLi1-W/1144 MFM SLU
ERROR POINTER TABLE

MACRO M1113

05-NOV-80 12:32

1.3
PAGE 27 SEQUENCE 34

;''RCVR DID NOT INTERRUPT'
;'TEST# ERR PC R(SR"

EM76
DH6

;"'RECEIVER RE=-INTERRUPTED"'
;''TESTA ERR PC RCSR"

EM77
DH6

;"'READING RBUF DID NOT CLEAR INTERRUPT"
;''TEST# ERR PC RCSR"

002134

022706
023727
024454
000000

002136
002140
002142
002144

022753
023727
024454
000000

EM100
DHé

;''RTSET DID NOT CLEAR RCVR [NTERRUPT''
;'TESTH ERR PC RCSR''

002146
002150
002152
002154

023016
023727
024454

EM;01

;'""OR" FLAG DID NOT SET"

8T6

;$TESTN,SERRPC,RCSR

002156
002160
002162

EM102
DH6

;'""ERROR' NOT SET WITH °'OR' FLAG"
;'TESTH ERR PC RCSR"

002164
002166
002170
002172
002174

023044
023727
024454
000000
023103
024126
024532
000000

002176
002200
002202
002204

002206
002210
1270 002212
12N 002214

O VOO NO VNN
O

~nNo

NO NS W= O
S OOV

Y
S
P
S
[
D
d
D srd o
)
D
D o
d ad

AR NN NLALRINI
NI PONON)
[0 Yo JV, AV IV IV IV 1V, 1V, TV LV, IV, ]

—d

?NNNNNNNNNN
AN AN N NN NN N NN ~N
L)

EM75
DH6

{ —

022633
023727
024456
000000
022662
023727
024454

000000

8T6

;STESTN,SERRPC ,RCSR

;STESTN,SERRPC,RCSR

;STESTN,S$ERRP{ ,RCSR

8T6

;$TESTN,SERRPC ,RCSR

EM103
DH103

;"BREAK DID NOT TRANSMIT ALL ZEROES'
;U'TESTH ERR PC RCSR DATA"

023141
023727
024454
000000

EM104
DHé

;"'BREAK DID NOT SET FRAMING ERROR'
;'TEST# ERR PC R(SR"

023176

EM105
DH105

;"'DATA COMPARE ERROR''
;'TESTH ERR PC RCSR GOOD

024163
024544
000000

8T103

8T6

8T105

;STESTN,SERRPC ,RCSR,$BDDAT

;STESTN,SERRPC,RISR

SSTESTN,SERRPC,RCSR,GD,BD

BAD''

CIOLDFO DL 1-W/1144 MFM SLU

ERROR POINTER TABLE
1272 002216
023221
1273 002220
024163

—

1274 002222
1275 002226
1276
277 002226

278 002230
279 002232

1280 002234

1281

1282
1283
1284
1285

002236
002240
002242
002244

1286
1287 002246

1288 002250
1289 002252
1290 002254

1291
1292 002256
1293 002260
1294 002262
1295 002264
1296
1297 002266
1298 002270
1299 002272
1300 002274
1301
1302 002276
1303 002300
1304 002302
1505 002304

MACRO M1113

05-NOV-80 12:32

024544
000000

SEQUENCE 3¢

EM106
DH10S
DT105

;"'LOOP-BACK DATA (OMPARE ERROR'

EM107

:'TIMEOUT IN EXERCISER TEST"
;"'TESTH ERR PC RCSR"

;"'TESTH ERR PC
RCSR
6000
;STESTN,SERRPC,RCSR,GD,BD

023256
023727
024454

PAGE 28

DHé

BAD"'

;STESTN,SERRP(C,RCSR

000000

;"'INCORRECT REZEIVE COUNT

023310
024227
024560
000000

;"'TESTH ERR PC
RCSR
TRANS
RCV"
,RCVINT
XMTCNT
,SERRPC
,RCSR,
sSTESTN

023340
024163
024544

;"'DATA COMPARE ERROR |N EXERCISER"
BAD''
600D
:'TESTH ERR PC RCSR

023400
024273
024574
000000

;"'TRAP CAT(CHER'

023415
024001
024474
000000

;''NO CLK INTERRUPT IN EXERCISER''
;'TESTA ERR PC LKS"

023453
023727
024454

;"""ERROR' NOT SET WITH 'FR' FLAG"
;U'TESTH ERR PC RCSR"

;STESTN,SERRPC ,RCSR,GD,BD

000000

;'TESTA

R{SR

ERR PC

OLDPC

;$TESTN,SERRPC ,RCSR,OLDPC,BDVECT

TRAP ADR"

;STESTN,SERRPC,LKS

;STESTN,SERRPC,RCSR

000000

1307 002306
1308 002310
9 002312
0 002314

023512
023727
024454
000000

EM115
DH6
DT6
0

sRCV ACTVIE NOT CLEAR WITH INIT
;'TESTH ERR PC R(SR"
PC
,RCSR
;STESTN,SERR

2 002316
3 002320
4 002322
5 002324

023551
023727
024454
000000

EM116
DHé
DT6

;RCV ACTIVE WITHOUT ''START'' BIT
;U'TESTA ERR PC RCSR"
;STESTN,SERRPC,RCSR

002326

023610
023727
024454
000000

EmM117

sRDR ENABLE NOT CLEAR WITH RCV ACTIVE

6
7
8
9
0
1
2
3
4

5
é

27
28

002330
002332
002334
002336
002340
002342
002344
002346
002412

000000
000000
000000

000000

J'TESTA ERR PC

DH6
DTé
0

RCSR'

;STESTN,SERRPC,RCSR

: STORAGE LOCATIONS

FIRST:

LOC1:

LOC?:
SAVEOQ:

SAVLOC:
ENDSTK:

.WORD
.WORD
.WORD
.WORD
.BLKW
.BLKW

—= OO0
O
ony

;TIMER LOOP COUNTER
:TIMER LOOP COUNTER
:STORAGE

; THAT

FOR LOCATIONS

T/E USES

:JIMS SPECIAL STACK (WRAP ARGUND)

MACRO M1113

CIOLDFO DLT1-W/1144 MFM SLU

.WORD
.WORD
,WORD

0
0
8

XMTCNY:
CLKCNT:
STPSW:
SRPSW:
SCPSW:
BUF :
CMTLP:
PROMPT:

.WORD
.WORD
.WORD
.WORD
.WORD
BLKW
.ASCIZ
.ASCII

0
0
0
0
0

.ASCIZ

ST/ASCCRICLF>

LEVEN
.WORC
.WORD
.WORLD

0
0
0

JIMSTK:
SAVEPS:
OLDSUM:

002436
002440
002442
002444
002446
002450
002452
002454
002564
002566
002610

000000
000000
000000
000000
000000
000000
000000

002616
002620
002622

000000
000000
000000

SECND:
OLDPC:
BOVECT:

002624
002626
002630
002632

000000
000000
000000

CTSTFL:
TMP1 :

002634
002636

000000
000000
000000
000000
000000
000000
000000
000000

020
136
124

RCVCNT:

000
120

057

101

K
3
PAGE 28-1

TA:

,WORD

SEQUENCE

;SAVE PSW AREA
:CHECKSUM STORAGE

44
<20>

/2P/<O><CRYCLF>/CONSCLE/<CROCLF>/>>>/<377>

002640
002642
002644
002646
002650
002652

000000

0
;CONSLE UNDER TEST FLAG
0
;TEMP LOCATION FOR TABLE OFFSETS
TMP2:
.WORD
:TEMP LOCATION FOR DEVICE COUNT
0
TMP3:
.WORD
v
;LOCATION FOR DEVICE MAP BIT TEST MASK
;REGISTER AN) VECTOR ADDRESSES FOR THE DL=-11W UNDER TEST

RCSR:

.WORD
.WORD

.WORD

RBUF :

.WORD

TBUF :

.WORD

TCSR:

RVECT:
RPSW:
TVECT:
TPSW:

.WORD

.WORD
.WORD
.WORD
.WORD

0
0
0
0
0
0
0
0

;CONSOLE REGISTER AND VECTOR ADDRESSES FOR THE DL=-11W
002654
002656
002660
002662
002664
002666
002670
002672

002674
002676
002700

002702
002742
003002

177564
177566
000060
000062
000064
000066

CRCSR:
CRBUF:
CTCSR:
CTBUF:
CRVECT:
CRPSW:
CTVECT:
CTPSW:

177546

000100
000102

LKS:

RTCVT:
RYCPSW:

.WORD

000000

ADRTBL:
VCTTBL:
FLAG44L:

.BLKW
.BLXW
.WORD

177560
177562

177760
177.62
177564
177566
60
62
64
66

;ADDRESS OF

RECEIVER COMMAND/STATUS REGISTER

.ADDRESS OF RECEIVER BUFFER
;ADDRESS OF TRANSMITTER COMMAND/STATUS REGISTER
sADDRESS OF TRANSMITTER BUFFER
¢RECEIVER INTERRUPT VECTOR
:TRANSMITTER

INTERRUPT VECTOR

;REAL TIME CLOCK REGISTER AND VECTOR ADDRESSES
.WORD
,WORD

177546
100
102

0
0

» w NN=2O0OO0V®~NO
N WN—=2O

—

d o

D md

gv
L TV
T IV
TV TVVIV
IV
[0 X Vo
e T o AV i
LV IV IV
LV, AV
IV 1V,

AN N N A
N N N NN
NN N NN N NN NN

N OOV
~NO VN LN~
O

ERROR POINTER TABLE
1329 002432
000000
002434 000000

05-NOV-80 12:32

CIOLDFO DLi1-W/1144 MFM SLU

ERROR POINTER TABLE
1386 003004
176500
176502
1387 003006
1388 003010
176504
176506
1389 003012
1390
1IN
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403

003014
003020
003024
003026
003032
003034
003040
003042
003044

MACRO M1113

05-NOV-80 12:32

TURCSR:
TURBUF:
TUTCSR:
TUTBUF:

.WORD
.WCRD
.WCRD
.WCRD

PAGE 28-2

SEQUENCE 37

176500
176502
176504
176506

;SUBROUTINE TO GENERATE DEVICE ADDRESS TABLE

012702
013700
010001
062701
010022
062700
020001
003773
000207

002702
001142

005037
005037
005037
005037
005037
005037
005037
005737
001003
012737
012737
012737

001070
001066
001072
002624
001076
001100
003002
001112

DEVADR: MOV

#ADRTBL ,R2

:POINT R2 TO THE DEVICE ADDRESS TABLE

ADD

#170,R1

*PGINT R1 TO LAST DEVICE ADDRESS

ADD
CMP
BLE

210,80
RO,R
1%

*POINT RO TO NEXT DEVICE ADLRESS
*FINISHED GENERATING TABLE?
‘BR, IF LAST DEVICE ADDRESS NOT LOADED

:83

000170

1$:

000010

MOV

RTS

:SASE,Ré
RO, (R2)+

*LOAD BASE DEVICE ADDRESS IN RO
*MOVE DEVICE

ADDRESS

TO TAB.E

1404

003066
003072
003076
003102
003106
003110
003116
003124

000400

000006
000003

START:

003132
003136
003140
003144
003146

012706
005026
022706
001374
012706

03152
003160
003166

001112
000004
000006

003266

12737

)

OO =2000000

003174
003202
003210
003216
003224
003232
003240
003244
003252
003260

001040

001000

000004

SFATAL

:C.EAR ERROR NO.

CLR
CLR
CLR

$DEVCT
SUNIT
FLAG44

:CLEAR DEVICE COUNT
:CLEAR UNIT NUMBER
tex CLEAR 11/44 CPU FLAG

CLR
CLR
CLR

1$:

BNE
MOV
MOV
MOV

SMSGTYP
$TESTN
CTSTFL

SUSWR

1%
#400, SUSWR
86,34

#3.346

:CLEAR MESSAGE TYPE
‘CLEAR TEST NO.
*CLEAR CONSOLE UNDER TEST FLAG

‘1S SUSWR LOADED?

‘BR IF YES
‘ELSE, DEFAULT TO SUSWR=400
SINITIALIZE TIMEOUT VECTORS TO TRAP
.
CATCHER ROUTINE

INITIALIZE THE COMMON TAGS

;;CLEAR THE COMMON TAGS (SCMTAG) AREA
MOV
#S$CMTAG,RE
s:FIRST LOCATION TO BE CLEARED

001000

015136
000340
014436
000340
017112
000340
014754
000340
014254
001060
000001
003252
003260

CLR

.SBTTL

pErer e Y e PN T T

D
o
D
e
d
D
d
d
d
D
—

LR
R R R P B oW o W o
e
e Y o ]
VOO NO NS NN —=O P

1405
1606 003046
1407 003052
1408 003056
003062

000020
000022
000030
000032
000034
000036
000024
000026
014246
001015
001006
001010

CLR
CMP
BNE
MOV

(R6) +
;. CLEAR MEMORY LOCATION
#SWR,R6 ;;DONE?
.=6
;. LOOP BACK IF NO
#1000,SP
;:SETUP THE STACK POINTER

MOV

#S$SCOPE ,@#IOTVEC ;10T VECTOR FOR SCOPE ROUTINE

Mov

#SPURDN,@#PURVEC ;;POWER FAILURE VECTOR

JoINITIALIZE A FEW VECTORS
MOV
MOV
MOV
MOV
MoV

MOV

mov
(LR
move
mov
MoV

#340,8#10TVEC+2 ;,LEVEL 7
#SERROR,Q#EMTVEC ;;EMT VECTOR FOR ERROR ROUTINE
#340,30ENTVEC+2 ;;LEVEL 7
#STRAP,#TRAPVEC ;:TRAP VECTOR FOR TRAP CALLS
#340 ,8#TRAPVEC+2;LEVEL 7

#340,3#PURVEC+2 ;;LEVEL 7
SENDCY ,SEOPCY
SESCAPE
#1,SERMAX
#.,SLPADR
#.,SLPERR

::SETUP END-OF -PROGRAM COUNTER
:sCLEAR THE ESCAPE ON ERROR ADDRESS
:sALLOW ONE ERROR PER TEST
;s INITIALIZE THE LOOP ADDRESS FOR SCOPE
:: SETUP THE ERROR LOOP ADDRESS

SF#ERRVEC,-(SP)

;;SAVE ERROR VECTOR

::SIZE FOR A HARDWARE SWIVCH REGISTER. IF NOT FOUND OR IT IS
:;EQUAL TO A *'=1"', SETUP FOR A SOFTWARE SWITCH REGISTER.
Mmov

1436
1437
1438
1439
1440
1441
1442
1443

003324
003326
003332
003334
003342
003350
003354
003360
003366
003370
003376

000403
012716
000002
012737
012737
012637
005037
132737

001403
012737

332
757

757
77

NOOO

012737
012737
012737
022777
001012

— e
b O
NNNO

003272
003300
003306
003314
003322

MACRO M1113

000004
001040
001042

175516

000176
000174
000004
001074

001040
001042

000200

001107

001110

001040

65%:
66$:

67%:

M 3
PAGE 28-3

MOV
MOv
MOV
(MP

#648 ,dFERRVEC

B8R

65$

BNE

548:

003334

05-NOV-80 12:32

MOV
RTI
Mov
Mov
MOV

CLR
8178
BEQ
Mov

#DSWR, SWR
#0DISP,DISPLAY

'°1oaSUR

66%

#65%, (SP)

SEQUENCE 38

;sSET UP ERROR VECTOR
;sSETUP FOR A HARDWARE SWICH REGISTER
:sAND A HARDWARE DISPLAY REGISTER
;s TRY TO REFERENCE HARDWARE

SWR

:sBRANCH IF NO TIMEOUT TRAP OCCURRED
;AND THE HARDWARE SWR [S NOT = -1
:;BRANCH IF NO TIMEOUT
:;SET UP FOR TRAP RETURN

#SWREG, SWR
:;POINT TO SOFTWARE SWR
#DISPREG,DISPLAY
(SP)+,3#ERRVEC
:sRESTORE ERROR VECTOR

$PASS

#APTSIZE ,SENVM

679

#S$SWREG,
SWR

;s CLEAR PASS COUNT
;s TEST USER SIZE UNDER APT
:sYES,USE NON=-APT SWIT(CH
:sNO,USE APT SWITCH REGISTER

003436
003442
003450
003452

003456
003462
003470
003472
003500
003502
003510

1445 003516
1446 003522
1447 003526
1448 003532
1449 003540
1450 003544
1451 003550
1452 003552
1453 003556
1454 003562
1455 003566
1456 003572
1457 003576
1458 003602
1459 003604

000001

003002

003436

10$:

012637
032777

000010
000020

005237
000137

002624
004620
000001

001106

000200

001107

000040

175330

001404

132737
001404
132737
001056
032777
001052

004737
005037
005037
013703
012737
013700

062700
005710
005237
005237
012706
006337
162700
023700
003762
013700

003014
002630
001144
000004
003562
001442
000160

001144
002630
001000
001144
000010
£01142

00c654

175370

11$%:

INIT:

:
MANL

SIZE:

000004

3%:
4%:

BIT
BEQ

INC
JMP

8lT8
8EQ
BlT8
BNE
BIT
BNE
JSR
CLR
CLR

Mov
MOV
MOV
ADD

TST
INC
INC
MOV
ASL
sus
CMp
BLE
MOV

(SP)+,am0

#BIT4 ,aSWR

INIT
CTSTFL
ID
#BITO,SENV

MANL

#BIT7,SENVM
APTSZD
#B1T5,aSwR
APTSZD
PC,DEVADR

TMP2
$OEVM
af4 R3S
R LL
$BASE RO
#160,R0
(RC)
$OEVM
TMP2
#1000,SP
$DEVM
#10,R0

$BASE RO
3%
CRCSR,RD

%
%

11%
#1,30FLAGLS
118
#11s,(sP)

#,RO

»
»

a#10,-(sSP)
#10$.3#10

000001

MOV
MOV
MFPT
(mMPB
BNE
BIS
BR
MOV
RTI
MOV

001007
052737
000403
012716
000002

000010

»
»

122700

000010
003430

%
%

013746
012737
000007

»
»>

003376
003402
003410
003412
003416
003420
003426
003430
003434

»
2

.SIZE FOR 11/44 CPU

»
»

e
ek
d
D
D
b
b
D o
b e
- —

£H [ R
¥
B ¥ ¥ ¥
L 2Z 20 2l aF 2P o o
Wi N NN
PN NP NN
NN
WW
=2O V0O ~NO VWO

l DLDFO DL1-W/1144 MFM SLU
N 1 TIALIZE THE COMMON _TAGS

SAVE VECTOR
SET UP FOR TRAP
WHAT CPU??

ARE WE A 11/44
NO GO RESET VECTOR
YES SET FLAG

SKIP RT!

SET STACK RETURN
RETURN
RESTORE VECTOR

sTEST CLOCK ONLY?
:BR IF NOT
;ELSE, SET CONSOLE TEST FLAG TO FNABLE CLOCK TESTS
AND JUMP TO TYPE PROGRAM ID
;
:CHECK IF ON APT
:BR IF NOT APT
;01D APT SIZE
:BR, IF APT SIZED
;WAS "'SDEVM'' MANUALLY SET?
;IF YES, SKIP SELF-SIZING
;GENERATE DEVICE ADDRESS TABLE
:CLR TEMP LOCATION TO KEEP DEVICE COUNT
+CLEAR DEVICE MAP
:SAVE TIMEOUT VECTOR
;SET TIMEOUT POINTER
;LOAD BASE ADDRESS

:POINT RO TO UNIT #15 (UN]1T#0=CONSOLE)
;CHECK FOR DEVICE EXISTANCE
:INDICATE DEVICE EXISTANCE IN DEVICE MAP
; INCREMENT DEVICE COUNT
;RESET STACK POINTER
;ADJUST DEVICE MAP FOR NEXT UNIT (HECK
;POINT RO TO NEXT DEVICE NUMBER

;FINISHED SIZING?
;BR, IF BASE ADDRESS HAS NOT BEEN CHECKED
:LOAD CONSOLE DEVICE ADDRESS

CIOLDFO DLi1-W/1144 MFM SLU
INITIALIZE THE COMMON_TAGS
1460 003610
1461 003616
1462 003620
1463 003624
1464 003630
1465
1466 003634
1467
1468 003636
1469 003642
1470 003646
1471 003650
1472 003652
1473 003656
1474 003660
1475 003662
1476 003664
1477
1478
1479
1480 003670
1481 003674
1482 003700
1483 003704
1484 003706
1485 003712
1486 003714
1487 003720
1488 003722
1489
1490
1491
1492 003724
1493 003730
1494 003732

1495 003734
1496 003736
1497 003740
1498 003742
1499 003744

012737
005710
005237
005237
010337

003630

MACRO M1113

05-NOV-80 12:32

000004

001144
002630
000004

5¢:

000415

005037
013702
005702

100002

005237
006302
001401
000771
004737

;SET UP TIMEOUT POINTER

#5804
(RO)
$DEVM

TMP2
R3, 384

;INDICATE CONSOLE EXISTANCE IN DEVICE MAP
; INCREMENT DEVICE COUNT
;RESTORE TIMEOUT VECTOR

VCTADR

;BR TO GENERATE VECTOR ADDRESS TABLE

TMP2
$DEVM,R?2
R2
1%
TTMP2
R2
DVADT
TSTOVM
PC,DEVADR

;CLEAR TEMP LOCATION TO KEEP DEVICE CNT
;MOVE DEVICE MAP TO R2
:TEST MSB OF DEVICE MAP
;BR, IF MSB IS ZERO
; INCREMENT DEVICE COUNT, [F MSB=1
;SHIFT NEXT BIT INTO MSB POSITION
;BR, IF NO OTHER BITS ARE SET IN $DEVM
;CONTINUE CHECKING SDEVM, If MORE BITS SET
: GENERATE DEVICE ADDRESS TABLE

INC
MOV

CLR
MOV
TSTDVM: TST
BPL
INC
1$:
ASL
BEQ
BR
JSR
DVADT:

003014

SEQUENCE 39

MOV
TST
INC

APTSID:

002630

N
3
PAGE 28-4

STEST FOR CONSOLE EXISTANCE

:GENERATE VECTOR ADDRESS TABLE
012702
013700
042700
010001
062701
010022
062700
020001
003773

002742
001136

VCTADR: MOV

#VCTTBL,R2

BIC
MOV

#177000,R0
RO,R1

177000

000170

1$:

006010

;GET LOCATION OF VECTOR TABLE

SN¥SVECT1,RO

;COPY BASE VECTOR
;CLEAR UPPER BITS

ADD

#170,R1

ADD
CMP
BLE

#10,R0
RO,R1
1%

;POINT R1 TO LAST DEVICE VECTOR
:PUT VECTOR ADDRESS IN TABLE
;POINT RO TO NEXT VECTOR ADDRESS
;FINISHED GENERATING VECTOR TABLE?
:BR, IF LAST VECTOR IS NOT LOADED

MOV

RO, (R2) ¢

:MOVE DEVICE COUNT INTO DEVICE COUNT MESSAGE
013700
005001
000300
006300
006300
006300
106101
006300
106101
006300
106101
062701
000301
032701
001764
010137

002630

052737
005037
032737
001001
0004 i«
005237
012700

000002
902626
J00001

SHIFT:

TMP2.R0
RY
RO
RO
RO

ROLB

ASL

ASL
ROLB
ASL
ROLB
ADD
SWAB

000060

BIT

000020

BEQ

024404

002624
002654

MOV
CLR
SWABE
ASL
ASL

002632

BEGIN:

001144
TCONS:

RO
Rl
RO
R1
#60,R1
R1

#B1T4,R1
SHIFT

MOV

R1,M2A

BIS
CLR
BIT

#BIT1,THP3
THP1
#B1T0,$DEVM

INC

CTSTFL

BNE
BR

MOV

TCONS
TSTOEV

#CRCSR,RO

;COPY DEVICE COUNT INTO RO
;CLEAR AUXILARY REGISTER
;PUT DEVICE COUNT IN UPPER BYTE OF RO
;MOVE MSB OF COUNT INTO
;MSB OF RO

¢PUT MSB OF COUNT INTO CARRY
:MOVE MSB OF COUNT INTO R1
;MOVE NEXT BIT TO CARRY
:MOVE INTO R1
;MOVE LAST BIT OF DIGIT
:INTO R1
; CONVERT DIGIT TO ASCII
.MOVE DIGIT TO UPPER BYTE
:HAVE BOTH DIGITS BEEN MOVED TO R1?
:BR, IF NOT
¢MOVE DEVICE COUNT TO OQUTPUT MESSAGE

;SET UP BIT MASK TO TEST SDEVM FOR DEVICES EXCEPT CONSOLE
:CLEAR LOCATION TO STORE TABLE OFFSETS

:1S CONSOLE TO BE TESTED?
;BR, IF CONSOLE IS TO BE TESTED
;BR, TO TEST OTHER DEVICES

;INDICATE CONSOLE UNDER TEST
:SET UP CONSOLE DEVICE ADDRESSES

Cl0
1NI

DLI1=-w/1144 MFM SLU
IZE THE COMMON TAGS

MACRO M1113

€04030
004034
004036
004042
004044

012701
012021
022701
002374
000137

002634

004050
004356
004060
004064
004072
004076

033737
001010
006337
062737
005237
000764

002632

0011446

002632
000002
001100

002626

004100
004104
004110
004114
004122
004126
004132
004124
004140
004144

005237
006337
013702
062737
016200
012701
010021
062700
030027
001372

001100
002632
002626
000002
002792

004146
004152
004154
004160
004164
004166

016200
010021
062700
030027
001372
000137

002742

05-NOV-80 12:32

18:

002652

8GE
JMP

006172

002634

000002
000006

000002
000006
004172

MOV
MOV
CMP

B ¢4
PAGE 28-5

#RCSR,RY
(RO)+,(RY)»
#1PSW,R1
1%
TsM

SEQUENCE 40

;POINT R1 TO UUT ADDRESS TABLE
; TRANSFER CINSOLE ADDRESSES

;FINISHED TRANSFER?
:BR,

NOT

;60 TEST CONSOLE INTERFACE

.PREPARE ADDRESSES AND VECTORS FOR UUT
TMP3 ,SDEVM
;CHECK TO SEE IF DEVICE IS TO BE TESTED
BNE
SETADR
:BR, IF YES

TSTDEV: BIT

TMP3
#2,TMP1
SUNIT

JSHIFT MASK TO CHECK NEXT SDEVM BT
s INCREMENT TABLE INDEX
; INCREMENT UNIT NUMBER
;G0 TEST NEXT BIT OF DEVICE MAP

;UPDATE UNIT NUMBER
;UPDATE DEVICE MAP TEST MASK

BIT

SUNIT
TMP3
TMP1,R?
#2,TMP1
ADRTBL (R2) ,RO
#RCSR,R1
RO,(R1)+
#2.R0
RO, #6

MOV

RO
VCTTBL(R2)

ASL

ADD

INC
BR

SETADR:

INC

ASL
MOV

ADD

002626
ADR:

MOV
MoV
MOV
ADD

BNE
VECT:

MOV
ADD

BIT

BNE
JMP

TSTOEV

ADR

RO, (R1)+
#2,R0
RO, #6
VECT
ST

;MOVE TABLE OFFSET TO R2
;UPDATE TABLE OFFSET FOR NEXT DEVICE
;PUT UUT ADDRESS INTO RO

;POINT R1 TO STORAGE AREA FOR UUT ADDRESSES
; TRANSFER UUT ADDRESS
;POINT TO NEXT UUT REGISTER
;FINISHED TRANSFER?

;BR, IF NOT

;PUT UUT VECTOR INTO RO

;TRANSFER UUT VECTORS TO ACTIVE
;POINT TO NEXT VECTOR

;FINISHED TRANSFER?
:BR, IF NOT
;GO TEST DEVICE

TABLE

AREA

CIOLOFO DLi1-w/1144 MFM SLY

TEST # 1

MACRO M1113

- TEST ABILITY TO REFERENCE

TCSR

1548

05-NOV-80 172:32

LSBTTL

PAGE 29

SEQUENCE 41

TEST # 1 - TEST ABILITY TO REFERENCE TCSR

roaatttttRRRRRORRCEOICLRLERCRCEOCEROORRRRNRRRROARRARNROCECRRRARORNOROQRRRRRORTY

SeTEST 1 = TEST ABILITY TO REFERENCE TCSR
0064172

000004

SR 2223

1549 004174

013703

000004

1554 004214
1555 004216

022626
005737

002624

1550 004200
1551 004206
}gg% 004212

1556 004222
1557 004224
1558 004226
1559 004230

012737
005777
000412

001002
104000
000404

004214
176426

004230
004234

004737
000001

015326

}gg; 004240

010337

000004

1560 004236

1563
1564

000000

$§11:
000004

18:

2$:

38:

XSRS 2R

SCOPE

Mov

2222022020

RRRRdRRdRldl])

MOV
1ST
BR

anL ,R3

s, 306
8TCSR
L3 )

;SAVE TIMEOUT VECTOR

cMp
TST

(SP)+, (SP)+
CTISTFL
3
+1
131

;RESTORE SP AFTER TIMEOUT
;CHECK IF DEVICE IS CONSOLE

JSR
1

PC.SATYL

MOV

R3,a#4

BNE
ERROR
BR

HALT

;SET UP TIMEOUT VECTOR
;REFERENCE THE XMIT COMMAND/STATUS REG.
: GO TO END OF TEST

;1F YES, SKIP ERROR TYPEOQUT
;REPORT ERROR TO APT & TTY
;BR TO END OF TEST

;.ONLY REPORT A FATAL ERROR
;. THE ERROR NUMBER (FROM APT LIST)
;RESTORE TIMEOUT VECTOR

CIOLOFO OLI1-W/1144 MFM SLU
TEST # 2 = VEST

ABILITY

MACRO M1113

TO REFERENCE

TBUF

1565

05-NOV-80 12:32

LSBTTL

D &
PAGE 30 SEQUENCE 42

TEST # 2 - TEST ABILITY TO REFERENCE TBUF

TRt ERRARNRRRRARRCCRRERSRERRRERROCORRRRRRRRARORNRARORNRROROROARARNGRNGORORRONNS

TeTEST 2 - TEST ABILITY TO REFERENCE TBUF

coARRERNRERRRARRORCOCOCERRCORROSCERCQRRARNRRRRRARGRAARRARNCRNAN
L OORACONOEROOY

1566
1567
1568
}g?g

004244

000004

004246
004252
004260
004264

013703
012737
005777
000412

1571 004266
1572 004270

022626
005737

004302
004306

004737
000002

1573
1574
1575
1576

004274
004276
004300
004302

1577 004310
1578 004372

001002
104002
000404

000000
010337

000004
004266
176356

002624

015326
000004

TST2:
000004

1$:

2%:

3s:
0%

SCOPE

MOov
MoV
TS?
BR

a4 R3
s ,306
aTBuf
“%

;SAVE TIMEOUT VECTOR
;SET UP TIMEOUT VECTOR
;REFERENCE THE XMIT BUFFER
;GO TO END OF
TEST

(MP
787

(SP)+,(SF
CTISTFL

;RESTORE SP AFTER TIMEOUT
;CHECK IF DEVICE IS CONSOLE

BNE
ERROR
BR

2%
¢2
31

JSR
2

PC,SATYS

HALT
MOV

R3, a4

;1F YES, SKIP ERROR TYPEOQUT
;REPCRT ERROR TO AP7V & TTY
;BR TO END OF TEST

;sONLY REPORT A FATAL ERROR
;s THE ERROR NUMBER (FROM APT LIST)
;RESTORE

TIMgEOUT VECTOR

MACRO M1113
05-NOV-80 12:32
%%DLDFO DLIT-W/1144 MFM SLU
ST # 3 -~ TEST THAT BIT2(MAINT. BIT) CAN BE SET & RESET
1579

.SBTTL
cr

E &
PAGE 31
SEQUENCE 43

TEST # 3 - TEST THAT BIT2(MAINT. BIT)

CAN BE SET & RESET

AR ARNARARNERNCERICERTRRRRRECRRRCORCEOERRARARRARARNANROERRCEARRNOANCORRROROCRS

S#TEST 3 = TEST THAT BIT2(MAINT. BIT) CAN BE SET & RESET

°:ttt't't"it't"'"""""""t'""Q"'""'."Q""""""'Q

004316
004320
004322
004330

000004
009095
032777
0014M

004332
004336
004340
004342

005737
001002

1§13
000004

176310

002624

004737
000015
000000

015326

004354
004362
004370

052777
032777
001001

000004

004372

104016

004374
004402
004410

042777
032777
001411

000004
000094

004412
004416
004420
004422
004424
004424
004430
004432

005737
001002

002624

004737
000017
000000

015326

004434
004442

052777
000005
032777
001404

000004

176176

000004

006454
004462

042777

000004

004464

000240

004452

1%:

000004

176236
176230

104017
000404

104020

BIT
BEQ

#BIT2,QTCSR

TST
BNE

CTSTFL
1%
+15

ERROR
BR

104015
000404

004344
004344
004350
004352

004444

SCOPE

RESET

3¢

;CLEAR EVERYTHING

;TEST FOR BIT2 OF TCSR CLEAR
:BR IF CLEAR

;CHECK IF DEVICE IS CONSOLE
;IF YES, SKIP ERROR TYPEQUT
;BIT2 OF TCSR NOT CLEAR AFTER RESET

;:ONLY REPORT A FATAL ERROR

PC,SATYL

2%:

JSR
15

HALT

3%:

BIS
BIT
BNE

#BIT2,aT(SR
#BI1T2,aTCSR
43

;SET BIT2 OF TCSR
JTEST FOR BIT2 SET

ERROR

+16

;BIT2 OF TCSR WILL NOT SET

BIC
BIT

gEIT2.aTCSR

#B172,aT(SR

:CLEAR BIT2 OF TCSR
JTEST BIT2 CLLAR

4%:

BEQ

5%:

TST
BNE
FRROR
BR

CTSTFL

+17
7%

;s THE ERROR NUMBER

:BR [F

(FROM APT LIST)

SET

;BR IF CLEAR

;CHECK IF DEVICE IS CONSOLE
;1F YES, SKIP ERROR TYPEOUT

PC,SATY4

6$:

JSR
17
HALT

;;ONLY REPORT A FATAL ERROR
;. THE ERROR NUMBER (FROM APT LIST)
;BI1T0 OF TCSR WILL NOT CLEAR

7%:

BlS

#BIT2,aTCSR

176166

BIT
BEQ

#BIT2,3TCSR
10¢

;SET BIT2 OF TCSR
;CLEAR BIT2 WITH RESET
s+« [F CLEAR, GO TO NEXT TEST

176156

BIC
ERROR

#B1T12,3TCSR

;CLEAR BITZ2, TO PRINT ERROR

10%:

RESET

NOP

+20

;TEST FOR BIT2 CLEAR

;RESET DID NOT CLEAR BIT2 OF TCSR
A

CIDLDFO DLI1-W/1144 MFM SLU

MACRO M1113

TEST # 4 - TEST THAT TCSR BIT7(DONE®

CLEARS WHEN XBUF

1619

05-NOV-80 12:32

LSBTTL

[S LOADE

PAGE 32

SEQUENCE 44

TEST # & - TEST THAT TCSR BIT7(DONE) CLEARS WHEN XBUF

R R R

R R R R

R 2RSSR

IS LOADED

R00RRRdRRRRRRRR Rl )]

S#TEST & - TEST THAT TCSR BIT7(DONE) CLEARS WHEN XBUF IS LOADED

:;"t't""t't""""""""""..t"t""""""".""'Q""

004466
1620 004470

1621 004476
1622 004502
1623 004506

1624

000004
052777

005077
105777
100021

000004
176140
176132

176142

TST4:

SCOPE
BIS
CLR
1ST8
BPL

#BIT2,aTCSR
aTBUFf
aTCSR
3%

;** ENABLE MAINT. WRAP
;LOAD XBUF
s CHECK DONE
:BR IF CLEAR

;
FIRST TEST TO FAIL
;FILL DOUBLE BUFFER
; CHECK DONE
;BR IF CLEAR

;FILL SECOND BUFFER, BECAUSE REFRESH COULD CAUSE

1625
1626 004510
1627 004514
}g%g 004520

005077
105777
100014

176126
176720

CLR
1578
BPL

a18Uf
aTCSR
3%

1630 004522
1631 004526
1632 004530

005737
001005
042777

002624

1ST
BNE
BIC

CTISTFL
1%
#B1T2,aCTCSR

1633 004536
1634 004540

104003
000404

ERROR
BR

+3
3$

004542
004546
1636 004550

004737
000003
000000

015326

JSR
3
HALT

PC,SATYS

1638 004554
1639 004560
1640 004562
1225 004564

105777
100417
005200
001373

176060

1ST8
BMI
INC
BNE

aTCSR
ID
RO
43

:CHECK FOR XMIT DONE
:1F DONE SETS, BR TO END OF TEST
; INCREMENT TIMER
;:BR IF TIMER NOT DONE

1043 004566

005737

002624

CTISTFL

;CHECK IF DEVICE IS CONSOLE

1645 004574

042777

000006

BIC

#BI12,aCTCSR

ERROR
BR

¢4
10

;*¢ DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
sr* WITH TERMINAL.

JSR
4

PC,8ATY4

ENDB7

1635 004542

1637 004552

1644 004572

005000

001005

1646 004602
1647 004604

104004
000405

004606
004612

004737
000004

1650 004616
1651

000427

1648 004606
164G 004614

000004

176122

1%:

2%:

(LR

TST

BNE

176056

5%:

015326

000000

HALT

1655 0064620

042777

000004

176032

1656 004626
1657 00463«
1658 004636

023737
001412
005737

000042

000046

1660 GO4644

005737

1659 004642

;:ONLY REPORT A FATAL ERROR
;:THE ERROR NUMBER (FROM APT LIST)
:TCSR ‘'DONE'' NOT CLEARED WITH TBUF FULL

;CLEAR TIMER

;TCSR "'DONE'' DOES NOT SET
;BR TO END OF TEST

;;ONLY REPORT A FATAL ERROR
;;THE ERROR NUMBER (FROM APT LIST)
;*+ BR TO NEXT TEST,
;*+ AND SKIP THE TYPEOQUT THAT fOLLOWS

}22%

1654 004620

;CHECK IF DEVICE IS CONSOLE
;1F YES, SKIP ERROR TYPEOUT
;*+ DISABLE MAINTENANCE MODE FOR
s** CONSOLE TO ALLOW FOR (OMMUNICATION
;ee WITH TERMINAL.
:DONE NOT CLEARED WITH TBUF FULL
;:BR TO END OF TEST

001007

ID:

BECAUSE OF THIS FAILURE

BIC

#BIT2,3CTCSR

;tv DISABLE MAINTENANCE MODE FOR
;¢v CONSOLE TO ALLOW FOR COMMUNICATION

001074

(MP
BEQ
ST

T YR LI
6%
$PASS

;UNDER ACT11?
:1F YES, SKIP IDENT. TYPEQUT
;1S THIS THE FIRST PASS?

001076

TSt

$DEVCT

;IS THIS THE FIRST SUBPASS?

BNE

;e* WITH TERMINAL.

;1F NOT BR TO NEXT TEST & SKIP THE IDENTIFICATION TYPEQUTS

G &
MACRO M1113
05-NOV-80 12:32
PAGE 32-1
TCSR BIT7(DONE) CLEARS WHEN XBUF IS LOADF

SEQUENCE 45

CIOLDFO DLIT1-W/1144 MFM SLU

001004

1664 004656

104401
024402

1663 004654

1665 004660

1666 004662

1667
1668
1669
1670

004670
004672
004676
004676
004700
004704
004706
004710
004712

BNE
TYPE

104401

024344

032777
001402
000137
005000
012701
005300
001376
005301
001374

I NOT, BRTO NEXT TEST

;TYPE PROGRAM INDENTIFICATION
;TYPE

000020
005536
000002

174150

6%:

ENDB7:
40%:

#B1T4L ,ASWR

ENDB7

NUMBER OF

DEVICES UNDER

TEST

;CLOCK TEST ONLY?
cht

BR IF NOT

TcLocK

;ELSE, JUMP TO TEST CLOIK

RO
#2 ,R1
RO
40%
R1
40%

1661 004650
1662 004652

LA]

THAT

TEST # & = TEST

M2
A]
A

”

DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
THAT MIGHT BE IN THE PROCESS OF BEING
TRANSMITTED TO FINISH BEFORE MAINTENANCE

WRAP FOR THE UART UNDER TEST IS DISABLED.
THIS WILL INHIBIT ANY COMMUNICATION

TO HARDWARE MEDIA SUCH AS TUS58 THAT MIGHT
BE ATTACHED TO UART UNDER TEST.

CI0LDFO DLY1-W/11446 MFM SLU
TEST & 5 = TEST

THAT

MACRO M1113

05-NOV-80 12:32

TCSR "DONE’’" SETS WITH RESET

LSBTTL

1671

Y A X R

PAGE 33

SEQUENCE 46

TEST # 5 - TEST THAT TCSR "DONE'' SETS WITH RESET
R

XX X XXX

R IR XEEXXXRX RSN RAARASARA A

ceTEST S = TEST THAT T(SR '‘DONE'' SETS WITH RESET
B

1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683

004714
004716
004724

004730
004734
004736
004742
004744
004746
004752

000004
052777
005077
105777
100375

005077
000240
000005

105777
100401

004754

104005

1684 004756
1685
1686

000240

000004

175712
175704

175714

1§15
1%:

R X X R

SCOPE
BIS
CLR
1518
8PL

CLR

175700

NOP
RESET

175666

10%:

R X

R R

R X R R R XXX ARERRRRARR AR AR

#BIT2,3TCSR
8 TBUF
dTCSR
1%
STBUF

AR A AR

R0 0002

R ARRRRRR A0,

;** ENABLE MAINT. WRAP
;LOAD TRANSMIT BUFFER
;WAIT FOR DONE
;LOAD SECOND BUFFER

1S18

BMI

aT(SR
108

;CLEAR DONE WITH RESET
;CHECK FOR DONE SET
;e« BR TO NEXT TEST ]F DONE SET

ERROR

;TCSR “'DONE'’ DOES NOT SET WITH RESE!

NOP

CZOLDFO DLIT-W/1144 MM SLU

TEST

# 6 -

TEST

ABILITY

MACRO M1113

TO ACCESS RCSR

1687

05-NOV-80 12:32

LSBTTL

]

PAGE 34

SEQUENCE 47

TEST # 6 - TEST ABILITY TO ACCESS RCSR

;;"!Q""'t""""'"""""""'.""'Q""".Q"Q".Q"""'

;*TEST 6 = TEST ABILITY TO ACCESS RCSR

':'t"t't0"".""'"""'""'"."'.'QQQ".""""""Q"Q"'

004760
004762
004766
004774
005000

000004

005002
005004
005006

022626

1516:
000004

010337

1%:

000004

LTI
s arg

;SAVE TIMEOUT VECTOR
;SET UP TIMEOUT VECTOR

;BR TO END OF TEST

(SP)+,(SP)+

;RESTORE

1ST

000402
104006

SCOPE

Mov
MOV

2$:

(MP

ERROR
MOv

SRCSR

+6
R3,ans

sACCESS RCSR

SP AFTER

TIMtOUT

:CAN NOT ACCESS RCSR
;RESTORE TIMEOUT VECTOR

CIDLDFO DLi1-W/1144 MFM SLU

TEST # 7 - TEST

MACRO M1113

05-NOV-80 12:32

ABILITY TO ACCESS RBUF

1696

LSBTTL

J &
PAGE 35
SEQUENCE 48

TEST # 7 - TEST ABILITY TO ACCESS RBUF

;'""'Q.'Q'."""'""Q"""""Q"""Qt"""""""."""

SeTEST 7 = TEST ABILITY TO ACCESS RBUF
2

1697
1698
1699
1700
1701
1702

1703
1704

000004
013703
012737
005777
000402

000004
005034
175604

010337

000004

SCOPE

2$:

RdRRdRRRRRR))

Mov
MOov

¥4 ,R3
S, a8

;SAVE TIMEOUT VECTOR
;SET UP TIMEOUT VECTOR

B8R

;BR TO END OF TEST

(SP)+,(SP)+
+7

;RESTORE SP AFTER TIMEOUT
:CAN NOT ACCESS RBUF

TST

1%:

022626
106007

1$T7:

CMp
ERROR

MOV

aRBUF

R3,a#4

;ACCESS RBUF

;RESTORE

TIMEOUT VECTOR

MACRO M1113 05-NOV-80 12:32
ST # 10 = TEST THAT BITO(BREAK BIT) CAN BE SET € CLEARED & P

%éDLDFO DLY1-W/1144 MFM SLU

.SBTTL

1705

PAGE 36

SEQUENCE 49

TEST # 10 - TEST THAT BITO(BREAK BIT) CAN BE SET & CLEARED & RESET

2R 2

22 R

Rl Rl Rl
RRR 2 2R RRR0
222 R 2222

SeTEST 10 - TEST THAT BITO(BREAK BIT) CAN BE SET € CLEARED & RESET
';"Q'Qttt"'."""""""'t""t."..'"'fi.""""'t"""Q"

001462

005104
005106
005114
005116
005122
005124
005126
005130
005130
005134
005136

000005
032777
00141
005737
001002

004737
000011
000000

015326

005140
005146
005154

052777
032777
001001

000001

005156

104012

005160
005166
005174
005176
005202
005204
1739 005206
1740 005210
005210
005214
1741 005216

062777
032777
001411
005737
001002
104013
000404

000001
000001

004737
000013
000000

015326

052777
000005
032777
001404
042777

000001

175412

000001

175402

000001

175372

1744 005226
1745 005230
1746 005236
1747 005240
1748 005246
1749 005250

000001

003002

1$110:

000010

BEQ
BIT

9%
#B1103,aSwR

BEQ

10%

000001

173736

1755264

9s:

19%:

5472
5464

~N~

—

2s:

175652
175444

3s:

4%:

002624

5%:

vx YES THIS IS 11/44.

w Sy
««

; *« THIS IS THE CONSOLE SLU.SHOULD THE BREAK
TSST BE PERFORMED
N

CLEAR EVERYTHING
TCSR CLEAR

: CHECK BITO OF
BR IF CLEAR

BNE
ERROR
'BR

1%
+11

: BITO WAS NOT

JSR

PC,OATYS

BIS
BIT
BNE

#8170,9TCSR
#B1T0,9TCSR
4%

; SET BITO IN TCSR
; TEST BITO OF TCSR
: BR IF SET

ERROR

+i2

: BITO OF

BIC
BIT
BEQ
TST
BNE
ERROR
BR

#8170,aTCSR
#8170,aTCSR
7%
CTSTFL
$
+13
7%

: CLEAR BITO OF TCSR
. TEST BITO OF TCSR

JSK

PC,3ATYS

1"
HALT

HALT

7%:

BIS
RESET
BEQ
BIC
ERROR
NOP

CISTFL
3$

’

CLEAR AFTER RESET

;;ONLY REPORT A FATAL ERROR
;: THE ERROR NUMBER (FROM APT LI[ST)

: BITO OF

TCSR WILL NOT SET

TCSR WILL NOT CLEAR

;:ONLY REPORT A FATAL ERROR
;;THE ERROR NUMBER (FROM APT LIST)

#B170,8TCSR

: SET BITO IN TCSR

#B170,aTCSR

; TEST BITO CLEAR

10 $

#B1710,8TCSR
+14

[S THIS THE CONSOLE

#B170,aTCSR

6%:

10$:

««

BIT
BEQ
TST

002624

000001

RESET

: IS BREAK FUNCTION ENABLED?
; «+ BR TO NEXT TEST, IF NOT
; te [S THIS A 11/44

002624

000404

000240

#B178,3S5WR

BEQ
ST

104011

104014

SCOPE
BIT
BEQ
BIT

109
#BITO,FLAGAS
9$
CTSTFL

—

O
NO NS WWN
L OO
NN
000 ~NONW
NN =2 O

oo~ OV

d
h
D
oD
o
D i
e
e
D e
wod

NNSNNSNSNSNNNSNSNNSNNN

— o
b
d
b
d
D
d
d
ok
e
d
b
b

~ NNSNSNNSNS NSNSNNNN
NN N AN AN AN NN NI N NN A

—

1742
1743 005220

173764

005102

000400

001404
032777

POPOPIRIN)
b ed o d d od ad b ok D

005072
005074

005054
005056
005064
005066

000004
032777
001475
032737
001407
005737

005044
005046

CLEAR BITO WITH RESET

«+ BR IF CLEAR
. CLEAR BITO, TO PRINT ERROR
RESET DID NOT CLEAR BITO OF TCSR
e

MACRO M1113 05-NOV-80 12:32
9! 0 L DFO DLIT=W/1144 MFM SLU
¢ S T # 11 - TEST THAT BIT6(XM]T INT EN) CAN BE SET & RESET
1 750

TeST # 11

.SBTT,

L_ &
PAGE 37
SEQUENCE 50

= TEST THAT BITOH(XMIT INT EN)

CAN BE SET & RESET

':tt""tt"QQQ"""'t"'"'""'t""'ttt""'t"'.""""'t"

TeTEST 11 = TEST THAT BIT6{XMIT INT EN) CAN BE SET & RESET
000004
000005
017703
012777
004737
000340
032777
001404

XXX

T§T11:
175366

005312
014400

175360

000100

175334

SCOPE

RESET
Mov
MOV

JSR

8TVECT,R3

#18,9TVECT
PC,WRPSW

.WORD

340

#B176,aTCSR

104021

BIT
BEQ
ERROR

005310

000402

005312
005314

022626

005316
005324
005332

052777
032777
001001

005334

104023

005336
005344
005352
005354

042777

005356
005364
005366
005374

052777
000005
032777
001401

005376

104025

005400

001401

000100
000100

3%:

104024

010377

(SP)+,(SP)+

+22

BIS
BIT
BNE

gEITb.aTCSR

ERROR

+23

032777

2%:

000100
000100

CMP

ERROR

1%:

104022

2s
+21

#BIT6,3TCSR

175254

000100

175244

4%:

5%:

RESET

:CLEAR EVERYTHING
:SAVE XMIT VECTOR
;SET UP INTERRUPT VECTOR FOR ERROR REPORT
;SET PSW TO PRIORITY=7
;TEST BIT6 OF
;BR [F ZERO

TCSR

;BIT6 IN TCSR NOT CLEAR AFTER RESET
;RESTORE SP AFTER INTERRUPT
;XMIT

INTERRUPT OCCURRED

PRI10=7

;SET BIT6 OF T(SR
;TEST

BIT6 OF

:BR, IF SET

TCSR

;CANNOT SET BIT6 OF TCSR

:BR IF CLEAR

ERROR

000100

0022020220200 R

;CLEAR BIT6 OF TCSR
;TEST BIT6 OF TCSR

(=R T

1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786

005¢52
005254
005256
005262
005270
005274
005276
005304
005306

[a g EEYN

O 00 NO NS i

—

N A VHANAWN

D
e
e
d
il e
—

NNNNNNNNN

sCANNOT CLEAR BIT6 OF
#B1T6,aTCSR

BIT
8eQ

#B176,3TCSR

ERROR

+25

MOv

R3,aTVECT

TCSR

:SET BIT6 OF TCSR
;CLEAR BIT6 WITH RESET
;TEST BIT6 OF TCSR
:BR IF CLEAR

;CANNOT CLEAR BIT6 OF TCSR WITH RESET
;RESTORE XMIT VECTOR

CIOLDFO DLI1=-W/1144 MFM SLU

TEST # 12 - TEST THAT BIT6 OF

MACRO M1113

05-NOV-80 12:32

RCSR CAN BE SET & RESET

1787

LSBTTL

PAGE 38

SEQUENCE 51

TEST # 12 - TEST THAT BIT6 OF RCSR CAN BE SET & RESET

BRI 2222222220222
220000002 222000
0022 lRdR2Rd])

S+TEST 12 = TEST THAT BITé OF RCSR CAN BE SET & RESET

';tt"t"".t'tt"'t't""'"'"'tt't'"""t""""""".""'

005404

1788 005406
1789 005410

1790 005614
1791 005422
1792 005426

1793 005430
1794 005436
1795 005440
1796

000004

000005
017703

012777
004737
000340
032777
001434
104026

};gg 005442

000402

1799 005444

022626

1800 005446
}gg}

052777
032777
001001

1807 005466
1888

104030

1810 005470

042777

1814 005506

104031

1817 005510
1818 005516

052777
000005

1822 005530

10403¢

}g}g

1819 005520
}gg? 005526

1823
1824 005532

1825 005536

175230
005444

175222

000100

175176

014400

032777
001401

010377

012737

000100
000100

000100

175156
175150

175136
175130

000100

175116

000100

175106

000012

001002

SCOPE

RESET
MoV

MoV
JSR

1$:

104027

1803 005450
1804 005456
}ggg 005464

1811 005476
}g}% 005504

TST12:

2%:

3$:

4§:

5%:

SRVECT,R3
1% ,QRVECT

PC,WRPSW

BIT
BEQ
ERROR

.WORD
340
#BIT6,3RCSR
23
+26

cMP

(SP)+,(SP)+

ERROR

+27

BIS
BIT
BNE

#B176,aRCSR
#BIT6,aRCSR
3%

ERROR

+30

BIC

#B1716,3RCSR

BIT
BEQ

#BIT6,aRCSR
4%

ERROR

+31

BIS
RESET

#B176,3RCSR

BIT
BEQ

#B176,3RCSR
5%

ERROR

+32

MoV

R3,3RVECT

TCLOCK: MOV

#12,8TSTNM

;CLEAR EVERYTHING
;SAVE RECEIVE VECTOR

;SET UP INTERRUPT VECTOR FOR ERROR REPORT
;SET PSW TO PRIORITY=7
;TEST BIT6 OF

RCSR

;BIT6 OF RCSR NOT CLEAR AFTER RESET
;RESTORE SP AFTER

INTERRUPT

;RCVR INTERRUPT WITH PRIORITY=7
;SET BIT6 OF RCSR
;TEST BIT6é OF RCSR

:BR,

SET

;CANNOT SET BIT6 OF

RCSR

;CLEAR BIT6 OF RCSR

STEST BIT6 OF RCSR
:BR, IF CLEAR

s CANNOT CLEAR BIT6 OF RCSR
;SET BIT6 OF RCSR
;CLEAR BIT60F RCSR WITH RESET

;TEST BIT6 OF RCSR
;BR, If CLEAR

:CANNOT CLEAR BIT6 OF RCSR WITH RESET
;RESTORE RECEIVE VECTOR

;ADJUST TEST NUMBER TO (NEXT TEST - 1)

CI0LDFO DLiT=-W/1144 MFM SLU

MACRO M1113

TEST # 13 - TEST ABILITY TO ACCESS LKS
1826

05-NOV-B0 12:32

.SBTTL

N 4
PAGE 39 SEQUENCE 52

TEST # 13 = TEST ABILITY TO ACCESS LKS

CCRANRARNNRNRRACRRERRRONRCSORNCRQRRANRORNANRRRANNACONAARRQACERARGOECORNNNTY

TeTEST 13 - TEST ABILITY TO ACCESS LKS

S 2222222220222
2020022220022
0200220 22000 2R
RRRddd)

005544

1827 005546

1828
1829
1830
1831
1832
1833
1834
1835
1836
1837

005552
005554
005562

005564
005570
005576
005602

000004
005737
001420
032777
001014
013703
012737
005777
000402

005604
005606

022626

005610

010337

T§113:

002624

000100
000004
005604
175072

104010

000004

173256

SCOPE
TST
BEQ
BIT
BNE
MOV
MOV

000004

TST
BR

CTSTFL
1ST14

#BIT6,aSWR
1ST14

a#4 ,RY
s, ani
8LKS

:1S CONSOLE UNDER TEST?
;IF NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INHIBITED?
;IF YES, SKIP THIS TEST

:SAVE TIMEOUT VECTOR
;SET UP TIMEOUT VECTOR
;ACCESS LKS

;NO TIMEOUT -

BR TO END OF

1%:

CMP
ERROR

(SP)+,(SP)
e+
+10

;sRESTORE

SP AFTER

2%:

MOV

R3,344

;RESTORE

TIMEOUT

;CAN NOT ACCESS LKS

VECTOR

TEST

€10 LOFO DLi1=-W/1144 MFM SLU

TES T # 146 -

TEST

THAT BIT6 OF

MACRO M1113

LKS CAN BE

1838

05-NOV-80 12:32

SET & RESET

.SBTTL

PAGE 40

SEQUENCE 53

TEST # 14 - TEST THAT BIT6 OF LKS CAN BE SET & RESET

;"t""""'t""""t"""""t"""'l""'.""'."""""'

S#TEST 14 = TEST THAT BIT6 OF LKS CAN BE SET & RESET

A A2
R0
RAARAD D)

005614

1839 005616

005622
005624
005632

1840 005634

005636

1842 005642
1843 005650

005654

1845 005656
1846 005664
1847 005666

000004
005737
001460
032777
001054
000005
017703
012777
004737
000340
032777
001404

78114

002624
000100
175034

173206

005672
014400

175026

000100

175010

SCOPE
1ST
BEQ

CTSTFL
1ST15

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST

BIT

#BIT6,3SWR

TST15

;IF YES, SKIP THIS TEST

Mov
MOV

aRTCVT,RY

;SAVE LINE CLOCK VECTOR
sSET UP INTERRUPT VECTOR FOR ERROR REPORT

BNE
RESET

JSR

#18,8RT(VT
PC,WRPSW

.WORD

340

#B1T6,aLKS

104033

BIT
BEQ
ERROR

1849 005670

000402

005672

022626

1852 005674

1%:

104034

005676
1856 005704
857 005712

652777
032777
001001

1859 005714

104035

1862 005716

042777
032777
001401

000100
000100

005736
005744
005746
005754

052777
v00005
032777
001401

000100

174730

000100

174720

005756

104037

005760

010377

1863 005724
1864 005732
1865 005734

1866

1867
1868
1869
1870
1871
1872
1873
187«

000100
000100

174770
174762

’s:

2%
+33

(SP)+,(SP)+

+34

#BIT6,aLKS
#BITE,al
KS

+35
174750
174742

#B1T6,3LKS
#8176,aLKS
43

+36

104036

4%:

#B1716,3LKS
#BIT6,3LKS

+37
174712

5%:

R3,aRTCVI

;ARE LINE CLOCK TESTS

INHIBITED?

;SET PSW TO PRIORITY 7
;TEST BIT6 OF

LKS

;BIT6 OF LKS NOT CLEAR AFTE» RESET
;RESTORE

SP AFTER

INTERRUPT

;LKS INTERRUPT WIT« PRIORITY=7
;SET BIT6 OF LKS
JTEST BIT6 OF

:BR IF SET

LKS

;CANNOT SET BIT6 9F LKS

;CLEAR BIT6 OF LKS
;TEST BIT6 OF LK
:CANNOT CLEAR BIT6 OF LKS
;SET BIT6 OF LKS
;CLEAR BIT6 OF LKS WITH RESET
;TEST BIT6 OF LKS
:BR If CLEAR

;CANNOT CLEAR BITH OF LKS WITH RESET
;RESTORE LINE CLOCK VECTOR

MACRO M1113 05-NOV-80 12:32
C20LDFD DLIT=W/1144 MFM SLU
TEST # 15 - TEST FOR DUAL ADDRESSING OF REGISTERS
.SBTTL

1875

C
5
FAGE 41
SEQUENCE 54

TEST # 15 - TEST FOR DUAL ADDRESSING OF REGISTERS

ANRANNREENN AR RANCRNR AN RE OO RN

ARG RNRCOEORNOROCRARROCOEOERNOPROCOOCTTY

S+TEST 15 - TEST FOR DUAL ADDRESSING OF REGISTERS

:;'Qt"t""'Qt""""""Q"""""'.Q""'."'"""'QQ"""

1403
1904 006142
1905
1906
1907
1908 006144
1909 006150

012737
012737
000005
012700
032777
001404
013737
000403
013737
013737
040037
023737
001002
050037
017737
052777
032777
001011

013777
000401
022626
006300

070004
000006

006130
000340

TST1S:

000004
000006
173012

002674

001020

MOV

002634
001020
001022
001020

001029
001022

MOV
MOV

001022

172722

000100
000100

001024

8l7

BEQ

001022

001024

172712
172702

000004
000006

MOV

BIS
BNE

172674

MOV

000401

104040

BIC
CMP
BNE
8IS

BIT

105700
100343

010337
010437

SCOPE

MOv
Mov
MOV
MOV
RESET
Mov

000002
000020

Lo
o

000004
013703
013704

(VP

005764
1876 005766
1877 005772
1878 005776
1879 006004
1880 006012
1881 006014
1882 006020
1883 006026
1884 006030
1885 006036
1886 006040
1887 006046
1888 006054
1889 006060
1890 006066
1891 006070
1892 006074
1893 006102
1894 006110
1895 006116
1896 006120
1897 006126
1898 006130
1899 006132
1900 006134
1901 006136
1902 006140

BR
CMP

ASL
15718
BPL
BR

are ,R3

. R&
a6

8S NG

2340, 306
#B8171,RO

:2IT4.SSUR
LKS,$GDADR
2%

RCSR,$GDADR
$GDADR,$BDADR
RO,$BDADR

SgbADR.‘BDADR
3
RO,$BDADR

@8SBDADR,$GDDAT
#B8176,88BDADR
#BIT6,3$GDADR
69

ggDDAT.OSBDADR

(SP)¢+,(SP)+
RO
RO

;SAVE TIMEOUT VECTOR
;SAVE TIMEOUT PSW
;SET UP TIMEOUT VECTOR
;KEEP PR]O=7
;CLEAR EVERYTHING
;SET UP BIT MASK
;CLOCK TEST ONLY?
;BR IF NOT
;ELSE, MOVE GOOD LKS ADDRESS INTO $GDADR
:MOVF GOOD RCSR ADDRESS INTO SGDADR
;MOVL GOOD ADDRESS INTO TEST ADDRESS LOCATION
:CREATE BAD ADDRESS BY COMPLEMENTING ONE BIT
;ARE ADDRESSES IDENTICAL?

:1F NOT, TEST THIS ADDRESS

:ELSE, BIT SET THIS BIT POSITION TO GENERATE BAD ADDRESS
:SAVE CONTENTS OF BAD ADDRESS IF IT EXISTS
;SET BIT6 USING BAD ADDRESS

;CHECK TO SEE IF GOOD ADDRESS CONTAINS BIT6

;BR IF StET ==-> ERROR
;RESTORE ANY MEMORY LOCATION THAT WAS ALTERED
;BR TO CONTINUE TEST
:RESTORE SP AFTER TIMEOQUT
sSHIFT BIT MASK TO NEXT POSITION

;COMPLEMENTED ALL BITS FROM 1 - 7?
;BR, IF NOT,
;BR TO NEXT TEST

6%:

ERROR

+40

:DUAL ADDRESSING ERROR
:$BDADR = DUAL ADDRESS
;$GDADR = GOOD ADDRESS

7%:

MOV
MOV

R3,a#4
R4 ,aN6

;RESTORE
;RESTORE

TIMEOUT VECTOR
TIMEOQUT PSW

CIOLDFO DLI1-W/1144 MFM SLU
TEST # 16 - TEST

THAT BIT7 OF

MACRO M1113
05-NOV-80 12:32
LKS SETS & CAN BE CLEARED

1910

.SBTTL

PAGE 42

SEQUENCE 55

TEST # 16 - TEST THAT BIT7 OF LKS SETS & CAN BE CLEARED

;'t""""Q't't"'""""'"""""'"""""""'."""'Q'.

*TEST 16 = TEST THAT BIT? OF LKS SETS & CAN BE CLEARED
A

006154

1911 006156

e
e
b
d
- —

O VOV OO0
[V V) WA
—
OV ~NOW

1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924

006162
006164
006172

006174
006176
006202

000004
005737
001437
032777
001033
000005
105777
100401

006204

104041

006206
006214
006222
006224
006232
006240

042777
032777
001410
062777
032777
001401

006242

104042

006244
006246
006252
006256
006256

005000

932
1933 006260

15T16:

002626

000100

AR AR

1%:

000200
000200

174460
174452

000200
000200

174442
1744634

AR A

SCOPE

18T
BEQ

2%:

ARAR
ARLALRALRRA
AR RRRR R

CTSTEL
T$117

+41

;BIT7 OF LKS DID NOT SET WITH RESET

BIC

#BIT7,aLKS
#BIT7,aLKS

;CLEAR BIT7 OF LKS
;TEST BIT7 OF LKS

#B177,3LKS
#BIT7,aLKS

:TRY ONE MORE

ERROR

+42

;CAN NOT CLEAR BIT7 OF LKS

CLR

;CLEAR TIMER

;BIT7 OF LKS DOES NOT SET

BIT
BEQ
BIC
BIT

Ts117

3%
3%

005200

001373

INC
BNE

104043

ERROR

+43

174422

;IF NOT, SKIP TMIS TEST

ERROR

#BIT6,aSWR

RO
aLKS
TS117
RO
CONT

105777
100403

;1S CONSOLE UNDER TEST?

aLKsS

BNE
RESET
1ST8
BMI

BEQ

1%
CONT:

;ARE LINE CLOCK TESTS INHIBITED?
;1F YES, SXIP THIS TEST
;CLEAR EVERYTHING & SET BIT7 OF LKS
;TEST FOR BIT7 OF LKS

BIT

172646

1746472

1S78
BM]

;BR IF SET

MAY HAVE

TIME

SET

BECAUSE

THE

CLOCK

IMMEDIATELY AFTER THE

;TEST FOR BIT7 OF LKS
;BR, IF SET
; INCREMENT TIMER
;CONTINUE UNTIL TIME EXPIRES

FIRST

CLEAR

CZOLDFO DLIT-W/1144 MFM SLU
TEST # 17 - TEST

THAT

MACRO M1113

05-NOV-80 12:32

THE REAL TIME CLOCK INTERRUPTS PROPERLY

1934

LSBTTL

E. S
PAGE 43 SEQUENCE 56

TEST # 17 - TEST THAT THE REAL TIME CLOCK INTERRUPTS PROPERLY

.';'Qtt"""'t'."""""Q'"""""'""".""""".'t"""

PROPERLY
;*TEST 17 = TEST THAT THE REAL TIME CLOCK INTERRUPTS
"'Q""""Q"Q.""'
".‘"'.'t"t't't""""'""""""t'.""

006262
1935 006264
006270
006272
006300
1936 006302
1937 006306
1938 006310
1939 006314
1940 006320

000004
005737
001503
032777
001077
004737
000340
017703
017704
©€12777

1942 006334
1943 006342

012777
105777

1945 006350
1946 006352
}gzg 006354

000240
000240
000402

1949 006356

022626

1952 006362
1953 006366
1954 006374

005077
012777
004737

174306
006416
014400

1956 006402

105777

174266

1941 006326 012777
19644 006346

}gg? 006360

1955 006400

100375

000240

100375
000240

}gg? 006414

000402

022626

1965 006422
1966 006430
1967 006436
1968 006444

012777
042777
052777
105777

}8;9 006452

000240

1972 006454
1973 006456
1974 006460
1975 006462
1976 006470
1977 006474

104046
000401
022626
042777
010377
010477

1969 006450

174362
174360
006356

MOV
MOV
Mov

CTISTFL
15120
#BITH,ASWR
15120
PC,WRPSW
.WORD
340
aRTCVT,R3
dRTCPSW, R4
#2% ARTCVT

MoV
1ST8

#BIT6,aLKS
aLKS

000100

000340
000100
174326

17254C

174350

174344

174332

MOV

1%:

2$:

174302

CMP

174204

;KEEP PRIORITY AT 7

;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;BR, IF NO INTERRUPT OCCURS

1%
(SP)+,(SP)+

;RESTORE SP AFTER INTERRUPT

3%:

CLR
MOV
JSR

alKS
#4% ,aRTCVT
PC,WRPSW

;DISABLE RTC INTERRUPTS & CLEAR DONE
;SET RTC INTERRUPT VECTOR FOR ERROR
;CHANGE PSW TO PRIORITY 5

20%:

1518

aLKS

;WAIT FOR DONE (INTERRUPT REQUEST)

BPL
NOP

58:
6$:

7%:
3%:

LWORD

240

20%

;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT

;1F NO INTERRUPT - BR TO CONTINUE TEST

ERROR

+45

(SP)+,(SP)+

;RESTORE SP AFTER INTERRUPT

MOV
BIC
BIS
15718

#7%,3RTCVT
#B1717,3LKS

;POINT RTC VECTOR TO END OF TEST
;CLEAR CLOCK DONE FLAG
;ALLOW INTERRUPTS
;WAIT FOR RTC DONE

CMP

BPL

NOP

000100
174202
174200

;SET RTC INTERRUPT VECTOR TO ERROR REPORT

;RTC INTERRUPTS AT PRITRITY 7

4%:

174246
174236
174230

;CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE
;WAIT FOR RTC DONE (INTERRUPT REQUEST)

;SAVE LINE CLOCK VECTOR
;SAVE LINE CLOCK PSW VECTOR

+44

00646V
000200
000100
174224

#340,3RTCPSW

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INHIBITED?
;1F YES, SKIP THIS TEST
;SET PSW TO PRIORITY 7

ERROR

NOP

104045

100375

8PL

NOP
NOP
BR

000240

1962 006416

1822 006420

014400

SCOPE
18T
BEQ
BIT
BNE
JSR

104044

1957 006406
1958 006410

1959 006412

TST17:

002624

ERROR
BR
CMp
8IC
MOV
MOV

#BIT6,aLKS
aLKS
6%

+46
8%
(SF)+,(SP)+
#BIT6,ALKS
R3,aRTCVT
R4,3RTCPSW

;RTC INTERRUPTS WITH INTERRUPTS DISABLED

:GIVE TIME FOR INTERRUPT
;RTC INTERRUPT DID NOT OCCUR
;BRANCH OVER STACK CORRECTION
;RESTORE SP AFTER INTERRUPT
;DISABLE INTERRUPTS
;RESTORE LINE CLOCK VECTOR
;RESTORE LINE CLOCK PSW VECTOR

MACRO M1113
e ST # 20 - TEST RTC FOR DOUBLE INTERRUPTS
€l OLDFO DLI1=-W/11446 MFM SLU

1978

(05-NOV-B0 12:32

.SBTTL

F
S
PAGE 44
SEQUENCE 57

TEST # 20 - TEST RTC FOR DOUBLE

INTERRUPTS

:;"""tt'ttttt'""'"""t""'tt"."""."""""""""'

;*TEST 20 - TEST RTC FOR DOUBLE INTERRUPTS
A

006500

1979 006502

006506
006510
006516

1980 006520
1981 006522

1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993

1994
1995
1996
1997
1998
1999
2000

006526
006532
006540
006546
006552
006554
006562
006566
006570
006572
006574
006576

006609
006602
006604
006606
006614
006620

2001 006622
2002 0066264

2003 006626
2004 006630
2005 006632

2006
2007
2008
2009
2010
2011
2012

000004
005737
001463
032777
001057
000005
017703
017704
0127:7
012777
004737
000240
012777
105777
100375

1§120:

002624
000100
174150
174146

172322

006604
000340
014400

174136
174132

000100

174112

174106

AL AAAAAS

1%:

004737

006634
006636

022626

006640
006646
2013 006652

062777
010377
010477

006634
014400

174062

2%:

25%:

3%:

000100
174024
174022

174026

4$:

CTSTEL

TS121

#BIT6,aSWR
TST21

aRTCVT ,R3

R4
dRTCPSW,
#28 ARTCVT

#360,3RTCPSW

MOV
1STB
BPL

#B1T6,aLKS
aLKS
1%

ERROR
BR
CMP

MOV

JSR

NOP
NOP
NOP
NOP

104050

AR RRRRRRARRRARRRR22RRRR2RRdRRRRARRRRd)

MoV
MCV
JSR

NOP
NOP
NOP
NOP

104047

000240
000240
000240
000240
000240
000402

SCOPE
TST
BEQ
BIT
BNE

RESET
MOV
MoV

000240
000240
000240
000240
000401
022626
012777

PC,WRPSW

.WORD

240

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
;ARE

LINE

CLOCK TESTS

INHIBITED?

;IF YES, SKIP THIS TEST
;CLEAR EVERYTHING
;SAVE LINE CLOCK VECTOR
:SAVE LINE CLOCK PSW VECTOR
;SET UP RTC

INTERRUPT VECTOR

;DISALLOW INTERRUPTS AFTER THE INTERRUPT
;SET PRIORITY TO 5
;CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE
;WAIT

FOR DONE

;GIVE TIME FOR ANY INTERRUPT

;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT
;GIVE TIME FOR ANY INTERRUPT

+47

;RTC

25%

(SP)+,(SP)+

#3%,aRTCVT

PC,WRPSW

.WORD

240

INTERRUPT

DID NOT OCCUR

;BRANCH OVER STACK CORRECT,ON
;RESTORE SP AFTER INTERRUPT
;POINT RTC VECTOR TO ERROR REPORT
;SET PSW TO PRIORITY 5
;GIVE SOME TIME
;GIVE SOME TIME
.GIVE SOME TIME
;GIVE SOME TIME
;NO INTERRUPT -

FOR AN INTERRUPT
FOR AN INTERRUPT
FOR AN INTERRUPT
FOR AN INTERRUPT
BR TO END OF TEST

CMP
ERROR

+50

(SP)+,(SP)+

:RESTCRE SP AFTER INTERRUPT
; INTERRUPT SEQUENCE DID NOT CLEAR
; INTERRUPT REQUEST

#B176,aLKS
R3,aRTCVI

;DISABLc CLOCK INTERRUPTS
;RESTORE LINE CLOCK VECTOR

BlC

MOV
MoV

k& ,aRTCPSW

;RESTORE LINE CLOCK PSW VECTOR

MACRO M1113

05-NOV-80 12:32

CI0LDFO DLI1=-W/1144 MFM SLU
TEST # 21 - TEST THAT RTC INTERRUPT CLEARS WITH RESET
2014

.SBTTL

G S
PAGE 45 SEQUENCE 58

TEST # 21 = TEST THAT RTC INTERRUPT CLEARS WITH RESET

;:."'t""'tt."'"""""""'"'"'t""'Q.""".".""""

;¢TEST 21 = TEST THAT RTC INTERRUPT CLEARS WITH RESET
X

006656
006660
006664
006666
006674
006676
006702
006704
006710
006716
006724
006730
006732
006734
006740
006742
006744
006746
006750
006752
006760

000004
005737
001442
032777
001036
004737
000340
017703
012777
012777
105777

006762
006764

022626

006766

010377

100375
000005
004737
000240
000240
000240
000240
000240
042777
000402

002624
000100

2222222222 33X

1$121:

BEQ
BIT

172144

BNE
JSR

014400

006762

000100
173744

173760
173750

1%:

014400

000100

104051

173704

SCOPE
1S7

Mov
MOV
MOV
1ST8
BPL
RESET
JSR

NOP
NOP
NOP
NOP

R R R R R R

CTSTFL
TS122

#B116,35WR

18122

PC,WRPSW

.WORD

340

aRTCVT,R3

#28 ,aRTCVT
#BIT6,BLKS
alLKS
1%
PC,WRPSW

.WORD

240

R R

RaRdRlRdd)

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INMIBITED?
;IF YES, SKIP THIS TEST
;SET PRIORITY TO 7
;SAVE LINE CLOCK VECTOR

;POINT RTC VECTOR TO ERROR REPORT

;CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE
;WAIT FOR DONE

(INTERRUPT REQUEST)

;CLEAR PENDING INTERRUPT WITH RESET
;SET PRIORITY TO 5
;GIVE
;GIVE
;GIVE
;GIVE

TIME
TIME
TIME
TIME

FOR
FOR
FOR
FOR

ANY
ANY
ANY
ANY

INTERRUPT
INTERRUPT
INTERRUPT
INTERRUPT

BIC
BR

#BIT6,aLKS

;DISALLOW INTERRUPTS
;BR TO END OF TEST

CMP
ERROR

(SPY+,(SP)+
+51

;RESTORE SP AFTER INTERRUPT
;RESET DID NO! CLEAR INTERRUPT

3%:

MOV

R3,aRTCVT

;RESTORE LINE CLOCK VECTOR

173714

Li1-w/114646 MFM SLU
-~ TEST

THAT RTC

MACRO M1113

05-NOV-80 12:32

INTERRUPT CLEARS BY CLEARING BIT7 OF

.SBTTL

H
S
PAGE 46
SEQUENCE 59

TEST # 22 - TEST THAT RTC INTERRUPT CLEARS BY CLEARING BIT7 OF LKS

ceaaNtARARRRRNRRROERCEROCCRERCROERORORRRRARORNRORNRORONRNRORNOONRROARNRRONRORNGOEORNY

S+TEST 22 - TEST THAT RTC INTERRUPT CLEARS BY CLEARING BIT7 OF LKS
e

006772
2038 006774
007000
007002
007010
2039 007012
2040 007016
2041 007020
2042 007024
2043 007032
2044 007040
2045 007044
2046 007046
2047 007054
2048 007060
2049 007062
2050 007064
2051 007066
2052 007070
2053 007072
2054 007100
2055

000004
005737
001447
032777
001043
004737
000340
017703
012777
012777

2057 007102
2058 007104
2059
2060 007106

022626
104052

2056

007112
2u62 007116
2061

105777
100375

0462777
004737
000240
000240
000240
000240
000240
062777
000402

010377
004737
000340

T§122:

002626
000100

172030

173630

000200
014400

000100

173564

014400

173644
173634

SCOPE
TST

8EQ
8lv
BNE
JSR

014400
173652
007102
000190

2 ZE XX

1%:

173620

MOV
Mov
MOV
1578

BPL
BIC
JSR
NOP
NOP
NOP
NOP
BIC
BR

173574

2%:

CMP
ERROR

MOV

JSR
.WORD

XA RAZANEZARARARRRRARRR
R0 0R2RdR 2R 2Rdd)

CTSTFL
TST23

#BIT6,aSWR

15123

PC,WRPSW

.WORD

340

aRTCVT,R3
#2% ,ARTCVT

;1S CONSOLE UNDER TEST?
;1F NOT, SKIP THIS TEST
;ARE LINE CLOCK TESTS INHIBITED?

;1F YES, SKIP THIS TEST

;SET PRIORITY TO 7

:SAVE LINE CLOCK VECTOR

;POINT RTC veCTOR TO ERROR REPORT

;CLEAR DONE FLAG AND SET CLOCK INTERRUPT ENABLE

#BIT6,aALKS
aLkS
1%
#BIT7,aLKS
PC,WRPSW

;CLEAR DONE & INTERRUPT
;ALLOW INTERRUPTS

#BIT6,aLKS

;GIVE TIME FOR ANY INTERRUPT
;GIVF TIME FOR ANY INTERRUPT
;GIvt TIME FOR ANY [NTERRUPT
;GIVE TIME FOR ANY INTERRUPT
;DISALLOW INTERRUPTS

LWORD

24(

;WAIT FOR DONE

TO END OF

(INTERRUPT REQUEST)

TEST

(SP)+,(SP)+

.~t>TORE SP AFTER [NTERRUPT
;CLEARING BIT7 OF LKS DID NOT CLEAR INTERRUPT

R3,aRTCVT

;RESTORE LINE CLOCK ECTOR
;RESTOKE PRIORITY TO 7

+52

PC,WRPSW

340

MACRO M1113

(ZDLDFO DLI1=-W/1144 MFM SLU
TEST # 23 - TEST CLOCK REPEATABILITY

LSBTTL

2063

I_5
PAGE 47 SEQUENCE 60

(05-NOV-80 12:32

TEST # 23 = TEST CLOCK REPEATABILITY
22

I RN

R R R X R R

R R R XA R R RZACIAZRAARERRARRRRRRRRRRRRRR
DR

“STEST 23 - TEST CLCTK REPEATABILITY

':'tttt."t'"t't""""""'""".'""""'Q"""'Q""'QQ"

007120
2064 007122
07126
007130
007136
2065 007140
2066
2067 007146
2068 007150
2069 007154
2070 007156
20N 007162
2072 007166
2073 007170
2074 007174
2075 007200
2076 007202
2077 007204
2078 007210
2079 007212
2080 007214
2081 007216
2082 007220
2083 007224
2084 007226
2085 007232
2086 007234
2087 007236
2u88 007240
2089 007246
2090 007250
2091
2092 007254
2093 007256
2094 007262
2095
2096 007264
2097 007270
2098
2099 007272
2100 007300
2101 007302

00004

005737
001467
032777
001063
062777
005000
012701
005002
005077
105777
100375
005077
105777

15123:

002624

000100

171702

000100

173526

177777

1%:

173512

2%
3%:

100003

005202
005077
005200
001370
005201
001003
010237
000753
013701
160201
100001

005401
032737
001403
020127

4%:

002336

000003

000402
020127
003403

000001

010237

002616

032777
001402
000137

000020

104053

TOLER:

014224

69%:
7%:

BEQ
BIT
BNE
BIC
CLR

;CLEAR A TIMER

;CLEAR CLOCK COUNTER
;CLEAR DONE

MOV

#-1.R1

CLR

aLKS

8PL

CLR
TSTB

5%:

aLKS

CLR

aLKS

BPL
INC

48
R2

INC
BNE
INC

RO
33
R1

TSTB

CLR

NEG

aLkS

aLks

CMPARE
R2,FIRST
1%
FIRST,RY

R2,R1
TOLER
R

BIT #BITO,FLAGLG
BEQ 6$
CMP R1,#3

;ARE LINE CLOCK TESTS INHIBITED?

;1F YES, SKIP THIS TEST

;DISALLOW INTERRUPTS

;SET A FLAG INDICATING FIRST PASS THRU THIS LOOP
;SYNC ON DONE

;sCLEAR DONE
;IS CLOCK DONE?
;BR IF NOT , TO INCREMENT TIMER
;1F DONE, INCREMENT CLOCK COUNT
;CLEAR DONE
s INCREMENT TIMER
;BR IF TIME REMAINS
; INCREMENT LOOP PASS FLAG
;BR IF TWO PASSES HAVE BEEN MADE

;1F NOT, STORE FIRST CLOCK COUNT

;D0 LOOP AGAIN

;RECALL FIRST CLOCK COUNT
;CALCULATE DIFFERENCE OF TWO COUNTS
;IF POSITIVE,SKIP NEGATION OF DIFFERENCE
:MAKE DIFFERENCE A POSITIVE NUMBER
cxv IS THIS A 11744

-aex

:ex YES: COMPARE DIFFERENCE WITH DESIRED
;«* TOLERANCE OF 3

BR 7%
CMP
BLE

R1.M1

:COMPARE DIFFERENCE WITH DESIRED TOLERANCE
;BR, If LOWER/EQUAL TO TOLERANCE

MOV

R2,SECND

+¢5%

;STORE SECOND COUNT
;CLOCK REPEATABILITY ERROR

BIT
BEQ
JMP

#B1T4,aSWR
15124
$EOP

;CLOCK TESTS ONLY?
:BR [F NOT
;ELSE, JUMP TO END OF PASS ROUTINE

ERROR

171540

;1S CONSOLE UNDER TEST?

;1F NOT, SKIP THIS TEST

SUB
8PL

003002

CTSTFL

Ts124
#B1T6,3SWR
TST24
#BIT6,aLKS

BNF
MOV
BR
CMPARE: MOV

002336

000001

SCOPE

TST

CZOLDFO DLi1=-W/1144 MFM SLU

TEST # 24 - TEST

THAT

XMIT

MACRO M1113

05-NOV-80 12:32

INTERRUPTS ONLY WHEN ENABLED

2102

LSBTTL
R

PAGE 48

SEQUENCE 61

TEST # 24 = TEST THAT XMIT INTERRUPTS ONLY WHEN ENABLED

ZZ 2222

R R R R R R X R R R R R ERZERRZZARZZARARARRRRR
R
RRRRd)

SeTEST 24 - TEST THAT XMIT INTERRUPTS ONLY WHEN ENABLED

';'Q'tt"\"tt""'t"""t""".'."t"Q'""""""""Q""'

007306

2103 007310
2104 007316
2105 007322
2106 007330
2107 007334

2108 007336
2109 007342
%}}? 007344

2112 007346

2113 007350

2114

000004

0642777
017703
012777
105777
100375

004737

0001490
000402

173320

2122 007376
2123 007400
2124 007402
2125 007404
2126 007412

104055
000401
022626
042777
010377

000240
000240
000240
000240

TST24:

1%:

014400
2$:

104054

012777
052777

007366
007370
007372
007374

173322

022626

2115 007352
2116 007360

2117
2118
2119
g}%?

000100
173326
007346
173304

007402
000100

000100
173232

173270
173252

173226

3$:

SCOPE

BIC
MoV
MoV
1ST8

#BIT6,aTCSR
aTVECT,R3
#2%,aTVECT
S8TCSR

;CLEAR TRANSMIT INTERRUPT ENABLE
;SAVE XMIT VECTOR
;POINT XMIT VECTOR TO ERROR REPORT
;WAIT FOR DONE

JSR

PC,WRPSW

;SET PSW TO PRIORITY 3

BPL

.WORD
3s

CMP

(SP)+,(SP)+

140

ERROR

+54

MOV
BIS

#4% ,aTVECT
#8176,aTCSR

ERROR
BR
Cwp
BIC
MoV

+55
5%
(SP)+,(SP)+
#BIT6,aTCSR
R3,aTVECT

NOP
NO?
NOP
NOP

($:
S%:

;RESTORE SP AFTER INTERRUPTY

JXMIT INTERRUPTS WITH INTERRUPT ENABLE CLEAR
;SET XMIT VECTOR TO END OF TEST
;ENABLE INTERRUPTS
H
e
s
L

;XMIT DID NOT INTERRUPI
;BRANCH OVER STACK CORRECTION
;RESTORE SP AFTER INTERRUPT
;DISABLE INTERRUPTS
;RESTORE XMIT VECTOR

(Z0LDFO DL 1-W/1144 MFM SLY
TEST # 25 -

TEST

THAT XMIT

MACRO M1113

05-NOV-80 12:32

INTERRUPTS DO NOT OCCUR WHEN DISABL

2127

LSBTYTL

PAGE 49

SEQUENCE 62

TEST # 25 - TEST THAT XMIT INTERRUPTS DO NOT OCCUR WHEN DISABLED

co R RAANNANRAARNRARCEIACERRRCERNSCECCERGEOEARRORRARARONRRONRNORORQRORRCOCSORCOCETSE

S«TEST 25 = TEST THAT XMIT INTERRUPTS DO NOT OCCUR WHEN DISABLED
SR 2222 222X

007416

2128 0076420
2129 007426
2130 007432

2131 007434
2132 007440
2133 007446
2134 007452
2135 007456
2136
2137
2138
2139

007462
007464

007466
007470

%}2? 007472

2142 007474
2143 007476
2144
2145 007500
2146 007506

000004

042777
004737
000340

017703
012777
105777
100375
052777

000240
000240

2155 007534
2156 007536
2157
2158 007540

173202

000100

173156

1$:

SCOPE

BIC
JSR

MOV
MoV

1ST8
BPL
BIS
NOP
NOP

NOP
NOP

2$:

022626
104056

2151 007526
2152 007530

g}gz 007532

173210
007474
173166

TS125:

000402

2148 007520

2149 007522
2150 007524

173212

000240
000240

042777
(012777
004737
000140

2147 007514

000100
014400

000100
007534
014400

173132
173134

3%:

R R 222222222222
002 Rl Rdl

#BIT6,aTCSR
PC,WRPSW
.WCRD
340
a8TVECT,R3
#2% ,@TVECT
aTCSR
1%
#B1T6,aTCSR

llltdd)

;DISABLE INTERRUY
;SET PSW TO PRIORITY 7

;SAVE XMIT VECTOR
;POINT XMIT VECTOR TO ERROR REPORT
;WAIT FOR DONE
;ENABLE INTERRUPT
MR
A

B
s

.CONTINUE TEST

(MP
ERROR

(SP)+,(SP)+
+56

;RESTORE SP AFTER INTERRUPT

BIC
MOV
JSR

#BIT6,aTCSR
#48 ,9TVECT
PC,WRPSW
.WORC
140

;XMIT INTERRUPTS AT PRIORITY=7
;CLEAR INTERRUPT ENABLE
;POINT XMIT VECTOR TO _ERROR REPORT
;SET PSW TO PRIORITY 3

000240
000240

NOP
NOP

000402

:BR TO END OF TEST-NO INTERRUPT

cMp
ERROR

(SP)+,(SP)+
+57

;RESTORE SP AFTER INTERRUPT

MOV

R3,3TVECT

NOP
NOP

4$:

022626
104057
010377

173104

5%:

M
HA

M
Ml

;XMIT INTERRUPT OCCURES WITH BIT6 (LEAR
;RESTORE XMIT VECTOR

CIOLDFO DL11-W/1144 MFM SLU

TEST # 26 - TEST

MACRO M1113

TRANSMITTER FOR DOUBLE

2159

05-NOV-80 12:32

INTERRUPTS

LSBTTL
S

PAGE 50

5§

SEQUENCE 63

TEST # 26 - TEST TRANSMITTER FOR DOUBLE INTERRUPTS

0000200

SeTeST 26 = TEST TRANSMITTER FOR DOUBLE INTERRUPTS

Rd)

:;t"""t.t't""i"'t'tt"""t't.'.""Q""'Q."""t..t""'

007544
007546
007554
007560
007564

000004
042777
017703
017704
012777

2165 007600
2166 007604
2167 007606
2168 007612
2169 007614
2170 007622
2171 007624
2172 007626
%};? 007630

004737
000140
105777
100375
052777
000240
000240
000240
000240

2160
2161
2162
2163

2164 007572

012777

2175 007632
2176 007634

104060
000401

2178 007640
2179 007646

012777
004737

2177 007636

022626

2180 007652
2181 007654
2182 007656

000140
000240
000240

2139 007672
l!

000402

2183 007660
2184 007662
2185 007664

2188 007674
2189 007676
2190
2191 007700
%}g% 007704

000240
000240
042777

000100
173070
173066
007636

000340

014400

010477

173056

173052

173026
000100

007674
014400

000100

022626
104061

010377

173064

172744

172742

173016

173002

TST26:

SCOPE
BIC
MOV
MOV
MOV

MOV
JSR

1S18
BPL
BIS
NOP
NOP
NOP
NOP

:CLEAR INTERRUPT ENABLE
:SAVE XMIT VECTOR
:SAVE XMIT PSW VECTOR
JSET UP XMIT VECTOR

PC,WRPSW
LWORD
140
aTCSR
1%
#BIT6,3TCSR

;SET PSW TO PRIORITY 3

0346,8TPSU

;SET P10 7 AFTER INTERRUPT
;WAIT FOR DONE
;ENABLE
XL
st
s
s

INTERRUPTS

ERROR
BR

+60
25%

;XMIT INTERRUPT DID NOT OCCUR
;BRANCH OVER STACK CORRECTION INTERRUPT

MOV
JSR

#468 ,3TVECT
PC,WRPSW

;POINT XMIT VECTOR TO ERROR
;SET PSW TO PRIORITY 3

CMpP

LMWORD
NOP
NOP

172746

#BIT6,aTCSR
8TVECT ,R3
8TPSW, R4
#2% ,8TVECT

(SP)+,(SP)+

140

NOP
NOP
BIC

#B176,aTCSR

CMP
ERROR

(SP)+,(SP)+
+61

MOV

R3,ATVECT

B8R

MOV

R4 ,aTPSW

:RESTORE SP AFTER INTERRUPT

;GIVE TIME FOR ANY INTERRUPTS
:GIVE TIME FOR ANY INTERRUPTS

;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;DISABLE INTERRUPTS
;BR TO END OF

TEST

;RESTORE SP AFTER INTERRUPT
:XMIT RE-INTERRUPTED
;RESTORE XMIT VECTOR
:RESTORE XMIT PSW VECTOR

CI0LDFO DLiT-W/1144 MFM SLU
TEST # 27 - TEST THAT XMIT

MACRO M1113

05-NOV-80 12:32

INTERRUPT CLEARS WITH LOADING TBUF

2194

JSBTTL

L
PAGE 51
SEQUENCE 64

TEST # 27 - TEST THAT XMIT INTERRUPT CLEARS WITH LOADING TBUF

;;"tt..'i"""""t""""'Q"Qt""'i'.i""""""""""'

J*TEST 27 - TEST THAT XMIT
B

007710
2195 007712

2196 007720
2197 007724
2198 007726
2199 007732

2200 007740
2201 007745
2202 007754
2203 007760
2204 007764
2205 007766
2206 007772
2207 007776
2208 010000
2209 010002
2210 010004
2211 010006
2212 010010
%%}2 010016

000004
042777

004737
000340
017703
012777

052777
052777
005077
105777
100375
005077
004737
000140
000240
000240
000240
000240
042777
000405

2215 010020
2216 010022

022626
042777

2217 010030
2218

104062

?2;3 010032

010377

2221 010036
010040
010044
010046
010050
010052

005000
012701
005300
001376
00530
001374

000100

014400
172716

010020

000004
000100
172662
172654

172720

TST27:

MoV

MOV

172672
172664

1%:

172659
014400

172622

000004

172630

172612

000002

SCOPE
BIC

JSR

172710

000100

INTERRUPT CLEARS WITH LOADING TBUF

222222 22222 2222 2222222222020

BIS
BIS
CLR
1ST8
BPL
CLR
JSR

NOP
NOP
NOP
NOP
BIC
BR
2$:

#BIT6,ATCSR

PC,WRPSW
.WORD
340
8TVECT,R3
#28,8TVi(CT

#BIT2,aTCSR
#B176,3TCSR
a1BUf
aTCSR
1%
aTBUF
PC,WRPSW
.WORD
140

#BIT6,aTCSR
3%

(MP
BIC

(SP)+,(SP)+
#BIT2,3CTCSR

ERROR

+62

3%:

MoV

R3,aTVECT

408:

CLR
MoV
DEC
BNE
DEC

RO
#2.R1
RO
40%
R1
40%

BNE

0 R 2200

0000 RRdRRdd)

;DISABLE INTERRUPTS

;SET PSW TO PRIORITY 7
:SAVE XMIT VECTOR

;POINT XMIT VECTOR TO ERROR

st ENABLE MAINT. WRAP
;ENABLE INTERRUPTS
:LOAD TBUF
;WAIT FOR DONE (INTERRUPT)
:
;FILL SECOND BUFFER TO RESET INT,
;ALLOW INTERRUPTS

;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;GIVE TIME FOR ANY INTERRUPTS
;DISABLE INTERRUPTS
:BR TO END OF TEST
;RESTORE SP AFTER INTERRUPT
;** DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
sx+ WITH TERMINAL.

;LOADING TBUF DID NOT CLEAR INTERRUPT.
;RESTORE XMIT VECTOR

st~
;*+
;*+
;*%
;*+
;*+

DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
THAT MIGHT BE IN THE PROCESS OF BEING
TRANSMITTED TO FINISH BEFORE MAINTENANCE
WRAP FOR THE UART UNDER TEST IS DISABLED.
THIS WILL INHIBIT ANY COMMUNICATION
TO HARDWARE MEDIA SUCH AS TUSB THAT MIGHT

;v+ BE ATTACHED TO UART UNDER TEST.

CIOLDFO DLi1-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 30 - TEST THAY RCVR ACTIVE & DONE SET & CLEAR
2022

SBTTL

NS
PAGE 52
SEQUENCE 65

TEST # 30 - TEST

NAALAL A

AR AR A

A AR A AR

THAT RCVR ACTIVE & DONE SET & CLEAR
AR

RRARR

AL D)

0] )

S+TEST 30 - TEST THAT RCVR ACTIVE & DONE SET & CLEAR

010134

000002

172514
004000

000004

BIS
CLR

#BIT2,3TCSR
RO
#2.R1

1S18

SRBUF
RO

MoV

172526

62%:

172500

WACTV:

172510

RCVDON

DEC
BNE
DEC
BNE
CLR
CLR
BIT
BNE
INC
BNE
BIC

42$

42$
RO

s8TBUF
#BIT11,aRCSR

RO
WACTV
#BIT2,3CTCSR

[

220

;CLEAR EVERYTHING
:SET MAINTENANCE WRAP
«+ DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;e THAT MIGHT BE IN THE PROCESS OF BEING
;e RECEIVED VO FINISH AFTER MAINTENANCE
;et YRAP FOR THE UART UNDER TEST IS ENABLED.

;*« READ

TO CL:ZAR DONE

»
»

172542

#BI1T0,FLAGAS

0200200

»
»

RESET

2220020202200

000004

003002

SCOPE
BIT
BNE

105777

005300
001374
005301
001372
005000
005077
032777
001006
005200
001372
062777

000001

TSTSO:

000004
032737
001067
000005
052777
005000
012701

MNVMRON)
= s = 2O
oNNOOS~NO

b
nd

e
d

el
ol

) ol

nd
il
e

el e
—

[elelelelololole]

DOOO0OOOO

NOWN SN

NIPNIRONON)
NN
NN

222282222202

010054
(10056
010064
010066
010070
010076
010100

;CLEAR A TIMER

:LOAD TRANSMIT BUFFER
;TEST RCVR ACTIVE BIT

:BR If SET
s INCREMENT TIMER IF NOT SET
;CONTINUE WAIT IF TIME REMAINS
;** DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
;** WITH TERMINAL.

010150
010152
010152
010154
010160
010162
010164
010166

104063
005000
012701

005300
001376
005301
001374

2239 010170
2240 010172
2241 010200
2242
2243 010202
2244
2245 01020/
2246 010206
2247 010214
2248 010220
2249 010222
2250 010224
225 1 010232
2252
2253 010234

000005
032777
001401

2254 010242

124116

2s:
000002

004000

40%:

062777

000004
000000

172424

004000

172402

000004

172416

+63

;RCVR ACTIVE DID NOT SET WHILE RECEIVING

CLR
MOV
DEC
BNE
DEC
BNE

RO
#2.R1
RO
40$
R1
40%

;e* DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

BIT
BEQ

#B1T11,aRCSR

;VERIFY "INIT"' CLEARS RCV ACTIVE

ERROR

+115

SINIT DID NOT CLEAR RCV ACTIVE

CLR

RO
#B1T2,3TCSR
#0,R0
RO
Wl

;CLEAR A TIMER
sSET MAINTENANCE WRAP
sWAIT AT LEAST ONE BIT TIME

RESET

172434

1064115

005000
052777
062700
005200
001374
033777
001404

ERROR

3%:
wi:

BIS
ADD

INC
BNE
BIT
BEQ

;** THAT MIGHT BE IN THE PROCESS OF BEING
;av TRANSMITTED TO FINISH BEFORE MAINTENANCE

;*+ WRAP FOR THE UART UNDER TEST
;v+ THIS WILL

IS DISABLED.

INHIBIT ANY COMMUNICATION

;e TO HARDWARE MEDIA SUCH AS TUS8 THAT MIGHT
;** BE ATTACHED TO UART UNDER TEST.

BIT11,3RCSR

;VERIFY RCV ACTIVE STILL CLEAR
;BR If CLEAR

BIC

#B172,3CTCSR

ERROR

+116

;*¢ DISAB_E MAINTENANCE MODE FOR
s*+ CONSOLE TO ALLOW FOR COMMUNICATION
st WITH TERMINAL.
;RCV ACTIVE WITHOUT °'START'' 817

RCVOON

oooosooo

052777
035000
095077
105777

010300

104064

010302
010310
010312
010320
010322

032737
001010
032777
001604
042777

010330

104065

010332
010334
010340

000005

105777
001404

172274

010342

042777

000004

244
o
o

— i il e ) ol
i

[elelelelelolale)

)

(e Yo oYXV IV, IV, IV IV IR
WA =20V
~NOW

wo
)
(=4

(ST, ST ST NT.NT ST NT ST
AN NORINNONV
NN

MACRO M1113
05-NOV-80 12:32
Li1=w/11446 MFM SLU
TEST THAT RCVR ACTIVE & DONE SET & CLEAR

100406

005200
001373
062777

000004

172366

172362
172359

000004

RCVDON: BIS
CLR
(LR
:
WOONE

172360

000001

003002

00400C

172314

000004

172330

5%:

172310

000004

172300

7%:

RO
WOONE
#BIT2,ACTCSR

+64

BIT

zngO.FLAGAL

BIT

#BIT11,9RCSR

BNE

ERROR
A%

#B1T2,3TCSR
RO
aTBUF
aR(SR

ERROR

BEQ
eIc

104066

062777

1ST8
BMI
INC
BNE
BIC

B_6
PAGE 52-1

RESET

#BIT2,aCTCSR

+65

BEQ

sRCSR
7%

BIC

#BIT2,3CTCSR

ERROR

+66

BIC

#BIT2,3CTCSR

1S18

SEQUENCE 66

JSET MAINTENCE WRAP
:CLEAR TIMER
;LOAD TRANSMIT BUFFER
:CHECK FOR RECEIVER DONE
:BR, [F DONE
:INCREMENT TIMER, IF NOT DONE
sCONTINUE WAIT [F TIME REMAINS
;ev DISABLE MAINTENANCE MODE FOR
;ex CONSOLE TO ALLOW FOR COMMUNICATION
;v WITH TERMINAL.

;RECEIVER DONE NEVER SET
Jev

11/4477

s+ DO NOT EXECUTE THIS SECTION
:CHECK FOR RCVR ACTIVE CLEAR
:BR, IF CLEAR
;*t DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNICATION
sex WITH TERMINAL.

;RCVR ACTIVE DID NOT CLEAR WITH RCVR DONE

;CLEAR DONE WITH RESET
;CHECK FOR DONE CLEAR

;v+ DISABLE MAINTENANCE MODE FOR
s*« CONSOLE TO ALLOW FOR COMMUNICATION
st WITH TERMINAL.
;RESET DID NOT CLEAR RCVR DONE
;** DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
vt WITH TERMINAL.

CZ0LDFO DL 1-W/1144 MFM SLU
TEST # 31

MACRO M1113

- TEST THAT READING RBUF

05-NOV-80 12:32

CLEARS RECEIVER DONE

2285

.SBTTL

PAGE 53

SEQUENCE 67

TEST # 31 = TEST THAT READING RBUF CLEARS RECEIVER DONE

';'tt."""'t""'"""""""."""""""""t""""""

S+TEST 31 - TEST THAT READING RBUF CLEARS RECEIVER DONE

';""t""".""""""""""t""".""""""'Q"'.'\lt'

2294
2295
2296
2297
2298
2299

000002
172232

42%:

001374
005301
001372
005077

1%:

105777
100375

017700
042777

010440
010444
010446

105777
001401
104070

010450

000246

CLR

Mov

172220

TST8

DEC
BNE
DEC
BNE
CLR

1518
BPL
MoV
BIC
1578

BEQ
ERPROR
10%:

NOP

#BIT2,3TCSR
RO
#2.R1
aRBUF
RO

:CLEAR EVERYTHING
;SET MAINTENANCE WRAP
;ee DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;o+
;*+
;**
;*+
»

105777
005300

000004

172246

SCOPE

RESET
BIS

42%

010403
010404
010406
010410
010412
2289 010414
2290 010420
2291 010424
2292 010426
2293 010432

15131

42%

aT8UFf
adRCSR
1%

aRBUF ,RO

#B172,3CTCSR
aRCSR
108
+70

»>
® »

000004
000005
052777
005000
012701

010360
010362
010364
010372
010374

THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.
READ TO CLEAR DONE

;LOAD TRANSMITTER

;WAIT FOR RECEIVER DONE

;READ RECEIVE BUFFER
;** DISABLE MAINTENANCE MODE FOR
;v* CONSOLE TO ALLOW FOR COMMUNICATION
;** WITH TERMINAL.

;CHECK FOR RECEIVE DONE CLEAR
;** BR, *[F CLEAR TO NEXT TEST

;READING RBUF DID NOT CLEAR RCVR DONE

CZ0LDFO DLIT-W/1144 MFM SLU
TEST # 32 - TEST

THAT RDR ENABLE

MACRO M1113

(05-NOV-80 12:32

CLEARS RECEIVER DONE

2300

.SBTTL
AL

FLAG

D
6
PAGE 54
SEQUENCE 68

TEST # 32 - TEST THAT RDR ENABLE CLEARS RECEIVER DONE FLAG
2 22222
2R
R0 dRRRRR )]

(+TEST 32 = TEST THAT RDR ENABLE CLEARS RECEIVER DONE FLAG
MR

D
b
h
o
b
b od

OO NONVI
SN
= O

[aSTaNI N1, ST, N1 T, N1,N] 8
N N AN AN N N NN

000004
032737
01044
000205
05277
052777
005000
012701

010544

105077
005300
J01374
005301
001372
005077
105777
100375
032777
001401

010546

104117

010550
010556
010562
010564

052777
105777
001404
042777

010572

104067

010574

000240

AR A2

15132:

000001

BNE
RESET

000001
000004

BIS
BIS
CLR

000002
172122

42%:

172112
172100

000001

SCOPE
BIT

1%:

172070

000001
172052

172056

000004

172066

10%:

ARl R0
RRRRRRRRRRRdR 2] ]

#BITO,FLAGLS
108

#BIT0,aRCSR

;SITZ.GTCSR

MoV

1518
DEC

aRBUF
RO

BNE
DEC
BNE
CLR

1ST8
BPL

42%
R1

42%
aT1BUF

s 117446 7

;** YES DO NOT EXECUTE THIS TEST

sCLEAR EVERYTHING
;SET RDR ENABLE
;SET MAINTENANCE WRAP
c** DELAY ENOUGH TIME TO ALLOW ANY (HARACTERS
sv*

THAT MIGHT BE

IN THE

PROCESS OF

BEING

;** RECEIVED TO FINISH AFTER MAINTENANCE
;** WRAP FOR THE UART UNDER

s+ READ TO CLEAR DONE

TEST

IS ENABLED.

;Q.
MAA

;LOAD TRANSMITTER
;WAIT FOR RECEIVER DONE

BIT

aRCSR
1%
#BITO,aRCSR

;VERIFY RCV ACTIVE CLEARED RDR ENABLE
:BR IF CLEAR

ERROR

+117

:RDR ENABLE

BIS
1518
BEQ
BIC

#B1T0,aRCSR
aRCSR
108
¥BIT2,aCTCSR

:CLEAR DONE BY SETTING RDR ENABLE

ERROR

+67

BEQ

2%:

NOP

NOT

CLEARED WITH RCV

ACTIVE

:CHECK FOR DONE CLEAR
;*+ BR, IF CLEAR TO NEXT TEST
;*% DISABLE MAINTENANCE MODE FOR
;** CONSOLE TO ALLOW FOR COMMUNIC*TION
;v WITH TERMINAL.

;SETTING RDR ENABLE DID NOT CLEAR RCVR DONE
3

MACRO M1113 (05-NOV-80 12:32
%%DLDFO DLI1-W/1144 MFM SLU
ST # 33 - TEST THAT RCVR INTERRUPTS ONLY WHEN ENABL.ED
LSBTTL

2322

6
E
PAGE 55 SEQUENCE 69

YEST # 33 - TEST THAT RCVR INTERRUPTS ONLY WHEN ENABLED

':'Q't't"t..t"""""t"'""""'Q"'t"""t""""t"""'

TYTEST 33 - TEST THAT RCVR INTERRUPTS ONLY WHEN ENABLED

42%:

171752
171740
000004

1$:

171754

000405
042777

000004

010714
010716

022626

010720
010726
010734
010736
010740
010742
010744

012777
052777
000240
000240
000240
000240
062777

010752
010754
010756
010760
010766

104072

000401
022626
042777
062777

000100
000004

010774

010377

171644

171744

000004

~N~N

-t

3%:

171706

<DDWNOO

X2OODOD

#BIT6,aTCSR
#BIT6,aRCSR
#BIT2,aTCSR
RO
2 ,R1

adRBUF
RO

42%
R1

#2% ,QRVECT

.WORD

140

BIC

a18Uf
adRCSR
1%
¥BIT2,3CTCSR

3%
#BIT2,aCTCSR

(Mp
ERROR

(SP)+,(SP)+
+N

MOV
BIS
NOP
NOP
NOP
NOP
BIC

#48 ,3RVECT
#BIT6,aRCSR

#B1T2,3CTCSR

1664

4$:

5%:

;t'

sSAVE RECEIVE VECTOR
;POINT RCV VECTOR TO ERROR REPORT

;SET PSW TO PRIORITY 3
;SEND A CHARACTER

;WAIT FOR RECEIVER DONE

;*+ DISABLE MAINTENANCE “ODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
;*v WITH TERMINAL.

;CONTINUE TEST

;*+ DISABLE MAINTENANCE MODE FOR
;*v CONSOLE TO ALLOW FOR COMMUNICATION
;** WITH TERMINAL.
;RESTORE SP AFTER INTERRUPT
;RECEIVER INTERRPUTS WITH INT. ENABLE CLEAR

;POINT RCV VECTOR TO END OF TEST
;ENABLE RCV INTERRUPTS
;*v GIVE ANY INTERRUPTS TIME
;e+
;*«
;*«+
;x+
;x+

GIVE ANY INTERRUPTS TIME
GIVE ANY INTERRUPTS TIME
GIVE ANY INTERRUPTS TIME
DISABLE MAINTENANCE MODE FOR
CONSOLE 7O ALLOW FOR COMMUNICATION

:RCVR DID NOT NTERRUPT
;BRANCH OVER STA'K CORRECTION
RESTORE SP AFTER 'NTERRUPT
;DISABLE INTERRUPT:
;x* DISABLE MAINTE! ANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION

(MP
BIC
BIC
MOv

IN THE PROCESS OFf BEING

;*« RECEIVED TO FINISH AFTER MAINTENANCE
;** WRAP FOR THE UART UNDER TEST [S ENABLED.
vt READ TO CLEAR DONE

sttt WITH TERMINAL.

ERROR

1646

;*+ THAT MIGHT BE

.-tfi

42%
SRVECT ,R3
PC,WRPSW

;DISABLE TRANSMIT INTERRUPTS
;DISABLE RECEIVER INTERRUPTS
sSET MAINTENANCE WRAP
;tv DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS

1578
BPL

CLR

2%:

10407

010756
000100

1S18

DEC
BNE
DEC
BNE

MOV
MOV
JSR

171766

010706
010706

105777
100375
042777

172002

171774
010706
014400

SCOPE
l
I
)
L

000002

—

010704

105777

005300
001374
005301
001372
017703
012777
004737
000140
005077

15133

000100
000100
000004

010630
010634
010636
010640
010642
010644
010650
010656
010662
010664
010670
010674
010676

000004
042777
062777
052777
005000
012701

~N~

010576
010600
010606
010614
010622
010624

—

(o RV, P ARV

SIS
1, 1]

QS T,NT 81,0

';ttt't".'t"tt""""""""'.'."".""'Q"'Qt""""'t'Q'

R3,aRVECT

;v WITH TERMINAL.
;RESTORE RECEIVE VECTCR

CZOLDFO DLI1-W/1144 MFM SLU

TEST # 34 - TEST

THAT RCVR

MACRO M1113

(05-NOV-80 12:32

INTERRUPTS DO NOT OCCUR WHEN DISABI

2355

LSBTTL

PAGE 56

SEQUENCE 70

TEST # 34 - TEST THAT RCVR INTERRUPTS DO NOT OCCUR WHEN DISABLED

CrRANERNRRN RN RN RRCRECCONRCERNORIELERNORQEARRRARRQORNARCQEOEAROCORNQRQQOCRORORROOTS

S+TEST 34 = TEST THAT RCVR INTERRUPTS DO NOT OCCUR WHEN DISABLED
e

011000
2356 011002

0CO004
000005

2358 011010
2359 011012
2360 011016
2361 011026

000340
017703
012777
052777

2357 011004

2362 011032
011034

004737

005000
012701

011040
011044
011046
011050
011052
2363 011056
2364 011060
2365 011062

105777
005300
001374
005301
001372
105777
100375
005077

2367 011072
2368 011074

100375
052777

2366 011066

105777

2369 011102
2370 011104
2371 011106
2372 011110
2373 011112

000240
000240
000240
000240
000405

2575 011114

042777

2374 011114

2376 011122

022626

2379 011126
2380 011134

042777
012777

2382 011146
2383 011150

000140
000240

%%;g 011124

2381 011142

2384 011152
2385 011156

ggg? 011162
2388 011164

TST134:

171626
011114
000004

MoV
MOV
BIS

171620
171606

(LR
MoV

000002
171572

42%:

167770

6$:

171554
171542

1%:

000100

000004

004737

000240
042777

000100
011164

014400
000004

171532

171536

2%:

171500
171502

3$:

2390 011172

022626
104074

0000064

171466

R RS

.WORD
340
aRVECT,R3
#2% ,ARVECT
#BIT2,aTCSR

RO
#2,R

;SAVE RECEIVE VECTOR
;POINT RCVR VECTOR TO ERROR REPORT
;SET MAINTENANCE WRAP

;e DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;*« THAT MIGHT BE IN THE PROCESS OF BEING
;*+ WRAP FOR THE UART UNDER TEST

1%
#BITE,3RCSR

NOP
NOP
NOP
NOP
BR

;SET PSW TO PRIORITY 7

;v« RECEIVED TO FINISH AFTER MAINTENANCE

BPL
BIS

1S18

R RN
RRRRRRRRd)

;CLEAR EVERYTHING

PC,WRPSW

aRBUF
RO
42%
R1
42%
a$TPS
6%
a8 1BUF

;** READ TO CLEAR DONE
e
b
A
i
;TEST FOR XMIT READY
.LOOP IF NOT
;SEND A CHARACTER

aRCSR

BIC

¥BIT2,aCTCSR

CMP

(SP)+,(SP) ¢

IS ENABLED.

;WAIT FOR RECEIVER DONE

.ENABLE INTERRUPTS
;** GIVE TIME FOR INTERRUPT
;*+ GIVE TIME FOR INTERRUPT
;*+ GIVE TIME FOR INTERRUPT
;** GIVE TIME FOR INTERRUPT
;CONTINUE TEST

;v DISABLE MAINTENANCE MODE FOR

;+* CONSOLE TO ALLOW FOR COMMUNICATION
;*v WITH TERMINAL.

;RESTORE SP AFTER INTERRUPT

ERROR

+73

;RCVR INTERRUPTS AT PRIORITY 7

8IC
MOV

#B176,aRCSR
#4% ,aRVECT

;CLEAR INTERRUPT ENABLE
;POINT RCVR VECTOR TO ERROR REPORT
;SET PSW TO PRIORITY 3

PC,WRPSW
.WORD

140

#B1T2,aCTCSR

;GIVE TIME FOR ANY INTERRUPT
:GIVE TIME FOR ANY INTERRUPT
;*+ DISABLE NAINTENA'.CE MODE FOR

;BR TO END OF TEST, IF NO INTERRUPT

BIC

#B172,3CT(SR

;t* DISABLE MAINTENANCE MODE FfOR

CMP

(SP) ¢+, (SP)+

NOP
NOP
BIC

171476

1ST8
DEC
BNE
DEC
BNE
1ST8
BPL
CLR

JSR

000405
042777

SCOPE
RESET

JSR

014400

104073

2389 011164

2391 011174
2392

222222222

ERROR

+74

;++ CONSOLE TO ALLOW FOR COMMUNICATION
;t* WITH TERMINAL.

;tv CONSOLE TO ALLOW FOR COMMUNICATION
st WITH TERMINAL.

;RESTORE SP AFTER INTERRUPT
;RCVR INTERRUPT REQUEST PASSED WITH BIT16 (LEAR

f
¢ IDLDFO
DL11=W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:3¢

35 - TEST RECEIVER FOR DOUBLE INTERRUPTS

131 ’

2 393 011176
2 39¢

010377

5%:

171442

LSBTTL

G_ 6
SEQUENCE 71
PAGE 57

;RESTORE RECEIVE VECTOR
R3,aRVECT
TEST # 35 - TEST RECEIVER FOR DOUBLE INTERRUPTS

MOV

ceadeARRRORRARRRAOICRORCQRCERRCECROOROERRRRRQRRRONRRROREORROOTRNOARNCOONCECOCOETDR

CeTEST 35 = TEST RECEIVER FOR DOUBLE INTERRUPTS

005200
012701

105777

2404
2407

0462777

012777
004737
000140
000240
000240
000240
000240
062777
010377
010477
000402

022626

2432 011404

010377

b
b
d
h

NONIMNIOO

b
b
o
i
b e

—d

—

-—

—d D and wd el d

d e

) i

) b =D b b

DOO0OOOOOO0OOO0O0OD
-

[+ ]

N
»

&~NOO0O

AN NN NN
NN
— —

104075
000401
022626

OO0O0O0O
b ah
b b

052777
000240
000240
000240
000240

NN N AN AN N AN AN AN AN N NN N
NSNOO VWS S WL

105777
100375

e~
D

—

H
-

017703
017704
012777
012777
004737
000140
052777

005300
001374
005301
001372
005077

n
&~

18735

000004
000005

—

WV
B NNIN = 2000
oo
NN

AN APVNININININININD

b
D

b
d

e md

D ek

D
D

d
—

2395
2396
2397
2398
2399
24600
2601
24602
2603

D i

[elaleololelolololelels]

AR ARNENNA

SCOPE

RESET
MOV
MOov
Mov
MOV

JSR

000004

171372

BIS
CLR

000002

MOV

42%:

171356

171346
171334

1%:

000004

171350

000100

171316

171302

171234

1S18

DEC
BNE
DEC
BNE
CLR

SRVECT,R3

R4
aRPSW,
#2% ARVECT

2345, aRPSW
PC,WRPSW

JWORD

140

#BIT2,3TCSR
RO
#2 R
aRBUF
RO

42%
R1

BIC

42%
a1BUF
aRCSR
1%
#BIT2,aCTCSR

BIS

#BIT6,aRCSR

ERROR
B8R
CMP

+75

1ST8
BPL

NOP
NOP
NOP
NOP

2%:
25%:

MOV

JSR
.WORD

NOP
NOP
NOP
NOP

25%

(SP)+,(SP)+
#3%,3RVECT
PC ,WRPSW

140

MOV
MOV

#BIT6,aRCSR
R3,aRVECT
R4 ,3RPSY
L3

3%:

CMP
ERROR

(SP)+,(SP)
¢+
+76

Mov

R},aRvLCT

171246

104076

N E A C AN NP RN R LP LR O ERN RN NN RRAANNRNRNNRROROQROORQROOCTOICECOTORS

BIC

;CLEAR EVERYTHING
;SAVE RECEIVE VECTOR

;SAVE RECEIVE PSW VECTOR

;POINT RCV VECTOR TO CONTINUE TEST
;SET PRIORITY TO 7 AFTER INTERRUPT
;SET PSW TO PRIORITY 3
;SET MAINTENANCE WRAP

;** DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
v+ THAT MIGHT BE

IN THE PROCESS OF BEING

;¢ RECEIVED TO FINISH AFTER MAINTENANCE
;*+ WRAP FOR THE UART UNDER TEST IS ENASLED.
;*« READ TO CLEAR DONE
c AW

;tt
;t'

:tfi

;SEND A CHARACTER

;JWAIT FOR RCVR DONt
;*+ DISABLE MAINTENANCE MODE FOR
s+« CONSOLE TO ALLOW FOR COMMUNICATICN

;vv WITH TERMINAL.

;ENABLE RCV INTERRUPTS
;** GIVE SOME TIME
;*r GIVE SOME TIME
;** GIVE SOME TIME
;*+ GIVE SOME TIME

:RCVR INTERRUPT DID NOT OCCUR
;BRANCH OVER STACK CORRECTION
JRESTORE SP AFTER INTERRUPT
sPOINT RCV VECTOR TO ERROR REPORT

;RESET PSW TO PRIORITY 3

;*+ GIVE SOME TIME
;*+ GIVE SOME TIME
st GIVE SOME TIME
;v GIVE SOME TIME
;CLEAR INTERRUPT ENABLE
-RESTORE RECEIVE VECTOR
;RESTORE RECEIVE PSW VECTOR
:BR TO END OF TEST
;RESTORE SP AFTER INTERRUPT

;RECEIVER RE~INTERRUPTED
;RESTORE RECEIVE VECTOR

(IOLDFO DLI1-W/1144 MFM SLU
TEST # 36 = TEST THAT RCVR

MACRO M1113

INTERRUPT

05-NOv80 12:32

CLEARS BY READING RBUF

24633

LSBTTL

PAGE S8

SEQUENCE 72

TEST # 36 = TEST THAT RCVR INTERRUPT CLEARS BY READING RBUF

X222 22X

Y2 R R

2222

SRR X222 222222 dRRR

“¢TEST 36 = TEST THAT PCVR INTERRUPT CLEARS BY READING P&uF
R

011410
2634 011412

000004
000005

2436 011420
2637 011422
2638 0114626
2639 01164346
2640 011442

000340
017703
012777
052777
052777

2635 011414

2641 011450
011452
011456

011462
011464
011466
011470

2642 011472
26443 011476
2444 011502
2445 011504

2646 011512
2647 011516
2448 011522

004737

005000
012701

222222223

TS736:

JSR

014400
171216
011544
000100
000004

171210
171172
171170

171154

42%:

005077
105777
100375
042777

171144
171132

1$:

005077
004737
000140

000004

171146

R R

XX R R R

1ST18

aRBUF

DEC
BNE
DEC
BNE

CLR
1ST18
BPL
BIC

RO
¥ ,R1

222222

RRRRRRl)

;SET PSW PRIORITY TO 7
;SAVE RECEIVE VECTOR
;POINT RCV VECTOR TO ERROR REPORT
;SET RCVR INTERRUPT ENABLE
;SET MAINTENANCE WRAP
;*v DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;*+ THAT MJGHT BE IN THE PROCESS OFf BEING
;*+ RECEIVED TO FINISH AFTER MAINTENANCE
;*+ READ TO CLEAR DONE

a1BUF
aRCSR
1%
#BIT2,aCTCSR

LWORD

R R R

;*+ WRAP FOR THE UART UNDER TEST IS ENABLED.

RO
423
R1
42%

aRBUF
PC,WRPSW

R R

;CLEAR EVERYTHING

PC,WRPSW

.WORD
340
aRVECT,R3
#2% ,aRVE(CT
#B176,aRCSR
#BIT2,3TCSR

CLR
JSR

171120
014400

MOV
MOv
BIS
8IS

CLR
MOov

000002

105777

005300
001374
005301
001372

SCOPE
RESET

dldRd)

Jv
s
P
Ml

;SEND A CHARACTER
;WAIT FOR DONE (INTERRUPT)
s+ DISABLE MAINTENANCE MODE FOR
;*+ CONSOLE TO ALLOW FOR COMMUNICATION
;¢ WITH TERMINAL.

140

;READ RBUF TO CLEAR PENDING INTERRPUT
;Sti PSW TO PRIORITY 3

;*v ALLOW TIME FOR ANY ERRONEOUS INTERRUPT

2449 011524

000240

NOP

26451 011530
2652 011532
2453 011534

000240
000240
042777

NOP
NOP
BIC

#BIT6,aRCSR

;*« ALLOW TIME FOR ANY ERRONEOUS INTERRUPT
;++ ALLOW TIME FOR ANY ERRONEOUS INTERRUPT
;NO INTERRUPT-CLEAR INT. ENABLE

CMP

ERROR

(SP)+,(SP)+

+77

;RESTORE SP AFTER INTERRUPT

MoV

R3,aRVECT

;RESTORE RECEIVE VECTOR

2450 011526

gzgg 011542

2456 011544

sagg 011546
4

2459 011550

000240

000402

NOP

000100

B8R

2%:

022626

104077

010377

171072

171070

3%:

;*+ ALLOW TIME FOR ANY ERRONEOUS INTERRUPT

;READING RBUF DID NOT CLEAR INTERRUPT

‘

MACRO M1113 (05-NOV-80 12:32
DLDFO DL 11-W/1144 MFM SLU
S T # 37 - TEST THAT RESET CLEARS RECEIVE INTERRUPT
SBTTL

2460

X222

PAGE 59

SEQUENCE 73

TEST # 37 -~ TEST THAT RESET CLEARS RECEIVE INTERRUPT
2

R R R R 2222222222222
R R Rl
RRiRilRRRRRd)

OO OO NYWVYV WAL
-t OO NN
osroonNNORT OO0

000004
000005

004737
000340
017703
012777
052777
052777
005000
012701

014400

~NooooooOrOrOrOFOOOOOROPORONON
QO NNOOCO
O NN \N S WNWNIWWNINRNI N
OO NOTNO
SO
OO

d
D
)

sd el e
i

D
D el

i wnld
D

D
d

D
-

—t
D

b
b

d
d

D
D

P
d

d
D

d
ed
D

D o

d
o

o- ]
-0

2479

2478

(=] [elelaleloleolalolalelolelolalete)

ANV
F oW W
B
Y
¥ Y
SNSNSNSNSNNNN

~NOWVIS
LN =20

2469

2463
2464
2465
24L66
24L67
2668

2461
2462

[e]leololalelolelelelw]

;+TEST 37 - TEST THAT RESET CLEARS RECEIVE INTERRUPT

105777

171010

2482
2483 011792
2484 011704
2485
2486 011706

005300
001374
005301
001372
012777

105777
100375

000005
004737
000140
000240
000240
000240
000240
062777
000402

ISR

SCOPE
RESET
JSR

171052

MoV
MOV

011702
000100
000004

BIS
BIS
CLR

000002

000377
170764

Mov

42%:

170776

1%:

000100

104100

170732

1S18
DEC
BNE
DEC
BNE
MOV
1ST8
BPL
RESET

JSR

014400

022626

010377

XLz

TST37:

NOP
NOP
NOP
NOP
BIC
BR

170734

2R 2R

RRRRRRtiRdlll)

;CLEAR EVERYTHING

PC,WRPSY

.WORD
340
aRVECT ,R3
#2% ,aRVECT
#BIT6,aRCSR

#BIT2,3TCSR

RO
#2,R1

;SET PSW TO PRIORITY 7

;SAVE RECEIVE VECTOR
;POINT RCV VECTOR TO ERROR REPORT

;SET RCV INTERRUPT ENABLE
;SET MAINTENANCE WRAP
;*« DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
;e« THAT MIGHT BE IN THE PROCES>S OF BEING
;«« RECEIVED TO FINISH AFTER MAINTENANCE
;v+ WRAP FOR THE UART UNDER TEST IS ENABLED.
;** READ TO CLEAR DONE

aRBUF
RO

‘AR

42%

rhw

‘R

42%
#377,37BUF

:SEND AN ALL 1'S CHARACTER

PC,WRPSW

;CLEAR RCV INTERRUPT & RBUF
;SET PSW TO PRIORITY 3

aRCSR
1%

.WORD

140

#BIT6,IRCSK

sWAIT FOR RCV DONE

;*+
;*+
;*+
;*+

ALLOW
ALLOW
ALLOW
ALLOW

TIME
TIME
TIME
TIME

FOR
FOR
FOR
FOR

AN ERRONEOUS
AN ERRONEOUS
AN ERRONEOUS
AN ERRONEOUS

:NO INTERRUPT-CLEAR INT. ENABLE
;CONTINUE TEST

2$:

CMP
ERROR

(SP)+,(SP)+
+100

;RESTORE SP AFTER INTERRUPT

3%:

Mov

R3,aRVECT

;RESTORE RECEIVE VECTOR

INTERRUPTY
INTERRUPT
INTERRUPT
INTERRUPT

;RESET DID NOT CLEAR RCVR INTERRUPT

CIOLDFO DLI1=-W/1144 MFM SLU
TEST # 40 - TEST

THAT

MACRO M1113

05-NOV-80 12:32

THE ''OR"’ ERROR & "‘ERROR'’ CAN BE

2487

SBTTL

SET

J
6
PAGE 60 SEQUENCE 74

TEST # 40 -~ TEST THAT THE ''OR'' ERROR & ''ERROR’'' CAN BE SET

ttt!t'tt'ttt"t"'t""""t"t'tt"'tt"t"ttt't't'ttt'tt'tt"

:*TEST 40 - TEST THAT THE ''OR’' ERROR & ''ERROR'' CAN BE SET
R

011712
2688 011714
2489 011722
2490 011724
2491 011732
%2g§ 011734

0000604
032777
001465
032737
001407
005737

2494 011740

001404

2495 011742

(32777

2497 011750

001452

2496

2498 011752
2499 011754
2500 011762
011764

2501
2502
2503
2504
2505

011770
011774
011776
012000
012002

000005
052777
005000
012701
105777
005300
001374
005301
001372

002000

167116

000001

003002

000010

000004

9%:

42%:

1%:
2$:

2507 012026

042777

000004

2508 012034
2509 012042
2510 012044

032777
001001
104101

040000

2513 012046
2514 012054
2515 012056
2516
2517 012060
2518 012060
012062
012066
012070
012072
012074

032777
001001
104102

100000

005000
012701
005300
001376
005301
00137¢

170656

170624

3$:

43:
000002

#81710,8SWR
TST41
#BITO,FLAGLS
9%
CTSTFL

;IS
;1F
cee
;*e
XL

BEQ

;v NO

BCQ

T$T41

40$:

#BIT03,aSWR

RESET
BIS
CLR
MOV

#8172,aTCSR
RO
#2.R1

TST8
DEC
BNE
DEC
BNE

aRBUF
RO
429
R1
429

BNE

MOV
CLR
TSTB
BFL
DEC
BIC

170574

170562

SCOPE
BIT
BEQ
BIT
BEQ
TST

BIT

170642

000003
170626
170620

%g}}

167070

000002

012700
005077
105777
100375
005300
001371

TSTLO

002624

012004
012010
012014
012020
012022

2506 012024

3522232223222 22222222X2222202232222323223222222232222302222232222223}]

THIS TEST ENABLED
NOT ENABLED, BR TO NEXT TEST
IS THIS A 11744
NO
;ES THIS IS 11744, IS THIS THE CONSOLE
LU

;e THIS IS THE CONSOLE SLU.SHOULD THE OVERRUN
:*+ ERROR TEST BE PERFORMED
;xv NO

;CLEAR EVERYTHING
;SET MAINTENANCE WRAP
;xt DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
:ex THAT MIGHT BE IN THE PROLESS OF BEING

;*« RECEIVED TO FINISH AFTER MAINTENANCE
;ev YRAP FOR THE UART UNDER TEST

;*+ READ TO CLEAR DONE
M
L
X3
:"

#3,R0
aTBUF
aTCSR
2%
RO

:SET CHARACTER COUNT TO SEND 3 (HAR.
;LOAD TRANSMIT BUFFER
:WAIT FOR TRANSMIT DONE

#BIT2,aCTCSR

;*+ DISABLE MAINTENANCE MODE FOR
;x+ CONSOLE TO ALLOW FOR COMMUNICATION

;DECREMENT CHARACTER COUNT
;BR

ALL CHARACTERS NOT

TRANSMITTED

;ev WITH TERMINAL.

BIT
BNE
ERROR

#B1T14,3RBUF
b1
+101

BIT
BNE
ERROR

#BIT15,aRBUF
(s
+102

:TEST "ERROR'' FLAG
;BR, IF SET

CLR
MOV
DEC
BNE

RO
#2.R1
RO
403
R1
40%

;ex
:et
ce+
;**
;xt
;**

DEC
BNE

IS ENABLED.

;TEST FOR ''OR'' ERROR FLAG
;BR, IF SET

:"'OR'* ERROR FLAG DID NOT SET

;""ERROR'' FLAG DID NOT SET WITH °'OR'" FLAG
DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
THAT MIGHT BE IN THE PROCESS OF BEING
TRANSMITTED TO FINISH BEFORE MAINTENANCE
WRAP FOR THE UART UNDER TEST IS DISABLED.
THIS WILL INHIBIT ANY COMMUNICATION
TO HARDWARE MEDIA SUCH AS TUS8 THAT MIGHT

;*+ BE ATTACHED TO UART UNDER TEST.

CI0LDFO DLI1=-W/1144 MFM SLU

TEST # 41 - TEST

MACRO M1113

(05-NOV-80 12:32

THAT BREAK TRANSMITS ALL ZEROES

2519

LSBTTL

PAGE 61

SEQUENCE 75

TEST # 41 - TEST THAT BREAK TRANSMITI ALL ZEROES

X222 222X

R R R R R R R

R R R A

RSN RARRRRRRRRRdRRRRRRd)

SeTEST 41 = TEST THAT BREAK TRANSMITS ALL ZEROES
012076

000004

2520 012100
2521 012106
2522 012110
2523 012116
%g%g 012120

032777
001501
032737
001407
005737

2526 012124

001404

2528
2529 012134
2530 012136
2531 012140

001466
000005
052777

2527 012126

2532 012146
012150
012154

032777

005000
012701

000400

166732

000001

003002

000004

170456

2533 012170
2534 012176
2535 012202
2536 012204
2537 012210

012777
105777
100375
005077
052777

177777
170432

2539 012220
2540 012226
2541 012230
%gz% 012232

005300
001374
005301
001372

166704
170472

170426

170444

1704¢°2

117737
100411
005200
001372

170410

001026

25644 012234
2545 012242

042777
042777

000001
000004

170376
170410

3229 012250

104103

2548 012252
2549 012256
2550 012260
2557 012266

105777
001407
042777
042777

25952

005000

170360
000001

000004

170352

170364

SCOPE

1%:

2§%:

XX ARZEZAZZISANARASAARRAR
R0 R RRRRRRRdld)

BIT
BEQ
BIT
SEQ
ST

#BIT8,35WR
15742
#BITO,FLAGLS
9%
CTSTFL

;1S BREAK FUNCTION TEST ENABLED?
;BR TO NEXT TEST, IF NOT ENABLED
;ev IS THIS A 11/4¢4
;** NO
s ;ES THIS IS 11/44, IS THIS THE CONSOLE

BEQ

BIT

#B1703,a5WR

s+ NO

BEQ
RESET
8IS

TST42

;*+ TEST BE PERFORMED
st NO
:CLEAR EVERYTHING
;SET MAINTENANCE WRAP

(LR
MOV

42%:

00000

2538 012216

9% :

000002

105777

012160
012162
012164
012166

TST41:

002624
000010

#BIT2,3TCSR
RO
#2 ,R1

;ve

SLU

;e+ THIS IS THE CONSOLE SLU.SHOULD THE BREAK

;e DELAY ENOUGH TIME [0 ALLOW ANY CHARACTERS
;*+ THAT MIGHT BE IN THE PROCESS OF BEING
;v« RECEIVED TO FINISH AFTER MAINTENANCE
;*+ WRAP FOR THE UART UNDER TEST

1ST8

aRBUF

(0]
1ST8
BPL
CLR
815

#-1,aTBUf
aRCSR
1%
aRBUF
#B170,3TCSR

MOv8
BMI
INC
BNE

aRCSR,$BODAT
CONT&
RO
2%

;CLEAR A TIMER

BIC
BIC

#BI1T0,3TCSR
#81T2,aCTCSR

;CLEAR BREAK BIT
s+« DISABLE MAINTENANCE MODE FOR

ERROR

+103

DEC
BNE
DEC
BNE

CLR

CONT&L1: TSTB
8eaQ
8IC
BIC

RO
42%
R1
42%

aRBUF
3%
#B110,3TCSR
#B8172,3CTCSR

;** READ TO CLEAR DONE

IS ENABLED.

A
st
Mol
Bl

; TRANSMIT ALL ONES TO RCVR
;WAIT FOR RCVR DONE

;CLEAR DONE (LEAVING ALL ONES IN RBUF)
; TRANSMIT BREAK

;WAIT FOR RCVR DONE
;BR IF DONE
;1F NOT, INCREMENT TIMER
:BR IF TIME REMAINS
;*~ CONSOLE TO ALLOW FOR COMMUNICATION
;v WITH TERMINAL.

;BREAK DID NOT TRANSMIT ANYTHING

;CHECK RECEIVE BUFFER FOR ZERO
:BR, IF ZERO
:CLEAR BREAK BIT
;++« DISABLE MAINTENANCE MODE FOR

;#% CONSOLE TO ALLOW FOR COMMUNICATION
;v WITH TERMINAL.

%ggz 012274

104103

2555 012276
2556 012304

042777
042777

000001
000004

170334
170346

3%:

ERROR

+103

;BREAK DID NOT TRANSMIT ALL ZEROES

BIC
BIC

#8110,aTCSR
#BI12,38CTCSR

:CLEAR BREAK BIT
;t* DISABLE MAINTENANCE MODE fOR

;*+ CCNSOLE TO ALLOW FOR COMMUNICATION
c*v WITH TERMINAL.

CIOLDFO DL 1-W/1144 MFM SLU

TEST # 42 - TEST

MACRO M1113

(05-NOV-80 12:32

THAT ''FR'" ERROR CAN BE SET DURING BREAK

2557

LSBTTL
X

PAGE 62

SEQUENCE 76

TEST # &2 - TEST THAT "'FR'"" ERROR CAN BE SET DURING BREAK

2R 222

222X

RRRRRRRRRd))

SeTEST 42 = TEST THAT “'FR'* ERROR CAN BE SET DURING BREAK
032777
001464
032777
001460
032737
001407
005737
001404
032777

'66516

000400

166506

000001

003002

002624
000010

000004

SCOPE

BIT
BEQ
8Iv
BEQ
BIT
BEQ
TST

2222222 KRR

#B81110,8SWR
TST43
#BIT8,3SWR
TST43
#BITO,FLAGALL
9$
CTSTFL

222 20220000 RdRRRRdRlRRRiRRd)

. 1S THE "'TEST ERROR FLAGS'® BIT SET
;BR TO NEXT TEST, IF NOT SET
J IS BREAK FUNCTION ENABLED
;BR TO NEXT TEST, IF NOT SET
;tfi
IS THIS A 11/44
[

166460

170246

9s:

000002

BEQ
BIT

9¢
#B1703,aSWR

BEQ
RESET
BIS
CLR

TST43

MOV

#BIT2,3TCSR
RO
#2,R1

R
3

8 3]

105777

005300
001374
005301
001372
052777
005077

105777
100375

2578 012442

042777
042777

42%:

170232

000001

170214
170202

000001
000004

170216
1%:

170176

170210

TST8
DEC
BNE
DEC
BNE
BIS
CLR
1sT18
BPL
BIC
BIC

aRBUF
RO

42%
R1
42%
#BIT0,aTCSR
a TBUF
aRCSR
1%

#8170,aTCSR
#B1T2,3CTCSR

13 8

2582 012460

104104

2584 012462
2585 012470

032777
001001

2587 012472
2588
2589 012474

104114

020000

100000

170160

170146

2s:

38:

#B1713,3RBUF
23

ERROR

+104

BIT

a21115.aaaur

ERROR

+114

BNE

IS THIS THE CONSOLE

THIS IS THE CONSOLE SLU.SHOULD THE FRAME
ESROR TEST BE PERFORMED

THAT MIGHT BE IN THE PROCESS OF BEING
RECEIVED TO FINISH AFTER MAINTENANCE
WRAP FOR THE UART UNDER TEST IS ENABLED.
READ TO CLEAR DONE

‘H
%
;t'

: SEND BREAK
;TRANSMIT A CHARACTER TO TIME BREAK
;WAIT FOR RCVR DONE

;CLEAR
ke

)

‘KN

BIT
BNE

SLU

5 31

*hR

032777
001001

YES THIS IS 11/44.

2579 012450
2580 012456

;CLEAR EVERYTHING
:SET MAINTENANCE WRAP
s
DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
-

001445
000005
052777
005000
012701

002000

TS142:

SOOI

50
352

OOO0O0O
— i d el b

OO0
- ol

o
»

~nN

O0O0OOOO0OO0O0O

X2 2222222222

000004

)

BREAK BIT

DISABLE MAINTENANCE MODE FOR
CONSOLE TO ALLOW FOR COMMUNICATION

WITH TERMINAL.

;CHECK FOR FRAMING ERROR FLAG
:BR,

If SET

;BREAK DID NOT SET FRAMING ERROR
;TEST ''ERROR''FLAG
:BR,

SET

;"'ERROR'' FLAG DID NOT SET WITH "'OR'" FLAG

CIZOLDFO DLi1-W/1144 MFY SLU

MACRO M1113

05-NOV-80 12:32

PAGE 63

TEST # 43 - TEST DATA PATH FROM XMIT TO REC USING MAINT WRAP

2590

LSBYTL
R

SEQUENCE 77

TEST # 43 - TEST DATA PATH FROM XMIT TO REC USING MAINT WRAP
R

IRAREEARIZRRRZRNERAR
AL AR
RRRRRR]

SeTEST 43 = TEST DATA PATH FROM XMIT TO REC USING MAINT WRAP

;:"""t""'t't"tt""""""'.'I'tt"'.""""""'t'QQ""

2501 012474

000004

2592 012476
2593 012500
2594
2595

000005
052777

2596
2597 012506
012510
012514

012520
012522
0125264
012526

2598 012530
2599 012532
2600 012534
2601 012542
2602 012544
2603 012550
2604 012552
2605 012556
2606 012560
2607 012564
2608 012570
2609 012572

2610 012576
2611 012602

18743:

000004

170132

005000
012701
105777

005300
001374
005301
001372

005001
105201
032737
001406
122701
001770
122701
001765
010177
105777
100375
017702

043701

020102

2613 012606
261. 012610
2615 012612
2616 012614
2617 012620
2618 012626

105701
001411
000747
010137
010237
042777

sg;g 012632

104105

2622 012634

RESET
BIS

#BIT2,aTCSR

CLR
MOV

RO
#2.R]

o
000002
170116

000001

428:

003002

000020
000220

5
2¢:

170056
170044
170040

001112

042777

001024
001026
000004

000004

170026

170016

4$:

TSTB

aRBUF

CLR
INCB
BIT
BEQ
CMPB
BEQ
CMPB
BEQ
MOV
TSTB

R1
R1
#BITO.FLAG4L
5¢
#20,R1
1$
#220,R1
1$
R1,aTBUF
aRCSR

BEC
BNE
DEC
BNE

BPL
MOV

RO
42%
P
42

2%
aRBUF ,R2

BIC

a¥SUSWR,R1

BNE

({3

CMP

2612 012604 001003

2621 012634

SCOPE

R1,R2

;CLEAR EVERYTHING
“SET MAINTENANCE WRAP
“TRANSMIT A BINARY COUNT PATTERN - UP
10 THE BIT POSITION INDICATED BY THE

*CONTENTS OF LOCATION '‘SUSWR"
‘et DELAY ENOUGH TIME TC ALLGW ANY CHARACTERS
‘e« THAT MIGHT BE IN THE PROCESS OF BEING

“«e RECEIVED TO FINISH AFTER MAINTENANCE

‘e« WRAP FOR THE UART UNDER TEST IS ENABLED.

“«« REAC TO CLEAR DONE
ue
Tue
Pee
ive

“CLEAR REGISTER FOR TEST DATA
*INCREMENT THE TEST DATA
-e% 11/44 CPU
“ee TEST ALL DATA
“we CHECK FOR CONT-P IN TEST DATA
“ee DO NOT XMIT “P
e
“ee DO NOT XMIT 220
"XMIT A CHARACTER
"WAIT FOR RECEIVER DONE
;GET RECEIVED CHARACTER

“CLEAR LOWEST UNUSED DATA BIT POSITITON IN TEST DATA
*COMPARE DATA

‘BR, IF NON-COMPARE

1STB
BEQ
BR
MOV
MOV
BIC

Ri
48
1%
R1,$GDDAT
R2.$BODAT
#BiT2.3CTCSR

*TEST XMIT DATA FOR ZERO
BR, IF FINISHED
SCONTINUE IF NOT
*STORE THE EXPECTED DATA
*STORE RECEIVED DATA
i+« DISABLE MAINTENANCE MODE FOR

ERROR

+105

‘DATA COMPARE DATA

BIC

#BIT2,3CTCSR

“ex CONSOLE TO ALLOW FOR COMMUNICATION
‘et WITH TERMINAL.

:*+ DISABLE MAINTENANCE MODE FOR

“ex CONSOLE TO ALLOW FOR COMMUNICATION
“ee WITH TERMINAL.

2623
2624

(ZOLDFO DLiT=W/1144 MFM SLY
TEST # &4 - TEST

MACRO M1113

05-NOV-80 12:32

DATA PATHS USING LOOP-BACK CONNECTOR

2626

LSBTTL

SR A2

PAGE 64

SEQUENCE 78

TEST # 44 = TEST DATA PATHS USING LOOP-BACK CONNECTOR

22222220

0220202000

2222000000l

STEST 44 = TEST DATA PATHS USING LOOP-BACK CONNECTOR

dRRRRlld])

;:'Q".t"""""""""""""'"'."'."'."."""Q"""Q'

012642

000004

2627 012644
2628 012652
2629 032654
2630 012656
2631
2632
2633
2634 012660
2635 012662
2636 012670
2637 012672

032777
001442
000005
005001

2639 012702
2640 012706
2641 012710
2642 012714
2643 012716
5222 012720

010177
005000
105777
100403
005200
001373

%gzg 012722

104064

2648 012724

017702

2651 012736
2652 012740
2653 012742

001003
105701
001406

2655 012746
5229 012752

010137
010237

2658 012756

104106

105201
032737
001404
023727

2638 012700 001427

2649 012730
2650 012734

043701
020102

2654 012744 000745

000200

166166

000001

003002

002634

177560

78744:

1%:

167734

5$:

167720

2%:

167706

001112

001024
001026

1%:

A ¥

SCOPE

BIT
BEQ
RESET
CLR

#B177,35WR
TST45

INCB
81T
BEQ
CMP

R
FBITO.FLAGLGL
5$
RCSR.#177560

;1S THIS TEST ENABLED
‘BR, IF NOT
SCLEAR EVERYIHING
*CLEAR REGISTER FOR TEST DATA
“TRANSMIT A BINARY COUNT PATTERN - UP
STO THE BIT POSITION INDICATED BY THE
SCONTENTS OF LOCA:ION '‘SUSWR"
SINCREMENT THE TEST DATA
:11/44 CPU
STEST ALL DATA
:1S THIS 11/44 CONSOLE TERMINAL SLU?

MOV
CLR
1STB
BM]
INC
BNE

R1,3TBUF
RO
aRCSR
3
RO
2%

SXMIT A CHARACTER
SCLEAR A TIMER
‘WAIT FOR RECEIVER DONE
‘BR IF DONE
LINCREMENT TIMER IF NCT
:BR IF TIME REMAINS

ERROR

+64

;RECEIVER DONE NOT SET

MOV

aRBUF ,R2

;GET RECEIVED CHARACTER

BNE
1518
BEQ

48
R1
TST4S

‘BR, IF NON-COMPARE
:TEST XMIT DATA FOR ZERO
‘BR, IF FINISHED

MOV
MOV

R1,9GDDAT
R2.$BODAT

ERROR

+106

BEQ

BIC
CMP

B8R

TsT45

afSUSWR, R
R1,R2

SYES, SKIP THIS TEST

:CLEAR LOWEST UNUSED DATA BIT POSITITON IN TEST DATA
*COMPARE DATA

:CONTINUE IF NOT

;STORE EXPECTED DATA
*STORE RECEIVED DATA

;DATA COMPARE ERROR USING LOOP-BACK CONNECTOR

CIOLDFO DLIV-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 45 = TEST DL11-W LOGIC BY EXERCISING THE XMIT,REC,

2659

JSBTTL

& (

PAGE 65

SEQUENCE 79

TEST # 4§ - TEST OL11-¥ LOGIC BY EXERCISING THE XMIT,REC, & CLOCK

t"""""t"'tttt't"'""tt"'t"t't"t"tt't'
o
'"'tt'tt"""

'resr 45 - TEST DL11-W LOGIC BY EXERCISING THE XMIT,REC, & CLOCK
R

012760

000004

2661 012764
2662 012770

005037
004737

002444
014400

2664 012776
2665 013002
2666 013006
2667 013012
2668 013020
2669 013026

017703
017704
017705
017737
017737
017737

167646
167636
167664
167634
167622
167646

2673 013056
2674 013064
2675 013070
2676 013072
2677 013100

012777
005737
001415
032777
001011

2660 012762

000005

2663 012774 000340

2670 013034
2671 013042
2672 013050

2678 013102
2679 013110
2680 013116
2681 013124

2682 013132
013134
013140

013144
013146
013150
013152

2683 013154
2684 013162
2685 013170
2686 013174
2687 013200
2688 013202
2689 013204
269C 013210

2691 013214

012777
012777
012777

012777
012777
052777
052777

005000
012701

013440
000200
013512
000200
002624

167566
167562
167550

2698 013236

001371

000240
000240

062700
062700

2699 013240
2700 013246
5;85 013250

032777
001402
000005

2703 013252

104107

167506

1%:

000002

000100
000100
002442
002440

000140

167562

42%:

167456
167444

002454
167426
014400

000000
000001
000100

167372

R R

0 0]
220232
2222302222020
R R R XX EEIEXIZIEIXEISXIZ2Z2

:CLEAR EVERYTHING

CLKCNT
PC,WRPSW

“INITIALIZE CLOCK COUNT TO ZERO
SET PRIORITY TO 7

MOV
MOV
Mov
MOV
MOV
MOV

ATVECT.R3
ARVECT R4
ORTCVT,RS
ATPSW,STPSW
«RPSW, SRPSW
ARTCPSW,SCPSW

;SAVE
*SAVE
:SAVE
*SAVE
:SAVE
:SAVE

MOV
ST
B8EQ
BIT
BNE

#200.3RPSW
CTSTFL
1%
#B1T6,aSWR
1%

'NO MULT INTERUPTS
1S CONSOLE UNDER TEST?
:1F NOT SKIP CLOCK SET UP
;1F YES, ARE CLOCK TEST DISABLED?
“IF YES. SKIP CLOCK SET UP

MOV
MOV
BIS
BIS

CLR
MOV

346

#XMIT ,QTVECT
#200,3TPSW
#RCV,aRVECT

#CLK,QRTCVT
#300 3RTCPSW
#B1T6,aLKS
#BIT2,3TCSR

RO
#2.R1

XMIT VECTOR
RECEIVE VECTOR
CLOCK VECTOR
XMiT PSW VECTOR
RECEIVE PSW VECTOR
CLOCK PSW VECTOR

POINT TRANSHIT VECTOR TO TRANSMIT ROUTINE
'NO MULTIPLE INTERUPTS ALLOWED
;POINT RECEIVE VECTOR TO RECEIVE ROUTI*C

:POINT VECTOR TO CLOCK INTERRUPT ROUTINE
:NO MULT INTERUPTS
‘ENABLE CLOCK INTERRUPTS
;SET MAINTENANCE WRAP

;** DELAY ENOUGH TIME TO ALLOW ANY CHARACTERS
." THAT MIGHT BE IN THE PROCESS OF BEING
‘ve RECEIVED TO FINISH AFTER MAINTENANCE
v+ YRAP FOR THE UART UNDER TEST

IS ENABLED.

TST8B

aRBUF

:«« READ 70 CLEAR DONE

BIS
BIS
CLR
CLR
CLR
CLR
MOV
CLR

#B1T6,aTCSR
#B1T6.3RCSR
XMTCNT
RCVCNT
R1
RO
#BUF ,R2
aT1BUF

;ENABLE TRANSMIT INTERRUPTS
"ENABLE RECEIVE INTERRUPTS
;CLEAR XMIT INTERRUPT COUNTER
:CLEAR RCV INTERRUPT COUNTER
:CLEAR A REGISTER FOR TEST DATA USE
SCLEAR TIMER
:POINT R2 TO RECEIVE DATA STORAGE
:SEND F'RST CHARACTER

DEC
BNE
DEC
BNE

JSR

2%:

R R

CLR
JSR

MOV
MOV
MOV

107606
167602
167566

013526
000300
000100

052777
052777
005037
005037
005001
005000
012702
005077

004737

002446
002450
002452

165740

000004

SCOPE

RESET

WorD

000100

167472

2692 013220
2693
2694 013222
2695 013224

2696 013226
2697 013232

t6145:

105777

005300
001374
005301
001372

L2222

NOP
NOP

RO
42%
R
42%

PC,WRPSW
JWORD

140

ae
ae
e
Tan

“SET PsWw TO PRIORITY 3

sWAIT FOR INTERRUPTS
SSTALL
SSTALL

:ADD INSTRUCTIONS ARE USED TO LENGTHEN LOOP TIME
> 10 COVER THE SLOWEST BAUD RATE ON THE FASTEST CPU

ADD
ADD

#0,R0
#1.R0

BIT
BEQ
RESET

#BIT6,3TCSR
3%

:FINISHED ENTIRE TRANSMISSION
BR IF INTERRPUTS ARE DISABLED (FINISHED)
‘CLEAR EVERYTHING

ERROR

+107

:TRANSMIT INTERRUPT TIMEOUT [N MAIN. DATA TEST

BNE

MACRO M1113 05-NOV-80 12:32 PAGE 65-1
(Z D LOFO DLI1-W/1144 MFM SLU
TEST
# 45 = TEST DLV1-w LOGIC BY EXERCISING THE XMIT,REC, & (i
S
2704
2705 013254
2706 013262
2707 013264
2708
2709 013266
2710
27
2
2713
2714
2715

023737
001402
000005

2735

Pele LNTe RV P JV 1,8}

2736 013364
2737 013370
2738 013374
2739
2740 013376
2741 013402
2762 013406
2743 013412
2744 013420
2745 013426
2746 013434
2747
2748 013440
2749 013444
2750 013446
2751 013454
2 75 013456
2 75
2 75
2 75
2 75
2 75
2 75
2 75

002440

3$:

005737
001411
032777
001005
005737
001002
000005
104113

002624
000100

4%:

165534

002444

012700
005001
022001
001014

002454

032737
001403
122701
001770
032701
001763
000405

000001

105201

:COMPARE THE NUMBER OF INTERRUPTS

ERROR

+110

TST
BEQ
BIT
BNE

CTSTFL
5%

;RECEIVER DID NOT GET FULL TRANSMISSION
IF RCVCNT=0, NO DATA RECEIVED
:
;IF RCVCNT=?, THEN (XMTCNT=RCVCNT)
EQUALS THE NO, OF INTERRUPTS LOST.
;
;1S CONCOLE UNDER TEST?
;1F NOT, SKIP CLOCK COUNT CHECK
:IF YES, ARE CLOCK TESTS DISABLED?
JIF YES, SKIP CLOCK COUNT CHECK

BNE
RESET
ERROR

003002

000040

;STORE BAD DATA FOR ERROR REPORT
;STORE GOOD DATA FOR ERROR REPORT
;DATA COMPARE ERROR IN EXERCISER

MoV
MOV
MOV
MoV
MOV
MOV

R3,aTVECT

JMP

RS ,aRTCVY
STPSW,aTPSW
SRPSW,aRPSW
SCPSW,aRTCPSW
ENDEV

;RESTORE XMIT VECTOR
;RESTORE RECEIVE VECTOR
;RESTORE CLOCK VECTOR
;RESTORE XMIT PSW VECTOR
;RESTORE RECEIVE PSW VECTOR
;RESTORE CLOCK PSW VECTOR
:GOTO NEXT TEST

INC
INCB

XMTCNT
R1

: INCREMENT XMIT INTERRUPT COUNTER
s INCREMENT TEST DATA

$
#20,R1
1%

;TEST ALL DATA
;CHECK DATA FOR *P
;D0 NOT XMIT “P

CLR

BEQ
BIT
BEQ
BR

6%:

010377
010477
019577
013777
013777
013777
000137

167246
167236
167264

7%:

002446
002450
002452
014170

005237

002442

032737
001403
122701
001770
032701
001404
0462777
000402
110177
005000

000001

ERROR

167232
167220
167244
XMIT:

003002

1%:

000020
2%:

000040
000100
167134

167140
XCONT:
XRET:

;BR IF INTERRUPTS OCCURRED
;CLEAR MAINTENANCE WRAPAROUND
;NO CLOCK INTERRUPTS IN EXERCISER

-(RO) ,$BDCAT
R1,8GDDA(
+111

CmP
BNE
INCB
BIT
BEQ
CMPB

8$:

+113

;CHECK FOR AT LESST ONE CLOCK INTERRUPT

MOV
MOV

COMP:

000020

5¢
CLKCNT
5%

IF EQUAL

;CLEAR EVERYTHING

#20,R1
9$
#BITS5,R1
CoMP
7%

RESET
MOV

9%:

#BI1T6,aSWR

;BR,

;CLEAR EVERYTHING
:LOAD RECEIVED DATA POINTER TO RO
:SET UP REGISTER FOR COMPARISON
:COMPARE XMIT & RCV DATA
;BR, IF NOT EQUAL
s INCREMENT CUMPARE DATA
;11744 CPU?
;YES, SKIP
:SKIP 20 DATA IF 11/44
;SKIP 20
:FINISHED CHECKING RECEIVED DATA?
:BR, IF NOT FINISHED
:BR TO END OF TEST

5%:

001026
001024

105201

XMTCNT ,RCVCNT
31

TST

014037
010137
104111

CMP
BEQ

RESET

104110

000005

2725 013330
2726 013332
2727 013334
2728 013336
2729 013344
2730 013346
2731 013352
2732 013354
2733 013360
2734 013362

002442

SEQUENCE 80

8EQ
CMPB
BEQ

BIT
BEQ
BIC

Move

CLR

#BUF ,RO
R1
(RO) +,R1

R1
#giTO.FLAGQQ

R4 ,BRVECT

gBITO,FLAGéé

#B1TS5,R1

XCONT
#B176,aTCSR
XREY
R1,8TBUF
RO

:11/744 CPU

;SEND DATA PATTERN FROM 00 --> 37
:BR, IF MORE DATA TO BE SENT
;CLEAR XMIT INTERRUPT ENABLE

;RETURN, WITHOUT SENDING ANY MORE DATA

s SEND NEW CHARACTER
;CLEAR TIMER

CIOLDFO DLi1-W/1144 MFM SLU

MACRO M1113

05-NOV-80 12:32

TEST # 45 - TESY DL11-wW LOGIC BY EXERCISING THE XMIT,REC, & (I

%;2? 013510

000002

2762 013512
2763 013516

017722
005237

167120
002440

RCV:

2767 013526
2768 013532

005237
000002

002444

(LK:

2764 013522
%;gg 013524

005000
000002

0 7
PAGE 65-2

RTI

SEQUENCE 81
;RETURN

MoV
INC

aRBUF , (R2) ¢+
RCVONT

:STORE RECEIVED DATA
; INCREMENT RCV INTERRUPT (OUNTER

INC
RTI

CLKONT

; INCREMENT CLOCK INTERRUPT COUNT
;RETURN

(LR
RTI

;CLEAR TIMER
;RETURN

CIOLDFO DLI1-W/1144 MFM SLU

WRAPAROUND

TESTING- AUTO

2769

MACRO M1113

INITIATION OF

05-NOV-80 12:3¢

T/A CONSOLE

PAGE 66

TEST

SEQUENCE 82

2770

.SBTTL

WRAPAROUND TESTING- AUTO INITIATION OF

T/A CONSOLE TEST

%;;%

;

WRAPAROUND TESTING- AUTO INITIATION OF

T/A CONSOLE

c773
2774
2775
2776
2177
2778
2779
2780
2781

176500
176502
176504
176506
003014
024610

R R

R A

RCSRS8
RBUFS8
TCSRS8
TBUFS8
BGNADD
ENDADD

=
=
=
=
=
=

R R

176500
176502
176504
176506
DEVADR
ENDADR

I I

TEST

P Y

F_7
MACRO M1113
05-NOV-80 12:32
PAGE 67
SEQUENCE 83
€l D LDFO DLY1-w/1144 MFM SLU
e S T # 46 - TEST CONSOLE WITH WRAP AROUND
2782
JSBTTL
TEST # 46 - TeST CONSOLE WITH WRAP AROUND
S 2222202222220
R0 RRRRl2 )]

;*TEST 46 - TEST CONSOLE WITH WRAP AROUND
LA

013534

T$146:

000004

22222 RRRRZRRRRRRRARRARRRRRRRRRRRRRARRRRRRRRRRRRARD
)]

SCOPE

:ttt't"'t"""""Q'"""t"'t"'t'..t"""'.t"""""".""Q"."'

: MAIN LINE TEST

: THIS TEST PUTS COMMANDS OUT OVER THE SERIAL LINE WHICH IS WRAPPED
:

;

.
;
:
;
:
:

AROUND

TO THE

CONSOLE

AND RECEIVES

THE

RESPONSES

CONTROL P IS SEND TO GET THE CONSOLE'S ATTENTION AND THEN
T/ACA SOR APT)

IS SENT.

SINCE THE CPU IS HALTED DURING THE

TESTING

THE PROGRAM CAN NOT SEE THE CHARS RETURNING, THUS THE PROGRAM WILL
SIT IN A LOOP WAITING FOR A 'B'' TO BE PRINTED BY THE CONSOLE AS A
SIGNAL TO APT THAT THE TESTING IS DONE. ALSO SINCE THE TESTING
INVOLES WRITTING TO THE CPU'S MEMORY A CHECKSUM IS CALCULATED AND THE
MEMORY TO BE USED INSIDE THIS PROGRAMS SPACE IS SAVE BEFORE TESTING
AND RESTORED AFTER TEST WITH ANOTHER CHECKSUM CALCULATION

[

;'t'Q'Q"tt.'."'t"t"'i""i"t"fiiit"'tfi't"t""t't."Qt."t"."t"'

BIT

#B8172,35WR

:RUN THIS TEST INLY IF

MOV
MOV

PSW,SAVEPS
#340,PSW

;SAVE OLD PSW
:PUT IN NOW PSW

CLR
MOV

LoC
#100,L0C2

:TIMING LOOP COUNTERS

014100

JSR

RS,SAVETE

;SAVE LOCATIONS T/A WRITES

004537
010437

013706
002436

MoV

JSR

RS, CHKSUM

:CALCULATE CHECKSUM

013614
013620

012700
004537

002564
013726

[ [0]"]

#CNTLP,RO

013624
013630

012700
004537

002566
013760

MOV

#PROMPT
RO

RS,GETLIN

;GET CRLF

013634
013640

012700
004537

202610
013726

MOV
JSR

#TA,RO
RS,PUTLIN

:SEND OUT T/A<CRLF>

013644

004537

014024

JSR

RS.GETB

;GET THE A FROM ''-TESTB''

013650

004537

014134

JSR

RS,RESTTE

;RESTORE LOCATIONS T/A WRITES

013654
013660
013664
013666
013670

004537
020437
001401
000000
012706

013706
002436

JSR
(MP
BEQ

RS, CHKSUM
R4 ,CLDSUM
108

SRECALCULATE CHECKSUM

Mov

#1000,5sP

;RETURN THEIR SP

013536
013544

032777
001451

000004

165274

013546
013554

013737
012737
012706

177776

000340
002432

002434

013566

013572

005037
012737

002340
000100

013600

004537

013604
013610

013562

001009

WRAP:

177776

BEQ

MoV

002342

JSR

108:

HALT

108

#J)IMSTK,SP

R4 ,0LDSUM

RS,PUTLIN

;SW BIT 2 IS ON

JUSE MY STACK (SO NO CLOBER)

;SAVE

OLD

CHECKSUM

;SEND OUT CONTROL P
CONSOLE>>>

CI0LDFO DLIT=-W/1144 MFM SLU

TEST

# &6 = TEST

2835 013674
%ggg 013702

MACRO M1113

05-NOV-80 12:32

CONSOLE WITH WRAP AROUND

013737
000137

002436
014224

177776

6_7
PAGE 67-1

MOV
Imp

\,\\‘

SEQUENCE 84

SAVEPS,PSW
$E0P

:RETURN PSW
'BR TO END OF PASS ROUTINE

2838
2839

""""."""t"'""'"""""'i"'.""!'.""'t.t""""""."""'

2840

%gzz

* INPUT CONDITIONS

2845

2848

: OUTPUT CONDITIONS

ggg?

;

2852

E"i"."t't."""'t'i'"tt"'"Qtt'l"l'."tttQtt.t'."'Q""Q"Q."""

ggz}

gg:g

BGNADD = ADDRESS 70 START CHECK SUM (INCLUSIVE)

2849

2853
2854

; ROUTINE TO '@\UATE CHECKSUM ON PROGRAM

ENDADD = ADDRESS TO END CHECK SUM (EXCLUSIVE)

;

2855 013706
2856 013712

012700
(05004

003014

2858 013716
2859 013722
ggg? 013724

022700
001374
000205

024610

2857 013714 062004

REG4 = CHECK SUM

CHKSUM:

1%:

MOV
CLR

#BGNADD ,RO
R4

;GET STARTING ADDRESS
‘RESET SUM

CMP
BNE
RTS

YENDADD, RO
1%
RS

TCHECK FOR END
*1F NOT DONE LOOP
*DONE RETURN

ADD

(RO) ¢+, R4

*ADD WORD TO SUM

2862
2863
2864

.'tt""ii"t.'t"'t""""'""""tlQt"itQt'tQ.'Qll't.t""t'..'..""'
:

gggg

; THE ADDRESS IN REGO UNTIL IT HITS A 377>

2568

:'ttttt.'t".ttt"""'t""'t""ttttfifiti'Q'ttt"'l."'!'lti"""'t"""

2865

2869
2870

2871 013726
2872 013730
2873 013732

2874 013736
2875 013744
2876 013746
2877 013752
%g;g 013756

112001
001412
004537
032737
001772
110137
000137
000205

014060
000200
176506
013726

176504

1%:

108 :

MOVB
BEQ
JSR

81T
BEQ
MOVB
JMP
RTS

(RO)+,R1
108
RS, TIMER
#BIT7,TCSRSB
1%
R1,TBUFSS8
PUTLIN
RS

;GET DATA
CEND OF DATA
*PROVIDE FOR TIMOUT

STEST FOR XMIT READY
"WwAIT FOR XMIT READY
10UTPUT CHAR
‘REPETE
*RETURN

* IT WITH THE EXPECTED VALUES POINTED TO BY REGO UNTIL NULL<00> ttt't"'t

2882

* THIS ROUTINE INPUTS A CHARS FROM THE SERIAL LINE AND COMPARES

5332

:'Ititt'ttl.tttttt'tt't"'"'t't't'it'tttt't'tttttt"tiit""'l"!

2885

2888 013760
2889 013762
2890 013764
2891 013766

PUTLIN:

,"'fi!iiti'tt.tt'""'t'i""'ttti."tt.i.'l'li'tt'ttit"lttt'tt'tt'i"l'!t
:

2880
2881

2886
2887

THIS ROUTINE OUTPUTS TO THE SERIAL LINE CHARS STARTING AT

112001
105201
001416
105301

GETLIN:

MOVB
INCB
BEQ
DECB

(RO)+,R1
R}
108
R1

:GET EXPECTED CHAR
S1F NULL EXIT

CIOLDFO DLI1=-W/1144 MFM SLU

MACRO M1113

TEST # 46 - TEST CONSOLE WITH WRAP ARQUND

2892 013770

2893 013774

004537

032737

2894 014002
2895 014004

001772
113702

2897 014014
2898 014016
2899 014020
%gg? 014022

120102
001760
000000
000205

2896 014010

042702

014060

000200

176500

BEQ
mMove

LR
:

(MPB
BEQ
HALT
RTS

004537

2913 014036
2914 014040

003772
113702

;PROVIDE FOR TIMOUT

1%
RBUF
S8 ,R2
#B1T17,R2
R1,R?
GETLIN

:WAIT FOR REC READY

;TEST FOR REC READY
;STRIP PARITY

;ARE THEY THE SAME
;SAME GET MORE
:NOT SAME HALT
:RETURN

032737

042702
122702
001363
000205

014060

000200

176500

JSR

GETB:

LR AR

ARl

176502

000200
000102
A

2921

2922
2923
535?

;0UT TIMING LOOP OUT

RS, TIMER

BIT

#BIT17 ,RCSRS58

;TEST OFR REC READY

BIC
(MPB
BNE
RTS

#BI1T7,R2
#102,R2
GETB
RS

:STRIP PARITY
;CHECK FOR 'B"
:NOT 'B'' REPETE
;WAS 'B'' RETURN

BEQ
MOVB

2920

;NOT DONE YET

GETB
RBUFS58,R2

AR AR RN R PR T R AR RN RN

R RO

RN RO

: THIS ROUTINE IS USED AS A TIME QUT FEATURE
: WHEN THE TIMING LOOPS BOIH REACH O THIS ROUTINE WILL
; CAUSE A HALT

;ttttttttt'ttttttt'ttttttt't"ttttttt"ttfi't't't'ttt'tt't'ttfit"'ttt'tt"t

2926

2929 014060

005337

002340

2931 014066
2932 014072

005337
001001

002342

2933 014074
%ggg 014076

RS, TIMER

#BI1T7,RCSRS8

EQtt'tt'tt't't"tt"'ttt'ttt't'tttttttttttttttttttfiittttttti'tn"'t'tttt"

2911 014024

2930 014064

SEQUENCE 85

; AND THEN RETURNS

5389

2927
2928

; THIS ROUTINE INPUTS CHARS UNTIL IT GETS THE (HAR 'B"

2908

2915 014044
2916 014050
2917 014054
%g}g 014056

JSR

BIT

108:

PAGE 67-2

BIC

2905

2912 014030

1%:

176502
000200

2902
2903
2904

29C9
2910

(05-NOV-80 12:32

001004

TIMER:

000000
000205

10%:

2936

DEC

LOC

DEC
BNE

LOC?
10%

BNE

HALT
RTS

:DECREMPNT TIMING LOOPS

109

:'F LERO THIS ROUTINE
;EXECUTED R3 TIMES

;lttttttttt.ttttt'ttt'tttttt'ttttt'ttttti'tttttt'Qfififinttt'tfifittfit!tttttt!t

2937

2938

2939

; THIS ROUTINE SAVES THE LOCATIONS WRITTEN BY THE T/A CONSOLE TEST

2942

;tttttttttt".t'i"tttt'tQtt'"'lttttit'tttti'tt"tttfi'tttttttttt'tttt"tt

; SO THEY MAY BE RESTORED LATER

ng?
2943

2944 014100

013737

000000

2945 014106 012702 000002
2946 014112

2947 014116

012701
011221

002346

002344

SAVETE:
1%:

MoV

0,SAVED

;SAVE LOCATION 0

MoV

#SAVLOC R

:SET UP STORAGE LOC. PNTER

MOV

TRY.

(R2),(R1)¢

“SET UP INDIRECT PNTER
;GET WORD AND SAVE

MACRO M1113
< 10 LOFO DLI1-W/1144 MFM SLU
1 £S T # 46 - TEST FONSOLE WITH JRAP AROUND

o
o

d
D

b
b
b

—

P ol o

OOO0O

2948 014120
22
2949
2950
24
0
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967 014160
2968 014164
2969 014166

000241
006102
020227
100772

05-NOV-80 12:32
cLc

ROL

(MpP

024610

BM]
RTS

000205

[

PAGE 67-3

SEQUENCE 86

R2
R2,#ENDADD
1%
RS

;DONT ROT

IN ANY BITS

;SET NEXT ADDRESS
;SEE IF AT END
;NO REPETE

;'Q"'t"Qt'i.t""'t"'ti"'t""t't"t".t""'".'QQ!'Q."'.Q"Q'"""

: THIS ROUTINE RESTORES THE SAVED LOCATIONS THAT T/A WRITES INTO
.

;Q"tt.l"'t.'i""""t'Q"'t"ttt"t'ti't.t""."'t".."""Q""""'

013737
012702
012701
012112
000241
006102
020227
100772

000205

002344
000002
002346

024610

000000

RESTTE:
1%:

MoV

SAVEQ,O

MOV
MOV
MoV

#2.R2
#SAVLOC,R1

ROL

R2
R2,#ENDADD
1%
RS

cLC

CMP
BMI
RTS

(R1)+,(R2)

;SET UP INDIRECT PNTER
sSET UP STORAGE LOC. PNTER
;GET WORD AND RESTORE
;DONT ROT IN ANY BITS
;SET NEXT ADDRESS
;SEE IF AT END
;NO REPETE

CZ0LDFO DLIT1-W/1144 MFM SLU

TEST

# 46 - TEST

2970
2971 014170
2972 0146174
2973 014200
2974 014206
2975 014210
2976 014214
2977 014220

MACRO M1113

CONSOLE WITH WRAP AROUND

005037
005237
023737
001002
000137
005037
000137

001002
001076
002630
013536
002626
004050

05-NOV-80 12:3¢

ENDEV:

001076
NOEOP:

PAGE 68

SEQUENCE 87

;END OFf DEVICE PASS ROUTINE
$STSTNM
;CLEAR TEST NO. COUNT FOR SCOPE ROUTINE
s INCREMENT DEVICE COUNTER
$DEVCT

CLR
INC
(MP

BNE
JMP
CLR
JMP

TMP2 ,$DEVCT

;ALL DEVICES TESTED

WRAP
CTSTFL

;EXECUTE WRAP AROUND AFTER ALL DEVICES
;CLEAR CONSOLE UNDER TEST FLAG

NOEOP

TSTDEV

;BR,

;GO TEST NEXT DEVICE

CIOLDFO DLi1=-W/
" 144 MFM SLU

END OF

MACRO M1113

PASS ROUTINE

2979

05-NOV-80 12:32

SBTTL

7
K
PAGE 69 SEQUENCE 88

END OF PASS ROUTINE

:*INCREMENT THE PASS NUMBER ($PASS)
;*]F

014224

016226
01632¢

014232
014236
014246
014246
014250
014252
014254
014256
014260

0164264

:*1F

000004
005037

005237
042737
005327
C00001
003015
012737
000001

014266
104401

013700

001405
000005
004710
000240
000240
000240

$eop:
001002
001074
100000

001074

THERES A HONlTOR GO 10 IT

THERE

ISN'T JUMP TO GOAGIN

$COPE
CLR

INC
BIC
DEC
$EOPCT: .WORD
BGT
MOV
SENDCT: .WORD

$TSTNM
SPASS
#100000,8PASS
(PC)+
1
$DOAGN
(PC)+,a(PC)+
1

::2ERO THE TEST NUMBER
2 INCREMENT THE PASS NUMBER
::DON'T ALLOW A NEG. NUMBER
S :LO0P?

$GET4LZ: MOV

arL?2 RO

.ENDMG

::TYPE "'END PASS"

$DOAGY

$EOPCT
TYPE

014314

000042

014270
014272
014274
014276
014300
014302
014304
014304
014306
014310

000137
014330
377

377

000

BEQ
RESET
$ENDAD: JSR
NOP
NOP
NOP
SDOAGN:
JMP
SRTNAD: .WORD
SENULL: .BYTE

2980 014314

015

012

105

EMNDMG:

.EVEN
.ASCIZ

PC, (RO)

a(PC)+
GOAGIN
-1,-1,0

:YES
;;RESTORE COUNTER

;:GET MONITOR ADDRESS

;;RETURN

;:NULL CHARACTER STRING

<CR><LF>/END PASS /

CIOLDFO DLI1=W/ 1146 MFM Sty

END OF

PASS ROUTINE

2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996 014400
2997 014402
2998 014404
014410

005046
005216
000240
001375
062706
005037
022737
001004
012706
000137
005037
000137
011646
013616
062746
000002

MACRO M1113

05-NOv-80 12:3¢

GOAGIN:
1%:

000002
001076
000001

002630

=(SP)

BNE

INC
NOP

(SP)

ADD
CLR

#2,5P
$DEVCT

MOV
JMP

#1000,SP
ST

CMP
BNE

001000
004172

001100
003774

CLR

L 7
PAGE 70 SEQUENCE 89

#1,TmMp2
RSTRTY

RSTRT:

(LR
JMP

WRPSW:

MOV(SP),-(SP)
MOV
a(SP)+,(SP)
ADD
#2,-(SP)

000002

SUNIT
BEGIN

RT]

sCLEAR ANOTHER LOCATION ON STA(K
s INCREMENT STACK LOCATION
;TAKE

UP SOME MORE

TIME

;BRANCH BACK UNTIL ZERO AGAIN
;CLEAN THE LOCATION OFF THE STACK
;CLEAR DEVICE COUNT
;1S THERE ONLY ONE DEVICE UNDER TEST?
:BR, IF NOT
;RESET STACK POINTER
PASS
ANOTHER
DC
;GO
;CLEAR UNIT NUMBER
;COPY RETUN PC

sMOVE NEW PSW TO STA(CK
sADJUST JSR RETURN
;POP RETURN PC & NEW PSW

: SUBROUTINE TO REPORT UNEXPECTED OR ERRONEOUS TRAPS OR INTERRUPTS

014412
014414
014420
014424
014432

012600

014434

000000

162700

010037
016637
106112

000004
002622
000002

CATCH:
002620

MOV
suB

(SP)+,RO
#4 RO

:GET ADDRESS OF TRAP VECTOR ¢+ &
;ADJUST TO POINT TO TRAP ADDRESS

ERRCR

+112

;REPORT ERROR

MOV
MOV

HALT

RO,BDVECT
2(SP),0LDPC

;STORE TRAP OR INTERRUPT ADDRESS
;GET PC WHERE TRAP OR INTERRUPT OCCURRED

;PROGRAM MUST BE RESTARTED AT THIS PCINT

CIOLDFO DLi1=-W/1144 MFM SLU

END OF

3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028

PASS ROUTINE

MATRGC M1113

05-NOV-80 12:32

n7
PAGE 71
SEQUENCE 90

.';'Q""""""'"""Q""""""""'"""""""t"""'"
;*THIS ROUTINE WILL INCREMENT THE ERROR FLAG AND THE ERROR COUNT,
:*SAVE THE ERROR ITEM NUMBER AND ADDRESS OF THE ERROR CALL
;*AND GO TO SERRTYP ON ERROR
;*THE SWITCH OPTIONS PROVIDED BY THIS ROUTINE ARE:
;*SW15=1
HALT ON ERROR
;eSW13=1
INKIBIT ERROR TYPEOUTS
;¢SW09=1
LOOP IN ERROR
s *CALL
M
ERROR
+N
; ;ERROR=EMT AND N=ERROR [TEM NUMBER
,‘;tt""".Qt"'"""""'t't"""tt'.t't""t""t"t"it""t

014436
0164436
014442
014444
014452

3029 014456

3030 014462
3031 014470
3032 014476
3033 014504
3034 014506
3035 014512
3036 014516
3037 014516
3038 014524

3039 014526
3040 014534
3041 014540

3042 014541

001003

001002
001012

164370

162737
117737
032777
001004
004737
104401

000002
164322
020000

001016
001014
164334

122737
001007

000001

001106

001014
015326

014540

011637

113737

004737
000

001016

014620
001063

000777
005777
100001
000000
104406
032777
001402
013716
005737
001402
013716

3055 014604
3056 014612
3057 014614
3058 014616

022737
001001
000000
000002

001000

208:

22%:
2%:

164¢70

164254

3%:

001010
001060

001060

014274

INCB
BEQ
Mov
INC

$ERFLG
7%
STSTNM,RDISPLAY
SERTTL

;SET THE ERROR FLAG
;DON'T LET FLAG GO TO ZERO
;DISPLAY TEST NUMBER AND ERROR FLAG
s INCREMENT ERROR (OUNT

SUB
MOvVB
BIT
BNE
JSR
TYPE

#2 ,3ERRPC
OSERRPC,SITEMB
#B1713,3SWR
208
PC,SERRTYP
LSCRLF

;STRIP AND SAVE THE ERROR ITEM (CODE
;SK1P T/PEOUT IF SET
:SKIP TYPEOUTS
;60 TO USER ERROR ROUTINE

CMPB
BNE

#APTENV,SENV
2%

MOV

21%:

000

3043 014542
3044 014544
3045 014550
3046 014552
3047 014554
3048 014556
3049 014564
3050 14566
3051 014572
3052 014576
gggz 8}2282

gggg 014616

$ERROR:
7%:

105237
001775
013777
005237

000042

MOvB
JSR
.BYTE

$ITEMB,21%
PC,SATYS
0

BR
TST
BPL
HALT
(KSWR
BIT
BEQ
MOV
TST
BEQ
MoV

22%
aSWR
3%

.BYTE

CcMP

6$:

(SP) ,$ERRP(C

BNE
HALT
RT]

#81709,aSWR
43
$LPERR, (SP)
SESCAPE
S$
$ESCAPE, (SP)

#SENDAD,an4?
6%

;GET ADDRESS OF ERROR INSTRUCTION

:RUNNING IN APT MODE
;NO, SKIP APT ERROR REPORT

:SET ITEM NUMBER AS ERROR NUMBER

;REPORT FATAL ERROR TO APT

;APT ERROR LOOP
JHALT ON ERROR
;SKIP IF CONTINUE
;HALT ON ERROR!
;TEST FOR CHANGE IN SOFT-SWR
:LOOP ON ERROR SWITCH SET?
:BR IF NO
;FUDGE RETURN FOR LOOPING
;CHECK FOR AN ESCAPE ADDRESS
:BR IF NONE
;FUDGE RETURN ADDRESS FOR ESCAPE

sACT=11 AUTO-ACCEPT?
:BR IF NO
:YES
:RETURN

MACRO M1113

CIOLDFO DLi1=-W/1144 MFM SLU

END OF PASS ROUTINE

3062
3063

05-NOV-80 12:32

.SBTTL

N 7
PAGE 72
SEQUENCE 9

ERROR MESSAGE TYPEOUT ROUTINE
L

L R

AR T

;*THIS ROUTINE USES THE "'ITEM CONTROL BYTE'' (SITEMB) TO DETERMINE WHICH
;*ERROR IS TO BE REPORTED. IT THEN OBTAINS, FROM THE °‘'ERROR TABLE'' (SERRTB),

014620
014620
014624
014626
014630
014634

010046
005000
153700
001004

014636

013746

014642
014644
014646
014650

106402
000426

014652
014654
014656
014662
014666
014670
014672
014674
014700
014704
014706
014710
014712
014716
014720
014722
014724
014730
014732
014732
014734
014736
014740
014742
014746
014750
3064

104401

005300
006300
006300
006300
062700
012037
001404

. *AND REPORTS THE APPROPRIATE INFORMATION CONCERNING THE ERROR.
SERRTYP:

001063

TYPE
MOv

001014

CLR
81S8
BNE

001016

Mov

1%:

001146
0146672
2$:

012037
001404

3%:

000000

4%:

104401

106401

104401

000207

001063

5¢:
6%:

001063

7%:

013046
104402

005710
001770
104401

014750

040

000771

;:1F TTEM NUMBER [S ZERO, JUST

$ERRPC,-(SP)

::SAVE SERRPC FOR TYPEOUT

SFSITEMB,RO

ASL
ASL
ASL
ADD
MOV

000

8s%:

TYPE

::TYPE THE PC OF

THE ERROR

:;ERROR ADDRESS

;:60 TYPE=-=-OCTAL ASCIICALL DIGITS)
;sGET QuT
;;ADJUST THE INDEX SO THAT IT WiLL
WORK FOR THE ERROR TABLE
M

B8R
DEC

BEQ

000000

011000
001004
012600

::"'CARRJAGE RETURN'' & ''LINE FEED'’
::SAVE RO
::PICKUP THE ITEM INDEX

LSCRLF

TYPOC

104401

RO,~(SP)
RO

#SERRTB,RO
(RO)+,28

;:FORM TABLE POINTER

:;PICKUP '"'ERROR MESSAGE'' POINTER

::SKIP TYPEOUT IF NO POINTER

::TYPE THE ''ERROR MESSAGE''

BEQ

::"'ERROR MESSAGE'' POINTER GOES MERE
;:"'CARRIAGE RETURN'' & "'LINE FEED
::PICKUP '‘DATA HEADFR'' POINTER
;:SKIP TYPEOUT Ir O

.WORD

;: ' 'DATA HEADER'' POINTER GOES HERE

BNE
MOV

(RO) ,RO
7%
(SP)+,RO

.WORD
TYPE
MOV
TYPE

TYPE
MoV

TYPE
RTS

MOV
TYPOC
IST
BEQ
TYPE
BR
.ASCI2
.EVEN

SCRLF

(RO)+,48

SCRLF

,SCRLF

8(RO)+,-(SP)

;s TYPE THE ''DATA HEADER''

:;"'CARRIAGE RETURN'' & ''LINE FEED''

::PICKUP ''DATA TABLE'' POINTER

::60 TYPE THE DATA
::RESTORE RO
::"'"CARRIAGE RETURN'" & '"'LINE FEED''
::RETURN

;;SAVE a(RO)+ FOR TYPEOQUT
;.60 TYPE=--OCTAL ASCIICALL DIGITS)
::1S THERE ANOTHER NUMBER?
;:BR IF NO

:;TYPE

;. LOOP

TWO(2)

;2 TW0(2)

SPACES

CIOLDFO DLI1=-W/1144 MFM SLU
ERROR MESSAGE TYPEOUT ROUTINE

MACRO M1113 05-NOV-80 12:32 PAGE 93 SEQUENCE 92

3066
3067

.SBTTL

POWER DOWN AND UP ROUTINES

;;""'t'ttt't"tt""'"""'"'Q'."'t."'.""""""QQ""'.

; *POWER DOWN ROUTINE

000024

000026

SR E222322 2222022222222 2222022222202 2222002002 222020000000 dd]])

$PWRDN: MOV

#$ILLUP,A#PWURVEC ;SET FOR FAST UP

MOV

#340,30PWRVEC+2 ;PRIO:7

MOV
MOV
MOV

"PUSH RO ON STACK
:PUSH R1 ON STACK
:PUSH R2 ON STACK

aSWR,=(SP)
SP,$SAVR6

‘PUSH @aSWR ON STACK
SSAVE SP

R3,=(SP)
R4 ,=-(SP)
RS,=(SP)

MOV
MOV

000024

000000
000776

RO,=(SP)
R1.=(SP)
R2.-(SP)

MgvT

‘PUSH R3 ON STACK
:PUSH R& ON STACK
:PUSH RS ON STACK

#SPWRUP ,a#PWRVEC ;SET UP VECTOR

HAL

;HANG UP

)

B8R

;:tt'i""'ttt""""""""Qt'.""'..t't"Qt"t'ti't't.ttttt'

;*POWER UP ROUTINE

015026
015034
015040
015044
015046

000024

012737
013706
012677
012605

1%:

001006

R R

#SILLUP,S#PWRVEC ,SET EOR FAST DOWN
$SAVR6,SP
(SP)+,aSWR
(SP)+,RS
(SP)+,R4

RRRRRRRRRRRDA/

:GET S
;POP STACK INTO aSwWR

sPOP STACK INTO R&

(SP)+,R3
;POP STACK INTO R}
(SP)+,R2
;POP STACK INTO R2
;POP STACK INTO R1
(SP)+,R1
(SP)+,RO
;POP STACK INTO RO
#SPWRON,3#PWRVEC ;SET UP THE POWER DOWN VECTOR
#340,a#PWRVEC+2 ;PRIO:7
$SAVR6
sWAIT LOOP FOR THE TTY

MOV

SPOWER
SLPADR, (SP)

RTI

120

MOV
MOV
MOV
MOV
MoV
MOV
CLR

INC
BNE
TYPE
$PWRMG: .WORD

NPOPNON)
= =2 OO
RO OMNLIOON S

D
o
oad

b e
b

D o

D
b

LV TV LV LV, LV LV, 1V,

d
—

(S R

R X

MOV
MOV
MOV
MOV

000024
000026
[elelalelelalalelela)

$PWRUP: MOV

015050

012

X X

SILLUP: HALT
B8R
$SAVRG: 0
SPOWER: .ASCIZ

$SAVR6
1%

.=2
<15><12>''POWER"

;WAIT FOR THE INC
:OF WORD
;REPORT THE POWER FAILURE

;POWER FAIL MESSAGE POINTER
;CHOCOLATE FUDGE RETURN TO BEGINNING OF
;RETURN TO THERE
;:THE POWER UP SEQUENCE WAS STARTED

; BEFORE Trz POWER DOWN WAS COMPLETE
;PUT THE SP HERE

TEST

CZOLDFO DLIT=W/1144 MFM SLUY

POWER DOWN AND UP ROUTINES

MACRO M1113

3113
3114

05-NOV-80 12:32

.SBYTL

¢ 8
PAGE 74 SEQUENCE 93

SCOPE HANDLER ROUTINE
LR

L SR

:*THIS ROUTINE CONTROLS THE LOOPING OF SUBTESTS. IT WILL INCREMENT

;*AND LOAD THE TEST NUMBER(STSTNM) INTO THE DISPLAY REG.(DISPLAY<7:0>)
;*AND LOAD THE ERROR FLAG (SERFLG) INTO DISPLAY<15:08>
;*THE SWITCH OPTIONS PROVIDED BY THIS ROUTINE ARE:
LOOP ON TEST
LOOP ON ERROR

;eSW14=1
;*SW09=1
v CALL

032777
001052

015150

000416

015152
015156
015164
015170
015174

013746
012737
005737
012637
000421
022626
012637
000407

3115

104406

105737

214
222

240
244

001412
032777

OO 2000
——
—t e O bk = O

Qe GunrGurGurGur@nrGur
GG GuarGhur S Gy

[elololelelelalalaeldlolelelels]

01513¢
015136
015140
015146

040000

000004
015176
177060

163672

BIT

BNE
JMARRRSTART OF
$XTSTR: BR
MOV

MOV

000004

TST

;s TEST

FOR CHANGE IN SOFT-SWR

#BIT14,3SWR
;;LOOP ON PRESENT TEST?
;. YES IF SWl4=1
SOVER
ngE FOR THE XOR TESTERNANAN

;:1F RUNNING ON THE ''XOR'' TESTER CHANGE

SNERRVEC ,-(SP)

;s THIS INSTRUCTION TO A 'NOP'' (NOP=240)
;;SAVE THE CONTENTS OF THE ERROR VECTOR

a1 77060

::TIME OUT ON XOR?

#5% SFERRVEC

:sSET FOR TIMEOUT

::RESTORE THE ERROR VECTOR
1360 TO THE NEXT TEST
$SVLAD
“iCLEAR THE STACK AFTER A TIME OUT
(SP)+,(SP)+
5%:
::RESTORE THE ERROR VECTOR
(SP)+.a#ERRVEC
Mov
1.LOOP ON THE PRESENT TEST
7%
BR
68 : ;. MNARNEND OF CODE FOR THE XOR TESTERM#NAN
::HAS AN ERROR OCCURRED?
$ERFLG
2%:
1ST8B

000004

MOV

BR
CMpP

000004

001003
001000

163616

001010

001006

001003
001002
001002
001006
001010
001060
000001
001002
001006

1%:

. ;SCOPE=]0T

7%:

BEQ
BIT
BEQ

MOV

BR
CLRB
$SVLAD: INC3

4%:

001072

15
40

Move
MOV
MOV

SOVER:

CLR
MOv8
MOV

MOV
RTI

(SP)+,@#ERRVEC

$SVLAD

S'BR IF NO

48
:Bpgsa,stAoa

2:BR IF NO
S:SET LOOP ADDRESS TO LAST SCOPE

#B1T09,asSwR
v

$ERFLG
$TSTNM

STSTNM,STESTN
(SP),SLPADR
(SP) .$LPERR
$ESCAPE
#1, SERMAX
$STSTNM,aDISPLAY
$ ."ADR . (SP)

*:LOOP ON ERROR?

::1ERO THE ERROR FLAG
*:COUNT TEST NUMBERS
;:SET TEST NUMBER IN APT MAILBOX
::SAVE SCOPE LOOP ADDRESS
:SAVE ERROR LOOP ADDRESS

S:CLEAR THE ESCAPE FROM ERROR ADDRESS
TIONLY ALLOW ONE(1) ERROR ON NEXT TEST
::DISPLAY TEST NUMBER
SS
;;;?ogg fiE'UR” ADDRE
soFIX

CIOLOFO DLI1-W/1144 MFM SLU

SCOPE HANDLER ROUTINE

MACRO M1113

3117
3118

3119

3120

3121
3122
3123
3126
3125
3126

C P

0 8
PAGE 75
SEQUENCE 94

ORI RN T R AR O R AR R ORRTERORRRCERRROTRERNCTOERTY

.SBTTL

APT (COMMUNICATIONS ROUTINE

MOVB
MOVB
BR
MOVB

#1,8FFLG
#1,8MFLG
SATY(
#1,8FFLG

;70 REPORT FATAL ERROR
;70 TYPE A MESSAGE

MOV
MOV
1578
BEQ
(MPB
BNE
BITB
BEQ
MOV
ADD
TST

RO,=-(SP)
R1,-(SP)
SMFLG
5%
#APTENV,SENV
33
#APTSPOOL ,$ENVM
33
84(SP) RO
#2,6(SP)
$SMSGTYPE

;PUSH RO ON STA(CK
;PUSH R1 ON STACK
;SHOULD TYPE A MESSAGE?
;IF NOT: BR
;OPERATING UNDER APT?
;1F NOT: BR
;SHOULD SPOOL MESSAGE?
;1F NOT: BR
;GET MESSAGE ADDRESS
;BUMP RETURN ADDRESS
JSEE IF DONE W/ LAST XMISSION?

RR
AR R
R s

015310
015316
015324
015326
01533¢

3127 015334
3128 015336
3129 015340
3130 015344
3131 015346
3132 015354
3133 015356
3134 015364
3135 015366
3136 015372
3137 015400
3138 015404
3139 015406
3140 015412
3141 015414
3142 015616
3143 015422
3144 015426

112737
112737
000403
112737

010046
010146
105737
001450
122737
001031
132737
001425
017600
062766
005737
001375
010037
105720
001376
163700
006200
010037

3145 015430
3146 015436
3147 015440

012737
000413
017637

3149 015454
3150 015460
3151 015464

013746
004737
000000

3148 015446

3152 015466

062766

000001
000001

015554
015552

SATYl:
SATY3:

000001

015554

$ATYL:
SATY(:

015552
000001

001106

000100

001107

000004
000002

000004

001066
001102

001104

001066

000004

015464

000002

177776
015556
015554

3163
3164
3165
3166
3167
3168
3169
g};?

105037
105037
012601
012600
000207
000
000
000

015553
015552

015534
015540
015544
015546
015550
015552
015553
015554

105037

2$:

000004

105737
0014613
005737
001410
005737
001375
017637
005237
062766

3162 015530

1$:

001102

3153 015466
3154 015472
3155 015474
3156 015500
3157 015502
3158 015506
3159 015510
3160 015516
3161 015522

3172

05-NOV-80 12:32

000004

3%:

L$:
5%:
10%:

000004
001066
000002

015554

MOV
BR
MOV

4, SMSGTYPE
5%
a4 (SP) 48

MOV
JSR
.WORD

177776 ,-(SP)
PC,$TYPE
O

ADD

#2,4(SP)

;1F NOT: WAIT
sPUT ADDRESS IN MAILBOX
FIND END OF MESSAGE

;SUB START OF MESSAGE
sGET MESSAGE LENGTH IN WORDS
:PUT LENGTH IN MAILBOX

;TELL APT TO TAKE MESSAGE

sPUT MSG ADDR IN JSR LINKAGE
;BUMP RETURN ADDRESS

;PUSH 177776 ON STACK
;CALL TYPE MACRD

12%:

SFFLG
12%
SENV
128
SMSGTYPE
113
d4 (SP) ,SFATAL
SMSGTYPE
#2,4(SP)

; SHOULD REPORT FATAL ERROR?
;IF NOT: BR
;RUNNING UNDER APT?
:IF NOT: BR
;FINISHED LAST MESSAGE?
;1F NOT: WAIT
;GET ERROR #
sTELL APT TO TAKE ERROR
;BUMP RETURN ADDRESS

SMFLG:
$LFLG:
$FFLG:

CLRB
CLRB
MOV
MOV
RTS
.BYTE
.BYTE
.BYTE

SLFLG
SMFLG
(SP)+,R1
(5P)+,R0
PC
0
0
O

;CLEAR LOG FLAG
;CLEAR MESSAGE FLAG
;POP STACK INTO R1
;POP STACK INTO R1
:RETURN

118
001070
000004

1%
RO,$MSGAD
(RO)+
2%
$MSGAD,RO
RO
RO,SMSGLGY

1ST8
8cQ
TST
8EQ
TST
BNE
MOV
INC
ADD

001106
001066

BNE
MOV
1ST8
BNE
SuB
ASR
MOV

:TO ONLY REPORT FATAL ERROR

CLRB

.EVEN

$SFFLG

;CLEAR FATAL FLAG

.LOG FLAG
;FATAL FLAG

CZOLDFO DLi1=wW/1144 MFM SLU

APT

COMMUNICATIONS ROUTINE

3173
3174
3175
3176

3177

000200
000001
000100
000040

MACRO M1113

05-NOV-80 12:3c

APTS12E=200
APTENV=001
APTSPOOL=100
APTCSUP=040

PAGE 75-1

SEQUENCE 95

CIDLDFO DLI1-wW/1144 MFM SLU

APT

COMMUNICATIONS ROUTINE

MACRO M1113

3179
3180

05-NOV-80 12:32

LSBTTL

PAGE 76

SEQUENCE 96

TYPE ROUTINE

222222222222 X222 X222 X222 22 XXXXXXXXR2XZR2XRARRRARARARARRRR

. X

AR R

-ROUTINE TO TYPE ASCIZ MESSAGE. MESSAGE MUST TERMINATE WITH A 0 BYTE.
:*THE ROUTINE WILL INSERT A NUMBER OF NULL CHARACTERS AFTER A LINE FEED.
$NULL CONTAINS THE CHARACTER TO BE USED AS TrnE FILLER CHARACTER.
;*NOTE:

$FILLS CONTAINS THE NUMBER OfF FILLER CHARACTERS REQUIRED.

:'NOTEZ:

;*NOTE3:

$FILLC CONTAINS TrE CHARACTER TO FILL AFTER.

;*CALL:
'1) USING A TRAP

TYPE

INSTRUZTION

.MESADR

::MESADR IS FIRST ADDRESS OF AN ASCIZ STRING

ME SADR

$TYPE:

TSTB
8PL
HALT
BR
MOV
MOV
(MPB
BNE
BIT8
BEQ
MOV
JSR
LWORD
BiTB
BNE
MovB
BNE
1ST
MOV
ADD
RTI
CMPB
BEQ
(MPB
BNE
TST
TYPE

$TPFLG
1%

CLRB
BR
JSR
(MPB
BNE
MOV

$CHARCNT
2%
PC,8TYPEC
SFILLC,(SP)+
2%

DECB
BLT
JSR
DECB

1(SP)
6%
PC,STYPEC
SCHARCNT

015556
015562
015564
015566
015570
015572
015576
015604
015606
015614
015616
015622
015626
015630
015636
015640
015642
015644
015646
015650
015654
015656
015662
015664
015670
015672
015674

105737
100002
000000
000430
010046
017600
122737
001011
132737
001405
010037
004737
000000
132737
001003
112046
001005
005726
012600
062716
000002
122716
001430
122716
001006
005726
104401

001057

015700
015704
015706
015712
015716
015720

105037
000755
004737
123726
001350
013746

016104

105366
002770
004737
105337

000001

015676

015724
015730
015732
015736
015742

001063

000770

001106

000100

001107

015626
015316
000040

1%:

000002
000001

001107

61%:
62%:

000002

60$%:
3%:

000011

4%:

000200

015770
001056

$CRLF

5%:
6$:

001054
015770
016104

TYPE

7%:

::1S THERE A TERMINAL?
;:BR IF YES
:;HALT HERE IF NO TERMINAL
3%
;s LEAVE
RO,-(SP)
;s SAVE RO
8l (SP),RO
::GET ADDRESS OF ASCIZ STRING
;sRUNNING IN APT MODE
#APTENV,SENV
629
::NO,GO CHECK FOR APT CONSOLE
, $ENVM ;. SPOOL MESSAGE TO APT
#APTSPOOL
62%
::NO,GO CHECK FOR CONSOLE
::SETUP MESSAGE ADDRESS FOR APT
RO,61%
;;SPOOL MESSAGE TO APT
PC.SATY3
O
; JMESSAGE ADDRESS
#APTCSUP.SENVM ;;APT CONSOLE SUPPRESSED
;:YES,SKIP TYPE OUuT
60%
::PUSH CHARACTER TO BE TYPED ONTO STACK
(RO)+,=-(SP)
;;BR IF IT ISN'T THE TERMINATOR
43
:;1F TERMINATOR POP IT OFF THE STA(K
(SP)+
(SP)+,RO
:;RESTORE RO
::ADJUST RETURN PC
#2,(SP)
::RETURN
; :BRANCH IF <HT>
#HT, (SP)
8%
::BRANCH I1F NOT <CRLF>
#CRLF, (SP)
5¢
::POP <CR><LF> EQUIV
(SP) ¢
;:TYPE A CR AND LF

$NULL,-(SP)

7%
BR
;HOR]ZONTAL TAB PROCtSSOR

::CLEAR CHARACTER COUNT
::GET NEXT CHARACTER
;60 TYPE THIS CHARACTER
:..S IT TIME FOR FILLER CHARS.?
;1F NO GO GET NEXT (HAR.
;;GET # OF FILLER CHARS., NEEDED
::AND THE NULL CHAR.

;sDOES A NULL NEED TO BE TYPED?
::;BR IF NO--GO POP THE NuULL OFF OF STA(K
;60 TYPE A NULL
::;00 NOT COUNT AS A COUNT
;. LOOP

CIOLDFO DLI1-W/1144 MFM SLU

TYPE

ROUTINE

112716

004737

132737

001372
005726
000724

105777
100375
116677
105777
100021

017746
042716
022726
001012
105777
100375
017746
042716
022726
001366

000040
015770
000007

000002
163034

8PL

163046

MovB
1878

B8PL

MOV

163010

000021

000012

000002

2§:

000002

1%:

PC,STYPEC

#7 ,3CHARCNT
9
(SP)+

2%
a$TPS

STYPEC

2(SP),asTPB
a%$TKsS

a87KB,~-(SP)

;sREPLACE TAB WITH SPA(E

S:TYPE A SPACE

::BRANCH [F NOT AT

;. TAB STOP
::POP SPACE OFF

STACK

::GET NEXT CHARACTER
;:WAIT UNTIL PRINTER IS READY
::LOAD CHAR TO BE TYPED INTO DATA REG.
::SEE IF KEYBOARD IS TALKING.

;:BRANCH IF T ISN'T,

::PUSH CHARACTER ONTO STACK.

;:81T CLEAR TOP BYTE AND PARITY BIT.
::SEE IF THIS 1S A *S.
::BRANCH TO CONTINUE IF IT ISN'T.
;:WAIT FOR ANOTHER INPUT,
: ;BRANCH BACK IF NOT READY,

BIC
CMP
BNE
(MPB
8NE
CLRB

#177600, (SP)
#21,(SP)+
3%
#CR,2(SP)
1%
SCHARCNT

::BIT CLEAR TOP BYTE AND FARITY BIT.
;:SEE IF THIS IS A *Q.
;:BRANCH BACK FOR MORE WAIT [F NOT.
::1S CHARACTER A CARRIAGE RETURN?
:;BRANCH IF NO
1:YES==CLEAR CHARACTER COUNT

(MPB

#LF,2(SP)

BEQ
INCB

$STYPEX: RTS

SBTTL

(SP)

SEQUENCE 97

#177600, (SP)
#23,(5P)+
2%
a%71KS
3%

$CHARCNT: .WORD

000000
000207

¥,

PAGE 76-1

BIC
CwP
BNE
1ST8B
B8PL
MOV

163004
177600

016104

JSR

BiT8
BNE
TST

000023

105037

MOvB

BR
$TYPE(C: TSTB

105227

3181

9% :

163030
177600

000015

000406
122766
001402

016104

05-NOV-80 12:32

8%:

163054

122766

001003

MACRO M1113

a$TkB,-(SP)

$TYPEX

$TYPEX
(PC)+

:;PUSH NEXT CHARACTER ON STA(K.

JEXIT

1S CHARACTER A LINE FEED?
::

;;BRANCH IF YES
::COUNT THE CHARACTER

;:CHARACTER COUNT STORAGE

BINARY TO OCTAL (ASCII) AND TYPE

I’Qt'.fi'.fi.ttit""""t't"""'ttttltl.t'tt"""'!t'.'tt"Qt'

“eTHIS ROUTINE IS USED TO CHANGE A 16-BIT BINARY NUMBER TO A 6-DIGIT
:*0CTAL (ASCII) NUMBER AND TYPE IT.
'ELYPOS-'-ENTER HERE TO SETUP SUPPRESS ZEROS AND NUMBER OF DIGITS TO TYPE
;*CALL

MOV

NUM,=-(SP)

M
.

.BYTE
.BYTE

N
M

TYPOS

::N=1 T0O 6 FOR NUMBER OF DIGITS TU TYPE
::M=1 0RO
;:1=TYPE LEADING 7EROQS

::0=SUPPRESS LEADING ZEROS

.t
M

::NUMBER T0O BE TYPED

;;CALL FOR TYPEOUT

*«$TYPON-==-ENTER HERE TO TYPE OUT WITH THE SAME PARAMETFRS AS THE LAST
;«$TYPOS OR $TYPOC

;'CALL:

M
M

MOV
TYPON

NUM,-(SP)

;;NUMBER T0 BE TYPED
:;CALL FOR TYPEQUT

:'?;YPOC---ENTER HERE FOR TYPEQUT QOF A 16 BIT NUMBER
J*CALL:

017646

116637
112637

000000
000001
016335

016333

It
MOV
TYPOC
o
$TYPOS: MOV

MOv8

MOVB

NUM,=-(SP)

a(sP),=(SP)

1(5P) ,$0FILL

(SP)+,30M0ODE+1

:;NUMBER T0 BE TYPED

;:CALL FOR TYPEOUT

::PICKUP THE MODE

::LOAD ZERO FILL SWIT(CH

; ;NUMBER OF DIGITS TO TYPE

BINARY TO OCTAL

(ASCII)

AND

TYPE

MACRO M1113

(05-NOV-80 12:32

000002

ADD

000001
000006
000005

MOVB
MOVB
MOvB
MOv
MOV
MOV
Move
NEG

016335

62704

000006

ADD

016334
016333
000012

Movs
Movs
MOV

ROL

2%:

ROL
ROL
ROL
MOV
ROL

3%:

016334
177770

000060
000040
016330
016330
016332

CLR

1%:

5%:
7%:

000002

000004

8%:

3182

$SOCNT:
$OFILL:
:
$OMODE

#2,(SP)
$TYPON

#,S0FILL
#6,80MODE
+1

#5,90CNT
R3,=(SP)
R4,
= (SP)

RS,=(SP)
$OMODE +1,R4
R4
#6,R4
R4 ,$0MODE

$OFILL,RS

12(SP) RS

H
8
76-2

SEQUENCE 98

. ADJUST RETURN ADDRESS
;3SET THE ZERO FILL SWITCH

;2SET FOR SIX(6) DIGITS
sSET THE ITERATION COUNT

;s SAVE R3

5 SAVE R4

::SAVE RS

:;GET THE NUMBER OF DIGITS TO TYPE

;sSUBTRACT IT FOR MAX. ALLOWED
2:5AVE

FOR USE

;3GET THE ZERO FILL SWITCH
;:PICKUP THE INPUT NUMBER
;:CLEAR THE OUTPUT WORD
;;ROTATE MSB INTO '‘C*'

::G0 DO MSB
::FORM THIS DIGIT

DECB
BPL
BIC
BNE
TST
BEQ

;:;TYPE

THIS

;:BR

:;GET LSB OF

.BYTE
.BYTE
BYTE
.BYTE
.WORD

THIS 0?

;JsMAKE

ASCII

NOT

::SAVE FOR TYPING

ALREADY

;G0 TYPE THIS DIGIT
;:COUNT BY 1

BGT
BLT

MOV
RTI

FOR O

;s SUPPRESS

;:DON'T SUPPRESS ANYMCRE 0'S

DECB

MOV
MOV
MOV
MOV

:;TEST

;;MAKE THIS DIGIT ASCII

Move
TYPE

B8R

THIS DIGIT

DIGIT?

;:GET RID OF JUNK
;:BR [F YES

INC
BIS
BIS

INC

6%:

PAGE

(SP)+,RS
(SP)+ R4

::BR IF MORE T0 0O
::BR IF DONE
;s INSURE LAST DIGIT ISN'T A BLANK
;:G0 DO THE LAST DIG IT

;;RESTORE RS

;;RESTORE R4

(SP)+,R3
2(SP) ,4(SP)

;sRESTORE R3
J:SET THE STACK FOR RETURNING

OOOOO

(IOLDFO DLI1-W/1144 MFM SLU

. STORAGE FOR ASCII DIGIT

(SP)+, (SP)

: sRETURN

;. TERMINATOR FCR

TYPE

ROUTINE

:;OCTAL DIGIT COUNTER
;. JERO FILL SWITCH
. sNUMBER OF DIGITS 1O TYPE

8
1
MACRO M1113 05-NOV-80 12:32 PAGE 77 SEQUENCE 99
CI0L..FO DLIT=W/1144 MFM SLU
BINARY TO OCTAL (ASCII) AND TYPE
3184
TTY INPUT ROUTINE
SBTTL
3185

t"'ttt"""t"'Q""Q'""""'t'"Q""".""".""""."

ENABL

LS8

'Qt.t"'t""""'""""""""""""""""'.Q""'""'

:*SOFTWARE SWITCH REGISTER CHANGE ROUTINE.
:«ROUTINE 1S ENTERED FROM THE TRAP HANDLER, AND WILL

;*SERVICE THE TEST FOR CHANGE IN SOF TWARE SWITCH REGISTER TRAP CALL

100071
117746

042716
022726
001062

000176
162472
1624666
177600

000007

123727

001034

104401
104401

017063
017070
000176

00145¢
013746
104402
104401

005046
005046
105777
100375
117746

042716
021627
001005
104401

062706
000757
021627
001022
005766
001403
016677
062706
104401
123727

001003
012777
000002
004737
021627
002420
021627
003015
042726
005766
001403
006316
006316
006316

001040

000001

. *WHEN OPERATING IN TTY FLAG MODE.
#SWREG, SWR
$CKSWR: CMP
..IS THE SOFT-SWR SELECTED?
15%¢
:BRANCH IF NO
BNE
:;CHAR THERE?
1S18
asTKS
15%
BPL
::1F NO, DON'T WAIT AROUND
Movs
a$TKB,=(SP
::SAVE THE CHAR
#4C177, (SP
::STRIP=0FF THE ASCII
BIC
#7,(SP)+
(MP
;18 IT A CONTROL G?
::NO, RETURN TO USER
15¢
BNE
;:ARE WE RUNNING [N AUTO-MODE?
#1
$SAUTOB,
(MeB
15%
; ;BRANCH IF YES
BEQ
$GTSWR:

017101

19%:
7%:

162410
1624604

177600
000025

9%:

017056
000006

20%:

000015

10%:

000004
162330

000002
000006
001063
001035

000001

000100

162306

015770
000060
000067

000060
000002

TYPE
TYPE
MOV
TYPOC
TYPE

CLR
CLR

1518
BPL
MOvB

BIC
(MP

BNE

TYPE
ADD

BR
(mMpP
BNE
1ST
BEQ
MOV
ADD
TYPE
(MPB
BNE
MOV
RTI
JSR
CMP

BLT

CMP
BGT
BIC
TST
BEC
ASL
ASL
ASL

L$CNTLG
"$MSWR

;;ECHO THE CONTROL-G (*0)

LSMNEW

;;PROMPT

(SP)
= G,
SWRE
Z(SP)
-(SP)

asTKsS
7
a$TKB, = (S

#AC177,(S
(SP), czs

108

L$CNTLU
#6,SP
19%

:;TYPE

CURRENT

FOR NEW SWR

; sCLEAR COUNTER
;:THE

NEW SWR

::CHAR THERE?
,,IF

NOT

TRY

AGAIN

;PICK UP CHAR

,,HAKE IT 7-BIT ASC.lI
;1S IT A CONTROL-U?
::BRANCH IF NOT

::YES, ECHO CONTROL-U (*V)
: : IGNORE PREVIOUS INPUT
s:LET'S TRY [T AGAIN
s:1S 1T A <CR>?
; :BRANCH IF NO

11%

;:BRANCH IF

(SP),#15

4(SP)

2(SP),aSwR

86, 5P

L $CRLF

CONTENTS

;s SAVE SWREG FOR TYPEQUT
;260 TYPE--OCTAL ASCIICALL DIGITS)

16%

;:YES, IS IT THE FIRST (HAR?
YES

;:SAVE NEW SWR
;sCLEAR UP STACK
:;ECHO <CR> AND <LF>

PC,STYPEC

::RE-ENABLE TTY KBD INTERRUPTS?
;;BRANCH IF NQT
:;RE-ENABLE TTY KBD INTERRUPTS
; RETURN
;;ECHO CHAR

18%
(SP),#67

: ;BRANCH IF YES
::CHAR > 7?

#1
$INTAG,

15%
#100,387KS

(SP),#60C

022737
001074
105777

—

016336
016344
016346
016352
016354
016360
016364
016370
016372
016400
016402
016406
016412
016416
016420
016424
016426
016430
016434
016436
016442
016446
016452
016454
016460
016464
016466
016472
G16474
016500
016502
016510
016514

::CHAR < 0?

:;BRANCH IF YES

;:STRIP=0FF ASCII
::1S THIS THE FIRST (HAR
:;BRANCH IF YES

::NO, SHIFT PRESENT
oe
CHAR OVER TO MAKE
D
ROOM FOR NEW ONE.

C20LD ¢ 0 DLI1-W/1144 MFM SLU
11y | N P UT ROUTINE

005266
056616
000707
1044M

000720

MACRO M1113

05-NOv-80 12:32

000002
177776

17%:

001062

18%:

77-1

SEQUENCE

100

BIS
BR

=2(SP), (SP)
7%

;sKEEP COUNT OF (HAR
::SET IN NEW (HAR
;sGET THE NEXT ONE

;s SIMULATE CONTROL-U

INC

TYPE

.DSABL

PAGE

LS8

2(SP)

$QUES

2 TYPE

27<CRY<LE>

AR RS20
RRRRRRRRRRRRRRRd D)

I*THIS ROUTINE WILL INPUT A SINGLE CHARACTER FROM THE TTY
;eCALL:
RDCHR
M
L

RETURN HERE

;o INPUT A SINGLE CHARACTER FROM THE TTY
;s CHARACTER IS ON THE STA(CK
;;WITH PARITY BIT STRIPPED OFF

MOV

:;PUSH DOWN THE P(

016620
016622
016630
016634
016636
016644
016652
016660
016662
016666
016670
016674
016700
016704
016706

000002

162204
177600

000004
000004
000023

00€004

162156

i$:

MOVB

BIC
CMP
BNE

2%:

000002

000140

000004

000175

000040

000004

BPL
MOvB

BIC
CMP
BNE
BR

CMP

3s:

BLT
CMP
BGT
BIC

4(8:
A

(SP),~-(SP)

& (SP),2(SP)
a$7ks
1%

a$T1KB 4 (SP)

A C?T> 4 (SP)
4(SP),#2%

TST8

000021

000004

MOV

1578
BPL

162152
177600

016710
016716
016720
016726
016730
016736

000004
162210

$SRDCHR:

RTI

as$TKB, = (SP)

177, (sP)
(SP)+,#21
2%

1%
L(SP)
, 4140
43
4(SP),M75
43
#40,4(SP)

;sSAVE

THE PS

;:WAIT FOR

;A CHARACTER
:;READ THE TTY

::GET RID OF JUNK [F ANY
;1S IT A CONTROL-S?

;;BRANCH [F

;:WAIT

FOR A CHARACTER

::MAKE

;.LO00P UNTIL ITS THERE
::GET CHARACTER
7-BIT AS7II

;:IS 1T A CONTROL-Q?
1F NOT DISCARD T
;o
;. YES, RESUME

;318 1T UPPER CASE?
; sBRANCH IF YES
::1S 1T A SPECIAL CHAR?
;;BRANCH IF YES

;;MAKE

UPPER CASE

;:60 BACK TO USER

2222222220200 00000RRRRRARRRRARRRRRRRARRRRRRARRRRRRRRARRRRRRR
R

:«THIS ROUTINE WILL INPUT A STRING FROM THE TTY

;*CALL:
;v
.

RDLIN
RETURN HERE

oo~
O~

—ted ()l
e O b D b e =2
OO O
COONO=OO0OON—2OON
2=
SNV
= O
=N
=NONO
S OWNE NN ONO & & N~NW
OO WVNIOWO
OO = —=0000 &
= AN O A ==
N =2 NN AN N VNVN N O

—

)

b wdd

~N~

017046
017056

SRDLIN: MOV
1%:
MOV

2$:

10$:

001062

017044
017044
000015

3%:

177777

001064

;s VERMINATOR WILL BE A BYTE OF

::SAVE R3

ALL O0'S

BR
MOVB

1%
(R3),9%

;:GET ADDRESS
s sBUFFER FULL?
:BR IF YES
::60 READ ONE CHARACTER FROM THE TTY
;:GET CHARACTER
;1S 1T A RUBOUT
::SKIP IF NOT
JiTYPE A '
:3CLEAR THE BUFFER AND LOOP
;sECHO THE CHARACTER

(MPB
BNE
CLRB

#15,(R3)+
23
-1(R3)

;sCHECK FOR RETURN
::LOOP [F NOT RETURN
;;CLEAR RETURN (THE 15)

(MP

#STTYINB.
,R3

BLOS

MovB
(MPB

(SP)+,(RY)
#177,(R3)

ROCHR

000177

R3,-(SP)
#STTYIN,RS

;3 INPUT A STRING FROM THE TTY
;;ADDRESS OF FIRST CHARACTER WILL BE ON THE STA(K

BNE

TYPE

,SQUES

JLF

;;TYPE

A LINE

FEED

CIOLDFO DLIT-W/1144 MFM SLU

TTY

MACRO M1113

INPUT ROUTINE

017024
017026

011646
016666

017044
017045
017046
017056
017063
017070
3186 017101

000
000

017034
017042

017022

012766
000002

136
136

015
040

012603

000004

017046

MOv
MoV

000002

000004

9% :

125
107

012
040

015
015

123
116

05-NOV-80 12:32

MoV
RTI

.BYTE
BYTE
STTYIN: .BLKB
SCNTLU: .ASCIZ
SCNTLG: .ASCIZ
ASCIZ
SMSWR:
.ASCIZ
SMNEW:

MOV

PAGE 77-2

(SP) ,=(SP)
4 (SP),2(SP)

FSTTYIN,L(SP)

SEQUENCE 101
;sADJUST THE STACK AND PUT ADDRESS OF THE
HH
FIRST ASCII CHARACTER ON IT

: sRETURN
0
;s STORAGE FOR ASCII CHAR. TO TYPE
;s TERMINATOR
0
: sRESERVE 8 BYTES FOR TTY INPUT
8.
/%U/<15><12>
;s CONTROL 'V
/%6/<15><12>
; ;CONTROL ''6"
<15><12>/SWR = /
/ NEW =/

(SP)+,R3

; ;RESTORE R3

CIOLDFO DLi1-W/1144 MFM SLU

11Y

INPUT ROUTINE

MACRO M1113

3188
3189
3190

05-NOV-80 12:32

SBYTL

PAGE 78

SEQUENCE 102

TRAP DECODER

CRARRNANRANRRANRRRRERCERCEREROCOERNOANRARRERRARORRRRANROARRRRNORNRNOORNEOY

c*THIS ROUTINE Will PICKUP THE LOWER BYTE OF THE '‘TRAP'' INSTRUCTION
;«AND USE IT TO INDEX THROUGH THE TRAP TABLE FOR THE STARTING ADDRESS
©+0F THE DESIRED ROUTINE. THEN USING THE ADDRESS OBTAINED IT wWiLL

017112
017114
017120
017122
017124
017126
017132

010046
016600
005740
111000
006300
016000
000200

017134
017136
017144

011646
016666
000002

2¢GO TO THAT ROUTINE.

$TRAP:

000002

017146

MOV
MoV
ST
MOVB
ASL
MOV
RTS

RO,-(SP)
2(SP),RO
-(R0)
(RO),RO
RO
$TRPAD(RO),RO
RO

::SAVE RO
::GET TRAP ADDRESS
: :BACKUP BY 2
::GET RIGHT BYTE OF TRAP
::POSITION FOR INDEXING
;;INDEX TO TABLE
::G0 TO ROUTINE

(SP),=(SP)
4(SP),2(SP)

::MOVE THE PC DOWN
: :MOVE THE PSW DOWN
; ;RESTORE THE PSW

;:THIS 1S USE TO HANDLE THE ''GETPRI'' MACRO

000004

000002

$TRAP2: MOV
MOV
RTI
.SBTTL

TRAP TABLE

;«THIS TABLE CONTAINS THE STARTING ADDRESSES OF THE ROUTINES CALLED
;*BY THE "'TRAP'' INSTRI'CTION.
ROUTINE
:

017146

31N

017150
017152
017154
017156
017160
017162
017164
017166

017134

015556
016134
016110
016150
016406
016336
016620
016740

STRPAD:

.WORD

$TYPE
$TYPOC
$TYPOS
STYPON
$GTSWR
$CKSWR
$RDCHR
$ROLIN

$TRAP?

;;CALL=TYPE
;;CALL=TYPOC
;:CALL=TYPOS
;;CALL=TYPON
;;CALL=GTSWR
;;:CALL=CKSWR
; ; CALL=RDCHR
;;CALL-ROLIN

TRAP+1(104401)
TRAP+2(104402)
TRAP+3(104403)
TRAP+4(104404)
TRAP+5(104405)
TRAP+6(104406)
TRAP+7(104407)
TRAP+10(104410)

TTY TYPEOUT ROUTINE
TYPE OCTAL NUMBER (WITH LEADING ZEROS)
TYPE OCTAL NUMBER (NO LEADING ZEROS)
TYPE OCTAL NUMBER (AS PER LAST (ALL)
GET SOFT-SWR SETTING
TEST FOR CHANGE IN SOFT-SWR
TTY TYPEIN CHARACTER ROUTINE
TTY TYPEIN STRING ROUTINE

CIOLDFO DLiV-W/1144 MFM SLU

MACRO M1113

ECHO TEST

3193

LSBTTL

319(,

3195

;.t'ttt'tt't't""'tt't"t""'t't't"'t'ttttt't'tt'tt""t"'Q't

000005

3203 017200
3204 017204
3205 017206
3206 017214

105777
100375
117777
017700

3208 017222
3209 017226
3210 017230
3211 017232

052701
030100
001403
004737

3213 017240

006301

3212 017236

112777

100023

017342

3214 017242
3215 017244
3216 017246

030100
001403
004737

3218 017254

006301

3222 017266

017365

3217 017252

017353

ECHO

000052

163462

163444
163436

163446

163450

017314

43:

042700

000200

3¢25 017300
3226 017302

001337
004737

3227 017306

022700

017400

3228 017310
3229 017312

000000
000726

3232 017314
3233 017316
3234 017322

013600
062746
105777

%%%?

3235 017326

100375

5%:

000003

017314

112077
105710
001371
000207

163326

3241 017342
3242 017353
3243 017365
3244 M17400

015
015
015
015

012
012
012
012

MPAR

ASL

BIT
BEQ
JSR
MFR

ASL

MSG:

WAIT:

120
106
117
123

MPAR:
MFR:
MOR:
MSTOP:

#'+,3CTBUF

8CRCSR
23
SCRBUF ,8CTBUF
aCRBUF ,RO

133

#B1T12,R1
R1,RO
3%
PC,MSG

R1,RO
X3
PC,MSG

;CLEAR EVERYTHING

< TRANSMIT PROMPT ‘'s**
:WAIT FOR INPUT
:ECHO INPUT
;STORE INPUT

‘BR IF "'ERROR'NOT SET

:SET PARITY ERROR TEST MASK
:CHECK FOR PARITY ERROR FLAG
:BR IF NOT SET
:REPORT PARITY ERROR

;SHIFT MASK TO TEST "‘FR' FLAG

;TEST FOR FRAMING ERROR FLAG
:BR IF NOT SET
:REPSORT FRAMING ERROR

SSHIFT MASK TO TEST ''OR'’ FLAG

BIT
BEQ
JSR

R1,RO
5%
PC,MSG

;TEST FOR OVERFLOW ERROR
:BR IF NOT SET
:REPORT OVERFLOW ERROR

BIC

#B1T7.R0

;CLEAR ANY PARITY BIT

BNE
JSR

2%
PC,MSG

;BR If NOT
;REPORT PROGRAM STOP

HALT
BR

ECHO

SEND OF TEST HALT
;AFTER END OF TEST HALT

MOV
ADD
TSTB

8(SP)+,RO
#2,-(SP)
CTCSR

:PICK UP MESSAGE POINTER
;ADJUST RETURN PC
;WAIT FOR XMIT DONE

MOVB
TST8
BNE
RTS

(RO) +,aC TBUF
(RO)
WAIT
PC

:SEND CHARACTER
;1S THIS END OF MESSAGE?
:BR If NOT
:RETURN

MOR

CMP

MSTOP

000002
163332

3236 017330
3237 017334
3238 017336
ggzg 017340

1STB
BPL
MOVB
MOV

BIS
BIT
8EQ
JSR

3%:

3223 017270

RESET

MOVB

BPL

017314

3224 017274

2s:

010000

030100
001403
004737

3219 017256
3220 017260
3221 017262

ECHO TEST

:*AT THE CONSOLE
SeTHE TEST IS HALTED BY TYPING A CONTROL=C
;*TEST CAN BE RESTARTED AFTER HALTING BY JUST CONTINUING

3201 017170

3207 017220

SEQUENCE 103

:«THIS ROUTINE WILL ECHO ANY CHARACTER TYPED

3199

3202 017172

PAGE 79

"tttt"'tt'ttt"tt""'"'tQ't"'ttt"tttt'tt't"t""'t't'tt'

3196
3197
3198

3200 017170

05-NOV-80 12:32

BPL

.ASCIZ
ASCIZ
ASCIZ
.ASCIZ

#3,R0

WALT

:WAS INPUT CONTROL-C

<CR><LF>/PARITY/
<CRO<LF>/FRAMING/
<CR><LF>/OVERFLOW/
<CR><LF>/STOP/

PRESS CONTINUE TO RESTART ECHO TEST

- =
WXV IV IV IV U o oF o o

L-4

O-

[ ST, N1, 1 N1, 81, U], V], 01,8

P
44

e
([l]

?L11-U/1166 MEM SLY

MACRO M1113

05-NOV-80 12-32

PAGE 80

SEQUENCE 104

.EVEN
.SBTTL

TERMINAL QUTPUT

TEST

;;".Q".'t.""""""""""""'Q"""t""'""Q"".Q".'

;*THIS ROUTINE WILL OUTPUT ALL WRITABLE CHARACTERS FOR THE

;*THE OCTAL CODE 040 --> 377
;*32 CHARACTERS ARE PRINTED ON EACH LINE

;*THE PATTERN 1S REPEATED EVERY THREE LINES
> %

;:"""t"t""""""""l'"""""t""""".""""t't't

3260 017410
3261 017414
017420
017424
017426
017432
017434
017436
017440

012701
012700
105777

000040
000040

010177

163230

005300
001370
004737

017314

017444
017446
017452
017454
017460
017462

001063
105777

163202

032701
001353
000754

000200

017464
017470
017472

005077
000000
000746

163166

100375
105201

100404

163234

QUTTST:
1%:

2%:

MOV
MOV
1ST8
8PL
MOV

INCB
DEC
BNE
JSR
SCRLF

:LOAD FIRST WRITABLE CHARA(CTER
:LOAD CHAR COUNT PER LINE
;WAIT FOR DONE

R1,8CTBUF
R1
RO

sTRANSMIT A CHARACTER
: INCREMENT CHARACTER CODE
;DECREMENT CHAR COUNT

PC,MSC

:SSUE CR,LINE FEED

;BR IF LINE NOT COMPLETE

BNE
BR

BIT

8CRCSR
3%
#8177, ,R1
oUTTST
1%

sANY CHARACTER RECEIVED?
:BR IF YES
;FINISHED ONE PASS OF WRITABLE CHARACTERS?
;BR [F YES
;1F NOT WRITE NEXT LINE

CLR

a(RBUF

;CLEAR RECEIVER
;STOP TEST

1S18
BM]

3%:

#40,R1
#40,R0
ggTCSR

HALT
BR

ouTTST

;RESTART TEST IF CONTINUED

CZOLDFO OLi1-W/1144 MFM SLU

MACRO M1113

heagxgn OUTPUT TEST
281
3282

3283 017474
3284 017520

103
103

101
101

3288 017670
3289 017714
3290 017740
3291 017763
3292 020026
3293 020057

103
103
103
102
103
103

101
101
101
1M
101
101

3285 017544
3286 017611
3287 017633

3294 020112
3295 020153
3296 020216
3297 020247
3298 020302
3299 020343
3300 020406
3301 020443
3302 020474
3303 020527
3304 020570
3305 020633
3306 020672
3307 020723
3308 020756
3309 021024

3310 021066

3311 021124
3312 021154
3313 021206
33514 021246
3315 021274

3316 021334
3317 021366
3318 021417
3319 021453

3320 021510
3321 021510
3322 021544

124
124
124

122
102
103
103
122
102
130
103
103
122
102
122
103
103
103
102

114

103
103
122
104
102

103
102
122
122

103
103
103

105
MM
10
M
105
m
115
101
101
105
11
103
101
101
101
1M

113

101
101
105
125
m

101
m
124
124

116
116
123
123
123
116
116
116
126
116
116
123
126
116
116

116
126
103
103

3328 022016
3329 022060
3330 022060
3331 022107
3332 022133
3333 022200
3334 0222264
3335 022250
3336 022316
3337 022354

130
130
130
114
122
122
122
122
122

115
115
117
103
103
103
105
104

/CAN NOT ACCESS TCSR/
/CAN NOT ACCESS TBUF/
/TCSR DONE NOT CLEARED WITH TBUF FULL/
/TCSR DONE NOT SET/
/TCSR DONE NOT SET WITH RESET/
/CAN NOT ACCESS RCSR/
/CAN NOT ACCESS RBUF/
/CAN NOT ACCESS LKS/
/BITO OF TCSR NOT CLEAR AFTER RESET/
/CAN NOT SET BITO OF TCSR/
/CAN NOT CLEAR BITO OF TCSR/
/RESCT DID NOT CLEAR BITO OF TCSR/
/BIT2 OF TCSR NOT CLEAR AFTER RESET/
/CAN NOT SET BIT2 OF TCSR/
/CAN NOT CLEAR BIT2 OF TCSR/

/RESET DID NOT CLEAR BIT2 OF T(SR/
/BIT6 OF TCSR NOT CLEAR AFTER RESET/
/XMIT INTERRUPT AT PRIORITY 7/
/CAN NOT SET BITé OF TCSR/
/CAN NOT CLEAR BITé OF TCSR/
/RESET DID NOT CLEAR BIT6é OF TCSR/
/B1T6 OF RCSR NOT CLEAR AFTER RESET/
/RCVR INTERRUPT WITH PRIORITY 7/
/CAN NOT
/CAN NOT
/CAN NOT
/BIT6 OF

SET BIT6 OF RCSR/
CLEAR BITé OF RCSR/
CLEAR BIT6 OF RCSR WITH RESET/
LKS NOT CLEAR AFTER RESET/

.ASCIZ

/LKS INTERRUPT WITH PRIORITY 7/

.ASCIZ
(ASCIZ

/CAN_NOT CLEAR BIT? OF LKS/
/BIT7 OF LKS DOES NOT SET/

_ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
_ASCIZ

.ASCIZ

/CAN NOT SET BIT6 OF LKS/
/CAN NOT CLEAR BIT6 OF LKS/
/RESET DID NOT CLEAR BIT6 OF LKS/
/DUAL ADDRESSING ERROR/
/BIT6 OF LKS NOT SET AFTER RESET/

/RTC INTERRUPT AT PRIORITY 7/

/RTC INTERRUPTS WHEN DISABLED/

117
111

EM53:
EMS4:

_ASCIZ
.ASCIZ

/CLOCK REPEATABILITY/
/XMIT INTERRUPTS WHEN DISABLED/

111

EMS7:
EMSS5:
EM60:
EM61:
EM62:
EM63:
EM64:
EM6S:
EM66:
EM67:

.ASCIZ

/XMIT INTERRUPTS WITH ENABLE CLEAR/

114
115

115

EML7:
EMG6:
EM50:

SEQUENCE 105

EM51:

103
130

115

EM42:
EMG3:
EM44:
EM45:

. ASCIZ
_ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
_ASCIZ

/RTC INTERRUPT DID NOT OCCUR/
/RTC DOUBLE INTERRUPT/
/RESET OID NOT INTERRUPT/

3325 021676
3326 021722

130

EM34:

LASCIZ
.ASCIZ
LASCIZ

PAGE 81

.ASCIZ
.ASCIZ
_ASCIZ

3323 021571

3327 021760

.ASCIZ
LASCIZ
,ASCIZ
.ASCIZ
.ASCIZ
_ASCIZ

EM35:
EM36:
EM37:
EM40:
EM41:

103
103
123

124

EM6:
EM7:
EM10:
EM11:
EM12:
EM13:

EM3:
EM4:
EMS:

116
116
123
101
126

123

124
126
105

122

.ASCIZ
LASCIZ

116
116
116
124

122
122
122

3324 021621

EM1:
EM2:

EM14:
EM15:
EM16:
EM17:
EM20:
EM21:
EM22:
EM23:
EM24:
EM25:
EM26:
EM27:
FM30:
EM31:
€EM32:
EM33:

123
126
111
116
116
123
126
126

05-NOV-80 12:32

103
111

111
111
101
126
126
126
123
122

EMS2:

EMS6:

.ASCIZ

.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ

/RTC INTERRUPT DID NOT CLEAR WITH BIT7 OF LKS/

/XMIT INTERRUPTS AT PRIORITY 7/

/XWIT DID NOT INTERRUPT/
/XMIT RE-INTERRUPTED/
/LOADING TBUF DID NOT CLEAR INTERRUPT/
/RCVR ACTIVE NOT SET/
/RCVR DONE NEVER SET/
/RCVR ACTIVE NOT CLEARED WITH DONE SET/
/RESEY DID NOT CLEAR RCVR DONtc/
/RDR ENABLE DID NOT CLEAR RCVR DONE/

MACRO M1113

CZ0LOFO DLi1=-W/1144 MFM SLU
TERMINAL OUTPUT

TEST

3338 022417
3339 022464
3340 022526
3341 022564
3342 022633
3343 022633
3344 022662
3345 022706
3346 022753
3347 023016
3348 023044
3349 023103
3350 023141
3351 023176
3352 023¢c1
3353 023256
3354 023310
3355 023340
3356 023400
3357 023415
3358 023453
3356 023512
3360 023551
%gg; 023610

122
122
122
122

105
103
103
103

101
126
126
126

122
122
122
122
047
047
102
102
104
114
124
11
104
124
116
042
122
122
122

103
103
105
105
17
105
122
122
101
117
111
116
101
122
117
105
103
103
104

3363 023655
3364 023702
3365 023727
3366 023754
3367 024001
3368 024025
3369 124061
3570 0264126
3371 024163
3372 024227
3373 024273
3374
3375 024344
3376
3377 024402
gg;g 024404

124
124
124
124
124
124
124
124
124
124
124

3380
3381 024434

3382 024444
3383 024454
3384 024464
3385 024474
3386 024504
3387 024516
3388 024532
3389 024544
3390 024560
3391 024574
3392 024610
3393

05-NOV-80 12:32

c 9
PAGE 81-1

SEQUENCE 106

/READING RBUF DID NOT CLEAR RCVR DONE/
/RCVR INTERRUPTS WITH ENABLE CLEAR/

.ASCIZ
(ASCIZ
(ASCIZ
(ASCIZ

126
126
101
123
122
122
105
105
126
117
115
103
126
101
040
122
126
126
122

EM70:
EM71:
EM73:
EM74:
EM72:
EM?5:
EM76:
EM?77:
EM100:
EM101:
EM102:
EM103:
EM104:
EM105:
EM106:
EM107:
EM110:
EMI11:
EM112:
EM113:
EM114:
EM115:
EM116:
EMI17:

.ASCIZ
.ASCIZ
,ASCIZ
.ASCIZ
LASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
LASCIZ
ASCIZ
.ASCIZ
,ASCIZ
(ASCIZ
ASCIZ
.ASCIZ
LASCIZ

/RCVR DID NOT INTERRUPT/
/RCVR RE-INTERRUPTED/
/READING RBUF DID NOT CLEAR INTERRUPT/
/RESET DID NOT CLEAR RCVR INTERRUPT/
/'OR' FLAG DID NOT SET/
/'ERROR' NOT SET WITH 'OR' FLAG/
/BREAK DID NOT XMIT ALL ZEROES/

105
105
105
105
105
105
105
105
105
165
105

123
123
123
123
123
123
123
123
123
123
123

DH1:
DH2:
DHé6:
DH7:
DH10:
DH40:
DHS3:
DH103:
DH105:
OH110:
DH112

/TESTH
/TESTH
/TESTH
/TESTY?
/TESTH
/TESTS

015

012

103

015
040

012
040

040

M2:
M2A:

LASCIZ
.ASCIZ
JASCIZ
LASCI2
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
.ASCIZ
ASCIZ
EVEN
LASCIZ
.EVEN
.ASCI1
LASCIZ

001072
001072
001072
001072
001072
001072

001016
001016
001016
001016
001016
001016

002640
002642
002634
002636
002674
001020

DT1:
DT12:
DT6:
0T7:
DT10
D740

.EVEN
.WORD
.WORD
.WORD
.WORD
.WORD
.WORD

001072
001072
001072
001072
001072
000000

001016
001016
001016
001016
001016

002674
002634
002634
002634
002634

.WORD
.WORD
.WORD
.WORD
.WORD
.WORD

/RCVR INTERRUPTS AT PRIORITY 7/

/RCVR INT RQST PASSED WITH ENABLE CLEAR/

/BREAK DID NOT SET ‘'FR' ERROR/
/DATA COMPARE ERROR/
/LOOP=-BACK DATA COMPARE ERROR/
/TIMEOUT IN EXERCISER TEST/
/INCORRECT RECEIVE COUNT/
/DATA COMPARE ERROR IN EXERCISER/
/TRAP CATCHER/

/NO CLK INTERRUPT IN EXERCISER/

/''ERROR’'' NOT SET WITH "'FR'' FLAG/

/RCV ACTIVE NOT CLEAR WITH INJT/

/RCV ALTIVE WITHOUT °'‘START'' B[T/

/RDR ENABLE NOT CLEAR WITH RCV ACTIVE/

/TESTS
/TESTSH
/TESTH

/TEST#
/TESTS

ERROR#
ERR PC
ERR PC
ERR PC
ERR PC
ERR PC

ERR PC
ERR PC
ERR PC

ERR PC
ERR PC

TCSR/
TBUF/
R(CSR/
kBUF/
LKS/
GOOD

BAD/

RCSR
RCSR

DATA/
600D
TRANS
OLDPC

(NT2/

(NT?

LKS
RCSR
RCSR

BAD/
RCV/
TRAP ADR/

CCR<LF>/CIOLDFO DL11=W, 1144 MFM SLU/
<CRY<LF>

DEVICES UNDER TEST

$TESTN,SERRPC,TCSR,0
$TESTN.SERRPC
. TBUF .0
$STESTN.SERRPC .RCSR.0
.RBUF .0
STESTN.SERRPC

STESTN.SERRPC.LKS,0

STESTN.SERRPC .$SGDADR, SBDADR, 0
$STESTN.SERRPC.LKS,FIRST,SECND,0
STESTN. SERRPC .RCSR,$BODAT,0
STESTN.SERRPC .RCSR.SGDDAT.$BDDAT,0
STESTN SERRPC .RCSR.XMTCNT.RCVCNT .0

STESTN SERRPC .RCSR.OLDPC,BDVECT,
0

"END ADDRESS FOR CHECKSUM AND SAVE AREA
'0F WRAP AROUND CONSOLE TEST

CIOLDFO DLI1-W/1144 MFM SLU

TERMINAL QUTPUT

3394
3395

TEST

000001

MACRO M1113

05-NOV-80 12:32

.END

PAGE 81-2

SEQUENCE 107

012252
000015
002656
002654
000200
002666
002664
002662
002660
002672
002624
002670
DDISP = 177570
003014
023655
024001
024126
024163

ENDADD=
ENDADR

ENDB7

ENDEV
ENDMG
ENDSTK
ERROR

ERRVEC=
FIRST
FLAG4G
GETB

] }
T I
TR
T I

EM62
EM63
EM64
EM6S
EM66
EM67
EM7
EM70
EM71
EM72
EM73
EM74
EM75
EM76
EM77

EM61

NN
W= 2N 2ONN NS —OO~
—
= PN OOWNON
S OO0

013526
002444
007226
002564
013330
006246

EM60

CKSWR = 104406

EM6

1046405

000011
004620
ID
003462
INIT
I0TVEC= 000020
002432
JIMSTK
= 000012
LF
002674
LKS
002340
Loc1
002342
LOC?2
MANL
003502
= 000007
MFPT
MFR
017353
MOR
017365
MPAR
017342
MSG
017314
MSTOP
017400
M1
024344
M2
024402
M2A
024404
NOEOP
014214
oLDP(
002620
002436
OLDSUM
ST
017410
QUTT
PIRQ
= 177772
PIRQVE= 000240
PROMPT
002566
PRO
000000
PR1
000040
PR2
00010C
PR3
000140
PR4
000200
PRS
000240
PR6
000300
PR?7
000340

T I

AMADR3= 000000
= 000000
AMADR4
AMAMS 1= 000000
AMAMS2= 000000
AMAMS 3= 000000
= 000000
AMAMSL
AMSGAD= 000000
AMSGLG= 000000
AMSGTY= 000000
AMTYP1= 000000
AMTYP2= 000000
AMTYP3= 000000
AMTYPG= 000000
APASS = 000000
APRIOR= 000000
APT(CSU= 000040
APTENV= 000001
APTSIZ= 000200
APTSPO= 000100
APTSZD
003636
ASWREG= 000000
ATESTN= 000000
AUNIT
000000
AUSWR
000400
AVECT1
000300
AVECT2= 000000
002622
BOVECT
003774
BEGIN

EM51
EMS2
EMS53
EM54
EM55
EM56
EM57

013760
014330

GETLIN
GOAGIN
GTSWR

PS
PSW
PUTLIN

AMADR1= 000000
AMADR2= 000090

EMS
EMSO

— e b D N b eh d D d ed e D Y D D D = OOO
N
OO VWS SN
N = =2 OO NNO

ADRTBL
AENV
AENVM
AFATAL= 000000

EM41
EM42
EML3
EM4G
EM4S
EM46
EM47

= NN RPN N

ADEVCT
ADEVM
ADR

100000
000004
000010
000020
000040
000100
000200
000400
001000
000003
000014
002454
014412
013706

SEQUENCE 108

EM&
EM4O

WWNAVNPOR) = et O O O VNN B S
ONI
S DN N =2 N =2\ N = O
N ONOWININOO —2NOWWNO

ADDW9

EmM27
EM3
EM30
EM31
EM32
EM33
EM34
EM3S
EM36
EM37

PORLAINVRNLAVND = POAL NI R RO ADRNINI NN NN N

ADDW3

ADDW4
ADDWS
ADDW6
ADDW?
ADDW8

000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
004132
002702
000000
000000

PAGE 81-3

003014
000001
000001
000002
000004
000010
000020
000040
000100
000200
000400
001000
000002
002000
004000
010000
020000
040000

[e=feleleleleleleleololelalelelaleleoleololololeololelelol
oo o] o]

ADDW10
ADDW11
ADDW12
ADDW13
ADDW14
ADDW15
ADDW?

ADDWA

oo
@ Do [oofeole.] [ooXevRooNoodooRooRooRoodo
o ooQoo ookoo oo oo oeRoodoo eoRoodoo oo ool o]
et Prvmdt Pt P
Pt P
P
Pt Pt Jm P
Pt P P
P Gt Pt Pt Do —C)
v
Pt Gt ot Gt Pt P
e ke b
e B <
— - — oty ]
) ] ] e e
e = = = — =4 — R
—
OO0 OOOOOOOO»
P LY VN, P
Qi G (U S
Qi
<
Voo~ o SV,
(2]
<
VIS
NNV = O
V00~ OSSN 2O

SYMBOL TABLE
ABASE
176500
ACDWY
000000
ACDW2
000000
ACPUOP
000000
ADDWO
000000

05-NOV-80 12:32

O SN OO0
OO VNN O & 5~ NWNNNINON = = OO0
S
BNND L OO WO NING = =2 N2 NROWO (e
OB OPOOONIANSOWE
NSO ONOW ~ o

MACRO M1113

CZOLDFO DL11-W/1144 MFM SLU

177776
177776

013726

PWRVEC(C= 000024
RBUF
002636
RBUF 58= 176502
RCSR
002634

RCSRS8= 176500

RCV
RCVCNT
RCVDON
RDCHR =
RDLIN =
RESTTE
RESVEC=
RPSW
RSTRT
RTCPSW
RYCVT
RVECT

013512
002440
010244
106407

104410
014134
000010
002646
014370
002700
002676
0026«4

. ABS.

TOLER
TPSW
TPVEC
TRAPVE
TRTVEC=
TSTDEV
TSTDVM
ST

024612

WRAP
WRPSW
Wi

XCONT
XMIT
XMTCNT

TST16

000
00

o oh e

b ) b

SANPNONINOMNIN)
= S b = = =2 OO
NHOW Fo
~ WVINO B WO NSNS
—
WO N=N=2OWN=200~N W
Po SOV
ONOOO ~N

TST46
TSTS
TST6

$ATY3
$ATYS
$AUTOB

TST44
TST4S

XRET

$SAPTHD
SATY(
$ATY]

[elelelelelelelololelallelele]

TST43

004020

000000

VCTTBL
VECT
WACTV
WAIT
WDONE

1ST10
ST
TST12
TST13
TST14
TST15

1S117
1ST2
15720
1S121
T1ST122
15123
15124
TST25
TST26
18127
TST3
TST130
ST
TST32
15733
TST134
TST35
15736
TS137
TST4
TST40
TST41
T1ST42

104401
106402
104404

004760

$BASE
$BDADR
$BDDAT
$CHARC
$CKSWR
SCMTAG

SMAIL

$MAMS1

SMAMS?2
$MAMS3

$(M3
=
$CNTLG
SCNTLU
$CPUOP
$CRLF
$DEVCT
$DEVM
$DOAGN
$ENDAD
S$ENDCT
SENULL
SENV
SENVM
$EOP
$EOPCT
S$ERFLG

$MAMS4
$MBADR
SMFLG
SMNEW
$MSGAD
$MSGLG
$MSGTY
$MSWR
SMTYP1

SMTYP2
SMTYP3
SMTYP4

$NULL
SNWTST=
$OCNT
$OMODE
SOVER

000500

$PASS
SPASTM
$POWER
$PWRDN
$PWRMG
$PWRUP
$QUES
$RDCHR
$RDLIN
$RDSZ
SRTNAD
$SAVR6
$SCOPE
$SETUP
$STUP
$SVLAD
$SVPC
$SWR
$SWREG
$ SWRMK
$TESTN
$TKB
$TKS
$TN
$TPB
$TPFLG
$TPS
$TRAP
$TRAP2
$TRP
$TRPAD
$TSTM
$STSTNM
STTYIN
$TYPE
$STYPEC
STYPEX
$TYPOC
$STYPON
$TYPOS
SUNIT
SUNITM
SUSWR
$VECT

— wn

SERMAX
SERROR
$ERRP(
$ERRTB
SERRTY
SERTTL
SESCAP
SETABL
SETEND
SFATAL
$FFLG
$FILLC
SFILLS
$GDADR
$GDDAT
$GET4?2
$GTSWR
$HIBTS
$ICNT
$ILLUP
$INTAG
$ITEMB
SLF
SLFLG
SLPADR
$LPERR
$MADR1

$MADR?2
SMADR3
$MADR4

[olelolelelelelele]
Ot et OO b med e D
PG 0
i
2P 2E 2P ol
OLINY
— = NN
OHENNOO
NN
WONSSNOO
S

TCONS

TMP?
TMP3

005012
003006
003004
003012
003010
002650

014060
000060
002626
002620

TURBUF
TURCSR
TUTBUF
TUTCSR
TVECT
TYPE
TYPOC
TYPON
TYPOS
VCTADR

b =2 A NO NOO O

TIMER
TKVEC
TMP1

SAVEPS 002434
014100
SAVETE
002344
SAVEOD
SAVLOC 002346
SCOPE = 000004
SCPSW
002452
SECND
002616
SETADR 004100
003740
SHIFT
SIZE
003512
SRPSW
002450
STACK = 001100
START
003046
STKLMT= 177774
STPSW
002446
001040
SWR
000176
SWREG
sw0
= 000001
= 000001
SWw00
= 000002
Sw01
= 000004
sw02
sSw03
= 000010
= 000020
Swo4
SW05
= 000040
Swo6 = 000100
Swo07 = 000200
SW08 = 000400
SWw09 = 001000
sWw1
= 000002
swi0 = 002000
= 004000
SW11
swi2
= 010000
SWw13 = 020000
= 040000
Swi4
swi15
= 100000
= 000004
Sw2
sw3
= 000010
= 000020
sw4
Sws
= 000040
swé
= 000100
sw7
= 000200
sw8
= 000400
= 001000
Sw9
TA
(02610
TBITVE= 000014
TBUF
002642
[BUF58= 176506
TCLOCK
005536

1817

SEQUENCE 09

-t

002640

T(SR58= 176504

(V] WO
=2
NON) — N nNO
~ [e ¥ e NoleTal
Sle Yok oo

TCSR

=%000006
=%000007

PAGE 81-4

NOWVWVMS
OO
=2WVNSuvO =

R6
R7

SYMBOL TABLE

05-NOV-80 12:32

BN D e e B\ SV D d d D e P b
PN
O OCOOWVNO
= =000 =200
OO =N
= N—
o R NNV
P
o [« 3V, Yo W
S ale Yo Yol NTale Yo Yo LV,]

MACRO M1113

[elelolelelelelelelololelelslelels]
P leleleleleleleleolel
Jole Lol

CZOLDFO DLi1-W/1144 MFM SLU

SVECT2

$XTSTR
$SGETS

$OFILL
.SERRY
.$X

000520

CI0LDFO DLIT1-W/1144 MFM SLU

SYMBOL

TABLE

ERRORS DETECTED:

MACRO M11'3

05-NOV-80 12:3c

VIRTUAL MEMORY USED:

36008 WORDS

(

141

PAGES)

( 78 PAGES)
20346 WGRDS
DYNAMiC MEMORY:
00:06:14
TIME:
ELAPSED
CZOLDF ,BIN,CZDLDF .SEQ/=SP/NL:TOC=CZDLDF .MLB/ML,CIDLDF.P11

PAGE 81-5

SEQUENCE 110