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AH-8504F-MC

September 1979

96 pages

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Document:	CZDJAF0 DJ11 DJ11 LGC TEST SEP 1979 bw
Order Number:	AH-8504F-MC
Revision:	000
Pages:	96
Original Filename:	CZDJAF0__DJ11__DJ11_LGC_TEST__AH-8504F-MC__SEP_1979_gray.pdf

OCR Text

DJ11 LGC TEST

CZDJAFO

AH-8504F-MC

SEP 1979

EOEA0ENIN-USA
copvaichT 7279 MA
DE

FICHE1 OF1

DJTYT LOGIC TES!S
6=FEB=7G 15:41

MACYT1

30A(€1052)

.
C6~FER=79

15:47

1
PAGE

IDENTIFICATION

PRODUCT

CODE
:

AC=8502
-M(
F

PRODUCT

NAME
:

CZDJAFO DJ11

LGC

TEST

PROGRAM DATE
:

FEB

MAINTAINER:

DIAGNOSTIC ENGINEERING

THE

INFORMATION

1979

THIS

DOCUMENT

SUBJECT

CHANGE

WITHOUT
NOTICE
AND SHOULD NOT BE CONSTRUED AS A COMMITMENT
BY
DIGITAL
EQUIPMENT
CORPORATION.
DIGITAL
EQUIPMENT

CORPORATION

ASSUMES

RESPONSIBILITY FOR ANY ERRORS THAT

-MAY APPEAR IN THIS DOCUMENT.
THE SOF TWARE DESCRIBED

IN THIS DOCUMENT

IS FURNISHED UNDER A

LICENSE
AND MAY
ONLY BE USED OR COPIED IN ACCORDANCE W'TH
THE TERMS OF SUCH LICENSE.
DIGITAL EQUIPMENT CORPORATION ASSUMES NO RESPONSIBILITY
FOR
THE
USE OR RELIABILITY OF ITS SOF TWARE ON EQUIPMENT THAT ]S

NOT SUPPLIED BY DIGITAL.

(C)

1972,

1979 BY DIGITAL EQUIPMENT CORPCRATION

30A(1052)

P26-FEBR=79

15:47

PAGE
3
SEC 0002

27= (ZDJA<F=D DJ11
CONTENTS

LOGIC

TESTS

PAGE

.
.
.
.8
&
P
.8

—

e
s
e
&

ABSTRACT
REQUIREMENTS

EQUIPMENT
STORAGE

PREL IMINARY PROGRAMS

LOADING PROCEDURE
STARTING PROCEDURE
CONTROL SWITCH SETTINGS
STARTING ADDRESS

PROGRAM AND OPERATOR ACTION

OPERATING PROCEDURE
OFERATIONAL SWITCH SETTINGS
SUBROUTINF ABSTRA(CTS

PROGRAM AND OPERATOR ACTION

ERRORS
ERROR PRINTOUT
ERROR RECOVERY
ERROR COUNTER

RESTRICTIONS

WP —

NS S B S WNINUMNOND —

CONTENTS

NN
-

TABLE

VWO

MACY11

MISCELLANEOQUS
EXECUTION TIME
STACK POINTER
PASS COUNTER

POWER FAIL
PROGRAM DESCRIPTION

27-CZDJA=F=0

CZDJAF . P11

8¢
83
84
85
86
87
88
89
S0

DJ11

LOGIC

TESTS

26=FEB-79 15:41

MACY11

30A(1052)

27=- C2DJA=F=D DJ11

PAGE 3

ABSTRACT
THIS
PROGRAM
TESTS
THE
LOGIC
OF
THE
DJ11
ASYNCRONOUS
MULTIPLEXER
IN
MAINTENANCE
MODE.
IT CHECKS THAT ALL THE
CONTROL REGISTERS FUNCTION PROPERLY, THAT INTERRUPTS
OCCURE
AT
THE
RIGHT
LEVEL,
AND THAT DATA CAN BE TRANSMITTED AND
RECEIVED CORRECTLY.
THIS PROGRAM DOES
NOT
TEST
THAT
THE

INPUT
AND
OQUTPUT
LEAD
CONNECTIONS
ARE FUNCTIONAL.
(SEE
MAINDEC~11-DZDJB, PROGRAMS 2 AND
3
FOR ON-LINE
TESTING).

95
96
97
98
99

THE
PROGRAM
SHOU'.D
SWITCHES DOWN.

RUN FOR AT LEAST 2 PASSES WITH ALL

NOTE:
THE PROGRAM WILL AUTOSIZE THE SILO ALARM LEVEL OF THE
DJ11
AND
WILL RUN AT ANY ALARM LEVEL SET.
AND WILL RUN AT
ANY ALARM LEVEL

SET.

REQUIREMENTS

2ad

EQUIPMENT

PDP=11

STANDARD COMPUTER WITH CONSOLE TELETYPE

UP TO 16 DJ11 ASYNCRONOUS MULTIPLEXERS.

=O
OVON® AW

PAGE 4

LOGIC TESTS

DESCRIPTION

e e d e b d wd =D d b d
P = e
e e = o o
d

15:47

SF@ 0003

91
92
93

100
101
102
103
104
103
106
107
108

26=FEB=79

2.2

STORAGE
THIS PROGRAM USES ALL OF BK, EXCEPT ABS LOADER.

2.3

PREL IMINARY PROGRAMS

NONE
LOADING PROCEDURE

USE STANDARD PROCEDURE FOR ABS TAPES.

STARTING PROCEDURE
4.1

CONTROL SWITCH SETTINGS

SEE 5.1
4.2

(ALL DOWN FOR WORST CASE TESTING)

STARTING ADDRESS
THE PROGRAM SHOULD ALWAYS BE

STARTED

200.

MAY

77-(2DJA=F=0

CZDJAF P11

138

D.11

LOGIC

TESIS

26=FEB=79 15:41

MACYii

30A(1052)

26=FEB=79

15:47

1
PAGE 5
SEG 0004

RESTARTED AT

1000 AFTER ALL

PARAMETERS HAVE BEEN SELECTED.

141
142
143
144
145

LOGIC

TESTS

26~FEB=79 15:41

MACYT1

30A(1052)

26=FEB=79

22- CZDJA=F=D DJ11
DESCRIPTION
4.3

146

147

15:L7
LOGIC

PAGE €

TESTS

SEG 0005

PAGE 4

PROGRAM AND OPERATOR ACTION
N

13S

140

DJ11

w0
—

72=-CZDJA=F=Q
(ZDJAF P11

148

LOAD PROGRAM INTO MEMORY USING ABS LOADER.
LOAD ADDRESS 200,
IF HARDWARE SWITCH REGISTER IS AVAILABLE, SET SWITCHES
(SEE SEC.
5.1), ALL DOWN FOR WORST CASE, PRESS START.
IF SWITCH=LESS PROCESSOR SIMPLY PRESS START.
ENTER PARAMETERS (SEE SEC.
5.3) AS THEY ARE REQUESTED.
THE PROGRAM WILL LOOP AND BELL WILL RING ONCE EVERY PASS.

EOP'' IS ALSO PRINTED ON EACH PASS.

7) A MINIMUM OF

TWO PASSES SHOULD ALWAYS BE RUN.

OPERATING PROCEDURE
51

OPERATIONAL SWITCH SETTINGS

AT SA 200, ALL SWITCHES DOWN IS WORST
CASE
TESTING.
EACH
SUBTEST WILL BE LOOPED UPON UNTIL COMPLETION OF 16 PASSES OF
THAT SUBTEST.
THE BELL WILL RING UPON COMPLETION OF A
PASS
OF THE ENTIRE PROGRAM.
THE SWITCH SETTINGS ARE:

St
SW<16>
SW<13>
SW<12>
SW<11>
SW<10>

)
1
1
1
1
1
0
SW<09> = 1
=
=
=
=
=

...
.,...
.....
,....
.....
,....
.....
.....

HALT ON ERROR
SCOPE LOOP
INHIBIT PRINTOUT

PRINT SILO ALARM LEVEL (IN OCTAL)
INHIBIT ITERATIONS OF SUBTEST

BELL ON ERROR
BELL ON PASS COMPLETE
LOOP
ON ERROR

SW<08> = 1 ..... LOOP ON TEST IN Sw<7:0>
181
182

185

186
187
188

189

191
192
193

194

THIS PROGRAM HAS BEEN MODIFIED TO RUN ON A PROCESSOR WITH OR
WITHOUT A HARDWARE SWITCH REGISTER.
WHEN FIRST EXECUTED THE
PROGRAM TESTS THE EXISTENCE OF A HARDWARE
SWITCH REGISTER.
IF NOT FOUND A SOFTWARE SWITCH REGISTER LOCATION (SWREG=LOC.

176)

1S DEFAULTED TO.

IF THIS IS THE CASE,

UPON

EXECUTION

THE CONTENTS OF THE SWREG ARE DUMPED IN OCTAL ON THE CONSOLE
TTY AND ANY CHANGES ARE REQUESTED

(1.E.)

SWR=XXXXXX NEW=

POSSIBLE RESPONSES ARE:

6 DIGITS 0-7

IF NC CHANGES ARE TQ BE MADE.

TO REPRESENT IN

RES;STER
<CR>.

VALUE;

OCTAL

THE

NEW

SWITCH

LAST DIGIT FOLLOWED BY

TO ALLOW REENTERING VALUE

ERROR

27=C7DJA=F=0
CZDAF P11

198§

DJ11 LOGIC TESTS
26=FEB=79 15:41

MACY11

30A(1052)

P26=FEB=79

15:47

PAGE

SEG 0056

COMMITTED KEYING IN SWREG VAL UE.

Z7=CZDIA=F=Q0

CZDJAF P11

196

197

DJ11

LOGIC

c6=FEB=75

T EETS

15:41

MACY17

30A(1052)

27=- CZDJA=F=D DJ11

DESCRIPTION

D
D wd
d
b
e
b

NV SN -

NS LAS LN TANTAN
LN 1,8

224
225
226
227
228
229
<30
231

234

PAGE 8

LOGIC

TESTS

PAGE 5

BUILT INTO THE PROGRAM IS THE ABILITY 1O DYNAMICALLY
CHANGE
THE CONTENTS OF SWREG DURING PROGRAM EXECUTION.
BY STRIKING
“G (CNTL G) ON CONSOLE TTY THE OPERATOR SETS A REQUEST
FLAG
TO
CHANGE
THE CONTENTS OF SWREG, WHICH IS PROCESSED IN KEY
AREAS OF THE PROGRAM CODE (IE) ERROR ROUTINES,
AFTER HALTS
END OF PASS, AND OTHER APPLICABLE AREAS.

5.2

g
SUBROUTINE ABSTRALTS

. W

SCOPE
THIS SUBROUTINE CALL (VIA
A
TRAP
INSTRUCTION)
IS
PLACED
BETWEEN EACH SUBTEST IN THE INSTRUCTION SECTION.
IT RECORDS
THE STARTING ADDRESS OF EACH SUBTEST AS IT IS BEING
ENTERED
IN
LOCATION ‘1AD''.
IF
A
SCOPE
LOOP
IS REQUESTED, THE
CURRENT SUBTEST WILL BE LOOPED UPON.
SW<11> GN A 1 INHIBITS
ITERATION OF SUBTESTS.
THE CONTENTS OF ‘1AD'* MAY BE USED TC
DETERMINE THE LAST SUBTEST SUCCESSFULLY COMPLETED.

218
g;g

221
gg%

15:47

SEQ 0007

200
201
202
203
204
582

207
208

2¢6-FEB=-79

5.2.2

HLT
THIS ROUTINE (CALLED BY AN EMT INSTRUCTION)
PRINTS OUT AN
ERROR MESSAGE
(SEE
6.1).
IF SW<9> IS ON A 1 AND A HLT IS
EXECUTED,
THE
SUBTEST WILL BE LOOPED UPON
UNTIL
16

CONSECUTIVE GOOD PASSES ARE COMPLETED.
TO INHIBIT TYPEQUTS,
PUT SW<13> ON A 1.
TO RING THE BELL ON AN ERROR, PUT Sw<10>
ON A 1.

5.2.4

ALMCK
IN THE NORMAL OPERATION

235

CHARACTER

236

"DONE''

KEAD

THE

°‘DONE'®

BiT

SET

INTO THE FI/FO BUFFER (SILO).

CONDITION CAN BE DELAYED TC CAUSE DONE ON THE

EACH

BUT THIS

237

OR 17 _CHARACTER.

239
240

FOR
THIS ‘'SILO ALARM LEVEL'®' AND IF SW12 IS SET (1) IT Wit
PRINT QUT THE LEVEL AT WHICH EACH DJ11 WILL SET "DONE.'" THE

242

THAT THE MAXIMUM NUMBER OF CHARACTERS TO BE TRANSFERED iS

238

(W1,W2,W3) ON THE M7285 CONTROL BOARD.

241

SUBROUTINE

243

244
245
246
247
248
249
250
251

THIS IS DONE BY CUTTING ONE OF THE JUMPERS

MULTIPLE

ALSO

THE

ADJUSTS
SILO

THE

PROGRAM

TESTS

CHARACTER COUNTERS TO ENSURE

ALARM LEVEL.

THIS ENSURES THAT ALL

DATA WILL BE READ OUT OF THE SILO.
DONE WILL NOT SET IF THE
NUMBER OF
CHARACTERS
IN THE FI/FO BUFFER IS LESS THAN THE
SILO ALARM LEVEL.
(NOTE CHARACTER PRESENT IS
SET ON EACH
CHARACTER
IN THE BUFFER,
REGARDLESS GOF
THE
SILO ALARM
LEVEL.)

Dok e

TRAPCATCHER

Jl=C2DJA=F=0

¢ 2DJAF

25¢
253

P11

DJ11

LOGIC

TESTS

c6=FER=79 15:41

MACY11

30A(1052)

26-=FEB=79

15:47

PAGE

A ‘42" = "HALT'' SEQUENCE

IS REPEATED FROM 0 = 56 10O

DETECT

72=CZDJA=F=0
CZDJAF .P11

254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270

DJ11

LOGIC

TESTS

26=FEB=79 15:41

MACY11

30A(1052)

26-FEB-79

15:47

1
PAGE 10

SEG 0009
2Z= CZDJA=F=D DJ11
DESCRIPTION

LOGIC

TESTS

PAGE 6

ANY
UNEXPECTED
TRAPS
AND
A
''.+2'" =
‘'[OT""
SEQUENCE IS
REPEATED FROM 60 = 776 TO DETECT ANY UNEXPECTED
INTERRUPTS.
THUS
ANY UNEXPECTED TRAPS WILL HALT AT THE VECTOR + 2.
ANY
H?E¥EE£I§D INTERRUPTS WILL
RESULT
IN
AN
ERROR
‘HLT"'
IN

5.3

PROGRAM AND OPERATOR ACTION

THE

FOLLOWING REQUESTS ARE

MADE

THE

OPERATOR

THE

BEGINNING OF THE PROGRAM.
A DETAILED DESCRIPTION OF WHAT IS
REQUIRED FOR EACH PARAMETER IS GIVEN BELLOW.

271
272

273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289

"FIRST DJ11 ADDRESS:

‘'

THE CSR ADDRESS OF THE
FIRST
DJ1I
YOU
WISH
T0O
TEST.
MUST
“BE
BETWEEN 160000(8) AND 177777(8).
THE DEFAULT, (CARRIAGE
RETURN)
IS
TO
160010(8).

"P(REVIOUS)'*
SELECTED.

2) 'VECTOR ADDRESS:

~ SELECTS

THE

ADDRESS

PREVIOUSLY

°*

THE RECEIVER INTERRUPT VECTOR ADDRESS OF

PREVIOUSLY SELECTED.

*ND. OF DJ11'S:

THE NUMBER OF DJ11 UNITS YOU WISH TO TEST

;

THE NUMBER OF UNITS PREVIOUSLY SELECTED.
*‘STANDARD CONFIGURATION?
*°

"Y(ES)''
OR DEFAULT
(CARRIAGE RETURN)
SELECTS 8
LEVEL CODE, NO PARITY.
‘N(0)'' CAUSES REQUESTS FOR
CODE LEVEL AND PARITY ON ALL REQUESTED LINES
IN
GROUPS OF FOUR.
'P(REVIOUS)" SELECTS THE CODE

LEVELS AND PARITIES PREVIOUSLY SELECTED.
''CHAR LENGTH:
‘'

THE CODE LEVEL FOR THE LINE GROUP SCECIFIED.

ONE

TIME.
MUST BE BETWEEN 1
AND 16.
THE DEFAULT
(CARRIAGE RETURN) IS TO 1.
"P(REVIOUS)'* SELECTS

6, 7, OR 8.

'S T0'8 LEVEL CODE.
'PARITY (NO, ODD, EVEN):

ERROR PRINTOUT
THE FORMAT

FOR

THE

LINE

THE DEFAULT (CARRIAGE RETURN)

ERRORS

IS AS FOLLOWS:

MUST

THE DEFAULT (CARRIAGE RETURN)

THE TYPE OF PARITY SELECTED

SPECIFIED.

6.1

THE FIRST

DJ11 YOU WISH TO TEST.
MUST BE BETWEEN 300(8) AND
1000(8).
THE DEFAULT
(CARRIAGE RETURN)
IS TO
300(8).
"P(REVIOUS)""
SELECTS
THE
ADDRESS

GROUP

1S TG NO

J{=CZDJA=F=0
CZDJAF P11
310

311

DJ11 LOSIC TESTS
25=FEB=7G 15:41

MACY1T

30A(1052)

26-FEB=79

ADR

DJSDR

15:47

(R1)

1
PAGE

(R2)

(R3)

SEG 0010

(R4)

DJ11 LOGIC TESTS
26=FEB=79 15:41

MACY11

30A(1052)

26=FEB=79

22- CIDJA-F=D DJ11

DESCRIPTION

15:47

1
PAGE

LOGIC TESTS

SEQ 0011

PAGE 7

—

N NN

ADDRESS OF ERROR HLT
CSR_ADDRESS OF DJ11 UNDER TEST
CONTENTS OF GENERAL REGISTER
'WN''.
FROM NONE
TO
FOUR
OF THESE MAY BE TYFED DEPENCING ON THE NUMBER
FOLLOWING THE HLT;
E.G.,
HLT+3
WOULD
TYPE
(R1)

THRU (R3);

NN LN

(N N N ON N N N N N AN Y

nnun

ADR
DJADR
(RN)

N N

:
WHERE

b —a o

)

DLV
ST ST
NS,
SNFRRURALE
LS by
~ (e QWL IPVLN) =2 OV NN
S Ny

77=CIDJA=F=0
(ZDJAF P11

HLT (BY [TSELF) WOULD STUP AFTER TYPING

ADR AND DJADR.

TO FIND THE FAILING TEST, LOOK
AT
THE
(ISTING
ABOVE
THE
ADDRESS
TYPED.
IN MOST
CASES THE COMMENT BESIDE THE HLT
TELLS WHAT WAS BEING CHECKED AND WHAT WAS EXPECTED.

LIST

ALSO, A

THE PROBABLE FAILING LOGIC IS GIVEN IN THE COMMENTS

THE BEGINNING OF

THE

TEST.

ERROR RECOVERY
RESTART AT 20C GR 1000.

6.3

ERRCR COUNTER
AN ERROR COUNT IS KEPT IN "ERRORS'® .
IT CAN BE CLEARED FROM
THE
CONSCLE,
BY RESTARTING AT
200,
OR BY RELOADING THE
PROCRAM.

RESTRICTIONS

IF MORE THAN ONE DJ11
IS
TESTED AT A TIME,
THE
DEVICE
ADDRESSES AND THE VECTOR ADDRESSES MUST ALL BE CONTIGUOUS.
IF THIS PROGRAM IS RUN WITH A MONITOR. I.E.

THE

DEVICE

CONVENTION.

ADDRESSES

MUST

THE

ACT11

FLOATING

DDP,

ADDRESS

DJ11'S WILL BE FIRST, STARTING AT 160010,.

MISCELLANEOUS

8.1

EXECUTION TIME
DUE TO THE VERIOUS BAUD RATES AVAILABLE AND THE
7) '' WHAT ARE THE BR PRIORITIES? FOR:''

" DEVICE
"' DEVICE_

1=
2="'

ABILITY

EiC.

THIS WILL GO TO THE NUMBER OF DEVICES SPECIFIED

IN QUESTION 3 ABOVE.PRIORITIES ALLOWED ARE O THROUGH 7.
CHECK UP TO 16 DJ11'S AT ONCE, THE EXECUTION TIME CAN BE
ANYWHERE FROM 15 SECONDS TO THREE AND

HALF

HOURS.

THE

27=C2DJA=F=0

(ZDJAF .P1

DJ11

LOGIC

TESTS

26-FEB=79 15:41

368
369

370
371

372
373

374

MACY11

30A(1052)

26-FEB=79

M1
PAGE

SEG 0012
FOLLOWING

THE SAME

15:47

TYPICAL

TIMES ARE

FOR ONE

DJ11

WITH ALL

LINES AT

SPEED, 8 LEVEL CODE, 2 STOP BITS, AND NO PARITY

A
PDP=11/20
WITHOUT
TRACE TRAPPING.
MULTIPLY THESE TIMES BY THE NUMBER
OF

TEST.

BAUD RUN TIME

FOR MULTIPLE DJ11°'S,
UNI/S
SELECTED
FOR

27=C7DJA=F=0
CZDJAF .P11

375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399

DJ11

LOGIC TESTS

26=FEB=79 15:41

MACY11

30A(1052)

26~FEB=79

15:47

1
PAGE

SEQ 001%

22- CZDJA=F=D DJ11
DESCRIPTION

8.c

LOGIC TESTS

PAGE 8

STACK POINTER
STACK IS INITALLY SET TO 1200

8.3

400

PASS COUNT
A 32 BIT (2 WORDS) PASS COUNT IS KEPT IN PCNT.
IT
CAN BE
CLEARED
FROM
THE
CONSOLE,
BY RESTARTING AT 200, OR BY

401

402
403

RELOADING THE PROGRAM.

8.4

POWER FAIL
EACH TEST CAN BE POWER FAILED WITH NO ERRORS.
TO USE, START
THE
TEST AS USUAL AND POWER DOWN THEN UP AT ANY TIME.
THE
ROUTINE SHOULD TYPE ‘POWER'' AND RESTART THE PROGRAM WITH NO
OTHER ERROR TYPEOUTS.

PROGRAM DESCRIPTION
THIS PROGRAM TESTS THE LOGIC OF UP TO 16
DJ11
ASYNCHRONOUS
DATA MULTIPLEXERS
IN MAINTENANCE MODE.
IT CHECKS THAT ALL
THE CONTROL REGISTERS
FUNCTION PROPERLY,
THAT
INTERRUPTS

OCCURE

THE

RIGHT

PRIORITY LEVEL. AND THAT DATA CAN BE

TRANSMITTED AND RECEIVED CORRECTLY.

423
424

THE

PROGRAM

HAS

MANY

LOOPED

UPON

SUBTESTS (THE CODE BETWEEN 2 SCOPE STATEMENTS) WHICH ARE RUN
16 TIMES BEFORE CONTINUING TO THE NEXT.
SW<11> ON A 1
CAUSES EACH SUBTEST
TO BE
RUN ONLY ONCE.
SW<9> ON A 1
ENABLES LOOP ON ERROR. ~ THE ADDRESS
'‘ICNT'"
CONTAINS
THE
ITERATION COUNT IN THE LEFT BYTE AND THE TEST NUMBER IN THE
RIGHT BYTE.
ALL THE SUBTESTS SHOULD BE RUN SEQUENTIALLY BY
STARTING AT 200 NOT BY STARTING AT THE BEGINNING OF THE
SUBTEST.
70 LOOP ON A PARTICULAR SUBTEST,
PUT
THE
TEST
NUMBER
“(SEE
LISTiNG)
IN
THE
RIGHT BYTE OF
THE SWITCH
REGISTER AND SW<8> ON A 1.

UNTIL

THIS TEST WILL

SW<8> IS PUT ON A 0 OR THE RIGHT BYTE IS CHANGED.

27=C72DJA=F=0

(ZDJAF P11

43
W3

DJI1T

LOGIC

26~FER=79

TESTS

MACYT1

30A(1052)

26=FER=79

15:47

PAGE

15:41

SEQ

THE
IF

TEST
MORE

IS NON-EX]STANT,
THAN
ONE
DJ11

THE PROGRAM WIiLL BE RUN AS
USUAL.
IS SELECTED, ALL THE SUBTFSTS ARE

0014

Z7=CZDJA=F=0Q
CZDJAF .P1T

DJ11 LOGIC TESTS
26-FEB=79 15:41

433

MACYT1

30A(1052)

DESCRIPTION

437

EOP

439

642
443
444
1.25

LOGIC TESTS

PAGE 9

THE BELL WILL NOT RING AND

PRINT, UNTIL A PASS HAS BEEN MADE ON EACH OF

SELECTED FOR TEST.

LTITLE 2Z-CZDJA-F=0
.ENABLE ABS

DJ11

LOGIC

TESTS

.ENABLE AMA

446

:
100000

SW15=

020C00

SWw13=

040000

SWITCH

USE

100000

;HALT ON ERROR

20000

;INHIBIT ERROR TYPEOUTS

SW14=

40000

;LOOP ON TEST

453
454
455

010010
004000
002000

Swi2=
SWil=
Sw10=

10000
4000
2000

;PRINT SILO ALARM LEVEL
;INHIBIT ITERATIONS
;0 - BELL ON PASS COMPLETE

457

001000

SW9=

1000

;LOOP ON ERROR

456

458

228

000400

Sw8=

.REM!

:1 = BELL ON ERROR

400

;LOOP ON TEST IN SW<7:0>

5'.2}

DJ11 REGISTER BIT ASSIGNMENTS:

463

CONTROL STATUS REGISTER (CSR) XXXXXO0

464,
465

466

BITO
BIT1

RECEIVER ENABLE (READ/WRITE)

HALF DUPLEX SELECT (READ/WRITE)

BIT2

MAINTENANCE (READ/WRITE)

468
469

BIT4
BITS

CLEAR MOS FLAG (READ ONLY)
NOT USED

472

BIT8

467

470
471

473

474
475
476

BIT3

RECEIVER INTERUPT ENABLE (READ/WRITE)
DONE (READ ONLY)
.

BITY

NOT USED

BIT10
BIT11
BIT12

BIT13

2;3

BIT15

22‘1?

483

CLEAR MOS (WRITE ONLY)

BITé
BIT7

477
478

BIT14

MASTER TRANSMITTER SCAN ENABLE (READ/WRITE)

READ/WRITE BREAK REGISTER (READ/WRITE)
NOT USED
STATUS ENABLE (READ/WRITE)

F1/FO OVERRUN (READ ONLY)

MASTER TRANSMITTER INTERUPT ENABLE (READ/WRITE)
TRANSMITTER READY (READ ONLY)

RECEIVER BUFFER REGISTER (RBUF) XXXXX2 (READ ONLY)

BITO=7

RECEIVED CHARACTER

BIT12

PARITY ERROR

BIT14

UART OVERRUN ERROR

484

BIT8=11 LINE NUMBER

486

BIT13

485

487

488

THE DJ11°S

447
223

452

PAGE

PERFORMED ON ONE UNIT AT A TIME.

438

450

15:47

SEG 0015

72~ CZDJA=F=D DJ11

434

451

26-FEB=79

BIT15S

FRAMING ERROR

(HARACTER PRESENT

ZZ=CZDJA=F=0Q
P1
CZCJ.AF

DJ11

LOGIC

TESTS

26=FEB=-79 15:41

489
490
491
492
493
494
495
496
497
498
499

MACY1T1

30A(1052)

26~FEB=79

DJ11

15:47

SPECIFICATIONS

TRANSMITTER CONTROL

PAGE

SEQ 0016
(TCR)

XXXXX4

(READ/WRITE)

BITO=15 STOP THE SCANNER ON CORRESPONDING L INE
TRANSMITTER BUFFER

(TBUF)

XXXXX6

BITO=-7
TRANSMITTED (CHARACTER (WRITE ONLY)
BIT8=11 LINE NUMBER (READ ONLY)
BREAK CONTROL STATUS REGISTER

500

(BCSR)

XXXXX4

(BIT10 OF

BITO=15 TRNSMIT A BREAK ON CORRESPONDING L INE'
104400
104000

000004
177776
000000
000001
000002
000003
000004
000005
000005
000006
000007
000007
000001
000002
000004
000010
000020
000040
000100
000200
000400
001000

002000
004000
010000
020000
040000
100000

000340
000000
000020
001200

SCOPE=

HLT=
TYPE=

PS=
RO=
R1=
R2=
R3=

TRAP

EMT
10T

177776
%0
%1
%2
%3

R4=

TTY=

RS=

SP=
PC=

BELL=

BITO=
BIT1=
BIT2=
BIT3=
BIT4=

BITS5=

%6
X7
7

1
2
4
10
20

BITé=
100
BIT7=
200
BIT8=
400
BIT9=
1000
BIT10=
2000
BIT11=
4000
BIT12=
10000
BIT13=
20000
BIT14=
40000
BIT15= 10
LEVEL7 = 340
OPEN = 0
DJMXNO=16.
STACK
=1200

sMAX

ALLOWED NUMBER OF DJ11°'S

(SR SET)

(READ/WRITE)

27=CZ0.A<F=0
CZDJAF P

537
538

DJ11 LOGIC TESTS
26=FEB=79 15:41

MACY11

30A(1052)

000000

000000
000000

542
22‘5.

000046

000046
014450

546
547
gzg

000174
000176

000174
000000
(00000

. =
174
DISPREG:0
SWREG:
0

539
229

0000CO

542

550
551

55¢
ggz

000200

0071000

555

000200

000137

001000
000137

001402

002344

001200

229

. =
. =
. =

561

SEQ@ 0017

: TRAP CATCHER IN LOCATIONS 0 THRU 77¢
+LOCATIONS O AND 2 CONTAIN “HALT'" INSTRUCTIONS

46
$ENDAD

200

JMP

1000
JMP

BEGIN

QABR

;200 ALWAYS IS THE STARTING ADDRESS

;RESTART ADDRESS

1200

ADDRESS TABLES

;"'LENGTH'' TABLE

228

IS SET SO THE FIRST FOUR BYTES (2 WORDS) CONTAIN

THE CHARACTER LENGTH FOR THE 4 LINE GROUPS OF

:"PARITY"' TABLE HAS 4 WORDS, ONE FOR EACH LINE GROUP.

562
563
564
222

LENGTH:
PARITY:
PARIT2:
PARIT3:
PARIT4:
1CNT:
ERRORS:
PCNT:

.BLKB 100
0O
0
O
O
9
0
0,0

sTABLE OF CHAR. LENGTHS (MASK)
;ODD PARITY FLAGS FOR LINES 0-3
;0DD PARITY FLAGS FOR LINES 4-7
s0ODD PARITY FLAGS FOR LINES 10-13
;0DD PARITY FLAGS FOR LINES 14-17
s ITERATION COUNT-LH, TEST NO.-RH
sERROR COUNT REGISTER
sPASS COUNT REGISTER

CSR:
RBUF:
TCR:
BCSR:
TBUF:

160010
160012

-CONTROL STATUS REGISTER(DJ UNDER TEST)
sRECEIVER BUFFER REGISTER(DJ UNDER TEST)
s TRANSMITTER CONTROL REGISTER(DJ UNDER TEST)
sBREAX STATUS REGISTER(DJ UNDER TEST)
s TRANSMITTER BUFFER REGISTER(DJ UNDER TEST)

000100
000000
000000
000000
000000
00000C
000000
002000

576
577
578
579
gg?

001220
001322
001324
001324
001326

160010
160012
160014
160016

582
583

001330
001332

00030C
001302

RCVVEC:
RCVLVL:
XMTVEC:
XMTLVL:

DEVADR:
VECADR:
UNITS:
TIMER:

584
ggg

001334
001336

000304
000306

587
588
589
590

001340
001342
001344
001346

160010
000300
000001
000000
000000
000000

001350
001352

THE FIRST WORD CONTAINS

THE ODD PARITY FLAGS FOR LINES 0-3 OF ALL DJ11°S. THE NEXT WORD
HAS PARITY FLAGS FOR LINES 4=7, ETC, EACH BIT IN THE WORD REPRESENTS
EACH DJ11. BIT O IN EACH OF THE FOUR WORDS IS FOR DJ/0 TO BRIT
15 FOR DJ/15.

001200
001300
001302
001304
001306
001310
001312
001314

000000

THE FIRST DJ11, ETC.

:
:
.
:

567
568
569
570
571
572
573
‘SS;IS.

591
592

0
0,0

:LOCATIONS 4 THRU S56_CONTAIN ''.+2"" AND "HALT'' IN EVERY VECTOR
:LOCATIONS 60 THRU 776 CONTAIN ''.+2'" AND "‘IOT'’" IN EVERY VECTOR

558

26~FEB=79
15:47
PAGE
DJ11 SPECIFICATIONS

160014
160016
300
302

304
306

160010
300
1
O
ALMFLG: 0
TIMERA: 0

JRECEIVER INTERUPT VECTOR ADDRESS(DJ UNDER TEST)

i
sTRANSMITTER INTERUPT VECTOR ADDRESS(DJ UNDER TEST)

sFIRST DEVICE ADDRESS(SELECTED)
sFIRST VECTOR ADDRESS(SELECTED)
sNUMBER OF UNITS TO BE TESTED
sUSED TO SAVE RELATIVE TIMES
sTEST FLAG FOR SILO ALARM LEVEL
sTIME COUNTERS

Z{=({ZDJA=F=0
CZDJAF .P1T

563
594
595
596
597
598
549

600
501
602
603
604
605
606
607
608
609

DJ11

LOGIC

TESTS

26=FEB-79 15:41

MACYT1

30A(1052)

26=FEB=79

000000
000000
000000

001362
001364
001366
001370
001372

000000
000000
000000
N00300

DJUUT:
DJLEN:
DJPAR:
DEFADR:
DEFVEC:

001374
001376

177570
177570

177570
SWR:
1775
AY:
70
DISPL

001400

177777

FTIME:

160010

:
(OUNT
SUM:

2
PAGE

TABLES AND ''SCRAT(H PAD"'

001354
001356
001360

TIMERR:

15:47

0
0
0

JSUMATION OF

0
0
0
160010

;CHAR MASK TABLE POINTER
JUNIT FLAG (FOR ODD PARITY FLAG?
;DEFAULT FIRST DEVICE ADDRESS

300

; CHAR COUNTER

ALARM LEVEL

(HAR'S

JUNIT NUMBER OF DJ11 UNDER TEST

;DEFAULT FIRST VECTOR APDRESS

Z2-C2DJA=F=0
CZDJAF .P1T

610
611
612

613
614
615
616
617
618
619
620
621
622
623
624

625

626

627
628
€29

630
631
&322
633
634
635
636
537
638
639
640

641
642

643

644

645
646
647
648
649
650
651
652
653
654
655
656
657

001402
001406
001412
001416
001422
001426
001432
001436
001442
001446
001452
001456
001462
001466
001472
001476
001502

001504

001510

001514
001520
CN1524

001530
001534
001536

001540
001544
001546
001554
001562
001576

001572
C01576
001602
001604
001606
001612
001614
001622
001630
001636
001640
01646
001650
001654

007660
001664
C01666
001670
001674
001676
001792

DJ11

LOGIC

TESTS

26=FEB=79 15:41
012706
004737
612700
012726
012720
012720
12720

012720
012720
012720
012720
005037
005037
005037
005037
005737
001404
004737
000137
000004
000004
000004
004537
001340
001366
005737
001003
013737
042737
022737
101351

000004
004537
001342
001372
005737
601003

012737
042737

022737
003355
022737
003751
000004
737

001200
017524
000020
016364
000340
016224
000340
015254
000340
015112
000340
001312
001314
001216
001350
000042

BEGIN:

160000

MOV

001342

001342
001342
001342

001000

001342

015644

001434
122701
001443

000120

000071

(RO)+

;EMT VECTOR (30)

(RO)+

;TRAP VECTOR

(RO)+

TYPE,
TYPE.
TYPE.

MTITLE
RETURN

BIC

#TRAPS,

Y 7%,

MSGADR

RS,
DEVADR
GETADR

AUTO

READIN

DEVADR

(24)

(34)

;CLEAR ERROR COUNTER
:CLEAR PASS COUNTER

:BRANCH IF NONE
:GO TO SUBROUTINE TO "MAP'* DJ11 ON THE SYS
*SKIP OPERATOR ACTION

:TYPE "FIRST DJi1

ADDRESS'®

:READ INPUT FROM TTY AND SAVE
> IN DEVADR
*BRANCH [F BAD INPUT

#7 .DEVADR

TYPE,

MSGVEC

.WORD
BNE

VECADR
GETVEC

MOV

;POWER FAIL VECTOR

DEFADR, DEVADR

0160000 DEVADR

JSR

(20)

:CHECK FCR ACT11 OR DDP PRESENT

cMP

GETADR

RS,

READIN

vgcnbk
1300

;TYPE *VECTOR ADDRESS:"*

:READ INPUT FROM TTY AND SAVE
s IN VECADR
*BRANCH IF BAD INPUT

SCHECK FOR CR
VECADR

:SET TO FIRST FLOATING VECTOR

CMP

:360

10
VECADR :CHECK FOR LOW LIMIT

CMP
BLE

#1000,
Gervec

VECADR

BIC

BGT

GE TNUM:

#EMTS,

#340,

GETADR
PC,

éfi{

000300
000007
000300

:10T VECTOR

BEQ
JSR
JMP

MOV

;SET UP STACK POINTER
:CHECK FOR SWITCH REGISTER

#10TRAP, (ROY+
#340,
(RO)+
#PDOWNS, (RO)+

(RO)+

BHI

GETVEC:

SP
SUSWRR

#340,
ERRORS
PCNT
PCNT+2
ALMFLG

SEC 0016

MOV
CLR
CLR
CLR
CLR

BNE
1 $:

#20 ,RO

PAGE

(RO)+

JSR
.WORD
BNE

001340
0G1340
001340

#STACK,
Pe

#340,

GETADR:

15:47

MOV

016562
015476

016606

MOV
JSR

MOV
MOV
MOV

001340
00.370
000007

26=FEB=79
SETUP AREA

MOV

017013
016524
016532
015476

015772

120127
101362

30A(1052)

017304
002344

012702
112201

MACYT1

TYPE,

GETVEC

MSGNUM

VECADR

:CLEAR TO MODULO

;CHECK FOR UPPER LIMIT
:TYPE'NUMBER OR UNITS:"*

JSR
PC ,READS
*READ INPUT FROM THE TTY
; CHECK STRING FOR VALID DiGITS,TERMINATOR,AND 'P*
MoV
#INPUT ,R2
:POINTS TO INPUT STRING
MOVB
(R2)+,R1
:LOAD 1ST CHAR
BEQ
1%
*BRANCH IF IMMEDIATE TERMNATOR
(MPB
#'P,R1
*CHECK FOR A P
BEQ
CONF;G
CONHGURE MODE IF SO
(MPB
R1,471
IMUST BE
A VALID ASCII NUMBER
BHI
GE TNUM
:ELSE RETRY

Zl-CZDJA=F=0
CZDJAF .P11

001704

LOGIC

TESTS

26=FEB=79 15:41
162701

001710

003757

001712
001714
001716
001720
001722
001726

105722

105712

001353

000001

001764
001770
001772
001776

020327

000020

002042
002044
002046
002052
002054
002060
002066
002070
002074
002102
002104
002106
002110
002114
002120
002124

002130
002132
002136

012737

000004
004737
122737
001002
00C137
012700

012701
005021

005300
001375
105737

001002
000137

122737
001002

000137
122737

001340
005000

005001
012702
012703
012704
000004
010105
004737
000004

BNE

000071

010146
006301
006301
006301
06316
062601
0603201
000402
012701

010137

26=FEB=79
SETUP AREA

TSTB

001740
001742
001744
001746
001750
001752
001754
001756
001760

101327

30A(1052)

CMPB

BHI
MOVB
SUB
BM]

000060

18:
:R1

HAS

CONFIG:

015772
AAA:

1$:

0715772

+STRIP ASCI1

=(R2) 471
GE TNUM
(R2),R3
#60,R3
GE TNUM

CODE

; SHOULDN'T BE ZERO OR NEG

THRU 9 = CHECK REST OF

STRING

;2ND CHAR A TERMINATOR?
;YES = R1 HAS THE FINAL # OF UNITS

;NO = NXT CHAR MUST BE

THE

TERMINATOR

;ELSE RETRY,
;CHECK 2ND CHAR FOR A VALID NUMBER

JMAKE

015772

SSS:

002344
000116

015772

DDD:

001200
001300
TYPLIN:

R1,=(SP)

B8R

IT MORE ACCESSIBLE

;SAVE IT FOR LATER
JMULT HI ORDER BY 8

JMULTIPLY
[T BY 2
SRESULT IS (HI ORD)~10.

(5P)+,R1
R3,R1

;NOW ADD IN THE LOW ORDER

MOV
#1.R1
;LOAD DEFAUL7T VALUE HERE
THE CONVERTED VALUE - COMPARE AGAINST MAX ALLOWED.

CMP

BHI

R1,4D.'"MXNO

;100 BIG?

GE TNU“

:YES = RETRY.

MOV

#100,Ds0uT

J'PRIME'" UNIT UNDER TEST NUMRER

TYPE,
JSR
MPB
BNE
JMP

MSGCON
PC,
#'P,
AAA
QABR

R1,UNIS

MOV

#4,

(LR

(R1)+

MOV

READS

INPUT

#LENGTH,R1

DEC
BNE

RO
1%

BNE
JMP
C(MPB
BNE
JMP
CMPB
BNE
CLR
CLR
MOV

$SS
QABR
#131,
INPUT
DDD
QABR
#1116,
INPUT
CONFIG
RO
R1
#LENGTH,R2

ISTB

002344
000131

016052
016676

SEG 0020

GE TNUM

R1
R1
R1
(SP)

MOV

001362

002344
000044
0012C0

000001
016665

2
PAGE 21

(R2)

ASL
ASL
ASL
ASL

ADD
ADD

016631
015644
000120

;STRIP ASCII CODE
s SHOULDN'T BE NEGATIVE
;BOTH LOW AND HIGH ORDER DIGITS ARE OK = (ONVERT DECIMAL VALUE.

MOV

001344
000100

15:47

#60,R1
SUR
BLE
GE TRILM
s1ST CHAR IS A VALID DIGIT,
TSTBR
(R2)+
BEO
3%

001423

001736

002004
002010
002014
002022
002024
002030
002034
002040

MACY11

000060

124227
101350
111203
162703
10G744

001730
001732

721

DJ11

INPUT

MOV

#PARITY ,R3

TYPE,

MSGLIN

MOV

MOV
JSR

TYPE,

#1,R4

R1,TTY
PC.PRINTS

MSGDAS

sVALUE OK -~ STORE RESULT

;TYPE "‘STANDARD CONFIG?'*

JREAD INPUT FROM iTY
;CHECK FOR ‘P’
: GO THRU IF NOT PREVIOUS

; BRANCH IF PREVIOUS
;SET UP COUNTER
;POINT TO CHAR LEN TABLE
;PUT CHAR MASK FOR 8 IN (CHAR TABLE
;AND CLR PARITY TABLE
sCOUNT DOWN
;BRANCH IF NOT DONE
JCHECK FOR CR
; GO THRU IF NOT DEFAULT
. BRANCH IF DEFAULT
sCHECK FOR 'Y
; GO THRU IF NOT DEFAULT
; BRANCH IF DEFAULT
;CHECK FOR 'N''
sBRANCH IF ILLEGAL ENTRY
+CLR UNIT COUNTER
+sCLR LINE COUNTER
;SET UP POINTER TO CHAR MASK TABLE
JSET UP POINTER TO PARITY TABLE

:SET UP MARKER
sTYPE 'LINES **

sTYPE R1

IN OCTAL

sAND SUPRESS LEADING ZERQ'S
JTYPE A DASH (=)

002156
002162
728 002166
729 002172
730 002176
731
105737
002200
732
002204 001364
733
162737
002206
73,
112712
002214
735
106312
002220
736 002222 103355
737 002224
105337
738
002230 001373
739 002232
132712
740
002236 001347
761
002240
005202
762
002242
000004
743
002246 005037
764
002252
004737
745
002256 005737
746
002262
001415
767 002244
122737
748
002272 001411
002274
122737
002302 001495
002304
122737
002312 001353
002314 050413
002316 005723
002320 032701
002324 001277
002326 012703
002332 006304
002334 005200
002336 020037
002342 001270

000003
016052
016702
015770
015644
015772

GETLEN:

015773

000060

177777

26-FEB=79
SETUP AREA
ADD
MOV
JSR
INC

TYPE,

CLR
JSR
TSTB
BEQ
TSTB

BNE

015772

SUB

2%:

015772

MOVB
ASLB
BCC
DECB

BNE

000037

016723
015770
015644
015772

GETPAR:

000116

015772

000105

015772

000117

015772

001300

002372
002400
002404
002410
002414
002420
002426

#60,

''CHAR LENGTH:

JREAD FROM THE TTY
sCHECK FOR CR (DEFAULT)
JBRANCH IF DEFAULT
;CHECK FOR BAD DATA
;BRANCH IF BAD
s CONVERT FROM ASCI!
;SET UP MASK
;CLEAR MASK BIT BY BIT
;BAD INPUT, > 8
; COUNT
;BRANCH IF NOT DONE
;CHECK FOR 5 CHAR
;BAD INPUT, < 5
JINC TO NEXT LINE GROUP

(R2)

;TYPE "PARITY (NO, ODD, EVEN):

INHRE
PC ,READS
INPUT

sREAD INPUT FROM TYY
sHECK FOR CR
;BRANCH IF DEFAULT
;CHECK FOR "W’

BEQ
CMPB
BNE
BIS

3s
#116, INPUT
3s
2105, INPUT
3s
#117.INPUT
GETPAR
R
(R3)

BIT
BNE
MGV

#17.R1
TYPLIN
#PARITY .R3

sCHECK FOR 'D'’
sBRANCH IF NONE
sSET THE ODD PARITY FLAG
sPOINT TO THE NEXT PARITY WORD
<CHECK FOR NEXT UNIT
+BRANCH IF NOT
sRESET PARITY TABLE POINTER

INC
cTMP
BNE

RO
KO, UNITS
TYPLIN

sCOUNT UNITS
;CHECK FOR LAST
sBRANCH IF MORE

017232

MOV

#PRTBLE +2.R4

001344
017174
017210
000075
015644
015772

ADD

UNITS,UNITS?

TYPE,

MSBR

MOV
MOV

#61,
UNITS1
R4 ,=(SP)

TYPE,
TYPE,
TYPE,

JSR
CMP
BM]

sBRANCH IF "NO'’
:CHECK FOR "E'’
;BRANCH IF "EVEN''

(R%)+

MoV

000060

:TYPE

(R2)

IN GROUP OF 4

IN OCTAL

;AND SUPRESS LEADING ZERO'S
:FIRST LINE NEXT GROUP

INPUT

#-1.
(R2)
GETLEN
INPUT

017051
000061
000061

DEVNEW:

:TYPE R1

INPUT+1

; ROUTINE TO GET BUS
002344
002350
002356
002364
002366

.sLAST LINE

READS

GETLEN

MSGPAR

ASL

001344

SEG 0027

INHRE
PC,
INPUT
GE TPAR

TYPE,

LR
JSR
ST

PAGE 22

MSGLEN

#37,
GETLEN

INC

#3,
R1
RI.TTY
PC.PRINTS
R1

BITR
BNE

BEQ
CMPB
BEQ
CMPB

3%:

000017

15:47

#61,

VICE
DEVNUM
bs

sFLAG TO NEXT UNIT

PRIORITIES FOR INDIVIDUAL DJ11S

DEVNUM

PC ,READS
INPUT
, #60
NOGOOD

062701
010105
004737
005201
000004
005037
004737
105737
001421

30A(1052)

26-FEB=79 15:41

MACY11

002154

TESTS

002142
002146
002150

LOGIC

PR PR PR PR PR TR PR

722
723
724
725
726
727

DJ11

2Z=CZDJA=F=Q
CZDJAF .P11

TYPE QUESTION- BR PRIORITES?2?

LOAD UP INITIAL DEVICE #
LOAD FIRST UNIT FOR BR QUESTION
SAVE CONTENTS OF R&
SKIPPING FIRST TABLE LOCATION
TO ALLOW ROUTINE BRSET TO WORK

LOAD TOTAL UNITS IN UNITS?
TYPE QUT WORD "DEVICE"
TYPE DEVICE NUMBER
TYPE AN EQUAL SIGN

GO READS IN NUMBER(ASCII)
CMP DECIMAL 7 AND BR INPUT VALUE

REPORT ERROR

786

785
786

787

002456

002460

002462
002466

002470

001350

000403

000004
000744

012604

015772

017210
017212

017117

(MP

INPUT

BM]
MOV

INC
CMP
BNE

017210
NOGOOD:

AROUND:

R67,

NOGOOD
INPUT, (R4) +

DEVHUM
UNITS1,DEVNUM
DEVNEW

BR
ARQUND
TYPE,
MSBAD
BR
PEVNEW
MOV (SP)+,

PAGE 23
Y

015772

15:47

L TN
I

013724

005237
023737

000067

26-FEB=79
SETUP AREA

783

002440

(002444
002450

022737
100411

30A(1052)

780

781
782

002430
002436

MACY11

778
779

DJ11 LGGIC IESTS
26=FEB=79 15:41

L
TRTR

22-CZDJA=F=0
CZDJAF .P1

CTHECK IF A VALID ENTRY
REPORT ERROR

STORE VALUE OF PRIO

TO NEXT DEVICE # (IN ASCII)
ARE YOU TESTING LAST DEVICE???
BACK [Ff MORE DEVICES
THRU IF ALL DEVICES FINISHED
T'YPE ERROR IN INPUT VALUE
BACK TO ASK AGAIN
RESTORE R4

22=-CZDJA-F=0
CZDJAF F11
788
785
790
791
792
793
794
795
796
797
798
799

800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819

DJ11

LOGIC

TESIS

26-FEB-79 15:41

002472
002474
002500
002504
002506
002514
002516
002522
002526
002532
002534
002540
0C2544
002550
002552
002560
002566
002574
002600
002606
002610
002614
002622
002630
002636
0C2644
002659
0C2654
002660
002664
002670

000005
012706
005737
001410
022737
001004
004737
005037
012700
005720
010060
012720
022700
001370
062737
062737
062737
006337
023737
002416
005037
013737
013737
012737
012737
005237
013701
062701
010137
062701
010137

002674
002700
002704
002710
002712
022716
002720
002724
002726
(02732
002736
002742

062701
010137
013701
005721
010137
005721
010137
005721
017137
005037
005037
104400

MACY11

RESTAR:

001200
001400
000176

30A(1052)

26-FEB=79
SETUP AREA
RESET
MOV

T1ST

BEQ

CMP
BNE

001374

017604
001400
000300

JSR

CLR
CLRVEC: MOV
1$:
ST

177776
000004
001000

MOV

15:47

2
PAGE 24
SEC 0023

#STACK,

FTIME

;1SSUE REET
;SET UP STACK POINTER

CLRVEC

#SWREG, SWR
CLRVEC
PC,

CNTLU

FTiME
#300,R0
(RO)
+

;BEGINNING OF FLOATING VECTORS

RO,=2(R0O)

:.nioru

MOV

#10T,

(RO)+

ADD
ADD

#10,
#10.

(SR
RCVVEC

cMP
BLT
CLR
MOV
MOV
MOV
MOV
INC
MOV
ADD
MOV
ADD
MOV

DJUUT ,UNITS
28
DJUUT
DEVADR, CSR
VECADR,RCYVEC
#LENGTH,DJLEN
#1,DJPAR
DJUUT
CSR,
R1
#2,
R1
R1.
RBUF
#2,
R1
R1.
TCR

000002
001326
001330

ADD
MOV
MOV

7
R1
R1.
TBUF
RCVVEC. R1

001332

MOV

R1,

RCVLVL

001334

MOV

XMTVEC

sTPANSMITTER VECTOR

001336
001310
015250

MOV

R1,

XMTLVL

JXMT INT LVL ADR

000010
000010
000004
001366
001362

001362
001340
001342
001200
000001
001362
001320
000002
001322
000002
001324

CMP
BNE

001320
001330
001364

ADD
ASL

001344
001329
001330
0C1364
001366

2s:

1ST

CLR
CLR
SCOPE

#1000,R0
1%

#,
DJFAR

(R1)+

ICNT
AD

DJLEN

sUPDATE DEVICE ADDRESS TO NiXT UNIT
sUPDATE DEVICE VECTOR ADDRESS
sMOVE CHAR TABLE POINTER
;UPDATE PARITY FLAG MARKEK

;INIT CHAR TABLE POINTER

SINIT PARITY FLAG MARKER

:igg tZP ALL THE REGISTER ADDRESSES

*SET UP RECEIVER BUFFER
“ADD 2

;SET UP TRANSMITTER CONTROL REG
:AsgDZBREAK STATUS REG
:SET UP TRANSMITTER BUFFER

;POINTER FOR VECTOR SETUP
JINC R1
sSET INT LVL
JINC R1

JINC R

Z2-CZDJA=F-0
CZDJAF P11

DJ11 LOGIC TESTS

26=FEB-79 15:41

MACY11

835
836
837
838
839

30A(1052)
TSTi:

26-FEB=79

TEST

15:47

CSR EXISTS

¢
PAGE 25
SEv 0024

AR LRS
22222122 222222222
S
2322
t
1T
T

: TEST 1:

TEST ABILITY TO REFERENCE CSR WITHOUT TRAPPING

H
AND ABILITY TO CLR CSR.
sPROBABLE FAULTY LOGIC:
M105; M7285 (D2-6) E29

002744
002752

002760
002764
002770
002774
002776

012737
012737

005777
005077

005577
001405

000004
000006

IST1:

000403

003002
003004

012601

003006
003010

00572%
012737
005037

000004

RSt

eIt

9,
a#d
#LEVEL7 ,a#6

CLR

aCSR

22222223 2322222222221

;SET UP TIME~OUT TRAP VECTOR

aCSR

;REFERENCE CSR

(READ)

alSR

;CHECK CSR

(READ AND WRITE)

;CLEAR (53R

(WRITE)

BEQ

;SKIP ISR

1%:

MOV
HLT+1

(SP)+ ,R1

;SAVE RTI ADR FOR TYPING
sCAN'T REFERENCE CSR!

2%:

MOV
CLR

(SP) +

;FINISH CLEARING STACK

HLT

000006
000006

MOV
MOV
ADC

1040C1

104400

5% §

176330
176324

104000

003000

003016
003022

003002
000340
176334

TST

JBRANCH IF OK

;CSR NOT CLEARED

#6, 44
a6

SCOPRPE

;tt'.ttt.I..t'.'.Q.'.ttfi'.t".tt.t...t'..'lt.....fi...tt't..

2TEST 2:

sPROBABLE FAULTY LOGIC:
R AR

012777
032777
001001
104000

000002
000002

003044
003052
003054

032777
001401

177775

003056

005077
032777
001401

003024
003032

003042

003070
003072
C03074

176266
176260

ISTg:

MOV

BIT

MLT

BIT

176230

;BRANCH IF Ok

.*4

RN A AN RS

RS R R AR

sCHECK THAT BIT1 I35 SET

sCHECK THAT NO OTHER BIT SET

BRANCH IF 0K

EXTRA BIT SET IN (SR

sCLEAR BIT1

sCHECK THAT BIT1 IS CLEARED

+sBRANCH IF OK

sCSR BITT1 FAILED TO CLEAR

SCOPE
AR

;1EST 3:

SRR

104000

;CSR BIT1 FAILED TO SET

#BIT1,3CSR

AT R AAR P AR R

000004
000004

176214
176206

TST3:

R R AR AR AR R AR A RAR AR AR RN RARRRRRRRR

TEST THAT CSR BIT2 CAN BE SET AND CLEARED

;PROBABLE FAULTY LOGIC:
012777
032777
001001

A AR AR AR RN R AR AR

BEQ

SRR AR AR AR

003076
003104
003112
003114

R AR

;SET BIT1

a(SR

HLT

104400

A AR AR AR

#B171,3CSR

CLR

BIT

104000

M7285 (D2-2) E25.E7. (D2-4) E47.E64

HLT

176236
000002

#177775,8CSR

BEQ

104000

R A

#81T1,3CSR

BNE

176246

..tt.'.l.’tlt

TEST THAT CSR BIT1 CAN BE SET AND CLEARED

MOV
elr
BNE
HLT

RN RS

M7285 (D2-2) E25.E7, (D2-4) E47.E&4

AR RN R AR AR AR N AR R AR R R R AR R AR

#BI1T2,aCSR
#B1T2,aCSR
.t

A RARR AR

R E

;SET BIT2
sCHECK THAT BIT2 IS SET
+BRANCH IF 0K
;CSR BIT2 FAILED TO SET

R SR

RRRAR

Z2-CZDJA=F=0
CZDJAF .P11

891

892

003116

DJ11 LOGIC TESTS
26=FEB-79 15:41

032777

ggz

003124

C03126

001407

895
896
897
898

003130
003134
003142
003144

005077
032777
001401
104000

900

003146

104400

MACY11

177773

176174

176164
000004

176156

30A(1052)
26-FEB=79
TST3:
TEST BIT2 OF

104000

15:47
(SR

2
PAGE 26
SEQ 0025

BIT
BEQ
HLT

#177773,aCSR
R

;CHECK THAT NO OTHER BIT SET
JBRANCH IF OK
JEXTRA BIT SET IN CSR

CLR
BIT
BEQ
HLT

aCSR
#B1T2,aCSR
R

;CLEAR BIT2
;CHECK THAT BITZ2 IS CLEARED
sBRANCH IF OK

;CSR BIT2 FAILED TO CLEAR

SCOPE
AL LEAR LS

22222222222222222211°1TM

JTEST 4:
TEST THAT CSR BIT6 CAN BE SET AND CLEARED
:PROBABLE FAULTY LOGIC:
M7285 (D2-2) E4,E18, (D2-4) E47,E64

.'ttfitt*tt"ttt'itttQt“t'tttt.lit.t'*fittktittltttttt.ttl...t.t'.tn.ttt

907
908
909
910

003150
003156
003164
003166

012777
032777
001001
104000

000100
000100

176142
176134

912
913
914

003170
GU3176
003200

032777
001401
104000

177677

176122

916
917
918
919

003202
003206
003214
00321€

005077
032777
001401
104000

176112
000100

921

003220

104400

TST4:

MOV
BIT
BNE
HLT

#BI1T76,3CSR
#B1T6,aCSR
. A

BIT

8177677 ,8CSR

HLT

;CHECK THAT BIT6 IS SET
;BRANCH IF 0K
;CSR BIT6 FAILED TO SET
;CHECK THAT NO OTHER BIT SET
;BRANCH IF 0K

sEXTRA BIT SET IN (SR

CLR
BIT

176104

;SET BIT6

a(SR
#MIT6,aCSR

BEQ

HLT

;CLEAR BIT6
;CHECK THAT BIT6 IS CLEARED
JBRANCH IF 0K
;CSR BIT6 FAILED TO CLEAR

SCOPE
AR

AR AR AR AR AR R AR

R A AR AR AR RAN AR AR AN

ARARA SRR

:TEST §5:
TEST THAT CSR BIT8 CAN BE SET AND CLEARED
:PROBABLE FAULTY LOGIC:
M7285 (D2-2) E6, E18, (D2-4) E47.EXN

RS R

..i.fi..*'fi..‘..t'.t'tt""t'..l"Qlt.....Qt'......t..tl..fi.ttt.QQ..Q.t'

928

003222

929
230
931

00323C
003236
003240

933
934
935
937
938
939
940

003270

942

003272

012777

000400

032777
001007
104000

000400

003242
003250
003252

032777
001401
104000

177377

003254
003260
003266

005077
032777
001401

176040
000400

176070
176062

TS15:

MOV
BIT

#B1718.3CSR
#BIT8,aCSR

BNE
HLT

176050

BIT

BEQ
HLT

104000

BIT
BEQ
HLT

104400

SCOPE
SRR

AR AR

:CSR 8178 FAILED TO SET
sCHECK THAT NO OTHER BIT SET

alSR

;CLEAR BIT8

#IT8,aCSR
.+

AR A

sBRANCH
IF OK

#177377 ,8CSR

CLR

176032

sSET BITS8

: CHECK THAI BIT8 IS SET

AR A AT AR AR R R R AR R

sBRANCH IF OK
<EXTRA BIT SET IN (SR

sCHECK THAT BIT8 IS CLEARED
sBRANCH 1F OK

sCSR BIT8 FAILED TO CLEAR

AR R AR AR R AR R R R AR AR AR R AR R AR AR AR

TEST THAT CSR BIT1G_CAN BE SET AND CLEARED
;JEST 6:
;PROBABLE FAULTY LOGIC:
M7285 (D2-2) E30,E24, (D2-4) E47.E%N

AR R

R AR

2Z-CZDJA=F-0
CZDJAF .Pi1

DJ11

LOGIC

T ESTS

26-FEB-79 15:41

MACY11

548
949

950
951
952
953
254
955

30A(1052)
26-FEB=79
15:47
TST6:
TEST BIT10 OF CSR

PAGE 27

SEG 0026

:.ttlt'fifit‘fitttitt"t*t'.t't'tttfiittfitttttttttflttt'tt'tt.ttt

ttttt’ttt.tt

003274
003302
003310
003312

012777
032777
001001

003314
003322
003324

032777
001401

175777

003320
003332
003340
003342

005077
032777
001401

175766
002000

003344

104400

002000
002000

TSTS:

MOV
BIT
BNE

104000

#BIT10,aCSR
#BIT10,aCSR
R

HLT

175776

175760

104000

;CSR BIT10 FAILED

TO SET

BIT

#175777 ,aCSR
.4

;BRANCH IF OK
JEXTRA BIT SET IN (SR

CLR
BIT
BEQ

aCSR
#BIT10,aCSR
.4

;CLEAR BIT10
sCHECK THAT BIT10 IS CLEARED
;BRANCH IF Ok

BEQ
HLT

104000

;SET BIT10
;CHECK THAT BIT10 IS SET
sBRANCH IF OK

HLT

;CHECK THAT NO OTHER BIT SET

;CSR BIT10 FAILED

TO CLEAR

SCGPE
;tt*tttttt..t.tt.t.fifittt'tfitfitt"it.ttfi.tl'ttt.t..tttfi.tfitttttfi't.fittt

sTEST 7:

TEST THAT CSR BIT12 CAN BE SET AND CLEARED

;PROBABLE FAULTY LOGIC:

003346
003354

012777
032777
001001

010000
010000

003366
003374
003375

032777
001401

167777

003400
003412
003414

005077
032777
001401
104000

003416

104400

003364

175744
175736

IS17:

104000

MOV
BIT
BNE

#31T12,aCSR
#BIT12,2CSR
.+

BIT

#167777 ,aCSR

HLT

175724

BEQ

104000

;CSR BIT12 FAILED TO SET

sCHECK THAT NO OTHER BIT SET

sBRANCH IF OK

cEXTRA BIT SET IN CSR

aCSR

:CLEAR BIT12

BEOQ

.*4

sBRANCH IF 0K

#BIT12,aCSR

HLT

;CHECK THAT BIT12 IS (LEARED

;CSR BIT12 FAILED TO CLEAR

SCOPE
A A

;TEST 10:

AR AR AR

012777
032777
001001
104000

040000
040000

003440
003446
003450

032777
001401

137777

175652

003452
003456
003464

005077
032777
001401

175642
040000

175634

175672
175664

AR A

TST10:

MOV

BIT
BNE

AT R

M7285 (D2-2) E3.E1,

AR AR AR AR AR

#BIT14,3CSR

082714.3CSR
L+

HLT

104000

R A AR R AN R AR A AR R A AR AR RRR AR AT R R AR RN

TEST THAT CSR BIT14 CAN BE SET AND CLEARED

sPROBABLE FAULTY LOGIC:

SRR

003436

(D2-4) E47.E3?

T 2222222223222

CLR

BIT

SRR A

003420
003426

;SET BIT12
;CHECK THAT BIT12 IS SET
sBRANCH IF OK

HLT

175706

M7285 (D2-2) ES5,E1,

TR R AR

(D2-4) E47.t31

R R R AR AR R RN RR R AR AR

RN RRRRR AR TR

;SET 8IT14

sCHECK THAT BIT14 IS SET
sBRANCH IF OK
;CSR BIT14 FAILED TO SET

BIT
BEQ
HLT

#137777 ,aCSR
. *4

sCHECK THAT NO OTHER BIT SET
sBRANCH IF OK
sEXTRA BIT SET IN CSR

CLR
BIT
BEQ

aCSR
#BIT14,aCSR
.+

;CLEAR BIT14
sCHECK THAT BIT14 IS CLEARED
sBRANCH [F OK

SRR

RS ®

DJ11

LOGIC

TESTS

26=FER=7G 15:41

MACY11

30A(1052)
26-FEB=79
15:47
TST10:
TEST BIT14 OF (SR

003466

104000

HLT

003470

104400

SCOPE

WNWN -0
NN

D d d

b —_—
s
e

b e

e
e
o

b e e

PAGE 28

SEQ 0027
;CSR BIT14 FAILED

TO CLEAR

;t.tttt!tlttttl'tttttttttttt'ttttttttttttttttttttt

STEST

-3 o

ed D D D d d

1003

S&R

17-CZDJA=F=C
CZDJAF P11

'ttttt'tt.tttttttttltt

11:

TEST

THAT RECEIVER ENABLE

AND CLEARED,

:PROBABLE FAULTY LOGIC:

(BITO OF

THE

CSR)

AND THAT CLEAR MOS (BIT3)

CAN BE

SET

IS WRITE ONLY.

M7285 (D2-2) E26,E36,E7,E24, (D2-8) E17.E14.E15

:titQtti.!tiIitt.tfifittti""tt.'fi'.tt'tttfi"tflifli'!tfi.lt.tttt".t'"tt

003472
003500
003502
003510
003514
003520
003522

012777
005005
052777
017701
032701
001401

003524
003530

032701
001403

003532
003534
003536

003540
003544
003546

000004

175620

000010
175604
000010

175610

TST11:

1%:

#BIT2,

MOV

aCSR,

BEQ
HLT+1

. +4

CLR
BIS

BIT

104001

000020

BIT
BEQ
DECB

105305

BNE

001365
104001

022701
001401

MoV

HLT+1

28:

000004

CMP

BEQ
HLT+1

104007

QCSR

RS
#BIT3,

@CSR

#BITS,

PRI

#B1T4,
2%
RS

#8172,
e

;SET MAINTENANCE MODE

*SET UP COUNTER
:SET CLEAR MOS (BIT3)

(BITZ)

*SAVE CSR

:CHECK CLEAR MOS (BIT3)

“BRANCH IF OK
:CLEAR MOS (BIT3)

SET

:R1 = CONTENTS OF CSR

(WRITE-ONLY)

:CHECK CLEAR MOS FLAG
*BRANCH IF CLEARED
:WAIT FOR MOS TO CLEAR

*BRANCH IF MORE TIME

:CLEAR MOS FLAG (BIT4)

:RT = CONTENTS OF CSR

FAILED TO CLEAR

:CHECK THAT ONLY MAINTENANCE BIT SET

:BRANCH IF OK
:CLEAR MOS CLEARED MAINTENANCE

: OR SET OTHER CSR BITS

003550
003556
003562
003570
003572

052777
017701
032777
001001

003574
003602
003604

022777
001401

003606
003614
003620
003630

000001

175542

000001

175530

175536

BIS

MOV

aCSR

BIT

#8170,

BNE

104001

HLT+1

000005

cMP
BEQ

175516

104001

042777
017701
022777
001401

#3170,

HLT+1

000001

175504

000004

175472

175500

:NOTE:
:

»5,
i

sSET RECEIVER ENABLE

@CSR

:CHECK THAT RECEIVER ENABLE SET

@CSR

sSAVE CSR

*BRANCH IF OK

:RECEIVER ENABLE FAILED TO SET
*R1 = CONTENTS OF CSR

-CHECK REST OF CSR
*BRANCH IF OK

“CSR ERROR

*R1 = CONTENTS OF CSR

IF THE TTY MODULE IS BEING USED AND DONE (BIT?) IS SET.
THE ERROR COULD BE DUE TO MAINTENANCE OR CLEAR MOS NOT WORK'NG.
BIC
#BITO,
@CSR
;CLEAR RECEIVER ENABLE

MOV
CMP
BEQ

104001

sR1 = CONTENTS OF (SR

aCSR

HLT+1

aCSR, " RT
#BIT2, @CSR
e

*SAVE CSR
:CHECK CSR
*BRANCH IF OK

*RECEIVER ENABLE DIDN'T CLEAR

* OR OTHER CSR BIT SET
*R1 = CONTENTS OF CSR

1053

003632

104400

SCOPE
SRR

1055

1056
1057
1058

AR AR

; TEST 12:

AR AR R A A

A R R R R R R

A RN R AR AR R

AR RN R R R AR R AR RN

RN R EAR

TEST THAT (SR RESPONDS PROMERLY TO BYTE COMMANDS

;PROBABLE FAULTY LOGIC:

M7285 (D2-4) E47

RN RS

;tt't.t"!i‘t'Qtitt't'"'t'.i'i‘fi"‘il"&Qi".t!fi‘!l‘.'...‘.ttttt.itt.‘.

2Z=-CZDJA-F=0
CZDJAF .P11
1059
1060
1061
1062

1063
1064

1065

1066
1067
1068
1069
1070

1071

1072

1073
:}8;1-5.
}8;9

003634
003642
003646
003652

C03656

003660

DJ11 LOGIC TESTS
26-FEB=-79 15:41
012777
105077
017701
022701

001401

012777
005237
105077
005337
017701

003714

001401

003716

003720

175456

052506
001320
175420
0013:0
175410

175430

104001

aCSR,
R1
#000106,R1
R

104400

SCOPE

022701

DEC

000106

SRR

10892
1090
1091
%%%

003736
003744
003752
003754

052777
022777
001401
104000

052506
052506

1094
1095
1096

(003756
003764
003770

042777
017701
0C1401

052506
175330

RANISIRIRIRAC

Y
W
W
G
TW
S
YR
Y

St0 0028

;SET TEST NUMBER IN (SR
;CLR EVEN BYTE
;SAVE (SR
;CHECK CSR

JBRANCH IF OK

;R1 = CONTENTS OF (SR

sSET TEST NUMBER IN (SR
;INC TO ODD BYTE
;CLR _ODD BYTE
JRESTORE TO EVEN
;SAVE CSR

;CHECK CSR

;BRANCH IF OK

;0DD BYTE (LR FAILED ON CSR
;R1 = CONTENTS OF CSR

L Rt

sTEST 13:
TEST THAT THE BIS AND BIC INSTRUCTIONS SET AND (LEAR R/W
BITS OF CSR
;PROBABLE FAULTY LOGIC: M7285 (D2-4) E47
175372
175366

CSR

005077
017701
001401
1040901

JEVEN BYTE CLR FAILED ON CSR

MOV
CMP
BEQ
HLT+1

003722
003726
003732
003734

#052506,aCSR
CSR
aCSR

1082
1084
1085
1086
}83;

e
e L T Y

#052506,aCSR
aCSR
aCSR,
RI
#052400,R1

MoV
INC
CLRB

1082

MOV
CLRB
MoV
CMP

HLT+1

1079
1080
1081

1099

T1ST12:

BEQ

1078

30A(1052)
26~FEB=-79
15.47
PAGE 29
TST12:
TEST BYTE ADDRESSING OF (SR

104001

003662
003670
003674
003700
003704

003710

052506
175452
175446
052400

MACYT!

003772

003774

R A AR

AR AR AR

AR A A AR A AR AR AR AR AR R AR AR AR AR AR E RS AR R AR AR

CLR
MOV
BEQ
HLT+1

aCSR
a(SR,
.+

175354
175346

BIS
cMP
BEQ
HLT

#052506,
#052506,
-4

aCSR
sSET ALL R/W BITS OF (SR
aCSR
s CHECK THAT THEY GOT SET
;BRANCH IF OK
<REG FAILED CMP

175334

BIC
MOV
BEQ

#052506,
a(SrR,
R1
.t

a(SR
;CLEAR (SR
;CHECK AND SAVE (SR
;BRANCH IF CLEARED OK

TST13:

104001

HLT+1

104400

sCLEAR THE CSR
sCHECK AND SAVE CSR
sBRANCH IF CLEARED Ok
sRESET FAILED TO CLR (SR

;CLR FAILED TO CLR CSR

SCOPE
SRR AR AR

AR AR

AR R AR

R AR AR R RS R R

R AR R R

AR AR

RAC RN

STEST 14:
TEST BITS OF TCR FOR READ/WRITE CAPABILITY
;PROBABLE FAULTY LOGIC:
M7285 (D2-2) ALL, (D2-3) E8,E20,E21.E43.E41

SRR

003776
004004

012777
017701

004014
004016

001401
104001

004020
004026
004030

005077
017701
001401

004010

022701

177777
175314

177777

175300
175274

175320

T1ST14:

MOV
MOv

AR AR R AR

AT R R

#177777 ,8TCR
alCR
R1

CMP

8177777 ,R1

CLR
MOV
BEQ

al(R
alCR,
. t4

BEQ
HLT+1

R R AR

A AR AR R R AR

AR AR R AR AR R

R R R AR R AR

sSET ALL BITS OF TCR
sCHECK AND SAVE TCR

sCHECK THAT ALL THE BITS ARE SET

¢BRANCH IF OK
sBIT(S) OF TCR FAILED TO SET

sCLEAR TCR
sCHECK THAT IT CLEARED AND SAVE
JBRANCH IF CLR

Z7=CZDJA=F=0
CZDJAF P11

DJ11 LOGIC TESTS
26=FEB=79 15:41

MACY1

”}2

004032

104001

HLT+1

} } 17

004034

104400

SCOPE

1118

1120
1121

1130
1131
1132
1133
1134
1155

1136

004036
004044
004050
004054
004060
004062

012777
105077
017701
022701
001401
104001

177777
175254
175250
177400

175260

004064
004072
004076
004102
004106

012777
005237
105077
005337
017701

177777
001324
175222
001324
175212

175232

004112

022701

11537
1138

004116
004120

001401
104001

”2;

004122

104400

”28

SEQ 0029

JBIT(S) OF

TCR FAILED TO (LEAR

R AR AR RN AR R AR AR AR A AR AR AR AR A AR AR AN AN AR A AN AR A AR AR R AR A AR AT NS * W

: TEST 15¢
TEST THAT TCR RESPONDS PROPERLY TO BYTE COMMANDS
;PROBABLE FAULTY LOGIC:
M7285 (D2=3) E41

1122

1123
1124
1125
1126
1127
1128
1129

3?2(}252)
26=FEB=79
15:47
PAGE 30
T14:
TEST READ/WRITE BITS OF TCR

R R

TST15:

000377

R AR

R AR AR AN AN AR R A AR AR AR A AN AN ARA AR AT A AR A A AR AN A RS’

MOV
CLRB
MOV
(MP
BEQ
HLT+1

#177777 ,@TCR
alCR
al(CR,
R1
#177400,R1
.+

MOV
INC
CLRB
DEC
MOV

#177777 ,dTCR
TCR
alCR
TCR
alCR
R1

CMP

;JSET TEST NUMBER IN TCR
;CLR EVEN BYTE
.SAVE T(CR
;CHECK TCR
;BRANCH IF OK
sEVEN BYTE CLR FAILED ON TCR

sR1 = CONTENTS OF TCR
;SET TEST NUMBER IN T(CR
2INC TO ODD BYTE
sCLR ODD BYTE
JRESTORE TO EVEN
;SAVE T(R

#000377 R

BEQ
HLT+1

:CHECK TCR

JBRANCH IF 0K
;ODD BYTE CLR FAILED ON TCR

;R1 = CONTENTS OF TCR

SCOPE

1143

1144
1145
1146

>TEST 162
TEST THAT THE BIS AND BIC INSTRUCTIONS SET AND CLEAR R/W
2
BITS OF TCR
;PROBABLE FAULTY LOGIC:
M7285 (D2-3) E41

1147

1148
1149
1150
1151

004124
004130
004134

005077
017701
001401

175174
175170

TST16:

A R

AR R A AR

R R

R R A AR AR AR AR P R AR AR AR R AR AR R

AN AR AT AR

(LR
MOV
BEQ

alCR
al(R,
.+

R AR

RR AR AR

RN AN R AR AR AR AR R AR R R ARA AR AR AR R R R

004136

1154
1155
1156
_”gg

004140
004146
004154
004756

052777
022777
001401
104000

177777
177777

175156
175150

BIS
cMP
BEQ
HLT

77777,
277777,
.t

al(R
2SET ALL R/W BITS OF TCR
al(R
.CHECK THAT THEY GOT SET
JBRANCH IF CK
;REG FAILED CMP

1159
1160
1161

004160
004166
004172

042777
017701
001401

177777
175132

175136

BIC
MOV

#77777,
alC(R,
R1

alCR
sCLEAR T(CR
sCHECK AND SAVE T(R
;BRANCH IF CLEARED OK

];g%

004174

HLT+1

BEQ

104001

HLT+1

sRESET FAILED TO CLR TCR

sCLR FAILED TO CLR T(R

1164

1165
”2(7)

1168
1169

1170

004776

004200
004206

104400

(©12737
012737

000001
004214

SCOPE

9001346
015250

R R

MOV
MoV

n,
#.+6,

R AR AR A AR

R AR R AR

+TEST 17:

TEST

®®

;CLEAR THE TCR
sCHECK AND SAVE T(R
JBRANCH IF CLEARED 0K

”;g

104001

AR AR AR RS

TIMER
LAD

;INITIALIZE TIMER
JRESET LOOP ADDRESS

R AR R AR AR R R AR R R AR AR AR AR R R R AR R R R R AR R RS TR R RS

THAT TRANSMIT READY

(BIT15 OF

WHEN TCRO IS SET AND CLEARED.

CSR)

SETS AND CLEARS

2Z=-CZDJA-F=Q0

MACYT1

ALSO CHECK_THAT

—

00 00 00 00 00 00~~~
~d ~J N H WA
—

012777
052777
005000
017701

m—.‘—._a—o._a_a_n_oq-l

BYRBRENLEBBLR

SEQ 0030

THE RIGHT LINE NO.

(0)

APPEARS

IN TBUFF.

PROBABLE FAULTY LOGIC:
M7285 (D2-5) ALL, (D2=6) E23, E32, E33, E49, (D2-2)
tttitfi..*Q*.Qtt!i*tt.tl‘t't!tt**tt.*ttitt'ttfltfittflt*tttlt.tttt.'t'tt't'

d_hfl_“&dodd*hdd—aH‘JJ_LJA—LJJ_MJd_ng_a
e vd wd o d o d o D e e e ) d
o

1199

30A(1052)
15:47 PAGE 31
26=FEB=79
TST17:
TEST TRANSMIT READY

cszOmfidfifl

CZDJAF .P1T

DJ11 LOGIC TESTS
26-FEB-79 15:41

100404

000400
000001

175076

175074

175062

TST17:
1%:

104001

000416

BIS

RO,
,
aTRUF
R1
R1

004272
004274

017702

175020

042777
017791

000001
175002

004304
004312
004316
004320

RO
a(SR,

2%
RO

050037
017701
105001
000301
022701
001401
104001
100401
104002

100001
104001

001346

2%:

175046

000000

175012

3%:

aCSR
aTCR

#BITO,

BM]
INC
BNE
HLT+1

005200
001373

004302

#400,

MOV
BIS
CLR
MOV

MOV
CLRB
SWAB
MP
BEC
HLT+1

;SET XMTR SCAN ENABLE
;SET XMTR CONTROL BIT, LINE O

;SET UP WAIT COUNTER

;CHECK AND SAVE YMTR READY

;BRANCH IF

SET OK

WAIT A WHILE

;XMTR READY FAILED

TC SE?

;SKIP LINE # CHECK ON ERROR

#0,

TIMEP

;SET UP TIMER
sSAVE LINE NUMBER

;CHECK THAT THE XMTR STOPPED ON LINE ¢
sBRANCH IF 0K

;WRONG LINE NUMBER APPEARED IN TBUF

MOV
BMI
HLT+2

aCsR,
Y7

sCHECK AND SAVE XMTR READY
sBRANCH IF 0K
;READING THE TBUF CLEARED XMTR READY

BIC

#BI1T0,

alCR
R1

sCLR XMTR CONTROL BIT, LINE C

aCSR,
.+

sCHECK AND SAVE XMTR READY
sBRANCH IF OK

sXMTR READY FAILED TO CiEAR WHEN

00432¢

XMTR CONTROL FOR LINE O WAS CLEARED

104400

YEST 20:

R AR

AR AR AN R R R AR R R AR AR R

R AR R AR AT R SRR RS RER

R & ®

TEST THAT TRANSMIT READY (BIT15 OF CSR) SETS AND CLEARS
WHEN EACH TCR BIT IS SET AND CLEARED.

ALSO CHECK _THAT THE RIGHT LINE NO.

PROBABLE FAULTY LOGIC:

APPEARS iN TBUFF.

M7285 (D2-5) ALL, (D2-6) E23, E32. E33. E49. (D2-2) EZ, E!

t'tttt't...l.l"'fit.t..Q.fi‘."..Q‘fit.tt..'.t".t't'...t.tl".Q.'t""o'

004324
004332
004334
004340
004344
004346
004352
004354
004356
004360

E3, E1

012777
005001
012704
050477
5000

017702
100404

005300
001373
104002

000400

000001

174766

IST20:

174760

174746

1%:

MOV

CLR
MOV
BIS
CLR
MOV
BMI
DEC
BNE
HLT+2

#4600,
R1
#,
R4,
RO
aCSR,

RO
1%

aCSR

;SET XMTR SCAN ENABLE

;SET UP MARKER
sSET XMTR CONTROL BIT, EAlH LINE
sSET UP WAIT COUNTER
sCHECK AND SAVE XMTR READY
JBRANCH IF SET Ok

alCR
R2

JWAIT A WHILE

;XMTR READY FAJLED TC SET

JRI=LINE #

;R2=CSR

ZZ=-CZDJA=F=Q
CZDJAF P11

1227
1228
1229
1230
1231
1232

1233

1234
1235

DJ!'1

LOGIC

TESTS

26~FEB-7G 15:41

004362

000414

004364
004370
004374
004376
004400
004402

050037
017702
000302
020201
001401

004404
004410
004412

017703

004414
004420
004424
004426

040477
017702

MACYT1

001346

2%:

174732

BIS

RO,
aTéuF,

TIMER
R2

:SET UP TIMER
“SAVE LINE NUMBER

;CHECK THAT THE XMTR STOPPED ON RIGHT LiNE

MOV
SWAB

;SKIP LINE # CHECK ON ERROR

et |

100401
104003

100001
104002

174710

1724704

3%:

174674

R4,
acsrR,
.+

aTCR
R2

;CHECK AND SAVE XMTR READY
sBRANCH TF 0K

;READING THE

TBUF

CLEARED XMTR READY

;CLR XMTR CONTROL BIT, EACH LINE
;CHECK AND SAVE XMTR READY
sBRANCH IF OK
sXMTR READY FAILED TO CLEAR WHEN

;R2 = CONTENTS OF (SR
004430
004432
004434

005201

004436

104400

R1
R4

INC

ASL

103341

JINC LINE COUNTER TC NEXT LINE
JSHIFT MARKER TO NEXT LINE

8CC

JBRANCH IF NCT LAST LINF

SCOPE
SRR AR

STEST 21:

AR A

A AN AR AR AR AR R AR AR AR R ANAR

AR AR AR R R AR

AR ARSI N RRR TS

TEST THAT MASTER TRANSMIT SCAN ENABLE (CSR BIT 8) ON A O
DISABLES TRANSMITTER READY (CSR BIT 15)
WHEN TCR BIT,

:PROBABLE FAULTY LOGIC:

LINE O IS SET.

M7285 (D2-6) E49.E23.E32.E33

'ttt*!ttfi't.fiiQ*..Q'tt'i"t.fi...li'fi...t'.'t.."tfit...tt....ttt'.t‘.t

124654

000001

001346
174636

174652

1S121:

1%:

CLR
BiS
MOV
MoV
8PL

HLT+1

1271

1272
1273

1281
1282

;R1 = LINE #

1261
1262
1263
1264
1265
1266
1267
1268
1269
1270

1280

a(SR,
.+

: _ XMTR CONTROL FOR LINE .LINE WAS CLEARED

1259
1260

1274
1275
1276
1277
1278
1279

“BRANCH IF OK

;WRONG LINE NUMBER APPEARED IN TBUF
;R1=LINE #{SHOULD BE)
:R2=LINE # (TBUF)

1236

1238

SEQ 0031

CMP
BEQ
HLT+2

104002

1237

1239
1240
1241
1262
1243
12644
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258

30A(1052)
26=FEB=79
15:47 PAGE
1ST20 "
TEST TRANSMIT READY

2%:
052777
005000
017701
100403

005200
001373
104007

020400
174610

174616

3%
4%:

BR
DEC
BNE

BIS
CLR
MOV
BM]
INC
BNE

HLT#+1

a(SR

#BIT0,.QTCR
TIMER RO

aCSR, R

;CLEAR CONTROL STATUS

sSET XMTR CONTROL BIT, LINE O
$GET TIMER FROM PREVIOUS TEST

;CHECK AND SAVE XMTR READY

:BRANCH IF MOT SET

s XMTR READY SET WITHOUT

JMASTER TRANS SCAN ENABLE

RO
s

SWAIT A WHILE
JAND CHECK AGAIN

:800.3(SR

<SET MASTER TRAN SCAN ENABLE

?ESR.

sCHECK AND SAVE XMTR READY

RO
4%

s TRAN READY NEVER CAH&

;TCR BIT WAS SET FIRS

22-CZDJA=F=C
CZDJAF P11
1283

004520
004526

004532
004534
004536

DJ11

LOGIC

30A(1052)
ISTZ1:

TEST MASTER TRANSMIT SCAN ENABLE

000001

174576

5%:

BIC

174566

26-FEB=79

104001

MOV
BPL
HLT+1

104400

SCOPE

100001

3
PAGE

MACYT1

26=FEB=75 15:41
042777
017707

T ESTS

AL AR AL

STEST 22:

15:47

#3170,

TEST

;THEN MASTER TRAN SCAN ENABLF

QTCR

aCSR,
.t

JCLEAR JT OuT

JCHECK AND SAVE TRAN READY
;BRANCH IF OK
:TRAN READY DIDN'T CLEAR.

2112132322232

TRANSMIT INTERRUPT LEVEL

2%2 222212222

I T

TMTMTM

PRI
IRT

:
:

ERROR PRINT QUT IS AS FOLLOWS::::
ADDR
DJADR
RO R1
ADDR=
ADDRESS OF ERROR HLT
DJADR= (SR ADDRESS OF DJ11 UNDER TEST

R1= BR LEVEL FOR DJ11 TO ALLOW INTR
R2= BR LEVEL WHERE ERROR OCCURED

;PROBABLE

FAULTY LOGIC:

M7821

WIRING,

017214
017214
014464

174566
174562

017214
017226

017216

TST22:

MOV

MoV
MOV
AGAINT: MOV
DEC
MOV
JSR

#INTR1,@XMTVEC

#340,aXMTLVL
#10,PRIOLO
#5,CT
PRIOLO

PRIOLO,NOW
5
BRSET

PR PR P PR

042737
053737
012777
012777
017701
100375

000340
017216
040400
000001
174456

177776
177776
174479
174466

004644

004644
004652
004654
0045656

BIC

815

MOV

WAIT1:
NINTR1:

023737
002407
000417

017216

MOV

BPL

#BITO.

alSR

WAl
T]

alCR

LOAD BR7+1 INTO BR TEST LEVEL

LOADS COUNTER S ROL -BR PRIOT
START TEST BR7, THEN BR6.BRS...ETC.
LOAD PRE-ROL-ED DECIMAL PRIO
G0 TO SUBROUTINE TO :z:::::
LOAD BR INTR LEVEL OF DJ11
(LEVEL)= DECIMAL #(0 1O 7)
(MASK)= OCTAL #(0 1O 340)

(0,40,100,140,200,240.300.340)

(NOW)= OCTAL #(0 TO 340) AS
MASK, BUT
CURRENTLY TESTING
CLEAR PS LEVEL
SET PS TO CURRENT TEST LEVEL
SET TRAN MASTER INT. ENABRLE
EEITTRAN CONTROL BIT, LINE C

:1F YOU ARE HERE NO INTR OCCURED

BLT
8R
INTR1:;

#040400,9CSR

NOW, 34PS

SET UP XMTR INTERRUPT VYECTOR
AT LEVEL 7

;

tmp

017220

#340, 34PS

004606
004614
004622
004630
004636
004642

1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338

TR TR

004656
000340
000010

004554
004562
004570
004574
004602

012777
012777
012737
012737
005337
013737
004737

P T

004546

R TS

004540

)

AR P

1321

PROPER PRICRITY CHIP

;t'ttt.t‘.Q.*"ttlt.tt..t‘I'it..t.'.fi.tt.tl't.ttt.tttfifl.ttt.ttt'ttttQt

b od o

d o

NINININININN

b red e oed

N 8 VNI
N WN=O IRERIRSLEY

THIS TESTS ALL INTERRUPT LEVELS. THIS TEST wWilLL
TEST ALL DEVICES WHICH ARE SPECIFIED DURING CUZSTIONING.

NOW, MASK
ERROR1
THRUT

;1F YOU ARE HERE AN INTR OCCURED

: IS THIS AN ERROR?222?

* BRANCH IF YES
* IF NO,GO ON TQ NEXT 3R

17=CZDCA-T=C
CZDJAF P11

1339

1340

1341

004656

004660

004666

‘11332%

004670

1344
1%22

004672

1347

0046672

DJ11 LOGIC T ESTS
26=FEB=79 15:41

022626

023737

002001

017216

MACYT1

30A(1052)
TST22:

0046746

TEST

TRANSMIT

CMP

017220

000411

ERROR1:
010146

SEQ@ 0033

ERROR1

. BRANCH [F ERROR

THRU1

3
PAGE 34

(SP)+,(SP)+

BR
;
3

INTERUPT LEVEL

NOW ,MASK

;

CLEAN UP THE STACK

1S THIS AN ERROR?772?
IF NO,SEE IF ALL BR LEVELS TESTED

YOU ARE HERE , THEN SOMETHING IS WRONG
ERROR YL .11

MOV

010246

15:47

CMP

BGE

)

;3323

26-FEB=79

RY,=(6)

MOV

sPUSH R1

R2,=-(6)

ON STA(K

sPUSH R2 ON STACK

1350
1351
1352

004676

013701

017220

MOV MASK,

004702

013702

017216

MOV NOw,

}_3,22

004706

104002

HLT+2

1357

004710

012602

MOV

(6)+,R2

;POP STACK INTO R2

CLR
LR
TST
BNE

aTCR
a(SR
NOW
AGAIN1

s TEST IF LAST BR WAS CHECKED
. BACK TO TEST NEXT INTR LOWER

ggz

1%’?3

1360
1361
1362
1363
1364

1367

1368

004712

004714

004714
00472C
004726
004730

004732

004740

012601

005077
005077
005737
001314

013777

012777

; %678

004746

042737

} g;}

004754

104400

1373

004756

005037

g;ls.

004762

012737

MOV

THRU1:

174404
174374
0i7216

G01336

000004

000340

174374

174370

END22:

177776

MOV

BIC

; R1=BR LEVEL ALLOWED
;. (BR BITS OF PSW)
; R2=BR LEVEL OF ERROR

(BR BITS OF PSW)

; REPORT ERROR+ REG.

(6)+,R1

1,2

;POP STACK INTO R1

: (NOW) =0

XMTLVL ,@XMTVEC

#I10T,

@XMTLVL

; RELOAD AND CLEAN UP

#340,a#PS

SCOPE
00134¢

004770

CLR

015250

MOV

1376

SRR

1377

;TEST 23:

1379
1380
1381

;
3
3

1378

A A

TIMER

#.+6,
AR

LAD

AR A R

sINITIALIZE

TIMER

sRESET LOOP ADDRESS

AR A AR R AR AR AR R R AR R AR RN R AR AT R R R R

RN RN O

TEST THAT LINE O CAN TRANSMIT AND

RECEIVE A CHARACTER.

(377)

1$:
2$:
4$:

CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE TIME.
(HECKS THAT NO ERRORS IN FI/FO
CHECKS THAT RIGHT LINE # (0) IN FI/ZFO

7$:

CHECKS THAT CHARACTER PRESENT CLEARS

1382
1383

:
:

1385
1386
1387

:
8%:
C(HECKS THAT DONE CLEARS
;PROBABLE FAULTY LOGIC: M7285 (D2=7) ALL; M7279 ALL. UART CARD D03 SERIES
SRR A A AR AR R AR AR A AR R AR AR A AR AR RN R AR AR N AR AR R R R R AR R AR AR RNRR RS PRI RO

1389

1384

1388

gg?
1392

1393

1394

004770

004737

0174600

58:
6%$:

C(HECKS FOR RIGHT CHARACTER LENGTH
C(HECKS THAT CORRECT DATA WAS RECEIVED

INITIALIZE

DEVICE''CSR'REGISTER

TsT23:

JUSR

PC.

a#INITD :BIfZ = MAINTENANCE
;BIT3 = CLEAR MOS

JBIT8 = MASTER XMTR SCAN ENR

2Z-CZDJA-F=0
CZDJAF P17

DJ11

LOGIC

TESTS

26=FEB=79 15:41

MACY?1

1395

;WAIT FOR MOS TO CLEAR

1396

1397
1398
1399

052777
017701
100375
012777
005000
105305
001376
017701

1401
1402
1403
1404

1405

1406

1407
1408
1409
1410
1411

100405
005200

001371
017702
104002

1412

1413

050037
032701
001401

005060
005070
005074
005076

1430
1431
1432
1433
1434
1435
1436
1437

005100
005104
005106
005110

1438
1439
1440
1441

005112
005174
005116
005720

010102
042792
000302
122702
001401
104001
117702
130201
001401

000377

174310

LOP23:

1%:

174272

SET:

001346
070000

3%:

4%:

1446

005132
005136
005142
005144

017701
022701
001407

100001
104007

104001

#BITO.

CLR
DECB
BNE

#377,
aTBUF
RO
RS
1%
aRBUF ,R1

;WAIT FOR CHAR.

1%
aCSR,

*SAVE CSR

BIS
BIT
BEQ
HLT+1

MOV
BIC

000000

aTCR
R1

aCSR,

LOP23

33
RO

RO, TIMER

#170377
,R2

HLT+1
174260

5%:

;SET XMTR CONTROL BIT, LINE O
;WAIT FOR XMTR READY

;SEND A RUBOUT
;CLEAR COUNTER

;SHORT WAIT LOOP
PRES.

;BRANCH WHEN FOUND
*TIME COUNTER
JBRANCH IF NOT TIME-QUT
;CHARACTER READY DIDN'T SET

:R1 = CONTENTS OF RBUF
*R2 = CONTENTS OF (SR

076000 Ri

0.,

aDJLEN, R2
R2,
R1
."

SAVE THE TIMER

CHECK FOR ERROR BITS
sBRANCH IF NONE
ERROR IN RECEIVED CHAR
*R1 = CONTENTS OF RBUF
;BIT14=UART OVERRUN

*BIT13=FRAMING ERROR
;BIT12=PARITY ERROR

;DUPLICATE DATA WORD
MASK L INE#
ILINE # IN LOW BYTE
1CHECK LINE #

BRANCH IF OK
WRONG LINE # RECEIVED
:R1 = CONTENTS OF RBUF

BITS8=11
= LINE #

1GET MASK OF CHARACTER

1CHECK CHAR LENGTH.
BRANCH IF OK
WRONG CHARACTER LENGTH

*R1=DATA FROM F1/FQ

6%:

001401
104002

017701

005130

170377

BIS

MOV
BPL
MOV

MOV
BMI
INC
BNE
MOV
HLT+2

174256

105102
120102

005122
005126

1447
1448
1449
1450

176322

104002

1442
1443
1444

1445

000001
174312

104001

1425
1426
1427
1428

1429

JBITO = RECEIVER ENABLE

1400

1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424

30A(1052)
15:47
26-FEB=79
PAGE 35
TST23:
TEST ALL OF LINE O TRANSMIT AND RECEIVE LOGIC

174174

174162
100405

7%:

8%:

R2
R1,
<+

aRBUF,
. th

Rl
aCSR,
0120405.R1
W

IR2=MASK (BITS SET NOT EXPECTED)
‘REVERSE THE MASK

*CHECK THE ACTURAL DATA

BRANCH IF OK
*WRONG CHAR LEN OR DATA ERROR
*R1=DATA FROM FI/FO (COMPLETE WORD)

R2=DATA (LOW BYTE) EXPECTED

‘READ FI/FO

‘BRANCH IF CHAR PRESENT NOT SET
CHARACTER PRESENT STAYED SET

R1 = CGNTENTS OF RBUF

*SAVE THE CSR
1CHECK THE CSR
‘BRANCH IF OK
:
*DONE DIDN'T CLEAR OR OTHER (SR ERROR
R1

= CONTENTS OF

CSR

SEC

0034

2Z-C2DJA=F=0
CZDJAF .P11

1451
1452
1453
1454
1455
145¢
1457
1458
1459
1460
1461
1462
1463

005146
005152
005156

DJ11

LOGIC

TESTS

26=FEB=79 15:41
005077
005077
104400

MACY11

174152
174142

CLR
CLR
SCOPE
LA

;

1480
1481
1482
1483
1484

1485
1486
1487

1488
1489
1490
1491

1492
1493
1494
1495
1496
1497

alCR
aCSR
S

38:

4%:

58:

6%:

8%:

7%:

SEQ 0035

;CLEAR T(R
.CLEAR (SR

TEST

1$:

;PROBABLE

THAT

LINE

2222222232222

CAN TRAMSMIT AND

RECEIVE A CHARACTER.

CHECKS

THAT

(HECKS

THAT RIGHT LiNE #

CHAR PRESENT

(377)
IS

IN FI/FO

(HECKS THAT NO ERRORS IN FI/FO
(1

IN REASONABLE

TIME.

IN F1/FO

C(HECKS FOR RIGHT CHARACTER LENGTH

C(HECKS THAT CORRECT DATA WAS RECEIVED

CHECKS

THAT

(CHARACTER PRESENT CLEARS

C(HECKS THAT DONE CLEARS

FAULTY LOGIC:

M7285

(D2-7)

ALL;

M7279 ALL;

UART

CARD D03 SERIES

'.'tQ"t'..'.‘fit'.'*l’tt."'.........fifit.tt."tttI.t.ttt..tt

t".t...ttt'

1468

1479

1467

1478

JTEST 24:

1464
1465
1466

1469
1470
1471
1472
1473
1474
1475
1476
1477

30A(1052)
26-FEB=79
15:47 PAGE 36
TST23:
TEST ALL OF LINE O TRANSMIT AND RECEIVE LOGIC

005160

005164
005172
005176
005200
005206
005210
005212
005214
005220
005222
005224
005226
005232

005234
005240
005244
005246

004737

014600

052777
017791

000002
174122

174132

012777
005000
105305
001376
017701

000377

174120

100375

100405

005200
001371
017702
104002

050037
032701
001401
104001

INITIALIZE

DEVICE''CSR' REGISTER

TST24:

JSR

AFINITD ;BIT2 = MAINTENANCE

:BIT3 = CLEAR MOS
;BITB = MASTER XMTR SCAN ENB

;WAIT FOR MOS TO CiEAR

;BITO = RECEIVER ENABLE

LOP24:

BIS

MOV

BPL

MOV

1%:

174102

174066

aCSR,

LOP24

#377,

RO
?g

MOV
BM]

SRBUF ,R1
3$

BNE
MOV

1%
a(SR,

HLT+2

#BIT1,

(LR
85%"

INC

001346
070000

PC,

BIS

BIT
BEQ

HLT+1

Q@TCR

ATBUF

;SET XMTR CONTROL BIT. LINE

SWAIT FOR XMTR READY

:SEND A RUBOUT

:CLEAR COUNTER
*SHORT WAIT LOOP

;WAIT FOR CHAR. PRES.
:BRANCH WHEN FOUND
:TIME COUNTER
JBRANCH iF NOT TIME-QUT
:SAVE (SR

; CHARACTER READY DIDN'T SET

:R1
= CONTENTS OF RBUF

RO, TIMER

#70000, R1
Y

:R2 = CONTENTS OF CSR
;SAVE THE TIMER

:THECK FOR ERROR BITS
SBRANCH IF NONE

:ERROR IN RECEIVED (HAR

*R1 = CONTENTS OF RBUF

:BIT14=UART OVERRUN
:BIT13=FRAMING t RROR
005250
005252
005256
005260
005264
005266

010102

042702
000302

122702
001401
104001

170377
000001

MOV

BIC

SWAB

(MPB
BEQ

HLT+1

#170377.R2

1.,
. +h

‘BIT12=PARITY (PR
R

JDUPLICATE DrTA wiRD

:MASK L INE#

SLINE # IN LOW BYTE

*CHECK LINE #
‘BRANCH IF 0K

SWRONG LINE # RECEIVED

27-CZDJA=F=0
CZDJAF .P11

DJ11 LOGIC TESTS
26-FEB-79 15:41

MACY11

3QA( 252)
26=FEB=79
15:47 PAGE 37
1§
TEST ALL OF LINE 1 TRANSMIT AND RECEIVE LOGIC
ST2
1

1507

1508

1509
1510

1511

1512

1513

JR1
005270
005274

005276

005300

117702
130201

174070

5%:

MG VB
BITB

001401

BEQ

104002

HLT+2

aDJLEN,
R2,
Lt

RZ
R1

1516
1517
1518
1519
1520
1521
1522

005302

105102

005304
005306
005310

120102
001403
104002

005312
005316
005320

017701
10000
104001

6%:

174004

005326
CC5332
005334

022701
001401
104001

1004C5

1530

005336

005077

173762

1531

;l'ssg

005322

005342

005346

017701

005077

10440C

(OMB

7%:

173772

§%:

MOV
BPL
HLT+1

aRBUF,
. *4

a(SR,

CMP
BEQ
HLT+1

#100405 ,R1
.+

CLR

aT(R

CLR

SCOPE

1535

STEST 25:

1537

1539
1540
1541

:
:
-

1536

;

1542
1543

:
:

1545

1544

1547
}gzg

00535C

024737

014600

005354
005362

052777
017701

000004
173732

173742

1560
1561
1562

005370
005376
005400

012777
005000
105305

000377

173730

005366

100375

RECEIVE A CHARACTER. (377>

78:
8%:

(HECKS THAT CHARACTER PRESENT CLEARS
C(HECKS THAT DONE CLEARS

TIME.

M7285 (D2-7) ALL: M7279 ALL; UART (ARD DO3 SERIES

TST?S

JSR

PCy

SINITD ;BIT2 = MAINTENANCE

:BIT3 = CLEAR MOS
;BIT8 = MASTER XMTR SCAN ENB

SET:

;BITO = RECEIVER ENABLE

BIS
MOV

#BIT2,
ECSR

Ql(R
R1

sSET XMTR CONTROL BIT, LINE ¢
JWAIT FOR XMTR READY

MOV
CLR
DECB

437

aTBUF

;SEND A RUBQUT
+CLEAR COUNTER
s SHORT WAIT LOOP

BPL

C(HECKS THAT RIGHT LINE # (2) IN FI/FO
(HECKS FOR RIGHT CHARACTER LENGTH
CHECKS THAT CORRECT DATA WAS RECEIVED

INITIAL
1 ZE
DEVICE''CSR'REGISTER

1%.

CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE

;
H

LOP25:

TEST THAT LINE 2 CAN TRANSMIT AND

1557
1558

DATA

;CHARACTER PRESENT STAYED SET
;sR1 = CONTENTS OF RBUF
s5AVE THE (SR
;CHECK THE (SR
;BRANCH IF 0K
;DONE DIDN'T CLEAR GR OTHER (SR ERROR

(HECKS THAT NO ERRORS IN FI/FO

R R

EXPECTED)

;WRONG CHAR LEN OR DATA ERROR
;R1=DATA FROM FI/FO (COMPLETE WOWD)
;R2=DATA (LOW BYTE) EXPECTED
;JREAD FI/FO
;BRANCH IF CHAR PRESENT NOT SCT

3$:

4%$:
58:
68:

NOT

;CLEAR (SR

]‘ggg

SET

THE MASK

sR1 = CONTENTS OF (3R

;WAIT FOR MOS TO CLEAR

1554

1559

18:

(BITS

JCHECK THE ACTURAL
JBRANCH IF Ok

s PROBABLE FAUUY LOGIC:

1546

JREVERSE

;CLEAR T(R

a(SR

1538

1551
1552
1553

JBRANCH IF CK

JR2=MASK

R1,
.t

MOV

173752

CMPB
BEQ
HLT+?2

1531.

1550

JGET MASK OF CHARACTER
;CHECK CHAR LENGTH,

JR1=DATA FROM FI/FO

15¢3
1524
1525
1526
1527
1528

1529

RRUF

JWRONG CHARACTER LENGTH

1514

1515

= CONTENTS OF

:BITSB-11 = LINE #

3°

3¢

21-CZDJA=F=0

CZDJAF .P1

1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604

005402
005404
005410
005412
005414
005416
005422
005424
005430
005434
005436

DJ11 LOGIC

TESTS

2€~FEB=79 15:4
001376
017701
100405

005200
001371
017702
104002

050037
32701
001401

MACYT1

BNE

173712

MOV

BM]
INC

173676

001346
0700C0

30A(1052)
15:47
26=FER=79
PAGE 38
TST125:
TEST ALL OF LINE 2 TRANSMIT AND RECEIVE LOGIC

3%:

1%
ARBUF ,R1

;WAIT

FOR CHAR,

SEQ 0037

PRES.

;BRANCH WHEN FOUND
:TIME COUNTER

RO
1%
aCSR,

;BRANCH IF NOT TIME=-OUT
;SAVE (SR

;CHARACTER READY DIDN'T SET
.R1 = CONTENTS OF RBUF

:R2 = CONTENTS OF (SR

RO, TIMER

a?booo R1

104001

:SAVE THE TIMER
sCHECK FOR ERROR BITS

;BRANCH IF NONE

;ERROR IN RECEIVED CHAR

;R1

= CONTENTS DOF RBUF

;BIT14=UART OVERRUN

;BIT13=FRAMING ERROR

005440
005442
005446
005450
005454
005456

010102
042702
000302
122702

001401

170377

4%:

R2
#2..
YA

#170377,R2

000002

104001

;BIT12=PARITY ERROR
;DUPLICATE DATA WORD

IMASK L INE#
sLINE # IN LOW BYTE
sCHECK LINE #
sBRANCH [F 0K
JWRONG LINE # RECEIVED

;R1 = CONTENTS OF RBUF

005460
005464
005466
005470

117702
130201

173700

5%:

aDJLEN, R2
R2.

001401

104C02

;BITSB-11 = LINE #

sGET MASK OF CHARACTER

sCHECK CHAR LENGTH.
SBRANCH IF 0K

: WRONG CMARACYER LENGTH

:R1=DATA FROM F[/FO

005472
005474
005476
005500

105102
120102

:R2=MASK (BITS SET NOT EXPECTED)

6%:

R2
R1,

SRBUF,
Y

MOV
cMP

aCSR,

(LR
(LR
SCOPE

arcr
a(SR

001401

104002

005502
005506
005510

017701

173614

’$:

005512
005516
005522
005524

017701
022701
001401
104001

173602
100405

8%:

005526
005532
005536

005077
005077

173572
173562

100001
104001

104400

BEQ
HLT+1

010040 R1

:REVERSE THE MASK

JCHECK THE ACTURAL DATA
:BRANCH IF OK
sWRONG CHAR LEN OR DATA ERROR
JR1=DATA FROM FI/FO (LOMPLETE WORD'

:R2=DATA (LOW BYTE) EXPECTED

*READ FJ/FO
JBRANCH IF CHAR PRESENT NOT SET
;CHARACTER PRESENT STAYED SET
;R1 = CONTENTS OF RBUF

sSAVE THE (SR
JCHECK THE CSR
JBRANCH IF OK
sDONE DIDN'T CLEAR OR OTHER (SR ERROR
sR1 = CONTENTS OF CSR
JCLEAR T(CR
sCLEAR (SR

"t.t!'tt.".'.Q'I."'.t..“"t.'.i.t'.‘l......‘..tt.l.....t.t......‘lll.i

JTEST 26:

1%:

3%:
(%

TEST THAT LINE 3 CAN TRANSMIT AND
RECEIVE A CHARACTER, (377)
CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE
CHECKS THAT NO ERRORS IN F1/FOQ
CHECKS THAT RIGHT LINE # ( ) IN F1/FQ

TIME.

22-CZDJA-F=0
CZDJAF P11

DJ11

LOGIC

TES S

26=FEB=79 15:4

MACY11

30A(1052)
26=FER=79 15:47 PAGE 39
TST26:
TEST ALL OF LINE 3 TRANSMIT AND RECEIVE LOGIC

5$:

6$:

7$:

8%:

PRGBABLE
AL ARL R

CHECKS FOR RIGHT CHARACTER LENGTH
CHECKS THAT CORRECT DATA WAS RECEIVED
CHECKS THAT CHARACTER PRESENT CLEARS

C(HECKS THAT DONE CLEARS
FAULTY LOGIC:
M7285 (D2=7)

AR SRS

ALL; M7279 ALL; UART CARD D03 SERIES

222222121211 T

INITIALIZE

DEVICE''CSR'REGISTER

005540

004737

?srzb

014600

JSR

PC,

SET:

A#¥INITD ;BIT2 = MAINTENANCE

;BIT3 = (LEAR MOS
;BIT8 = MASTER XMTR SCAN ENS

sWAIT FOR MOS TO CLEAR

SET:

;BITO = RECEIVER ENABLE

052777
017701

100375
012777
005000
105305
001376
017701
100405

005200
001371
017702
104002

050037
032701
001401

000010
173542

173552

000377

173540

LOP26:

1%:

173522

BNE
MOV
HLT+2

173506

001346
070000

BIS
MOV
BPL
MOV
CLR
DECB
BNE
MOV
BMI]
INC

3s:

BIS

BIT

BEQ
HLT+1

104001

#8173,

QaTCR

aCSR,

LOP26

#377,
a TBUF
RO
RS
1%
aRBUF ,R1

RO
18

a(SR,

sSET XMTR CONTROL BIT, LINE 3
;WAIT FOR XMTR READY

:SEND A RUBCUT
;CLEAR COUNTER
:SHORT WAIT LOOP
;WAIT FOR CHAR. PRES.

sBRANCH WHEN FOUND
s TIME COUNTER
sBRANCH IF NOT TIME-OUT
;SAVE (SR
s CHARACTER READY DIDN'T SET

sR1 = CONTENTS OF RBUF

076000 R1
TIMER

:R2= CONTENTS OF CSR

ISAVE THE TIMER
sCHECK FOR ERROR BITS
sBRANCH IF NONE

sERROR IN RECEIVED (HAR

:R1 = CONTENTS OF RBUF

:BIT14=UART OVERRUN
010102
042702
000302
122702
001401

170377

4%:

000003

..
.+

104001

173510

#170377,R2

5%:

DIPUCATE DATA WORD

sMASK LINEX
sLINE # IN LOW BYTE
; CHECK LINE #
BRANCH IF OK

WRONG LINE # RECEIVED
:R1 = CWTENTS Or RBUF

@DJLEN, R2
R

:BIT13=FRAMING ERROR
:BIT12=PARITY ERROR

:BITSB=11= LINE #

JGET MASK OF CHARACTER

:CHECK CHAR LENGTH.
sBRANCH IF OK

m CHARACTER LENGTH

R1=DATA FROM F1/FO

105102

120102

6%:

RZ-MSK (BITS SET NOT EXPECTED)
:REVERSE THE MASK
sCHECK THE ACTURAL DATA

SeC 0038

27-C2DJA=F=0
CZDJAF .P11
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690

DJ11 LOGIC TESTS
26=FEB=79 15:41

005666
005670

MACY11

N 3
30A(1052)
26~FEB=79
15:47 PAGE 40
TST26:
TEST ALL OF LINE 3 TRANSMIT AND RECEIVE LOGIC

001401

104002

005672
005676
005700

017701

005702
005706005712
005714

017701
022701
001401

173412
100405

005716
005722
005726
005730
005734

005077
005077

173402
173372

005237
012737

001364
005742

100001

173424

7%:

104001

MoV
BPL

ARBUF,
YA

MOV
CMP
BEQ
HLT+1

R1
(SR,
#100405, R1

CLR
CLR
SCOPE
INC

aTCR
ACSR

HLT+1

8%:

104001

104400

BEQ
HLT+2

015250

MOV
ML

I
R
L

;BRANCH IF OK

;WRONG CHAR LEN OR DATA ERROR

;R1=DATA FROM FI/FO (COMPLETE WORD)

-‘4

DJLEN
#.46,

JTEST 27:

SEQ 0039

;R2=DATA (LOW BYTE) EXPECTED

JREAD FI/FO

;BRANCH IF CHAR PRESENT NOT SET
;CHARACTER PRESENT STAYED SET
;R1 = CONTENTS OF RBUF

;SAVE THE (SR
;CHECK THE CSR

;BRANCH IF OK
;DONE DIDN'T CLEAR OR OTHER (SR ERROR
;R1 = CONTENTS OF CSR

;CLEAR T(R
;CLEAR (SR
LAD
iRl

222232

1222222232222

3122

TEST THAT LINE 4 CAN TRANSMIT AND
RECEIVE A CHARACTER. (377)

18:

CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE TIME.

4$:

C(HECKS THAT RIGHT LINE # (4)

38:

58:
€$:

7$:

CHECKS THAT NO ERRORS IN FI/FO

IN FI/FO

CHECKS FOR RIGHT CHARACTER LENGTH
CHECKS THAT CORRECT DATA WAS RECEIVED

CHECKS THAT CHARACTER PRESENT CLEARS
(HECKS THAT DONE CLEARS
s PROBABL E FAULTY LOGIC: M7285 (D2-7) ALL: M7279 ALL: UART CARD D03 SERIES

8%:

:'QQlttfifitfi't'*fit"t..t.t'tit.'tt'i.tttt't'ttt'itl'ltt.ttttttii"ttttt

VIS WA, ROV NOWVBWN—=O 3%

ININDN

- —h cd

b e

d =

d e

NN NNN NNNNNNNNNNN
nNON n b b b ek o b d b d b

1727
1728
1730

INITIALI ZE

DEVICE''CSR'REGISTER
005742

004727

014600

JSR

PC,

SE1:
¥ INITD ;BIT2 = MAINTENANCE

;BIT3 = CLEAR MOS
;BITB = MASTER XMTR SCAN ENB

;WAIT FOR MOS TO CLEAR

SET:

;BITO = RECEIVER ENABLE

005746
005754

052777
017701
100375
012777
005000
105305
001376
017701
100405
005200

001371
017702
104002

000020
173340

000377

173350

LOP27:

173336
1%:

173320

173304

BIS
MOV
BPL
MOV
CLR
DECB
BNE
MOv
BM]
INC
BNE
Mov
HLT+2

#BITS,
aCSR

LOP27

#377,

aTCR
R1

aTBUF

sSET XMTR CONTROL BIT, LINE 4
;WAIT FOR XMTR READY

;SEND A RUBOUT

s CLEAR COUNTER
<SHORT WAIT LOOP

sWAIT FOR CHAR. PRES.
:BRANCH WHEN FOUND
s TIME COUNTER
sBRANCH IF NOT TIME-QUT
+SAVE (SR

s CHARACTER READY DIDN'T SET

sR1

= CONTENTS OF RBUF

050037

001346
070000

26=FEB=79

15:47

TEST ALL OF

3s:

LINE &

4
PAGE 41

TRANSMiT AND RECEIVE LOGIC

SEG 0040

:R2 = CONTENTS OF (SR

RO, TIMER

~O—Wn

006016
006022
006026
006030

3?2%052)

p?éooo R1

*SAVE THE TIMER

:CHECK FOR ERROR BITS

:BRANCH IF NONE
:ERROR IN RECEIVED CHAR

*R1 = CONTENTS OF RBUF
‘BIT14=UART OVERRUN

006032
006034
006040
006042

006050
006052
006056
006060
006062

170377

001401

4%:

000004

104007

117702
130201
001401

173306

5%:

104002

105102
120102

6%:

006070
006072

001401

006074
006100
006102

017701

173222

7%:

006104
006110
006114
006116

017701
022701
001401

173210
100405

8%:

006120
006124
006130

005077
005077

173200
173170

104002

100001
104001

104001

8.,

SRR AR

T
L
T
L

L+

:BIT13=FRAMING ERROR
*BIT12=PARITY ERROR
sDUPLIZATE DATA WORD

:MASK L INE#

SLINE # IN LOW BYTE
:CHECK LINE #

*BRANCH IF

;WRONG LINE # RECEIVED

MOVB
BITB
BEQ
HLT+2

aDJLEN, RZ
R2,

coM8
CMPS
BEQ
HLT+2

L+

;R1 = CONTENTS OF RBUF
;BITS8-11 = LINE #

;GET MASK OF CHARACTER
;CHECK CHAR LENGTH.

;BRANCH IF OK

;WRONG CHARACTER LENGTH

;R1=DATA FROM FI/FO

;R2=MASK (BITS SET NOT EXPECTED)

sREVERSE THE MASK

R1,

MOV
BPL
HLT+1

aRBUF,

;BRANCH IF Ok
sWRONG CHAR LEN OR DATA ERROR
sR1=DATA FROM FI/FO (COMPLETE WORD)
:R2=DATA (LOW BYTE) EXPECTED
sREAD FI1/FO

MOV
mMP
BEQ
HLT+1

aCSR,

sSAVE THE CSR

#100405,R1
e

alCR

CLR
CLR
SCOPE

aCSR

irrsr 30:

104400

R2
c1?0377 R2

MOV

BIC
SWAB
BEQ
HLT+1

RN A

sCHECK THE ACTURAL DATA

:BRANCH IF CHAR PRESENT NOT SET
s CHARACTER PRESENT STAYED SET

sR1 = CONTENTS OF RBUF

sCHECK THE CSR

sBRANCH IF 0K
sDONE DIDN'T CLEAR OR OTHER (SR ERROR
:R1 = CONTENTS OF CSR
sCLEAR TCR

:CLEAR CSR
AR

AR AR AN AR AR AR

AR AR T RRARRR R AR

TR R

RAR R

TEST THAT LINE 5 CAN TRANSMIT AND

RECEIVE
A CHARACTER. (377)
CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE TIME.

CHECKS THAT NO ERRORS IN FI/FO

CHECKS
CHECKS
CHECKS
CHECKS
CHECKS

THAT RIGHT LINE # (5) IN FI1/FQ
FOR RIGHT CHARACTER LENGTH
THAT CORRECT DATA WAS RECEIVED
THAT CHARACTER PRESENT CLEARS
THAT DONE
C

PROEABLE FAULTV LOGIC: M7285 (D?-%) ALL; M7279 ALL: UART CARD DO3 SERIES
LR

LECELERRIK
[ SV, B W=
O W

)
ol sl

b s

D seed s

e e

e -

NRNY R NN NNNN NN~

1731

MACY11

I ®ow

CZDJAF .P11

DJ11 LOGIC TESYS
26~FEB=79 15:4

=moe——

72-CZDJA-F=0

*tltQ'tt.""..tI"Q't'"t"'....t'tlt'i.t'..l!llt‘t‘..‘Qtl.t.‘ilt.tt'.

INITIALIZE

2Z-CZDJA=F=0
CZDJAF .P11

TE S

26=FEB=79 15:4

MACYT1

006132

006136
006144
006150
006152
006160
006162
006164
006166
006172
006174
006176
006200
006204
006206
006212
006216
006220

006222
006224
006232
006236
006240

1830
1831
1832
1833

006252

1839

1840
1841

15:47
PAGE 42
TEST ALL OF LINE 5 TRANSMIT AND RECEIVE LOGIC

004737

TST30:

014600

JSR

052777
017701

000040
173150

173160

012777
005000
105305
001376
017701

000377

173146

100375

100405

005200
001371
017702
104002

050037
032701
001401

LOP30:

1%:

173130

BNE

173114

001346
070000

BIS

MOV
BPL
(0}
CLR
DECB
BNE
MOV
BMI
INC

MOV

HLT+2

3%:

104001

BIS
BIT
BEQ

SET:
Q#INITD ;BIT2 = MAINTENANCE

;BIT3 = CLEAR MOS
;BIT8 = MASTER XMTR SCAN ENB

TO CLEAR

SET:
;BITO = RECEIVER ENABLE

#BITS,

QTCR

aCSR,”

LOP30

#377,
QTBUF
RO
RS
1%
aRBUF ,R1

RO
1%

a(SrR,

Re2

RO, TIMER

c76000 R1

HLT+1

;SET _XMTR CONTROL BIT, LINE 5
:WAIT FOR XMTR READY

;SEND A RUBOUT

;CLEAR COUNTER
;SHORT WAIT LOOP
;WAIT FOR CHAR.

PRES.

sBRANCH WHEN FOUND
s TIME COUNTER

;BRANCH IF NOT TIME-OUT
;SAVE (SR
CHARACTER READY DIDN'T SET
R1 = CONTENTS OF RBUF
RZ = CONTENTS OF CSR
;SAVE THE TIMER
;CHECK FOR ERROR BITS

:BRANCH IF NONE

'ERRm IN RECEIVED CHAR
R1 = CONTENTS OF RBUF

'BITM#IART OVERRUN
;BIT13=FRAMING ERROR

006242
006246

1835
1836
1837
1838

ST30:

26=FEB=79

JWAIT FOR MOS

1827
1828

1829

SOA 1052)

DEVICE''CSR'REGISTER

G SERREREER 333
=

1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825

1842

LOGIC

Wn)
—

1787
1788
178%
1790

DJ11

010102
042702

170377

122702

000005

000302
001401

4%:

117702

173116

#170377.R2

104001

130201

5%:

001401

aDJLEN, R2
R2,
R1
e

104002

:BIT12=PARITY ERROR

:DUPLICATE DATA WORD
sMASK LINE#®
sLINE # IN LOW BYTE
sCHECK LINE #
sBRANCH IF OK
SWRONG LINE # RECEIVED

sR1 = CONTENTS OF RBUF
;BITSB-11 = LINE #
sGET MASK OF CHARACTER
s CHECK CHAR LENGTH.

sBRANCH IF OK
+ WRONG CWACTER LENGTH

:R1=DATA FROM FI/FO

006254
006256

006262
006264
006270
006272

105102
120102

6%:

001401

100001
104001

R1,

3 ’4

104002

017701

173032

7%:

aRBUF,
n"

:R2=MASK (BITS SET NOT EXPECTED)

:REVERSE THE MASK

:CHECK THE ACTURAL DATA
sBRANCH IF OK
sWRONG CHAR LEN OR DATA ERROR

:R1=DATA FROM F1/FQO (COMPLETE WORD)
;R2=DATA (LOW BYTE) EXPECTED
<READ FI/FO
sBRANCH IF CHAR PRESENT NOT SET
sCHARACTER PRESENT STAYED SET
;R1 = CONTENTS OF RBUF

SEQ 0041

ZZ-CZDJA-F=0
CZDJAF .P11

1843

1844

1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860

DJ11

LOGIC

TESTS

26=FEB-79 15:41

006274
006300
006304

017701
022701
001401

173020
100405

006310
006314
006320

005077
005077

173010
173000

006306

MACY11

30A(1052)

TST30:

TEST ALL OF

8%:

MOV

aCSR,

BEQ
HLT+1

CMP

104001

104400

26~FEB=79

3%:

4%:

5%:
6%:
7$:

AR R

TRANSMIT AND RECEIVE LOGIC

;SAVE

THE

CSR

sBRANCH IF OK
;DONE DIDN'T CLEAR OR OTHER (SR ERROR
;R1 = CONTENTS OF (SR
;CLEAR TCR
;CLEAR CSR

TEST THAT LINE 6 CAN TRANSMIT AND
RECEIVE A CHARACTER. (377)
CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONASLE
CHECKS THAT NO ERRORS IN FI/FO
CHECKS THAT RIGHT LINE # (6) IN FI/FO
CHECKS FOR RIGHT CHARACTER LENGTH
CHECKS THAT CORRECT DATA WAS RECEIVED
CHECKS THAT CHARACTER PRESENT CLEARS
C(HECKS THAT DONE CLEARS

AR Rttt

222

2222222222222

INITIALIZE

004737

T ST31:

014600

JSR

PC,

Q¥ INITD

sWAIT FOR MOS TO CLEAR

SET:

;BIT2 = MAINTENANCE
;BIT3 = CLEAR MOS
;BIT8 = MASTER XMTR SCAN ENB

SET:

:BITO = RECEIVER ENABLE

052777

017701

100375
012777
005000
105305
001376

017701

100405

005200
001371
017702
104002

050037
032701
001401

000100
172760

172770

000377

172756

LOP31:

MOV

1%:
172740

3%:

010102

BIS

BIT

B*Q

104001

006412

CLR
DECB
BNE
MOV

BMI
INC
BNE
Moy
HLT+2

172724

001346
070000

BIS
MOV
B8PL

#BiT6,
aCSR,

ATCR
R1

:SET XMTR CONTROL BIT, LINE 6
SWAIT FOR XMTR READY

#377,

QTBUF

;SEND A RUBOUT
sCLEAR COUNTER
sSHORT WAIT LOOP
sWAIT FOR CHAR. PRES.

a(SR,

MoV

sBRANCH WHEN FOUND
;TIME COUNTER
sBRANCH IF NOT TIME-OUT
sSAVE (SR
s CHARACTER READY DIDN'T SET

sR1 = CONTENTS OF RBUF

:R2 = CONTENTS OF (SR

RO, TIMER

crgooo. R1
+

HLT+1

4%:

R1,

TIME.

M7285 (D2-7) ALL; M7279 ALL:; UART CARD DO3 SERIES

DEVICE''CSR'REGISTER
006322

SEQ 0042

;CHECK THE CSR

alCR
aCSR

8%:
; PROBABL E FAULTY LOGIC:
LR

4
PAGE 43

Rl 111222222
3222222222
222
111 2
T T TMTM

1$:

1861
1862
1863

LINE

#100405,R1

CLR
CLR
SCOPE

STEST 31

15:47

sSAVE THE TIMER

:CHECK FOR ERROR BITS
+BRANCH IF NONE
;ERROR IN RECEIVED CHAR
sR1 = CONTENTS OF RBUF
sBIT14=UART OVERRUN

:BIT13=FRAMING ERROR
¢BIT12=PARITY ERROR
;DUPLICATE DATA WORD

33T

Z2=-CZDJA=F=0
CZDJAF P11

1899
1900
1901
1902

1903

1904

1905

1906
1907

1908
1909
1910

911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928

28233

006414
006420
006422
006426

006430
006432
00643¢

0C6440
006442

DJ11 LOGIC TESTS
26=FEB=79 15:41

042702
000302
122702
001401

BIC
SWAB

000006

CMPB

172726

5%:

aDJLEN,
R2,

BEQ
HLT+2

105102
120102
001401
104002

006454
006460
006462

017701
100001
104001

172642

006464
006470
006474
006476

017701
022701
001401
104001

172630
100405

006500
006504

005077
005077

172620
172610

. *h

COM3
CMPB
BEQ
HLT+2

R2
R1,
.+

7%:

MOV
BPL
HLT+1

aRBUF,
4

8%:

MOV
CMP
BEQ

aCSR,
R1
#100405 ,R1
.+

CLR
CLR

aT{R
aCSR

SCOPE
A

1932

sTEST 32:

1633

R?2
R1

6%:

HLT+1

19%1

SEQ 0043

JMASK L INE#
JLINE # IN LOW BYTE
JCHECK LINE #
JBRANCH IF 0K

JWRONG LINE # RECEIVED

JR1 = CONTENTS OF RBUF

MovB
BITB

001401
104002

104400

#170377 ,R2
R2
#6.,
R2
.+

BEQ
HLT+1

104001

117702
130201

30A(1052)
26~FEB=79
15:47
PAGE 44
TST31:
TEST ALL OF LINE 6 TRANSMIT AND RECEIVE LOGIC

170377

006444
006446
006450
006452

006570

MACYT1

:BITS8=11 = LINE #

;GET MASK OF CHARACTER
;sCHECK CHAR LENGTH.

;BRANCH IF OK
;WRONG CHARACTER LENGTH

;R1=DATA FROM FI/FO
;R2=MASK (BITS SET NOT EXPECTED)
;REVERSE THE MASK
;sCHECK THE ACTURAL DATA
sBRANCH IF OK
;WRONG CHAR LEN OR DATA ERROR
R1‘DATA FROM FI1/FO (COMPLETE WORD)
R2=DATA (LOW BYTE) EXPECTED
;JREAD F1/F0

.'BRANCH IF CHAR PRESENT NOCT SET
;CHARACTER PRESENT STAYED SET
;R1 = CONTENTS GF RBUF

sSAVE THE CSR
;CHECK THE CSR
;BRANCH IF OK
:DONE DIDN'T CLEAR OR CTHER CSR ERROR
sR1 = CONTENTS OF CSR
;CLEAR T(CR
;CLEAR CSR

R AR AN AR R R R R AR R AR

AR AR

R AR AR RN RAANAARRR TSR

TEST THAT LINE 7 CAN TRANSMIT AND

RECEIVE A CHARACTER.

(377)

1934

1936

4%:

CHECKS THAT RIGHT LINE # (7) IN FI/FO

1938

;

6%:

CHECKS THAT CORRECT DATA WAS RECEIVED

1940
1941

s
8%:
C(HECKS THAT
CLEARS
;PROBABLE FAULTY LOGIC: M7285 (D2-7) ALL: M7279 ALL: UART CARD D03 SERIES

1964

1935

1937

1939

13462
1943

1947

006512

004737

014600

1949

1950
1951
1954

58:

7%:

CHECKS THAT NO ERRORS IN FI/FO

CHECKS FOR RIGHT CHARACTER LENGTH

CHECKS THAT CHARACTER PRESENT CLEARS
S

. INITIALIZE

DEVICE''CSR'REGISTER

1ST32:

JSR

PC.

006516

052777

000200

172600

BIS

#BIT7,

T T

N NI N

T T T

TI T

;BIT3 = CLEAR MOS

;BIT8 = MASTER XMTR SCAN ENB

SET:

AFINITD ;BIT2 = MAINTENANCE

;WAIT FOR MOS TO CLEAR
2
.

1952

1953

38:

CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE TIME.

;&2

1948

18:

;BITO = RECEIVER ENABLE

QTCR

sSET XMTR CONTROL BIT, LINE 7

22-CZDJA=F=0
CZDJAF .P11
1955

1956

1957

1958
1959

1960

1961

1962
1963

1964

1965

1966

1967
1968

1969

1970

1971
1972
1973
1974
1975
1976

006524

006530

006532

006540
006542

006544

006546

006552

006554

006556

006560

006564

006566

006572

006576
006600

DJ11 LOGIC TESTS
26-FEB=79 15:41
017701

172570

012777

000377

100375

005000
105305

001376

017701

100405

017702

104002

050037

032701
001401
104001

006602

010102

1979
1980
1981
1982

006610
006&12
006616
006620

000302
122702
001407
104001

1985
1986

006622
006626

117702
1302C1

1983
1984

1987

1988

1989
199G

006604

006630

006632

042702

105102
120102
001401
104002

1997
1998

006644
006650

017701
100001

1995

2001
2002

006652

006654
006660

172550

4$:

000007

172536

5%:

172452

7%:

172440
100405

006670
006( -

005077
005077

172430
172423

006702
006706

005237
012737

001364
006714

8$.

INC

STIME COUNTER

MOV

2CSR,

BIT

:SAVE

L+

*BRANCH IF NONE
;ERROR IN RECEIVED CHAR
:R1 = CONTENTS OF RBUF
:BIT14=UART OVERRUN
*BIT13=FRAMING ERROR
:BIT12=PARITY ERROR

#170377.R2

SWAB
CMPB
BEQ
HLT+1

R2
#7..
.+

MOVB
8ITR

@DJLEN, R2
R2,
R1

:DUPLICATE DATA WORD
:MASK L INE#

SLINE # IN LOW BYTE
:CHECK LINE #
*BRANCH IF 0K
;WRONG LINE # RECEIVED

;R1 = CONTENTS OF RBUF
SBITSB-11 = LINE #

:GET MASK OF CHARACTER
:CHECK CHAR LENGTH.
;WRONG CHARACTER LENGTH

*R1=DATA FROM FI/FO
;R2=MASK (BITS SET NOT EXPECTED)

R2
RI1,
i 1

MOV
BPL

SRBUF,
.+

(SR,
RI
#100405 R

(LR
(LR

aTCR
MBCSR

. +h

:R1=DATA FROM F1/FO (COMPLETE WORD)
;R2=DATA (LOW BYTE) EXPECTED
*READ FI/FO
:BRANCH IF CHAR PRESENT NOT SET

;R1 = CONTENTS OF RBUF

*SAVE THE CSR
SCHECK ThE CSR

SBRANCH IF OK
;DONE DIDN'T CLEAR OR CTHER CSR ERROR

SR1 = CONTENTS OF CSR
SCLEAR TCR
:CLEAR (SR

DJLEN
#.+6,

*REVERSE THE MASK
:CHECK THE ACTURAL DATA
*BRANCH IF OK
:WRONG CHAR LEN OR DATA ERROR

;CHARACTER PRESENT STAYED SET

MOV
CMP

INC
MOV

THE TIMER

*CHECK FOR ERROR BITS

SBRANCH IF OK

(OMB
o
(MPB ~
BEG
HLT+2

*SAVE CSR

:CHARACTER READY DIDN'T SET

RO, TIMER

*BRANCH IF NOT TIME-OUT

:R1 = CONTENTS OF RBUIF
:R2 = CONTENTS OF CSR

#70000, R?

MCV

PRES.

*BRANCH WHEN FOUND

BIS

SEQ 0044

*CLEAR COUNTER
*SHORT WAIT LOOP

;WAIT FOR CHAR.

SCOPE

(15250

;SEND A RUBOUT

BEG
HLT+1

QTBUF

HLT+1

017701
0227017

#377,

ARBUF ,R1

HLT+2

6$:

JWAIT FOR XMTR READY

MOV

BEQ

104001

104400

BNE

BEQ
HLT+1

170377

2006
2007

00¢ 0

RO
RS

HLT+2

001346

001407
104001

2008

CLR
DECB

BNE

070000

aCSR

LOP33

BM]

172534

006664
006666

2009
2010

MOV

BPL

MOV

1$:

2003
2004

2005

172566

104002

006634
006636
006640
006642

2000

LOR32:

0014C1

1991
1992
1993
1994

1995
1996

F
o4
30A(1052)
26=FEB=79
15:47
PAGE 45
TST32:
TEST ALL OF LINE 7 TRANSMIT AND RECEIVE LOGIC

005200

001377

1977

1978

MACY11

LAD

22=(2DJA=F=0
CZDJAF P

DJ11 LOGIC TESTS
CE=FEB=7% 15:41

MACYTM1

1
5812

2018

2022

006714

]
004737

014600

2030

2031
2032
gg%z

006720
006726

052777
017701

000400
172366

172376

2038
2039
2040
2041
2042
2043
2044
2045
2046
2047

006734
006742
006744
006746
006750
006754
006756
006760
006762
006766

012777
005000
105305
001376
017701
100405
005200
001371
017702
104002

000377

172364

2050

2051

006732

006770

006774

100375

050037

(032701

2052
2053

007000
007002

001401
104001

2058

007004

019102

206C

007012

000302

2054
2055
2056
2057

2059

2061
2062
2063

2064
2065
2066

3%:
4%:

(MHECKS THAT NO ERROR3S IN FI/FO
CHECKS THAT RIGHT LINE # (8) IN FI/FO

2
.
:

6%:
7%:
8%:

C(HECKS THAT CORRECT DATA WAS RECEIVED
(HECKS THAT CHARACTER PRESENT CLEARS
C(HECKS THAT DONE CLEARS

SRR R R R

A R R R AR AR R

:
2
:
1ST33:

INITIALIZE
DEVICE'‘CSR'REGISTER

5%:

C(HECKS FOR RIGHT (HARACTFR LENGTH

JSR

M7285 (D2=7) ALL; M7279 ALL: UART CARD DC3 SERIFS

AR AN

N R R R R R I AN AN AN R A F N AR R AR AR A AR ARSI A AP R AP R ARSI AT A

SET:
a#INITD ;BIT2 = MAINTENANCE

PC,

;BIT3 = CLEAR MOS

JBIT8 = MASTER XMTR SCAN ENS

JWAIT FOR MOS TO CLEAR
3
:

2035
2036

2049

PAGE

TEST THAT LINE 8 CAN TRANSMIT AND
RECEIVE A CHARACTER. (377)
(HECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE TIME.

;PROBABLE FAULTY LOGIC:

2023

2048

s
:

2019
2020
2021

2037

15:47

TEST ALL OF LINE 8 TRANSMIT AND RECEIVE LOGIC

(TEST 33:
3
:
1$:

2016
207

2029

TST33:

26<FEB=79

"Ifitttttt!'tt!'tt.t!ttt!.it'lttfittittttttttt.tt'ttttlt.!tt'tttttttntttrn

2013
2014
2015

2024
2025
2026
2027
2028

30A{1052)

007006

007014
007020
007022
007026

1%:
172346

172332

001346

070000

042702

170377

122702
001401
104001

000010

117702

LOP33:

172334

3%:

4%:

BIS
MOV

#3178,
a( SR

MOV
CLR
DE(B
BNE
MOV
B8M]
INC
BNE
MOV
HLT+2

#377,
QTBUF
RO
RS
1%
@RBUF ,R1
3%
RO
1%
alSR,
R?2

BIS

RO, TIMER

BEOQ
HLT#*3

BPL

BIT

MOV

QTCR
R1

LOP3%

076000. R1

;SEND A RUBOUT
;CLEAR COUNTER
SHORT WAIT LOOP
JWAIT FOR CHAR. PRES.

;BRANCH WHEN FOUND
;TIME COUNTER
;BRANCH IF NOT TIME-QUT
;SAVE (SR
s CHARACTER READY DIDN'T SET

;SAVE THE TIMER

sCHECK FOR ERROR BITS

JBRANCH IF NONE
;ERROR IN RECEIVED CHAR

sR1 = CONTENTS OF RBUF
;BIT14=UART OVERRUN
;BIT13=FRAMING ERROR

#170377 ,R2

CMPR
BEQ
HLT+1

#8..
.+

MOVR

;SET XMTR CONTROL BiT, LINE B
JWAIT FOR XMTR READY

;R1 = CONTENTS OF RBUF
;RZ = CONTENTS OF CSR

BIC

SWARB

5%:

SET:
;BITO = RECEIVER ENABLE

aDJLEN, RZ

;JBIT12=PARITY ERROR

+sDUPL ICATE DATA WORD

:MASK L INE#

JLINE # IN LOW BYTE

JCHECK LINE #
JBRANCH IF 0K
JWRONG LINE # RECEIVED

+R1 = CONTENTS OF RBUF
JBITS8=11 = LINE #

sGET MASK OF C(HARACTER

27=-CZDJA=F=0
CZDJAF P11

2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077

2078
2079

007030
007032
007034
007036
007040
007042
007044
007046
007052
007054

DJ11

LOGIC

TESTS

26-FEB-7G 15:41

MACY11

H 4
30A(1052)
26=FEB=79
15:47 PAGE 47
TST33:
TEST ALL OF LINE 8 TRANSMIT AND RECEIVE LOGIC

130201
007401

104002

105102
120102

6%:

0067056
007Gé2
067066
007070

017701
022701
001401

007072
007076
007102

005077
005077

172250

7%:

172236

ALAEE

1$:

TR TR TP

wid-

“$:

6$:

7$:

8%:

004737

Gi4600

;CHARACTER PRESENT STAYED SET

;R1 = CONTENTS OF RBUF
*SAVE THE CSR
*CHECK THE CSR

Y o§

NONH W

d = o

N=O OV

e g

PONIND =2 wd = ed el =

A LSS LSLS VLSS LSS LSV ] N

001376
017701
100405

001000

172206

000377

172174

172176

TEST THAT LINE 9 CAN TRANSMIT AND
RECEIVE A CHARACTER. (377}
C(HECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE

C(HECKS THAT NO ERRORS IN FI/FO

C(HECKS THAT RIGHT LiNE # (9)

C(HECKS THAT DONE CLEARS
A

R A

M7285

INITIALIZE

DEVICE''CSR'REGISTER

tST34:

JSR

TMTM

TIMF_

IN FI/FO

PC,

(D2-7)

AN R AN AR R

ALL; M7279 ALL:
R R AR AR R AR

UART CARD D03 SERIES

AR R RN AR

SINITD ;BIT2 = MAINTENANCE

:BIT3 = CLEAR MCS
*BIT8 = MASTER XMTR SCAN ENB

:BITO = RECEIVER ENABLE
BIS
MOV
BPL
MoV
(LR

#3179,
@CSR,
LOP34
N377,
RO
?g

sCLEAR COUNTER
sSHORT WAIT LOOP

MOV

aRBUF ,R1

JWAIT FOR CHAR. PRES.

A R RN

:WAIT FOR MOS TO CLEAR

BM]

CHECKS THAT CORRECT DATA WAS RECEIVED

;

gsg&

C(HECKS THAT CHARACTER PRESENT (LEARS

R R R

LOP34:

CHECKS FOR RIGHT CHARACTER LENGTH

AR R

1%:

172156

;R1 = CONTENTS OF (SR
;CLEAR T(CR
:CLEAR (SR

2109

052777
017701
100375
012777
005000
105305

DATA

:R2=DATA (LOW BYTE) EXPECTED
sREAD FI/FO
:BRANCH IF CHAR PRESENT NOT SET

:BRANCH

FAULTY LOGIC:

R R

THE ACTURAL

;BRANCH IF OK

;WRONG CHAR LEN CR DATA ERROR
;R1=DATA FROM FI/FO (COMPLETE WORD)

PROBABLE

007704

;CHECK

;DONE DIDN'T CLEAR OR OTHER (SR ERROR

alCR
a(SR

3$:

CLR
(LR
SCOPE

'-rESI 34:

JREVERSE THE MASK

aCSR, _ R1
#100405,R1

CMP
BEQ
HLT+1

172226
172216

JBRANCH 1F OK
;WRUNG CHARACTER LENGTH

;R2=MASK (BITS SET NOT EXPECTED)

aRBUF,
.t

MOV

;CHECK CHAR LENGTH.

;R1=DATA FROM FI/FO

. th

MOV
BPL
HLT+1

8%:

100405

R1,

HLT+2

104001

104400

c(omM3

BEQ

104002

100001
104001

R2,

CMPB

001407

017701

BITB
BEQ
HLT+2

.‘)(‘ G

QTCR
R1

sSET XMTR CONTROL BIT, LINE &
<WAIT FOR XMTR READY

a TBUF

;SEND A RUBQUT

JBRANCH WHEN FOuUND

J"J(":

DJ11

LOGIC

TESIS

26=FEB=79 15:41

007146
007150
007152
007756

005200
001371
017702

007160
007164
007170
007172

050037
032701
001401

104002

Yil

30A 1052)

ST34:

26-FEB=79

15:47

b —
—d
v

—

2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156

2157
2158
2159
2160

2161
2162

2163
2164

2165

2166

2167

2168
2169

2170
2171
2172
2i73
2174
2175
176

2177
2178

PAGE 48

;TIME COUNTER

172142

aCSR,

3%:

001346
070000

TEST ALL OF LINE 9 TRANSMIT AND RECEIVE LOGIC

RO, TIMER

#70000,
R

104001

;BRANCH

010102
042702
000302
122702
001407
104001

170377

4%:

000011

;SAVE THE TIMER

;CHECK FOR ERROR BITS
;BRANCH IF NONE

117702
130201
001401
104002

007226
007230
007232
007234

105192
120102

172144

5%:

:DUPLICATE DATA WORD

JLINE # IN LOW BYTE
:CHECK LINE #
*BRANCH IF OK

:MASK L INE#

;WRONG LINE # RECEIVED

aDJLEN, RZ
R2.
R1
.+

6£%:

R1,

001401

104002

= CONTENTS OF RBUF

;BIT14=UART OVERRUN
;BIT13=FRAMING ERROR
;BIT12=PARITY ERROR

;R1

007214
007220
007222
007224

TIME-OUT

;ERROR IM RECEIVED CHAR

#170377.R2

R2
#9.,
.+

NOT

;CHARACTER READY DIDN'T SET

;R1

007174
007176
007202
007204
007210
007212

;SAVE (SR

SEC 0047

:R1 = CONTENTS OF RBUF
;R2 = CONTENTS OF (SR

T AN
AA
nINONY
VI SN SVRIFRNRAIINA OO0~

NINIPINY (ASTANTAN
T ST, ST TNLSIAS AN AN T VT N T, W T,V

22-(ZDJA=F=0
CZDJAF .P1T

= CONTENTS OF RBUF

;BITS8-11 = LINE #

;GET MASK OF CHARACTER
;CHECK CHAR LENGTH.
;BRANCH IF OK

;WRONG CHARACTER LENGTH
;R1=DATA FROM FI/FO

sR2=MASK (BITS SET NOT EXPECTED)
sREVERSE THE MASK

sCHECK THE ACTURAL DATA

:BRANCH IF 0K

sWRONG CHAR LEN OR DATA ERROR

:R1=DATA FROM FI/FO (COMPLETE WORD)

007236
007242
007244

017701
100001
104001

007246
007252
007256
007260

017701
022701
001401

007262
007266
007272

005077

172060

172046

100405

7%:

aRBUF,
.+

8%:

MOV
CMP

BEQ

104001

005077
104400

HLT+1

172036
172026

CLR
CLR
SCOPE
AR

:TEST 55:
'
‘
.
.

’
.

alSR,

:R2=DATA (LOW BYTE) EXPECTED

+READ FI/FO
:BRANCH IF CHAR PRESENT NOT SET

s CHARACTER PRESENT STAYED SET

sR1 = CONTENTS OF RBUF
:SAVE THE CSR

#100405 ,R1

:CHECK THE CSR

. 4

sBRANCH IF OK

alCR
a(SR

sCLEAR TCR
sCLEAR (SR

A AR A AR AR

sDONE DIDN'T CLEAR OR OTHER (SR ERROR

A R

;R1 = CONTENTS OF CSR

AR AN AR R AR R AR AR R

AR AR R AR

R AR

R AR R RN AR

TEST THAT LINE 10 CAN TRANSMIT AND
RECEIVE A CHARACTER. (377)
CHECKS THAT (HAR PRESENT IS IN FI/FO IN REASONABLE TIME.
CHECKS THAT NO ERRORS lN FI/FO
CHECKS THAT RIGHT LINE
# (10) IN FI/FOQ
CHECKS FOR RIGHT CHARACTER LENGTH
CHECKS THAT CORRECT DATA WAS RECEIVED

CHECKS THAT CHARACTER PRESENT CLEARS

D11

LOGIC

TESIS

26=FEB=79 15:41

MACYT1

8%:

PROBABLE

d
e

007274

004737

1ST35:

014600

C(HECKS THAT DONE CLEARS
M7285 (D2-7) ALL; M7279 ALL; UART CARD DO3 SERIES

FAULTY LOGIC:

INITIALIZE
DEVICE''CSR'REGISTER

e
o ad e

SEQ 0048

tttt'ttttt

[* <]

UL
LNd L DL adS LNb TSb TS
b o o

ttttttttttt..tt't.fi'.tl‘"'i'l.'itltttttttt'lttfi*ltttfiitt'tfitt

SEERT: ERR2V28 ELRRRRL

L.VENTIN
ST,V T NT Y

2176
2180
2181

30
QA((1052)
26-FEB~79 15:47 PAGE 49
TEST ALL OF LINE 10 TRANSMIT AND RECEIVE LOGIC
TS1 5:
(H—l

77=-CZDJA=F=Q
F
. P11
CZDJA

JSR

sWAIT FOR MOS

PC.

a#INITD

TO CLEAR

SET:

;RIT2 = MAINTENANCE

:BIT3 = CLEAR MOS
;BIT8 = MASTER XMTR SCAN ENS
SET:

;BITO = RECEIVER ENABLE

007300
007306
007312
007314
007322
007324
007326
00733C
007334
607336
007340
007342
007346
007350
007354
007360
007362

052777
017701

002000

172016

012777
005000

000377

172004

100375

172006

105305

001376
017701

100405
005200

001371
017702
104002

050037
032701
001401

LOP3S:

1%:
171766

171752

001346
070000

3%:

BIS
MOV
BPL
MOV
CLR
DE(R
BNE
MOV
8M]
INC
BNE
MOV
HLT+2

BIS

BIT

BEQ

104001

#BI1T10, aTCR
= R1
aCSR,

sSET XMTR CONTROL BIT, LINE 10
;WAIT FOR XMTR READY

#4377,
QTBUF
RO
RS
1%
arBUF ,R1

;SEND A RUBOUT
;CLEAR COUNTER
;SHORT WAIT LOCP

LOP3S

RO
1%
a(SR,

RO, TIMER

072000 R1
+

HLT+1

;WAIT FOR CHAR. PRES.

;BRANCH WHEN FOUND
;TIME COUNTER

;BRANCH IF NOT TIME-OUT
;SAVE CSR
;CHARACTER READY DIDN'T SET

;R1 = CONTENTS OF RBUF
;R2 = CONTENTS OF CSR

;SAVE THE TIMER
sCHECK FOR ERROR BITS
;BRANCH IF NONE

;ERROR IN RECEIVED CHAR

sR1 = CONTENTS OF RBLF

;BIT14=UART OVERRUN

007364
0073€6
007372
007374
007400
007402

010102
042702
000302
122702
001401
104001

007404
007410
007412
007414

117702
130201

007416

007420
007422
007424

170377

4%:

SWAB
(MPB

000012

HLT+1
171754

5%:

01401

10002

105102

120102
007401

104002

MOV
BIC

MovB
BIIB
BFQ

HLT+2

6%:

L OMB
CFPB
BEQ
HLT+2

R1,

#170377 ,R2

219.,.
+4

DJLEN, R2
RZ.
YA

R2
R1,

*BIT13=FRAMING ERROR
BITIZ-RARITY ERROR
;DUPLICATE DATA WORD

:MSK LINE#

JLINE # IN LOW BYTE
JCHECK LINE #

JBRANCH IF 0K
HRONG LINE # RECEIVED
R1 CONTENTS OF RBUF

81758-11 = LINE #

;GET MASK OF CHARACTER

:CHECK CHAR LENGTH.
JBRANCH [F OK
JWRONG CHARACTER LENGTH

;R1=DATA FROM Fl/F0Q
sR2=MASK (BITS SET NOT EXPECTED)
JREVERSE THE MASK
JCHECK THE ACTURAL DATA
+BRANCH [F 0K
JWRONG CHAR LEN OR DATA ERRQOR
sR1=DATA FROM FI1/FQ (COMPLETE WORD)

JI=CIDJA=F=0

(ZDJAF

P11

LOGIC

TESIS

26- §8-79

15:41

MACY1T

30a(1052)

26=FER=79

TST35:

TEST

ALL

LINE

2235
2236
2237
2238

00742¢
007632
007434

017701
100001
104001

171670

MOV
BPL
HLT+1

aRBUF,
.+

2241
22642
22643

0076436
007442
007446
007450

017701
022701
0016407
104001

171456
100405

8%:

MOV
CMP
BEQ
HLT+1

aCSR,
R1
#100405,R1
.t

007452
0076456
007662

005077
005077
104400

171646
171636

(LR
(LR
SCOPE

al(R
alSR

22%9
2c+0

2244

22‘5
2cbb6
224.7
2248

15:47

4
PAGE

TRANSMIT

AND

RECEIVE

LOGIC

SEQ 0049

JR2=DATA (LOW BYTE) EXPECTED
JREAD FI/FO
;BRANCH [F CHAR FRESENT NOT SET
;CHARACTER PRESENT STAYED SET

JR1 = CONTENTS OF RBUF
;SAVE THE (SR

;CHECK THE CSR
JBRANCH IF 0K
;DONE DIDN'T CLEAR OR OTHER (SR ERROR

‘R1

CONTENTS

;CLEAR TCR
;CLEAR CSR

CSR

2249

SRR R

2250
2251
2252
2253
2254
2255
2256
2257
2258
2259

TEST 36:
TEST THAT LINE 11 CAN TRANSMIT AND
)
RECEIVE A CHARACTER. (377)
3
1$:
CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE TIMF.
2
3%:
(HECKS THAT NO ERRORS IN FI/FO
:
4%:
C(HECKS THAT RIGHT LINE # (11) IN FI/FO
:
5%:
C(HECKS FOR RIGHT CHARACTER LENGTH
:
6%:
(HECXS THAT CORRECT DATA WAS RECEIVED
:
7%:
(MECKS THAT (CHARACTER PRESENT (CLEARS
8%:
C(HECKS THAT DONE CLEARS
PR(BABLE FAULTY LOGIC:
M7285 (L2-7) ALL; M7279 ALL:; UART CARD D03 SERIES

2260

AR R

2261

2262

2263

2264

2265

2266
2267
2268

007464

004737

2272
2273
22764
2275

2276
2277
2278
2279
2280
2281
2282
2283
2284
2285

2286

RN RN

AR AR AR

AR R R R AR R

R R AN R R A A AR AR A RN R R AR A AR AR R AR AR

AR RN R AR AR A E R R R P AR R R A AR RN R R AN R AR R R AT R AR

DEVICE''CSR'REGISTER

IST36:

JSR

PC,

JWAIT FOR MOS 10O CLEAR

007512
007514
007516
007520
007524
007526
007530
007532
007536

052777
017701
100375
012777

005000
105305
001376
017701
100405
005200
(01371
017702
104002

2287

007540

050037

2289
2290

007550
007552

001401
104001

004000
171616

171626

000377

171614

LOP36:

1%:

171576

171562

001346

2288 007544 032701 070000

M
3s:

BIS
MOV
BPL
MOV

#1711, QT(R
alSR,
R1
LOP36
#377,
QIBUF

CLR
DE(B
BNE
MOV
BM]
INC
BNE
MOV
TR

RO
RS
1%
aRBUF R1
3%
RO
1%
a(SR,
RZ

BIS

TIMER

BIT

BEQ
HLT+1

SEY:

;BIT3 = CLEAR MOS
;BIT8 = MASTER XMTR SCAN ENS

SEI:

;BITO = RECEIVER ENABLE

sSET XMTR CONTROL BIT, LINE
JWAIT FOR XMTR READY

;SEND A RUBOUT
:CLEAR COUNTER
+SHORT WAIT LOOP
sWAIT FOR CHAR. PRES.
+sBRANCH WHEN FOUND
; TIME COUNTER
JBRANCH IF NOT TIME-QUT
;SAVE (SR
+CHARACTER READY DIDN'T SET

+R1 = CONTENTS OF RBUF

6000 R1

:R2 = CONTENTS OF CSR
;SAVE THE TIMER

sCHECK FOR ERROR BITS

R P A O ARAS SR ARSI RARARS

a¥INITD ;BIT2 = MAINTENANCE

.
007470
007476
007502
007506

AN AR SRR SRR

INITIALIZE

014600

2269

SS;?

R R R AR R

JBRANCH [F NONE
JERROR IN RECEIVED (HAR

2{=CZDJA=F=0
CZDJAF P11

DJ11 LOGIC TESTS
26=FEB=79 15:41

MACYT1

30A(1052)
26-FEB=79
15:47
TST36:
TEST ALL OF LINE 11

2291

PAGE 51
TRANSMIT AND RECEIVE LOGIC
;R1

229¢
c293

2294

= CONTENTS OF

SEQ 9050

RBUF

:BIT14=UART OVERRUN
:BIT13=FRAMING ERROR

007554
007556

007562
007564

010102
042702
000302
122702

007570
00757¢

001401

007574
007600
007602
007604

117702
130201
00160

4%:

170377

MOV

BIC

000013

104001

R?
#11..,
.+

MOVB
BITR
BEQ

&GDJLEN,
R2,
. +h

HLT+1

171564

5% :

104002

:DUPLICATE DATA WORD

;LINE # IN LOW BYTE
:CHECK LINE #
:BRANCH IF OK

#170377 ,R2

SWAB
(MPB
BEQ

HLT+2

:BIT12=PARITY ERROR

:MASK L INE#

;WRONG LINE # RECEIVED
;R1 = CONTENTS OF RBUF

R2
R1

:BITS8=11 = LINE #

;GET MASK OF CHARACTER
:CHECK CHAR LENGTH.
*BRANCH IF OK

;WRONG CHARACTER LENGTH

*R1=DATA FROM F/FO

007606
007619
007612
Q07614

105102
120102
001401
104002

COMB

(MPB
BEQ

HLT+2

RI1,
. +4

;R2=MASK (BITS SET NOT EXPECTED)
R2

017701

171500

7%:

MOV

aRBUF,

007626
007632
0C7636
007640

017701
022701
001401

171466
100405

8%:

MoV
MP

ASR,
R}
#100405,R1

007642
007646
007652
007654
007660

005077
005077

171456
171446

CLR

alCR

005227
012737

001364
007666

BPL
HLT#+1

BEQ
HLT+1

104001

104400

(LR

SCOPE
INC
MOV

01525C
SRR

AR AR AR AR

sTEST 37:
:
;
:
;

;

1$:
3%$:
4$:
58:
68:
7$:
8%:

. +4

aCSR

DJLEN

#.+6,

:CHECK THE ACTURAL DATA
:BRANCH IF OK

;WRONG CHAR LEN OR DATA ERROR

007616
007622
007624

100001
104001

:REVERSE THE MASK

:R1=DATA FROM FI1/FO (COMPLETE WORD)
;R2=DATA (LOW BYTE) EXPECTED

:READ FI/FO

;BRANCH IF CHAR PRESENT NOT SET
;CHARACTER PRESENT STAYED SET
:R1 = CONTENTS OF RBUF

;SAVE THE CSR
:CHECK THE (SR

;BRANCH IF 0K
;DONE DIDN'T CLEAR OR OTHER (SR ERROR
:R1 = CONTENTS OF (SR
;CLEAR TCR

;CLEAR (SR

LAD

IR AR AR R AR AR RSN R R AR RN AR

R R AR R AR AR R A AR AR AR

TEST THAT LINE 12 CAN TRANSMIT AND

RS RAR R A RARR

R .

RECEIVE A CHARACTER. (377)
CHECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE TIME.
CHECKS THAT NO ERRORS IN FI/FO
C(HECKS THAT RIGHT LINE # (12) IN FI/FO

C(HECKS FOR RIGHT CHARACTER LENGTH

C(HECKS THAT CORRECT DATA WAS RECEIVED

CHECKS THAT CHARACTER PRESENT CLEARS
CHECKS THAT DONE CLEARS

PROBABLE FAULTY LOGIC:

M7285 (D2=7) ALL; M7279 ALL: UART CARD DO3 SERIES

;'.t't'l..fi'..'...Qlt.tl.."l.l..tt.i.....tQ.ll.ttltli'i.‘i.ti.‘\...tt.'

007666

004737

014600

1S137:

INITIAL
I 2E
DEVICE''(SR'REGISTER
JSR

PC,

SEL:

a#INITD ;BITS = MAINTENANCE

Z2=CZDJA=F=0

CZDJAF .P11

DJ11

LOGIC

TESTS

26=FEB=79 15:41

MACYi1

2347
2348
2349
2350

2351
2352
2353
2354

2355
2356
2357

2358
2359
2340
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375

M 4
30A (1052)
26=FEB=79
15:47 PAGE 52
737
TEST ALL OF LINE 12 TRANSMIT AND RECEIVE LOGIC

;WAIT

FOR MOS

SEQ 0051

;BIT3 = CLEAR MOS
JBIT8 = MASTER XMTR SCAN ENB

TO CLEAR

SET:

;BITO = RECEIVER ENABLE

007672
007700
007704
007706
007714
007716
007720
007722
007726
007730
007732
007734
007740

007742
007746
007752
007754

007756
007760
007764
007766
007772
007774

052777
017701

010000

171424

012777
005000

000377

171412

100375

171414

105305

001376

017701
100405
005200
001373

017702
104002

050037
032701
001401

LOP37:

1%:
171374

3%:

104001

010102
042702
000302
122702

001401

117702
130201
001401
104002

010010
010012
010014
010016

105102
120102
001407
104002

010020
010024
010026

017701
100001
104007

010030
010034
010040

017701
022701
001401

QTCR
R1

sSET XMTR CONTROL BIT, LINE
:WAIT FOR XMTR READY

#377.

QTBUF

;SEND A RUBOUT
;CLEAR COUNTER

LOP3?

BIS

BIT
BEQ

170377

4%:

;WAIT FOR CHAR. PRES.
;BRANCH WHEN FOUND

a(SR,

RO, TIMER

a?éooo R1

n2..

HLT+1
171362

5%:

6%:

-’4

aDJLEN, R2

R2,
.4

R2
R
t4

;TIME COUNTER
;BRANCH IF NOT TIME-OUT
;SAVE (SR

s CHARACTER READY DIDN'T SET

:R1 = CONTENTS OF RBUF
:R2 = CONTENTS OF CSR

#170377.R2

000014

;SHORT WAIT LOOP

HLT+1

104001

007776
010002
010004
010006

#BIT12,
aCSR,

BNE

MOV
BM]
INC
BNE
MOV
HLT+2

171360

001346
070000

BIS
MOV
BPL
MOV
CLR
DECB

;SAVE THE TIMER
;CHECK FOR ERROR BITS
;BRANCH IF NONE
;ERROR IN RECEIVED CHAR
:R1 = CONTENTS OF RBUF
;BIT14=UART OVERRUN

;BIT13=FRAMING ERROR
;BIT12=PARITY ERROR
sDUPLICATE DATA WORD

sMASK LINE#
sLINE # IN LOW BYTE
sCHECK LINE #

sBRANCH IF Ok
sWRONG LINE # RECEIVED

;R1 = CONTENTS OF RBUF
;BITS8-11 = LINE #
sGET MASK OF CHARACTER
sCHECK CHAR LENGTH.
+BRANCH IF OK
sWRONG CHARACTER LENGTH
;R1=DATA FROM FI1/FO
sR2=MASK (BITS SET NOT EXPECTED)

:REVERSE THE MASK
sCHECK THE ACTURAL DATA
:BRANCH IF 0K
sWRONG CHAR LEN OR DATA ERROR

Rl“DATA FROM FI1/FO (COMPLETE WORD)
171276

7%:

aRBUF,

8%:

al(SR,

0100605 R1

sR2=DATA (LOW BYTE) EXPECTED

:READ F1/FO

:BRANCH IF CHAR PRESENT NOT SET
: CHARACTER PRESENT STAYED SET

:R1
= CONTENTS OF RBUF
SAVE THE (SR

;CHECK THE CSR
sBRANCH IF OK

22-C2DJA=F=0
CZDJAF .P11

DJ11 LOGIC TESTS
26=FEB~79 15:41

c403

010042

104001

2405
2406
gzgg

010044
010050
010054

005077
005077
104400

2404

MACY11

N 4
30A(1052)
26=FEB=79
15:47
PAGE 53
TST37:
TEST ALL OF LINE 12 TRANSMIT AND RECEIVE 1.0GIC

HLT+1
171254
171244

;DONE DIDN'T CLEAR OR OTHER CSR ERROR

CLR
CLR
SCOPE

2409

26410
2411

R R

2412

2613

2414

alCR
aCSR

JCLEAR TCR
;CLEAR CSR

T332 2222232222222

TEST THAT LINE 13 CAN TRANSMIT AND
RECEIVE A CHARACTER. (377)

18:

4%:

;R1T = CONTENTS OF CSR

AR R

;TEST 40:
:

SEQ 0052

38:

C(HECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABLE

CHECKS THAT NO ERRORS IN FI/FO

C(HECKS THAT RIGHT LINE # (13)

TIME.

IN FI/FO

2415
2416

5
:

2418
2419

5
8%:
(HECKS THAT DONE CLEARS
sPROBABLE FAULTY LOGIC:
M7285 (D2-7) ALL; M7279 ALL: UART CARD DO3 SERIES

2417

2420

2421
2422
2423
2424
2425
2626
2427
2428
2429

010056

004737

014600

052777
017701

020000
171224

171234

2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447

010076
010104
010106
010110
012112
010116
(010120
010122
010124
010130

012777
005000
195305
001376
017701
100405
005200
001371
017702
104002

000377

171222

010074

010132

010136

100375

050037

032701

2449
2450
2451
2452
2453

010142
010144

2455

010146

010102

2457
2458

010154
010156

000302
122702

2456

(HECKS THAT CHARACTER PRESENT CLEARS

Rl g

eyttt

010150

001401
104001

042702

LOP40:

1%:
171204

171170

001346

070000

170377
000015

3%:

JSR

PC,

SET:
A#INITD ;BITZ = MAINTENANCE
;BIT3 = CLEAR MOS
;BIT8 = MASTER XMTR SCAN ENB

SET:

;BITO = RECEIVER ENABLE
BIS
MOV

#81T13, aTCR
a(SR
R1

+SET XMTR CONTROL BIT, LINE 13
;WAIT FOR XMTR READY

MOV
CLR
DECB
BNE
MOV
BMI
INC
BNE
MOV
HLT+2

#377,
@TBUF
RO
RS
18
aRBUF ,R1
33
RO
1%
aCSR,
R2

;SEND A RUBOUT
sCLEAR COUNTER
sSHORT WAIT LOOP

BPL

8IS

LOP40

RO, i IMER

BIT

#76000. R1

MOV

BEQ
HLT+1

4%:

2212222233222 I

INITIALIZE
DEVICE''CSR'REGISTER

H
010062
010070

2454

LR R

C(HECKS FOR RIGHT CHARACTER LENGTH
C(HECKS THAT CORRECT DATA WAS RECEIVED

sWAIT FOR MOS TO CLEAR
2

2432
2433

2448

7$:

2
:
a
TST40:

Sg?

2434

58:
6%:

BIC

SWAB
CMPB

4170377,R?

R2
..,

sWAIT FOR CHAR. PRES.
sBRANCH WHEN FOUND
s TIME COUNTER
sBRANCH IF NOT TIME-OUT
sSAVE CSR
;CHARACTER READY DIDN'T SET
;R1 = CONTENTS OF RBUF
;R2 = CONTENTS OF CSR
;SAVE THE TIMER

sCHECK FOR ERROR BITS

;BRANCH IF NONE
sERROR IN RECEIVED CHAR
:R1 = CONTENTS OF RBUF
:BIT14=UART OVERRUN
;BIT13=FRAMING ERROR

;BIT12=PARITY ERROR

+DUPLICATE DATA WORD

:MASK LINE#

JLINE # IN LOW BYTE
sCHECK LINE #

I T

TMTM

ZZ-CZDJA=F=0
CZDJAF P11

2459
2660
2461
2462
2463
2664
2465
2466

2467

2468

2469
26470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485

gzgg

DJI11 LOGIC YESTS
26=FEB=79 15:4

010142
010164

001401
104001

010166
010172
010174
010176

117702
130201
001407
104002

MACY11

171172

aDJLEN, R2
R2,
*4

6%:

COMB
(MPB
BEQ
HLT+2

R2
R1,
.+

171106

7%:

MOv
BPL
HLT+1

aRBUF,
.t

010220
010224
010230
010232

017701
022701
001401
104001

171074
100405

8%:

MOV
CMP
BEQ
HLT+1

aCSR,
R1
#100405,R1
.+

010234
010240

005077
005077

171064
171054

CLR
CLR

aTCR
aCSR

R R AR

A A

104400

SCOPE
SRR

STEST 41;
:
S
18:

38:
4%:

88:

:
-

2497

2498

58:
6%:
78:

SRR

2500

2501

5%%
010246

004737

014600

2506

2507

RI1

010260
010264
010266

052777

017701
100375
012777

040000

171044

000377

171032

171034

C(HECKS THAT DONE CLEARS

AR A R R R

R AR

M7285 (D2=7) ALL; M7279 ALL: UART CARD DO3 SERIES
R AR R A A R RN AR AR R R AR R AR R AR R AP RN AAR AR R RS

. INITIALIZE

DEVICE''CSR'REGISTER

TST41:

JSR

BIS

MOV
BPL
Mov

AR R TR R

C(HECKS FOR RIGHT CHARACTER LENGTH
CHECKS THAT CORRECT DATA WAS RECEIVED
(HECKS THAT CHARACTER PRESENT CLEARS

LOP41:

R R R R AN AR R AR AR RN R R AR AR P AR AR AR

C(HECKS THAT NO ERRORS IN FI/FO
C(HECKS THAT RIGHT LINE # (14) IN F1/FO

PC,

BIT3 = CLEAR MOS

TB = MASTER XMTR SCAN ENB
SET:
:
:BITO = RECEIVER ENABLE

#BIT14, QTCR

a(SR,
LOP41
#377,

SET

anmro BIT2 = MAINTENANCE

3
:
010252

;JREVERSE THE MASK
sCHECK THE ACTURAL DATA
sBRANCH IF OK
;WRONG CHAR LEN OR DATA ERROR
R1-DATA FROM FI1/FO (COMPLETE WORD)
Ré:DATA (LOW BYTE) EXPZCTED
JREAD FI/FO
:BRANCH IF CHAR PRESENT NOT SET
;CHARACTER PRESENT STAYED SET
sR1 = CONTENTS OF RBUF
;SAVE THE CSR
sCHECK THE CSR
;BRANCH IF OK
;DONE DIDN'T CLEAR OR OTHER (SR ERROR
:R1 = CONTENTS OF CSR
:CLEAR TCR
:CLEAR CSR

A R RN R AR

JWAIT FOR MOS TO (LEAR

2508
Sg?g

JBRANCH IF 0K
JWRONG LINE # RECEIVED
JR1 = CONTENTS OF RBUF
;BITS8~=11 = LINE #
JGET MASK OF CHARACTER
;CHECK CHAR LENGTH.
JBRANCH IF OK
;WRONG CHARACTER LENGTH

TEST THAT LINE 14 CAN TRANSMIT AND
RECEIVE A CHARACTER. (377)
(HECKS THAT CHAR PRESENT IS IN FI/FO IN REASONABR.E TIME.

;PROBABLE FAULTY LOGIC:

2459

SEQ 0053

;R2=MASK (BITS SET NOT EXPECTED)

017701
100001
104001

010244

;R1=DATA FROM FI/FO

010210
010214
010216

2494
2495
24696

2512
2513
2514

MOVR
BITB
BEQ
HLT+2

105102
120102
001401
104002

2492
2493

2511

010200
010202
010204
010206

2489
2490
26491

2505

BEQ
HLT+1

5%:

2488

2504

30A(1052)
26-FEB=-79
15:47_
PAGE 54
TST40:
TEST ALL OF LINE 13 TRANSMIT AND RECEIVE LOGIC

QTBUF

sSET XMTR CONTROL BIT, LINE 14

JWAIT FOR XMTR READY
;SEND A RUBQUT

27-CZDJA=F=0

CZDJAF P11

010274
010276
010300
010302
010306
010310
010312
010314
010320
010322
010326
010332
010334

010336
010340
010344
010346
010352
010354

DJ11 LOGIC TESTS
26~FEB-79 15:41

MACY11

3?2#2?52)

TEST ALL OF

005000
105305

171014

005200
001371
017702

171000

100405

104002

050037
032701
001401

CLR
DECB
BNE
MOV
BM]
INC
BNE
MoV
HLT+2

1%:

001376
017701

001346
070000

3%:

122702

001401

170377

(%:

5
PAGE 55

14 TRANSMIT AND RECEIVE LOGIC

RO
?g

;CLEAR COUNTER
;SHORT WAIT LOOP

aRBUF ,R1

;WAIT FOR CHAR. PRES.

3%
RO

1%
a(SR,

;BRANCH IF NOT TIME-OUT
;SAVE (SR

:CHARACTER READY DIDN'T SET
*R1

010370
010372
10374
010376

010400

010404
010406

117702
130201
001401
104002

171002

105102
120102

S$:

6%:

001401

*SAVE THE TIMER

:CHECK FOR ERROR BITS

:BRANCH IF NONE

;ERROR IN RECEIVED CHAR
:R1

#170377 .R2

#14.,

104002

017701
100001
106001

010410
010414
010420
010422

017701
022701
001401

010424
010430
010434

005077
005077

170716

170704
100425

7%:

coms
CMPB

R2
R1,
.+

MOV

8%:

104001

704400

aDJLEN, R2
R2.
R1
A

8PL
HLT+1

170674
170664

SRR

:DUPLICATE DATA WORD

:MASK L INE#

SLINE # IN LOW BYTE
:CHECK LINE #

*BRANCH IF OK

’

sGET MASK OF CHARACTER
JCHECK CHAR LENGTH.
;BRANCH IF OK

sWRONG CHARACTER LENGTH

;R2=MASK (BITS SET NOT EXPECTED)

@aRBUF,
.t

alSR,
RI
#100405,R1

CLR
CLR
SCOPE

al(R
aCSR

AR R

AR AR A AR

1%:

= CONTENTS OF RBUF

;BITS8-11 = LINE #

sR1=DATA FROM FI/FO

MOV
CMP
BEQ
HLT+1

STEST 42:

= CONTENTS OF RBUF

:BIT14=UART OVERRUN
:BIT13=FRAMING ERROR
*BIT12=PARITY ERROR

sWRONG LINE # RECEIVED

MOvVB
BITB
BEQ
HLT+2

BEQ
HLT+2

= CONTENTS OF RBUF

:R2 = CONTENTS OF CSR

sR1

010356
010362
010364
010366

SEG 0054

sBRANCH WHEN FOUND
;TIME COUNTER

BIC
SWAB
CMPB
BEQ
HLT+1

104001

LINE

#70000, R1

MOV

000016

15:47

RO, TIMER

BIS
BIT
BEQ
HLT+1

104001

010102
042702
000302

26=FEB=79

TEST

sREVERSE THE MASK
sCHECK THE ACTURAL DATA
sBRANCH IF OK

;WRONG CHAR LEN OR DATA ERROR
sR1=DATA FROM FI/FO (COMPLETE WORD)
sR2=DATA (LOW BYTE) EXPECTED

sREAD FI/FO
JBRANCH IF CHAR PRESENT NOT SET

s CHARACTER PRESENT STAYED SET
sR1 = CONTENTS OF RBUF

:SAVE THE (SR
sCHECK THE CSR

;BRANCH IF OK

sDONE DIDN'T CLEAR OR OTHER CSR ERROR
;R1 = CONTENTS OF CSR
;CLEAR TCR
;CLEAR (SR
R R

R R R RN R AR R AR R R AR AR R R R AR R R R R R AR AR R AR R R

R R R R AR RS

THAT LINE 15 CAN TRANSMIT AND

RECEIVE A CHARACTER.

CHECKS THAT CHAR PRESENT

(377)

IS IN FI/FO IN REASONABLE

TIME.

ZZ=-C20JA=F=0
CZDJAF .P11

2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583 010436
2584
2585
2586
2587
2588
2589
2590 010442
010450
2591
2592 010454
2593 010456
010464
010466
010470
010472
C10476
010500
10502
010504
010510

010512
010516
010522
010524

DJ11

LOGIC

TE STS

¢6-FEB=79 15:41

MACY11

30A(1052)
15:47
26-FEB=79
PAGE 56
TST42:
TEST ALL OF LINE 15 TRANSMIT AND RECEIVE LOGIC

3%:

4%:

5%:

6%:
7$:
88:

“PROBABLE

SEQ 0055

CHECKS THAT NO ERRORS IN FI/FO
C(HECKS THAT RIGHT LINE # (15) IN FI/FO

CHECKS FOR RIGHT CHARACTER LENGTH

C(HECKS THAT CORRECT DATA WAS RECEIVED
CHECKS THAT CHARACTER PRESENT CLEARS
CHECKS THAT DONE CLEARS

FAULTY

LOGIC:

M7285

(D3o7)

ALL;

M7279 ALL;

UART

CARD DO3 SERIES

ttt!tt*ttttt*tittttttttttii*tttttttttttttttr*ttt!ttttttt.ttt

tttnttttntt

INITIALIZE
DEVICE''CSR' REGISTER
004737

014600

TST42:

JSR

PC,

;WAIT

FOR MOS

TO CLEAR

QMINITD ;BIT2 = MAINTENANCE

:BIT3 = CLEAR MOS
‘BIT8 = MASTER XMTR SCAN ENS

:BITO = RECEIVER ENABLE
052777
017701

100000

170654

012777
005000
105305
001376
017701
100405
005200
001371
017702

000377

170642

100375

104002

050037
032701
001401

170644

LOP42:

1%:
170624

BIS

MOV
BPL
MOV

CLR
DECB

001346
070000

3%:

BEQ

104001

1%
aCSR,

BIT

HLT+1

;SEND A RUBOUT

;WAIT FOR CHAR. PRES.
*BRANCH WHEN FOUND
sTIME COUNTER
:BRANCH IF NOT TIME-OUT
*SAVE CSR

BNE
MOV
BIS

*WAIT FOR XMTR READY

*CLEAR COUNTER
“SHORT WAIT LOOP

1%
aRBUF ,R1
33

HLT+2

:;SET XMTR CONTROL BIT. LINE 15

RO
RS

BNE
MOV
BM]
INC

170610

#BIT15, @TCR

aCSR, ~ Rl
LOP42
#377.
@TBUF

:CHARACTER READY DIDN'T SET

*R1 = CONTENTS OF RBUF

RO, TIMER

076000 R1

:R2 = CONTENTS OF CSR
*SAVE THE TIMER

;CHECK FOR ERROR BITS

*BRANCH IF NONE

:ERROR IN RECEIVED CHAR
:R1 = CONTENTS OF RBUF

*BIT14=UART OVERRUN

010526
010530
010534
010536
010542
010544

010546
010552
010554

2625
2626

010556

010102
042702
006302
122702
001401
104001

117702
130201

001401

104002

170377

4%:

000017

MOV

SWAB
(MPB

R2
#15..,

BIC

BEQ

HLT+1

170612

5%:

MOVB

BITB

BEQ

HLT+2

#170377 ,R2
A

L+

:DUPLICATE DATA WORD

“MASK LINE#

SLINE # IN LOW BYTE
:CHECK LINE #

;BRANCH IF 0K

sWRONG LINE & RECEIVED

@DJLEN, R2

R2,

:BIT13=FRAMING ERROR
*BIT12=PARITY ERROR

‘R1 = CONTENTS OF RBUF
*BITS8=11 = LINE #

:GET MASK OF CHARACTER

*CHECK CHAR LENGTH.

*BRANCH IF OK

*WRONG CHARACTER LENGTMA
:R1=DATA FROM F]/FO

:R2=MASK (BITS SET NOT EXPECTED)

Z7-CZDJA=F=0
CZDJAF .P11

2627
2628
2629
2630
2631
2632
2633

DJ11 LOGIC T ESTS
26=FEB=79 15:41

010560
010562
010564
010566

105102
120102
001401
104002

2634
2635

010570
010574
010576

017701
100001
104001

2637
2638
_2639
2640

010600
010604
010610
010612

2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652

010614
010620
010624
010626
010634
010640
010644
010646
010650
010652
010656

2636

2641

gggz

010662

MACYT1

6%:

COMB
CMPRB
BEQ
HLT-2

Re¢
R1,
. +4

170526

MOV
BPL
HLT+1

aRBUF,
. +4

0317701
022701
001401
104001

170514
100405

8%:

MOV
CMP
BEQ
HLT+1

a(SR,
R1
#100405,R1
YA

005077
0G5077
10440C
162737
(005237
013700
006200
006200
005200
006137
060037

170504
170474

CLR
(LR
SCOPE
SuB
INC
MOV
ASR
ASR
INC
ROL
ADD

aTCR
a(SR

012737

000003
001346
001346

001346
0C1346

(G10670

001364

015250

2655

sTEST 43:

2657
2658

Sgg;

;SAVE THE CSR
;CHECK THE CSR
;BRANCH IF OK
;DONE DIDN'T CLEAR OR OTHER (SR ERROR

;RT = CONTENTS OF CSR
;CLEAR TCR
;CLEAR (SR

DJLEN
RO

TIMER

LAD

;WORSE CASE TIME, ONE CHARACTER
;DUP TIMER
e
: 74
29
;TIMER = 2
;2.25 TIMES ONE CHARACTER TIME
sRESET LOOP ADDRESS

TEST THAT (HARACTER PRESENT (BIT15) OF RBUF

010670

004737

014600

INITIALIZE

TST43:

JSR

SSET:

2665

2666

2669

:SET:

2667
2668

2679
2680
2681
2682

;R1 = CONTENTS OF RBUF

:t"'...t...*.t.'t."."'t"fi...fi..'.‘.'.."'...’..'t"...."....'.'..'.'

2660

2670
2671
2672
2673
2674
2675
2676
gg;g

#.46,

;BRANCH IF CHAR PRESENT NOT SET
;CHARACTER PRESENT STAYED SET

3
1S CLEARFED (BY CLEAR MOS).
;PROBABLE FAULTY LOGIC:
M7285 (D2-8) E17,E14.E15; M7279: M7280

2659

2663

MoV

#3,
TIMER
TIMER,
RO
RO
RO
TIMER
RO,

JREVERSE THE MASK
sCHECK THE ACTURAL DATA
JBRANCH IF OK
;WRONG CHAR LEN OR DATA ERROR
;R1=DATA FROM FI/FO (COMPLETE WORD)
JR2=DATA (LOW BYTE) EXPECTED
JREAD FI/FO

:QQ.'Q.'..'I...Q..Qt"..'.'."..'......."fi..Q"fit.'.*'t'.t...i......'tttt

2656

2664

.
30A(1052)
26-FEB=79
15:47 PAGE 57
TST42:
TEST ALL OF LINE 15 TRANSMIT AND RECEIVE LOGIC

012777
012704
017701
100375
010477
005304
0C1371

000007
000040
170406

010724
01073C

105777
100375

170370

010732

052777

000010

170422

170406

170360

BIT8 = TRANS SCAN ENABLE
WAIT FOR BiT4 = MOS CLEAR

BITO = RECEIVER ENABLE
MOV
#IT0,
QaTCR
MOV
#40 R4
MOV
(SR, R1
BPL
i%
MOV
R4 ,aTRUF
DEC
R4
BNE
1%

1%:

2¢$:

BIT2 = MAINTENANCE

BIT3 = CLEAR MOS

:
s

010674
010702
(10706
010712
010714
010720
070722

PC,a#INITD

s TRANS CONTROL, LINEC
sSET UP COUNTER TC QUTPUT 32 CHAR'S
;WAIT FOR TRANS READY

s TRANSMIT COUNT
JCOUNT DOWN

ISTB
BPL

@aCSR
2%

MAKE SURE DONE S SET

BIS

#B1713,3(SR

sCLEAR MOS

SEQ@ 0056

22-CZDJA~F=0
CZDJAF .P11

2683
2684
2685
2686
2687
2688
2689
2690
2691
269¢
2693
2694
2695
2696
2697
2698
2699
2700

LOGIC TESTIS
26-FEB-79 15:41

010740

032777
001374

000020

010750
010754
010756
010760
010764
010770
010772

017701

017701
022701
001401

010746

100001
104001

MACYT1

30A(1052)
15:47
26=FEB=79
TST43:
TEST CEAR MOS

170352

3%:

PAGE

SEG 0057

BIT

#B1T4,aCSR

JWAIT

170346

MOV

aRBUF ,R1

;CHECK RBUF AND SAVE

170334
100405

HLT+]
MOV
CMP

a(SR,R!
#100405,R1

;SAVE

BNE

8PL

BEQ
HLT+1

104001

. +4

FOR

CLRMOS

TO FINISH

(SR

;CHECK CSR
JBRANCH IF Ok
;CSR ERROR. POSSIBILITES:

. +4

;(1)

DONE DIDN'T CLEAR

;(2) TRANSMITTER 1ART DIDN'T (LR.
:R1=CONTENTS OF (SR

010774
C11000
011002

013700
105305
001376

001346

011004
011010
011012
011C14

017701

170310

011016
011020

005300
01367

011022
011026
011030

022701
001401
104007

100405

011032
011036
011040

017701

170264

011042
011046

005077
005077

011052

104400

105701
100001
104001

100001
104001

4%:

MOV
DECB
BNE

MOV

®CSR.R1

TSTB

TIMER,
RS

;CHECK FOR DONE

sBRANCH IF 0K

DEC
BNE

RO
43

(MP

#100405,R1

sDONE CAME uP!
sMOS MUST NOT HAVE (LEARED
;TIMER COUNT

JCHECK (SR
:BRANCH [F Ok

MOV
BPL

@RBUF ,R1
.

+ CHECK RBUF

CLR
CLR

arlr
al SR

BEQ
HLT#+1

HLT+1

170256
170246

;SET UP TIMER
s SHORT WAIT LOOP
:SAVE (SR

HLT+<1

: (SR ERROR

:BRANCH IF Ok
:RBUF NOT EMPTY!

SCOPE

2701

DJ1

t'.fitttt'.'ttt"fi.'..Q..'Q.Q.....t."."i.."."tt'tfi.h..tt.'..tt..".t

STEST &4

NOTE:

PROBABLE

TEST THAT TRANSMITTER READY CLEARS WHEN TBUF

iS L GADED

DUE TO YHE DOUBLE BUFFERING BY THE UART, TWO CHARACTERS
MUST
ED TO INSURE SEEING TRANSMITIER READY CLEAR

FAULTY LOGIC:

85 (D2-6) E39, E23, E49

..’it.t.t'i..fit.tiIQQQ"0.'Q.Q‘I!QQ‘...........‘i.'..‘tt.t..lt't.#..te

;WAIT FOR MOS
.

’

PC,a#INITD
TO (LEAR

"noun

JSR

COLAND

TST44:

g
S e =]
g o
g 2 n

014600

004737

DEVICE''CSR'REGISTER

TOOm

011054

INITIALIZ2E

MAINTENANCE

CLEAR MOS
MASTER XMTR SCAN ENB

22-CZD:A=F=0
(ZDJAF .P11

DJ11

LOGIC

T ESTS
26-FEB-79 1 5 141

MACY11

30A(1052)
1ST44:

26=FEB=79

TEST

15:47

TRANSMIT READY

5
PAGE 59

2739

FRBRKY RN S8R
SFrO0NO

d
D e

d e

d ed ek

2750
2751
2752
2753
2754
2755
2756
2757
2758
2759

2749

2745
2746
2767
2748

2743

2744

b o o e s

2762

~
o

2741

;BITO = RECEiVER ENARLE
jeleleleloleloBolalslolelelolelole)
— B
bv
cnd — — o e e D e cd - e e b
o
nd d wd D —d

2760

2761

2762

2763
2764

2765

2766

2767

2768

2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2777

2780

2781
2782
2783
2784
2785
2786
2787

2788

2789
2790

2761

2792
2793
27%

052777

000001

170236

100375
012777
017701

000001

170224

012777
017701

000002
170176

017707

100375

100001
104001

170226

170212

V13700
105305
00137¢
017701
000400
00530C
001371

001346

042701
022701
001401
104001

000200

011164
011170
011172

017701

011174
011200
011202

0227C1
001401

011204
13210
011212

170756

BIS

MOV

2%:

170210

3%:

BPL
MOV
MOV
BPL
MOV
MOV
BPL
HLT+1
MOV

DE(B
BNE

MOv

DEC
BNE
100405

170132

BRIL

tMP
BEQ
HLT+1

#8110,

a(Sk,
1%
a1,
a(SR,

u2,

alSR,
.t
TIMER,

RS
3%
al(SkR,
.+
RO
3%

alCk
R1

;TRANS CONTROL, LINE O
JWAIT FOR XMTR READY

a TBUF
R1

JTRANSMIT A

aTBUF
R1

.TRANSMIT A 2

#IT7 .R1
#100405,R1
.44

MOV
8M]
HLT+1

@RBUF,
.+

100001

cMP
BEQ
HLT+1

#100001,R1
.+

017701

170112

MOV
BM]
HLT+1

aRBUF,
.*4

011214
011220
011222

022701
001401

100002

{MP

#100002,R1

011224
011239
011232

017701
100001
104001

170072

MOV
B8PL
HLT+1

aRBUF,
i'v2

011234
011240
011244
011246

017701
022701
001401
104001

170060
100405

MOV
CMP
BEQ
HLT+1

#CSR.

0711250
011254
011260

005077
005077

170050
170040

100401
104007

104001

100401
104001

BEC
HLT+1

104001

104400

CLR
CLP
SCOPE

- "4

c120£os.a1
+

al(R
al SR

JWAIT FOR XMTR READY

;CHECK FOR XMTR READY
JBRANCH [F XMTR READY (LEARED

s TRANSMITTER READY FAILED 10 (LEAR
;R1 = CONTENTS OF (SR

;SET UP TIMER

;SHORT WAIT LOOP

;SAVE (SR FOR THE RECORD

sNOP FOR TIMING
;TIMER COUNT
sBRANCH IF MORE TIME

sDONE MAY OR MAY NOT BE
sTEST REST OF

THE

(SR

;A (SR ERROR
sR1 = (ONTENTS OF

(SR

SET

SO DONT

;CHECK RBUF FOR CHAR PRESFENT
;BRANCH IF CHAR PRESENT

s CHAR PRESENT MISSING
;R1 = CONTENTS OF RBUF

JCHECK THE DATA
:BRANCH IF OK
JRECEIVER ERROR
;R1

= CNTENTS OF RBUF

;CHECK RBUF FOR SECOND CHAR
;BRANCH IF (HAR PRESENT
+CHAR PRESENT MISSING

;R1 = CONTENTS OF RBUF

sCHECK THE DATA
JBRANCH IF 0K
JRECELIVER ERROR

;R1 = CNTENTS OF RRBUF

sCHECK FOR NO MORE CHARA(CTERS
JBRANCH IF CHAR PRESENT lLFARED
;(HAR PRESENT NOT CLEAR!
sR1 = CONTENTS OF RRUF
;SAVE (SR

JCHECK CSR

JBRANCH IF 0K
;CSR ERROR

JR1 = CONTENIS OF

JCLEAR T(R
;CLFAR (SR

(SR

TEST FOR T

22-CZDJA=F=0
CZDJAF PN

DJ11

LOGIC

ESTS

26-FEB=-79 15:4

MACYTT1

30A(1052)
26-FEB=79
15:47
PAGE 60
TST4S:
TEST SILO ALARM LEVEL / RECEIVER ENABLE

SEC 0059

2795
:lt"t‘lt’QI'!Q'*'*..!'fi"tfifitt'fi'tfi.t'fl'ttttttl."t

STEST 4S:

i*'ttfl'ltt'ttt'ttlt"

TEST

THE

SILO ALARM LEVEL

AT WHICH DONE

TEST THAT RECEIVER ENABLE ON A O
CHARACTER PRESENT.

*PROBABLE FAULTY LOGIC:

WILL

INKIBITS

SET.

M7285 (D2-7) E32, E15; M7279 (D11-3) E19,E23

.'ttttttl"tQ‘tt‘t'.fifitti"'.l‘fi'!tt'fitfiifitllfi!ttttfitt

t.tt't.ittttt'ttfittt

INITIALIZE
DEVICE''CSR'REGISTER

011262

004737

014600

TST4S:

JSR

JWAIT

FOR MOS

PC,a#INITD

SET:

:BIT2 = MAINTENANCE
;BIT3 = CLEAR MOS

;BIT8 = MASTZR XMTR SCAN ENS

TO CLEAR

SET:

2850

011266
011274
011300
011302
011306
011314

052777
005737
001005
004737
012737
012777

011322
011330

000001

001350

170030

014644
000001
000414

001350

032777
001374

000020

1672770

011332
011336
011342
011344
011352
011354
011356
611362
011364
011366
011372
011374

013702
017701
100375
012777
005302
001370
013700
105305
001376
017701
105701

001356

011376

100002
104001

11400
011402
011404

000402
005300
001366

011406
011412
011414

017701
7100001

167710

011416
011422
011426
011430
011432
01143

005277
017701
100403

167676

167776

167756

000252

001346
167726

167754

11%:

8IS
TST
aNE
JSR
MOV
MOV

#3110,

ALMFLG

aTCR

118

PC,ALMCK
1. ALMFLG
#4614,
(SR

;TRANS CONTROL,

LINE O

sHAS THE ALARM LEVEL BEEN TESTED?

JYES

sNO, GO DO IT
;SET THE FLAG

;BIT2 = MAINTENANCE
;BIT3 = CLEAR MOS

;BITB = MASTER TRAN SCAN ENB
#3174,
QACSR
;WAIT FOR MOS TO CLEAR
108
sOUTPUT THE # OF CHARACTERS NECESSARY FOR THE SILO ALARM
SLEVEL TO ALOW DONE TO SET.
MOV
COUNT ,R2
sSET CHAR COUNT
1%:
MOV
R1
?gSR.
SWAIT FOR XMTR READY
8PL
#252,
MOV
QTBUF
DEC
BNE
TIMER,
MOV
RC
;SET UP TIMER
2%:
DECB
+SHORT WAIT LOOP
BNE
MoV
al5R,
®
;SAVE (SR *GR TYPING
10%:

BIT
BNE

:SEW

TSTB

eogee

sCHECK FOR DONE
sBRANCH JF NOT SET
sDONE SET WHEN RCV ENB 7LR

B8PL
HLT#1

;R1=CONTENTS OF CSR

3%:

s TIMER COUNT
:BRANCH IF MORE TIMER

A ¥

aRBUF,

5%:

aRBUF,

104001

167674

;BITC = RECEIVER ENABLE

sCHECK AND SAVE Fl/F0
sBRANCH [F 0K
+CHARACTER PRESENT IN FI/FOQ
sR1=DATA FROM F!/FQ

+SET RECEIVER ENABLE

195300

+CHECK FOR CHARACTER PRESENT
JBRANCH IF 0K
;SHORT TIMER

104001

s CHARACTER PRESENT MISSING

001372

27=-C2DJA=F=0
CZDJAF P11

DJ1? LOGIC TESTS
26=FEB=79 15:41

2851
Sgg%

011436

005077

gggg

011442

104400

MACYT1

167662

30A(1052)
26=FEB=79
15:47
PAGE 61
TST4S5:
TEST SILO ALARM LEVEI. / RECEIVER ENABLE

6$:

CLR

SEQ 0060

JR1 = CONTENTS OF RBUF
;CLR TRANS CONTROL REG

alCR

SCOPE

2R56

SRR

2857
<858

JTEST 46:
TEST THAT HALF DUPLEX (BIT1) DISABLES THE RECEIVER UARTS.
;PROBABLE FAULTY LOGiC:
M7285 (D2=4) E3Zz, E17, E22, (D2=2) ES, E1

2859

2860
2861

2862

011444

004737

014570

TST46:

R R R AR AR AR AR R AR

RE AR

JSR

AR R AR A NN R A AR AR A AR R AR AR AN R AR ARARAA A AR

PC,

011450

012777

000001

2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883

011456
011462
011466
011470
011476
911500
011502
011506
011510
011512
011516
011520
011522

013752
017701
100375
012777
005302
001370
013700
105305
001376
017701
105701
100002
104001

001356
167632

2885
2886

011524
071526

(000402
005300

2884

Sgg

167602

I I I

;BIT1 = HALF DUPLEX

MOV

011532
011536
011540

017701
100001
104001

167564

2893
2374
P
2896
2897
2898
2899
2900

071542
011550
011552
011554
071556
011560
011564
011566

042777
000240
000240
000240
000240
017701
100001
104001

000002

2238%

011570

005077

16753C

2904
2905
29%

011574

104400

167536

QT(R

JLEVEL TG ALOW DONE TO SET.
MOV
COUNT ,R2
1%:
MOV
aCSR,
R1
BPL
1%
MOV
#252,
QTBUF
DEC
R2
BNF
1%
MOV
TIMER,
RO
2%:
DE(CB
RS
BNE
2%
MOv
alSR,
R1
TSTB
R1
BPL
3s
HLT#1

4%:

167550

#8170,

;BI15S
;BIT8
JWAIT
;BITO

= CLEAR MOS
= MASTER TRAN SCAN ENB
FOR MOS TO CLEAR
= RECFIVER ENABLE

JSET XMTR CONTROL BIT, LINEO

sOUTPUT THE # OF CHARACTERS NECESSARY FOR THE SILO ALARM

3%:

2889
2890
2891

167630

001346

001366

2901

167646

000252

011530

2892

;BIT2 = MAINTENANCE

2868

2869

I ettt

a#INITC ;INITIALIZE

2863

2864
2865
2866
<867

A AR R RN’

5%:

BR
DEC

4%
RO

;SET CHAR COUNT
;WAIT FOR XMTR READY

;SEND AN "'’

sSET UP TIMER

;SHORT WAIT LOOP

;SAVE (SR
;CHECK FOR DONE
;BRANCH IF NOT SET
;DONE SET WHEN HALF DUPLEX (BIT1) SET

sR1=CONTENTS OF (SR

s TIMER COUNT
JBRANCH IF MORE TIMER

BNE

MOV
BPL
HLT+!

aRBUF,
.t

BIC
NOP
NOP
NOP
NOP
MOV
RPL
HL.T+1

#IT1,

QSR

aRBUF,
R

CLR

aTCR

sCHECK AND SAVE F1/F0
sBRANCH IF OK
+CHARACTER PRESENT IN FI/FO

;R1=DATA FROM F1/FO

.CLEAR HALF DUPLEX BIT

sCHECK FOR CHAR PRESENT
JBRANCH [F CHAR NO! PRESENT
;CHAR PRESENT AFTER H/D CLEARED

:R1 = CONTENTS OF RBUF

+CLR TRANS CONTRCL REG

SCOPE

;itittttttltfitttttttttttttttttttt.tnt.tfi-ttaanfiafi‘ttt'tfi-ttttn-n.Q---a--

Z2=CZDJA=F=0

CZDJAF .P11

DJ11

LOGIC

TESTS

26-FEB=79 15:41

MACY11

2907
2908
2909
2910

30A(1052)

2€~FEB=-79

TST47:

TEST RECEIVER

2941
2942
2943
2944
2945
2946
2947
2948
2949
2950

2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962

PAGE 62

INTERRUPT LEVEL

ADDR=
DJADR=
R1: BR
R2= BR

ADDRESS OF ERROR HLT
(SR _ADDRESS OF DJ11 UNDER TEST
LEVEL FOR DJ11 TO ALLOW INTR
LEVEL WHERE ERROR OCCURED

:PROBABLE FAULTY LOGIC:
TST47:

#INTR2 ,aRCVVEC

AGAINZ:

PRIOLO
PRIOLO,NOW
PC.
BRSET

017216

SET UP RCVR INTERRUPT VECTOR

#340,aR(C VLVL
#10,PRIO LO
#5,CT

167524
167520
017214
017226

M7821 WIRING, PRGPER PRIORITY CHIP

R 112223222
222222
222
2322
2 I 1T2
TM

011735
000349
00001C
100005
017214
017214
014464

012777
012777
012737
012737
005337
C13737
004737

053737
004727

000340
017216
014560

177776
177776

#340,a4PS
NOW
, a#PS
PC.,
a#INITH

042737

011644
011652
011660

011576
011604
011612
011620
011626
011632
011540

N I I T
T

AR
PR R
R

2940

lEST 47:
TES+
RECEIVER INTERRUPT LEVEL
ERROR PRINT QUT IS AS FOLLOWS:
ADDR
[CJADR
RO R1

2911

2912
5913
2914
3915
5916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2972
2933
2534,
2935
2935
2937
2938
2939

15:47

011664

012777

000001

011672
011676
011702
011704
011712
011714
011716
011722
011724

013702
017701
100375
012777
005302
001370

001356

105777
160375

167432

167416

000025

167414

167376

011732
011734

023737
002407
000417

017216

017220

011736
011736
011740

017216

017220

(LEVEL)= DECIMAL #(0 10 7)

(MASK)= OCTAL #(0 TO 340}

(0,40,100, 140,200, 240,300 340)

(WOW)= OCTAL #(0 TO 340) AS
MASK, BUT
CURRENTLY TESTING
CLEAR PS LEVEL

SEI PS TO CURRENT TEST LEVEL
SEY:
BIT2 = MAINTENANCE

BIT3 = CLEAR MOS

BIT6 = RECEIVER INTERUPT ENABLE

BIT8
= MASTER TRANS SCAN ENABLE
WAIT FOR MOS TO CLEAR

BITO = RECEIVER ENABLE

IF YOU ARE HERE NOC INTR OCCURED

CMP

NOW ,MASK

THRUZ2

BLT

INTRZ:
022626
023737

LOAD BR7+1 INTC BR TEST LEVEL
LOADS COUNTER FOR 5 ROL -BR
START TEST BR7, THEN BR6,BRS...ETC.
LOAD PRE-ROL-ED DECIMAL PRIO
GO TO SUBROUTINE TO ::::::
LOAD BR INTR LEVEL OF DJ11

MOV
#8170,
alCR
SET TRAN CONTROL BIT, LINE O
;OUTPUT THE # OF CHARACTERS NECESSARV FOR THE SILO ALARM
:LEVEL TO ALOW DONE T0 SET.
MoV
COUNT ,R2
s SET CHAR COUNT
1%:
MOV
alSR,
R1
: WAIT FOR TRAN RDY
BPL
1%
MoV
425,
aTBUF
;SEND #25
DEC
RZ
BNE
1%
TST8B
2%:
a( SR
WAIT FOR DONE
BPL
23
NINTRZ2: ;

011724

AT LEVEL 7

CMP
CMP

ERROR?

; IS THIS AN ERROR??2??
. BRANCH IF YES
: IF NO,.GO ON NEXT BR

IF YOU ARE HERE AN INTR GCCURED
(SP)+,(SP)+
(LEAN UP THE STACK
NOW ,MASK
: IS THIS AN ERRQR?722?

SEQ 0061

22~-C2DJA=F=Q

CZDJAF P11

2963
2964
2965
2966
2967
2968
2969
2970

2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995

011746
011750

DJ11

LOGIC

TESTS

26=-FEB=79 15:41

MACY1I

002001

BGE
BR

000411

011752

ERRORZ:

011752
011754

010146
010246

011756

013701

011762

013702

30A(1052)
26=FEB=79
15:47 PAGE 63
1ST147
TEST RECEIVER INTERRUPT LEVEL

.
:

ERRORZ
THRUZ

C17216

BRANCH IF ERROR
IF NO,SEE IF ALL BR LEVELS TESTED

YOU ARE HERE , THEN SOMETHING IS WRONG
ERRON: 1111

MOV
MOV

017220

;
;

SEC 0062

R1,=(6)
R2,=(6)

JPUSH R1

ON STACK

;PUSH R2 ON STACK

MOV MASK.

MOV NOW,

R1=BR LEVEL ALLOWED

;
;

(BR BITS OF PSW)
R2=BR LEVEL OF ERROR

REPORT ERROR+ REG.

(BR BITS OF PSW)

011766

104002

HLT+2

011770

012602
012601

MOV
MOV

(6)+.R2
(6)+ R

:POP STACK INTO R2
*POP STACK INTC R1

MOV
BM]

SRBUF., R1
v4

; READ THE CHARACTER
* BRANCH IF CHAR PRESENT

|M1772

011774
011774
012000
012002
012004
012010
012012

THRUZ:

017701

100401
104001

022701
001401

167322

HLT+1

MP
BEQ

100025

10409017

012024
012030

005077
005077
005737
001273

012032
012040
012046

013777
012777
02737

012054

104400

012014
012020

0,1

HLT+1

167304

CLR
CLR

167274

017216

001332
000004
000340

CHAR PRESENT MISSING

> R1= CONTENTS OF RBUF

CHECK THE DATA
BRANCH IF OK

* RECEIVED DATA ERROR

* R1= CONTENTS OF RBUF

RTCR
aCSR

NOW

BIC

#340.a4PS

BNE
MOV
MOV

167270
167270
177776

#100025 R
.+

:; TEST IF LAST BR WAS CHECKED

AGAIN2
BACK
TO TEST NEXT INTR LOWER
RCVLVL,@RCVVEC : RELOAD AND CLEAN UP
#I0T, ~ axXMTLVL

SCOPE
...t..t"'"'.'i"...'.'i..t.....‘...'.l.'l‘.....I..‘Q...Q.l.‘.t...t'.t

STEST 50:

TEST F1/FO OVERRUN
THE FI/FO BUFFER SHOULD HOLD &¢ CHARACTERS.
“PROBABLE FAULTY LOGIC:
M72B5 (D1-7) E32. E17. E32 (D2<0) ES. E1

'tfi'tti."*'lfit...fi..fi.l’.".fi.......t.....'..“.l.‘Q.Q.i...l..'t.‘l'l.i

3018

012056

004737

014600

INITIALIZE

DEVICE''CSR'REGISTER

TST50:

JSR

PC,

a¥INITD ;g} 2 = MAINTENANCE
13 = CLEAR MOS
"

;

22=C2D)A<F=0
CZDJAF .P1T

DJ11 LOGIC T ESTS
26=FER=79 15:41

MACY11

3(1)“ 10 52)
26-FEB=79
15:47
ST50:
TEST FI/FO OVERRUN

3019

3020

3021

:
012062
012070
012074
012100
012102
012106
012112
012114

012777
012700
017701
100375
000377
032701
001401
104001

3033
%?5’

012116
012120

005300
001365

3036
3037
3038
3039
3040
3041
3042
3043

012122
012126
012132
012134
Q12136
012140
012144
012146

013700
017701
100375
105305
001376
C17701
100401
104001

3045
%(7)

012150
012152

005300
001370

3044

177777
009100
167220

1%:

2%:

167154

MOV
MOv
MOV
BPL
SWAS
BIT
BEQ
HLT+1

#177777 ,@TCR
#100,
RO
aCSR,
R1
1%
o TBUF
#RIT13, RI
.t

;TRANS CONTROL BIT, ALL LINES
JSET UP COUNTER - 64. CHAR FI/FO BUFF
;SAVE AND WAIT FOR TRANS READY

DEC
BNE

RO
1%

;COUNT DOWN

MOV
MOV
BPL
DECB
SNE
MOV
B8M]
HLT+]

TIMER,
aC’R,
%
RS
3%
a(SR,
.+

DEC
BNE

RO
28

012154
012156
032160

105701
100401
104001

3054
3055
3056

012162
032166
012170

022701
001401
104001

100605

3060

JR1=CONTENTS OF (SR

RO
R1

;SET UP TIMER
;WAIT FOR XMTR READY
. SHORT WAIT LOOP

sSAVE CSR FOR THE RECORD
;BRANCH IF TRANS READY
s TRANS READY MISTERIOUSLY DISAPPEARED

sR1=CONTENTS OF CSR

sTIME 3 CHARACTER LENGTHS
;BRANCH IF MOR: TIME

SRR

1S18
8M]
HLT#]

R1
. ¥4

CMP
BEQ
HLT+1

#100605,R1
.+

AR AR

3061

sTEST S0A:

3063

SRR

3062

3064
3065
3066
3067
3068
3069

(€12172
012176
012202
012204
012206

000377
013700
105305
001376
017701

3071
3072
3073
3074

012216
012220
012222
©12224

001003
005300
001367
104001

3070

JTRANSMIT LINE # ON L INE
sCHECK FI/FO OVERRUN
;JBRANCH IF OK
;FI/FO OYERRUN TOO SOON

sFI/F0 SHOULD NOW BE FULL

3050
3051
3052

3057
35828

167234

3%:

3(30){’:8

3053

;BITO = RECEIVER ENABLE

107220
020000

001346
167166

SEQ 0063

SET:

;

3024
3025
3026
3027
3028
3029
3030
3031

3
PAGE 64

;BIT8 = MASTER XMTR SCAN ENRB

JWAIT FOR MOS TO CLEAR

%85%

3032

012212

032701

167130
001346

167106

020000

T50A:

11%:

A AR

BIT

BNE
DEC
BNE
HLT+1

sR1 = CONTENTS OF CSR

sCHECK THAT FI/FO NOY OVERRUN
sBRANCH IF Ok
sF1/F0 OVERRUN SET

sOR SOME OTHER (SR ERROR
JR1=CONTENTS OF (SR

AR AN AR

AR AR AR AR A AR R A AR

AR AR R R R R AR R SRR R AR T AR AR R

TEST THAT FI/FO OVERRUN COMES UP WHEN 65TH CHARACTER

AR R AR R R AR R R R

5wWAB
MOV
DECB
BNE
MOV

sCHECK THAT DONE IS SET
sBRANCH IF OK
+DONE DIDN'T COME UP!

IS RECEIVED WITHOUT READING FI/FO

AR R R AR R R R AR AR AR AR AR R AR AR AR R R R R AN R R AR

@ 7BUF
TIMER,
RO
RS
11%
a(SR,R1

#BIT13,R
12%
RO
11%

JSEND 65TH CHARACTER
sSET UP TIMER
sSHORT WAIT LOOP

:SAVE (SR

+sCHECK F1/F0 QVERRUN

+BRANCH WHEN SET
: TIMER
+BRANCH IF MORE TIME
cFI/FO OVERRUN DIDN'T COMEUP

RR AR IR

®S

Z27-CZDJA-F=Q
CZDJAF .P11

3075
3076

3C?7
3078

%8878

012226
012232
012234

DJ11 LOGIC TESTS
26=FEB=79 15:41

022701
001401
104001

MACY11

120605

12%:

508]

JTEST 50R:

3083
3084
3085
3086

2
.'
:
:

3087

012236
012242
012246
012250

012700
017701
100401
104001

000002
167054

3094
3095
3096

012252
012256
012260

032701
001401
104001

070000

3102
3103
31046
3105
3106
3107

012262
012264
012266
012272
012274
012276

010102
000302
042702
120102
001401
104001

3110
3111
3112
3113
g‘”lg

012300
012302
012304
012306
012310

005300
001403
195305
001376
000754

3116
3117
3118
3119
3120
3121

012312
012316
012322
012324

017701
022791
001401
104001

SEC 0064

JRT = CONTENTS OF (SR
;sCHECK TOTAL CSR
sBRANCH IF OK
;SOMETHING IN CSR FOULED UP

;JR1=CONTENTS OF (SR

TEST THAT READING THE RECEIVER BUFFER CAUSES FI/FO

NOTE:

T50B:
21%:

177760

22%:

23%:

167002
100605

24%:

3122
3123

3124

3125
3126

OVERRUN TO CLEAR.
BECAUSE OF TIMING OF THE FI/FO, FI/FO OVERRUN CAN COME
BACK UP AFTER READING ONE CHARACTER, SO A SECOND MUST
BE READ TO INSURE THAT FI/FO OVERRUN IS CLEAR.

MOV
MOV
BMI
HLT+1

2,
aRBUF,
.+

BIT
BEQ
HLT+1

#070000,R1
.+

MOV
SWAB
BIC
CMPB
BEQ
HLT+1

R1,
R2
R2
#177760,R2
R1,
R2
.+

DEC
BEQ
DECB
BNE
BR

RO
24%
RS
23%
218

MOV
CMP
BEQ
HLT+1

alSR,
Rl
#100605 ,R1
.t

AN AR AR

R R R AR

STEST 50C:
;

3127

3128
3129
3130

#120605,R1
A

5
PAGE 65

;tittttifitttttttttttl‘tttittfitittttttt*tttttttttt.tttttfitttttttttttttin't

3088
3089
3090
3091
3383%

3108
3109

CMP
BEC
HLT+1

.-ttttttttttttttittfittttti'ttttttkttttttttttttttttttt.ttttttttttttttttttt

3082

3097
3098
3099
%}8(1)

30A(10 52)
26-FEB=79
15:47
TSTSO:
TEST FI/FO OVERRUN

IR AR A AR

012326
012334

042737
052737

000340
000240

177776
177776

7150C:

BIC
8IS

RO
R1

;SET UP COUNTER - 2 CHARACTERS
sCHECK AND SAVE FIRST CHAR IN FI/FO
;BRANCH IF CHAR PRESENT
s CHARACTER PRESENT GONE'
;CHECK RECEIVER ERRORS
;BRANCH IF OK
JRECEIVER ERROR

;R1=CONTENTS OF RBUF
;BIT14=UART OVERRUN
;BIT13=FRAMMING ERROR
;BIT12=PARITY ERROR
;PUT LINE # IN R2

;CHECK DATA (=LINE#)
;BRANCH IF Ok
;WRONG DATA RECEIVED

JRI1=FI/FO DATA
s (DATA SHOULD=L INE#)

s COUNT CHARACTERS
;BRANCH WHEN DONE
sSHORT WAIT LOOP - GIVE FI/FO TIME
;GO READ ANOTHER
;SAVE CSR
sCHECK THAT FI/FO OVERRUN CLEARED
sBRANCH IF 0K
sFI1/FO OVERRUN DIDN'T CLR
;OR SOMEOTHER CSR PROBLEM
;R1=CONTENTS OF CSR

AN AR R AR AR R AR AR RN A AR AR R R R AR R AR R R R R R R R R

RR R R

R AR RN R

TEST THAT FI/FO OVERRUN INTERRUPT
DOESN'T OCCUR WHEN THE PROCESSOR IS AT LEVEL S
R R R AR AR AR R AR AR AR R AR AR AR R R AR AR R R R AR AR R AR AR AR AR RS R RS I AR RN RS

#3640,
#2640,

QAPS
QNPS

sCLEAR PSW
sSET PROCESSOR TO LEVEL 5

SoVRIRNR W
W

012342
012350

— i

D d D o —d

ININNIN
NN NN

Z2-CZDJA=F=0
CZDJAF .P1T

DJ11

LOGIC

26~FEB=79 15:41
012777
012777
052777
017701
022701
001401
104001

012432
012436
012440
012444
012450

012432
000340
010000
166730
110605

000377
005777

166722
166710

000377
017701
032701
001773
000410

156710
166676
020009

017701

166662

005777
012716
000002

012456

100375

012430

TESTS

104001

012700
017701
100401

000092

012466
012472
012474

032701
001401

070000

012476
012500
012502
012506
012510
012512

010102
000302
042702

166640

TST50:

166760
166754
166734

26=FEB=79

15:47
TEST F1/FO OVERRUN
MOV
MOV

BIS

MoV

30%:
31%:

32%:

@ 7BUF
a(SR

SWAB
MOV
BIT
BEQ
BR

o iBUF
aCSR,

MOV
HLT+1
TST
MOV
RTI

33%:
34%:

177769

BEQ

HLT+1

001491

166566

110605

36%-

104001

DEC
BLE
DECB
BNE
BR
MOV
tMP
B8EQ
HLT+1

PAGE 66

SEQ 0065

;SAVE (SR
;CHECK CSR

;CSR ERROR

;R1=CONTENTS OF

;SEND LINE #

(SR

;WAIT FOR TRANSMITTER READY

308

JSEND LINE #
;SAVE CSR

#BIT13, R1
31%
33¢%

;WAIT FOR FI/FO OVERRUN

a(CSR,

;SAVE (SR
INTEBRUPT OCCURRED AT LEVEL 5

#348,

(SP)

:RESET RETURN ADDRESS
sRETURN

"2,
aRBUF,
.+

RO
R1

;SET UP COUNTER - 2 CHARACTERS
sREAD ONE CHARACTER
sBRANCH IF CHARACTER PRESENT

@RBUF

;SKIP ISR

:"POP'’ ONE CHARACTER

s CHECK ERRORS

R1,

:DUP DATA

R1,

sCLR ALL BUT LINE #
s CHECK DATA

R2
#177760.,R2

35%:

022701

#70000, R1
.14

001401
104001

017701

SWAB
TST

104001

120102

a(CSR,

#110605,R1

8PL

#3208,
@RCVVEC ;SET UP RECEIVER INTERRUPT VEC(
#340,
aRCVLVL
#81T12, aCSR
;SET _STATUS ENABLE

CMP
BEQ
HLT+1

104001

012514
012516
012520
012522
012524

012532
012536
012540

30A(1052)

166656

01245¢
012456
012462
012464

012526

MACY11

RO
36%
RS

s COUNT CHARACTERS

34%

;GO READ ANOTHER CHARACTER

;BRANCH IF DONE
sSHORT WAIT LOOP

358

aCSR,

#120605,31

:SAVE (SR
cCHECK THAT FI/FO OVERRUN CLEARED
;BRANCH IF OK

sFI1/FO OVERRUN DIDN'T CLR

;OR SUMEOTHER CSR PROBLEM

:R1=CONTENTS OF CSR

tttttt!t"ttlt!itti"**ttt't*!ii!itt*'itl.!l‘.tiltt.'.fiitt!tQ'li.‘ttttt

3185
3186

TEST 50D:
l

TEST THAT FI1/FQ OVERRUN INTERRUPT

OCCURS WHEN PROCESSOR IS AT LEVEL &4

22-CZDJA=F=0

DJ11 LOGIC TESTS

26=FEB=79 15:41

CZDJAF .P11

MACY11

30A(1052)
26-FEB=79 15:47
TSTS0:
TEST FI/FO OVERRUN

PAGE 67

SEQ 0066

"ltt'ttttfit*t!tt't*tl.!t't'tt‘t'ttt"ttfitti.tfi..tttt'

AN AN LN AN AN N NN

SRR
o J\OgOON

—d
d e D e d

o elelelolelelolelolelele]

042737
052737

012777
017701
022701
001401

000340
000200
012642
166530

1727776
177776
166544

T50D:

110605

CMP
BEQ
HLT+1

104001

40%:

166510
166476

41%:

012626
012630

000377
017701
032701
001773
104001

012632
012640

052777
000470

000010

012642
012646
012652
012654

017701
022701
001401

166452
130605

012656
012662
012666
012670

012700
017791

000101
166434

012672
012676
012700

032701
001401
104001

C12702
012704
012706
012712
012714
012716

010102
000302
042702
120702
001401
104001

012720
012724
012726
012730
012734
012736

017701
005300
001420
022700
001752
020037

012742
012744
012750
012752

202405
022701

012754

000742

nNoONNO

b
D

%00‘ o

166522
166510

100375

020000

166460

104001

1401
104001

070000

SWAB
TST
BPL
SWAB
MOV

BIT
BEQ
HLT+1
BIS
BR

42%:

104001

100401

BIC
BIS

MOV
MOV

000377
005777

noron

e sl o wad wed)

SIBIRIRGCSS BRIRVRL8R

NN W NWWW WY

3190

LA
LAV LoV T N 1, N

t.tttt.t.'tt'tt'tt.

43%:

166374

000100

001356
110605

A#PS
;CLEAR PROCESSOR LEVEL
Q#PS
;SET PROCESSOR TO LEVEL 4
#42%,
aRCVVEC ;SET UP RECEIVER INTERRUPT VEC
aCSR,
R1
;SAVE (SR
#110605,R1
;CHECK CSR
L+

QTBUF
aCSR
40%
QTBUF
aCSR,
R1
#31T13, R1
41%

;SEND LINE #

JWAIT FOR TRANSMITTER READY

;SEND LINE #
;SAVE (SR
;WAIT FOR FI/FO OVERRUN

s INTERUPT DIDN'T OCCURE WHEN OVERRUN SET
#BIT3,

45%

aCSR

sR1

= CONTENTS OF

:CLEAR MOS
;SKIP TO THE END

MOV
CMP
BEQ
HLT+1

a(SR,
R1
#130605,R1
.+

MOV
MOV
BM]
HLT+1

#101,
aRBUF,

BIT
BEQ

#70000, R1

s CHECK ERRORS

MoV
SWAB
BIC
CMPB
BEQ
HLT+1

R1,
R2
R2
#177760,R2
R1,
R2
.+

:DUP DATA

HLT+1

177760

#340,
#200,

MOV
DEC
BEQ
cMP
BEQ
tmp

-“

RO
R1

aCSR,

RO
46%
#10C,
43%

sCHECK CSR

;sBRANCH IF OK
;CSR ERROR

;R1 = CONTENTS OF CSR

;SET UP COUNTER - 65 CHARACTERS
sREAD ONE CHARACTER
sBRANCH IF CHARACTER PRESENT

sCLR ALL BUT LINE #
:CHECK DATA

:SAVE CSR

sGET OUT IF ALL CHAR'S READ
;CHECK FOR FIRST CHAR READ
sSKIP CSR CHECK ON FIRST CHAR

448
#110605,R1

43%

HLT+1

;SAVE CSR

BLT
CMP
BEQ

=¥

CSR

;IF CHAR'S LEFT IN SILO IS LESS THEN

JALARM LEVEL, DONE WILL GO AwAY.

sCHECK (SR

22=-CZDJA=F=0
CZDJAF .P11

3243
3244
3245
3246
3247
3248
3249
3250
3251

€12756

DJ11

LOG!C

1§31
8

26-FEB-79 15:41
022701
001401

MACYT1

110405

30A(1052)
26=FEB=79 15:47
TSTSO:
TEST FI/FO OVERRUN
448

6
PAGE (8
SEQ 0067

104001

CMP
BEQ

HLT+1

#110405,R1
.+

012766

000735

43%

012770
C12774
012776

017701

MOV
BPL
HLT+1

aRBUF,
A

013000
013006
013014
013020
013022
013026
013032

013777
012777
012716
000002
005077
005077
042737

MOV
MCV

RCVLVL, @RCVVEC
#10T,
a@RCVLVL

013040

104400

012762
012764

100001
104001

166326

46%:

001332
000004
013022
166276
166266

000340

177776

;DONE DIDN'T GO AWAY
;OR OTHER CSR ERROR

JREAD A CHARACTER
JBRANCH If NO CHAR.
;CHAR. PRESENT!

MOV

458,

(SP)

CLR
CLR

aTCR
a(SR
#340,

a#PS

RTI

45%:

JCHECK CSR
;BRANCH IF OK

BIC

PRES

;RESET RETURN ADDRESS ON STACK

;RESTORE PSW

;LOWER PROCESSOR S7TATUS

SCOPE
:ti..tt.fi.'t.t't.'.h.t!t'I.'Qttt.'.“'.t'.tfil'.t..iQQtttt".'.QttftIttt.

sIEST 3%

TEST THAT UART OVERRUN IS DETECTED ON ALL LINES

;PROBABLE FAULTY LOGIC:

012777

032777
001374
005001
012777
017702
100375

012777
017702
106375
012777
013700
105305
001376
017702
000400
005300
001371
005277
017702
032702
001001

000414

166250

000020

166242

000001

166234

000001

166222

000002
001346

166206

166224

166210

TST51:

105305

A A

A R

M7285 (D2-2) E3, E1; M7279; M7280

R AR R RN A AR RN P AR AR R AR AR AN RS ARSI AR E SRR R R AR

#4614,

(SR

;BIT2 = MAINTENANCE

108
:

g#g

:8474.

aCSR

sWAIT FOR MOS TO CLEAR

LOPS51:

CLR
MOV
MoV

R1
»,
a(SR

alCR
R2

sSET UP LINE COUNTER
sTRANS CONTROL, LINE O
SWAIT FOR TRANS READY

2%:

3%:

166164

166152
166146

000001

BPL
MOV

4%:

:BIT3 = CLEAR MOS
;BIT8 = TRANS SCAN ENABLE

e"gf

LOPST
,

ggsn.

@IBUF
R2

*WAIT FOR TRANS READY

MOV
MOV

ggga

82,
TIMER,

STBUF
RO

;SEND #2
:SET UP TIMER

MOV
BR
DEC
BNE
INC
MOV
BIT
BNE

aCsR,
Ry,
RO
3s

:SAVE CSR FOR THE RECORD
*NOP FOR TIMING

aCSR,

HLT+2

001346

MOV

104002

013700

MOV

DECB

aCSR

#BI70,

TIMER,RO

;SEND #1

*SHORT TIME LOOP

*TIMER COUNT

:SET RECEIVER ENABLE

*SAVE CSR

:CHECK RECEIVER ENABLE

*BRANCH IF OK

;RECEIVER ENABLE FAILED TO SET

sR1 = LINE #
*R2 = CONTENTS OF CSR

*SET UP TIMER

‘WAIT SHORT TIME LOOP

ZZ-CZDJA=F=0
(ZDJAF .P1

3299
3300
3301
3302
3303

013170
013172
013176
013200
013202
013204

DJ11

LOGIC

TESTS

26-FEB=79 15:41

001376
017702
100403

MACY11

BNE
MOV

166124

005300
001371
104002

013206
013212
013214

032702
001001

013216
013222
013224

122702
001401

013226
013230
013232
013236
013240
013242

010203
000303
042703
020103
001401

013244
013250
013252

017702

013254

000773

013256
013262
013266
013272
013274

005377
017702
022702
001401

040000

5%:

104002

000002

104002

177700

166052

7%:

BIT
BNE
HLT+2

#BIT14, R2
. +4

CMPB
BEQ
HLT+2

e,
A

MOV
SWAB
BIC
CMP

R2.
R3
R3
#177700,R3
R1,
R3

166036
166032
100404

MOV .

8%:

aRBUF,

166020

013306

005077

166006

013312

104400

+NO CHARACTER PRESENT

JR1 = LINE #
;JR2 = CONTENTS OF RBUF

sCHECK FOR UART OVERRRUN
JBRANCH IF OK
;UART OVERRUN MISSING

JR1 = LINE #
;JR2 = CONTENTS OF RBUF

;CHECK THE DATA
JBRANCH IF OK
;DATA ERROR
- 3RD (HAR OVERRUNS 2ND
‘R1 = LINE #
RZ = CONTENTS OF RBUF

:DUP DATA

sMASK ALL BIT LINE #, ERROR BITS
sCHECK LINE #, ERRORS

;BRANCH IF OK

;LINE # OR OTHER RBUF ERROR

sR1 = LINE #
;R2 = CONTENTS OF RBUF

;CHECK FOR MORE DATA

;BRANCH IF Ok

;EXTRA DATA IN FIi/FO!
sR1 = LINE #

;R2 = CONTENTS OF RBUF

DEC

a(SR

sCLEAR RECEIVER ENABLE

JBRANCH IF 0K
;CSR ERROR

MOV
CMP

aCSR,
R2
#10040¢4 ,R2

BEQ
HLT+2

006377

0
;TIMER COUNT

L+

HLT+2

013276
013300
013304

103271

5%
RO
4%

BPL

SEQ 0068

;CHECK FOR CHAR PRES

BMI
DEC
BNE
HLT+2

HLT+2

104002

005201

4%
aRBUF ,R2

BEC

104002

100002
104002

26-FEB=79
30A (1052)
15:47
PAGE 69
TST51:
TEST RECEIVER UART QVERRUN ON ALL LINES

sSAVE (SR
sCHECK CSR

:R1 = LINE NUMBER
sR2 = CONTENTS OF CSR

INC

+sCOUNT LINES

B8CC

LOPS1

sBRANCH BACK IF MORE LINES

ASL

alCR

CLR

+GO TO NEXT LINE

aCSR

SCOPE
R

A AR R

A AR AR A R

AR AR AR R AR R AR AR

PR R AR R AR AR

R RN AR

R R AR R R

STEST 323
TEST BITS OF BCSR FOR READ/WRITE CAPABILITY
:PROBABLE FAULTY LOGIC:
M7285 (D2=2) E5, E1, (D2-3) E16, E2, E19, E3S

ttt!tttit.tttttt.t'tt.t"it.'.l.l..t'l"..‘i.‘.‘l..tt..t..‘.t‘."..tt.t

3353
3354

013314
013322

012777
012777

TST52:

MOV
MoV

#002010,aCSR
#177777 ,@BCSR

sSET (SR
;SET ALL BITS OF B(SR

33558
3356
3357
3358
3359
3360
3261
3362
3363
3364
3365

LOGIC

017701
022701
001401

MACY11

165770
177777

MOV

CMP

BEQ
HLT+1

104001

005077
017701
001401

15:47
30A( 1052)
26=FEB=79
PAGE 70
TEST READ/WRITE BITS OF BCSR
TSTS2:

165754

104001

CLR
MOV
BEQ
HLT+1

104400

SCOPE

165750

@BCSR,

x1777?7 R1
+4

SEQ

;CHECK AND SAVE BC(SR
;CHECK THAT ALL

JBRANCH IF OK

THE BITS ARE

SET

;BIT(S) OF BCSR FAILED T0O SET

@B(SR
@B(SR,
+4

;CLEAR BCSR

sCHECK THAT IT CLEARED AND SAVE

;BRANCH IF CLR

JBIT(S) OF BCSR FAILED TO CLEAR

I..t...t""**fifi...."t.'..t..lt'.Q.'..tt.'..t..t.ttt'.tt.t'.

TEST 53:

t.t".-.t.

TEST

THAT LINEQO CAN TRANSMIT AND RECEIVE A BREAK

ALSO CHECKS FRAMING ERROR(RBUF BIT13)
ALSO CHECKS PARITY ERROR(RBUF BIT12)

IF ODD PARITY IS SELECTED
M7285 (D2-2) ES, E1,

PROBABLE FAULTY LOGIC:

(D2-3) EV6, E2, E'9, E3S

.'ttl'fi".".Qifitit'ttt0"..'...t.".'t't."‘ttttfi.t...It

t...t’tt".."

013362

004737

014350

TST53:

JSR

PC,

S¥INITA SINITIALIZE

;BIT2 = MAINTENANCE
;BIT3 = CLEAR MOS
:BIT10= R/W BCSR

sWAIT FOR MOS TO CLEAR

013366
013374
013400
013402
013404
013410
013412
013414
C13416

012777
013700
105305

001376
017701
100403
005200
001371

000001
001346

165730
1%:

165712

MOV
MOV
DE(CB
MOV
B8M]
INC

104001

HLT+1

al,

aB(SR

RS
1%
aRBUF,

RO
1%

;BITO = RECEIVER ENABLE
;SEND BREAKS, LINE O
;SET UP TIMER
;SHORT WAIT LOOP

:SAVE CHAR PRES
sBRANCH WHEN FOUND

sWAIT A WHILE

;CHAR PRES NEVER CAME uUP

sR1=CONTENTS OF RBUF
013420
013424
013426

032701
001001

020000

013430
013436
013440
013444
013446

133737
001404
032701
001005
104007

001366

2%:

104001

HLT+1

001300

016000

032701
001401
104001

010000

013460
013464
013466

032701
001401

040000

3%:

/1
#020000
. *4

BITB

giPAR,

BIT
BNE

#010000,R1

HLT+1

013450
013454
013456

104001

BIT

PARITY

3 3

*0DD PARITY SHOULD CAUSE PARITY E&R OR
*R1=CONTENTS OF RBUF

BIT
BEQ
HLT+?

#010000,R1

BIT
BEC

#040000,R1

HLT+1

;CHECK FOR FRAMING ERROR
sBRANCH IF OK
sFRAMING ERROR NOT UP
sR1=CONTENTS OF RBUF
sCHECK ODD PARITY FLAG
+BRANCH IF NOT
s CHECK PARITY ERROR

«*h

;CHECK PARITY ERROR
JBRANCH IF 0K

JEVEN PARITY OR NOQ PARITY
s SHOULDN'T CAUSE PARITY ERROR

sRT1=CONTENTS OF RBUF
2CHECK UART QVERRUN
JBRANCH [F Ok

+UART QVERRUN SET!!

TESTS
26-FEB~79 15:41
DJ11

22=-CZDJA=F=0
CZDJAF .P11

DJ11 LOGIC TESIS

26=FEB=79 15:41

013470
013474
013476

032701
001401

013500
013502
013504

3422

onSWw

F
6
3 QA(1052)
26=FEB=79
15:47 PAGE
TSTS53:
TEST BREAKS ON LINE O

007400

5FQ@ 0070
JR1=CONTENTS OF RBUF

104001

BEQ
HLT+1

#007400,R1
YA

JBRANCH IF OK
JWRONG LINE# IN FI/FO

105701

TSTB

JCHECK DATA

001401

BEQ
HLT+1

104001

100001
104001

005077
105305

165610

MOV

BPL
HLT+1
165602

001376
013526

MACYI1

BIT

017701

i S

FRERRRR
SEEX RERP
—=OVWNOWN
SN —

Z2-CZDJA=F=0
CZDJAF P11

5%:

104400

JR1=CONTENTS OF RBUF

JBRANCH IF 0K
JWRONG DATA RECEIVED

JR1=CUNTENTS OF RBUF

aRBUF,

CLR

aB(SR

BNE

DECB

JCHECK LINE #

RI1

JREAD F1/FC AGAIN

JBRANCH IF OK
JEXTRA CHAR IN FI/FD

JR1 = CONTENTS OF RBUF
;CLEAR BREAK CONTROL REG

+SHORT WAIT LOOP-REGISTER A MARK

SCOPE

RRRRY

.SV S

;Qtt.t'.'t".'.ttttt.'QtQtttt'ttt..'l..!t...tt.tlQt

.l.t.t..ttt'..ttt'..t

JTEST 54:

TEST THAT EACH LINE CAN TRANSMIT AND RECEIVE A BREAK

:
ALSO CHECKS FRAMING ERRORiRBUF BIT13)
3
ALSO CHECKS PARITY ERROR(RBUF BIT12)
:
IF ODD PARITY IS SELECTED
;PROBABLE FAULTY LOGIC:
M7285 (D2-2) ES, E1, (D2-3) t16, E2, E19.

01353¢C

004737

014550

TST54:

JSR

PC,

E35

T I T T T T T T

SFINITA ; INJTIALIZE

:BIT2 = MAINTENANCE
:BIT3 = CLEAR MOS
:BIT10= R/W BCSR

SWAIT FOR MOS TO CLEAR

013534
013536
013542
013546
013552
013554

013556
013562
013564

013565
013570

005001
012704
013700
050477
105305

001376
017702
100403

900001
001346

165552

tLR

LOPS54:
1%:

165540

005200
001371

+SET UP LINE COUNTER

MOV
MOV

41,
TIMER,

R4
RO

@BCSR

;SET BREAK CONTROL BIiT, LINE # IN R1
;SHORT WAIT LOOP

MOV
8M]

aRBUF,
’$

;JREAD RBUF FOR CHAR PRES
JBRANCH WHEN FOUND

BIS
gsgB

R4,
l‘?z

INC

BNE

104002

sBITC = RECEIVER ENABLE

HLT+2

+SET UP LINE MARKER
JSET UP TIMER

JWAIT A WHILE

;CHAR PRES NEVER CAME uP
sR1 = LINE #

JR2 = CONTENTS OF RBUF

013572
013576

013600

032702
00100?
104002

020000

2%:

BIT
WNE

HLT+¢

#022000,R2
L%

;JCHECK FOR FRAMING ERROR
JBRANCH IF 0K

JFRAMING ERROR NOT UP

JR1

= LINE #

sR2 = CONTENTS OF RBUF
013602

010103

MoV

R1,

JGET LINE #

YTMTM

22=CIDJA=F=0
CZDJAF P11

2479

3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
34,92
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508

3509
3510
3511
3512
3513
3514
2515

3516
3517
3518
3519
3520
3521
3522

013604
013606
013610

LOGIC

T £S IS

26=FEB=-79 15 A !

MACYT1

006203

013612

001366

013620
013622
013626
013630

30A(1052)
15:47
26=FEB=79
PAGE 72
TSTS4:
TEST BREAKS ON ALL LINES
ASR
ASR
ASL
BITB
BEQ
BIT
BNE

001300

010000

;/4

TO GET RID OF

BITS

8 0

JSHIFT BACK FOR EVEN ADDR OF

PARITY

[ABLF

%iPAR,PARITY(3);CHECK ODD PARITY FLAG
JBRANCH IF NOT
#010000,R2
'CHECK PARITY ERROR
48
O?D PC?&EY”SHOULD CAUSE PARITY ERROR
"n

HLT+2

R3
R3
R3

SEQ@ 0071

:R2 = CONTENTS OF RBUF

013632
013636
013640

032702
007401

013642
013646
013650

032702
001401

013652
013654
013656
013662

013664

013666

010000

3%:

104002

040000

4%:

#010000,R2
4%

8iT

#040000.R2
.+

BEQ
HLT+2

104002

010203
000303
042703
020103
001401

BIT
BEQ
HLT+2

MOV
SWAB
BIC
(MP

177760

8EQ
HLT+2

104002

;CHECK PARITY ERROR

JBRANCH IF

;R2 = CONTENTS OF RBUF

;CHECK UART OVERRUN
;BRANCH IF OK
;UART OVERRUN SET!!
sR1

RZ,
R3
R3
#177760,R3
R1,
R3
.+,

105702
001401
104002

ISTR

BEQ
HLT#2

013676
013702
013704

017702

013706
013712
013714
013716

005077
005201
006304

013720
013724

005077

165374

013726

012737

000002

100001
104002

165420

165412

;DUP DATA

;LINE # IN LOW BYTE
JMASK ALL BUT LINE #
JCHECK FOR RIGHT LINE #

;BRANCH IF OK
URONG LINE# INFI/FO
= LINE #

104400

015252

CONTENTS OF RBUF

;CHECK DATA
JGRANCH IF OK

-’4

;WRONG DATA RECEIVED

JR1T = LINE #

MOV
BPL
HLT+2

aRBUF,

CLR
INC

aB{SR
R1

BCC

;R2 = CONTENTS OF RBUF
JREAD FI/FO AGAIN

sBRAMCH IF OK

;EXIRA CHAR IN FI/FO

sR1 = LINE #
;R2 = CONTENTS OF RBUF

LOP54

;CLEAR BREAK CONTROL REG
;COUNT LINES
JUPDATE LINE MARKER
JBRANCH [F MORE LINES

CLR
SCOPE

a_SR

s CLEAR CSR

MoV

#e,

ASL

103311

= LINE #

;R2 = CONTENTS OF RBUF

013670
013672
073674

JEVEN PARITY OR NO PARITY
;SHOULDN'T CAUSE PARITY ERROR
;RY = LINE 4

3467

3468
3469
3470
5471
3472
3473
3474
3475
3476
3477
3478

DJ11

SRR AR A A AR

TES' 55:

A RA

TIMES

AT RN AT AR A AR

TeST

THE

AR AN R AR RRAR R R AR RN AR AR AR R AR R R RARE R AR R

THAT RESET

CLEARS ALL BFFERS

FI/FO BUFFER IS NOT COMPLETELY CLEARED

BY RESET; ONLY CHARACTER PRESENT [S CLEARED.

R AR

R R RO RS

22=-C2DJA=F=0
CZD.\AF P11

DJ11

LOGIC

TESTS

26=FEB=79 15:41

MACY11

3523

3540

3541
3542

3543
3544
3545
3546
3547
3548
3549
355
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
2563
3564
3565
3566
3567
3568
3569

3570
3571
3572
3573
3574
3575
3576
3577
3578

PAGE 73

M7285

(L2-8)

"ifi.‘..filfit.tt""t't'fi'.tttfifi.!t.t'tt.'ttl'tfifi."tlt'.t.'tt

.ttt.t't.t"'

013734
013742
013750
013756

052737
012777
012777
012777

013764

012777

013772
013774
014002
014004
014006
014010

000005
012737
013701
000000
001401

014012
014016
014020

017701
001401

14022
014026
014030

000340

TSTSS:

177777

BIS

#340, JHPS

MOV

052507

MOV

177777

MOV

sNOTE:

ALL

;SET PROCESSOR TO LEVEL

#177777,87TCR

:SET ALL TCR BITS

#052507.aCSR

#177777 ,0BCSR

LINES SHOULD BE

*SET ALL R/W BI7S OF

SENDING BREAKS, BUT NONE

001320

RESET
MOV
MOV

014004
1%:

000000

SHOULD DO NOTHING

*CLEAR THE WORLD
SCHECK CSR AND SAVE

CSR,1$
a(PC)+,R1

165306

MOV
BEQ
HLT+1

afCR,R1
v

;CHECK TCR AND SAVE

017701
001401

165276

()
BEQ
HLT+1

aB(SR,R1
.+

sCHECK BCSR AND SAVE

014032
014036
014040

217701

165264

MOV
BPL
HLT+1

aRBUF ,R1
.*4

sCHECK RBUF

014042
014046
014050

0i7701
001401

165260

aTBUF ,R1
.+

JCHECK TBUF AND SAVE

104001

MOV
BEQ
HLT+1

014052

104400

SCOPE

104001

: AR

A AR

;TEST 56:

AR AN R

AR R R AR

012777
042737
052737
012700
012777

100000
014260
000240
000340

000200
000001
010514

TSTSQ:
16524C

AN AR AR AR AR AN A

e
MOV

MOV

165234
177776

MOV
BIC
BIS

177776
165174

MoV

AR P AR R

014152

032777
001374

000020

1657166

10%:

BIT

BNE

R P R R C R A TR R AR RSN RR SRR TR R R RS

(OULD BE ALMOST ANYWHERE'

AR R R R R R A A R R AR R R R R R R AR AR AR AR

R AR AR R

R RO AR RS R

o om
:SET UP LINE COUNTER
#100000,R3
:SET UP RCV DATA

#ISRS6,@RCVVEC

>SET UP RECEIVER INTERRUPT VECTOR

:SET_UF LINE MARKER

4240,
#340,
#200,

~ BRCVLVL
#PS
;CLEAR PROCESSOR PRIORITY
a@#PS
:SET PRIORITY T0 4
R0

#0f0514,aCSR

:
:

14124

R R AR A AR R R

AND SAVE

SEND A BINARY COUNT PATTERN ON EACH LINE

;PROBABLE FAULTY LOGIC:

AR AR

005001
012703
012777

SHOULD BERZCEIVING

177777

014054
014056
014062
014070
014076
014104
014112
014116

CSR

BECAUSE THE HALF DUPLEX BIT IS SET
MOV
#177777 ,@TBUF
;LOADING TRANS BUFF WHEN BREAK BI7 SET

BEQ
HLT+1

100001

:SET ALL BREAK CONTROL BITS (SEND BREAKS)

#3174,

10%

aCSR

;

T3
Té
8

T2
1T

oueun

3539

FAULTY LOGIC:

MAINTENANCE

(LR MOS
RECEIVER INTERRUPT ENB
TRANS SCAN ENABLE

STATUS ENARLE
OR MOS 10 CLZAR

3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538

;PROBABLE

15:47

3 TTH»LDPDD
W
I bt b St s e VY

3524
3525
3526

304{1052)
26=FEB=79
TSTSS:
TEST RESET

ZZ-C2DJA-F=-0
(ZD AF .P11

3579
3580
3581
3582
2583
3584
3585
3586
3587

3588

3589
3590
3591
3592

DJ11 LOGIC TESTS
26=FEB=79 15:41

014134
014142
014144
014150
014154
014156
014162
014164
014170

(052777
005004
010077
005777
100375
010477
105204
123704
001367

14176
014200
014202
014206

120403
001374
017702
022702

0141_72

147704

3593
3594
3595

014212
014214

001401
104002

3597
3598
3599

014216
014222
014224

017702
100001
104002

3596

3600
2601

3602
3603
3604
3605
3606
3607
3608
3609
3610
%}}

014226
014230
014234
014236
014242
014244
014250
014252
014254
014256

105003
062703
005201
032701
001002
005237
000241
006300
103332
000416

3613
3614
3615

014260
014264
014266

017702
100401
104003

3616
3617
3618
3619
3620
3621
2622
3623

3624
3625

MACY11

0000C1

165156

165154
165144

1%:
2%:

165144
001360

165166

3%:

165112
110505

BIS
CLR
MQV
TST
BPL
MOV
INCBR
CMPB
BNE

BICB

165100

000003
4%:

165036

ISR56:

aDJLEN,R4

R4 ,R3
3%
aCSR,
R2
#110505 ,R2

MOV
BPL
MLT+2

aRBUF,
L+

000400

#1,aCSR
R4
R0,
aTCR
aCSR
2%
Ré,
o TBUF
R&
SUM,R4
2%

CMPB
BNE
MOV
CMP

BFQ
HLT+2

001364

CLRB
ADD
INC
BIT
BNE
INC
CLC
ASL
BCC
B8R
MOV
BM;
HLT+3

R3
#6400,
R1
#3,
43
DJLEN

)

R¢

R3
R1

RO
1%
ENDS6

aRBUF,
1%

147703
020203
001401
104003

3626
3627
3628
332233

014302
014304
014310
C14312

105203
017702
100767
000002

3631
3632
3633
3634

014314
014322
014330
(14336

162737
013777
012777
005077

165070

11%:

165012
12%:
000004
001332
000004
164762

001364
165000
164774
’

ENDS6:

Bi(B
CMF
BEQ
HLT+3

JSET THE RCV EN BIT
JSET FOR QUTPUT DATA
;TRANS CONTROL, ONE L INE AT A TIME
JWAIT FOR TRANS READY

sSEND DATA
;BINARY COUNT
JMAKE SURE THE CORECT NUMBER S OUTPUTED

JSET FOR MAX, RECIEVER C(OUNT

;WAIT FOR RECEIVER DONE

;SAVE (SR
;JCHECK CSR
JBRANCH IF CK
.CSR ERRCR
;R1=LINE #

:R2=CONTENTS OF (SR

s(HECK CHARACTER PRESENT
JBRANCH IF 0K
sCHARACTER PRESENT SET!!

;R1=LINE #
;R2=CONTENTS OF (SR

JRESFT EXPECTED DATA
JUPDATE LINE # IN EXPECTED DATA
;UPDATE LINE #
;CHECK FOR FCURTH LINE
J3RANCH IF NOT
;MOVE CHARACTER LENGTH POINTER

JUPDATE L INE MARKER
;BRANCH IF MORE
:SKIP ISR

.
014270
(14274
014276
014300

30A(10 52)
26-FEB=79
15:47
PAGE 74
TSTS6:
TEST ALL DATA ON EACH { INF

@DJLEN,R3_
R2,
R>
.4
‘

JREAD FIRST DATA
JBRANCH IF CHARACTER PRESENT
+ INTERRUFT BUT NO CHAR PRESENT

JRI1=LINE #
sR2=CONTENTS OF RBUF
JR3=EXPECTED DATA

JMASK CHAR. LENGTH
JCHECK THE DATA
JBRANCH iF OK
+DATA ERROR
JR1=_INE #

;JR2=CONTENTS OF RBUF
JR3=EXPECTED DATA

INCR
MOV
B8M]
RT

R3
aRBUF,
118

SUB
MOV
MoV
CLR

4,
DJLEN
;RESET CHAR LENGTH PQINTER
RCVLVL, @RCVVEC ;RESTORE RECEIVER INT. VEC
#107,
aRCVLVL
aTCR
;CLEAR T(R

JUPDATE EXPECTED DATA
JREAD MORE DATA
;BRANCH IF MORE
JRETURN

SEQ V073

2Z-CZDJA=F=0
CZDJAF . P11

DJ171 LOGIC TESTS
26=FEB=79 15:41

3635
33233)67:

014342
01434€¢

005077
104400

164752

3638
3639
3640
3641
33&2

014350
014356
014364
014366
014372

012737
023737
002004
005037
000137

000020
001362
001350
002472

014376
014376
014402
014410
014414
014420

004737
062737
005537
000004
032777

017454
000001
001314
016516
002000

000004
000004
013700
001405
000005

000007
000177
000042

3044
3645

3646
3647
3648
3649

3650

014426

3657
3652
3653
3654
3655

014430
014434
014440
014444
014446

3657

014450

3660
%}

014456
014460

3656

2658 014452
3659 014454

001004

MACYT1

015252
003344

DONE:

001316
164746

014450

000240
000240

000240
000137

002472

3%:

3667

014464

3670
3671

014470
014474

3673
3674
2675

014502
014506
014510

060100
011037
162737

017220
000060

%77
3678
7679

014516
014524
014530

013737
006137
006137

017220
017220
017216

3681

014540

001371

3676
3680

3683E 32

3684,

014476

014534

010046
01014€

013700
006100

012701

(05337

;CLEAR (SR

MOV
CMP
BGE
CLR
JMP

#20,
TIMES
DJUUT,UNITS
DONE
ALMFLG
RESTAR

JCHECK FOR LAST UNIT
JBRANCH IF LAST UNIT
JCLEAR FLAG FOR NEXT UNIT
;JUMP IF NOT

JSR
ADD
ADC
TYPE
8IT

PC,
KBDINT
#1 ,PCNT+2
PCNT
.MEOP
#SW10,aSWR

JADD 1 TO THE PASS COUNT
JMAKE IT DOUSLE PREC.
JEND OF PASS INDICATOR
;RING THE BELL?

TYPE
TYPE
MOV
BEQ
RESET

JBELL
77
a#42,R0
3%

JSR

7.(0

NOP
JMP

RESTAR

NOP
NOP

3663

3668 014464
3665 014466

aCSR

BRSET:

001362

017226

MOV
MOV
MOV
ROL

017230

JRING THE BELL
;TYPE A FILLER FOR 11/05
JGET MONITOR ADDRESS
; IF NONE
*RESET AND

017222

1$:

;GO TO MONITOR

*SAVE ROOM
*FOR
JACTIM
JRETURN

RO,
R1.

DJUUT,
RO

-(SP)
-(5P)

#PRTBLE,
R1,
(RO),
#60,"

RO
MASK
MASK

MOV
ROL
ROL

MASK,
MASK
NOW

LEVEL

BNE

DE(

014542
014544

012601
012600

MOV
MOV

388

014545

000207

RTS PC

: SAVE RO
* SAVE R1

MOV

ADD
MOV
SUB

017220

NO!

THIS SUBROUTINE WILL CALCULATE THE BR PRICRITIES.

3685
333639

352209

$ENDAD = .

004710

SEQ 0074

CLR
SCOPE

8NE

4%:

3664

3672

J
6
30A(1052)
26-FEB=79
15:47
PAGE 75
TSTS6:
TEST ALL DATA OM EACH LINE

s LOAD UP UUT DEVICE #
2 MULT X 2 TO SAVE OFFSET

* LOAD IN BASE OF TABLE

* STORE LOCATION OF BR IN RO
: SAVE BR FROM QUESTION
* MASK= DECIMAL #(0 10 7

* CREATED FROM ASCII

: STORE FOR ERROR PRINTOUT
* ROTATE S TIMES TO
* CREATE BR LEVELS AS BELOW
* COUNT TO §

* BACK TILL 5 ROL DONE

;' NOW= 340,THEN 300,THEN 240,THEN 200 ETC.

(340,300,240,200,140.100,40,0)

(sP)+,
(SP)+.

‘R1
RO

; RELOAD R!
: RELOAD RO

; BACK TO MAIN CODE/ QUESTIONING

. MASK AND NOW ARE LOADED.

27=(7DJA=F=0
CZDJAF P

DJ11

LOGIC

TESTS

26=~FEB=79 15:41

MACY11

3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
370¢
5703
3704
3705
3706

3714

3715

3716

3717
3718
3719
3720
3721
3722
3723

SEC 0075

INITIALIZATION ROUTINE
DEVICE

{ON FAILURE:

TSET:

‘BITO1
*BIT02
‘BITO3
‘BIT06
*BITOB
*BIT10

=
=
=
=
=
=

CSR REGISTER

HALF DUPLEX
MAINTENANCE
CLEAR MOS
RECEIVER INTERRUPT ENABLE
MASTER XMTR SCAN ENS
R/W BCSR

3‘;"5‘{7 FOR MOS TO CLEAR

3707

3708
3709
3710
3711
3712
3713

K
6
26-~FEB=79
15:47
PAGE
BELL AND SCOPE ROUTINE

30A(1052)

‘BITOO = RECEIVER ENABLE
:

014550
014556

012777
000413

002014

164542

01456C
014566

012777
000407

000514

164532

INITB:

014570
014576

012777
000403

000416

164522

INITC:

014600

012777

000414

164512

014606

INITA:

SET

MOV
BR

#2014 ,3CSR
INITR

MOV

#514,3CSR

INITR

MOV

#46,aCSR

INITR

;BIT(S)1,2.3.8 THEN 0O

INITD:

MOV

#414,3CSR

:BIT(S)2,3,8 THEN 0

005000

INITR:

CLR

014610
014612

005200
001004

1$:

INC

014614
014616

011600

014622

104000

014624
014632

032777
001366

000020

164466

014634
014642

052777
000267

000001

164456

162700

000002

B8R
B8R

BNE
MOV
SUR

: ANT IHANG

28
(SP) RO
#2,R0

*ROUT INE
;RECORD SUBROUTINE CALL RETURN
*FORM CALL ADDRESS FOR DISPLAY

HLT

28:

BIT
BNE
B8!S
RTS

:BIT($)2.3,10 THEN 0

;BITH#G OF

#BIT4, (SR
1%

o,
BC

ACSR

DEVICE CSR FAILED TO (LEAR

sTEST HAS MOS CLEARED
.-rsqgrenmm:s
:BITOO RECEIVE ENABLE
*CONT INUE

22-CZDJA=F=0
CZDJAF .P11

3739
3740
3741
3742
3743
3744,
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754,
3755
3756
3757
3758
3759

5760

3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3775
2774
3775
3776
2777

014644

014650
014656

014662

014666
014672
014676
014704
014706
014710
014716
014722
014724
014726
014732
014734
014736
014740
014744
014752
014754
014762
014770
014772
014774

DJ11 LOGIC TESTS
26=FEB-79 15:41

013701
012761
052711
005037
C05037

001329
009001
000004
001356
001360
001352
000200
000377
001356

MACY11

000004

3CA(1052)
15:47
26=FER=79
SILO ALARM LEVEL ROUTEEN
ALMCK:

CLR

(LR

001354

¢%:

000006
1%:

015056

015002

015004
015012
015016
015024
015026
015032
015034
015040
015044
015050
015054

MOV
MOV
BIS

000001
000001

001356

001356
001360

001360
000377

001356

001360

000377
017454
010000

001360

MOV

TST
BPL
MOVB
INC
TSTB

8MI]
JSR
BR
BR
BR
BIC
CMP
BEQ
ADD
cMP
BLT

BEQ
SuB
BR
MOV
JSR
BIT
BEQ

164350

016756

016042
016676
001356
016042

CLR

13%:

CSR,R1
#1,4(R1)

#2172,
COUNT

(R1)

PAGE

SEQ 0076

;GET CSR ADDR INTO R1
JSET LINE O IN THE T(R
JSET THE MAINT BIT

SUM

TIMERA

#200, TIMERB
(R1)

#377 ,6(R1)
COUNT
(R1)

R5,TIME
1%

ALMCK

#8170, (R1)
#1,COUNT
43
COUNT , SUM

SuM, #5377
73

108
COUNT ,SUM
118
#377,5UM

PC KBDINT

#5W12 ,aSWR
13%
MALARM
R1,TTY

JSET UP TIME CONSTANTS

;WAIT FOR TRANSFER READY BIT

;OUTPUT A (CHAR TO TBUF
;COUNT EACH CHAR
;CHECK FOR DONE IN THE (SR
;IF SET GET OUT OF THE LOOP
;GIVE DONE TIME TO SET
JRETURN TO TEST FOR DONE AGAIN
JRETURN TO OUTPUT ANOTHER (HAR
;ERROR RETURN TRY AGAIN

;TURN OFF RCV ENABLE

;IF SILO LEVEL SET FOR 1 THEN GET CQuT
CONTINUE TO A COUNT OF 256

;IF EQUAL USE IT
;IF GREATER SUBTRACT 1 COUNT SO IT'S LESS
sALL SET GET OuT
sPUT SUM TO MAX VALUE
;GET THE SWITCH REGISTER
.'fslNl ALARM LEVEL?

TYPE,
MOV
JSR
TYPE,
MOV
JSR
RTS

COUNT, TTY
PC.PRINTR
PC

sPRINT ALARM LEVEL

INCB
BNE

TIMERA
1$

< INCREMENT THROUGH ONE WCRD
;GO TEST FOR DONE AGAIN
;MAKE TIMERB LARGER IF FAST PROCESSOR

COUNT 422
2%

sHAVE QUTPUTTED 18 TIMES
:NO, GO QUTPUT ANOTHER C(HAR
:;gS.Dggfi DID NOT SET AFTER 18 QuUTPUTS

(RS)
+
(RS)+
RS

;SET RS FOR ERROR RETURN

PC_PRINTR
MSGDAS

sYES, PRINT (SR FIRST

3778

015056
015062
015064
015070

015072
015100
015102

015104
015106
015110

105237

001012
905337
001007
023727
001002

001352

TIME:

001354

001356

000022

DEC
BNE
CMP

104007

BNE
HLT+1

005725
005725
000205

TST
TST

RTS

sSET RS FOR NEXT QUTPUT RETURN
sRETURN FROM ABOVE OR RETEST DONE

27=CZDJA=F=0
CZDJAF.P1T

DJ11 LOGIC TESIS
26-FEB=79 15:41

MACYi1

%;’95

30A(1052)

;

3793

26~FEB=79
15:47
SCOPE LOOP HANDLER

$SCOPE

6
PAGE 78

SCOPE LOOP HANDLER

:THIS ROUTINE HANDLES THE ITERATIONS, LOOPING, ERROR

3;3‘5'

*LOOPING, AND THE DISPLAYING OF THE TEST NUMBER.

3796

:"'SCOPE'' IS PLACED BETWEEN EACH SUBTEST IN THE TEST AND

§77gg

2799
3800
3801
3802

:RECORDS THE STARTING ADDRESS OF

015112
015116
015124
015126

3803

015134

3805
3806
3807

015144
015146
015154

3804

3808
3809
3810

3811

015136

015156
015162
015164

004737
032777
001404
127737

017454
000400

164250

164242

001310

032777

040000

164230

004000

164220

001434

001026
032777
001012

105737
001404
123737

015252

001311

112737
105237

000001
001310

001311

001013

g}g

015206
015212
015220

011637
013737

015250
001310

3818

015222

105237

001311

005737
001760
013716

015250

3814
3815

3819

3820
3821
3822

015174
015202

015226

015234
015240
015242

000002

013737

333222

015246

000002

3825
3826

075250
015252

000000
000020

1%:

001311

015172

3812
3813

TRAPS:

001310

BEQ
BIT

BNE
BIT
BNE

TSTB
BEQ
CMPB

BNE

2%:
MOVB
SVLADS: INCB

MOV
MOV

001376
001376

JSR
BIT
BEQ
(MPB

RTI

KITS:

OVERS:

015250

INCB

MOV

ST
BEQ
MOV
RTI

LAD:
TIMES:

0
20

PC,
KBD INT
#SW8,aSWR
1%
@SWR, ICNT

OVER$

#SW14,aSWR

KITS
#SW11,aSWR
SVLAD$

ICNT+1
2$
TIMES,ICNT+1

KITS

#1,1CNT+1
ICNT

THE SUBTEST IN 'LAD:'’

;LOOP
ON SPEC. TEST?
:NO LOOP ON SPEC. TEST
:ON RIGHT TEST?
aSW7-0s

:NOT RIGHT TEST
:LOOP
ON TEST?

*LOOP ON TEST IS SET
*KILL ITERATIONS
:YES = KILL ITERATIONS
*FIRST ONE?
*BRANCH IF FIRST
:DONE?

*BRANCH IF NOT

SFIRST ITERATION
SCOUNT TEST NUMBERS

(6) ,LAD
ICNT ,4DISPLAY

:SAVE LOOP ADDRESS
:DISPLAY TEST NO. AND ITERATION COUNT
SRETURN

ICNT+1

:INC THE ITERATION COUNT

LAD
SVLADS
LAD, (6)

SEIRST ONE?
SYES
:FUDGE RETURN ADDRESS

ICNT ,@4DISPLAY

.SET
uP DISPLAY

SFIXES PS

:LOOP ADDRESS
SRUN 20 TIMES

22-CZDJA=F=0
CZDJAF .P11

DJ11

LOGIC

TESTS
26-FEB=79 15:4 1

MACY11

3827
3828
3829

30A(1052)

26=FEB=79

15:47
SCOPE LOOP HANDLER

SHLT

PAGE

SEQ 0078

ERROR TYPEOUT HANDLER

:THIS ROUTINE PRINTS OUT ERROR MESSAGES STARTING WITH THE
;ADDRESS OF THE 'HLT''. IT ALSO COUNTS THE NUMBER OF ERRORS

:AND HAS THE CAPABILITY OF LOOPING ON ERROR, BELL ON ERROR,
:"HALT''
ON ERROR, AND INHIBIT TYPEOUTS. AN OPTIONAL ARGUEMENT

:(HLT+3) WILL BE PLACED IN "HLTCTS:"' FOR ADITIONAL TYPEOUTS.

3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3859

015254
015260
015266
015270
015274
015300
015306
015310
015320
015324
015332
015340
015344
015350
015360
015354
015370
015372
015374
015400
015406
015410
015412
015416

000137

3861
3862

015422
015424

009000
000000

3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875

015426
015426
015432
015436
015444
015450
015452
015460
015464
015466
(015472
015474

3857

3858

004737
032777
001402
005¢37
032777
001026
000004
011637
162737
117737
013705
004737
000004
004737
005777
100001

004737
032777
001001
000002
105037

013705
004737
042737
105337

100411
062737
000094
010005
004737
000764
000207

017454
002000
000007
001312
020000
015314
015424
000002
000066
015424

164106

164066

EMTS:

1%:

015424
015422

JSR
BIT
BEQ

TYPE

INC
BIT

PC,

KBD INT

:§U10,BSUR

;BELL ON ERROR?

JBELL

;RING BELL

ERRORS
#SW13,aSWR
2%
sa €
(6) ,HLTADR
#2 ,HLTADR
@HLTADR HLTCTS
HLTADR,TTY

016042

PC,PRINTR

015426

PC .ERRORS
aSWR

015354

..’2

2%:

164004

017454
001000

PC,KBDINT

163766

0529.35041
.+

001311

ICNT+1
KITS

015222

HLTCTS:

000100
016527
016042

ERRORS:

015464

1$:

015464
2%:

;COUNT THE NUMBER OF ERRORS
;SKIP TYPEOUT IF SET
:SKIP TYPEOUTS
;. ASCIZ <15><12>
;sPUT ADDRESS OF INSTRUCTION ON STACK
;FUDGE ADDRESS

JGET HLT ARGUEMENT
;TYPE HLTADR IN OCTAL
;TYPE LEADING ZERG'S
AL "
;GO TO USER ERROR ROUTINE

sHALT ON ERROR

sSKIP IF CONTINUE
sHALT ON ERROR!

sCHECK FOR INHIBIT LOOP ON ERROR
:SKIP IF LOOP ON ERROR
sRETURN
sCLEAR ITERATION COUNT

sLOOP ON TEST UNTIL NO ERRORS
+HLT ARGUEMENT

HLTADR:

001320
016042
0C7700
015422

:NO - SKIP

sLAST HLT INSTRUCTION EXECUTED
CSR,TTY
PC_PRINTR

#7700,2%
HLTCTS

sTYPE (SR IN OCTAL

sTYPE LEADING ZERO'S

#100,2%
SPACE
X0, 7Ty
%7.PRINTR

1%
PC

sTYPE REGISTER X IN OCTAL

77-CZDJA=F=0
CZDJAF .P11

DJ11 LOGIC TESTS
26~FEB=79 15:41

MACY11

3876

333;;

015476
015504
015510
015514
015516

3885

015522

3886
3887

3888
3889
3890

3891

3892

3893

3894

3895
3896

015520

015524
015532

012737
012702

000015

162703

000060

015554

001420

015562
015566

032703
001013

015556

015614

006311
103410
006311
103406
006311
103404
050311
005337

015612

000755

015616
015624
015626
015630
015632

013737
012603
012602
012601
013737

000244

ggg

015640

000205

g}g

015642

000000

3917
3918

015644

015646
015652

3919
3920

015656
015660

3922
3923
3924
3925
3926

015666
015672
015676
015702
015704

3921

015664

010346

012703
022703
001415
105737

100375

113713
142713
122713
001403
122713

3927

015710

001006

2929
2930

015712
015724

000004
000750

3928

3931

000020
015772

120327

112203

015712

015726

111337

READIN: MOV
JSR
CLR
MOV
MOV

MOV

015550

015546

015770

010346

012501

000120

3906

3916

000001
015644
015770

122712
001425
005017

015570
015572
015574
015576
015600
015602
015604
015606

3907
3008
3909
3910
3911

012737
004737
005037
010146
010246

015536
015542
015544

3897
3898
3899
3900
3901
3902
3903
3904

3905

;SUBROUTINE TO SAVE INPUT AS OCTAL NUMBER

3879
3880
3881
3882
3883

3884

30A(1052)
26=FEB-79
15:47
PAGE 80
,
TELETYPE INPUT ROUTINES

MOV

017664

MOV
MOV

1%:

CMPB
BEQ
CLR

MOVB

177776

015642

177776

3%:

#7120, (R2)
3$
(R1)

MOV
MOV
MOV
MOV
MOV
RTS

READS:

1$:
2%:

177560

000025

016514

BEQ
TSTB

BPL

177562
000200
000177

015716

MOV

MOV
CMP

4$:

3$:

;PUSH R1 ON STACK
*PUSH R2 ON STACK

“PUSH R3 ON STACK
:CHECK FOR ‘P

#177770.R3
3s

(R1)
2%
(R1)
2%
(R1)
28
R3, (R1)
CNT

aHPS,
PSTEMP
(6)+,R3
(6)+,R2
(6)+,R1
PSTEMP, a#PS

PSTEMP: 0

015772
016012

;GO READ TTY UNTIL (R

(R2) +,R3

#60,R3

#20,CNT
#INPUT ,R2

SUB

ASL
BCS
ASL
BCS
ASL
BCS
BIS
DEC

2s:

(R5)+,

R3,#15

BIT
BNE

017664

R3,=(6)

(MPB

BEQ

177770

#1, INHRE
PC.
READS
INFRE
R1,=(6)
R2.=(6)

:BRANCH IF BAD DATA

:MAKE SURE Z-BIT IS CLR

;SAVE CONDITION CODES
:POP STACK INTO R3
:POP STACK INTO R2
;POP STACK INTO R1
:RESTORE CONDITION CODES

: TEMPORARY STORAGE FOR PS
R3,-(6)

#INPUT ,R3
#INPUT+20,R3
48
a#177560

:SAVE R3

:GET ADDRESS
:BUFFER FULL?

SYES = TYPE ‘"'
:WAIT FOR

:A CHARACTER

MOVB
BICB
(MPB
BEQ
(MPB

a#177562.(3)
#200,(3)
#177.(3)
48
#25,(3)

:GET CHARACTER
SGET RID OF JUNK
*IS IT A RUBOUT
:SKIP IF NOT

TYPE
BR

c 4
ik

S ASCIZ *"''¢15><i>'s *
22AP THE BUFFER AND LOOP

BNE

MOVB

(3),.TYPE

*SET UP FOR TYPING

SEQ 0079

ZZ-CZDJA=F=0
CZDJAF .P11

3932
3933
3934
3935
3536
3937
3938
3939
3940
3941
3942
3943
3944

DJ11

LOGIC

TESTS

26~FEB-79 15:41

015732
015736
015742
015744
015750
015752
015754
015760
015764
015766

000004
012603
000207

015770
015772

000000
000020

000004

122723

001343
005737
001401
000402
105063

MACY11

30A(1052)

016514
000015

177777

7
PAGE 81

TYPE

.. TYPE

JECHO

:LOOP IF NOT RETURN

TST

:
INHRE
INPUT¢

INPUT ROUTINE

(MPB

5¢%:
6%:

15:47

TTY

BNE

015770

000012

26=FEB=79

BEQ
Bi
CLRB
TYPE
MOV

#15,(3)+
INHRE

5%
68 _
=1(3)
12
(6)+,R3

SEG 0080
IT

JCHECK FOR RETURN

RTS

:ZAP RETURN (THE 15)
:TYPE A LINE FEED
:RESTORE R3
:RETURN

0
BLKW

sTTY INPUT AREA

“

Z2-CZDJA<F=0
CZDJAF .P11

DJ11

LOGIC

TESTS

26=FEB-79 15:41

MACYT1

30A(1052)

3945
3946

26-FEB=79

15:47

OCTAL DUMP OF A WORD
$OCTAL

:THIS

ROUTINE

7
PAGE 82

OCTAL
IS

USED

TYPE

SEQ 0081
TYPEOUT ROUTINE
AN OCTAL

NUMBER ON

THE

TTY.

WILL

;ALL 6 CHARACTERS, SUPPRESS LEADING ZEROES, TYPE AN 18 BIT ADDRESS

TYPE

sTHE 16 BITS. IT IS CALLED VIA THE DUMP, SDUMP, DUMP18, OR BITYEE fiAQQO'S.
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985

016032 012737
016040 000411
112737
016042
016050 000402
016052 005037
112737
016056
016064 010446
016066 012704
016072 105014
016074
000411
016076
105014
016100 032737
016106 001004
016110 006105
016112
106114
016114 006105
106114
016116
016120 006105
106114
016122
016124
105714
016126 001402
016130 105237
016134
105737
01€140 001402
016142
152724
105237
016146
016152 001351
016154 022704
016160 001002
112724
016162
105014
016166
016170 000004
016174
012604
016176 000207
016200 000012

170101

000001

016200
177772

016200

016200
016201

016202

000100

016200

BITYPS: MOV

#170101,.PR

PRINTR:

MOVB

#1,.PR

CLR

.PR

PRINTS:

LPTIT:

.PRL:

SRE:

MOvB
MOV
MoV
CLRB
BR
CLRB
BIT
BNE
ROL
ROLB
ROL
ROLB
ROL
ROLB
1ST8

8EQ

016200
016200

INCB

TST8B

000060
016201

IN BIT FORM

sSET ZERO FILL

;SKIP

SWITCH

s SUPRESS LEADING ZERO'S

sSET _COUNT
;SAVE R4
;SET POINTER TO FIRST ASCII CHAR.
;CLEAR FIRST BYTE
;ROTATE FIRST BIT
;CLEAR BYTE OF (HARACTER

;BIT TYPING MODE?
;YES = SKIP 2 ROTATES

sROTATE BIT INTO C
sPACK IT
;ROTATE BIT INTO C
sPACK IT
sROTATE BIT INTO C
sPACK IT
;1S IT ZERO?

sSKIP INC

.PR

cCHECK FILL SWITCH

.PRL

sREPEAT

MOovB

#'0,06)+

TYPE

. PR+2

RTS
BLkW

;SET BIT FLAG ANS 16. CHARACTER COUNT

NOW TYPE

.+6

.PR

#.PR+2 R4

MOV
PR

TTY
(4)
TTY
(4)
TTY
(4)
4)

cMP

CLRB

016202

#-6,.PR+1
R4,=(6)
#.PR+2,R4
(4)
.PRF
(4)
#100,.PR
.PRF

.6
#'0,(4)+
.PR+1

BNE

000060

.+6

BEQ
BISB
INCB

BNE

016202

PTIT

. +6

SSET FILL SWITCH

sSKIP BITSET
sMAKE INTO ASCII CHAR
s INC_COUNT

sEMPTY BUFFER?
sSKIP IF NOT

;LOAD 1 ZERO

(%)

sNULL TERMINATOR

(6)+,Ré

sRESTORE R4

PC
12

TYPE

sRETURN
sCOUNT, SWITCH, AND OUTPUT BUFFER

2Z-CZDJA=F=0
CZDJAF .P11
3986
3987
3988

3989
3990
3991
3992
3993

3994
3995

3996
3997
3998
3999

4000
4001
4002
4003
4004
4005
4006
4007
4508
4009
4610
401
4012
4013
4014
4015

4016
L0117

DJ11

LOGIC

TESTS

26-FEB-79 15:41

016224
016232
016240
016242
016244
016246
016250
016252
016254
016260
016266

012777
012777
010046
010146
010246
010346
010446
010546
010637
012777
000000

016270
016274
016276
016300
016302
016304
016306
016310
016312
016314
016316
016324
016332
016346

013706
005001
005201
001376
012605
012604
012603
012602
012601
012600
012737
012737
000004
000137

016352
016354

000000
000776

016356
016360

000000
000024

016352
000340

MACY11

000126
000122

30A(1052)
PDOWNS:

26=FEB=79

MOV

MOV
MOV

MOV

MOV
MOV
HALT

000072

016356

#ILLUP,QPUVECS

#340,dPUVECS+2
RO,=(6)

R1,-(6)
R2,=(6)

R3,-(6)

R4 ,=(6)

SEC 0082

;SET FOR FAST UP

;PRIO:7
;sPUSH RO ON STACK

;PUSH R1 ON STACK
JPUSH R2 ON STACK

;PUSH R3 ON STACK

;PUSH R4 ON STACK

RS5,=(6)

;PUSH R5 ON STACK

.SAVR6,SP

JGET SP

SP, .SAVR6
#PUPS ,aPUVECS

;SAVE SP
JSET UP VECTOR
JWAIT FOR PF

MOV

1%:

INC
BNE

R1
1%

JWAIT FOR THE
;OF
WORD

MOV

(6)+,R4

;POP STACK INTO R4

(LR

MOV
MOV
MOV
MOV

000024
000026

(6)+,RS

24,26

;POP STACK INTO RS

#3460 3426
ea

;PRID:7
:.ASCIZ <15><12>' POWER"’

.~2

. BEFORE THE POWER DOWN WAS (OMPLETE

RESTAR

HA_T

TTY

INC

;POP
;POP
;POP
;POP

JMP

;WAIT LOOP FOR THE

(6)+,R3
(6)+ RZ
(6)+ ,R1
(6)+,RO

#PDOWNS , a# 24

.SAVRE: O

PUVECS:

MOV

MOV
TYPE

ILLUP:

000026

7
PAGE 83

PUPS :

MOV

016224
000340
016336
002472

PCWER DOWN AND UP ROUTINES

MOV
MOV

016356
016270

15:47

STACK
STACK
STACK
STACK

INTO R3
INTO R2
INTO R1
INTO RO

:SET UP THE POWER DOWN VECTOR

;JMP TO USER ADDRESS

;THE POWER UP SEQUENCE WAS STARTED

;PUT THE SP HERE

;POMER UP VECTOR

27-C2DJA~i=0
CZDJAF .P11
4018
4019
4020
4021
4022
4023
016364
4024
016370
4025
016372
40c6
016376
4027 016400
4028
016402
4029
016404
4030
403
4032
016406
4033
4034
4035
4036
4037
4,038
4039
4040
4041
6042
4043
016410

4044
4045
4046
6047
4048

4049
4050

4051
4052

£053
4054

4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066

4067
4068

4069
4070
4071
4072
4073

016412
016416
016422
016424
016430
016434
016436
016440
016444
016450
016452
016454
016460
016466
016472

016474
016500
016504
014510
016512
016514

016516
016524
016527
016532
C16540
016546
01€554
01€562

DJ11 LOGIC

TESTS

26=FEB-7% 15:41

MACY11

30A(1052)

26=FEB=79

15:47

2
PAGE 84

POWER DOWN AND UP ROUTINES

SEG 0083

:!'ll*.ttfit!iti'lifi'fi'fi'i"i'fi.ttttfifitt't't!'tt'tfittttttttt

;10T HANDLER,
REENTERENT ROUTINE TO EITHER TYPE MESSAGES OR
;
INDICATE A FAULSE INTERUPT OR TRAP,

022716
002407

162716
012601
005726
011602

001000

MALALLAS

LSRR RS

IOTRAP:

(MP
BLT
SUB

000004

MOV
TST
MoV

104002

HLT+2

000092

. #1000,
10T$
44,
(SP)+,
(SP) +
(SP),

el 222222322222222222222
21T T 23
TM

(SP)
(SP)

sMCALL

JPUT IN
R1 FOR TYPING
;POP_STACK
;SAVE RETURN ADDRESS FOR TYPING

JUNEXPECTED INTERUPT OR TRAP
;R1= VECTOR ADDRESS

;CONTINUE

STYPE

sTHIS ROUTINE

;CHECK RETURN ADDRESS FOR FAULSE TRAP
;BRANCH IF "'TYPE'' COMMAND INTENDED
JGET VECTOR ADDRESS FROM RETURN ADDRESS

;R2 = RETURN PC

RTI
2

tt'tltttttt'n

M:ESSAGE
IS USE

THE PROGRAM

TYPEOUT ROUTINE

TO _TYPE ASCII MESSAGES ON THE

sCALL CAN BE IN ONE OF 3 FORMS: 1) *'TYPE

:MESSAGE STARTING IN LOCATION "'ADR:'',

TTY.

THE

,ADK'® - TYPES THE

2) “TYPE ,CHAR'® - TYPES

sTHE ASCII ‘'CHAR'', AND 3) 'PRINT <<15><12>'MESSAGE'S> - TYPES
:THE MESSAGE WHICH IS INLINE ASCII.

010546
017605
032705
001004
010537
012705
105715
001406
112537
165737
100375
000779
017646
062766
022666

001006
062705
042705

10TS:

000002
177400

016514
016514

1%:

177566
177564

0000C2
000002
000002

000004

000002
600001
000062

2%:

020072

042526

TTY,=(6)
2(6),TTY
#177400,TTY
1%
TTY..TYPE

JIS IT A TYPEM?
:NO
sGET THE CHARACTER

(T1Y)

: TERMINATOR?

1S18
8PL

#177564
.=t

+1S THE PRINTER READY
JWAIT UNTIL IT IS

MOV

@2(6),=~(6)

;GET ADDRESS TO BE TYPED

MoV

7S1B

BEQ
MOovB
8R

000120
051522
030461

042522
000040
052103

MEOP:

RETURN:

THE ADDRESS

2%
;GET QUl IF SO
(TTY)+ AN177566 ;LOAD AND TYPE THE CHARACTER
13

;GET THE NEXT ChARACTER

JADD 2 TO THE ADDRESS

BNE
ADD

3%
#2,17Y

sNO
;ADD 2 TO THE ADDRESS

MoV

TTY,2(6)

MoV

RTI

(6)+,2(6)

#4177y

(6)+,TTY

JIS IT

.+2?

sBACK UP TO AN EVEN BYTE

JRESTORE ADDRESS

JRESTORE TTY

;JRETURN

+CHARACTER TYPE LOCATION

_ASCIZ <15><12> 'EOP''
,ASCIZ

SPACE:

- ASCIE

MSGVEC:

,ASCIZ

MSGADR:

;FUDGE

n2,4(6)

BIC

3%:

#.TYPE,TTY

JSAVE TiY
;GET ADDRESS TO BE TYPED

ADD

cMP

TYPE:

047505
000
000040
044506
0457
042104

MoV
MOV
BIT
BNE
MOV

.ASCIZ

<15><i2>

<15><12>'FIRST DJ11

ADDRESS:

<15><12>''VECTOR ADDRESS:

4074
4075
4076

Q77
4078

4079
4080
4081
4082
4083

DJ11

LOG
26~FEB =

27-CZDJA=F=0
CZDJAF P11

016570 051117
016576 042522
016604 000040
014606 005015
016614
043117
016622
023461
01663C
000
016631
015
016636 042116
016644 047503
016652 051125
016660 037516
016665
015
Q16672 051505
016676 026440
016702 005015
016710 046040
016716 035110
016723
015
016730 052111
016736 020054
016744 042440
016752 020072
016756 005015
016764 0460440
016772 046040

017000
077006
017013
017020
017026
017034

017042

017050

MACY11

30A(1052)

26-FEB=79
TYPE ROUTINE

15:47

PAGE 85
[

042104
020072
020056
030512
020040

MSGNUM:

(ASCIZ

<15><12>'N0,

040524
020104
043511
o751
000
047111

MSGCON:

.ASCIZ

<15><12>''STANDARD (ONF IGURATION?

MSGLIN:

.ASCIZ

<15><12>"LINES '

MSGDAS:
MSGLEN:

.ASCIZ
.ASCIZ

"' - '
<15><12>"'CHAR LENGTH:

MSGPAR:

.AS{IZ

<i5><i2>"PARITY(NC, ODD, EVEN):

MALARM:

.ASCIZ <15><12>''SILO ALARM LEVEL FOR (SR''<15><12>

MTITLE:

.ASCIZ <15><12> *'(ZDJA=F

051101
052107
000
051101
047516
026104
024516

047514
046522
046105
041640
000
042132
020040
046040
052040

043040
051123

015
040512
045174
043517
051505

DJ11°'S:

DJ17

*°

‘'

LOGIC

*°

TESTS '<15><12>

005015

000

* MESSAGES FOR INTERRPUT TESTING
* ADUED
017051
017056
017064
017072
017100
017706
017114
17117

017124
017132
017140
017146
17154

017162
017:70
017174
017202

015

020124
044124
050040
052111
037477

35072

015
052101
051511
047517
020122
047111

054522
047111
005015

042503

53412
051101
0290105
044522
042511
043040
000
020C12
041040
040440
020104
047516
027107
040440
000077
042504
020040

DURING

REVISION F OF CZDJAF

MSBR.

LASCIZ <15><12>/WHAT ARE

MSBAD:

_ASCIZ <i5><1:>/

VICE:

LASCIZ<155<i2»>/DEVICE

THE BR PRIORITIES 22 FQR::/

THAT BR IS A GOOD FOR NOTHING.

052040
040507
044526
000040

¢/

TRY AGAIN?/

0084

22=CIDJA=F=0
CZDJAF P11

DJ1Y

LOGIC

26=FEB=7G

TESTS

15:41

MACY11

6130
413
4132
4132
6134
4135

30A(1052)

26=FER=79

TYPE

ROUT INE

STORAGE

000061
000061

PRIOLO:

LEVEL:
UutDJ:
2

INTERRUPT

TESTING
DEFAULT FIRST DEVICF #=1
STORE FOR UNITS+1, DFAU" 1
FOR DECIMAL PRIORITIE
OCTAL # OF BR
OF CURRENT TESTING
OCTAL # OF ALLOWED BR
DECIMAL
BR PRIO
DEVICE
# FOR ROTATE LEFT OF BR
; STORE COUNTER FOR ROLS

.WORD !

MASK :

4139
4140

56Q OCES

«WORD

4137
4138

.WORD

.WORD
LWORD 1
.WORD 1

NOW:

~AGE

4136

FOR

L
NY

.EVEN
CEVNUM:
UNITST1:

15:47

L1417
4142
4143

PRTBLE:

745
4146

SUBROUTXNE TO AUTOMATICLY DETERMINE THE NUMBER OF
AND WHFRE THEIR INTERUPT VECTORS ARE.

.EVEN

4144

4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
47164
4165

4167
4168
4169
4170
L4171

4172
4173

:THIS ROUTINE

:
JNOTE:
017304
017310
017314
017322
017324
017326
017330
017332
017336
017340
017342
017344
017346
017352
017356

077360
017364
01737C
017372
017374

012700

1600C0

012702
012737
0050C1
000261
005770

000007
000002

0627900
05201
000771

000010

103404

AUTO:

000006

062700
010037
000761

000010
001340

005037
010137
007003

000C06
001344

104000

000137

L4176
4177
4178

7%:

4179
4180

4181

4182
4183

4184

4185

013746

012737
013701
01¢721
005721

01272;
00000
012637

iST

014376

000020

017440

001340
040400

000001
00002¢

000020

IS ONLY USED

#160000,R0

81,
CRTI
R1

(RO)

£0,

TEC

R2
7%
210,

BM]

DEVADR

b3 3

IMF

DONE

amt

UNITS

T0 DETERMINE

MOV
WAIT
MoV

RO,

R1,

¥ST

Rl
18

(LR
MoV
BNE

MOV
MOV
MOy
MOV

R2
aré

ADD
INC

HLT

JROUTINE

017400
017404
017412
017416

SEC

ADD
MOV
BR

4174

6175

MOV

MOV
MOV
(LR

28%:

;

TABLE OF

INPUT BR

LOC 42 IS NOT ZERO,

DJV1°S ON THE SYSTEM
AS WHEN THE PROGRAM IS

BEING RUN UNDER ACT11 OR DDP MONITOR CONTROL.
SOME OF THE LOGIC MUST BE FUNCTIONAL OR THIS ROUTINE WillL BOMB!

8(CS

005302
100405

5%:
1%:

.BLKW 26

;START AT NO RESPONSE BASE DJ1T -10(B)
;COUNTER OF NON RESPONSE CR DJ17 OR DONE

;RT] WHEN TIME-QUT

;SET UP COUNTER
;SET CARRY
;CHECK FOR ANY D211°2
JBRANCH IF IT TIMED OuT

;POINT TO NEXT DJ11 ADDRESS
JCOUNT DJ17°S
;LO0K FOR MORE

;COUNT DOWN DEVICES
JBRANCH IF DONE

;PCINT TO FIRST DJil
s5AVE FIRST DJ11 ADDRESS

:GO COUNT pJI11°'S

SRESTORE TIME-QUT (AT(HER
s SAVE COUNT

sBRANCH [F NOI ZERU

SREPORT THAT NO DJ'1'S WERE FOUND
JEXIT THIS PROGRAM

VECTOR ADDRESSES

ax?’0,

=-(SP)

nes,

a# 20

#4400,

(R1)+

DEVADR, R?

JSAVE 10T VECTOR ON THE STA(K
;RESET 10T VECTOR

GE FIRSY DJ ADR
RANS SCAN ENABLE

B8I11i4 =} RAMS

(R1)+
"

(R1)e

(SPis,

w20

: INC
S
w

PQINTER
Ic R
3

[NTERUPT £NASIE

72=-02D JA=F =Q
( ZD JAF PN
4186
6187
4188

4189

4190
4191
192

6193
4194
4195
4196
6197
4198
4199
4200
420

£20¢
4203
4204
4205

£206

6207
4208
4205
6210
4211

4212

4213
L2114

4215

4216
£217
4218
6219
4220
6221
L222
4223
4224

4225
L226

4227

4228

4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241

CJ1Y

LOGIC

T ESIS

CE=FEB=7G 15:47

0172436

000207

017640
017444
017450
01745

011637
022626
200002

162716

017454
0174062
017464
017470
017476
017504
017512
017514
017520

000207

017522

0000090

217524
017530
017534
017542
017550
017552
0717554
017556
017564
27572
017576
U17602

013746
013746
012737
022777
001402
000407
022626
012737
012737
012637
012637
000207

017604
017612
017614
017620

017524
017630
017634
017640
017642
017644
017652
017654
017662

022737
001023
002004
013705
004737
000004
004537
017522
001360
022737
001403
013777
000207

017664

000000

017666
017674
017676
017704

020040
000040
005015
000040

022737
001016
005037
118737
142737
122737
001002

004737

MACYT!

000010
Q01342

30A(1052)

48:

26=FER=79

AUTOMATIC

SUB

#10,
(SP),

CMP

RTI

000176

001374

KBDINT:

017522

BI(S

#200, TMP1
#7,TMP1
1%

017604

BNE
JSR

000200
020007

(MPB

1%:

(SP)+,

#SWREG, SwWk
1%

MOVB

RTS

PAGE

(SP)
VECADR
(SP)+

(mMp
ENE
(LR

177562

SYSTEM SIZER

RTS

MOv

15:47

87
SEQ 0086

;REPOSITION ADDRESS TO RV(C VEC
;SAVE FIRST VECTOR

JRESET STACK FROM 0T
JRETURN FROM INTERUPT = RESTORE

TMP1

177562, TMP1

PC,CNTLU
PC

000006
000004
017554
177777

SUSWRR:

6.-{SP)
4,~(SP)
r1%.,4
#-1,3aSWR

000004
161624

000176
000174
006004
000006

001574
00137¢

000176

001374

2%
3%

1%:

(SP)+,(SP)+
#SWREG, SWR
JDISPREG.DISPLAY
(SP)+,
(SP)+,6

2%:

3%:

PC
(NTLU:

017676
000176
016042
017666
015476

CMP
TYPE

017664

017522

161512

. SWREQ

MOV
JSR

P{,PRINTR

JSR
. WORD
BNE
(MP
BEG
MOv

RS ,READIN
TMP1
CNTLU
#20,CNT
1$
TMP1 ,aSWR

TYPE

000020

ggflREG.SUR

RTS

CNT:

042516

036527

NEWIS:

LASCIZ

(53523

036522

SWREQ:

JASCIZ

SWREG,TTY

NEWIS

NFU:

<185>¢12>''SWR= **

sTYPE SWREG IN OCTAL
sTYPE LEADING ZERG'S

STATUS

27=C20JA<F=0
(ZDJAF P

4oLl

DJ11 LOGIC 1 EE{S
26~FER=7G 1 p)

000001

MACYi1

30A(1052)
+END

26=FEB=79

AUTOMATIC

15:47
PAGE
SYSTEM SIZER

Z7=CZDJA=F=0

(ZDJAF P11

AAA
AGAINT
AGAINZ
ALMCK
ALMFLG
ARQUND
AUTO

DJ'1

LOGIC

TESTS

26=FEB=79 15:41

MACY11

30A(1052)

26-FEB=79

CROSS REFERENCE

002030
004562
011620
014644
001350
002470
017304

697
1312#
29228
2814
5914
784
628

6994
1364
2997
37404
625+
7874
L1514

3354»
6114
7651

3839

BIT1
= 000002
BIT10 = 002000
BiT11 = 004000
BIT12 = 010000
BIT13 = 020000
BIT14 = 040000
BIT15 = 100000
BITZ2 = 000004
BIT3 = 000010
BIT4
= 000020
BIT5
= 0000<C
BIT6
= 000100
BIT7 = 000200
BIT&E
= 000400
BIT9 = 001000
BRSET
014464
CLRVEC
002526
CNT
017664
CNTLU
017604
CONFIG 002004
COUNT
001356
CSR
001320

579#
551
5164
39514
517#
2868
518#
S274
528#
5294
5304
5314
532#
5194
5204
521#
5224
523#
5244
5254
5264
1315
792
3886«
795
663
59%#
5764

1032
2941
865
949

1034
3292
866
950

1044
3757
875
959

971
3029
992

BCSR
BEGIN
BELL
=
BITYPS
BITG
=

001324
001402
000007
(16032
000001

887
938

9%6
1059«
1095
1285
1568
1843

51
DDD

FADR

EFVEC
EVADR

017226
002074

001370

001372
(01340

2088+
2354
2601
2755
2995«
3198
3332«
3711

2272
570

2432
991
2590
886
1015
1021

1796
907
1954
928
2114

2925
794
3904
4201
694
2823
803+

891
949

1000~
1060+
1175«
1324+
1604
1849+

2115
2364
2637
2786
3026
3201
3333
3714

3756
2812

2815+

3641+

3355

3360+

3361

PAGE 90

== USER

SYMBOLS

SEG COBE

3381

3425+

3449+

3509«

3529

3545

1176

1198

:
1266

1284

1325

1399

2671

2741

1478
2193

285,

980
3070
1001

2353
3144
251

3133
3202
3307

887
017
1717

896
1636
<683

1013
2682
2819

1027
3206
3273

3742

3577

1557
,
3732

908
2760
929

917

1875

938

2035

3743«
845+

3750«
846

3758
865+

3760
866

3764
870

3774
874+

3784
875

1032«
1069+
1219
1446
1689
1955

1033
1070
1239
1452
1718
1965

1034
1084~
1244
1479
1728
2001

1038
1085
1265
1489
1764
2007

1064
1089+
1268
1525
1770
2036

1045
1090
1275«
1531
1797
2046

4178

36674
7974
4230
42218
712
2871
€10+

895«
950

1001
1061
1178
1326
1610«
1876

2125
2400
2643~
2792+
3037
3206+
3343+
3717«

1046

2811

42354
4229

2944
815

896
954

1013+«
1066+
1194
1362«
1637
1886

3235
844

907 »
958+

1015«
1067+
1199
1400
1647
1922

908
959

1016
1068+
1214«
1410
1683
1928~

912
970

916+
971

2161
2606*
267
2816+
3041
3209
3353x
3720«

2167+
2433
2679
2819
3069
3230
3574w
3732

2194
2443
2682«
2824
3116
259+
528+
3735+

2204
2479
2683
2832
3133«
3270+
3535
3740

2240
2485+
2689
2845+
3134
3273
3572
386

640+

641

810

165

1312«
709

2922+
7114

3680+

41414

6014
587#4

635

637

639+

6004

TABLE

15:47

917
975

22646
251¢
2702
2872
3140
3277
3577

639

928+
9,9+

2273
2522
2719
2880
3143
3280
3579+

929
980

2283
2558
2742
2893
3148
3286
3582

933
991

2319
2564
2745
2943
317?
3290
3

886+

937+
992
1046

1094+
1277
1558
1807
2082

2325+
2591
2748
2950
3192
3291
3635

DE VNEwW
DE VNUM
DISPLA
CISPRE
DJLEN
DJMXNO=
DJPAR
DJIT
DONE

EMTS

END22
END56

ERRORS
ERRORS
ERROR1
ERRORZ2

FTIME

002400
017210
001376
000174
001364
000020
001366
001362
014376
015254
004732
014314
001312
015426
004672
011752
001400
001514
002156
001650
002242
001572

GETADR
GETLEN
GE TNUM
GETPAR
GETVECL
= 104000
HLT

DJ11

LOGIC

TESTS

26=FEB=7G 15:41

MACY11

7724
766+

786

604n
S474
598#
2066
3631«
5354

782
4215%

812~
2224

2303

2327

2384

2463

5974
3640
618

813«
807

4172

3396
809«

3470
814

3639

3670

3611
5734
3850

3840

3861

674

677

690

872
961

877
973
1073
1196
1433
1585
1735
1887
2004

889
977

5994

1333

INITD

INITR
INPUT

015772

ICNT
ILLUP
INHRE
INITA
iNITB
INITC

014606

41334
1509

1588

1667

18¢7

2645

1906

1985
3607+

914

919
1019
1129
1270
1506
1654

3588

13444

2956
6074
627

29664
796+

7264

636

642

667

672

653
853

655
868
956
1048
1182
1417
1569
1686
1841
1994

736

752

2403
2556
2716
2891
3107
3228
3389
3494
015424
015422
001310
016352
015770
014550
014560
014570
014600

1430

SEG 0089

13674

2132

HLTCTS

781«
3819«

1036
1157
1355
1523
1676
1830
1982

HL TADR

30A(1052)
15:47
26=FEB=79
PAGE 91
CROSS REFERENCE TABLE == USER SYMBOLS

3845+
38614
830~

40134
743%

3440
37144
37174
1471

2504
3715
696

952
1040

1162
1411

1528
1681
1836
1988

740

1064
1192
1427
1575
1729
1846
1999

2159
2312
2466
2618
2772
2991
3157
3294
3410
3543

3813~

3815

2154
2306
2460
2608
2768
2987
3149
3252
3405
3539

3846
3868+
3802

3847

38624

3808

3810

3812+

3881

3935

39434

3879*
37114

4171

1629

2663
37224
708

1710

1591
1745
1893

982
1092
1223
1444
1597
1751
1903

2053
2205
2322
2477
2630
2780

2148
2300
2450
2602
2763
2977
3137
3246
3400
3506

4029

1087
120
1439

893

2047
2164
2317
2472
2624
2776
3031
3162
3304
3414
3547

2142
2290
2444
2561
2750
2900
3119
3240
3394
3501

NN
—
NNWW
O —0owW
WO0WO

27-CIDJA=F=C
CZDJAF .PI

1003

1115

1246
1496
1648
1767
1920

2075
2227
2381

2529

2688
2835
3074
3204
3327

3169
3309
3418
3551

3599

1925

2080
2233
2387
2539
2692
2843
3078
3212
3336
3474
3615

3858~

2734

2805

37204

1947

2028

2107

2186

2265

711

729

733

737

745

247

749

1789

2009+
3619

22-C2DJA=F=0
CZDJAF .P11

INTR1
INTR2
10TRAP
I0T$
ISRS6
KBDINT
KITS
LAD
LENGTH
LEVEL_
LEVEL7=
LOP23
LOP24
LOP25
LOP26

LOP27
LOP30
LOP31
LOP32
LOP33
LOP34
LOP35
LOP36
LOP37
LOP4O
LOP41
LOP42
LOP51
LOP54

00465¢€
011736
016364
016410
014260
017454
015222
015250
001200
017222
000340
005002
005172
005362
(05552

005754
006144
006334
006524
006726
007116
007306

007476
007700
010070

019260
010450
013070
013542

016756
017220
016516
017117
017051
016532
016631
016676
016702
016665
016606

016723

G165€2
017013
000057

017656
004644
011724
002462
017216
000000

DJi1 LOGIC TESTS
26=FEB=-79 15:41

MACY11

776
1309
2919
614
4024
3567
3645
2805
831+
5674
3677«
5334
14904
14794
15584
16374

778

17184
17974
18764
19554
20364
21154

21944

22734
2354m
24334

25124
25914
32774
3448#

3770
1332
3648
785
765
633
694
721
726
718
656

13364

30A(1052)

26=FEB=79

CROSS REFERENCE

15:47

M7
PAGE 92

TABLE =-- USER SYMBOLS

SEG 0090

780

3887

3917

3918

3799
38184

3836
3859

3854

41944

1692

2010%

2328«

2653~

3814

3820

38,2

38254

2955

2962

2972

3674+

3675+

3677

3678+

41384

8804
1167

9014
12068

Ge2n
1257#

9644

9854
1375

10064

1053#
1533#

1077»

2487%
35178

3679+

39444

29594

40234
40434

36134
3767
3811

1166%
700

4139
843
1401

1374 =

7158

812

1480
1559
1638

1719
1798
1877
1956

2037
2116
2195
2274
2355
2434
2513
2592

3341
1350

4088#

742

644
631
4414

1118#
1693

25664
3518

4226
13294
29524
777
1314+
41364
5344

85%#
11654

Ses. 3935

3o S8k

7854
1332

1352

36384

1340

1363

13734

2924

1454»

1612#

21694
3007#

22484
32644

2327#»
3347#

33664

34318

2933

2955

2962

2974

2996

1100#

1691#

=
=
=
=
=

TBUF
TCR

020000
040000
100000
000400
0010C0
001326
001324

2923~

2924

41354

1322«

1369%
3311

2932«

2933

3001«

3570

40174
707
1442
1961

2475
2898
3549
2999
823

4227
744
4011

879
1204

710
1485
1997

1564

2518
2985
3597
3132+
2919%

2078
2597
3150
3627
3255+«
3131~

775

39164

1255

942
1371
2407

2168
3345

2247
3365

376G«

3761

3768

3800

3802

4221

4224

1402«
2435~
3197«

4232+
4214

3129+

1600

3130+

3189+

3190~

3260+

1643

1679

1760

2121
2633
3155

2157
2686
3215

2200
2714
3250

1724
2236
2766
330C

3568«
3191«

3632
3254+

3633«
3567«

3632~

984
1532
2565
3636

1005
161

1052
1690

3515

3526+

1803

2279
2774
3325

2315
2782
3385

7076
1771

1099
1850

2644

2721

2793

2854

3841

3851

3855

4194

3766~
3804

3806

3837

1230
2356*%
3142«
1107
1154
1451«

1112*
1155
1478«

ISR
53»
4 % % %

Sw13
SwW14
SW15
SW8
SwWw9

= 004000
= 010000

2921

= 002000

1313«

Rbt
Y LAY Bl

Sw10

SW11
SwWi2

4225

000176
017676

39534

»»

SWREG
SWREQ

016527
002060
001200
001360
017524
015202
001374

3873

SPACE
SSS
STACK =
SuM
SUSWRR
SVLADS
SWR

3866

b e ek A
b
O
=2 N~y
00—
N S
OO N~ A~

RETURN 016524
SCOPE = 104400

3603

» =

001330
015476
015644
002472

3647%

001332

3646*

RCVVEC
READIN
READS
RESTAR

623«
39864
3775

RCVLVL

2841
3421

3470

SEQ 0091

VIONNISNNO
O
NOHOWO

2360

3396

el
V. LAY Y
N— =N

1839 -

757

S06#
3569«
3907*
3995
3986+
553
S577#

716

015642

016270
016360
(02344
001322

1311
=
769

38194

PSTEM®

PUP$
PUVEC®
QABR
RBUF

3803
568#
S69#
- S704
5714
5744
616
3772
720

N 7
30A(1052)
15:47 PAGE 93
26=FEB=79
CROSS REFERENCE TABLE =-- USER SYMBOLS

= 177776

26=FEB=79 15:41

MACY11

015226

001300
001302
001304
001306
001314
016224
016042
016052
017214
017230

LOGIC TESTS

OVNO
N —
wm—-g-noo

OVERS

PARITY
PARIT2
PARIT3
PARIT4
PCNT
PDOWNS
PRINTR
PRINTS
PRIOLO
PRTBLE

DJ11

—
A TN —
et
AV A2 P o

Z2-CZDJA=F=0
CZDJAF .P11

1957+

2038+

2874~

2947

1133«

1134»

1769

1756

1284~

22=-C2DJA=T=0
CZDJAF P11

DJ11

LOGIC

TESTS

26-FEB=79 15:41

1848+

2353«
THRU1

THRU2

TIME
TIMER

TIMERA
TIMERB
TIMES
MPT

TRAPS
ST

1ST10

1SI11
T1ST12
1ST13

1ST14
TST1S
1ST16

TST17
1ST2
TST2C
TST21
TST22
1ST23
TST24
TST2S
1ST26
1ST27

1ST3
TST30
TST31
1ST32
1ST33
1ST34
TST35

TST36
1S137

004714

011774

015056
001346

001352
001354
015252
017522

015112
002744

003420

003472
003634
003722

003776
004036
004124

004214
003024
004324
004440
004540
004770
005140
005350
005540
005742

003076
006132
006322
006512
006714
007104
007274

007464
007666

1ST4
TST40

003150
010056

1ST4S

011262

{1s141
1ST42
1ST43
15744

1ST46
1ST47
TSTS
IST50
TST51
1ST52
TST53
1ST54

010246
010436
010670
011054

011444
011576
003222
012056
013042
013314
(013362
013530

2852+
1334

2957
3753

5904
1969~
2698
5924
5934
3517«

4196

620
8424

914
10134
10594
1084#
11064
11244
11494
1175#
865#
12144
12654
13094
13924
14714
15504
1629#
17104
8864
1789%#
1868#
1947#%

2028#
21074
21864
22654
23464
9074
2425#
25044
25834
26634

2734m
28054
28614
29194
928#
30174
32704
33534
33754
34404

MACY11
1875

2405
2868+
1342
2964
37804
1165%
2050
2752
3745
3746
3638+

4197=

37994

30A(1052)
15:47
26=FEB=79
PAGE 94
CROSS REFERENCE TABLE =-- USER SYMBOLS
1927«

2432+
2902~

13604

1954«

2484
2941

2006+
2511«
2994~

2035+
2563
3024~

2087+
2590~
3258+

1373«

1414

SEQ V09?2

2114
2642+
3276+

2166+
2671+
3340+

2272+
2791«

3581«

2324+
2811+
3634

25834
1186+

2129+
2829
3780+
3782+
3810

4168~

1229+

2208+
2877

38204

4199

1267

2087+
3036

2368+
3066

2647+
3283

4204

4228

4232

1493+

2526+
3297

1572+

2605+
3382

1732+
2647

1811»

2651+

1890+

2652+

TYPLIN

TSOA

1508
T50C

5054

002124

012172

012542

UNITS

001344

wTDy
VECADR
VICE

017224
001342
017174

UNITST

WAIT1
XMTLVL

XMTVEC

017212

004636
001336

001334

$ENDAD= 014450
"
= 017706

9454
9704

773

3932

718#

30654
30894
31294
3189
5894

767%
L1404

.PR
.PRF
.PRL
LPTIT
.SAVR6
. TYPE

= VITrs

016200
016120
016076
016064
016356
016514

30A(1052)

632
785

3982
761

5854
5844
544,
537#
897
993

1310+

2010
2210
2370
2538
2691
2842
3118
3251
3417
3598
3921

4414

3836
3951«
3960
39614
3952
3994=
3931

633
3648
4010

15:47
PAGE 95
TABLE == USER SYMBOLS

644,

3651

4223

760
782

648

772
13264

26=FEB=79

CROSS REFERENCE

588#

1109
1245
1522
1685
1845

MACY11

656
3652

694
3770

3639

4169+

4226

SEC 0093

= 000004

012236
012326

TS0D

26=FEB=-79 15:41

35264
35654

003274
003346

TYPE

TESTS

014054

013734

TST6
1817

LOGIC

L i100

1Si55

TSTS56

DJ11

Z2-CZDJA=F=0
CZDJAF .P1M

721

3839

654

811

4189~

5554
939

S67#4
951
1047
1166
1443
1606
1766
1971

955
1063
1191
1448
1653
1813
1981

726
3843

742

3849

765

772

3871

3929

888

892
981

1309=

5434
913
1002
1128
1374
1574

1039
1161
1438
1601
1761
1924

2084
2289
2449
2617
2762
304

2550

3656
3855
3955+
39684
40164
4047+

4048

40644

213

867

871
1072
1195
1495
1663
1823
1987

976
1091
1233

1511
1675

1835
1998

2141
2305
2465
2629
2771

2147
2311
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