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Document:	AA11-K 4-channel D/A and Display Control User's Manual
Order Number:	EK-AA11K-TM
Revision:	001
Pages:	32
Original Filename:

OCR Text

AA11-K

4-channel D/A and display
control user’s manual

EK-AA11K-TM-001

AA11-K

4-channel D/A and display
control user’s manual

digital equipment corporation - marlborough, massachusetts

Ist Edition, July 1976

The material in this manual is for informational
purposes and is subject to change without notice.
Digital Equipment Corporation assumes no respon-

sibility for any errors which may appear in this
manual.
Printed in U.S.A.

This document was set on DIGITAL’s DECset-8000
computerized typesetting system.

The foliowing are frademarks of Digital Equipment
Corporation, Maynard, Massachusetts:
DEC

DECtape

DECCOMM

DECUS

PDP

RSTS

DECsystem-10

DIGITAL

TYPESET-8

DECSYSTEM-20

MASSBUS

TYPESET-11

UNIBUS
10/77-14

Page

CHAPTER 1

INTRODUCTION

1.1

DESCRIPTION

1.2

BLOCKDIAGRAM

1.3

AA11-K SPECIFICATIONS (@ £5V RANGE)

1.4

PROGRAMMING

. . . . . .,

. . .. ... ... ...

Display Status Register

1.4.2

D/A Data Registers

CHAPTER 2

12
1-3

. . . . . . . .. .. ... ... .. ......

1-4
1-4

. . . . . .

1.4.1

1-1

... ..
... ... L.
................

. . . . . . . .

. o

1-6

OPERATION

2.1

OSCILLOSCOPE CONTROL DESCRIPTION

2.2

D/ACONVERTERS

2.3

MODES

2.4

DELAYS

. .. . ...
.. e

. . . . .

. . .

2.5

INTENSIFY (Z) PULSE

2.6

ERASECYCLE

2.7

INTERRUPT

CHAPTER 3

INTERFACING

. . . . . . . . .

2-3
2-3

. . . . .

Electrical Characteristics

2-3

. . . .. ... ... . . ... .. .. ...
. . . . . . . . . ... ... ... ......

Use of Logic Signals with Oscilloscopes
Other Uses of Logic Signals

Use with X/Y Recorders
USER INTERFACING
Connections

. . . . . ... ... ... ...
. . . . ... ... .. e
e e

. . . . . . . . . . . . . . .

Use with Strip Chart Recorder

3-1
3-1

3-1
3-2

... ...

3-3

. . . . . ... ... .. ... .....

3-3

. . . . . . . . . .

3-3

. . ..
. .. S

3-3

. . . . . . . . .

Twisted Pair Lines-

Shielding

3-5

. . . . . . . . . . . ... .. .. .......

3-5

. . . . . . . . . .

Drive Capability

OPERATIONAL SETUP

. .

. . . . .

3-5
. . . ... .. ...

. . . . . . . . . . .

Address Selection
Vector

2-1
2-2

. . . . . . . .,

INTERFACE LOGIC SIGNALS

Cables

2-1

3-5

. . . . ... L

3-6

. . . . . L
e

3-6

Priority Jumper
Digital Input Code

. . . . . . . ...

3-7

. . . . . . . . . .. . .. .. ... ...

3-7

AnalogOutput Range

. . . . .. ... ... ... ... ........

3-7

Intensification Delay

. . . . . . . . .. .. ... ... ... .. ...

3-9

INTENSIFY (Z) Pulse Polarity

. . . .. ... ... .. ........

3-9

INTENSIFY Pulse Magnitude

. . . . .. ... ... ..........

3-9

INTERFACING SPECIFIC OSCILLOSCOPES

VRIT

. . . . .. .. ... .....

3-9

Tektronix 602

. . . . . . ...

Tektronix 604

. . . . . . . . L 3-10

3-9

CONTENTS (Cont)
Page

3.44

Tektronix 611 Storage Oscilloscope

. . . . . . . ... .. ...

3.4.5

Tektronix 613 Storage Oscilloscope

. . . . . . . . ... .. ..

3-10

. . . .. ... ... ........

3-11

. . . . . . . . . . .. ... ....

3-11

3.5
3.5.1

TESTING AND CALIBRATION
Offset and Gain Adjustment

3-10

ILLUSTRATIONS
Title

AAl1-K Block Diagram

Page

. . . . . . .. ... ... ... .......

Display Status Register Format

D/A Data Registers Format

. . . ... ... ... ... .....

1-4

. . . . . . . . .. ... ... ......

1-6

Oscilloscope Grid Coordinates

. . . . . . . . .. .. . ... .....

Intensify Logic Simplified

. . . . . .. .. .. ... ... ......

2-1

Delay Circuit Simplified

. . . . .. ... .. ... .. ... .....

2-2

INTENSIFY (Z)Pulse

. . .. . ... . . ... ... ... ......

Erase Cycle Control

. . . . . . .

. . . . . . . .. .. ... .....

Clamping Circuits for Inductive Loads

. . . . . . . .. .. ... ..

Connection to Oscilloscope with Differential Input
AA11-K Address Selection, Switch ST
Vector Setup, Switch S2

and Test Points

. . . . . . . ... ... ...
oo

TABLES

Title

1-1

Display Status Register

3-1

Output Signals

3-2

I/O Connector Pin Assignments

. . . . . . . . . ... ... ... ... ...

. . . . . . . . . .

. .

. e

. . . . . . . . . . . ... ... ...

3-3

H322 Screw Terminal Assignments

3-4

Analog Output Range Selection

3-5

Offset and Gain Adjustment

. . . . . . . . . . ... .....

. . . . .. .. ... .. ... ....

. . . . . . .. ... .. .. e

3-6
3-6

Jumpers, Potentiometers,

. . . . . . . . . . . .. e

Table No.

. . . . ...
. ..

. . . . . . ..o

A638 Module, Locations of Switches,

e .

3-8

CHAPTER 1
INTRODUCTION

1.1
DESCRIPTION
The AA11-K includes four digital-to-analog converters (DACs) and an associated display control.

The display control permits the user to display data in the form of a 4096 X 4096 dot array. Under
program control, a dot may be produced at any point in this array, and a series of these dots may be
programmed sequentially to produce graphical output.
The display control may output to chart or X/Y recorder or CRT display unit. Normal configuration
calls for its use with a VR17 CRT Display Monitor. However, it is capable of operating with other
equipment, such as the Tektronix 602, 604 display oscilloscopes and 611, 613 storage oscilloscopes.
The AA11-K has four 12-bit DACs, each driven from a 12-bit buffer register, and circuitry that provides all controls necessary to output the analog signals to an external oscilloscope. Digital-to-analog
(D/A) output is nominally +5 V; however, this can be set to £0.5 V or £10 V.

Outputs are capable of driving up to 5000 pF of load.

butput operations are accomplished by loading the Display Status register and the D/A Buffer regis-

ters. Through use of Display Status register bits, the user can intensify the contents of the D/A Buffer
registers, provide delays necessary for some oscilloscope applications; provide erase, write-through,

AA11-K FEATURES

e A 4-channel independently buffered 12-bit digital-to-analog éonverter
e Oscilloscope control logic for the four digital-to-analog channels
«4096 X 4096 dot matrix capabilities

« Oscilloscope control signals available for controlling a variety of oscilloscopes, charts, and
X/Y recorders

e Bipolar output ranges of £5V, £10 V, 05V

. o A quad-sized module that interfaces directly to the PDP-11 Unibus

o Status register control of intensify, write-through, non-store, and erase functions to provide
flexibility for oscilloscope or other device control

1-1

and non-store control functions for storage oscilloscope applications, and enable interrupt on completion of oscilloscope intensification, erase, and external delay. The display control offers four program-controlled modes in which the oscilloscope can intensify a point. Jumpers provide additional
display control flexibility by allowing the user to select the desired delay, intensification pulse polarity,
magnitude, and duration.

BUS
INTERRUPT

SCOPE
CONTROL

INTR

ADDRESS
SELECT

DISPLAY

MODE, DELAY,

AND CONTROL
A(17:00)
C(1:0
(1:0)
MSYN SSYN

ERASE.

UNIBUS

D(15:00)

ASE.

REG [

:> D/A

fl REG —

D/7A

BUS
TRANSCEIVERS

——

rec

1(Y)

0/A

CONNECTOR

BUF

|
|
|
|
|
|

|
|

DC TO DC
CONVERTER

I/0

0O (X}

___> REG |—J

‘

.ONTENsm

STATUS

BBSY SSYN
SACK BR-BG

Bs
N

1.2 BLOCK DIAGRAM
Figure 1-1 is a block diagram of the AA11-K. All the circuitry is located on the A638 4-Channel DAC
module.

CP-2275

Figure 1-1

AAI11-K Block Diagram

1-2

172

I XS

AAl1Y

AAALLI"IN

Number of DACs
Digital Input

12 bits bipolar, straight binary; jumperable to 2’s
complement

Digital Storage

Read-write, word operable, single buffered

Output Voltage

+5V; £10V, £0.5 V jumperable

Resolution

1 part in 4096 of full range

Warmup Time

5 minutes minimum

Gain Accuracy

Adjustable

Gain Drift

10 ppm/° C maximum

Offset Accuracy

Adjustable

Offset Drift

20 ppm of F.S./° C maximum

Linearity

+1/2 LSB maximum

Differential Linearity

+1/2 LSB maximum, monotonic

Output Impedance

1 Q@ maximum at D/A output

BCO8R-08 Cable Impedance

4 Q@ maximum

Drive Capability

+5 mA maximum per DAC

Slewing Speed

5V/us

Rise and Settling Time to
0.1% of final value

4 us, 8 us with 5000 pF load in parallel with 1 k{2

Intensify
INTENSIFY Pulse Width

2 us; 6 us in store mode

INTENSIFY Pulse Magnitude

3.3 V; 1.4 V jumperable

INTENSIFY Pulse Polarity

Jumperable (negative normally)

Intensification Delay

1.
2.
3.

1-3

3 usin fast intensify mode
20 us; 80 us jumperable
Externallydeterminedby DELAY RETURNL

Logic Outputs

NON-STORE L, WRITE THRU L,
ERASE L, READY L
|

TTL open collector

BIT9L

TTL open collector, 1K pullup to +5V

Logic Inputs
ERASE RETURN L

Compatible with Tektronix 611, 613

DELAY RET L

TTL Input

Power Consumption
(from processor power supply)
Environmental Specifications

S5Vi5% @25 A

Packaging

One Quad (11 in. X 8.5 in.) module

Unibus Interface
Interrupt Vector Address

360

Priority Level

Bus Loading

1 bus load

Mounting

In any SPC slot

Meet DEC STD 102, Class B*

1.4 PROGRAMMING
Programming the AA11-K is accomplished through the Display Status register and the D/A Data

registers. One hardware interrupt vector is associated with the display control.
1.4.1
Display Status Register
The Display Status register is a read /write register and is byte operable. The bit map is shown in Figure
1-2 and described in Table 1-1.

—

| 09

ERASE
(STORAGE

STORE
(STORAGE

| 08

| O7

| 06

| O5

| 04

NOTUSED

SCOPE)

NOT USED

SCOPE)

WRITE
THRU

BIT
9

INTERRUPT
ENABLE

READY
FLAG

EXT
DELAY

NOT USED

FAST
INTENSIFY
]

MODE

INTENSIFY

(STORAGE

SCOPE)

cp-2272

Figure 1-2

Display Status Register Format

*Class B Environment - Temperature 10° C (50° F) to 110° C (104° F); relative humidity 10% to 90%.

1-4

Table 1-1

Bit

Name

15-13

Unused

Erase (write only)

Display Status Register

Meaning and Operation

Bit 12 = 1, erase data in the storage oscilloscope (write
only).

Write Thru (read/write)
'

Bit 11 =1, an intensified point will not be stored even
though the user is in the store operation. (Works with
WRITE THRU input of the oscilloscope.)

Store (read/write)

Bit 10 =1, all intensified points will be stored.
INTENSIFY pulse width increased from 2 to 6 us.

Bit 09 (read/write)

A digital signal available to the I/O connector.

Unused

Ready Flag (read only)

Bit 07 = 0, the oscilloscope is not ready, do not load or
intensify points. Bit 07 = 1, the oscilloscope is ready.

Interrupt Enable
(read/write)

Bit 06 = 1 and bit 07 in transition from a 0 to a 1 will
cause an interrupt.

Unused

EXT DELAY

When bit 04 = 1, all internal timing stops and READY

(read/write)

signal at the I/O connector goes low. When the external
device (oscilloscope or XY recorder) returns a DELAY
RET signal, an intensify pulse will be generated and the
Ready flag will be set.

03,02

Mode (read/write)
00 Normal

Intensification with bit 00 in SR

01 X Mode

Intensification on loading X D/A (D/A 0)

10 Y Mode

Intensification on loading Y D/A (D/A 1)

11 XY Mode

Intensification on loading X or Y D/A.

Fast Intensify Enable
(read/write)

Bit 01 = 0, all oscilloscope settling delays are as defined
for each oscilloscope. Bit 01 = 1, settling delay is 3 us.

Intensify (write only)

Bit 00 = 1, generates an intensify pulse in mode 00.

Interrupts occur when bit 06, Interrupt Enable, is set and bit 07, Ready Flag, sets. Bit 07 sets when an
INTENSIFY pulse occurs or when an erase operation is complete The Ready flag notifies the user that
all delays (including EXTERNAL DELAYS) and operations are complete.
A point may be intensified in any of four control modes, selected by bits 02 and 03. In mode 0, a point is
intensified by setting bit 00. Mode 1 intensifies a point upon loading the X D/A register; mode 2
intensifies a point upon loading the Y D/A register; mode 3 intensifies upon loading either the X or Y
D/A register.
1.4.2 D/A Data Registers
The D/A Data registers are read/write registers; they are word operable. The data format of these
registers
is shown in Figure 1-3. See Paragraph 3.3.4 for digital input code.

MSB
15

LSB
10

NOT USED

DATA
cp-2273

Figure 1-3

D/A Data Registers Format

When the display control is used with an oscilloscope grid, the coordinate scheme shown in Figure 1-4 is
used. The display takes the form of a 4096 X 4096 dot array. Under program control, a bright spot is
momentarily produced at any point in this array.
STANDARD* REGISTER ADDRESSES

Address

Status
X-D/A0
Y-D/A 1
D/A?2
D/A3

770416
770420
770422
770424
770426

*The register address is switch-selected in increments of 40
locations. However, the relative location of the various
registers will remain the same.
VECTOR ADDRESSES** AND PRIORITY LEVELS
Address

BR Level

360

**The vector address field is switch selectable from 010 to 770-in increments of 10.

1-6

7722

ANNN

72777

R AVAVLV S

Paa

?777

A A A
A 7777
S

4000,4000

2000,2000
[]

77770

4000,0

0,0

STRAIGHT

BINARY

3777 ,3777

0,3777

4000,3777

17771777
o

0,0

6000,6000
|

4000,4000

0,4000

3777 ,4000

TWO'S COMPLEMENT

Figure 1-4

cpP-2271

Oscilloscope Grid Coordinates

CHAPTER 2

OPERATION

2.1

OSCILLOSCOPE CONTROL DESCRIPTION

Point plotting on an oscilloscope or X-Y recorder is done by providing the desired voltage to the X and Y
inputs, setting the beam or the pen in the desired spot.

After allowing time for the X-Y amplifiers to settle, an INTENSIFY (Z) pulse intensifies the positioned
beam or a digital signal lowers the pen to plot a point.
By repeating the process of position /intensify, alphanumeric and graphic information can be plotted.
The AA11-K controls the oscilloscope with the ERASE, WRITE THRU, STORE, READY and BIT 9
open-collector TTL signals provided at the I/O connector.
2.2

D/A CONVERTERS

The four DACs have 12 bits straight binary or 2’s complement input and a bipolar output normally set to
+5 V. The outputs can be jumpered to provide £10 V or £0.5 V if needed. If voltages other than those
provided are required, use the attenuator in the oscilloscope (or plotter).
2.3

MODES

The INTENSIFY (Z) pulse can be initiated in four ways, as determined by bits 02 and 03 in the Display
Status register (refer to Figure 2-1).

LOAD

STATUS REGISTER—]
DATA BIT 00 —

/
LOAD D/A
O —

MODE 10r 3 —

START

INTENSIFY CYCLE

LOAD D/A 1 —
MODE

2o0r3—
CP-2264

Figure 2-1
a.
b.

Intensify Logic Simplified

Mode 0 - Loading bit 00 into the Display Status register will generate a Z pulse after the

provided delay.

Mode 1 - Loading D/A 0 Data register causes an Intensify cycle to start.

Mode 2 - Loading D/A 1 Data register causes an Intensify cycle.

Mode 3 - Loading either D/A 0 or D/A 1 will start the Intensify cycle.

The plot needed determines the mode best suited. For a stationary blinking cursor, use mode 0; for

horizontal lines, use mode 1, etc.
2.4

DELAYS

Various oscilloscopes (or plotters) need different settling delays for their X-Y amplifiers.

A 20-us delay is normally provided by the oscilloscope control delay circuit, shown in Figure 2-2. This
delay can be jumpered to 80 us if needed.

START _F_L

INTENSIFY
CYCLE

17, 77us
ONE

SHOT

3ps

ONE
SHOT

FAST
INTENSIFY
H

DELAYED
START
PULSE

>
—
>

EXTERNAL
DELAY
H

INITIALIZE

+3v —D

SET

DELAY

Do
DELAY

Qoo
|

RETURN L

T
cP-2269

Figure 2-2

Delay Circuit Simplified

The AA11-K provides a 3-us delay in Fast Intensify mode (bit 01 in the Display Status register is set) for
very fast displays or small increments on a slow oscilloscope.
Delays longer than 80 us can be accommodated by the External Delay mode (bit 04 in the Display Status
register is set).
In this mode, an Intensify cycle is started in the AA11-K and halted pending a low-to-high transition
supplied by the oscilloscope to the DELAY RETURN input.

2-2

2.5 INTENSIFY (Z) PULSE
The width of the pulse is normally 2 us. In Store mode (bit 10 in the Display Status register set), the pulse
width is increased to 6 us.
The pulse can have positive or negative polarity (jumper selectable) and jumper selectable amplitude.
The INTENSIFY (Z) pulse circuit is shown in Figure 2-3.

STORE H ——CD‘
+V

DE LAYED _T_L_ 2:6ps

CONNECTOR

% INTENSIFY (2)

START ——0 ONE

PULSE

1/0

SHOT

—FULSE

.
POSITIVE
POLARITY
JUMPER

3.3vz

TO INTERRUPT

CIRCUIT

14V
JUMPER
cP-2270

Figure 2-3

INTENSIFY (Z) Pulse

2.6
ERASE CYCLE
The erase cycle of a storage oscilloscope might take half a second.

The AA11-K will start an Erase cycle when bit 12 in the Display Status register is raised, and sense its
completion as a low-to-high transition provided by the oscilloscope to the ERASE RETURN input of
the AA11-K. After sensing the end of the Erase cycle, the processor can resume plotting.
2.7

INTERRUPT

The interrupt circuitry in the AA11-K is enabled by bit 06 in the Display Status register (refer to Figure 24).
The oscilloscope control interrupts the processor:

Whenever an Intensify pulse is generated, to notify the processor that the Intensify cycle with
its delays (including EXTERNAL DELAY) are over, and the next point plot can be started.

At the end of an Erase cycle, to notify the processor that a new plot can be started.

2-3

INTERRUPT
ENABLE

INTERRUPT

{S.R. BIT 6)

INTERRUPT

OF—" cerouesT

o >

H
DONE

INITIALIZE

+3v

FROM

—D

SET

) >

2pus

ONE SHOT

READY

I/0
CONNECTOR

ERASE

START
INTENSIFY
CYCLE

DATA
BIT 12

ERASE

LOAD

STATUS
REGISTER

|CK

RETURN

(_%;;::XF————_ ERASE L

INITIALIZE

cP-2274

Figure 2-4

Erase Cycle Control

CHAPTER 3
INTERFACING

3.1 INTERFACE LOGIC SIGNALS
The AA11-K display control provides five programmable output logic levels: BIT 9 L, READY L,
WRITE THRU L, NON-STORE L, and ERASE L. The AA11-K provides one output pulse,
INTENSIFY, and accepts two logic inputs, ERASE RET L and DELAY RET L.
3.1.1
Electrical Characteristics
WRITETHRU L, NON STOREL, ERASE L, and READY L are open-collector contact closures to

ground. These lines maintain a maximum output of 0.4 V while sinking 16 mA, and 0.7 V while sinking
40 mA. Maximum allowable output voltage (external pullup voltage) is 15 V. These output lines are
compatible with the corresponding inputs of Tektronix 611 and 613 storage oscilloscopes.
BIT 9 L is a TTL-compatible output with 1K pullup resistor to +5 V. This line maintains an output of
0.4 V while sinking 11 mA, and 0.7 V while sinking 35 mA. It can drive seven TTL unit loads.
The INTENSIFY output pulse is TTL-compatible with jumper W27 disconnected (3.3 V, as shipped).
This line can sink up to 20 mA and source up to 20 mA.

The ERASE RETURN L input line is specifically designed to interface with the Erase Interval signal
of the Tektronix 611 storage oscilloscope or the Busy signal of the Tektronix 613 oscilloscope. This
input can be driven from a standard TTL output.

The DELAY RET L is specifically designed for slow devices where the 20, 80 us INTENSIFY delay is
insufficient. It is TTL compatible.
3.1.2

Use of Logic Signals with Oscilloscopes

The output signal BIT 9 L is specifically intended to select channel 2 on the VR14 oscilloscope. This
signal is driven by bit 09 of the Display Status register. When bit 09 is set (logical one), BIT 9 L is low,
and channel 2 of the VR14 is selected. Since all Display Status register bits are initialized to 0, the
VR 14 is initially displaying channel 1, and channel 2 must be specifically programmed.

The WRITE THRU L output signal is intended for use with: the Write Thru input of the Tektronix
611 storage oscilloscope; Cursor input of the Tektronix 613 storage oscilloscope; or similar input of
other storage oscilloscopes. When bit 11 of the Display Status register is set, WRITE THRU L is low,
enabling the write through function of the storage oscilloscope. During write through, intensifying a
point does not result in the point being stored. The point must be refreshed to be visible on the screen.
This function is useful for finding the present beam position or for positioning movable cursors superimposed on a stored display.

3-1

The NON-STORE L output signal is intended to control whether or not intensified points are stored.

It interfaces with the non-store input of Tektronix 611 and 613 storage oscilloscopes. When bit 10
(Store) of the Display Status register is set, NON-STORE L is high and intensified points are stored.
Since Display Status register bits are initialized to 0, the system is initially in non-store mode.

The ERASE L output signal is intended to interface with the Erase inputs of Tektronix 611 and 613

storage oscilloscopes. When bit 12 of the Display Status register is set, ERASE L goes low, signaling

the oscilloscope to begin an erase operation. The oscilloscope acknowledges the ERASE signal by
means of an ERASE RET L signal (Erase Interval on Tektronix 611 storage oscilloscope or Busy on
Tektronix 613 storage oscilloscope, connected to ERASE RET L on the AA11-K). The ERASE RET
L signal clears bit 12 of the Display Status register, and ERASE L goes high. The ERASE RET signal
stays low throughout the erase interval (0.5 second on the 611 and 0.9 second on the 613 oscilloscopes).

At the completion of the erase operation, the low-to-high transition of ERASE RET L sets the Ready
flag, bit 07 of the Display Status register. While ERASE RET L is low (during the erase operation), bit
12 of the Display Status register is held in the zero state, inhibiting further ER ASE signals.
The DELAY RET L input is an indication from a slow oscilloscope that its amplifiers have settled.

The low-to-high transition of the DELAY RET L signal generates an INTENSIFY pulse which, in
turn, sets the Ready flag and generates an Interrrupt if enabled.

NOTE

Information on interfacing with specific
oscilloscopes is provided in Paragraphs 3.4.1 through
3.4.5.
READY L is brought to the I/O connector and is used to indicate the beginning of an External Delay

‘cycle.

3.1.2.1

Other Uses of Logic Signals - The AA11’s display control logic outputs can be thought of as
general purpose outputs, for uses other than controlling oscilloscopes. In this context, the signals can
be defined as in Table 3-1, in which the right-hand column refers to bits in the Display Status register.

Table 3-1

Output Signals

AA11K Output Signal

Display Status Register
Equivalent Signal Name

ERASE L

BIT 12L

WRITE THRU L

BIT1iL

NON-STORE L

BIT 10L

BIT9 L

BIT 9L

READY L

BIT 7L

3-2

NE tlhnon cianale
/1

LIIODU Dlsualb,

DIT QT
Dl i

10 tha mAact nicafirn] fAar TTI

i 18

i€ MiGst Uusciui ior

annlicratinne

cinms 1t hag a mi1lhiim

ragiotAr ¢4 L
& "

QP PLIVALIVILD, Siiiviv il uad da yuuup LUDIOWUE

VWU

T U

The other four signals can be made directly TTL-compatible by means of an external pullup resistor to
+5 V. If the open-collector outputs are used to drive relays or other inductive loads, provide suitable
clamping diodes as shownin Figure 3-1 to ensure that the output voltage does not exceed 15 V on turnoff of the relays.

+iz2v

RELAY§
coiL

+6V

cLamp
DIODE

RELAY

coiL

, 6VvZ
CLAMP

*ZENER
i

AANTK
OUTPUT

AA11K
OuTPUT
Ccp-2265

Figure 3-1

Clamping Circuits for Inductive Loads

3.1.3 Use with X/Y Recorders
|
With an X/Y recorder, one of the logic outputs is used to control a pen up/pen down signal. The X
and Y D/A converters provide input to the X and Y channels of the recorder. Typically, recorders
have a long delay between updating of analog inputs and readiness to display the new point (pen
down). In general, this can be handled by a software delay (n passes through a loop) or by a real-time
clock single-interval delay. Certain X/Y recorders provide an output signal that indicates the pen has
settled. If this signal has a low-to-high transition when the pen has settled, it can be connected to the
AA11-K DELAY RET L input.
When the pen has settled, the low-to-high transition of DELAY RET L generates an INTENSIFY
pulse and resets the Ready flag causing an interrupt. The interrupt service routine lowers the pen to
plot the point.
3.1.4 Use with Strip Chart Recorder
With a strip chart recorder, the four DACs provide analog input to four recorder channels. In some

strip chart recorders, the motion of the paper (time axis) is controlled by a logic level that turns on a
motor. In other recorders, the motion is controlled by logic pulses to a stepper motor, so that speed is a
programmable function of pulse frequency. In either case, a single AA11-K logic output can be used to
control the paper motion.
3.2
3.2.1

USER INTERFACING
Connections

The display control interfaces through Berg I/O connector J1 located on the A638 module shown in
Figure 3-5. /O connector pin assignments are listed in Table 3-2.

3-3

Table 3-2

1/0 Connector Pin Assignments

Signal Name

LOGIC GND

HQ GND

INTENSIFY L

ERASE L

HQ GND

D/A 0 HQ GND

D/A 0 OUT

D/A 30UT

HQ GND

D/A 3 HQ GND

HQ GND

D/A 2 HQ GND

HQ GND

D/A 1 OUT

HQ GND

D/A 2 0UT

HQ GND

D/A 1 HQ GND

HQ GND

LOGIC GND

WRITE THRU L

ERASE RET L

NON-STORE L

LOGIC GND

READY L

-15V TEST

BIT9 L

+15V TEST

LOGIC GND

DEL RET L

+5V TEST

LOGIC GND

The AA11-K can be interfaced to the H322 Screw Terminal panel using the BCO8R cable.
The H322 Screw Terminal assignments are listed in Table 3-3.

Table 3-3
J4

H322 Screw Terminal Assignments

BIT9L

HQGND

INTENSIFY

HQGND

LOGICGND

HQGND

LOGIC GND

HQGND

+5VTEST

ERASEL

HQGND

O0HQGND

HQGND

LOGIC GND

HQGND

D/AOOUT

READYL

ERASERETL

HQGND

LOGICGND

HQGND

1HQGND
D/A10OUT

DELAY RETL

NON-STORE L

HQGND

2HQGND

8
9

LOGIC GND
+15VTEST

8
9

LOGIC GND
WRITETHRUL

8
9

HQGND
HQGND

&
9

D/A20UT
3HQGND

-15V TEST

LOGIC GND

HQ GND

D/A30UT

3-4

3.2.2

Cables

The oscilloscope (analog output device) can be either grounded or floating. If the oscilloscope is
grounded, either through its power plug or through contact between its chassis and a grounded cabinet, do not connect the oscilloscope ground to any of the AA11-K ground pins. Such a connection will
result in a ground loop that may adversely affect display control results. If the oscilloscope is floating,

connect its ground to the AA11-K logic ground, pin A of the I/O connector J1.

Oscilloscope X and Y inputs may be either differential or single ended. Differential inputs should be
driven as in Figure 3-2.

AATTK
D/A O OUT

0SCILLOSCOPE
PINK

XN
\\

D/A O H.Q. GND PINJ

D/A1 QUT

/TM RETURN |

PINT

N
Y IN
.\\/,

D/A1

[

HQ GND PINY

/RETURN

cp-2266

Figure 3-2

Connection to Oscilloscope with Differential Input

In driving oscilloscopes with single-ended inputs, the AA11-K analog grounds (pins J and Y) are not
used. The return path for X and Y signal currents is through ground for a grounded oscilloscope or
through logic ground (pin A) for a floating oscilloscope. Because the grounded, single-ended
oscilloscope sees an input voltage that is the sum of the AA11-K output and the ground difference
voltage between the oscilloscope and the AA11-K, noise and line frequency errors can be minimized by
plugging the oscilloscope into an ac socket as close to the computer as possible. Running single-ended
oscilloscopes in a floating configuration will eliminate noise and line frequency errors that are caused
by ground voltage differences.

3.2.2.1 Twisted Pair Lines - The effect of magnetic coupling into the oscilloscope input lines can be
minimized for a differential input oscilloscope by running the AA11-K output and its return line in a
twisted pair. No benefit is derived from a twisted pair with a single-ended oscilloscope input.
3.2.2.2 Shielding - The effect of electrostatic coupling into the oscilloscope input lines can be minimized by shielding the input lines from the AA11-K to the oscilloscope. Connect the shield to ground
only at one end. Grounding the shield at both ends will result in a ground loop that can adversely
affect the DAC display.

3.2.2.3 Drive Capability - Careful selection of cabling is essential. The DAC outputs are capable of
driving a maximum of 5000 pF. DAC output impedance is 1 . BCO8R-08 impedance (from AA11-K
to H322) is 4 Q. Output current limit is 5 mA.
3.3

OPERATIONAL SETUP
NOTE
Switch, jumper, and test point locations are shown in
Figure 3-5.

3-5

3.3.1
Address Selection
The AA11-K address may be set between 760000 and 777740 (octal) in increments of 40 by means of
switch S1. The preferred address is 770400. Set up the S1 switches as shown in Figure 3-3.

—|

SWITCH

-l

ON=1

| l A638 MODULE
ADDRESS
CALCULATION;
10 40

+760000
770400
cp-2267

Figure 3-3

AA11-K Address Selection, Switch S1

3.3.2

Vector
The AA11-K vector space lies between 010 and 770, incremented in steps of 10 by means of switch S2.
The preferred vector is 360. Set up the S2 switches as shown in Figure 3-4.

===

NOT _ / /4

—=|—[—]|

SWITCH

USED

r—",

VECTOR
CALCULATION

cpP-2268

Figure 3-4

Vector Setup, Switch S2

3-6

3.3.3 Priority Jumper
The AAI11-K is shipped with a level 4 priority jumper plug installed.
3.3.4 Digital Input Code
The digital input to the DAC can be either straight binary or 2’s complement.

Output Voltage

Straight Binary

2’s Complement

+F.S.

7777

3777

4000

0000

-F.S.

0000

4000

To configure all the DACs for 2’s complement mode, remove jumper W1 and insert jumpers W30 and
W32.

NOTE
When initialized, a 2’s compiement D/A register
reads 4000.
3.3.5 Analog Output Range
The normal DAC output range is £5 V. This may be changed to £10 V or £0.5 V by connecting the
jumpers as shown in Table 3-4.

Table 3-4

D/A

Analog Output Range Selection

Jumpers

Converters

I=IN

O0=0UT

Range
5V

*10V

05V

W5 or W23

I
@)

W6 or W22
w24

[

W7 or W20

W8 or W19

w21

W9 or W17

W10 orWile

W18

Wil orWi4

W12 orwis

W15

® W3 e

—
WL

S W5

C—Jwn
R44
R43

B wWie &

w0
' BwWITe

w1
@wWe5 e

Swse e

—we
R42

®we D

W ®

[ Tws
SwW0os

oW e

—wr

ewees

BwW23®
RBW24
e

[——Jws

(-]

Bwo4

ewre
Ji1

&nvo-

&~v-

Sov@oo

cP-2277

Figure 3-5

A638 Module, Locations of Switches, Jumpers,

Potentiometers, and Test Points

3-8

For Offset and Gain adjustment, refer to Paragraph 3.5.1.
3.3.6

Intensification Delay

Normal intensification delay is 20 us. This can be changed to 80 us by removing jumper W3 and
inserting W28.

3.3.7

INTENSIFY (Z) Pulse Polarity

Normally the INTENSIFY (Z) pulse is negative going. Cutting jumper W4 and inserting W26 yields a
positive pulse.

Improper polarity results in erroneous signal blanking and visible retraces.
3.3.8

INTENSIFY Pulse Magnitude

Normal INTENSIFY pulse height is 3.3 V. Inserting jumper W27 yields a 1.4 V pulse.
3.4

INTERFACING SPECIFIC OSCILLOSCOPES

This section contains information on using the AA11-K to drive the VR17 and Tektronix 602, 604, and
613 oscilloscopes. The manufacturer’s manual for the oscilloscope being used should be checked to
obtain more information. Paragraph 3.1.2 provides general guidelines to be followed to interface with
oscilloscopes other than those covered in the following paragraphs.

Some oscilloscopes may call for positive-only input voltage swings, with no means of adjustment for
bipolar swings. In this case, it is necessary to use only eleven of the AA11-K D/A bits for positive
excursions only. This provides 11-bit resolution, which is ample for most display applications. The
AA11-K has a settling delay of 20 us or 80 us jumper selectable. For oscilloscopes other than VR17,
602, 604, 611, and 613, the user must determine whether either of these delays is adequate. If a settling
time greater than 80 us is required, the EXTERNAL DELAY or a software delay will be necessary.
3.4.1

VR17

3.4.2

Tektronix 602

The VR17 oscilloscope has differential analog inputs with ranges that can be internally adjusted for 5
V. Proper intensification delay is 20 us. The intensification pulse is 3 V negative going, with 2-us
duration. The AA11-K is compatible with the VR 17 as shipped, with no jumper changes required.

The Tektronix 602 has single-ended inputs with a nominal range of 0 to 1 V. This should be changed to
+0.5 V by means of the position controls located on the front panel of the 602. The screen on the 602 is
8 cm (vertical) by 10 cm (horizontal). The user may choose to adjust the 602’s vertical gain for £0.4 V
full scale or £0.5 V full scale. At £0.4 V full scale, the AA11-K presentation is capable of overflowing
the screen at top and bottom. At £0.5 V full scale, the AA11-K full-scale range does not overflow the
screen, but a programmed square (n by n points) appears rectangular. If the 602 is left with £0.5 V
inputs, the £0.5 V range should be set up on the AA11-K. As an alternative (which is preferable in
noisy environments or if the oscilloscope is located away from the computer), the 602 inputs should be
set for 10:1 attentuation per the instructions in the Tektronix 602 manual. With the 10:1 attenuators
installed in the 602, full 5 V signals are used. The 20-us intensification delay and 2-us intensification
duration are sufficient for the 602, so that W28 is not connected on the AA11-K. Because the 602
requires a positive-going 1 V intensification pulse, W4 should be cut and W26 and W27 should be
connected.

3-9

3.4.3 Tektronix 604
The Tektronix 604 X and Y amplifiers can be used as differential inputs, when connected through rear
panel BNC connectors, or as single-ended inputs when connected through the rear panel remote program connector. The differential input configuration provides superior performance in a noisy environment or at a distance from the computer. However, cabling into the BNCs may be somewhat
difficult. Set the internal and vertical gain for either 8 V or 10 V full scale, depending on whether a
square, overflowing or rectangular, non-overflowing display is desired. Set the position controls for
zero corresponding to midscreen, so that &£5 V (or £4 V vertical) results in full-scale deflection. The
AA11-K is left at £5 V output. An intensification delay of 20 us is adequate with the 604. Because the
604 requires a positive-going intensification pulse, cut W4 and connect W26. The 604’s intensification
sensitivity is adjustable between 1 and 5 V. It must be set below 3 V, and W27 should remain disconnected, so that the AA11-K intensify output is 3 V.
3.4.4 Tektronix 611 Storage Oscillocope
The Tektronix 611 storage oscilloscope has single-ended inputs with 1 V range. This should be changed
to a 10 V range by means of internal X 10 attenuators, per instructions in the 611 manual. The X and Y
positioning switches should be in the center position. This sets up the inputs for £5 V, directly compatible with the AA11-K analog outputs. Intensification delay should be set for 80 us. The 611 requires
a positive-going intensification pulse (W4 disconnected, W26 connected). Because the 611’s
intensification threshold is nominally 1 V, the AA11-K INTENSIFY pulse should be left at 3 V. The

611’s ERASE, NON-STORE, and WRITE THRU lines should be connected directly to the corresponding AA11-K outputs. The 611’s Erase Interval signal should be connected to the AA11-K’s
ERASE RET L. The 611 contains a 500-ms timing circuit that controls its erase interval duration. This
circuit requires another 500 ms of recovery time after the conclusion of the erase interval. If the user
attempts to program another erase operation within 300 ms of the end of the previous erase operation,
the timing circuit does not recognize the erase command. Under these conditions, ERASE RET L does
not go low (the 611 fails to acknowledge the erase command). Therefore, the display control Ready

flag does not get set, and it is possible for the program to hang up in a wait loop. If the user attempts to
program another erase operation more than 300 ms but less than 500 ms after the previous erase
operation, the erase command is recognized, but the erase interval duration is less than 500 ms, so that
there may be incomplete erasure.
3.4.5

Tektronix 613 Storage Oscilloscope

The Tektronix 613 storage oscilloscope has differential inputs with 1 V range (and no easily settable
X10 attenuator). Consequently, the AA11 must be run with a £0.5 V output. The 613’s horizontal and
vertical “origin location” jumpers should each be in location 2 to set up the inputs for £0.5 V.

Intensification delay should be set for 80 us. The 613 requires a positive-going intensification pulse
(W4 disconnected, W26 connected). Because the 613’s intensification threshold is nominally 1 V, the
AA11-K intensification pulse should be left at 3 V. The 613’s ERASE, NON-STORE, and WRITE
THRU lines should be connected directly to the corresponding AA11-K outputs. The 613’s BUSY
signal should be connected to the AA11-K’s ERASE RET L. The 613’s Hard Copy Busy and Deflec-

setting the AA11-K’s display control Ready flag at times other than the end of an intensification pulse or the end of an erase operation. The 613’s erase interval timer does not have a recovery delay, so that
no restriction is necessary on the interval between back-to-back erase operations.

3-10

3.5 TESTING AND CALIBRATION
The logic section of the AA11-K can be checked easily by loading and reading the four D/A Data
registers and the Display Status register.

To check the analog section, test points are provided at the output of each DAC.
By using an accurate voltmeter or oscilloscope and loading the desired code into the D/A register, you
can verify the functionality and calibrate the analog section of the AA11-K.
3.5.1
Offset and Gain Adjustment
Connect an accurate voltmeter to the output of the DAC.

Load the word indicated in Table 3-5 into the D/A register and adjust the indicated potentiometer to
the desired voltage.

Table 3-5

Load

Straight
Binary
Offset

| 0000

Adjust

7777

Adjust

2’s

4000

3777

For

D/A

D/A|

10V

0.5V

Range

-5V

-10V

05V

+4.9976 V.

+9.9951 V

+.49976V

= Complement

Adjust
Gain

Offset and Gain Adjustment

NOTE
In the +0.5 range, the Offset and Gain potentiome-

ter might have insufficient range for accurate adjustment, and typically the DAC will be within +5% of
desired Offset and Gain setting.

The Gain and Offset adjustments in the oscilloscope can compensate for these errors.

3-11

Reader’s Comments
AAl11K 4-CHANNEL- D/A AND DISPLAY CONTROL
USER’S MANUAL

EK-AA11K-TM-001

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