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AH-8494D-MC
July 1978
238 pages
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Document:
CZDHMD0 DH11 DIAGNOSTIC JUL 1978 bw
Order Number:
AH-8494D-MC
Revision:
000
Pages:
238
Original Filename:
CZDHMD0__DH11__DIAGNOSTIC__AH-8494D-MC__JUL_1978_gray.pdf
OCR Text
DIAGNOSTIC CZDHMDO AH-8494D-MC copymiGHT®76-78 FICHE1 OF2 JUL 1978 HSO0ED MADEIN USA DIAGNOSTIC CZDHMDO : ~ AH-8494D-MC COPYRIGHT ©76-78 FICHE2OF 2 JUL 1978 ! dlilglift MADEIN USA CZDHMDO MACY11 30A(1052) 10-MAR-78 CZDHMD.P11 09-MAR-78 15:32 08:05 SEQ 0002 PAGE & .REM PRODUCT CODE: AC-8492D-MC PRODUCT NAME: CZDHMDO DH11 DIAGNOSTIC DATE: JUNE 1978 AUTHOR: E. MAINTAINED BY: DIAGNOSTIC ENGINEERING CROWLEY THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUIPMENT CORPORATION. DIGITAL EQUIPMENT CORPORTION ASSUMES NO RESPONSIBILITY FOR ANY ERRORS THAT MAY APPEAR IN THIS DOCUMENT. NO RESPONSIBILITY IS ASSUMED FOR THE USE OR RELIABILITY OF SOF TWARE ON EQUIPMENT THAT IS NOT SUPPLIED BY DIGITAL OR ITS AFFILIATED COMPANIES. COPYRIGHT (C) 1976, 1978 BY DIGITAL EQUIPMENT CORPORATION THE FOLLOWING ARE DIGITAL U DEC TRADEMARKS OF DIGITAL EQUIPMENT CORPORATION: PDP DECUS UNIBUS DECTAPE MASSBUD SEQ 0001 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 5 GENERAL PROGRAM DESCRIPTION 1.1 PROGRAM PURPOSE 1.1.1 1.1.2 LOGIC TEST SUMMARY CIDHM CORE MEMORY MAP 1.2 SYSTEM REQUIREMENTS 1.3 RELATED DOCUMENTS AND STANDARDS 1.4 DIAGNOSTIC HIERARCHY PREREQUISITES 1.5 FAILURE ASSUMPTIONS o O OPERATING INSTRUCTIONS LOADING AND STARTING PROCEDURES n . WM — e . W - . . . ek . . ERROR HALTS PERFORMANCE AND PROGRESS REPORTS 9. —3 e ~N POWER FAIL PRINTOUT W W — ERROR REPORTING PROCEDURES o oo D N s . «. oo roroN Ww D . . S O . . . CORE MEMORY LOCATIONS REGISTER USAGE — WWW CONSOLE SWITCH REGISTER - oo PROGRAM OPTIONS ERROR INFORMATION “ W ACT11/APT11 "'XXDP'* SYSTEMS SWITCHLESS FEATURE EXECUTION TIMES . W SPECIAL ENVIRONMENTS o O WWW LOADING PROCEDURES STARTING PROCEDURES . W .1 . W S . . . 1.0 - TABLE OF CONTENTS . CZDOHM-D-0 CZDOHMD.P1 STANDARD SYSMAC.SML ERROR REPORTING CONVENTIONS ERROR MESSAGE TABLE . DATA HEADER MNEUMONIC DEFINITIONS SEQ 0003 SEQ 0002 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 4.1 4.2 10-MAR-78 08:05 PERFORMANCE REPORTS PROGRESS REPORTS PAGE 6 SEQ 0004 SEQ 0003 PAGE 7 INTRODUCTION PRELIMINARY CHECKS MAINTENANCE CONNECTORS . . . . . s . . . . . . . = . CONO VIS NN — & MAINTENANCE PROCEDURES - NN . DH11 MODULE ALLOCATION CHART - (VL RV AV RV LV LV LV LV, ] wh W DH11 v ADDRESS AND VECTOR ASSIGNMENTS REGISTER DEFINITIONS O DH11 DEVICE INFORMATION o O W 08:05 VS WN= viun 10-MAR-78 = MACY11 30A(1052) 09-MAR-78 15:32 oooonOn CZDHM-D-0 CZDHMD.P11 SYSTEM CONTROL REGISTER NEXT RECEIVED CHARACTER REGISTER LINE PARAMETER REGISTER CURRENT ADDRESS REGISTER BYTE COUNT REGISTER BUFFER ACTIVE REGISTER BREAX CONTROL REGISTER SILO STATUS REGISTER FUNCTIONAL LOGIC PARTITIONING COMPLETE DH11 SUB-SYSTEM CHECKOUT MAINTENANCE HEADER DESCRIPTION SEQ 0005 SEQ 0004 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09~MAR-78 15:32 1.0 1 10-MAR-78 08:05 PAGE 8 GENERAL PROGRAM DESCRIPTION a1 "'CZDHM’* IS A COMPREHENSIVE DIAGNGSTIC TEST PROGRAM DESIGNED TO AID IN THE ACCEPTANCE TESTING, INSTALLATION CHECKOUT, AND CORRECTIVE MAINTENANCE OF THE DH11 16. LINE ASYNCHRONOUS SERIAL LINE MULTIPLEXOR. IT CONSISTS OF 48. LOGICALLY SEQUENCED DIAGNOSTIC TESTS DESIGNED TO TEST AND VERIFY THAT THE DH11 DESIGN SPECIFICATIONS. IS OPERATING IN ACCORDANCE WITH ITS THE PROGRAM 1S CONFIGURABLE BY THE AUTOSIZER OR BY CONSOLE DIALOGUE TO ENABLE IT TO AUTOMATICALLY TEST AND VERIFY ALL 16. LINES ON UP TO 16. CONTIGUOUS DH11'S (WITH NON-CONTIGUOUS/ CONTIGUOUS VECTOR ASSIGNMENTS). INDIVIDUAL UNITS AND INDIVIDUAL LINES WITHIN A UNIT MAY BE SELECTED OR DESELECTED TO FACILITATE FAULT ISOLATION TO A PARTICULAR DH11 OR A FUNCTIONAL AREA OF LOGIC AFFECTING A PARTICULAR LINE WITHIN A UNIT. WHENEVER AN ERROR IS DETECTED A COMPREHENSIVE ERROR REPORT IS TYPED THAT ALLOWS THE USER TO ISOLATE THE FAULT TO A FUNCTIONAL AREA OF LOGIC. EXTENSIVE DOCUMENTATION IS PROVIDED TO PERMIT THE USER TO PROCEED FROM THE ERROR REPORT TO ADDITIONAL LOGIC CHECKS TO MAKE IN ORDER TO ISOLATE THE PROBLEM TO A REPLACEABLE UNIT. IN ORDER TO FACILITATE INSTALLATION CHECKCUT, TESTS 101, AND 105 THROUGH 107 (TEST GROUP 1) OF THE MODEM CONTROL DIAGNOSTIC, CZDHK, HAVE BEEN INCLUDED IN THIS PROGRAM. IN THIS WAY ALL THE LEVEL CONVERTERS AND CABLES CAN BE CHECKED WITH JUST ONE PROGRAM USING THE H315 TURNAROUND CONNECTOR. SEQ 0006 SEQ 0005 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 1.1.1 10-MAR-78 08:05 SEQ 0007 PAGE 9 SEQ 0006 LOGIC TEST SUMMARY T 12 13 T4 15 76 17 110 TM 112 113 114 115 T16 117 120 121 122 723 124 125 126 127 730 131 132 133 134 135 136 137 140 T41 142 743 T44 T45 T46 147 150 151 152 153 154 155 156 157 T60 CHECK SSYN RESPONSE FROM ALL DH11 REGISTERS TEST THAT "MASTER CLR'' CAN CLEAR THE ''SCR',"'LPR'',"'BKR'',AND ''SSR'' REGS TEST "'SCR'" REG R/W BITS CAN SET/CLR (NORMAL MODE) TEST "'SCR'* REG. READ ONLY BITS (NORMAL MODE) TEST “SCR'* REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE TEST THAT ALL R/W BITS IN "LPR" CAN BE SET/CLR TEST THAT ALL R/W BITS IN "'BKR' CAN BE SET/CLR TEST THAT ALL R/W BITS IN ''SSR'' CAN BE SET/CLR TEST THAT CLR/SET OF BIT "N'' IN “LPR'* DOES NOT CLEAR ANY OTHER BITS TEST THAT CLR/SET OF BIT "N'' IN "BKR'* DOES NOT CLEAR ANY OTHER BITS TEST THAT CLR/SET OF BIT ''N"' IN "'SSR'' DOES NOT CLEAR ANY OTHER BITS "'CAR"* MEMORY ADDRESSING TEST "'BCR'* MEMORY ADDRESSING TEST "'CAR'* REGISTER TEST - ALL 1°' 8 ALL 0'S - ALL LINES ‘BCR'* REGISTER TEST - ALL 1' ALL 0°'S = ALL LINES 5! "'CAR'" MEMORY PATTERNS TEST / 0 S DISTURB “'BCR'* MEMORY PATTERNS TEST / 0 S DISTURB ""CAR'' MEMORY PATTERNS TEST / 1'S DISTURB “'BCR'' MEMORY PATTERNS TEST / 1'S DISTURB TEST THAT °*‘CAR'* MEMORY EXT BITS SET/CLR PROPERLY TEST TEST TEST TEST TEST INTR. CHAR. ENAB. BITS - INTR. CONDITION DISABLED AVAIL. I.E. WITH INTR. CONDITION ACTIVE SILO OVFLW. I.E. WITH INTR. CONDITION ACTIVE NON EX MEM I.E. WITH INTR. CONDITION ACTIVE XMITTR DONE I.E. WITH INTR. CONDITION ACTIVE BASIC TRANSMITTER 'NPR'' LOGIC TEST 1 TRANSMITTR NPR LOGIC TEST 2 TEST THAT CHARACTER AVAILABLE CAN CAUSE RCVR INTERRUPT TEST THAT THE SILO STATUS REG COUNTS UP CORRECTLY TEST THAT SILO STATUS REGISTER DOWN COUNTS CORRECTLY TEST SILO ALARM LEVEL FOR COUNTS 0,1,2,4,8,16, AND 32 TRANSMITTER TIMING TEST - ALL SELECTED LINES - ALL SPEEDS RECEIVER TIMING TEST - ALL SELECTED LINES - ALL SPEEDS VERIFY STORAGE OVERFLOW - NON MAINT MODE - ALL SELECTED LINES BASIC DATA TEST - ALL SELECTED LINES/ALL CHAR LENGTHS SINGLE LINE DATA TEST - ALL SELECTED LINES BASIC PARITY LOGIC TEST - ALL SELECTED LINES - ODD PARITY MULTI-LINE PARITY DATA TEST - ALL SELECTED LINES AUTO ECHO TEST 1 - ALL SELECTED LINES AUTO ECHO TEST 2 - ALL SELECTED LINES AUTO ECHO TEST 3 - ALL SELECTED LINES BREAK BIT TEST - ALL SELECTED LINES HALF DUPLEX TEST - ALL SELECTED LINES VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES ABBREVIATED MODEM CONTROL DIAGNOSTIC. (DZDHK T101) MODEM CONTROL DIAGNOSTIC CONTINUED (DZDHK T105) MODEM CONTROL DIAGNOSTIC CONTINUED (DZDHK T106) MODEM CONTROL UIAGNOSTIC CONTINUED (DZDKK T107) CZDHM-D-0 CZDHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 1.5:2 08:05 CZDHM CORE MEMCRY MAP 000000: * SEQ 0008 SEQ 0007 PAGE 10 1323233233323 3233233222222222222R0R 2082 * * VECTOR AREA . * * (1222323232323 223323332233222220022220801% * * . STACK AREA . * * 1223223333333 001100: * * . SYSMAC CONSTANTS + P 332322233300002008082320431 * AND VARIABLES . * * 1232323233323 23233232333232333333323232222321] BEGIN: * * - START-UP CODE 13 . 4 1332323323323232322323233232333023233282023] START1: % * . * START-UP CODE « * * 1223232322332 : 1871 2332332332232322323332322322234 * ® * . DH11 LOGIC TESTS TST1(8)-TST54(B) * . * * 1282223222322 $EOP: 32232223323322323223223223] * . * STANDARD SYSMAC UTILITY ROUTINES * . * * (2283222322232 CKRS11: 23233223233283228380832203] * 4 * COMMON DH11 UTILITIES L4 1222322223223 2223322232222 DHADR: + * 2322¢%¢] * 4 * DH11 * PROGRAM CONSTANTS + AND VARIABLES * * * 1328222223222 0232332228322 283228031 * * E24 (228222 iS22 * * CONT. » FRARAAR AR 20124 CONT. * N h Akttt CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0009 SEQ 0008 PAGE 11 1122212 * CCNT, « 22133222 * CONT. « AEARARRRS X222 * ® AR AR AR AR R AR R EM1: * * * R AR R R R R TR * * * SYSMAC ERROR MESSAGE BUFFERS * P TiTLE: % I = * * R I eI I s I LIIIIIIII * DH11 MISCELLANEOUS * MESSAGE BUFFERS * * AR RBUF : * * * * AR AR AR R AR AR R AR R AR TRANSMIT AND RECEIVE DATA BUFFERS * (2222222222022 R A * * * % 2220R20222R20R (] 022 220; MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 1.2 SYSTEM REQUIREMENTS 1.2.17 HARDWARE REQUIREMENTS 08:05 PAGE 12 SEQ 0010 SEQ 0009 A. ANY PDP11 COMPUTER SYSTEM WITH 12K OF CORE MEMORY AND A CONSOLE TERMINAL DEVICE (VT50,LA36 ETC) NOTE: B. A DH11 C. 1.2.2 1.3 1.4 FOR PAPER TAPE SYSTEMS USING THE PDP11 ABSOLUTE LOADER, THE PROGRAM CAN LOAD AND RUN IN 8K OF CORE 16. LINE ASYNCHRONOUS SERIAL LINE MULTIPLEXOR TEST CONNECTORS AND MODULE (THE NO. OF EACH REQUIRED IS DETERMINED BY THE PARTICULAR TEST APPLICATION. REFER TO SECTION 6.3 FOR A COMPLETE DISCUSSION OF THE MAINTENANCE CONNECTORS) 1. 2. 3. 4. H315 TEST CONNECTOR HB611 TEST CONNECTOR(FOR DH11-AD) M974 TEST MODULE HB61 TEST CONNECTOR SOFTWARE REQUIREMENTS A. ACT11 APT11 B. XXDP THE PROGRAM CONTAINS THE REQUIRED ACT11/APT11 SOFTWARE HOOKS TO PROPERLY INTERFACE WITH THE ACT/APT SYSTEMS. THE PROGRAM CONTAINS AN AUTOSIZER finggz:HBE RUN IN QUICK VERIFY MODE USING THE PROGRAM MAY BE LOADED AND RUN FROM ANY “XXDP'' MEDIUM PROVIDED THE SYSTEM HAS AT LEAST 12K OF CORE STORAGE. RELATED DOCUMENTS AND STANDARDS OTMMOOD>»> (ZDHM-D-0 CZDHMD.P11 . . . . . . DH11-0 ENGINEERING DRAWINGS DH11 MANUAL EK=-DH11-MM-002 PDP11 PERIPHERALS HANDBOOK PDP11 PROCESSOR HANDBOOK MD-11-DZQAC-C1 SYSMAC.SML MD-11-DZQXA ''XXDP'' USER'S GUIDE . DIAGNOSTIC ENGINEERING STANDARDS AND CONVENTIONS PROGRAMMING PRACTICES DOC NO. 175-003-009-00 DIAGNOSTIC HIERARCHY PREREQUISITES CZDHM ASSUMES THAT THE FOLLOWING DIAGNOSTICS 32¥EC?ESN RUN PRIOR TO ITS EXECUTION AND THAT NO ERRORS WERE CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 13 A. CPU/CORE MEMORY DIAGNOSTICS SEQ 0011 SEQ 0010 1.5 08:05 PAGE 14 FAILURE ASSUMPTIONS CZDHM ASSUMES THAT THE PROGRAM CAN BE LOADED INTO CORE AND STARTED. IT ALSO ASSUMES THE CPU/MEMORY HARDWARE IS FUNCTIONING ERROR FREE. 2.0 OPERATING INSTRUCTIONS 2.1 2.1.1 A. PAPER TAPE SYSTEMS USE THE STANDARD PDP11 ABSOLUTE LOADER PROCEDURE FOR LOADING PAPER TAPES. AFTER LOADING THE PROGRAM MUST BE MAN- , UALLY STARTED AS DESCRIBED IN SECTION 2.1.2. - B. "'XXDP'' SYSTEMS (REFER TO ''XXDP'' USER'S GUIDE MD-11-DZDQXA) . MOUNT THE APPROPRIATE MEDIUM (DECTAPE,DISK ETC) CONTAINING THE ‘'XXDP'' MONITOR AND CZDHM. ) CZDHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 75:32 HowWNn (ZDHM-D-0 . BOOT THE SYSTEM TO LOAD THE MONITOR ONCE LOADED THE ''XXDP'' MONITOR PRINTS AN INTRODUCTORY MESSAGE AND RESPONDS WITH A ''.'' THPE: “'CZDHM'* FOLLOWED BY EITHERA <CR> CARRIAGE RETURN OR AN '‘ALTMODE" TO LOAD THE PROGRAM. IF A <CR> WAS TYPED THE USER MUST MANUALLY START THE PROGRAM AFTER LOADING. IF THE '‘ALTMODE'' TERMINATOR WAS USED THE PROGRAM WILL SELF START AFTER LOADING. NOTE: WHENEVER THE DH11 CONFIGURATION IS CHANGED THE DIAGNOSTIC SHOULD BE RELOADED. SEQ@ 0012 SEQ 0011 10-MAR-78 MACY11 30A(1052) 09-MAK-78 15:32 08:05 SEQ 0013 SEQ 0012 PAGE 15 2.1.2 A. TO AUTOMATICALLY START THE PROGRAM USING THE AUTOSIZER (START AT LOC 000200(8)) wvisSwnN 1. INSTALL THE REQUIRED TEST CONNECTORS FOR THE PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) SET THE HALT/ENABLE SWITCH TO HALT SET THE SR=000200(8) . DEPRESS LOAD ADDRESS SET THE SR=000000 (WORST CASE TESTING) SET THE SR=000002 (TO TYPE THE DEVICE MAP) SET THE SR=004000 (QUICK PASS) SET THE SR=002000 (TO SKIP AN ABBREVIATED MODEM CONTROL TEST. REFER TO SECTIONS 1.1 AND 6.3) SET THE SR=000400 (HALT AFTER PARAMETER SET-UP) . SET THE HALT/ENABLE SWITCH TO ENABLE DEPRESS START - THE PROGRAM WILL TEST ALL LINES ON ALL DH'S FOUND. NOTE: THE CSR REGISTER ADDRESS OF THE MODEM CONTROL('S) IS LOADED ONLY FROM THE AUTOSIZER, HOWEVER, AFTER INITIAL LOAD, THE PROGRAM CAN BE STARTED AT 210(8) TO CHANGE SELECTION PARAMETERS AS DESCRIBED IN SECTION 2.1.2 D. B. TO TYPE IN ALL REQUIRED PARAMETERS (START AT LOC 000200(8)) 1wv SN CZDHM-D-0 CZDHMD.P11 INSTALL THE REQUIRED TEST CONNECTORS FOR THE PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) . SET THE HALT/ENABLE SWITCH TO HALT . SET THE SR=000200(8) . DEPRESS LOAD ADDRESS . SET THE SR=000001 (FOR INPUT DIALOGUE) AFTER INPUT DIALOGUE BEGINS BUT PRIOR TO ACTUAL SET THE SR=000000 (WORST CASE TESTING) TESTING: SET THE SR=004000 (QUICK PASS) SET SR=000400 (HALT AFTER PARAMETER SET-UP) . . SET THE HALT/ENABLE SWITCH TO ENABLE DEPRESS START - THE PROGRAM TYPES THE TITLE AND THEN ASKS FOR THE NUMBER OF ADDRESSES EETWEEN VECTORS. TYPE EITHER 10(8) OR 20(8) DEPENDING UPON THE PARTICULAR CONFIGURATION Tu BE TESTED: NOTES: IF THE MODEM CONTROL VECTORS ARE INTERLEAVED WITH THE DH11 VECTORS (2040 FRONT END) (Z0HM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:.32 10-MAR-78 08:05 SEQ 0014 SEQ 0013 PAGE 16 THE DISPLACEMENT IS 20(8) ADDRESSES. FOR STANCARD DH11'S WITH CONTIGUOUS VECTORS THE DISPLACEMENT IS 10(8) ADDRESSES. IF <CR> ONLY WAS TYPED, WILL BE 20(8) ADDRESSES. 8. THE DEFAULT THE PROGRAM WILL ASK FOR THE DEVICE ADDRESS. TYPE IN THE ADDRESS (OCTAL) OF THE FIRST DHI11 IN THE SYSTEM FOLLOWED BY A <CR>. IF AN INVALID ADDRESS IS TYPED THE PROGRAM WILL TYPE AN ERROR MESSAGE AND ASK YOU TO TRY AGAIN. 9. THE PROGRAM WILL ASK FOR THE VECTOR ADDRESS. TYPE IN RECEIVER VECTOR ADDRESS (OCTAL) OF THE FIRST DH11 FOLLOWED BY A <CR>. IF AN INVALID VECTOR ADDRESS IS TYPED THE PROGRAM WILL TYPE YOU TO TRY AGAIN. 10. AN ERROR MESSAGE AND ASK NEYT THE PROGRAM WILL ASK FOR THE DEVICE SELECTION PARAMETER. TYPE IN AN OCTAL NO. ENCODED AS FOLLOWS: BIT00=1 TEST DH11 #00 BITO1=1 TEST DH11 #01 BIT02=0 DO NOT TEST DH11 #C2 BIT15=1 TEST DH11 #15 EXAMPLES: 177777<CR> 100000<CR> TEST ALL 16. DH11'S TEST ONLY DH11 #17(8) 000005<CR> TEST DH11 #00 AND 02 IF A <CR> ONLY TO THE LAST THIS IS THE 000003 11. IS TYPED THE PROGRAM WILL DEFAULT TYPED IN DEVICE SELECT PARAMETER. INJTIAL LOAD IT WILL DEFAULT TO (DH11 #00 AND 01) NEXT THE PROGRAM WILL ASK FOR THE LINE SELECTION ESRASE;ERS. TYFE AN ENCODED OCTAL NO. AS LLOWS: BITO0=1 TEST LINE #00 BITO1=1 TEST LINE #01 BIT02=0 DO NOT TEST LINE #02 BIT15=1 TEST LINE #15 IF C(ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 10-MAR-78 09-MAR-78 15:32 08:05 SEQ 0015 PAGE 17 SEQ 0014 EXAMPLES: 177777<CR> 100000<CR> TEST ALL 16. LINES TEST LINE 17(8) ONLY 000005<CR> TEST LINES 00 AND 02 IF A <CR> RETURN ONLY IS TYPED THE PROGRAM WILL DEFAULT TO 16. LINES. 2222222802 NOTE (222222223 IF MORE THAN ONE DH11 IS TESTED THE SAME COMBINATION OF LINES WILL BE TESTED ON ALL DH11'S SELECTED. 12. IF SR8=1, THE PROGRAM WILL HALT AND PRINT THE FOLLOWING MESSAGE: "DEPRESS CONTINUE TO START TESTING" AT THIS POINT SET UP THE DESIRED SWITCH REG- ISTER OPTIONS (REFER TO PARA 2.3.1) AND DEPRESS “'CONTINUE'' TO START THE TESTING. THE PURPOSE OF THIS HALT IS TO ALLOW THE USER TO DUMP THE PROGRAM AFTER SETTING UP THE CONFIGURATION PARAMETERS FOR HIS SYSTEM. 13. PROGRAM WILL BEGIN EXECUTION. REFER TO SECTIONS 2.4, 3.0, AND 4.0 FOR ERROR AND STATUS REPORTS. C. DEFAULT PARAMETER START ** (START AT LOC 000204(8)) INSTALL THE REQUIRED TEST CONNECTORS FOR THE PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) SET THE HALT/ENABLE SWITCH TO HALT SET THE SR=000204(8) DEPRESS LOAD ADDRESS . SET THE SR=000000 (WORST CASE TESTING) . SET THE HALT/ENABLE SWITCH TO ENABLE . DEPRESS START IF THIS IS THE INITIAL LOAD, THE DEFAULT PARAMETERS ASSUME TWO DH11'S WITH THE FOLLOWING ADDRESS ASSIGNMENTS DH11 #0 DEVADR=760020, VECTOR=330, BR5 DH11 #1 DEVADR=760040, VECTOR=350, BRS OTHERWISE, THE PROGRAM WILL DEFAULT TO THE PARAMETERS USED IN THE PREVIOUS EXECUTION. . PROGRAM EXECUTION BEGINS. REFER TO SECTIONS 2.4, 3.0, CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0016 SEQ 0015 PAGE 18 AND 4.0 FOR EXECUTION TIMES, ERROR REPORYTS, AND PROGRESS REPORTS. D. TO CHANGE DEVICE AND LINE SELECT PARAMETERS ONLY (START AT LOC 000210(8)) 1. INSTALL THE REQUIRED TEST CONNECTORS FOR THE 4. DEPRESS LOAD ADDRESS PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) 2. SET THE HALT/ENABLE SWITCH TO HALT 3. SET THE SR=000210(8) 5. SET THE SR=000000 (WORST CASE TESTING) SET THE SR=004000 (QUICK PASS) SET THE SR=002000 (TO SKIP AN ABBREVIATED MODEM CONTROL TEST. THIS ASSUMES THE AUTOSIZER WAS PREVIOUSLY USED TO LOAD THE MODEM CONTROL CSR ADDRESSES.) SET THE SR=000400 (HALT AFTER PARAMETER SET-UP) 6. SET THE HALT/ENABLE SWITCH TO ENABLE 7. DEPRESS START - THE PROGRAM TYPES THE TITLE AND THEN ASKS FOR DEVICE SELECTION PARAMETER. PROCEED AS IN (B-10) ABOVE. 9. PROGRAM WILL ASK FOR LINE SELECTION PARAMETERS. PROCEED AS IN (B-11) ABOVE. NOTE: THE DEVICE SELECTION AND LINE SELECTION PARAMETERS APPLY TO BOTH THE DH11 AND THE MODEM CONTROL. THAT 1S, IF DH #7, LINE #3 1S CHOSEN THEN MODEM CONTROL #7 LINE #3 VILL ALSO BE TESTED. 10. IF SR8=1, THE PROGRAM WILL HALT AND PRINT THE FOLLOWING MESSAGE: "DEPRESS CONTINUE TO START TESTING'' AT THIS POINT SET UP THE DESIRED SWITCH REG- ISTER OPTIONS (REFER TO PARA 2.3.1) AND DEPRESS “'CONTINUE'" TO START THE TESTING. THE PURPOSE OF THIS HALT IS TO ALLOW THE USER TO DUMP THE PROGRAM AFTER SETTING UP THE CONFIGURATION PARAMETERS FOR HIS SYSTEM. 11. PROGRAM WILL BEGIN EXECUTION. REFER TO SECTIONS 2.4, 3.0, AND 4.0 FOR EXECUTION TIMES STATUS REPORTS. ERROR AND CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-783 2.2 SPECIAL ENVIRONMENTS 2.2.1 ACT11/ 08:05 PAGE 19 SEQ 0017 SEQ 0016 WHEN UNDER CONTROL OF THE ACT11/APTI1 APT11 SYSTEMS THE PROGRAM MAY BE LOADED IN DUMP MODE AND CAN BE RUN AS PART OF A QUICK VERIFY CHAIN SINCE AN AUTOSIZER IS USED. 2.2.2 XXDP THE PROGRAM MAY BE LOADED AND RUN FROM ANY "'XXDP'' MEDIUM PROVIDED THERE IS AT LEAST 12K OF CORE. IT MAY BE RUN AS PART OF AN “'XXDP'' CHAIN. 2.2.3 SWITCHLESS FEATURE IF THE DIAGNOSTIC IS RUN ON A CPU WITHOUT A SWITCH REGISTER THEN A SOFTWARE SWITCH REGISTER IS USED WHICH ALLOWS THE USER THE SAME SWITCH OPTIONS AS THE HARDWARE SWITCH REGISTER. IF THE HARDWARE SWITCH REGISTER DOES NOT EXIST OR IF ONE DOES AND IT CONTAINS ALL ONES (177777) THEN THE SOFTWARE SWITCH REGISTER (LOC. 176) IS USED. CONTROL: THIS PROGRAM ALSO SUPPORTS THE DYNAMIC LOADING OF THE SOFTWARE SWITCH REGISTER (LOC. 176) FROM THE TTY. THIS CAN BE ACCOMPLISHED BY DOING THE FOLLOWING: 1) 2) TYPE LOC. CONTROL G < G>; THIS WILL ALLOW THE TTY TO ENTER DATA INTO 176 AT SELECTED POINTS WITHIN THE PROGRAM. THE MACHINE WILL THEN TYPE: SWR=XXXXXXNEW= (XXXXXX IS THE OCTAL CONTENTS OF THE SOFTWARE SWITCH REGISTER.) 3) AFTER THE OF "°'NEW='"' HAS BEEN TYPED THEN THE OPERATOR CAN DO ONE THE FOLLOWING AT THE TTY: A) TYPE A NUMBER TO BE LOADED INTO LOC. 176 FOLLOWED BY A <CR>. (ONLY OCTAL NUMBERS WILL BE ACCEPTED AND ONLY 6 NUMBERS WILL BE ALLOWED) IF A <CR> IS THE FIRST KEY DEPRESSED THE SOF TWARE SWITCH REGISTER CONTENTS WILL NOT BE CHANGED. B) IF A CONTROL U < U> IS DEPRESSED THEN THE PROGRAM WILL DO A <(R>. RETYPE THE DESIRED NUMBER. CZDHM-D-0 CZDHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 08:05 2.3 PROGRAM OPTIONS 2.3.1 CONSOLE SWITCH REGISTER THE FOLLOWING TABLE SEQ 0018 SEQ 0017 PAGE 20 ILLUSTRATES THE FUNCTIONS OF THE CONSOLE SWITCH REGISTER DURING PROGRAM START AND DURING DH TESTING: SWITCH REGISTER START 15= 1% TESTING HALT ON ERROR (AFTER TYPING ERROR MESSAGE) 16 =1 LOOP CONTINUOUSLY ON CURRENT TEST. 13 =1 INHIBIT ERROR TYPOUTS. 1M INHIBIT SUB-TEST ITERATIONS (QUICK PASS) =1 19 = INMIBIT MODEM CONTROL ABBREVIATED TESTS. 3 9 =1} 8 =1 LOCK ON HARD ERRORS HALTS AFTER CONF IGURATION TO PERMIT DUMPING PRE- SEARCH FOR AND LOCK ON. TEST SELECTED BY CONTENTS OF SR <07:00> CONF IGURED COPIES OF THE PROGRAM. CONTAINS TEST NUMBER SEARCH FOR WHEN TO <07:00> SR 08 = 1 1 &1 g =19 TYPES DEVICE MAP GENERATED BY THE AUTOSIZER. ALLOWS THE USER T0 INPUT DH PARAMETERS MANUALLY. (INHIBITS THE AUTOSIZER) CZDHM-D-0 CZOHMD.P11 2.3.2 08:05 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 PAGE 21 SEQ 0019 SEQ 0018 CORE MEMORY LOCATIONS A. DH11 CONFIGURATION TABLES AND VARIABLES WHEN THE AUTOSIZER OPTION IS USED, THIS PROGRAM CONFIGURATIONS (NON-CONTIGUOUS ADDRESSE S). THE USER CAN ALSO PATCH IN HIS OWN ADDRESSES TO MATCH HIS CONF IGURATION AND THEN USE THE DEFAULT START TO RUN THE UPDATED PROGRAM. THE TABLES AND LOCATIONS TO MODIFY ARE DESCAN RUN NON-STANDARD DH11 CRIBED BELOW: 1. DHADTB: 16. WORD DEVICE ADDRESS TABLE THE USEk CAN DEPOSIT THE ADDRESSES FOR HIS NON-STANDARD CONFIGURATION IN THIS TABLE. THE POSITION OF THE ENTRY IN THE TABLE CORRESPONDS DIRECTLY TO THE DEVICE NO. (IE DH11 #00 - WORD 00, DH11 #01 - WORD 01 ETC.) 2. DHV(TB: 16. WORD DEVICE VECTOR ADDRESS TABLE THE USER CAN DEPOSIT THE VECTOR ADDRESSES FOR HIS NON-STANDARD CONFIGURATION IN THIS TABLE. AGAIN THE POSITION IN THE TABLE CORRESPONDS DIRECTLY TO DEVICE NUMBER. 3. BRLVL: 16. WORD BR LEVEL TABLE THIS TABLE STORES THE BR LEVELS ASSUMED BY THE INTERRUPT SERVICE ROUTINES FOR EACH DH11. THE RCVR BR LEVEL IS STORED IN THE LOW BYTE AND THE XMITTER BR LEVEL IN THE HIGH BYTE. AGAIN THE POSITION IN THE TABLE CORRESPONDS DIRECTLY TO THE DH11 DEVICE NO. 4. DHSEL: DEVICE SELECTION PARAMETER THIS WORD MUST BE SET UP TO CORRESPOND TG THE DEFAULT CONFIGURATION DEFINED BY THE TABLE SET-UPS. 2E2521L2 SECTION 2.1.2.(B10) FOR A DESCRIPTION OF N . 5. LINSEL: ITS LINE SELECTION PARAMETER THIS WORD IS PROGRAM LOADED AS A 177777(8) TO SPECIFY THAT ALL LINES (16.) ARE TO BE TESTED. IT MAY BE MODIFIED AT CONFIGURATION TIME TO SPECIFY ANY COMBINATION OF LINES TO TEST. REFER TO SECTION 2.1.3.(B11) FOR A DESCRIPTION OF ITS ENCODING. NOTE: ONCE THE PROGRAM IS STARTED IT IS TABLE DRIVEN AND USES ‘'DHASEL', "LINSEL" AND THE CONTENTS OF THE THREE TABLES ?80¥ES¥° DEFINE THE CONFIGURATION NCTE: IT IS RECOMMENDED THAT WHEN NONSTANDARD CONFIGURATIONS ARE CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 10-MAR-78 09-MAR-78 15:32 08:05 SEQ 0020 SEQ 0019 PAGE 22 ENCOUNTERED, THE MODEM CONTROL DIAGNOSTIC, CZDHK, SHOULD BE RUN, RATHER THAN ALTERING THE MODEM CONTROL TABLES IN THIS PROGRAM. B. SUB-TEST ITERATION COUNT THERE IS A LOCATION TAGGED ''SMXCNT:'' THAT DETERMINES HOW MANY TIMES EACH SUB-TEST IS REPEATED (SR11=0) IT IS PROGRAM LOADED TO 000010(8) BUT CAN BE (HANGED TO MODIFY THE ITERATION COUNT. NOTE THAT MODIFYING THIS LOCATION WILL CHANGE THE PROGRAM EXECUTION TIME DEFINED IN PARA 2.4(B). 2.5.3 REGISTER USAGE IN MOST OF THE TESTS THE GENERAL REGISTERS CONTAIN STANDARD INFORMATION AS SHOWN BELOW. ON PROGRAM HALTS THE R;?éSTERS CAN BE EXAMINED DIRECTLY TO DISPLAY THIS INFORMATION. RO TEST NUMBER IN OCTAL R1 R2 ADDRESS OF THE °''SCR" REG (DEVICE ADDRESS) ADDRESS OF THE DH11 REGISTER BEING TESTED R3 R4 ACTUAL CONTENTS OF THE DH11 REG BEING TESTED WHAT THE CONTENTS OF THE DH11 REG BEING TESTED SHOULD HAVE BEEN GENERAL USE - REFER TO THE LISTING FOR ITS USE CONTENTS OF THE STACK POINTER CONTENTS OF THE PROGRAM COUNTER RS R6 R7 2.4 EXECUTION TIMES A. SR11 = 0 WITH ONE DH11 SUB-TEST ITERATIONS SELECTED FOR TESTING 16. LINES ONE ERROR FREE PASS TAKES APPROXIMATELY 8 MINUTES. B. SR11 = 1 INHIBIT ITERATIONS WITH ONE DH11 SELECTED FOR TESTING 16. COMPLETE LINES ONE COMPLETE ERROR FREE PASS TAKES APPROXIMATELY ONE MINUTE NOTE: THE ABOVE TIMES WERE DETERMINED WHEN THE PROGRAM WAS RUN ON A PDP-11/45 AND A PDP-11/40 CPU. CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0021 SEQ 0020 PAGE 23 ERROR INFORMATION 3.0 3.1 3.1. 1 THE PROGRAM UTILIZES THE STANDARD PDP11 D IAGNOSTICS ERROR UTILITIES. THE TEST ROUTINE CALLS THESE U TILITIES USING AN “ERROR N'' INSTRUCTION (CODED EMT) WHERE “N'' IS THE NUMBER OF THE ERROR MESSAGE. THE UTILITY ROUTINE USES ''N'' TO ACCESS THE PROPER ERROR INFORMATION VIA T HE ERROR TABLE DESCRIBED IN SECTION 3.71.2 BELOW. EACH ME SSAGE RESULTS IN THREE LINES OF TYPEOUT AS FOLLOWS: LINE 1 LINE 2 LINE 3 A BRIEF DESCRIPTION OF THE FAILING FUNCTION LABELS TO IDENTIFY THE DATA TYPED ON LINE 3 THE ACTUAL ERROR DATA (UP TO 8 OCTAL OR DECIMAL NOS.) EXAMPLE: SYSTEM CONTROL REGISTER ERROR (PC) (PS) (SP) TEST 002720 000002 001074 000003 DEVADR 160020 REGADR 1 60020 WAS 000000 S/B 000001 THE ERROR TABLE ITEMS SHOWN IN THE NEXT SECTION DESCRIBE ALL THE DH ERROR MESSAGES WITHIN CZDHM AND ARE INTERPRETED AS FOLLOWS: EM DH DT DF ADDRESS OF THE MESSAGE FOR LINE 1 ADDRESS OF THE DATA HEADER MESSAGE FOR LINE 2 ADDRESS OF THE TABLE OF ADDRESSES THAT POINT TO THE DATA WORDS TO BE PRINTED ADDRESS THAT POINTS TO THE DATA DESCRIPTOR TABLE THAT DEFINES WETHER AN ITEW IS OCTAL OR DECIMAL. IF THIS ENTRY IS "'0"" ALL DATA WORDS ARE IN OCTAL. SECTION 3.1.3 DEFINES THE MEANING OF THE MNEUMONICS USED IN THE VARIOUS DATA HEADERS. THERE ARE ONLY TWO MESSAGES PROGRAM: IN THE MODEM CONTROL PORTION OF THIS CNE INFORMS THE USER THAT NO MODEM CONTROL'S WERE FOUND BY THE AUTOSIZER AND THE PROGRAM THEN CONTINUES TESTING THE DH11'S. THE OTHER INSTRUCTS THE USER TO RUN THE MODEM CONTROL DIAGNOSTIC, CZDHK, DUE TO AN ERROR. THE PROGRAM THEN CONTINUES. CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 3.1.2 10-MAR-78 08:05 SEQ 0022 SEQ 0021 PAGE 24 ERROR MESSAGE TABLES ;ERROR TABLE ITEM FOR ERROR MESSAGE 1 EM1 DH1 DT 0 ;ERROR TABLE EM2 DH2 DT2 0 ;"'DH11 REGISTER REFERENCE CAUSED TIMEOUT" " (PC) (PS) (SP) TEST DEVADR REGADR '’ ;SERRPC,$TMPO,SREG6,SREGO, SREG1,$REG2 sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 2 ;"'SYSTEM CONTROL REGISTER ERROR'' ; (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B *' , SREG4 REG6, SREG1 ,SREG2,SREG3 MPO,S SREGO, ;SERRPC,$T sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 3 EM3 DH2 DT2 0 :"'DH11 MASTER CLEAR FAILED TO CLR SPECIFIED REG" ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' :SERRPC,$TMPO,SREG6, SREGO,SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 4 EMé DH2 DT2 0 :"'LINE PARAMETER REGISTER ERROR'' (SP) TEST DEVADR REGADR WAS S/B TM (PS) ;" (PC) :SERRPC,STMPO,SREG6, SREGO,SREGT,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR +TABLE ITEM FOR ERROR MESSAGE 5 EM5 DH2 D12 0 ;"'BREAK CONTROL REGISTER ERROR' (SP) TEST DEVADR REGADR WAS S/B TM (PS) ;" (PC) :SERRPC ,$TMPO,SREG6, SREGO,SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 6 EM6 DH2 DT2 0 ;"'SILO STATUS REGISTER ERROR' (SP) TEST DEVADR REGADR WAS S/B TM' (PS) ;" (PC) SREGO,SREG1,SREG2, SREG3, SREG4 O,SREG6, ;SERRPC,$TMP ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 7 EM7 DH2 D72 0 ;"'CURRENT ADDRESS REGISTER ERROR - LINE #XX'' ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " SREG4 REGO, SREG1, SREG2,SREG3, ;SERRPC,$TMPO,SREG6,S ;PRINT ALL OCTAL CZOHM-D-0 CZDHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 08:05 SEQ 0023 SEQ 0022 PAGE 25 ;ERROR TABLE ITEM FOR ERROR MESSAGE 10 EM10 DH2 D12 0 ;"BYTE COUNTER REGISTER ERROR - LINE #xXx' 2 (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B REGADR WAS §S/B WAS S/B ;SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 11 EM1T DH2 DT2 0 :"UNEXPECTED DH11 RCVR INTERRUPT" ;' (PC) (PS) (SP) TEST DEVADR ;SERRPC,$TMPO,$SREG6, SREGO,SREG1,$REG2, SREG3, SREG4 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR EKROR MESSAGE 12 EM12 DH2 DT2 0 ;ERROR TABLE EM13 DH2 DT2 0 ;ERROR TABLE EM14 DH2 DT2 0 ;ERROR TABLE EM15 DH2 DT2 0 ;"'UNEXPECTED DH11 XMITTR INTERRUPT" ;' (PC) (PS) (SP) TEST DEVADR REGADR SREG4 REG2, SREG3, ;SERRPC,$TMPO,SREG6,SREGO,SREGT,S sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 13 :""CHAR AVAILABLE FAILED TO GENERATE RCVR INTERRUPT' ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ;SERRPC,$TMPO,SREG6, SREGO,SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 14 :"TRANSMITTER NPR LOGIC ERROR - LINE # ' (SP) TEST DEVADR REGADR WAS 5S/B (PS) 2 (PC) SREG4 SREG3, 6, O,SREG SREGO, SREG1,8REG2, :SERRPC,$TMP sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 15 ;"XMITTR FAILED TO INTERRUPT - LINE # " (SP) TEST DEVADR REGADR WAS S/B (PS) ;" (PC) ,SREG3, SREG4 SREGT ,SREG2REG6, HPO,S SREGO, :SERRPC,$T ;PRINT ALL OCTAL sERROR TABLE ITEM FOR ERROR MESSAGE 16 EM16 DH2 D12 0 ;""RCVR FAILED TO INTERRUPT' ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' SREG3, SREG4 REG6, SREGT,SREG2, MPO,S SREGO, ;SERRPC,$T sPRINT ALL OCTAL CZDHM-D-0 CZDHAD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0024 SEQ 0023 PAGE 26 ;ERROR TABLE ITEM FOR ERROR MESSAGE 17 Em7 DH6 D12 0 :"TRANSMITTER TIMING ERROR - LINE # " ;" (PC) (PS) (SP) TEST DEVADR SPEED TIMEB SREG4 G6, SREG3, PO,SRE SREGO, SREG1,SREG2, ;SERRPC,S$TM TIMEC" ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 20 EM20 DH6 D12 0 sRECEIVER TIMING ERROR - LINE # " ;" (PC) (PS) (SP) TEST DEVADR SPEED TIMEB G2, SREG3, SREGS ;SERRPC,$TMPO,SREG6,SREGO,SREGT,SRE TIMEC" sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR EKROR MESSAGE 21 EM21 DH2 D12 0 ;"RCVR FAILED TO INTERRUPT - LINE # ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ;SERRPC,$TMPO,SREG6, SREGO,SREG1,SREG2, SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 22 EM22 DH2 D12 0 ;"'CHAR AVAIL FAILED TO SET ON TIME - LINE # " ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B "' :SERRPC,S$TMPO,SREG6, SREGO, SREGT ,SREG2,SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 23 EM23 DH7 D12 0 ;"BASIC DATA TEST ERROR - LINE # (SP) TEST DEVADR CHRLNG WAS S/B " (PS) ;" (PC) SREG4 ,SREG3,REG2 sSERRPC,$TMPO,SREG6,SREGO,SREGT,S sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 24 EM24 DH2 DT2. 0 ;"AUTO ECHO TEST ERROR - LINE # °* (SP) TEST DEVADR REGADR WAS S/B " (PS) ;' (PC) SREG4 REG6 SREG2, SREG3, MPO,S , SREGO,SREGT, PC,$T ;SERR sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 25 EM25 DH2 D12 0 ;"BREAK BIT TEST ERROR - LINE # " ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B "' , SREG3, SREG4 SREG1,SREG2REG6, MPO,S SREGO, ;SERRPC,$T ;PRINT ALL OCTAL CZDHM-D-0 CZDHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 08:05 SEQ 0025 SEQ 0024 PAGE 27 ;ERROR TABLE ITEM FOR ERROR MESSAGE 26 EM26 DH2 D12 0 ;"'HALF-DUPLEX TEST ERROR - LINE # ;" (PC) (PS) (SP) TEST DEVADR " REGADR WAS S/B SREG4 EG6 ,$SREG2, SREG3, ? O,SR $TMP ,SREGO,SREG ;SERRPC, sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 27 EM27 . DH3 DT3 0 :""'UNEXPECTED BUS ERROR TRAP' TEST TRPPC TRPPS (SP) (PS) : (PC) SREG1,SREG2 SREGO,SREG6, :SERRPC,$TMPO, sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR EKROR MESSAGE 30 EM30 DH3 DT3 0 :""UNEXPECTED RSVD INSTR TRAP'' TEST IRPPC IRPPS (5P) 1P5) : PL) ;SERRPC,$TMPO,SREG6, SREGO,SREG1,SREG2 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 31 EM31 DH4 D12 0 ;"'AUTO ECHO DATA COMPARE ERROR - LINE # s £PC) 1P5) (W) TEST WASADR SBADR WAS 6 SREG3 , SREG4 O,SREG , SREGO, SREGT,SREG2, ;SERRPC,$TMP s/B "' sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 32 EM32 DH5 DT4 0 ;"AUTO ECHO TEST TIMEOUT - LINE # ;" (PC) (LPRG) TEST'TM' sSERRPC,S$TMPO,$THP2 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 33 EM33 DH2 bT2 0 :"PARITY LOGIC TEST ERROR - LINE # " (SP) TEST DEVADR REGADR WAS S/B" ;' (PC) (PS) SREG4 REG6 SREG1 ,SREG2, SREG3, . SREGO,MPO,S ;SERRPC,$T sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 34 EM34 DH4 DT2 0 ;"MULTI=-LINE PARITY DATA TEST ERROR - LINE # - SUBTEST # ;" (PC) (PS) (SP) TEST WASADR SBADR WAS S/B TM O, . SREG3, SREG4 6,SREG SREG1 ,SREG2 ;SERRPC,$TMPO,SREG sPRINT ALL OCTAL CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0026 SEQ 0025 PAGE 28 ;ERROR TABLE ITEM FOR ERROR MESSAGE 35 EM35 DH14 D16 0 ;"MULTI=-LINE PARITY DATA TEST TIMEOUT' (LPRG) LINACT * ;" (PC) :"'SERRPC ,S$TMPO,STHP3"" sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 36 EM36 DH5 DT4 0 ;ERROR TABLE EM37 DH4 D12 0 ;ERROR TABLE EM4O DH2 D12 0 ;ERROR TABLE EM&T DH5 DT4 0 ;CHAR AVAILABLE TIMEOUT' 3 ARC) (LPRG) TESTTM sSERRPC,STMPO,STHP2 sPRINT ALL OCTAL ITEM FOR EKROR MESSAGE 37 :"'DATA COMPARE ERROR - LINE # ' 2 (PC) (PS) (SP) TEST WASADR SBADR WAS S/B ' SREG4 REGT ,SREG2 ,SREG3, :SERRPC,$TMPO,SREG6,SREGO,S sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 40 ;"BUFFER ACTIVE REG ERROR - LINE # " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' SREG4 SREG3, 6, O,SREG SREGO, SREGT,SREG2, :SERRPC,$TMP sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 41 :""RCVR FALSE INTERRUPT® 2 (PC) CLPRG) TEST" ;SERRPC,STHPO,STHP2 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE &2 EM42 DH5 DT4 0 ;"'SILO OVERFLOW ERROR' z AP LR - TESTT ;SERRPC,S$TAPO,$THP2 sPRINT ALL OCTAL s ERROR TABLE ITEM FOR ERROR MESSAGE 43 EM43 DH2 D12 0 ;"'SILO OVERFLOW FAILED TO GENERATE RCVR INTERRUPT' (SP) TEST DEVADR REGADR WAS S/B TM (PS) ;" (PC) SREG3, SREG4 REGH, SREGT,SREG2, MPO,S SREGO, ;SERRPC,ST sPRINT ALL OCTAL (ZDHM-D-0 (ZDHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 08:05 PAGE SEQ 0027 SEQ 0026 29 ;ERROR TABLE ITEM FOR ERROR MESSAGE 44 EM44 DH2 D12 0 ;ERROR TABLE EM4S DH2 D12 0 ;ERROR TABLE EM46 DH10 D15 0 ;ERROR TABLE EM&7 DH10 DTS 0 ;ERROR TABLE EM50 DH2 D12 0 ;ERROR TABLE ;"'NON EX MEMORY FAILED TO GENERATE XMITTR INTERRUPT" 2 (PC) (PS) (SP) sPRINT ALL OCTAL TEST ;"'XMIT DONE FAILED TO GENERATE J(PC) (PS) (SP) TEST XMITTR INTERRUPT" DEVADR REGADR WAS S5/8 sPRINT ALL OCTAL ITEM FOR EKROR MESSAGE 46 ;""CURRENT ADDRESS MEMORY PATTERNS TEST ERROR - LINE # ;" (PC) LINEWR PATTRN TEST DEVADR REGADR WAS SREGS SREG3, EGZ, SREGO,SREG1,SR TNPi ;SERRPC,STMPO,S ;PRINT ALL OCTAL ) ITEM FOR ERROR MESSAGE 47 ;"BYTE COUNT MEMORY PATTERNS TEST ERROR - LINE # ; (PC) LINEWR S/8" i PATTIRN TEST DEVADR REGADR SREGS :SERRPC,STRPO,STAP1,SREGO,SREG1,SREG2,SREG3, WAS S/B8" sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 50 ;U'TEST TIMEOUT WAITING FOR XMIT DONE - LINE # oA (PS) ;PRINT ALL OCTAL (SP) ° TEST DEVADR REGADR WAS $/B8" TEST DEVADR REGADR WAS S/B" G6 ,SREGSTM ,SREG ,SREG2,SREGS $TMPO . SREGO,SREGT ;""SERRPC, ITEM FOR ERROR MESSAGE 51 ;PRINT ALL OCTAL , SREGSTM TMP1 ,SREG2 . SREG3 MPO,S SREGO,SREGT ;SERRPC,ST ITEM FOR ERROR MESSAGE 52 EMS52 ;"'BASIC DATA COMPARE ERROR' DTe 0 PRINT ALL OCTAL DH2 S/B " ;SERRPC,$TMPO,SREGH, SREGO ,SREGT,SREGZ2,SREG3, SREG4 0 ERROR TABLE WAS ITEM FOR ERROR MESSAGE 45 ;"'NPR LOGIC TEST 2 ERROR" LINACT LINCHK ;" (PC) DTS REGADR ;SERRPC,$TMPO,SREGH , SREGO,SREGT,SREG2 , SREG3, SREGS DH11 EMS1 DEVADR WAS DEVADR REGADR TEST (SP) (P$) ;A ;SERRPC,$TMPO,SREGH, SREGO,SREGT,SREGZ, SREG3 , SREGSTM S/8" CZDHA-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 30 SEQ 0028 SEQ 0027 ;ERROR TABLE ITEM FOR ERROR MESSAGE 53 EM50 DH12 D12 0 '’ ;""TEST TIMEOUT WAITING FOR XMIT DONE - LINE # s (PC) _ SPRED ;PRINT ALL OCTAL (SP) TEST DEVADR REGADR ;SERRPC,$TMPO,SREG6 ,SREGO,SREG1,SREG2,SREG3, SREG4 WAS ;ERROR TABLE ITEM FOR ERROR MESSAGE 54 EM22 - DH12 DT2 0 ;""CHAR AVAIL FAILED TO SET ON TIME - LINE # (ML) SPRED (SP) TEST DEVADR "' REGADR ;SERRPC,$TMPO,SREG6,SREGO,SREGT,SREG2, SREG3, SREG4 WAS sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR EKROR MESSAGE 55 EM22 DH13 D12 0 ;""CHAR AVAIL FAILED TO SET ON TIME - LINE # °'* (PS) (SP) TEST DEVADR CHRLNG SCRWAS ;' APD) :SERRPC,STMPO,SREG6,SREGO,SREGT,SREG2, SREG3, SREGS sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 56 EM56 DH2 D12 0 :""OVERRUN BIT FAILED TO SET - LINE # °*° (SP) TEST DEVADR REGADR WAS (PS) ; rC) G3, SREG4 G6, SREG1,SREG2,SRE O,SRE SREGO, : SERRPC ,$TMP sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 57 EMS57 DH2 DT2 0 ;"'STORAGE OVERFLOW BIT FAILED - LINE # ' (SP) TEST DEVADR REGADR WAS (PS) 3 4PE) :SERRPC,S$TMPO,SREG6, SREGO,SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL SCRS/B"’ CZCHM=-D~0 CZDHMD.P11 10-MAR-78 08:05 30A(1052) 3.1.3 DATA HEADER MNEUMONIC DEFINITIONS 09-MAR-78 15:32 SEQ 0029 SEQ 00238 PAGE 31 MACY11 ALL NUMBERS PRINTED AS ERROR DATA ARE IN OCTAL (PC) ADDRESS OF THE ERROR CALL (ERROR PC) (PS) CONTENTS OF (SP) CONTENTS OF THE STACK POINTER AT THE TIME OF TEST TEST NUMBER DEVADR DEVICE ADDRESS - 1ST ADDRESS IN THE SELECTED DH11 REGADR ADDRESS OF WAS WHAT THE ACTUAL DATA READ WAS (DH11 REG OR CORE LOC.) S/B WHAT THE DATA READ SHOULD HAVE BEEN SPEED SPEED CODE IN THE "LPR'' REG AT THE TIME OF THE ERROR REFER TO SECTION 5.2.3 FOR SPEED CODE TABLES TIMEB CONTENTS OF SOFTWARE COUNTER USED IN TIMING TESTS TIMEC CONTENTS OF SOF TWARE COUNTER USED IN TIMING TESTS NOTE:"'TIMEB'' SHOULD ALWAYS BE LESS THAN '‘TIMEC" CHRLNG CHARACTER LENGTH CODE IN THE "LPR'° AT THE TIME OF THE ERROR 00=5 BITS, 01=6 BITS, 02=7 BITS, 03= 8 BITS TRPPC THE PSW AT THE THE DH11 TIME OF THE ERROR THE ERROR RFGISTER BEING TESTED CONTENTS OF THE PC (R7) AT THE TIME OF A BUS ERROR OR RSVD INSTR TRAP. TRPPS CONTENTS OF THE PSW AT THE TIME OF A BUS ERROR OR RSVD INSTR TRAP. (LPRG) CONTENTS OF THE "'LPR" REGISTER AT THE TIME OF THE ERROR LINACT FLAGS USED BY MULTI-LINE WASADR CORE MEMORY ADDRESS OF THE "‘WAS'' DATA (ACTUAL DATA READ) SBADR CORE MEMORY ADDRESS OF SCRWAS CONTENTS OF THE ''SCR' REGISTER SCRS/B WHAT THE CONTENTS OF THE ''SCR'' REGISTER SHOULD HAVE BEEN LINCHK LINE NO. BEING CHECKED DURING ''CAR'* AND '‘BCR'' MEMORY TESTS LINEWR LINE NO. BEING WRITTEN INTO DURING '‘CAR'* AND ''BCR'' MEMORY TESTS PATTRN TEST PATTERN BEING WRITTEN INTO EITHER THE ''CAR' OR "'BCR'' MEMORIES TESTS TO INDICATE LINES STILL ACTIVE THE S/B DATA (GOOD DATA) CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15-32 3.2 10-MAR-78 08:05 PAGE 32 POWER FAIL PRINTOUT THE IF A POWER FAILURE OCCURS WHILE THE PROGRAM IS RUNNING, FOLLOWING PRINTOUT OCCURS: “'POWER"’ AFTER THE PRINTOUT THE PROGRAM WILL BE RESTARTED AUTOMATICALLY FROM THE BEGINNING. NO ATTEMPT IS MADE TO CONTINUE THE PROGRAM FROM THE POINT OF THE PGWER FAIL INTERRUPTION. 3.3 ERROR HALTS A. SYSMAC ERROR SERVICE ROUTINE HALT WHEN SR15=1 A "'HALT'' IS EXECUTED IN THE SYSMAC ERROR UTILITY AFTER THE ERROR TYPEOQUT. TO RESUME TESTING FROM THE POINT OF THE "'HALT'* SIMPLY DEPRESS CONTINUE. B. POWER FAIL HALT WHEN A POWER DOWN IS DETECTED, THE PROGRAM HALTS IN THE POWER FAIL UTILITY ROUTINE. IF FOR SOME REASON THE AUTO-START FEATURE FAILS TO RESTART THE PROGRAM, THE PROGRAM WILL ‘'LOCK'® ON THIS HALT IF CONTINUE IS DEPRESSED. IN THIS CASE THE PROGRAM MUST BE RESTARTED. C. TRAP CATCHER HALTS ALL INACTIVE VECTORS ARE SET UP WITH THE STANDARD PDP11 TRAP CATCHER AS DESCRIBED BELOW: VN / VUN+#2 VN+2/ HALT IF A TRAP OR INTERRUPT OCCURS TO .A VECTOR THAT HAS NOT BEEN SET UP BY THE TEST ROUTINE, A "HALT'' OCCURS IN THE VECTOR AREA. THE ADDRESS DISPLAY INDICATES WHICH VECTOR THE PROGRAM TRAPPED TO AND THE LAST ENTRY PUSHED ON TO THE STACK INDICATES WHERE THE PROGRAM WAS WHEN THE TP"TM OR INTERRUPT OCCURRED. SEQ 0030 SEQ 0029 CZDHM-D-0 (ZDHRD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 33 4.0 PERFORMANCE AND PROGRESS REPORTS 6.1 PERFORMANCE REPORTS SEQ 0031 SEQ 0030 (NONE PROVIDED) 4.2 PROGRESS REPORTS A. WHEN THE PROGRAM IS STARTED OR RESTARTED TITLE MESSAGE: IT PRINTS THE "'CZDHM=-"'X"" DH11 DIAGNOSTIC" WHERE "'X'' IS THE REVISION LEVEL LETTER DESIGNATiON. B. WHEN THE PROGRAM BEGINS TESTING ON EACH DH11 THE FOLLOWING MESSAGE: IT TYPES “TESTING DH11 #NN" WHERE "'NN'' IS THE DEVICE NO. IN OCTAL (00-17) C. WHEN THE PROGRAM COMPLETES A PASS LINES ON ALL SELECTED DH11'S) "END PASS (TESTED ALL SELECTED IT TYPES: #AXXXX"" WHERE ''X'' IS THE PASS COUNT IN DECIMAL. D. WHEN THE PROGRAM IS IN THE CONFIGURATION DIALOGUE (START AT 200, OR 210) AND SR8 AND SRO=1, THE PROGRAM WILL HALT AFTER ACCEPTING THE TYPE THE FOLLOWING MESSAGE: INPUT PARAMETERS AND "DEPRESS CONTINUE TO START TESTING' THE PURPOSE OF THIS HALT IS TO ALLOW THE USER TO DUMP THE UPDATED PROGRAM ON THE LOAD MEDIUM FOR NON-STANDARD CONFIGURATIONS. (SEE SECTION 2.2.2 AND 2.3.2) CZDHMW=D-0 CZDHMD.P11 MACY11 3CA(1052) 09-MAR-78 15:32 5.0 B 10-MAR-78 DPH11 DEVICE 08:05 PAGE 34 SEQ 0032 SEQ 0031 INFORMATION ADDRESS AND VECTOR ASSIGNMENTS THE DH11 USES FLOATING ADDRESSES AND IS LOCATED AFTER DJ11'S IN THE FLOATING ADDRESS SPACE THAT BEGINS A BECAUSE THE DH11 HAS EIGHT REGISTERS, IT MUST BE ASSIGNED AN ADDRESS THAT IS A MULTIPLE OF 20 (OCTAL). SYSTEM SHOULD HAVE CONSECUTIVE ADDRESSES. EXAMPLE #1: A SYSTEM WITH NO DJ11'S BUT TWO DH11°'S. 760 010 CANNOT USE FOR DH11'S BECAUSE NOT MULTIPLE OF 20. 760 020 FIRST DH11 760 040 SECOND DH11 760 060 DH11 GAP (INDICATES THAT THERE ARE NO MORE DH11'S). EXAMPLE #2: A SYSTEM WITH ONE DJ11, TWO DH11'S: 760 010 FIRST DJ11 760 020 DJ11 GAP (INDICATES THAT THERE ARE NO MORE DJ11'S). 760 030 CANNOT USE FOR DH11'S BECAUSE NOT MULTIPLE OF 20. 760 040 FIRST DH11 760 060 SECOND DH11 760 100 DH11 GAP (INDICATES THAT THERE ARE NO MORE DH11°'S). THE DH11 VECTORS (2) FOLLOW THOSE OF THE DJ11 IN THE FLOATING VECTOR SPACE THAT STARTS AT ADDRESS 300. AT 300 ARE USED IN THE FOLLOWING ORDER: DC11; KL11/DL11-A, B; DP11; DM11-A; DN11; DM11-BB; DR11-A; DR11~ PA611 PUNCHES; DT11; DX11; OL11-C, D, E; DH11. THE RECEIVER VECTOR IS THE LOWER NUMBERED VECTOR. THE PRIORITY OF THE RECEIVER AND TRANSMITTER INTERRUFT SELECTABLE BY MEANS OF TWO STANDARD PDP11 PRIORITY JUMPER PLUGS. BR LEVEL 5 IS STANDARD. 5.2 REGISTER DEFINITION THE FOLLOWING SECTION DESCRIBES THE BIT ASSIGNMENTS WITHIN EACH REGISTER: BITS MARKED UNUSED AND WRITE O AS ZERO. ATTEMPTING TO WRITE INTO UNUSED OR READ ONLY BITS HAS NO EFFECT ON THOSE BITS. INIT REFERS TO T GENERATED BY THE PROCESSOR (E.G. UPON EXECUTION OF A RESET INSTRUCTION). TRANSMIT AND RECEIVE ARE WITH R CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 5.2.1 10-MAR-78 08:05 PAGE 35 3 SEQ 0033 SEQ 0032 THE SYSTEM CONTROL REGISTER - ADDRESS Xx00 THE SYSTEM CONTROL REGISTER BITS DESCRIPTION 00-03 LINE SELECTION IS A BYTE-ADDRESSABLE REGISTER. THE BIT ASSIGNMENT IS AS FOLLOWS: EACH OF THE 16 LINES SERVED BY THE DH11 HAS ITS OWN STORAGE FOR LINE PARAMETER INFORMATION, CURR BYTE COUNT. THESE STORAGE LOCATIONS ARE LOADED BY THE PROGRAM -VIA THE LINE PARAMETER REGISTER, C REGISTER, AND BYTE COUNT REGISTER, BUT THE HARDWARE MUST FIRST BE TOLD WHICH LINE IS TO HAVE ITS CURRENT ADDRESS, OR BYTE COUNT CHANGED. THIS ROUTING IS ACCOMPLISHED BY SETTING THE LINE SELECTI THE BINARY ADDRESS (0000-1111) OF THE DESIRED LINE. THESE BITS ARE READ/WRITE. 04, 05 MEMORY EXTENSION THE INFORMATION STORED IN THESE BITS BECOMES BITS 16 AND 17 RESPECTIVELY OF ANY CURRENT ADDRESS PROGRAM INTO THE CURRENT ADDRESS REGISTER. THESE BITS ARE READ/WRITE BUT, WHEN READ, REPRESENT 0 OF BITS 4 AND 5 OF THE SYSTEM CONTROL REGISTER, NOT THE STATUS OF ADDRESS BITS 16 AND 17 OF THE SEE THE SILO STATUS REGISTER FOR FURTHER INFORMATION. THIS ARRANGEMENT PERMITS INTERRUPT SERVICE SAVE THE CONTENTS OF THE SYSTEM CONTKOL REGISTER ACCURATELY. 06 RECEIVER INTERRUPT ENABLE THIS BIT, WHEN SET, ENABLES RECEIVER INTERRUPTS (BIT 7) 07 RECEIVER INTERRUPT THIS BIT, WHEN SET, INDICATES THAT THE NUMBER OF CHARACTERS STORED IN THE SILO EXCEEDS THE '‘ALAR SPECIFIED BY THE LOW BYTE OF THE SILO STATUS REGISTER. THIS BIT IS READ ONLY, EXCEPT IN MAINTENA WHERE IT IS READ/WRITE. SETTING OF THIS BIT WILL GENERATE AN INTERRUPT REQUEST IF BIT 6 (ABOVE) IS ALSO SET. 08 CLEAR NON-EXISTENT MEMORY INTERRUPT THIS BIT, WHEN SET, IS READ/WRITE. 09 MAINTENANCE THIS BIT, 10 WHEN SET, PLACES THE DH11 IN MAINTENANCE MODE. NON-EXISTENT MEMORY THIS BIT NO SLAVE THIS BIT THIS BIT 1 CLEARS THE NON-EXISTENT MEMORY INTERRUPT FLIP-FLOP (BIT 10) AND CLEARS ITSEL IS SET WHENEVER THE NPR HARDWARE PLACES THE ADDRESSES OF A MEMORY LOCATION ON THE UNIBU CYNC IS RECEIVED IN 20 S. THIS INDICATES THAT THE ADDRESSED LOCATION OR DEVICE DOES NOT CAUSES AN INTERRUPT REQUEST IF SET WHILE TRANSMITTER AND NON-EXISTENT MEMORY INTERRUPT IS READ ONLY, EXCEPT IN MAINTENANCE MODE, WHERE IT IS READ/WRITE. MASTER CLEAR THIS BIT, WHEN SET, GENERATES ''INITIALIZE'' WITHIN THE DH11, CLEARING THE SILO, THE UARTS, AND TH EXACT BITS CLEARED ARE DISCUSSED IN THE SECTION ON INITIALIZATION. READ/WRITE. CZOHM-D-0 CZDHPD.P11 MACY11 30A(1052) 09-MAR-78 15:32 12 10-MAR-78 STORAGE 08:05 PAGE 36 SEQ 0034 SEQ 0033 INTERRUPT ENABLE THIS BIT, WHEN SET, PERMITS THE SETTING OF BIT 13 14 TO GENERATE AN INTERRUPT REQUEST. THIS BIT TRANSMITTER AND NON-EX-MEM INTERRUPT ENABLE THIS BIT, WHEN SET, PERMITS THE SETTING OF BIT 10 OR 15 TO GENERATE AN INTERRUPT REQUEST. 14 IS STORAGE THIS BIT THIS B INTERRUPT IS SET WHEN THE RECEIVER SCANNER FINDS A RECEIVER HOLDING BUFFER WITH A CHARACTER IN IT STORE THAT CHARACTER IN THE SILO, AND CANNOT DO SO BECAUSE OF A LACK OF SPACE. WHEN SET THIS BIT AN INTERRUPT REQUEST IF BIT 12 IS SET. THIS BIT IS READ ONLY, EXCEPT IN MAINTENANCE MODE, WHERE IT IS READ/WRITE. 15 TRANSMITTER THIS BIT INTERRUPT IS SET WHEN THE DH11 CONCLUDES AN NPR CYCLE THAT INCREMENTED A BYTE COUNT TO ZERO, INDI CHARACTER IN A MESSAGE BUFFER WAS LOADED INTO A UART TRANSMITTER HOLDING REGISTER. THIS BIT WILL REQUEST IF BIT 13 IS SET. THIS BIT IS READ/WRITE. (IT IS SET DURING AN NPR CYCLE.) CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 5.2.2 10-MAR-78 08:05 1 PAGE 37 9 SEC 0035 SEQ 0034 NEXT RECEIVED CHARACTER REGISTER ADDRESS Xx02 - - - - BITS DESCRIPTION 00-07 NEXT RECEIVED CHARACTER e - - - THESE BITS CONTAIN THE NEXT RECEIVED CHARACTER, 08-11 RIGHT JUSTIFIED. THE LEAST SIGNIFICANT BIT IS BI LINE NUMBER THESE BITS INDICATE THE LINE NUMBER ON WHICH THE NEXT RECEIVED CHARACTER WAS RECEIVED. BIT 8 IS LEAST SIGNIFICANT BIT. 12 PARITY ERROR THIS BIT 13 IS SET THE PARITY OF THE RECEIVED CHARACTER DCES NOT AGREE WITH THAT DESIGNATED FOR IF THE RECEIVER SAMPLES A LINE FOR THE FIRST STOP BIT, AND FINDS THE LINE FRAMING ERROR THIS BIT IS SET (LOGICAL 0). 14 IF THIS CONDITION USUALLY INDICATES THE RECEPTION OF A BREAK. IN A S DATA OVERRUN THIS BIT IS SET WHEN THE RECEIVED CHARACTER WAS PRECEDED BY A CHARACTER THAT WAS LOST DUE TO THE RECEIVER SCANNER TO SERVICE THE UART RECEIVER HOLDING BUFFER. REFER TO THE SECTION ON PROGRAMMIN FURTHER DETAILS ON DOUBLE-BUFFERED RECEPTION. 15 VALID DATA PRESENT THIS BIT INDICATES THAT THE DATA PRESENTED IN BITS 14-00 IS VALID. IT PERMITS A CHARACTER HANDLI CHARACTERS FROM THE SILO UNTIL IT IS EMPTY. THIS IS DONE BY READING THIS REGISTER AND CHECKING B 6: 385:1:50058RB:2%§H BIT 15 IS A ZERO. THE ENTIRE NEXT RECEIVED CHARACTER REGISTER IS READ-ONLY L W . CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 5.2.3 10-MAR-78 08:05 PAGE 38 SEQ 0036 SEQ 0035 LINE PARAMETER REGISTER ADDRESS Xx04 THIS REGISTER SHOULD BE LOADED ONLY AFTER THE LINE SELECTION BITS OF LINE TO WHICH THESE PARAMETERS APPLY. THIS REGISTER IS WRITE ONLY. BITS DESCRIPTION 00-01 CHARACTER LENGTH THESE BITS SHOULD BE THE SYSTEM CONTROL REGISTER HAVE BE SET AS SHOWN TO RECEIVE AND TRANSMIT CHARACTERS OF THE LENGTH (EXCLUDING PA BIT 01 00 2 0 » 13 3. g 02 5 BIT 6 BIT 7 BIT 8 BIT TWO STOP BITS THIS BIT, WHEN SET, CONDITIONS A LINE TRANSMITTING WITH 6, 7, OR 8-BIT CODE TO TRANSMIT CHARACTE MARKS. IF THE LINE IS TRANSMITTING 5-BIT CODE, ASSERTION OF THIS BIT CAUSES THE CHARACTERS TO BE 1.5 STOP MARKS. IF THIS BIT IS NOT ASSERTED, 1 STOP MARK IS SENT. 03 NOT USED 04 PARITY ENABLED IF THIS BIT IS SET, CHARACTERS TRANSMITTED ON THIS LINE WILL HAVE AN APPROPRIATE PARITY BIT AFFI RECEIVED ON THIS LINE WILL HAVE THEIR PARITY CHECKED. 05 ODD PARITY IF THIS BIT AND BIT 4 ARE SET, CHARACTERS OF ODD PARITY WILL BE GENERATED ON THIS LINE AND INCOM WILL BE EXPECTED TO HAVE ODD PARITY. IF THIS BIT IS NOT SET, BUT BIT & IS SET, CHARACTERS OF EVE GENERATED ON THIS LINE AND INCOMING CHARACTERS WILL BE EXPECTED TO HAVE EVEN PARITY. IF BIT 4 IS OF THIS BIT IS IMMATERIAL. 06-09 RECEIVER SPEED THE STATE OF THESE BITS DETERMINES THE OPERATING SPEED FOR THIS LINE'S RECEIVER. THE SPEED TABLE BELOW IS APPLICABLE. 10-13 TRANSMITTER SPEED THE STATE OF THESE BITS DETERMINES THE OPERATING SPEED FOR THIS LINE'S TRANSMITTER. THME SPEED TABLE ON THE NEXT PAGE IS APPLICABLE. MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0037 SEQ 0036 PAGE 39 SPEED TABLE FOR RECEIVER AND TRANSMITTER SPEEDS: BIT 10 TRANSMITTER 13 12 RECEIVER 9 8 6 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 —_,O=SO=-O—=O0O—=0O—=0—=0—-=0 CZDHM-D-0 CZDHMD.P11 1 1 1 1 1 1 1 1 14 HALF 1" 0 0 0 0 1 1 1 1 ZERO BAUD 50 BAUDS 75 BAUDS 110 BAUDS 134.5 BAUDS 150 BAUDS 200 BAUDS 300 BAUDS 600 BAUDS 1200 BAUDS 1800 BAUDS 2400 BAUDS 4800 BAUDS 9600 BAUDS EXTERNAL INPUT A EXTERNAL INPUT B DUPLEX/FULL DUPLEX IF THIS BIT IS SET, THIS LINE WILL OPERATE IN HALF-DUPLEX MODE. IF NOT SET, THIS LINE WILL OPERA IN FULL-DUPLEX MODE. IN THIS APPLICATION HALF-DUPLEX MEANS THAT THE DH11 RECEIVER IS BLINDED DURING TRANSMISSION OF A 15 AUTO-ECHC ENABLE WHEN THIS BIT IS SET, FURTHER DETAILS. CHARACTERS RECEIVE ON THIS LINE WILL BE HARDWARE ECHOED. SEE THE DISCUSSI CZDHM-D-0 D . P11 C204AM MACY11 30A(1052) 10-MAR-78 09-MAR-78 15:32 5.2.4 08:05 PAGE 40 SEQ 0038 SEQ 0037 CURRENT ADDRESS REGISTER ADDRESS X06 THIS REGISTER SHOULD BE LOADED ONLY AFTER THE SYSTEM CONTROL REGISTER (SCR) HAS HAD THE APPROPRIATE BITS DESIRED ILINE NUMBER. WHEN THIS REGISTER IS LOADED, ADDRESS BITS 00-15 ARE TRANSFERRED INTO SEMICONDUCTOR MEMORIES IN THE DH11 FROM BITS 00-15 OF THIS REGISTER. ADDRESS BITS 16-17 ARE TRANSFERRED INTO SEMICONDU MEMORIES IN THE DH11 FROM BITS 4-5 OF THE SYSTEM CONTROL REGISTER. INTERRUPTS MUST BE INHIBITED OR THE SCR SAVED BETWEEN THE SETTING OF THE SCR BITS 0-3 AND THE READ OF WR ADDRESS REGISTER. WHEN THIS REGISTER IS READ, IT WILL INDICATE THE CURRENT ADDRESS OF THE LINE SELECTED BY THE SYSTEM CONT BITS 16 AND 17 WILL APPEAR IN THE SILO STATUS REGISTER, BITS 6 AND 7. 5.2.% BYTE COUNT REGISTER ADDKESS X10 IN THE SAME FASHION AS THE LINE PARAMETER AND CURRENT ADDRESS REGISTERS, THIS REGISTER SHOULD NOT BE LOA FIRST SELECTING A LINE NUMBER BY. MEANS OF THE LOWER-ORDER FOUR BITS OF THE SYSTEM CONTROL REGISTER. THIS %gAgggo’l;?T;HE TWO'S COMPLEMENT OF THE NUMBER OF CHARACTERS (BYTES) TO BE TRANSMITTED ON THAT LINE. THE [ . INTERRUPTS MUST BE INHIBITED OR THE SCR SAVED BETWEEN THE SETTING OF THE SCR BITS 0-3 AND THE READ OR WR COUNT REGISTER 5.2.6 BUFFER ACTIVE REGISTER (BAR) ADDRESS X12 THIS REGISTER CONTAINS ONE BIT FOR EACH LINE. THE BITS ARE INDIVIDUALLY SET USING BIS INSTRUCTIONS. SETT TRANSMISSION ON THE ASSOCIATED LINE. THE BIT IS CLEARED BY THE HARDWARE WHEN THE LAST CHARACTER TO BE TR IS LOADED INTO THE TRANSMITTER DATA HOLDING REGISTER OF THE UART FOR THIAT LINE. IT SHOULD BE NOTED THAT THE CLEARING OF A BAR DOES INDICATE THAT A MESSAGE MAY BE SENT, IT DOES NOT INDICATE THAT THE LAST CHARA FROM THE PRECEDING MESSAGE HAVE BEEN COMPLETELY SENT. SPECIFICALLY, TWO MORE CHARACTERS WILL BE SENT AFT BIT CLEARS. THESE ARE THE LAST TWO CHARACTERS OF THE MESSAGE; ONE OF THEM WAS JUST STARTING WHEN THE BAR AND ONE WAS THAT FINAL CHARACTER THAT WAS LOADED INTO THE HOLDING REGISTER, THUS CLEARING THE BAR BIT. T IS A NORMAL CONSEQUENCE GF DOUBLE-BUFFERED TRANSMISSION AND IS MENTIONED HERE FOR THE SENEFIT OF PROGRAM WANT TO WRITE PROGRAMS THAT CONTROL SUCH MODEM LEADS ARE REQUEST TO SEND. REQUEST TO SEND (RTS) SKOULD N DROPPED UNTIL AT LEAST TWO CHARACTER TIMES AFTER THE BAR BIT FOR A GIVEN LINE CLEARS. THIS TIMING MAY BE EFFECTED BY SENDING TWO EXTRA (NULL) CHARACTERS IN A MESSAGE AND DROPPING RTS WHEN BA CLEARING A BAR BIT SHOULD NOT BE USED TO ABORT TRANSMISSION ON A LINE. RATHER, THE BYTE COUNT FOR THAT L TO ZERO. 5.2.7 THE BUFFER ACTIVE REGISTER BITS ARE READ/WRITE. BREAK CONTROL REGISTER ADDRESS X14 THIS REGISTER CONTAINS ONE BIT FOR EACH LINE. SETTING A BIT IN THIS REGISTER WILL IMMEDIATELY GENERATE A ON THE LINE CORRESPONDING TO THAT BIT NUMBER. CLEARING THE BIT WILL TERMINATE THE BREAK CONDITION. THE B MAY BE TIMED BY SENDING CHARACTERS DURING THE BREAK INTERVAL, SINCE THESE CHARACTERS WILL NEVER ACTUALLY FURTHER COMMENTS CONCERNING THE TRANSMISSION OF BREAK SIGNALS MAY BE FOUND IN THE BREAK SIGNALS SECTION. (ZDHM-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 5.2.8 10-MAR-78 08:05 PAGE 41 SEQ 0039 SEQ 0038 SILO STATUS REGISTER ADDRESS X16 THIS REGISTER IS ACTUALLY TWO BYTE~SIZED REGISTERS. BIT DESCRIPTION 00-05 SILO ALARM LEVEL THE BIT ASSIGNMENTS ARE: THE PROGRAM MAY LOAD AN INTEGRAL POWER OF 2 BETWEEN O AND 63 INTO THIS LOCATION (E.G., 0, 1, 2, WHEN THE NUMBER OF CHARACTERS STORED IN THE SILO EXCEEDS THAT NUMBER, AN INTERRUPT REQUEST (SYST REGISTER BIT 7) IS GENERATED, IF SYSTEM CONTROL REGISTER BIT 6 IS SET. THESE BITS ARE READ/WRITE 06-07 READ EXTENDED MEMORY THESE BITS ARE READ ONLY AND CONTAIN THE A16 AND A17 BITS OF SELECTION BITS OF THE SYSTEM CONTROL REGISTER ARE POINTING. 08-13 THE CURRENT LINE ADDRESS WHICH THE SILO FILL LEVEL THESE BITS ARE AN UP-DOWN COUNTER THAT INDICATES THE ACTUAL NUMBER OF CHARACTERS IN THE SILO. IT BE NCTED THAT THERE ARE SIX BITS, HENCE NUMBERS BETWEEN O AND 63 CAN BE REPRESENTED. A FULL SILO ENTRIES AND THE FILL LEVEL APPEARS AS 00000, BUT ONE MAY EASILY TELL THE DIFFERENCE BETWEEN AN E SILO (00000) AND A FULL SILO (00000) BY (NECKING THE STORAGE " JERFLOW BIT (BIT 14 OF SYSTEM CONT THESE BITS ARE READ ONLY. 10-MAR-78 (8:05 SEQ 0040 SEQ 0039 PAGE &2 MACY11 30A(1052) 5.3 DH11 FUNCTJONAL LOGIC PARTITIONING 09-MAR-78 15:32 THIS SECTION LISTS ALL OF THE PRINTS FOR ALL OF THE MODULES !N THE DH11 SUBSYSTEM. IT BRIEFLY SUMMARIZES THE FUNCTIONAL LOGIC DESCRIBED ON EACH PRINT. THIS INFORMATION MAY PROVE USEFUL FOR A MODULE OR CHIP REPLACEMENT GUIDE WHEN THE FUNCTTIONAL AREA OF LOGIC THAT IS FAULTY IS KNOWN TO BE INTERMITTENTLY FAILING. M7277 CURRENT ADDR REG MEMORY AND ADDR SELECT sttt tttRRRRRRRRARRRRARRRRRRORRRRRRORORRRORCORSEROTRY SH3: CONTROL STROBE MUX FOR THE ''LPR'" REGISTER TRANSMITTER DATA MUX WITH AUTO-ECHO CONTROL LOGIC SELECTION MSYN / SSYN TIMING CHAIN DH11 MASTER CLEAR LOGIC SHG: UNIBUS ADDRESS SELECTION LOGIC WITH JUMPERS TRANSMITTER SCAN COUNTER WITH XMITTER STATUS MULTIPLEXOR (BAR N + TBAMT N) SHS5: BYTE COUNT AND CURRENT ADORESS MEMORY WRITE TIMING LOGIC CURRENT ADDRESS MEMORY LOGL'C BITS<17:08> UNIBUS ADDRESS DRIVERS BITS <17:08> SH6: BYTE COUNT AND CURRENT ADDRESS MEMORY ADDRESS SELECT MULTIPLEXOR CURRENT ADDRESS MEMORY LOGIC FOR BITS <07:00> UNIBUS ADDRESS DRIVERS FOR BITS <07:00> TRANSMITTER EVEN/ODD BYTE M7279 Tttt DATA MULTIPLEXOR FIFO BUFFER RRERRERRRRRRY Y SKH1: INPUT DATA MULTIPLEXOR FOR SILO MEMORY SHZ: SILO MEMORY (HIPS (FOUR 64 SILO MEMORY READ/WRITE X & CHIPS) TIMING LOGIC “'SSR'' REGISTER BITS <«13:08> SILC ALARM LEVEL COMPARATOR (=Xl (ZDHA-D-0 . P11 CZDHMD CZDHM=-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 43 B 4 RECEIVED "DATA READY'' STATUS FLAG SEQ 0041 SEQ 0040 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 M7288 10-MAR-78 08:05 PAGE 44 SEQ 0042 SEQ 0041 LINE PARAMETER CONTROL (2222322232333 2322222222322222200 22 SH3: CLOCK TIMING SIGNAL BUFFERS : SHé TRANSMITTER CLOCK SELECTION MULTIPLEXORS SHS: RECEIVER CLOCK SELECTION MULTIPLEXORS LINES <03:00> AUTO ECHO AND HALF DUPLEX CONTROL LINES<03:00> LINES<03:00> SH6: TRANSMITTER CLOCK SELECTION MULTIPLEXORS SH7: RECEIVER CLOCK SELECTION MULTIPLEXORS LINES <07:04> AUTO ECHO AND HALF DUPLEX CONTROL LINES <C7:04> SH8: TRANSMITTER CLOCK SELECTION MULTIPLEXORS SH9: RECEIVER CLOCK SELECTION MULTIPLEXORS LIMES<07:04> LINES<11:08> LINES <11:08> AUTO ECHC AND HALF DUPLEX CONTROL LINES <11:08> SH10: TRANSMITTER CLOCK SELECTION MULTIPLEXORS LINES<15:12> SH11: RECEIVER CLOCK SELECTION MULTIPLEXORS LINES <15:12> AUTO ECHO AND HALF DUPLEX CONTROL LINES <15:12> MULTIPLE UART CARD FOR LINES <0-7> M7280 M L2222 2222202222222 2 302 R0 R R 0202222800000 )] SH2: UART CHIPS BIT<1:0> RECEIVER SCAN MULTIPLEXORS (CLR R DONE, STB RD, MASTER DA, AND MASTER OR) SH3: UART CHIPS BIT<3:2> SHé4: UART CHIPS BIT<5:&> RECEIVER SCAN MULTIPLEEXORS (MASTER FE AND MASTER PE) SHS5: UART CHIPS BIT<7:6> TRANSMITTER SCAN MULTIPLEXOR =12 VOLT DC REGULATOR CZDHM-D-0 CZDKMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 m7280 #2 1222222222222 SH2: 222 08:05 SEQ 0043 SEQ C042 PAGE 45 ' MULTIPLE UART CARD FOR LINES <8-15> 0222222220030 0RRRRRRRRRttRRttitdld] BIT<9:8> UART CHIPS RECEIVER SCAN MULTIPLEXORS SH3: UART CHIPS BIT<11:10> SH&: UART CHIPS BIT<13:12> (CLR R DONE, RECEIVER SCAN MULTIPLEEXORS SH5: STB RD, MASTER DA, AND MASTER OR) (MASTER FE AND MASTER PE) BIT<15:14> UART CHIPS TRANSMITTER SCAN MULTIPLEXOR =12 VOLT DC REGULATOR M7289 SYSTEM CONTROL AND RCVR SCAN 3222222222222 2322222 2322200002000 1 1] SH3: TRANSMITTER AND. RECEIVER SCAN LOGIC SHé: TRANSMITTER AND RECEIVER SCAN TIMING SH5: HALF=DUPLEX CONTROL LOGIC UART DATA MULTIPLEXORS SHé6: SYSTEM CONTROL REGISTER M4540 DC11 - DH11 CLOCK 2222202020220 202 33022201 SH1: CRYSTAL OSCILLATOR AND FREQUENCY DIVIDERS M796 UNIBUS MASTER CONTROL A8 0222202R200200 SH1: 22222322223} NPR CONTROL LOGIC M7281 M LAAA SRR RS INTERRUPT CONTROL RRRttt R iR 0200 2R “A'" SECTION: RECEIVER INTERRUPT CONTROL LOGIC "B'" SECTION: TRANSMITTER INTERRUPT CONTROL LOGIC M7281 #2 NPR CONTROL LA 0RRRRRRRRE "A'"" SECTION: USED TO GAIN CONTROL OF THE BUS FOR NPR XFERS "B’ SECTION: (NCT USED) ] (ZDHM=-D-0 CZDHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 M7278 08:05 SEQ 0044 SEQ 0043 PAGE 46 REGISTER AND BYTE CORTROL 1322323232332 23022322222322222220200 23] SH3: CLEAR "BAR"* REG MULTIPLEXOR BYTE COUNT MEMORY AND CONTROL - BITS<15:08> UNIBUS RECEIVERS SH4: BIT<15:08> BYTE COUNT MEMORY AND CONTROL LOGIC UNIBUS DATA RECEIVERS SH5 - SH8: SHS: SH6: BIT<07:00> BIT<07:00> “BAR"', 'BCR', "LPR'', AND ''SSR'' REGISTERS PLUS THE DATA OUTPUT MUX AND UNIBUS DRIVERS FOR DATA LINES. BIT<15:12> BIT<11:08> SH7: SH8: BIT<07:04> BIT<03:00> CZDHM-D-0 CZDHKD.P11 MACY11 30A(1052) 09-MAR-78 15:32 5.4 10-MAR-78 08:05 PAGE 47 b SEQ 0045 SEQ 0044 DH11 MODULE ALLOCATION CHART VIEW FROM WIRING SIDE ] I 1 1 i 1 1 2 1 3 i i M920 ! M7821 ! M7277 ' R e ! ! i | B i ! | T MASTER : M7247 | ] ------ ] ! UNIBUS CONNECTOR (NOTE #3) ] | [P i s ——— 1 ' TR ' | UNIBUS ! ! G : ' ! ------ TRRRE— pa——— : C M7247 ! ...................... ] 4 1 5 M7287 ' A ! NPR ! REG 8 | CNTL ! BYTE CNT ! e ; ! T— ' M796 ! ROW A ' | R SLOT ] i 1 7 1 8 i 9 ' mM7821 ' M7360 ' M7288 ' M920 TR A N T ! LINE ! PARAMETER | ! CNTL ' ; p——— M9 ! ' UNIBUS ' CONNECTOR ! (NOTES #1) P8 #2) ! ! ! ! ! | ! ! ! ! ] i ! ! i ! | "ADDRS 1 ! ! ! i ! ] | Pepep s PRIORITY SELECTOR (NOTE #9) T e— § v ' : M7280 ! : ; i FRSIIRRU, P——— B i i i diram A e e 1. @b ! i ! s | MULTIPLE i UART | LINES T | | ! ...... i i i ) ) i i ] ] ] I ! ! . m— o | | ! ! | E M105 | i ADDRESS SELECTOR | (NOTE #7) M7246 o i e e io i 6 ! ] | P ! om7821 | S ppp————— I F s E ' s 1 1 ] ] 848 ! f ! 9 1 s i ! ] i i Bi i i 1 i ' INTR CNTL ! ! ! i ] P ! ! ! (NOTE #7) 1 s ! i ! | ) ! ! i ! ! i ! i ! ! i : JR——— 4 ! i ! ; i 1 ' ' ! ! ! ! ' | ! ] 1 ] ! ] i ] i i FIFO BUFFER P ' i i AR ! i ! R pp—p— i § : ! ! ] — M7279 | i ] ! ' i ] : ; TR L | ! e | ! ! ! ! ! ! ) ] ! z ------ ememeemenanl MULTIPLE UART LINES s ] ! ! (NOTES #4)! e s sg e § ¥ CONTROL SCAN | b N i i e TR PR i ! ! ; : ------ ! : ! | ' ! e ! ] i (NOTES #6 8 #9) ! CONTROL | MUX LINES ey o | (NOTE #8) ] ! | | M7280 I CABLE | B CLOCK | (NOTE #5) ! | B | ] o it ss S P I T — Tt : | EXTERNAL | DATA CABLE ' 1 R ] i S T CABLE ! | ) i (NOTE #7) N SYSTEM ! INTR CNTL (NTL 8 ! RCV SCAN ! ] TR ' M405 i i | ] 6 i i 1 O ARi CONTROL MUX LINES ] i ! ! ! i ! ! | i i ! CURRENT ADDRS 8 M7289 1 ' i i ' - : ! M405 e ............ | i | ! EXTERNAL A CLOCK (NOTE #5) | T ] ! ............ e ! e i i ! : | L M4S40 i PR —— ' DH11 DC1N E i CLOCK (ZDHM-D-0 CZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 48 SEQ 0046 SEQ 0045 FIGURE 2-4 1. 2. DH11 MODULE UTILIZATION DIAGRAM PAGE 2 I1F END OF BUS, REPLACE M920 WITH M930. IF LAST UNIT IN BASIC BOX, REPLACE M920 WITH BC11A CABLE WHEN EXPANDING TO PERIPHERAL BOX. 3. IF FIRST UNIT IN EXPANDER BOX, REPLACE M920 WITH BC11A CABLE. 4. EOQ02 MUST BE G727 GRANT CONTINUITY IS NOT INSTALLED. WITH DH11-AA OR AC. 5. 6. + DENOTES IF MODEM CONTROL MODULE MODEM CONTROL OPTION, SET MODULE SLOTS PROVIDE FOR ADDITIONAL CLOCK RATES. FOR DIAGNOSTIC CHECKOUT OF DH11-AA, AB, OR AC, REPLACES WITH M974. M971 7. THIS SLOT CONTAINS MODEM CONTROL MODULE M7807 WITH DH11-AD. 8. THIS SLOT CONTAINS MODEM CONTROL MODULE M7808 WITH DH11-AD. 9. THIS SLOT CONTAINS EIA CONVERTER AND FOR DH11-AD OR AE. PRIORITY MODULE M5906 CZOHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 6.0 10-MAR-78 08:05 PAGE 49 SEQ 0047 SEQ 0046 MAINTENANCE PROCEDURES 6.1 THIS SECTION DESCRIBES HOW TO USE CZDHM AS .A TROUBLESHOOTING TOOL. IT OUTLINES SOME PRELIMINARY CHECKS TO MAKE BEFORE STARTING DETAILED DEBUG PROCEDURES. IT ATTEMPTS TO PROVIDE THE USER WITH SUGGESTIONS FOR PROCEEDING FROM THE ERROR PRINTOUT TO DETAILED ISOLATION OF THE FAULT. 6.2 PRELIMINARY CHECKS A. VISUAL INSPECTION PERFORM A VISUAL INSPECTION OF TO INSURE THAT: THE DH11 SUBSYSTEM 1) ALL MODULES ARE INSTALLED IN THEIR PROPER SLOTS (REFER TO PARA 5.3) AND ARE PROPERLY SEATED. 2) THE CABLING IS CORRECT AND ALL CABLE CONNECTORS ARE FIRMLY SEATED. 3) B. THE REQUIRED MAINTENANCE CONNECTORS ARE PROPERLY INSTALLED. (REFER TO SECTION 6.3) POWER CHECKS USE A SCOPE TO CHECK THE FOLLOWING POWER SUPPLY AND CONTROL SIGNALS ON THE DH11 BACKPLANE: +15 vDC =15 vbC +5 VDC GRAY WIRE BLUE WIRE RED WIRE AC LO DC LO YELLOW WIRE PURPLE WIRE NOTES: USE THE BLACK WIRE FOR GROUND REFERENCE "AC LO'' AND ‘'DC LO'' SHOULD BOTH BE "'HIGH' "'LOW'* GOING GLITCHES ON THESE LINES CAN CAUSE UNUSUAL AND SUBTLE SYMPTOMS. 6.3 MAINTENANCE CONNECTORS MOST OF THE TESTS IN MD-DZDHM USE HARDWARE DIAGNOSTIC AIDS TO TURN THE DATA AROUND. THESE AIDS REQUIRE THAT THE USER INSTALL SPECIFIC TURNAROUND CONNECTORS OR MODULES BEFORE RUNNING THE PROGRAM. DEPEND- ENT UPON THE SPECIFIC DH11 CONFIGURATION AND THE TYPE OF TESTING DESIRED, CERTAIN MAINTENANCE AIDS MUST BE INSTALLED AS OUTLINED BELOW: (ZDHM-D-0 CZCHMD.P11 MACY'1 30A(1052) 10-MAR-78 09-MAR-78 15:32 A. 08:05 SEQ 0048 SEQ 0047 PAGE 50 DH11-AA, AB, OR AC CONFIGURATIONS 1) TESTING LOGIC FOR ALL LINES WITHOUT DATA CABLES OR LEVEL CONVERTERS. A. REMOVE THE DATA CABLE FROM SLOT B7 IN EACH B. 2) DH11 TO BE TESTED. INSTALL AN M974 MAINT JUMPER MODULE SLOT B7 OF EACH DH11 TO BE TESTED. INTO TESTING ALL 16. LINES INCLUDING DATA CABLES WHICH CONNECT TO DISTRIBUTION PANEL. DOES NOT TES; LEVEL CONVERTER CIRCUITS LOCATED IN DISTRIBUTION PANEL . A. 3) TESTING ONE OR MORE SINGLE LINES INCLUDING EIA LEVEL CONVERTERS AND DEVICE CABLES WHICH ARE NOT TESTED IN 1 AND 2 ABOVE. A. B. INSTALL THE M974 MAINT JUMPER MODULE INTO SLOT B3 OF THE MULTIPLEXOR DISTRIBUTION PANEL FOR EACH DH11 TO BE TESTED. ALL LEVEL CONVERTERS IN THE DISTRIBUTION PANEL MUST BE REMOVED FOR THIS TEST. INSTALL AN H315 TEST CONNECTOR AT THE END OF DEVICE CABLE FOR EACH LINE TO BE TESTED. THE DH11-AD CONFIGURATION 1. TESTING ALL 16. LINES WITHOUT DATA CABLES A. DISCONNECT THE DATA CABLES (2) FROM THE TwO CONNECTORS ON THE M5906 MODULE (SLOT AB7 OF THE DH11 BACKPLANE. 2. B. INSTALL TWO H8611 TEST CONNECTORS ON THE M5906 C. IF MODEM CONTROL SECTION IS TO BE TESTED, DISCONNECT 4 BCOBR CABLES FROM DISTRIBUTION PANEL AND CONNECT CABLES TO H861 TURNAROUND CONNECTOR. IN PLACE OF THE CABLES. TESTING ONE OR MORE SINGLE LINES INCLUDING DATA CABLES A. DISCONNECT THE DEVICE CABLE FROM THE DH11-AD DISTRIBUTION PANEL FOR EACH LINE TO BE TESTED. B. INSTALL AN H315 TEST CONNECTOR IN ITS PLACE ON THE DH11-AD DISTRIBUTION PANEL. NOTE: TO TEST THE DEVICE CABLE AS WELL, INSTALL THE H315 TEST CONNECTOR AT THE END OF THE (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 51 DEVICE CABLE AND LEAVE THE DEVICE CABLE CONNECTED TO THE DISTRIBUTICN PANEL. SEQ 0049 SEQ 0048 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 6.4 10-MAR-78 08:05 COMPLETE DH1i SUBSYSTEM PAGE 52 SEQ 0050 SEQ 0049 CHECKOUT COMPLETE DH11 SUB-SYSTEM VERIFICATION INVOLVES RUNNING THE FOLLOWING PROGRAMS IN THE SEQUENCE SUGGESTED: A. CZDHM DH11 DIAGNOSTIC LOAD AND RUN THE BASIC DIAGNOSTIC CONFIGURED TO TEST ALL 16. LINES ON ALL DH11'S INSTALLED IN THE SYSTEM AND ALLOW IT TO COMPLETE AT LEAST TWO COMPLETE PASSES. (THE FIRST PASS IS A QUICK VERIFY WITHOUT SUB-TEST ITERATIONS AND THE SECOND PASS INCLUDES SUB-TEST ITERATIONS). IF ANY ERRORS ARE gssgggigésSTOP HERE, AND REFER TO PARA 6.5 FOR SUBSEQUENT u . B. CZDHN DATA RELIABILITY TEST LOAD AND RUN THE DATA RELIABILITY SUB-PROGRAM OF CZDHN CONFIGURED TO TEST ALL 16. LINES ON ALL DH11'S INSTALLED IN THE SYSTEM AND ALLOW IT TO COMPLETE AT LEAST ONE PASS WITH SRO7=0 (QUICK TEST MODE). IN THIS MODE ONE PASS TAKES APPROXIMATELY 5 MINUTES. IF ANY ERRORS ARE REPORTED, REFER TO THE DOCUMENTATION FOR CZDHN FOR SUBSEQUENT PROCEDURES. FOR MORE COMPLETE DATA RELIABILITY TESTING ,THE PROGRAM MAY BE RUN WITH SRO7=1 (COMPLETE TEST) BUT THIS WILL REQUIRE A RUN TIME OF APPROX 15. MINUTES FOR EACH :EtngsanglNE. C. SO IN MOST CASES IT SYSTEMS EXERCISER IS ONLY USED FOR OVER- “DHAX"* EXERCISER MODULE WHERE '‘X** DESIGNATES THE REVISION LEVEL IN USE. ASSUMING THAT BOTH THE DIAGNOSTIC AND THE DATA RELIABILITY INDICATE ERROR FREE PERFORMANCE, THE FINAL STEP IS TO RUN THE SYSTEM'S EXERCISER PROGRAM THAT INCLUDES A DH11 EXERCISER MODULE. THIS IS NECESSARY TO DETECT CERTAIN CLASSES OF BUS PROBLEMS THAT ONLY MANIFEST THEMSELVES WHEN }:E g”;}EAS RUN CONCURRENTLY WITH ALL THE OTHER DEVICES IN Y IF ALL TESTS UP TO THIS POINT INDICATE ERROR FREE PERFORMANCE OF THE DH11, THE SUB-SYSTEM SHOULD BE CAPABLE OF RUNNING SYSTEM SOFTWARE. THERE ARE, HOWEVER, CERTAIN SUBTLE OR INTERMITTENT PROBLEMS THAT COULD STILL CAUSE THE DH11 SUB-SYSTEM TO FAIL IN THE OPERATING SYSTEM ENVIRONMENT. IN THESE RARE CASES, THE USER WILL HAVE TO USE THE SYMPTOMS GATHERED FROM THE FAILING MODE TO ISOLATE THE PROBLEM. ONCE A SYMPTOM IS RECOGNIZED, THE TWO OTHER PROGRAMS IN CZDHN, THE ECHO TEST AND THE DATA PATTERNS/CABLE TESTS MAY CZ0HM-D-0 CZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 ' SEQ 0051 SEQ 0050 PAGE 53 PROVE USEFUL AS A TROUBLESHOOTING AID TO DUPLICATE PROBLEM FOR FAULT JSOLATION. THE CZDHA-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 6.5 10-MAR-78 08:05 PAGE 54 MAINTENANCE HEADER DESCRIPTION EACH TEST IN THE LISTING IS PREFACED BY A STANDARD MAINTENANCE HEADER TO PROVIDE INFORMATION THAT WILL FACILITATE RAPID ISCLATION OF THE FAULT THAT CAUSED A PARTICULAR TEST TO FAI%a Essg HEADER HAS THE SAME FORMAT (SEE EXAMPLE BELOW) AS FOLLOWS: TEST ABSTRACT: THIS IS A CAPSULE SUMMARY OF WHAT THE TEST IS DESIGNED TO TEST AND HOW IT OPERATES. ERRORS : LISTS THE PARTICULAR ERROR CALLS INVOKED BY THE TEST WHEN A FAULT IS DETECTED. (REFER 70 PARA 3.1.2 AND 3.1.3 FOR A DETAILED DESCRIPTION OF THE ERROR CALL INFORMATION) SYNC: LISTS ONE OR MORE SIGNALS THAT MAY BE USED TO SYNCHRONIZE THE OSCILLOSCOPE WHEN AN ERROR LOOP IS ESTABLISHED (SR09=1). FOR (M) SIGNALS USE (=) SLOPE TO TRIGGER ON THE TRAILING EDGE OF THE SIGNAL AND FOR (L) SIGNALS USE (+) SLOPE TO T<IGGER ON THE TRAILING EDGE. DEBUG: CONTAINS SUGGESTIONS OF THINGS TO CHECK AND WHERE POSSIBLE THE MOST PROBABLE MODULE IS GIVEN. KEY LOGIC: CONTAINS A LIST OF LOGIC SIGNALS AND/OR LOGIC COMPONENTS WITH MODULE NAMES AND PRINT NUMBERS TO RELATE THE TEST ROUTINE FUNCTION TO THE FUNCTIONAL AREAS OF LOGIC WITHIN THE PRINTS. WHERE POSSIBLE SIGNAL PIN NOS. ARE LISTED. SEQ 0052 SEQ 0051 (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 55 SEQ 0053 SEQ 0052 MAINTENANCE HEADER FOR TEST 1 EXAMPLE : tetEAREY TEST ABSTRACT: (RS2 R0 d ] THIS TEST ATTEMPTS TO REFERENCE EACH OF THE EIGHT REGISTERS IN THE DH11 SELECTED FOR TEST USING ITS ASSIGNED UNIBUS ADDRESS. IF ANY ADDRESS FAILS TO RESPOND A BUS ERROR TRAP VECTORS THE TEST TO THE ERROR SET-UP AND CALL ROUTINE. AFTER THE ERROR IS TYPED THE TEST WILL TEST THE NEXT DH11 ADDRESS IN SEQUENCE UNTIL ALL EIGHT ARE TESTED. : ERRORS (AR RS2 1.) ERROR 1 REPORTS THAT THE REGISTER WHOSE ADDRESS IS IN R2 FAILED TO RESPOND WITH "'SSYN'' WHEN REFERENCED. (NONE) SYNC: et n DEBUG: LA2222 1.) PROBLEM IS MOST LIKELY THE M7277 MODULE. 2.) IF ALL EIGHT REGISTERS FAIL TO RESPOND, MAKE SURE THAT YOU CONFIGURED THE PROGRAM PROPERLY BEFORE STARTING. IF YOU DID, CHECK THE SETTINGS 3.) KEY OF THE ADDRESS SELECT JUMPERS ON THE M7277 MODULE. IF ONE OR MORE RESPONDED PROPERLY, SET UP AN ERROR SCOPE (DOP AND BACKTRACK THROUGH THE LOGIC STARTING WITH THE KEY LOGIC SIGNALS LISTED BELOW. LOGIC: (AEARRRE 22 M7277 SH3 SH&4 SSYN H DEVICE RESPONDING L DEVICE SELECTED H (E2 E72-6 E09-11 CZDHA-D~0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0054 SEQ 0053 PAGE 56 ME,SEQ.BIN .LIST $SWR=165400 .ENABLE ABS 195400 .TITLE . CZDHM-D-0 3 ;*COPYRIGHT (C) 1976,1978 ;*DIGITAL EQUIPMENT CORP. ;*MAYNARD, MASS. 01754 * ;*PROGRAN BY ED CROWLEY * :*THIS PROGRAN WAS ASSEMBLED USING THE PDP-11 MAINDEC SYSMAC ;*PACKAGE (MAINDEC-11-DZQAC-C3), JAN 19, 1977. b 000001 $TN=1 .SBTTL OPERATIONAL SYITCH SETTINGS ;t eeseseses ;. 15 :? s A s 13 1" 9 8 d d ed ed e .SBTTL b 000200 000204 000210 000137 000137 000137 eceoeoesecsssssscesseeses HALT ON ERROR LOOP ON TEST 14 TRAP CATCHER INHIBIT ERROR TYPEOUTS INHIBIT 'TERATIONS LOOP ON ERROR LOOP ON TEST IN SWR<7:0> ;*ALL UNUSED LOCATIONS FROM & - 776 CONTAIN A "'.+2 HALT" ;*SEQUENCE TO CATCH ILLEGAL TRAPS AND INTERRUPTS :'LOCATION19‘C0NTAINS 0 TO CATCH IMPROPERLY LOADED VECTORS b = PON) 000174 000000 000000 0209090909 9 2 .=0 000000 000174 000176 USE SWITCH | " SOV NO VNN - oo NN N oo NNNDNN i 026162 002156 026146 DISPREG: .WORD 0 SWREG: .WORD 0 .SBTTL STARTING ADDRESS(ES) JMP JMP JMP .SBTTL @# INPARX SFBEGIN S# INPARC ;:SOFTWARE DISPLAY REGISTER :;SOFTWARE SWITCH REGISTER ::JUNP TO STARTING ADDRESS OF PROGRAM ;BEGIN EXECUTION WITH DEFAULT PARAMETERS ; INPUT PARAMETERS - DEVICE SELECTION ONLY ACT11 HOOKS kAR RARERREARAROREREAORTERARERRRRRROACRARRRAOAARAAREERACRARRAARRETY 000046 000052 N00214 000046 020750 000052 120000 000214 ;HOOKS REQUIRED BY ACTT .SBTTL $SVPC=. :SAVE PC iEgng WORD 120000 ::1)SET LOC.46 TO ADDRESS OF SENDAD IN .SEOP ::2)SET LOC.52 TO 120000 T=$SVPC APT PARAMETER BLOCK *:"RESTORE PC ;;"t"'ii"ttt"t'i'tit'tit"ii"""Qtt"'l'tttt"t"titttt"tt sSET LOCATIONS 24 AND 44 AS REQUIRED FOR APT ;;Qt0""'t't'tf.tttt"'tt""ttt't"'i‘t't'tt'ttt'.t"til't't'tt 000024 000214 000024 000200 $X=, .=24 200 ::SAVE CURRENT LOCATIOM ::SET POWER FAIL TO POINT TO START GF PROGRAM ::FOR APT START UP CZDHM-D-0 CZDMMD.P11 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 ¢264 2265 2266 2267 2268 2269 2270 22N 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 000044 MACY11 30A(1052) 09-MAR-78 15:32 000044 000214 000214 10-MAR-78 (8:05 PAGE 57 SEQ 0055 APT PARAMETER BLOCK =44 SEQ 0054 ::POINT TO APT INDIRECT ADDRESS PNTR. SAPTHDR ;;POINT TO APT HEADER BLOCK R .=.8X ;;RESET LOCATION COUNTER R R R R R R R R RN RPN R AR RN R AR AR R PR AR ;SETUP APT PARAMETER BLOCK AS DEFINED IN THE APT-PDP11 DIAGNOSTIC s INTERFACE SPEC. 000214 000214 000216 000220 000222 000224 000226 000000 001232 000036 000170 000170 000052 001100 000011 000012 SAPTHD: SHIBTS: SMBADR: $TSTM: SPASTM: SUNITM: .WORD .WORD .WORD .WORD .WORD .WORD 0 ;;TWO HIGH BITS OF 18 BIT MAILBOX ADDR. SMAIL ;;ADDRESS OF APT MAILBOX (BITS 0-15) 30. ;:RUN TIM OF LONGEST TEST 120. ;:RUN TIME IN SECS. OF 1ST PASS ON 1 UNIT (QUICK VERIFY) 120. ;:ADDITIONAL RUN TIME (SECS) OF A PASS FOR EACH ADDITIONAL UNIT SETEND-SMAIL/2 ;;LENGTH MAILBOX-ETABLE (WORDS) .SBTTL BASIC DEFINITIONS ;*INITIAL ADDRESS OF THE STACK POINTER ##+ 1100 ##« STACK= .EQUIV .EQUiv 1100 EMT,ERROR 10T,SCOPE ;:BASIC DEFINITION OF ERROR CALL s:BASIC DEFINITION OF SCOPE CALL s*MISCELLANEOUS DEFINITIONS HT= 1 ::CODE FOR HORIZONTAL TAB LF= CR= CRLF= PS= 12 15 200 177776 ::CODE FOR LINE FEED ;:CODE FOR CARRIAGE RETURN ::CODE FOR CARRIAGE RETURN-LINE FEED ; ;PROCESSOR STATUS WORD 177774 STKLMT= PIRQ= DSWR= DDISP= 177774 177772 177570 177570 ;:STACK LIMIT REGISTER : ;PROGRAM INTERRUPT REQUEST REGISTER : sHARDWARE SWITCH REGISTER : s HARDWARE DISPLAY REGISTER 000000 000001 000002 000003 000004 000005 000006 000007 000006 000007 RO= 000015 000200 177776 177772 177570 177570 000000 000040 000100 000140 000200 000240 000300 000340 .EQUIV PS,PSW ; *GENERAL PURPOSE REGISTER DEFINITIONS 10 ; sGENERAL REGISTER R1= R2= 11 %2 : ;GENERAL REGISTER ; sGENERAL REGISTER Ré4= 24 : ;GENERAL REGISTER R3= R5= R6= R7= SP= PC= 13 15 4] 27 26 37 ;*PRIORITY LEVEL PRO= 0 PR1= 40 PR2= 100 PR3= 140 PR&4= 200 PRS= 240 PR6= 300 PR7= 340 : sGENERAL REGISTER ; ;GENERAL REGISTER : ;GENERAL REGISTER : ;GENERAL REGISTER ;s STACK POINTER : ;PROGRAM COUNTER DEFINITIONS ;:PRIORITY LEVEL 0 ;;PRIORITY LEVEL 1 ;sPRIORITY LEVEL 2 :sPRIORITY LEVEL 3 ;;PRIORITY LEVEL 4 ;sPRIORITY LEVEL 5 ;sPRIORITY LEVEL 6 ;sPRIORITY LEVEL 7 MACY11 30A(1052) 09-MAR-78 15:32 2303 100000 040000 020000 010000 004000 002000 001000 000400 000200 000100 0C0040 000020 000010 000004 000002 000001 100000 040000 020000 010000 004000 002000 001000 000400 000200 000100 000040 000020 000010 000004 000002 000001 10-MAR-78 08:05 PAGE 58 BASIC DEFINITIONS s*"'SWITCH REGISTER' SWITCH DEFINITIONS SW15= SW14= SW13= SW12= SW1l= SW10= SW09= SW08= SWo7= SW0é= SW05= SW04= SW03= Sw02= SWo1= SW00= .EQulV .EQUIV .EQUlV .EQUIV .EQUIV .EQUIV .EQulvV .EQUIV .EQUIV .EQUIV 100000 40000 20000 10000 4000 2000 1000 400 200 100 40 20 10 4 2 1 SW09,sw9 SW08,sw8 SW07,sw7 SW06, Swé SW05,SW5 SW04, SW4 SW03,Sw3 SW02, sw2 Swo1,sw1 Sw00,sw0 BIT DEFINITIONS (BITOO TO BIT15) 100000 40000 20000 10000 4000 2000 1000 400 200 100 40 20 10 -0 (ZDHM-D-0 CZDHMD.P11 BIT09,BITY BI1T08,BI78 81107,BI77 BIT06.BITé BITO5,BITS SEQ 0056 SEQ 0055 CZDHM-D~-0 CZDHMD.P11 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 23N 2372 MACY11 30A(1052) 09-MAR-78 15:32 000004 000010 000014 000014 000014 000020 000024 000030 000034 000060 000064 000240 10-MAR-78 08:05 PAGE 59 BASIC DEFINITIONS SEQ 0057 SEQ 0056 ;*BASIC "'CPU"" TRAP VECTOR ADDRESSES ERRVEC= 4 RESVEC= 10 TBITVEC=14 TRTVEC= 14 BPTVEC= 14 ;:TIME OUT AND OTHER ERRORS ;;RESERVED AND ILLEGAL INSTRUCTIONS s g | ;:TRACE TRAP : :BREAKPOINT TRAP (BPT) PWRVEC= 24 ;;POWER FAIL IOTVEC= 20 EMTVEC= 30 TRAPVEC=34 TKVEC= 60 TPVEC= 64 PIRQVEC=240 ;s INPUT/OUTPUT TRAP (IOT) #*SCOPE++ :;EMULATOR TRAP (EMT) #+ERRCGRw« ;:"'TRAP'' TRAP ::TTY KEYBOARD VECTOR ;:TTY PRINTER VECTOR ; ;PROGRAM INTERRUPT REQUEST VECTOR (ZDHM-D-0 CZDHMD.P11 2425 2426 2427 2428 SEQ 0058 SEQ 0057 10-MAR-78 08:05 PAGE 60 COMMON TA GS .SBTTL COMMON TAGS ;.'t""t"""'iti't'tii't'i"t"'ti'i"'t'.ttt".tttt't't"'tt't ;*THIS TABLE CONTAINS VARIOUS ;*USED IN THE PROGRAM. 001160 001162 001164 001166 001170 001172 001174 001176 001200 001202 001204 001206 001210 001212 001214 001216 001220 001222 000 002 012 000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 .WORD .WORD .WORD .WORD .WORD .WORD .WORD SAUTOB: .BYTE $INTAG: .BYTE .WORD SWR: .WORD DISPLAY: .WORD $TKS: $TKB: STPS: $STPB: SNULL: SFILLS: SFILLC: $TPFLG: SREGAD: SREGO: SREG1: 177560 177562 177564 177566 .BYTE .BYTE .BYTE .BYTE .WORD SREG4: SREG5: SREG6: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD $TMP4: .WORD SREG2: SREG3: $REG7: $TMPO: $TMP1: $TMP2: $TMP3: .WORD $TMP5: .WORD $TMP6: .WORD $TMP7: .WORD $TIMES: 0 ;sCONTAINS ;sCONTAINS ;;CONTAINS ;:CONTAINS ;;CONTAINS :sCONTAINS THE TEST NUMBER ERROR FLAG SUBTEST ITERATION COUNT SCOPE LOOP ADDRESS SCOPE RETURN FOR ERRORS TOTAL ERRORS DETECTED ;s CONTAINS ITEM CONTROL BYTE s ;CONTAINS MAX. ERRORS PER TEST ;s CONTAINS PC OF LAST ERROR INSTRUCTION :sCONTAINS ADDRESS OF °'GOOD' DATA :;CONTAINS ADDRESS OF °"BAD" DATA :;CONTAINS 'GOOD" DATA s ;CONTAINS 'BAD' DATA : ;RESERVED~-~-NOT TO BE USED ;:AUTOMATIC MODE INDICATOR ; : INTERRUPT MODE INDICATOR - $GDADR: $BDADR: $GDDAT: $BDDAT: COMMON STORAGE LOCATIONS ;;START OF COMMON TAGS < 177570 177570 177560 177562 177564 177566 SERRPC: .WORD _.BYTE .BYTE _.WORD .WORD .WORD .WORD .BYTE .BYTE <o [«lelelelelelelelelebolelelelelelelele) w 000000 000000 000000 000000 000 000 000000 $STSTNM: SERFLG: S$ICNT: SLPADR: SLPERR: SERTTL: SITEMB: SERMAX: DDISP n 000000 000 000 000000 000000 000000 000000 000 007 000000 000000 000000 $CMTAG: .=1100 OO—=NO 001100 001100 001102 001103 001100 OO0 O0CO0COO0COOCOOOOOOOO 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 MACY11 30A(1052) 09-MAR-78 15:32 ;;ADDRESS OF SWITCH REGISTER ; ;ADDRESS OF DISPLAY REGISTER ;:TTY KBD STATUS ;:TTY KBD BUFFER ;:TTY PRINTER STATUS REG. :;TTY PRINTER BUFFER REG. ADDRESS ADDRESS ;:CONTAINS NULL CHARACTER FOR FILLS ;sCONTAINS # OF FILLER CHARACTERS REQUIRED ;s INSERT FILL CHARS. AFTER A "'LINE FEED" ;:"'TERMINAL AVAILABLE'® FLAG (BIT<07>=0=YES) ;:CONTAINS THE ADDRESS FROM ;:WHICH (SREGO) WAS OBTAINED ;s CONTAINS ((SREGAD)+0) ;:CONTAINS ((SREGAD)+2) ::CONTAINS ((SREGAD)+4) ;:CONTAINS ((SREGAD)+6) :sCONTAINS ((SREGAD)+10) :;CONTAINS ((SREGAD)+12) ;:CONTAINS ((SREGAD)+14) ::CONTAINS ((SREGAD)+16) :;USER DEFINED :;USER DEFINED ;sUSER DEFINED s sUSER DEFINED ;sUSER DEFINED s sUSER DEFINED :sUSER DEFINED :sUSER DEFINED ::MAX. NUMBER OF ITERATIONS CZDHM-D~0 CZDHMD P11 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 015 000012 $ESCAPE:0 $QUES: .ASCII $CRLF: .ASCII SLF: LASCIZ SEQ 0059 SEQ 0058 ;:ESCAPE ON ERROR ADDRESS ;;QUESTION MARK ;:CARRIAGE RETURN ;:LINE FEED /?/ <15 12> :;ttttlti'tttt"'"itt'""ti'tt"""t""'ttt.t..ttt!t"tttti't .SBTTL APT MAILBOX-ETABLE ;;tttttttt't'ttt"tQttt't't't"tttttt'ttttttttttt'ttttt'tt'tttttt 000000 000000 000000 000000 000000 000000 000000 000000 .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD STESTN: $PASS: $DEVCT: SUNIT: $SMSGAD: $MSGLG: SETABLE: SENV: .BYTE SENVM: _.BYTE $SWREG: SUSWR: $CPUOP: ox .WORD .WORD .WORD AMSGTY AFATAL ATESTN APASS ADEVCT AUNIT AMSGAD AMSGLG AENV AENVM ASWREG AUSWR ACPUOP LR [ X 000 000 v 001262 001263 AMS1: TYP1: ;:APT MAILBOX ;;MESSAGE TYPE CODE ;:FATAL ERROR NUMBER ;;TEST NUMBER ;sPASS COUNT ;;DEVICE COUNT ::1/0 UNIT NUMBER ;;MESSAGE ADDRESS ;;MESSAGE LENGTH ;:APT ENVIRONMENT TABLE ; ;ENVIRONMENT BYTE ;:ENVIRONMENT MODE BITS ;;APT SWITCH REGISTER ssUSER SWITCHES ;;(CPU TYPE,OPTIONS BITS 15-11=CPU TYPE 11/704=01,11/05=02,11/20=03,11/40=04,11/45=05 11/70=06,PDQ=07,0=10 R 000 000 000000 000000 000000 .EVEN SMAIL: $MSGTY: SFATAL: »BE® * % % » 001232 001232 001234 001236 001240 001242 001244 001246 001250 001252 001252 001253 001254 001256 001260 .BYTE .RYTE AMAMS1 AMTYP1 BIT 10=REAL TIMNE CLOCK 9=FLOATING POINT PROCESSOR BIT BIT 8=MEMORY MANAGEMENT ;;HIGH ADDRESS.M.S. BYTE ;;MEM. TYPE.BLK#1 MEM.TYPE BYTE ~-(HIGH BYTE) 000000 $MADR1: .WORD AMADR1 001266 001267 001270 001272 000 000 000000 000 000 $SMAMS2: .BYTE AMAMNS2 ;:HIGH ADDRESS.M.S. BYTE AMADR2 AMAMS3 ;;MEM.LAST ADDRESS,BLK#2 ;:HIGH ADDRESS.M.S.BYTE ABASE ADEVM ::BASE ADDRESS OF EQUIPMENT UNDER TEST ;;DEVICE MAP 001273 001274 001276 001277 001300 001302 001304 001306 001310 001312 001314 001316 001320 001322 000000 000 000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 2 001264 900 NSEC CORE=001 300 NSEC BIPOLAR=002 500 NSEC MOS=003 ;:HIGH ADDRESS.BLK#1 Ss 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 000000 077 > % 2449 001224 001226 001227 001230 10-MAR-78 08:05 PAGE 61 COMMON TAGS e 2629 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2642 2443 2444 2445 2446 2447 2448 MACY1? 30A(1052) 09-MAR-78 15:32 M SMTYP2: .BYTE AMTYP2 SMTYP3: SMADR3: $MAMS4: SMTYP4: SMADR4: SVECT1: SVECT2: .BYTE .WORD .BYTE .BYTE .WORD .WORD .WORD AMTYP3 AMADR3 AMAMSS AMTYPSL AMADRSG AVECT1 AVECT2 $MADR2: $SMAMS3: $BASE: SDEVM: $COW1: $CDW2: SODWO: $ODW1: $DDW2: .WORD .BYTE .WORD _.WORD .WORD .WORD .WORD .WORD .WORD ACDW1 ACDW2 ADDWO ADDW1 ADDWZ MEM.LAST ADDR.=3 BYTES,.THIS WORD AND LOW OF ‘'TYPE'' ABOVE ;:MEM.TYPE.BLK#2 ;:MEM.TYPE.,BLK#3 ;:MEM.LAST ADDRESS.BLKA3 ;;HIGH ADDRESS,M.S.BYTE ;;MEM.TYPE ,BLK#& ;;MEM.LAST ADDRESS,.BLK#4 ;;INTERRUPT VECTOR#1,BUS PRIORITY#1 ;;INTERRUPT VECTOR#2BUS PRIORITY#?2 :;CONTROLLER DESCRIPTION WORD#1 ;:CONTROLLER DESCRIPTICN WORD#? ;;DEVICE DESCRIPTOR WORD#0 ;:DEVICE DESCRIPTOR WORD#1 ;;DEVICE DESCRIPTOR WORD#2 - (ZDHM-D-0 CZDHMD.P11 24FS 2486 2487 2488 2489 2490 249 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 001324 001326 001330 001332 001334 001336 001340 001342 001344 001346 001350 001352 001354 001356 MACY11 30A(1052) 09-MAR-78 15:32 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 10-MAR-78 08:05 PAGE 62 SEQ 0060 SEQ 0059 APT MAILBOX-ETABLE $DDW3: $DDW4: $DDWS: $DDW6: $DDW7: $DDW8: $DDW9: $DDW10: $DDW11: $DDW12: $ODW13: $DDW14: $DDW15: SETEND: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD ADDW3 ADDW4 ADDWS ADDW6 ADDW7 ADDW8 ADDW9 ADDW10 ADDW11 ADDW12 ADDW13 ADDW14 ADDW15 ;sDEVICE s :DEVICE ;:DEVICE ;:DEVICE DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR s :DEVICE ;:DEVICE ;:DEVICE :sPEVICE ;:DEVICE ;:DEVICE ;:DEVICE ;:DEVICE ;:DEVICE DESCRIPTOR WORDA3 WORD#4 WORD#5 uoi’%kY WOR WORDAS WORD#9 WORD#10 WORD#11 WORD#12 WORD#13 WORD#14 WORD#15 CZDHM-D-0 CZDHMD.P11 MACY11 2553 2554 2555 2556 2557 10-MAR-78 08:05 PAGE 63 SEQ 0061 ERROR POINTER TABLE .SBTTL 2502 2503 2504 2505 2506 2507 2508 2509 2510 25N 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 25¢5 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 30A(1052) 09-MAR-78 15:32 SEQ 0060 ERROR POINTER TABLE ;*THIS TABLE CONTAINS THE INFORMATION FOR EACH ERROR THAT CAN OCCUR. ;*THE INFORMATION IS OBTAINED BY USING THE INDEX NUMBER FOUND IN ;*LOCATION SITEMB. THIS NUMBER INDICATES WHICH ITEM IN THE TABLE IS PERTINENT. ;*NOTE1: IF SITEMB IS O THE ONLY PERTINENT DATA IS (SERRPC). ;*NOTE2: EACH ITEM IN THE TABLE CONTAINS & POINTERS EXPLAINED AS FOLLOWS: g s L :® 001356 001356 001360 001362 001364 EM DH DT DF ::POINTS TO THE ERROR MESSAGE :;POINTS TO THE DATA HEADER ;:POINTS TO THE DATA ;;POINTS TO THE DATA FORMAT SERRTB: ;ERROR TABLE ITEM FOR ERROR MESSAGE 1 030360 030427 030506 000000 EM1 DH1 0Tl 0 ;"'DH11 REGISTER REFERENCE CAUSED TIMEOUT'' ;" (PC) (PS) (SP) TEST DEVADR REGADR ' ;SERRPC,$TMPO,SREG6,SREGO,SREG1,SREG2 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 2 001366 001370 001372 001374 030524 030562 030660 000000 EM2 DH2 DT2 0 ;"'SYSTEM CONTROL REGISTER ERROR'’ : (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM :SERRPC,$TMPO,SREG6, SREGO, SREGT ,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 3 001376 001400 001402 001404 030702 030562 030660 000000 EM3 DH2 D12 0 ;"DH11 MASTER CLEAR FAILED TO CLR SPECIFIED REG" ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ;SERRPC,$TMPO,SREGS, SREGO,SREGT,SREG2,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 4 001406 001410 001412 001414 030760 030562 030660 000000 EM4 DH2 D12 0 :"LINE PARAMETER REGISTER ERROR'' " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ; SERRPC,$TMPO,SREG6, SREGO, SREG1 SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 5 001416 001420 001422 001424 031016 030562 030660 000000 EMS5 DH2 pT2 0 :"'BREAK CONTROL REGISTER ERROR" ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' ;SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 6 001426 001430 001432 001434 031053 030562 030660 000000 EM6 DH2 D12 0 ;''SILO STATUS REGISTER ERROR'' ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM ;SERRPC,$TMPO,SREG6,SREGO,SREGT,SREG2,SREG3, SREG4 sPRINT ALL OCTAL (ZDHM-D-0 CZDHMD.P11 2558 2559 2560 2561 2562 2562 2564 2565 2566 2567 2568 2569 2570 257 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 25N 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 64 ERROR POINTER TABLE SEQ 0062 SEQ 0061 ;ERROR TABLE ITEM FOR ERROR MESSAGE 7 001436 001440 001442 001444 031106 030562 030660 000000 EM7 DH2 DT2 0 :"'CURRENT ADDRESS REGISTER ERROR - LINE #xx'' ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ;SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 10 001446 001450 001452 001454 031160 030562 030660 000000 EM10 DH2 DT2 0 ;"'BYTE COUNTER REGISTER ERROR - LINE #xXx'' ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B *' ;SERRPC,$TMPO,SREG6,SREGO, SREGT,SREG2, SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 11 001456 001460 001462 001464 031227 030562 030660 000000 EM11 DH2 DT2 0 ;"'UNEXPECTED DH11 RCVR INTERRUPT'' ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B '’ ;SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 12 001466 001470 001472 001474 031266 030562 030660 000000 EM12 DH2 D12 0 ;"'UNEXPECTED DH11 XMITTR INTERRUPT'' ;"' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ;SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 13 001476 001500 001502 001504 031327 030562 030660 000000 EM13 DH2 DT2 0 ;""CHAR AVAILABLE FAILED TO GENERATE RCVR INTERRUPT'' ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ;SERRPC ,$TMPO,SREG6, SREGO, SREG1 ,SREG2,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 14 001506 001510 001512 001514 031410 030562 030660 000000 EM14 DH2 DT2 0 ;""TRANSMITTER NPR LOGIC ERROR - LINE # '’ ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " sSERRPC,$TMPO,SREG6, SREGO,SREG1,SREG2, SREG3 ,SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 15 001516 001520 001522 001524 031457 030562 030660 000000 EM15 DH2 D12 0 ;'XMITTR FAILED TO INTERRUPT - LINE # " ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' :SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2 ,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 16 001526 001530 001532 001534 031525 030562 030660 000000 EM16 DH2 D12 0 ;"'RCVR FAILED TO INTERRUPT" ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' ;SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2,SREG3, SREG4 ;PRINT ALL OCTAL CZDHM-D-0 CZDHMD .P11 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 65 ERROR POINTER TABLE SEQ 0063 SEQ 0062 ;ERROR TABLE ITEM FOR ERROR MESSAGE 17 001536 001540 001542 001544 031556 031622 030660 000000 EM17 DHé ;"'TRANSMITTER TIMING ERROR - LINE # ;" (PC) (PS) (SP) TEST DEVADR " SPEED TIMEB ;SERRPC,$TMPO,SREGS, SREGO, SREG1,SREG2, SREG3, SREG4 D12 0 TIMEC" sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 20 001546 001550 001552 001554 031720 031622 030660 000000 ;RECEIVER TIMING ERROR - LINE # *' ;" (PC) (PS) (SP) TEST DEVADR SPEED TIMEB O, SREG3, SREG4 EG6,SREG SREGT,SREG2, ;SERRPC,$TMPO,SR EM20 DH6 DT2 0 TIMEC" sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 21 001556 001560 001562 001564 031761 030562 030660 000000 ;"RCVR FAILED TO INTERRUPT - LINE # " ;"' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " :SERRPC ,$TMPO,SREG6, SREGO, SREG1,SREG2,SREG3, SREG4 EM21 DH2 DT2 0 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 22 001566 001570 001572 001574 032025 030562 030660 000000 ;ERROR TABLE 001576 001600 001602 001604 032101 032142 030660 000000 ;"'CHAR AVAIL FAILED TO SET ON TIME - LINE # ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM :SERRPC,$TMPO,SREG6, SREGO,SREGT,SREG2 ,SREG3, SREG4 EM22 DH2 DT2 0 sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 23 ;"'BASIC DATA TEST ERROR - LINE # " ;" (PC) (PS) (SP) TEST DEVADR CHRLNG WAS S/B " ;SERRPC,$TMPO,SREG6, SREGO,SREG1,SREG2,SREG3 , SREG4 sPRINT ALL OCTAL EM23 DH7 DT2 0 ;ERROR TABLE ITEM FOR ERROR MESSAGE 24 001606 001610 001612 001614 032237 030562 030660 000000 EM24 DH2 D12 0 ~ ;""AUTO ECHO TEST ERROR - LINE # " (PS) (SP) TEST DEVADR REGADR WAS S/B " " (PC) ;SERRPC,S$TMPO,SREG6,SREGO, SREGT,SREG2,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 25 001616 001620 001622 001624 032277 030562 030660 000000 EM25 DH2 D12 0 ;""BREAK BIT TEST ERROR - LINE # " ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " G2, SREG4 SREG3, EGT,SRE REGO,SR SREG6,S ;SERRPC,$TMPO, ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 26 001626 001630 001632 032337 030562 030660 EM26 DH2 DT2 ;"'"HALF=DUPLEX TEST ERROR - LINE # ' ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM SREG4 ;SERRPC,$TMPO,SREG6,SREGO,SREG1,SREG2,SREG3, CZDHM-D-0 CZDHMD PN 2670 267 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2 2712 2713 2714 275 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 001634 MACY11 30A(1052) 09-MAR-78 15:32 000000 10-MAR-78 08:05 PAGE 66 SEQ 0064 ERROR POINTER TABLE 0 SEQ 0063 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 27 001636 001640 001642 001644 032401 032433 032512 000000 EM27 DH3 DT3 0 :""UNEXPECTED BUS ERROR TRAP'' ; (PC) (PS) (SP) TEST TRPPC TRPPS :SERRPC,$TMPO,SREG6, SREGO, SREG1,$REG2 sPRINT ALL OCTAL ;ERROR TABLE ITEM FCPR ERROR MESSAGE 30 001646 001650 001652 001654 032530 032433 032512 000000 EM30 DH3 D13 0 :""UNEXPECTED RSVD INSTR TRAP' ; (PC) (PS) (SP) TEST TRPPC TRPPS :SERRPC ,$TMPO,SREG6, SREGO, SREG1,SREG2 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 31 001656 001660 001662 001664 032563 032633 030660 000000 EM31 DH4 DT2 0 :"'AUTO ECHO DATA COMPARE ERROR - LINE # " ; APC) PSP TEST WASADR SBADR WAS ;SERRPC,$TMPO,SREG6, SREGO, SREGT,SREG2, SREG3, SREG4 s/8 "’ sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 32 001666 001670 001672 001674 032730 032772 033020 000000 EM32 DH5 DT4 0 :""AUTO ECHO TEST TIMEOUT - LINE # ;" (PC) (LPRG) TEST" :SERRPC,STMPO,STHP2 ;PRINT ALL OCTAL " ;ERROR TABLE ITEM FOR ERROR MESSAGE 33 001676 001700 001702 001704 033030 030562 030660 000000 EM33 DH2 D12 0 :"PARITY LOGIC TEST ERROR - LINE # ' " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B" ;SERRPC,STMPO,SREGS,SREGO,SREGT,SREG2,SREG3 ,SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 34 001706 001710 001712 061714 033073 032633 030660 000000 EM34 DH4 D12 0 :"MULTI-LINE PARITY DATA TEST ERROR - LINE # - SUBTEST # ;" (PC) (PS) (SP) TEST WASADR SBADR WAS S/B '* s SERRPC ,$TMPO,SREG6, SREGO,SREG1,SREG2, SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 35 001716 001720 001722 001724 033166 033232 033262 000000 EM35 DH14 DTé 0 ;"MULTI-LINE PARITY DATA TEST TIMEOUT" ;" (PC) (LPRG) LINACT " ;'"SERRPC,$TMPO,STMP3" ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 36 001726 001730 033272 032772 EM36 DH5 ;CHAR AVAILABLE TIMEOUT" ;' (PC) (LPRG) TEST" ' CZDHM-D-0 CZDHMD.P11 2726 2727 2728 2729 001732 001734 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 001736 001740 2730 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 21N 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 MACY11 30A(1052) 09-MAR-78 15:32 033020 000000 10-MAR-78 08:05 PAGE 67 SEQ 0065 ERROR POINTER TABLE DT4 0 SEQ 0064 :SERRPC, $TMPO, STMP2 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 37 001742 001744 033321 032633 030660 000000 EM37 DH& DT2 0 :"DATA COMPARE ERROR - LINE # ‘' ' (PC) (PS) (SP) TEST WASADR SBADR WAS S/B *' :SERRPC,STMPO, SREG6, SREGO, SREGT, SREG2, SREG3 , SRE G4 :PRIT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 40 001746 001750 001752 001754 033357 030562 030660 000000 EM4O DH2 DT2 0 ;"BUFFER ACTIVE REG ERROR - LINE # * (PC) (PS) (SP) TEST DZVADR REGADR WAS S/B " :SERRPC,$TMPO, SREG6, SREGO, SREGT, SREG2, SREG3 , SRE G4 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 41 001756 001760 001762 001764 033422 032772 033020 000000 EM41 DHS DT4 0 :"RCVR FALSE INTERRUPT'' ' (PC) (LPRG) TEST" :SERRPC,$THPO, STHP2 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 42 001766 001770 001772 001774 033447 032772 033020 000000 EM42 DHS DT4 0 :*'SILO OVERFLOW ERROR'’ ;' (PC) (LPRG) TEST" :SERRPC,STHPO, STHP2 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 43 001776 002000 002002 002004 033473 030562 030660 000000 EM43 DH2 DT2 0 ;*'SILO OVERFLOW FAILED TO GENERATE RCVR INTERRUPT' ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B * :SERRPC,STAPO, SREG6, SREGO, SREG1, SREG2, SREG3, SREG4 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 44 002006 002010 002012 002014 033553 030562 030660 000000 EMG44 ;"'NON EX MEMORY FAILED TO GENERATE XMITTR INTERRUPT' 0 :PRINT ALL OCTAL DH2 DT2 2 (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B * :SERRPC,$TMPO, SREG6 , SREGO, SREG1, SREG2, SREG3, SREG4 ;ERROR TABLE ITEM FOR ERROR MESSAGE 45 002016 002020 002022 002024 033635 030562 030660 000000 EM4S DH2 DT2 0 :"XMIT DONE FAILED TO CENERATE XMITTR INTERRUPT" " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B * :SERRPC,STMPO, SREG6 , SREGO, SREG1, SREG2, SREG3 ., SREG4 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 46 002026 002030 033713 034001 EM46 DH10 ;""CURRENT ADDRESS MEMORY PATTERNS TEST ERROR - LINE # * ;" (PC) LINEWR PATTRN TEST DEVADR REGADR WAS S/8" CZDHM-D-0 CZDHMD.P11 2782 2783 2784 2785 2786 2787 2788 2789 2790 2N 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 28N 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 002032 002034 MACY11 30A(1052) 09-MAR-78 15:32 034076 000000 10-MAR-78 08:05 PAGE 68 SEQ 0066 ERROR POINTER TABLE DT5 0 SEQ 0065 ;SERRPC,$TMPO,$TMP1,SREGO, SREGT,SREG2, SREG3, SREG4 sPRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 47 002036 002040 002042 002044 034120 034001 034076 000000 EM47 DH10 :""BYTE COUNT MEMORY PATTERNS TEST ERROR - LINE # : (PC) LINEWR PATTRN TEST DEVADR REGADR 0 sPRINT ALL OCTAL DTS ;SERRPC,$TMPO,$TMP1,SREGO,SREGT,SREG2,SREG3, SREG4 '’ WAS S/B"’ ;ERROR TABLE ITEM FOR ERROR MESSAGE 50 002046 002050 002052 002054 034201 030562 030660 000000 EM50 DH2 ;"'TEST TIMEOUT WAITING FOR XMIT DONE - LINE # ' ;" At (PS) (5P) TEST DEVADR REGADR 0 sPRINT ALL OCTAL DT2 WAS :""SERRPC ,$TMPO,SREG6, SREGO, SREG1,SREG2,SREG3, SREG4"” s/8" ;ERROR TABLE ITEM FOR ERROR MESSAGE 51 002056 002060 002062 002064 034257 034306 034076 000000 EM5T :"'NPR LOGIC TEST 2 ERROR'' 0 sPRINT ALL OCTAL DH11 DT5 ;" (PC) LINACT LINCHK TEST DEVADR REGADR WAS ;SERRPC,STMPO,STMP1,SREGO,SREG1,SREG2, SREG3,SREGS"’ S/B" ;ERROR TABLE ITEM FOR ERROR MESSAGE 52 002066 002070 002072 002074 034403 030562 030660 000000 EM52 DH2 D12 0 :"'BASIC DATA COMPARE ERROR'’ 2 APCY - 4PE) (SP) TEST DEVADR REGADR WAS :SERRPC ,$TMPO,SREGH, SREGO,SREGT ,SREG2, SREG3 ,SREGSTM’ s/B" sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 53 002076 002100 002102 002104 034201 034434 030660 000000 EMS0 DH12 DT2 0 ;"'TEST TIMEOUT WAITING FOR XMIT DONE - LINE # "' ;0 APL) . SPEED (SP) TEST DEVADR REGADR ;SERRPC,STMPO,SREG6, SREGO,SREG1,SREG2, SREG3, SREGS WAS s/B" WAS S/B" ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 54 032025 034434 030660 000000 EM22 DH12 D12 0 ;""CHAR AVAIL FAILED TO SET ON TIME - LINE # °** ;"' (PC) SPEED (SP) TEST DEVADR REGADR ;SERRPC,$TMPO,SREG6, SREGO, SREG1,3REG2,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 55 002116 002120 002122 002124 032025 034531 030660 000000 EM22 DH13 D12 0 ;"'CHAR AVAIL FAILED TO SET ON TIME - LINE # " A0 (PS) (SP) TEST DEVADR CHRLNG SCRWAS ;SERRPC,$TMPO,SREG6, SREGO,SREGT,SREG2, SREG3, SREG4 SCRS/B sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 56 002126 002130 034630 030562 EMS6 DH2 ;"'OVERRUN BIT FAILED TO SET - LINE # " ALY . (PS) (SP) TEST DEVADR REGADR WAS S/B" CZDWR-D~-0 CZDHMD.P11 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 002132 002134 MACY11 30A(1052) 09-MAR-78 15:32 030660 0¢1000 10-MAR-78 08:05 PAGE 69 ERROR POINTER TABLE DY2 0 SEQ 0067 SEQ 0066 ;SERRPC,$TMPO,SREGS, SREGO, SREGT,SREG2,SREG3 , SREGS"' sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 57 002136 002140 002142 002144 034675 030562 030660 002146 002150 002152 002154 036140 034744 033020 000000 000000 EM57 ;"'STORAGE OVERFLOW BIT FAILED - LINE # 0 sPRINT ALL OCTAL DH2 DT2 3 AP (P3) (SP) TEST DEVADR REGADR WAS :SERRPC,$TMPO,SREG6, SREGO,SREG? ,SREG2,SREG3, SREG4 "' ;ERROR TABLE ITEM FOR ERROR MESSAGE 60 MSG4 DH15 8T4 " ;MODEM CONTROL ERROR.. RUN DZDHK ;" (PC) DEVADR LINE = :SERRPC,STMPO,STMP2 S/B” CZDHA-D~0 CZDHMD.P11 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 002156 002162 002164 MACY11 30A(1052) 09-MAR-78 15:32 004737 005000 005037 10-MAR-78 08:05 PAGE 70 ERROR POINTER TABLE 027244 BEGIN: JSR PC,DCACHE sDISABLE CACHE ;;++D CLR RO sINIT RO TO INDICATE DEFAULT PARAMETERS BEGINA: (LR TITFLG sINIT TITLE MESSAGE FLAG .SBTTL INITIALIZE THE COMMON TAGS 030346 ;;CLEAR THE COMMON TAGS (SCMTAG) AREA 002170 002174 002176 002202 002204 012706 005026 022706 001374 012706 001100 002210 002216 002224 002232 002240 002246 002254 002262 002270 002276 002302 002306 002314 002322 012737 012737 012737 012737 012737 012737 012737 012737 013737 005037 005037 112737 012737 012737 021004 000020 000340 000022 021274 000030 000340 000032 024060 000034 000340 000036 024142 000024 000340 000026 020716 .020710 001222 001224 000001 002314 002322 002330 002334 002342 002350 002356 002364 013746 012737 012737 012737 022777 001012 000004 002370 177570 177570 177777 002366 002370 002374 002376 002404 002412 000403 012716 000002 012737 012737 012637 002416 002422 002430 002432 002440 005037 132737 001403 012737 001240 000200 001253 001254 001140 002440 002444 002446 002454 002456 002464 002466 002470 002472 005737 001012 123727 001406 023727 001005 104406 000403 112737 000042 L 001100 CLR CHP BNE 001140 Mov #SCMTAG,R6 s:FIRST LOCATION TO BE CLEARED #STACK,SP s:SETUP THE STACK POINTER (R§) + ::CLEAR MEMORY LOCATION #SWR,R6 ; :DONE? - -6 ;:LOOP BACK IF NO s INITIALIZE A FEW VECTORS MOV MOV MoV MoV #SSCOPE ,@#I0TVEC ;;10T VECTOR FOR SCOPE ROUTINE #340,8#I0TVEC+2 ;;LEVEL 7 #SERROR ,@FENTVEC ;;EMT VECTOR FOR ERROR ROUTINE #340,FENTVEC+2 ;:LEVEL 7 Mmov Mmov MoV #340,8#TRAPVEC+2; LEVEL 7 #SPURDN ,@#PURVEC ; ;PCWER FAILURE VECTOR #340 ,8#PURVEC+2 ;;LEVEL 7 Mov MOV CLR CLR MOVB Mov Mov #STRAP ,@#TRAPVEC SENDCT,SEOPCT STIMES SESCAPE #1,SERMAX #.,SLPADR #.,SLPERR ;;TRAP VECTOR FOR TRAP CALLS ;;SETUP END-OF-PROGRAM COUNTER s INITIALIZE NUMBER OF ITERATIONS ;:CLEAR THE ESCAPE ON ERROR ADDRESS ;;ALLOV ONE ERROR PER TEST ;s INITIALIZE THE LOOP APDRESS FOR SCOPE ::SETUP THE ERROR LOOP ADDRESS ;;SIZE FOR A HARDWARE SWITCH REGISTER. IF NOT FOUND OR IT IS ;;EQUAL TO A "*=1'", SETUP FOR A SOFTWARE SWITCH REGISTER. MoV MoV MOV Mov CHP S#ERRVEC,-(SP) #64S ,QFERRVEC #OSWR, SWR #DDISP,DISPLAY #-1,3S6R 648: BR :?Y 65% #65%, (SP) 65%: MoV #SWREG, SWR ;;POINT TO SOFTWARE SWR CLR BITB $PASS #APTSIZE,SENVM ::CLEAR PASS COUNT ;;TEST USER SIZE UNDER APT MOV #$SWREG, SWR ;:NO,USE APT SWITCH REGISTER BNE 002376 000176 000174 000004 SEQ 0068 SEQ 0067 001140 001142 001252 000001 001140 000176 000001 001134 668 : 678 MoV Mov BEQ 66% ;;SAVE ERROR VECTOR ;;SET UP ERROR VECTOR ::SETUP FOR A HARDWARE SWICH REGISTER ;;AND A HARDWARE DISPLAY REGISTER ;:TRY TO REFERENCE HARDWARE SWR ;;BRANCH IF NO TIMEOUT TRAP GCCURRED ::AND THE HARDWARE SWR IS NOT = -1 ; ;BRANCH IF NO TIMEOUT ::SET UP FOR TRAP RETURN 67% ;:YES,USE NON-APT SWITCH .SBTTL GET VALUE FOR SOFTWARE SWITCH REGISTER 68%: BNE (MPB BEQ CMP BNE GTSWR BR MovB TST - #DISPREG,DISPLAY (SP)+ ,@#ERRVEC ;:RESTORE ERROR VECTOR arsL2 68% SENV. M 68% SWR,#SWREG 699 69% #1,8AUTOB ::ARE WE RUNNING UNDER XXDP/ACT? : ;BRANCH IF YES :;ARE WE RUNNING UNDER APT? ; :BRANCH IF YES ;;SOFTWARE SWITCH REG SELECTED? s ;BRANCH IF NO ;:GET SOFT-SWR SETTINGS ;;SET AUTO-MODE INDICATOR . (ZDHM-D-0 CZDHMD.P11 2910 002500 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 71 D 6 GET VALUE FOR SOFTWARE SWITCH REGISTER 69%: SEQ 0069 SEQ 0068 CZDHM-D~0 CZDHMD.P11 2911 2912 2913 002500 002506 002514 2915 002530 2914 2916 2917 2918 MACY11 30A(1052) 09-MAR-78 15:32 012737 012737 012737 026640 000340 026714 005737 030346 002522 012737 002534 002536 002540 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 gggg 002562 002566 002570 002576 002600 002604 002606 002612 002616 002620 002622 002626 002630 002634 001012 104401 035000 005137 032777 001002 004737 005737 001413 032777 001003 013700 000402 004737 005037 005700 001407 022700 001002 000137 000137 2938 2939 2940 2941 382% 002640 002646 002654 002662 002670 2944 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2919 2920 2921 2922 2945 002542 002546 002554 002556 000340 030346 0000G1 E 6 10-MAR-78 08:05 PAGE 72 GET VALUE FOR SOFTWARE SWITCH REGISTER 000004 000006 000010 TITFLG ;HAVE WE TYPED TITLE ONCE ? TITFLG #BITO,asWR 1% PC,AUTOSZ VCFLG 1% #BIT0,aswR 9% ADRVEC,RO 108 PC, INPARA VCFLG RO START2 #-1,R0 2% INPAR3 INPAR ;SET FLAG = TYPE TITLE ONLY ONCE PER LOAD ;D0 WE WANT TO AUTOSIZE? ;BRANCH IF NOT. ;GO AUTOSIZE. START2: MOV Mov Mov MOV MoV #DHADTB-2 ,ADPTR #DHVCTB-2 ,VCPTR #BRLVL-2,BRPTR #-1,DHNUM #1,SELMSK :GET POINTER TO ADDRESS TABLE ;GET POINTER TO VECTOR TABLE ;GET POINTER TO BR LEVEL TABLE sSTART WITH DH #00 ;SET UP DH11 BIT TEST MARKER RESTRT: INC DHNUM ;GENERATE DH11 DEV NUMBER MoV Mov ST 18: 176342 030306 026110 030000 9%: 108: 118: 177777 . 012737 012737 012737 012737 012737 027676 027736 030000 177777 000001 030326 030330 030332 030320 027306 002676 005237 030320 002710 002716 002724 002732 002734 002740 002742 002744 002752 002760 002766 002772 002774 002776 003000 003002 062737 062737 033737 001004 006337 001737 000755 017737 017737 017737 004537 030320 035057 104401 035037 004737 000002 000002 027306 003006 012737 003006 062737 ;SET UP THE BUS ERROR VECTOR 176364 026270 026200 002702 #BUSER ,ERRVEC #340,ERRVEC+2 000072 025140 030000 000001 START1: MOV MoV 000002 030326 030330 030332 027310 027306 025356 025352 025346 024636 027302 027304 030316 024330 001106 28 BNE TYPE TITLE COM BIT BNE JSR TST BEQ 8IT BNE MoV BR JSR CLR TST BEQ CMP BNE JMP JMP ADD #RESERR ,RESVEC #340,RESVEC+2 ;SET UP THE RSVD INSTR VECTOR 1% :BR IF YES ;GO TYPE PROGRAM TITLE #2.,ADPTR ADD #2 ,VCPTR ADD #2 ,BRPTR BIT SELMSK ,DHSEL BNE RSTRTA REST1: ASL SELMSK BEQ START2 BR RESTRT RSTRTA: MOV @ADPTR,DHADR MOV aVCPTR,DHVCY Mov @BRPTR,DHRLVL JSR RS, SUNUM DHNUM TITLE2+20 TYPE TITLE2 JSR PC,LDTBF1 Mov #.,SLPADR SEQ C070 SEQ 0069 ;START AT 200 ?? ;BR IF NOT ;ARE PARAMETERS TO BE INPUT MANUALLY? ;BRANCH IF YES. ;OTHERWISE, GET ADDRESSES BETWEEN VECTORS FROM AUTOSIZER ;GO ASK FOR PARAMETERS sRE _INIT VECTOR FLAG ;USE DEFAULT PARAMETERS ? ;BR IF YES ;CHANGE DH SELECT PARAM ONLY ? :BR IF NOT ;GO ASK FOR SELEZCT PARAM. ;GO ASK FOR ALL PARAMETERS ;UPDATE TABLE POINTERS ;TEST FOR SELECTED DH11 ;:BR IF SELECTED FOR TEST ;SHIFT MARKER TO TEST NEXT DH1 ;BR IF 16 TESTED - START OVER ;GO TEST IF THIS ONE SELECTED sSET UP DH11 ADDRESS ;SET UP THE DH11 VECTOR ENTRY ;GET BR LEVEL VALUES ;GO SET DH NUMBER IN THE MESSAGE BUFFER ;GO PRINT '‘TESTING DH11 #xx"' ;GO LOAD XMITTR QUTPUT BUFFER WITH ;BINARY COUNT PATTERN ;INIT SCOPE LOOP RETURN CZDHM-D-0 CZDHMD.P11 2964 2965 2966 2967 2968 2969 2970 297 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 TM0 3on 3012 3013 3014 3015 3016 3017 3018 3019 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 T PAGE 73 F 6 SEQ 0071 CHECK SSYN RESPONSE FROM ALL DH11 REGISTERS SEQ 0070 JIERARRRREERAREAARERTERRRERTCORRRERRERACRIRRORORACRRRRAAROARORRCRCORORRARATRETSY s*TEST 1 B 003014 e 1511 : 000004 -REM CHECK SSYN RESPONSE FROM ALL DH11 e T L T T REGISTERS T PP P PR T SCOPE 4 TEST ABSTRACT: 1222322232222 222 23] THIS TEST ATTEMPTS TO REFERENCE EACH OF THE EIGHT REGISTERS IN THE DH11 SELECTED FOR TEST USING ITS ASSIGNED UNIBUS ADDRESS. IF ANY ADDRESS FAILS TO RESPOND A BUS ERROR TRAP VECTORS THE TEST TO THE ERROR SET-UP AND CALL ROUTINE. AFTER THE ERROR IS TYPED THE TEST WILL TEST THE NEXT DH11 ADDRESS IN SEQUENCE UNTIL ALL EIGHT ARE TESTED. ERRORS: (222233 1.) ERROR 1 REPORTS THAT THE REGISTER WHOSE ADDRESS IS IN R2 FAILED TO RESPOND WITH ''SSYN'' WHEN REFERENCED. SYNC: (NONE) L2223 DEBUG: Ktk w 1.) PROBLEM IS MOST LIKELY THE M7277 MODULE. 2.) IF ALL EIGHT REGISTTERS FAIL TO RESPOND, MAKE SURE THAT YOU CONFIGURED THE PROGRAM PROPERLY BEFORE STARTING. 3.) IF YOU DID, CHECK THE SETTINGS OF THE ADDRESS SELECT JUMPERS ON THE M7277 MODULE. IF ONE OR MORE RESPONDED PROPERLY, SET UP AN ERROR SCOPE LOOP AND B?g?;gAg: 5HROUGH THE LOGIC STARTING WITH THE KEY LOGIC SIGNALS L LOW. KEY LOGIC: KRRRRRRRAR M7277 SHé : 003016 003020 003022 003026 003032 003040 010102 010205 062705 013746 012737 162702 003044 003050 003052 003054 003056 062702 020205 001412 005712 000772 000002 003060 003064 004737 022626 024352 000020 000004 003060 000002 000004 1$%: 2%: 3s: SH3 SSYN H DEVICE RESPONDING L DEVICE SELECTED H CE2 E72-6 E09-11 MOV MOV ADD MoV MOV SUB R1,R2 R2,RS #20,R5 ERRVEC,-(SP) #3% ,ERRVEC #2,R2 ;COPY IT INTO R2 ;ALSO RS ;RS WILL TELL US WHEN WE'VE TESTED ALL 8 ;SAVE BUS ERROR VECTOR :GO TO 3% IF REG FAILS TO RESPOND ;S0 WE START WITH FIRST REG ADD #2,R2 :POINT TO A DH11 REGISTER BR 1% :ACCESS DH11 REG ADDR :BR WHEN ALL 8 ARE DONE PC,SUER1 (SP)+,(SP)+ ;GO SET UP ERROR INFO ;FIX SP BECAUSE OF TRAP CMP BEQ TST JSR CMP R2,R5 43 (R2) JTESTED ALL EIGHT ?? ;BR IF YES (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 3020 ggg; 003066 003074 012737 104001 3023 3024 003076 003100 000762 012637 003054 000004 10-MAR-78 mn 001110 : 4%: G 6 08:05 PAGE 74 CHECK SSYN RESPONSE FROM ALL DH11 REGISTERS Mov ERROR #2% SLPERR 1 ;SET UP ERRCR LOOP RETURN ;DH11 REGISTER FAILED TO RESPOND TO MSYN BR Mov 1% (SP)+ ,ERRVEC ;GO TEST NEXT ONE ;RESTORE BUS ERROR VECTOR SEQ 0072 SEQ 0071 CZDHM-D-0 CZDHMD.P11 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 MACY11 30A(1052) 09-MAR-78 15:32 08:05 T2 PAGE R R s*TEST 2 R TST2: 000004 RN TEST AR 003104 H 75 6 TEST THAT ""MASTER CLR'" CAN CLEAR THE '‘SCR","LPR'',"BKR'',AND ''SSR'' REGS IR R RN R RN RN RN RN RN RO SEQ 0073 SEQ 0072 E AR THAT "‘MASTER CLR' CAN CLEAR THE ''SCR',"LPR","BKR'',AND ''SSR'" REGS RN R R R RPN RN AR R RN R RN R RN SCOPE z .REM TEST ABSTRACT: 232222222220 2] THIS TEST SETS ALL WRITEABLE BITS IN THE TARGET REGISTER (SCR, LPR, BKR, AND SSR) THEN SETS BIT11 IN THE ''SCR' (MASTER CLEAR) AND CHECKS THAT IT INDEED CLEARED ALL BITS IN THE TARGET REGISTER. IT PERFORMS THIS SEQUENCE FOR ALL TARGET REGISTERS. IF A REGISTER FAILS TO CLEAR PROPERLY, THE ERROR IS REPORTED, AND THEN THE ROUTINE TESTS THE NEXT REGISTER IN SEQUENCE. 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 10-MAR-78 ERRORS: 22223 2] 1.) ERROR 3 REPORTS THAT THE REGISTER WHOSE ADDRESS IS IN R2 FAILED TO CLEAR WHEN MASTER CLEAR WAS ACTIVATED. SYNC: L22231 M7289 SHé SCR 11 H (MASTER CLEAR) FK2 DEBUG: L2223 ] 1.) IF THE ERROR REPORTS INDICATE THAT ALL REGISTERS ARE FAILING, ESTABLISH AN ERROR SCOPE LOOP AND PROCEED TO BACKTRACK THROUGH THE KEY LOGIC SIGNALS LISTED BELOW. 2.) IF ONLY ONE REGISTER FAILS WITH ALL SET BITS -- THEN LET TESTS 03-10 RUN == THEY WILL PROBABLY GIVE BETTER TESTS TO DEBUG THE FAULT. ISOLATION. USE ONE OF THESE KEY LOGIC: (2222822231 M7277 003120 003122 003126 012705 010125 010125 010125 010125 062745 062745 INIT A L FR2 INIT B L INIT A H INIT B H FM2 EF2 Fv2 Pl SH4 LOAD SCR HIGH BYTE H M7289 SHé6 SCR 11 H (MASTER CLEAR) FK2 M7278 SH3 BUFF DATA 11 H 027320 MOV #MSTCLR,RS ;GET POINTER TO ADDRESS TABLE 000016 000014 MOV ADD ADD R1,(RS)+ #SSR,=(R5) #BKR, - (R5) ;GENERATE SSR ADDRESS ;GENERATE BKR ADDRESS . 003106 003112 003114 003116 SH3 Mov Mov MoV R1,(R5)+ R1,(R5)+ R1,(R5)+ AA1 ;SET UP THE TEST ADDRESS TABLE SO THAT ;1T CONTAINS THE ADDRESSES OF THE ;SCR,LPR,BKR, AND SSR REGISTERS - CZDHM-D-0 CZDHMD.P11 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 MACY11 30A(1052) 09-MAR-78 15:32 003132 003136 003140 062745 005745 005004 003142 003144 003150 003152 003156 003162 003164 012502 022705 001415 012712 052711 011203 001766 003166 003172 003200 003202 004737 012737 104003 000757 10-MAR-78 12 000004 T 027330 2%: 177777 004000 024412 003152 001110 6 I 08:05 PAGE 76 TEST THAT “'MASTER CLR'' CAN CLEAR THE ''SCR''."'LPR'',"'BKR'',AND ''SSR'' REGS ADD TST CLR #LPR,-(RS) =(RS) R4 ;GENERATE LPR ADDRESS ;POINT RS TO FIRST ADDR ENTRY (SCR) JRESULT S/B 000000 AFTER MASTER CLEAR MOV CMP BEQ (RS)+,R2 #MSTCLR+10,RS TST3 ;GET REG ADDRESS ;DONE ALL FOUR REGS ?? ;:BR IF YES BIS MOV BEQ #BIT11,(R1) (R2) ,R3 1% ;ISSUE MASTER CLEAR sGET CONTENT OF REGISTER ;:BR IF IT'S ALL ZEROES MOV JSR MOV ERROR BR #-1,(R2) ;SET 1'S IN REGISTER PC,SUER?2 ;GO SET UP ERROR INFO 1% ;GO TEST NEXT REGISTER #2%,8LPERR 3 ;SET UP ERROR LOOP RETURN sMASTER CLR FAILED TO CLR SEL. REG. SEQ 0074 SEQ 0073 CZDHM-D-0 CZDHMD.P11 - e D —ld el — el e e = e e ed e — N PNONIN = w N=OVR~NOWVIWN -o AN N W NN W NN N W W W w 3097 3098 3099 3100 310 3102 3103 3104 3105 3106 3107 3108 3109 MACY'1 30A(1052) 09-MAR-/% 15:32 J 10-MAR-78 13 SRR AR R ;*TEST 3 P 003204 000004 6 08:05 PAGE 77 TEST "'SCR'" REG R/W BITS CAN SET/CLR L TST3: .REM R R R R SEQ 0075 SEQ 0074 (NORMAL MODE) AR R AR AR RARRRRERRERRRRTRETRRTRRRRRRARRRRRRARRARARR AR TEST ''SCR'" REG R/W BITS CAN SET/CLR (NORMAL MODE) R e e P TR T e T e R e P P S SCOPE X TEST ABSTRACT: (222322222220 2] CAN SE THIS TEST VERIFIES THAT EACH R/W BIT IN THE ''SCR’* REGISTER INDIVIDUALLY SET AND CLEARED IN NORMAL MODE (MAINT BIT = 0) A BIT MASK (RGMSK1: 131177) IS USED TO DEFINE THE R/W BiTS ( ALL BUT BITS 14, 11, 10, 8, AND 7). THE TEST IS REPEATED ELEVEN TIMES WITH A DIFFERENT BIT SELECTED FOR EACH TEST. R5 CONTAINS THE BIT CURRENTLY BEING TESTED. IF AN ERROR IS DETECTED, IV IS REPORTED AND THEN THE RESUMES WITH THE NEXT BIT IN SEQUENCE UNTIL ALL HAVE BEEN TESTED. TEST ERRORS: (2222281 1.) ERROR 2 IS CALLED TO REPORT A FAILURE AGAIN TO REPORT A FAILURE TO CLEAR PROPERLY. TO SET PROPERLY AND SYNC: KRERR 1.) SET FAILURE M7277 SH4 LOAD SSR LOW BYTE H CR1 2.) CLR FAILURE M7277 SH4 LOAD SSR HIGH BYTE H P2 DEBUG: (322234 1.) 2.) IF ALL BITS FAIL - SUSPECT THE ''LOAD SCR'' SIGNALS ON THE M7277 SH&. IF ONLY ONE OR TWO BITS FAIL - SUSPECT EITHER THE '‘SCR'* REGISTER FLOPS ON THE M7289 SH6, THE BUS RECEIVERS ON THE M7278 SH3 AND SH4, OR THE MULTIPLEXORS AND BUS DRIVERS ON THE M7289 SH5-8. KEY LOGIC: (2222222234 45 M7278 SH3 SH4 BUFF DATA <15:08> H BUFF DATA <07:00> H M7277 SH4 LOAD SCR LOW BYTE H LOAD SCR HIGH BYTE H DATA TO BUS H DATA SOURCE <A,B,C> H (T2 CP1 EN2 DU1,DU2,DT2 BUF DATA TO BUS B H E0S5-12 M7289 SHS SH6 SH7 SH8 BUS BUS SCR BUF BUS BUS DATA <15:12> L DATA <11:08> L <15:00> H DATA TO BUS A H DATA <07:04> L DATA <03:00> L E05-8 MACY11 30A(1052) 003206 003214 003216 012737 010102 012705 003236 003222 003226 003230 003232 003232 003234 030537 001003 006305 CZDHM-D-0 CZDHMD.P11 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 nn 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 09-MAR-78 15:32 10-MAR-78 13 6 MOV MOV MOV #4%, SLPERR R1,R2 #1.RS ;SET UP ERROR LOOP RETURN *GET REGISTER ADDRESS “SET UP TO START WITH BITQO %:: BIT BNE ASL RS.RGMSK1 48 RS ;SHALL WE TEST THIS BIT ? BR IF YES “SHIFT TO TST NEXT BIT 001430 000772 : BEQ 003236 003240 003242 003250 003252 003254 003256 010504 48: 003260 003264 004737 104002 003266 003270 003276 003300 003302 005004 112761 040512 011203 001403 003304 003310 003312 004737 005012 112761 010512 011203 020403 001403 104002 000746 001110 K 08:05 PAGE 78 TEST "'SCRTM REG R/W BITS CAN SET/CLR (NORMAL MODE) 000001 18: 027662 000000 000016 BR 1% TST4 ::<BR IF DONE ALL R/W BITS> MOV CLR MOVB MOV MOV RS, R4 (R2) #0,SSR(R1) RS, (R2) (R2),R3 ;RESULT S/B IN R& *INIT REG BEING TESTED *SCOPE SYNC *SET THE BIT *GET THE WAS DATA JSR ERROR PC,SUER2 2 ;G0 SET UP ERROR INFO *SELECTED BIT FAILED TO SET IN SCR CLR MOVB BEQ R4 #0.SSR+1(R1) RS. (R2) (R2),R3 6% :SET UP TO CLEAR THE BIT $/B=000000 :SCOPE SYNC :CLR THE SELECTED BIT :GET THE WAS DATA ‘BR IF IT CLEARED JSR ERROR BR PC.SUER2 2 28 ;G0 SET UP THE ERROR INFO *SELECTED BIT FAILED TO CLEAR IN SCR 160 SELECT NEXT BIT CMP BEQ 024412 000000 000017 58: BIC MOV 024412 68: R4 ,R3 5% GO TEST NEXT BIT ‘RESULT = S/B DATA 2? ‘BR IF YES SEQ 0076 SEQ 0075 (ZDHM-D-0 CZDHMD.P11 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 321 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 T4 P 003314 © 000004 SEQ 0077 SEQ 0076 TEST "'SCR'* REG. READ ONLY BITS (NORMAL MODE) LR LR s*TEST 4 P 6 PAGE 79 LRt TST4: -REM R R P e e Y R TEST ""SCR'* REG. READ ONLY BITS (NORMAL MODE) T e T P TTe T Y SCOPE & TEST ABSTRACT: 1223232222223 2] THIS TEST VERIFIES THAT THE “'SCR'' REGISTER READ ONLY BITS CAN NOT BE SET OR CLEARED IN NORMAL MODE. A BIT MASK (RGMSK2: 046600) IS USED TO DEFINE THE READ ONLY BITSS (14,11,10,8, AND 7). THE TEST IS REPEATED FIVE TIMES, ONCE FOR EACH BIT TO BE TESTED, AND ANY ERRORS DETECTED ARE REPORTED. AFTER THE ERROR REPORT THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE UNTIL ALL BITS HAVE BEEN TESTED. : ERRORS (2222224 1.) ERROR 2 IS CALLED TO REPORT ANY READ ONLY BIT THAT FAILED TO RESPOND PROPERLY. SYNC: 123231 M7277 SH&4 LOAD SSR LOW BYTE H CR1 DEBUG: It SAME AS FOR TEST 03 KEY LOGIC: 122822222 41 SAME AS FOR TEST 03 003316 003320 003324 003330 003332 003334 003336 010102 003340 003342 003344 003352 003354 003356 005004 005012 112761 010512 011203 001765 003360 003364 003372 003374 004737 012737 012705 030537 001003 006305 001420 000772 104002 0006756 4 000001 027664 18: 28: 3s: 000000 000016 Mov R1,R2 ;MAKE IT THE REG. ADDR ALSO BIT RS ,RGMSK2 ;IS 1T A READ ONLY BIT ?? MOV BNE ASL BEQ BR 001110 ;INIT BIT TEST MARKER 3% RS TSTS 1% ;BR IF IT IS - GO TEST IT sSHIFT BIT MARKER ::BR IF DONE ALL BITS ;G0 TEST THIS BIT CLR CLR R4 (R2) ;RESULT S/B = 000000 ;INIT REG BEING TESTED Mov RS, (R2) sATTEMPT TO SET A READ ONLY BIT ;GET THE WAS DATA Move MoV BEQ 024412 003340 #1.,R5 JSR Mov ERROR BR #0,SSR(R1) (R2) ,R3 2% PC,SUER2 #3% ,SLPERR 2 2% :SCOPE SYNC ;BR IF THE BIT DIDN'T SET ;GO SET UP ERROR INFO ;SET UP ERROR LOOP RETURN ADDR ;READ ONLY BIT SET IN "'SCR" ;CONTINUE WITH NEXT BIT 3263 3264 3265 3266 3267 3268 3269 3270 327N 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 P R L L L LR LR s*TEST 5 TST5: PP T TR T Y SCOPE -REM H TEST ABSTRACT: ERRRRERRRARRRRE THIS TEST VERIFIES THAT THE ''SCR'* REGISTER READ-ONLY BITS (14, 10, AND 07) CAN BE SET/CLR IN MAINT. MODE (SCRO9=1) ONLY. A BIT MASK (RGMSK6: 042200) IS USED TO DEFINE THE BITS TO TEST. — THE TEST PERFORMS THE FOLLOWING SEQUENCE: VLN 000004 T AR RPN RN AR R R AR R RO AR e 003376 T SEQ 0078 SEQ 0077 TEST "'SCR'* REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE AR SELECT A BIT TO TEST SET MAINT. MODE SET THE BIT AND VERIFY THAT IT SET CLEAR THE MAINT. MODE BIT ATTEMPT TO CLEAR THE TEST BIT TEST TO SEE THAT IT DID NOT CLEAR SET MAINT. MODE CLEAR THE TEST BIT AND VERIFY THAT IT CLEARED . 3259 3260 3261 3262 LI 08:05 PAGE 80 TEST ""SCR'* REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE 10-MAR-78 15 0 CONO 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 2254 3255 3256 3257 3258 MACY11 30A(1052) 09-MAR-78 15:32 REPEAT 1-7 UNTIL ALL BITS HAVE BEEN TESTED ANY ERRORS DETECTED ARE REPORTED AND THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE UNTIL ALL BITS HAVE BEEN TESTED. : ERRORS rRRRARRR 1.) ERROR 2 IS CALLED AT THREE DIFFERENT POINTS TO REPORT_ONE OF :ggr;:g;s POSSIBLE FAILURE MODES DESCRIBED IN 3, 6, AND 7 IN THE SYNC: I 1.) STEP 3 FAILURE TO SET WITH MAINT. MODE SET M7277 SH4 LOAD SSR LOW BYTE H CR1 2.) STEP 5 FAILURE TO REMAIN SET WITH MAINT MODE NOT SET M7277 SH4 LOAD SSR HIGH BYTE H cP2 3.) STEP 8 FAILURE TO CLEAR WITH MAINT. MODE SET M7277 SH4 LOAD LPR H EP2 DEBUG: 1222224 1.) ASSUMING THE PREVIOUS TESTS RAN SUCCESSFULLY THE FAULT IS MOST LIKELY THE M7289 MODULE. KEY LOGIC: LA82220822 TM CZDHM-D-0 CZDAMD .P11 CZDHM-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 15 3296 ggg; . 3301 3302 3303 3304 3305 3306 3307 gggg 003400 003406 003410 003414 003420 003422 003424 003426 012737 010102 012705 030537 001003 006305 001457 000772 3310 3311 3312 003430 003432 003436 010504 052704 005012 3314 3315 3316 3317 ;;}g 003444 003452 003454 003456 003460 052712 112761 050512 011203 020304 001404 001000 3320 3321 gggg 003462 003466 003470 004737 104002 000754 024412 3324 3325 3326 3327 3328 3329 gg;? 003472 003476 003502 003510 003512 003514 003516 042712 042704 112761 040512 011203 020304 001404 001000 001000 000000 3332 3333 ;ggg 003520 003524 003526 004737 104002 000735 024412 3336 3337 3338 3339 003530 003534 003536 003544 012704 050412 012761 040512 001000 ggz% 003552 wi7C 3340 3341 3344 3345 3346 6 SAME AS TEST 03 WITH THE FOLLOWING ADDITION gggg 3313 N 08:05 PAGE 81 TEST "'SCR' REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE 003440 003546 003550 003554 003560 003562 003430 000001 027674 104002 000717 18: ' 000000 000000 28: 3s: 001000 011203 flh‘jO; 004737 001110 SH4 Mov MoV MoV BIT BNE ASL BEQ BR #3%,SLPERR R1,R2 #1,R5 R5.RGMSK6 3% RS TSTé 13 ;SET UP THE ERROR LOOP RETURN sMAKE IT REG ADDR TOO sINIT BIT TEST MARKER ;1S IT A READ ONLY BIT ?? :BR IF YES - TEST IT ;SHIFT THE BIT MARKER ;:BR IF DONE ALL SELECTED BITS ;GO TEST FOR THIS BIT MoV BIS CLR R5,R4 #BIT09,R4 (R2) ;SET UP S/B DATA ;PUT IN THE MAINT. BIT ;INIT REG BEING TESTED MovB BIS MoV CMP BEQ #0,SSR(R1) RS, (R2) (R2) ,R3 R3,R4 43 :SCOPE SYNC ;SET THE SELECTED BIT :GET THE WAS DATA :DID SELECTED BIT GET SET ?? :BR IF IT DID BIS 000016 48: 000017 5%: 000004 M7289 #B1T709, (R2) :TURN ON MAINT. MODE JSR ERROR BR PC,SUER2 2 2% ;GO SET UP ERROR INFO sSELECTED BIT FAILED TO SET IN MAINT HODE ;GO TEST NEXT BIT BIC BIC Move BIC Mov CHP BEQ #B1709, (R2) #B1T09,R4 #0,SSR+1(R1) RS, (R2) (R2) ,R3 R3,R4 5% ;TURN OFF MAINT. MODE sCLR MAINT BIT IN S/B DATA s SCOPE SYNC sATTEMPT TO CLR SELECTED BIT ;GET THE WAS DATA ;:DID BIT GET CLEARED ?? :BR IF IT DIDN'T JSR ERROR BR PC,SUER2 2 2% ;GO SET UP ERROR INFO sSELECTED BIT GOT CLEARED WITH MAINT MODE OFF ;G0 TEST NEXT BIT MoV BIS MoV BIC #BIT09,R4 R4, (R2) #0,LPR(R1) R5,(R2) sSET UP S/B DATA ;SET MAINT. MODE : SCOPE SYNC ;NOW CLR SELECTED BIT MoV CHP 024412 74121 ONE-SHOTS E35-6, E23-6 BEQ (R2) ,R3 R3,R4 2% JSR PC,SUER2 ERROR BR 2 2% ;GET THE WAS DATA ;DID BIT GET CLEARED OK ?? ;BR IF YES ;GO SET UP ERROR INFO sFAILED TO CLR SELECTED BIT IN MAINT MODE ;GO SELECT NEXT BIT FOR TEST SEQ@ 0079 SEQ 0078 CZDMM-D-0 CZDHMD.P11 09-MAR-78 15:32 10-MAR-78 08:05 16 B PAGE 82 7 SEQ 0080 TEST THAT ALL R/W BITS IN "LPR' CAN BE SET/CLR SEQ 0079 IRt RN RN TR E T E R RN RN RN RT R RO ;*TEST 6 TEST THAT ALL R/W BITS IN "LPR' CAN BE SET/CLR AR 003564 000004 TST6: RN IRt R RN RN ORI RO RO RO SCOPE X .REM TEST ABSTRACT: TEARRERRREEREIEE THIS TEST VERIFIES THAT ALL R/W BITS IN THE 'LPR'" REGISTER CAN BE SET AND CLEARED INDIVIDUALLY. A BIT MASK (RGMSK3: 177767) IS USED TO DEFINE THE BITS TO BE TESTED (ALL BUT BITO03). THE TEST SEQUENCE IS AS FOLLOWS: . SELECT A BIT TO TEST SET THE BIT AND VERIFY IT SET CLEAR THE BIT AND VERIFY IT CLEARED . NN = 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366 3367 3368 3369 3370 MACY11 30A(1052) . REPEAT 1 THRU 3 UNTIL ALL BITS TESTED ANY ERRORS DETECTED ARE REPORTED AND AFTER THE ERROR, RESUMES WITH THE NEXT BIT IN SEQUENCE. THE TEST ERRORS: LA2222 d] 1.) ERROR & IS CALLED TO REPORT BOTH FAIL TO SET AND FAIL CLEAR FAULTS. TO SYNC: rRRRAEE 1.) FAIL TO SET: 2.) FAIL TO CLEAR: M7277 M7277 SH4 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 cpP2 DEBUG: (A2 22 1.) IF ALL BITS FAIL THE PROBLEM IS MOST LIKELY THE M7277 MODULE (LPR LOAD SIGNALS) 2.) IF NOT THEN IT IS PROBABLY AN "'LPR'* REGISTER CHIP OR BAD OUTPUT DATA MUX CHIP, BOTH ON THE M7278 MODULE. KEY LOGIC: L2222 3394 3395 3396 3397 3398 3399 3400 3401 3402 003566 003574 003576 012737 010102 062702 003622 000004 001110 28222 M7277 SH4 LOAD LPR H M7278 SH5 LPR <15:12> L Mov Mov ADD EP2 (E52) (E37) LPR <11:08> L SH6 (E59) LPR <07:04> L SH7 SH8 LPR <03:00> L (E61) SH5,6,7.8 OUTPUT MUX CHIPS #38,SLPERR R1,R2 #LPR,R2 (74151'S PIN 2) ;SET UP THE ERROR LOOP RETURN ;COPY IT IN R2 ;GENERATE REGADR IN R2 CZDHM-D~0 CZDHMD P11 MACY11 30A(1052) 003602 003606 003612 003614 003616 003620 012705 030537 001003 006305 001430 000772 000001 027666 003622 003624 003626 003634 003636 003640 003642 010504 005012 112761 010512 011203 020304 001403 003644 003650 004737 003652 003664 003666 005004 112761 040512 011203 001752 003670 003674 003676 004737 104004 000746 003654 003662 09-MAR-78 15:32 104004 10-MAR-78 16 18: 2%: 3%: 0000C0 000016 7 £ 08:05 PAGE 83 TEST THAT ALL R/W BITS IN "LPR' CAN BE SET/CLR MOV BIT BNE ASL BEQ BR MoV 000000 024412 000017 4%: 33 RS 1817 1% JINIT BIT TEST MARKER ;TEST THIS BIT ?? :BR IF YES THE MARKER sSHIFT. ::BR IF DONE ALL BITS ;GO TEST NXT BIT ;SET UP S/B DATA sINIT REG BEING TESTED :SCOPE SYNC ;SET LPR BIT ;GET THE WAS DATA ;DID IT SET :BR IF IT SET PROPERLY CLR MOVB MOV MoV CMP (R2) #0,SSR(R1) R5,(R2) (R2) ,R3 R3,R4 48 JSR ERROR PC,SUER2 ;GO SET UP ERROR INFO sLPR BIT FAILED TO SET PROPERLY CLR MovB BIC MoV BEQ Ré #0,SSR+1(R1) R5, (R2) (R2) ,R3 ;GET READY TO CLEAR SELECTED BIT sSCOPE SYNC ;CLEAR THE BIT :GET THE WAS DATA ;BR IF BIT CLEARED PROPERLY JSR ERROR BR PC,SUER2 ;GO SET UP ERROR INFO ;LPR BIT FAILED TO CLEAR PROPERLY ;GO SELECT NEXT BIT BEQ 024412 #1,R5 R5,RGMSK3 4 2% 4 2% SEQ 0081 SEQ 0080 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 7 D 08:05 PAGE 84 TEST THAT ALL R/W BITS IN "BKR' CAN BE SET/CLR 10-MAR-78 17 3430 AR 3431 ;«TEST 7 3432 3433 3434 3435 R 003700 000004 e R R R R AR R AR R RN R AR A AR R AN AR R RN R SEQ 0082 SEQ 0081 R R TEST THAT ALL R/W BITS IN "BKR'' CAN BE SET/CLR ee R R eY 1517: SCOPE .REM X TEST ABSTRACT: 3436 2222228222822} 3437 3438 3439 3440 gzz; THIS TEST VERIFIES THAT ALL BITS IN THE BREAK CONTROL REGISTER CAN BE SET AND CLEARED INDIVIDUALLY. IT USES A BIT MASK (RGMSK&4: 177777) TO DEFINE THE R/W BITS (ALL 16.). R5 ALWAYS CONTAINS THE BIT CURRENTLY SELECTED FOR TEST. THE TEST SEQUENCE IS AS FOLLOWS: 3443 3444 3445 1. SELECT A BIT TO TEST 2. SET THE BIT AND VERIFY THAT IT SET PROPERLY 3. CLEAR THE BIT AND VERIFY THAT IT CLEARED PROPERLY 3448 3449 3450 ANY ERROR DETECTED IS REPORTED AND THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE. 3452 2222222 gzzg 4., REPEAT 1 THRU & UNTIL ALL BITS HAVE BECN TESTED. 3451 ERRORS: 3453 3454 3455 3456 3457 1.) ERROR S5 IS CALLED TO REPORT BOTH FAIL TO SET PROPERLY AND FAIL TO CLEAR PROPERLY FAULTS. SYNC: 3458 ' 22222 3459 3460 gzg; 1.) FAIL 7O SET: 2.) FAIL .J CLR: 3463 DEBUG: 3465 3466 3467 gzgg 1.) THE ONLY DIFFERENCES IN THE DATA PATH HERE AND THAT FOT THE PREVIOUS TESTS ARE THE ACTUAL REGISTER CHIPS AND THE INPUT SELECTED ON THE OUTPUT DATA MULTIPLEXORS. gz;? 2.) IF ALL BITS FAIL THE PROBLEM IS MOST LIKELY THE M7277. gz;% 3.) IF ONLY ONE OR TWO FAIL THE PROBLEM IS MOST LIKELY THE M7278. 3474 KEY LOGIC: 3464 SH4 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 cP2 (22222 3475 L2228 222228 3476 3477 3478 gzzg M7277 3481 ;:gg 3484 3485 M7277 M7277 . 003702 003710 012737 010102 003736 001110 SHé LOAD BCR H Ful DATA SOURCE (A,B,.C) H pU1l,DU2.DT2 DATA TO BUS H EN2 mM7278 SHS - SH8 74175 REGISTER CHIPS (ES1,E38,E67,.E60) MOV MOV #3%,SLPERR R1,R2 SHS = SHB 74151'S MUX CHIPS INPUT PIN 13 :sSET UP THE ERROR LOOP RETURN :GENERATE ‘'BKR'' ADDRESS IN R2 CZDHM-D-0 CZDHMD.P11 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 003712 003716 003722 003726 003730 003732 003734 003736 003740 MACY11 30A(1052) 09-MAR-78 15:32 062702 012705 030537 001003 006305 001430 10-MAR-78 17 000014 000001 027670 1%: 2%: 000772 3%: 010504 005012 003742 003750 003752 003754 003756 112761 050512 011203 020304 001403 000000 003760 003764 004737 024412 003766 003770 003776 004000 004002 005004 112761 040512 011203 001752 004004 004010 004012 004737 104005 104005 000746 £ 08:05 FAGE 85 TEST THAT ALL R/W BITS IN "BKR' CAN BE SET/CLR ADD MOV BIT BNE 8EQ BR MOV CLR Mov CMP BEQ 000000 024412 000017 4%: #BKR,R2 #1,R5 R5,RGMSK4 ASL MOVB BIS 000016 7 sINIT BIT TEST MARKER ;TEST THIS BIT ?? ;BR IF YES ;SHIFT BIT MARKER ;:BR IF ALL BITS ;GO TEST THE BIT (R2) #0,SSR(R1) RS, (R2) (R2) ,R3 4% TESTED ;SET UP S/B DATA sINIT REG BEING TESTED s SCOPE SYNC ;SET THE SELECTED BIT IN "BKR'' ;GET THE WAS DATA ;DID BIT SET 0K ;BR IF YES JSR ERROR PC,SUER2 5 ;GO SET UP ERROR INFO CLR R4 #0,SSR+1(R1) ;SET UP S/B DATA :SCOPEE SYNC MOV BEQ (R2) ,R3 2% ;GET THE BKR WAS DATA ;BR IF BKR BIT CLEARED OK JSR ERROR BR PC,SUER2 Move BIC 5 2% ;BKR BIT FAILED TO SET PROPERLY ;CLEAR BKR BIT ;GO SET UP ERROR INFO ;BKR BIT FAILED TO CLR PRCPERLY ;GO SELECT NEXT BIT SeQ 0083 SEQ 0082 CZDHM-D-0 CZDHMD.P11 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 MACY11 30A(1052) 09-MAR-78 15:32 ZE 08:05 PAGE 86 TEST THAT ALL R/W BITS IN "'SSR' CAN BE SET/CLR 10-MAR-78 110 PR L L T T L T e T R TR ey ;*TEST 10 P 004014 000004 SEQ 0084 SEQ 0083 AR TST10: .REM TEST THAT ALL R/W BITS IN "'SSR'' CAN BE SET/CLR R e e e L TS T e TR TR P TR SCOPE )4 TEST ABSTRACLT: 2222222220223 THIS TEST VERIFIES THAT ALL R/W BITS (SSR) CAN BE SET AND CLEARED INDIVIDUALLY. IN THE SILO STATUS REGISTER IT USES A BIT MASK (RGMSK5: TO DEFINE THE R/W BITS (15,5,4,3,2,1, AND 0). R5 ALWAYS CONTAINS THE BIT CURRENTLY SELECTED FOR TEST. THE TEST SEQUENCE IS AS FOLLOWS: 1. SELECT A BIT TO TEST 2. SET THE BIT AND VERIFY THAT IT SET PROPERLY 3. CLEAR THE BIT AND VERIFY THAT IT CLEARED PROPERLY 4. REPEAT 1 THRU 3 UNTIL ALL BITS ARE TESTED ANY ERRORS DETECTED ARE REPORTED AND THEN THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE. ERRORS: kR 1.) ERROR FAIL 6 IS CALLED TO REPOORT BOTH FAIL TC SET PROPERLY AND TO CLEAR PROPERLY FAULTS. SYNC: TEERR 1.) FAIL TO SET: 2.) FAIL TO CLR: M7277 SH4 M7277 SH& LOAD LPR H LOAD BCR H EP2 FU1 DEBUG: (22222 1.) 2.) 3.) 4.) THE ONLY DIFFERENCES BETWEEN THEE DATA PATHS USED BY THIS TEST AND THAT USED BY THE PREVIOUS TESTS ARE THE ACTUAL ''SSR' REGISTER CHIPS AND THE INPUT PIN SELECTED ON THE OUTPUT DATA MULTIPLEXORS. IF ALL BITS FAIL IT IS MOST LIKELY THE M7277 IF BITS <13:08> FAIL IT IS MOST LIKELY THE M7279 IF JUST ONE OR TWO BITS FAIL IT IS MOST LIKELY THE M7278 KEY LOGIC: 123222222224 % M7277 SH4 LOAD SSR LOW BYTE H M7279. SH2 M7278 SH5 - SH8 LOAD SSR HIGH BYTE H DATA TO BUS H DATA SOURCE (A,B,C) H SSR <13:08> H CR1 CP2 EN2 DuU1,DU2.DT2 (E20 AND E24) REGISTER CHIPS ES53,E68, OR E69 (74175'S) OUTPUT MUX CHIPS - (74151'S PIN 12) 100077) CZDHM-D-0 CZDHMD P11 3570 357 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 004016 004024 004026 004032 004036 004042 004044 004046 004050 004052 004054 004056 004064 004066 004070 004074 004076 MACY11 30A(1052) 012737 010102 062702 012705 004052 09-MAR-78 15:32 030537 001003 006305 001435 10-MAR-78 110 001110 000016 000001 027672 1%: 2%: N11203 vcu304 001403 004100 004104 004737 104006 004106 004110 004116 004120 004122 004126 004130 005004 012761 040512 011203 042703 020304 001745 004132 004136 004140 004737 104006 000741 3%: 000000 000004 077700 024412 000000 077700 024412 ADD MOV BNE ASL BEQ BR RS ST 1% ;INIT BIT TEST MARKER ;TEST THIS BIT ?? s8R IF YES ;SHIFT BIT MARKER ;:BR IF ALL BITS TESTED ;GO TEST THE BIT CLR MoV BIS MOV BIC CMP BEQ (R2) #0,LPR(R1) RS, (R2) (R2) ,R3 #77700,R3 ;SET UP S/B DATA ;INIT REG BEING TESTED ;SCOPE SYNC ;SET THE SELECTED BIT IN ''SSR" ;GET THE WAS DATA :CLEAR OUT DON'T CARE BITS JSR PC,SUER2 6 ;GO SET UP ERROR INFO CLR MOV R4 #0,BKR(R1) RS, (R2) ;SET UP §/B DATA BIT MoV ERROR 000014 4%: ;SET UP THE ERROR LOOP RETURN #3% ,SLPERR R1,R2 #SSR,R2 #1,R5 MOV MOV 000772 010504 005012 012761 050512 7 6 08:05 PAGE 87 TEST THAT ALL R/W BITS IN ''SSR'" CAN BE SET/CLR BIC MOV R5,RGMSKS 3% 4% (R2) ,R3 BIC CMP BEQ #77700,R3 R3,R4 JSR ERROR BR PC,SUER2 6 2% 2% ;GENERATE ''SSR'' ADDRESS IN R2 ;DID BIT SET 0K ;BR IF YES ;SSR BIT FAILED TO SET PROPERLY ;SCOPE SYNC ;CLEAR SSR BIT ;GET THE SSR WAS DATA ;CLEAR JUNK BITS ;DID THE SSR BIT GET CLEARED ?? :BR IF SSR BIT CLEARED 0K ;GO SET UP ERROR INFO :SSR BIT FAILED TO CLR PROPERLY ;60 SELECT NEXT BIT SEQ 0085 SEQ 0084 CZDHM-D-0 CZDHMD.P11 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 MACY11 30A(1052) 09-MAR-78 15:32 H 7 08:05 PAGE 88 TEST THAT CLR/SET GF BIT "N 10-MAR-78 T PR TEST THAT CLR/SET OF BIT ''N'" IN "LPR' DOES NOT CLEAR ANY OTHER BITS AR 000004 TST11: .REM RN RN RN RN RN R RO AR RN RN RN AR R AR R SCOPE 2 TEST ABSTRACT: (2222222202202 d THE THIS TEST VERIFIES THAT SETTING AND CLEARING EACH R/W BIT IN "'LPR'" REGISTER DOES NOT DISTURB (CLEAR) ANY OTHER BIT IN THE REGISTER. A BIT MASK (RGMSK3: 177767) IS USED TO DEFINE THE R/W BITS (ALL BUT BIT 03). R5 ALWAYS CO:TA]NS THE BIT CURRENTLY SELECTED FOR TEST. IS AS FOLLOWS: 1. SELECT 4. SET THE TEST SEQUENCE A BIT TO TEST 2. SET ALL THE WRITABLE BITS 3. CLEAR THE SELECTED BIT - VERIFY IT CLEARED PROPERLY THE 5. REPEAT 1 SELECTED BIT - VERIFY IT SET PROPERLY THRU 4 UNTIL ALL BITS ARE TESTED ANY ERRORS DETECTED ARE REPORTED AND NEXT BIT IN SEQUENCE . THEN THE TEST RESUMES WITH THE ERROR & IS CALLED TO REPORT BOTH FAIL FAIL TO SET PROPERLY FAULTS. TO CLEAR PROPERLY AND ERRORS: (222828 1.) SYNC: LA 2222 1.) FAIL TO CLR: 2.) FAIL TO SET: M7277 M7277 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 P2 DEBUG: LA2222 1.) PROBLEMS DETECTED BY THIS TEST INDICATE ADJACENT BIT INTERFERENCE CAUSED BY CROSS TALK OR NOISE. PROBLEM IS MOST LIKELY THE M7278. KEY LOGIC: (SAME AS FOR TEST 6) 2222222222 004200 004176 012737 010102 062702 012705 030537 001003 006305 001436 000772 004200 004204 013704 005012 027666 004144 004152 004154 004160 004164 004170 004172 004174 00000¢ 000001 027666 001110 4 18: 2%: 38: SEQ 0086 SEQ 0085 LR LR L T T T e PR PR +TEST N 004142 IN "LPR" DOES NOT CLEAR ANY OTHER BITS MoV Mov ADD MoV BIT BNE #3%,SLPERR R1,R2 #LPR,R2 #1,R5 R5,RGMSK3 3$ ;SET UP THE ERROR LOOP RETURN ;SET UP THE REG ADDR Mov CLR RGMSK3,R4 (R2) ;SET UP S/B DATA ;INIT REG BEING TESTED ASL BEQ BR RS TST12 1% ;INIT BIT TEST MASK ;TEST THIS BIT ?? ;BR IF YES ;SHIFT THE BIT TEST MASK ;.BR IF TESTED ALL BITS ;GO TEST THIS BIT l, MACY11 30A(1052) 004206 004214 004216 004222 004224 004226 004230 112761 040504 013712 040512 011203 020304 001404 000000 004232 004236 004240 004737 104004 000754 004242 004244 004252 004254 004256 004260 050504 CZDHM-D~0 CZDHMD PN 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 004262 004266 004270 09-MAR-78 15:32 112761 050512 104004 000740 TM 000016 024412 000000 7 08:05 PAGE 89 TEST THAT CLR/SET OF BIT "'N'' IN "LPR'' DOES NOT CLEAR ANY OTHER BITS MOVB BIC MOV BIC MOV CMP BEQ 027666 011203 020304 001744 004737 10-MAR-78 JSR ERROR BR 000017 4%: BIS MOVB BIS MoV CMP BEQ 024412 JSR ERROR BR #0,SSR(R1) R5,R4 RGMSK3, (R2) RS, (R2) (R2) ,R3 R3,R4 4% ;SCOPE SYNC ;CLR BIT "N" sSET ALL R/W BITS IN LPR ;CLEAR BIT ''N'* IN LPR ;GET THE WAS DATA ;DID IT CLEAR 0K ? ;BR IF YES PC,SUER?2 ;GO SET UP ERROR INFO 2% ;GO TEST NEXT BIT 4 ;BIT "N'' FAILED TO CLR PROPERLY R5.R4 #0,SSR+1(R1) R5, (R2) (R2) ,R3 ;SET BIT "N'' IN S/B DATA 2% ;BR IF YES s SCOPE SYNC ;SET BIT "N'" IN LPR ;GET THE WAS DATA ;DID BIT "'N'' SET PROPERLY ? PC,SUER2 ;GO SET UP ERROR INFO 2% ;G0 SELECT NEXT BIT 4 ;BIT ''N'' FAILED TO SET PROPERLY SEQ 0087 SEQ 0086 CZDHM-D-0 CZDHMD.P11 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3730 3732 3733 3734 3735 3736 30A(1052) 09-MAR-78 15:32 7 J 08:05 PAGE 90 TEST THAT CLR/SET OF BIT "'N'' IN "'BKR'' DOES NOT CLEAR ANY OTHER BITS 10-MAR-78 112 R R R ;*TEST 12 AR 004272 TST12: .REM 000004 R R R TR AR AR R AR RN R AR RN R N R AR R R R AR AR RN R RN AR RN AR SCOPE b4 TEST ABSTRACT: 2222322202222 3 ] THIS TEST VERIFIES THAT CLEARING AND SETTING EACH R/W BIT IN THE BREAK CONTROL REGISTER INDIVIDUALLY DOES NOT DISTURB ANY OF THE OTHER BITS. A BIT MASK (RGMSK4: 177777) IS USED TO DEF INE THE R/W BITS (ALL 16.). R5 ALWAYS CONTAINS THE BIT CURRENTLY SELECTED FOR TEST. THE TEST SEQUENCE IS AS FOLLOWS: . NN — . SELECT A BIT TO TEST . . . SET ALL WRITABLE BITS IN THE ''BKR" CLEAR THE SELECTED BIT AND VERIFY THAT IT CLEARED PROPERLY SET THE SELECTED BIT AND VERIFY THAT IT SET PROPERLY REPEAT 1 THRU 4 UNTIL ALL BITS HAVE BEEN TESTED ANY ERROR DETECTED IS REORTRD AND THEN THE NEXT BIT IN SEQUENCE. TEST RESUMES WITH THE ERRORS: L2220 323 1.) ERROR 5 IS CALLED TO REPORT BOTH CLEAR AND SET FAULTS. SYNC: KRREE 1.) FAIL TO CLR: 2.) FAIL TO SEY: M7277 M7277 SH4 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 P2 DEBUG: k kAR 1.) LIKE THE PREVIOUS TEST, FAILURES HERE INDICATE ADJACENT BIT INTERFERENCE CAUSED BY CROSS TALK OR NOISE. LIKELY THE M7278 MODULE. KEY LOGIC: THE FAULT IS MOST (SAME AS FOR TEST 7) 12282222224 004274 004302 004304 004310 004314 004320 004330 004322 004324 004326 012737 010102 062702 012705 030537 001003 006305 001436 000772 004330 004334 013704 040504 027670 00001¢ 060001 027670 001110 b4 18: 2%: 38: SEQ 0088 SEQ 0087 TEST THAT CLR/SET OF BIT ''N'" IN "BKR'' DOES NOT CLEAR ANY OTHER BITS VIS 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 37N 3712 3713 3714 3715 3716 3717 3718 3719 MACY11 MoV MoV ADD MoV BIT BNE ASL BEQ BR mov BIC #3%,SLPERR R1,R2 #BKR,R2 #1,R5 R5,RGMSK4 3s R5 TST13 1% sINIT BIT TEST MASK ;TEST THIS BIT 22 :BR IF YES sSHIFT THE BIT TEST MASK ;:BR IF TESTED ALL BITS ;GO TEST THIS BIT RGMSK4 , R4 ;SET UP S/B DATA ~ RS5.Ré ;SET UP THE ERROR LOOP RETURN ;SET UP THE REG ADDR ;CLR BIT 'N" CZDHM-D-0 CZDHMD.P11 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 3758 MACY11 30A(1052) 09-MAR-78 15:32 004336 004340 004344 004352 004354 004356 004360 005012 013712 112761 040512 011203 020304 001404 004362 004366 004370 004737 004372 004374 004402 004404 004406 004410 050504 004412 004416 004420 104005 027670 000000 10-MAR-78 T12 050512 104005 000740 ;INIT REG BEING TESTED sSET ALL R/W BITS IN BKR ;SCOPE SYNC 000016 JSR ERROR BR gC.SUERZ ;GO SET UP ERROR INFO ;BIT "N'" FAILED TO CLR PROPERLY BIS MOovB BIS MOV CMP BEQ R5.R4 #0,SSR+1(R1) RS, (R2) (R2) ,R3 2% ;DID BIT "N'' SET PROPERLY ? :PR I¥ YES JSR ERROR BR 2C.SUER2 /GO SET UP ERROR INFO BIC Mov CMP BEQ 024412 000000 011203 020304 001744 004737 (R2) RGMSK4, (R2) #0,SSR(R1) R5,(R2) (R2) ,R3 R3,R4 4% CLR MoV MovB 000754 112761 K PAGE 91 08:05 TEST THAT CLR/SET OF BIT "'N'' IN "BKR'' DOES NOT CLEAR ANY OTHER BITS 024412 000017 4%: 2% 2% ;CLEAR BIT ''N'" IN BKR ;GET THE WAS DATA ;DID IT CLEAR OK ? ;BR IF YES ;GO TEST NEXT BIT ;SET BIT "'N'' IN S/B DATA :SCOPE SYNC ;SET BIT "N'" IN BKR sGET THE WAS DATA BIT *'N'' FAILED TO SET PROPERLY /:GO SELECT NEXT BIT SEQ 0089 SEQ 0088 CZDKHM-D-0 CZDHMD .P11 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3m 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 MACY11 30A(1052) 09-MAR-78 15:32 P LR LR R R R ;*TEST 13 004422 ¢ 2004 R T TR T e SEQ 0090 SEQ 0089 Ay TEST THAT CLR/SET OF BIT "N'' IN ''SSR'* DOES NOT CLEAR ANY OTHER BITS R AR TST13: .REM SCOPE 4 R RN R RPN R RN R AR TEST ABSTRACT: (1222222222220 3 3] THIS TEST VERIFIES THAT CLEARING AND SETTING EACH R/W BIT IN THE SILO STATUS REGISTER INDIVIDUALLY DOES NOT DISTURB ANY OF THE OTHER BITS. A BIT MASK (RGMSK5: 100077) IS USED TO DEF INE THE R/W BITS (15,5,4,3,2,1, AND 0). R5 ALWAYS CONTAINS THE BIT CURRENTLY SELECTED FOR TEST. THE TEST SEQUENCE IS AS FOLLOWS: 1. SELECT A BIT TO TEST 2. SET ALL WRITABLE BITS IN THE ''SSR"’ 3. CLEAR THE SELECTED BIT AND VERIFY THAT IT CLEARED PROPERLY 4. SET THE SELECTED BIT AND VERIFY THAT IT SET PROPERLY 5. REPEAT 1 THRU & UNTIL ALL BITS HAVE BEEN TESTED ANY ERROR DETECTED IS REORTRD AND THEN THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE. ‘ : ERRORS kRN ER 3785 1.) 3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 3810 3811 3812 3813 3814 e 08:05 PAGE 92 TEST THAT CLR/SET OF BIT "N'' IN "'SSR'* DOES NOT CLEAR ANY OTHER BITS 10-MAR-78 T13 ERROR 6 IS CALLED TO REPORT BOTH CLEAR AND SET FAULTS. SYNC: (22221 1.) FAIL TO CLR: 2.) FAIL TO SET: M7277 M7277 SH4 SHé4 LOAD LPR H LOAD BCR H EP2 FUl DEBUG: L2223 3] 1.) LIKE THE PREVIOUS TESY, FAILURES HERE INDICATE ADJACENT BIT INTERFERENCE CAUSED BY CROSS TALK OR NOISE. THE FAULT IS MOST LIKELY THE M7278 MODULE. KEY LOGIC: (SAME AS FOR TEST 10) (422220222 004424 004432 004434 004440 004444 004450 004460 004456 012737 010102 062702 012705 030537 001003 006305 001442 000772 004460 004464 013704 040504 027672 004452 004454 00001¢ 000001 027672 001110 L] #3$ ,SLPERR R1,R2 #SSR,R2 #1.R5 RS ,RGMSKS 3s RS ;SET UP THE ERROR LOOP RETURN ;SET UP THE REG ADDR 2%: Mov Mov ADD MoV BIT BNE ASL 38: MoV RGMSK5 ,R4 ;SET UP S/B DATA 18: BEQ BR BIC TST14 1% R5.R4 ;INIT BIT TEST MASK ;TEST THIS BIT 22 :BR IF YES sSHIFT THE BIT TEST MASK ;:BR IF TESTED ALL BITS ;GO TEST THIS BIT ;CLR BIT 'N" 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 MACY11 30A(1052) 09-MAR-78 15:32 004456 004470 004474 004502 004504 004506 004512 004514 005012 013712 012761 040512 011203 042703 020304 001404 004516 004522 004737 004524 104006 000752 004526 004530 004536 004540 004542 004546 004550 050504 012761 050512 011203 042703 020304 001740 004552 004556 004560 004737 104006 000734 027672 000000 10-MAR-78 113 000004 024412 077700 024412 CLR MoV MoV BIC MoV (R2) RGMSKS, (R?2) #0,LPR(R1) R5, (R2) (R2) ,R3 BEQ 4% BIC CMP 077700 000000 M 000014 48: 7 08:05 PAGE 93 TEST THAT CLR/SET OF BIT "N'" IN ''SSR'' DOES NOT CLEAR ANY OTHER BITS #77700,R3 R3,R4 sINIT REG BEING TESTED ;SET ALL R/W BITS IN SSR :SCOPE SYNC ;CLEAR BIT ''N'' IN SSR ;GET THE WAS DATA ;CLEAR JUNK BITS ;DID IT CLEAR OK ? ;BR IF YES JSR ERROR BR PC,SUER2 6 2% ;GO SET UP ERROR INFO BIS R5,R4 ;SET BIT "N'' IN S/B DATA MOV BIS #0,BKR(R1) R5, (R2) BIC CHP BEQ #77700,R3 R3,R4 2% JSR ERROR BR PC,SUER2 6 2% MoV (R2) ,R3 ;BIT "'N'* FAILED TO CLR PROPERLY ;G0 TEST NEXT BIT :SCOPE SYNC ;SET BIT "N'' IN SSR ;GET THE WAS DATA ;CLEAR JUNK BITS ;:DID BIT 'N'* SET PROPERLY ? :BR IF YES ;GO SET UP ERROR INFO ;BIT "'N'' FAILED TO SET PROPERLY ;GO SELECT NEXT BIT SEQ 0091 SEQ 0090 TM CZDHM-D-0 CZDHMD.P11 CZDHM-D-0 CZDHMD.P11 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 MACY11 30A(1052) 09-MAR-78 15:32 N 10-MAR-78 114 7 SEQ 0092 SEQ 0C91 08:05 PAGE 94 “CAR’* MEMORY ADDRESSING TEST ;:tt"t't"'t"".."tt""'.Q""""Qitittti"'tttlt."i'ttt'.t s*TEST 14 AR 004562 000004 TST14: .REM “'CAR"* MEMORY ADDRESSING TEST R R R RN R AR RN R RN R RN R AR R RS SCOPE 2 TEST ABSTRACT: (2333222222222 2] THIS TEST VERIFIES THAT EACH LOCATION IN THE CURRENT ADDRESS MEMORY CAN BE UNIQUELY ADDRESSED. IT WRITES THE PATTERN SHOWN BELOW INTO THE MEMORY AND THEN READS BACK EACH LOCATION TO VERIFY THAT IT WAS WRITTEN CORRECTLY. SINCE THE MEMORY LOGIC IS PARTITIONED INTO FOUR 16 X 4 READ/WRITE MEMORY CHIPS, THE PATTERN RESULTS IN THE LINE NUMBER (00 - 17(8)) BEING WRITTEN AS DATA INTO TO EACH LOCATION 3852 3853 3854 3855 3856 3857 3858 3859 (00 - 17(8)) IN EACH CHIP. THAT IS: ....... Loc 17 = 17. MEMORY PATTERN: LOCATION 00 01 02 03 04 05 06 07 10 v 12 13 14 15 16 17 LOCO0O = 00, LOC 01 = 01, CONTENTS n 000000 010421 021042 031463 042104 052525 063146 073567 104210 125252 135673 146314 (BOTH OCTAL) 114631 156735 167356 rrreer ANY ERRORS DETECTED ARE REPORTED AND THEN THE TEST RESUMES CHECKING THEE NEXT LOCATION IN SEQUENCE UNTIL ALL 16. HAVE BEEN CHECKED. NOTE: THIS TEST ALWAYS CHECKS ALL 16. LINES REGARDLESS OF HOW THE LINE SELECTION PARAMETER WAS INITIALLY SET UP. 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 : ERRORS LA 22022 1.) ERROR 7 IS CALLED TO REPORT ANY LINES (LOCATIONS) THAT FAIL. THE FAILING LINE # IS INCLUDED AS PART OF THE ERROR HEADER MESSAGE. SYNC: L2222 A 1.) WRITE SYNC: M7277 2.) READ SYNC: M7277 SH& SH4 " LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 (P2 CZOHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 T4 3895 3896 3897 3898 3899 3900 3901 3902 3903 3904 3905 3906 3907 3908 3909 3910 3911 3912 3913 3914 3915 3916 3917 3918 8 08:05 PAGE 95 "CAR"" MEMORY ADDRESSING TEST SEQ 0093 SEQ 0092 DEBUG: LA AR A2 1.) ANALYZE THE ERROR REPORTS CAREFULLY ASKING THE FOLLOWING QUESTIONS: A. DOES THE FAULT AFFECT ONLY ONE LINE ? B. DOES THE FAULT AFFECT ONLY ONE 4-BIT DATA GROUP ? 1E <15:12>, <11:08>, <07:04>, OR <03:00> C. DOES ANY DATA AT ALL APPEAR TO BE WRITTEN ? 2.) IF ""A"" IS TRUE THEN SUSPECT AN ADDRESSING PROBLEM IN THE MEMORY ADDRESS MUX. 3.) IF "B" IS TRUE THEN SUSPECT A DATA MUX, UP-COUNTER, MEMORY, OR INVERTER CHIP PROBLEM. 4.) IF ""C'" IS TRUE SUSPECT A MEMORY WRITE TIMING PROBLEM. 5.) IN MOST CASES THE FAULT IS MOST LIKELY THE M7277 OR M7278. KEY LOGIC: Atk ARTY m7277 SH4 LOAD CA H DATA TO BUS H DATA SOURCE 004564 004566 004572 004600 004606 004612 004614 004620 004622 010102 062702 004624 004630 004636 153711 112761 010412 013737 012737 004737 000415 105737 001001 005004 000006 027312 177777 024544 001220 027312 030322 030322 000000 000016 1$: (A,B.C) E58-13 EN2 buU1,pU2,.DT2 SH5 MEMADD SOURCE SEL H CA MEM WRITE ENAB L E55-8 ES50-1 BUF ADDRS TO BUS H E33-1 (SHD BE LOW) 74157 MUX CHIPS E33,E27,E20 BITS<17:08> 764193 COUNTER CHIPS E19,E26,E32 BITS<17:08> 7489 MEMORY CHIPS E18,E25,E3! BITS<17:08> 7404 INVERTER CHIPS E30,E24,E17 BITS<17:08> SHS 74157 MUX CHIP E48 74157 DATA MUX CHIPS E13,E06 BI1TS<07:00> 74193 COUNTER CHIPS E12,E05 BITS<07:00> 7489 MEMORY CHIPS E11,E04 BITS<07:00> m7278 SH5 THRU SH8 74151 DATA MUX OUTPUT CHIPS (PIN 1 MOV ADD MOV [[0]") R1,R2 ;COPY IT IN R2 LINSEL ,STHP7 sSAVE LINE SELECT PARAMETER TSTB BNE CLR L INE JSR BISB MovBe Mov #CAR,R2 #-1,LINSEL PC,SELINE 3s ;SET UP REGADR IN R2 ;D0 ALL LINES FOR THIS TEST ;GO SELECT A LINE NO. ::BR IF DONE ALL SELECTED LINES ;DOING LINE 00 ? 2% :BR IF NOT LINE, (R1) #0,SSR(R1) R4, (R2) sSELECT A LINE :SCOPE SYNC R4 ;INIT TEST DATA :LOAD THE CAR REG. INPUT) CZDHM-D-0 CZDHMD.P11 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3963 3964 3965 3966 3967 3968 3969 3970 397N 3972 3973 3974 3975 3976 3977 3978 3979 MACY11 30A(1052) 004640 004644 062704 000760 010421 004646 004652 004654 004660 004662 004737 000434 105737 001001 005004 024544 004664 004670 004676 004700 004702 153711 112761 030322 000000 09-MAR-78 15:32 011203 020304 001412 10-MAR-78 114 3%: 030322 000017 4%: c 8 08:05 PAGE 96 "'CAR’" MEMORY ADDRESSING TEST ADD BR #10421,R4 1% sGENERATE NEW DATA ;GO DO NEXT LINE JSR BR TSTB BNE CLR PC,SELINE 7% LINE 4% ;GO SELECT A LINE NO. ::BR IF CHECKED ALL LINES ;DOING LINE 00 ? :BR IF NOT ;INIT S/B DATA BISB LINE, (R1) #0,SSR+1(R1) (R2) ,R3 5% sSELECT A LINE :SCOPE SYNC ;GET CONTENTS OF CAR ;WAS DATA 0K ? ;BR IF YES JSR JSR LINE PC,SUER2 RS, SUNUM ;GO SET UP ERROR INFO sSET UP LINE NO. IN MSG BUFFER Mov ERROR ;6$.SLPERR ;SET UP ERROR LOOP RETURN ;CAR ADDRESSING ERROR MOvB MoV CMP BEQ R4 R3,R4 004704 004710 004714 004716 004720 004726 004737 004537 030322 031155 012737 004730 004734 062704 000744 010421 5%: ADD BR #10421,R4 3% ;GENERATE NEW S/B DATA ;GO CHECK NEXT LINE 004736 004742 005037 000721 030322 6%: CLR BR LINE 1% sRESTART AT LINE 00 IF LOGCPING 004744 013737 001220 78: Mov $TMP7,LINSEL sRESTORE LINE SELECT PARAMETER 104007 024412 024636 004736 EM7+47 001110 027312 ;GO RESTART SEQ 0094 SEQ 0093 CZDHM-D=0 CZDHMD.P11 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 4010 40N 4012 4013 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 115 08:05 PAGE 97 "BCR’* MEMORY ADDRESSING TEST IR R s*TEST 15 AR 004752 000004 7ST15: LREM SCOPE R R A R AR R R R R R AR R R AR E RS R R R R R AR R AR R R RR X TEST ABSTRACT: 1222232322323 22 22 THIS TEST VERIFIES THAT EACH LOCATION IN THE BYTE COUNT MEMORY CAN BE UNIQUELY ADDRESSED. IT WRITES THE PATTERN SHOWN BELOW INTO THE MEMORY AND THEN READS BACK EACH LOCATION TO VERIFY THAT IT WAS WRITTEN CORRECTLY. SINCE THE MEMORY LOGIC IS PARTITIONED INTO FOUR 16 X & READ/WRITE MEMORY CHIPS, THE PATTERN RESULTS IN THE LINE NUMBER (00 - 17(8)) BEING WRITTEN AS DATA INTO TO EACH {.OCATION (00 - 17(8)) IN EACH CHIP. THAT IS: LOCO0 = 00, LOC 01 = 01, ....... Loc 17 = 17. MEMORY PATTERN: LOCATION CONTENTS 00 01 02 03 04 000000 010421 021042 031463 042104 10 104210 05 06 07 1 12 13 14 15 16 17 4014 4033 4034 4035 R "BCR'* MEMORY ADDRESSING TEST 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 R SEQ 0095 SEQ 0094 (BOTH GCTAL) 052525 063146 073567 114631 125252 135673 146314 156735 167356 177777 ANY ERRORS DETECTED ARE REPORTED AND THEN THE TEST RESUMES CHECKING THEE NEXT LOCATION IN SEQUENCE UNTIL ALL 16. HAVE BEEN CHECKED. NOTE: THIS TEST ALWAYS CHECKS ALL 16. LINES REGARDLESS oETuog THE LINE SELECTION PARAMETER WAS INITIALLY UP. SET ERRORS: LA222022 1.) ERROR 10 IS CALLED TO REPORT ANY LINES (LOCATIONS) THAT FAIL. THE FAILING LINE # IS INCLUDED AS PART OF THE ERROR HEADER MESSAGE. SYNC: L2823 21 1.) WRITE SYNC: M7277 2.) READ SYNC: M7277 SH4 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 (P2 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 115 E 8 08:05 PAGE 98 “'BCR'* MEMORY ADDRESSING TEST SEQ 0096 SEQ 0095 4036 DEBUG: 4038 2823 1.) ANALYZE THE ERROR REPORTS CAREFULLY ASKING THE FOLLOWING QUESTIONS: 4037 (22222} 4041 A. 4042 B. Agzg C. 4043 4 DOES THE FAULT AFFECT ONLY ONE LINE DOES THE FAULT AFFECT ONLY ONE ? 4-BIT DATA GROUP IE <15:12>, <11:08>, <07:04>, OR <03:00> ? DOES ANY DATA AT ALL APPEAR TO BE WRITTEN ? 4046 282: 2.) IF "A" IS TRUE THEN SUSPECT AN ADDRESSING PROBLEM IN THE MEMORY ADDRESS MUX. 4049 282? 3.) IF "B IS TRUE THEN SUSPECT A DATA MUX, UP-COUNTER, MEMORY, OR INVERTER CHIP PROBLEM. 28§§ 4&.) IF ''C'" IS TRUE SUSPECT A MEMORY WRITE TIMING PROBLEM. 2822 S.) IN MOST CASES THE FAULT 4056 4057 4058 4059 4060 KEY LOGIC: ARARRRAEEE M7277 SH4 28?; SHS 4064 4065 4066 M7278 4067 SH3 4068 4069 28;? SH4 ES5-8 BC MEM WRITE ENAB L BUF ADDRS TO BUS H BITS<15:08> ES7-4 E33-1 (SHD BE LOW) 74157 INPUT MUX CHIPS E18,.E19 BITS<07:00> 74157 INPUT MUX CHIPS E16,E17 74193 UP COUNTER CHIPS E24.E25 7489 MEMORY CHIPS E31,E32 7404 INVERTER CHIPS E39,E40 28;3 " 4080 004754 010102 4082 004762 013737 4090 4091 MEMADD SOURCE SEL H pU1,DU2,DT2 7404 INVERTER CHIPS E41,E42 28;$ 2833 FU2 EN2 764193 UP COUNTER CHIPS E27.E26 7489 MEMORY CHIPS E33.E34 4072 4073 4074 4075 4083 4084 4085 4086 4087 LOAD BC H DATA TO BUS H DATA SOURCE (A,B.C) 4063 4081 IS MOST LIKELY THE M7277 OR M7278. 004756 004770 004776 005002 005004 005010 005012 005014 005020 062702 000010 012737 004737 000415 105737 001001 177777 024544 027312 1%: 030322 005004 153711 112761 74151 DATA MUX OUTPUT CHIPS (PIN 1 INPUT) MOV R1,.R2 ;:COPY IT IN R2 Mov LINSEL,SThP?7 :SAVE LINE SELECT PARAMETER ADD 001220 027312 SH5 THRU SH8 MOV JSR BR TSTB BNE CLR 030322 000000 000016 2%: BISB MOVB #BCR,R2 #-1,LINSEL PC,SELINE 3s LINE 2% R4 LINE, (R1) #0,SSR(R1) :SET UP REGADR IN R2 :D0 ALL LINES FOR THIS TEST :GO SELECT A LINE NO. ::BR IF DONE ALL SELECTED LINES :DOING LINE 00 ? :BR IF NOT ;INIT TEST DATA ;SELECT A LINE ;SCOPE SYNC CZDHM-D-0 CZDHMD.P11 4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 MACY11 30A(1052) 09-MAR-78 15:32 005026 005030 005034 010412 062704 000760 005036 005042 005044 005050 005052 004737 000434 105737 001001 005004 024544 005054 005060 005066 005070 005072 153711 112761 011203 020304 001412 030322 000000 005074 005100 005104 005106 005110 005116 004737 004537 030322 031224 012737 024412 024636 005120 005124 062704 000744 010421 005126 005132 005037 000721 030322 005134 013737 001220 104010 10-MAR-78 115 ;LOAD THE BCR REG. ;GENERATE NEW DATA :GO DO NEXT LINE JSR BR PC.SELINE 7% ;GO SELECT A LINE NO. ;:BR IF CHECKED ALL LINES BNE CLR 4% R4 ;BR IF NOT ;INIT S/B DATA BISB MovB MoV CMP BEQ LINE, (R1) #0,SSR+1(R1) (R2) ,R3 R3,R4 5% ;SELECT A LINE s SCOPE SYNC ;GET CONTENTS OF BCR JSR JSR PC,SUER?2 R5,SUNUM ;GO SET UP ERROR INFO ;GO SET UP LINE NO. IN MSG BUFFER MOV #6% ,SLPERR 10 ;SET UP ERROR LOOP RETURN ;BCR ADDRESSING ERROR 5%: ADD BR #10421,R4 3s :GENERATE NEW S/B DATA ;GO CHECK NEXT LINE 6%: CLR BR LINE 1% ;RESTART AT LINE 00 IF LOOPING ;GO RESTART 7%: Mov S$TMP7 ,LINSEL ;RESTORE THE LINE SELECT PARAMETER 030322 TSTB 4%: L INE EM10+44 001110 027312 SEQ 0096 R4, (R2) #10421,R4 1% 3%: 000017 SEQ 0097 MoV ADD BR 010421 005126 F 8 08:05 PAGE 99 "BCR’" MEMORY ADDRESSING TEST ERROR LINE :DOING LINE 00 ? ;WAS DATA 0K ;BR IF YES ? CZDHM-D~0 CZDHMD.P11 MACY11 3CA(1052) 09-MAR-78 15:32 10-MAR-78 T16 6122 AR 4123 R AR R ;*TEST 16 4124 4125 4126 4127 G 8 08:05 PAGE 100 “"CAR’* REGISTER TEST - ALL 1'S /7 ALL 0'S = ALL LINES R 005142 000004 R RN R R R R R R R R R R R AR A AN RN AR R AR RN R AR R RNy "'CAR'* REGISTER TEST = ALL 1'S / ALL 0'S = ALL LINES R R R R R R R R R R AR AR RN AR R AR R R AR AR AR RN RNRRER TST16: SCOPE .REM 4 TEST ABSTRACT: 4128 2222222882222 4129 4130 613 4132 2}%2 THIS TEST VERIFIES THE ABILITY TO SET AND CLEAR ALL BITS IN ALL THE SELECTED LOCATIONS (LINES) OF THE CURRENT ADDRESS MEMORY. IT USES THE CONFIGURATION PARAMETER (LINSEL:) TO DEFINE WHICH LINES TO TEST. THE TEST SEQUENCE IS AS FOLLOWS: 4135 4136 4137 4138 4139 1. 2. 3. 4. 5. 2}2? SELECT A LINE # TO TEST LOAD THE SELECTED LOCATION READ IT BACK TO VERIFY ALL LOAD THE SELECTED LOCATION READ IT BACK TO VERIFY ALL WITH BITS WITH BITS 177777 SET 000000 CLEARED 6. REPEAT STEPS 1 THRU 5 UNTIL ALL SELECTED LINES ARE TESTED. 4142 2}22 ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH THE NEXT LINE # IN SEQUENCE AS DEFINED .BY ''LINSEL''. 4145 ERRORS: 4147 :}23 1.) 4150 SYNC: 4152 21%2 1.) WRITE 1'S: M7277 SH4 LOAD SSR LOW BYTE H CR1 2}22 2.) WRITE 0°'S: M7277 SH4 LOAD SSR HIGH BYTE H P2 4157 DEBUG: 4159 4160 KEY LOGIC: 4146 12222222} 4151 22222 4161 IS CALLED TO REPORT ALL DATA COMPARE ERRORS (REFER TO TEST 14) (32222322223 X 4165 4166 4167 005144 005146 005152 005156 010102 062702 004737 000443 4169 4170 4171 005164 005170 005174 153711 004537 030322 030322 024636 112761 010412 011203 020403 000000 4168 7 2222} 4158 4162 4163 4164 ERROR 005160 2};% 005176 4174 4175 4176 4177 005200 005206 005210 005212 012704 000006 024544 1%: 177777 MOV ADD JSR BR R1,R2 #CAR,R2 PC,SELINE TST17 ;COPY IT INTO R2 :R2 GETS CAR ADDRESS ;GO SELECT A LINE NO. ;:BR IF DONE ALL SELECTED LINES BISB JSR LINE LINE, (R1) R5,SUNUM ;SELECT A LINE NO. ;GO SET UP LINE NO. MOV 031155 (REFER TO TEST 14) #-1,R4 ;RESULT IN CAR S/B = 177777 IN MSG BUFFER EM7+47 000016 2%: MOVB MoV MOV CMp #0,SSR(R1) R4, (R2) (R2),R3 R4 ,R3 sSCOPE SYNC :LOAD A CAR WITH ALL ONES ;GET THE WAS DATA FROM THE CAR ;DID IT CONTAIN ALL ONES ?? SEQ 0098 SEQ 0097 CZDHM-D-0 CZDHMD.P11 4178 6179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 41N 4192 6193 MACY11 30A(1052) 09-MAR-78 15:32 005214 001406 005216 005222 005230 004737 012737 005232 005234 005242 005244 005240 005004 112761 010412 011203 001741 005250 005254 005262 005264 004737 012737 104007 000732 104007 024412 005200 000000 024412 005232 10-MAR-78 T16 001110 000017 001110 08:05 PAGE H 8 "CAR'* REGISTER TEST - ALL 1'S / ALL 0'S = ALL LINES BEQ 3% ;:BR IF ALL 1°'S JSR MOV PC,SUER2 ;Zi.SLPERR ;GO SET UP ERROR INFO ;SET UP ERRCR LOCP RETURN ;FAILED TO SET ALL 1'S IN SELECTED CAR CLR Move R4 #0,SSR+1(R1) ;RESULT IN CAR S/8 = 000000 ;SCOPE SYNC ERROR 3%: 101 MoV MOV BEQ R4, (R2) (R2) ,R3 sCLEAR SELECTED CAR +GET THE WAS DATA ;BR IF CAR GOT CLEARED JSR PC,SUER2 ;3S.SLPERR ;GO SET UP FOR ERROR CALL ;SET UP ERROR LOOP RETURN ;FAILED TO CLR ALL BITS IN SELECTED CAR ;GO TEST NEXT LINE MoV ERROR BR 1% 1% SEQ 0099 ScQ@ 0098 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 117 8 1 08:05 PAGE 102 "BCR'* REGISTER TEST - ALL 1'S /7 ALL 0'S - ALL LINES 4194 IR 4195 ;*TEST 17 4196 4197 4198 4199 R R 000004 R N R R R R R R AT R RN R AR R AR RN AR RN R AR RN RN RN "BCR'* REGISTER TEST - ALL 1'S / ALL 0'S - ALL LINES AR 005266 R R R R R A R R R R R R RN AR AR AR R R AR R AR R RA R RN TST17: SCOPE .REM 2 TEST ABSTRACT: 4200 2222222222222 4201 4202 THIS TEST VERIFIES THE ABILITY TO SET AND CLEAR ALL BITS IN 4203 4204 2382 ALL THE SELECTED LOCATIONS (LINES) OF THE BYTE COUNT MEMORY. IT USES THE CONFIGURATION PARAMETER (LINSEL:) TO DEFINE WHICH LINES TO TEST. THE TEST SEQUENCE IS AS FOLLOWS: 4207 4208 4209 1. SELECT A LINE # TO TEST 4. 5. LOAD THE SELECTED LOCATION WITH 000000 READ IT BACK TO VERIFY ALL BITS CLEARED 2. LOAD THE SELECTED LOCATION WITH 177777 3. READ IT BACK TO VERIFY ALL BITS SET 4210 4211 2%}% 6. REPEAT STEPS 1 THRU 5 UNTIL ALL SELECTED LINES ARE TESTED. 4214 ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH THE NEXT 6217 4218 4219 2552 ERRORS: AARRANRR 4222 SYNC: 25}2 LINE # IN SEQUENCE AS DEFINED BY ''LINSEL". 1.) 4223 ERROR 10 IS CALLED TO REPORT ALL DATA COMPARE ERRORS KRR 4224 2532 1.) WRITE 1'S: M7277 SH4 LOAD SSR LOW BYTE H CR1 23%; 2.) WRITE 0°'S: M7277 SH4 LOAD SSR HIGH BYTE H cP2 4229 DEBUG: 4231 4232 KEY LOGIC: 4230 (22222 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 252? 222220222 005270 005272 005276 005302 005304 005310 005314 005320 005322 4246 005324 4248 005334 4247 4249 (REFER TO TEST 15) 010102 062702 004737 000443 012704 153711 004537 030322 4 000010 024544 18: 177777 030322 024636 031224 112761 005332 010412 005336 020403 011203 (REFER TO TEST 15) Mov ADD JSR BR Mov BISB JSR L INE R1,R2 #BCR,R2 PC,SELINE TS120 #-1,R4 LINE, (R1) RS ,SUNUM ;COPY IT INTO R2 ;R2 GETS BCR ADDRESS ;G0 SELECT A LINE NO. ;:BR IF DONE ALL SELECTED LINES ;RESULT IN BCR S/B = 177777 sSELECT A LINE NO. ;GO SET UP LINE NO. IN MSG BUFFER MOVB #0,SSR(R1) :SCOPE SYNC MoV (R2),R3 ;GET THE WAS DATA FROM THE BCR EM10+44 000000 000016 2%: MoV CMP R4, (R2) R4 ,R3 ;LOAD A BCR WITH ALL ONES ;DID IT CONTAIN ALL ONES ?? SEQ 0100 SEG 0099 CZDHM-D-0 CZDHMD . P11 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 MACY11 30A(1052) 09-MAR-78 15:32 005340 001406 005342 005346 005354 004737 012737 005356 005360 005366 C0537¢C 005372 005004 112761 010412 011203 001741 005374 005400 005406 005410 004737 012737 104010 000732 104010 10-MAR-78 17 024412 005324 001110 000000 000017 024412 005356 001110 3%: 08:05 PAGE 103 "BCR'* REGISTER TEST - ALL 1'S / ALL 0°'S - ALL LINES BEQ 3s 2:0R IF ML V'S JSR MoV ERROR PC,SUER2 #2% ,SLPERR 10 ;GO SET UP ERROR INFO sSET UP ERROR LOOP RETURN ;FAILED TO SET ALL 1'S IN SELECTED BCR CLR R4 ;RESULT IN BCR S/B = 000000 JSR MOV ERROR BR PC,SUER2 #3%,SLPERR 10 1% ;GO SET UP FOR ERROR CALL ;SET UP ERROR LOOP RETURN ;FAILED TO CLR ALL BITS IN SELECTED BCR ;G0 TEST NEXT LINE MovB MOV MOV BEQ #0,SSR+1(R1) R4, (R2) (R2) ,R3 1% ;SCOPE SYNC ;CLEAR SELECTED BCR ;GET THE WAS DATA ;BR IF BCR GOT CLEARED SEQ 0101 SEQ 0100 CZDHM-D-0 CZDHMD.P11 4266 4267 4268 6269 4270 427 4272 4273 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 120 PAGE 104 LR s+TEST 20 005412 LR 1S720: -REM 000004 8 SEQ 0102 "CAR’* MEMORY PATTERNS TEST /7 0'S DISTURB PR P K T SEQ 0101 T e "'CAR'" MEMORY PATTERNS TEST 7/ 0'S DISTURB e T L e T e Y e L SCOPE 4 TEST ABSTRACT: 1223323232223 31 4274 THIS TEST VERIFIES THAT WHEN A TEST PATTERN IS WRITTEN INTO LOCATION "*N'' GF THE '‘CAR'' MEMORY, IT DOES NOT DISTURB ANY BITS IN ANY OTHER LOCATIONS. THERE ARE THREE TEST PATTERNS USED* (177777, 125252, 052525) FOR EACH LOCATION SELECTED BY THE CONFIGURATION PARAMETER ''LINSEL'. THE TEST SEQUENCE IS AS FOLLOWS: 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310 4311 6312 . REPEAT 2 THRU 5 UNTIL ALL SELECTED LINES TESTED . REPEAT 1 THRU 6 UNTIL ALL THREE PATTERNS TESTED wvisS N = 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4313 6314 4315 4316 4317 4318 4319 4320 4321 NOY 4285 SELECT A TEST PATTERN SELECT A LINE # TO TEST CLEAR ALL 16. LOCATIONS IN THE MEMORY WRITE THE TEST PATTERN INTO THE SELECTED LOCATION VERIFY THAT THE PATTERN WAS WRITTEN CORRECTLY AND THAT NO OTHER LOCATIONS WERE DISTURBED. ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH CHECKING THE NEXT LINE IN SEQUENCE. ERRORS: 12222231 1.) ERROR 46 IS CALLED TO REPORT ANY ERROR DETECTED. THE INFORMATION PRINTED INCLUDES THE LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE PATTERN USED. SYNC+ L2252 4 1.) WRITE LINE: M7277 SH& LOAD SSR LOW BYTE H CR1 2.) READ CHECK: M7277 SH4 LOAD SSR HIGH BYTE H cP2 DEBUG: (REFER TO TEST 14) 1288241 KEY LOGIC: (REFER TO TEST 14) L3233 3322 31 005414 005416 005422 005426 010102 062702 005432 005434 005440 005442 012705 012537 001472 004737 000772 113737 005450 105037 X 000006 027330 001204 024544 030322 001210 R1,R2 #CAR,R2 #PATRNA RS (R5)+,$TMP1 ;SET UP REGADR 18: MoV ADD MOV MOV 11$: JSR PC,SELINE GO SELECT A LINE TO TEST CLRB $TMP3 030324 2s: BEQ BR MOVB 157121 1$ LINE,LINEA :SET UP POINTER TO DATA PATTERNS *GET A DATA TEST PATTERN ::BR IF DONE THREE PATTERNS :BR IF DONE ALL SELECTED LINES :SAVE THE LINE NO. FOR ERROR LOOPING ;INIT LINE COUNTER CZDHM-D-0 CZDHMD.P11 4322 4323 6324 4325 4326 4327 4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 120 3%: 005454 005460 005462 005466 005474 113711 005012 105237 123727 001367 001210 001210 005476 005502 030324 005510 113711 112761 013712 005514 005520 005524 105037 013704 001206 001204 001206 000000 000017 001206 030322 005554 113711 112761 011203 123737 001401 005004 001210 000000 001204 024500 024636 005602 105237 122737 001707 001206 000020 005606 005614 005616 104046 000740 005450 STMP3, (R1) (R2) $THP3 sSELECT A LINE TO CLEAR sCLR CAR FOR THAT LINE ;GENERATE NEW LINE NO. 3s :BR IF NOT INCB CMPB BNE 000016 MOVB MOVB MoV LINEA, (R1) sSET LINE SELECT BITS $TMP1, (R2) ;LOAD CAR WITH TEST PATTERN CLRB $THP2 $TMP1,R4 $TMP2, (R1) #0,SSR+1(R1) INIT A LINE COUNTER ;SET UP S/B DATA sSET LINE SELECT IN SCR s SCOPE SYNC JSR JSR PC,SUER4 R5,SUNUM ;GO SET UP ERROR IN FO ;GO SET UP LINE NO. IN MSG BUFFER MoV #2% ,SLPERR sSET UP ERROR LOOP RETURN INCB CMPB BEQ BR $TMP2 #20,8THP2 118 33 ;GENERATE NEXT LINE NO. sDONE ALL LINES ? :BR IF YES ;GO CHECK NEXT LINE 4%: 5%: 004737 004537 001206 033776 012737 MOVB CLR 000020 020304 001412 005556 005562 005566 005570 005572 005600 08:05 PAGE 105 "'CAR’* MEMORY PATTERNS TEST /7 0'S DISTURB MOVB Mov CMPB BEQ CLR CMP BEQ $TMP2 EM46+63 001110 001206 MOV MOVB ERROR 6%: $TMP3,4#20 #0,SSR(R1) (R2) ,R3 $TMP2,LINE 5% R4 R3,R4 6% 46 ;DONE CLEARING ALL LINES ? s SCOPE SYNC ;GET WAS DATA ;IS THIS THE LINE WITH THE TEST PATTERN ;BR IF IT IS ;MAKE S/B DATA = 000000 ;CORRECT DATA IN CAR ? :BR IF YES ; INCORRECT DATA READ FROM CAR SEQ 0103 SEQ 0102 CZDHM-D-0 CZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 121 08:05 PAGE 106 ““BCR'* MEMORY PATTERNS TEST / 0'S DISTURB 4354 R 4355 ;«TEST 21 4356 4357 4358 4359 L SEQ 0104 SEQ 0103 e e e e e s **‘BCR'" MEMORY PATTERNS TEST 7/ 0°'S DISTURB Te e e e e e s 005620 000004 TST21: SCOPE .REM X TEST ABSTRACT: 4360 2222222222222 4361 4362 4363 ' THIS TEST VERIFIES THAT WHEN A TEST PATTERN IS WRITTEN INTO LOCATION “'N'' OF THE '‘BCR'' MEMORY, IT DOES NOT DISTURB ANY BITS IN ANY OTHER LOCATIONS. THERE ARE THREE TEST PATTERNS USED+t (177777, 125252, 052525) FOR EACH LOCATION SELECTED BY THE CONFIGURATION PARAMETER ''LINSEL''. THE TEST SEQUENCE IS AS FOLLOWS: 4364 4365 2329 [ 4368 1. SELECT A TEST PATTERN 43569 2. SELECT A LINE # TO TEST 4370 43N 4372 4373 4374 2;;2 3. CLEAR ALL 16. LOCATIONS IN THE MEMORY 4. WRITE THE TEST PATTERN INTO THE SELECTED LOCATION ~ 5. VERIFY THAT THE PATTERN WAS WRITTEN CORRECTLY AND THAT NO OTHER LOCATIONS WERE DISTURBED. 6. REPEAT 2 THRU 5 UNTIL ALL SELECTED LINES TESTED 7. REPEAT 1 THRU 6 UNTIL ALL THREE PATTERNS TESTED 4377 4378 4379 4380 ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH CHECKING THE NEXT LINE IN SEQUENCE. ERRORS : 4381 222222 4382 4383 4384 4385 4386 4387 1.) ERROR &7 IS CALLED TO REPORT ANY ERROR DETECTED. THE INFORMATION PRINTED INCLUDES THE LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE PATTERN USED. SYNC* 4388 32222 4389 2%3? 1.) WRITE LINE: M7277 SHé4 LOAC SSR LOW BYTE H CR1 2%3% 2.) READ CHECK: M7277 SH4 LOAD SSR HIGH BYTE H (P2 4394 DEBUG: 4396 4397 KEY LOGIC: 4395 ' 22222 4398 4399 4400 4401 4402 4403 4404 4405 4406 228; 4409 (REFER TO TEST 15) (2212222223 005622 005624 005630 005634 005640 005642 005646 005650 005656 010102 062702 012705 012537 001472 004737 000772 113737 105037 4 000010 027330 001204 9 024544 118: 030322 001210 030324 28: MOV ADD MOV MOV BEQ JSR BR MOVB CLRB (REFER TO TESTY 15) R1,R2 #BCR,R2 #PATRNA RS (R5)+,8THP1 TST22 PC,SELINE 1% LINE,LINEA $TMP3 ;SET UP REGADR :SET UP POINTER TO DATA PATTERNS :GET A DATA TEST PATTERN ::BR IF DONE THREE PATTERNS ;GO SELECT A LINE TO TEST :BR IF SELECTED ALL LINES :SAVE THE LINE NO. FOR ERROR LOOP ;INIT LINE COUNTER CZDHM-D-0 CZDHMD PN 4410 6411 4412 4413 4414 4415 64416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4634 MACY11 30A(1052) 09-MAR-78 15:32 3s: 113711 005012 105237 123727 001367 005704 005710 005716 113711 112761 030324 000000 001204 105037 001206 001204 001206 000000 000017 001206 030322 005674 005702 005722 005726 005732 005736 005744 005746 005754 005756 005760 005762 013712 013704 113711 112761 011203 123737 001401 005004 020304 001412 4436 004737 004537 001206 034176 012737 4440 4441 006010 006014 006022 006024 105237 122737 001707 000740 4437 4438 4439 121 005662 005666 005670 005764 005770 005774 005776 006000 006006 4435 1G-MAR-78 104047 001210 001210 001210 5%: 024500 024636 001206 LINEA, (R1) ;SELECT A LINE TO CLEAR ;CLR BCR FOR THAT LINE ;GENERATE NEW LINE NO. ;DONE CLEARING ALL LINES ? ;BR IF NOT ;SET LINE SELECT BITS s SCOPE SYNC sLOAD BCR WITH TEST PATTERN JINIT A LINE COUNTER ;SET UP S/B DATA sSELECT A LINE TO CHECK :SCOPE SYNC (CMPB BEQ CLR CHP BEQ $THP2 $TMP1,R4 $TMP2, (R1) #0,SSR+1(R1) (R2) ,R3 $TMP2,LINE 5% R4 R3.R4 6% JSR JSR PC,SUER4 RS, SUNUM ;GO SET UP ERROR IN FO ;GO SET UP LINE NO.IN MSG BUFFER MoV ERROR #28 ,SLPERR 47 ;SET UP ERROR LOOP RETURN ; INCORRECT DATA READ FROM BCR INCB CMPB BEO BR $THP2 #20,$THP2 ;GENERATE NEXT LINE NO. ;DONE ALL LINES ? ;BR IF YES ;GO CHECK NEXT LINE CLRB MOV MOvB move MOV $TMP2 EM4T+56 6$: $THP3, (R1) (R2) $STHP3 $TMP3,#20 3s #0,SSR(R1) $TMP1, (R2) MoV 4%: 001206 000020 MOvVB CLR MOVB MovB 000016 001110 PAGE 107 “BCR"* MEMORY PATTERNS TEST /7 0'S DISTURB INCB CMPB BNE 000020 005656 08:05 118 43 ;GET WAS DATA ;1S THIS THE LINE WITH THE TEST PAYYERN :BR IF IT IS ;MAKE S/B DATA = 000000 :CORRECT DATA IN BCR ? ;BR IF YES SEQ 0105 SEQ 0104 CZOHA-D-0 CZDHMD.P11 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4487 09-MAR-78 15:32 B 9 08:05 PAGE 108 "CAR’" MEMORY PATTERNS TEST 7 1'S DISTURB 10-MAR-78 122 SEQ 0106 SEQ 0105 RN R T RRRR RN AR RN RN, s*TEST 22 "'CAR"" MEMORY PATTERNS TEST / 1'S DISTURB AR ARRRRRARARRTARERSRERRERARROCRARRROORROCRRRRRRNARRARRORROEREROERNERTS 006026 7§122: 000004 .REM SCOPE I TEST ABSTRACT: 232228 222222228; ‘ THIS TEST VERIFIES THAT WHEN ALL ZEROS ARE WRITTEN INTO LINE 'N"' IN THE '‘CAR’* MEMORY, IT DOES NOT CLEAR ANY BITS IN ANY OTHER LOCATIONS. OgL:oTHS %INES SELECTED BY "'LINSEL' ARE TESTED. THE TEST SEQUENCE IS LLOWS: A . SELECT A LINE TO TEST . SET ALL ONES (177777) INTO ALL MEMORY LOCATIONS CLEAR THE SELECTED LINE . VERIFY THAT ONLY THE SELECTED LINE WAS CLEARED AND ALL OTHER LINES STILL CONTAIN 177777 5. REPEAT STEPS 1 THRU & UNTIL ALL SELECTED LINES ARE TESTED . 4445 4446 30A(1052) NN - 4442 4443 44kl MACY11 ALL ERRORS ARE REPORTED AND THEN THE LINE IN SEQUENCE. TEST RESUMES CHECKING THE NEXT ERRORS: LA A2 22 1.) ERROR 46 IS CALLED TO REPORT ALL ERRORS. THE INFORMATION PRINTED ;:g%ggss ;25 LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE U - SYNC: Tty 1.) WRITE LINE: M7277 SH4 LOAD SSR LOW BYTE H CR1 2.) CHECK LINE: M7277 SH4 LOAD SSR HIGH BYTE H P2 DEBUG: (REFER TO TEST 14) 122322 KEY LOGIC: (REFER TO TEST 14) (222222232 006030 006032 006036 006042 006046 006052 006054 006062 006066 006072 006074 006100 k4 000006 177777 00120¢ 024544 18: 030322 001210 0012 10 001 210 001210 2%: 3s: Mov ADD MoV R1,R2 #CAR,R2 #-1,R5 ;SET UP REGADR JSR PC,SELINE ;GO SELECT A LINE TO TEST Mov BR RS,.$THP1 TST123 MovB LINE,LINEA CLRB Move $TMP3 $TMP3, (R1) INCB $THP3 Mov CMPB RS, (R2) $TMP3,#20 ;TEST PATERRN IN RS = 177777 :SAVE FOR ERROR REPORTING ;:BR IF DONE ALL LINES ;SAVE THE LINE NO. FOR ERROR LOOP ;INIT LINE COUNTER sSELECT A LINE TO _CLEAR :LOAD CAR WITK 177777 ;GENERATE NEW LINE NO. ;DONE SETTING ALL LINES TO 177777 ? CZDOHMA=D~0 CZDOHMD.P11 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 MACY11 30A(1052) 09-MAR-78 15:32 006106 001367 006110 006114 006122 113711 112761 005012 030324 000000 006124 006130 105037 005004 113711 112761 001206 006132 006136 006144 006146 006154 006156 006160 006162 011203 123737 001401 010504 020304 10-MAR-78 122 000016 4%: 001206 000060 000017 001206 030322 5%: 001412 006164 006170 006174 006176 006200 006206 004737 004537 001206 033776 012737 024500 024636 006062 001110 006210 006214 006222 006224 105237 122737 001711 000741 001206 000020 001206 104046 9 08:05 PAGE 109 "'CAR’" MERORY PATTERNS TEST / 1'S DISTURB BNE 3s :BR I[F NOT MOVB MOVB CLR LINEA, (R1) sSET LINE SELECT IN SCR :SCOPE SYNC CLRB CLR MovB MOVB MoV CMPB BEQ Mov CMP BEQ $TMP2 R4 $TMP2, (R1) #0,SSR+1(R1) (R2) ,R3 6% :CORRECT DATA IN CAR ? :BR IF YES JSR JSR $TMP2 PC,SUER4 R5.,SUNUM :GO SET UP ERROR IN FO ;GO SET UP LINE NO. IN MSG BUFFER MOV ERROR #2%,SLPERR 46 ;SET UP ERROR LOOP RETURN s INCORRECT DATA READ FROM CAR INCB CMPB BEQ BR #20,8TMP2 1% (s $THP2 ;GENERATE NEXT LINE NO. ;DONE ALL LINES ? :BR IF YES ;G0 CHECK NEXT LINE EM46+63 6%: #0,SSR(R1) (R2) $TMP2,LINE 5% R5,R4 ;CLEAR THE CAR UNDER TEST INIT A LINE COUNTER sMAKE S/B DATA = 000000 sSELECT A LINE TO CHECK s SCOPE SYNC ;GET WAS DATA ;1S THIS THE LINE WITH THE TEST PATTERN sBR IF IT IS ;MAKE S/B DATA = 177777 SEQ 0107 SEQ 0106 CZDHM-D-0 CZDHMD.P11 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 9 D 08:05 PAGE 110 "BCR’" MEMORY PATTERNS TEST /7 1'S DISTURB 10-MAR-78 123 TR ;*TEST 23 “BCR'* MEMORY PATTERNS TEST / 1'S DISTURB R 006226 e TS123: .REM 000004 e R R R R R R R e R R R R SEQ 0108 SEQ 0107 SRR AR AR e L L R AR R e R AR R RO RS R e L SCOPE z TEST ABSTRACT: 1222222222220 22 THIS TEST VERIFIES THAT WHEN ALL ZEROS ARE WRiITTEN INTO LINE "N’ IN THE ''BCR'' MEMORY, IT DOES NOT CLEAR ANY BITS IN ANY OTHER LOCATIONS. ggL:OTHSUEINES SELECTED BY “'LINSEL'' ARE TESTED. THE TEST SEQUENCE IS : LL . . W - 4526 6527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 MACY'1 30A(1052) 09-MAR-78 15:32 SELECT A LINE TO TEST SET ALL ONES (177777) INTO ALL MEMORY LOCATIONS . CLEAR THE SELECTED LINE . VERIFY THAT ONLY THE SELECTED LINE WAS CLEARED AND ALL OTHER LINES STILL CONTAIN 177777 5. REPEAT STEPS 1 THRU & UNTIL ALL SELECTED LINES ARE TESTED ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES CHECKING THE NEXT LINE IN SEQUENCE. ERRORS: AR N 1.) ERROR 47 IS CALLED TO REPORT ALL ERRORS. THE INFORMATION PRINTED INCLUDES THE LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE PATTERN USED. SYNC: rraen 1.) WRITE LINE: M7277 SH4 LOAD SSR LOW BYTE H CR1 2.) CHECK LINE: M7277 SH4 LOAD SSR HIGH BYTE H (P2 DEBUG: (REFER TO TEST 15) L2823 2 KEY LOGIC: (REFER TO TEST 15) (2222222234 006230 006232 006236 006242 006246 006252 006254 010102 062702 012705 010537 004737 000465 113737 006262 006266 006272 006274 006300 105037 113711 010512 105237 123727 4 000010 177777 00120¢ 024544 030322 1%: 030324 001210 001210 001210 001210 2%: 38: 000020 Mov ADD MOV R1,R2 #BCR,R2 #-1,R5 JSR PC,SELINE . ;60 SELECT A LINE TO TEST CLRB MOVB $TMP3 ' $TMP3, (R1) ;INIT LINE COUNTER sSELECT A LINE TO_INIT INCB $TMP3 Mov BR Mmove Mov CMPB R5.,$TMP1 TST24 LINE,LINEA R5, (R2) $TMP3,#20 ;SET UP REGADR ;TEST PATERRN IN R5 = 177777 ;SAVE IT FOR ERROR REPORTING ;:BR IF DONE ALL LINES :SAVE THE LINE NO. ;LOAD BCR WITH 177777 ;GENERATE NEW LINE NO. ;DONE SETTING ALL LINES TO 177777 ? CZDHM-D-0 CZDHMD.P11 6582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 123 006306 001367 006310 006314 006322 113711 112761 005012 030324 000000 006324 006330 006332 006336 006344 006346 006354 006356 006360 006362 005004 113711 112761 011203 123737 001401 010504 020304 001412 105037 001206 001206 000060 006017 001206 030322 004737 004537 024500 024636 006364 006370 006374 006376 006400 006406 001206 034176 012737 104047 006410 006414 006422 006424 105237 122737 001711 000741 000076 001206 000020 4%: 3s :BR IF NOT MOVB LINEA, (R1) #0,SSR(R1) (R2) sSET LINE SELECT BITS ;SCOPE SYNC ;CLEAR THE BCR UNDER TEST CLRB CLR $ThP2 JINIT A LINE CGUNTER $TMP2, (R1) #0,SSR+1(R1) (R2) ,R3 ;SELECT A LINE TO CHECK ;SCOPE SYNC 6%: R4 ;MAKE S/B DATA = 000000 MOVB Move MOV CMPB BEQ MoV CMP BEQ $TMP2,LINE 5% JSR JSR PC.SUER4 R5,SUNUM ;GO SET UP ERROR IN FO MOV ERROR #2%,SLPERR 47 ;SET UP ERROR LOOP RETURN s INCORRECT DATA READ FROM BCR INCB CMPB BEQ BR $TMP2 #20,8THP2 1% 4% ;GENERATE NEXT LINE NO. ;DONE ALL LINES ? :BR IF YES $TMP2 EM4T7+56 001110 001206 BNE MOVB CLR 5%: 006262 9 E PAGE 111 08:05 “BCR"" MEMORY PATTERNS TEST / 1'S DISTURB R5,R4 R3,R4 6% ;GET WAS DATA ;1S THIS THE LINE WITH THE TEST PATTERN sBR IF IT IS ;MAKE S/B DATA = 177777 ;CORRECT DATA IN BCR ? ;BR IF YES ;GO SET UP LINE NO. IN MSG BUFFER ;GO CHECK NEXT LINE SEQ 0109 SEQ 0108 (ZDHM-D-0 CZOHMD.P11 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 4665 LR ;*TEST 24 000004 T T P e T Y TEST THAT "'CAR'* MEMORY EXT BITS SET/CLR PROPEKLY AR R R LR L R T R LR L LR R L TST24: SCOPE .REM X TEST ABSTRACT: (222222222222 2] THIS TEST VERIFIES THAT THE "EXT MEM'' BITS (CAR<17:16> CAN BE SET AND CLEARED IN ALL ''CAR'' MEMORY LOCATIONS. IT WRITES THE BINARY TEST PATTERNS (11, 01, AND 10) INTO BITS<17:16> TO CHECK EVERY MEMORY LOCATION. SWN) — 006426 R T SEQ 0110 SEQ 0109 THE TEST SEQUENCE IS AS FOLLOWS: . . . SELECT A TEST PATTERN TO USE CLEAR ALL 18 BITS IN ALL 16 LOCATIONS SELECT A LINE TO TEST WRITE THE TEST PATTERN INTO <17:16> OF THE SELECTED LOCATION . READ CHECK ALL LOCATIONS TO VERIFY THAT ONLY THE SELECTED LOCATION CONTAINS THE PATTERN . 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 R P 9 08:05 PAGE 112 TEST THAT ""CAR'* MEMORY EXT BITS SET/CLR PROPERLY W 4619 F 10-MAR-78 124 ~NO~ 4610 4611 4612 4613 4614 4615 4616 4617 4618 MACY11 30A(1052) 09-MAR-78 15:32 . REPEAT STEPS 3 THRU 5 UNTIL ALL SELECTED LINES TESTED . REPEAT STEPS 1 THRU 6 UNTIL ALL PATTERNS USED ALL ERRORS ARE REPORTED AND THEN THE LINE IN SEQUENCE. NOTES: TEST RESUMES CHECKING THE NEXT 1.) BITS<05:04> IN THE ''SCR'' ARE USED TO WRITE THE EXT MEM BITS 2.) BITS<07:06> IN THE "'SSR'' ARE USED TO CHECK BITS<17:16> : ERRORS L228888 1.) ERROR 7 IS CALLED TO REPORT ALL ERRORS SYNC: (222821 1.) WRITE CAR: 2.) READ CAR: M7277 SH4 LOAD LPR H EP2 M7277 SH4 LOAD BCR H FU2 DEBUG: L2228 1.) ASSUMING THAT THE PREVIOUS "'CAR'' MEMORY TESTS RAN ERROR FREE, THE PROBLEM IS EITHER THE M7277 OR THE M7278 2.) SET UP SCOPE ERROR LOOP AND START BACKTRACKING THROUGH THE LCGIC STARTING WITH THE KEY SIGNALS BELOW. KEY LOGIC: RRRRRRRRAE M7277 SHS SCRO5 H SCRO4 H SSRO7 H cD2 CE1 CF1 . CZDHM-D-0 CZDKMD M1 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 a7 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 124 9 6 08:05 PAGE 113 TEST THAT '‘CAR'" MEMORY EXT BITS SET/CLR PROPERLY SSR06 H 006430 010102 062702 012705 006432 006436 006442 006446 006452 012537 012537 001505 006454 006460 006464 006470 006474 006500 006504 006512 105037 142711 153711 142711 005061 105237 122737 001362 001210 000017 001210 000060 000006 001210 000020 006514 006520 006522 006526 006532 006540 004737 000750 153711 153711 012761 012761 024544 006546 006552 105037 013704 142711 153711 012761 016103 011203 042703 123737 001401 005004 020304 001412 001212 001206 000017 001212 000000 000006 004737 004537 001212 031155 012737 024412 024636 006454 001110 105237 122737 001212 000020 006556 006562 006566 006574 006600 006602 006606 006614 006616 006620 006622 006624 006630 006634 006636 006640 006646 006650 006654 006662 104007 001674 000016 027340 001204 001206 030322 001204 000000 000000 177477 030322 1%: SH7 NOTE: THER MAY BE A PRINT ERROR ON SH7 OF BEQ 2%: 3%: 301210 4%: 000004 000006 5%: 000014 6%: 001212 CLRB BICB BISB BICB CLR INCB CMPB BNE THE M7278. THE SIGNALS INTO THE MUX CHIPS E66 AND ES58 COME FROM THE M7277 SHS RATHER FROM M7279 SH3. R1,R2 #SSR,R2 #PATRNB,RS (RS)+,STHMP? (R5)+,8TMP2 TST25 ;SET UP REGADR ;SET UP POINTER TO DATA PATTERNS ;GET THE PATTERNS ;:BR IF DONE ALL PATTERNS $TMP3 sINIT A LINE COUNTER $TMP3, (R1) sSELECT A LINE IN SCR #17,(R1) JINIT LINE SELECT BITS IN ''SCR" #60, (R1) ;S0 WE CLEAR ALL THE MEM EXT BITS CAR(R1) ;CLEAR A CAR $TMP3 ;GENERATE NXT LINE NO. ;CLEARED THE WHOLE THING ? BISB BISB MOV MOV PC,SELINE 18 ;GO SELECT A LINE NO. ;BR IF DONE ALL LINES #0,LPR(R1) #0,CAR(RY) ;s SCOPE SYNC sWRITE EXT BITS IN THIS LOCATICN CLRB $TMP4 sINIT A LINE COUNTER BICB BISB #17,(R1) sINIT SELECT BITS IN ''SCR" #0,BKR(R1) ;SCOPE SYNC JSR MOV BIC CMPB BEQ CLR CMP BEQ 3% LINE, (R1) $TMP1, (R1) $TMP2.R4 $THMP4, (R1) CAR(R1) ,R3 (R2) .R3 #177477 ,R3 :BR IF NOT sSET UP LINE SELECT BITS ;SET UP MEM EXT BIT PATTERN ;SEY UP S/B DATA ;SET SELECT BITS IN SCR sREAD THE SELECTED ''CAR' ;GET THE WAS DATA sCLEAR JUNK BITS LINE,STHMP4 ;LINE UNDER TEST ?? 7% :BR IF YES 6% R& R3,R4 ;BR IF YES ;MAKE S/B DATA = 000000 ;WERE MEM EXT BITS CORRECT ? JSR JSR $TMP4 PC,SUER?2 ;GO SET UP ERROR INFO MoV #2%,8LPERR ; :SET UP ERROR LOOP RETURN :MEM EXT BITS READ INCORRECTLY INCB CMPB BEQ $TMP4 #20,8TMP4 :GENERATE NXT LINE NO. ;DONE ALL LINES EM7+47 ERROR 7%: MUX CHIPS E66 AND ES8 (INPUT PIN 12) #20,8$TMP3 MoV MoV MOV 001212 CH1 M7278 MoV ADD MOV MoV MOV 74151 SEQ 0111 SEQ 0110 RS, SUNUM 2% ;GO SET LINE NO. ;BR IF YES IN MSG BUFFER (ZDHM-D-0 CZDHMD.P11 4722 006664 MACY11 30A(1052) 09-MAR-78 15:32 000732 10-MAR-78 124 H 9 PAGE 114 08:05 TEST THAT “"CAR"" MEMORY EXT BITS SET/CLR PROPERLY 5% ;GO CHECK NEXT LINE SEQ 0112 SEQ 0111 CZDHM-D~ ¢ CZDHMD.P11 30A(1052) 09-MAR-78 15:32 TeTEST 25 P 006666 R AR AR SEQ 0113 SEQ 0112 CONDITION DISABLED AR RRRRERERRREARARRRAA AR TEST INTR. ENAB. BITS = INTR. CONDITION DISABLED R R R e e P P T TR P TR e LRI LT SCOPE 4 TEST ABSTRACT: 2222222222023} THIS TEST VERIFIES THAT NO TRANSMITTER OR RECEIVER INTERRUPT OCCURS WHEN THE ENABLE BIT IS SET WITH OUT THE INTERRUPTING CONDITION ACTIVE. A BIT MASK (INTMSK: 030100) IS UESED TO DEFINE THE I.E. BITS. IN THES”SCR" (BITS 13, 12, AND 06). THE TEST SEQUENCE IS AS oIS wWmn — FOLLOWS: . . SET UP THE XMIT AND RCVR VECTORS SELECT AN [.E. BIT TO TEST INIT THE SP AND LOCK OUT INTERRUPTS . CLEAR THE PSW TO ALLOW INTRS . SET THE SELECTED BIT IN THE ''SCR" . 7. IF NO INTR: IF INTR: REPEAT 2 THRU 5 UNTIL ALL BITS TESTED REPORT ERROR AND CONTINUE WITH NEXT BIT TO TEST ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE . ERRORS: (2232221 1.) ERROR 11 IS CALLED TO REPORT RCVR INTR FAULTS 2.) ERROR 12 IS CALLED TO REPORT XMITTR INTR FAULTS SYNC: M7277 SH3 INIT A H EF2 L2 2221 DEBUG: L2282 2] 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 1.) PROBLEM IS MOST LIKELY THE M7289 MODULE IF 2.) FIRST TEST TO FAIL. THIS IS THE SET UP SCOPE ERROR LOOP AND BACKTRACK THROUGH THE LOGIC STARTING WITH THE KEY LOGIC BELOW. KEY LOGIC: 006670 - 006676 006700 006704 006710 006714 006716 — ) b b d d b NOWVILWNO WO N IS8 O==0000 4777 4778 R TST25: .REM 000004 4759 4773 4774 4775 4776 9 08:05 PAGE 115 TEST INTR. ENAB. BITS - INTR. PR R AR AR AR R AR AR R RN 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756 4757 4758 4771 4772 i 10-MAR-78 125 . 4723 4724 4725 4726 4727 4728 4729 4730 4731 MACY11 737 102 703 723 723 723 723 006746 027304 006776 03031¢ 007020 001110 % 08822 M7289 SHé6 XMIT INT REQ H RCV INT REQ H Mmov MoV Mov Mov MovB TSTB Mov #3$ ,SLPERR R1,R2 DHVCT ,R3 -#4%, (R3)+ DHRLVL, (R3) + (R3)+ #5%,(R3)+ FM1 DP1 ;SET UP THE ERROR LOOP RETURN ;MAKE IT REGADR TOO ;GET FIRST VECTOR ADDRESS ;G0 TO 3% IF RCVR INTRS ;UPDATE POINTER ;G0 TO 5% IF XMITTR INTRS CZDHM-D-0 CZDHMD.P11 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 479 4792 4793 479 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 481N 006722 006726 006732 006736 006740 006742 006744 006746 006752 006756 006762 006764 006766 006772 006774 MACY11 30A(1052) 09-MAR-78 15:32 113713 012705 030537 001003 006305 001437 000772 012706 004737 012711 010504 050511 004737 000240 030317 000001 027676 10-MAR-78 125 15: 2%: 001100 027164 3%: 004000 004737 011103 004737 104011 012716 000002 027150 007020 007024 007026 007032 007034 007040 004737 011103 004737 007042 007046 012706 004737 104012 012716 000002 027200 4%: 024416 006740 027200 5%: 024416 6%: INTR. J DHTLVL, (R3) #1,R5 ASL RS 6% 1% MOV JSR #STACK,SP BIT BNE BEQ BR RS, INTHMSK 3% PC,CHPS2 #BIT11,(R1) BIS JSR NOP BR R5,(R1) PC,CHPS1 JSR PC,SAPS JSR ERROR ?%.SUERZA MoV RTI #2%, (SP) JSR MoV PC,SAPS Mov RTI #28,(SP) MOV JSR #STACK,SP PC,RESTRP MOV 9 ENAB. BITS - MOVB MoV JSR ERROR 006740 001100 026770 TEST PAGE 116 MOV MoV 000761 006776 007002 007004 007910 007012 007016 08:05 2% (R1) ,R3 (R1) ,R3 PC,SUER2A 12 INTR. CONDITION DISABLED JINIT BIT TEST MARKER ;TEST THIS BIT ?2? :BR IF YES ;SHIFT THE MARKER ;BR IF TESTED ALL REQUIRED BITS ;GO TEST FOR THIS ONE ;RESET SP FOR ERROR LOOPING ;GO LOCK OUT INTRS ;CLEAR THE DH11 INTERFACE ;SET UP S/B DATA ;SET THE TEST I.E. BIT ;GO CLEAR PSW ;WAIT A BIT TO ALLOW INTR ;0K - GO DO NEXT I.E. BIT ;SAVE THE ERROR PSW ;GET THE WAS DATA ;GO SET UP ERROR INFO ;DH11 RCVR SHOULD NOT HAVE INTERRUPTED ;SET UP TO RETURN ;RETURN TO TEST NEXT BIT :SAVE THE ERROR PSW ;GET THE WAS DATA ;G0 SET UP ERROR INFO sXMITTER SHOULD NOT HAVE INTERRUPTED ;SET UP TO RETURN ;RETURN TO TEST NEXT BIT ;RESET THE SP JUST IN CASE ;GO RESTORE TRAP CATCHER IN VECTOR SEQ 0114 SEQ 0113 CZDHM-D-0 CZDHMD.P11 MACY?1 30A(1052) 09-MAR-78 15:32 10-MAR-78 126 08:05 PAGE 117 TEST CHAR. AVAIL. K 9 I.E. WITH INTR. CONDITION ACTIVE 4812 Re e e Y 4813 4814 4815 4816 4817 ;*TEST 26 TEST CHAR. AVAIL. I.E. WITH INTR. CONDITION ACTIVE ee R e Y TST26: SCOPE .REM b4 TEST ABSTRACT: 007052 000004 4818 222222222 222228} 4819 4820 4821 23%% THIS TEST USES MAINT. MODE (SCR09=1) TO SET THE CHAR AVAIL BIT (SCR7) TO GENERATE A RCVR INTERRUPT THROUGH THE PROPER VECTOR. THE TEST SEQUENCE IS AS FOLLOWS: 4824 4825 4826 4827 23%8 1. 2. 3. 4, S. SET UP THE VECTORS ISSUE DH11 ''MASTER CLR'',RESET THE SP, AND LOCK OUT INTRS PRIMT THE DH11 TO GENERATE A RCVR INTR CLEAR THE PSW TO ALLOW INTRS REPORT NO RCVR INTR OR FALSE XMITTR INTR. 4830 23%3 ALL ERRORS ARE REPORTED AND THEN THE TEST RESETS THE VECTOR AND SP AND CONTINUES TO THE NEXT TEST IN THE PROGRAM. 4833 ERRORS: 4834 2228822 4835 4836 1.) 2:;; 2.) 4839 4840 4841 4842 SYNC: ARRAE ERROR ERROR 13 12 M7277 IS CALLED TO REPORT XMITTR INTR FAULTS SH3 INIT A H EF2 DEBUG: 4843 232222 4844 4845 4846 4847 2323 1.) IF NO RCVR INTR OCCURRED THE PROBLEM IS EITHER SECTION ""A'" OF THE M7821 OR THE M7289 - SH6. 2.) IF A FALSE XMIT INTR OCCURRED THE PROBLEM IS MOST LIKELY THE M7821 GENERATING AN INCORRECT VECTOR ADDRESS. 4850 4851 4852 4853 4854 4855 4856 4857 4858 KEY LOGIC: FRRRRRRRAR M7289 SH6 M7821 SEC "'A"" BUS A BR L BUS SACK L BUS BG IN H "A"" MASTER L VECTOR BIT 02 H 2323 4861 NOTE: 4862 4863 232; 4866 4867 IS CALLED TO REPORT RCVR INTR FAULTS 012737 010102 007112 001110 ue 12 B1 N1 D2 REMEMBER THAT PROBLEMS IN THIS AREA COULD BE CAUSED BY ANY DEVICE IN THE SYSTEM INCLUDING THE ‘''CPU'. SYSTEM RE-CONFIGURATION TO ISOLATE THE FAULTY SuB- . 007054 007062 E31-12 SYSTEM MAY BE REQUIRED. MOV MOV #1%,SLPERR R1,R2 ;SET UP THE ERROR LOOP RETURN sMAKE IT REGADR TOO SEQ 0115 SEQ 0114 CZDHM-D-0 CZDHMD.P11 4868 4869 4870 4871 4872 4,873 4874 4875 4876 4877 4,878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4,898 4899 4900 4901 MACY11 30A(1052) 09-MAR-78 15:32 007064 007070 007074 007100 007102 007106 007112 007116 007122 007126 007132 007136 007142 007146 013703 012723 113723 105723 012723 113713 012711 012706 004737 012711 052711 052711 004737 000240 007150 007154 007156 007160 007162 007166 007172 007174 004737 011103 005011 005011 012704 004737 104013 000412 007176 007202 007204 007210 007212 007214 007220 004737 011103 012704 005011 005011 004737 027200 007222 007226 012706 004737 001100 026770 104012 10-MAR-78 126 027304 007222 030316 007176 030317 004000 001100 027164 001060 000100 000200 027150 1%: 08:05 PAGE 118 TEST CHAR. MoV MoV MovB TSTB MOV Move MOV MOV JSR MOV BIS BIS JSR NOP 027200 JSR Mov CLR CLR MoV 001300 024416 JSR ERROR BR 2%: 001300 024416 3s: JSR MOV MOV .9 AVAIL. WITH INTR. CONDITION ACTIVE :GET FIRST VECTOR ADDR DHVCT ,R3 #38,(R3)+ ;GO TO 3% IF RCVR INTRS #28,(R3)+ ;UPDATE POINTER ;GO TO 3% ON XMITTR INT®- DHRLVL, (R3)+ (R3)+ DHTLVL, (R3) #BIT11,(RT) #STACK,SP PC,CHPS2 #B1709,(R1) #BI1T06, (R1) #B1707, (R1) PC,CHPST PC,SAPS (R1) ,R3 (R1) (R1) #1300,R4 PC,SUER2A 13 3s PC,SAPS CLR CLR JSR ERROR (R1) ,R3 #1300,R4 (R1) (R1) PC,SUER2A 12 MOV #STACK,SP JSR I.E. PC,RESTRP :CLR THE DH11 sRESET THE SP FOR ERROR LOOPS ;GO LOCK OUT INTRS sSET MAINT MODE BIT ;SET CHAR AVAILABLE I.E. BIT sSET THE CHAR AVAIL BIT TO FORCE INTR ;GO CLEAR PSW ;GIVE IT A LITTLE TIME ;SAVE THE ERROR PSW ;GET THE WAS DATA ;CLEAR OUT THE SCR ;SET UP S/B DATA ;GO SET UP ERROR INFO ;TIMED OUT AWAITING CHAR AVAIL INTR ;GO EXIT TEST ;SAVE THE ERRCR PsSW ;GET WAS DATA ;SET UP S/B DATA :CLR OUT SCR REG ;GO SET UP ERROR INFO ;UNEXPECTED XMITTR INTR sRESET THE SP ;GO RESTORE TRAP CATCHER SEQ 0116 SEQ 0115 CZDHM-D-0 CZDHMD.P11 MACY11 20A(1052) 09-MAR-78 15:32 10-MAR-78 127 4902 4903 ;*TEST 27 e 007232 000004 4910 28}; TEST SILO OVFLW. [I.E. e et WITH INTR. CONDITION ACTIVE eR e ey 1 2. 3. 4. S. 23;3 4921 ERRORS: 4923 4924 . 4922 s TO ENABLE SILO FULL SET UP XMIT AND RCVR VECTORS RESET THE DH11 AND S.P. - THE LOCK OUT INTRS. PRIME DH11 TO GENERATE SILO FULL INTR. - ALLOW INTRS. REPORT ERROR IF NO RCVR. INTR OCCURS OR A FALSE XMIT INTR. DOES OCCUR AFTER REPORTING ANY ERRORS DETECTED RESET THE SP AND VECTORS THEN GO TO TEST 30 2222221 ERROR 43 23;2 2. 4927 SYNC: 4928 ERROR 12 ERERE 4929 4930 4931 4932 4933 4934 M7277 IS CALLED TO REF)"T NO RCVR INTR OCCURRED IS CALLED TO RE-_RT FALSE TRANSMITTER INTR. SH3 INIT A H EF2 DEBUG: ARRRERE 1. IF THE RECEIVER INTR FAILED TO INTERRUPT PROBLEM IS MOST LIKELY THE M7289 MODULE 2332 2. 4937 KEY LOGIC: 4938 IF A FALSE XMITTR INTR OCCURRED PROBLEM IS MOST LIKELY THE M7281 MODULE 2232222228, 4939 4940 4941 4942 4943 4946 4947 4948 4949 4950 4951 007234 007242 007244 007250 007254 007260 012737 010102 013703 012723 113723 105723 007272 4953 007266 113713 030317 4955 4956 4957 R THIS TEST USES MAINT. MODE (SCRO9=1) INTERRUPT. THE TEST SEQUENCE IS AS FOLLOWS: 4913 4914 4915 4916 4917 4918 4954 WITH INTR. CONDITION ACTIVE (222222223222 4909 4952 I.E. SEQ 0117 SEQ 0116 TST27: SCOPE .REM X TEST ABSTRACT 4908 4945 n9 e 4904 4905 4906 4907 08:05 PAGE 119 TEST SILO OVFLW. 007262 007272 007276 007302 007306 : 02730¢ 007402 030316 012723 007356 012711 004000 012706 004737 012711 001110 001100 027164 001000 M7289 SHG mM7821 "8’ SECTION MOV MOV MoV MOV MOVB TSTB #1$ ,SLPERR R1,R2 DHVCT ,R3 #3%,(R3)+ DHRLVL, (R3)+ (R3)+ MOVB DHTLVL, (R3) MOV 1%: MOV MOV JSR Mov E35,E50, OR E31 SCR 14 H (STORAGE) DS1 :SET UP THE ERROR LOOP RETURN sMAKE IT REGADR TOO sGET FIRST VECTOR ADDR :GO TO 3% IF RCVR INTRS #2%,(R3)+ ;UPDATE POINTER ;GO TO 2% ON XMITTR INTRS #BIT11,(RY1) ;CLR THE DH11 #STACK,SP PC,CHPS2 #BIT09, (R1) sRESET THE_SP FOR ERROR LOOPS ;GO LOCK OUT INTRS ;SET MAINT MODE BIT \ (ZDHM-D-0 LZDHMD .P11 4958 4959 4960 007312 007316 MACY11 30A(1052) 09-MAR-78 15:32 052711 052711 232; 007326 007322 004737 4963 007330 004737 4965 4966 007336 007340 005011 005011 4964 007334 000240 011103 10-MAR-78 127 040000 010000 BIS BIS 027150 JSR NOP 027200 4967 4968 4969 :g;? 007342 007346 007352 007354 012704 004737 104043 000412 051000 024416 4972 4973 4974 4975 4976 4977 23;8 007356 007362 007364 007370 007372 007374 007400 004737 011103 012704 005011 005011 004737 104012 027200 4980 4981 007402 007406 012706 004737 001100 026770 08:05 PAGE 120 TEST SILO OVFLW. 051000 024416 3%: 9 I.E. #BIT14,(R1) #BIT12, (R1) PC.CHPSIT WITH INTR. CONDITION ACTIVE ;SET SILO OVFLW I.E. BIT sSET THE SILO FULL BIT TO FORCE INTR ;GO CLEAR PSW ;GIVE IT A LITTLE TIME JSR PC,SAPS ;SAVE THE ERROR PSW CLR CLR (R1) (R1) ;CLEAR OUT THE SCR MoV 28: N (R1) ,R3 ;GET THE WAS DATA MoV JSR ERROR BR #51000,R4 PC,SUER2A 43 3% ;SET UP §S/B DATA ;GO SET UP ERRCR INFO ;TIMED OUT AWAITING SILO OVFLW INTR ;GO EXIT TEST JSR MoV MoV CLR CLR JSR ERROR PC,SAPS (R1),R3 #51000,R4 (R1) (R1) PC,SUER2A 12 ;SAVE THE ERROR PSW ;GET WAS DATA ;SET UP §/B DATA :CLR OUT SCR REG Mov JSR #STACK,SP PC,RESTRP ;RESET THE SP ;GO RESTORE TRAP CATCHER ;GO SET UP ERROR INFO ;UNEXPECTED XMITTR INTR SEQ 0118 SEQ 0117 (ZDHWA-D-] CZDHMD.P11 4982 4983 4984 4985 4986 4987 4988 4989 4990 499N MACY11 30A(1052) 09-MAR-78 15:32 8 10 10-MAR-78 750 03:05 PAGE 121 TEST NON EX MEM I.E. AR A AR SRR AR AR SeTEST 30 IR 007412 AR R AR AR WITH INTR. SEQ 0119 CONDITION ACTIVE SEQ 0118 ARl ARttt titd] TEST NON EX MEM I.E. RN R RPN WITH INTR. CONDITION ACTIVE RN AR R AR RN TR RO AR TST30: SCOPE 4 .REM TEST ABSTRACT: (00004 (23R 220200} THIS TEST VERIFIES THAT THE NON-EX-MEM BIT (SCR10) CAN CAUSE A TRANSH%TYER INTERRUPT VIA THE PROPER VECTOR. THE TEST SEQUENCE IS AS FOLLOWS: 1. SET UP XMIT AND RCVR VECTORS 2. 3. CLEAR THE DH11, RESET SP, AND LOCK OUT INTRS PRIME DH11 TO GENERATE XMIT INTR IN MAINT. MODE 5. REPORT ERROR IF NO XMIT INTR OCCURS OR IF 4. 6. ALLOW INTRS. A FALSE RCVR INTR OCCURS REST SP AND VECTORS THEN GO TO TEST 31 : ERRORS 122222 2] 1. ¥ ERROR 44 2. ERROR 11 SYNC: M7277 IS CALLED IF NON-EX-MEM FAILS TO GENERATE XMIT IS CALLED IF FALSE RCVR INTR OCCURS SH3 INIT A H INTR EF2 e DEBUG: (22222 1. 2. IF THE NON-EX-MEM INTERRUPT FAILS TO OCCUR PROBLEM IS MOST LIKELY THE M7289 MODULE IF A FALSE RCVR INTR OCCURS PROBLEM IS MOST LIKELY THE M7289 OR THE M7281 MODULES. KEY LOGIC: treRRERERY 5031 5032 5033 5035 5037 007414 007422 007424 007430 007434 007440 007442 007446 007452 007456 007462 007466 0 0 013703 0 1 007452 02730¢ 007536 030316 007562 030317 004000 001100 012711 001110 027164 001000 1$: M7289 SH6 MoV MoV MoV MoV Movs 1STB MoV Move #18,SLPERR R1,R2 DHVCT,R3 #2%,(R3)+ DHRLVL, (R3) + (R3)+ #38,(R3)+ DHTLVL, (R3) Mmov #STACK,SP MoV JSR Mov SCR 10 H (NO EX MEM) E35, E41, OR E48 #BIT11,(R1) PC,CHPS?2 #BIT09, (R1) FL1 ;SET UP THE ERROR LOOP RETURN ;MAKE IT REGADR T0O :GET FIRST VECTOR ADDR ;GO TO 2% IF RCVR INTRS ;UPDATE POINTER ;GO TO 3% ON XMITTR INTRS ;CLR THE DH11 ;RESET THE SP FOR ERROR LOOPS ;GO LOCK OUT INTRS ;SET MAINT MODE BIT (ZOHM-D-0 CZDHMD.P11 5038 007472 MACY11 30A(1052) 09-MAR-78 15:32 052711 5039 00747¢ 052711 282} 007506 000240 5043 5044 5045 5046 5047 5048 5049 007510 007514 007516 007520 007522 007526 007532 004737 011103 005011 005011 012704 004737 104044 5052 5053 5054 5055 5056 5057 gggg 007536 007542 007544 007550 007552 007554 007560 004737 011103 012704 005011 005011 004737 104011 5060 5067 007562 007566 012706 004737 5040 ggg? 007502 007534 004737 10-MAR-78 130 c10 08:05 PAGE 122 TEST NON EX MEM [.E. WITH INTR. CONDITION ACTIVE 020000 BIS #BIT13,(R1) ;SET XMITTR I.E. BIT 027150 JSR PC,CHPS1 ;GO CLEAR PSW 002000 BIS NOP 027200 023000 024416 000412 2%: 023000 024416 001100 026770 3s: sSET THE NON EX MEM BIT TO FCRCE INTR ;GIVE IT A LITTLE TIME JSR MoV CLR CLR MOV JSR ERROR PC,SAPS (R1) ,R3 (R1) sy #23000,R4 PC,SUER2A 44 ;SAVE THE ERROR PSW ;GET THE WAS DATA ;CLEAR OUT THE SCR JSR Mov MoV CLR CLR JSR ERROR PC,SAPS (R1),R3 #23000,R4 (R1) (R1) PC,SUER2A 11 ;SAVE THE ERROR PSW sGET WAS DATA ;SET UP S/B DATA :CLR OUT SCR REG MOV JSR #STACK,SP PC,RESTRP ;RESET THE SP ;GO RESTORE TRAP CATCHER BR 027200 #B1T710, (R1) 3s ;SET UP S/B DATA ;GO SET UP ERROR INFO ;TIMED OUT AWAITING NON EX MEM INTR ;GO EXIT TEST ;GO SET UP ERROR INFO sUNEXPECTED RCVR INTR SEQ 0120 SEQ 0119 CZDHM-D-0 CZDHMD.P11 5062 5063 5064 5065 5066 5067 5068 5069 5070 507 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 MACY11 30A€1052) 09-MAR-78 15:32 10-MAR-78 31 08:05 TEST XMITTR DONE AR ;+TEST 31 AR 007572 TST31: .REM 000004 D10 PAGE 123 AR R R RN R I.E. SEQ 0121 WITH INTR. CONDITION ACTIVE SEG 0120 AR AR AR RRERERRRETRTTRRRTRRTRRRRERRRARARRA AR R R RS TEST XMITTR DONE I.E. RN R R A R R AR WITH INTR. CONDITION ACTIVE R R RN R R R RN RN RO R R SCOPE 1 TEST ABSTRACT: 1232252222222 3 THIS TEST VERIFIES THAT XMIT DONE (SCR15) CAN BE SET IN MAINT. ?gDEST?OCAgSE A XMITTR INTR VIA THE PROPER VECTOR. THE TEST SEQUENCE $ LL 1. 2. 3. 4. 5. SET UP XMIT AND RCVR VECTORS CLEAR THE DH11, RESET SP, AND LOCK OUT INTRS PRIME DH11 TO GENERATE ''XMIT DONE'' INTR FALSE RCVR INTR OCCURS CLEAR PSW TO ALLOW INTRS REPOT ERROR IF XMITTR FAILS TO INTR OR A ERRORS: (322222 5084 5085 5086 5087 5088 5089 5090 5091 1. 2. ERROR 45 ERROR 11 SYNC: M7277 IS CALLED TO REPORT ''XMIT DONE'' INTR FAILED TO OCCUR IS CALLED TO REPORT FALSE RCVR INTRS SH3 INIT A H EF2 L22224 DEBUG: 'Q:'tt 5092 5093 5094 5095 1. 2. IF NO XMIT INTR OCCURS PROBLEM IS MOST LIKELY THE M7289 MODULE IF A FALSE RCVR INTR. OCCURS PROBLEM IS MOST LIKELY THE M7821 MODULE. KEY LOGIC: o """"""""c’c’c’SE 33 NOWVMS WOV~ B e N N wvivawviui i i s rRRRRRRESE 007574 007602 007604 007610 007632 4 027304 007716 03031¢ 007614 007620 007622 007626 007632 007636 007642 007646 007652 007656 001110 052711 007742 030317 004000 001100 027164 001000 020000 100000 18: M7289 SH6 Mov Mov MOV MOV #18,SLPERR R1,R2 DHVCT ,R3 #2%,(R3)+ MOVB 1ST8 Mov Move Mov Mov JSR MoV BIS BIS SCR 15 H (XMIT) FR2 E48, ESO DHRLVL, (R3)+ (R3)+ #33, (R3)+ DHTLVL, (R3) #BIT11,(R1) #STACK,SP PC,CHPS2 #B1709, (R1) #BIT13,(R1) #BIT15,(R1) ;SET UP THE ERROR LOOP RETURN ;MAKE IT REGADR TOO sGET FIRST VECTOR ADDR ;60 TO 2% IF RCVR INTRS ;UPDATE POINTER ;GO TO 3% ON XMITTR INTRS ;CLR THE DH11 ;RESET THE SP FOR ERROR LOOPS ;G0 LOCK QUT INTRS ;SET MAINT MODE BIT ;SET XMIT DONE I.E. BIT ;SET THE XMITTR DONE BIT TO FORCE INTR CZDHM-D~0 CZDHMD PN 5118 5119 5129 5121 5122 5123 5124 5125 5126 5127 5128 5129 5130 515 5132 5133 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 31 08:05 PAGE 124 E 10 TEST XMITTR DONE I.E. WITH INTR. 007662 007666 004737 000240 027150 JSR NOP PC,CHPST ;GO CLEAR PSW 007670 007674 007676 007700 007702 007706 007712 007714 004737 011103 005011 005011 012704 004737 1046045 000412 027200 JSR PC,SAPS (R1),R3 ;SAVE THE ERROR PSW :GET THE WAS DATA CLR CLR (:}; ;CLEAR OUT THE SCR 007716 007722 007724 007730 007732 007734 007740 004737 011103 012704 005011 005011 004737 104011 027200 007742 007746 012706 004737 001100 026770 MOV 121000 MoV 024416 JSR ERROR BR 2%: 121000 024416 3%: JSR MOV MoV CLR ( ;GIVE IT A LITTLE TIME #121000,R4 PC,SUER2A 45 ;SET UP S/B DATA ;GO SET UP ERROR INFO ;TIKED OUT AWAITING XMIT DONE PC,SAPS ;SAVE ::}; ;CLR OUT SCR REG 3% (R1) ,R3 #121000,R4 ;GO EXIT TEST THE ERROR PSW ;GET WAS DATA ;SET UP S/B DATA CLR JSR ERROR PC,SUER2A ;GO SET UP ERROR INFO MOV JSR #STACK,SP PC,RESTRP ;RESET THE SP ;GO RESTORE TRAP CATCHER 1" SEQ 0122 SEQ 0121 CONDITION ACTIVE ;UNEXPECTED RCVR INTR INTR CZDHM-D~0 CZDHMD.P11 MACY11 30A(1052) 09-MAR~-78 15:32 5140 ;*TEST 32 5142 5146 5147 5148 5149 ;:g? R 007752 000004 R A. B. C. D. F O O O O O O O 00 0o 00 Co Co % O Co 0o 00 VIS W =00V o NOI MW —=O 51 51 51 51 51 51 51 R R R T R R TR N R R R R RN R R AR R R E RN RN RS XMIT DONE (SCR15=1) SET 'BAR' BIT GOT CLEARED ''CAR'' REGISTER GOT INCREMENTED TO +1 'BCR' REGISTER GO INCREMENTED TO 0 12. REPEAT STEP 2 THRU 11 UNTIL ALL SELECTED LINES TESTED 13. AFTER TESTING ALL LINES CLEAR THE DH11, RESET THE VECTOR CLEAR PSW, RESET SP, AND GO TO TEST 33. 5177 5178 5179 5 R R R SET UP THE XKITTR VECTOR SELECT A LINE # TO TEST RESET THE SP CLEAR ALL LOCATIONS IN ''CAR'' AND 'BCR'' MEMORIES LOCK OUT INTRS AND CLEAR THE DH11 PRIME DH11 TO XMIT ONE CHAR FROM LOCATION O 9600 BAUD, 5-BITS, 1 STOP BIT 7. ACTIVATE SELECTED XMITTR AND ENABLE XMIT DONE INTR 8. CLEAR PSW TO ALLOW INTR. 9. ACTIVATE TIMER TO WAIT FOR XMIT DONE INTR 10. IF TIMEOUT OCCURS REPORT ERROR AND RESTART AT STEP 2 11. IF XMIT INTERRUPT OCCURS CHECK THE FOLLOWING CONDITIONS AND REPORT ANY ERRORS: ERRORS: g} R 1. 2. 3. 4. 5. 6. 5175 g} BASIC TRANSMITTER ''NPR'" LOGIC TEST 1 THIS TEST TRANSMITS A SINGLE BYTE FROM LOCATION O ON ALL SELECTED LINES (AS SELECTED BY THE CONFIGURATION PARAMETER "'LINSEL:'') ONE AT A TIME. THE TEST SEQUENCE IS AS FOLLOWS: 5171 5172 g};z 51 g} R R 2222222222222 5166 5167 5168 g}gg 51 SEG 0123 SEQ 0122 TST32: SCOFE -REM b4 TEST ABSTRACT: 5152 5153 5154 5155 5156 5157 5158 5159 5160 5161 5162 5163 ;}22 176 10 08:05 PAGE 125 BASIC TRANSMITTER ""NPR'" LOGIC TEST 1 RR R Y 5141 5143 5144 5145 F 10-MAR-78 132 (222222 S- ERROR 15 ERROR 14 IS CALLED IF XMIT DONE FAILS TO INTR ON TIME IS CALLED IF XMIT DONE NOT SET ERROR 14 ERROR 14 IS CALLED IF ‘'CAR'’ NOT INCREMENTED PROPERLY IS CALLED IF ''BCR'" NOT INCREMENTED PROPERLY ERROR 14 4, IS CALLED IF "'BAR' BIT FAILED TO CLEAR A%LEERROR MESSAGE HEADERS INCLUDE THE LINE NO. OF THE FAILING LINE. SYNC: M7277 SH3 INIT A H EF2 L2222 (NOTE: USE SR09=1 TO LOCK ON FAILING LINE AND SR13=1 TO INHIBIT ERROR PRINTOUT TO MINIMIZE SCOPE LGOP.} DEBUG: L2808 21 1. IF ALL LINES FAIL TO INTERRUPT ON TIME, SUSPECT LOSS OF 9600 BAUD (ZDHM-D-0 CZDHMD.P11 MACYT1 30A(1052) 09-MAR-78 15:32 10-MAR-78 132 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 2. 3. 4. G 10 08:05 PAGE 126 BASIC TRANSMITTER ''NPR' LOGIC TEST 1 SEQ 0124 SEQ 0123 CLOCK SIGNAL OR BYTE COUNT DECODER ON M7278 SH3 (XMIT FINISHED PULSE L) IF GROUP OF 8 LINES <15:08> OR <07:00> FAIL TO INTERRUPT ON TIME, SUSPECT THE BUFFERED CLOCK SIGNALS (TOP AND BOT) ON THE M7288 SH3 IF ONLY ONE LINE FAILS TO INTERRUPT ON TIME, SUSPECT LOSS OF CLOCK IN LINE MULTIPLEXORS M7288 SH4-SH11. IF LINE INTERRUPTED OK BUT ''SCR'', "'BAR', "CAR'‘, OR 'BCR'' WAS INCORRECT REFER TO KEY LOGIC SIGNALS BELOW. KEY LOGIC: (B222222221 XMIT DONE FAILED TO SET: M7289 M7278 SH6 SH3 SCR15 H FR2 XMIT FINISHED PULSE L AR1 "BAR"' BIT FAILED YO CLEAR: M7278 "'CAR'' REG NOT M7277 M796 SH3 SH5 SH6 SH7 SH8 CLR BAR BAR BAR BAR BAR <15:00> <15:12> H <11:08> H <07:04> H <03:00> H L ES54, E62, E70, E78, ES55 E63 E71 E79 (7474) (7474) (7474) (7474) INCREMENTED: SHé6 END CYCLE PULSE DLY H SH5 AND SH6 ‘"CAR'® MEMORY LOGIC FL?2 END CYCLE H P2 "BCR"* REG NOT INCREMENTED: 2 007754 007762 007766 007772 007776 010002 010006 012737 013703 062703 012723 113713 004737 000552 010010 027304 000004 010154 030317 024544 18: 010010 010014 010016 010022 010026 010032 010036 010042 010046 010054 010062 012706 010102 012704 153704 004737 004737 012711 153711 012761 012761 053761 001100 2%: 001110 120000 030322 024716 027164 004000 030322 177777 033500 027314 000010 000004 000012 M796 M7278 END CYCLE L N2 SH3 AND SH& ""BCR'' MEMORY LOGIC MoV Mov #2%,SLPERR DHVCT,R3 ;SET UP ERROR LCOP RETURN ;GET THE FIRST VECTOR ADDRESS JSR BR DHTLVL, (R3) PC,SELINE 8% ;GO SELECT A LINE NO. MoV MOV MoV BISB JSR #STACK,SP R1,R2 #120000,R4 LINE R4 PC,CLCABC ;RESET SP FOR ERROR LOOPS? sSET UP REGADR ;SET UP S/B DATA MoV MoV #-1,BCR(RT) #33500,LPR(R1) ;SET BYTE COUNT TO -1 ;SET UP LINE PARAMETERS ADD Mov MovB JSR Mov BISB BIS #4,R3 #48, (R3)+ PC,CHPS2 #BIT11,(R1) LINE, (R1) LINMSK,BAR(R1) ;POINT TO XMiTTR ENTRY ;GO TO 4% ON XMITTR INTR TO TEST ;BR IF TESTED ALL SELECTED LINES ;GO CLEAR CAR AND BCR MEMORIES ;GO LOCK OUT INTRS sCLEAR THE DH11 INTERFACE ;SELECT A LINE NO. ;ACTIVATE SELECTED LINE CZDHM-D-0 CZDHMD .P11 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 5266 5267 5268 5269 5270 527N 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 MACY11 30A(1052} 010070 010074 052711 004737 020000 027150 010100 010106 010112 010114 010120 012737 005037 000240 004737 000774 000001 030352 010122 010126 010130 010134 010140 010144 010146 004737 011103 042703 004737 004537 030322 031522 027200 010150 010152 09-MAR-78 15:32 027016 132 030350 3%: BIS JSR #BIT13,(R1) PC,CHPST sENABLE INTERRUPT ON XMIT DONE ;GO CLEAR PSW MoV #1,TIMEA TIMEB INIT TIMER A ;INIT TIMER B ;D0 NOTHING WAIT CLR NOP JSR BR EM15+43 104015 ERROR BR 000713 005711 010160 010164 010166 010172 010176 010200 004737 011103 004737 004737 010202 010206 016703 001413 000012 010210 010214 010220 010222 010226 010232 010234 004737 062702 005004 004737 004737 104014 000662 027200 000012 010236 010242 010246 016103 022703 001414 000006 000001 010250 010254 010260 010264 010270 010274 010276 004737 012704 062702 004737 004737 104014 000641 027200 000007 000006 024416 010372 010300 010304 016103 001636 000010 48: 100411 104014 H 10 08:05 PAGE 127 BASIC TRANSMITTER ''NPR'’ LOGIC TEST 1 JSR MOV BIC JSR JSR LINE 000200 024416 024636 010154 010156 10-MAR-78 027200 000700 5%: 024416 010372 6%: PC,SAPS (R1),R3 #B1107,R3 PC,SUER2A R5,SUNUM ;CALL TIMER ;TIMER ROUTINE WILL MOVE RETURN PC AROUND ;THIS BRANCH IF TIMEOUT OCCURS ;SAVE THE ERROR PSW ;GET THE WAS DATA ;WE'RE NOT INTERESTED IN THIS BIT ;GO SET UP ERROR INFO ;GO SET LINE NO. IN ERROR MSG 15 ;TIMEOUT WHILE AWAITING XMIT INTR ;GO TEST NEXT LINE 1% 5% (R1) ;DID XMIT DONE SET ?? ;BR IF YES JSR PC,SAPS JSR JSR ERROR BR PC,SUER2A PC,9% 14 s ;SAVE THE ERROR PSW ;GET THE WAS DATA ;GO SET UP ERROR INFO ;GO SET UP SOME ERROR STUFF MoV BAR(R1) ,R3 6% ;GET WAS DATA FROM ''BAR"’ JSR ADD CLR JSR JSR ERROR BR PC,SAPS #BAR ,R2 R4 ;SAVE THE ERROR PSW ;SET UP REGADR sSET UP S/B DATA ;GO SET UP ERROR INFO MoV CMP CAR(R1) ,R3 #1,R3 7% ;GET THE WAS DATA FROM CAR ;DID IT GET INCREMENTED ? ;BR IF YES JSR PC,SAPS #1,R4 :SAVE THE ERROR PSW ;SET UP S/B DATA ;SET UP REGADR ;GO SET UP ERROR INFO ;GO SET UP SOME ERROR STUFF BEQ BEQ MoV ADD 7%: 3% TST BMI MOV 024416 010372 PC,TIMEIT (R1) .R3 PC,SUER2A PC,9% 14 1% JSR JSR ERROR BR #CAR,R2 PC,SUER2A PC,9% 14 1% MoV BCR(R1),R3 BEQ 1% ;XMIT DONE FAILED TO SET ;GO TEST NEXT LINE ;BR IF BAR BIT GOT CLEARED ;GO SET UP SOME ERROR STUFF ;BAR BIT FAILED TO CLEAR ;GO TEST NEXT LINE INCREMENTED PROPERLY ;CAR REG NOT ;GO TEST NEXT LINE ;GET WAS DATA FROM BCR ;BR IF BCR GOT INCREMENTED TO 000000 SEQ 0125 SEQ 0124 CZDHM-D-0 CZDHMD.P11 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 010306 010312 010314 010320 010324 010330 010332 MACY11 30A(1052) 09-MAR-78 15:32 004737 005004 062702 004737 004737 104014 027200 000002 5326 062723 005013 004737 012706 000405 5326 5327 5328 5329 010372 010376 010400 010402 004537 030322 031454 000207 024636 004000 027304 000004 8%: 9%: PC,SAPS R4 ;SAVE THE ERROR PSW JSET UP S/B DATA PC,SUER2A PC,9% 14 1% ;GO SET UP ERROR INFO ;GO SET UP SOME ERROR STUFF ;BCR REG NOT INCREMENTED PROPERLY ;GO TEST NEXT LINE #BCR,R?2 MOV MoV ADD MOV ADD #BIT11,(R1) ;CLEAR THE DH11 sPOINT TO XMIT VECTOR JRESTORE TRAP CATCHER MOV BR #4,R3 R3,(R3) #2,(R3)+ (R3) PC,CHPS1 #STACK,SP CLR JSR 027150 001100 SEQ 0126 SEQG 0125 TEST 1 ADD JSR JSR ERROR BR 000623 012711 013703 062703 010313 110 08:05 PAGE 128 BASIC TRANSMITTER ''NPR' LOGIC JSR CLR 000010 024416 010372 010334 010340 010344 010350 010352 010356 010360 010364 010370 5323 10-MAR-78 132 DHVCT,R3 TST33 ;SET UP REGADR ;GET THE VECTOR ADDR ;GO CLEAR PSW JRESET THE STACK POINTER ;:G0 TO NEXT TEST JSR R5,SUNUM ;GO SET UP LINE NO. RTS PC sRETURN TO REPORT ERROR L INE EM14+44 IN MSG. (ZDHM-D-0 CZDHMD.P11 30A(1052) 09-MAR-78 15:32 SEQ 0127 SEQ 0126 ':ttt.tt""""'i"""'t""""t"'ti't.'.'.Qtttttlt.'t!ttlt't ;'TEST 33 P 010404 R iR TST33: -REM 000004 TRANSMITTR NPR LOGIC TEST 2 e L R e R SCOPE X TEST ABSTRACT: (2322222222200 2] THIS TEST IS SIMILAR TO TEST 32 EXCEPT THAT ALL LOCATICNS IN THE 'BCR" AND ‘‘CAR’'' MEMORIES ARE TESTED TO VERIFY THAT TRANSMISSION ON THE SELECTED LINE DID NOT DISTURB ANY UNSELECTED LOCATIONS IN THE MEMORIES. IF ALSO OPERATES IN “FLgG" MODE RATHER THAN USING INTERRUPTS. THE TEST SEQUENCE IS AS 5342 FOLLOWS: ~N OoOwvsSswnN - 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353 5354 5355 5356 5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 J 10 08:05 PAGE 129 TRANSMITTR NPR LOGIC TEST 2 10-MAR-78 133 R R 5330 £331 5332 5333 5334 5335 5536 5337 5338 5339 5340 5341 MACY11 SELECT A LINE # TO TEST (AS DEFINED BY "'LINSEL:'") CLEAR BOTH THE '‘CAR'* AND '‘BCR'' MEMORIES LOAD THE ''BCR''* MEMORY WITH ALL ONES (BYTE COUNT = -1) ACTIVATE THE XMITTER ON THE SELECTED LINE ACTIVATE TIMER TO WAIT FOR “‘XMIT DONE"’ IF '"XMIT DONE'* FAILS TO SET ON TIME - REPORT ERROR AND REPEAT 1 THRU 5 UNTIL ALL SELECTED LINES TESTED IF "XMIT DONE'' SETS CHECK ALL LOCATIONS IN THE 'BCR’' MEMORY REPORT ANY UNSELECTED LINES NOT CONTAINING -1 AND THE SELECTED 8. LINE IF IT DOES NOT CONTAIN O CHECK ALL LOCATIONS IN THE ‘'CAR'‘ MEMORY AND REPORT ANY UNSELECTED %8C¢I{ONS1NOT CONTAINING O AND THE SELECTED LINE IF IT DOES NOT 9. REPEAT STEPS 1 NTAIN +1. THRU 8 UNTIL ALL SELECTED LINES TESTED. : ERRORS (22222 24 1. ERROR 50 2. 3. ERROR 51 ERROR 51 SYNC: M7277 CALLED IF XMIT DONE SH3 INIT A H TIMEOUT ERROR DETECTED. CALLED IF "'BCR'® MEMORY ERROR DETECTED CALLED IF "'CAR'' MEMORY ERROR DETECTED EF2 L2222 DEBUG: L A2 A% 24 1. ASSUMING TEST 32 RAN ERROR FREE THE PROBLEM IS MOST LIKELY THE: M7278 MODULE IF ''BCR'' ERRORS M7277 MODULE IF '"'CAR'' ERRORS KEY LOGIC: (ARS8 010406 010414 010420 010422 010426 010432 012737 004737 000544 052711 004737 004737 010422 024544 004000 024716 024760 001110 4 1$: 2%: (SAME AS TEST 32) 0224 MoV #2% ,SLPERR ;SET UP ERROR LOOP RETURN BR BIS TST34 #BIT11,(RT) ;:BR IF DONE ALL SELECTED LINES ;CLEAR THE DH11 JSR JSR JSR PC,SELINE PC,CLCABC PC,LDBCR ;GO SELECT A LINE TO TEST ;GO CLEAR ''CAR'* AND "BCR'' MEMORIES ;GO LOAD ''BCR'* MEMORY WITH ALL ONES CZDHM-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 5386 5387 gggg 010436 010442 010450 153711 012761 013761 030322 033500 027314 5390 5391 5392 5393 5394 5395 010456 010464 010470 010472 010474 010500 012737 005037 005711 100423 004737 000773 000001 030352 5398 5399 56400 5401 5402 5403 5404 5405 5406 5407 g:gg 010502 010506 010510 010514 010520 010522 010526 010532 010534 010536 010540 004737 011103 012704 153704 010102 004737 004537 030322 034254 104050 000725 5410 010542 005037 gggg 001220 005037 001202 5422 5423 5424 5425 ;253 010612 010620 010622 010626 010632 013737 010102 062702 004737 104051 001220 5428 5429 5430 5431 5432 5433 gz;g 010634 010636 010642 010650 010652 010654 )10656 005004 016103 123737 001001 005204 020304 001416 5436 5437 5438 5439 5440 010660 010664 010672 010700 010702 005037 113737 013737 010102 062702 010706 004737 001220 177777 000010 030322 48: 5%: 001220 6$: 030322 000006 024500 sSELECT THE LINE ;SET UP PARAMETERS ;ACTIVATE XMIT ON SELECTED LINE MoV CLR TST BMI JSR BR #1,TIMEA TIMEB (R1) 43 PC,TIMEIT 3s INIT TIMER A ;INIT TIMER B XMITTR DONE YET :BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC JSR MoV PC,SAPS (R1) ,R3 #BIT15,R4 LINE,Ré R1,R2 PC,SUER2A R5,SUNUM :SAVE THE ERROR PSW ;GET THE WAS DATA ;SET UP S/B DATA 78: 001220 001202 001204 CLR Move MoV MoV CMPB BNE CLR CHP BEQ ;AROUND THIS BRANCH IF S$THP7 STHP7,(R1) #-1,R4 BCR(R1) ,R3 LINE,STHP7 6% R4 R3,R4 78 TIME OUT OCCURS ;MAKE REGADR = DEVADR ;GO SET UP ERROR INFO ;SET LINE NO. IN MSG ;TIMED OUT AWAITING XMIT DONE ON SEL LINE ;GO TRY THE NEXT LINE . sINIT A LINE COUNTER ;SELECT LINE NO. IN ''SCR" ;SET UP S/B DATA ;GET THE WAS BYTE COUNT ;WAS THIS THE ACTIVE LINE ?? :BR IF NOT :CHANGE S/B DATA 10 000000 ;WAS BYTE COUNT CORRECT ?? :BR IF YES $THPO :SAVE THE ACTIVE LINE NO. STMP7 ,$THP1 R1,R2 #BCR,R2 PC,SUER4 51 ;SAVE THE LINE NO. BEING CHECKED :SET UP REGADR = BCR REG ADDR CLR MoV CMPB BNE INC CMP BEQ Ré CAR(R1) ,R3 LINE,STMP? 8s R& R3,R4 9% ;SET UP S/B DATA ;GET THE WAS DATA ;IS THIS THE ACTIVE LINE :BR _IF NOT ;BUMP THE CAR ADDRESS FOR ACTIVE LINE ;CAR CONTENTS CORRECT ?? :BR IF YES CLR Move MoV Mov ADD JSR $THPO L INE,STMPO $TMP7,$THP1 R1,R2 #CAR,R2 ;SET UP ACT LINE NO. MOV MoV ADD JSR ERROR 8%: 001202 030322 001220 LINE, (R1) #33500,LPR(R1) LINMSK,BAR(R1) MovBe 001204 SEQ 0128 SEQ 0127 BISB MOV MoV CLR 001202 000010 024500 000006 030322 K 10 08:05 PAGE 130 TRANSMITTR NPR LOGIC TEST 2 MOV BISB MoV JSR JSR L INE EM50+53 ERROR 50 8R 18 024416 024636 010600 5441 3%: 100000 030322 56420 113737 030350 027200 010546 070552 010556 010562 010570 010572 010574 010576 010604 000004 000012 027016 5411 5412 5413 5414 5415 5416 5417 gz;g 5421 113711 012704 016103 123737 001001 005004 020304 001416 10-MAR-78 133 LINE,STHPO PC,SUER4 ;GO SET UP ERROR INFO ;BYTE COUNT INCORRECT :SAVE THE LINE NO. BEING CHECKED sSET UP REGADR ;SET UP THE ERROR INFO CZDHM-D-0 CZDHMD.P11 5442 5443 5444 5445 5446 5447 MACY11 30A(1052) 09-MAR-78 15:32 010712 104051 010714 010720 010726 010730 005237 022737 001707 000631 001220 000020 10-MAR-78 133 . 007220 9%: 08:05 PAGE 131 L 10 TRANSMITTR NPR LOGIC TEST 2 ERROR 51 ;CAR REG INCORRECT INC CMP BEQ BR STMP7 ;GENERATE NEW LINE NO. sTESTED ALL LINES ;BR IF NOT ;GO SELECT NEXT ACTIVE LINE #20,8TMP7 5% 1% SEQ 0129 SEQ 0128 CZDHM-D-0 CZDHMD.P11 5448 5449 5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 134 PR PAGE 132 010732 000004 LR R LR Rt TST34: -REM L e e e Y TEST THAT CHARACTER AVAILABLE CAN CAUSE RCVR INTERRUPT g L T T e T e e SCOPE 4 TEST ABSTRACT: 1223222222200 2] THIS TEST VERIFIES THAT WHEN "'CHAR AVAIL'' (BITO7 IN ‘'SCR'') SETS AS A RESULT OF XMITTING AND RECEIVING ONE CHARACTER (USING SILO MAINT MODE) IT cAuges A RCVR INTR VIA THE PROPER VECTOR. THE TEST SEQUENCE IS AS FOLLOWS: 1. 2. SET UP THE RCVR VECTOR LOCK OUT INTRS, RESET SP, AND CLEAR DH11 3. USE MAINT MODE TO LOAD A CHAR INTO THE SILO (DATA=125252) 6. 7. IF NO RCVR INTR OCCURS REPORT ERROR AND GO TO STEP 9 WHEN RCVR INTRS - CHECK SILO DATA FOR 125252 - IF NOT CORRECT REPORT ERROR AND GO TO STEP 9 CHECK THAT SILO FILL LEVEL=1 - IF NOT REPORT ERROR RESET SP, CLEAR PSW, RESET VECTOR, AND GO TO TEST 35 4. S. 8. 9. CLEAR PSW TO ALLOW INTERRUPTS ACTIVATE TIMER TO WAIT FOR INTR TO OCCUR ERRORS: 12222333 i & 3. ERROR 13 ERROR 52 ERROR 6 SYNC: M7277 IS CALLED TO REPORT RCVR TIMEOUT ERROR IS CALLED TO REPORT SILO DATA INCORRECT IS CALLED TO REPORT INCORRECT SILO FILL COUNT SH3 INIT A H EF2 1282 31 DEBUG: L2222 2] 1. 2. IF NOT RCVR INTR OCCURS SUSPECT THE M7277, M7281, CR M7279 MODULES IF SILO DATA OR FILL-ERRORS SUSPECT THE M7279 MODULE KEY LOGIC: 12223222223 M7279 5495 SH1 SILO DATA MUX'S (74157'S) SSR15 M CR1 SH2 DATA READY L NRC 15 H DV1 DL LOAD SILO L 5.068 MHZ (CLOCK) SSR <13:00> H DJ2 DN1 (E20,E24) DP1 SILO MEMORY 5496 5497 5498 5499 5500 5501 5502 5503 SEQ 0130 SEQ 0129 TEST THAT CHARACTER AVAILABLE CAN CAUSE RCVR INTERRUPT ;*TEST 34 P mn10 M7289 SH6 RCV INT REQ H M7278 SH8 SSR <03:00> H (E13,E17,E8,E3) 3341'S (ZDHA-D-0 CZDHMD.P11 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 55264 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 T34 08:05 TEST THAT CHARACTER AVAILABLE CAN CAUSE RCVR INTERRUPT SH7 010734 010742 010746 010752 010756 010762 010766 010772 011000 011004 011010 011014 011016 012737 013703 012723 113713 004737 012706 012711 052761 012711 004737 012703 005303 001376 010756 027304 011042 030316 027164 001100 004000 100000 000100 027150 001000 011020 011024 011026 011032 011036 011040 004737 011103 012704 004737 011042 011046 011052 011056 011060 016105 016103 012704 020304 001410 000016 000002 011062 011066 011072 011076 011100 004737 062702 004737 027200 000002 024416 011102 010503 1064013 1%: 000016 JSR 2%: 3%: 004737 062702 004737 104006 027200 000016 024416 011136 011142 011146 011150 011154 011156 011162 012706 004737 005011 013703 010313 062723 005013 001100 027150 027304 000002 DHVCT,R3 #3%, (R3)+ DHRLVL, (R3) PC,CHPS?2 ;SET UP THE ERROR LOOP RETURN ;GET FIRST VECTOR ADDR ;GO TO 3% ON RCVR INTERRUPT #STACK,SP ;GO LOCK OUT INTRS sRESET SP FOR ERROR LOOPS 2% ;ENABLE CHAR. AVAIL INTERRUPT ;GO CLEAR PSW JINIT TIMER ;DEC TIMER ;BR IF NO TIMEOUT #BIT11,(R1) #BIT15,SSR(R1) #BIT06, (R1) PC,CHPS1 #1000,R3 R3 ;CLEAR THE DH11 ;SET SILO MAINT. BIT TO LOAD SILO (R1) ,R3 #300,Ré PC,SUER2A 13 5% ;SAVE THE ERROR PSW ;GET THE WAS DATA ;SET UP S/B DATA ;GO SET UP ERROR INFO sCHAR AVAIL FAILED TO SET ON TIME ;ESCAPE FROM THIS TEST - CATASTROPHIC ERROR MoV MoV MOV SSR(R1) RS NRC(R1) ,R3 sSAVE THE SILO STATUS REG. ;GET THE WAS DATA ;SET UP S/B DATA #125252 R4 R3,R4 4% ;WAS = S/B = 125252 7? ;BR IF IT IS 52 5% :SAVE THE ERROR PSW ;SET UP REGADR ;GO SET UP ERROR INFO ;DATA COMPARE ERROR ;GET OuT RS.R3 #140377 ,R3 #400,R4 R3,R4 5% ;NOW GET THW SILO STATUS REG AGAIN :CLR OUT JUNK ;SET UP S/B DATA 1 2?2 ;SSR CHAR COUNT 1S R IR 1T JSR ADD JSR PC,SAPS #SSR,R2 :SAVE THE ERROR PSW ;SET UP REGADR ;SET UP ERROR INFO ;SSR COUNT NOT CORRECT MoV #STACK,SP PC,CHPST RESET THE STACK POINTER JSR JSR ERROR BR MoV BIC MoV CMP BEQ ERROR 5%: #1%,SLPERR PC,SAPS ADD 49: SSR <07:00> H MoV Mov CMP BEQ 000416 011120 011124 011130 011134 DEC BNE JSR ERROR BR 125252 011110 011114 011116 MoV JSR 000300 024416 140377 000400 JSR MoV MOV MoV 000436 104052 MOV MOV MOV MovB BIS 027200 042703 012704 020304 001407 011104 001110 N 10 PAGE 133 JSR CLR Mov MoV ADD (LR PC,SAPS #NRC ,R2 PC,SUERZA :C.SUERZA (R1) DHVCT,RS R3,(R3) #2,(R3)+ (R3) ;60 CLEAR PSW ;RESET I.E. BIT ;GET FIRST VECTOR ADDR JRESTORE TRAP CATCHER SEQ 0131 SEQ 0130 CZDHA-D-0 CZDHMD.P11 MACY11 30A(1052) 09~MAR~-78 15:%2 B N 08:05 PAGE 134 TEST THAT THE SILO STATUS REG COURTS UP CORRECTLY 10-MAR-78 135 5560 IR 5561 ;*TEST 35 5562 5563 5564 5565 R 011164 000004 R R R R P R R R P R R R RRR R RN RN R AR RN RN RN AR RN R TEST THAT THE SILO STATUS REG COUNTS UP CORRECTLY R RN R R R R A R RN R R PR R R R R R AR A RN R R RO RN NREE 2228222222228} 5567 5568 5569 gg;? THIS TEST VERIFIES THAT THE SILO FILL LEVEL COUNTS UP CORRECTLY WHEN ALL COUNTS (0-77) ARE TESTED BY LOADING THE SILO USING MAINT MODE. THE TEST SEQUENCE IS AS FOLLOWS: 5572 5573 5574 5575 5576 5577 5578 1. 2. 3. 4. 5. gg;g 5581 ERRORS: 5583 gggg ; % 5586 SYNC: 5582 INIT "STMP7'' TO START WITH A COUNT=01 CLEAR THE DH11 LOAD THE SILO WITH 125252'S IN MAINT MODE UNTIL # OF WORDS INDICATED BY THE COUNT ARE LOADED AFTER LOADING REQUIRED COUNT CHECK THAT FILL LEVEL BITS (SSR<13:08>) EQUAL COUNT ~- IF NOT REPORT ERROR INCREMENT COUNT IN ''STMP7'' AND REPEAT 1 THRU & UNTIL ALL COUNTS (01-77) HAVE BEEN TESED 222822 5587 ERROR 6 '$132] 5588 5589 5590 5591 ggg% M7277 IS CALLED TO REPORT SILO FILL LEVEL ERRORS SH3 INIT A H EF2 DEBUG: AARRRR 1. 5594 FAILURES IN THIS TEST MOST LIKELY INDICATE A BAD M7279 MODULE KEY LOGIC: 5595 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615 RR R TST35: SCOPE .REM b4 TEST ABSTRACT: 5566 5596 5597 5598 5599 5600 5601 5602 RN TEQ 0132 SEQ 0131 23222228223 011166 011170 011174 011202 011206 011212 011214 011220 011224 011226 011230 011234 011236 010102 062702 012737 012711 013705 005004 052712 012703 005303 001376 042712 005204 005305 4 000016 000001 004000 001220 100000 001000 100000 001220 1$: 2$: 38: M7279 SH2 SSR <13:08> LOAD SILO L DJ2 5.068 MHZ (CLGCK) DN1 DATA READY L DV1 MOV ADD MOV MOV MOV CLR BIS MoV DEC BNE BIC INC DEC R1,R2 : #SSR,R2 #1,8THP7 #BIT11,(R1) $TMP7 RS R4 #BIT15,(R2) #1000,R3 R3 3 #BIT15,(R2) R4 RS sMAKE REGADR = SSR ;START WITH COUNT OF 1 ;CLEAR THE DH ;SAVE CHARACTER COUNT BEING TESTED sINIT A CHAR COUNTER sSET THE SILO MAINT BIT JINIT A TIMER sSTALL TO ALLOW TIME TO LOAD SILO sCLEAR SILO MAINT. BIT ;sCOUNT A CHAR LOADED ;DECREMENT TEST COUNT CZDOHM=-D-0 CZDHMD.P11 5616 5617 5618 5619 5620 5621 5622 5623 5624 5625 5626 5627 5628 5629 5630 5631 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 135 011240 001365 011242 011244 011250 011252 011254 011203 042703 000304 020304 001406 011256 011262 011270 004737 012737 104006 024412 011262 001110 011272 011276 011304 005237 022737 001336 001220 000100 001220 140377 JSR 4%: 08:05 PAGE 135 TEST THAT THE cn SILO STATUS REG COUNTS UP CORRECTLY BNE 2% sBR UNTIL WE'VE LOADED THE TEST COUNT MOV BIC SWAB CMP BEQ (R2) ,R3 #140377 ,R3 R4 R3,R4 sSET THE WAS COUNT ;CLR JUNK BITS :SET UP S/B DATA sTEST COUNT = SILO COUNTER ? :BR IF YES 4% PC,SUER?2 MoV #18% ,SLPERR ERROR 6 ;GO SET UP ERROR INFO sSET UP ERROR LOCP RETURN INC CMP BNE $TMP7 #100,8TMP7 1% s INCREMENT TO NEXT COUNT TO TEST ;MAXIMUM COUNT ?? ;BR IF NOT ;SSR FAILED TO UP=COUNT CORRECTLY SEQ 0133 SEQ 0132 CZDHM-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 136 DN 08:05 PAGE 136 TEST THAT SILO STATUS REGISTER DOWN COUNTS CORRECTLY 5632 AR 5633 5634 5635 5626 5637 ;*TEST 36 TEST THAT SILO STATUS REGISTER DOWN COUNTS CORRECTLY IR R R R R R R R A R R R AR AR R R AR RN R RN PR R AR TST36: SCOPE .REM X TEST ABSTRACT: 011306 000004 5638 R R R A R R R R R R AR R AT AR R RS 2222222222222 5639 5640 5641 ggz% THIS TEST VERIFIES THAT THE SILO FILL LEVEL COUNTS DOWN PROPERLY WHEN WORDS ARE READ FROM THE SILO. ALL COUNTS FROM 77-00 ARE TESTED. THE TEST SEQUENCE IS AS FOLLOWS: 5644 5645 5646 1. 2. 3. 4. 5. INIT ""STMP7'' TO START WITH A COUNT OF 1 CLEAR THE DH11 AND FILL SILO WITH 64. WORDS READ THE NO. OF WORDS SPECIFIED BY COUNT CHECK THAT FILL LEVEL=64. MINUS COUNT - REPORT ERRORS INCREMENT ''STMP7'' AND REPEAT 2 THRU & UNTIL ALL COUNTS TESTED. 5647 5648 5649 5650 5651 ERRORS: 5653 gggg 1. 5656 SYNC: 5658 5659 DEBUG: (REFER TO TEST 35) 5661 5662 KEY LOGIC: (REFER TO TEST 35) 5652 223222 5657 ERROR 6 ARARE 5660 M7277 (32232 5663 . (222222222 5664 5665 5666 5667 5668 5669 5670 011310 011312 011316 011324 011330 010102 062702 012737 012711 012705 5672 5673 5674 5675 5676 5677 5678 gg;g 011340 011344 011350 011354 011356 011360 011364 011366 012703 012704 052712 005304 001376 042712 005303 001366 000100 001000 100000 5681 5682 5683 5684 5685 5686 5687 011370 011374 011400 011404 011406 011410 011412 013703 012704 005761 005304 001376 005303 001370 001220 001000 000002 5671 AR AR R R R AR AR AR SEQ 0154 SEQ 0133 011334 163705 4 000016 000001 004000 000100 001220 1$: 001220 3s: 100000 48: 58: SH3 INIT A H EF2 . MoV ADD MoV MoV MOV R1,R2 #SSR,R2 #1,8THP7 #BIT11,(RY) #100,RS ;SET UP REGADR Mov MoV BIS DEC BNE BIC DEC BNE #100,R3 #1000,R4 #BIT15,(R2) Ré 3s #BIT15,(R2) R3 2% ;COUNTER USED TO FILL SILO SINIT TIMER sSET SILO MAINT. BIT sSTALL TO ALLOW SILO TO LOAD SUB 28: IS CALLED TO REPORT SILO FILL LEVEL ERRORS Mov MoV TST DEC BNE DEC BNE $STHP7 RS $TMP7,R3 #1000,R4 NRC(R1) R4 5% R3 4% sSTART WITH COUNT = 1 ;CLR THE DHM ;TEST COUNT SHOULD BE 64(10) MINUS ;THE NO. OF CHARS READ ;CLEAR THE SILO MAINT BIT ;COUNT ONE CHAR LOADED ;BR UNTIL ALL LCADED sINIT ;INIT JREAD ;GIVE COUNTER FOR READING SILO TIMER THE SILO IT TIME TO SETTLE ;COUNT ONE READ :BR UNTIL WE'VE READ TEST COUNT CZDHM-D~0 CZOKMD.P11 5688 5689 5690 5691 5692 5693 5694 5695 5696 5697 5698 5699 5700 5701 5702 5703 5704 011414 011416 011422 011424 011426 011430 MACY11 30A(1052) 09-MAR-78 15:32 011203 042703 010504 000304 020304 001406 10-MAR-78 136 TEST PAGE 137 Mov 140377 024412 011324 001110 011446 011452 011460 005237 022737 001321 001220 000101 001220 (R2) ,R3 ;GET THE WAS DATA R5,R4 R& :SET UP S/B DATA CMP R3,R4 ;DID IT DOWN COUNT 0K ?? JSR PC,SUER2 ;GO SET UP ERROR INFO INC cMP BNE $TMP7 #101,8TMP7 1% ;UPDATE COUNT ;TESTED ALL COUNTS ?? ;BR IF NOT MOV ERROR 6%: THAT SILO STATUS REGISTER DOWN COUNTS CORRECTLY #140377 ,R3 BEQ 004737 012737 EN BIC MOV SWAB 011432 011436 011444 104006 08:05 6% #13,SLPERR 6 sCLR JUNK BITS :BR IF YES ;SET UP ERROR LOOP RETURN ;SILO STATUS REG. DOWN-COUNTED INCORRECTLY SEQ 0135 SEQ 0134 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 (8:05 PAGE 138 TEST SILO ALARM LEVEL FOR 5708 AR 5706 ;*TEST 37 5707 5708 5709 5710 RR 000004 R AN AR R COUNTS 0,1,2,4.8,16, AND 32 R A A TR R RN R R R R RN R AR RN TEST SILO ALARM LEVEL FOR R 011462 1 F 10-MAR-78 137 R R R R AR P AR R RR RN COUNTS 0,1,2.4.8,16, AND 32 R PR AR R R AN R R R AR R R AR RN AR AR AR RN AR R RNN TST37: SCOPE .REM b4 TEST ABSTRACT: 5711 2220222222222 5712 5713 5714 THIS TEST VERIFIES THAT THE SILO ALARM LEVEL WORKS PROPERLY FOR INTEGRAL POWER OF 2 COUNTS (0, 1, 2, 4, 8, 16, AND 32). THE TEST SEQUENCE g;}z IS AS FOLLOWS: 5717 1. INIT ""STMP7'' TO START WITH ALARM LEVEL OF 000 5718 2. CLEAR THE DH11 AND LOAD THEN SILO WITH THAT NO. 5720 5721 3. VERIFY THAT ''DATA READY'' DOES NOT SET UNTIL THE FILL LEVEL EXCEEDS THE ALARM LEVEL. REPORT ERRORS IF: A. "'READY'' SETS TOO SOCON 5719 5722 5723 5724 5725 g;sg 4. S. €. 5728 5729 5730 5731 5732 FOR (A) ABOVE IF '‘READY'* SETS JUST ONE WORD TOO SOON, IT IS ALLOWED, BUT ANYTHING GREATER RESULTS IN AN ERROR MESSAGE. ERRORS: (222322 5734 5735 5736 5737 5738 y8 ERROR 6 IS CALLED TO REPORT BOTH TYPES OF ERRORS OUTLINED IN 4(A,B) ABOVE SYNC: 5739 RRRRY 5740 5741 M7277 SH3 INIT A H EF2 DEBUG: §742 222824 5743 5744 5745 5746 5747 1. ERRORS IN THIS TEST GNLY INDICATE BAD COMPARATOR CHIP (E23 OR E19) ON THE M7279 - SH2 KEY LOGIC: 5748 2222222223 5749 5750 5751 5752 5753 5754 5755 5756 011464 011472 011474 012737 010102 062702 011504 5758 011504 012711 004000 5759 5760 OF WORDS B. ‘''READY'' SETS TOO LATE SHIFT "'STMP7'' LEFT TO GENERATE NEXT POWER OF 2 LEVEL REPEAT 2 THRU 5 UNTIL ALL 7 TEST LEVELS CHECKED NOTE: §733% S757 THAT IS ONE GREATER THAN THE ALARM LEVEL. m7279 SH2 E19 - PIN 5 (COMPARATOR) ALSO SAME LOGIC AS TEST 35 011500 011510 011514 005037 013705 010512 001110 4 000016 001220 001220 1$: MOV MOV ADD #1%,SLPERR R1,R2 #SSR,R2 ;SET UP THE ERROR LOOP RETURN ;SET UP REGADR MOV #BIT11, (R1) ;CLEAR THE DH11 CLR Mov MOV $THMP7 ;START WITH LEVEL 00 $TMP7 ,R>5 RS, (R2) ;SAVE IT IN RS JSET ALARM LEVEL IN SSR SEQ 0136 SEQ 0135 CZDHM-D-0 CZDHMD.P11 5761 5762 5763 5764 5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 011516 011520 011524 011530 011532 011534 011540 011542 011544 011546 011550 011552 011556 011562 011566 011570 MACY11 30A(1052) 09-MAR-78 15:32 005205 052712 012703 005303 001376 001000 100000 004737 004737 004737 104006 000426 027200 011624 024416 005705 011576 011602 011606 011610 011614 011620 011622 004737 022705 001417 004737 004737 011624 011626 011632 011634 011636 011640 011644 011203 013704 005204 000304 105004 153704 000207 011646 011652 011654 011656 011660 011662 011666 011674 005737 001002 000261 000401 000241 006137 032737 001703 2%: 100000 042712 005305 105711 100412 005705 001363 011572 011574 10-MAR-78 137 3%: RS #BIT15, (R2) #1000,R3 R3 3$ #BIT15,(R2) R5 ;LOAD ONE MORE THAN FILL LEVEL ;SET SILO MAINT. TO LOAD A (CHAR INIT STALL TIMER ;WAIT FOR SILO TO SETTLE ;BR TIL R3 GOES TO 000000 sCLR THE SILO MAINT BIT ; COUNT ONE LOADED JSR PC,SAPS .SAVE BR 6% ;GO CHECK NEXT COUNT JSR JSR ERROR 4%: 027200 000001 000411 5%: 001220 001220 6%: 001220 000100 001220 THE ERROR PSW ;GO SET UP S/B DATA ;GO SET UP ERROR INFO ;SILO ALARM LEVEL FAILED AT SELECTED COUNT ;SHOULD IT HAVE BEEN SET ;BR IF YES JSR PC,SAPS ;SAVE THE ERROR PSW ERROR BR 6 6% ;SILO ALARM LEVEL FAILED ;GO CHECK NEXT COUNT MOV MoV INC SWAB CLRB #1,R5 6% PC.5% PC,SUER2A ;1S ;BR ;GO ;GO IT OFF IF YES SET UP SET UP (CHAR AVAIL) BY ONLY ONE ?? ~ WE'LL ALLOW HIM THIS S/B DATA ERROR INFO ;GET WAS DATA ;SET UP THE S/B DATA BISB (R2) ,R3 $TMP7 R4 Ré R4 R4 $TMP7 R4 PC ;RETURN TO SET UP AND REPORT ERROR TST BNE STMP7 7% ;COUNT AT ZERO ;BR IF NOT BR 8% ;GO SET UP COUNT SEC 7%: PC,5% PC,SUERZA 6 :CHAR AVAIL SET YET sBR IF IT IS :SHOULD IT BE ?? ;BR IF NOT R5 6% RTS 001220 (R1) 4% R5 2% TST BEQ CMP BEG JSR JSR 011624 024416 COUNTS 0,1,2,4.8,16, AND 32 INC BiS MOV DEC BNE BIC DEC TST8 BMI 18T BNE 001424 104006 G 1i PAGE 139 08:05 TEST SILO ALARM LEVEL FOR CLC ROL BIT BEQ ;SET THE ''C"" BIT S$TMP7 ;CLEAR THE "'C'" BIT ;SHIFT POWER OF TWO BIT 1% :BR IF NOT #BIT6,8$TMP7 ;DONE ALL POWERS ?? SEQ 0137 SEQ 0136 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) C9-MAR-78 15:32 5810 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 gggg 5838 5839 5840 5841 IR 011676 000004 1. 2. 3. 4. 5. 6. 7. 5857 R RN R R RN AR R AR R RPN TRANSMITTER TIMING TEST - ALL SELECTED LINES - ALL SPEEDS R R R R A R R R AR R R R R AR R R A AR R RN RN RN RRR TR SELECT A LINE # TO TEST (AS DEFINED BY ''LINSEL:'") INIT "'STMP7'' TO START WITH S0 BAUD AND A RELATIVE TIMER "'TIMEC'' TO =1 (177777) CLEAR THE DH11 AND ACTIVATE SELECTED LINE TO TRANSMIT THREE CHARS. ACTIVATE TIMER TO UPDATE ‘‘TIMEB'' THE LINE SPEED TIMER IF "'XMIT DONE'' FAILS TO SET ON TIME - REPORT ERROR AND REPEAT 3 THRU & UNTIL ALL SPEEDS CHECKED - THEN REPEAT 1 THRU S UNTIL ALL LINES CHECKED IF "XMIT DONE'' SETS VERIFY TIMEB LESS THAN TIMEC IF NOT REPORT ERROR - MAKE TIMEC = TIMEB AND REPEAT 3 THRU 5 UNTIL ALL SPEEDS CHECKED REPEAT 1 THRU 6 FOR ALL SELECTED LINES. (2222223 ERROR 53 ERROR 17 T332 mM7277 IS CALLED TO REPORT XMIT TIMEOUT ERRORS IS CALLED TO REPORT TIMING ERRORS SH3 INIT A H EF2 DEBUG: RERRRE 1. 2. 3. IF ALL LINES FAIL ON ALL SPEEDS SUSPECT THE CLOCK MODULE M4540 IF ALL LINES FAIL ON JUST ONE SPEED (THE SAME ONE) SUPECT EITHER THE CLOCK MODULE OR THE M7288 MODULE (TIMING SELECT MUXES) IF JUST ONE LINE FAILS SUSPECT EITHER THE UART MODULE (M7280) EITHER FOR LINES <15:08> OR <07:00> OR THE M7288 MODULE KEY LOGIC: 22222220283 5858 5859 5860 5861 5862 gggz 5865 A R R ERRORS: SYNC: 5856 R R AR R P R R R R P THIS TEST PERFORMA A "RELATIVE' TIMING TEST FOR ALL BAUD RATES ON ALL SELECTED LINES. IT DOES NOT MEASURE ABSOLUTE TIMES BUT SIMPLY VERIFIES THAT EACH SUCCESSIVE SPEED FROM 50 T0O 9600 BAUD IS FASTER THAN THE PREVIOUS SPEED. THE TEST SEQUENCE IS AS FOLLOWS: 5844 gggg R R R R 2222222222222 2. 5846 5847 5848 5849 5850 5851 5852 5853 R R TST40: SCOPE .REM X TEST ABSTRACT: ggzg 5845 R ;*TEST 40 5812 5816 08:05 PAGE 140 TRANSMITTER TIMING TEST - ALL SELECTED LINES - ALL SPEEDS R 5811 5813 5814 5815 H1 10-MAR-78 140 M4540 M7288 M7280 X SH? <9600:50> BAUD SIGNALS SH3 BOT AND TOP BUF CLOCK SIGNALS SH4,6,8,0R 10 TX CLOCK NN L SIGNALS TBMT LINE ''N'' SIGNALS ON UART PIN 22 TX CLOCK LINE 'N'' SIGNALS ON UART PIN 40 SEQ 0138 SEQ 0137 CZDHM-D-0 CZDHMD.P11 001220 030354 012012 012020 012024 012030 012034 012042 012044 012050 012052 012056 012062 012066 012072 012074 013737 000337 006237 006237 042737 011103 042703 010102 012704 001220 001202 001202 001202 177760 MOV JSR BR MOV Mov MoV 000004 000012 030350 MOV 4%: 027016 001202 CLR TST BMI JSR BR MoV SWAB ASR ASR BIC 001202 100000 030322 024416 024636 &~ OSSOSO 027200 001220 7%: o 013737 030352 8%: PC,TIMEIT ;INIT TIMER A ;INIT TIMER B ;XMITTR DONE SET YET ? sBR IF YES sCALL THE TIMER $TMP7,$TMPO ;SAVE AND SET UP THE SPEED CODE #1,TIMEA TIMEB (R1) 5% 4% $TMPO $TMPO $THPO #177760,8TMPO (R1),R3 #B1T07,R3 R1,R2 ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS ;GO SET UP ERROR INFO ;GO SET LINE NO. IN MSG ERROR BR 53 8% ;YIMED OUT WAITING FOR XMIT DONE ;GO TEST NEXT SPEED MOV MoV CMP BLO TIMEB,R3 TIMEC,R4 R3.Ré 8% JSR PC,SAPS SWAB R2 R2 R2 #177760,R2 LINE R4 ;GET THE WAS COUNT ;GET LASTR CHECK COUNT ; COMPARE RELATIVE TIMES sBR IF THIS SPEED FASTER THAN LAST ;SPEED TESTED $TMP7 ,R2 ;SAVE THE ERROR PSW ;GET SPEED CODE AND RIGHT JUSTIFY PC,SUER2A R5,SUNUM ;STRIP AWAY ALL JUNK ;GO SET UP ERROR INFO ;GO PUT LINE NO. IN MSG ERROR 17 ; TRANSMITTER SPEED Mov TIMEB, TIMEC ;SET UP NEW CHECK TIMER COUNT Mov EN17+41 030354 sACTIVATE THE TRANSMITTER ;SET BYTE COUNT TO XFER 3 CHARS ;GET TEST DATA STARTING AT LOC. 0 JSELECT A XMIT SPEED PC.SUER2A R5,SUNUM ASR BIC JSR JSR LINE e CAR(R1) $TMP7,LPR(R1) LINMSK ,BAR(R1) #-3,BCR(R1) #BIT15,R4 ASR 177760 024416 024636 LINE, (R1) sSET UP ERROR LOOP RETURN ;GO SELECT A LINE TO TEST ;:BR IF TESTED ALL SELECTED LINES INIT T1 START WITH LOWEST SPEED ;INIT RELATIVE TIME CHECKER ;CLEAR THE DH11 ;SELECT IT IN THE SCR #2%,SLPERR PC,SELINE TST41 #2100,$THP7 #-1,TIMEC #BIT11,(R1) BISB JSR JSR L INE EM50+53 104053 000426 SPEEDS ;GET THE WAS DATA ;CLEAR UNINTERESTING BITS sMAKE REGADR = DEVADR ;SET UP S/B DATA MOV BIC MoV MoV 000200 004737 013702 000302 006202 006202 042702 004737 004537 030322 031617 104017 — b 004737 004537 030322 034254 000006 001220 027314 In 08:05 PAGE 141 TRANSMITTER TIMING TEST - ALL SELECTED LINES - ALL BISB Mov CLR MoV MOV 000010 5%: N b s d ek 153704 177775 2%: 3%: 030352 030354 NN ed D d - e - e e e R R e T 153711 1%: 013703 013704 020304 103420 woow VIS el 000001 030352 e 5917 5918 5919 5920 5921 002100 177777 004000 030322 012737 005037 005711 100437 004737 000773 oo NOND 5915 5916 001110 011766 011774 012000 012002 012004 012010 ~n 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 59N 5912 5913 5914 011730 024544 012761 005061 013761 013761 OO0 O0O0OO0OO0O0OOO 5895 5896 012737 004737 000534 012737 012737 01271 011734 011740 011746 011752 011760 e 5887 5888 5889 5890 589 5892 5893 5894 30A(1052) 09-MAR-78 15:32 011700 011706 011712 011714 011722 011730 o 5864 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 10-MAR-78 140 MACY11 INCORRECT SEQ 0139 SEQ 0138 CZDHM-D-0 CZDHMD.P11 5922 5923 5924 5925 5926 012164 012172 012200 012202 MACY11 30A(1052) 09-MAR-78 15:32 062737 022737 001253 000641 002100 035600 10-MAR-78 140 001220 001220 08:05 PAGE 142 J 1" TRANSMITTER TIRING TEST - ALL ADD #2100,8THP7 BNE 2% (MpP B8R #35600,8TMP7 1% SELECTED LINES - ALL ;GENERATE NEXT SPEED ;DONE ALL SPEEDS ? ;BR IF NOT ;GO TEST NEXT LINE SPEEDS SEQ 0140 SEQ 0139 CZDHM-D-0 CZDHMD.P11 5927 5928 5929 5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965 5966 5967 5968 5969 5970 5971 5972 5973 5974 5975 5976 5977 5978 5979 5980 5981 5982 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 T41 P 08:05 RECEIVER TIMING TEST R LR R S+TEST 41 TST41: 000004 .REM - ALL SELECTED LINES =~ ALL T T e T T T e P P SPEEDS T T T RECEIVER TIMING TEST =~ ALL SELECTED LINES = ALL SPEEDS AR 012204 K11 PAGE 143 R RN R R RN AR R RN RN RN RR O RRR RN SCOPE X TEST ABSTRACT: 1222232222222 02 THIS TEST IS IDENTICAL TO TEST 40 EXCEPT IT WAITS FOR "'DATA READY" TO CHECK RECEIVER TIMING. THE SEQUENCE IS SIMILAR AND THE SAME TIMERS ARE USED FOR ERROR CHECKING. ERRORS: (22 2223 1. 2. ERROR 54 ERROR 20 SYNC: M7277 IS CALLED TO REPORT RCVR TIMEOUT ERRORS IS CALLED TO REPORT RCVR TIMING ERRORS SH3 INIT A H EF2 Ak d DEBUG: (SAME AS TEST 42) (222824 KEY LOGIC: (SAME AS TEST 42 PLUS) ERERRRERRS 012206 012214 012220 012222 012230 012236 012242 012246 012252 012260 012264 012272 012737 004737 000534 012737 012737 012711 012711 153711 012761 005061 013761 013761 012300 012306 012312 012314 012316 012322 012737 005037 105711 100435 004737 000773 000001 030352 013737 006337 006337 001220 001202 001202 012236 024544 001110 002100 177777 004000 001000 001220 030354 030322 177777 000006 001220 027314 000010 4 1$: 28: 3s: M7288 M7280 S5H5.7,9.11 RX CLOCK NN L SIGNALS BUF DA LINE ''N'' UART PIN 19 RX CLOCK LINE "'N"' UART PIN 17 Mov JSR BR MOV MOV #28,SLPERR PC,SELINE TST42 #2100,$THP7 #-1,TIMEC ;SET UP ERROR LOOP RETURN ;GO SELECT A LINE TO TEST ;:BR IF TESTED ALL SELECTED LINES sINIT TO START WITH LOWEST SPEED ;INIT RELATIVE TIME CHECKER BISE MoV LINE, (R1) #-1,BCR(R1) ;SELECT IT IN THE SCR sSET BYTE COUNT TO XFER 1 CHAR MOV MOV CLR #BIT11,(RY) #8179, (R1) CAR(R1) :CLEAR THE DH11 sSET MAINTENANCE MODE ENABLE ;GET TEST DATA STARTING AT LOC. 0 000004 000012 MOV Mov S$TMP7,LPR(R1) LINMSK ,BAR(R1) 030350 Mov CLR #1,TIMEA TIMEB ;INIT TIMER A ;INIT TIMER B BMI JSR BR 5% PC,TIMEIT 4% :BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS MoV ASL ASL $TMP7,$THPO $TMPO $TMPO 48: 027016 001202 TSTB (R1) ;SELECT A XMIT SPEED ;ACTIVATE THE TRANSMITTER :RCVR DONE YET ?? ;SAVE AND SET UP THE SPEED CODE SEQ 0141 SEC 0140 CICHM-D-0 CZDHMD PN 5983 5984 5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 MACY11 30A(1052) 012342 012346 012354 012356 012360 012364 012370 012374 012400 01242 012404 012406 000337 042737 011103 010102 012704 153704 004737 004537 030322 032076 001202 012410 012414 012420 012422 013703 013704 020304 012424 012430 012434 012436 012440 012442 012446 012452 012456 004737 012460 012462 012464 012472 012500 012506 012510 09-MAR-78 15:32 177760 10-MAR-78 T41 100200 030322 024416 024636 EM22 +51 030352 030354 5%: 103420 004737 004537 030322 031756 104020 013737 062737 022737 001253 000641 78: 027200 001220 ;TIMED OUT WAITING FOR CHAR AVAIL MoV MoV TIMEB,R3 ;GET THE WAS COUNT ;GET THE CHECK COUNT :COMPARE RELATIVE TIMES sBR IF TIME INDICATES THIS SPEED FASTER 035600 001220 8s: TIMEC,R4 CMP BLO R3,R4 8% JSR PC,SAPS MoV ASL ASL ERROR 030354 001220 $THPO #177760,8TMPO (R1),R3 ;GET THE WAS DATA R1,R2 ;MAKE REGADR = DEVADR #BIT15+BITO7,R4 ;SET UP S/B DATA LINE,R4 PC,SUER2A ;GO SET UP ERROR INFO R5,SUNUM ;G0 SET LINE NO. IN MSG 54 8s EM20+36 030352 002100 SPEEDS ERRLR BR SWAB BIC JSR JSR LINE 177760 024416 024636 L N RECEIVER TIMING TEST =~ ALL SELECTED LINES - ALL LINE 000426 000302 042702 PAGE 144 SWAB BIC MoV MOV MOV BISB JSR JSR 001202 104054 013702 006302 006302 08:05 MOV ADD CMP BNE BR $TMP7.,R2 R2 R2 R2 #177760,R2 PC,SUER2A R5,SUNUM ;GO TEST NEXT SPEED ; THAN LAST SPEED ;SAVE THE ERROR PSW sGET SPEED CODE AND RIGHT JUSTIFY ;STRIP AWAY ALL JUNK ;GO SET UP ERROR INFO ;GO PUT LINE NO. IN MSG 20 sRECEIVER SPEED INCORRECT TIMEB, TIMEC ;SET UP NEW CHECK TIMER COUNT #2100,8THP7 #35600,8THP7 2% 1% :GENERATE NEXT SPEED ;DONE ALL SPEEDS ? ;BR IF NOT ;G0 TEST NEXT LINE SEQ 0142 SEQ 0141 CZDHM-D-0 CZDHMD.P11 6020 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 T41 LI 08:05 PAGE 145 RECEIVER TIMING TEST - ALL SELECTED LINES - ALL SPEEDS SEQ 0143 SEQ 0142 CZDHM-D-0 CZDHMD.P11 6021 6022 6023 6024 €025 6026 6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063 6064 6065 6066 6067 6068 6069 6070 5071 6072 6073 6074 6075 6076 MACY11 30A(1052) 09-MAR-78 15:32 N1 08:05 PAGE 146 VERIFY STOSAGE OVERFLOW - NON MAINT. MODE - ALL SELECTED LINES 10-MAR-78 142 P L LR LR R T s*TEST 42 P 012512 000004 R TST42: -REM e T T P R T P T T T VERIFY STORAGE OVERFLOW - NON MAINT. MODE - ALL SFLECTED LINES R e e e e e e P T LRI I LY SCOPE 3 TEST ABSTRACT: (2222222222222 THIS TEST VERIFIES THAT THE STORAGE OVERFLOW BIT (SCR14) SETS Agb 8L§ARS PROPERLY FOR ALL SELECTED LINES. THE TEST SEQUENCE IS AS FOLLOWS: 1. SET UP THE ERROR RETURN 6. IF 2. SELECT A LINE NUMBER TO TEST =~ GO TO NEXT TEST IF ALL SELECTED LINES HAVE BEEN TESTED. 3. PRIME THE SELECTED LINE TO XMIT 65(10) CHARS. 4. ACTIVATE THE SELECTED LINE AND WAIT FOR STORAGE OVERFLOW TO SET (SCR14=1) 5. IF SCR14 FAILS TO SET ON TIME - REPORT ERROR AND THEN CONTINUE WITH THE NEXT LINE (STEP 2). IT SETS OK - READ THE ''NRC'* REG TWICE TO EMPTY TWO WORDS FROM THE SILO. 7. AFTER A BRIEF STALL, 8. VERIFY . THAT SCR14 HAS CLEARED - IF NOT REPORT ERROR AND CONTINUE WITH NEXT LINE (STEP2) IF IT CLEARS OK, VERIFY THAT THE FILL COUNT (SSR<15:08>) CONTAINS A 77(8) - IF NOT REPORT ERROR AND CONTINUE WITH NEXT LINE (STEP 2). P ?E;E:; STEPS 2 THRU 8 UNTIL ALL SELECTED LINES HAVE BEEN : ERRORS kAR RY 1. ERROR SYNC: 57 M7277 IS CALLED TO REPORT ALL ERRORS DETECTED. SH3 INIT A H EF2 LA2R3 DEBUG: AR 1. PROBLEM CAN VERY LIKELY BE THAT NO TEST CONNECTOR BE SURE YOU HAVE ONE ON FOR THIS TEST. 2. PROBLEM IS POSSIBLY ON THE M7289 MODULE SIGNAL KEY FEEDING THIS LOGIC. IS PRESENT. (SH4) OR SOME LOGIC: tttttReR e M7289 SH4 STORAGE OVERFLOW L READY IN PULSE H UC1 MASTER DA H UC2 MASTER Pa H E43-12 £40-11 BH? BD?2 SEQ 0144 SEQ 0143 CZDHM-D-0 CZDHMD.P11 6077 6078 6079 6080 6081 6082 MACY11 30A(1052) 09-MAR-78 15:32 012514 012522 012526 012711 010102 113711 005061 012761 012761 013761 012570 012576 012737 005037 032711 001024 004737 000772 000001 030352 040000 004737 012704 153704 011103 042703 004737 004537 030322 034741 104057 000721 027200 040000 030322 012602 012606 012610 012614 012616 012622 012626 012632 012634 012640 012644 012650 012652 012654 012656 b —d o ~N ~ W > 030322 000006 177677 033500 027314 i 18: 28: 000010 000004 000012 030350 000002 000002 001000 004737 005004 153704 011103 042703 004737 004537 030322 034741 027200 PAGE 147 3s: L JSR BR MOV MOV MOVB CLR MOV MOV CLR BIT BNE JSR BR JSR MoV BISB MOV BIC JSR JSR LINE EM57+44 001220 001220 4S: 41%: 040000 030322 122761 001660 000077 004737 012704 027200 037400 000017 58: PC,SELINE TST43 #BIT11,(RY) R1,R2 LINE, (R1) CAR(R1) #-65. ,BCR(R1) #33500,LPR(R1) LINMSK,BAR(R1) SET UP ERROR RETURN ;GO SELECT A LINE NO. TO TEST ::BR IF DONE ALL SELECTED LINES sCLEAR THE DH11 sMAKE REGADR = DEVADR sSELECT A LINE sSET UP CURRENT ADDRESS sSET UP BYTE COUNT :SET UP LPR: 9600 BAUD,5 BIT CHARS sACTIVATE THE SELECTED LINE #1,TIREA TIMEB #BIT14, (R1) 4% PC,TIMEIT ;INIT TIMERS 38 :BR IF YES YOU SHOULD GET IT sCALL TIMER :BR IF NO TIME OUT PC,SAPS #BIT14 RS ;GO SAVE PSW :SET UP S/B DATA LINE ,Ré (R1),R3 #137760,R3 PC,SUER2A R5,SUNUM ;STOREGE OVERFLOW YET ?? ;SET UP WAS DATA sCLEAR UNINTERESTING BITS ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ;STORAGE OVERFLOW FAILED TO SET 57 1% ;GO TRY NEXT LINE Mov MoV MoV CEC NRC(R1) ,$TMP7 sREAD THE SILO sREAD IT AGAIN sINIT STALL COUNTER ;COUNT TIMER ;BR IF NO TIMEOUT :DID OVERFLOW GO AWAY ? :BR IF YES BNE BIT BEQ NRC(R1) ,$TMP7 #1000,R5 RS 41% #BIT14,(RT) 5% JSR CLR PC,SAPS ;GO SAVE THE PSW ;SET UP S/B DATA MoV BIC JSR JSR LINE (R1) ,R3 #137760,R3 PC,SUERZ2A R5,SUNUM ;SET UP WAS DATA sCLEAR UNINTERESTING BITS ;GO SET UP ERROR INFO EM57+44 104057 000664 #2% ,SLPERR ERROR BR BISB 137760 024416 024636 B 12 VERIFY STORAGE OVERFLOW - NON MAINT. MODE - ALL SELECTED LINES Mov 137760 024416 024636 016137 016137 012705 005305 001376 032711 001420 08:05 MoV 027016 cdod bbb adadedodedaded e 001110 004000 ded i i e e e e e i D d e e — e i = e D COOVRNO WV LIN=O 012660 oooorr0rOrOrONO O 012530 024544 012530 012534 012536 012542 012546 012554 012562 PN = 012737 004737 000535 10-MAR-78 142 Ré LINE R4 ;PUT LINE NO. IN MSG ERROR BR 1% 57 ;STORAGE BIT FAILED TO CLEAR ;GO TRY NEXT LINE CMPB BEQ #77,SSR+1(R1) 1% ;WAS IT REALLY 65. ?? JSR Mov #37400,R4 PC,SAPS ;GO SAVE PSW ;SET UP S/B DATA SEQ 0145 SEQ 0144 CZDHM-D~-0 CZDHMD P11 6133 6134 6135 6136 6137 6138 6139 6140 6141 212772 012776 013002 013006 013012 013014 013016 013020 MACY11 30A(1052) 062702 016103 004737 004537 030322 034741 000016 000016 024416 024636 09-MAR-78 15:32 10-MAR-78 142 ¢ 12 08:05 PAGE 148 VERIFY STORAGE OVERFLOW - NON MAINT. MODE -~ ALL SELECTED LINES ADD MOV JSR JSR LINE #SSR,R2 SSR(R1) ,R3 PC,SUER2A R5,SUNUM 104057 EMS7+44 57 ERROR 000640 Bk 1% ;SET UP REGADR ;SAVE WAS DATA ;GO SET UP ERROR INFO ;PUT LINE NO. IN MSG sREADING SILO FAILED TO PEC SSR OR ;STORAGE OVFL SET AT WRONG COUNT ;GO TRY NEXT LINE SEG 0146 SEQ 0145 C(DHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09~MAR-78 15:32 6142 6143 S*TEST 43 R R IR AR N RN E R R RARTORRRANERRARRAAARRRACE AR TR RA RS BASIC DATA TEST - ALL SELECTED LINES/ALL CHAR LENGTHS ::.tttt"".ti""'i'i'i'.i'ifi""""'tifit".ti"'.""'tt"'t.' 013022 000004 75743: .REM SCOPE % TEST ABSTRACT: 6148 6149 6150 6151 6152 6153 6154 6155 6156 6157 6158 6159 6160 6161 6162 6163 6164 6165 6166 6167 6168 6169 6170 6171 6172 1232222222222 4 THIS TEST VERIFIES THAT A SINGLE ALL ONES CHAR. CAN BE TRANSMITTED AND RECEIVED ON ALL SELECTED LINES AT ALL FOUR CHAR LENGTHS (5, 6, 7, AND 8 BITS). THE TEST SEQUENCE IS AS FOLLOWS: . « . TABLE POINTER. CLEAR THE DHM PRIME THE SELECTED LINE TO XMIT ONE CHAR AT 9600 BAUD WAIT FOR °‘'CHAR AVAIL'' TO SET - IF TIMEOUT REPORT ERROR AND OOWVSs cCoO~N SET UP THE ERROR LOOP RETURN SELECT A LINE NO. TO TEST - GO TO THE NEXT TEST IF DONE ALL SELECTED LINES. GET A TEST CHARACTER FROM THE DATA TABLE AND UPDATE THE . . RESTART AT STEP 8. IF NO TIMEOUT = CHECK DATA AND REPORT ANY ERRORS INCREMENT ''SCR'' REG TO CHANGE CHAR LENGTH - IF DONE ALL FOUR GO TO STEP 2 - IF NOT THEN STEP 4. ERRORS: LAR3S 1. 2. 6173 6174 6175 6176 6177 6178 6179 ERROR ERROR SYNC: 55 23 M7277 IS CALLED TO REPORT RCVR TIMEOUT. IS CALLED TO REPORT DATA COMPARE ERRORS SH3 INIT A H EF2 thkkkw DEBUG: L2222 2 1. 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 AR = 6145 6146 6147 AR AR W 6144 D 12 08:05 PAGE 149 BASIC DATA TEST - ALL SELECTED LINES/ALL CHAR LENGTHS 10-MAR-78 143 IF FAULT AFFECTS ONLY ONE LINE AT ALL CHAR LENGTHS, BAD UART MODULE M7280. SUSPECT A 2. IF FAULT AFFECTS ONLY ONE BIT ON ALL LINES, SUSPECT THE THE M7279 MODULE. 3. IF FAULT AFFECTS ONLY CERTAIN CHAR LENGTHS, SUSPECT EITHER THE M7278 OR THE UART MODULE M7280. KEY LOGIC: ERRRERRAER M7280'S UART CHIPS PINS <12:05> 013024 012737 013052 001110 4 M7279 SH1 E1,E2,E6, OR E7 M7278 SH8 NB2 LPR 01 Mmov #3% ,SLPERR H NB1 LPR 00 H FH1 FH2 ;SET UP ERROR LOOP RETURN SEQ 0147 SEQ 0146 CZDHM-D-0 CZDHMD .P11 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220 6221 6222 6223 6224 6225 6226 6227 6228 6229 6230 6231 6232 6233 6234 6235 6236 6237 6238 6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 013032 013036 013040 013044 013046 013052 013056 013062 013070 013076 013104 073110 MACY11 30A(1052) 09-MAR-78 15:32 004737 000511 012705 005002 012537 012711 153711 012761 012761 012761 050261 053761 030322 177777 001220 033560 000004 027314 000010 000006 000004 030350 004737 000773 027016 013142 013146 013150 004737 027200 012704 153704 004737 004537 030322 032076 2%: 3s: 001220 004000 000001 030352 0 01 013170 0 1%: 030336 012737 005037 105711 011103 042702 143 024544 013116 013124 013130 013132 013134 013140 100424 10-MAR-78 000012 4%: 177560 000200 030322 024416 024636 JSR BR MOV CLR MOV MOV BISB MoV MoV MoV BIS BIS 016103 012704 153704 000304 153704 020304 001407 000002 000200 030322 013232 013236 013242 024412 024636 013244 004737 004537 030322 032137 013250 013252 013256 013260 005202 022702 001273 000664 53: 000004 6$: LINE, (R1) #-1,BCR(R1) #STMP7,CAR(R1) #33500,LPR{R1) R2,LPR(R1) LINMSK,BAR(R1) PC,SAPS 5% PC,TIMEIT 4% (R1) ,R3 #177560,R3 #200,R4 LINE R4 PC,SUER2A R5,SUNUM ;G0 SELECT A LINE YO TEST ;:BR IF DONE ALL SELECTED LINES ;GET POINTER TO DATA TABLE ;INIT R2 TO START AT CHAR LENGTH OF 5 BITS sPUT TEST CHAR IN XMIT BUFFER ;CLEAR THE DH11 sSELECT THE LINE ;SET BYTE COUNT TO -1 ;SET CURRENT ADDRESS REG ;SET BAUD RATE TO 9600 ;SELECT CHAR LENGTH sACTIVATE THE SELECTED LINE sINIT TIMER A sINIT TIMER B ;RCVR DONE YET ?? :BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS :SAVE THE ERROR PSW ;GET THE SCR sCLEAR UNINTERESTING BITS ;SET UP S/B DATA ;GO SET UP ERROR INFO ;GO SET LINE NO. IN MSG ERROR BR 55 6% ;CHAR AVAIL FAILED TO SET ON TIME ;GO TEST NEXT CHAR LENGTH MoV MOV NRC(R1) ,R3 #200,Ré LINE, R4 Ré $TMP7 R4 ;GET THE WAS DATA ;SET UP THE S/B DATA IN R4 6% :BR IF YES ;WAS THE RCVD DATA CORRECT ?? JSR JSR LINE PC,SUER? RS, SUNUM ;GO SET UP THE ERROR INFO ;GO PUT LINE NO. IN MSG ERROR 23 ;DATA COMPARE ERROR INC CMP BNE BR R2 #4,R2 :DO NEXT CHAR LENGTH ON SELECTED LINE 1% :GO DO NEXT LINE EM23+36 104023 #B1T11, (R1) JSR MoV BIC MoV BISB JSR JSR BISB SWAB BISB CMP BEQ 001220 TST44 #TDATA2,RS R2 (R5)+,$THP7 #1,TIMEA TIMEB (R1) EM22+51 013204 013210 013214 013220 013222 013226 013230 PC,SELINE Mov CLR TSTB BMI JSR BR LINE 104055 000422 013246 E 12 08:05 PAGE 150 BASIC DATA TEST - ALL SELECTED LINES/ALL CHAR LENGTHS 2% :HAVE WE DONE ALL FOUR CHAR LENGTHS ?? :BR IF NOT SEQ 0148 SEQ 0147 (ZDHM-D-0 CZDHMD.P11 6291 6292 6293 6294 6295 6296 6257 6298 6299 6300 6301 6302 6303 6304 10-MAR-78 08:05 T44 PAGE 151 F 12 SINGLE LINE DATA TEST AR R R - ALL SEQ 0149 SEQ 0148 SELECTED LINES R AR ARAR AR RRRRRRERRARERRNORARRORRRRARRRRARAAARRRRRRRAR AR SeTEST 44 SINGLE LINE DATA TEST - ALL SELECTED LINES JiEERRARAEATAARRARRRERRREERRARARECRRARRCRERRRCERRRROCRRAARRATROERAORRRETSY TST44: -REM SCOPE X TEST ABSTRACT: (2222222222003 THIS TEST TRANSMITS AND RECEIVES A BINARY COUNT (000 - 377) ON ALL SELECTED LINES. FOLLOWS: THE TEST SEQUENCE PATTERN IS AS no — . W . . SET UP THE ERROR LOOP RETURN GO SELECT A LINE NO. TO TEST - IF DONE ALL SELECTED LINES THEN GO TO THE NEXT TEST . CLEAR THE DH11 AND PRIME THE SELECTED LINE TO XxMIT TO XMIT 256. CHARS AT 9600. BAUD - 8 BIT CHARS. ~ o\ . SET UP RS TO POINT TO RCVR CORE BUFFER. . ACTIVATE THE SELECTED XMITTER. . WAIT FOR ''CHAR AVAIL'® TO SET BEFORE READING THE SILO. IF RCVR TIMEOUT REPORT ERROR AND RESTART AT STEP 2. . . IF NO TIMEOUT READ THE SILO AND STORE THE WORD IN THE RCVR CORE BUFFER - WHEN THE BUFFER IS FULL GO TO STEP8 IF NOT THEN GO TO STEP 6. COMPARE THE XMIT AND RCVR CORE IMAGE BUFFERS AND REPORT ALL DATA COMPARE ERRORS. . CHECK THE "'BAR'', ‘'BCR'', AND ''CAR'* REGISTERS FOR CORRECT CONTENTS - REPORT ALL ERRORS. 10. GO TO STEP 2 : ERRORS 8 s 0 L2228 3] e 000004 " 013262 WIS — 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282 6283 6284 6285 6286 6287 6288 6289 6290 MACY11 30A(1052) 09-MAR-78 15:32 ERROR ERROR ERROR ERROR ERROR SYNC: 22 37 40 10 7 M7277 IS CALLED TO REPORT ''DATA AVAIL'' TIMEOUT o % ' DATA COMPARE ERRORS & 5 "' "BAR'' REG NOT CLEARED = % "' “'BCR'" REG NOT ALL ZEROES . i "* ""CAR'" REG NOT UPDATED CORRECTLY SH3 INIT A H EF2 L2222 DEBUG: (222222 1. IF THE FAULT AFFECTS ONE OR MORE LINES IN AN 8 LINE GROUP <15:08> OR <07:00>, SWAP THE M7280 MODULES. IF THE FAULT SHIFTS SO THAT THE ERROR INDICATES DIFFERENT LINES THE PROBLEM IS MOST LIKELY THE M7280 THE SYMPTOM SHIFTED TO. 2. 3. IF THE FAULT GIVES DATA ERRORS BUT AFFECTS ONLY CERTAIN PATTERNS ON ONE LINE THE FAULT IS MOST LIKELY A "UART'' CHIP. IF THE FAULT GIVES DATA ERRORS BUT AFFECTS ONLY CERTAIN PATTERNS ON ALL LINES SUSPECT THE DATA PATHS EXTERNAL TO, THE M7280 MODULES. CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 T44 6305 6306 6307 6308 6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339 6340 6341 6342 6343 6344 6345 6346 6347 6348 6349 6350 6351 6352 6353 6354 6355 6356 6357 6358 6359 6360 6 12 08:05 PAGE 152 SINGLE LINE DATA TEST - ALL SELECTED LINES 10-MAR-78 4. IF THE FAULT CAUSES NO DATA ERRORS BUT GIVES ''BAR'', SUSPECT THE M7278 OR M7277 MODULES. KEY LOGIC La 24 L2 S 013264 013272 013276 013300 013302 013306 013312 013316 013322 013330 013336 013344 013350 013354 012737 004737 000401 000402 000137 013701 012711 153711 012761 012761 012761 012705 052711 013761 013362 013370 013374 013376 013400 013404 012737 005037 105711 000002 030352 004737 000773 027016 013406 013412 013414 013416 013422 013426 013432 013436 004737 010102 011203 042703 012704 153704 027200 013442 013444 013446 013450 100425 004737 004537 030322 032076 013306 024544 013732 027302 004000 030322 037312 177400 033503 036312 001000 027314 b4 1%: 11%: 2%: JSR BR BR JMP MoV MoV 000012 030350 MoV CLR TSTB BMI JSR BR JSR MoV MoV BIC MOV 176400 016125 022705 001344 000002 037312 013464 012702 012701 111204 042704 037312 036312 153704 152704 000304 030322 000200 177400 4%: 5%: #2%,SLPERR PC,SELINE 11% 2% 8% DHADR,R1 #BIT11,(R1) LINE, (R1) #TBUF ,CAR(R1) #-400,BCR(R1) #33503,LPR(R1) #RBUF ,R5 #B1T09, (R1) L INMSK ,BAR(R1) #2,TIMEA TIMEB (R1) 48 PC,TIMEIT 3% PC,SAPS R1,R2 (R2) ,R3 #176400,R3 #1200,R4 sSET UP ERROR LOOP RETURN ;GO SELECT A LINE TO TEST :.BR IF ALL SELECTED LINES DONE ;GO TEST IT SEXIT TEST sRESET DEVADR ;CLEAR THE DH11 sSET SELECT BITS IN SCR sSET UP BUS ADDRESS REG ;SET UP BYTE COUNT sSET LINE PARAMETERS ;SET UP POINTER TO INPUT DATA BUFFER ;SET MAINT MODE BIT sACTIVATE THE SELECTED LINE sINIT TIMER A JINIT TIMER B sRCVR DONE YET ?? :BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS :SAVE THE ERROR PSW ;SET UP REGADR ;GET THE WAS DATA sCLEAR JUNK BITS ;SET UP S/B DATA ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ERROR BR 22 ;CHAR AVAIL TIMEOUT MoV NRC(R1),(R5)+ ;28UF01000.R5 ;SAVE THE RECE IVED DATA EM22+51 000710 OR ''CAR'" ERRORS (REFER TO TEST 43) LINE,R4 PC.,SUER2A R5.SUNUM BISB JSR JSR L INE 104022 000304 MoV MoV Mov MoV MoV BIS Mov 3%: "BCR", 2 2883 BISB 000006 000010 000004 001200 030322 024416 024636 013452 013456 013462 013470 013474 001110 SEQ 0150 SEQ 0149 CMP BNE Mov Mov MOvB BIC SWAB BISB BISB SWAB 1% #TBUF ,R2 #RBUF ,R1 (R2) ,R4 #177400,R4 R4 LINE, R4 #200,R4 R4 ;GO TRY NEXT L INE ; INPUT BUFFER FULL ?? ;BR IF NOT ;SET UP POINTER TO QOUTPUT BUFFER ;SET UP POINTER TO INPUT BUFFER ;SET UP S/B DATA IN R4 (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 6361 6362 013516 013520 013522 001407 6365 6366 6367 6368 6369 013524 013530 013534 013536 013540 004737 004537 030322 033354 104037 6372 6373 6374 2;;2 013542 013544 013550 013554 005202 062701 022701 001347 6377 6378 6379 6380 :ggl 013556 013562 013564 013570 013572 013701 010102 062702 005712 001413 6383 6384 6385 6386 6387 6388 6389 ggg? 013574 013600 013602 013604 013610 013614 013616 013620 004737 011203 005004 004737 004537 030322 033417 104040 6392 6393 6394 gggz 013622 013624 013630 013632 010102 062702 005712 001413 6397 6398 6399 6400 6401 6402 6403 2282 013634 013640 013642 013644 013650 013654 013656 013660 004737 011203 005004 004737 004537 030322 031224 104010 6406 6407 6408 22?8 013662 013664 013670 013674 010102 062702 022712 001414 6411 6412 6413 6414 013676 013702 013704 013710 004737 011203 012704 004737 6416 013720 030322 2%22 e371 < 6415 013714 10-MAR-78 T44 011103 020304 004537 H 12 08:05 PAGE 153 SINGLE LINE DATA TEST - ALL SELECTED LINES MOV CMP BEQ 024412 024636 000002 037312 6%: 027302 000012 027200 024416 024636 000010 7%: 027200 024416 024636 00000¢ 037712 027200 037712 024416 024636 71%: (R1) ,R3 R3.R& 6% sGET THE WAS DATA :DATA CORRECT ?? :BR IF YES JSR PC,SUER2 JSR RS, SUNUM LINE EM37+33 ERROR 37 ;GO SET UP ERROR INFQ ;PUT LINE NO. IN MESSAGE INC ADD CMP BNE R2 #2,R1 #RBUF+1000,R1 5% ;UPDATE DATA BUFFER POINTERS : ;COMPARED ALL 256. CHARS ?? ;BR IF NOT MOV Mov ADD TST BEG DHADR,R1 R1,R2 #BAR,R2 (R2) 7% sRESET DEVADR ;SET UP REGADR JSR Mov CLR JSR JSR LINE EM4LO+40 ERROR PC,SAPS (R2) ,R3 R4 PC,SUER2A RS, SUNUM ;SAVE THE ERROR PSW ;GET THE WAS DATA ;SET UP S/B DATA ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE 40 :""BAR'" REG NOT ALL ZEROES Mov ADD TST BEQ R1,R2 #BCR.,R2 (R2) 718 ;SET UP REGADR JSR Mmov CLR JSR JSR L INE EM10+44 ERROR PC,SAPS (R2) ,R3 R& PC,SUER2A R5,SUNUM ;SAVE THE ERROR PSW ;GET THE WAS DATA :SET UP THE S/B DATA ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE 10 ;BYTE COUNT NCT ALL ZEROES Mov ADD CMP BEQ R1,R2 #CAR,R2 #TBUF+400,(R2) 72% ;SET UP REGADR ;DID '"CAR'" INCREMENT PROPERLY ? :BR IF YES JSR MOV Mov JSR PC,SAPS (R2) ,R3 #TBUF +400,R4 PC,SUER2A ;SAVE THE ERROR PSW ;GET THE WAS DATA ;SET UP S/B DATA ;G0 SET UP ERRGCR INFO JSR LINE R5.,SUNUM :DATA COMPARE ERROR ;WAS THE ''BAR'' ALL ZEROES ?? :BR IF YES ;BYTE COUNT REG ALL ZEROES ? ::BR IF BYTE COUNT ZERO ;G0 PUT LINE NO IN MESSAGE SEQ 0151 SEC 0150 CZDHM-D-0 CZDHMD P 6417 6418 6419 6420 6421 6422 MACY11 30A(1052) 09-MAR-78 15:32 013722 013724 104007 013726 000137 013732 000240 10-MAR-78 T44 08:05 PAGE 013272 I 12 SINGLE LINE DATA TEST EM7+47 031155 154 - ALL SELECTED LINES ERROR 7 ;"'CAR' NOT UPDATED CORRECTLY 72%: JMP 1% ;GO DO NEXT LINE 8s: NOP JEXIT POINT SEQ 0152 SEG 0151 MACY11 30A(1052) 09-MAR-78 15:32 6423 AR 6424 R R s*TEST 45 6425 6426 6427 6428 J 12 08:05 PAGE 155 BASIC PARITY LOGIC TEST - ALL SELECTED LINES - ODD PARITY 10-MAR-78 145 R 013734 000004 A R R R R R R R AR R R R R AR R R R R R R AR AN R AR AR AR RN RN BASIC PARITY LOGIC TEST - ALL SELECTED LINES - ODD PARITY R R R R R R R R R P AR R AR AR RN RN AR R R RN R RN NS TST4S5: SCOPE .REM 2 TEST ABSTRACT: 6429 2222222222222 22 6430 6431 6432 gzgz THIS TEST VERIFIES THE ODD PARITY FUNCTION FOR ALL SELECTED LINES USING THE '‘BREAK'' FUNCTION TO FORCE PARITY ERRORS. REFER TO THE FLOW CHARTS IN THE PROGRAM DOCUMENTATION FOR TEST SEQUENCES. 6435 ERRORS: 6437 6438 2228 1. 2. 6441 SYNC: 6443 6444 6445 DEBUG: 22222 6436 222228 6442 ERROR ERROR 2222 22 33 M7277 IS CALLED TO REPORT RCVR TIMEOUT IS CALLED TO REPORT DATA/PARITY ERRORS SH3 INIT A H EF2 6446 222; 1. IF FAULT AFFECTS ALL LINES SUSPECT THE M7278 MODULE. gzgg 2. IF 1T AFFECTS ONLY ONE LINE SUSPECT THE ''UART'' MODULE FOR THAT LINE. 6451 6452 KEY LOGIC: 6454 6455 223? ; 6453 2222232822 6458 6459 6460 6461 6462 6463 6464 6465 6466 6467 6468 6469 6470 22;5 013736 013744 013750 013752 013756 013782 013766 013770 013774 014002 014010 014016 014024 014032 012737 004737 000506 012711 012704 153704 000304 153711 012737 012761 012761 012761 013761 013761 013752 024544 6473 6474 6475 6476 6477 6478 014040 014046 014052 014054 014056 014062 012737 005037 105711 100423 004737 000773 000001 030352 001110 004000 000260 030322 030322 000377 073563 177777 03033¢ 027314 027314 027016 1$: 2%: 030334 000004 000010 000006 000014 000012 030350 3%: M7278 SH7 PEN LPRO4 L PEV LPROS L FF2 FN1 MGV JSR BR MOV MoV BISB SWAB BISB MOV MoV MOV MOV MOV MOV #2% ,SLPERR PC,SELINE TST46 #BIT11,(R1) #260,R4 LINE.R4 R& LINE, (R1) #377,TDATAT #73563,LPR(R1) #-1,BCR(R1) #TDATA1,CAR(R1) LINMSK ,BKR(R1) LINMSK,BAR(R1) ;SET UP ERROR LOOP RETURN ;GO SELECT A LINE NO. ;:BR IF ALL SELECTED LINES DONE ;CLEAR OUT THE DH11 ;SET UP THE S/B DATA IN R4 MOV CLR TSTB BMI JSR BR #1,TIMEA TIMEB (R1) 4% PC,TIMEIT 3% sINIT TIMER A sINIT TIMER B :RCVR DONE YET ?? ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC sSET LINE NO. IN SCR ;sLOAD XMIT BUFFER WITH TEST CHARACTER ;SET UP THE LINE PARAMETERS ;LOAD THE BYTE COUNT REG ;LOAD THE BUS ADDR REG SET BREAK BIT FOR SELECTED LINE ACTIVATE THE XMITTR SEQ 0153 SEQ 0152 - CZDHM-D-0 CZDHMD.P11 CZOHM-D-0 CZDHMD P11 6479 6480 6481 6482 6483 6484 6435 6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497 6498 6499 6500 63501 6502 6503 6504 6505 MACY11 30A(1052? 09-MAR-78 15:32 10-MAR-78 145 K 12 08:05 PAGE 156 BASIC PARITY LOGIC TEST - ALL SELECTED LINES - ODD PARITY sAROUND THIS BRANCH IF 014064 014070 014072 014076 014102 014104 014110 014114 014116 014120 014122 004737 011103 012704 153704 010102 004737 004537 030322 032076 027200 024416 024636 :SAVE R1,.R2 ;SET UP REGADR ERROR BR 22 sTIMED OUT WAITING FOR DATA AVAIL MOV CMP NRC(R1) ,R3 R3,R4 1% ;GET THE WAS DATA ;CORRECT DATA RECEIVEC ?? :BR IF YES JSR PC,SAPS R1,R2 ;SAVE THE ERROR PSW ;SET UP THE REGADR LINE EM22+51 104022 000710 014130 014132 016103 020304 001704 000002 0146134 014140 014142 014146 014152 014156 014160 014162 014164 004737 010102 062702 004737 004537 030322 033070 104033 000667 027200 014124 PC,SAPS JSR MOV MOV BISB MoV JSR JSR 100200 030322 4%: BEQ 000002 024416 024636 TIME OUT OCCURS MOV ADD JSR JSR LINE EM33+40 ERROR BR (R1) ,R3 #100200,R4 LINE, R4 PC,SUER2A R5,SUNUM 1% #NRC,R2 PC.SUER2A R5,SUNUM 33 1% THE ERROR PSW ;GET THE WAS DATA :SET UP THE S/B DATA ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ;GO TEST NEXT LINE ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ; INCORRECT DATA OR PARITY ERROR ;GO TEST NEXT LINE SEQ 0154 SEG 0153 CZDHM-D-0 CZDHMD.P11 6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559 6560 €561 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 146 A EE AR AR ARl oSttt iRttt ittt illl MULTI-LINE PARITY DATA TEST = ALL IR TST46: 000004 SEGC 0155 SEQ 0154 MULTI-LINE PARITY DATA TEST =~ ALL SELECTED LINES S*TEST 46 014166 L 12 PAGE 157 .REM R R R R R R R PR RN SELECTED LINES TR AR AR Rt SCOPE 4 TEST ABSTRACT: 1322322322222 2 THIS TEST VERIFIES ALL SELECTED LI -S CAN TRANSMIT AND RECEIVE A BINARY COUNT PATTERN WHEN RUN CONCURRENTLY. ALL CHAR LENGTHS (5, 6, 7, AND 8 BITS) ARE TESTED WITH BOTH EVEN AND ODD PARITY CHECKING SPECIFIED. THE TEST ACTUALLY INCLUDES EIGHT SUB-TESTS -~ THE PARAMETERS FOR EACH SUB-TEST RETRIEVED FROM A TABLE TAGGED ''PRTYTB:''. TO DETERMINE THE TEST SEQUENCE. REFER TO THIS TABLE ERRORS:LA228032 1. 2. 3. 4. ERROR ERROR ERROR ERROR SYNC: 41 42 34 35 IS CALLED TO REPORT FALSE RECEIVER INTRS. 1S CALLED TO REPORT SILO OVERFLOW ERRORS IS CALLED TO REPORT PARITY/DATA ERRORS 1S CALLED TO REPORT TEST TIMEOUTS (NONE) L2232 DEBUG: (REFER TO TEST 45) L2283 2 KEY LOGIC: (REFER TO TEST 45) LASRS8R0 2 014170 014176 014202 014206 014212 014216 014222 014224 014230 014234 014240 014244 014250 014254 014260 014266 014274 014300 014304 014310 014314 014320 012737 012705 005037 162705 005337 022705 001456 012706 013701 012537 012537 005237 012711 004737 016137 013737 004737 013702 012722 113712 012711 013737 014206 027364 001220 001110 18: 000004 001220 027420 001100 027302 001216 001214 001220 00400¢ 025020 000004 027312 027164 027304 014376 030316 000100 027312 1 28: MOV MOV CLR SUB DEC CMP BEQ Mov MoV Mov MoV $(MP7 #4.RS $TMP7 #PRTYTB+40.R5 213 #STACK,SP DHADR,R1 (R5)+,$THP6 (R5)+,$THPS Mov JSR MOV MoV JSR #BIT11, (R1) PC,SUPPAR LPR(R1) ,$THPO LINSEL ,$THP3 PC,CHPS2 Move Mov MCv DHRLVL, (R2) #100, (R1) LINSEL,LINACT INC 001202 001210 Mmov MoV 027560 #18,SLPERR #PRTYTB+4.RS S$THMP7 DHVCT ,R2 #38,(R2)+ :SET UP THE ERROR LOOP RETURN ;SET UP POINTER TO TEST PARAMETERS :START WITH SUB TEST #00 :RESET POINTER FOR ERROR LOOPS :RESET SUB TEST # FOR ERROR LOOP ;DONE ALL 8. SUB TESTS ?? ::BR IF YES sRESET STACK POINTER FOR ERROR LOOPS sRESET DEVADR FOR ERROR LOGPS ;GET THE BYTE COUNT PARAMETER ;GET THE LINE PARAMETERS ;GENERATE NEW SUB-TEST NO. ;CLEAR THE DH11 ;G0 SET UP PARAMETERS :SAVE CURRENT LINE PARAMETERS sSAVE SELECTED LINES PARAMETER ;GO LOCK OUT INTRS ;SET UP_THE VECTOR ;GO TO 3% ON RCVR INTERRUPT ;ENABLE CHAR AVAIL INTERRUPTS ;FLAG ALL SELECTED LINES ACTIVE CZDHM-D-0 CZCHMD.P11 6614 6615 6616 6617 014360 014364 014370 014374 012706 004737 004737 000556 001100 027150 026770 10-MAR-78 T46 08:05 PAGE 158 MULTI-LINE PARITY DATA TEST - ALL SELECTED LINES MoV MOVB €00012 001206 001206 BIC JSR JMP 21%: 2 MOV JSR JSR BR LINSEL ,BARC(R1) STSTNM,STHP2 #177400,8THP2 PC,CHPS1 7% #STACK,SP PC,CHPS1 PC,RESTRP TST47 ;ACTIVATE ALL SELECTEDLINES sSAVE THE TEST NO. ;GO CLEAR PSW ;GO WAIT FOR INTERRUPTS :RESTORE THE SP ;GO CLEAR PSW sRESTORE TRAP CATCHER ;:G0 TO NEXT TEST JRECEIVER INTERRUPT SERVICE ROUTINE 014376 014402 014404 005037 105711 100404 001212 014406 014412 014414 012711 104041 000700 004000 014416 014422 032711 001404 040000 014424 012711 004000 014430 014432 014434 014440 014442 014444 014450 014452 014456 014464 o il D ) i 014466 014474 014476 o o o 6610 6611 6612 6613 027312 001102 177400 027150 014616 o~ W 6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 Gi3761 113737 042737 004737 000137 09-MAR-78 15:32 014326 o ¢S90 014334 014342 014350 014354 i 6587 6588 6589 30A(1052) — e 6562 6563 6564 6565 6566 6567 6568 6569 6570 6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 MACY11 104042 38: 042702 006302 005237 022737 001744 036237 001002 104000 000755 010237 006237 026203 001426 004737 012711 016204 062701 062702 004737 004537 001212 033144 004537 48: 001220 58: 001212 000101 001212 030246 027312 (R1) ;CHAR AVAIL SET MoV #BIT11,(RT) ;CLEAR OUT THE DH11 BIT #BIT14,(R1) ;SILO OVERFLOW ?? Mov #BIT11,(RY) ;CLEAR OUT THE DH11 MOV MOV SWAB NRC(R1) ,R3 R3,R2 R2 ;GET THE WAS DATA SEXTRACT AND SAVE LINE NO. ASL INC CMP R2 $TAP4 #101,8THP4 ;GENERATE TABLE OFFSETR BEQ 41 2% 5% 42 2% #177760,R2 :BR IF YES sRCVR FALSE INTERRUPT - CHAR AVAIL NOT SET ;GO TRY NEXT SUB TEST :BR IF NOT ;SILO OVERFLOW ERROR ;GO TRY NEXT SUB TEST ERROR BR MoV 3s SLNSEL (R2) ,LINSEL :1S THIS ONE OF THE SELECTED LINES? 51% ;I1F SO,G0 ANALYZE THE CHARACTER ;INDICATE SOME KIND OF ERROR 5% ;CHECK THE NEXT SILO ENTRY R2,.$TMP4 CMP BEQ RBUF (R2) ,R3 6% ; CORRECT DATA RECEIVED ?? :BR IF YES JSR Mmov PC,SAPS #BIT11, (R1) JSR R5,SUNUM ;SAVE THE ERROR PSW ;CLEAR OUT THE DH11 ;SET UP S/B DATA ;SET UP WAS ADDRESS ;SET UP S/B ADDRESS ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE BEQ BIT BNE 51%: 024636 ‘s BIC 177760 024636 BMI ERROR BR 000002 024416 $TMP4 1STB ERROR BR 000671 016103 010302 000302 CLR ASR MOV ADD ADD JSR $THP4 $TMP4 RBUF (R2) ,R4 #NRC,R1 #RBUF ,R2 PC,SUER2A - EM34+51 JSR R5.SUNUM $THP7 ;PUT SUBTEST NO. IN MESSAGE SEQ 0156 SEQ 0155 CZDHM-D-0 CZDHMD P11 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 014566 MACY11 09-MAR-78 15:32 10-MAR-78 146 104034 000611 014574 014600 014604 105262 005262 001003 046237 000002 N 12 08:05 PAGE 159 MULTI-LINE PARITY DATA TEST - ALL SELECTED LINES EM34+67 ERROkK 34 BR 2% 033162 014570 014572 014606 014614 30A(1052) 6%: 036312 027562 027520 027560 618: INCB INC BNE BIC RTI ;PARITY DATA COMPARE ERROR ;GO TRY NEXT SUBTEST RBUF (R2) ;GENERATE NEW RCVD DATA MULPTB(R2) ;COUNT ONE BYTES RECEIVED 61% :BR IF NOT DONE LINBIT(R2) ,LINACT ;FLAG THIS LINE DONE sRETURN TO WAIT ROUTINE ;WAIT ROUTINE 000002 030352 000012 014642 012737 005037 005761 001413 004737 000772 014644 014652 014656 014660 016137 01271 104035 000137 000012 004000 014664 014672 012737 005037 005737 001411 004737 000772 000001 030352 027560 013737 012711 027560 004000 000137 014216 014616 014624 014630 014634 014636 014676 014702 014704 014710 014712 014720 014724 014726 104035 030350 7%: 8s: 027016 001210 MoV CLR TST BEQ JSR BR #2,TIMEA TIMEB BAR(R1) 9% PC,TIMEIT 8% INIT TIMER A ;INIT TIMER B sALL LINES DONE XMITTING ?? ;BR IF YES sCALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC MoV MOV JMP BAR(R1) ,$TMP3 #BIT11,(R1) 35 2% ;SAVE THE ACTIVE LINES FLAG ;CLEAR OUT THE DH11 ;TIMED OUT WAITING FOR TRANSMITTERS TO FINISH ;GO TRY NEXT SUBTEST MOV CLR TST BEQ JSR #1,TIMEA TIMEB LINACT 118 PC,TIMEIT sINIT TIMER A INIT TIMER B sALL CHARS RECEIVED ? :BR IF YES ;CALL THE TIMER ERROR 014216 030350 9s: 108: 027016 BR 001210 108 sTIMER ROUTINE WILL MOVE RETURN PC MOV LINACT,STMP3 sSET UP ACTIVE LINE PARAMETER ERROR 35 ;SILO EMPTY TIMEOUT MoV 118: ;AROUND THIS BRANCH IF TIME OUT OCCURS JMP #BI1T11,(R1) 2% ;AROUND THIS BRANCH IF ;CLEAR OUT THE DHI ;GO TRY NEXT SuB TEST TIME OUT OCCURS SEQ 0157 SEQ 0156 Ci Ci (ZDHA-D-0 CZDHMD.P11 B 13 10-MAR-78 147 08:05 PAGE 160 AUTO ECHO TEST 1 - ALL SELECTED LINES SRR RAARERRRRRRRARRCARRERRCERRRICRCORRCRCRRORRRIRANRACORANRRTROERERS s*TEST 47 000004 6706 6707 6708 6709 6710 6711 R R R R R R R R R R R R RN R RE R R R RN RO RO RN RN 3 1222232222222 THIS TEST VERIFIES THAT ALL SELECTED LINES CAN TURN AROUND ?SSIQG%S Tgag CHARACTER (377) AND (000) 3 LL A 1. IN AUTO ECHO MODE. THE TEST SEQUENCE SET UP THE ERROR LOOP RETURN 2. RETRIEVE THE AUTO-ECHO TEST DATA FROM "‘AETAB:'' AND UPDATE THE POINTER. 3. GO SELECT A LINE NO. TO TEST - GO TO STEP 10 IF DONE ALL SELECTED LINES. . CLEAR THE "'CAR'' AND ‘'BCR'' MEMORIES. ~NOwnmes 6675 6701 6702 6703 6704 6705 R TST47: SCOPE 3l -REM TEST ABSTRACT: 0 O . PRIME THE SELECTED LINE TO XMIT ONE CHAR WITH A.E. ENABLED. . ACTIVATE THE SELECTED TRANSMITTER. . 014732 6676 6677 6678 6679 6698 6699 6700 AUTO ECHO TEST 1 - ALL SELECTED LINES AR 6673 6674 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692 6693 6694 6695 6696 6697 SEQ 0158 SEQ 0157 2¢I;TEgR2"CHAR AVAIL' = IF TIMEOUT REPORT ERROR AND RESTART IF NO TIMEOUT = READ SILO AND COMPARE AUTO ECHO DATA RECEIVED REPORT DATA COMPARE ERRORS AND RESTART AT STEP 2 . IF NO ERRORS REPEAT STEPS 7 AND 8 SIXTY-FOUR TIMES THEN TURN OFF A.E. ENABLE AND READ LAST CHAR FROM SILO.. CHECK LAST CHAR FOR DATA COMPARE ERRORS - REPORT ERRORS IF ANY - AND RE. 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672 MACY11 30A(1052) 09-MAR-78 15:32 START AT STEP 2. 10.CHANGE A.E. TABLE POINTER TO POINT TO 'AETABO:'" (0'S DATA) AND REPEAT STEPS 2 THRU 9. ERRORS: (2322222 1. ERROR 24 SYNC: M7277 IS CALLED TO REPORT ALL ERRORS SH& LOAD BAR LB+HB L CN2 L2223 DEBUG: iy 1. IF ALL LINES FAIL, SUSPECT EITHER THE M7277 OR M7289 2. IF ONLY ONE LINE FAILS SUSPECT THE M7288 3. LOOP ON THE FAILING LINE AND TRACK BACK THROUGH THE KEY LOGIC. KEY LOGIC: L AA2222222 M7277 SH3 SH4 AE GO L cs2 7402 '‘OR'' GATE CHIPS E38 OR E41 74157 MUX CHIPS E39 OR 342 E35 - PIN 2 STUCK LOW CZDHM-D-0 CZDHMD.P11 o ~ s ey — i O oo rs P [ —y — B v wv [=l=1ol-T1=] o D N N R T T e B 6766 6767 Vi i v 6763 6764 6765 e 6737 6738 6739 6740 6741 6742 6743 6744 6745 6746 6747 6748 6749 6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 014734 014742 014746 014752 014756 014762 014764 014766 014770 014774 014776 015000 015006 015010 015014 015014 015016 015022 015026 015034 015040 015046 015054 015060 015066 S 6736 147 08:05 c13 PAGE 161 AUTO ECHO TEST 1 - ALL SELECTED LINES SK3 AE GO L EX1 AE SCAN MUX E22 PIN 10 SAMPLE STATUS H E21-12 SH4 e 6731 6732 6733 6734 6735 10-MAR-78 M7289 (=leleleleleleleleletele) 6712 6713 6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 MACY11 30A(1052) 09-MAR-78 15:32 012737 005037 012711 012705 005037 000261 000401 000241 006137 001407 012504 033737 001767 004737 000522 004737 113711 012761 010561 162761 012737 005037 012761 013761 015016 001210 004000 027420 027316 001110 012737 005037 105711 100427 004737 000773 000002 030352 004737 005061 010102 011103 042703 012704 153704 004737 004537 030322 032274 104024 027200 027016 000004 100000 000200 030322 024416 024636 Mov #2%,SLPERR sSET UP ERROR LOOP RETURN Mov MoV CLR #BI711,(R1) #AETAB,RS LMSK1 ;CLEAR THE DH11 ;GET POINTER TO AUTO ECHO DATA TABLE sINIT BIT TEST MARKER SEC BR CLC 027312 000006 001220 $TMP3 13% LMSK1 JSR PC,SELINE 128 (R5)+,R4 LMSKT,LINSEL 1% ;INIT 1/0 DATA FLAG ;SET ''C"" BIT FOR MARKER ;GO SHIFT MASK ;INIT THE *'C'* BIT sSHIFT BIT MARKER ;BR IF DONE ALL LINES sSET UP THE S/B DATA sTEST THIS LINE ? :BR IF NOT ;GO SELECT A LINE TO TEST BR JSR 6% PC,CLCABC s:BR IF ALL SELECTED LINES TESTED ;GO CLEAR ''CAR'* AND ''BCR'' MEMORIES MOV R5,.CAR(RY) ;SET UP THE BUS ADDRESS REG Mmove Mmov 000010 7, 9, 11 AE ENABLE ''NN'' H CONTROL FLOPS 74174 CHIPS PIN 15 ROL BEQ MoV BIT BEQ 024544 024716 030322 177777 000006 000002 000100 001216 133503 027314 SH5, CLR 027316 027316 M7288 LINE, (R1) #-1,BCR(R1) sSET SELECT BITS IN SCR REG ;SET UP TO XFER CNE CHAR 000004 000012 suB Mov CLR MOV Mov #2,CAR(R1) #100,8THP7 $THP6 #133503,LPR(R1) LINMSK ,BAR(R1) 030350 MOV #2,TIMEA ;INIT TIMER A TSTB (R1) sCHAR AVAIL SET ?? 3s: CLR TINMEB sCORRECT BUS ADDRESS ;COUNT 64 CHARS TO BE RECEIVED IN AUTO ECHO sINIT CHAR COUNTER ;SET UP LINE PARAMETER REG ;ACTIVATE THE LINE sINIT TIMERB BMI JSR BR 4% PC,TIMEIT 3s JSR PC,SAPS ;SAVE THE ERROR PSW MOV BIC MOV (R1),R3 #8IT15,R3 #200,R4 ;GET THE WAS DATA ;CLEAR JUNK BIT ;SET UP S/B DATA JSR R5,SUNUM CLR MOV BISB JSR LINE ' LPR(R1) R1,R2 LINE,R4 PC,SUER2A EM24+35 ERROR 24 ;BR IF YES ;CALL THE TIMER :VIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS :TURN OFF AUTO ECHO MODE :MAKE REGADR = DEVADR ;GO SET UP ERROR INFO ;GO SET LINE NO. IN MSG ;DATA AVAIL FAILED TO SET ON TIME SEQ 0159 SEQ 0158 CZDHM-D-0 CZCHMD. P11 6768 6769 6770 677 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 6787 6788 6789 6790 6791 6792 6793 6794 6795 6796 6797 MACY11 30A(1052) 09-MAR-78 15:32 015186 000677 015170 015174 015200 015202 005237 016103 020304 001417 001216 000002 015204 015210 015214 015216 015222 004737 005061 010102 062702 004737 004537 030322 032274 104024 000652 027200 000004 015226 015232 015234 015236 015240 015242 015246 015250 015252 015260 015262 015266 015270 015274 015300 005337 003317 100646 042761 000712 005137 001406 005037 012705 000137 10-MAR78 147 4%: D13 08:05 PAGE 162 AUTO ECHO TEST 1 - ALL SELECTED LINES INC MOV CMP BEQ JSR CLR MOV ADD 000002 024416 024636 JSR JSR L INE EM24+35 ERROR BR 001220 100000 001210 030322 027460 014758 58: 6%: ;GO TRY NEXT LINE $TMP6 NRC(R1) ,R3 R3,Ré 5% :COUNT ONE CHAR RECVD ;GET THE WAS DATA :WAS CHAR AUTO ECHOED CORRECTLY ? ;BR IF YES PC,SAPS LPR(R1) R1,R2 #NRC ,R2 PC,SUER2A R5,SUNUM 24 1% DEC COM BEQ CLR MoV JMP ;SAVE THE ERROR PSW sDISABLE AUTO ECHO ;SET UP REGADR ;GO SET UP ERROR INFO sPUT LINE NO. IN ERROR MSG :CHAR AUTO ECHOED INCORRECTLY ;GO TRY NEXT L INE sCOUNT ONE CHAR READ OUT OF 64 3% ;BR IF NOT LAST ONE :.BR IF LAST ONE READ sDISABLE AUTO ECHO ;GO READ LAST CHAR $TMP3 TST50 :TOGGLE 1/0 FLAG ::BR IF DONE BOTH 1/0 DATA BGT BMI BIC BR 000004 1% #BIT15,LPR(RT) LINE #AETABO.R5 7% ;INIT LINE NO 10 00 ;SET POINTER 10 0'S TABLE ;REPEAT TEST FOR ZERO PATTERNS SEQ 0160 SEQ 0159 CZDHM-D-0 CZDHMD.P11 6798 6799 6800 6801 6802 6803 6804 6805 6800 6807 6808 6809 4810 6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822 6823 6824 6825 6826 6827 6828 €829 6830 6831 6832 6833 6834 6835 6836 6837 6838 6839 6840 6841 6842 6843 6844 6845 6846 6847 6848 6849 6850 6851 6852 6853 MACY11 30A41052) 09-MAR-78 15:32 E13 10-MAR-78 150 08:05 PAGE 163 AUTO ECHO TEST 2 - ALL SELECYED LINES AR ARRRR :+TEST 50 R AR SE@ 0161 SEQ 0160 R AN RARRRTERRRRRCERORERCERRNOCRRRARNRANOARRORRRCRRORTSE AUTO ECHO TEST 2 - ALL SELECTED LINES JLERARARERRANERRRCERRRRRRERARERTRVRRRREORRORARRAARRARRORRRORACERTRTS 015304 TST50: 000004 -REM SCOPE 4 TEST ABSTRACT: 1233222222222 3] THIS TEST IS SIMILAR TO TEST 47 EXCEPT ALL SELECTED LINES OTHER THAN THE A.E. TEST LINE ARE ACTIVELY TURNING AROUND A BINARY COUNT TEST PATTERN IN NON-AUTO ECHO MODE AND THE A.E. TEST LINE IS TESTED FOR ALL 1'S DATA ONLY. ERRORS: (22222231 1. 2. ERROR ERROR SYNC: 32 31 M7277 IS CALLED TO REPORT A.E. TEST TIMEOUTS IS CALLED TO REPORT ALL DATA COMPARE ERRORS SH4 LOAD BAR LB+HB L CN2 L2223 DEBUG: (132322 REFER TO TEST 47 KEY LOGIC: (2222223823 REFER TO TEST 47 012737 012705 005037 000261 000401 000241 006137 001410 012537 033737 001766 004737 015362 027420 027316 001110 027316 001220 027316 4 18: CLR SEC BR CLC e BEQ MOV BIT BEQ JSR 128: 027312 024544 000575 015362 015366 015372 013701 012711 004737 027302 004000 027040 015376 015402 015406 015414 153711 010561 162761 012761 030322 000006 000002 177777 2%: 000006 000010 MoV MoV #28 ,SLPER. #AETAB,RS LMSK1 12% ;:SET UP ERROR LOCP RETURN ;SET POINTER TO A.E. TEST DATA TABLE sINIT BIT TEST MASK ;GENERATER MARKER BIT IN " ;GO SHIFT MASK ;INIT THE '°C** BIT ROL LMSK1 118 (R5)+,$THP7 LMSK1,LINSEL 1% PC,SELINE ;BR IF TESTED ALL LINES sGET THE A.E. TEST DATA FOR THIS LINE sTEST THIS LINE ? :BR IF NOT ;GO SELECT A LINE BR TST51 ;:BR IF DONE ALL SELECTED LINES Mov DHADR,R1 ;RESET DEVADR IN CASE OF ERROR 1.0OP BISB MoV SuB Mov LINE, (R1) R5,CAR(RY) #2,CAR(R1) #-1,BCR(RT) sSELECT THE LINE FOR A.E. TEST ;SET BUS ADDR TO XMIT TEST CHAR ;CORRECT THE ADDRESS ;XMIT ONE CHAR ON THIS LINE MOV JSR #BIT11,(R1) PC,SETALL ;SHIFT TEST BIT ;CLEAR OUT THE DH11 ;GO SET UP FOR BINARY COUNT XFER ON sALL LINES OTHER THAN THE SELECTED ONE (ZDHM-D-0 CZDHMD.P11 6854 6855 6856 6857 6858 6859 6860 6861 6862 6863 6864 6865 6866 6867 6868 6869 6870 6871 6872 6873 6874 6875 6876 6877 6878 6879 6880 6881 6882 6883 6884 6885 6886 6887 6888 6889 6890 6891 6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904 6905 6906 6907 6908 6909 MACY11 30A(1052) 09-MAR-78 15:32 01 5422 01 5430 01 5436 01 5444 01 5452 012761 113737 042737 043737 013761 027314 027312 01 5460 01 5466 01 5472 01 5476 01 5500 01 5504 012737 005037 016103 000002 030352 000002 004737 000772 027016 01 01 01 01 0 01 016137 004537 030322 032765 000004 024636 01 01 01 01 01 01 01 01 01 5560 010304 000304 042704 010402 006302 123704 001432 036237 001737 01 5562 01 5566 026203 001447 01 5570 01 5574 01 5600 01 5604 01 5610 01 5614 01 5620 01 5624 01 5626 01 5630 01 5632 004737 010437 016204 062702 012701 004737 004537 001214 032630 104031 000137 01 5636 01 5642 020337 001427 001220 01 5644 01 5650 01 5654 01 5660 01 5664 01 5670 004737 012702 013704 012701 004737 004537 027200 001220 001220 177703 024416 024636 100414 133503 001102 177400 10-MAR-78 150 000G04 001206 001206 027560 000012 03¢350 F 13 08:05 PAGE 164 AUTO ECHO TEST 2 - ALL SELECTED LINES MoV MOVB BiC BIC Mov 21%: 3%: 001202 4%: 177760 STSTNM, STHP2 #177400,8TMP2 LINMSK,LINACT LINSEL,BAR(R1) ;SAVE THE TEST NO. ;MAKE THIS LINE APPEAR INACTIVE ;ACTIVATE ALL SELECTED TRANSMITTERS #2,TIMEA TIMEB JINIT JINIT 4% PC,TIMEIT :BR IF YES ;CALL THE TIMER MoV JSR LPR(R1) ,$TMPO ;SAVE THE CURRENT "'LPR'' ERROR BR 32 ;AUTO ECHO TIMEOUT MoV Rz.R4 ;EXTRACT LINE NUMBER OF RCVD CHAR EM32+35 000700 #133503,LPR(R1) ;DO IT AT 9600 BAUD/8 BITS MOV CLR MOV BMI JSR BR L INE 104032 SEQ 0162 SEQ 0161 SWAB BIC NRC(R1) ,R3 3% R5,SUNUM 1% R TIMER A TIMER B ;GET THE WAS DATA ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS ;PUT LINE NO. IN MESSAGE ;GO TRY NEXT LINE CMPB BEQ BIT BEQ #177760,R4 R4 ,R2 :SAVE IT IN R2 R2 ;GENERATE TABLE INDEX IN R2 LINE R4 ;1S THIS THE A.E. TEST LINE ?? 5% ;BRANCH IF YES. SLNSEL (R2) ,LINSEL 218 036312 CMP BEQ RBUF (R2) ,R3 6% sRECVD DATA CORRECT ?? :BR IF IT WAS 027200 001214 036312 JSR MoV Mmov PC,SAPS ;SAVE 31 :NON-ECHO DATA COMPARE ERROR R3,$TMP7 ;CHAR ECHOED OK ?? PC,SAPS #STMP7 ,R2 :SAVE THE ERROR PSW ;SAVE THE S/B ADDRESS MoV ASL 030322 030246 027312 036312 ADD MOV 177703 024416 024636 JSR JSR $TMP5 EM31+45 ERROR JMP 015330 5%: CMP BEQ JSR MOV MoV Mov JSR JSR R4 ,STMPS RBUF (R2) ,R4 #RBUF ,R2 #177703,R1 PC,SUER2A RS, SUNUM 1% 14 $TMP7 R4 #177703,R1 PC,SUER2A R5,SUNUM THE ERROR PSW ;SAVE THE LINE NUMBER :SET UP S/B DATA ;SET UP S/B ADDRESS ;SET UP THE WAS ADDRESS ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ;GO TRY NEXT LINE ;BR IF YES :SAVE THE S/B DATA ;SAVE THE WAS ADDRESS ;GO SET UP ERROR INFO ;GO SET UP LINE NO. IN MESSAGE CZDHM-D-0 CZCHMD P11 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922 6923 6924 015674 015676 015700 015702 015706 015712 015714 015722 015726 015730 015736 015742 015744 015750 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 150 030322 032630 104031 G 13 SEQ 0163 SEQ 0162 AUTO ECHG TEST 2 - ALL SELECTED LINES EM31+45 015330 105262 001262 046237 005737 001254 036312 105761 001002 000137 000137 PAGE 165 L INE 000137 042761 08:05 027520 027560 100000 000017 015330 015460 6%: 027560 7%: 000004 8%: ERROR JMP 31 1% ;AUTO ECHO LINE DATA ERROR ;GO TRY NEXT LINE INCB BNE BIC TST BNE BIC TSTB BNE JMP JMP RBUF (R2) 21% ;GENERATE NEXT EXPECTED DATA ON THIS LINE ;BR IF ITS NOT BACK TO 000 LINACT JALL LINES INACTIVE #BIT15,LPR(R1) ;TURN OFF LINBIT(R2) ,LINACT 21% SSR+1(R1) 8% 1% 21% ;INDICATE THIOS LINE DONE 256 BYTES ;BR IF NOT THE A.E. :31L0 EMPTY 77 ;BR IF NOT ;GO TEST NEXT LINE ;GO EMPTY IT BIT (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 H 13 08:05 PAGE 166 AUTO ECHO TEST 3 - ALL SELECTED LINES 10-MAR-78 151 6925 AR 6926 s*TEST 51 6927 6928 6929 6930 AR 015754 000004 R R AR R R R R R R R R AR R R P R RN R T AR R R AR R AR AR AR SEQ 0164 SEQ 0163 OB R R RAN AUTO ECHO TEST 3 - ALL SELECTED LINES RN R R R R R R R R R R TR E R AR AR RN R RN R AT R AR R AR R R RO RN TST51: SCOPE .REM 1 TEST ABSTRACT: 6931 2SR 222222822} 6932 6933 6934 6935 6936 6937 THIS TEST IS IDENTICAL TO TEST 47 EXCEPT ALL SELECTED LINES ARE ACTIVATED CONCURRENTLY RATHER THAN ONE AT A TIME AND ONLY THE ALL 1'S DATA IS USED. ERRORS: £938 2222202 6939 6940 282; 1. 2. 6943 SYNC: 6945 6946 DEBUG: 6944 ERROR ERROR 2222 6947 36 31 m7277 IS CALLED TO REPORT ''DATA AVAIL'' TIMEOUTS IS CALLED TO REPORT A.E. DATA ERRORS SH4 LOAD BAR LB+HB L " CN2 KAERRE 6948 6949 6950 6951 REFER TO TEST 47 KEY LOGIC: 6952 2112222222 6953 6954 REFER TO TEST 47 6955 6956 6957 6958 6959 6960 6961 6962 6963 6964 6965 6966 6967 6968 6969 6970 6971 6972 23;2 015756 015764 015770 015774 016000 016004 016010 016016 016024 016026 016032 016034 016036 016040 016046 016054 016062 012737 012711 012705 012702 012703 010261 012761 012761 005023 062702 005211 005305 001362 113737 042737 013737 013761 6975 6976 6977 6978 697¢ 6980 016070 016076 016102 016106 016110 016112 012737 005037 005037 105711 100410 004737 015764 004000 000020 027420 036252 000006 177777 131403 001110 000010 000004 X 18: 28%: 000002 001102 17740C 027312 027312 001206 001206 027560 000012 000002 030352 001212 030350 027016 3%: MOV MOV MoV MOV MOV MoV MoV MoV CLR ADD INC DEC BNE MOVB BIC MOV MoV #13,SLPERR #BIT11,(RY1) #20,R5 #AETAB,R2 #RCNT,R3 R2,CAR(R1) #-1,BCR(R1) #131403,LPR(R1) (R3)+ #2,R2 (R1) RS 2% STSTNM, STMP2 #177400,8TMP2 LINSEL,LINACT LINSEL,BAR(R1) sSET UP THE ERROR LOOP RETURN ;CLEAR OUT THE DH11 ;INIT COUNTER TO SET UP 16. LINES ;SET UP POINTER TO AUTO ECXHO TEST DATA ;R3 POINTS TO TABLE OF CHAR COUNTERS ;SET UP BUS ADDRESS REG ;SET UP BYTE COUNT REG ;SET UP LINE PARAMETERS sCLEAR A COUNTER ;UPDATE POINTERS ;SELECT NEXT LINE ;COUNT ONE DONE ;BR TILL 16. DONE ;SAVE THE TEST NO. Mov CLR CLR TSTB BMI JSR #2,TIMEA TIMEB S$TMP4 (R1) 4% PC,TIMEIT ;INIT TIMER A ;INIT TIMERB ;SET FLAG TO INDICATE ALL 16. ACTIVE ;ACTIVATE ALL XMITTERS ;CHAR AVAIL SET YET ? ;BR IF YES ;CALL THE TIMER (ZDHM-D-0 CZDHMD.P11 6981 6982 6983 6984 6985 6986 6987 6988 6989 6990 6991 6992 6993 6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021 MACY11 30A(1052) 09-MAR-78 15:32 016116 000771 016120 016126 016130 016137 016132 016136 016140 016142 016146 016152 016154 016160 016166 016170 016176 016200 016202 016204 016210 016214 104036 000467 016103 010302 000302 042702 010237 006302 005237 022737 001745 036237 001002 000004 10-MAR-78 751 001202 MOV ERROR BR 48: 000002 MoV MoV SWAB BIC 177760 001216 MOV ASL 001212 000101 001212 030246 027312 INC CMP BEQ BIT 104000 000753 005262 020362 001420 i13 08:05 PAGE 167 AUTO ECHO TEST 3 - ALL SELECTED LINEC 418: 036252 027420 BNE ERROR BR INC CMP BEQ 016216 016222 016226 016232 016236 016242 016246 016250 016252 016254 004737 016204 062702 062701 004737 004537 001216 032630 104031 000415 027200 027420 027420 000002 024416 024636 016256 016264 016266 016272 016300 016306 022762 001306 013711 042761 046237 001275 000100 036252 001216 100000 027520 000004 027560 JSR MOV ADD ADD JSR JSR $TMP6 EM31+45 5%: SEC 0165 SEQ 0164 3s ;TIMER ROUTINE WILL MOVE RETURN PC( LPR(R1) ,8TMPO 36 ;SAVE THE "'LPR'' REG ;DATA AVAILABLE TIMEOUT NRC(R1) ,R3 ;GET TST152 :g.nz #177760,R2 R2,$TMP6 R2 $TMP4 g;o1.srn94 sAROUND THIS BRANCH IF TIME OUT OCCURS ;;EXIT TEST ON ERROR THE WAS DATA ;BUILD AND SAVE LINE NO. ;SAVE THE LINE NO. :GENERATE TABLE OFFSET SULNSEL(R2) ,LINSEL ;IS THIS ONE OF THE SELECTED LINES? 418 ;1F SO,GO ANALYZE THE CHARACTER 43 RCNT(R2) R3,AETAB(R2) ;INDICATE SOME KIND OF ERROR ;GO GET THE NEXT CHARACTER ;COUNT THE CHARACTER ;1S THE DATA CORRECT ?? 5% :BR PC,SAPS ;SAVE #NRC ,R1 PC,SUER2A :GENERATE THE WAS ADDRESS :GO SET UP ERROR INFO AETAB(R2) ,R4 #AETAB.R2 RS, SUNUM IF YES THE ERROR PSW ;GET THE S/B DATA ;GENERATE S/B ADDRESS ;PUT LINE NO. IN MESSAGE ERROR BR 31 :DATA COMPARE ERROR CMP BNE MoV BIC BIC BNE #100,RCNT(R2) 3s $TMP6, (R1) #BIT15,LPR(R1) :DONE 64. CHARS ON THIS LINE ? :BR IF NOT ;SELECT LINE IN SCR REG ;TURN OFF A.E. BIT TST152 ;:EXIT TEST ON ERROR LINBIT(R2),LINACT ;ALL LINES INACTIVE ?? :BR IF NOT 3s J 13 10-MAR-78 152 08:05 PAGE 168 BREAK BIT TEST - ALL SELECTED LINES SEQ 0166 SEQ 0165 AR RERERRARRARARRSERCRRRORRRRCORAORNRRORRARRARARAARRERRAOERREERRRERETS TeTEST 52 BREAK BIT TEST - ALL SELECTED LINES ::tt'l""""""'.""Q"'."'t"""."'.Q""'.'.'..'tt"'t" 1§152: LREM SCOPE X TEST ABSTRACT: (22222222222 R ] THIS TEST VERIFIES THAT THE ''BREAK'' FEATURE WORKS PROPERLY SELECTED LINES. 7033 7034 . FOR ALL = 000004 7036 7037 7038 7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050 7051 7052 7053 7054 7055 7056 7057 7058 7059 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 . 016310 N 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 MACY11 30A(1052) 09-MAR-78 15:32 SEQUENCE IS AS FOLLOWS: SET UP THE ERROR LOOP RETURN RETRIEVE THE CORRECT S/B DATA FROM THE 'BREAK'' DATA TABLE AND UPDATE THE POINTER. GO SELECT A LINE TO TEST =~ GO TO THE NEXT TEST IF DONE ALL SELECTED LINES . NOWVIES =OO0 M=o W & b TEST RESET THE DH11 AND CLEAR THE "'CAR'" AND ''BCR'' MEMORIES. . PRIME SELECTED LINE TO OUTPUT TWO 'NULL'' CHARS TO CLEAR UART . ACTIVATE THE SELECTED LINE . 7035 . THE WAIT FOR SILO TO RECEIVE AND RESTART AT STEP 2 TWO NULLS = IF TIMEOUT REPORT ERROR IF NO TIMEOUT CLEAR THE SELECTED DH11 AND RESELECT LINE NO. PRIME SELECTED LINE TO OUT PUT 256. CHARS. .SET THE SELECTED LINE'S BREAK BIT ACTIVATE THE SELECTED LINE .WAIT FOR ''BAR'' REG TO CLEAR -F TIMEOUT REPORT ERROR AND RESTART AT STEP 2 .IF NO TIMEOUT VERIFY THAT THE SILO RECEIVED ONLY ONE CHAR- IF NOT REPORT ERROR AND RESTART AT STEP 2 .IF SILO RECEIVED ONLY ONE CHAR VERIFY THAT IT WAS A "BREAK'’ CHAR - IF NOT REPORT ERROR - AND RESTART AT STEP 2 ERRORS: (22222021 1. ERROR SYNC: 25 M7277 IS CALLED TO REPORT ALL ERRORS SHé LOAD BCR H Ful kRN DEBUG: (8222224 1. IF ALL LINES FAILED SUSPECT THAT THE M7277 IS NOT GENERATING THE BREAK CONTROL REG LOAD SIGNAL. 2. IF ONLY ONE LINE FAILS SUSPECT THE BREAK CONTROL LOGIC ON THE M7278 KEY SIGNALS: LA M7277 SH& LOAD BCR H M7278 SHS5 THRU SH8 FUl 74175 REGISTER CHIPS ES51, E38, E67, E60 oTM CZDHM-D-0 CZDHMD.P11 CZDHM-D-0 CZDHMD P11 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 m 7112 7113 7114 7115 7116 7117 7118 7119 7120 7121 7122 7123 7124 7125 7126 7127 7128 7129 7130 713 7132 7133 08:05 PAGE K13 169 BREAK BIT TEST - ALL SELECTED LINES 7400 DRIVERS 016324 016330 012737 012705 005037 000261 000401 000241 006137 001411 012504 016372 027622 027316 000402 000137 012711 004737 11371 016406 016414 016422 016430 012761 012761 012761 013761 030356 016436 016444 016450 016456 016460 016464 012737 005037 122761 001432 004737 000771 000001 030352 000002 016466 016472 016476 016500 016504 004737 010437 010102 027200 001204 016506 016512 016516 016520 016524 016530 016532 016534 016540 016542 016544 016550 016554 016562 016570 027316 033737 027316 004737 000401 024544 001767 LMSK1 (R5) +,R4 LMSK1,LINSEL 027312 1% PC,SELINE 118 2% 9% #BIT11, (R1) PC,CLCABC 11$: 030322 177776 033503 027314 LINE, (RT) 042703 012704 000304 004737 004537 030322 032333 013704 104025 000674 100377 000002 ;SET UP ERROR LOOP RETURN ;SET UP POINTER TO BREAK DATA TABLE SINIT BIT TEST MASK sSET BIT MARKER IN "'C" ;GO SHIFT MASK JINIT THE ''C'* BIT sSHIFT TEST MARKER ;BR IF ALL LINES DONE +GET TEST DATA FOR THIS LINE sLINE SELECTED ? :BR IF NOT ;GO SELECT A LINE TO TEST ;:BR IF DONE ALL SELECTED LINES ;GO TEST THE SELECTED LINE ;GO EXIT TEST ;CLEAR THE DH11 ;GO CLR THE "'CAR'* AND 'BCR'' MEMORIES sSELECT THE LINE #TNULL ,CAR(R1) #-2,BCR(R1) ;SET UP TO OUTPUT TWO NULL CHARS ;SET BYTE COUNT TO 2 sSET UP LINE PARAMETERS sACTIVATE SELECTED LINE 030350 #1,TIREA TIMEB #2,SSR+1(R1) 43 PC,TIMEIT 3$ ;INIT TIMER A ;INIT TIMER B :TWO CHARS RECEIVED ?? :BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC sAROUND THIS BRANCH IF TIME OUT OCCURS PC,SAPS ;SAVE THE ERROR PSW 000017 #33503,LPR(R1) LINMSK,BAR(R1) 3s: 024416 024636 JSR MOV Mov ADD MOV BIC MOV SWAB JSR JSR LINE R4, STMP1 R1,R2 #SSR,R2 (R2) ,R3 #100377,R3 #2,R4 R4 PC,SUER2A R5 ., SUNUM MOV $TMP1,R4 EM25+34 001204 004000 030322 037312 177400 033503 E45, E46, E75, E76 000006 000010 000004 000012 027016 000016 761 12% 11% 017046 004000 024716 062702 011203 LMSK1 b 016332 016334 016336 016342 016344 016346 016354 016356 016362 016364 016366 016372 016376 016402 #2% SLPERR #BRKTAB,RS 001110 o 016320 - 016312 N 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 152 ERROR BR 4%: 000006 000010 000004 MoV MOvB MoV Mov Mov 25 1% #BIT11,(R1) LINE, (R1) #TBUF ,CAR(RT) #-400,BCR(R1) #33503,LPR(R1) :SAVE S/B DATA ;SET UP REGADR ;GET THE WAS DATA s CLEAR JUNK :SET UP S/8 DATA ;GO SET UP ERROR INFO ;GO PUT LINE NO. IN MESSAGE ;RESTORE S/B DATA ;TIMED OUT WAITING FOR TWO NULLS ;GO TRY NEXT LINE ;CLEAR THE INTERFACE sSELECT THE LINE ;SET UP BUS ADDRESS REG FO R X M ITTR ;SET BYTE COUNT TO XMIT 25 6( 1 0 ) CHARS ;SET UP LINE PARAMETERS SEQ 0167 SEQ 0166 CZDHM-D-0 CZDHMD.P11 7134 7135 7136 7137 7138 7139 7140 7141 7142 7143 7144 7145 7146 7147 7148 7149 7150 7151 7152 7153 7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 nn 7172 7173 7174 7175 7176 7177 7178 7179 7180 7181 7182 7183 7184 7185 7186 7187 7188 7189 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 152 L 13 08:05 PAGE 170 BREAK BIT TEST - ALL SELECTED LINES SEQ 0168 SEQ 0167 016576 016604 013761 013761 027314 027314 000014 000012 MOV MOV LINMSK,BKR(R1) LINMSK,BAR(R1) ;SET BREAK BIT FOR ACTIVE LINE ACTIVATE THE SELECTED LINE 016612 016620 012737 005037 005761 001426 004737 000772 000005 030352 000012 030350 MoV CLR TST BEQ JSR #5,TIMEA TIMEB BAR(R1) 6% PC,TIMEIT SINIT TIMER A ;INIT TIMER B ;BAR BIT CLEARED ?? ;BR IFD YES ;CALL THE TIMER 016624 016630 016632 016636 004737 010437 010102 062702 027016 016640 016644 016650 016652 016656 016660 016662 016666 016672 016674 016676 016702 016704 005004 004737 004537 030322 032333 013704 104025 000613 016706 016714 122761 001430 000001 016716 016722 016726 016730 016734 016736 016742 016746 016750 016754 016760 016762 016764 016770 016772 004737 010437 010102 062702 011203 042703 012704 000304 004737 004537 030322 032333 013704 027200 001204 011203 5%: BR 027200 001204 JSR Mov MOV ADD 000012 MOV CLR JSR JSR LINE EM25+34 MoV 024416 024636 001204 ERROR 6%: PC,SAPS R4 ,$THP1 R1,R2 #BAR,R2 (R2) ,R3 R4 PC.SUER2A R5,SUNUM $TMP1,R4 ;TIMER ROUTINE WILL MOVE RETURN PC :AROUND THIS BRANCH IF TIME OUT OCCURS ;SAVE THE ERROR PSW sSAVE THE S/B DATA ;SET UP REGADR ;GET THE WAS DATA ;SET UP §/B DATA ;GO SET UP ERROR INFO ;PUT LINE NO IN MESSAGE ;RESTORE THE S/B DATA 25 ;BAR BIT FAILED TO CLEAR CMPB BEQ #1,55R+1(R1) 78 ;ONE CHAR RECEIVED ? :BR IF YES JSR PC,SAPS ;SAVE THE ERROR PSW :SAVE THE S/B DATA ;SET UP REGADR BR 060017 5% 1% ;GO TRY NEXT LINE MOV MOV ADD MoV BIC Mov SWAB JSR JSR LINE R4 ,STHP1 R1,R2 #SSR,R2 (R2) ,R3 #100377 ,R3 #1.R4 R4 PC,SUER2A RS, SUNUM 001204 MoV $TMP1, R4 ;RESTORE THE S/B DATA 000137 016334 JMP 1% ;GO TRY NEXT LINE 016776 017002 017004 017006 016103 020304 001002 000137 000002 017012 017016 017020 017024 017030 017034 004737 010102 062702 004737 004537 030322 027200 104025 000016 100377 000001 024416 024636 EM25+34 ERROR 7%: 016334 000002 024416 024636 8$: 25 ;GET THE WAS DATA ;CLEAR JUNK ;SET UP S/B DATA ;GO SET UP ERROR INFO ;GO PUT LINE NO. IN MESSAGE sFAILED TO RECEIVE THE ONE CHAR Mov NRC(R1) ,R3 ;GET THE WAS DATA BNE JHP 8% 1% :BR IF NOT CORRECT ;GO TEST NEXT LINE CMP JSR Mov ADD JSR JSR LINE R3,R4 PC,SAPS R1,R2 #NRC,R2 PC,SUER2A R5,SUNUM ;WAS IT A BREAK CHAR ? ;SAVE THE ERROR PSW ;SET UP REGADR ;GO SET UP ERROR INFO ;PUT LINE NO IN MESSAGE CZDHM-D-0 CZDHMD P11 7190 717 7192 7193 7194 017036 017040 017042 017046 MACY11 30A(1052: 09-MAR-78 15:32 10-MAR-78 152 032333 104025 000137 000240 016334 9%: 13 08:05 PAGE 171 BREAK BIT TEST - ALL SELECTED LINES EM25+34 2% ERROR 1% JMP NOP ; INCORRECT DATA RECEIVED ;GO TRY NEXT LINE SEXIT THIS TEST SEQ 0169 SEQ 0168 Cl €2z CZDHM-D~0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 N 13 08:05 PAGE 172 HALF DUPLEX TEST - ALL SELECTED LINES 10-MAR-78 153 7195 AR RR 7196 ;*TEST 53 HALF DUPLEX TEST - ALL SELECTED LINES 7197 7198 7199 7200 7201 7202 7203 7204 RN R R R R R A AR R R R AR AR RN RN R RN R AR RN et e e e e e Y 017050 000004 TST53: SCOPE .REM 4 TEST, ABSTRACT: EARARARARRERS THIS TEST VERIFIES THAT THE RECEIVERS ON ALL SELECTED LINES ARE "BLINDED'' WHEN THE HALF~DUPLEX MODE IS ENABLED. THE TEST ;ggz SEQUENCE IS AS FOLLOWS: 7207 1. 7208 7209 7210 7211 7212 7213 7214 7215 7216 7217 7218 7219 ERRORS : 7221 ;%%g 1. 7224 SYNC: 772¢6 T DEBUG: 7229 ;gg? 1. 7232 KEY LOGIC: SET UP THE ERROR LOOP RETURN 2. GO SELECT A LINE NO. TO TEST 3. IF DONE ALL SELECTED LINES - GO TO THE NEXT TEST 4. RESET THE DH11 AND CLEAR THE ''CAR'' AND ''BCR'' MEMORIES S. PRIME THE SELECTED DH11 TO XMIT 256. CHARS IN HALFDUPLEX MODE. 6. ACTIVATE THE SELECTED LINE AND WAIT FOR THE 'BAR'' REG TO CLEAR 7. IF TIMEOUT - REPORT ERROR AND GO TO STEP 2 8. IF NO TIMEOUT VERIFY THE '‘CHAR AVAIL' DID NOT SET (RECEIVER BLINDED) - IF ERROR REPORT IT AND GO TO STEPZ2 - IF NO ERROR GO TO STEP 2 7220 1222222 7275 ERROR ARRRE 7228 26 M7277 IS CALLED TO REPORT ALL ERRORS SH3 INIT A H EF2 22222 7233 SUSPECT EITHER THE M7289 OR THE M7288 MODULES 2122222222, 7234 7235 ;ggg 7238 7239 7240 7241 7242 7243 7244 7245 7246 7247 7248 7249 7250 R R R A SEQ 0170 SEQ 0169 . 0 17052 017060 17064 817066 017072 0 }7076 017102 0 012737 004737 000477 012711 004737 153711 012761 017066 024544 004000 024716 030322 037312 001110 b4 18: 2s: 000006 M7289 SHS HALF DUPLEX <i5:00> H SIGNALS M7288 SHS SH7 SH9 SH11 HALF DUPLEX <03:00> H SIGNALS b ' <07:00> H SIGNALS i ' <11:08> H SIGNALS Ry b <15:12> H SIGNALS MOV JSR BR MOV JSR BISB MOV #2% ,SLPERR PC,SELINE TST54 #BIT11,(R1) PC,CLCABC LINE, (R1) #TBUF ,CAR(RT) END OF CHAR <15:00> SIGNALS ;SET UP ERROR LOOP RETURN ;:BR IF ALL LINES TESTED ;CLEAR THE INTERFACE ;60 CLR THE ""CAR'" AND "'BCR'' MEMORIES ;SELECT THE LINE ;POINT TO XMIT BUFFER CZDHA-D~0 CZDHMD .P11 7251 7252 7253 7254 7255 7256 7257 7258 7259 7260 7261 7262 7263 7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278 7279 7280 7281 7282 7283 7284 7285 7286 7287 7288 MACY11 30A(1052) 09-MAR-78 15:32 017110 017116 017124 012761 012761 013761 017132 017140 017144 017150 017152 017156 012737 005037 005761 001423 004737 000772 017160 017164 004737 016103 010102 062702 005004 004737 017170 017172 017176 017200 017204 017210 017212 017214 017216 017220 017222 017224 017230 017232 017234 017240 017244 017250 017254 017256 017260 017262 004537 030322 032376 177400 073503 027314 000001 030352 000012 10-MAR-78 153 #-400,BCR(R1) #73503,LPR(R1) XMIT 256(10) CHARS ;SET UP THE LINE PARAMETERS 03C350 MoV CLR TST BEQ JSR BR #1,TIHEA TIMES BAR(R1) 4% PC,TIMEIT 3% SINIT TIME A INIT TIME B ;WAIT FOR XMITTR TO FINISH :BR IF XMITTR FINISHED sCALL TIMER ;TIMER WILL MOVE RETURN PC AROUND JSR MOV MoV ADD CLR JSR JSR LINE PC,SAPS BAR(R1) ,R3 R1,R2 #BAR . R2 R4 PC,SUER2A R5,SUNUM :SAVE THE ERROR PSW ;GET THE WAS DATA ;SET UP REGADR ERROR BR 26 1% ;BAR BIT FAILED TO CLEAR ON TIME ;GO TRY NEXT LINE TSTB BPL (R1) 1% ;CHAR AVAIL SET ?? ;BR IF NOT IT SHOULDN'T BE JSR Mov PC,SAPS R1,R2 ;SAVE THE ERROR PSW ;SET UP REGADR LINE R4 PC,SUER2A :SET UP S/B DATA ;GO SETUP ERROR INFO MOV 3%: 027200 000012 000012 024416 024636 EM26+37 4%: 004737 027200 042703 113704 004737 004537 030322 032376 100000 030322 000676 024416 024636 SEQ 0171 SEQ 0170 MoV MOV 027016 105711 100316 104026 PAGE 173 HALF DUPLEX TEST - ALL SELECTED LINES 000010 000004 000012 104026 000720 010102 011103 08:05 B 14 LINMSK ,BAR(R1) MOV BIC (R1) ,R3 #BIT15,R3 JSR R5, SUNUM MOvB JSR LINE EM26+37 ERROR 26 BR 1% ;ACTIVATE THE SELECTED LINE ;THIS BRANCH IF TIMEOUT OCCURS ;SET UP NEW S/B DATA ;GO SET UP THE ERROR INFO sPUT LINE NO. IN MESSAGE ;GET WAS DATA ;CLEAR JUNK BIT ;PUT LINE NO. IN MSG sHALF DUPLEX FAILED TO BLIND RECVR ;GO SELECT NEXT LINE CZDHM-D-0 CZDHMD .P11 7289 7290 729 7292 7293 7294 7295 7296 7297 7298 MACY11 30A(1052) 09-MAR-78 15:32 AR 017264 000004 R R AR R TST54: -REM SCOPE 1 R R R R R R R R R R AR R R RN R R R R R RN R R RO R R R R RN VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES R R R R R R R R R R RN R R AR RN R RE AR AR RN TEST ABSTRACT: 2222232322228 22 THAT ARE . PROGRAM. THIS TEST VERIFIES THAT "'OVERRUN'' SETS PROPERLY FOR ALL LINES SELECTED FOR TEST WHEN THE OVERRUN CONDITION IS FORCED BY THE THE TEST SEQUENCE IS AS FOLLOWS: 1. SET UP THE ERROR LOOP RETURN 2. SELECT A LINE NO. TO TEST - IF DONE ALL LINES GO TO THE NEXT TEST. 3. PRIME THE SELECTED LINE TO XMIT 68. CHARS 4. ACTIVATE THE SELECTED LINE 5. WAIT FOR ‘"XMIT DONE'' TO SET - IF TIMEOUT REPORT ERROR AND RESTART AT STEP 2 6. IF NO TIMEOUT READ 65. CHARS FROM THE SILO AND VERIFY THAT "'OVERRUN'' IS SET ON THE LAST WORD READ 7. IF NOT REPORT ERROR AND RESTART AT STEP 2 ERRORS: 2228222 1. 2. ERROR ERROR SYNC: 50 56 M7277 IS CALLED TO REPORT ‘‘XMIT DONE ‘' TIMEOUTS IS CALLEDT TO REPORT "‘OVERRUN'' ERROR SH3 INIT A H EF2 L2222 DEBUG: L2283 3] 1. I FAULT APPEARS ON ONLY ONE LINE SUSPECT UART MODULE FOR THE APPROPRIATE LINE IN QUESTION. 2. IF FAULT APPEARS ON ALL LINES SUSPECT THE M7279 MODULE KEY LOGIC: 7330 7331 7332 (2282220222 7333 7344 AR s*TEST 54 7299 7300 7301 7302 7303 7304 7305 7306 7307 7308 7309 7310 7311 7312 7313 7314 7315 7316 7317 7318 7319 7320 7321 7322 7323 7324 7325 7326 7327 7328 7329 7334 7335 7336 7337 7338 7339 7340 7341 7342 7343 C 14 08:05 PAGE 174 VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES 10-MAR-78 154 M7279 SH1 MASTER OR H M7280 SH2 UC1 OR 2 MASTER OR Mov JSR #2%,SLPERR PC,SELINE ;SET UP ERROR LOOP RETURN ;GO SELECT A LINE # TO TEST Move LINE, (R1) ;SELECT THE LINE TO TEST SH2 SH2-5 E12-9 MEMORY CHIP (3341) E13-11 EN2 UART PIN 15 (BUF OR LINE NN) % 017266 017274 017300 017302 017306 012737 004737 000512 012711 IRETAR 017302 024544 004000 030322 001110 18: 2$: BR Mov TST55 #BIT11,(R1) ::BR IF DONc ALL SELECTED LINES ;CLEAR OUT THE DHU SEQ 0172 SEQ 0171 7345 7346 7347 7348 7349 7350 7351 7352 7353 7354 7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 737 7372 7373 7374 7375 7376 7377 7378 7379 7380 7381 7382 7383 7384 7385 7386 7387 7388 7389 7390 10-MAR-78 08:05 PAGE 175 D 14 MACY11 30A(1052) 017312 017320 017326 017334 012761 012761 012761 013761 037312 177674 033503 027314 006006 000010 000004 000012 #TBUF ,CAR(RT1) ;SET UP CURRENT ADDRESS #33503,LPR(RY) LINMSK ,BAR(R1) ;DO IT AT 9600 BAUD - 8 BITS ;ACTIVATE THE SELECTED LINE 017342 017350 017354 017356 017360 017364 012737 005037 005711 100425 004737 000773 000001 030352 030350 #1,TIREA TIMEB (R1) sINIT TIMERS A AND B BMI JSR BR 4% PC,TIMEIT 3% s TRANSMITTER TONE ?? ;BR IF YES ;CALL TIMER :BR IF NO TIMEOUT 004737 027200 JSR PC,SAPS ;GO SAVE PSW 042703 113704 052704 010102 004737 004537 030322 034254 077760 030322 LINE, R4 ;SET UP S/B DATA CZDHM-D~0 CIDHMD .11 017366 017372 017374 017400 017404 017410 017412 017416 017422 017424 017426 017430 017432 017440 017444 017446 017452 017456 017462 017466 017470 017472 017474 09-MAR-78 15:32 011103 154 #-68. ,BCR(R1) 3s: 027016 MoV BIC MOVB 100000 113704 000304 152704 052704 016103 005337 001373 020304 001700 004737 010102 062702 004737 004537 030322 034672 104056 000663 ERROR 50 ;REPORT XMIT DONE TIME OUT MoV MOvB #65.,8TMP1 k{NE.R4 ;SET UP TO READ 65. WORDS FROM SILO ;SET UP S/B DATA JSR JSR LINE EM50+53 000721 BR 000101 030322 001204 4%: 000101 140000 000002 001204 027200 000002 024416 024636 5%: ;GET THE WAS DATA sCLEAR UNINTERESTING BITS ;SET UP REGADR ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE HEADER Mov 024416 024636 (R1) ,R3 #77760,R3 ;SET UP BYTE COUNT REG #BIT15,R4 R1,R2 PC,SUER2A R5,SUNUM BIS 104050 012737 VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES SWAB BISB BIS MoV DEC BNE CMP BEQ JSR MoV ADD JSR JSR LINE 1% ;GO TRY NEXT LINE #65. R4 #BIT15+BIT14 R4 ;PUT IN OVERRUN AND VALID DATA BITS NRC(R1) ,R3 ;GET WAS DATA FROM SILO 5% R3.R4 1% :BR TIL 65. READ ;WAS DATA AND OVERRUN CORRECT ?? ;BR IF YES TRY NEXT SELECTED LINE $THMP1 PC,SAPS R1,R2 #NRC,R2 PC,SUERZA R5.SUNUM EM56+42 ERROR 56 1% BR ;COUNT ONE WORD READ ;GO SAVE PSW :SET UP REGADR ;GO SET UP ERROR INFO ;G0 PUT LINE NO. IN MSG HDR ;OVERRUN OR DATA INCORRECT ;GO TEST NEXT SELECTED LINE SEQ 0173 SEQ 0172 (ZOHM-D-0 CZDHMD.P11 7391 7392 7393 7394 7395 7396 7397 7398 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 155 :+TEST 55 7446 ABBREVIATED MODEM CONTROL DIAGNOSTIC ::ltitttt""i""itt"t'tt'i'itt'itt"il.t'.ttl.ttttt'tttt'lt't' 017526 000004 7S155: .REM SCOPE % TEST ABSTRACT: 1222232202220 2 AND ARE THE FOLLOWING 4 TESTS ARE EXTRACTED FROM DZDHK DIAGNOSTIC INSERTED HERE SO THAT ALL LEVEL CONVERTERS AND CABLES CAN BE CHECKED WITH JUST ONE PROGRAM (RATHER THAN TWO) USING THE H315 TURNAROUND CONNECTOR. CAN BE THIS TEST VERIFIES THAT THE LINE ENABLE FUNCTION FLIP-FLOP SET AND CLEARED FOR THE SELECTED LINE. ERRORS L28224 THE IF ANY ERRORS OCCUR IN THE FOLLOWING TESTS, THEN DZIDHK, MODEM CONTROL DIAGNOSTIC SHOULD BE RUN IN ITS ENTIRETY FOR A MORE COMPLETE MODEM CONTROL CHECKOUT. 7415 7445 SEQ 0174 SEQ 0173 ':tt...'.'t"."i""""""t""'tt"t'.Qttt'.".tl'tt'l'tttttt 7399 7400 7401 7402 7403 7404 7405 7406 7407 7408 7409 7410 741 7412 76413 7414 7416 76417 7418 7419 7420 7421 7422 7423 7424 7425 7426 7427 7428 7429 7430 7431 7432 7433 7434 7435 7436 7437 7438 7439 7440 7441 7442 7443 7444 E 14 08:05 PAGE 176 ABBREVIATED MODEM CONTROL DIAGNOSTIC 4 017530 017536 017540 017544 017550 017556 017562 017566 017572 017600 017606 017612 017614 017616 017620 017624 017630 017632 017636 017644 017652 017656 017662 017670 017674 017700 017706 217712 017714 032777 001402 000137 012700 013737 006337 063700 011037 013737 062737 005737 001004 104401 036216 000137 004737 000473 005077 013737 042737 113701 010137 012777 012702 010177 012777 005077 005005 017704 002000 161402 020576 030144 030320 001202 001202 030310 030310 000002 030310 001202 28: 030312 030312 BIT BEQ #B1T10,aSwR 2% sCHECK MODEM CONTROL? ;BRANCH IF YES. MoV #OMADRS ,RO ;RO POINTS TO BEGINNING OF DM ADDRESS TABLE. ASL ADD MoV $TMPO $TMPO,RO (RO) ,DHMCSR :DOUBLE TMPO sCREATE AN OFFSET. ;MOVE THE DM ADDRESS INTO DHMCSR. ADD #2 ,DHMLSR sSAVE LINE STATUS REGISTER ADDRESS. ?NEE DOITI ;BRANCH IF YES. JMP Mov MOV TST Y 020576 024544 010452 030310 000340 030322 001206 002000 000020 010410 000001 010376 010372 001202 177776 ENDA DHNUM, $THPO DHMCSR ,DHMLSR DHMCSR ;OTHERWISE, GET OUT. ;1S THERE A MODEM CONTROL HERE? MSG5 JMP DOIT11: JSR BR ENDA PC,SELINE MUX11: CLR aDHMCSR BIC #340,PS ;SAVE DEVICE REGISTER FOR ERROR MESSAGE ;ENABLE INTERRUPTS R1,$TMP2 :SAVE LINE NUMBER FOR ERRGCR MESSAGE MoV MovB Mov 1ST56 DHMCSR,$TMPO L INE,R1 010420 MUX11A: MOV #CLRMUX ,aDHMCSR 010404 Mov #LINENA ,3DHMLSR Mov Mov MUX11B: CLR CLR Mov #16. ,R2 R1,3DHMCSR :NO MODEM CONTROL FOUND. ;GET OUTTA HERE. ;GO SELECT A LINE. ::BR IF DONE ALL SELECTED LINES ;CLEAR CONTROL STATUS REGISTER aDHMCSR ;SELECT LINE TO BE TESTED ;SET LINE ENABLE FUNCTION FLIP-FLOP ;THE STEP BIT WILL BE USED TO FIND RIGHT LINE aDHMLSR R4 ;READ LINE STATUS REGISTER RS C7DHM-D CZDHMD.P11 76447 7448 7449 7450 7451 7452 7453 7454 7455 7456 7457 7458 7459 7460 7461 7462 7463 7464 7465 7466 76467 7468 7469 7470 747 7472 017720 017724 017730 017732 017734 MACY11 30A(1052) 09-MAR-78 15:32 117703 042703 020103 001002 012705 017740 017742 017744 017746 017750 017752 017760 017762 017764 017766 017772 017774 020000 020004 020006 020504 001403 030504 001001 104960 052777 005302 001353 005005 010177 010103 005077 020012 020014 020016 001704 105227 001375 017704 104060 000702 10-MAR-78 155 08:05 010364 177760 000001 MUX11C: PAGE 010330 MOVB BIC CMP BNE MOV aDHMCSR ,R3 #177760,R3 R1,R3 CMP BEQ BIT RS ,R4 MUx11D R5,R4 ERROR Mux11D: gég BNE 010316 010312 000000 010300 F 14 ABBREVIATED MODEM CONTROL DIAGNOSTIC BNE 000400 177 CLR MUXT1E: MOV MUX11C #LINENA,RS MUXx11D 60 :STEP.GDHHCSR JREAD CONTROL STATUS REGISTER s CLEAR UNWANTED BITS ;IF LINE NUMBER=SELECTED LINE NUMBER, SEXCEPT LINE ENABLE FUNCTION FLIP FLOP ;70 BE SET ; COMPARE EXPECTED AND RECEIVED SRESULTS ;TEST TO SEE IF THE LINE ENABLE BIT WAS SET :1F SO, EVERYTHING IS OK ;INDICATE A MODEM CONTROL ERROR ;EXAMINE NEXT LINE MUX118 RS R1,3DHMCSR MoV CLR INCB BNE Mov R1,R3 aDHMLSR #0 .=4 adDHMLSR R4 BEQ ERROR BR DoITNM 60 DOITI SEQ 0175 ;SET LINE COUNTER TO SELECTED LINE ;CLEAR LINE ENABLE FLIP FLOP ;DELAY FOR CABLE ;DITTO JREAD LINE STATUS REGISTER ;WAS LINE ENABLE FUNCTION FLIP FLOP : CLEARED ;MODEM CONRTROL ERROR :D0 THE NEXT LINE THAT IS SELECTED SEQ 0174 CZDHM-D-0 CZDHMD.P11 7473 7474 7475 7476 7477 7478 7479 7480 7481 7482 7483 7484 7485 7486 7487 7488 7489 7490 749 7492 7493 7494 7495 7496 7497 7498 7499 7500 7501 7502 7503 7504 7505 7506 7507 7508 7509 7510 751 7512 7513 7514 7515 7516 7517 7518 7519 7520 7521 7522 7523 7524 7525 7526 7527 7528 MACYT1 30A(1052) 09-MAR-78 15:32 10-MAR-78 156 G 14 08:05 PAGE 178 MODEM CONTROL DIAGNOSTIC CONTINUED SEQ 0176 SEQ 0175 ';t.'lt.""'i"""'ii""t"t't".'ttt't'ttt.'!...'Q'Q'Qt.tt't' S*TEST 56 AR AR 020020 AR AR ERR MODEM CONTROL DIAGNOSTIC CONTINUED AR AR EARCERRERREREORRRERRRRERRRRRRRRRRRRRRRRRAORRREY TST56: SCOPE -REM B TEST ABSTRALT: 000004 i2222222222020 IF THIS TEST VERIFIES THAT CLEAR TO SEND AND CARRIER ARE ""LINE ENABLE'® AND TERMINAL ARE SET FOR THE SELECTED LINE. SET ERRORS: AR 222224 DZDHK. 005077 004737 000471 005077 042737 113701 020022 020026 020032 020034 020040 020046 020052 020060 020064 020070 020074 020102 020106 020110 020114 020120 020124 020126 020130 042703 020103 001002 012705 020134 020136 020140 020142 020405 001401 104060 052777 020150 020152 020154 020160 020162 020166 020174 020200 020202 020206 020210 020212 020214 012777 010137 012702 010177 012777 005077 005005 017704 117703 005302 001355 012705 010103 010177 042777 105227 001375 017704 020504 001704 104060 000702 % DOIT15: 010264 024544 010250 000340 030322 002000 001206 000020 010214 000003 010202 177776 MUX15: 010230 MUX15A: 010210 MUX158: 010176 010170 177760 MUX15C: 010140 000001 010122 000002 000000 010104 ANY ERRORS OCCUR, RUN THE CLR aDHMLSR BR TST57 JSR 010116 sCLEAR LINE STATUS REGISTFR MovB MoV MOV MOV MOV Mov CLR CLR MOV MOvB LINE,R1 #CLRMUX ,@DHMCSR R1,$THP2 #16..R2 R1,3DHMCSR #LINENA+TRMRDY ,@DHMLSR aDHMCSR RS aDHMLSR ,Ré @DHMCSR,R3 MoV #LINENA+TRMRDY+CO+CS,RS CMP #340,PS #177760,R3 R1,R3 MUX15C R4 RS BEQ ERROR MUX15D 60 BNE MUX158B Mov MOV Mov BIC INCB BNE MoV CMP BEQ ERROR BR #STEP,3DHMCSR R2 #LINENA RS R1,R3 R1,3DHMCSR #TRMRDY ,3DHMLSR #0 .=4 adDHMLSR R4 R5,R4 DOIT15 60 DOIT15 ;GO SELECT A LINE. ;:BR IF DONE ALL SELECTED LINES @DHMCSR MUX15D: BIS DEC MUX15E: PC,SELINE MODEM CONTROL DIAGNOSTIC, CLR BIC BIC CMP BNE 000143 000400 IF ;CLEAR CONTROL REGISTER ;ENABLE INTERRUPTS sRESET ALL THE LINE STATUS REGISTERS ;SAVE LINE NBUMBER FOR ERROR MESSAGE ;16 LINES sSELECT A LINE ;SET LINE ENABLE +TRMRDY ;CLEAR CONTROL REGISTER ;CLEAR EXPECTED RESULT sREAD LINE STATUS ;READ LINE NUMBER ;CLEAR UNWANTED BITS ;IF RECEIVED LINE=SELECTED LINE SEXPECT LINE ENABLE AND sCLEAR TO SEND AND CARRIER ARE SET : COMPARE EXPECTED AND ;RECEIVED RESULTS sMODEM CONTROL ERROR ;UPDATE LINE COUNTER ;CONTINUE IF ALL CHECKS :ARE NOT DONE FOR THIS LINE ;EXPECT LINE ENABLE ;ON SELECTED LINE sSELECT LINE ;CLEAR TERMINAL ;DELAY FOR CABLE ;DITTO ;READ LINE STATUS REGISTER ;ONLY LINE ENABLE SHOULD BE ;SET ON THIS LINE ;MODEM COMNTROL ERROR ;GO DO THE NEXT LINE (ZDHM-D-0 CZDHMD P11 7529 7530 753 7532 7533 7534 7535 7536 7537 7538 7539 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 57 7562 7563 7564 7565 7566 7567 7568 7569 7570 757 7572 7573 7574 7575 7576 7577 7578 7579 7580 7581 7582 7583 SEQ 0177 SEQ 0176 JoRRERRRRARERARERRARREARERRERRERRRRRIRRARRRIRARRRARARRRRARRAOARRORRRRARRORCTRTS SeTEST 57 AR AR 020216 TST57: 000004 -REM MODEM CONTROL DIAGNOSTIC CONTINUED R R R R RN R R AR R R RN RN RN RO R Y SCOPE 2 TEST ABSTRACT: (1222222222220 2 2] REQUEST THIS TEST VERIFIES THAT RING TO SEND ARE SET FOR THE IS SET IF SELECTED LINE. "LINE ENABLE'" AND ERRORS: 7540 7541 7542 7543 7544 7545 7546 7547 7548 7549 7550 7551 7552 7553 7554 7555 7556 7557 7558 7559 7560 7561 H 14 08:05 PAGE 179 MODEM CONTROL DIAGNOSTIC CONTINUED 122222283 . DZDHK. 005077 004737 000466 005077 042737 020220 020224 020230 020232 020236 020244 020250 020254 020260 020264 020272 020276 020300 020304 020310 020314 020316 020320 042703 020103 001002 012705 020324 020326 020405 001401 020330 020332 020340 020342 020344 020350 020352 020356 020364 020370 020372 020376 020400 020402 020404 113701 010137 012702 010177 012777 005077 005005 017704 117703 104060 052777 005302 001355 012705 010103 010177 042777 105227 001375 017704 020504 001707 104060 000705 4 DOIT16: 010066 024544 010052 000340 030322 001206 000020 010024 000005 010012 177776 010020 MUX16: ANY ERRORS OCCUR, CLR aDHMLSR JSR BR CLR BIC Move MoV MUX16A: MOV MoV MUX16B: 010006 010000 177760 IF MOV CLR CLR Mov MovB BIC CHP BNE Mov 000205 MUX16C: 000400 007750 000001 007732 00000¢ 000000 007714 007726 CMP BEQ ERROR Mux16D: BIS DEC BNE MoV MUX16E: MOV MoV BIC INCB BNE MOV CMP BEQ ERROR BR RUN THE MODEM CONTROL DIAGNOSTIC, TST60 ;CLEAR LINE STATUS REGISTER ;GO SELECT A LINE. ::BR IF DONE ALL SELECTED LINES #340,PS ;ENABLE INTERRUPTS PC,SELEINE aDHMCSR L INE,R1 R1,8THP2 #16. ,R2 R1,3DHMCSR #LINENA+RS ,aDHMLSR aDHMCSR RS aDHML SR, R4 @DHMCSR,R3 #177760,R3 R1,R3 MUX16C #LINENA+RS+RING,RS R4 RS MUX16D 60 #STEP,aDHMCSR R2 MUX168 #LINENA RS R1,R3 R1,3DHMCSR #RS,3DHMLSR #0 «*h adDHMLSR R4 RS5.,R4 DOIT16 60 DOIT16 ;CLEAR CONTROL REGISTER :SAVE LINE NBUMBER FOR ERROR MESSAGE :16 LINES ;SELECT A LINE ;SET LINE ENABLE +RS ;CLEAR CONTROL REGISTER ;CLEAR EXPECTED RESULT sREAD LINE STATUS sREAD LINE NUMBER ;CLEAR UNVANTED BITS ;IF RECEIVED LINE=SELECTED LINE ;EXPECT LINE ENABLE AND ;RING IS SET ;COMPARE EXPECTED AND ;RECEIVED RESULTS ;MODEM CONTROL ERROR ;UPDATE LINE COUNTER ;CONTINUE IF ALL CHECKS ;ARE NOT DONE FOR THIS LINE ;EXPECT LINE ENABLE :ON SELECTED LINE ;SELECT LINE ;CLEAR REQUEST TO SEND :DELAY FOR CABLE ;DITTO sREAD LINE STATUS REGISTER ;ONLY LINE ENABLE SHOULD BE :SET ON THIS LINE ;MODEM CONTROL ERROR ;GO DO THE NEXT LINE CZDHM-D~-0 CZDHMD.P11 7584 7585 7586 7587 7588 7589 7590 7591 7592 7593 7594 7595 7596 7597 7598 7599 7600 7601 7602 7603 7604 7605 7606 7607 7608 7609 7610 7611 7612 7613 7614 7615 7616 7617 7618 7619 7620 7621 7622 7623 7624 7625 7626 7627 7628 7629 7630 7631 7632 7633 7634 7635 7636 7637 7638 7639 MACY11 30A(1052) 09-MAR-78 15:32 I 14 08:05 PAGE 180 MODEM CONTROL DIAGNOSTIC CONTINUED 10-MAR-78 160 SEQ 0178 SEQ 0177 ::'ttt.tt.."".'i."'.""t"tt‘."".'Q'Qt.t'ttlt...ttlt.t.t"t ;*TEST 60 R 020406 R MODEM CONTROL DIAGNOSTIC CONTINUED e e R R R S T TST60: SCOPE .REM X TEST ABSTRACT: 000004 (2222222222200 THIS TEST VERIFIES THAT SECONDARY RECEIVE IS SET IF "LINE ENABLE'' AND SECONDARY TRANSMIT ARE SET FOR THE SELECTED LINE. ERRORS: (222222831 DZDHK. 020410 020414 020420 020422 020426 020434 020440 020444 020450 020454 020462 020466 020470 020474 020500 020504 020506 020510 020514 020516 020520 020522 020530 020532 020534 020540 020542 020546 020554 020560 020562 020566 020570 020572 020574 005077 004737 000466 005077 042737 113701 010137 012702 010177 012777 005077 005005 017704 117703 042703 020103 001002 012705 020405 001401 104060 052777 005302 001355 012705 010103 010177 042777 105227 001375 017704 020504 001707 104060 000705 4 DOIT17: 007676 024544 007662 000340 030322 001206 000020 007634 000011 007622 177776 007630 007616 007610 177760 aDHML SR BIC #340,PS ;CLEAR CONTROL REGISTER ;ENABLE INTERRUPTS MOV MUX17A: MOV MoV R1,$THP2 #16..R2 R1,3DHMCSR ;SAVE LINE NBUMBER FOR ERROR MESSAGE ;16 LINES sSELECT A LINE CLR MUX17B: CLR Mov Move aDHMCSR RS aDHMLSR R4 @DHMCSR ,R3 ;CLEAR CONTROL REGISTER MUX17: MovB MoV Mov MUX17C: 000001 007542 00001¢ 000000 007524 JSR BR CLR BIC CHP BNE 007560 007536 MODEM CONTROL DIAGNOSTIC, CLR 000031 000400 IF ANY ERRORS OCCUR, RUN THE MUX17D: CMP BEQ ERROR BIS DEC BNE MoV MUX17E: MOV MOV BIC INCB BNE MoV CMP BEQ ERROR BR PC,SELINE ENDA aDHMCSR L INE,R1 #LINENA+SECTX ,@DHMLSR #177760,R3 R1,R3 MUx17¢ #LINENA+SECTX+SECRX,R5 R4, RS Mux170 60 #STEP ,aDHM(SR R2 Mux178 #LINENA RS R1,R3 R1,3DHMCSR #SECTX,aDHMLSR #0 ¥ aDHMLSR R4 R5,R4 DOIT17 60 pOIT17 ;CLEAR LINE STATUS REGISTER. ;GO SELECT A LINE. ;SET LINE ENABLE +SECTX ;CLEAR EXPECTED RESULT ;READ LINE STATUS ;READ LINE NUMBER :CLEAR UNWANTED BITS sIF RECEIVED LINE=SELECTED LINE ;EXPECT LINE ENABLE AND ;SECONDARY RECEIVE IS SET ; COMPARE EXPECTED AND sRECEIVED RESULTS ;MODEM CONTROL ERROR ;UPDATE LINE COUNTER sCONTINUE IF ALL CHECKS ;ARE NOT DONE FOR THIS LINE ;EXPECT LINE ENABLE ;ON SELECTED LINE ;SELECT LINE ;CLEAR SECONDARY TRANSMIT ;DELAY FOR CABLE ;DITTO ;READ LINE STATUS REGISTER ;ONLY LINE ENABLE SHOULD BE ;SET ON THIS LINE :MODEM CONTROL ERROR ;GO DO THE NEXT LINE (ZDHM-D-0 CZDHMD PN 7640 7641 7642 7643 7644 7645 7646 7647 7648 7649 7650 7651 7652 7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666 7667 7668 7669 7670 7671 7672 7673 7674 7675 7676 7677 7678 7679 7680 7681 7682 7683 7684 7685 7686 7687 7688 7689 7690 7691 7692 7693 7694 7695 020576 020600 020606 020612 020620 020626 020634 020640 020642 020650 020652 020656 MACY11 30A(1052) 09-MAR-78 15:32 000004 012737 005237 062737 062737 062737 006337 000240 030320 000002 000002 000002 027306 033737 001752 027306 001410 105037 000137 10-MAR-78 08:05 160 PAGE J 14 181 SEQ 0179 SEQ 0178 MODEM CONTROL DIAGNOSTIC CONTINUED 030326 030330 030332 SCOPE MOV INC ADD ADD ADD #240,$ECP DHNUM #2 ,ADPTR #2 VCPTR #2 ,BRPTR ;NOP THE SCOPE AT THE BEGINNING OF EOP ;GENERATE NEW DH11 NUMBER ;UPDATE THE TABLE POINTERS 027310 BEQ BIT SEOP SELMSK,DHSEL ;BR IF TESTED ALL SELECTED DH11'S ;1S THIS DH11 SELECTED ? 020662 001102 002744 ENDA: ASL BEQ L sSHIFT MARKER TO TEST NEXT DH11 ENDA ;BR CLRB $TSTNM JMP RSTRTA END OF PASS ROUTINE .SBTTL R SELMSK e R e R R IF NOT ;INIT TEST NUMBER ;GO TEST THIS DHM R L e e e e TR R R T ;*INCREMENT THE PASS NUMBER (SPASS) ;*TYPE "'END PASS #XXXXX'' (WHERE XXXXX IS A DECIMAL NUMBER) s*IF THERES A MONITOR GO TO IT ;*IF THERE ISN'T JUMP TO STARTZ2 020662 020662 020664 020670 020674 020700 020706 020710 020712 020714 020716 020720 020722 020726 020732 020734 020740 020744 020746 020750 020752 020754 020756 020760 020760 020762 020764 020767 020774 021002 000004 005037 005037 005237 042737 005327 000001 003022 012737 000001 020710 $EOP: 001102 001222 001240 100000 020767 001240 104401 020764 000042 013700 001405 000005 004710 000240 000240 000240 000137 002640 377 015 050040 000043 BIC DEC .WORD BGT MOV $ENDCT: .WORD SEOPCT TYPE MOV $EOPCT: 104401 013746 104405 001240 SCOPE CLR CLR INC TYPDS TYPE $GET42: MOV BEQ RESET $SENDAD: JSR NOP STSTNM STIMES $PASS ;:lERO THE TEST NUMBER ;;LERO THE NUMBER OF ITERATIONS :: INCREMENT THE PASS NUMBER (PC)+ 1 ::LOOP? #100000,8PASS $DOAGN s YES . SENDMG $PASS,-(SP) ::TYPE "'END PASS #'° ;s SAVE SPASS FOR TYPEOUT (PC)+,a(PC)+ 1 377 042412 051501 000 042116 020123 ;:G0 TYPE--DECIMAL ASCII :sTYPE A NULL CHARACTER $DOAGN ;:BRANCH IF NO MONITOR afts2 RO PC, (RO) .SBTTL SCOPE HANDLER ROUTINE e e ;;GET MONITOR ADDRESS ::CLEAR THE WORLD ::G0 TO MONITOR ;s SAVE ROOM s +AET1Y JMP .WORD .BYTE .ASCIZ L WITH SIGN ;:FOR NOP SRTNAD: $ENULL: SENDMG: R ;;RESTORE COUNTER LSENULL NOP $DOAGN: ;:DON'T ALLOW A NEG. NUMBER a(PC)+ ; ;RETURN START?2 -1,-1,0 ::NULL CHARACTER STRING <15><12>/END PASS #/ T T S I Y ;*THIS ROUTINE CONTROLS THE LOOPING OF SUBTESTS. IT WILL INCREMENT ;*AND LOAD THE TEST NUMBER(STSTNM) INTO THE DISPLAY REG.(DISPLAY<7:0>) ;*AND LOAD THE ERROR FLAG (SERFLG) INTO DISPLAY<15:08> CZDHM-D-0 CZDHMD PN 7696 7697 7698 7699 7700 7701 7702 7703 7704 7705 7706 7707 7708 7709 7710 1443 7712 7713 7714 7715 7716 77 7718 7719 7720 7721 7722 7723 7724 7725 7726 7727 7728 7729 7730 773 7732 7733 7734 7735 7736 7737 10-MAR-78 08:05 PAGE 182 SCOPE HANDLER ROUTINE ;*THE SWITCH OPTIONS PROVIDED BY 104407 005037 013701 032777 001114 021026 000416 021030 021034 021042 021046 013746 012737 005737 012637 000463 022626 012637 000423 000004 021054 177060 000004 032777 001404 127737 001465 105737 001421 123737 101015 032777 001404 013737 000446 105037 005037 000415 000400 160046 160040 001102 021052 021054 021056 021062 032777 001011 005737 001406 005237 023737 002024 012737 013737 7740 7741 7742 7743 7744 7745 7746 105237 113737 021250 011637 011637 005037 112737 030322 027302 040000 160114 LOOP ON TEST IN SWR<7:0> 1%: CKSWR CLR MOV BIT BNE $XTSTR: BR 5%: 001115 001103 001000 160010 001110 001106 001103 001222 004000 157756 001240 001104 001222 000001 021272 001102 001102 001106 001110 001224 000001 001104 001104 001222 001230 001115 CODE 6% FOR THE ;:TEST FOR CHANGE IN SOFT-SWR ;INIT THE LINE NO. TO ZERO ;SET UP DEVADR IN R1 ;:LOOP ON PRESENT TEST? XOR $SVLAD (SP)+,(SP)+ (SP)+,a#ERRVEC BIT 7%: LINE DHADR,R1 #BIT14,aSWR SOVER BR CMP MOV BR 2%: ;:;SCOPE=10T @#ERRVEC,-(SP) 68 ::#¥RAREND OF #5% ,a#ERRVEC ar177060 (SP)+,a#ERRVEC 141 2% aSWR,STSTNM SOVER SERFLG CMPB SERMAX ,SERFLG BHI BIT BEQ MOV BR 4%: CLRB CLR BR 3%: BIT BNE TST BEQ INC CMP BGE 1%: MOV MoV $SVLAD: INCB MOVB MOV MoV CLR MOVB ;:YES IF SW14=1 N TESTERNNAN ;:1F RUNNING ON THE ''XOR'' TESTER CHANGE ;:THIS INSTRUCTION TO A "'NOP'" (NOP=240) ::SAVE THE CONTENTS OF THE ERROR VECTOR ::SET FOR TIMEOUT ::TIME OUT ON XOR? ;;RESTORE THE ERROR VECTOR ;:G0 TO THE NEXT TEST ;;CLEAR THE STACK AFTER A TIME OUT ;;RESTORE THE ERROR VECTOR ::LOOP ON THE PRESENT TEST CODE FOR THE XOR TESTER##NAN #B1708,aSWR BEQ CMPB BEQ TSTB BEQ ARE: LOOP ON ERROR MOV MOV TST MOV 000004 001103 THIS ROUTINE ;*SW08=1 s*CALL SCOPE A sMARRASTART OF 000004 SEQ 0180 SEQ 0179 LOOP ON TEST INHIBIT ITERATIONS $SCOPE: 021004 021004 021006 021012 021016 021024 K 14 +SW14=1 xSW11=1 ;*SW09=1 7738 7739 7747 7748 7749 7750 7751 MACYT1 30A(105¢2) 09~MAR-78 15:32 3$ 3s #B1T709,aSWR 43 SLPERR,SLPADR SOVER SERFLG STIMES 1% #BIT11,3SWR 1% $PASS 1% $ICNT STIMES,SICNT $OVER #1,8ICNT SMXCNT,STIMES $TSTNM STSTNM,STESTN (SP) ,SLPADR (SP) ,SLPERR SESCAPE #1,SERMAX ;:;LO0P ON SPEC. TEST? ;:BR IF NO ;:ON THE RIGHT TEST? SWR<7:0> ;:BR IF YES :sHAS AN ERROR OCCURRED? ;:BR IF NO ;:MAX. ERRORS FOR THIS TEST OCCURRED? ;:BR IF NO ;:LOOP ON ERROR? ;:BR IF NO ;:SET LOOP ADDRESS TO LAST SCOPE ;;ZERO THE ERROR FLAG ;:CLEAR THE NUMBER OF ITERATIONS TO MAKE ;2ESCAPE TO THE NEXT TEST ;:INHIBIT ITERATIONS? ;:BR IF YES ::1F FIRST PASS OF PROGRAM INHIBIT ITERATIONS g ;s INCREMENT ITERATION COUNT :sCHECK THE NUMBER OF ITERATIONS MADE ;:BR IF MORE ITERATION REQUIRED ::REINITIALIZE THE ITERATION COUNTER ::SET NUMBER OF ITERATIONS TO DO :;COUNT TEST NUMBERS ::SET TEST NUMBER IN APT MAILBOX ::SAVE SCOPE LOOP ADDRESS ::SAVE ERROR LOOP ADDRESS ::CLEAR THE ESCAPE FROM ERROR ADDRESS ;;ONLY ALLOW ONE(1) ERROR ON NEXT TEST CZDHM-D-0 CZDHMD.P11 7752 7753 7754 7755 7756 7757 7758 021256 021264 021270 021272 MACY11 30A(1052) 013777 013716 000002 000010 001102 001106 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 183 SCOPE HANDLER ROUTINE 157656 7773 7774 7775 7776 7777 7778 7779 7780 7781 7782 7783 7784 7785 7786 7787 7788 7789 7790 779 7792 7793 7794 7795 7796 7797 7798 7799 7800 7801 7802 7803 7804 7805 7806 7807 STSTNR,ADISPLAY SLPADR, (SP) MOV MOV RTI SMXCNT: 10 .SBTTL ERROR HANDLER ROUTINE P . 7759 7760 7761 7762 7763 7764 7765 7766 7767 7768 7769 7770 444 7772 SOVER: L 14 L R R R SEQ 0181 SEQ 0180 ;;DISPLAY TEST NUMBER ;;FUDGE RETURN ADDRESS ;sFIXES PS ::MAX. NUMBER OF ITERATIONS Te T e ;*THIS ROUTINE WILL INCREMENT THE ERROR FLAG AND THE ERROR COUNT, ;*SAVE THE ERROR ITEM NUMBER AND THE ADDRESS OF THE ERROR CALL ;*AND GO TO SERRTYP ON ERROR ;*THE SWITCH OPTIONS PROVIDED BY THIS ROUTINE ARE: HALT ON ERROR INHIBIT ERROR TYPEOUTS =1 LOOP ON ERROR ;*SW09 ;*SW15=1 ;+SW13=1 s*CALL M 021274 021274 021276 021302 021304 021312 021316 021322 021330 021336 021344 021346 021352 021356 021356 021364 021366 021374 021400 021401 021402 021404 021410 021412 021414 021416 021424 021426 021432 021436 021440 021444 021444 021452 021454 021456 021456 104407 105237 001775 013777 005237 011637 162737 117737 032777 001004 004737 104401 122737 001007 113737 004737 000 000 000777 005777 100002 000000 104407 032777 001402 013716 005737 001402 013716 022737 001001 000000 000002 $ERROR: 001103 001102 001112 001116 000002 157562 020000 7%: 157630 000001 001252 001114 022566 021400 001000 001110 001224 020750 208: 3%: 4%: 001224 000042 MOV ;:TEST FOR CHANGE IN SOFT-SWR ::SET THE ERROR FLAG 7% ;:DON'T LET THE FLAG GO TO ZERO STSTNM, QDISPLAY ;:DISPLAY TEST NUMBER AND ERROR FLAG SERTTL ;s INC THE ERROR COUNT (SP) ,SERRPC ::GET ADDRESS OF ERROR INSTRUCTION JSR PC,SERRTYP ;:STRIP AND SAVE THE ERROR ITEM CODE ;:SKIP TYPEOUT IF SET ;:SKIP TYPEOUTS ;:G0 TO USER ERROR ROUTINE CMPB BNE MOVB JSR .BYTE .BYTE BR TST ;2PTENV,SENV SuB MOVB BIT BNE 22%: 2$: 157514 CKSWR INCB BEQ INC 21$: 157530 N MOV 001116 001114 157574 021460 001227 ERROR 5%: 6$: .SBTTL TYPE BPL HALT CKSWR BIT BEQ MoV TST ; ;ERROR=EMT AND N=ERROR SERFLG #2 ,SERRPC @SERRPC,SITEMB #B1T13,3SWR 208 .SCRLF SITEMB,21$ PC.SATYS 0 0 22% aSWR 3s :21709.QSUR SLPERR, (SP) SESCAPE BEQ 5% SESCAPE, (SP) CMP BNE HALT #SENDAD ,a#42 6% MOV RTI ITEM NUMBER : ;RUNNING IN APT MODE ;:NO,SKIP APT ERROR REPORT ::SET ITEM NUMBER AS ERROR NUMBER s ;REPORT FATAL ERROR TO APT ::;APT ERROR LOOP :sHALT ON ERROR ::SKIP IF CONTINUE ;sHALT ON ERROR! ;:TEST FOR CHANGE IN SOFT-SWR ;:LO0OP ON ERROR SWITCH SET? ;:BR IF NO ;:FUDGE RETURN FOR LOOPING :;CHECK FOR AN ESCAPE ADDRESS ;:BR IF NONE ::FUDGE RETURN ADDRESS FOR ESCAPE ::ACT=11 AUTO-ACCEPT? ;;BRANCH IF NO G e s sRETURN ERROR MESSAGE TYPEOUT ROUTINE CZDHR-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 M 14 10-MAR-78 08:05 PAGE 184 ERROR MESSAGE TYPEOUT ROUTINE 7808 AR 7809 7810 :*THIS ROUTINE USES THE ""ITEM CONTROL BYTE' (SITEMB) TO DETERMINE WHICH :*ERROR IS TO BE REPORTED. IT THEN OBTAINS, FROM THE ‘‘ERROR TABLE'' (SERRTB), ;g}; 7813 7814 7815 7816 7817 7818 7819 7820 7821 7822 021460 021460 021464 021466 021470 021474 104401 010046 005000 153700 001004 001227 021476 013746 001116 021502 000426 005300 006300 006300 006300 062700 7830 7831 7832 021526 021530 021532 001404 104401 000000 021522 021534 021540 7835 7836 7837 7838 7839 7840 7841 7842 7843 7844 021544 021546 021550 021552 021556 021560 021562 021564 021570 021572 7846 7847 7848 7849 7850 7851 7852 ;ggz 021574 021576 021600 021602 021606 021610 7845 021572 $ERRTYP: 001114 104402 021504 021506 021510 021512 021514 021516 7833 7834 R NP R R R AR R R R AR AR PR AR AR R AR R AR AR AR AR RN :*AND REPORTS THE APPROPRIATE INFORMATION CONCERNING THE ERROR. 7823 7824 7825 7826 7827 7828 7829 R SEQ 0182 SEQ 0181 012037 104401 012037 001404 104401 000000 104401 011000 001004 012600 104401 000207 .SCRLF RO,-(SP) RO a#SITEMB,RO 1% MOV SERRPC,-(SP) TYPOC 1%: 001356 021532 001227 021550 001227 001227 2$: 6% RO RO RO RO #SERRTB,RO BEQ TYPE LWORD 3 TYPE MOV BEQ TYPE .WORD TYPE MoV BNE MOV TYPE RTS 3s: 4$: 5%: 6%: L []') 8$: .SBTTL ;:1F ITEM NUMBER IS ZERO, JUST ;:TYPE THE PC OF THE ERROR ;:SAVE SERRPC FOR TYPEOUT ; sERROR ADDRESS ;:60 TYPE--OCTAL ASCIICALL DIGITS) ;:FORM TABLE POINTER ;sPICKUP ‘'ERROR MESSAGE'' POINTER ;:SKIP TYPEOUT IF NO POINTER ::TYPE THE "'ERROR MESSAGE'’ ::""ERROR MESSAGE'' POINTER GOES HERE (RO)+,28 O ,SCRLF (RO)+,48 ::""CARRIAGE RETURN'' & “LINE FEED' ::PICKUP "'DATA HEADER'' POINTER 5% O .SCRLF (RO) RO 7% (SP)+,RO +SCRLF PC ;:SKIP TYPEOUT IF 0 ::TYPE THE ‘‘DATA HEADER'' ::"'DATA HEADER'' POINTER GOES HERE ::""CARRIAGE RETURN'® & "‘LINE FEED' ;:PICKUP "'DATA TABLE'' POINTER ;:G0 TYPE THE DATA s sRESTORE RO ;:"'CARRIAGE RETURN'' & "'LINE FEED" : sRETURN a8(RO) +,-(SP) :;SAVE 8(RO)+ FOR TYPEOUT AR ;*THIS ROUTINE IS USED TO CHANGE A 16-BIT BINARY NUMBER TO A 6-DIGIT ;*OCTAL (ASCII) NUMBER AND TYPE IT. ;*$TYPOS===ENTER HERE TO SETUP SUPPRESS ZEROS AND NUMBER OF DIGITS TO TYPE s+CALL: MOV TYPOS .BYTE .BYTE R R NUM,-(SP) N M R R RR AND TYPE 7856 7857 ;g;g o o* M A A ::G0 TYPE-=-OCTAL ASCIICALL DIGITS) :;1S THERE ANOTHER NUMBER? ;:BR IF NO ;s TYPE TWO(2) SPACES ;:LOOP ::TWO(2) SPACES 7855 7860 7861 7862 7863 AR ;:""CARRIAGE RETURN'' & "'LINE FEED" ::SAVE RO ;:PICKUP THE ITEM INDEX ;:GET out ;;ADJUST THE INDEX SO THAT IT WILL &5 WORK FOR THE ERROR TABLE TYPOC TST (RO) BEQ 6% TYPE ,8% BR 7% LASCIZ /7 / .EVEN BINARY TO OCTAL (ASCII) 021610 000 BR DEC ASL ASL ASL ADD MOV 78: 013046 104402 005710 001770 104401 000771 020040 021614 TYPE MOV CLR BISB BNE R RN AR R R AR R R R R R R R R R R AR RRRRRRRRSE s ;NUMBER TO BE TYPED ;:CALL FOR TYPEOUT ;:N=1 TO 6 FOR NUMBER OF DIGITS TO TYPE ;:M=1 0RO (ZDHM-D-0 CZDHMD.P11 7864 7865 7866 7867 7868 7869 7870 7871 7872 7873 7874 7875 7876 7877 7878 7879 7880 7881 7882 7883 7884 7885 7886 7887 7888 7889 7890 7891 7892 7893 7894 7895 7896 7897 7898 7899 7900 7901 7902 7903 7904 7905 7906 7907 7908 7909 7910 791 7912 7913 7914 7915 7916 7917 7918 7919 MACY11 30A(1052) 09-MAR-78 15:32 N 14 10-MAR-78 08:05 PAGE 185 BINARY TO OCTAL (ASCII) AND TYPE SEQ 0183 SEQ 0182 ;:1=TYPE LEADING ZEROS : :0=SUPPRESS LEADING ZEROS - % . % Ea % ;*$TYPON---~ENTER HERE TO TYPE OUT WITH THE SAME PARAMETERS AS THE LAST ;*$TYPOS OR $TYPOC s*CALL: i o L MOV TYPON - (SP) NUM, ;t ; :NUMBER TO BE TYPED ;;CALL FOR TYPEOUT ;*$TYPOC---ENTER HERE FOR TYPEOUT OF A 16 BIT NUMBER s*CALL: ;¥ st 021614 017646 021620 116637 112637 021626 021632 062716 021636 000406 021640 112737 021646 112737 021654 112737 021662 010346 021664 010446 021666 010546 021670 113704 021674 005404 021676 062704 021702 110437 021706 113704 021712 016605 021716 005003 021720 006105 021722 000404 021724 006105 021726 006105 021730 006105 021732 010503 021734 006103 021736 105337 021742 100016 021744 042703 021750 001002 021752 005704 021754 001403 021756 005204 021760 052703 021764 052703 021770 110337 104401 021774 022000 105337 022004 003347 022006 002402 022010 005204 022012 000744 022014 012605 000000 000001 022041 600002 000001 000006 000005 022041 000006 022040 022037 000012 022037 022037 022041 022036 TYPOC $TYPOS: MOV MOVB MOVB ADD BR $TYPOC: MOVB MOVB $TYPON: MOVB MOV MOV MOV MCVB NEG ADD MOvVB MOVB MoV 1%: 2%: 022040 MOV 3s: 177770 CLR ROL BR ROL ROL ROL MOV ROL DECB BPL BIC BNE TST 000060 000040 022034 022034 022036 4%: 5$: 7%: 6%: BEQ INC BIS BIS MOVB TYPE DECB BGT BLT INC BR MOV NUM,-(SP) : :NUMBER TO BE TYPED ::CALL FOR TYPEOUT a8 (SP),-(SP) 1(SP),SOFILL (SP)+,SOMODE +1 #2,(SP) STYPON #1,80FILL #6,S0MODE +1 #5,80CNT ::PICKUP THE MODE ::LOAD ZERO FILL SWITCH : :NUMBER OF DIGITS TO TYPE ;:ADJUST RETURN ADDRESS R3,-(SP) R4 ,-(SP) R5,-(SP) SOMODE +1,R4 R& #6,R4 R4 , SOMODE SOFILL.,R4 12(SP) RS R3 RS 3s RS RS RS R5.R3 R3 $OMODE 7% #177770,R3 4% R4 5% R4 #'0,R3 £ ,R3 .8% SOCNT 2% 6% R4 2% (SP)+,RS ;:SET THE ZERO FILL SWITCH ;:SET FOR SIX(6) DIGITS s:SET THE ITERATION COUNT ;:SAVE R3 ::SAVE R4 ::SAVE RS ::GET THE NUMBER OF DIGITS TO TYPE ;:SUBTRACT IT FOR MAX. ALLOWED ;:SAVE IT FOR USE ;:GET THE ZERO FILL SWITCH ;:PICKUP THE INPUT NUMBER ;sCLEAR THE OUTPUT WORD ::ROTATE MSB INTO '‘C*’ ;:G0 DO MSB ::FORM THIS DIGIT ::GET LSB OF THIS DIGIT :;TYPE THIS DIGIT? ;:BR IF NO ;;GET RID OF JUNK ::TEST FOR O ; s SUPPRESS THIS 0? ;:BR IF YES ::DON'T SUPPRESS ANYMORE 0'S ;sMAKE THIS DIGIT ASCII ;:MAKE ASCII IF NOT ALREADY ::SAVE FOR TYPING ;:G0 TYPE THIS DIGIT ;;COUNT BY 1 ;:;BR IF MORE T0 DO ;:BR IF DONE ;s INSURE LAST DIGIT ISN'T A BLANK ;:G0 DO THE LAST DIGIT :;RESTORE RS 7920 7921 7922 7923 7924 7925 7926 7927 7928 7929 7930 793 7932 7933 7934 7935 7936 7937 7938 7939 7940 7941 7942 7943 7944 7945 7946 7947 7948 7949 7950 7951 7952 7953 7954 7955 7956 7957 7958 7959 7960 7961 7962 7963 7964 7965 7966 7967 7968 7969 7970 414 7972 7973 7974 7975 022016 022020 022022 022030 022032 022034 022035 022036 022037 022040 MACY11 30A(1052) 09-MAR-78 15:32 012604 012603 016666 012616 000002 000 000 000 000 000000 200002 B 15 10-MAR-78 08:05 PAGE 186 BINARY TO OCTAL (ASCII) AND TYPE 000004 8s: $OCNT: $OFILL: $SOMODE: .SBTTL Mov HOV MoV MOV RTI SEQ 0184 SEQ 0183 ;;RESTORE R4 (SP)+ R4 ;sRESTORE R3 (SP)+,R3 2(SP) ,4(SP) (SP)+, (SP) ::SET THE STACK FOR RETURNING s sRETURN o000 Oo CZDHA-D-0 CZDHMD.P11 .BYTE ;:STORAGE FOR ASCII DIGIT .BYTE ;s TERMINATOR FOR TYPE ROUTINE .BYTE ;:OCTAL DIGIT COUNTER .BYTE ;:ZERO FILL SWITCH .WORD :sNUMBER OF DIGITS TO TYPE CONVERT BINARY TO DECIMAL AND TYPE ROUTINE AR R R N R R RN R NN AR RN RN A AR RN R E RS ;*THIS ROUTINE IS USED TO CHANGE A 16-BIT BINARY NUMBER TO A 5-DIGIT ;*SIGNED DECIMAL (ASCII) NUMBER AND TYPE IT. DEPENDING ON WHETHER THE :*NUMBER IS POSITIVE OR NEGATIVE A SPACE OR A MINUS SIGN WILL BE TYPED ;*BEFORE THE FIRST DIGIT OF THE NUMBER. LEADING ZEROS WILL ALWAYS BE ;*REPLACED WITH SPACES. s*CALL: o i 022042 022042 022044 022046 022050 022052 022054 022060 022064 022066 022070 022076 022100 022104 022110 022112 022116 022120 022122 022124 022126 022130 022132 022134 022136 022140 022142 022144 022152 022156 022162 022164 022166 022172 $TYPDS: 010046 010146 010246 010346 010546 012746 016605 100004 005405 112766 005000 012703 112723 005002 016001 160105 020200 000020 000055 000001 022256 000040 2%: 022246 3%: 002402 005202 000774 060105 005702 001002 105716 100407 106316 103003 116663 052702 052702 110223 005720 020027 002746 1%: 4%: 5%: 000001 000060 000040 000010 177777 6%: 7%: MOV - (SP) NUM, ;:PUT THE BINARY NUMBER ON THE STACK ;:60 TO THE ROUTINE MOV MoV MOV MOV MOV MoV MoV RO,=(SP) R1,-(SP) R2,=(SP) R3,-(SP) R5,=(SP) #20200,-(SP) ;:PUSH RO ON STACK TYPDS BPL NEG MOVB CLR MOV MOVB CLR MOV sus BLT INC BR ADD IST BNE TS18B BMI ASLB MOvVB BIS BIS MOVB TST CMP BLT 20(SP) RS 1% RS :sPUSH R1 ON STACK ;:PUSH R2 ON STACK ;:PUSH R3 ON STACK ::PUSH RS ON STACK :2SET BLANK SWITCH AND SIGN ;:GET THE INPUT NUMBER ::BR IF INPUT IS POS. ;sMAKE THE BINARY NUMBER POS. R ;:MAKE THE ASCII NUMBER NEG. ;sZERO THE CONSTANTS INDEX ::SETUP THE OUTPUT POINTER ::SET THE FIRST CHARACTER TO A BLANK ;sCLEAR THE BCD NUMBER ::GET THE CONSTANT ;:;FORM THIS BCD DIGIT ;:BR 1F DONE ;s INCREASE THE BCD DIGIT BY 1 6% 1(SP) ,=1(R3) ;:;ADD BACK THE CONSTANT ;sCHECK IF BCD DIGIT=0 ;sFALL THROUGH IF 0 ;sSTILL DOING LEADING 0°'S? ;:BR IF YES ;s MSD? ;:BR IF NO :sYES=-SET THE SIGN ::;MAKE THE BCD DIGIT ASCII . ;:MAKE IT A SPACE IF NOT ALREADY A DIGIT ;:PUT THIS CHARACTER IN THE OUTPUT BUFFER :3JUST INCREMENTING ;sCHECK THE TABLE INDEX ;:G0 DO THE NEXT DIGIT #'-,1(5P) RO #SDBLK,R3 lé (R3)+ $DTBL (RO) ,R1 R1,R5 43 = #'0,R2 # R2 R2,(R3)+ (RO)+ RC,#10 2% CZDHM-D-0 CZDHMD .P11 7976 7977 7978 7979 7980 7981 7982 7983 7984 7985 7986 7987 7988 7989 7990 7991 7992 7993 7994 7995 7996 7997 7998 7999 8000 8001 8002 8003 8004 8005 8006 8007 5008 8009 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 022174 022176 022200 022202 022204 022206 022214 022216 022220 022222 022224 022226 022230 022234 022242 022244 022246 022250 022252 022254 022256 MACY11 30A(1052) 09-MAR-78 15:32 003002 010502 000764 105726 100003 116663 105013 012605 012603 012602 012601 012600 104401 016666 012616 000002 023420 0C1750 000144 000012 000004 c15 10-MAR-78 08:05 PAGE 187 CONVERT BINARY TO DECIMAL AND TYPE ROUTINE BGT 8% BR TSTB 6% (SP)+ MOV 8%: 177777 177776 022256 000002 000004 9%: $DTBL: $DBLK: .SBTTL BPL #MOVB CLRB MOV MOV MOV MOV MOV TYPE MOV MOV RTI SEQ 0185 SEQ 0184 ::G0 TO EXIT RS5.R2 ::GET THE LSD 9% ;:BR IF NO =1(SP) ,=2(R3) (R3) (SP)+,RS (SP)+,R3 (SP)+,R2 (SP)+,R1 (SP)+,RO . $DBLK 2(SP) ,4(SP) (SP)+,(SP) 10000. 1000. ;:G0 CHANGE TO ASCII ;:WAS THE LSD THE FIRST NON-ZERO? ;:YES==-SET THE SIGN FOR TYPING ;sSET THE TERMINATOR ::POP STACK INTO RS :sPOP STACK INTO R3 ;:POP STACK INTO R2 ;:POP STACK INTO R1 :;POP STACK INTO RO ;:NOW TYPE THE NUMBER s sADJUST THE STACK ;:RETURN TO USER 10. .BLKW 4 TYPE ROUTINE :;Q'tttt't't'*"'t!'!itt'ttt'ttttt'ttttttttttttttt't'tt"tttttt" J*ROUTINE TO TYPE ASCIZ MESSAGE. MESSAGE MUST TERMINATE WITH A 0 BYTE. ;*THE ROUTINE WILL INSERT A NUMBER OF NULL CHARACTERS AFTER A LINE FEED. ;*NOTE1: SNULL CONTAINS THE CHARACTER TO BE USED AS THE FILLER CHARACTER. ;*NOTEZ2: SFILLS CONTAINS THE NUMBER OF FILLER CHARACTERS REQUIRED. ;*NOTE3: SFILLC CONTAINS THE CHARACTER TO FILL AFTER. ;t s*CALL: :%*1) USING A TRAP INSTRUCTION :'OR TYPE .MESADR & o * % ssMESADR IS FIRST ADDRESS OF AN ASCIZ STRING TYPE MESADR :t 022266 022272 022274 022276 022300 022302 022306 022314 022316 022324 022326 022332 022336 022340 022346 022350 022352 022354 105737 100002 000000 000430 010046 017600 122737 001011 132737 001405 010037 004737 000000 132737 001003 112046 001005 005726 001157 $TYPE: TSTB BPL HALT 1%: 000002 000001 001252 000100 001253 022336 022556 000040 _ 001253 618: 62%: 2%: BR MOV MOV CMPB BNE BITB BEQ MOV JSR .WORD BITB BNE MOVB BNE TST $TPFLG 1% 3% RO,-(SP) a2(SP) RO #APTENV,SENV 62% #APTSPOOL,SENVM 62% RO,61$ PC,SATY3 O #APTCSUP,SENVM 60% (RO)+,-(SP) 4% (SP)+ ;:IS THERE A TERMINAL? ;:BR IF YES ;sHALT HERE ;s LEAVE ::SAVE RO IF NO TERMINAL ;:GET ADDRESS OF ASCIZ STRING :sRUNNING IN APT MODE ::NO,GO CHECK FOR APT CONSOLE ;;SPOOL MESSAGE TO APT 2:NO,GO CHECK FOR CONSOLE :sSETUP MESSAGE ADDRESS FOR APT ;:SPOOL MESSAGE TO APT ; sMESSAGE ADDRESS ;;APT CONSOLE SUPPRESSED ::YES,SKIP TYPE OUuT :;PUSH CHARACTER TO BE TYPED ONTO STACK ::BR IF IT ISN'T THE TERMINATCR ;:1F TERMINATOR POP IT OFF THE STACK CZDHM-D-0 CZDHMD.P11 8032 8033 8034 8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049 8050 8051 8052 8053 8054 8055 8056 8057 8058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8058 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079 8080 8081 8082 8083 8084 8085 8086 8087 022356 022360 022364 022366 022372 022374 022400 022402 022404 022406 MACY11 30A(1052) 09-MAR-78 15:32 012600 062716 000002 122716 001430 000002 022544 022416 022422 022426 022430 022434 022440 022442 022446 022452 002770 004737 105337 000770 105366 000001 60$: MOV 4%: RTI CMPB 3%: 000011 122716 001006 005726 104401 001227 105037 000755 004737 123726 001350 013746 022410 022414 10-MAR-78 08:05 PAGE TYPT RCUTINC 000200 ADD BEQ CHPB BNE TST TYPE 022500 001156 5%: 6%: 001154 $CRLF CLRB BR JSR {MPB BNE MOV 7%: 022500 022544 DECB BLT JSR DECB BR 188 D15 (SP)+,RO #2,(SP) SEQ 0186 SEQ 0185 ;;RESTORE RO ::ADJUST RETURN PC #HT, (SP) :;RETURN ;:BRANCH IF <HT> #CRLF, (SP) ; ;BRANCH IF NOT <CRLF> 8% 5% (SP)+ SCHARCNT 2% PC.STYPEC SFILLC,(SP)+ 2% $NULL,-(SP) 1(SP) 6% PC,STYPEC SCHARCNT 7% ;:POP <CR><LF> EQUIV ;:TYPE A CR AND LF ;:CLEAR CHARACTER COUNT s:GET NEXT CHARACTER ::G0 TYPE THIS CHARACTER ::IS IT TIME FOR FILLER CHARS.? ::1F NO GO GET NEXT CHAR. ;:GET # OF FILLER CHARS. NEEDED ;:AND THE NULL CHAR. ::DOES A NULL NEED TO BE TYPED? ::BR IF NO--GO POP THE NULL OFF OF STACK ;:G0 TYPE A NULL ;:D0 NOT COUNT AS A COUNT ;:LOOP ;HORIZONTAL TAB PROCESSOR 022454 022460 022464 022472 022474 022476 022500 022504 022506 022514 022522 022524 022530 022532 022540 022542 022544 022546 112716 004737 132737 001372 005726 000724 105777 100375 116677 122766 001003 105037 000406 122766 001402 000040 022500 000007 022544 156444 000002 000015 156436 000002 022544 000012 000002 105227 000000 000207 8$: 9%: MOVB JSR BITB BNE TST BR STYPEC: TSTB BPL MOVB CMPB BNE CLRB BR 1%: CMPB BEQ INCB $CHARCNT : .WORD $TYPEX: RTS .SBTTL #' ,(SP) PC,STYPEC #7 ,8CHARCNT Ss (SP)+ 2% asTPS STYPEC 2(SP) ,asTPB #CR,2(SP) 1% SCHARCNT STYPEX #LF,2(SP) S$TYPEX (PC)+ 0 PC ;:REPLACE TAB WITH SPACE ;s TYPE A SPACE ;;BRANCH IF NOT AT ;:TAB STOP ;:POP SPACE OFF STACK ;:GET NEXT CHARACTER ;sWALIT UNTIL PRINTER IS READY ;:LOAD CHAR TO BE TYPED INTO DATA REG. ;:1IS CHARACTER A CARRIAGE RETURN? ;:BRANCH IF NO ::EE?;-CLEAR CHARACTER COUNT isER 2s1IS CHARACTER A LINE FEED? ;sBRANCH IF YES ;s COUNT THE CHARACTER ;;CHARACTER COUNT STORAGE APT COMMUNICATIONS ROUTINE sotkRARRRRRANICCRIRAAERERCERRARARARAREORCERARARAAAARAORARREARARARORRS 022550 022556 022564 022566 022574 022574 022576 022600 022604 112737 112737 000403 112737 000001 000001 023014 023012 $ATY1: 000001 023014 $ATY4: $SATYC: 010046 010146 105737 001450 023012 $ATY3: MOVB MOVB BR MOVB MoV MOV TSTB BEQ #1,8FFLG #1,8MFLG SATYC #1,8FFLG ;: 70 REPORT FATAL ERROR ::T0 TYPE A MESSAGE RO,=(SP) R1,-(SP) SMFLG 5% ;;PUSH RO ON STACK TO ONLY REPORT FATAL ERROR ;. :;PUSH R1 ON STACK ;:SHOULD TYPE A MESSAGE? ;;IF NOT: BR (ZOHM-D-0 CZDHMD.P11 8088 b - B o 4 — d e ©o Co Co 0o Co Co Co O e e d ed Co Co Co 00 Co O b D D D b b Co Co Co Co 0o Co 0o wwnornoN POPI PN NN N b e b e e wd e —Owvoe~N VB W= O VRNV WN = 8089 8090 8091 8092 8093 8094 8095 8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 8106 8107 8132 8133 8134 8135 8136 8137 8138 8139 8140 8141 8142 8143 022606 022614 022616 022624 022626 022632 022640 022644 022646 022652 022654 022656 022662 022664 (22670 022676 022700 022706 022714 022720 022724 022726 022726 022732 022734 022740 022742 022746 022750 022756 022764 022770 022774 023000 023004 023006 023010 023012 023013 023014 E 15 MACY11 30A(1052) 122737 000001 001252 132737 000100 001253 09-MAR-78 15:32 001031 001425 017600 062766 005737 001375 010037 105720 001376 163700 006200 010037 012737 000413 017637 062766 013746 004737 000000 105737 001416 005737 001413 005737 001375 017637 062766 005237 105037 105037 105037 012601 012600 000207 000 000 000 023016 000200 000001 000100 000040 000004 000002 001232 10-MAR-78 08:05 PAGE 189 APT COMMUNICATIONS ROUTINE 000004 001246 CMPB BNE BITB BEQ 1%: 2%: 001246 001250 000004 000004 000002 177776 022266 001232 022724 000004 4%: 5%: 023014 10%: 001252 001234 000004 3s #APTSPOOL ,SENVM 3% a4 (SP) RO : ;OPERATING UNDER APT? BR ;:IF NOT: ; :SHOULD SPOOL MESSAGES? ::IF NOT: BR #2.,4(SP) SMSGTYPE 1% RO, $MSGAD ;sGET MESSAGE ADDR. ;:BUMP RETURN ADDR. ;:SEE IF DONE W/ LAST XMISSION? WAIT ;oIF NOT: ;:PUT ADDR IN MAILBOX RO, SMSGLGT #4 ,8MSGTYPE ;:SUB START OF MESSAGE ;:GET MESSAGE LNGTH IN WORDS ;:PUT LENGTH IN MAILBOX ;:TELL APT TO TAKE MSG. #2,4(SP) ;sPUT MSG ADDR IN JSR LINKAGE ;:BUMP RETURN ADDRESS JSR .WORD SC.STVPE ;:CALL TYPE MACRO TSTB BEQ $FFLG 128 SENV MOV ADD TST BNE MOV TSTB BNE SuB ASR MOV MOV BR MOV ADD MOV TST 001232 000004 000002 001232 023014 023013 023012 3%: #APTENV,SENV SEQ 0187 SEQ 0186 BEQ 115: TST BNE MoV ADD INC 128: CLRB CLRB CLRB MOV MOV RTS SMFLG: .BYTE SLFLG: .BYTE $FFLG: .BYTE .EVEN APTSIZE=200 APTENV=001 APTSPOOL=100 (RO) + 2% $MSGAD RO RO 5% 84 (SP),4$% 177776 ,-(SP) 128 SMSGTYPE 118 @4 (SP) ,SFATAL #2,4(SP) SMSGTYPE SFFLG SLFLG SMFLG (SP)+,R1 (SP)+,RO PC 0 0 0 ;:FIND END OF MESSAGE ::PUSH 177776 ON STACK ;:SHOULD REPORT FATAL ERROR? :;1F NOT: BR ; ;RUNNING UNDER APT? BR ;:IF NOT: ;:FINISHED LAST MESSAGE? ::IF NOT: WAIT ;:GET ERROR # ;:BUMP RETURN ADDR. ;sTELL APT TO TAKE ERROR ;:CLEAR FATAL FLAG ;sCLEAR LOG FLAG ;sCLEAR MESSAGE FLAG ;:POP STACK INTO R1 ;:POP STACK INTO RO s sRETURN ;sMESSG. FLAG :.L0G FLAG ;sFATAL FLAG APTCSUP=040 TTY INPUT ROUTINE .SBTTL JaRA AR .ENABL AR AR EARAAATREAERRRERNCPRRRRAIRRRRERRRERRRRRRRRR AR RAR AR AR AR RRRY LSB skt RARATENRARRCARARAACRRRAERRAARNRCIORRRERRARRRARRRARARRERRARRARRRRS ;*SOFTWARE SWITCH REGISTER CHANGE ROUTINE. ;*ROUTINE IS ENTERED FROM THE TRAP HANDLER, AND WILL ;*SERVICE THE TEST FOR CHANGE IN SOFTWARE SWITCH REGISTER TRAP CALL 023016 022737 000176 001140 ;*WHEN OPERATING IN TTY FLAG MODE. CMP #SWREG, SWR ;:1S S$CKSWR: THE SOFT-SWR SELECTED? CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 8144 8145 8146 8147 8148 8149 8150 8151 8152 023024 023026 023032 023034 023040 023044 023050 023052 023060 001074 105777 100071 117746 042716 022726 001062 123727 001456 8154 8155 8156 023062 023066 023072 104401 104401 8153 8157 8158 8159 8160 8161 023076 023100 023104 104402 104401 BNE 156112 TSTB 156106 177600 000007 001134 000001 023671 023676 000176 $GTSWR: 023707 158 BPL MOvB BIC CMP BNE CMPB BEQ # C177,(SP) #7,(SP)+ 15% TYPE 15% a$TKB, - (SP) LSCNTLG #1 $AUTOB, 15% TSTB asTKS 7% MOVB BIC a$TKB,-(SP) # C177,(SP) ::PICK UP CHAR ;sMAKE IT 7-BIT ASCII ;1S IT A CONTROL-U? : ;BRANCH IF NOT ;:YES, ECHO CONTROL-U ( U) ; : IGNORE PREVIOUS INPUT 156024 177600 023126 023132 023134 023140 023144 021627 001005 104401 062706 000757 000025 9%: 023664 000006 CMP BNE (SP) ,#25 108 208: ADD BR #6,SP 19% 023146 023152 023154 023160 023162 023170 023174 023200 023206 023210 023216 023220 023224 023230 021627 001022 005766 001403 016677 062706 104401 123727 001003 012777 000002 004737 021627 002420 021627 003015 042726 005766 001403 006316 006316 000015 108: CMP BNE (SP) ,#15 168 8192 8193 8194 8195 8196 8197 8198 8199 023240 023244 023250 (023252 023254 023256 023260 023264 023232 023236 006316 005266 056616 000002 000006 001227 001135 000001 000100 155726 022500 000060 118: 148: 158: 16%: 000067 000060 000002 000002 177776 CLR BPL TYPE -(SP) LSCNTLU TST 4(SP) ADD #6,SP BEQ MOV TYPE CMPB BNE Mov RTI JSR 118 2(SP) ,asWR +SCRLF M $INTAG. 158 #100,a8TkS PC,STYPEC CMP BLT CMP BGT BIC (SP),#60 18% (SP) ,#67 18% #60, (SP)+ BEQ 17% TST 17%: ;:NO, RETURN TO USER ;:;ARE WE RUNNING IN AUTO-MODE? ; :BRANCH IF YES =(SP) 117746 155750 ::SAVE THE CHAR ::;STRIP=-OFF THE ASCII ;18 IT A CONTROL G? CLR . SMNEW 042716 000004 s :BRANCH IF NO ;s CHAR THERE? ;;1F NO, DON'T WAIT AROUND :;ECHO THE CONTROL=-G ( G) s TYPE CURRENT CONTENTS ;:SAVE SWREG FOR TYPEOUT ;:G0 TYPE--OCTAL ASCIICALL DIGITS) ;;PROMPT FOR NEW SWR ;sCLEAR COUNTER ;:;THE NEW SWR ::;CHAR THERE? ::1F NOT TRY AGAIN 023116 023122 7$: SEQ 0188 SEQ 0187 . SMSWR SWREG,-(SP) 023114 156030 13 TYPE Mov TYPOC TYPE 19%: F asTKsS 005046 005046 105777 100375 023106 023110 8162 8163 8164 8165 8166 8167 8168 8169 8170 8171 8172 8173 8174 8175 8176 8177 8178 8179 8180 8181 8182 8183 8184 8185 8186 8187 8188 8189 8190 8191 013746 10-MAR-78 08:05 PAGE 190 TTY INPUT ROUTINE ASL ASL ASL INC BIS 2(SP) (SP) (SP) (SP) 2(SP) =2(SP), (SP) ;:LET'S TRY IT AGAIN ;1S IT A <CR>»? : :BRANCH IF NO ;:YES, IS IT THE FIRST CHAR? ; :BRANCH IF YES ;:SAVE NEW SWR ;s CLEAR UP STACK :;ECHO <CR> AND <LF> :;RE<ENABLE TTY KBD INTERRUPTS? ;;BRANCH IF NOT ::RE-ENABLE TTY KBD INTERRUPTS ;sRETURN ;;ECHO CHAR ;:CHAR < 0? ::BRANCH [F YES ::CHAR > 7? ;;BRANCH IF YES ;:STRIP-0OFF ASCII ::1S THIS THE FIRST CHAR ;;BRANCH IF YES ;.NO, SHIFT PRESENT CHAR OVER TO MAKE i za ROOM FOR NEW ONE. :sKEEP COUNT OF CHAR ;sSET IN NEW CHAR (ZDHM-D-0 CZDHMD.P11 8200 8201 8202 8203 8204 8205 023270 023272 023276 MACY11 350A(1052) 09-MAR-78 15:32 000707 104401 000720 G 15 10-MAR-78 08:05 PAGE 191 TTY INPUT ROUTINE 001226 18%: .DSABL _ BR TYPE Be LSB 7% ,SQUES 208 AR 8207 8208 8209 8210 8211 8212 8213 :*THIS ROUTINE WILL INPUT A SINGLE CHARACTER FROM THE TTY ;*CALL: e RDCHR ;s INPUT A SINGLE CHARACTER FROM THE TTY LL RETURN HERE ;s sCHARACTER IS ON THE STACK H ;:WITH PARITY BIT STRIPPED OFF - 8215 8216 8217 023300 023302 023310 023314 8218 8219 023316 023324 8222 023342 8220 8221 8223 8224 8225 8226 8227 8228 8229 82350 8231 8232 8233 8234 8235 011646 016666 105777 100375 023332 023340 117766 042766 026627 001013 023346 023350 023354 023360 023364 023366 023370 023376 023400 023406 023410 023416 100375 117746 042716 022627 001366 000750 026627 002407 026627 003003 042766 000002 105777 000004 155630 000002 155624 177600 000004 000004 000004 155576 155572 177600 000021 000004 000140 000004 000175 000040 000004 3$: 4$: R R R R T RN R RN R R R AR R AR ;:PUSH DOWN THE PC a$TKkB,4(SP) # C<177>,4(SP) ;:READ THE TTY ;:GET RID OF JUNK IF ANY 4(SP),2(SP) as$TKS 1% CMP BNE 4(SP) ,#23 3% TSTB BPL MCVB BIC CMP BNE BR CMP SLT CMP BGT BIC RTI AR AR AR (SP),=-(SP) MoV TSTB BPL MOVB BIC 2%: as$TKS 2% a$TKB,-(SP) # C177,(SP) (SP)+,#21 2% 1% 4(SP),#140 4% 4(SP) ,#175 43 #40,4(SP) R RN ® ::SAVE THE PS ;:WAIT FOR ::A CHARACTER ::1S IT A CONTROL=-S? : :BRANCH IF NO ;:WAIT FOR A CHARACTER ;:LOOP UNTIL ITS THERE ;:GET CHARACTER :;MAKE IT 7-BIT ASCII ;:IS IT A CONTROL=-Q? ;s 1F NOT DISCARD IT ;:YES, RESUME ::1S IT UPPER CASE? ; ;BRANCH IF YES ;:1S IT A SPECIAL CHAR? :;BRANCH IF YES ;sMAKE IT UPPER CASE ;:G0 BACK TO USER ""'tltt"'ttttt't"tt't"tttttt'ttt't""t'tttttl'ttttt'tttttttt. ;*THIS ROUTINE WILL INPUT A STRING FROM THE TTY 8237 8238 8239 8242 8243 8244 8245 8246 8247 8248 8249 8250 8251 8252 023420 023422 023424 023430 023434 023436 023440 023442 023446 023450 023452 010346 005046 012703 022703 101456 104410 112613 122713 001022 005716 001007 8254 8255 023462 023466 104401 012716 8253 1%: 000023 823%6 ggz$ $RDCHR: MOV R ;:GET THE NEXT ONE ::TYPE 72<CR><LF> ;s SIMULATE CONTROL-U 8206 8214 A SEQ 0189 SEQ 0188 023454 112737 s*CALL: . RDLIN M RETURN HERE ;s INPUT A STRING FROM THE TTY ; :ADDRESS OF FIRST CHARACTER WILL BE ON THE STACK $RDLIN: MOV CLR 1%: MOV 2%: CMP BLOS RDCHR MOVB 10%: CMPB BNE TST BNE (SP)+,(R3) #177,(R3) 5% (SP) 6% ;:SAVE R3 ;:CLEAR THE RUBOUT KEY ;:GET ADDRESS :;BUFFER FULL? ;:BR IF YES ::60 READ ONE CHARACTER FROM THE TTY ;:GET CHARACTER ;1S IT A RUBOUT ;:BR IF NO ;1S THIS THE FIRST RUBOUT? ;:BR IF NO ,9% #-1,(SP) ::SET THE RUBOUT KEY B 023654 023664 000177 000134 023652 177777 023652 mMovBs TYPE MoV R3,-(SP) -(SP) #STTYIN,R3 #STTYIN+8. ,R3 4% #' 9% ;s TERMINATOR WILL BE A BYTE OF ALL 0'S ;:TYPE A BACK SLASH (ZDHM-D-0 CZDHMD.P11 8256 8257 8258 8259 8260 8261 8262 8263 8264 8265 8266 8267 8268 8269 8270 827 8272 8273 8274 8275 8276 8277 8278 8279 8280 8281 8282 8283 8284 8285 8286 8287 8288 8289 8290 8291 8292 8293 8294 8295 8296 8297 8298 8299 8300 8301 8302 8303 8304 8305 8306 8307 8308 8309 8310 8in 023472 023474 023500 023502 023506 023512 023514 023516 023520 023526 023532 023534 023540 023542 023546 023550 023554 023556 023560 023564 023570 023572 023576 023600 023604 023610 023614 023616 023622 023626 023630 023632 023634 023642 023650 023652 023653 023654 023664 023671 023676 023704 023707 023714 MACY11 30A(1052) 09-MAR-78 15:32 005303 020327 103434 111337 104401 000746 005716 001406 112737 104401 005016 122713 001003 104401 000726 122713 001011 105013 104401 104401 000717 104401 000712 111337 104401 122723 001305 105063 104401 005726 012603 011646 016666 012766 000002 000 000 000010 052536 136 005015 020075 040 036440 10-MAR-78 TTY 08:05 INPUT 6%: 023654 5%: 000134 023652 023652 000025 7%: 023664 000022 8%: 4%: 023652 023652 3%: ; :BACKUP BY ONE ;:STACK EMPTY? ;:BR IF YES TYPE BR TST BEQ MOVB TYPE CLR CMPB BNE TYPE BR CMPB .9% 2% (SP) 7% #' ,9% ,9% (SP) #25,(R3) 8% LSCNTLU 1% #22,(R3) ::G0 TYPE ;:G0 READ ANOTHER CHAR. :;RUBOUT KEY SET? ;:BR IF NO ;:TYPE A BACK SLASH TYPE ,SCRLF 177777 001230 LSTTYIN ;sCLEAR THE RUBOUT KEY ;:;1S CHARACTER A CTRL u? ;:BR IF NO ;sTYPE A CONTROL ''U" ;:G0 START OVER ::1S CHARACTER A '" R'TM ;:BRANCH IF NO ;sCLEAR THE CHARACTER +:TYPE A "CR R "L P ;s TYPE THE STRING #15,(R3)+ 2% =1(R3) ;s CHECK FOR RETURN ;:LOOP IF NOT RETURN ;:CLEAR RETURN (THE 15) [0} MOV MOV MOV (SP)+,R3 (SP) ,-(SP) 4(SP) ,2(SP) #STTYIN,4(SP) ;;RESTORE R3 ;:ADJUST THE STACK AND PUT ADDRESS OF 4% FIRST ASCII CHARACTER ON IT 0 ;sSTORAGE FOR ASCII CHAR. TO TYPE 0 ; : TERMINATOR 8. ;;RESERVE 8 BYTES FOR TTY INPUT 7/ U/<15<12> ;:CONTROL 'U" / G/<15><12> ;;CONTROL ‘6" <15><12>/SWR = / / .9% LSLF (SP)+ ;:G0 PICKUP ANOTHER CHACTER sTYPE K 'Y ;;CLEAR THE BUFFER AND LOOP ;;ECHO THE CHARACTER ;:TYPE A LINE FEED ;;CLEAN RUBOUT KEY FROM THE 000 000012 020122 STTYIN: SCNTLU: SCNTLG: SMSWR: 053505 SMNEW: .ASCIZ .SBTTL READ AN OCTAL NUMBER FROM THE TTY AR AA S SR NEW =/ iRt ittt STACK THE : RETURN .BYTE A¥IE .BLKB .ASCIZ .ASCIZ .ASCIZ AR INPUT CMPB BNE CLRB RTI 9%: 3% (R3) s:SETUP TO TYPEOUT THE DELETED CHAR. 2% . SQUES 1% (R3),9% TYPE TST 000002 000004 (R3).,9% BR TYPE BR MOVB TYPE 000015 005015 006507 053523 000 047040 000040 R3 R3,#STTYIN 43 TYPE 001226 000004 023654 DEC imp BLO BNE CLRB 001227 023654 SEQ 0190 SEQ 0189 ROUTINE MOVB 023652 023652 H 15 PAGE 192 . ittt i ittt ittt it tld ;*THIS ROUTINE WILL READ AN OCTAL (ASCII) NUMBER FROM THE TTY AND ;*CHANGE IT TO BINARY. ;*THE INPUT CHARACTERS WILL BE CHECKED TO INSURED THEY ARE LEGAL ;*OCTAL DIGITS. IF AN ILLEGAL CHARACTER IS READ A ''?'' WILL BE TYPED ;*FOLLOWED BY A CARRIAGE RETURN-LINE FEED. THE COMPLETE NUMBER MUST s*THEN BE RETYPED. THE INPUT IS TERMINATED BY TYPING A CARRIAGE RETURN. s*CALL: ot 2 RDOCT RETURN HERE ;sREAD AN OCTAL NUMBER ;:LOW ORDER BITS ARE ON TOP OF THE STACK CZDHM-D~0 CZDHMD.P11 8312 8313 8314 8315 8316 8317 8318 8319 8320 8321 8322 8323 8324 8325 8326 8327 8328 8329 8330 8330 8332 8333 8334 8335 8336 8337 8338 8339 8340 8341 8342 8343 8344 8345 8346 8347 8348 8349 8350 8351 8352 8353 8354 8355 8356 8357 8358 8359 8360 8361 8362 8363 8364 8365 8366 8367 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 193 I15 READ AN OCTAL NUMBER FROM THE H 023720 023722 023730 023732 023734 023736 023740 023742 023746 023750 023752 023754 023756 023762 023764 023770 023772 023774 023776 024000 024002 024004 024006 024012 024014 024016 024020 024024 024030 024032 024034 024036 024040 024042 024044 024046 024050 024054 024056 011646 016666 010046 010146 010246 104411 012600 010037 005001 005002 112046 001420 122716 003026 122716 002423 006301 006102 006301 006102 006301 006102 042716 062601 000756 005726 010166 010237 012602 012601 012600 000002 005726 105010 104401 000000 104401 000730 000000 000004 000002 $RDOCT: 1%: 024046 2%: 000060 MOV 000012 024056 3s: 4: 001226 5%: (SP),-(SP) MOV MOV MOV MOV 4(SP),2(SP) RO,-(SP) R1,-(SP) R2.-(SP) MOV (SP)+,R0O RDLIN MOV CLR CLR MOVB BEQ ASL 177770 SEQ 0190 ;:HIGH ORDER BITS ARE CMPB BGT CMPB BLT ASL ROL 000067 SEQ 0191 TTY ROL ASL ROL BIC ADD BR TST MOV MOV MOV MOV MOV RTI TST CLRB TYPE RO,5% R1 R2 (RO)+,-(SP) 3% #'0,(SP) 4% #'7,(SP) 4% R1 R2 R1 R2 R1 R2 ;;PROVIDE SPACE FOR :: INPUT NUMBER ::PUSH RO ON STACK ;:;PUSH R1 ON STACK ;:PUSH R2 ON STACK IN SHIOCT THE ;sREAD AN ASCIZ LINE ;:GET ADDRESS OF 7ST CHARACTER ;:AND SAVE IT ;:CLEAR DATA WORD ;:PICKUP THIS CHARACTER ;:1F ZERO GET ouTt ;s sMAKE SURE THIS CHARACTER ::1S AN OCTAL DIGIT sa%2 savd ;8 # C7,(SP) ::STRIP THE ASCII JUNK 2% (SP)+ R1,12(SP) R2,$HIOCT (SP)+,R2 ;. LOOP ;sCLEAN TERMINATOR FROM STACK ;:SAVE THE RESULT (SP)+,R1 (SP)+,R1 (SP)+,RO (SP)+ (RO) .WORD O TYPE .SQUES BR 1% $HIOCT: .WORD O .SBTTL TRAP DECODER ;:ADD IN THIS DIGIT ;:POP STACK INTO R2 ::POP STACK INTO R1 ;:POP STACK INTO RO ; sRETURN :;CLEAN PARTIAL FROM STACK ;:SET A TERMINATOR ::TYPE UP THRU THE BAD CHAR. 2L ER R CLET ;s TRY AGAIN ::;HIGH ORDER BITS GO HERE T L T T T T IS R T ;*THIS ROUTINE WILL PICKUP THE LOWER BYTE OF THE '‘TRAP'' INSTRUCTION s*AND USE IT TO INDEX THROUGH THE TRAP TABLE FOR THE STARTING ADDRESS ;*0F THE DESIRED ROUTINE. THEN USING THE ADDRESS OBTAINED IT WILL ;*GO TO THAT ROUTINE. 024060 024062 024066 024070 024072 024074 024100 010046 016600 005740 000002 111000 006300 016000 000200 024114 $TRAP: MOV Mov TST MOovB ASL MOV RTS RO,=(SP) 2(SP),RO ::SAVE RO ;:GET TRAP ADDRESS RO ;;POSITION FOR INDEXING ~(R0O) (RO),RO $TRPAD(RO) ,RO RO : :BACKUP BY 2 ;:GET RIGHT BYTE OF TRAP ;:INDEX TO TABLE ;:G0 TO ROUTINE (ZDHM-D-0 CZDHMD P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 TRAP DECODER 8368 8369 8370 8371 8372 8373 8374 8375 8376 8377 8378 8379 8380 8381 8382 8383 8384 8385 8386 8387 8388 8389 8390 8391 8392 8393 8394 8395 8396 8397 8398 8399 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 8420 8421 8422 8423 08:05 ;;THIS 024102 024104 024112 011646 016666 000002 000004 000002 PAGE IS USE J 15 194 TO HANDLE $TRAP2: MoV MOV SEQ 0192 SEQ 0191 THE “'GETPRI'* MACRO ;;MOVE THE PC DOWN ;:MOVE THE PSW DOWN ;sRESTORE THE PSW (SP) ,~(SP) 4 (SP),2(sP) RTI .SBTTL TRAP ;*THIS TABLE TABLE CONTAINS THE STARTING ADDRESSES OF ;*BY THE "'TRAP'' INSTRUCTION. THE ROUTINES CALLED ROUTINE 024114 024116 024120 024122 024124 024126 024102 022266 021640 021614 021654 022042 024130 023066 024132 024134 024136 024140 023016 023300 023420 023720 $TRPAD: . .SBTTL R 024142 024150 024156 024160 024162 024164 024166 024170 024172 024176 024202 024210 024212 012737 012737 010046 010146 010246 010346 010446 010546 017746 010637 012737 000000 000776 024306 000340 000024 000026 s CALL=TYPE ;s CALL=TYPOC s s CALL=TYPOS ::CALL=TYPON ;s CALL=TYPDS TRAP+1(104401) TRAP+2(104402) TRAP+3(104403) TRAP+4(104404) TRAP+5(104405) TTY TYPEOUT ROUTINE TYPE OCTAL NUMBER (WITH LEADING_ZEROS) TYPE OCTAL NUMBER (NO LEADING ZEROS) $GTSWR ;s CALL=GTSWR TRAP+6(104406) GET SOFT-SWR SETTING $CKSWR ;s CALL=CKSWR TRAP+7(104407) TEST FOR CHANGE IN SOFT-SWR AR ARl it ettt ;POWER DOWN ROUTINE $PWRDN: 000024 TYPE OCTAL NUMBER (AS PER LAST CALL) TYPE DECIMAL NUMBER (WITH SIGN) SRDCHR s ;CALL=RDCHR TRAP+10(104410) TTY TYPEIN CHARACTER ROUTINE SROLIN s ;CALL=RDLIN TRAP+11(104411) TTY TYPEIN STRING ROUTINE SRDOCT s CALL=RDOCT TRAP+12(104412) READ AN OCTAL NUMBER FROM TTY POWER DOWN AND UP ROUTINES AR 154742 024312 024214 $TRAP2 MOV MoV MOV MOV MOV MoV MoV MoV MoV MOV MoV HALT BR #SILLUP,@#PWRVEC ittt ittt ittt sis it ssssd ;;SET ;OR FAST UP #340,3a#PURVEC+2 ;;PRIO: RO,~(SP) ::PUSH RO ON STACK R1,-(SP) ::PUSH R1 ON STACK R2.=-(SP) ::PUSH R2 ON STACK R&,-(SP) ;:PUSH R4 ON STACK R3.-(SP) RS.-(SP) aSWR,-(SP) SP,$SAVR6 #SPWRUP ,@#PWRVEC .=2 ;:PUSH R3 ON STACK ;:PUSH RS ON STACK ::PUSH @SWR ON STACK ;:SAVE SP ;;SET UP VECTOR : :HANG UP soRtkREATRARRIRARAARRATRRERITECRRACRACOORORIERRARRARRRRARRARARRRRARORES 024214 024222 024226 024232 024236 024240 024244 024246 012737 013706 005037 005237 001375 012677 012605 012604 024306 024312 024312 024312 154674 000024 .POWER UP ROUTINE $SPWRUP: 1%: MOV MoV CLR INC BNE MoV MOV MOV #SILLUP,@#PWRVEC ;.SET FOR FAST DOWN $SAVR6, SP $SAVR6 $SAVR6 1% (SP)+,aSWR ::GET SP ;:WAIT LOOP FOR THE TTY ;:WAIT FOR THE INC ;:0F WORD ::POP STACK INTO aSWR (SP)+ R4 ;:POP STACK INTO R4 (SP)+,RS ;:POP STACK INTO RS CZOHM-D-0 CZDHMD.P11 8424 8425 8426 8427 8428 8429 8430 8431 8432 8433 8434 8435 8436 8437 8438 8439 8440 8441 MACY11 30A(1052) 09-MAR-78 15:32 024250 024252 024254 024256 024260 024266 024274 024276 024300 024302 024304 024306 024310 024312 024314 024322 012716 002744 000002 00000C 000776 000000 005015 000122 024324 004737 012603 012602 012601 012600 012737 012737 104401 024142 000340 K 15 10-MAR-78 08:05 PAGE 195 POWER DOWN AND UP ROUTINES 000024 000026 024314 047520 027244 042527 Mov MOV MoV MOV MOV MoV TYPE $PWRMG: .WORD MOV $PWRAD: .WORD RTI SILLUP: HALT BR $SAVR6: 0 S$POWER: .ASCIZ .EVEN JSR SEQ 0193 SEQ 0192 (SP)+ ,R3 ;:POP STACK INTO R3 (SP)+,R2 ::POP STACK INTO R2 (SP)+,R1 ;:POP STACK INTO R1 (SP)+,RO ;:POP STACK INTO RO #SPURDN ,@#PWRVEC ;;SET UP THE POWER DOWN VECTOR #340,3#PURVEC+2 ;;PRIO:7 $POWER (PC)+, (SP) RSTRTA =8 <15><12>"'POWER"’ PC,DCACHE ;REPORT THE POWER FAILURE ;:POWER FAIL MESSAGE POINTER s ;RESTART AT RSTRTA ;;RESTART ADDRESS ;:THE POWER UP SEQUENCE WAS STARTED ;:; BEFORE THE POWER DOWN WAS COMPLETE ;sPUT THE SP HERE ;DISABLE CACHE ;;++D (ZDHM-D-0 CZDHMD .P11 8442 8443 8444 8445 8446 8447 8448 8449 8450 8451 8452 8453 . 8454 8455 8456 8457 8458 8459 8460 8461 8462 8463 8464 8465 8466 8467 8468 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 S 8473 8474 8475 8476 8477 8478 8479 8480 8481 8482 8483 8484 8485 8486 8487 8488 8489 8490 8491 8492 8493 8494 8495 8496 8497 SEQ 0194 SEQ 0193 AR EER R R RN EAERRRRERCERERRRCERRRCRERRRIRRERRRRRRCRARARARRNCERIORES ;COMMON DH11 SERVICE ROUTINES SRR AR R R R A AR AR AR TR RN RRAARRRARRRRARARRRAARAARR AR R R ;THIS ROUTINE IS CALLED DURING START UP TO LOAD THE XMITTER ;OUTPUT BUFFER WITH A BINARY COUNT TEST PATTERN 024330 024334 024336 024340 024342 024346 024350 012701 005002 110221 005202 022702 001373 000207 037312 LDTBF1: MOV CLR 18: MOVB INC CMP BNE 000400 RTS #TBUF ,R1 R2 R2,(R1)+ R2 #400,R2 1% PC ;POINT TO START OF BUFFER sINIT DATA BYTE GENERATOR ;LOAD ONE CHAR ;GENERATE NEXT CHAR :LOADED 256(10) BYTES :BR IF NOT . RETURN TO START TESTING ;THIS ROUTINE SETS UP THE ERROR INFORMATION REQUIRED BY ANY TEST ;USING A "'DH1'' HEADER 024352 024356 024362 024366 024372 024376 024402 024410 004737 113700 010037 010137 010237 010637 062737 000207 027200 001102 001162 001164 001166 001176 000002 SUER1: JSR MovB PC,SAPS $TSTNM,RO ;SAVE THE ERROR PSW sSAVE THE TEST NO. MoV MoV MOV ADD R1,$REG! R2,$REG2 R6,SREG6 #2 ,3REG6 ;SAVE THE DH11 ADDR sSAVE THE REG ADDRESS :SAVE THE SP s CORRECT FOR CALLING JSR Mmov 001176 RTS RO, SREGO PC sSAVE THE TEST NO. FOR ERROR PRINT sRETURN TO CALLING ROUTINE sTHIS ROUTINE IS CALLED BY THOSE TESTS USING A ''DH2'" HEADER TO ;SAVE THE ERROR INFORMATION IN '‘DT2" 8470 8472 L 15 PAGE 196 POWER DOWN AND UP ROUTINES 8469 8471 08:05 024412 024416 024422 024426 024432 024436 024442 024446 024452 024460 004737 113700 010037 010137 010237 010337 010437 010637 062737 000207 027200 001102 001162 001164 001166 001170 001172 001176 000002 SUER2: JSR SUER2A: MOVB MOV MoV MoV PC,SAPS $TSTNM,RO RO, SREGO R1,SREG1 R2.$REG2 :SAVE THE ERROR PSW :GET THE TEST NO. :SAVE THE REGISTERS-TEST# ;SAVE THE DH ADDRESS sSAVE THE REGISTER ADDRESS MOV MOV ADD R4 ,SREG4 R6,SREGO #2 ,SREG6 ;SAVE THE S/B DATA sSAVE THE STACK POINTER ;CORRECT FOR CALLING JSR MOV 001176 RTS R3,$SREG3 PC ;SAVE THE WAS DATA :RETURN TO REPORT ERROR sTHIS ROUTINE IS CALLED TO SET UP ERROR INFORMATION FOR THE ;BUS ERROR AND RSVD INSTR ERROR ROUTINES 024462 024466 024472 024476 010037 010137 010237 000207 001162 001164 00116¢ SUER3: MOV MOV MoV RTS RO, SREGO R1,$REG! R2,$REG2 PC ;SAVE THE REGS sRETURN TO REPORT ERROR ;THIS ROUTINE IS CALLED TO SET UP ERROR INFORMATION FOR THE ;CAR/BCR MEMORY PATTERNS TESTS 024500 024504 024512 024516 005037 113737 113700 010037 001202 030324 001102 001162 001202 SUER4: (LR MovB MovB Mov $TMPO LINEA,STHPO $TSTNZ,RO RO,SREGO sSAVE THE LINE NO. WRITTEN ;SAVE THE TEST NUMBER ;SAVE THE REGISTER INFORMATION CZDHM=-D-0 CZOHMD . P11 8498 8499 8500 8501 ggg% 024522 024526 024532 024536 024542 MACY11 30A(1052) 09-MAR-78 15:32 010137 010237 010337 010437 000207 10-MAR-78 08:05 001164 001166 .001170 001172 MoV MoV MOV MOV RTS 8507 8517 8518 8519 8520 8521 852¢ 8523 8524 8525 8526 8527 8528 gggg R1,SREGT R2.$REG2 R3.$REG3 R4, SREG4 PC :JSR :BR :RETURN TO PATTERNS TEST PC.SELINE 1% :CALL THE ROUTINE :EXIT BRANCH-ROUTINE MOVES THE RETURN :PC AROUND THIS BR IF MORE LINES ARE ;YET TO BE TESTED 024544 024550 024552 024556 024564 024570 024572 024576 024602 024604 024612 024614 024620 024622 024626 024634 105737 001010 105137 012737 105037 000405 105237 006337 001407 033737 001767 062716 000402 005037 142777 000207 030323 030323 000001 030322 SELINE: TSTB 027314 BNE coMB 027314 030322 027314 1$: 027312 2%: 002446 3s: 4$: 000002 030322 000017 MOV CLRB BR INCB ASL BEQ BIT BEQ ADD BR CLR BICB RTS LINE#+1 ;FIRST TIME THROUGH FOR ANY TEST ? #1,LINMSK LINE 2% LINE INIT SELECT TEST MASK TO TEST LINE 00 :START WITH LINE #00 ;GO TEST FOR LINE #00 :GENERATE NEW LINE NO. 1% LINE+1 L INMSK 3s LINMSK,LINSEL 1 ' #2,(SP) 48 LINE #17 ,3DHADR PC :BR IF NOT :SET ENTRY FLAG :SHIFT SELECT MASK TO TEST NXT LINE sRETURN TO EXIT BRANCH - ALL LINES DONE ;IS THE LINE SELECTED FOR TEST ?? :BR IF NOT :MOVE RETURN PC AROUND EXIT BRANCH ;RETURN TO TEST SELECTED LINE ;INIT ENTRY FLAG AND LINE NO. TO 000 sINIT LINE SELECT BITS IN "'SCR" :RETURN TO CALLING TEST :THIS ROUTINE IS CALLED TO CONVERT EITHER THE ''DH'' NUMBER OR THE :"LINE'" NUMBER TO TWO ASCII CHARACTERS AND MOVE THEM INTO A g;gz :PARTICULAR MESSAGE BUFFER FOR ERROR REPORTING g;gz ;CALLING SEQUENCE 8537 8538 ;JSR ;ADDR1 RS, SUNUM MOV MOV MoV MoV MOV MOVB MOV ASR ASR ASR BIC RO,=(SP) R1,-(SP) R2,-(SP) (RS)+,R0 (RS)+,R1 (RO) ,RO RO,R2 R2 R2 R #177770,R2 3223 8553 SEQ 0194 :CALLING SEQUENCE: 8531 8532 8541 8542 8543 8544 8545 8546 8547 8548 8549 8550 8551 8552 SEQ 0195 :THIS ROUTINE IS CALLED TO SELECT A NEW LINE NO. BASED ON THE :VALUE OF THE LINE SELECTION PARAMETER 8508 8509 8510 8511 gg}% 8515 8516 M5 POWER DOWN AND UP ROUTINES 8504 gggz 8514 PAGE 197 :ADDR2 024636 024636 024640 024642 024644 024646 024650 024652 024654 024656 024660 024662 024666 010046 010146 010246 012500 012501 111000 010002 006202 006202 006202 042702 062702 SUNUM: 177770 000060 ADD ;CALL TO THIS ROUTINE :ADDRESS OF THE NUMBER TO BE CONVERTED :ADDRESS OF THE MSG BUFFER SLOT #60,R2 ::PUSH RO ON STACK ::PUSH R1 ON STACK ::PUSH R2 ON STACK :GET ADDRESS OF NUMBER :GET MSG BUFFER ADDR :GET NO. TO BE CONVERTED :SAVE IT IN R2 :SHIFT MSD TO LSD POSITION : :CLR JUNK BITS ;MAKE IT ASCII 110011 SEQ 0195 MOvB 177770 000060 BIC ADD MOVB MoV MoV MOV RTS 012602 012601 012600 000205 R2,(R1)+ #177770,R0 #60,R0 RO, (R1) (SP)+,R2 (SP)+,R1 (SP)+,RC RS sPUT IT IN MSG BUFFER sCLR JUNK FROM LSD JMAKE IT ASCII sPUT LSD IN THE BUFFER ;:POP STACK INTO R2 ;:POP STACK INTO R1 ;:POP STACK INTO RO JRETURN TO CALLER PN SEQ 0196 POWER DOWN AND UP ROUTINES e N 15 SN SR PR B 042700 062700 PAGE 198 W 110221 08:05 ;:THIS ROUTINE IS CALLED TO CLEAR THE ''CAR'' AND "BCR'' MEMORIES ;1T ASSUMES THAT THE ADDRESS OF THE "'SCR" IS IN R1 024716 024722 024726 024732 024736 024742 024750 024752 024756 005037 113711 005061 005061 005237 022737 001364 142711 000207 001220 001220 000006 000010 001220 000020 001220 000017 CLCABC: CLR MOovB 1%: CLR CLR INC CMP BNE BICB RTS STMP7 $TMP7, (R1) CAR(R1) BCR(R1) STMP7 #20,8THP7 . 18 #17,(R1) PC ;INIT A COUNTER sSELECT A LINE sCLEAR A CAR LOCATION ;CLEAR A BCR LOCATION :GENERATE NEW LINE NO. sDONE ALL LINES ? ;BR IF NOT sSET "'SCR'' TO SELECT LINE 00 sRETURN TO CALLER ;THIS ROUTINE IS CALLED TO LOAD THE ''BCR'* MEMORY WITH ALL ONES ;1T ASSUMES THAT THE ADDRESS OF THE SCR IS IN R1 RTS #-1,BCR(RT) STMP7 #20,8THP7 1% #17,(R1) PC sINIT A COUNTER sSELECT A LINE :LOAD BCR LOC. WITH 177777 ;GENERATE NEXT LINE NO. sDONE ALL LINES ? ;BR IF NOT ;SET ''SCR'' TO SELECT LINE 00 ;RETURN TO CALLER sTHIS ROUTINE CALLED TO SET UP FOR PARITY TESTS 025020 025026 025030 025032 025036 025042 025050 025056 025064 025070 012737 105011 005002 012703 012704 012761 013761 013761 105062 000020 000200 000001 037312 001216 110364 001214 036312 036312 005337 000002 000002 001212 005211 005203 062702 062704 001352 012704 013724 022704 001373 027562 001216 027622 001212 000006 000010 000004 SUPPAR: 1%: MOV CLRB CLR #20,3TMP4 (R1) R2 MoV 1 ,R4 #TBUF ,CAR(R1) $TMP6 ,BCR(RT) MOV MOV MOV MoV CLRB MOVB INC INC ADD ADD DEC BNE 2%: MoV MOV CMP BNE #200,R3 $TMPS5,LPR(R1) RBUF (R2) R3,RBUF (R4) (R1) R3 #2,R2 #2,R4 $TMP4 1% #MULPTB, RS $TMP6, (RG) + ;:ULPTB*éO,Rk ;SET UP FOR 16. LINES ;INIT SCR TO START AT LINE 00 ;INIT INDEX REGISTER FOR RBUF (EVEN) ;SET UP CONSTANT ;INIT INDEX REG FOR RBUF (0DD) ;LOAD BUS ADDRESS REWG :LOAD BYTE COUNT REG :LOAD LINE PARAMETERS ;INIT DATA BYTE IN RBUF TO START AT 000 sSET CONSTANT IN HIGH BYTE sSELECT NEXT LINE ;GENERATE NEW CONSTANT T ANTIITIEYT Y D Wt BNE BICB 000017 STHP7 $TMP7, (R1) bk 001220 CLR MovB MoV INC CHP WML 000010 LDBCR: 1%: T 001220 001220 177777 001220 000020 ;UPDATE POINTERS TO RBUF (EVEN/ODD) ;COUNT ONE LINE SETUP ;BR TILL ALL 16. SET UP ;SET UP TABLE POINTER sSET UP BYTE COUNT ENTRY ;SET UP ALL COUNTS ? ;BR IF NOT AT 024770 024776 025002 025010 025012 025016 005037 113711 012761 005237 022737 001365 142711 000207 R PN 024760 024764 - 8585 8586 8587 8588 8589 8590 859 8572 8593 8594 8595 8596 8597 8598 8599 8600 8601 8602 8603 8604 8605 8606 8607 8608 8609 024672 024674 024700 024704 024706 024710 024712 024714 10-MAR-78 - 8554 8555 8556 8557 8558 8559 8560 8561 8562 8563 8564 8565 8566 8567 8568 8569 8570 8571 8572 8573 8574 8575 8576 8577 8578 8579 8580 8581 8582 8583 8584 MACY11 30A(1052) 09-MAR-78 15:32 — (ZDHM-D-0 CZDHMD P11 CZDHA-D-0 CZDHMD.P11 8610 8611 8612 8613 8614 8615 8616 8617 8618 8619 8620 8621 8622 8623 8624 8625 8626 8627 8628 86¢9 8630 8631 8632 8633 8634 8635 8636 8637 8638 8639 8640 8641 8642 8643 8644 8645 8646 8647 8648 8649 8650 8651 8652 8653 8654 8655 8656 8657 8658 8659 8660 8661 8662 8663 8664 8665 025134 025136 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-7€ 08:05 PAGE 199 16 SEQ 0197 POWER DOWN AND UP ROUTINES 105011 000207 CLRB RTS (R1) PC SEQ 0196 SINIT SCR TO “F.ECi sRETURN TO PARI'Y LINE 00 TEST ;THIS ROUTINE AUTOSIZES THE SYSTEM TO DETERMINE THE ADDRESSES AND :VECTORS OF THE DH11'S AND MODEM CONTROL'S. 025140 025142 025144 025150 025152 025154 025160 025162 025166 025174 025200 010046 005003 012702 005022 005203 020327 001373 013746 012737 012703 012702 000004 025274 030144 030042 025204 012701 160020 025210 025212 025216 005711 005761 052711 000016 004000 025222 025226 025232 025236 052711 052711 032711 001410 025240 AUTOSZ: MOY CLR 030042 25%: 000102 MoV #DHADRS ,R2 sPOINT TO BEGINNING OF TABLE CHP BNE R3,#102 25% sHAVE WE CLEARED ALL ENTRIES? ;BRANCH IF NOT. MoV Mov Mmov #4S,an6 #DMADRS ,R3 #DHADRS ,R2 sSETUP FOR NON-EXISTENT MEMORY TRAP. ;SETUP DM ADDRESS TABLE POINTER. ;SET UP DH ADDRESS TABLE POINTER. fhg MOV 000004 RO,-(SP) R3 ;52)0 aks ,-(SP) sCLEAR AUTOSIZER TABLES. sSAVE TRAP VECTOR. MoV #160020,R1 ;R1=FIRST ADDRESS TO BE TESTED. TST TST BIS (R1) 16(R1) #4000, (R1) ;SEE IF ADDRESS IN R1 RESPONDS. sCHECK TO SEE IF DEVICE IS MODULO 20. 001000 002000 003000 BIS BIS #1000, (R1) #2000, (R1) sAND CHECK TO SEE s1F THIS ADDRESS CONTAINS :A DH=11, BEQ 38 052711 000400 BIS #400, (R1) 025244 032711 002400 BIT #2400, (R1) sNON-EXISTENT MEMORY INTERRUPT BIT. ;1S THIS A DH-11? (BITS 8 AND 10 SHOULD 025250 025252 025256 001003 042711 010122 001000 3s ;1F NOT, CHECK TO SEE IF THIS IS A MODEM CONTROL. R1,(R2)+ ;SAVE THE ADDRESS IN THE DH ADR TABLE. 025260 025264 025266 025272 020127 001406 062701 000746 025274 025300 012716 000002 18: BIT BNE ;EXISTENT MEMORY BIT AND THE CLEAR sCLEAR IF THIS IS A DH11.) #1000, (R1) 3s: CHP BEQ ADD BR R1,#163760 5% #20,R1 1% ;HAVE WE REACHED THE TOP OF THE FLOATING ADDRESSES. :IF YES, GET OUT. :IF NOT, UPDATE ADDRESS AND ;GO CHECK IT. 48: :?Y #3%, (SP) ;IF DH ADDRESS DOES NOT RESPOND, GO TO 38. 000020 025260 ;CHECK TO INSURE THESE BITS SET. ;1F NOT, BRANCH. sSET THE MAINTENANCE BIT, THE NON- BIC MoV 163760 #3000, (R1) s1F IT IS, CONTINUE ;CLEAR MAINTENANCE BIT. ;TEST FOR MODEM CONTROL ADDRESS 025302 025310 025314 025316 012737 012701 005711 010123 025334 025320 025324 020127 001406 170670 170500 000004 5%: Mov #6S$ ,an4 218%: IS8T (R1) 238: MoV #170500,R1 MoV R1.(R3)+ CMP BEQ R1,#170670 22% ;SETUP FOR NON-EXISTENT MEMORY TRAP. ;R1=FIRST ADDRESS TO BE TESTED. ;SEE IF ADDRESS RESPONDS. sIF IT DOES, THIS IS A MODEM CONTROL, ;SO SAVE THE ADDRESS. ;HAVE WE REACHED THE TOP OF THE MODEM ADDRESSES? :IF YES, GET OUT. (ZDHM-D-0 CZDHMD.P11 8666 025326 MACY11 30A(1052) 09~MAR-78 15:32 062701 000010 10-MAR-78 08:05 PAGE 200 POWER DOWN AND UP ROUTINES 16 SEQ 0198 SEQ 0197 ADD #10.R1 21% s1F NOT, UPDATE ADDRESS AND ;GO CHECK IT. ggg; 025332 000770 8669 025334 012716 025320 68: MoV #23%,(SP) ;IF DM ADDRESS DOES NOT RESPOND, GO TO 23%. 8672 8673 8674 8675 g:;g 025342 025346 025352 025354 025360 012637 162702 001003 104401 000000 000004 030042 22%: MoV SUB BNE TYPE HALT (SP)+,a# #DHADRS ,R2 7% .MSG1 sRESTORE TRAP VECTOR. ;HAVE WE FOUND ANY DH11'S AT ALL? :1F YES, BRANCH 8678 8679 8680 8681 8682 8683 8684 8685 8686 8687 8688 8689 8690 8691 8692 8693 gggg 025362 025364 025366 025370 025372 025374 025376 025400 006202 005000 006100 005200 005302 005702 001373 010037 R2 RO RO RO R2 R2 8% RO, $DHSEL ;R2 NOW CONTAINS THE NUMBER ;OF DH'S FOUND. sFILL RO WITH 1°'S 030314 ASR CLR ROL INC DEC TST BNE Mov 025404 025410 025414 025422 025430 025434 012702 012705 012737 012737 012703 012704 030042 030104 000340 025532 000300 000302 gggg 025440 010423 8698 8699 g;g? 025442 025446 025450 012724 022324 020427 g;gg 025454 10177 8704 g;gg 025456 025460 005712 001441 8707 8708 g;?g 025462 025466 025474 005037 052772 052772 g;}; 025502 005000 8713 8714 8715 8716 8717 g;}g 025504 025506 025510 025514 025522 025530 005200 001376 104401 052772 042772 000752 8720 8721 025532 025534 011601 042701 gg;? 025340 000002 BR 035604 7%: 8s: 000022 000020 sFIND DH VECTOR: MOV #DHADRS ,R2 MOV #DHVEC,RS Mov #340,3#I0TVEC+2 MoV #128 ,3#10TVEC MoV #300,R3 Mmov #302.R4 9%: 000004 001000 108: 177776 001000 000300 000000 000000 118: 035634 004000 001000 000007 RTI 000000 000000 12%: :NO DH11'S WERE FOUND, ;CORRESPONDING TO ;THE NUMBER OF LH'S s FOUND. ;SDHSEL CONTAINS THE DH SELECTION PARAMETER. ;IE. ALL DH'S FOUND WILL BE TESTED. :SETUP POINTER TO BEGINNING OF DH ;ADDRESS TABLE AND VECTOR TABLE. sSET IOT TRAP PRIORITY TO 7. sSETUP 10T TRAP VECTOR. ;START OF FLOATING VECTORS :PC OF IOT INSTR. Mov R4, (R3)+ MOV cmp CMP #4,(R4)+ (R3)+,(R4)+ R4, #1000 BLOS 9% TST BEQ (R2) 138 ;HAVE WE CHECK ALL DH'S? CLR BIS BIS PS #1000,a(R2) #300,3(R2) CLR RO ;ZERO CPU PRIORITY. :SET MAINTENANCE BIT SATTEMPT TO CAUSE RECEIVER : INTERRUPT. IN BNt TYPE BIS BIC BR RO 118 .MSG2 #4000,a(R2) #1000,a(R2) 108 MoV BIC (SP) ,R1 #7,.R1 sFILL VECTOR AREA WITH ADDRESS ;OF NEXT INSTR (.+2) sNEXT INSTRUCTION IS AN IOT TRAP. ;UPDATE R3+R4. sHAVE WE REACHED TO TOP OF THE sVECTOR SPACE? :IF NOT, REPEAT PROCESS. ;IF YES, GET OUT + CHECK FOR MODEM CONTROL'S VECTORS. SWALT... ;ERROR MSG-NO DH RECEIVER INTERRUPT OCCURRED. ;DO A MASTER CLEAR ;CLEAR MAINTENANCE BIT ;CLEAR GARBAGE. CZDHM=-D-0 CZDHMD.P11 8722 8723 8724 8725 8726 8727 8728 8729 8730 8731 8732 8733 8734 8735 8736 8737 8738 8739 8740 8741 8742 8743 8744 8745 8746 8747 8748 8749 8750 8751 8752 8753 8754 8755 8756 8757 8758 8759 8760 8761 8762 8763 8764 8765 8766 8767 8768 8769 8770 877N 8772 8773 8774 8775 8776 8777 025540 025542 025544 025550 025556 025562 MACY11 30A(1052) 09-MAR-78 15:32 010125 022626 012716 052772 042732 000002 10-MAR-78 08:05 D 16 SEQ 0199, SEQ 0198 POWER DOWN AND UP ROUTINES MOV 025456 004000 001000 PAGE 201 CHpP MoV 000000 BIS BIC RTI R1,(R5)+ (SP)+,(SP)+ #108%, (SP) #4000,3(R2) #1000.a(R2) + :SAVE VECTOR ADDRESS. ;POP STACK sSETUP FOR RETURN. ;DO A MASTER CLEAR ;CLEAR MAINTENANCE BIT. ;FIND MODEM CONTROL VECTORS: 025564 025570 025574 012702 012705 012737 025602 025604 025606 025612 025620 025626 005712 001441 005037 052772 052772 005000 025630 025632 025634 025640 025646 025654 005200 001376 104401 052772 042772 000752 025656 025660 011601 162701 025664 025666 025670 025674 025702 010125 022626 012716 052772 042732 025706 000002 025710 025716 025720 025724 012737 012600 012703 012704 025730 010423 025732 025736 025740 025744 022324 020427 101771 025746 025752 025756 025760 0137Q1 005737 001403 163701 025764 025766 005401 010137 012724 030144 030206 025656 177776 001000 000300 035701 004000 001000 MoV MoV MOV #DMADRS ,R2 #DMVEC RS #16%,a#10TVEC ;SET POINTERS TO BEGINNING OF ;ADR TABLE & VECTOR TABLE. ;SET 10T TRAP VECTOR. 14%: TST BEQ CLR BIS BIS CLR (R2) 17% PS #1000,a(R2) #300,a(R2) RO sHAVE WE CHECKED ALL DM'S? ;1F YES, GET OUT. :ZERO CPU PRIORITY sSET MAINTENANCE BIT. sATTEMPT TO CAUSE INTERRUPT. 158: INC BNE TYPE BIS BIC BR RO L1 .MSG3 ;ERROR MSG - NO MODEM CONTROL INTERRUPT OCCURRED. ;CLEAR BITS PREVIOUSLY SET. sCLEAR MAINTENANCE BIT. ’ 000020 000000 000000 000000 000000 16%: 000004 025602 004000 001000 13%: Mov SUB MoV CHP MOV BIS BIC 000000 158 #4000,a(R2) #1000,3(R2) 14% (SP) ,R1 ¥4 ,R1 R1,(R5)+ (SP)+,(SP)+ #148, (SP) #4000,a(R2) #1000,3(R2)+ RTI 021004 000020 S sCALCULATE VECTOR ADDRESS. ;SAVE VECTOR ADDRESS. sPOP STACK. sSETUP FOR RETURN. ;CLEAR BITS PREVIOUSLY SET. sCLEAR MAINTENANCE BIT AND ;POINT TO NEXT MODEM CONTROL ADDRESS. 17%: Mov Mov MOV Mov #$SCOPE ,a#IOTVEC ;RESTORE IOT VECTOR FOR SCOPE ROUTINE. (SP)+,RO sRESTORE RO. #300,R3 ;START OF FLOATING VECTORS. #302,R4 18%: Mov R4, (R3)+ MOV CMP CMP BLOS #0,(R4)+ Mov TST :LET R1 POINT TO 1ST DH VECTOR ADDRESS. ;1S THERE MORE THAN ONE VECTOR? ;BRANCH IF NOT. ;MAKE R1 POSITIVE. ;SAVE THAT NUMBER. 000300 000302 000000 oo100¢ 030104 030106 (R3)+,(R4)+ R4, #1000 18% 030106 BEQ SuB @#DHVEC,R1 a#DHVEC+2 26% a#DHVEC+2,R1 030306 NEG Mov R1 R1,ADRVEC 268%: ;FILL VECTOR AREA WITH ADDRESS OF NEXT ;INSTRUCTION (.+2). sNEXT INSTRUCTION IS A HALT. ;UPDATE R3 & R4. sARE WE DONE? :IF NOT, REPEAT UNTIL ADDRESSES ;377 T0 777 ARE DONE. ;DETERMINE NUMBER OF ADDRESSES ;BETWEEN DH VECTORS (10(8) OR 20(8)). CZDHM-C-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 8778 8779 8780 8781 8782 8783 8784 025772 026000 026002 026004 026006 026012 026016 032777 001442 104401 035754 012701 012702 012703 8787 8788 8789 8790 8791 8792 8793 8794 8795 8796 8797 8798 8799 8800 8801 8802 8803 8804 8805 026026 026030 026032 026033 026034 026036 026040 026041 026042 026046 026050 026052 026053 026054 026060 026062 026064 026065 026066 012146 104403 006 001 012246 104403 005 000 104401 012346 104403 006 001 104401 012446 104403 005 000 104401 8807 8808 8809 8810 8811 gg}% 026072 026074 026076 026100 026102 026106 005711 001354 005713 001352 104401 000207 g;gz 8806 8814 8815 8816 8817 8818 8819 8820 8821 8822 8823 8824 8825 8826 8827 gggg 8830 8831 8832 8833 026022 026070 012704 000002 E 16 10-MAR-78 08:05 PAGE 202 POWER DOWN AND UP ROUTINES 153140 SEQ 0200 SEQ 0199 #BIT1,aSwWR 20% 030042 BIT BEQ TYPE DEVMAP MoV #DHADRS ,R1 sSHOULD DEVICE MAP BE TYPED 0OUT? ;1F NOT, RETURN. :TYPEQUT MAP OF DH & MODEM CONTROL'S s FOUND. ;R1=BEGINNING OF DH ADDRESS TABLE. 030144 030206 Mov Mov #DMADRS ,R3 #DMVEC RS :R3=BEGINNING OF MODEM CONTROL ADDRESS TABLE. ;R4=BEGINNING OF MODEM CONTPOL VECTOR TABLE. 030104 MOV 19%: 035750 035750 001227 Mov TYPOS e .BYTE Mov TYPOS K iS .BYTE TYPE MoV TYPOS .BYTE B TYPE MoV TYPOS AR .BYTE TYPE SCRLF 001227 208: TST BNE TST BNE TYPE RTS #DHVEC ,R2 (R1)+,-(SP) & 1 (R2)+,-(SP) | 0 .SPACE (R3)+,~(SP) 6 1 . SPACE (R4)+,-(SP) 3 0 (R1) 19% (R3) 198 .SCRLF PC ;R2=BEGINNING OF DH VECTOR TABLE. :MOVE DATA TO BE TYPED :TYPE DATA :MOVE DATA TO BE TYPED :TYPE DATA ;MOVE DATA TO BE TYPED. s TYPE DATA. :MOVE DATA TO BE TYPED. :TYPE DATA. :TYPE A CARRIAGE RETURN & LINE FEED. sHAVE WE TYPED ALL DH ENTRIES? ;IF NOT, DO IT AGAIN. sHAVE WE TYPED ALL DM ENTRIES? ;IF NOT - ONE MORE TIME. ;IF YES, GO BACK TO MAIN PROGRAM. ;THIS ROUTINE IS USED TO ACCEPT INPUT PARAMETERS FROM THE CONSOLE sTELETYPE 026110 026112 026114 026116 026120 026122 026126 026130 026134 026136 026140 026144 026146 026152 104401 035507 104412 012600 001407 022700 001406 022700 001403 000764 012700 000207 004737 012700 INPARA: TYPE vVCw( RDOCT Mov BEQ CMP 000020 38: 48: BEQ CMP BEQ BR Mov RTS (SP)+,RO 3% #10,R0 4% #20,R0 4% INPARA #20,R0 PC 027244 177777 INPARC: JSR Mov PC,DCACHE #-1,R0 000010 000020 ;"'ASK FOR NO. ADDRESSES BETWEEN VECTORS" ;READ OCTAL NO. FM TTY ;GET THE NO. HE TYPED :BR IF HE TYPED <CR> :10(8) ADDRESSES BETWEEN VECTORS ? :BR IF YES ;20(8) ADDRESSES BETWEEN VECTORS ?? ;BR IF YES ;ASK ALL OVER AGAIN ;SET UP CONSTANT FOR 20(8) ADDRESSES ;RETURN TO CALLER :DISABLE CACHE ;:++D ;SET FLAG IN RO CZDHM-D-0 CZDHMD.P11 8834 8835 8836 8837 8838 8839 8840 8841 8842 8843 8844 8845 MACY11 30A(1052) 026156 000137 002164 026162 026166 026174 004737 012737 000137 027244 177777 002164 026200 026204 026212 026214 026216 026220 026222 026224 026226 026232 013701 032777 001405 104401 035064 104412 012601 001403 004737 000770 030042 000001 026234 026240 026246 026250 026252 026254 026256 026260 026262 026266 013701 032777 001405 012601 001403 004737 000770 026270 026274 026276 026300 026306 026310 026312 026314 026316 026320 026322 013701 005700 100404 032777 001405 104401 035177 104412 012601 001402 010137 026326 026330 026332 026340 026342 005700 100404 032777 001410 104401 035375 104412 012601 001403 010137 000403 012737 032777 001403 104401 035437 026344 026346 026350 026352 026354 026360 026362 026370 026376 026400 026402 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 203 16 JMP 030000 152726 INPARX: JSR 152672 104401 035130 BEGINA ;GO ASK FOR SELECT PARAMETER MOV ,'1oVC'LG BEGINA PC,DCACHE sDISABLE CACHE ;;++D ;SET SETUP FLAG ;GO START UP INPAR: MoV 1%: TYPE @#DHADRS ,R1 #BIT0,asSwR 2% sMOVE ADDRESS OF FIRST DH INTO R1. sARE PARAMETERS TO BE INPUT MANUALLY? sBRANCH IF NOT. ;ASK FOR DEVICE ADDRESS JMP 2%: 026412 BIT BEQ INMSG1 BEQ JSR BR INPAR1: MoV BIT BEQ 18: TYPE (SP)+,R1 INPAR1 PC,CHKADR 1% * a#DHVEC ,R1 #BITO,aswR 2% INMSG?2 104412 RDOCT MOV BEQ JSR BR 026526 2%: 030314 INPAR3: MoV 000001 TST BMI 152632 2%: 027310 1%: INPARS: 000001 152600 3%: BIT BEQ TYPE RDOCT MOV BEQ MoV TST BMI BIT BEQ TYPE MoV 027312 152542 Mov BIT BEQ TYPE INMSG7 sMOVE FIRST DH VECTOR INTO R1. ;ARE PARAMETERS ;BRANCH IF NOT. TO BE 1% ;ERROR BRANCH a#SDHSEL R RO 2% #BITO,aSWR 1% (SP)+,R1 INPARS R1,DHSEL RO 3% #BITO,aSWR 1% (SP)+,R1 1% R1,LINSEL 2% #-1,LINSEL #BIT8,aSWR EXPAR INPUT MANUALLY? sASK FOR VECTOR ADDRESS INPAR3 PC,CHKVCT 1NMSG6 BEQ 027312 ;READ IN WHAT IS TYPED ;GET THE NO. HE TYPED ;BR IF DEFAULT ;GO CHECK VALIDITY OF THE ADDR ;ERROR BRANCH sREAD IN WHAT HE TYPES ;GET THE ADDRESS :BR IF DEFAULT (SP)+,R1 INMSG3 RDOCT MoV 177777 000400 SEQ 0201 SEQ 0200 POWER DOWN AND UP ROUTINES RDOCT MoV 030104 000001 F ;GO CHECK VALIDITY OF VECTOR sMOVE DEVICE SELECTION PARAMETER INTO R1. ;DID WE START AT 210? sBRANCH IF YES. ;1S PARAMETER TO BE INPUT MANUALLY? ;BRANCH IF NOT. ;ASK FOR DEVICE SELECTION PARAMETER sREAD IN WHAT HE TYPES ;GET THE SELECT PARAMETER DEFAULT ;BR IF :SET UP DH11 SELECTION PARAMETER ;DID WE START AT 210? ;BRANCH IF YES. ;IS LINE SELECT PARAMETER TQ BE INPUT MANUALLY? ;BRANCH IF NO. ;ASK FOR LINE SELECT PARAMETER ;GET WHAT HE TYPES :GET PARAMETER :BR IF DEFAULT ;SET UP LINE SELECT PARAMETER ; CONTINUE ;SET UP DEFAULT (ALL LINES) sHALT AFTER SET UP ?? :BR IF NOT ;TYPE CONTINUE MESSAGE PRIOR TO HALTING CZDHM-D-0 CZDHMD.P11 8890 8891 8892 8893 8894 8895 8896 8897 8898 8899 8900 8901 8902 8903 8904 8905 8906 8907 8908 8909 8910 8911 8912 8913 8914 8915 8916 8917 8918 8919 8920 8921 8922 8923 8924 8925 8926 8927 8928 8929 8930 8931 8932 8933 8934 8935 8936 8937 8938 8939 8940 8941 8942 8943 8944 8945 MACY11 30A(1052) 09-MAP-78 15:32 026404 026406 000000 000137 026412 026416 026420 026422 026426 026430 020127 002001 000437 020127 002401 000433 032701 001030 026432 026436 026440 026444 026450 026456 026460 012702 032777 001011 012703 026464 026470 013704 012322 026472 026474 026476 026500 026502 026504 026510 026514 026516 026520 026522 026524 006204 005704 001374 000411 010122 026526 026532 026534 062716 062701 022702 001372 000402 002640 EXPAR: 160020 CHKADR: 160420 1%: 000017 000002 027700 000001 2%: 152462 030042 030314 6%: 38: 000020 027740 104401 026544 026546 026552 026554 026560 026564 026572 026574 026600 026604 013704 012322 026606 026610 026612 026614 026616 006204 005704 001374 000410 010122 08:05 4%: 5%: 000300 CHKVCT: 001000 1%: 000007 2%: 000002 027740 000001 152346 03010¢ 030314 PAGE 204 G 16 SEQ 0202 SEQ 0201 POWER DOWN AND UP ROUTINES 035250 000207 020127 002001 000436 020127 002401 000432 032701 001027 062716 012702 032777 001011 012703 026536 026542 10-MAR-78 6%: 38: HALT JMP START?2 CMP BGE BR CMP BLT BR R1,#160020 1% 4% R1,#160420 2% BIT BNE Mov 4% #17.R1 48 #2,(SP) #DHADTB,R2 #BITO,asSwR 3% #DHADRS ,R3 MoV $DHSEL ,R4 ASR TST R4 Ré BIT BNE ADD Mov Mov BNE BR Mov ADD CMP BNE BR TYPE INMSG4 RTS (R3)+,(R2)+ 6% 5% R1,(R2)+ #20,R1 #DHADTB+40,R2 3s 5% ;DEPRESS CONTINUE TO RESUME TESTING ;GO START UP THE PROGRAM ;1S ADDRESS ABOVE OR EQUAL TO LOW LIMIT ;BR IF YES :BR IF NOT ;1S IT BELOW THE HIGH LIMIT? ;BR IF YES ;BR IF NOT s CORRECT BOUNDARY ? ;BR IF NOT ;MOVE RETURN PC AROUND ERROR BRANCH ;POINT TO BEGIN OF ADDR TABLE ;ARE WE AUTOSIZING? :BRANCH IF NOT. sPOINT TO BEGINNING OF AUTOSIZER ;DH ADDRESS TABLE. ;MOVE CONTENTS OF AUTOSIZER DH TABLE ;TO THE TABLE USED BY PROGRAM. sHAVE WE MOVED ALL TABLE ENTRIES? ;BRANCH IF NOT--ONE MORE TIME. sRETURN TO INPUT ROUTINES. sSETR UP A TABLE ENTRY sGENERATE NEXT DH11 ADDR ;END OF TABLE ? :BR IF NOT ;RETURN TO INPUT ROUTINES ;TELL HIM HE GOOFED PC ;RETURN TO INPUT ROUTINES CMP BGE BR CMP BLT BR BIT BNE ADD MoV BIT BNE Mov R1.,#300 1% 43 R1.#1000 2% 4% #7.R1 4% #2,(5P) #DHVCTB,R2 #BIT0,aSwR 3% #DHVEC,R3 Mov Mov $DHSEL ,R4 (R3)+,(R2)+ ;1S ADDRESS ABOVE OR EQUAL TO LOW LIMIT ;BR IF YES ;BR IF NOT ;1S IT BELOW THE HIGH LIMIT? :BR IF YES ;BR IF NOT :CORRECT BOUNDARY 7 ;BR IF NOT ;MOVE RETURN PC AROUND ERROR BRANCH ;POINT TO BEGIN OF VECTOR TABLE sARE WE AUTOSIZING? ;BRANCH IF NOT. ;POINT TO BEGINING OF AUTOSIZER :DH VECTOR TABLE. ASR TST R& R4 BNE BR Mov 6% 5% R1,(R2)+ ;MOVE CONTENTS OF AUTOSIZER VECTOR ;TABLE TO TABLE USED BY PROGRAM. ;HAVE WE MOVED ALL TABLE ENTRIES? ;BRANCH IF NOT--ONE MORE TIME. ;RETURN TO INPUT ROUTINES. ;SETR UP A TABLE ENTRY CZDHM-D~-0 CZDHMD.P11 MACY11 09-MAR-78 15:32 8946 8947 8948 8949 8950 8951 8952 8953 8954 026620 026622 026626 026630 026632 026634 026636 8956 8957 8958 8959 8960 8961 8962 026640 026646 026652 026654 026656 026662 026666 026672 026700 026702 026704 026710 000005 004737 000137 026714 026722 026726 026730 026732 026736 026742 026746 026754 026756 026760 026764 012737 010637 012601 012602 113700 012706 004737 012737 104030 000005 004737 000137 8955 8963 8964 8965 8966 8967 8968 8969 8970 8971 8972 8973 8974 8975 8976 8977 8978 8979 8980 8981 8982 8983 8984 8985 8986 8987 8988 8989 8990 8991 8992 8993 8994 8995 8996 8997 8998 8999 9000 9001 30A(1052) 060001 02270¢ 001373 000402 104401 10-MAR-78 ADD 030000 104027 000340 001176 001102 001100 024462 026702 CMP 001202 001102 001100 024462 026756 027150 002734 H 16 SEQ@ 0203 SEQ 0202 3% 5% sGENERATE NEXT DH11 ADDR ;END OF TABLE ? :BR IF NOT 4%: 5%: RTS ;THESE TWO ROUTINES SERVICE UNEXPECTED BUS ERROR AND RSVD BUSER: INMSGS MOV RESERR: 001110 18: PC #340,$TMPO SP,SREG6 (SP)+,R1 (SP)+,R2 $TSTNM,RO MOV MoV MOV MOVB MOV #STACK,SP MOV #1% SLPERR JSR 1%: 001202 RO.R1 #DHVCTB+40,R2 BNE BR TYPE 001110 027150 002734 000340 001176 PAGE 205 POWER DOWN AND UP ROUTINES 035321 000207 012737 010637 012601 012602 113700 012706 004737 012737 08:05 ERROR RESET JSR JMP PC,SUER3 27 PC,CHPS1 REST1 #340,8TMPO SP,SREG6 (SP)+,R1 (SP)+,R2 $TSTNM,RO sRETURN TO INPUT ROUTINES :TELL HIM HE GOOFED sRETURN TO INPUT ROUTINES INSTR TRAPS ;SAVE THE PSW :SAVE THE SP ;GET THE TRAP PC ;GET THE TRAP PSW ;GET TEST NO. ;RESET THE STACK POINTER ;GO SET UP ERROR INFO sALWAYS COME BACK 10 1% sUNEXPECTED BUS ERROR TRAP sPREPARE TO RESTART ;GO CLEAR PSW ;GO RESTART THE PROGRAM sSAVE THE PSW :SAVE THE SP MOV MoV MoV MoV mMove MOV JSR MoV PC,SUER3 #1$ ,SLPERR 30 ;GET TEST NO. sRESET THE STACK POINTER ;GO SET UP ERROR INFO sALWAYS COME BACK TO 1% sUNEXPECTED RSVD INSTR ERROR TRAP JMP PC,CHPS1 REST1 ;GO CLEAR PSW ;GO RESTART THE PROGRAM ERROR RESET JSR #STACK,SP ;GET THE TRAP PC :GET THE TRAP PSW sPREPARE TO RESTART sTHIS ROUTINE IS CALLED WHEN A TEST NEEDS TO RESTGRE THE TRAP ;CATCHER IN THE DH11 VECTOR 026770 026774 026776 027002 027004 027006 027012 027014 013703 010313 062723 005023 010313 062723 005023 000207 027304 RESTRP: 000002 MOV MoV ADD 000002 MOV ADD CLR CLR RTS DHVCT,R3 R3,(R3) #2,(R3)+ (R3)+ R3,(R3) #2,(R3)+ (R3)+ PC ;GET VECTOR ADDRESS ;RESTORE THE TRAP CATCHER ;RETURN TO CALLING TEST ;THIS ROUTINE CALLED BY ANY TEST THAT NEEDS A TIMING WAIT LOOP ;"'TIMEA' IS INITIALIZED BY THE CALLING ROUTINE TO THE MINIMUM REQUIRED ;VALUE AND '‘TIMEB'' IS CLEARED TO 000000. IF A TIME OUT OCCURS THIS ;ROUTINE WILL MOVE THE RETURN PC AROUND THE ''LOOP'‘ BRANCH BACK IN ;THE ROUTINE THAT CALLED IT TO ALLOW REPORTING AN ERROR MESSAGE 027016 027022 005237 001005 030352 TIMEIT: INC BNE TIMEB 1% ;COUNT B :BR IF NOT ZERO CZOWM-D~0 CZDHMD.P11 9002 9003 9004 3882 027024 027030 027032 027036 "ACY11 30A(1052) v7-MAR-78 15:32 005337 001002 062716 000207 116 10-MAR-78 08:05 PAGE 206 POWER DOWN AND UP ROUTINES 030350 DEC BNE 000002 1%: 9007 027040 027046 027050 027054 027060 027062 027070 027076 027104 027110 012737 005002 012703 012704 005011 012761 012761 012761 105062 110364 9021 9022 9023 027116 027120 027124 005203 062702 062704 027134 027136 027144 027146 001352 013737 005011 000207 9025 9026 9027 3858 027114 027130 005211 005337 000020 001216 000200 000001 037312 177400 031403 036312 036312 000006 000010 000004 000002 000002 001216 027312 027560 INC ADD ADD R3 #2.,R2 #2,R4 ;UPDATE THE POINTERS AND DATA BNE MOV CLR RTS 1% LINSEL,LINACT (R1) PC (R1) $STMP6 ;GEN NEW LINE NO. IN SCR ;COUNT ONE LINE DONE ;BR TIL ALL 16 SET UP ;SET SOFTWARE FLAG FOR ALL LINES ACTIVE ;PUT SCR REG BACK TO LINE 00 :RETURN TO AUTO ECHO TEST :TO BE LSI11 COMPATIBLE 027150 027154 027160 027162 012746 012746 000002 000000 027162 CHPS1: 000207 1%: MOV MoV RTI RTS #0,-(SP) #1%,-(SP) PC :NEW PSW :NEW PC :CH2IGE PSW Rt URN TO CALLING TEST :THIS ROUTINE DOES THE SAME THING EXCEPT IT SET THE PSW 3829 ;PRIORITY TO 340 (LEVEL 7 ) TO LOCK OUT INTRS 027164 027170 027174 027176 012746 012746 000002 000207 000340 027176 CHPS2: 1$: 9047 3828 9050 9051 9052 9053 9054 9055 9056 Q057 :SET UP SIXTEEN LINES ;INIT A TABLE INDEX REG sSET UP TO GENERATE HI BYTE OF EXPECTED DATA ;SET UP INDEX REG TO ODD BYTES :START WITH LINE 00 ;SET UP BUS ADDR REG ;SET UP BYTE COUNT REG ;SET UP FOR 4800 BAUD/8 BIT CHARS :START WITH DATA CHAR OF 000 ;SET UP HIGH BYTE OF EXPECTED DATA ;THIS ROUTINE IS CALLED TO SET PSW PRIORITY TO 000 IN ORDER 9039 9042 9043 9044 3822 #20,3TMP6 R2 #200,R3 #1,R4 (R1) #TBUF ,CAR(R1) #-400,BCR(R1) #31403,LPR(R1) RBUF (R2) R3,RBUF (R4) DEC gggg ggg; SETALL: MOV CLR MOV MOV CLR 1%: MOV MoV MOV CLRB MOVB INC 9030 9031 9034 9035 9036 ;MOVE RETURN PC TO ALLOW ERROR REPORT :RETURN TO THE CALLING TEST :A BINARY COUNT TEST PATTERN ON ALL LINES 9010 9011 9012 9013 9014 9015 9016 9017 9018 9019 9024 #2.,(SP) PC ;COUNT TIME A :BR IF NO TIMEOUT ;THIS ROUTINE CALLED BY THE AUTO ECHO TEST TO SET UP FOR TRANSFERRING 3888 9020 ADD RTS TIMEA 1% SEQ 0204 SEQ 0203 027200 027202 027206 027214 027216 027224 027230 027232 005046 013746 012737 104400 016666 012716 000002 012637 000034 027216 000002 027232 000034 #340,-(SP) #1%,-(SP) PC :NEW PSW :NEW PC ;CHANGE THE PSW :RETURN TO CALLING TEST :THIS ROUTINE IS ALSO FOR LSI11 ;TO SAVE THE PSW IN ''STMPO" COMPATIBILITY AND IT IS CALLED SAPS: 2(SP),6(SP) #2%, (SP) :TEMP STORAGE TO SAVE PSW :SAVE TRAP VECTOR POINTER :GO TO 1% ON TRAP ;G0 TO IT ;GET PSW SAVED ;GO TO 2% ON RTI (SP)+,34 ;RESTORE VECTOR 000034 000006 MOV MOV RTI RTS 1$%: 2%: (LR MOV MOV TRAP MoV MOV RTI Mov -(SP) 34,-(SP) #18%,34 CZDHM-D-0 CZDHMD. P11 9058 9059 9060 9061 9062 9063 9064 9065 9066 9067 9068 9069 9070 9071 9072 9073 9074 9075 9076 9077 9078 9079 9080 9081 9082 9083 9084 9085 9086 9087 9088 9089 9090 9091 9092 9093 9094 9095 9096 9097 9098 9099 9100 9101 9102 9103 9104 9105 9106 9107 9108 9109 9110 9111 9112 9113 027236 027242 MACY11 30A(1052) 012637 000207 001202 09-MAR-78 15:32 10-MAR-78 08:05 J 16 PAGE 207 SEQ 0205 SEQ 0204 POWER DOWN AND UP ROUTINES MoV RTS (SP)+,$THPO PC sFINALLY SAVE PSW IN $TMPO ;SUBROUTINE TO SIZE FOR AN 11/70 CENTRAL PROCESSOR : IF IT IS AN 11/70 CPU, CACHE WILL BE DISABLED 5 IF NOT AN 11/70 CPU, NO ACTION TAKEN ;CALLED BY : 027244 027250 027256 027262 027270 027272 027274 027300 013746 012737 005737 012737 000401 022626 012637 000207 000004 027272 177746 000014 000004 000004 177746 ;:4¢D JSR PC,DCACHE NO ARGUEMENTS PASSED DCACHE: MOV MoV TST MoV BR 1$: CMP 2%: MoV ans,-(SP) 18,44 aX177746 #14,30177746 2% (SP)+,(SP)+ (SP)+,a# ;SAVE TRAP INFO ;SETUP FOR TIMEOUT sTEST FOR CACHE ;DISABLE CACHE JEXIT, CACHE DISABLED ;CLEAN UP STACK S R RN R R R AR NN RN RN RTS PC R R R AR R R R sRETURN sADDITIONAL PROGRAM CONSTANTS AND VARIABLES R R 000002 000004 000006 000010 000012 000014 000016 R R R R AR AR R AR RN AR RN R RN RN AA AR RN AN NRC=2 LPR=4 CAR=6 BCR=10 BAR=12 BKR=14 SSR=16 s INDEX s INDEX : INDEX s INDEX : INDEX s INDEX ; INDEX ;HOLDS THE ''SCR'* ADDRESS OF THE DH11 UNDER TEST ;HOLDS THE 1ST VECTOR ADDRESS OF THE DH11 UNDER TEST ;BIT TST MARKER FOR SELECTING DH11'S ;SPECIFIES DH11'S SELECTED FOR TEST ;SPECIFIES LINES TO TEST sMARKER USED TO TEST FOR LINES TO TEST sALTERNATE MARKER TO SUPPORT THE 027302 027304 027306 027310 027312 027314 027316 000000 000000 000000 000003 177777 000000 000000 DHADR: DHVCT: SELMSK: DHSEL: LINSEL: LINMSK: LMSK1: 0 0 0 3 177777 0 0 027320 000004 MSTCLR: .BLKW 027330 027332 027334 027336 177777 125252 PATRNA: 052525 000000 177777 125252 027340 027342 027344 027346 027350 027352 027354 000060 000300 000020 000100 000040 000200 000000 PATRNB: R R R R RN & CONST. TO ACCESS NEXT RCVD CHAR REG CONST. TO ACCESS LINE PARAMETER REG. CONST. TO ACCESS CURRENT ADDRESS REG. CONST. TO ACCESS BYTE COUNT REG. CONST. TO ACCESS BUFFER ACTIVE REG. CONST. TO ACCESS BREAK CONTROL REG. CONST. TO ACCESS SILO STATUS REG. sSELECT LINES FEATURE ;:FOUR WORD ADDRESS TABLE USED BY THE ;CHECKS OPERATION OF "'MASTER CLR" TEST THAT ;BIT PATTERNS USED WITH "'CAR'' AND "'BCR'' TESTS 052525 000000 :TABLE TERMINATOR ggo ;BIT PATTERNS USED IN ''CAR'' MEM EXT BIT TEST 20 100 40 200 0 ;TABLE TERMINATOR CZDHM-D-0 CZDHMD . P11 9114 9115 9116 9117 9118 9119 9120 9121 9122 9123 9124 9125 9126 9127 9128 9129 9130 9131 9132 9133 9134 9135 9136 9137 9138 9139 9140 9141 9142 9143 9144 9145 9146 9147 9148 9149 9150 9151 9152 9153 9154 9155 9156 9157 9158 9159 9160 9161 9162 9163 9164 9165 9166 9167 9168 9169 027356 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 208 K 16 SEQ 0206 SEQ 0205 POWER DOWN AND UP ROUTINES 000000 0 ;TABLE TERMINATOR sTHIS TABLE STORES THE BYTE COUNT AND LINE PARAMETERS FOR THE :8 SUBTESTS IN THE MULTILINE PARITY/DATA TEST 027360 027362 027364 027366 027370 027372 027374 027376 027400 027402 027404 027406 027410 027412 027414 027416 177400 027363 177400 027323 PRTYTB: ;256 CHARS ;2400 BAUD ;256 CHARS ;2400 BAUD = ;128 CHARS ;2400 BAUD ;128 CHARS ;2400 BAUD ;64 CHARS ;2400 BAUD ;64 CHARS ;2400 BAUD ;32 CHARS ;2400 BAUD :32 CHARS ;2400 BAUD =400 27363 =400 27323 =200 177600 027362 177600 27362 =200 177700 -100 177700 027321 177740 =100 177740 =40 27320 027322 27322 027361 27361 27321 =49 027360 27360 027320 0DD PARITY - 8 BITS EVEN PARITY - 8 BITS 0DD PARITY - 7 BITS EVEN PARITY - 7 BITS ODD PARITY = 6 BITS EVEN PARITY - 6 BITS ODD PARITY - 5 BITS EVEN PARITY - 5 BITS ;THIS 16 WORD TABLE CONTAINS THE TEST DATA USED BY THE AUTO ECHO sTEST (ALL 1'S DATA TABLE) 027420 027422 027424 027426 027430 027432 027434 027436 027440 027442 027444 027446 027450 027452 027454 027456 100377 100777 101377 101777 102377 102777 103377 103777 AETAB: 100377 100777 101377 ;TEST DATA FOR LINE 00 :TEST DATA FOR LINE 01 101777 102377 102777 103377 103777 104377 104777 105377 105777 106377 106777 107377 107777 104377 104777 105377 105777 106377 106777 107377 107777 sTEST DATA FOR LINE 17 ;THIS 16 WORD TABLE CONTAINS THE TEST DATA USED BY THE AUTO ECHO ;TEST (ALL 0'S DATA TABLE) 027460 027462 027464 027466 027470 027472 027474 027476 027500 027502 027504 100000 100400 101000 101400 102000 102400 103000 103400 104000 104400 105000 AETABO: 100000 100400 101000 101400 102000 102400 103000 103400 104000 104400 105000 ;TEST DATA FOR LINE 00 ;TEST DATA FOR LINE 01 (ZDHM-D-0 CZDHMD.P11 9170 9N 9172 9173 9174 9175 9176 9177 9178 9179 9180 9181 9182 9183 9184 9185 9186 9187 9188 9189 9190 9191 9192 9193 9194 9195 9196 9197 9198 027506 027510 027512 027514 027516 MACY11 30A(1052) 09-MAR-78 15:32 9223 9224 9225 105400 106000 106400 107000 107400 105400 106000 106400 107000 107400 SEQ 0207 SEQ 0206 ;TEST DATA FOR LINE 17 ;THIS TABLE USED BY THE AUTO ECHO TEST 2 TO RESET ACTIVE BIT WHEN A ;LINE IS DONE 027520 027522 027524 027526 027530 027532 027534 027536 027540 027542 027544 027546 027550 027552 027554 027556 000020 000040 000100 000200 000400 001000 002000 004000 010000 020000 040000 100000 027560 000000 000001 000002 000004 000010 9199 9200 9201 9202 9203 9204 9205 9206 9207 9208 9209 9210 9211 9212 9213 9214 9215 9216 9217 9218 9219 9220 9221 9222 L 16 10-MAR-78 08:05 PAGE 209 POWER DOWN AND UP ROUTINES LiNBIT: BITOO0 BITO1 BIT02 BITO03 BITO04 BITOS BITO6 BITO7 BITO8 BITO9 BIT10 ;DEACTIVATE LINE 00 ;DEACTIVATE LINE 01 BITI BIT12 BIT13 BIT14 BIT15 sDEACTIVATE LINE 17 sMAINTAINS STATUS OF ACTIVE LINES ;DURING AUTO ECHO TEST 2 LINACT: 0 sTHIS TABLE CONTAINS 16. COUNTERS USED BYN THE MULTI-LINE sPARITY TEST TO KEEP TRACK OF TOTAL CHARS RECEIVED 027562 000020 MULPTB: .BLKW 16. ;SIXTEEN WORD COUNTERS TABLE ;THIS 16 WORD TABLE CONTAINS THE TEST DATA USED BY THE BREAK BIT ;TEST 027622 027624 027626 027630 120000 ;TEST DATA FOR LINE 00 :TEST DATA FOR LINE 01 027642 027644 027646 027650 027652 027654 027656 027660 121400 122000 122400 123000 123400 124000 124400 125000 125400 126000 126400 127000 127400 BRKTAB: 120000 120400 121000 121400 122000 122400 123000 123400 124000 124400 125000 125400 126000 126400 127000 127400 ;TEST DATA FOR LINE 17 027662 131177 RGMSK1: ;MASK TO SPECIFY R/W BITS FOR NORMAL ''SCR'' REG TEST 027632 027634 027636 027640 120400 121000 131177 CZDHM-D-0 CZDHMD.P11 9226 9227 9228 9229 9230 9231 9232 9233 9234 9235 9236 9237 9238 9239 9240 9241 9242 9243 9244 9245 9246 9247 9248 9249 9250 9251 9252 9253 9254 9255 9256 9257 9258 9259 9260 9261 9262 9263 9264 9265 9266 9267 9268 9269 9270 9271 9272 9273 9274 9275 9276 9277 9278 9279 9280 9281 027664 027666 027670 027672 027674 027676 MACY11 30A(1052) 09-MAR-78 15:32 046600 177767 177777 100077 042200 030100 10-MAR-78 08:05 PAGE 210 M 16 SEQ 0208 POWER DOWN AND UP ROUTINES RGMSK2: 46600 RGMSK3: 177767 RGMSK4: RGMSKS: RGMSK6: INTMSK: 177777 100077 42200 30100 SEQ 0207 sMASK TO SPECIFY READ ONLY BITS IN "'SCR'" FOR NORMAL MODE TEST :MASK TO SPECIFY R/W BITS IN "LPR" ;MASK ;MASK ;MASK ;MASK TO SPECIFY R/W BITS IN "BKR" TO SPECIFY R/W BITS IN "'SSR"' TO SPECIFY READ ONLY BITS IN ''SCR'" FOR MAINT. MODE TEST USED TO SELECT INTR BITS TO TEST ;DH11 ADDRESS TABLE - THIS TABLE CONTAINS THE ''SCR'' ADDRESS FOR UP TC ;SIXTEEN DH11'S 027700 027702 027704 027706 027710 027712 027714 027716 027720 027722 027724 027726 027730 027732 027734 027736 160020 160040 160060 160100 160120 160140 160160 160200 160220 160240 160260 160300 160320 160340 160360 160400 DHADTB: 160020 160040 160060 160100 160120 160140 160160 160200 160220 160240 160260 160300 ;ADDRESS OF FIRST DH11 ;ADDRESS OF SECOND DH11 160320 160340 160360 160400 ;ADDRESS OF THE LAST DH11 ;DH11 VECTOR TABLE - THIS TABLE CONTAINS THE VECTOR ADDRESSES FOR UP :TO SIXTEEN DH11'S 027740 027742 027744 027746 027750 027752 027754 DHVCTB: 027756 027760 027762 027764 027766 027770 027772 027774 027776 000330 000350 000370 000410 000430 000450 000470 000510 000530 000550 000570 000610 000630 000650 000670 000710 030000 000000 VCFLG: 330 g;g ;ADDRESS OF VECTOR FOR FIRST DH11 :ADDRESS OF VECTOR FOR SECOND DH11 410 430 450 470 510 530 550 570 610 630 650 670 710 ;ADDRESS OF VECTOR FOR LAST DH11 0 ;VECTOR SET UP FLAGG :BR PRIORITY LEVEL TABLE - THIS TABLE CONTAINS THE PRIORITY LEVELS ;FOR UP TO SIXTEEN DH11'S - THE RCVR LEVEL IS STORED IN THE LOW BYTE sAND THE XMTTR LEVEL IN THE HIGH BYTE 030002 030004 120240 120240 BRLVL: 120240 120240 ;BRLEVELS FOR FIRST DH11 ;:BR LEVELS FOR SECOND DH11 9301 9302 9303 9304 9305 9306 9307 9308 9309 9310 9311 9312 9313 9314 9315 9316 9317 9318 9319 9320 9321 9322 9323 9324 9325 9326 9327 9328 9329 9330 9331 9332 9333 9334 9335 9336 9337 030006 030010 030012 030014 030016 030020 030022 030024 030026 030030 030032 030034 030036 030040 030042 030042 030044 030046 030050 030052 030054 030056 030060 030062 030064 030066 030070 030072 030074 030076 030100 030102 10-MAR-78 08:05 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 ;BR LEVELS FOR LAST DH11 ;THIS DH ADDRESS TABLE IS FILLED BY THE AUTOSIZER. 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 PAGE 211 POWER DOWW AND UP ROUTINES : DHADRS .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD ;THIS DH VECTOR TABLE IS FILLED BY THE AUTOSIZER. 030104 030104 030106 030110 030112 030114 030116 030120 030122 030124 030126 030130 030132 030134 030136 030140 030142 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 DHVEC: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD :WORD .WORD .WORD .WORD .WORD .WORD .WORD [=lelelelelelelelelele]lele]lole]-) 9282 9283 9284 9285 9286 9287 9288 9289 9290 9291 9292 9293 9294 9295 9296 9297 9298 9299 9300 MACY11 30A(1052) 09-MAR-78 15:32 [=lefelelelelelelelelelelelelele]-] CZDHM-D-0 CZDHMD.P11 SEQ 0209 SEQ 0208 CZDHM-D-0 CZDHMD P11 08:05 PAGE 212 POWER DOWN AND UP ROUTINES 030144 030144 030146 030150 030152 030154 030156 030160 030162 030164 030166 030170 030172 030174 030176 030200 030202 030204 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 DMADRS: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD [=lelelelolololelelelelelelelele]e] ;THIS DM ADDRESS TABLE IS FILLED BY THE AUTOSIZER. 030206 030206 030210 030212 030214 030216 030220 030222 030224 030226 030230 030232 030234 030236 030240 030242 030244 030246 030246 030250 030252 030254 030256 030260 030262 030264 030266 030270 030272 030274 030276 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000001 000002 000004 000010 000020 000040 000100 000200 000400 001000 002000 004000 010000 DMVEC: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD SLNSEL: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD [=lelelelelelelelelolelelele]o -] ;THIS DM VECTOR TABLE IS FILLED BY THE AUTOSIZER. — 9342 9343 9344 9345 9346 9347 9348 9349 9350 9351 9352 9353 9354 9355 9356 9357 9358 9359 9360 9361 9362 9363 9364 9365 9366 9367 9368 9369 9370 9371 9372 9373 9374 9375 9376 9377 9378 9379 9380 9381 9382 9383 9384 9385 9386 9387 9388 9389 9390 9391 9392 9393 10-%AR-78 N — S oo 9338 9339 9340 9341 MACY11 30A(1052) 09-MAR-78 15:32 100 200 400 1000 2000 4000 10000 SEQ 0210 SEQ 0209 CZDHM-D-0 CZDHMD .P11 9394 9395 9396 9397 9398 9399 9400 9401 9402 9403 9404 9405 9406 9407 9408 9409 9410 9411 9412 9413 9414 9415 9416 9417 9418 9419 9420 9421 9422 9423 9424 9425 9426 9427 9428 9429 9430 9431 9432 9433 9434 9435 9436 9437 9438 MACY11 30A(1052) 09-MAR-78 15:32 D 10-MAR-78 08:05 PAGE 213 POWER DOWN AND UP ROUTINES 030300 030302 030304 020000 040000 100000 .WORD .WORD .WORD 20000 40000 100000 030306 030310 030312 030314 030316 030317 030320 030322 030324 000000 000000 000000 000000 000 000 000000 000000 000000 ADRVEC: DHMCSR: DHMLSR: SDHSEL: DHRLVL: DHTLVL: DHNUM: LINE: LINEA: 0 0 0 0 .BYTE .BYTE 0 O 0 030326 030330 030332 000000 000000 000000 ADPTR: VCPTR: BRPTR: 0 0 0 000400 000001 000002 000004 000010 000020 000040 000100 000200 002000 STEP=400 L INENA=1 030334 030336 030340 030342 030344 030346 030350 030352 030354 030356 000000 000037 000077 000177 000377 000000 000000 000000 000000 000000 0 0 SEQ 0211 SEQ 0210 ;ADDRESSES BETWEEN VECTORS - FILLED BY THE AUTOSIZER ;MODEM CONTROL CONTROL AND STATUS REGISTER. ;MODEM CONTROL LINE STATUS REGISTER. ;DEVICE SELECY PARAMETER = FILLLED BY THE AUTOSIZER. :BR LEVEL FOR RCVR ;BR LEVEL FOR XMITTER ;CONTAINS NUMBER OF THE DH11 UNDER TEST ;CONTINES NUMBER OF THE LINE UNDER TEST ;LOCATION TO SAVE LINE NUMBER ;ADDRESS POINTERS TO SET UP TABLES WHEN INPUTTING PARAMETERS ;POINTS TO ADDRESS TABLE ;POINTS TO VECTOR TABLE ;POINTS TO BR LEVEL TABLE ;THE FOLLOWING TEN CONSTANTS ARE USED BY THE MODEM CONTROL PORTION OF THIS PROGRAM. TRMRDY=2 RS=4 SECTX=10 SECRX=20 €S=40 €0=100 RING=200 CLRMUX=2000 TDATAY: TDATA2: 0 37 77 177 377 TITFLG: 0 TIMEA: 0 TIMEB: 0 TIMEC: O TNULL: 0 ;DATA BUFFER FOR BASIC DATA TEST ;TEST DATA FOR FIVE BIT CHAR ;TEST DATA FOR SIX BIT CHAR ;:TEST DATA FOR SEVEN BIT CHAR :TEST DATA FOR EIGHT BIT CHAR ;FLAG TO ALLOW PRINTING TITLE ONLY ONCE :GENERAL PURPOSE TIMERS ;TIMER FOR TIMING TESTS ;CONTAINS TWO NULL CHARS USED BY BREAK TEST CZDHM-D-0 CZDHMD P11 9439 9440 9441 9442 9443 9444 9445 9446 9447 9448 9449 9450 9451 9452 9453 9454 9455 9456 9457 9458 9459 9460 9461 9462 9463 9464 9465 9466 9467 9468 9469 9470 9471 9472 9473 9474 9475 9476 9477 9478 9479 9480 9481 9432 9483 9484 9485 9486 9487 9488 9489 9490 9491 9492 9493 9494 MACY11 30A(1052) 09-MAR-78 15:32 SEQ 0212 SEQ 0211 10-MAR-78 08:05 PAGE 214 POWER DOWN AND UP ROUTINES AR RARRRRERAEARA R R RR R R RARRR R RETRTR AR R RRETRTRRTRAITRTRRT R R R AR AR :ERROR MESSAGE INFORMATION - MESSAGE BUFFERS AND POINTERS ;:ttttt'tt'i'ttttttt't"itittt"i't"""'itttttt'ttti"ttt!t'tt' ;INFORMATION FOR MESSAGE 1 030360 030366 030374 030402 030410 030416 030424 030427 030434 030442 030450 030456 030464 030472 030500 044104 043505 020122 042522 040503 052040 052125 040 020040 024523 051450 020040 020040 042101 043505 030461 051511 042522 041516 051525 046511 000 050050 020040 020040 024520 042524 042040 020122 042101 051040 042524 042506 020105 042105 047505 EMi: .ASCIZ 'DH11 REGISTER REFERENCE CAUSED TIMEOUT' 024503 050050 020040 020040 052123 053105 051040 000122 DH1: LASCIZ ' 030506 030514 030522 001116 001162 000000 001202 001164 001176 001166 DT1: .WORD SERRPC,$TMPO,S$REG6,SREGO,SREGT,$REG2.0 .EVEN (PO) (PS) (SP) TEST DEVADR REGADR' ;INFORMATION FOR MESSAGE 2 030524 030532 030540 030546 030554 030562 030570 030576 030604 030612 030620 030626 030634 030642 030650 030656 030660 030666 030674 054523 041440 046117 051511 051105 024040 020040 020051 050123 052040 020040 051104 040507 053440 020040 000 030660 001116 001162 001170 052123 047117 051040 042524 047522 041520 024040 020040 020051 051505 042504 020040 051104 051501 051440 046505 051124 043505 020122 000122 020051 051520 024040 020040 020124 040526 042522 020040 020040 041057 EM2: .ASCIZ 'SYSTEM CONTROL REGISTER ERROR' DH2: LASCIZ ' 001202 001164 001172 001176 001166 DT2: .WORD S$ERRPC,$TMPO,$REG6,$REGO,SREG1,SREG2,SREG3, $REG4 .0 .EVEN (PC) (PS) (SP) TEST DEVADR REGADR 000000 : INFORMATION FOR MESSAGE 3 030702 030710 030716 030724 030732 044104 051501 046103 040506 052040 030461 042524 040505 046111 020117 046440 020122 020122 042105 046103 EM3: LASCIZ 'DH11 MASTER CLEAR FAILED TO CLR SPECIFIED REG' WAS S/B' CZDHM-D-0 CZDHMD.P11 9495 9496 9497 9498 9499 9500 9501 9502 9503 9504 9505 9506 9507 9508 9509 9510 9511 9512 9513 9514 9515 9516 9517 9518 9519 9520 9521 9522 9523 9524 9525 9526 9527 9528 9529 9530 9531 9532 9533 9534 9535 9536 9537 9538 9539 9540 9541 9542 9543 9544 9545 9546 9547 9548 9549 9550 030740 030746 030754 MACY11 30A(1052) 09-MAR-78 15:32 020122 043111 042522 050123 042511 000107 10-MAR-78 08:05 PAGE 215 ¥ 1 POWER DOWN AND UP ROUTINES 041505 020104 ; INFORMATION FOR MESSAGE 4 030760 030766 030774 031002 031010 044514 051101 051105 051511 051105 042516 046501 051040 042524 047522 050040 052105 043505 020122 000122 EM4: .ASCIZ ‘'LINE PARAMETER REGISTER ERROR' ; INFORMATION FOR MESSAGE 5 031016 031024 031032 031040 031046 051102 047503 020114 052123 051122 040505 052116 042522 051105 051117 020113 047522 EMS: .ASCIZ 'BREAK CONTROL REGISTER ERROR' 044507 042440 000 :INFORMATION FOR MESSAGE 6 031053 031060 031066 031074 031102 123 052123 051040 042524 047522 046111 052101 043505 020122 000122 020117 051525 051511 051105 EM6: .ASCIZ 'SILO STATUS REGISTER ERROR' ; INFORMATION FOR MESSAGE 7 031106 031114 031122 031130 031136 031144 031152 052503 020124 051505 044507 042440 026440 020105 051122 042101 020123 052123 051122 046040 054043 047105 051104 042522 051105 051117 047111 000130 EM7: .ASCIZ 'CURRENT ADDRESS REGISTER ERROR - LINE #XX' ; INFORMATION FOR MESSAGE 10 031160 031166 031174 031202 031210 031216 031224 054502 052517 051040 042524 047522 044514 054130 042524 052116 043505 020122 020122 042516 ooc 041440 051105 051511 051105 020055 021440 EM10: .ASCIZ 'BYTE COUNTER REGISTER ERROR - LINE #XxX' ; INFORMATION FOR MESSAGE 11 031227 031234 031242 031250 031256 031264 125 041505 044104 053103 042524 000124 042516 042524 030461 020122 051122 050130 020104 051040 047111 050125 EM11: .ASCIZ 'UNEXPECTED DH11 RCVR INTERRUPT' SEQ 0213 SEQ 0212 - (ZDHM-D-0 CZDHMD.P11 9551 9552 9553 9554 9555 9556 9557 9558 9559 9560 9561 9562 9563 9564 9565 9566 9567 9568 9569 9570 9571 9572 9573 9574 9575 9576 9577 9578 9579 9580 9581 9582 9583 9584 9585 9586 9587 9588 9589 9590 9591 9592 9593 9594 9595 9596 9597 9598 9599 9600 9601 9602 9603 9604 9605 9606 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 216 a SEQ 0214 SEQ 0213 POWER DOWN AND UP ROUTINES ; INFORMATION FOR MESSAGE 12 031266 031274 031302 031310 031316 031324 047125 052103 030510 052111 052116 052120 054105 042105 020061 051124 051105 000 042520 042040 046530 044440 052522 EM12: .ASCIZ 'UNEXPECTED DH11 XMITTR INTERRUPT' ;INFORMATION FOR MESSAGE 13 031327 031334 031342 031350 031356 031364 031372 031400 031406 103 053101 046102 046111 020117 040522 053103 042524 000124 040510 044501 020105 042105 042507 042524 020122 051122 020122 040514 040506 052040 042516 051040 047111 050125 EM13: .ASCIZ 'CHAR AVAILABLE FAILED TO GENERATE RCVR INTERRUPT' ; INFORMATION FOR MESSAGE 14 031410 031416 031424 031432 031440 031446 031454 051124 052111 050116 044507 047522 044514 020040 047101 042524 020122 020103 020122 042516 000 046523 020122 047514 051105 020055 021440 EM14: .ASCIZ 'TRANSMITTER NPR LOGIC ERROR - LINE # ;INFORMATION FOR MESSAGE 15 031457 031464 031472 031500 031506 031514 031522 130 020122 042105 047111 050125 044514 020040 044515 040506 052040 042524 020124 042516 000 052124 046111 020117 051122 020055 021440 EM15: LASCIZ ‘'XMITTR FAILED TO INTERRUPT - LINE # ;INFORMATION FOR MESSAGE 16 031525 031532 031540 031546 031554 122 040506 052040 042524 000124 053103 046111 020117 051122 020122 042105 047111 050125 EM16: .ASCIZ '"RCVR FAILED TO INTERRUPT' ; INFORMATION FOR MESSAGE 17 031556 031564 031572 031600 051124 052111 044524 042440 047101 042524 044515 051122 046523 020122 043516 051117 EM17: .ASCIZ 'TRANSMITTER TIMING ERROR - LINE # ' (ZDHM-D-0 CZDHMD.P11 9607 9608 9609 031606 031614 031622 9610 9611 9612 9613 9614 9615 9616 9617 9618 9619 9620 gg%} 031630 031636 031644 031652 031660 031666 031674 031702 031710 031716 9623 9624 9625 9626 9627 9628 9629 031720 031726 031734 031742 031750 031756 9632 9633 9634 9635 9636 9637 9638 9639 031761 031766 031774 032002 032010 032016 032024 9642 9643 9644 9645 9646 9647 9648 gggg 032025 032032 032040 032046 032054 032062 032070 032076 MACY11 30A(1052) 09-MAR-78 15:32 026440 020105 046040 020043 020040 020051 050123 052040 020040 051104 042505 044524 020040 000103 024040 020040 020051 051505 042504 020040 020104 042515 044524 024040 041520 H 10-MAR-78 08:05 PAGE 217 POWER DOWN AND UP ROUTINES 047111 000040 020051 051520 024040 020040 020124 040526 050123 020040 020102 042515 DH6: LASCIZ ' (PO) (PS) SEQ 0215 SEQ 0214 (SP) TEST DEVADR SPEED TIMEB TIMEC' WAS S/B' :INFORMATION FOR MESSAGE 20 042522 051105 047111 047522 044514 020040 042503 052040 020107 020122 042516 000 053111 046511 051105 020055 021440 ggg? EM20: .ASCIZ : 'RECEIVER TIMING ERROR - LINE # ' ;INFORMATION FOR MESSAGE 21 122 040506 052040 042524 020124 042516 000 053103 046111 020117 051122 020055 021440 020122 042105 047111 050125 044514 020040 322? EM21: .ASCIZ °'RCVR FAILED TO INTERRUPT - LINE # ' :INFORMATION FOR MESSAGE 22 103 053101 040506 052040 020124 046511 044514 020040 040510 044501 046111 020117 047117 020105 042516 000 020122 020114 042105 042523 052040 020055 021440 ggg; 9653 9654 9655 9656 9657 9658 9659 9660 9661 9662 1 EM22: .ASCIZ °'CHAR AVAIL FAILED TO SET ON TIME - LINE # ° ;INFORMATION FOR MESSAGE 23 032101 032106 032114 032122 032130 032136 032142 032150 032156 032164 102 042040 042524 051122 046040 020043 024040 020040 020051 050123 051507 052101 052123 051117 047111 000040 041520 024040 020040 020051 041511 020101 042440 026440 020105 EM23: .ASCIZ 'BASIC DATA TEST ERROR = LINE # ' 020051 051520 024040 020040 DH7: LASCIZ ' DEVADR (PC) (PS) (SP) TEST CHRLNG CZDHM-D~-0 CZDHMD .P11 9663 9664 9665 9666 9667 9668 9669 9670 36;} 6 9673 9674 9675 9676 9677 gg;g 032172 032200 032206 032214 032222 032230 032236 MACY11 30A(1052) 09-MAR-78 15:32 052040 020040 051104 046122 053440 020040 000 051505 042504 020040 043516 051501 051440 10-MAR-78 08:05 PAGE 218 POWER DOWN AND UP ROUTINES 041057 ; INFORMATION FOR MESSAGE 24 032237 032244 032252 032260 032266 032274 101 041505 051505 047522 044514 020040 052125 047510 020124 020122 042516 000 020117 (52040 051105 020055 021440 032277 032304 032312 032320 032326 032334 102 041040 051505 047522 044514 020040 042522 052111 020124 020122 042516 000 045501 052040 051105 020055 021440 .ASCIZ 'AUTO ECHO TEST ERROR - LINE # ' EM25: .ASCIZ 'BREAK BIT TEST ERROR - LINE # ' ;INFORMATION FOR MESSAGE 26 (032337 032344 032352 032360 032366 032374 110 052504 052040 051105 020055 021440 046101 046120 051505 047522 044514 020040 026506 054105 020124 020122 042516 000 gggg EM26: .ASCIZ 'HALF-DUPLEX TEST ERROR - LINE # ' ;INFORMATION FOR MESSAGE 27 9700 9701 9702 9703 9704 9705 9706 9707 9708 9709 9710 9711 g;}g 032401 032406 032414 032422 032430 032433 032440 032446 032454 032462 032470 032476 032504 125 041505 052502 047522 050101 040 020040 024523 051450 020040 020040 041520 9714 9715 g;}g 032512 032520 032526 001116 001162 000000 9718 EM24: :INFORMATION FOR MESSAGE 25 3288 9691 9692 9693 9694 9695 gggg SEQ 0216 SEQ 0215 020124 040526 044103 020040 020040 323? 9682 9683 9684 9685 9686 ggg; 1 I 050122 042516 042524 020123 020122 000 050050 020040 020040 024520 04252¢ 052040 020040 051520 050130 020104 051105 051124 EM27: .ASCIZ 'UNEXPECTED BUS ERROR TRAP' 024503 050050 020040 020040 052123 050122 052040 DH3: LASCIZ ' 001202 001164 001176 001166 .WORD SERRPC,$TMPO,SREG6,SREGO,SREG1,SREG2.0 000040 (PC) (PS) (SP) TEST TRPPC s .EVEN DT3: ; INFORMATION FOR MESSAGE 30 TRPPS °* CZDHM-D-0 C-ZDHMD 11 9719 9720 9721 9722 9723 9724 9725 9726 9727 9728 9729 9730 9731 9732 9733 9734 9735 9736 9737 9738 9739 9740 9741 9742 9743 9744 9745 9746 9747 9748 9749 9750 9751 9752 9753 9754 9755 9756 9757 9758 9759 9760 9761 9762 ,9763 9764 9765 9766 9767 9768 9769 9770 9771 9772 9773 9774 032530 032536 032544 032552 032560 MACY11 30A(1052) 09-MAR-78 15:32 047125 052103 053123 052123 050101 054105 042105 020104 020122 000 10-MAR-78 08:05 PAGE 219 1 J SEQ 0217 SEQ 0216 POWER DOWN AND UP ROUTINES 042520 051040 047111 051124 EM30: .ASCIZ "UNEXPECTED RSVD INSTR TRAP' : INFORMATION FOR MESSAGE 31 032563 032570 032576 032604 032612 032620 032626 032633 032640 032646 032654 032662 032670 032676 032704 032712 032720 032726 101 041505 052101 050115 051105 020055 021440 040 020040 024523 051450 020040 020040 042101 040502 020040 020040 000102 052125 047510 020101 051101 047522 044514 020040 050050 020040 020040 024520 042524 053440 020122 051104 040527 020040 020117 042040 047503 020105 020122 042516 000 024503 050050 020040 020040 052123 051501 051440 020040 020123 027523 EM31: .ASCIZ 'AUTO ECHO DATA COMPARE ERROR - LINE # DH&: .ASCIZ ol (PS) (SP) TEST WASADR ' SBADR WAS ;INFORMATION FOR MESSAGE 32 032730 032736 032744 032752 032760 032766 032772 033000 033006 033014 052501 044103 052123 047505 046040 020043 024040 020040 024507 051505 047524 020117 052040 052125 047111 000040 033020 033026 001116 000000 042440 042524 046511 026440 020105 EM32: .ASCIZ 'AUTO ECHO TEST TIMEOUT - LINE # DHS: -ASCIZ * 020040 020051 051120 052040 001202 001206 DT4: .WORD SERRPC,$TMPO,$TMP2,0 041520 046050 000124 .EVEN ) (LPRG) ' TEST’ ;INFORMATION FOR MESSAGE 33 033030 033036 033044 033052 033060 033066 040520 046040 052040 051105 020055 021440 044522 043517 051505 047522 044514 020040 054524 041511 020124 020122 042516 EM33: LASCIZ "PARITY LOGIC TEST ERROR - LINE # ' 000 ; INFORMATION FOR MESSAGE 34 033073 115 046125 044524 EM34: .ASCIZ "MULTI-LINE PARITY DATA TEST ERROR = LINE # - SUBTEST # S/B’ (ZDHM=-D=-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 220 POWER DOWN AND UP ROUTINES 9775 9776 9777 033100 033106 033114 046055 040520 042040 047111 044522 052101 020105 054524 020101 9779 9780 9781 9782 033130 033136 033144 033152 051122 046040 020043 052523 051117 047111 020040 052102 026440 020105 020055 051505 9778 g;gz 9785 9786 9787 9788 9789 9790 9791 9792 9793 9794 9795 9796 9797 9798 gzgg 033122 033160 042524 020124 052123 020043 9805 gggg : INFORMATION FOR MESSAGE 35 033166 033174 033202 033210 033216 033224 033232 033240 033246 033254 033262 033270 052515 044514 051101 040504 051505 042515 024040 020040 024507 046124 033262 001116 000000 052114 042516 052111 040524 020124 052517 041520 046050 020040 047111 026511 050040 020131 052040 044524 000124 020051 051120 041501 000 001202 001210 gggg 033272 033300 033306 033314 044103 040526 042514 047505 051101 046111 052040 052125 040440 041101 .ASCIZ 'MULTI-LINE PARITY DATA TEST TIMEOUT' DH14: JASCIT ' .EVEN DT6é: , .WORD PD) (LPRG) ACTLIN' SERRPC,STMPO,$TMP3,0 EM36: .ASCIZ "CHAR AVAILABLE TIMEOUT' 046511 000 . :INFORMATION FOR MESSAGE 37 033321 033326 033334 033342 033350 033356 104 047503 020105 020122 042516 000 052101 050115 051105 020055 021440 020101 051101 047522 044514 020040 EM37: .ASCIZ °'DATA COMPARE ERROR - LINE # ' :INFORMATION FOR MESSAGE 40 033357 033364 033372 033400 0334045 033414 102 020122 042526 042440 026440 020105 043125 041501 051040 051122 046040 020043 042506 044524 043505 051117 047111 EM4O: .ASCIZ ‘'BUFFER ACTIVE REG ERROR - LINE # 000040 333? 9828 9829 9830 EM35: :INFORMATION FOR MESSAGE 36 gg}; 9819 9820 9821 9822 9823 ‘ 000040 gggg 9810 9811 9812 9813 9814 gg}g SEQ 0218 SEQ 0217 042440 3%8} 9803 9804 1 K ;INFORMATION FOR MESSAGE 41 03342¢ 033430 033436 041522 046101 052116 051126 042523 051105 043040 044440 052522 EM41: _ASCIZ 'RCVR FALSE INTERRUPT' ' (ZDHM-D-0 CZDHMD .P11 9831 9832 9833 9834 9835 9836 9837 9838 9839 9840 9841 9842 9843 9844 9845 9846 9847 9848 9849 9850 9851 9852 9853 9854 9855 9856 9857 9858 9859 9860 9861 9862 9863 9864 9865 9866 9867 9868 9869 9870 9871 9872 9873 9874 9875 9876 9877 9878 9879 9880 9881 9882 9883 9884 9885 9886 033444 MACY11 30A(1052) 09-MAR-78 15:32 052120 10-MAR-78 08:05 SEQ 0219 SEQ 0218 PAGE 221 POWER DOWN AND UP ROUTINES 000 ;INFORMATION FOR MESSAGE 42 033447 033454 033462 046111 051105 042440 000 033470 020117 046106 051122 EM4G2: .ASC1Z 'SILO OVERFLOW ERROR' ;INFORMATION FOR MESSAGE 43 046111 051105 043040 020104 047105 020105 044440 052522 033473 033500 033506 033514 033522 033530 033536 033544 033552 020117 046106 044501 047524 051105 041522 052116 052120 EM43: .ASCIZ 'SILO OVERFLOW FAILED TO GENERATE RCVR INTERRUPT' ;INFORMATION FOR MESSAGE 44 033553 033560 033566 033574 033602 033610 033616 033624 033632 116 020130 054522 042514 043440 052101 052111 052116 052120 047117 042515 043040 020104 047105 020105 051124 051105 000 042440 047515 044501 047524 051105 046530 044440 052522 EM&44: .ASCIZ 'NON EX MEMORY FAILED TO GENERATE XMITTR INTERRUPT' ; INFORMATION FOR MESSAGE 45 033635 033642 033650 033656 033664 033672 033700 033706 130 047504 044501 047524 051105 046530 044440 052522 044515 042516 042514 043440 052101 052111 052116 052120 020124 043040 020104 EM4S: .ASCIZ 'XMIT DONE FAILED TO GENERATE XMITTR INTERRUPT' 047105 020105 051124 051105 000 ;INFORMATION FOR MESSAGE 46 033713 033720 033726 033734 033742 033750 033756 033764 033772 034000 103 052116 042522 046505 040520 051516 020124 020122 042516 000 051125 040440 051523 051117 052124 052040 051105 020055 021440 042522 042104 046440 020131 051105 051505 047522 044514 020040 EM46: .ASCIZ 'CURRENT ADDRESS MEMORY PATTERNS TEST ERROR - LINE # MACY11 30A(1052) 034006 034014 034022 034030 034036 034044 034052 034060 034066 034074 040 020040 053505 052101 020040 020040 042101 043505 020040 020040 000102 050050 046040 020122 051124 042524 042040 020122 042101 034076 034104 034112 001116 001162 001170 CZOHM-D-0 CZDHMD. P11 9887 9888 9889 9890 9891 9892 9893 9894 9895 9896 9897 9898 9899 9900 9901 9902 9903 9904 9905 9906 9907 9908 9909 9910 9911 9912 9913 9914 9915 9916 9917 9918 9919 9920 9921 9922 9923 9924 9925 9926 9927 9928 9929 9930 9931 9932 9933 9934 9935 9936 9937 9938 9939 9940 9941 9942 034001 09-MAR-78 15:32 mn 10-MAR-78 08:05 PAGE 222 POWER DOWN AND UP ROUTINES 024503 047111 DH10: 040527 020040 050040 020116 052123 053105 051040 020122 020123 027523 001202 001164 001172 001204 001166 000000 DT5: .EVEN (PC) LINEWR SEQ 0220 SEQ 0219 .ASCIZ ' PATTRN TEST DEVADR REGADR WAS .WORD SERRPC,$TMPO,$TMP1,SREGO,SREG1,SREG2,SREG3,$REGL,0 S/B' ;INFORMATION FOR MESSAGE 47 034120 034126 034134 034142 034150 034156 034164 034172 034200 054502 034201 124 044524 020124 047111 020122 062040 020055 021440 034206 034214 034222 034230 034236 034244 034252 052517 046505 040520 051516 020124 020122 042516 000 042524 052116 051117 052124 052040 051105 020055 021440 041440 046440 020131 051105 051505 047522 044514 020040 EM4T: .ASCIZ °'BYTE COUNT MEMORY PATTERNS TEST ERROR - LINE # ' ;INFORMATION FOR MESSAGE 50 051505 042515 040527 020107 046530 047117 044514 020040 020124 052517 052111 047506 05211 020105 042516 000 EM50: LASCIZ 'TEST TIMEOUT WAITING FOR XMIT DONE - LINE # ° + ;INFORMATION FOR MESSAGE 51 034257 034264 034272 034300 034306 034314 034322 034330 034336 034344 034352 034360 034366 034374 034402 116 043517 051505 051105 024040 020040 052103 041516 052040 020040 051104 040507 053440 020040 000 051120 041511 020124 047522 041520 044514 020040 045510 051505 042504 020040 051104 051501 051440 046040 052040 020062 000122 020051 040516 044514 020040 020124 040526 042522 020040 020040 041057 EM51: .ASCIZ °NPR LOGIC TEST 2 ERROR' DH11: LASCIZ ' (PC) LINACT LINCHK TEST DEVADR REGADR WAS S/B’ CZ0HM=-D=~0 P11 C204.mD 9943 9944 9945 9946 9947 9948 9949 9950 9951 9952 9953 9954 9955 9956 9957 9958 9959 9960 9961 9962 9963 9964 9965 9966 9967 9968 9969 9970 9971 9972 9973 9974 9975 9976 9977 9978 9979 9980 9981 9982 9983 9984 9985 9986 9987 9988 9989 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 223 1 N SEQ 0221 SEQ 0220 POWER DOWN AND UP ROUTINES ;INFORMATION FOR MESSAGE 52 034403 034410 034416 034424 034432 102 062040 047503 020105 000122 051501 052101 050115 051105 041511 020101 051101 EMS2: LASCIZ 'BASIC DATA COMPARE ERROR' 047522 ;INFORMATION FOR MESSAGE 53 034434 034442 034450 034456 034464 034472 034500 034506 034514 034522 034530 024040 020040 020104 050123 052040 020040 051104 040507 053440 020040 000 041520 050123 020040 020051 051505 042504 020040 051104 051501 051440 020051 042505 024040 DH12: LASCIZ * (PC) SPEED (SP) TEST DEVADR REGADR WAS S/B' (SP) TEST DEVADR CHRLNG SCRWAS SCRS/B’ 020040 020124 040526 042522 020040 020040 041057 ;INFORMATION FOR MESSAGE 55 034531 034536 034544 034552 034560 034566 034574 034602 034610 034616 034624 040 020040 024523 051450 020040 020040 042101 031110 051440 020123 027523 050050 020040 020040 024520 042524 042040 020122 047114 051103 051440 000102 024503 050050 020040 020040 052123 053105 041440 020107 040527 051103 DH13: .ASCIZ ' LPL) (PS) ; INFORMATIOPN FOR MESSAGE 56 034630 034636 034644 034652 034660 034666 034674 053117 020116 040506 052040 020124 042516 000 051105 044502 046111 020117 020055 021440 052522 020124 042105 EM56: .ASCIZ 'OVERRUN BIT FAILED TO SET - LINE # 042523 044514 020040 ;INFORMATION FOR MESSAGE 57 034675 034702 034710 034716 034724 034732 034740 123 042507 043122 044502 046111 046040 020043 047524 047440 047514 020124 042105 04711 000040 040522 042526 020127 040500 026440 020105 EMS7: .ASCIZ 'STORAGE OVERFLOW BIT FAILED - LINE # CZDHM-D-0 CZDHMD P11 9999 10000 10001 10002 10003 10004 10005 10006 10014 10015 10016 10017 10018 10019 10020 10021 10022 10023 10024 10025 10026 10027 10028 10029 10030 10031 10032 10033 10034 10035 10036 10037 10038 10039 10040 10041 10042 10043 10044 10045 10046 10047 10048 10049 10050 10051 10052 10053 10054 10-MAR-78 08:05 B PAGE 224 2 SEQ 0222 SEQ 0221 POWER DOWN AND UP ROUTINES ;INFORMATION FOR MESSAGE 6C 034744 034752 034760 034766 034774 10007 10008 10009 10010 10011 10012 10013 MACY11 30A(1052) 09-MAR-78 15:32 035000 035006 035014 035022 035030 035036 035037 035044 035052 035060 035064 035072 035100 035106 035114 035122 035130 035136 035144 035152 035160 035166 035174 035177 035204 035212 035220 035226 035234 035242 035250 035256 035264 035272 035300 035306 035314 035321 035326 035334 035342 035350 035356 035364 035372 035375 DH15: 020040 020051 042101 046040 020040 035000 024040 042040 020122 005015 026515 042040 044504 052123 000 015 044524 030510 006440 005015 051440 042104 043040 051111 030510 005015 053040 020122 051505 020122 020124 005015 015 020105 042040 020105 052103 040520 042524 005015 044514 030461 040440 051523 054522 047111 015 046101 030510 052103 042104 026440 040440 005015 015 055103 026504 030510 043501 041511 044104 020060 020061 047516 005015 HITLE: .ASCIZ <15><12>"CZDHM-D-0 052012 043516 020061 000012 054524 051103 042522 051117 052123 006461 054524 041505 042101 020123 044506 044104 000 052012 044104 053105 051505 042040 020043 TITLEZ: .ASCIZ <15><12>'TESTING DH11 042520 040440 051523 043040 042040 000012 042520 047524 051104 047506 051522 030461 INMSG1: .ASCIZ <15><12>'TYPE INMSG2: .ASCIZ <15><12>'TYPE VECTOR ADDRESS FOR FIRST DH11'<15><12> 050131 030461 041511 042514 020116 042515 000012 040526 044104 051103 042522 052040 040507 000 053116 042040 042526 INMSG3: .ASCIZ <15><12>'TYPE DH11 : INMSGé LASCIZ <15><12>'INVALID DH11 SCR ADDRESS - TRY AGAIN'<15><12> INMSGS5: .ASCIZ <15><12>'INVALID DH11 VECTOR ADDRESS - TRY AGAIN'<15><12> INMSG6: .ASCIZ <15><12>"'TYPE LINE SELECTION PARAMETER'<15><12> 047111 000 041520 053105 020040 020105 .ASCIZ / (PC) DEVADR LINE 7 .EVEN sMISCELLANEOUS MESSAGES 042523 047511 040522 006522 047111 020104 051440 042104 026440 040440 005015 044412 042111 020061 051117 042522 052040 040507 000 052012 DH11 # DIAGNOSTIC'<15><12> '<15><12> SCR ADDRESS FOR FIRST DH11'<15><12> DEVICE SELECTION PARAMETER'<15><12> 040440 051523 054522 04711 050131 CZDHM-D-0 CZDHMD.P11 10055 10056 10057 10058 10059 10060 10061 10062 10063 10064 10065 10066 10067 10068 10069 10070 10071 10072 10073 10074 10075 10076 10077 10078 10079 10080 10081 10082 10083 10084 10085 10086 10087 10086 10089 10090 10091 10092 10093 10094 10095 10096 10097 10098 10099 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 225 ¢ 0y 2 ss‘!\gs POWER DOWN AND UP ROUTINES SEQT0222 035402 035410 035416 035424 035432 035437 035444 035452 035460 035466 035474 035502 020105 051440 044524 051101 051105 015 042522 047503 042525 051440 052040 043516 044514 046105 047117 046501 005015 042012 051523 052116 020042 040524 051505 005015 042516 041505 050040 052105 000 050105 021040 047111 047524 052122 044524 035507 035514 035522 035530 035536 035544 035552 035560 035566 035574 035602 035604 035612 035620 035626 035634 035642 035650 035656 035664 035672 035700 035701 035706 035714 035722 035730 015 020105 043117 042522 024040 024514 042527 041505 024040 020122 000012 047516 023461 042522 042116 047516 042522 051105 051105 047440 042522 000 116 042504 052116 047111 052012 047516 040440 051523 041517 041040 047105 047524 030061 030062 050131 020056 042104 051505 040524 052105 053040 051522 047440 006451 VCWC: .ASCIZ <15><12>'TYPE 042040 020123 043040 006456 042040 042503 044440 052522 041503 027104 030510 042527 052517 000012 020110 053111 052116 052120 051125 005015 MSG1: .ASCIZ /NO DH11'S WERE FOUND./<15><12> MSG2: .ASCIZ 'NO DH RECEIVER INTERRUPT OCCURRED.'<15><12> 020117 020115 047522 042524 020124 051122 000012 000040 044104 047515 047503 02011¢ 042503 006472 042012 020040 020040 046505 051124 046440 041440 047515 MSG3: .ASCIZ 'NO MODEM CONTROL INTERRUPT OCCURRED.'<15><12> SPACE: DEVMAP: .ASCIZ .ASCII <15><12>'DH11, MODEM CONTROL DEVICE Hkb:'<15><12> LASCII <15><12>'DH11 035736 035744 035750 035754 035762 035770 035776 036004 036012 036017 036024 036032 036040 036046 036054 036062 050125 052503 006456 020040 005015 020054 020115 047522 044526 050101 015 020061 030461 042117 047117 020040 046505 INMSG7: .ASCIZ <15><12>"DEPRESS ''CONTINUE'' TO START TESTING'<15><12> J / 000 047503 020114 051122 041517 042105 030461 042504 052116 042504 046440 012 030510 044104 046440 041440 046117 062117 047117 ‘o / NO. OF DH11 ADDRESSES (OCTAL) MODEM CONTdbL BETWEEN VECTORS / MODEM CONTROL' (1C OR 20)'<15><1 CZDHM-D-0 CZDHMD.P11 10111 10112 10113 036070 036074 036102 MACY11 30A(1052) 09-MAR-78 15:32 051124 005015 020040 046117 042101 053040 D 10-MAR-78 08:05 PAGE 226 POWER DOWN AND UP ROUTINES 051522 041505 10114 10115 10116 10117 036110 036116 036124 036132 020124 051104 020040 006524 020040 020123 053040 006412 040440 020040 041505 000012 10119 10120 10121 10122 036146 036154 036162 036170 020115 047522 047522 047125 047503 020114 026122 042040 052116 051105 051040 042132 10118 10123 10124 10125 10126 10127 10128 10129 10130 10131 036140 036176 036204 036212 036216 036224 036232 036240 036246 }8}%% }gggg 036252 005015 045510 047107 006503 005015 042117 047117 043040 005015 036252 000020 18}%? | 10138 10139 10140 10146 042040 051517 000012 047516 046505 051124 052517 000 042504 SEQ 0224 SEQ 0223 LASCIZ <15><12>'ADRS VECT ADRS MSG4: .ASCIZ <15><12>'MODEM CONTROL ERROR, RUN DZDHK DIAGNOSTIC'<15><12> 036312 000400 MSG5: LASCIZ <15><12>/NO MODEM CONTROL FOUND/<15><12> 040511 044524 046440 041440 046117 042116 .EVEN :SIXTEEN CHAR COUNTERS USED BY THE AUTO ECHO TEST #3 RCNT: .BLKW 16. RBUF: .BLKW 256. :256(10) BYTE TRANSMITTER OUTPUT DATA BUFFER 037312 VECT'<15><12><15><12> . :256. WORD RECEIVER INPUT BUFFER }g}:; 10143 }g}zg 047515 2 000400 .EVEN TBUF: 000001 .END .BLKB 256. CZDHM-D-0 CZDHMD.P11 000000 000000 Cow2 000000 ACPUOP= 000000 DOWO = 000000 pDW1 = 000000 DDW10= 000000 DOW11= 000000 DDW12= 000000 DOW13= 000000 DOW14= 000000 DDW15= 000000 DOW2 = 000000 DDOW3 = 000000 DOW4 = 000000 DOWS = 000000 DOW6 = 000000 DOW7 = 000000 DOW8 = 000000 DDW9 = 000000 DEVCT= 000000 DEVM = 000000 DPTR 030326 DRVEC 030306 ENV = 000000 ENVM = 000000 027420 ETAB AETABO 027460 FATAL= 000000 MADR1= 000000 MADR2= 000000 MADR3= 000000 MADR4= 000000 MAMS 1= €00000 MAMS2= 000000 MAMS3= 000000 MAMSL= 000000 ABASE ACDW1 MSGAD= 000000 MSGLG= 000000 MSGTY= 000000 MTYP1= 000000 MTYP2= 000000 MTYP3= 000000 MTYP4= 000000 PASS = 000000 PRIOR= 000000 PTCSU= 000040 PTENV= 000001 PT1S12= 000200 PTSPO= 000100 SWREG= 000000 TESTN= 000000 UNIT = 000000 USWR = 000000 UTOS. 025140 VECT1= 000000 MACY11 30A(1052) 09-1AR-78 15:32 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2938+ 2927 2437 2437 6725 6795 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 8027 7783 2896 8022 2437 2437 2437 2437 2922 2437 10-MAR-78 08:05 PAGE 228 CROSS REFERENCE TABLE =-- USER SYMBCLS 2478 2480 2481 2452 2482 2483 2492 2493 2494 2495 2496 2497 2484 2485 2486 2487 2488 2489 2490 2491 2443 2479 2945+ 8777+« 2448 2449 6832 91594 2953 7643+ 94094 6960 7002 7006 8088 8130# 93984 2440 2465 2469 2472 2475 2459 2467 2470 2473 2445 2446 2439 2460 2468 2471 2474 2442 81324 8020 81294 8090 2450 2441 2444 2451 86164 2476 81314 7007 9139# SEQ 0225 SEQ 0224 CZDHM-D-0 CZDHMD.P11 AVECT2= 000000 MACY11 30A(1052) 09-MAR-78 15:32 F 2477 8839' 6746+ 6858+ 6973+« 5388t 5876+ 5970+ 6087+« 6209+ 6326 6379 6471+ 6562+« 6632 4237 6393 4401 6468+ 4570 6740+ 5249+ 6853+ 5305 6963« 5310 7101+ 5413 7132« 5424 7257+ 5873+ 7346+ 5967+ 8569+ 6085+« 8581+« 6205+ 8596+ 8841 8852 8865 8876 8904 8934 5516 9185 5892 5987 9186 3324 3325 3336 4877 4957 5037 5115 6325 7730 5383 6586 5514 6608 5606 6639 5669 6653 5766 5894 5987 6760 5429 5440 5874+ 5968+ 6569 8966 8979 = 000012 IBCR = 000010 4081 6322+ 002156 002164 2226 28564 28544 8834 8838 000001 000002 000004 000010 000020 000040 000100 23484 23478 23464 23454 23440 23438 23428 2358 2357 2356 2355 2354 2353 2352 9179 9180 9181 9182 9183 9184 4878 BIT08 = 000400 23404 2350 BITO = 000001 B1T00 = BITO1 = BIT02 = BITO3 = BIT04 = BITO5 = BIT06 = BIT07 = 000200 5251+ 9016+« 2358¢ 23414 5282 90864 2920 2351 2925 4879 5264 7103+ 9191 5116 6091 5400 7019 4954 6203 7129 5034 6319 7247 5112 6461 7343 5247 6552 7737 5316 6579 9190 5252 6097 5515 7281 7778 6113 5609 7361 9192 6583 5613 7374 7374 5674 9194 7708 5677 9193 5762 3593« 3727 3829+ 4702+ 6470+ 7134+ 9088« 2955 7645 94114 4696 4703 6742+ 5293 6851+ 5299 6852+ 6962+ 6565 92084 9280# 2947+ 89564 4165 4313 4486 4686+ 7345+« 8568+ 8595+ 9015+« 9085# BPTVEC= 000014 BRKTAB 027622 BRLVL -~ 030002 BRPTR 030332 BUSER 026640 CAR = 000006 2365# 6084* 3311 4789 5964 6958 8886 5965 3486 6206+ 6321+ 026412 026526 8848 8859 8894x 89244 4880 4960 CHPS2 027164 4788 4876 4956 027150 CKSWR = 104407 CLCABC 024716 CLRMUX= 002000 gzgi’ 7705 5245 7440 3313 7264 7266 7348+ 5804 CHKADR CHKVCT CHPS1 7257 4874 6081 7096 7082 2940 2940% 2911 3939 000004 000010 000020 000040 000100 000200 000400 001000 000014 7253« 9189 8778 5039 3089 5871 6847 4959 5038 4958 5117 6920 = = = = = = = = = 7148 7417 23574 2338 23374 5758 6724 23364 23354 2334k 23334 6789 23564 23554 23544 2353# 2352¢ 2351 23504 23494 3080 BIT2 BIT3 BIT4 BITS BIT6 BIT7 BIT8 BIT9 BKR 7139 9187 BIT1 = 000002 BIT10 = 002000 BIT11 = 004000 010000 020000 040000 100000 7135« 7722 g;gzl = = = = g?gg 5286 BIT09 = 001000 BIT12 BIT13 BIT14 BIT15 SEQ 0226 SEQ 0225 2437 FAR BEGIN BEGINA 2 10-MAR-78 08:05 PAGE 229 CROSS REFERENCE TABLE -- USER SYMBOLS 7770 5384 7497 7793 6738 94244 6407 6469+ 6741+ 5040 5118 5253 5322 5517 5553 5036 5114 5246 5512 6556 90424 7248 85664 8392# 7097 7100+ 7131+ 7250+ (ZDHM-D-0 CZDHMD.P11 = = = = MACY11 30A(1052) 09-MAR-78 15:32 G 000100 000015 000200 000040 027244 = 177570 035754 027302 030042 027700 7509 2273# 22744 7509 2854 2280# 8781 2953+ 8618 2938 94224 8066 8037 94214 B441 2401 100984 6318 8626 8903 030312 7500« 7612+ 7425% 7559 2941% 7502+ 7615 7426% 7575« 2044+ 030310 030320 030316 027310 030317 027304 027740 030104 030427 034001 034306 034434 034531 033232 034744 030562 032433 032633 032772 031622 032142 001142 000174 030144 030206 017624 020022 020220 020410 = 177570 030506 030660 032512 033020 034076 033262 (= 000030 030360 7424r 2955+ 2948 4779 2954+ 7425 4776 7648 4873 4774 2939 8690 2520 2781 2802 2816 2830 2718 2850 2527 2632 2844 2675 2689 2696 2618 2646 24014 22200 7420 8732 7428 74914 7S47# 7602# 2279¢ 2521 8933 8771 94524 2788 99314 2823 99674 9793# 100014 2534 2639 947N 2682 2711 2725 2625 96594 28B4+ 2892 8625 8785 74320 7525 7580 7635 2400 94614 2619 2761 2626 2768 2528 2676 2697 2782 2719 2368¢ 2519 2 10-MAR-78 08:05 PAGE 230 CROSS REFERENCE TABLE =-- USER SYMBOLS SeQ 0227 SEQ 0226 8076 8076 8832 8836 90704 6377 8673 8917 7427 7505 6548 8689 92364 7435 7514+ 6846 8782 7707 8840 8528+« 8906 90914 92994 7436 7440% 7442+ Thbhw 7443+ 7446 7467 7491% 7501% 94004 5030 9404K 5108 7633 5511 6559 94024 5111 5028 5237 5106 94034 5234 S317 8783 8851 8936 93204 2562 2704 2569 2739 2576 2760 2884 7624+ 7578 2957 4870 8872« 4953 4B6B 8947 8772 7629+ 7602+ 7421 4950 90944 5033 4948 92564 8774 7519+ 93994 Th6hr 7611+ 7642r 7550 7614 7555« 7630« 7557+« 7447 T745Be 7462% 749%e 7497+ 7504 7520% 7523 7547+ 7556% 5509 5555 6557 8985 90924 2583 2767 2590 2774 2597 2795 2604 2809 2611 2837 2598 2605 2612 7560 7569+ 7574+ 7605« 7610+ 98874 99534 2541 2654 2548 2661 2555 2668 97054 2732 2746 96094 97354 2753 97554 2892+ 7752+ 7773+ 8731 93614 7469 7527 7582 7637 2883 8784 93404 2535 2542 2549 2556 2563 2683 2726 2789 9798# 2867+ 94454 97144 2747 2803 2754 9899# 2851 9760# 2633 2775 2868+ “ 7471 2640 2796 2647 2810 2655 2817 2570 2662 2824 2577 2669 2831 2584 2690 2838 2591 2705 2845 2712 94844 2733 2740 CZDHM-D-0 CZDHMD.P11 EM10 034675 031053 031106 020576 000004 026406 LA2222 INMSG1 INMSG2 INMSG3 INMSG4 INMSGS INMSG6 INMSG?7 30A(1052) 09-MAR-78 15:32 031160 031227 031266 031327 031410 031457 031525 031556 030524 031720 031761 032025 032101 032237 032277 032337 032401 030702 032530 032563 032730 033030 033073 033166 033272 033321 030760 033357 037422 033447 033473 033553 033635 033713 034120 031016 034201 034257 034403 034630 104406 000011 035064 MACY11 035130 035177035250 035321 035375 035437 2568 2575 2582 2589 2596 2603 2610 2617 2526 2624 2631 2638 2645 2653 2660 2667 2674 2533 2681 2688 2695 2703 2710 2717 2724 2731 2540 2738 2745 2752 2759 2766 2773 2780 2787 2547 2794 2801 2808 2836 2843 2554 2561 7419 23614 8887 2221 2907 22714 8844 8855 8868 8921 8951 8879 8889 PAGE 231 10-MAR-78 08:05 CROSS REFERENCE TABLE =-- USER SYMBOLS 41N 95454 95544 95634 5328 5268 95954 5918 94674 6011 96324 2822 6242 6766 7124 7271 97004 94904 97204 6896 6871 6503 6615 97874 98034 6368 95014 6389 9828# 98354 98424 9854# 98664 4346 4434 95094 2815 95274 99454 7387 6104 9517» 3969 7431 2881 8891# 8384 83904 8035 10019# 100254 100324 100394 100464 100544 100604 4244 6403 9535# 5992 6227 6345 7173 9691# 7190 9682# 7012 9728# SEQ 0228 SEQ 0227 95754 9585# 96034 96234 2829 96534 6782 7154 7286 6911 97494 97654 6618 96734 6489 96424 2912+« 3008 3009+ 3024+ 7713 7714 8388 8390 8392 8393 8394 8395 97744 98104 98194 4518 4602 98774 9905# 5606 5899 7366 99814 6124 6138 9991# 4172 7604 4715 7640# 6417 2893+ 7649 2911+ 8385 8386 8387 2882+ 8076 9916# 9525# 7716+ 7719+ (ZDHM-D-0 CZDHMD.P11 INPAR INPARA INPARC INPARX INPART INPAR3 INPARG INTMSK I0TVEC= LDBCR DTBF1 026200 026110 026146 026162 026234 026270 026326 027676 000020 024760 024330 INACT LINBIT L INE 027560 027520 030322 F MACY11 30A(1052) 09-MAR-78 15:32 2936 2929 2227 2225 8847 2935 8871 4781 23664 5385 2961 22724 6561+ 6625 3944 = 000012 4171 5244 5898 6223 6465 7098 7371 4319+ 7443 5251 7135 3940 6882 6726+ 3081 6208+ 7019+ 8675 8715 8744 2849 7430 3074 6623+ 74358 74408 74454 7450 LINEA 030324 L INENA= 000001 027314 LINMSK LINSEL 027312 LMSK1 027316 = 000004 LPR 035604 035634 035701 036140 036216 027320 027562 017632 017662 017712 017740 017752 017766 020034 020064 020106 020134 020142 020160 020232 020254 020276 020324 020332 7454 74620 74944 . 7499# 75034 7508 7512 75184 75504 75540 75584 7563 7567 | SEQ 0229 SEQ 0228 1C-MAR-78 08:05 PAGE 232 CROSS REFERENCE TABLE =-- USER SYMBOLS 88404 88174 88324 88364 88514 8858 88744 92314 2865+ 85794 84494 8070 6625+ 6917 3948 4241 5248 5917 6226 6484 7123 7386 4328 7451 5388 7253 3941+ 6972 6730+ 3338+ 6323+ 7102+ 100794 100834 100904 10118# 101264 8826 88624 2866+ 8076 6646 7020 3956 4243 5267 5966 6233 6488 7130 7438 4407+ 7501 5876 7348 3979+ 6973 6733 3402 6467+ 7133+ 3086 8606 90994 8608 7460 74534 7456 74584 7516 75114 75144 7571 75664 75694 8691+ 8692+ 8733« 8759+ 6652 91794 3960 4319 5327 5988 6241 6502 7153 7496 6857+ 6917+ 6918 6972+ 7020+ 9026+ 9196# 3968 4337 5386 5991 3976+ 4407 5401 6010 6341 4086 4425 4098 4509 5421 6103 6367 6794% 7282 8516+ 8495 7611 6471 4102 4575 5430 4110 4593 6326 4090 4491 5414 6098 6358 6781 7270 8514 4584 7572 6470 7083+ 4695+ 6776 9017+ 6561 8885+ 7087« 5250+ 6789+ 90844 6562 9026 7090 5387+ 6854 6598 90954 90974 5875+ 6868 4416 7509 5970 8517+ 4082 6997 6833+ 3582+ 6554 7252+ 92034 6320 6739 7172 7552 4491+ 7517 6087 8521+ 4083+ 7090 6837+ 3649 6745 7347« 6762 7189 7607 4500 7556 6209 8523 4121+ 8523 6840 3817+ 6757+ 8597+ 5405 6083 6344 6765 7249 7706+ 4575+ 7564 9096# 6555 8883+ 4118+ 4693 5872 4169 4706 5895 6204 6463 6910 7365 6118 6388 6850 7285 8518« 5437 6123 6402 6870 7344 8520+ 6746 7627 6857 94164 7103 7134 6733 6840 6858 5969+ 6920+ 6086+ 6964+ 6207+ 6984 94064 7619 6137 6416 6880 7360 8527+ 9405# CZDHM-D-0 CZDHMD.P11 MUX16E MACY11 30A(1052) 09-MAR-78 15:32 020350 020422 X17A X178 020444 020466 X170 76094 76134 76284 027330 RTYTB 027360 027340 = 177772 IRQVE= 000240 = = = = = = = = = = = . 020540 PATRNA 000000 000040 000100 000140 000200 000240 000300 000340 177776 177776 000024 036312 036252 = 104410 = 104411 = 104412 026714 026770 002676 7622 5530 4402 91024 6541 6545 91194 2276 2871+ 6350 2295#4 22964 22974 22984 22994 23004 2301# 23024 22754 22764 23674 6324 8599+ 6961 8247 8319 83954 2913 4811 29444 SECRX = 000020 SECTX = 000010 SELMSK SETALL 027306 027040 SEQ 0230 SEQ 0229 76244 4314 4677 22784 23724 7113 7619 7611 024544 2 7626 76214 5683 29504 23624 3157 3223 3404 3488 3574 3304 7564 7556 2949 SELINE J CROSS REFERENCE TABLE -- USER SYMBOLS 5536 6862 002734 ESVEC= 000010 027662 027664 027666 027670 027672 027674 = 000200 = 000004 002744 027200 PAGE 233 75734 020514 = 000002 08:05 76054 7618 020522 10-MAR-78 4796 5297 6219 3942 5867 7548 2942+« 6848 6988 91074 9018+« 7001+ 83934 8394# 8819 89694 4901 2952 6108 6109 6231 6349 6493 7437« 7495¢ (551« 7606+ 8707+ 8737« 2872+ 6354 9019+ 7016 8400+ 6374 10138+« 10134# 8401+ 6604 8410+ 6609 B416+ 6611 8845 8856 3669 8880 4981 5061 5139 6570 8985# 3657 3735 3813 3661 3738 3816 92274 9228# 92294 4963 5535 6411 4972 5547 6481 4096 6198 4166 6314 4238 6459 7646+ 7648 90934 7008 7179 8967 2913+ 9225# 92264 3651 3729 3807 92304 94234 7564 29534 8980 2914« 7575 7651 94184 8433 7145 94204 7619 7162 7184 4803 5308 6336 4883 5398 6383 3954 5960 4084 6079 2948 90104 2950% 7603 7630 85144 4892 5522 6397 9419# 7186 7263 7375 7278 _ 6499 6590 6610 6771 6778 B42B+x 6622+ 8429+ 6885 6890 6891 6915+ 8598+ 5043 5773 6497 5052 5782 6607 5121 5909 6756 5130 6002 6775 5262 6096 6888 5275 6116 6904 5285 6131 7005 4317 6735 4405 6842 4489 7092 4573 7245 4691 7341 5238 7432 5381 7492 7383 7357 90834 7381 8460 8472 9050# (ZDHM-D-0 CZDHMD.P11 SPACE 035750 000016 001100 002500 002640 000400 177774 024352 024412 024416 024462 024500 024636 025020 001140 000176 000001 000001 000002 000004 000010 000020 000040 000100 000200 000400 001000 000002 002000 004000 010000 020000 040000 100000 000004 000010 000020 000040 000100 000200 000400 001000 MACY11 30A(1052) 09-MAR-78 15:32 8795 3079 3739+ 4417+ 6128 22664 5323 29114 2932 7458 22774 3018 3093 3667 5624 4798 5300 6121 6908 84864 4343 2956 5897 6415 nn 6553 24004 7730 8876 22234 23304 23204 23194 23184 23174 23164 23154 23144 2313# 23124 23114 23294 2310# 2309# 2308# 23074 2306# 2305# 23284 2327# 23264 23254 23244 23234 23224 23214 10-MAR-78 08:05 PAGE 234 K 2 SEQ 0231 SEQ 0230 CROSS REFERENCE TABLE =-- USER SYMBOLS 8800 3166+ 3750+ 4423 6133 2863 5513 10097# 3176« 3805 4501+ 6134 4787 5552 29384 7514 84604 3172 3678 5696 4805 5311 6135 7009 8962 4463 3967 5916 6487 7188 85904 2861 7737 8886 2891 2330 2329 2328 2327 2326 2325 2324 2323 2322 2321 3231« 3949+ 4507+ 6921 4810 6547 3314+ 3961+ 4585+ 7107 3326+ 4091+ 4591+ €568 8961 4103+ 4676 7159 4955 8974 2951 7685 7624 8891 9415# 3181 3745 6239 4,888 5403 6224 7121 8975 4515 4109 5990 6501 7269 3236 3756 6365 4897 5525 6342 7151 3320 3824 84724 4968 5537 6386 3332 3836 4599 4170 6009 6613 7284 5425 2883+ 2885 2891+ 8934 8143 8156 7569 7778 8904 2905 7790 4875 7170 4242 6102 6616 7364 7794 3412+ 3422+ 174 5515+ 7165 4980 3496+ 4185+ 5529 9089# 5035 3344 3966 3418 4108 4180 4977 5549 6400 7187 5048 5775 6414 5441 4344 6122 6764 3506+ 3572 3659+ 3672+ 4246+ 5548 4257+ 5604 4329+ 4335+ 5060 5113 5138 5241 3427 3502 4190 4252 4262 4712 5057 5786 6486 7283 5126 5896 6500 7363 5135 5915 6612 5277 6008 7384 5265 5989 6763 84734 6779 5288 6101 6893 7385 84944 4432 6136 6780 8541# 4516 6225 6869 4600 6240 6894 4713 6343 6909 5266 6366 7010 5326 6387 7122 5404 6401 7152 2898+ 8143 2905 8180+ 2920 8408 2925 8421+ 7417 8778 7708 8841 8852 7116 4900 7268 3511 5667 3589 7722 5756 3600 7724 8865 (ZDHM-D-0 CZDHMD.P11 TBITVE= 000014 MACY11 30A(1052) 09-MAR-78 15:32 23634 TBUF TDATA1 TDATA2 TIMEA 037312 030334 030336 030350 TIMEB 030352 TIMEC TIMEIT 030354 027016 6321 6466+ 6200 5255+ 7105+ 5256+ 6645+ 5870+ 5258 TITFLG TITLE_ TITLE2 TKVEC = 030346 035000 035037 000060 2856+ 2918 2958 23704 000064 000034 000002 000014 003014 004014 004142 004272 004422 23714 23694 TNULL TPVEC = TRAPVE= TRMRDY= TRTVEC= TST1 TST10 TST11 TST12 TST13 TST14 TST15S TST16 1ST17 18712 TST20 TST21 TS122 TS123 TST24 TS125 TS126 TS127 TST3 TST30 TST31 15132 TST33 TST34 TST35 TS136 TST37 TST4 TST40 TST41 TST42 7ST43 TST44 TST45 TST46 TST47 030356 004562 004752 005142 005266 003104 005412 005620 006026 006226 006426 006666 007052 007232 003204 007412 007572 007752 010404 010732 011164 011306 011462 003314 011676 012204 012512 013022 013262 013734 014166 014732 7109 7100 7501 23644 29674 3491 3577 3654 3732 3810 3983# 41254 4167 3028# 4239 4316 4404 4490 4574 4680 48154 49054 3087 4985# 50654 51434 5324 5382 55634 56354 5708# 3161 5813# 5868 5961 6080 6199 64264 6460 6571 L ¢ 10-MAR-78 08:05 PAGE 235 CROSS REFERENCE TABLE =-- USER SYMBOLS SEQ 0232 SEQ 0231 6353 6469 94274 5390+ 7137+ 5391+ 6749+ 5904 5394 6408 6413 713 7250 7345 8449 8595 9015 101444 5878+ 7255+ 5879+ 6861+ 5921« 5882 5972+ 7350+ 5903 6211+ 94324 5973+ 7138+ 6014+ 6215 6328+ 6473+ 6630+ 6644t 6748 6860+ 6975+ 5996 7256+ 6014 7351+« 6090+ 9000+ 6212+« 94334 6329+ 6474 6631+ 6477 6634 6648 6752 6864 6980 2915 2919+ 6089+ 9002+ 5921 7106+ 5997 6093 9000# 2960 10015# 7141 100094 94264 7259 6976+ 5963+ 5976 7354 9431# 94354 2869 7509 35174 36064 3684# 3762# 38424 41974 42694 43574 44454 45294 46134 47260 3100# 53334 54514 31874 59304 60244 61454 62524 6509# 66594 2870+ 7520 94174 9434# 6332 CZDHA-D~0 CZDHMD.P11 1ST5 1ST50 TSTS1 15752 15153 TSTS54 1ST55 157156 1S157 1516 TS160 1817 TYPDS = TYPE = MACY11 09-MAR-78 15:32 3226 6793 6844 6986 003376 015304 015754 016310 017050 017264 017526 020020 020216 003564 020406 003700 104405 104401 7198# 7246 7342 7433 7493 3307 7549 3407 7674 2917 7913 8274 8795 7822 TYPOC = 104402 TYPON = 104404 TYPOS = VCFLG VCPTR VW APTHD 104403 030000 030330 035507 000214 ATYC 022574 ASTAT= SATY1 ATYS SATY4L AUTOB SBASE BDADR BDDAT cowl cow2 CHARC CKSWR CMTAG $CM1 = $CM2 = $CM3 = cmé = SCNTLG CNTLU CPUOP CRLF DBLK DOw0 oowl1 pOW10 pOW11 oOwW12 oDOW13 powlé DDW15 #ennee 022550 022556 022566 001134 001306 001122 001126 001312 001314 022544 023016 001100 000010 000020 000010 000010 023671 023664 001260 001227 022256 001316 001320 001342 001344 001346 001350 001352 001354 30A(1052) 8387# 8386# 2923 2939+ v 8818 2248 8110 8081 8079# 8025 7786 23974 24784 23924 23944 24804 2481# 8042+ 81434 23804 24124 24124 24104 24204 8154 81N 24524 24314 8806 7954 24824 24834 24924 24934 24944 24954 24964 2497# N 2 SEQ 0233 SEQ 0232 10-MAR-78 08:05 PAGE 236 CROSS REFERENCE TABLE -- USER SYMBOLS 32434 68014 69284 7014 70254 72924 73944 764764 75324 33504 75874 34334 8388# 2959 7429 8158 8348 8843 8171 8350 8854 7831 8182 8384# 8867 7833 8201 7836 8254 8878 2873 24164 24164 2874 24174 24174 2875 24184 24184 24194 24194 24204 26204 26230 24240 24254 26264 24274 24284 7814 7833 7838 7842 8041 8076 7672 7675 8800 7846 8040 8277 8805 8157 8154 8280 8811 8385# 8155 8284 8817 8788 2930+ 2946+ 8792 8837+ 2954 8797 92734 8802 80804 80824 2909+ 8151 8300 8052+ 8059 8068+ 8073# 2859 24144 24140 2867 24154 24154 24224 7988 8275 10068# 7644+ 7781 7814 8430 7842 8888 7838 8260 8715 8920 8265 8744 8950 8269 8780 8182 8274 8294 8353 8675 7849 94104 22544 8125 80834 8392 2858 264134 24134 2412 26214 82954 8269 7781 8811 7988 82944 7806 79964 CZDHA-D-0 P11 CZDH.MD V01322 001324 001326 001330 001332 001334 001336 001340 001242 001310 030314 020760 022246 020750 020716 020767 020764 001252 001253 020662 020710 001103 001115 021274 001116 001356 021460 001N 0012 001252 001356 001234 023014 001156 001155 001120 001124 020740 023066 000001 000214 024056 001104 024306 001135 001114 001230 023013 030246 001106 001110 MACY11 30A(1052) 09-MAR-78 15:32 2484 24854 24864 24LB7H 2488# 24LBY#H 24904 264912 24430 24754 8685+ 7668 7957 2235 2873 7672 7675 244LBN 24494 7641« 2873+ 23834 23894 2867 23904 25164 7780 2387# 24294 2447H 2260 24408 8079+ 2408 2407# 23914 23934 76764 8155# 2204 2255# 8341+ 23844 8400 2398# 2388#4 24320 8120« 6598 2385# 2386# 3970+ 4946 [SMADR1 001264 6313« 8963« 24654 10-MAR-78 08:05 PAGE 237 CROSS REFERENCE TABLE 8862 7677 79924 76794 76704 76874 7686# 2903 2896 7647 76674 7695 2876+ 77694 7775+ 7828 78134 7774x 2875+ N 2 SEQ 0234 SEQ 0233 -- USER SYMBOLS 8938 94014 7783 8022 76604 7671 7726 7728 8020 8027 8088 8090 8112 7728 7751« 7734+ 7756 7756 7771+ 7806 7776+ 7777 7806 7820 9461 9484 9714 9760 9798 7750+ 7797 7799 7806 8110 8076 8119+ 8127# 7742 7744+ 7755 8076 7806 8284 7817 8294 3400 4435+ 5697+ 3484+ 4519+ 5754+ 7340+ 4603+ 5866+ 7732 3570+ 3647 4716 8908 76834 7801 7806 9899 25004 8116+ 8082+ 8045 8076 8390 2205 83524 7741 8416 8183 7777+ 7806 81264 6882 2877« 2878+ 4112« 5026+ 6458+ 8976+ 84354 8300 7785 6997 2963 3020+ 4181+ 5104+ 6540+ 9380# 7732+ 3094+ 4191+ 5233+ 6722+ 7748+ 3153+ 4253+ 5380+ 6831+ 8353 7753 7755 4263 5508+ 6957+ 4347+ 3237+ 3301+ 5625+ 7081+ 7244 5959+ 7749¢ 3725+ 4772+ 6078+ 7755 380 3+ 4P 56 €197 7796 CZDHR-D-0 CZOHMD.P11 SMADRZ SMADR3 SMADR4 [SPAIL MACY11 30A(1052) 09-MAR-78 15:32 001270 001274 001300 24694 24724 24754 001232 001262 001266 001272 001276 000216 023012 023707 001246 001250 001232 023676 001263 001267 001273 001277 021272 001154 000001 022036 022040 021256 001240 000222 024314 024302 024142 024276 024214 001226 023300 2256 24594 24674 24704 24734 22564 8080+ 8158 24454 24464 24394 8155 24604 24684 24714 24744 7745 24064 29644 41224 53304 67984 7885+« 7880« 7709 24428 22584 8431 84334 2871 84314 8410 24304 82144 023420 023720 000010 001160 001162 001164 001166 001170 001172 001174 001176 001200 020762 82424 83144 82354 24104 24124 24138 24144 24154 2416# 24174 26188 24194 7685# wheene |J teeene |J tevver |J 024312 021004 000137 8396 B 3 10-MAR-78 08:05 PAGE 238 CROSS REFERENCE TABLE -~ USER SYMBOLS 2260 2438% 2895 8086 8298# B096* 8101+ B094 82964 8121+ 81254 77554 8047 30254 4194K 54484 69254 7914x 7884+ 7725 2895+ 2903 SEQ 0235 SEQ 0234 7747 7783 8020 34304 4L610K 59274 74734 35144 4T723F 60214 75294 8099 8102+« 8076 30974 4266K 55604 70224 79274 7889 7733 7664x 8114 8118+ 3184w 4354K 56324 71954 32404 L4428 57054 7289% 33474 45268 58104 7391k 7892+ 7743 7665+ 7903« 7752# 7673 7929# 7686 7739 7756 36034 4B124 61424 7584k 36814 49024 6249 37594 49828 6423F 38394 50624 65068 39804 51404 66564 2900 7662 7705 84384 84004 8428 84164 7806 8393 8076 8201 8277 8294 8350 8353 B462+ B463+ B4b4r B477+« B478+ B4T74x B4T75+ B476+ 8500+ 8501+ B4BE* B4BT7+ B4BBr 9484 9484 B49Tr B498r 8499t 9899 9899 9461 9461 9461 9484 9484 9484 9714 9714 9714 9899 9899 9899 8465+ B466* B4T9+ B4BOx 8957+ 8970+ 9461 9484 9714 8417 7704 8418« 8759 8419+« 84374 2867 2869 2871 2873 2874 2875 2877 8394 8395 8396 8396 8409+ 2865 28578 2864 2865 CZDHM=D=0 CZDHMD .P11 o $STUP = 17Y277 LsSVLAo 021222 $SVPC = 000214 $SWR = 165400 $SWREG SWRMK= STESTN TIMES $TKB $TKS $TMPO 001254 000000 001236 001222 001146 001144 001202 $TMP1 001204 $TMP2 001206 $TMP3 001210 $TMP4 001212 $TMPS $TMP6 $TMP? 001214 001216 001220 $TN = 000061 $TPB TPFLG TPS TRAP TRAP2 TRP = $TRPAD 001152 001157 001150 024060 024102 000013 024114 MACY11 30A(1052) 09-MAR-78 15:32 7770 2857# 7717 22334 21924 2877 3843 5066 6510 7678 7727 7778 24504 2214 24414 2428# 24034 24024 24204 5983« 9058+ 24214 7114+ 24224 45064+ 4699 24234 4577 9798 24244 6977+ 24254 24264 24274 5605+ 5798 6015+ 6839+ 2204# 32440 3654 4167 4526 4986# 5632 6142 6793 10-MAR-78 PAGE 239 £ 3 SEQ 0236 SEQ 0235 CROSS REFERENCE TABLE -- USER SYMBOLS 7793 7808 8138 8300 2209 2968 4126 5334 6802 7686 7735 7794 2210 3029 7696 7736 7806 2211 3101 4270 5564 7026 7697 7737 8434 7700 7701 7724 7663+ 8147 7735+ 8164 8161 7742 8218 77464 2238 2204 2878 3984 5144 6660 7684 7728 7790 2898 2215 7747+ 2874+ 8136 8136 5420+ 5984+ 9461 4315+ 7125 4332+ 4506 6563+ 4321+ 4578 4698+ 6994+ 7289 6550« 6549 3940« 5607 5803* 6016 6901 2964 3307 3681 4194 45304 5062 56364 61464 6798 72934 83764 8366 8065+ 8014 8063 83614 8383 8385# 83834 75884 2405# 24094 2404# 2869 83724 08:05 8145 5421* 6554 9484 4330 7146+ 4334 4509 6564 4322 4580+ 4701 6995 6889+ 6744+ 3979 5628+ 5804 6108+ 6905 29684 3347 36854 41984 4574 50664 5705 6199 68024 7342 4198 5452 6929 5436+ 6868+ 9714 4333 7155 4337 4517 6855+ 4324+ 4581 4706 8590+ 6895 6770+ 4082+ 5629 5869« 6109+ 6906 3025 3351# 3732 4239 4610 5140 57094 6249 8185+ 5437+ 6984+ 9760 4403+ 7163+ 4345 4522+ 6856+ 4325 4682+ 4714 8604+ 8597 6992+ 4121 5668+ 5875 6202+ 8566+ 3029# 3407 3759 4266 46140 51444 6844 7391 5810 62534 6925 7395# 8387# 8388# 2212 3188 4358 5636 7199 7698 7749 7745+ 8224 8216 5886+ 7421+ 9798 4418 7174 2213 3244 4446 5709 7293 7699 7752 2214 3351 4530 5814 7395 7700 7755 2430 3607 7477 7708 7762 2429 3518 4727 6025 7533 7720 7763 2428 3434 4614 5931 4816 6146 7588 7722 7764 2874 3685 2875 3763 6253 7657 7723 6427 7663 7726 4906 7765 4986 7774 7755 5888+ 7423 5889« 7436 5890* 8494+ 5980 8495+ 8956+ 5981+ 5982+ 8969+ 4488« 7376+ 4420+ 4590 7439« 4412¢ 4688 45772« 9879 4422 4593 7498+ 4413 4678+ 4694 5422+ 5438+ 4425 4638+ 4607 9760 6555+ 4601 7553« 4493« 6638+ 4433 4606+ 7608+ 4494 4439 4679 4409+ 4684 8222 5887+ 7422+ 9899 4421 7370¢ 4351 4588« 6971+ 4410 4687+ 4496+ 6723+ 4497 6792+ 4719+ 4720 6575+ 6595+ 6596 6602+ 6603+ 6614 7on 5410+ 7018 5411 8596 8607 5422 5701 5923 6544« 8579+ 3161 3514 9010+ 5430 5757« L, 62¢ 9024+ 5438 5759 5969 6617 8582+ 31884 3577 39844 4442 4902 54520 6021 6571 5445 5795 6003 6786+ 7195 75334 5444 579N 5980 6743+ 8583 3226 3603 4122 L4464 4906# 5560 6025# 6656 71994 7549 83944 8395# 4350+ 4523 6970+ 5414 7433 5681 5910 6235 8570+ 3097 34344 3810 4316 4723 5330 5868 64274 6986 7473 5700« 5922+ 6542+ 8571 31014 3491 3839 4354 47274 53344 5927 6460 7014 74774 38434 43584 4812 5382 59314 6506 7022 7493 8389# 8390 83914 8392 5671 5886 6206 8567 3087 3430 37634 4270# 4680 5324 58144 6423 69294 6551+ 8580 3184 3518# 3980 4404 48164 5448 5961 65104 70264 7529 6652+ 3240 36074 L1264 4490 4982 55644 6080 6660# 7246 7584 8076 8076 8076 83864 8393# 83964 CZDHM-D-0 CZOHMD.P11 $TSTM MACY11 30A(1052) 09-MAR-78 15:32 000220 $TSTNM 001102 STTYIN 023654 seenne 2257# 2382# 7806 8244 |J 8389 022042 79424 8014# 8044 8069 7883# 7882 78784 24444 22594 24514 24764 24774 77114 76784 7879« 7708 22174 2877 022266 022500 022546 021640 021654 021614 001244 000224 001256 001302 001304 021026 000000 022037 wrkwnr | = 037712 79964 97974 8080 2244k +SASTA= waxnen | .8X = 000214 . ABS. 037712 ERRORS DETECTED: D 3 10-MAR-78 08:05 PAGE 240 CROSS REFERENCE TABLE -- USER SYMBOLS 6563 8461 8245 6855 8473 8257 6970 8496 8275 8107 8051 8071 8385 78854 8386 8376 8058 80744 8384 8063# 7883+ 7780 7893 7928# 2233 2963 22344 7466 8388 2221% 2878 8076 100064 8083 2249 7650« 8960 8289 7662+ 8973 7746« 7747 7752 7756 7773 2433 7806 2862 78524 E 8064 8187 22364 7522 2238B¢ 7577 8387 8128 101314 B136 10134# 8293¢ 10138# 8294 10144# 000 0 237 7724 8293# DSKZ:CZDHMD ,DSKZ:CZDHMD.SEQ=DSKZ:CZDHMD.SML ,DHMMAD .P11,CZDHMD.P11 RUN=TIME: 32 38 1 SECONDS RUN=TIME RATIO: 254/72=3.5 CORE USED: 49K (97 PAGES) DOCUMENT PAGES: 7695 SEQ 0237 SEQ 0236 2244 7632 8300 22458 7686 8353 22478 7690 8412 2249 7755 8436 23798 7756 9099# 92034 94834
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