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AH-8494D-MC
July 1978
238 pages
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Document:
CZDHMD0 DH11 DIAGNOSTIC JUL 1978 bw
Order Number:
AH-8494D-MC
Revision:
000
Pages:
238
Original Filename:
CZDHMD0__DH11__DIAGNOSTIC__AH-8494D-MC__JUL_1978_bw.pdf
OCR Text
DIAGNOSTIC CZDHMDO AH-8494D-MC copymiGHT®76-78 FICHE1 OF2 JUL 1978 HSO0ED MADEIN USA DIAGNOSTIC CZDHMDO : ~ AH-8494D-MC COPYRIGHT ©76-78 FICHE2OF 2 JUL 1978 ! dlilglift MADEIN USA SEa 0002 PAGE 4 08:05 CIOHMDO MACYT1 30A(1052) 10-MAR-78 (ZDHMD.PN 09-mMAR-78 15:32 PRODUCT CODE: AC-8492D-M( PRODUCT NAME: CZDHMDOQ DH11 DATE: JUNE AUTHOR: E. MAINTAINED BY: DIAGNOSTIC ENGINEERING DIAGNOSTIC 1978 CROWLEY THE INFORMATION IN THIS DOCUMENT [S SUBJECT TO CHANGE WITHOUT NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUIPMENT CORPORATION. DIGITAL EQUIPMENT CORPORTION ASSUMES NO RESPONSIBILITY FOR ANY ERRORS THAT MAY APPEAR IN THIS DOCUMENT. NO RESPONSIBILITY IS ASSUMED FOR THE USE OR RELIABILITY OF SOF TWARE ON EQUIPMENT THAT IS NOT SUPPLIED BY DIGITAL OR ITS AFFILIATED COMPANIES. COPYRIGHT (C) 1976, 1978 BY DIGITAL EQUIPMENT CORPORATION W THE FOLLOWING ARE TRADEMARKS OF DIGITAL PDP DEC DECUS DIGITAL EQUIPMENT CORPORATION: UNIBUS MASSBUD DECTAPE SEQ 0001 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 TABLE OF PAGE 5 CONTENTS 1.1.1 1.1.2 LOGIC TEST SUMMARY CIDHM CORE MEMORY MAP . .« — N N — (v P v o — — e — WA — PROGRAM OPTIONS e W — N POWER ERROR HALTS O v W STANDARD SYSMAC.SML ERROR REPORTING CONVENTIONS ERROR MESSAGE TABLE DATA HEADER MNEUMONIC DEFINITIONS ) N — b s ) N NN o o CONSOLE SWITCH REGISTER CORE MEMORY LOCATIONS REGISTER USAGE — N — no " . . . . - . . - — . . ~n . rronro ACTT1/APT11 "'XXDP'* SYSTEMS SWITCHLESS FEATURE ERROR REPORTING PROCEDURES . no . . W SPECIAL ENVIRONMENTS ERROR INFORMATION . N . s 0w . . . LOADING PROCEDURES STARTING PROCEDURES . N LOADING AND STARTING PROCEDURES . oo OPERATING INSTRUCTIONS . o FAILURE ASSUMPTIONS . RN DIAGNOSTIC HIERARCHY PREREQUISITES e N RELATED DOCUMENTS AND STANDARDS e W HARDWARE REQUIREMENTS SOF TWARE REQUIREMENTS EXECUTION TIMES . W SYSTEM REQUIREMENTS . WKL [a¥] PROGRAM PURPOSE [aS 2 ¥ ) 1.1 —-— GENERAL PROGRAM DESCRIPTION [ 1.0 W CZOHM-D-0 CZDHMD . P11 PERFORMANCE AND PROGRESS REPORTS FAIL PRINTOUT sca 0003 SEQ 0002 CZOHM-D-0 CZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 4 .1 A .2 10-MAR-78 08:05 PERFORMANCE REPORTS PROGRESS REPORTS PAGE 6 SEQ 0004 SEQ 0003 10-MAR-78 PAGE 7 s s e s LINE PARAMETER PREGISTER CUKRENT ADDRESS KEGISTER BYTE COUNT REGISTER BUFFER ACTIVE REGISTER BREAX CONTROL REGISTER SILO STATUS REGISTER LOGIC PARTITIONING MODULE ALLOCATION CHART MAINTENANCE INTRODUCT]ION PRELIMINARY CHECKS MAINTENANCE CONNECTORS COMPLETE DH11 SUB-SYSTEM CHECKOUT MAINTENANCE HEADER DESCRIPTION P I ) . o FUNCTIONAL [} . e . SYSTEM CONTROL REGISTER NEXT RECEIVED CHARACTER REGISTER AN SN NN — . (¥, ] e E DH11 00 N ONN BN NN = RN W DH11 N o VN ADDRESS AND VECTOR ASSIGNMENTS REGISTER DEFINITIONS « INFORMATION DH11 AV RV, AV, RV RV LV RV, JV | DEVICE 08:05 (¥ MACY11 30A€1052) 09-MAR-78 15:32 [e N o Yo Yo Yo CZDKM-D-0 CZOHMD.P11 PROCEDURES SEQ 0005 SEQ 0004 CZOHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 1.0 10-MAR-78 08:05 SEQ 0006 SEQ 0005 PAGE 8 GENFRAL PROGRAM DESCRIPTION - -~ P Y - - . - - .- 1.1 T T Y L DIAGNGSTIC TEST "'CZDHM’* IS A COMPREHENSIVE PROGRAM DESIGNED TO AID IN THE ACCEPTANCE TESTING, INSTALLATION CHECKOUT, AND CORRECTIVE MAINTENANCE OF THE DH11 16. LINE ASYNCHRONOUS SERIAL LINE MULTIPLEXOR. IT CONSISTS OF 48. LOGICALLY SEQUENCED DIAGNOSTIC TESTS DESIGNED TO TEST AND VERIFY THAT THE DH11 IS OPERATING IN ACCORDANCE WITH ITS DESIGN SPECIFICATIONS. THE PROGRAM IS CONFIGURABLE BY THE AUTOSIZER OR BY CONSOLE DIALOGUE TO ENABLE IT TO AUTOMATICALLY TEST AND VERIFY ALL 16. LINES ON UP TO 16. CONTIGUOUS DH11'S (WITH NON-CONTIGUOUS/ CONTIGUOUS VECTOR ASSIGNMENTS). INDIVIDUAL UNITS AND INDIVIDUAL LINES WITHIN A UNIT MAY BE SELECTED OR DESELECTED TO FACILITATE FAULT ISOLATION TO A PARTICULAR DH11 OR A FUNCTIONAL AREA OF LOGIC AFFECTING A PARTICULAR LINE WITHIN A UNIT. WHENEVER AN ERROR IS DETECTED A COMPREHENSIVE ERROR REPORT IS TYPED THAT ALLOWS THE USER TO ISOLATE THE FAULTY TO A FUNCTIONAL AREA OF LOGIC. EXTENSIVE DOCUMENTATION 1S PROVIDED TO PERMIT THE USER TO PROCEED FROM THE ERROR REPORT TO ADDITIONAL LOGIC CHECKS TO MAKE IN ORDER TO ISOLATE THE PROBLEM 70O A REPLACEABLE UNIT. IN ORDER TO FACILITATE INSTALLATION CHECKCUT, TESTS 101, AND 105 THROUGH 107 (TEST GROUP 1) OF THE MODEM CONTROL DIAGNOSTIC, CZDHK, HAVE BEEN INCLUDED IN THIS PROGRAM. IN THIS WAY ALL THE LEVEL CONVERTERS AND CABLES CAN BE CHECKED WITH JUST ONE PROGRAM USING THE H315 TURNAROUND CONNECTOR. CZDHN-D-0 D . P11 CZDHM 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 1.1.1 LOGIC PP L TEST L LT L 08:05 PAGE 9 SEQ 0007 SEQ 0006 SUMMARY S PR T ) mn 12 13 T4 15 16 17 710 TM 112 CHECK SSYN RESPONSE FROM ALL DH11 REGISTERS TEST THAT ‘'MASTER CLR'' CAN CLEAR THE ''SCR'‘,''LPR'',"'BKR'',AND ''SSR'' REGS TEST *'SCR'' REG R/W BITS CAN SET/CLR (NORMAL MODE) TEST "'SCR'* REG. READ ONLY BITS (NORMAL MODE) TEST ''SCR' REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE TEST THAT ALL R/W BITS IN "'LPR' CAN BE SET/CLR TEST THAT ALL R/W BITS IN ''BKR'* CAN BE SET/CLR TEST THAT ALL R/W BITS IN ''SSR'* CAN BE SET/CLR TEST THAT CLR/SET OF BIT ''N'" IN "LPR' DOES NOT CLEAR ANY OTHER BITS TEST THAT CLR/SETY OF BIT ''N'' IN "BKR'* DOES NOT CLEAR ANY OTHER BITS T14 115 116 117 120 121 122 123 124 125 126 127 130 131 132 133 134 135 136 137 140 "'CAR'* MEMORY ADDRESSING TEST "BCR'' MEMORY ADDRESSING TEST “'CAR'* REGISTER TEST - ALL 1'S / ALL 0'S - ALL LINES "BCR'* REGISTER TEST = ALL 1°'S / ALL 0'S - ALL LINES "'CAR'' MEMORY PATTERNS TEST / 0'S DISTURB "BCR'" MEMORY PATTERNS TEST / 0°'S DISTURB "'CAR'' MEMORY PATTERNS TEST / 1'S DISTURB ‘'BCR'' MEMORY PATTERNS TEST / 1°'S DISTURB TEST THAT “'CAR'' MEMORY EXT BITS SET/CLR PROPERLY TEST INTR. ENAB. BITS - INTR. CONDITION DISABLED TEST CHAR. AVAIL. [.E. WITH INTR. CONDITION ACTIVE TEST SILO OVFLW. I.E. WITH INTR, CONDITION ACTIVE TEST NON EX MEM I.E. WITH INTR. CONDITION ACTIVE TEST XMITTR DONE I.E. WITH INTR. CONDITION ACTIVE BASIC TRANSMITTER '‘NPR'' LOGIC TEST 1 TRANSMITTR NPR LOGIC TEST 2 TEST THAT CHARACTER AVAILABLE CAN CAUSE RCVR INTERRUPT TEST THAT THE SILO STATUS REG COUNTS UP CORRECTLY TEST THAT SILO STATUS REGISTER DOWN COUNTS CORRECTLY TEST SILO ALARM LEVEL FOR COUNTS 0,1,2,4,8,16, AND 32 TRANSMITTER TIMING TEST - ALL SELECTED LINES - ALL SPEEDS 142 743 T44 145 T46 147 150 VERIFY STORAGE OVERFLOW - NON MAINT MODE - ALL SELECTED LINES BASIC DATA TEST - ALL SELECTED LINES/ALL CHAR LENGTHS SINGLE LINE DATA TEST - ALL SELECTED LINES BASIC PARITY LOGIC TEST - ALL SELECTED LINES - ODD PARITY MULTI-LINE PARITY DATA TEST - ALL SELECTED LINES AUTO ECHO TEST 1 - ALL SELECTED LINES AUTO ECHO TEST 2 - ALL SELECTED LINES 113 T41 151 152 753 154 T55 T56 157 T60 TEST THAT CLR/SET OF BIT ''N'' IN "'SSR'' DOES NOT CLEAR ANY OTHER BITS RECEIVER TIMING TEST - ALL SELECTED LINES - ALL SPEEDS AUTO ECHO TEST 3 - ALL SELECTED LINES BREAK BIT TEST - ALL SELECTED LINES HALF DUPLEX TEST - ALL SELECTED LINES VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES ABBREVIATED MODEM CONTROL DIAGNOSTIC. (DZDHK T101) MODEM CONTROL DIAGNOSTIC CONTINUED (DZDHK T105) MODEM CONTROL DIAGNOSTIC CONTINUED (DZDHK 1106) MODEM CONTROL LIAGNOSTIC CONTINUED (DZDKK T107) 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 08:05 SEa@ 0008 SEQ 0007 PAGE 10 CORE MEMORY MAP 1.1.2 1322222323222 000000: 220220020002 RRRRRE2] * * VECTOR AREA . * 1222222322222 2823222322020 d02RRR4 4] * * * STACK AREA . * * 2222222022208 001100: * * SYSMAC CONSTANTS v * . o 20A0RRRtitRdsds AND VARIABLES . * * 18222233838222823232332332223308223222224/] BEGIN: * * . START-UP CODE * * * 1282823823323 START1: 23232323202223228222020 * 22 + . START-UP CODE 3] * * * * I3RS RRRRE A TSTY: x » CZDHM-D-0 CZDHMD. P11 * * DH11 LOGIC TESTS TST1(8)~TST54(8) ' . * * 1282232323223 $EOP: 232332323282433423232282223] * * * * STANDARD SYSMAC UTILITY ROUTINES * N * * 2323833333383 CKRS11: 233223240823280823201 * * * COMMON DH11 UTILITIES * + L4 1232322323228 232323230232322322023222 3] DHADR: |4 * * DH11 * PROGRAM CONSTANTS AND VARIABLES * + * k4 12828232222 220002808022082330220228 31 )4 * rEARARREY 122422200101 * + CONT. » FRRRERRAN CONT. * L 282AREAE] C70HM-D-0 (ZDHMD . P11 PAGE 11 08:05 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 Sea 0009 SEQ 0008 (1222282234 LA22323224 * (CONT, » TrATEERRSL * (ONT. « TEEREAEEY * 2232223822233 323002223000020000040} EM1: * * SYSMAC ERROR MESSAGE * BUFFERS * AE AR TITLE: * * AR AN AR N R AN R AR RN R ARt * * * DH11 MISCELLANEOQOUS MESSAGE BUFFERS * AR RBUF : * * * * * * b * AN RN RN R TR AR TR TRANSMIT AND RECEIVE DATA BUFFERS * TR RRY * * * * 1242402022 a\ RRRRRRRRRdE 4] CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 10-MAR-78 09-MAR-78 15:32 1.2 SYSTEM REQUIREMENTS 1.2.1 HARDWARE REQUIREMENTS A. 08:05 PAGE 12 ANY PDP11 COMPUTER SYSTEM WITH 12K OF CORE MEMORY AND A CONSOLE TERMINAL DEVICE (VT50,LA36 ETC) NOTE: 16. FOR PAPER TAPE SYSTEMS USING THE PDP11 ABSOLUTE LOADER, THE PROGRAM CAN LOAD AND RUN IN 8K OF CORE 8. A DH17 (. TEST CONNECTORS AND MODULE (THE NO. OF EACH REQUIRED IS DETERMINED BY THE PARTICULAR TEST APPLICATION. REFER TO SECTION 6.3 FOR A COMPLETE DISCUSSION OF THE MAINTENANCE CONNECTORS) 1. LINE ASYNCHRONOUS SERIAL LINE MULTIPLEXOR H315 TEST CONNECTOR 2. H8611 TEST CONNECTOR(FOR DH11-AD) 3. M974 TEST MODULE 4. HB61 TEST CONNECTOR 1.2.2 SOFTWARE A. REQUIREMENTS ACT1 APT11 THE PROGRAM CONTAINS THE REQUIRED ACT11/APT11 SOFTWARE HOOKS TO PROPERLY INTERFACE WITH THE ACT/APT SYSTEMS. THE PROGRAM CONTAINS AN AUTOSIZER AND CAN BE RUN IN QUICK VERIFY MODE USING "'CHAINS''. B. 1.3 XXDP THE PROGRAM MAY BE LOADED AND RUN FROM ANY “XXDP'' MEDIUM PROVIDED THE SYSTEM HAS AT LEAST 12K OF CORE STORAGE. RELATED DOCUMENTS AND STANDARDS A. DH11-0 ENGINEERING DRAWINGS B. DH11 MANUAL EK-DH11-MM-002 C. POP11 PERIPHERALS HANDBOOK D. PDP11 PROCESSOR HANDBOOK E. MD-11-DZQAC-C1 SYSMAC.SML F. G. 1.4 MD-11-DZQXA ‘'XXDP'* USER'S GUIDE DIAGNCSTIC ENGINEERING STANDARDS AND CONVENTIONS PROGRAMMING PRACTICES DOC NO. 175-003-009-00 DIAGNOSTIC HIERARCHY PREREQUISITES CZDHM ASSUMES THAT THE FOLLOWING DIAGNOSTICS 32¥EC$EEN RUN PRIOR TC IT5S EXECUTION AND THAT NO ERRORS WERE SEQ 0010 SEQ 0009 CZ0HM-D-0 D . P11 CZDHM 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 A. 08:05 PAGE 13 CPU/CORE MEMORY DIAGNOSTiCS SEa 0011 SEQ 0010 MACY11 10-MAR-78 304(1052) 09-MAR-78 °5:32 1.5 08:05 PAGE 14 FAILURE ASSUMPTIONS CZDHM ASSUMES THAT THE PROGRAM CAN BE LOADED INTO CORE AND STARTED. IT ALSO ASSUMES THE CPU/MEMORY HARDWARE IS FUNCTIONING ERROR FREE. 2.0 OPERATING INSTRUCTIONS 2.1 LOADING PROCEDURES A. PAPER TAPE SYSTEMS USE THE STANDARD PDP11 ABSOLUTE LOADER PROCEDURE FOR LOADING PAPER TAPES. AFTER LOADING THE PROGRAM MUST BE MAN- , UALLY STARTED AS DESCRIBED IN SECTION 2.1.2. 8. "'XXDP'' SYSTEMS (REFER TO ''XXOP'' USER'S GUIDE MD-11-DZDQXA) 1. MOUNT THE APPROPRIATE MEDIUM (DECTAPE,DISK ETC) CONTAINING THE ''XXDP‘' MONITOR AND CZDHM. . B0OT THE SYSTEM TO LOAD THE MONITOR ONCE LOADED THE °‘’XXDP'' MONITOR PRINTS AN INTRODUCTORY MESSAGE AND RESPONDS WITH A ''.'', . TYPE: *'CZDHM’* FOLLOWED BY EITHER A <CR> CARRIAGE RETURN OR AN "‘ALTMODE" . wno 2.1'1 £ (Z0HM-D-0 CZOHMD.P11 TO LOAD THE PROGRAM. IF A <CR> WAS TYPED THE USER MUST MANUALLY START THE PROGRAM AFTER LOADING. IF THE "ALTMODE'' TERMINATOR WAS USED THE PROGRAM WILL SELF NOTE: START AFTER LOADING. WHENEVER THE DH11 CONFIGURATION IS CHANGED THE DIAGNOSTIC SHOULD BE RELOADED. SEa 0012 S€Ea 00N MACY11 10-MAR-78 30A(1052) 09-MAR-78 15:32 08:05 SEQ@ 0013 SEQ 0012 PAGE 15 STARTING PROCEDURES - e - A. TO AUTOMATICALLY START THE PROGRAM USING THE AUTOSIZER (START AT LOC 000200(8)) - - -~ INSTALL THE REQUIRED TEST CONNECTORS FOR THE PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) . SET THE HALT/ENABLE SWITCH TO HALT SET THE SR=000200(8) . DEPRESS LOAD ADDRESS . SET THE SR=000000 (WORST CASE TESTING) . 1. (L VL8) 2.1.2 SET THE SR=000002 (TO TYPE THE DEVICE MAP) SET THE SR=004000 (QUICK PASS) SET THE SR=002000 (TO SKIP AN ABBREVIATED MODEM CONTROL TEST. REFER TO SECTIONS 1.1 AND 6.3) SET THE SR=000400 (HALT AFTER PARAMETER SET-UP) SET THE HALT/ENABLE SWITCH TO ENABLE DEPRESS START - THE PROGRAM WILL TEST ALL LINES ON ALL DH'S FOUND. NOTE: THE CSR REGISTER ADDRESS OF THE MODEM CONTROL('S) IS LOADED ONLY FROM THE AUTOSIZER, HOWEVER, AFTER INITIAL LOAD, THE PROGRAM CAN BE STARTED AT 210(8) TO CHANGE SELECTION PARAMETERS AS DESCRIBED IN SECTION 2.1.2 D. TO TYPE 1‘ (W R YWY N} (ZDHM-D-0 CZDHMD .P11 . . . IN ALL REQUIRED PARAMETERS (START AT LOC 000200(8)) INSTALL THE REQUIRED TEST CONNECTORS FOR THE PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) SET THE HALT/ENABLE SWITCH TO HALT SET THE SR=000200(8) DEPRESS LOAD ADDRESS SET THE SR=000001 (FOR INPUT DIALOGUE) AFTER INPUT DIALOGUE BEGINS BUT PRIOR TO ACTUAL TESTING: SET THE SR=000000 (WORST CASE TESTING) SET THE SR=004000 (QUICK PASS) SET SR=000400 (HALT AFTER PARAMETER SET-UP) . . SET THE HALT/ENABLE SWITCH TO ENABLE DEPRESS START - THE PROGRAM TYPES THE TITLE AND THEN ASKS FOR THE NUMBER OF ADDRESSES EETWEEN VECTORS. TYPE EITHER 10(8) OR 20(8) DEPENDING UPON THE PARTICULAR CONFIGURATION Tu BE TESTED: NOTES: IF THE HMODEM CONTROL VECTORS ARE WITH THE DH11 VECTORS INTERLEAVED (2040 FRONT END) C(ZOMN-D-0 CZDHMD.P11 MACY1) 10-MAR-73 30A(1052) 09-MAR-78 15.32 08:05 PAGE THE SEQ 0014 SEQ 0013 16 DISPLACEMENT IS 20(8) ADDRESSES. FOR STANCARD DH11'S WITH CONTIGUOUS VECTORS THE DISPLACEMENT IS 10(8) ADDRESSES. <CR> ONLY WAS TYPED, IF WILL BE 20(8) ADDRESSES. 8. THE DEFAULT THE PROGRAM WILL ASK FOR THE DEVICE ADDRESS. TYPE IN THE ADDRESS (OCTAL) OF THE FIRST DH11 IN THE SYSTEM FOLLOWED BY A <CR>. IF AN INVALID ADDRESS IS TYPED THE PROGRAM WILL TRY 9. TYPE AGAIN. AN ERROR MESSAGE AND ASK THE PROGRAM WILL ASK FOR THE VECTOR ADDRESS. TYPE IN RECEIVER VECTOR ADDRESS (OCTAL) Of THE FIRST DH11 FOLLOWED BY A <CR>, IF AN INVALID VECTOR ADDRESS PROGRAM WILL TYPE YOU TO TRY AGAIN. 10. YOU TO NEYT THE PROGRAM WILL PARAM:TER. TYPE ASK FOR THE [N AN OCTAL NO. BIT00=1 TEST DH11 #00 BIT01=1 TEST DH11 #01 B1702=0 DO NOT TEST DH11 BIT15=1 TEST DH11 IS TYPED THE AN ERROR MESSAGE AND ASK DEVICE ENCODED SELECTION AS FOLLOWS: #C2 #15 EXAMPLES: 1772777<CR> TEST ALL 16. DHI1'S 00000S5<(R> TEST DH11 #00 AND 02 100000<CR> IF A <CR> ONLY TO THE LAST THIS IS THE 000003 1. TEST ONLY DH1Y IS TYPED THE PROGRAM WItLL DEFAULT TYPED IN DEVICE IN.TIAL LOAD IT (DH11 #00 AND 01) SELECT PARAMETER. WILL DEFAULT TO NEXT THE PROGRAM WILL ASK FOR THE PARAMETERS. TYPFE AN ENCODED OCTAL FOLLOWS: B81700=1 TEST LINE #00 BITO1=1 TEST LINE #01 BITPZ=O DO NOT TEST LINE #0¢ BIT15=1 #17(8) TEST LINE #15 L INE SFLECTION NO. AS [F (IDHM-D-0 CIDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 17 S€a 0015 SEQ 0014 EXAMPLES: 177777<CR> 100000<CR> 000005<CR> TEST ALL 16. LINES TEST LINE 17(8) ONLY TEST LINES 00 AND 02 IF A <CR> RETURN ONLY IS TYPED THE PROGRAM WILL DEFAULT TO 16. LINES. (23R8 20021 NOTE (2222222 4] IF MORE THAN ONE DH11 IS TESTED THE SAME COMBINATION OF LINES WILL BE TESTED ON ALL DH11'S SELECTED. 12. IF SRB8=1, THE PROGRAM WILL HALT AND PRINT FOLLOWING MESSAGE: THE "'DEPRESS CONTINUE TO START TESTING" AT THIS POINT SET UP THE DESIRED SWITCH REG- ISTER OPTIONS (REFER TO PARA 2.3.1) AND DEPRESS "'CONTINUE'' TO START THE TESTING. THE PURPOSE OF THIS HALT IS TO ALLOW THE USER TO DUMP THE PROGRAM AFTER SETTING UP THE CONFIGURATION PARAMETERS FOR HIS 13. SYSTEM. PROGRAM WILL BEGIN EXECUTION. REFER TO SECTIONS 2.4, 3.0, AND 4.0 FOR ERROR AND STATUS REPORTS. C. DEFAULT PARAMETER START #» (START AT LOC 000204(8)) 1. INSTALL THE REQUIRED TEST CONNECTORS FOR THE PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) 2. SET THE HALT/ENABLE SWITCH TO HALTY 3. SET THE SR=000204(8) 4. 5. 6. 7. b DEPRESS LOAD ADDRESS SET THE SR=000000 (WORST CASE TESTING) SET THE HALT/ENABLE SWITCH TO ENABLE DEPRESS START IF THIS IS THE INITIAL LOAD, THE DEFAULT PARAMETERS ASSUME TWO DH11'S WITH THE FOLLOWING ADDRESS ASSIGNMENTS DH11 #0 DEVADR=760020, VECTOR=330, BR> DH11 #1 DEVADR=760040, VECTOR=350, BRS OTHERWISE, THE PROGRAM WILL DEFAULTY TO THE PARAMETERS USED IN THE PREVIOUS EXECUTION. 8. PROGRAM EXECUTION BEGINS. REFER TO SECTIONS 2.4, 3.0, MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0016 SEQ 0015 PAGE 18 AND 4.0 FOR EXECUTION TIMES, ERROR REPORTS, AND PROGRESS REPORTS. TO CHANGE DEVICE AND LINE SELECT PARAMETERS ONLY (START AT LOC 000210(8)) . 1. v D. NN CIDHR-D-0 CZOHMD.P11 . . INSTALL THE REQUIRED TEST CONNECTORS FOR THE PARTICULAR TEST APPLICATION (REFER TO SECTION 6.3) SET THE HALT/ENABLE SWITCH TO HALT SET THE SR=000210(8) DEPRESS LOAD ADDRESS SFT THE SR=000000 (WORST CASE TESTING) SET THE SR=004000 (QUICK PASS) SET THE SR=002000 (TO SKIP AN ABBREVIATED MODEM CONTROL TEST. THIS ASSUMES THE AUTOSIZER WAS PREVIOUSLY USED TO LOAD THE MODEM CONTROL CSR ADDRESSES.) SET THE 6. 7. 9. SR=000400 (HALT AFTER PARAMETER SET-UP) SET THE HALT/ENABLE SWITCH TO ENABLE DEPRESS START ~ THE PROGRAM TYPES THE TITLE AND THEN ASKS FOR DEVICE SELECTION PARAMETER. PROCEED AS IN (B-10) ABOVE. PROGRAM WILL ASK FOR LINE SELECTION PARAMETERS. PROCEED AS IN (B-11) ABOVE. NOTE: THE DEVICE SELECTION AND LINE SELECTION PARAMETERS APPLY TO BOTH THE DH11 AND THE MODEM CONTROL, THAT IS, IF DH #7, LINE #3 IS CHOSEN THEN MODEM CONTROL #7 LINE #3 WILL ALSO BE TESTED. 10. IF SR8=1, THE PROGRAM WILL HALT AND PRINT THE FOLLOWING MESSAGE: "DEPRESS CONTINUE TO START TESTING" AT THIS POINT SET UP THE DESIRED SWITCH REG- ISTER OPTIONS (REFER TO PARA 2.3.1) AND DEPRESS "'CONTINUE'' TO START THE TESTING. THE PURPOSE OF THIS HALY IS TO ALLOW THE USER TO DUMP THE PROGRAM AFTER SETTING UP THE CONfIGURATION PARAMETERS 11. FOR HIS SYSTEM, PROGRAM WILL BEGIN EXECUTION. REFER TO SECTIONS 2.4, 3.0, AND 4.0 FOR EXECUTION TIMES STATUS REPORTS. ERROR AND C10HM-D-0 (ZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 2.2 SPECIAL ENVIRONMENTS 2.2.1 ACT11/ 08:05 PAGE 19 b 2 SEa 0017 SEQ 0016 WHEN UNDER CONTROL OF THE ACT11/APT1 APT11 SYSTEMS THE PROGRAM MAY BE LOADED IN DUMP MODE AND CAN BE RUN AS PART OF A QUICK VERIFY CHAIN SINCE AN AUTOSIZER IS USED. 2.2.2 XXDP THE PROGRAM MAY BE LOADED AND RUN FROM ANY “'XXDP'* MEDIUM PROVIDED THERE IS AT LEAST 12K OF CORF. IT MAY BE RUN AS PART OF AN “'XXDP'' CHAIN. 2.2.3 SWITCHLESS FEATURE IF THE DIAGNOSTIC IS RUN ON A CPU WITHOUT A SWITCH REGISTER THEN A SOFTWARE SWITCH REGISTER IS USED WHICH ALLOWS THE USER THE SAME SWITCH OPTIONS AS THE HARDWARE SWITCH REGISTER. IF THE HARDWARE SWITCH REGISTER DOES NOT EXIST OR IF ONE DOES AND IT CONTAINS ALL ONES (177777) THEN THE SOFTWARE SWITCH REGISTER (LOC. 176) IS USED. CONTROL: THIS PROGRAM ALSO SUPPORTS THE DYNAMIC LOADING OF THE SOF TWARE REGISTER (LOC. 176) FROM THE TTY, THIS CAN BE ACCOMPLISHED BY DCING THE FOLLOWING: 1) 2) 3) TYPE LOC. CONTROL G < G>; THIS WILL ALLOW THE THE "°'NEW='"' (XXXXXX IS THE OCTAL CONTENTS HAS BEEN TYPED THEN THE OPERATOR CAN DO ONE THE FOLLOWING AT THE A) SWR=XXXXXXNEW= SOFTWARE SWITCH REGISTEK.) AFTER THE OF TTY TO ENTER DATA INTO 176 AT SELECTED POINTS WITHIN THE PROGRAM. THE MACHINE WILL THEN TYPE: OF SWITCH TTY: TYPE A NUMBER TO BE LOADED INTO LOC. 176 FOLLOWED BY A <(R>. (ONLY OCTAL NUMBERS WILL BE ACCEPTED AND ONLY 6 NUMBERS WILL BE ALLOWED) IF A <CR> IS THE FIRST KEY DEPRESSED THE SOFTWARE SWITCH REGISTER CONTENTS WILL NOT BE B) CHANGED. IF A CONTROL U < U> IS DEPRESSED THEN THE PROGRAM WILL DO A <(R>. RETYPE THE DESIRED NUMBER. (ZDHM-D-0 CZOHMD .P11 MACY11 30A(1052) 10-MAR-78 09-MAR-78 15:32 08:05 2.3 PROGRAM OPTIONS 2.3.1 CONSOLE SWITCH REGISTER THE FOLLOWING TABLE SEQ 0018 SEQ 0017 PAGE 20 ILLUSTRATES THE FUNCTIONS OF THE CONSOLE SWITCH REGISTER DURING PROGRAM START AND DURING DH TESTING: SWITCH START TESTING 15=1 eeee- HALT ON ERROR (AFTER TYPING REGISTER ERROR MESSAGE) %=1 eeee- LOOP CONTINUOUSLY ON CURRENT TEST. 13=1 eee-- INHIBIT ERROR TYPOUTS. M1 e INHIBIT SUB-TEST (QUICK PASS) 0=1 eeee- INHIBIT MODEM CONTROL ABBREVIATED TESTS. LOCK ON HARD ERRORS I 8 ITERATIONS =1 HALTS AFTER CONF IGURAT1ON SEARCH FOR AND LOCK ON TEST SELECTED BY TO PERMIT CONTENTS OF DUMPING PRECONFIGURED COPIES OF THE PROGRAM. SR <07:00> CONTAINS TEST NUMBER 70 SEARCH FOR WHEN SR 08 = 1 <07:00> 1 =1 TYPES DEVICE MAP GENERATED BY THE AUTOSIZER. 0 =1 ALLOWS THE USER - .- 10 INPUT DH PARAMETERS MANUALLY. (INHIBITS THE AUTOSIZER) (IDHM-D-0 CZUHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 2.3.2 10-MAR-78 08:05 Sea 0019 SEQ 0018 PAGE 21 CORE MECMORY LOCATIONS A. DH11 CONFIGURATION TABLES AND VARIABLES WHEN THE AUTOSIZER OPTION IS USED, THIS PROGRAM CAN RUN NON-STANDARD DH11 CONFIGURATIONS (NON-CONTIGUOUS ADDRESSES). THE USER CAN ALSO PATCH IN HIS OWN ADDRESSES TO MATCH HIS CONFIGURATION AND THEN USE UPDATED PROGRAM. CRIBED BELOW: 1. THE DEFAULT START TO RUN THE THE TABLES AND LOCATIONS TO MODIFY ARE DES- DHADTB: 16. WORD DEVICE ADDRESS TABLE THE USEk CAN DEPOSIT THE ADDRESSES FOR HIS NON-STANDARD CONFIGURATION IN THIS TABLE. THE POSITION OF THE ENTRY IN THE TABLE CORRESPONDS DIRECTLY TO THE DEVICE NO. (IE DH11 #00 - WORD 00, DH11 #01 - WORD 01 ETC.) 2. DHV(TB: 16. WORD DEVICE VECTOR ADDRESS TABLE THE USER CAN DEPOSIT THE VECTOR ADDRESSES FOR HIS NON-STANDARD CONFIGURATION IN THIS TABLE. AGAIN THE POSITION IN THE TABLE CORRESPONDS DIRECTLY TO DEVICE NUMBER. 3. BRLVL: 16. WORD BR LEVEL TABLE THIS TABLE STORES THE BR LEVELS ASSUMED BY THE INTERRUPT SERVICE ROUTINES FOR EACH DH11. THE RCVR BR LEVEL IS STORED IN THE LOW BYTE AND THE XMITTER BR LEVEL IN THE HIGH BYTE. AGAIN THE POSITION IN THE TABLE CORRESPONDS DIRECTLY TO THE OH11 DEVICE NO. 4. DHSEL: DEVICE SELECTION PARAMETER THIS WORD MUST BE SET UP TO CORRESPOND TO THE DEFAULT CONFIGURATION DEFINED BY THE TABLE SET-UPS. REFER TO SECTION 2.1.2.(B10) ENCODING. 5. LINSEL: FOR A DESCRIPTION OF ITS LINE SELECTION PARAMETER THIS WORD IS PROGRAM LOADED AS A 177777(8) TO SPECIFY THAT ALL LINES (16.) ARE 70 BE TESTED. IT MAY BE MODIFIED AT CONFIGURATION TIME TO SPECIFY ANY COMBINATION OF LINES TO TEST. 2.1.3.(B11) FOR A DESCRIPTION OF NOTE: REFER TO SECTION ITS ENCODING. ONCE THE PROGRAM IS STARTED AND THE CONTENTS OF ABOVE ;0 DEFINE THE TO TEST. NCTE: IT IS TABLE DRIVEN AND USES ''DHASEL'', "LINSEL" THE THREE TABLES CONFIGURATION IT IS RECOMMENDED THAT WHEN NONSTANDARD CONFIGURATIONS ARE CZDHM-D-0 CZDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0020 SEQ 0019 PAGE 22 ENCOUNTERED, THE MODEM CONTROL DIAGNOSTIC, CZDHK, SHOULD BE RUN, RATHER THAN ALTERING THE MODEM CONTROL TABLES IN THIS PROGRAM. 8. SUB-TEST ITERATION COUNT THERE IS A LOCATION TAGGED ''SMXCNT:'' THAT DETERMINES HOW MANY TIMES EACH SUB-TEST IS REPEATED (SR11=0) [T IS PROGRAM LOADED TO 000010(8) BUT CAN BE (HANGED TO MODIFY THE ITERATION COUNT. NOTE THAT MODIFYING THIS LOCATION WILL CHANGE THE PROGRAM EXECUTION TIME DEFINED IN PARA 2.4(B). 2.3.3 REGISTER USAGE IN MOST OF THE TESTS THE GENERAL REGISTERS CONTAIN STANDARD INFORMATION AS SHOWN BELOW. ON PROGRAM HALTS THE REGISTERS CAN BE EXAMINED DIRECTLY TO DISPLAY THIS INFORMATION. RO 2.4 TEST NUMBER IN OCTAL R1 R2 R3 R4 ADDRESS OF THE ‘'SCR'* REG (DEVICE ADDRESS) ADDRESS OF THE DH11 REGISTER BEING TESTED ACTUAL CONTENTS OF THE DH11 REG BEING TESTED WHAT THE CONTENTS OF THE DH11 REG BEING TESTED RS R6 R7 ITS USE SHOULD HAVE BEEN GENERAL USE - REFER TO THE LISTING FOR CONTENTS OF THE STACK POINTER CONTENTS OF THE PROGRAM COUNTER EXECUTION TIMES A. SR11 =0 WITH ONE DH11 SUB-TEST ITERATIONS SELECTED FOR TESTING 16. LINES ONE COMPLETE WITH ONE DH11 SELECTED FOR TESTING 16. LINES ONE ERROR FREE PASS TAKES APPROXIMATELY ONE MINUTE COMPLETE ERROR FREE PASS TAKES APPROXIMATELY 8 MINUTES. B. SR'1 =1 NOTE: INHIBIT ITERATIONS THE ABOVE TIMES WERE DETERMINED WHEN THE PROGRAM WAS RUN ON A PDP-11/45 AND A PDP-11/40 CPU. (Z0HM-0-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 3.0 10-MAR-78 08:05 SEQ 0021 SEQ 0020 PAGE 23 ERROR INFORMATION 3.1 3.1.1 THE PROGRAM UTILIZES THE STANDARD PDP11 DIAGNOSTICS ERROR UTILITIES. THE TEST ROUTINE CALLS THESE UTILITIES USING AN “ERROR N'* INSTRUCTION (CODED EMT) WHERE ''N'' IS THE NUMBER OF THE ERROR MESSAGE. THE UTILITY ROUTINE USES ''N'' TO ACCESS THE PROPER ERROR INFORMATION VIA THE ERROR TABLE DESCRIBED IN SECTION 3.7.2 BELOW. EACH MESSAGE RESULTS IN THREE LINES OF TYPEOUT AS FOLLOWS: LINE 1 LINE 2 LINE 3 A BRIEF DESCRIPTION OF THE FAILING FUNCTION LABELS TO IDENTIFY THE DATA TYPED ON LINE 3 THE ACTUAL ERROR DATA (UP TO 8 OCTAL OR DECIMAL NOS.) EXAMPLE: SYSTEM CONTROL REGISTER ERROR (PC) (PS) (SP) TEST 002720 000002 001074 000003 DEVADR 160020 REGADR 160020 WAS 000000 S/8 000001 THE ERROR TABLE ITEMS SHOWN [N THE NEXT SECTION DESCRIBE ALL THE DH ERROR MESSAGES WITHIN CZDHM AND ARE INTERPRETED AS FOLLOWS: EM DH DT ADDRESS OF THE MESSAGE FOR LINE 1 ADDRESS OF THE DATA HEADER MESSAGE FOR LINE 2 ADDRESS OF THE TABLE OF ADDRESSES THAT POINT TO THE DATA WORDS TO BE PRINTED ADDRESS THAT POINTS TO THE DAYA DESCRIPTOR TABLE THAT DEFINES WETHER AN ITEM IS OCTAL OR DECIMAL. DF [F THIS ENTRY IS “'0"" ALL DATA WORDS ARE IN OCTAL. SECTION 3.1.3 DEFINES THE MEANING OF IN THE VARIOUS DATA HEADERS. THERE ARE ONLY TWO MESSAGES PROGRAM: CNE THE MNEUMONICS USED IN THE MODEM CONTROL PORTION OF INFORMS THE USER THAT NO MODEM CONTROL'S WERE THIS FOUND BY THE WJUTOSIZER AND THE PROGRAM THEN CONTINUES TESTING THE DH11'S. THE OTHER INSTRUCTS THE USER TO RUN THE MODEM CONTROL DIAGNOSTIC, CZDHK, DUE TO AN ERROR. THE PROGRAM THEN CONTINUES. CZDHA-D-0 CZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 3.1.2 10-MAR-78 08:05 SEQ 0022 SEQ 0021 PAGE 24 ERROR MESSAGE TABLES JERROR TABLE ITEM FOR ERROR MESSAGE 1 EM1 DH1 D11 0 JERROR TABLE EM2 DH2 D12 0 ;ERROR TABLE EM3 DH2 D12 0 ;ERROR TABLE EMé DH2 D12 0 ;ERROR TABLE EMS DH2 DT2 0 ;"'DH11 REGISTER REFERENCE CAUSED TIMEOUT" TEST DEVADR REGADR " (SP) (PS) P (PC) ,SREGZ ,SREGO, ; SERRPC,$TMPO,SREGSSREGT ;PRINT ALL OCTAL ITEM FOR ERROR MESSAGE 2 ;"'SYSTEM CONTROL REGISTER ERROR'' TEST DEVADR REGADR WAS S/B ‘' (SP) (PS) ; (PC) SREGS REGT ,SREG2, SREG3, ;SERRPC,$TMPO,SREG6,SREGO,S sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 3 ;'DH11 MASTER CLEAR FAILED TO CLR SPECIFIED REG' " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM SREGS SREG3, H, O,SREG SREGO, SREG1,SREG2, ;SERRPC,$TMP sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 4 :"'LINE PARAMETER REGISTER ERROR' ' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM :SERRPC,$TMPO,SREGS, SREGO,SREG1,SREG2, SREG3, SREG4 sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 5 ;"'BREAK CONTROL REGISTER ERROR' (SP) TEST DEVADR REGADR WAS S/B ' (PS) ;' (PC) SREGS REGT ,$REG2, SREG3, ;SERRPC,$TMPO,SREG6,SREGO,S ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 6 EM6 DH2 D12 0 ;ERROR TABLE EM7 DH2 072 0 ;"'SILO STATUS REGISTER ERROR' ;" (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B '’ 2, SREG3, SREGS ;SERRPC,$TMPO,SREG6,SREGO,SREGT,SREG ;PRINT ALL OCTAL ITEM FOR ERROR MESSAGE 7 :"'CURRENT ADDRESS REGISTER ERROR - LINE #XX' (SP) TEST DEVADR REGADR WAS (PS) ;" (PCY S/B " , SREG4 SREG3, ,SREGO SREG2, SREG1, ,SREGH ; SERRPC,$TMPO ;PRINT ALL OCTAL CZIDHM-D-0 CZDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0023 SEQ 0022 PAGE 25 :ERROR TABLE ITEM FOR ERROR MESSAGE 10 Em0 DH2 DT12 0 ;ERROR TABLE EM1 DH2 0T12 0 ;ERROR TABLE Em12 DH2 D12 0 ;ERROR TABLE EM13 DH2 DT?2 0 ;ERROR TABLE EM14 DH2 bT2 0 ;ERROR TABLE EM15 DH2 0T2 0 ;"BYTE COUNTER REGISTER ERROR - LINE #xx' ' (PCY (PS) (SP) TEST DEVADR REGADR WAS S/B " WAS S/B '’ WAS S/B TM ;SERRPC,$TMPO,SREGH, SREGO,SREG1,SREG2,SREG3, SREG4 sPRINT ALL OCTAL I1TEM FOR ERROR MESSAGE 11 :""UNEXPECTED DH11 RCVR INTERRUPT® ;' (PC) (PS) (SP) TEST DEVADR REGADR SREG4 GH, ,$REG2, SREG3, PO,SRE SREGO,SREGT ;SERRPC,S$TM ;PRINT ALL OCTAL 1TEM FOR EKROR MESSAGE 12 ;"'UNEXPECTED DH11 XMITTR INTERRUPT' ;° (PC) (PS) (SP) TEST DEVADR REGADR ;SERRPC,$TMPO,$REG6,SREGO,SREGT,SREG2, SREG3, SREG4 ;PRINT ALL OCTAL ITEM FOR ERROR MESSAGE 13 ;""CHAR AVAILABLE FAILED TO GENERATE RCVR INTERRUPT' ;U (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM ;SERRPC,$TMPO,SREGS,SREGO,SREG1,SREG2,SREG3,SREGS ;PRINT ALL OCTAL ITEM FOR ERROR MESSAGE 14 ;"'TRANSMITTER NPR LOGIC ERROR - LINE # * " (PC) (PS) (SP) TEST DEVADR REGADR WAS 5S/8 TM SREG4 ;SERRPC,$TMPO,SREGH,SREGO,SREGT,SREG2,SREG3, sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 15 ;UXMITTR FAILED TO INTERRUPT - LINE # * ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " SREG4 EG6 ,SREG3, O,SR SREGT,SREG2 $TMP , SREGO, ;SERRPC, ;PRINT ALL OCTAL JERROR TABLE ITEM FOR ERROR MESSAGE 16 EM16 DH2 DT2 0 ;""RCVR FAILED TO INTERRUPT" (SP) TEST DEVADR REGADR WwAS S/B TM (PS) U (PC) SREG3, SREGS REGS, SREG1,SREG2, MPO,S SREGO, ;SERRPC,$T JPRINT ALL OCTAL CZDHM-D-0 C20tnD.P11 10-MAR-78 MACY11 30A(1052) 00-MAR-78 15:32 08:05 SEQ 0024 SEQ 0023 PAGE 26 ;ERROR TABLE ITEM FOR ERROR MESSAGE 17 Emyz DHé D12 0 ;ERROR TABLE EM20 DH6 D12 0 ;ERROR TABLE EM21 DH2 012 0 ;ERROR TABLE EM22 DH2 DT2 0 :ERROR TABLE EM23 DH?7 012 0 ;ERROR TABLE EM24 DH2 D12 ;ERROR TABLE EM25 DH2 DT2 ;'TRANSMITTER TIMING ERROR - LINE # ;" (PC) (PS) (SP) TEST DEVADR SPEED TIMEB ;SERRPC,$TMPO,SREGS, SREGO, SREGT,SREG2, SREG3, SREGS sPRINT ALL ITEM FOR ERROR MESSAGE OCTAL 20 ;RECEIVER TIMING ERROR - LINE # U (PCY TIMEC" (PS) (SP) TEST DEVADR " SPEED TIMEB ;SERRPC,$TMPO,SREGH,SREGO,SREGT,SREG2,SREG3, SREGS sPRINT ALL OCTAL TIMEC' ITEM FOR EKROR MESSAGE 21 ;'RCVR FAILED TO INTERRUPT - LINE # * 7 (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B SREG4 ;SERRPC,$TMPO,SREG6,SREGO,SREGT,SREG2,SREG3, ;PRINT ALL OCTAL ITEM FOR ERROR MESSAGE 22 ;"'CHAR AVAIL FAILED TO SET ON TIME - LINE # J(PC) (PS) (SP) TEST DEVADR REGADR ' WAS S/B :SERRPC,$TMPO,SREGS,SREGO,SREG? ,SREG2 ., SREG3,SREGS sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 23 :"BASIC DATA TEST ERROR - LINE # ' TEST DEVADR CHRLNG WAS §S/B (SP) (PS) ;' (PC) ;SERRPC,$TMPO,SREG6, SREGO,SREGT,SREG2,SREG3, SREGS ;PRINT ALL OCTAL 1TEM FOR ERROR MESSAGE 24 ;""AUTO ECHO TEST ERROR - LINE # ;0 (PC) (PS) (SP) TEST DEVADR °* REGADR WAS S/B SREG4 REGS, SREG2,SREG3, MPO,S SREGO,SREGT, ;SERRPC,$T ;PRINT ALL OCTAL ITEM FOR ERROR MESSAGE 25 ;""BREAK BIT TEST ERROR - LINE # ' TEST DEVADR REGADR WAS S/B (SP) (PS) SREG3, SREG4 REG6, SREGT ,SREG2, SREGO, ;SERRPC,$TMPO,S 2 (PC) ;PRINT ALL OCTAL CZDMM-D-0 CZOHMD.P11 10-MAR-78 MACY11 30A(1052) 09-MAR-78 15:32 08:05 SEQ 0025 SEQ 0024 PAGE 27 ;ERROR TABLE ITEM FOR ERROR MESSAGE 26 EM26 DH2 D12 0 ;ERROR TABLE EM27 DH3 DT3 0 ;ERROR TABLE EM30 DH3 D13 0 s ERROR TABLE EM31 DH4 DT2 0 ;ERROR TABLE EM32 DHS DT4 0 :"'HALF-DUPLEX ITEM FOR ERROR MESSAGE 27 ;"'UNEXPECTED BUS ERROR TRAP'' TRPPS TRPPC TEST (SP) (PS) : (PC)Y T ,SREG2 ;SERRPC,$TMPO,SREG6,SREGO,SREG sPRINT ALL OCTAL ITEM FOR EKROR MESSAGE 30 ;"'UNEXPECTED RSVD INSTR TRAP'' TEST TRPPC (SP) (PS) s (PC) sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 31 ;"'AUTO ECHO DATA COMPARE ERROR - LINE # ' : (PC) (PS) (SP) TEST WASADR SBADR WAS sSERRPC,$TMPO,SREGH, SREGO,SREGT, SREG2, SREG3, SREG4 s/8 " sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 32 :"AUTO ECHO TEST TIMEOUT - LINE # 2 (PCY (LPRG) TEST'TM * :SERRPC,STMPO,STHP2 ;PRINT ALL OCTAL EM33 DH2 ;"'PARITY LOGIC EM34 DH4 D12 TRPPS ;SERRPC,$TMPO,SREG6,SREGO,SREG1,SREG2 ITEM FOR ERROR MESSAGE 33 ;ERROR TABLE '’ ;PRINT ALL OCTAL sERROR TABLE 012 TEST ERROR - LINE # S (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B *' SREGS EGH, Y ,$REGZ, SREG3, SREGO,SREGO,SR ;SERRPC,$TMP TEST ERROR - LINE # °' (SP) TEST DEVADR REGADR WAS S/B" (PS) ;" (PC) ;SERRPC ,$TMPO,SREGH. SREGO,SREGT, SREG2, $REG3, SREGS sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 34 - SUBTEST # ;"MULTI~LINE PARITY DATA TEST ERROR -~ LINE # ;' (PCY (PS) (SP) TEST WASADR SBADR WAS S/B SREG4 O, SREG3, TMP C,$,SREG2, SREGH, SREGO,SREGT ;SERRP JPRINT ALL OCTAL " CZDHA-D-0 CZOHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 28 SEQ 0026 SEQ 0025 ;ERROR TABLE ITEM FOR ERROR MESSAGE 35 Em35 DH14 DT6 0 ;UMULTI-LINE PARITY DATA TEST TIMEOUT'' U (PC) (LPRG) LINACT ' ;"'SERRPC,S$TMPO,STMP3"’ sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 36 EM36 :CHAR AVAILABLE TIMEOUT" 0 ;PRINT ALL OCTAL DH5 DT4 U (PC) (LPRG) TESTTM ;SERRPC,STMPO,S$TAP? ;ERROR TABLE ITEM FOR EKROR MESSAGE 37 EM37 DH4 012 0 ;ERROR TABLE EM4O DH2 DT2 0 :"'DATA COMPARE ERROR - LINE # ' U (PC) (PS) (SP) TEST WASADR SBADR WAS S/B ' ;SERRPC,$TMPO,SREG6,SREGO,SREGT ,SREG2, SREG3, SREGS sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 40 ;"BUFFER ACTIVE REG ERROR - LINE # ' ' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM sSERRPC,$TMPQ,SREGG, SREGO, SREG1,SREGZ, SREG3, SREGS sPRINT ALL OCTAL SJERROR TABLE ITEM FOR ERROR MESSAGE 41 EM41 DHS DT4 0 ;ERROR TABLE :"'RCVR FALSE INTERRUPTTM ;" (PC) (LPRG) TESTTM ;SERRPC,STMPO,STAP2 ;PRINT ALL OCYAL ITEM FOR ERROR MESSAGE 42 EM42 ;'SILO OVERFLOW ERROR'’ DT4 0 ;SERRPC,$TRPO,$THP2 JPRINT ALL OCTAL DHS5 ;" (PC) (LPRG) TESTTM ;ERROR TABLE ITEM FOR ERROR MESSAGE 43 EM43 DH2 DT2 0 ;''SILO OVERFLOW FAILED TO GENERATE RCVR INTERRUPT'' ;U (PCY (PS) (SP) TEST DEVADR REGADR WAS S/B " ;SERRPC,$TMPO,SREGH, SREGO, SREG1,SREG2. SREG3, SREGS ;PRINT ALL OCTAL (ZDHM-D-0 (20WMD . P11 MACY11 S0A(1052) 09-MAR-78 15:32 10-MAR-78 JERROR TABLE Em4s DH2 D12 0 ;ERROR TABLE EM4S DH2 D12 0 ;ERROR TABLE 08:05 PAGE 29 SEQ 0027 SEQ 0026 [TEM FOR ERROR MESSAGE 44 ;'NON EX MEMORY FAILED TO GENFRATE ;U (PC)Y (PS) (SP) TEST DEVADR XMITTR REGADR INTERRUPT’ WAS S/B ;SERRPC,$TAPO,SREGS ,SREGO,SREGT ,SREG2,SREG3, SREGS ;PRINT ALL OCTAL ITEM FCR ERROR MESSAGE 45 ;'XRIT DONE FAILED TO GENERATE XMITTR INTERRUPTTM JU(PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ;SERRPC,$TMPO,SREGH,SREGO, SREGT ,SREGZ, SREG3, SREGS PRINT ALL OCTAL ITEM fOR EKROR MESSAGE 46 EM46 DH10 :'CURRENT ADDRESS MEMORY PATTERNS TEST ERROR - LINE # ;" (PC) LINEWR PATTIRN TEST DEVADR REGADR WAS 0 sPRINT ALL OCTAL D15 SERRPC,$TMPO,$TMP1 ,SREGO,SREG? ,SREG2,SREG3, SREGS <8 ’ ;ERROR TABLE ITEM FOR ERROR MESSAGE 47 EM47 DH10 p1S 0 , ;ERROR TABLE EMSG DH2 DT? 0 .ERROR TABLE EMS1 DM DTS 0 ERROR TABLE :BYTE COUNT MEMORY PATTERNS TEST ERROR - LINE # : (PC) LINEWR PATTIRN TEST DEVADR REGADR WAS sSERRPC,$TRPO,STAP1,SREGD,SREGT ,SREG2.SREGY,SREGS JPRINT ALL OCTAL ITEM FOR ERROR MESSAGE SO UTEST TIMEOUT WAITING FOR XMIT DONE - LINE # ' PC) (PS) (SP) TEST DEVADR REGADR WAS JU'SERRPC.,S$TMPO,SREGH , SREGO,SREGY ,$REG2, SREG?Y, SREGSTM :PRINT ALL S/B" OCTAL ITEM FOR ERROR MESSAGE 51 ;"'NPR LOGIC TEST 2 ERROR" JU(PCY LINACT LINCHK TEST DEVADR REGADR SERRPC.,STMPC,$TMPY SREGOD,SREGT,SREG2 ,SREGS, SREGL' SJPRINT ALL OCTAL ITEM FOR ERROR MESSAGE WAS S/ 52 EMS? DH2 ;''BASIC DATA COMPARE ERROR ;T (PC) PS) (SP) TEST 0 ;PRINT ALL Dre /8" DEVADR REGADR SERRPC ,$TMPO.SREGSH, SREGO, SREGT ,SREGZ, SREGS, $REG4 OfTAL wAS ] (ZOHA-D-0 CZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 30 SEQ 0028 SEQ 0027 ;ERROR TABLE ITEM FOR FRROR MESSAGE 53 EMS0 :"“TEST TIMEOUT WAITING FOR XMIT DONE - LINE # DH12 2 (PC) 0 *PRINT ALL OCTAL D12 SPEED (SP) TEST DEVADR REGADR :SERRPC,$TMPO, SREG6, SREGO, SREG1, SREG2, SREG3, SRE G4 WAS s/8" WAS S/Bnl :ERROR TABLE ITEM FOR ERROR MESSAGE 54 . EM22 OH12 D12 0 ;"'CHAR AVAIL FAILED TO SET ON TIME - LINE # 2 (PC) SPEED (SP) TEST DEVADR REGADR :$ERRPC,$TMPO, SREG6, SREGO, SREG1, SREG2, SREG3, SREG4 :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR EKROR MESSAGE 55 EM22 OH13 DT2 0 :"CHAR AVAIL FAILED TO SET ON TIME - LINE # ;" (PC) (PS) (SP) TEST DEVADR (CHRLNG SCRWAS :SERRPC,$TMPO, SREG6, SREGO, SREG1, SREG2, SREG3, SREG4 SCRS/BTM’ :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 56 EMS6 DH2 DT2 0 ;"'OVERRUN BIT FAILED TO SET - LINE # * : (PC) (PS) (SP) TEST DEVADR REGADR WAS :SERRPC,$TMPO,SREG6, SREGO, SREG1, SREG2, SREG3, SRE G4 ;PRINT ALL OCTAL S/B“ ;ERROR TABLE ITEM FOR ERROR MESSAGE 57 EMS? DH2 DT2 0 ;"'STORAGE OVERFLOW BIT FAILED - LINE # " : (PC) (PS) (SP) TEST DEVADR REGADR WAS :$ERRPC,$TMPO,SREG6, SREGO, SREG1, SREG2, SREG3, SRE G4 sPRINT ALL OCTAL s/8"" CZCHM-D-0 CZOKMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 3.1.3 10-MAR-78 08:05 PAGE 31 SEQ 0029 SEQ 0028 DATA HEADER MNEUMONIC DEFINITIONS ALL NUMBERS PRINTED AS ERROR DATA ARE (PC) ADDRESS OF (PS) (ONTENTS OF THE PSW AT (SP) CONTENTS OF THE TEST TEST NUMBER DFVADR DEVICE ADDRESS - 1ST ADDRESS IN THE SELECTED DH11 REGADR ADDRESS OF WAS WHAT s/8 WHAT THE DATA READ SHOULD HAVE BEEN SPEED THE ERROR CALL IN OCTAL THE (ERROR PC) TIME OF THE ERROR STACK POINTER AT THE TIME OF THE DH11 THE ERROR RFGISTER BEING TESTED THE ACTUAL DATA READ WAS (DH11 REG OR CORE LOC.) SPEED CODE IN THE '‘LPR' REG AT THE TIME OF THE ERROR REFER TO SECTION 5.2.3 FOR SPEED CODE TABLES TIMEB CONTENTS OF SOF TWARE COUNTER USED IN TIMING TESTS TIMEC CONTENTS OF SOFTWARE COUNTER USED IN TIMING TESTS NOTE:''TIMEB’'' SHOULD ALWAYS BE LESS THAN °“‘TIMEC" CHRLNG CHARACTER LENGTH CODE IN THE 'LPR'' AT THE TIME OF THE ERROR 00=5 BITS, 01=6 BITS, 02=7 BITS, 03= 8 BITS TRPPC CONTENTS OF THE PC (R7) OR RSVD INSTR TRAP. AT THE TRPPS CONTENTS OF THE TIME OF THE PSW AT OR RSVD INSTR TRAP. TIME OF A BUS ERROR A BUS ERROR (LPRG) CONTENTS OF THE "'LPR' REGISTER AT THE TIME OF THE ERROR LINACT FLAGS USED BY MULTI-LINE TESTS TO INDICATE LINES STILL ACTIVE WASADR CORE MEMORY ADDRESS OF THE "‘WAS'' DATA SBADR CORE MEMORY ADDRESS OF THE SCRWAS CONTENTS OF THE ''SCR'' REGISTER SCRS/B WHAT THE CONTENTS OF THE ''SCR'' REGISTER SHOULD HAVE BEEN LINCHK LINE NO. BEING CHECKED DURING ''CAR' AND ''BCR'' MEMORY TESTS LINEWR LINE NO. BEING WRITTEN INTO DURING '‘CAR'* AND ''BCR'' MEMORY TESTS PATTRN TEST PATTERN BEING WRITTEN INTO EITHER THE "'CAR' OR '‘BCR'' MEMORIES S/B DATA (ACTUAL DATA READ) (GOOD DATA) MACY11 30A(105¢) 09-MAR-78 15-32 3.2 10-MAR-78 08:05 SEQ 0030 SEQ 0029 PAGE 32 POWER FAIL PRINTOUT s 4 > e W - THE IF A POWER FAILURE OCCURS WHILE THE PROGRAM IS RUNNING, FOLLOWING PRINTOUT CCCURS: . .POHE R‘! ] AFTER THE PRINTOUT THE PROGRAM WILL BE RESTARTED AUTOMATICALLY FROM THE BEGINNING. NO ATTEMPT IS MADE TO CONTINUE THE PKOGRAM FROM THE POINT OF THE POGWER FAIL INTERRUPTION. 3.3 ERROR HALTS A. SYSMAC ERROR SERVICE ROUTINE HALT WHEN SR15=1 A ""HALT'' IS EXECUTED IN THE SYSMAC ERROR UTILITY AFTER THE ERROR TYPEQUT. TO RESUME TESTING FROM THE POINT OF THE ''HALT'' SIMPLY DEPRESS CONTINUE. B. POWER FAIL HALT WHEN A POWER DOWN IS DETECTED, THE PROGRAM HALTS IN THE POWER FAIL UTILITY ROUTINE. IF FOR SOME REASON THE AUTO-START FEATURE FAILS TO RESTART THE PROGRAM, THE PROGRAM WILL ‘“'LOCK'® ON THIS HALT IF CONTINUE IS DEPRESSED. IN THIS CASE THE PROGRAM MUST BE RESTARTED. C. TRAP CATCHER HALTS ALL INACTIVE VECTORS ARE PDP11 SET UP WITH THE TRAP CATCHER AS DESCRIBED BELOW: STANDARD VN / VN#2 VUN+2/ HALT IF A TRAP OR INTERRUPT OCCURS TO .A VECTOR THAT HAS NOT BEEN SET UP BY THE TEST ROUTINE, A "HALT'' OCCURS IN THE VECTOR AREA. THE ADDRESS DISPLAY INDICATES WHICH VECTOR THE PROGRAM TRAPPED TO AND THE LAST ENTRY PUSHED ON TO THE STACK INDICATES WHERE THE PROGRAM WAS WHEN THE TP""TM OR INTERRUPT OCCURRED. L CZDHM-D-0 CZDHMD . P11 CZOHK-D-0 CZDHZD.P1 MACY11 30A(1052) 4.0 PERFORMANCE 4.1 PERFORMANCE REPORTS 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 33 SEQ 0031 SEQ 0030 AND PROGRESS REPORTS (NONE PROVIDED) 6.2 PROGRESS REPORTS A. WHEN THE PROGRAM TITLE MESSAGE: IS STARTED OR RESTARTED IT PRINTS THE ‘'CZDHM-"'X"" DH11 DIAGNOSTIC" WHERE ''X'' IS THE REVISION LEVEL LETTER DESIGNAT.ON. B. WHEN THE PROGRAM BEGINS TESTING ON EACH DH11 THE FOLLOWING MESSAGE: “TESTING DH11 #NN'"' WHERE 'NN'' IS THE DEVICE NO. C. IN OCTAL (00-17) WHEN THE PROGRAM COMPLETES A PASS LINES ON ALL SELECTED DH11°'S) "END PASS IT TYPES (TVESTED ALL SELECTED IT TYPES: #AXXAX"" WHERE "'X'' IS THE PASS COUNT IN DECIMAL. D. WHEN THE PROGRAM [S IN THE CONFIGURATION DIALOGUE (START AT 200, OR 210) AND SR8 AND SRO=1, THE PROGRAM WILL HALT AFTER ACCEPTING THE INPUT PARAMETERS AND TYPE THE FOLLOWING MESSAGE: "DEPRESS CONTINUE TO START TESTING" THE PURPOSE OF THIS HALT IS TO ALLOW THE USER TO DUMP THE UPDATED PROGRAM ON THE LOAD MEDIUM FOR NON-STANDARD CONFIGURATIONS. (SEE SECTION 2.2.2 AND 2.3.2) CZOHM-D-0 CIDOKMD . P11 10-MAR-78 MACY11 3CAC1052) 5.0 DH11 DEVICE 09-MAR-78 15:32 L PAGE 34 SEQ 0032 SEQ 0031 INFORMATION T T T 08:05 5.1 THE DH11 USES FLOATING ADDRESSES AND IS LOCATED AFTER DJ11'S IN THE FLOATING ADDRESS SPACE THAT BEGINS A THE DH11 HAS EIGHT REGISTERS, IT MUST BE ASSIGNED AN ADDRESS THAT IS A MULTIPLE OF 20 (OCTAL). SYSTEM SHOULD HAVE CONSECUTIVE ADDRESSES. BECAUSE EXAMPLE #1: 760 760 760 760 010 020 040 060 A SYSTEM WITH NO DJ11'S BUT TWO DH11°'S. CANNOT USE FOR DH11°'3 BECAUSE NOT MULTIPLE OF 0. FIRST DH11 SECOND DH11 DH11 GAP (INDICATES THAT THERE ARE NO MORE DH11'S). EXAMPLE #2: A SYSTEM WITH ONE DJ11, TWO DH11°'S: 760 010 FIRST DJNM 760 020 DJ11 GAP (INDJCATES 760 760 760 760 030 040 060 100 THAT THERE ARE NO MORE DJ11'S). CANNOT USE FOR DH11'S BECAUSE NOT MULTIPLE OF 20. FIRST DH11 SECOND DH11 DH11 GAP (INDICATES THAT THERE ARE NO MORE DH11'S). THE DH11 VECTORS (2) FOLLOW THOSE OF THE DJ11 IN THE FLOATING VECTOR SPACE THAT STARTS AT ADDRESS 300. AT 300 ARE USED IN THE FOLLOWING ORDER: DC11; KL11/DL11-A, B; DP11; DM11-A; DN11; DM11-BB; DR11-A; DRI1PA611 PUNCHES; DT11; THE RECEIVER VECTOR DX11; D, E; DH11. IS THE LOWER NUMBERED VECTOR. SELECTABLE BY MEANS OF 5.2 dL11-C, THE PRIORITY OF THE RECEIVER AND TRANSMITTER TWO STANDARD PDP11 PRIORITY JUMPER PLUGS. BR LEVEL 5 IS STANDARD. INTERRUFT REGISTER DEFINITION THE FOLLOWING SECTION DESCRIBES THE BIT ASSIGNMENTS WITHIN EACH REGISTER: BITS MARKED UNUSED AND WRITE O AS ZERO. ATTEMPTING TO WRITE INTO UNUSED OR READ ONLY BITS HAS NO EFFECT ON THOSE BITS. INIT REFERS TO T GENERATED BY THE PROCESSOR (E.G. UPON EXECUTION OF A RESET INSTRUCTION). TRANSMIT AND RECEIVE ARE WITH R CZDHM-D-0 CZ0HMD . P11 MACYT1 30A(1052) 09-MAR-78 15:32 5.2.1 10~-MAR-78 08:05 PAGE 35 SEa 0033 SEQ 2032 THE SYSTEM CONTROL REGISTER - ADDRESS Xx00 THE SYSTEM CONTROL REGISTER BITS DESCRIPTION 00-03 LINE IS A BYTE-ADDRESSABLE REGISTER. THE BIT ASSIGNMENT S AS FOLLOWS: SELECTION EACH OF THE 16 LINES SERVED BY THE DH11 HAS ITS OWN STORAGE FOR LINE PARAMETER INFORMATION, CURR BYTE COUNT. THESE STORAGE LOCATIONS ARE LOADED BY THE PROGRAM VIA THE LINE PARAMETER REGISTER, ( REGISTER, AND BYTE COUNT REGISTER, BUT THE HARDWARE MUST FIRST BE TOLD WHICH LINE IS TO HAVE ITS CURRENT ADDRESS, OR BYTE COUNT CHANGED. THIS ROUTING IS ACCOMPLISHED BY SETTING THE LINE SELECTI THE BINARY ADDRESS (0000-1111) OF THE DESIRED LINE. THESE BITS ARE READ/WRITE. 04, 05 MEMORY EXTENSION THE INFORMATION STORED IN THESE BITS BECOMES BITS 16 AND 17 RESPECTIVELY OF ANY CURRENT ADDRESS PROGRAM INTO THE CURRENT ADDRESS REGISTER. THESE BITS ARE READ/WRITE BUT, WHEN READ, REPRESENT O OF BITS 4 AND 5 OF THE SYSTEM CONTROL REGISTER, NOT THE STATUS OF ADDRESS BITS 16 AND 17 OF THE SEE THE SILO STATUS REGISTER FOR FURTHER INFORMATION. THIS ARRANGEMENT PERMITS SAVE THE CONTENTS OF THE SYSTEM CONTKOL REGISTER ACCURATELY. 06 RECEIVER INTERRUPT ENABLE THIS BIT, WHEN SET, 07 RECEIVER INTERRUPT SERVICE ENABLES RECEIVER INTERRUPTS (BIT 7) INTERRUPT THIS BIT, WHEN SET, INDICATES THAT THE NUMBER OF CHARACTERS STORED IN THE SILO EXCEEDS THE '‘ALAR SPECIFIED BY THE LOW BYTE OF THE SILO STATUS REGISTER. THIS BIT IS READ ONLY, EXCEPT IN MAINTENA WHERE IT IS READ/WRITE. SETVTING OF THIS BIT WILL GENERATE AN INTERRUPT REQUEST IF BIT 6 (ABOVE) IS ALSO SET. 08 CLEAR NON-EXISTENT MERMORY THIS BIT, WHEN SET, IS READ/WRITE. 09 INTERRUPT FLIP-FLOP (BIT 10) AND CLEARS ITSEL WHEN SET, PLACES THE DH11 IN MAINTENANCE MODE. NON-EXISTENT MEMORY THIS BIT NO SLAVE THIS BIT THIS BIT n CLEARS THE NON-EXISTENT MEMORY MAINTENANCE THIS BIT, 10 INTERRUPT IS SET WHENEVER THE NPR HARDWARE PLACES THE ADDRESSES OF A MEMORY LOCATION ON THE UNIBU ZYNC IS RECEIVED IN 20 S. THIS INDICATES THAT THE ADDRESSED LOCATION OR DEVICE DOES NOY CAUSES AN INTERRUPT REQUEST IF SET WHILE TRANSMITTER AND NON-EXISTENT MEMORY INTERRUPT IS READ ONLY, EXCEPT IN MAINTENANCE MODE, WHERE IT IS READ/WRITE. MASTER CLEAR THIS BIT, WHEN SET, GENERATES "INITIALIZE' WITHIN THE DH11, CLEARING THE SILO, EXACT BITS CLEARED ARE DISCUSSED IN THE SECTION ON INITIALIZATION. READ/WRITE. THE UARTS, AND TH CZDHM-D-0 CZDHPD . P11 MACY11 30A(1052) 09-MAR-78 15:32 12 10-MAR-78 STORAGE 08:05 PAGE 36 SEQ 0034 SEQ 0033 INVERRUPT ENABLE THIS BIT, WHEN SET, PERMITS THE SETTING OF BIT 13 14 TO GENERATE AN INTERRUPT REQUEST. THIS BIT TRANSMITTER AND NON-EX-MEM INTERRUPT ENABLE THIS BIT, WHEN SET, PERMITS THE SETTING OF BIT 10 OR 15 TO GENERATE AN INTERRUPY REQUEST. 14 STORAGE THIS BIT ]S SET WHEN THE TRANSMITTER THIS BIT THIS B INTERRUPT STORE THAT (HARACTER AN INTERRUPT REQUEST IT IS READ/WRITE. 15 IS RECEIVER SCANNER fINDS A RECEIVER HOLDING BUFFER WITH A CHARACTER IN IT IN THE SILO, AND CANNOT DO SO BECAUSE OF A LACK OF SPACE. WHEN SET THIS BIT If BIT 12 IS SET. THIS BIT IS READ ONLY, EXCEPT IN MAINTENANCE MODE, WHERE INTERRUPT IS SET WHEN THE DH11 CONCLUDES AN NPR CYCLE THAT INCREMENTED A BYTE COUNT TO ZERO, INDI CHARACTER IN A MESSAGE BUFFER WAS LOADED INTO A UART TRANSMITTER HOLDING REGISTER. THIS BIT WILL REQUFST IF BIT 13 1S SET. THIS BIT IS READ/WRITE. (IT IS SET DURING AN NPR (YCLE.) CZOHM-D-~0 CZDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 5.2.2 10-MAR-78 08:05 PAGE 37 SEQ 0035 SEQ 0034 NEXT RECEIVED CHARACTER REGISTER ADDRESS x02 - A - P D > WS P e A S BITS DESCRIPTION 00-07 NEXT RECEIVED CHARACTER - THESE BITS CONTAIN ThHE NEXT RECEIVED CHARACTER, 08-11 RIGHT JUSTIFIED. THE LEAST SIGNIFICANT BIT IS BI LINE NUMBER THESE BITS INDICATE THE LINE NUMBER ON WHICH THE NEXT RECEIVED CHARACTER WAS RECEIVED. BIT 8 LEAST SIGNIFICANT BIT. 12 PARITY ERROR THIS BIT 13 IS SET If THE PARITY OF THE RECEIVED CHARACTER DCES NOT AGREE WITH THAT DESIGNATED FOR FRAMING ERROR THIS BIT IS SET IF THE RECEIVER SAMPLES A LINE FOR THE FIRST STOP BIT, AND FINDS THE (LOGICAL 0). THIS CONDITION USUALLY INDICATES THE RECEPTION OF A BREAK. 14 IS LINE IN A S DATA OVERRUN THIS BIT IS SET WHEN THE RECEIVED CHARACTER WAS PRECEDED BY A CHARACTER THAT WAS LOST DUE TO THE RECEIVER SCANNER TO SERVICE THE UARY RECEIVER HOLDING BUFFER. REFER TO THE SECTION ON PROGRAMMIN FURTHER DETAILS ON DOUBLE~BUFFERED RECEPTION. 15 VALID DATA PRESENT THIS BIT INDICATES THAT THE DATA PRESENTED IN BITS 14-00 IS VALID. IT PERMITS A CHARACTER HANDLI CHARACTERS FROM THE SILO UNTIL IT IS EMPTY. THIS IS DONE BY READING THIS REGISTER AND CHECKING B IS OBTAINED FOR WHICH BIT 15 IS A ZERO. ONLY ON A WORD BASIS. THE ENTIRE NEXT RECEIVED CHARACTER REGISTER IS READ-ONLY CZDHM-D-0 CZDHMD .P11 MACY11 30A(1052) 09~-MAR-78 15:32 5.2.3 10-mMAR-78 08:05 PAGE 38 S€Q 0036 SEQ 0035 LINE PARAMETER REGISTER ADDRESS Xx04 THIS REGISTER SHOULD BE LOADED ONLY AFTER THE LINE SELECTION BITS OF LINE TO WHICH THESE PARAMETERS APPLY. THIS REGISTER IS WRITE ONLY. BITS DESCRIPTION 00-01 CHARACTER LENGTH - o an THE SYSTEM CONTROL REGISTER HAVE BE - .- --e-- THESE BITS SHOULD BE SET AS SHOWN TO RECEIVE AND TRANSMIT CHARACTERS OF THE LENGTH (EXCLUDING PA BIT 01 00 0 0 1 0 1 0 5 BIT 6 BI7 7 BIT LI 02 8 BIT TWO STOP BITS THIS BIT, WHEN SET, CONDITIONS A LINE TRANSMITTING WITH 6, 7, OR 8-BIT CODE TO TRANSMIT CHARACTE MARKS. IF THE LINE IS TRANSMITTING 5-BIT CODE, ASSERTION OF THIS BIT CAUSES THE CHARACTERS TO BE 1.5 STOP MARKS. IF THIS BIT IS NOT ASSERTED, 1 STOP MARK IS SENT. 03 NOT USED 04 PARITY ENABLED IF THIS BIT IS SET, CHARACTERS TRANSMITTED ON THIS LINE WILL HAVE AN APPROPRIATE PARITY BIT AFF] RECEIVED ON THIS LINE WILL HAVE THEIR PARITY CHECKED. 05 0DD PARITY IF THIS BIT AND BIT 4 ARE SET, CHARACTERS OF ODD PARITY WILL BE GENERATED ON THIS LINE AND INCOM WILL BE EXPECTED TO HAVE ODD PARITY. IF THIS BIT IS NOT SET, BUT BIT & [S SET, (HARACTERS OF GENERATED ON THIS LINE AND INCOMING CHARACTERS WIiL BE EXPECTED TO HAVE EVEN PARITY. OF 06-09 THIS BIT IS IMMATERIAL. IF BIT 4 EVE IS RECEIVER SPEED THE STATE OF THESE BITS DETERMINES THE OPERATING SPEED FOR THIS LINE'S RECEIVER. THE SPEED TABLE BELOW IS APPLICABLE. 10-13 TRANSMITTER SPEED THE STATE OF THESE BITS DETERMINES THE OPERATING SPEED FOR THIS | INE'S TRANSMITTER. THE SPEED TABLE ON THE NEXT PAGE IS APPLICABLE. CZDHA-D-0 CZDHMD.P1 MACYT1 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0037 SEQ 0036 PAGE 39 SPEED TABLE FOR RECEIVER AND TRANSMITTER SPEEDS: BIT TRANSMITTER 13 12 1 10 RECEIVER 9 8 I4 6 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 ZERO BAUD 50 BAUDS 75 BAUDS 110 BAUDS 134.5 BAUDS 1 1 1 1 1 0 0 0 1 1 0 1 1 0 0 1 0 1 0 1 1200 1800 2400 4800 9600 0 0 0 1 1 1 1 0 1 1 14 HALF 0 1 1 0 1 1 1 1 1 0 1 0 0 1 150 200 300 600 BAUDS BAUDS BAUDS BAUDS BAUDS BAUDS BAUDS BAUDS BAUDS EXTERNAL EXTERNAL INPUT A INPUT B DUPLEX/FULL DUPLEX IF THIS BIT IS SET, THIS LINE WILL OPERATE IN FULL-DUPLEX MODE. IN HALF-DUPLEX MODE. IF NOT SET, THIS LINE WILL OPERA IN THIS APPLICATION HALF-DUPLEX MEANS THAT THE DH11 RECEIVER IS BLINDED DURING TRANSMISSION OF A 15 AUTO-ECHC ENABLE WHEN THIS BIT IS SET, FURTHER DETAILS. CHARACTERS RECEIVE ON THIS LINE wILL BE HARDWARE ECHOED. SEE THE DISCUSSI CZOKR-D-0 CZ0A4AMD .1 MACY11 30A(1052) 09-MAR-78 15:32 5.2.4 10-MAR-78 08:05 PAGE 40 SEQ 0038 SEQ 0037 CURRENT ADDRESS REGISTER ADDRESS X06 THIS REGISTER SHOULD BE LOADED ONLY AFTER THE SYSTEM CONTROL REGISTER (SCR) HAS HAD THE APPROPRIATE BITS DESIRED I.INE NUMBER. WHEN THIS REGISTER IS LOADED, ADDRESS BITS 00-15 ARE TRANSFERRED INTO SEMICONDUCTOR MEMORIES IN THE DH11 FROM BITS 00-15 OF THIS REGISTER. ADDRESS BITS 16~17 ARE TRANSFERRED INTO SFMICONDU MEMORIES IN THE DH11 FROM BITS 4-5 OF THE SYSTEM CONTROL REGISTER. INTERRUPTS MUST BE INHIBITED OR THE SCR SAVED BETWEEN THE SETTING OF THE SCR BITS 0-3 AND THE READ 2/ WR ADDRESS REGISTER. WHEN THIS REGISTER IS READ, IT WILL INDICATE THE CURRENY ADDRESS OF THE LINE SELECTED BY THE SYSTEM (ONT BITS 16 AND 17 WILL APPEAR IN THE SILO STATUS REGISTER, BITS 6 AND 7. 5.2.5 BYTE COUNT REGISTER ADDKESS X10 P Y T T T T Y T Y T L L Y IN THE SAME FASHION AS THE LINE PARAMETER AND CURRENT ADDRESS REGISTERS, THIS REGISTER SHOULD NOT BE LOA FIRSYT SELECTING A LINE NUMBER BY. MEANS OF THE LOWER-ORDER FOUR BITS OF THE SYSTEM CONTROL REGiISTER. THIS %gAgERD’I;?T;HE TUO0'S COMPLEMENT OF THE NUMBER OF CHARACTERS (BYTES) TO BE TRANSMITTED ON THAT LIME. THE | . INTERRUPTS MUST BE INHIBITED OR THE SCR SAVED BETWEEN THE SETTING OF THE SCR BITS 0-3 AND THE READ OR WR COUNT REGISTER 5.2.6 BUFFER ACTIVE REGISTER (BAR) ADDRESS X12 THIS REGISTER CONTAINS ONE BIT FOR EACH LINE. THE BITS ARE INDIVIDUALLY SET USING BIS INSTRUCTIONS. SETT TRANSMISSION ON THE ASSOCIATED LINE. THE BIT IS CLEARED BY THE HARDWARE WHEN THE LAST CHARACTER TG BE TR IS LOADED INTO THE TRANSMITTER DATA HOLDING REGISTER OF THE UART FOR THIAT LINE. IT SHOULD BE NOTED THAT THE CLEARING OF A BAR DOES INDICATE THAT A MESSAGE MAY BE SENT, IT DOES NOT INDICATE THATY THE LAST CHARA FROM THE PRECEDING MESSAGE HAVE BEEN COMPLETELY SENT. SPECIFICALLY, TWO MORE CHARACTERS WILL BE SENT AFT BIT CLEARS. THESE ARE THE LAST TWO CHARACTERS OF THE MESSAGE; ONE OF THEM WAS JUST STARTING WHEN THE BAR AND ONE WAS THAT FINAL CHARACTER THAT WAS LOADED INTO THE HOLDING REGISTER, THUS CLEARING THE BAR BIT. T IS A NORMAL CONSEQUENCE GF DOUBLE-BUFFERED TRANSMISSION AND IS MENTIONED HERE FOR THE SENEFIT OF PROGRAM WANT TO WRITE PROGRAMS THAT CONTROL SUCH MODEM LEADS ARE REQUEST TO SEND. REQUEST TO SEND (RTS) ShOULD N DROPPED UNTIL AT LEAST TWO CHARACTER TIMES AFTER THE BAR BIT FOR A GIVEN LINE CLEARS. THIS TIMING MAY BE EFFECTED BY SENDING TWO EXTRA (NULL) CHARACTERS IN A MESSAGE AND DROPPING RTS WHEN BA CLEARING A BAR BIT SHOULD NOT BE USED YO ABORT TRANSMISSION ON A LINE. RATHER, THE 8YTE COUNV FOR THAT L TO ZERO. 5.2.7 THE BUFFER ACTIVE REGISTER BITS ARE READ/WRITE. BREAK CONTROL REGISTER ADDRESS X14 THIS REGISTER CONTAINS ONE BIT FOR EACH LINE. SETTING A BIT IN THIS REGISTER WILL IMMEDIATELY GENERATE A ON THE LINE CORRESPONDING TO THAT BIT NUMBER. CLEARING THE BIT WILL TERMINATE THE BREAK CONDITION. THE 8 MAY BE TIMED BY SENDING CHARACTERS DURING THE BREAK INTERVAL, SINCE THESE CHARACTERS WILL NEVER ACTUALLY FURTHER COMMENTS CONCERNING THE TRANSMISSION OF BREAK SIGNALS MAY BE FOUND IN THE BREAK SIGNALS SECTION. CIDHA-D-0 CZDHAD . P11 MACY11 30A(1052) 09-MAR-78 15:32 5.2.8 10-MAR-78 08:05 PAGE 41 SEQ 0C39 SEQ 0038 SILO STATUS REGISTER ADDRESS X16 THIS REGISTER IS ACTUALLY 811 DESCRIPTION 00-05 SILO ALARM LEVEL -—-- TWO BYTE~SIZED REGISTERS. THE BIT ASSIGNMENTS ARE: cocomoeee-- THE PROGRAM MAY LOAD AN INTEGRAL POWER OF 2 BETWEEN { AND 63 INTO THIS LOCATION (E.G., 0, 1, 2, WHEN THE NUMBER OF CHARACTERS STORED IN THE SILO EXCEEDS THAT NUMBER, AN INTERRUPT REQUEST (SYST REGISTER BIT 7) IS GENERATED, If SYSTEM CONTROL REGISTER BIT 6 IS SET. THESE BITS ARE READ/WRITE 06-07 READ EXTENDED MEMORY THESE BITS ARE READ ONLY AND CONTAIN THE A16 AND A17 BITS OF SELECTION BITS OF THE SYSTEM CONTROL REGISTER ARE POINTING. 08-13 THE CURRENT LINE ADDRESS WHICH THE SILO FILL LEVEL THESE BITS ARE AN UP-DOWN COUNTER THAT INDICAYES THE ACTUAL NUMBER OF CHARACTERS IN THE SILO. [T BE NCTED THAT THERE ARE SIX BITS, HENCE NUMBERS BETWEEN O AND 63 CAN BE REPRESENTED. A FULL SILO ENTRIES AND THE FILL LEVEL APPEARS AS 00000, BUT ONE MAY EASILY TELL THE DIFFERENCE BETWEEN AN E Sit0 (00000) AND A FULL SILO (00000) BY CHECKING THE STORAGE 7 (ERFLOW BIT (BIT 14 OF SYSTER (ONT YHESE BITS ARE RFAD ONLY, MACY1Y 30A(1052) 09-MAR-78 15:32 5.3 DH11 10-MAR-78 (8-05 SEQ 0040 SEQ 0039 PAGE &2 FUNCTJONAL LOGIC PARTITIONING MODULES THIS SECTION LISTS ALL OF THE PRINTS FOR ALL OF THE !N THE DH11 SUBSYSTEM. [T BRIEFLY SUMMARIZES THE FUNCTIONAL LOGIC DESCRIBED ON EACH PRINT, THIS INFORR- ATION MAY PROVE USEFUL FOR A MODULE OR (HIP REPLACEMENT GUIDE WHEN THE TUNCTTIONAL AREA OF LOGIC THAT IS FAULTY IS KNOWN TO BE INTERMITTENTLY FAILING. M7277 CURRENT ADDR REG MEMORY AND ADDR SELECY sraendeResRRRRSRRRRARRORRRRRRRORCOEROARCOCCRRROCROERNRCSERCERNTSE SH3: CONTROL STROBE MUX FOR THE "'LPR'' REGISTER TRANSMITTER DATA MUX WITH AUTO-ECHO CONTROL LOGIC SELECTION MSYN / DH1Y SHG - SSYN TIRING CHAIN MASTER CLEAR 10GIC UNIBUS ADDRESS SELECTYION LOGIC WITH JUMPERS TRANSMITTER SCAN COUNTER WITH MULTIPLEXOR (BAK N * TBMY N) SHS BYTE XMITTER STATUS COUNT AND CURRENT ADORESS MEMORY WRITE TIMING LOGIC CURRENT ADDRESS MEMORY LOGL'C BITS<17:08> UNIBUS ADDRESS DRIVERS BITS <17:08> SH6: BYTE COUNT AND CURRENT ADDRESS MERMORY ADDRESS SELECT MULTIPLEXOR CURRENT ADDRESS MEMORY {OGIC FOR BITS <07:00> UNIBUS ADDRESS DRIVERS FOR BITS <07:00> TRANSMITTER M7279 EVEN/ODD BYTE DATA MULTIPLEXOR F1F0 BUFFER TerertTeEeRRRERRRRRNS SH1: INPUT DATA MULTIPLEXOR FOR SILO MEMORY SHZ: SILO MEMORY (HIPS (FQOUR 64 X & (HIPS) SILO MEMORY READ/WRITE "'SSR'’ REGISTER SILC ALARM LEVEL TIMING LOGIC BITS <13:08> (OMPARATOR (afal (IOHA-D-Y (IDHRL P11 (IDHM-D-0 CZOWMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 43 RECEIVED ''DATA READY'' STATUS FLAG SEQ 0041 SEQ 0040 (ZOKM-D-0 CZDHMD.P11 MACYT1 30A(1052) 09-MAR-78 15:32 M7288 10-MAR-78 08:05 SEQ 0042 SEQ 0041 PAGE 44 LINE PARAMETER CONTROL 2222222222222 2RARR222RRRdRRR ] 2 SH3: CLOCK TIMING SIGNAL BUFFERS SHéG: TRANSMITTER CLOCK SELECTION MULTIPLEXORS : SHS RECEIVER CLOCK SELECTION MULTIPLEXORS LINES <03:00> AUTO ECHO AND HALF DUPLEX CONTROL LINES<03:00> SH6: TRANSMITTER CLOCK SELECTION MULTIPLEXORS SH7: RECEIVER CLOCK SELECTION MULTIPLEXORS LINFS<03:00> LIMES<07:04> LINES <07:04> AUTO ECHO AND HALF DUPLEX CONTROL LINES <C7:04> SH8: TRANSMITTER CLOCK SELECTION MULTIPLEXORS LINES<11:08> SH9: RECEIVER CLOCK SELECTION MULTIPLEXORS LINES <11:08> AUTO ECHC AND HALF DUPLEX CONTROL LINES <i11:08> SH10: TRANSMITTER CLOCK SELECTION MULTIPLEXORS LINES<15:12> SH11: RECEIVER CLOCK SELECTIGN MULTIPLEXORS LINES <15:12> AUTO ECHO AND HALF DUPLEX CONTROL LINES <15:12> MULTIPLE UART CARD FOR LINES <0-7> M7280 #1 1322222202203 02 02 SHZ: 220202220080 00d2 UART CHIPS 88002002 RR200R 2] 4] BIT<1:0> RECEIVER SCAN MULTIPLEXORS 5H3: UART CHIPS BIT<3:2> SH&4: UART CHIPS BIT<5:4> (CLR R DONE, STB RD, MASTER DA, AND MASTER OR) RECEIVER SCAN MULTIPLEEXORS (MASTER FE AND MASIER PE) SHS: UART CHIPS BIT<7:6> TRANSM:TTER SCAN MULTIPLEXOR =12 VOLT DC REGULATOR C20HM-D-0 CZDKMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 Mm7280 #2 IZ R 08:05 SEQ 0043 SEQ C042 PAGE 45 MULTIPLE UART CARD FOR LINES <8-15> X222 0222302222222 2203R02RR0RRcRRRRRRRRRRRESD] SH2: BIT<9:8> UART CHIPS RECEIVER SCAN MULTIPLEXORS SH3: UART CHIPS BIT<11:10> SH&: UART CHIPS BIT<13:12> (C'R R DONE, RECEIVER SCAN MULTIPLEEXORS SH5: SCAN MULTIPLEXOR -12 VOLT DC REGULATOR M7289 SYSTEM CONTROL AND RCVR SCAN (3282222223230 020080aR02000RR0RRRRAA SH3: TRANSMITTER AND RECEIVER SCAN LOGIC SH&4: TRANSMITTER AND RECEIVER SCAN TIMING SH5: HALF-DUPLEX CONTROL LOGIC UART DATA MULTIPLEXORS SH6: SYSTEM CONTROL REGISTER M4540 DC11 L SRS RRRSdR - DH11 CLOCK 220280200 d 02 SH1: CRYSTAL OSCILLATOR AND FREQUENCY DIVIDERS M796 UNIBUS MASTER CONTROL 138232830200 2080¢038 228223222321 SH1: M7281 NPR CONTROL LOGIC ¢ INTERRUPT CONTROL LAARRRRSRRRdRRRdiRRT2RRRRRd R “A"" SECTION: RECEIVER INTERRUPT CONTROL LOGIC "'B'" SECTION: TRANSMITTER INTERRUPT CONTROL LOGIC M7281 NPR CONTROL #2 LA A2220023RRRRARRRRRdR 2R R ] “A" SECTION: USED TO GAIN CONTROL OF ‘‘B'" SECTION: (NCT USED) THE BUS FOR NPR MASTER DA, AND MASTER PE) BIT<15:1&> UART CHIPS TRANSMITTER (MASTER FE STB RD, XFERS AND MASTER OR) CZOHM-D-0 CZOHMD.P11 MACY11 30A(1052) 10-MaR-78 09-MAR-78 15:32 M7278 PAGE 46 SEQ 0044 SEQ 0043 REGiSTER AND BYTE (URTRUL 2222223223223 SH3: 08:05 0230222RR020802RH0 0 CLEAR °*BAR’' REG MULTIPLEXOR RYTE COUNT MEMORY AND CONTROL - BITS<15:08> UNIBUS RECEIVERS SHG: BIT<1,:08> BYTE COUNT MEMORY AND CONTROL LOGIC UNIBUS DATA RECEIVERS SH5 - SH8: SHS: SH6: BIT<07:00> BIT<07:00> “BAR'', "BCR'', ''LPR'’, AND ''SSR’'' REGISTERS PLUS THE DATA OUIPUT MUX AND UNIBUS DRIVCRS FOR DATA LINES. BIT<15:12> BI1T<11:08> SH7: SH8: BIT<07:04> BIT<03:00> CZDHM-D-0 CZDHAD.P11 MACY11 30A(1052) 09-MAR-78 15:32 5.4 10-MAR-78 08:05 PAGE 47 SEQ 0045 SEQ 0044 DH11 MODULE ALLOCATION CHART VIEW FROM WIRING SIDE ROW A ) J ' i 3 0 M7821 ! M7277 ' ! ' (ABLE ! ‘ | | ! UNIBUS CONNECTOR (NOTE #3) ! | ! ! NPR (NTL ! L M796 ' ' ! leccsoees==- R i : ! ! UNIBUS ! MASTER LOUCNTL . 1 CGNTROL MUX LINES t ! ' ! b | ) i [} 1 D ! m7247 o LoMI0S ! M7360 ! M7288 ! ! ! : 1 1 ; t ADDRESS SELECTOR (NOTE #7) | ! Bttty M7246 ! 1 M97 . ! | (ABLE ! ! ! ! (NOTES #6 8 #9) ! ! . ! mM7280 Demmsnocoane- ! ! DATA CABLE ! { ] MULTIPLE 't © ! LINES 0-7 : ! i 1 UART ! ' MULTIPLE ! i LINES 8-15 | | UART ! ! ! i ! ! ] t t ] 1 [} ! ; ! ! ! ! § ' ' ! ! ............ ] ; ! ' ! ! ! ! ! . | ! ! s i i ' ' i i e . E i ] ! ! . ! i ! t ) ) : i i ' : : i ] i ! FIFO BUFFER R ! : ! meemmmm———e : ! ) M7279 ' i I . ! e ; ' . | . i ! ? i | E L ; 3 b I ! ] i ! ! ! m7280 ' i J i | t ! 1 1 i i i mmmmmmmma e mmmmmmmn ! E ot UNIBUS CONNECTOR (NOTES #1) 8 #2) ' ; i ! B CLOCK (NOTE #5) ! . ' ! | Ng I | . EXTERNAL CABLE lcconseecsenee | . t : R E T ........... i [} . I fi ] N [} (NOTE #7) R ! ' PRIORITY SELECTOR (NOTE #9) lacecnaccacaes locccccaavese i LINE PARAMETER CNTL M920 ! | | ' lemcccsmcncelcacacanaanaa! : ! s | S [} ! ' ! ! t INTR CNTL : ! CONTROL SCAN ------ |-----------! i ' ; (NOTES #4)! L7821 i ! . ' : ! feomoooocoaen 1 ! M5 ' 9 el ] ! N . ! ! ; INTR CNTL 3 e ! ' ! ! ! : ! ! 1 SYSTEM (NTL 8 RCV SCAN 3 . . | ' L t MUX LINES 0-7 (NOTE #8) M7821 . ! ! M7289 : i | S | S, ) ! . CONTROL ! ------ R ¢ . i e | emmmmmeam i ...... i F ! ! o 115 ' (NOTE #7) ' 8 —ceescseccsew | S 1 ' ' ' ! ' ! 7 : ! | ! ' ! CURRENT ADDRS 8 "ADDRS ' b6 bt ] ! ! M7287 i 1S : s ; emmm ! ! ! | | ! t ' ! 4 ! REG 8 BYTE CNT sLoT t | ! LOM7247 E ! ! i ' lececccccaaa) ------ R C ! M920 } ! 2 { ------ | B ] L M40S ! ............ I ' i ! EXTERNAL A _CLOCK (NOTE #5) !------------ L MeS540 i ! ............ i lecomeemaneen ! . s ; ] ' DH11 DC1Y L CLOCK CZDHM-D-0 CZOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 - 10-MAR-78 - A > S - 08:05 n A S T PAGE 48 A R T N FIGURT 1. 2. IF END OF BUS, SEQ 0046 SEQ 0045 S G 2-4 R L S DH11 N R T W S MODULE R L e G e S G T R R PAGE 2 REPLACE M920 WITH M330. IF LAST UNIT IN BASIC BOX, REPLACE M920 WITH BC11A CABLE WHEN EXPANDING TO PERIPHERAL BOX. 1F FIRST UNIT IN EXPANDER BOX, REPLACE M920 WITH BC11A CABLE. 4. EOQ2 MUST BE G727 GRANT CONTINUITY [F MODEM CONTROL MODULE IS NOT INSTALLED. « DENOTES MODEM CONTROL OPTION, WITH DH11-AA OR AC. 5. MODULE SLOTS PROVIDE SET FOR ADDITIONAL CLOCK RATES. FOR DIAGNOSTIC CHECKOUT OF DH11-AA, AB, OR AC, REPLACES WITH M974. SLOT M971 7. THIS CONTAINS MODEM CONTROL MODULE M7807 WITH DH11-AD. 8. THIS SLOT CONTAINS MODEM CONTROL MODULE M7808 WITH DH11-AD. 9. THIS SLOT CONTAINS EIA CONVERTER AND FOR DH11-AD OR AE. PRIORITY R Gp e S e G e W UTILIZATION DIAGRAM 3. 6. R W MODULE TMM5906 Gr L M S AR+ R e S P e D P R T e - CIOHM-D~0 P11 CIDH.MD MACY11 30A(1052) 09-MAR-78 15:32 6.0 10-MAR-78 MAINTENANCE - - 08:05 SEQ 0047 SEQ 0046 PAGE 49 PROCEDURES - - . - - - 6.1 THIS SECTION DESCRIBES HOW TO USE CZDHRM AS A TROUBLESHONTING TOOL. IT OUTLINES SOME PRELIMINARY CHECKS TO MAKE SEFORE STARTING DETAILED DEBUG PROCEDURES. IT ATTEMPTS TO PROVIDE THE USER WITH SUGGESTIONS FOR PROCEEDING FROM THE ERROR PRINTOUT TO DETAILED ISOLATION OF THE FAULT. 6.2 PRELIMiNARY -t a A. TO w VISUAL INSPECTION PERFORM A VISUAL INSURE THAT: 1) 2) 3) B. CHECKS ———-—-- INSPECTION OF THE DH11 SUBSYSTEM ALL MODULES ARE INSTALLED IN THEIR PROPER SLOTS (REFER TO PARA 5.3) AND ARE PROPERLY SEATED. THE CABLING IS CORRECT AND ALL CABLE CONNECTORS ARE FIRMLY SEATED. THE REQUIRED MAINTENANCE INSTALLED. CONNECTORS ARE PROPERLY (REFER TO SECTION 6.3) POWER CHE(KS USE A SCOPE TO CHECK THE FOLLOWING POWER SUPPLY AND CONTROL STGNALS ON THE DH11 BACKPLANE: +15 vb( =15 vDC +5 vDC GRAY WIRE BLUE WIRE RED WIRE AC LO 0C LO YELLOW WIRE PURPLE WIKE NOTES: WUSE THE BLACK WIRE FOR GROUND REFERENCE "AC LO'" AND ‘'DC LO'' SHOULD BOTH BE ''HIGH'' "'LOW'" GOING GLITCHES ON THESE LINES CAN CAUSE UNUSUAL AND SUBTLE SYMPTOMS. 6.3 MAINTENANCE CONNECTORS MOST OF THE TESTS IN MD-DZDHM USE HARDWARE DIAGNOSTIC AIDS TO TURN THE DATA AROUND. THESE AIDS REQUIRE THAT THE USER INSTALL SPECIFIC TURNAROUND CONNECTORS OR MODULES BEFORE RUNNING THE PROGRAM. DEPENDENT UPON THE SPECIFIC DH11 CONFIGURATION AND THE TYPE OF TESTING DESIRED, CERTAIN MAINTENANCE AIDS MUST BE INSTALLED AS OUTLINED BELOW: CZDHM-0-0 CICHMD . P11 MACY'1 30A(1052) 09-MAR-78 15:32 A. 10-MAR-78 DH11-AA, 1) 08:05 PAGE 50 SEQ 0048 SEQ 0047 AB, OR AC CONFIGURATIONS TESTING LOGIC FOR ALL LINES WITHOUT DATA CABLES OR LEVEL CCNVERTERS. A. REMOVE THE DATA CABLE FROM SLOT B7 IN EACH B. 2) DH11 TO BE TESTED. INSTALL AN M974 MAINT JUMPER MODULE SLOT B7 OF EACH DH11 TO BE TESTED. INTO TESTING ALL 16. LINEC INCLUDING DATA CABLFS WHICH CONNECT TO DISTRIBUTION PANEL. DOES NOT TEST LEVEL CONVERTER CIRCUITS LOCATED IN DISTRIBUTION PANEL. A. 3) TESTING ONE OR MORE SINGLE LINES INCLUDING EIA LEVEL CONVERTERS AND DEVICE CABLES WHICH ARE NOT TESTED IN 1 AND 2 ABOVE. A. B. INSTALL THE M974 MAINT JUMPER MODULE INTO SLOT B3 OF THE MULTIPLEXOR DISTRIBUTION PANEL FOR EACH OH11 TO BE TESTED. ALL LEVEL CONVERTERS IN THE DISTRIBUTION PANEL MUST BE REMOVED FOR THIS TEST. INSTALL AN H315 TEST CONNECTOR AT THE END OF DEVICE CABLE FOR EACH LINE TO BE TESTED. THE DH11-AD CONFIGURATION 1. TESTING ALL A. LINES WITHOUT DATA CABLES DISCONNECT THE DATA CABLES (2) CONNECTORS ON THE M5906 MODULE THE DH11 2. 16. BACKPLANE. FROM THE TWO (SLOT AB7 OF B. INSTALL TWO H8611 C. IF MODEM CONTROL SECTION IS TO BE TESTED, DISCONNECT 4 BCOBR CABLES FROM DISTRIBUTION PANEL AND CONNECT CABLES TO HB861 TURNAROUND CONNECTOR. IN PLACE OF TESTING ONE OR MORE A. B. NOTE: TEST CONNECTORS ON THE M5906 THE CABLES. SINGLE LINES INCLUDING DATA CABLES DISCONNECT THE DEVICE CABLE FROM THE DH11-AD DISTRIBUTION PANEL FOR EACH LINE TO BE TESTED. INSTALL AN H315 TEST CONNECTOR IN ITS PLACE ON THE DH11-AD DISTRIBUTION PANEL. TO TEST THE DEVICE CABLE AS WELL, INSTALL THE H315 TEST CONNECTOR AT THE END OF THE CZDHM-DD CZDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 51 DtVICE CABLE AND LEAVE THE DEVICE CABLE CONNECTED TO THE DISTRIBUTION PANEL. SEQ 0049 SEQ 0048 CIDHM-D-0 CZDHML . P MACY11 30A(1052) 09-MAR-78 15:32 6.4 10-MAR-78 08:05 SUBSYSTEM COMPLETE DH1. PAGE 52 SEQ 0050 SEQ 0049 CHECKOUT COMPLETE DH11 SUB-SYSTEM VERIFICATION INVOLVES RUNNING THE FOLLOWING PROGRAMS IN THE SEQUENCE SUGGESTED: A. CIDHM DH11 DIAGNOSTIC LOAD AND RUN THE BASIC DIAGNOSTIC CONFIGURED TO TEST ALL 16. LINES ON ALL DH11'S INSTALLED IN THE ALLOW [7 TO COMPLETE AT LEAST TWO COMPLETE PASSES. PASS IS A QUICK VERIFY WITHOUT SUB-TEST SYSTEM AND (THE FIRST ITERATIONS AND THE SECOND PASS INCLUDES SUB-TEST ITERATIONS). IF ANY ERRORS ARE REPORTED, STOP HERE, AND REFER TO PARA 6.5 FOR SUBSEQUENT PRCCEDURES. 8. CIZDHN DATA RELIABILITY TEST LOAD AND RUN THE DATA RELIABILITY SUB-PROGRAM Of CZDHN CONFIGURED TO TEST ALL 16. LINES ON ALL DH11'S INSTALLED IN THE SYSTEM AND ALLOW IT TO COMPLETE AT LEAST ONE PASS WITH SRO7=0 (QUICK TEST MODE). IN THIS MODE ONE PASS TAKES APPROXIMATELY 5 MINUTES. [IF ANY ERRORS ARE REPORTED, REFER TO THE DOCUMENTATION FOR CZDHN FOR SUBSEQUFNT PROCEDURES. FOR MORE COMPLETE DATA RELIABILITY TESTING ,THE PROGRAM MAY BE RUN WITH SRO7=1 (COMPLETE TEST) BUT THIS WILL REQUIRE A RUN TIME OF APPROX 15. MINUTES FOR EACH SE%E%TESNEINE, NIGH C. SO IN MOST CASES IT IS ONLY USED FOR OVER- . SYSTEMS EXERCISER "DHAX"' EXERCISER MODULE WHERE °''X"' DESIGNATES THE REVISION LEVEL IN USE. ASSUMING THAT BOTH THE DIAGNOSYIC AND THE DATA RELIABILITY INDICATE ERROR FREE PERFORMANCE, THE FINAL STEP IS TO RUN THE SYSTEM'S EXERCISER PROGRAM THAT INCLUDES A DH11 EXERCISER MODULE. TAIS IS NECESSARY TO DETECY CERTAIN CLASSES OF BUS PROBLEMS THAT ONLY MANIFEST THEMSELVES WHEN ;:E gH;}E;S RUN CONCURRENTLY WITH ALL THE OTHER DEVICES IN Y IF ALL TESTS UP TO THIS POINT INDICATE ERROR FREE PERFORMANCE OF THE DH11, THE SUB~SYSTEM SHOULD BE CAPABLE OF RUNNING SYSTEM SOFTWARE. HOWEVER, CERTAIN SUBTLE OR THERE ARE, INTERMITTENY PROBLEMS THAT COULD STILL CAUSE THE DH11 SUB-SYSTEM TO FAIL IN THE OPERATING SYSTEM ENVIRONMENT. IN THESE RARE CASES, THE USER WILL HAVE TO USE THE SYMPTOMS GATHERED FROM THE FAILING MODE TO ISOLATE THE PROBLEM. ONCE A SYMPTOM IS RECOGNIZED, THE TWO OTHER PROGRAMS IN CZDHN, THE ECHO TEST AND THE DATA PATTERNS/CABLE TESTS MAY CIDHM-D-0 CIDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0051 SEQ 0050 PAGE 53 PROVE USEFUL AS A TROUBLESHOOTING AID PROBLEM FOR FAULT JSOLATION. TO DUPLICATE THE CZDHR-D-0 D . P11 CZDHM MACY11 30A(1052) 09-MAR-78 15:32 6.5 7i0-MAR-78 08:05 PAGE 54 SEQ 0052 SFQ 9051 MAINTENANCE HEADER DESCRIPTION EACH TEST IN THE LISTING IS PREFACED BY A STANDARD MAINTENANCE HEADER TO PROVIDE INFORMATION THAT WILL FACILITATE RAPID ISOLATION OF THE FAULT THAT CAUSED A PARTICULAR TEST TO FALL. EsCH HEADER HAS THE SAME FORMAT (SEE EXAMPLE BELOW) AS FOLLOWS: TEST ABSTRACT: THIS IS A CAPSULE SUMMARY OF WHAT THE ERRORS: LISTS THE PARTICULAR ERROR CALLS INVOKED BY THE TEST WHEN A FAULT IS DETECTED. (REFER :0 PARA 3.1.2 AND 3.1.3 FOR A DETAILED DESCRIPTION OF THE ERROR CALL INFORMATION) SYNC: LISTS ONE OR MORE SIGNALS THAT MAY BE USED TO SYNCHRONIZE THE OSCILLOSCOPE WHEN AN ERROR LOOP IS ESTABLISHED (SR09=1). FOR (M) SIGNALS USE (-) SLOPE TO TRIGGER ON THE TRAILING EDGE OF THE SIGNAL AND FOR (L) SIGNALS USE (+) SLOPE TO IGNED TO TEST AND HOW IT OPERATES. TEST IS DES- T<IGGER ON THE TRAILING EDGE. DEBUG: CONTAINS SUGGESTIONS OF THINGS TO CHECK AND WHERE POSSIBLE GIVEN. KEY LOGIC: THE MOSY PROBABLE MODULE IS CONTAINS A LIST OF LOGIC SIGNALS AND/OR LGGIC COMPONENTS WITH MODULE NARES AND PRINTV NUMBERS TO RELATE THE TEST ROUTINE FUNCTION TO THE FUNCTIONAL AREAS OF LOGIC WITHIN THE PRINTS. WHERE POSSIBLE SIGNAL PIN NOS. ARE LISTED. (IZDHM-D-0 (Z0MRD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 55 SEQ 0053 SEQ 0052 MAINTENANCE HEADER FOR TEST 1 EXAMPLE : 2 (2RSSR ABSTRACT: TEST (2XA RRE A THIS TEST ATTEMPTS TO REFERENCE EACH OF THE EIGHT REGISTERS IN THE DH11 SELECTED FOR TEST USING ITS ASSIGNED UNIBUS ADDRESS. If ANY ADDRESS FAILS TO RESPOND A BUS ERROR TRAP VECTORS THE TEST TO THE ERROR SET-UP AND CALL ROUTINE. AFTER THE ERROR IS TYPED THE TEST WILL TEST THE NEXT DH11 ADDRESS IN SEQUENCE UNTIL ALL EIGHT ARE TESTED. ERRORS: (A2 2202 1.) ERROR 1 REPORTS THAT THE REGISTER WHOSE ADDRESS TO RESPOND WITH ‘'SSYN'' WHEN REFERENCED. IS IN R2 FAILED (NONE) SYNC: teed Y DEBUG: Y reRte 1.) PROBLEM IS MOST LIKELY ThE M7277 MODULE. 2.) IF ALL EIGHT REGISTERS FAIL TO RESPOND, MAKE SURE THAT YOU CONF IGURED THE OF PROGRAM PROPERLY BEFORE STARTING. IF YOU DID, THE ADDRESS SELECT JUMPERS ON THE M7277 MODULE. CHECK THE SETTINGS 3.3 iF ONE OR MORE RESPONDED PROPERLY, SET UP AN ERROR SCOPE LOQP AND BACKTRACK THROUGH THE LOGIC STARTING WITH THE KEY LOGIC SIGNALS LISTED BELOW. KEY LOGIC: SRR REEREY M7277 SH3 SHé SSYN H DEVICE RESPONDING L DEVICE SELECTED H (€2 E72-6 E09-11 CZOHR-D-0 CZOWMD .P11 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 221 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 223 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 B PAGE 56 5 SEQ 0054 SEQ 0053 RE,SEQ,BIN LLIST $SWR=165400 195400 + .ENABLE ABS CZDHM-D-0 .TITLE ;*COPYRIGHY (C) 1976,1978 ;*DIGITAL EQUIPMENT CORP. ;®*MAYNARD, MASS. 01754 * *«PROGRAA BY ED CROWLEY * ;*THIS PROGRAN WAS ASSEMBLED USING THE PDP-11 MAINDEC SYSMAC ;*PACKAGE (MAINDEC-11-DZQAC-C3), JAN 19, 1977, b 000001 $TN=1 .SBTTL b A SWITCH | eeesees .* A USE 0 .SBTTL ecececesscesscsasccecae 15 HALT OMN ERROR 13 n 9 8 INHIBIT INHIBIT LOOP ON LOOP ON 14 ) M i ot 000000 OPERATIONAL SUITCH SETTINGS 1 LOOP ON TEST TRAP CATCHER ERROR TYPEOUTS "TERATIONS ENMROR TEST IN SWR<7:0> .=0 J*ALL UNUSED LOCATIONS FROM & - 776 CONTAIN A ‘', +2 HALT" s*SEQUENCE TO CATCH ILLEGAL TRAPS AND INTERRUPTS 000174 000176 000200 000204 000210 ;*LOCATION O CONTAINS O TO CATCH IMPROPERLY LOADED VECTORS 000174 000000 000000 000137 000137 000137 026162 002156 026146 =174 DISPREG: .WORD O SWREG: .WORD 0 .SBTTL STARTING ADDRESS(ES) JMP a4 INPARX JMP S#BEGIN JMP ¥ INPARC .SBTTL IR R 000046 000052 n00214 000046 020750 000052 120000 000214 AR ACT11 ;s JUMP TO STARTING ADDRESS OF PROGRAM ;BEGIN EXECUTION WITH DEFAULT PARAMETERS ; INPUT PARAMETERS - DEVICE SELceCTION ONLY HOOKS R0 R R SRRl ;HOOKS REQUIRED BY ACT R 0ttt ittt sttt et isl ) ssz:c=. :SAVE PC iéggm ::1)SET LOC.46 TO ADDRESS OF SENDAD IN .SEOP 'WORD .SBTTL ;:SOFTWARE DISPLAY REGISTER ;s SOFTWARE SWITCH REGISTER 120000 T=$SVPC APT PARAMETER BLOCK ;:2)SET LOC.52 TO 120000 *:"RESTORE PC ;;i'ttttt'ttttttttt"tttiitt'tifi'iiQttti'tttiltitttttttitt"lt!. JSET LOCATIONS 24 AND 44 AS REQUIRED FOR APT Y 000024 000214 000024 000200 R R .$X=. .=24 200 I T ;;SAVE CURRENT LOCATION L T T A T TR ;;SET POWER FAIL TO POINT TO START GF PROGRAM :;FOR APT START UP e R CIDNA-D-0 CZOMMD.P11 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 22N 2272 2273 2274 2275 2276 277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 000044 MACY11 30A(1052) 09-MAR~78 15:32 000044 000214 000214 10-MAR-78 (8:05 PAGE 57 SeEa 0055 APT PARAMETER BLOCK . =44 SAPTHOR .=.8X AL SEQ 0054 ;;POINT TO APT INDIRECT ADDRESS PNTR. ;;POINT TO APT HEADER BLOCK ;:RESET LOCATION COUNTER AR SAARAAASARSARRRARARARARRRLRRRARRARAARARRRRRRR Rt tdltdd) ;SETUP APT PARAMETER BLOCK AS DEFINED IN THE APT-PDP11 DIAGNOSTIC JINTERFACE SPEC. 000214 000214 000216 000220 000222 000224 000226 000000 001232 000036 000170 000170 000052 SAPTHD: $HIBTS: SMBADR: $TSTM: .WORD .WORD _WORD 0 SMAIL 30. SUNITM: .WORD .WORD 120. ;:ADDITIONAL RUN TIME (SECS) OF A PASS FOR EACH ADDITIONAL UNIT SETEND-SMAIL/2 ;;LENGTH MAILBOX-ETABLE (WORDS) $PASTM: .SBTTL 001100 000011 000012 _WORD 120. ;;TWO HIGH BITS OF 18 BIT MAILBOX ADDR. ;;ADDRESS OF APT MAILBOX (BITS 0~15) :sRUN TIM GF LONGEST TEST ;sRUN TIME IN SECS. OF 1ST PASS ON 1 BASIC DEFINITIONS s*INITIAL ADDRESS OF THE STACK POINTER w»t+ 1100 nwe STACK= .EQUIV .EQUiV 1100 EMT,ERROR I0T,SCOPE ;:BASIC DEFINITION OF ;:BASIC DEFINITION OF ERROR CALL SCOPE CALL :*MISCELLANEOUS DEFINITIONS HT= 1" ::CODE FOR HORIZONTAL TAB LF= 12 ;. CODE FOR LINE FEED (R= CRLF= PS= 15 200 177776 ;:CODE FOR CARRIAGE RETURN ;:CODE FOR CARRIAGE RETURN-LINE FEED s ;PROCESSOR STATUS WORD 177774 177772 177570 STKLAT= PIRQ= DSWR= DDISP= 177774 177772 177570 177570 ;:STACK LIRIT REGISTER : ;PROGRAM INTERRUPT REQUEST REGISTER « ;HARDWARE SWITCH REGISTER 000000 000001 000002 000003 000004 000005 000006 000007 000006 000007 RO= 10 ;:GENERAL REGISTER R2= R3= 12 13 ; : GENERAL REGISTER ;s GENERAL REGISTER 000000 000040 000100 000140 000200 000240 000300 PRO= PR1= PR2= PR3= PR4= PR5= PR6= PR7= 000015 000200 177776 177570 000340 .EQUIV PS,PSW : : HARDWARE DISPLAY REGISTER s *GENERAL PURPOSE REGISTER DEFINITIONS R1= Ré4= RS5= R6= R7= SP= PC= 11 24 15 X6 37 X6 17 ;*PRIORITY LEVEL 0 40 100 140 200 240 300 340 ;s GENERAL REGISTER : ;GENERAL REGISTER : :GENERAL REGISTER :; GENERAL REGISTER ;. GENERAL REGISTER ;:STACK POINTER ;s PROGRAM COUNTER DEFINITIONS ;sPRIORITY ;;PRIORITY ;;PRIORITY ;;PRIORITY ;;PRIORITY ;;PRIORITY ;;PRIORITY :;PRIORITY LEVEL LEVEL LEVEL LEVEL LEVEL LEVEL LEVEL LEVEL 0 1 2 3 4 5 6 7 UNIT (QUICK VERIFY) (ZOHM-D-0 CZDHMD.P11 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2514 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 MACY11 30A(1 052’ 09-MAR-78 15:3 P 100000 040000 020000 010000 004000 002000 001000 000400 000200 000100 00040 000020 000010 000004 000002 200001 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 10-MAR-78 08:05 ;' 'SWITCH REGISTER' SWITCH DEFINITIONS 100000 SW15= SW14= SW13= SW12= SWii= SW10= SW09= SW08= SW07= 040000 020000 010000 004000 002000 001000 000400 000200 000100 000040 000020 000010 000004 000002 000001 40000 20000 10000 4000 2000 1000 400 200 SW06= SWU5= SW04= SW03= SW02= SW01= SW00= 100 40 .EQUlV Sw01,sw1 .EQUlV .EQUIV EQUIV EQUIV .EQUIV .EQUIV .EQUlV .EQUIV .EQUIV 100000 PAGE 58 BASIC DEFINITIONS 20 10 4 2 1 SW09,5w9 SwW08,S5u8 SW07,s5w? SW06,SwWé SWOS, swS SW04, SW4 SW03,suw3 SW02,Sw2 SW00,swo BIT DEFINITIONS (BiTOO 10 BIT15) 100000 40000 20000 10000 4000 2000 1000 400 200 100 40 20 10 4 2 1 B8IT09,B1T9 BIT08,BI18 81707,BIT7 BIT06,81T6 BIT05,BITS BIT04,BIT4 T BIT03,BIT3 T BIT02,BIT? T BIT01.8IT1 81700,8BI ,BIT0 SEQ 0056 SEQ 0055 CZDHMW-D-0 CZDHMD.P11 2359 2360 236 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 MACY11 30A(1052) 09-MAR-78 15:32 000004 000010 000014 000014 000014 000020 000024 000030 000034 000060 000064 000240 SEQ 0057 SEQ 0056 10-MAR-78 08:05 PAGE 59 BASIC DEFINITIONS ;*BASIC ''CPU'* TRAP VECTOR ADDRESSES ERRVE(= 4 ;;TIME OUT AND OTHER ERRORS RESVEC= 10 ::RgfiEgYsb AND ILLEGAL INSTRUCTIONS TBITVEC=14 ;s TRACE TRAP TRTVEC= 14 14 BPTVEC ::BREAKPOINT TRAP (BPT) I0TVEC= 20 ;s ANPUT/OUTPUT TRAP (10T, *+SCOPEwr PWRVEC= 24 ;;POWER FAIL EMTVEC= 30 :;EMULATOR TRAP (EMT) =«ERRUR*+ :"'TRAP'" TRAP TRAPVEC=34 TKVEC= 60 ;:TTY KEYBOARD VECTOR TPVEC= 64 PIRQVEC=240 ;:TTY PRINTER VECTOR : ;PROGRAM INTERRUPT REQUEST VECTOR CZDMN-D-0 CZOHMD LN 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 08:05 COMMON TAGS SEQ 0058 SEQ 005/ PAGE 60 COMMON TAGS ;*THIS TABLE CONTAINS VARIOUS ;*USED IN THE PROGRAM. 001100 001100 001102 001103 001104 001106 001100 000000 000 000 000000 000000 000000 000000 000 00° 000000 000000 000000 000000 000000 000000 000000 000 000 000000 177570 177570 177560 2405 2412 2413 2414 2415 2416 2417 2418 2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 09-MAR-78 15:32 10-MAR-78 ":t'ttttitt"'iitt'i't'i'tti'*t"'Qt'"'t'.ttt"t.tttttt"tf'tttt 2396 2397 2398 2399 2400 2401 2402 2403 2404 2410 2411 30A(1052) .SBTTL 2390 23N 2392 2393 2394 2395 2406 2407 2408 2409 MACY11 001160 001162 001164 001166 001170 001172 001174 001176 001200 001202 001204 001206 001210 001212 001214 001216 001220 001222 177562 177564 177566 000 002 012 000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 $CMTAG: $STSTNM: SERFLG: SICNT: SLPADR: SLPERR: SERTTL: SITEMB: SERMAX: $ERRPC: $GDADR: $BDADR: $GDDAT: $BDDAT: .=1100 .WORD .BYTE .BYTE _.WORD .WORD .WORD .WORD .BYTE .BYTE .WORD .WORD .WORD _WORD .WORD .WORD .WORD $AUTOB: .BYTE $INTAG: .BY;E .WORD SWR: .WORD DISPLAY: .WORD $TKS: 177560 $TKB: 177562 $TPS: 177564 $TPB: 177566 S$NULL: .BYTE SFILLS: .BYTE SFILLC: .BYTE O 0 0 O O O O O 1 0 0 O O O 0 O 0 8 DSWR DDISF O 2 12 $TPFLG: .BYTE .WORD O SREGO: $REG1: SREG2: SREG3: $REG4: $REGS: SREG6: $REG7: $TMPO: $TMP1: $TMP2: $TMP3: $TMP4: $TMPS: $TMP6: $TMP7: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD O O O @ O O O O O O O O 0 O O O SREGAD: .WORD .WORD _WORD _WORD .WORD .WORD _WORD STIMES: 0 O COMMON STORAGE LOCATIONS ;;START OF COMMON TAGS ;;CONTAINS ;;CONTAINS ;;CONTAINS ;. CONTAINS ;:CONTAINS THE TEST NUMBER ERROR FLAG SUBTEST ITERATION COUNT SCOPE LOOP ADDRESS SCOPE RETURN FOR ERRORS ;;CONTAINS TOTAL ERRORS DETECTED ;;CONTAINS ITEM CONTROL BYTE ;;CONTAINS MAX. ERRORS PER TEST ;; CONTAINS PC OF LAST ERROR INSTRUCTION ;;CONTAINS ADDRESS OF °‘GOOD' DATA ;:CONTAINS ADDRESS OF 'BAD’ DATA :;CONTAINS °'GOOD’ DATA ;:CONTAINS °'BAD' DATA ; ;RESERVED-~-NOT TO BE USED :sAUTOMATIC MODE : INTERRUPT MODE INDICATOR INDICATOR ; ;ADDRESS ::ADDRESS ;. TTY KBD ;:TTY KBD OF SWITCH REGISTER OF DISPLAY REGISTER STATUS BUFFER ;:TTY PRINTER STATUS REG. ADDRESS ;:TTY PRINTER BUFFER REG. ADDRESS ;s CONTAINS NULL CHARACTER FOR FILLS ;;CONTAINS # OF FILLER CHARACTERS REQUIRED 5 INSERT FILL CHARS. AFTER A 'LINE FEED" 5 'TERMINAL AVAILABLE'' FLAG (BIT<07>=0=YES) ;;CONTAINS THE ADDRESS FROM ;;WHICH (SREGO) WAS OBTAINED ;s CONTAINS ((SREGAD)+0) :; CONTAINS ((SREGAD)+2) ;s CONTAINS ((SREGAD)+4) ;s CONTAINS ((SREGAD) +6) ;;CONTAINS ((SREGAD)+10) ;; CONTAINS ((SREGAD)+12) ;;CONTAINS ((SREGAD)+14) :; CONTAINS ((SREGAD)+16) ;;USER DEFINED ::USER DEFINED ;sUSER DEFINED :;USER DEFINED ;sUSER ;sUSER :USER ;sUSER DEFINED DEFINED DEFINED DEF INED ;sMAX. NUMBER OF ITERATIONS CZOHM-D-0 CZOHMO PN 2429 2430 2431 2432 2433 2634 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2646 2647 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2673 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 001224 001226 001227 001230 MACY1? 30A(1052) 09-MAR-78 15:32 000000 077 015 000912 SEQ 0059 SEQ 0058 10-MAR-78 08:05 PAGE 61 COMMON TAGS SESCAPE:0 SQUES: $CRLF: SLF: .ASCII .ASCII .ASCIZ ;;ESCAPE ON tRROR ADDRESS ;;QUESTION MARK ;s CARRIAGE RETURN ;sLINE FEED /?/ <15> <12> ;;t!tt'titit't"t"i'ti't""tt"ttt"."tttttt.tttttt!t't""ttt .SBTTL APT MAILBOX-ETABLE :;lttt'tttt'itt't'itt't't'it’lt"'i't'ttittt'ttt!itttt'ttttt'tttt 001232 001232 001234 001236 001240 001242 001244 001246 001250 001252 001252 001253 001254 001256 001260 000000 000000 000000 000000 000000 000000 000000 000000 (00 000 000000 000000 000000 .EVEN SMAIL: SMSGTY: .WORD SFATAL: .WORD STESTN: .WORD SPASS: .WORD $DEVCT: .WORD SUNIT: .WORD $SMSGAD: .WORD $SMSGLG: .WORD SETABLE: SENV: .BYTE $SENVM: _BYTE $SWREG: .WORD SUSWR: .WORD $CPUOP: ,WORD . AMSGTY AFATAL ATESTN APASS ADEVCT AUNIT AMSGAD AMSGLG AENV AENVN ASWREG AUSWR ACPUCP * b . . )] 4 * * 001262 001263 000 000 $MAMS1: .BYTE $SMTYP1: .RYTE AMAMS1 AMTYPY * % . o . 4 4 # 001264 000000 $MADR1: _WORD AMADR1 SMAMS?: SMTYP2: $MADRZ2: SMAMS3: SMTYP3: $MADR3: SMAMS4: SMTYP4: SMADR4: SVECT1: SVECT2: $BASE: .BYTE .BYTE .WORD .BYTE .BYTE .WORD .BYTE .BYTE .WORD .WORD .WORD .WORD AMANS? ANTYP2 AMADR?Z $COW1: $CDW2: SDDWO: $ODW1: $DDW2: .WORD .WORD .WORD .WORD .WORD ® 001266 001267 001270 001272 001273 001274 001276 001277 001300 001302 001304 001306 001310 001312 001314 001316 001320 001322 000 000 000000 000 000 000000 000 000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 $DEVM: ; :PASS COUNT ;:DEVICE COUNT ;. 170 UNLT NURBER ; ;MESSAGE ADDRESS s sMESSAGE LENGTH ;:APT ENVIRONMENT TABLE : ;ENVIRONMENT BYTE : ;ENVIRONRENT MODE BITS s \PT SWITCH REGISTER ;s USER SWITCHES :.(PU TYPE ,OPTIONS BITS 15-11=CPU TYPE 11/04=01,11/05=02,11/20=03,11/40=04,11/45=05 * . ;;APT MAILBOX ; ;MESSAGE TYPE (CODE ::FATAL ERROR NUMBER ;s TEST NUMBER _WORD AMARS3 AMTYP3 AMADR3 AMANSS AMTYP4 AMADRS AVECT1 AVECT? ABASE ADEVN ACDW1 ACDW2 ADDWO ADDW ADDWC 11/70=06,PDQ=07,0=10 BIT 10=REAL TINE CLOCK BIT 9=FLOATING POINT PROCESSOR BIT 8=MEMORY MANAGEMENT ;HIGH ADDRESS,M.S. BYTE ;.MER. TYPE,BLKM MEM.TYPE BYTE -- (HIGH BYTE) 900 NSEC CORE=001 300 NSEC BIPOLAR=002 500 NSEC M0S=003 ;:HIGH ADDRESS,BLKM MEM.LAST ADDR.=3 BYTES,THIS WORD AND LOW OF ''TYPE'' ABOVE :;HIGH ADDRESS ,M.S. BYTE BLK#2 EM. TYPE ;sM ;sMEM.LAST ADDRESS,BLK#?2 ;:HIGH ADDRESS ,M.S.BYTE ;sMEN.TYPE ,BLK#3 ;sMEM.LAST ADDRESS,BLKA3 ;sHIGH ADDRESS,M.S.BYTE ;sMEN.TYPE ,BLK#4 :sMEM.LAST ADDRESS,BLK#4 :; INTERRUPT VECTOR#1,BUS PRIORITYZ :; INTERRUPT VECTOR#2BUS PRIORITYA?2 :;BASE ADDRESS OF EQUIPMENT UNDER TFST ;;DEVICE MAP ; ;CONTROLLER DESCRIPTION WORDA1 :;CONTROLLER DESCRIPTICN WORD#?2 ;;DEVICE DESCRIPTOR WORD#0 ;;DEVICE DESCRIPTOR WORDA1 :;DEVICE DESCRIPTOR WORD#2 — (ZDHM-D-0 CZOMMD . P11 24FS 2686 2487 2488 2489 2490 2691 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 001324 001326 001330 001332 001334 001336 001340 001342 0013544 001346 001350 001352 001354 001356 MACY11 30A(1052) 09-MAR-78 15:32 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 SEa@ 0060 SEQ 0059 10- MAR-78 08:05 PAGE 62 APT MAILBOX-ETABLE $DDW3: $DDW4: $0DWS:: $DDW6: $DDW?7: $0DW8: $D0OW9: $ODW10: $DODW11: $SODW12: $DDW13: $DDW14: $DDW15: SETEND: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD ADDW3 ADDW4 ADDWS ADDW6 ADOW? ADDWS8 ADDW9 ADDW10 ADDW11 ADDW12 ADDW13 ADDW14 ADDW15 ;. DEVICE ;.DEVICE ;.DEVICE ;:DEVICE ::DEVICE ;:DEVICE ;:DEVICE ;sDEVICE ;.DEVICE :;DEVICE ;:DEVICE ;:DEVICE ;:DEVICE DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR DESCRIPTOR WORD#3 WORD#4 WORD#S WOR uofi\ WORDA8 WORD#9 WORD#10 WORD#11 WORD#12 WORD#13 WORD#14 DESCRIPTOR WORD#15 CZ0hR-D-0 CIOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 2502 2503 2504 2505 10-MAR-78 08:05 PAGE 63 ERROR POINTER TABLE .SBTTL ERRCR POINTER SEQ 0061 SEQ 0060 TABLE ;*TH]S TABLE CONTAINS THE INFORMATION FOR EACH ERROR THAT CAN OCCUR. ;*THE INFORMATION IS OBTAINED BY USING THE INDEX NUMBER FOUND IN ;*LOCATION SITEMB. THIS NUMBER INDICATES WHICH ITEM [N THE TABLE IS PERTINENT. ; *MOTE1: IF SITEMB SeNOTE2: i EM it DF ;r oY 001356 001356 001360 0013¢€2 001364 DH DT IS (SERRPC). ;;POINTS TO THE ERROR MESSAGE ::POINTS TO THE DATA HEADER ::POINTS TO THE DATA ::POINTS TO THE DATA FORMAT $ERRTB: :ERROR TABLE ITEM FOR ERROR MESSAGE 1 030360 030427 030506 000000 EM1 DH1 DTY 0 :ERROR TABLE 001366 001370 001372 001374 IS O THE ONLY PERTINENT DATA EACH ITEM IN THE TABLE CONTAINS & POINTERS EXPLAINED AS FOLLOWS: 030524 030562 030660 000000 EM2 DH2 DT2 0 :"'DH11 REGISTER REFERENCE CAUSED TIMEOUT" 2 (PC) (PS) (SP) TEST DEVADR REGADR ' ;SERRPC,$TMPO,SREGH,SREGO,SREG1,$SREG2 sPRINT ALL OCTAL ITEM FOR ERROR MESSAGE 2 :"'SYSTEM CONTROL REGISTER ERROR' : (PC) (PS) (SP) TEST DEVADR REGADR WAS S/8 " JSERRPC,$TMPO,SREGH,SREGO,SREGT,SREG2, SREG3, SREGS sPRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 3 001376 001400 001402 001404 030702 030562 030660 000000 EM3 ;'DH11 MASTER CLEAR FAILED TO CLR SPECIFIED REG" DT2 :SERRPC,$TMPO,$REGSH, SREGO,SREGT,SREG2,SREG3, SREGS DH?2 0 U (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ° ;PRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 4 001406 001410 001412 001414 030760 030562 030660 000000 EM4 DH2 D12 0 :"'LINE PARAMETER REGISTER ERROR" ' (PC) (PS) (SP) TEST DEVADR REGADR WAS §S/B ** SERRPC,$TMPO,SREG6H,SREGO,SREG1,SREG2, SREG3, SREGS :PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 5 001416 001420 001422 001424 031016 030562 030660 000000 EMS DH2 D12 0 :""BREAK CONTROL REGISTER ERROR' " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B8 ' ; SERRPC,$TMPO,SREG6,SREGD, SREGT ,SREG2, SREG3, SREGS ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 6 001426 001430 001432 001434 031053 030562 030660 000000 EM6 DH2 ;''SILO STATUS REGISTER ERROR' ;' (PC) (PS) (SP) TEST DEVADR 0 ;PRINT ALL OCTAL D12 REGADR WAS S/B TM ; SERRPC,STMPO,$REGS, SREGO,SREG1,SREG2 ,$REG3, SREGS CZDHM-D-0 CZOHMD.P11 2558 2559 2560 2561 ¢562 2562 2564 2565 2566 2567 2568 2569 2570 257N 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 SEQ 0062 SEQ 0061 PAGE 64 ERROR POINTER TABLE ;ERROR TABLE ITEM FOR ERROR MESSAGE 7 001436 001440 001442 001444 031106 030562 030660 000000 EM7 ;"'CURRENT ADDRESS REGISTER ERROR - LINE #XX'' 0 :PRINT ALL OCTAL DH2 D12 " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B° sSERRPC,$TMPO,SREG6,SREGO,SREG1,SREG2,SREG3, SREG4 ;ERROR TABLE ITEM FOR ERROR MESSAGE 10 001446 001450 001452 001454 031160 030562 030660 000000 EM10 DH2 D72 0 ;"'BYTE COUNTER REGISTER ERROR - LINE #xx‘ ;7 (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ;SERRPC,$TMPO,SREGSH, SREGO,SREGT ,$SREG2, SREG3,SREGS :PRINT AL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 11 001456 001460 001462 001464 u31227 030562 030660 000000 EM11 DH2 D12 0 :*UNEXPECTED DH11 RCVR INTERRUPT S (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ;SERRPC,$TMPO,SREGS, SREGO,SREGY ,SREG2,SREG3, SREGS sPRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 12 001466 001470 001472 001474 031266 030562 030660 000000 EM12 DH2 DT2 0 ;"UNEXPECTED DH11 XMITTR INTERRUPT'' 2 (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' ;SERRPC,$TMPO,SREGS,SRFGO,SREGT,SREG2,SREG3, SREGS ;PRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 13 001476 001500 001502 001504 031327 030562 030660 000000 EM13 DH2 DT2 0 :*'CHAR AVAILABLE FAILED TO GENERATE RCVR INTERRUPT" " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ;SERRPC,$TMPO,SREGS,SREGO,SREG1,SREG2,SREG3, SREGS ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 14 031410 030562 030660 000000 EM14 DH2 D12 0 ;TRANSMITTER NPR LOGIC ERROR ~ LINE # 2 (PC)Y (PS) (SP) TEST DEVADR REGADR WAS S/B ' :SERRPC,$TMPO,SREGS,SREGO, SREGT1,$REG2,SREG3, SREGS sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 15 001516 001520 001522 001524 031457 030562 030660 000000 EM1S DH? DT2 0 ;UXMITTR FAILED TO INTERRUPT - LINE # ' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B :SERRPC,$TMPO,SREGH,SREGO,SREG1,$REG2, SREG3, SREG4 ;PRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 16 001526 001530 001532 001534 031525 030562 030660 000000 EM16 :"'RCVR FAILED TO INTERRUPT" DH2 J(PC)Y 0 :PRINT ALL OCTAL DT2 (PS) (SP) TEST DEVADR REGADR WAS S/B ;$ERRPC,$TMPO,SREGH, SREGO,SREGT ,SREG2,SREG3,SREG4 CZIDHM-D-0 D . P11 CZONM 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 65 SeQ 0063 ERROR POINTER TABLE SEQ 0062 ERROR TABLE ITEM FOR ERROR MESSAGE 17 001536 001540 001542 001544 031556 031622 030660 000000 EM17 DH6 D12 0 ;"'"TRANSMITTER TIMING ERROR - LINE # " ;U (PC) (PS) (SP) TEST DEVADR SPEED TIMEB ;SERRPC,$TMPO,SREGS, SREGO,SREG1,SREG2, SREL3, SREGS TIMECTM ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 20 001546 001550 001552 001554 031720 031622 030660 000000 EM20 DH6 D12 0 ;RECEIVER TiMING ERROR - LINE # * S (PC) (PS) (SP) TEST DEVADR SPEED TIMEB ;SERRPC,$THPO,SREGS,SREGO, SREGT ,SREG2, SREG3, SREG4 TIMEC" sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 21 001556 001560 001562 001564 031761 030562 030660 000000 EM21 DH2 DT2 0 :"RCVR FAILED TO INTERRUPT ~ LINE # ' (PC) (PS) (SP) TEST DEVAUR REGADR WAS S/B ' :SERRPC,$TMPO,SREG6,SREGO,SREGT ,SREGZ, SREG3 . SREGS sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 22 001566 001570 001572 001574 032025 030562 030660 000000 EM22 DH2 DT2 0 ;"'CHAR AVAIL FAILED TO SET ON TIME -~ LINE # ;U (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B TM ;SERRPC,$TMPO,SREGS, SREGO,SREGT ,SREG2 , $REG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 23 001576 001600 001602 001604 032101 032142 030660 000000 EM23 DH7 D12 0 ;"'BASIC DATA TEST ERROR - LINE # * ;U (PC) (PS) (SP) TEST DEVADR CHRLNG WAS S/B * ;SERRPC,$TMPO,SREGS,SREGO, SREG1,SREG2,SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 24 001606 001610 001612 001614 032237 030562 030660 000000 EM24 DH2 D12 0 ;"'AUTO ECHO TEST ERROR - LINE # ° P (PC) (PS) (SP) TEST DEVADR REGADR WAS s/8 " ;SERRPC,$TMPO,SREG6, SREGO, SREGT, SREG2, SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 25 001616 001620 001622 001624 032277 030562 030660 000000 EM25 DH2 D12 0 ;""BREAK BIT TEST ERROR - LINE # " ;' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ' ;SERRPC,$TMPO,SREGH, SREGO, SREGT,SREG2, SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 26 001626 001630 001632 032337 030562 030660 EM26 DH2 DT? ' ' (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B ‘' :SERRPC,$TMPO,SREG6,SREGO, SREGT,SREG2,SREG3, SREGA ;""HALF~DUPLEX TEST ERROR - LINE # CZDHM-D-0 CZOHMD P11 2670 2671 2672 001634 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683 2684 2685 2686 001636 001640 001642 001644 2673 2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 271 2712 273 2714 FIAL] 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 MACY11 30A(1052) 09-MAR-78 15:32 000000 10-MAR-78 08:05 PAGE 66 SEQ 0064 ERROR POINTER TABLE 0 SEQ 0063 :PRINT ALL OCTAL :ERROR TABLE ITEM FOR ERRO\ MESSAGE 27 032401 032433 032512 000000 EM27 :"'UNEXPECTED BUS ERROR TRAP' 0 :PRINT ALL OCTAL DH3 D13 : (PC) (PS) (SP) TEST TRPPC TRPPS ;SERRPC,S$TMPO,SREGS, SREGO, SREG1, SREG2 ERROR TABLE ITEM FC® ERROR MESSAGE 30 001646 001650 001652 001654 032530 032433 032512 000000 EM30 DH3 D13 0 :"UNEXPECTED RSVD INSTR TRAP" : (PC) (PS) (SP) TEST TRPPC TRPPS ;SERRPC,$TMPO,SREGH,SREGO,SREGT,SREG? :PRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 31 001656 001660 001662 001664 032563 032633 030660 000000 EM31 DH4 DT2 0 ;"'AUTO ECHO DATA COMPARE ERROR - LINE # ** : (PC) (PS) (SP) TEST WASADR SBADR WAS :SERRPC,$TMPO,SREGH, SREGO, SREG1,SREG2, SREG3,SREG4 s/8 " ;PRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 32 001666 001670 001672 001674 032730 032772 033020 000000 EMm32 :"AUTO ECHO TEST TIMEOUT - LINE # DT4 0 :SERRPC,STMPO,STMP2 :PRINT ALL OCTAL DHS ;" (PC) (LPRG) TEST :ERROR TABLE ITEM FOR ERROR MESSAGE 33 001676 001700 001702 001704 033030 030562 030660 000000 EM33 DH2 DT2 0 :"PARITY LOGIC TEST ERROR - LINE # ' " (PCY (PS) (SP) TEST DEVADR REGADR WAS S/B" :SERRPC,$TMPO,SREGH,SREGO,SREGY,SREG2,$SREG3,SREGL sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 34 001706 001710 001712 061714 033073 032633 030660 000000 EM34 "MULTI-LINE PARITY DATA TEST ERROR - LINE # 0 :PRINT ALL OCTAL DH4 DT2 ;ERROR TABLE ITEM FOR ERROR MESSAGE 35 001716 001720 001722 001724 033166 033232 033262 000000 EM35 :"MULTI-LINE PARITY DATA TEST TIMEOUT" 0 ;PRINT ALL OCTAL DH14 DT6 2 (PC) (LPRG) LINACT " :"'SERRPC,$TMPO,STMP3" ;ERROR TABLE ITEM FOR ERROR MESSAGE 36 001726 001730 033272 032772 EM36 DHS - SUBTEST # S (PC) (PS) (SP) TEST WASADR SBADR WAS S/B ' :SERRPC,$TMPO,SREGH, SREGO, SREG1,SREGZ,SREG3, SREGS ;CHAR AVAILABLE TIMEOUT'' U (PC) (LPRG) TEST" CIDHM-D-0 CZDHRD P11 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 001732 001734 MACY11 30A(1052) 09-MAR-78 15:32 033020 000000 10-MAR-78 08:05 PAGE 67 n S SEQ 0065 ERROR POINTER TABLE DT4 0 SEQ 006w ;SERRPC,$TMPO,$TMP2 ;PRINT ALL OCTAL :ERROR TABLE ITEM FOR ERROR MESSAGE 37 001736 001740 001742 001744 033321 032633 030660 000000 EM37 DH4 DT2 0 ;ERROR TABLE 001746 001750 001752 001754 033357 030562 030660 000000 EM4O DH2 D12 0 ;"'DATA COMPARE ERROR - LINE # ' S (PCY (PS) (SP) TEST WASADR SBADR WAS S/B *' ;SERRPC,$TMPO,SREGS, SREGO, SREGT,SREG2,3REG3, SREG4 sPRIIT ALL OCTAL ITEM FOR ERROR MESSAGE 40 ;"'BUFFER ACTIVE REG ERROR - LINE # * U (PC) (PS) (SP) TEST DIVADR REGADR WAS S/8 ;SERRPC,$TMPO,SREG6H,SREGD, SREGT , SREG2 ,SREG3, SREG4 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 41 001756 001760 001762 001764 033422 032772 033020 000000 EM4 DHS DT4 0 :"'RCVR FALSE INTERRUPT'' ;" (PC) (LPRG) TESTTM :SERRPC,$TMPO,S$TMP2 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 42 001766 001770 001772 001774 033447 032772 033020 000000 EM42 DH5 DT4 0 :"'SILO OVERFLOW ERROR’’ " (PC) (LPRG) TEST” ;SERRPC,STHPO,$TMP2 sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 43 001776 002000 002002 002004 033473 030562 030660 000000 EM43 DH2 DT2 0 ;"'SILO OVERFLOW FAILED TO GENERATE RCVR INTERRUPTTM ;" (PC) (PS) (SP) TEST DEVADR RFGADR WAS S/8 " ;SERRPC,$TMPO,SREG6,SREGO,SREGT ,SREG2 ,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 44 002006 002010 002012 002014 033553 EM44 :''NON EX MEMORY FAILED TO GENERATE XMITTR INTERRUPT'' 030660 DT2 ;SERRPC,$TMPO,SREGS,SREGO, SREGT,SREG2,SREG3, SREGS 030562 000000 DH2 0 " (PC) (PS) (SP) TEST DEVADR REGADR WAS S/B " ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 45 002016 002020 002022 002024 033635 030562 030660 000000 EM4S DH2 D12 0 ;''XMIT DONE FAILED TO CENERATE XMITTR INTERRUPT' ' (PC) (PS) (SP)Y TEST DEVADR REGADR WAS S/B *' :SERRPC,$TMPO,SREG6, SREGO, SREG1,SREG2, SREGS, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 46 002026 002030 033713 034001 EM46 DH10 ;"'CURRENT ADDRESS MEMORY PATTERNS TEST ERROR - LINE # ;" (PC) LINEWR PATTRN TEST DEVADR REGADR WAS s/8" CZDHMW-D-0 CZDHMD .P1 2782 2783 2784 2785 2786 2787 2788 2789 2790 2N 2792 2793 2794 2795 2796 2797 2798 2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835 2836 2837 002032 002034 MACY11 30A(1052) 09-MAR-78 15:32 034076 000000 10-MAR-78 08:05 PAGE 68 SEQ 0066 ERROR POINTER TABLE DTS 0 SEQ 0065 ;SERRPC,S$TMPO,$TMP1,SREGO,SREGT ,SREG2 ,SREG3, SREG4 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 47 002036 002040 002042 002044 034120 034001 034076 000000 EM47 :"BYTE COUNT MEMORY PATTERNS TEST ERROR - LINE # 0 sPRINT ALL OCTAL DH10 DTS '’ ; (PC) LINEWR PATTRN TEST DEVADR REGADR WAS ;SERRPC,$TMPO,STMP1 SREGO,SREGT,SREG2,SREG3, SREG4 s/8" ;ERROR TABLE ITEM FOR ERROR MESSAGE 50 002046 002050 002052 002054 034201 030562 030660 000000 EM50 DHZ DT2 0 ;'TEST TIMEOUT WAITING FOR XMIT DONE - LINE # ' J(PO) (PS) (sP) TEST DEVADR REGADR WAS ;"'SERRPC,S$TMPO,SREG6,SREGO ,SREG1 ,SREG2, $REG3 ,SREGS '’ s/8"’ ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 51 002056 002060 002062 002064 034257 034306 034076 000000 EM51 DH11 DTS5 0 ;"'NPR LOGIC TEST 2 ERROR'' 2 (PC) LINACT LINCHK TEST DEVADR REGADR WAS ;SERRPC,$TMPO,STMP1,SREGO, SREGT ,SREG2,SREG3, SREG4STM s/8" ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 52 002066 002070 002072 002074 034403 030562 030660 000000 EM52 DH2 D12 0 ;"'BASIC DATA COMPARE ERROR' (PO (PS) (SP) TEST DEVADR REGADR WAS ;SERRPC,$TMPO,SREGH, SREGO, SREGT,SREG2 ,SREG3, SREGSLTM s/8" ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 53 002076 002100 002102 002104 034201 034434 030660 000000 EmsSO DH12 ;"'TEST TIMEOUT WAITING FOR XMIT DONE - LINE # " ;' (PC) SPEED (SP) TEST DEVADR REGADR 0 ;PRINT ALL OCTAL DT2 ;SERRPC,$TMPO,SREGH,SREGO,SREG1,SREG2, SREG3, SREGA WAS s/8"" WAS $/8"" ;ERROR TABLE ITEM FOR ERROR MESSAGE 54 032025 034434 030660 000000 EM22 DH12 D12 0 ;"'CHAR AVAIL FAILED TO SET ON TIME - LINE # ;" (PC) SPEED (SP) TEST DEVADR REGADR ;SERRPC,$TMPO,SREG6, SREGO, SREG1,3REG2, SREG3, SREG4 JPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 55 002116 002120 002122 002124 032025 034531 030660 000000 EM22 DH13 D12 0 ;'CHAR AVAIL FAILED TO SET ON TIME - LINE # * JU(PO) (PS) (SP) TEST DEVADR CHRLNG SCRWAS ;SERRPC,STMPO,SREGH, SREGO, SREGT,SREG2,SREG3, SREG4 SCRS’8 ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 56 002126 002130 034630 030562 EMS6 DH? ;"'OVERRUN BIT FAILED TO SET - LINE # " JUPC) (PS) (SP) TEST DEVADR REGADR WAS S/8" CZDHA-D-0 CIOHRD P11 2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850 2851 2852 2853 002132 002134 MACY11 30A(1052) 09-MAR-78 15:32 03v060 0C¢N000 10-MAR-78 08:05 PAGL 69 ERROR POINTER TABLE DY? 0 B 6 SEQ 006/ SEQ 0066 ;SERRPC,STMPO,SREGE, SREGO, SREGT, SREG2, SREG3, SREGSLTM” ;PRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 57 002136 002140 002142 002144 034675 030562 030660 002146 002150 036140 034744 033020 000000 002152 002154 000000 EMS7 DH2 D12 0 ;"'STORAGE OVERFLOW BIT FAILED - LINE # J(PC) (PS) (SP) TEST DEVADR WAS , SREGS"’ ,SREG2 , SREG3 GS, PO,SRE SREGO,SREGT ;SERRP(C,$TM sPRINT ALL OCTAL ;ERROR TABLE ITEM FOR ERROR MESSAGE 60 MSG4 sMODEM CONTROL ERROR.. RUN DZDHK DH15 ' ;' (PC) DEVADR LINE DT4 ;SERRPC,$TMPO,STMP? 0 REGADR S/B"’ CZDHA-D-0 CZOHMD.P11 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 70 ERROR POINTER TABLE 002156 002162 002164 004737 005000 005037 002170 002174 002176 0022v2 002204 012706 005026 022706 001374 012706 001160 0022'0 002216 002224 002232 002240 002246 002254 002262 002270 002276 002302 002306 002314 002322 012737 012737 012737 n12737 012737 012737 012737 012737 013737 005037 005937 112737 012737 012737 021004 000340 921274 000340 324060 000340 024142 000340 020716 001222 001224 000001 002314 002322 002330 002334 002342 002350 002356 002364 013746 012737 012737 012737 022777 001012 000004 002370 002366 002370 002374 002376 002404 002412 000403 012716 000002 012737 012737 012637 002415 002422 002430 002432 002440 005037 132737 001403 012737 001240 0C0200 001253 001254 001140 002440 002444 002446 002454 00245% 002464 002466 002470 002472 005737 001012 123727 001406 023727 001005 000042 104406 000403 112737 027244 BEGIN: 030346 BEGINA: .SBTTL Mov CLR (mMp 001140 BNE 000020 000022 000030 00003¢ ;.++D 001115 001106 001110 #SCMTAG,R6 (R6)+ #SwR,R6 ;;DONE? .~6 ;:FIRST LOCATION TO BE CLEARED ;s CLEAR MEMORY LOCATION ;:LOOP BACK [F NO Mov #STACK,SP MoV #SERROR ,@FEMTVEC ;;EMT VECTOR FOR ERROR ROUTINE mov mov Mov CLR CLR #SPURLN ,QFPURVEC ; ;PCWER FAILURE VECTOR #340 3#PURVEC+2 ;;LEVEL 7 SENDCY,SEOPCT ;:SETUP END-OF -PROGRAM COUNTER STIMES ;o INITIALIZE NUMBER OF ITERATIONS SESCAPE :;CLEAR THE ESCAPE ON ERROR ADDRESS mov Mmov mov 000036 000024 000026 .020710 ;:SETUP THE STACK POINTER Mov8 Mov mov #340,3FERTVEC+2 ;;LEVEL 7 #STRAP ,3#TRAPVEC ;;TRAP VECTOR FOR TRAP CALLS #3640 ,@FTRAPVEC+2,LEVEL 7 #1,SERMAX #.,SLPADR 4., SLPERR ::ALLOW ONE ERROR PER TEST s INITIALIZE THE LOOP APDRESS FOR SCOPE ;s SETUP THE ERROR LOOP ADDRESS ;:SIZE FOR A HARDWARE SWITCH REGISTER. IF NOT FOUND OR IT IS ;;EQUAL TO A "=1"", SETUP FOR A SOFTWARE SWITCH REGISTER. MoV mov mov Mov CHP BNE S#ERRVEC,-(SP) #648 ,QFERRVEC #OSWR, SWR #ODISP,DISPLAY #-1,3SWR 66% ;;SAVE ERROR VECTOR ;. SET UP ERROR VECTOR ::SETUP FOR A HARDWARE SWICH REGISTER ;;AND A HARDWARE DISPLAY REGISTER s:TRY TO REFERENCE HARDWARE SWR s ;BRANCH IF NO TIMEOUT TRAP GCCURRED BR :?Y 65% #65%, (SP) ::BRANCH [F NO TIMEOUT ::SET UP FOR TRAP RETURN 66$: Mov Mov Mov #SWREG, SWR ::POINT TO SOFTWARE SWR #DISPREG,DISPLAY (SP)+ ,@#ERRVEC ;;RESTORE ERROR VECTOR 678 CLR BITB BEQ MOV $PASS #APTSIZE,SENVR 678 #$SWREG, SWR .SBTTL GET VALUE FOR SOF TWARE SWITCH REGISTER 000004 001140 001142 176554 648: 001140 01142 001252 000001 001140 000176 658: TST BNE (MPB BEQ CMP BNE GTSWR 000001 ;DISABLE CACHE s INITIALIZE A FEW VECTORS MOV #$SCOPE ,@#I0TVEC ;10T VECTOR FOR SCOPE ROUTINE MoV #340,3#I0TVEC+2 ;;LEVEL 7 000034 002376 000176 000174 000004 PC.DCACHE CLR RO ;INIT RO TO INDICATE DEFAULT PARAMETERS (LR TITFLG SINIT TITLE MESSAGE FLAG INITIALIZE THE COMMON TAGS :;CLEAR THE COMMON TAGS (SCMTAG) AREA 001100 177570 177570 77777 JSR SEQ 0068 SECQ 0067 001134 68%: BR MovB LT LY 688 SENV. M 68$ SWR,#SWREG 69% 69% #1,8AUTOB ::AND THE HARDWARE SWR IS NOT = -1 ;s CLEAR PASS COUNT ;;TEST USER SIZE UNDER APT ¢ YES,USE NON-APT SWITCH ::NO,USE APT SWITCH REGISTER ;:ARE WE RUNNING UNDER XXDP/ACT? : :BRANCH IF YES :sARE WE RUNNING UNDER APT? ; ;BRANCH IF YES ;;SOFTWARE SWITCH REG SELECTED? ; :BRANCH IF NO ;;GET SOFT-SWR SETTINGS ;:SET AUTO-MODE INDICATOR C.DHM-D-0 CZDHMD.P11 2910 002500 MACY11 30A(1052) 09-MAR-78 15:32 D 6 PAGE 71 10-MAR-78 08:0° GET VALUE FOR SOFTWARE SWITCH REGISTER 69%: SEQ 0069 SEQ 0068 CZOHM-D-0 CZDHMD . P11 2911 2912 2913 2914 2915 2916 2917 2918 002500 002506 002514 002522 002530 002534 002536 002540 MACY11 30A(1052) 09-MAR-78 15:32 012737 012737 012737 012737 005737 001612 104401 035000 026640 000340 026714 000340 030346 000004 000006 000010 000032 2919 002542 005137 2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 gggg 002554 002556 002562 002566 002570 002576 002600 002604 002606 002612 002616 002620 002622 002626 002630 002634 001002 004737 005737 001413 032777 001003 013700 000402 004737 005037 005700 001407 022700 001002 000137 000137 2938 2939 2940 2941 532% 002640 002646 002654 002662 002670 012737 012737 012737 012737 012737 027676 027736 030000 177777 000001 030326 030330 030332 030320 027306 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 002676 002702 002710 002716 002724 002732 002734 002740 002742 002744 002752 002760 00276¢ 002772 002774 005237 062737 062737 062737 033737 001004 006337 001737 000755 017737 017737 017737 004537 030320 035057 030320 000002 000002 000002 027306 030326 030330 030332 027310 2961 2962 2963 2920 2959 2960 002546 002776 003000 032777 030346 E 0000G1 START1: MOV mov mov mov ST BNE TYPE TITLE COM #OHADTB-~2,ADPTR #OHVCTB-2,VCPTR #BRLVL-2,BRPTR #-1,0HNUN #1,SELMSK ;GET POINTER TO ADDRESS TABLE ;GET POINTER TO VECTOR TABLE ;GET POINTER TO BR LEVEL TABLE ;START WITH DH #00 sSET UP DH11 BIT TEST MARKER RESTRT: DHNUA #2 ,ADPTR #2,VCPTIR #2 ,BRPTR SELMSK,DHSEL RSTRTA SELMSK START2 RESTRT ;GENERATE DH11 DEV NUMBER ;UPDATE TABLE POINTERS 28: 003002 104401 035037 004737 024330 003006 012737 003006 REST1: 027302 027304 030316 001106 ;HAVE WE TYPED TITLE ONCE ? sBR IF YES ;GO TYPE PROGRAM TITLE START2: MOV Mov Mov MoV Mmov 9%: 108: 118: 177777 025356 025352 025346 024636 ;SET UP THE RSVD INSTR VECTOR ;BRANCH [F NOT. :GO AUTOSIZE. ;START AT 200 ?? ;BR IF NOT ;ARE PARAMETERS TO BE INPUT MANUALLY? ;BRANCH [F YES. ;OTHERWISE, GET ADDRESSES BETWEEN VECTORS FROM AUTOSIZER 030306 027306 ;SET UP THE BUS ERROR VECTOR 1% PC,AUTOSZ VCFLG 118 #BIT0,aSWR 9% ADRVEC,RO 10% PC, INPARA VCFLG RO START? #-1,R0 2% INPAR3 INPAR 176342 026270 026200 #340 ,ERRVEC+2 #RESERR,RESVEC #340 ,RESVEC+2 TITFLG 13 ;SET FLAG - TYPE TITLE ONLY ONCE PER LOAD BIT 1%: 026110 030000 #BUSER,ERRVEC SEQ €070 SEQ 0069 TITFLG 176364 025140 030000 000001 6 10-MAR-78 08:05 PAGE 72 GET VALUE FOR SOFTWARE SWITCH REGISTER BNE JSR TST BEQ 31T BNE Mov BR JSR CLR TST BEQ CHp BNE JMP JMP INC ADD ADD ADD BIT BNE ASL BEQ BR #BITO,aswWR RSTRTA: MOV SADPTR ,DHADR MoV aVCPTR,DHVCT Mov #8BRPTR,DHRLVL JSR R5,SUNUM DHNUM TITLEZ2+20 TYPE TITLEZ JSR PC,LDTBF1 Mov ¥.,SLPADR ;00 WE WANT TO AUTOSIZE? ;GO ASK FOR PARAMETERS sRE INIT VECTOR FLAG ;USE DEFAULT PARAMETERS ? ;BR IF YES ;CHANGE DH SELECT PARAM ONLY ? :BR IF NOT ;60 ASK FOR SELE(T PARAM. ;GO ASK FOR ALL PARAMETERS ;TEST FOR SELECTED DH11 sBR IF SELECTED FOR TEST sSHIFT MARKER TO TEST NEXT DHM1 ;BR IF 16 TESTED - START OVER ;GO TEST IF THIS ONE SELECTED ;SET UP ;SET UP ;GET BR ;GO SET DH11 ADDRESS THE DH11 VECTOR ENTRY LEVEL VALUES DH NUMBER IN THE MESSAGE BUFFER ;GO PRINT '‘TESTING DH11 #xx"' ;GO LOAD XMITTR QUTPUT BUFFER WITH ;BINARY COUNT PATTERN ;INIT SCOPE LOOP RETURN CZOHN-D-0 D . P11 CZDHM 2964 2965 2966 2967 2968 2969 2970 29N 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 910 501 3012 3013 3014 3015 3016 3017 3018 3019 MACY11 30A(1052) 09-MAR-78 15:32 F 10-MAR-78 m 08:05 PAGE 73 CHECK SSYN RESPONSE 6 SEa 0071 SEQ 0070 FRCM ALL DH11 REGISTERS ;;ttt'tttt"f’fit"'t"'ttt'"'i"i'""'it.!t't"..".".'lltt" DeTEST 1 CHECK SSYN RESPONSE FPOM ALL DH11 REGISTERS ;;"t"'tiitttt"tt"t'ttt'iit\i"0"i""".t""".."i..."'.Q 003014 TST1: .REM 000004 SCOPE % TEST ABSTRACT: (2222232222220 021 THIS TEST ATTEMPTS TO REFERENCE EACH OF THE EIGHT REGISTERS IN THE DH11 SELECTED FOR TEST USING ITS ASSIGNED UNIBUS ADDRESS. IF ANY ADDRESS FAILS TO RESPOND A BUS ERROR TRAP VECTORS THE TEST TO THE ERROR SET-UP AND CALL ROUTINE. AFTER THE ERROR IS TYPED THE TEST WILL TEST THE NEXT DH11 ADDRESS IN SEQUENCE UNTIL ALL EIGHT ARE TESTED. ERRORS: ARAREER 1.) ERROR 1 REPORTS THAT THE REGISTER WHOSE ADDRESS IS TO RESPOND WITH ''SSYN'' WHEN REFERENCED. SYNC: IN R2 FAILED (NONE) L2884 DEBUG: LA A2 2R 1.) PROBLEM IS MOST LIKELY THE M7277 MODULE. 2.) IF ALL EIGHT REGISTVERS FAIL TO RESPOND, MAKE SURE THE PROGRAM PROPERLY BEFORE 3.) STARTING. IF YOU DID, OF THE ADDRESS SELECT JUMPERS ON THE M7277 MODULE. THAT YOU CONFIGURED CHECK THE SETTINGS IF ONE OR MORE RESPONDED PROPERLY, SET UP AN ERROR SCOPE LOOP AND BA§§ESACK THROUGH THE LOGIC STARTING WITH THE KEY LOGIC SIGNALS LI BELOW. KEY LOGIC: 28228880 A m7277 SH4 y 003016 003020 003022 003026 003032 003040 010102 010205 062705 013746 012737 162702 003044 003050 003052 203054 003056 062702 020205 001412 005712 000772 000002 003060 003064 004737 022626 024352 000020 000004 003060 000002 SH3 SSYN H DEVICE RESPONDING L DEVICE SELECTED H CE2 E72-6 £E09-11 MoV Mov ADD Mov Mmov sus R1,R2 RZ,R5 #20,R5 ERRVEC,-(SP) #3$ ,ERRVEC #2,R2 ;COPY [T INTO R2 ;ALSO RS ;RS WILL TELL US WHEN WE'VE TESTED ALL 8 :SAVE BUS ERROR VECTOR ;G0 TO 38 !F REG FAILS TO RESPOND ;S0 WE START WITH FIRST REG 2%: ADD (MP BEQ TST #2,R2 R2,R5 43 (R2) ;POINT TO A DH11 REGISTER ;TESTED ALL EIGHT 2? ;BR IF YES JACCESS DH11 REG ADDR 3$: JSR PC,SUER1 ;GO SET UP ERROR INFO 000004 1%: BR CMP 1% (SP)+,(SP)+ :BR WHEN ALL 8 ARE DONE ;FIX SP BECAUSE OF TRAP (ZOHM-D-0 CZOHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 3020 ggg; 003066 003074 012737 104001 3023 003076 000762 3024 003100 012637 003054 000004 10-MAR-78 1A 001110 4%: G 08:05 PAGE 74 CHECK SSYN RESPONSE 6 FROM ALL DH11 REGISTERS MoV ERROR #2% ,SLPERR 1 ;SET UP ERRCR LOOP RETURN ;DH11 REGISTER FAILED TO RESPOND TO MSYN BR 1% ;GO TEST NEXT ONE Mmov (SP)+ ERRVEC ;sRESTORE BUS ERROR VECTOR SEQ 0072 SEQ 0071 (ZDHM-D-0 CZDHMD.P11 3025 3026 3027 3028 3029 3030 3031 3032 3033 MACY11 30A(1052) 09-MAR-78 15:32 R RN RPN ;eTEST 2 IR 003104 R 1ST2: .REM 000004 6 08:05 PAGE 75 TEST THAT ""MASTER CLR'® CAN CLEAR THE ''SCR","'LPR'',"BKR'‘,AND ''SSR'’ REGS AN R RO A LR ERR R TEST THAT '‘MASTER CLR'' CAN CLEAR THE ''SCR'',"LPR'‘,"BKR’'‘,AND ''SSR'* REGS RN RN R R RPN R RN RN AR ANA ORI INONRONS SCOPE 4 (SS2222R22082 ] THIS (SCR, TEST LPR, BKR, AND CHECKS THE ROUTINE THAT SETS ALL WRITEABLE BITS AND SSR) IT THEN SETS BIT11 IN THE TARGET REGISTER IN THE ''SCR'' (MASTER CLEAR) INDEED CLEARED ALL BITS IN THE TARGET REGISTER. IT PERFORMS THIS SEQUENCE FOR ALL TARGET REGISTERS. IF A REGISTER FAILS TO CLEAR PROPERLY, THE ERROR IS REPORTED, AND THEN TESTS THE NEXT REGISTER [N SEQUENCE. ERRORS: RN 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 1.) EAR ERROR TO 3 REPORTS THAT THE SH6 SCR 11 REGISTER WHOSE ADDRESS CLEAR WHEN MASTER CLEAR WAS ACTIVATED. IS IN RZ2 FAILED SYNC: LA R84 M7289 H (MASTER CLEAR) FK2 DEBUG: L2 R 8844 3053 3054 3055 3056 3057 3058 1.) 2.) 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 307 3072 IF THE ERROR REPORTS INDICATE THAT ALL REGISTERS ARE FAJLING, ESTABLISH AN ERROR SCOPE LOOP AND PROCEED TO BACKTRACK THROUGH THE KEY LOGIC SIGNALS LISTED BELOW. IF ONLY ONE REGISTER FAILS WITH ALL SET BITS -- THEN LET TESTS 03-10 RUN -= THEY WILL PROBABLY GIVE BETTER TESTS TO DEBUG THE FAULT. ISOLATION. USE ONE OF THESE KEY LOGIC: trarReeRRe M7277 Y 003106 003112 003114 003116 003120 003122 003126 012705 010125 010125 010125 010125 062745 062745 027320 000016 000014 SH3 INIT A L B L A H B H SCR HIGH BYTE H FR2 FM2 EF2 Fv2 Pl SH4 INIT INIT INIT LOAD M7289 SHé6 SCR 11 M7278 SH3 BUFF MoV #MSTCLR,RS ;GET POINTER TO ADDRESS TABLE MoV R1,(RS5)+ sSCR,LPR,BKR, AND SSR REGISTERS Mmov MoV Mov ADD ADD SEQ 0073 SEQ 0072 AR SN ENERECERRNOOOINS TEST ABSTRACT: 3034 3035 3036 3037 3038 3039 3040 3041 3073 3074 3075 3076 3077 3078 3079 3080 H 10-MAR-78 T2 R1,(R5)+ R1,(R5)+ R1,(RS)¢ #SSR,-(R5) #BKR, - (RS) H (MASTER CLEAR) DATA 11 H FKZ AAl sSET UP THE TEST ADDRESS TABLE SO THAT ;1T CONTAINS THE ADDRESSES OF THE ;GENERATE SSR ADDRESS :GENERATE BKR ADDRESS CZOKM-D-0 CZOHMD.P11 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 309 3092 3093 3094 3095 3096 MACY11 30A(1052) 003132 003136 003140 062745 005745 005004 000004 003142 003144 003150 003152 003156 003162 003164 012502 022705 001415 012712 052711 011203 001766 003166 003172 003200 003202 004737 012737 09-MAR-78 15:32 104003 000757 10-MAR-78 12 6 I 08:05 PAGE 76 TEST THAT ''MASTER CLR'' CAN CLEAR THE ADD TST CLR 1$: 027330 2%: 177777 004000 024412 003152 MoV (SCR) sRESULT S/B 000000 AFTER MASTER CLEAR (R5)+,R2 ;GET REG ADDRESS (R2) ,R3 ;GET #MSTCLR+10,R5 TST3 #-1,(R2) #BIT11,(RD) BEQ 1$ JSR Mov ERROR PC,SUERZ #2% ,SLPERR 3 BR ;GENERATE LPR ADDRESS ;POINT RS TO FIRST ADDR ENTRY R4 CMP BEQ MOV BIS Mov 001110 #LPR,-(RS) -(RS) ''SCR' "LPR'',"BKR'',AND ''SSR'' REGS 1% ;DONE ALL FOUR REGS ?? ;.BR IF YES ;SET 1'S IN REGISTER ;ISSUE MASTER CLEAR CONTENT OF ;;BR IF REGISTER IT'S ALL ZEROES ;GO SET UP ERROR INFO ;SET UP ERROR LOOP RETURN ;MASTER (LR FAILED TO CLR SEL. ;GO TEST NEXT REGISTER REG. SEQ 0074 SEQ 0073 CZOKM-D-0 CZOHMD .P11 b ek b VO ~NO AV,] BN =SOOBNONSB WSOV NN NN O J 6 08:05 PAGE 77 TEST "'SCR'" REG R/W BITS CAN SET/CLR 10-MAR-78 13 R J*TEST AN 3 000004 TST3: .REM TEST RN R RN R AT AN RN RN RN RN ORI RS R R TR N R AT (NORMAL MODE) TR R R RN RN RN RN RN T RERO AR SCOPE 4 ABSTRACT: (222200200 RRSd THIS TEST VERIFIES THAT EACH R/W BIT IN THE ''SCR’’ REGISTER CAN SE INDIVIDUALLY SEY AND CLEARED IN NORMAL MODE (MAINT BIT = 0) A Bl MASK (RGMSK1: 131177) IS USED TO DEFINE THE R/W BITS ( ALL BUT BITS 14, 11, 10, 8, AND 7). THE TEST IS REPEATED ELEVEN TIMES WITH A ODIFFEFENT BIT SELECTED FOR EACH TEST. RS CONTAINS THE BIT CURRENTLY BEING TESTED. IF AN ERROR IS DETECTED, IV IS REPORTED AND THEN THE RESUAMES WITH THE NEXT BIT IN SEQUENCE UNTIL ALL HAVE BEEN TESTED. b cd s b wd b e 003204 Rt TR SEQ 0075 SEQ 0074 (NORMAL MODE) TEST ""SCR"’ REG R/W BITS CAN SET/CLR DR ERRORS: NI PO NI AN PO NI NI PO N D o od end AN N NN W 3097 3098 3099 3100 3101 3102 3103 3104 3105 MACYTT 30A(1052) 09-MAR-/R 15:32 |22 & K] TEST WA A — b Lt Wl A b L W b — W d ad el L A A A D o LN W w WA N WA D wed d AN A d U ) D i D el D d A G AN W AN W AN G sd D b kRN el b Al Al W el A cnd L G = — ol el il s wmh Wl Wl Al Wl Ll L A AR 000 Lo = OOV~NOWV W— 140 1.) ERROR 2 IS CALLED TO REPORY A FAILURE AGAIN TO REPORT A FAILURE TO CLEAR PROPERLY. TO SET PROPERLY AND SYNC: 1.) SET FAILURE M7277 SH& LOAD SSR LOW BYTE H CR1 2.) CLR FAILURE M7277 SH4 LOAD SSR HIGH BYTE H o DEBUG: ANRRAEY 1.) 2.) IF ALL BITS FAIL - SUSPECT THE ''LOAD SCR'' SIGNALS ON THE M7277 SH&. IF ONLY ONE OR TWO BITS FAIL - SUSPECT EITHER THE ''SCR' REGISTER FLOPS ON THE M7289 SH6, THE BUS RECEIVERS ON THE M7278 SH3 AND SH4, OR THE MULTIPLEXORS AND BUS DRIVERS ON THE M7289 SH5-8. KEY LOGIC: kAT EAREAES M7278 SH3 BUFF DATA <15:08> H M7277 SH4 LOAD SCR LOW BYTE H M7289 SHS SH4 SH6 SH7 SH8 BUFF DATA <07:00> H (re LOAD SCR HIGH BYTE H DATA TO BUS H DATA SOURCE <A,B,C> H CP1 EN2 DU1,DU2.DT2 BUF 8US BUS SCR E0S5-12 DATA TO BUS B H DATA <15:12> L DATA <11:08> L <15:00> H BUF DATA TO BUS A H BUS DATA <07:04> L BUS DATA <03:00> L £05-8 MACY11 30A(1052) 003206 003214 003216 012737 010102 012705 003236 003222 003226 003230 003232 003232 003234 030537 001003 006305 001430 000772 003236 003240 003242 003250 003252 003254 003256 010504 005012 112761 010512 011203 020403 001403 003260 003264 004737 104002 003266 003270 003276 003300 003302 005004 003304 003310 003312 004737 CZDHM-D-0 CZOHMD PN 3153 3154 3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 nn 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 09-MAR-78 15:32 112761 040512 011203 001403 104002 000746 10-MAR-78 13 001110 1%: 2$: 3s: : 4% 000000 024412 000000 000017 5%: 024412 6$%: (NORMAL MODE) ;SET UP ERROR LOOP RETURN ;GET REGISTER ADDRESS JSET UP TO START WITH BIT0QO BIT BNE :SHALL WE TEST THIS BIT ? ASL R5.RGMSK1 4% RS JSHIFT TO TST NEXT BIT BEQ BR TST4 1% :.<BR IFf DONE ALL R/W BITS> ;GO TEST NEXT BIT MoV CMP 1] R5,R4 (R2) #0,SSR(R1) RS, (R2) (R2) ,R3 R4 ,R3 5% ;RESULT S/B IN Ré JINIT REG BEING TESTED . SCOPE SYNC ;SET THE BIT :GET THE WAS DATA ;RESULT = S/B DATA ?? ;BR IF YES JSR ERROR PC,SUER2 2 ;GO SET UP ERROR INFO ;SELECTED BIT FAILED TO SET IN SCR CLR Movs BIC MoV BEQ R4 #0,SSR+1(R1) ;SET UP TO CLEAR THE BIT $/B8=000000 R5,(R2) (R2) ,R3 63 JSR ERROR BR PC,SUER2 2 2% CLR Mmovas mov Mmov 000016 6 #4S ,SLPERR MoV MOV MoV 000001 027662 K 08:75 PAGE 78 17<" *"SCR'' REG R/W BITS CAN SET/CLR R1,.R2 #1,R5 sBR IF YES s SCOPE SYNC ;CLR THE SELECTED BIT ;GEY THE WAS DATA ¢BR IF IT CLEARED ;GO SEVT UP THE ERROR INFO ;SELECTED BIT FAILED TO CLEAR IN SCR ;GO SELECT NEXT BIT SEQ 0076 SEQ 0075 (ZDHM-D-0 CZOHMD.P11 3184 3185 3186 3187 3188 3189 MACY11 30A(1052) 09-MAR-78 15:32 3232 3233 3234 3235 3236 3237 3238 3239 SEQ 0077 SEQ 0076 coNgRERREERTLATERIAECARARIRANEARNICCSLEECAACECERARRARCRAANOCRRANRANRONNETS STEST 4 L 003314 TST4: 000004 -RER e TEST ''SCR'' REG. READ ONLY BITS (NORMAL MODE) T R e L T T S T P Y SCOPE 4 TEST ABSTRACT: 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 L 6 08:05 PAGE 79 TEST "SCR'* REG. READ ONLY BITS (NORMAL MODE) 10-MAR-78 T4 1833222202022 4 ] THIS TEST VERIFIES THAT THE “'SCR'* REGISTER READ ONLY BITS CAN NOT BE SET OR CLEARED IN NORMAL MODE. A BIT MASK (RGMSK2: 046600) IS USED TO DEFINE THE READ ONLY BITSS (14,11,10,8, AND 7). THE TEST IS REPEATED FIVE TIMES, ONCE FOR EACH BIT TO BE TESTED, AND ANY ERRORS DETECTED ARE REPORTED. AFTER THE ERROR REPORT THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE UNTIL ALL BITS HAVE BEEN TESTED. : ERRORS AN 1.) ERROR 2 IS CALLED TO REPORT ANY READ ONLY BIT TO RESPOND PROPERLY. THAT FAILED SYNC: tRRERR M7277 SH4 LOAD SSR LOW BYTE H CR1 DEBUG: LA AR SR SAME AS FOR TEST 03 KEY LOGIC: AR ERRATY SAME AS FOR TEST 03 b4 003316 003320 003324 003330 003332 003334 003336 010102 012705 030537 001003 006305 001420 000772 003340 003342 003344 005004 005012 112761 000000 004737 012737 024412 003340 003352 003354 003356 003360 003364 003372 003374 010512 011203 001765 104002 00G756 Mov R1,R2 sMAKE 28: BIT BNE ASL BEQ BR RS ,RGMSK2 33 RS TSTS 1% ;IS IT A READ ONLY BIT ?? sBR IF IT IS - GO TEST IT ;SHIFT BIT MARKER :.BR IF DONE ALL BITS ;GO TEST THIS BIT 3s: CLR R4 ;RESULT S/B = 000000 000016 Movs #0,SSR(R1) :SCOPE SYNC 001110 Mov ERROR BR JSR PC,SUER2 000001 027664 1s: Mov CLR Mov MoV Bea #1,RS5 (R2) RS, (R2) (R2) ,R3 2% #3$ ,SLPERR 2 2% IT THE REG. ADDR ALSO ;INIT BIT TEST MARKER ;INIT REG BEING TESTED JATTEMPT TO SET A READ ONLY BIT ;GET THE WAS DATA ;BR IF THE BIT DIDN'T SET ;GO SET UP ERROR INFO ;SET UP ERROR LOOP RETURN ADDR ;READ ONLY BIT SET IN "'SCR" ;CONTINUE WITH NEXT BIT 3266 3267 3268 3269 3270 3en 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 n 10-MAR-78 15 P T L R s*TEST 5 R T SEQ 0078 SEQ 0077 T I P T I I Y TEST "'SCR’* REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE e P L S R I SCOPE T1ST5: . REM X TEST ABSTRACT: EERREEARERRNERY THIS TEST VERIFIES THAT THE ''SCR'* REGISTER READ-ONLY BITS (14, 10, AND 07) CAN BE SET/CLR IN MAINT. MODE (SCRO9=1) ONLY. A BIT MASK (RGMSK6: 042200) IS USED TO DEFINE THE BITS TO TEST. THE TEST PERFORMS . . . 000004 i . 003376 6 08:05 PAGE 80 TEST "'SCR'’ REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE DO NO\WV NN — 3240 3241 3242 3243 3244 3245 3246 3247 5248 3249 3250 3251 3252 3253 2254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 MACY11 30A(1052) 09-MAR-78 15:32 . . . . THE FOLLOWING SEQUENCE: SELECT A BIT TO TEST SET MAINT. MODE SET THE BIT AND VERIFY THAT IT SETY CLEAR THE MAINT. MODE BIT ATTEMPT TO CLEAR THE TEST BIT TEST TO SEE THAT IT DID NOT CLEAR SET MAINT. MOOE CLEAR THE TESY BIT AND VERIFY THAT IT CLEARED . REPEAT 1-7 UNTIL ALL BITS HAVE BEEN TESTED ANY ERRORS DETECTED ARE REPORTED AND THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE UNTIL ALL BITS HAVE BEEN TESTED. ERRORS: kAR RTRAY 1.) ERROR 2 IS CALLED AT THREE DIFFERENT POINTS TO REPORT ONE OF ngrgflggf POSSIBLE FAILURE MODES DESCRIBED IN 3, 6. AND 7 IN THE A ACT, SYNC: EARARR 1.) STEP 3 FAILURE M7277 2.) LOAD SSR LOW BYTE H CR1 STEP 5 FAILURE TO REMAIN SET WITH MAINT MODE NOT SET M7277 3.) SH4 TO SET WITH MAINT. MODE SET SH4 LOAD SSR HIGH BYTE H P2 STEP 8 FAILURE TO CLEAR WITH MAINT. MODE SET M7277 SH& LOAD LPR H EP2 DEBUG: L82822 1.) ASSUMING THE PREVIOUS TESTS RAN SUCCESSFULLY THE FAULT LIKELY THE M7289 MODULE. KEY LOGIC: kAR REENL IS MOST -~ CZ0HM-D-0 CZ0AMD.P11 CZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 15 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 M 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 N 6 PAGE 81 08:05 TEST °*'SCR'" REG. BITS THAT CAN BE SET/CLR IN MAINT. MODE SAME AS TEST O3 WITH THE FOLLOWING ADDITION 003400 003406 003410 003414 003420 003422 003624 003426 003430 003432 003436 003440 003444 003452 003454 003456 003460 012737 010102 012705 030537 001003 003430 000001 027674 010504 052704 005012 052712 112761 050512 011203 020304 001404 2%: 001000 000000 000016 000754 003472 003476 003502 003510 003512 003514 003516 042712 042704 112761 040512 011203 020304 001404 001000 001000 000000 003520 003524 003526 004737 024412 003530 003534 003536 003544 003546 003550 003552 012704 050412 012761 040512 024412 A ¥ 000017 000717 5%: 001000 000000 0 104002 #38 SLPERR R1,R2 #1,R5 R5.RGMSK6 ;SET UP THE ERROR LOOP RETURN ;MAKE IT REG ADDR T00 ;INIT BIT TEST MARKER ;1S IT A READ ONLY BIT ?? ;BR IF YES = TEST IT sSHIFT THE BIT MARKER ;.BR IF DONE ALL SELECTED BITS ;GO TEST FOR THIS BITY BIS CLR BIS move BIS R5,R4 #BIT09,R4 (R2) #B1709, (R2) #0,SSR(R1) R5, (R2) CMP BEQ 43 sSET UP S/8 DATA ;PUT IN THE MAINT. BIT ;INIT REG BEING TESTED ;TURN ON MAINT. MODE ;SCOPE SYNC sSET THE SELECTED BIT ;GET THE WAS DATA ;010 SELECTED BIT GET SET ?? :BR IF 1T DID BIT BNE ASL 8EQ 8R Mov 000004 3$ RS TST6 1$ (R2) ,R3 PC,SUER?2 2 ;GO SET UP ERROR INFO 2% ;SELECTED BIT FAILED TO SET IN MAINT MODE ;GO TEST NEXT BIT BIC BIC #81709, (R2) #B1T09,R4 #0,SSR+1(R1) ;TURN OFF MAINT. MODE sCLR MAINT BIT IN S/B DATA s SCOPE SYNC BIC MOV cmp BEQ RS, (R2) (R2),R3 R3,Ré 5% JSR ERROR PC,SUER2 2 23 ;GO SET UP ERROR INFO :SELECTED BIT GOT CLEARED WITH MAINT MODE OFF ;60 TEST NEXT BIT MOV BIS Mov BIC MoV CMP #BI1T09,R4 R4, (R2) ;SET UP S/B DATA :SET MAINT. MODE BEQ 024412 74121 ONE-SHOTS E35-6, E23-6 JSR ERROR BR BR 011203 004737 mov mov Mov mMove 000735 w SH4 Mov 003470 104002 3s: 001000 004737 104002 1 1%: 006305 001457 000772 003462 003466 003554 003560 003562 001110 m7289 JSR ERROR BR ATTEMPT TO CLR SELECTED BIT ;GET THE WAS DATA :DID BIT GET CLEARED ?? ;BR IF IT DIDN'T #0,LPR(R1) ;SCOPE SYNC ;NOW CLR SELECTED BIT ;GET THE WAS DATA ;DID BIT GET CLEARED 0K ?? :BR IF YES PC,SUERZ ;G0 SET UP ERROR INFO ;FAILED TO CLR SELECTED BIT IN MAINT MODE ;GO SELECT NEXT BIT FOR TEST R5,(R2) (R2) ,R3 R3,R4 23 2 2% SEQ@ 0079 SEQ 0078 CZOMM-D-0 CZOHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 16 3347 7 08:05 PAGE 82 TEST THAT ALL R/W BITS IN "LPR" CAN BE SET/CLR TeTEST 6 3349 RPN 003564 000004 TEST THAT ALL R/W BITS IN "'LPR'’ CAN BE SET/CLR T E IR TR PSRN E AR LR E LR NR AN ERARORORRRNNOREROREY TST6: SCOPE .REM X TEST ABSTRACT: 3353 TERANENRRENOEELY 3354 3355 3356 3357 ;;gs THIS TEST VERIFIES THAT ALL R/W BITS IN THE '‘LPR'® REGISTER CAN BE SET AND CLEARED INDIVIDUALLY. A BIT MASK (RGMSK3: 177767) IS USED TO DEFINE THE BITS TO BE TESYED (ALL BUT BITO3). THE TEST SEQUENCE IS AS FOLLOWS: 3360 3361 3362 gggz 1. 2. 3. 4. SELECY A BIY TO TEST SET THE BIT AND VERIFY [T SET CLEAR THE BIT AND VERIFY [T CLEARED REPEAT 1 THRU 3 UNTIL ALL BITS TESTED 3365 gggg ANY ERRORS DETECTED ARE REPORTED AND AFTER THE ERROR, RESUMES WITH THE NEXT BIT IM SEQUENCE. 3368 ERRORS: 3369 THE TEST 122323 3370 337N 3372 3373 3374 SYNC: 3376 3377 1.) FAIL TO SET: 1.) 3375 ERROR 4 IS CALLED TO REPORT BOTH FAIL TO SET AND FAIL TO CLEAR FAULTS. 132223 2.) FAIL TO CLEAR: g%;g 3380 m7277 SH4 M7277 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H R P2 DEBUG: 3381 223721 3382 3383 3384 3385 2.) 3388 KEY LOGIC: 1.) gggg 3389 IF ALL BITS FAIL THE PROBLEM IS MOST LIKELY THE M7277 MODULE (LPR LOAD SIGNALS) IF NOT THEN IT IS PROBABLY AN ''LPR'‘ REGISTER CHIP OR BAD OUTPUT DATA MUX CHIP, BOTH ON THE M7278 MODULE. NARAERRRES 3390 g%g; 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 SEQ 0080 SEQ 0079 R e I R R IR R Y 3348 3350 3351 3352 8 003566 003574 003576 012737 010102 062702 003622 000006 001110 M7277 SH4 M7278 SHS LPR SHé LPR SH7 LPR SH8 LPR SH5,6.7.8 Mov MoV ADD LOAD LPR H #3%,SLPERR R1,R2 #LPR,R2 <15:12> L (E52) <11:08> L (E37) <07:94> L (E59) <03:00> L (E61) OUTPUT MUX CHIPS EP2 (74151°'S PIN 2} ;SET UP THE ERROR LOOP RETURN ;COPY IT IN R2 ;GENERATE REGADR IN R2 MACY11 30A(1052) 003602 003606 003612 003614 003616 003620 012705 030537 001003 006305 001430 000772 000001 027666 003622 010504 005012 112761 010512 011203 020304 001403 CZOHM-D-0 CZDHMD PN 3403 3404 3405 3406 3407 3408 3409 36410 3411 3412 3413 3414 3415 3416 3617 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429 003624 003626 003634 003636 003640 003642 09-MAR-78 15:32 003644 003650 004737 003652 005004 112761 040512 011203 001752 003654 003662 003664 003666 003670 003674 003676 104004 004737 104004 000746 000060 10-MAR-78 16 1%: 2s: 3s: MoV 000016 024412 000017 MoV BIY BNE ASL BEQ BR CLR mMove MoV MOV CMpP 8EQ 024412 000000 7 c 08:05 PAGE 83 TEST THAT ALL R/W BITS IN 'LPR'" CAN BE SET/CLR 4$: #1,R5 RS ,RGMSK3 JINIT BIT TEST MARKER ;TEST THIS BIT 27 RS 1S77 1$ :.BR IF DONE ALL BITS ;GO TEST NXT BIT 33 R5,R4 (R2) #0,SSR(R1) RS, (R2) (R2) ,R3 R3,R4 4s sBR IF JSHIFT YES THE MARKER ;SET UP S/B DATA ;INIT REG BEING TESTED :SCOPE SYNC ;SET LPR BIT ;GET THE WAS DATA ;DID IT SET :BR IF IT SET PRGPERLY JSR ERROR PC,SUER2 ;GO SET UP ERROR INFO ;LPR BIT FAILED TO SET PROPERLY CLR move 8IC MoV 8EQ R4 #0,SSR+1(R1) RS, (R2) (R2) ,R3 ;GET READY TO CLEAR SELECTED BIT sSCOPE SYNC ;CLEAR THE BIT ;GET THE WAS DATA ;BR IF BIT CLEARED PROPERLY PC,SUER?2 ;60 SET UP ERROR INFO ;LPR BIT FAILED TO CLEAR PROPERLY ;G0 SELECT NEXT BIT JSR ERROR BR [ 23 4 2% SEQ 0081 SEQ 0080 CZDHR-D-0 CIDHMD.P1Y MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 17 7 D 08:05 PAGE 84 TEST THAT ALL R/W BITS [N "BKR' CAN BE SET/CLR 3430 T 3431 ;«TEST 7 3432 3433 3434 3435 IR 003700 000004 R R SEQ 0082 SEQ 008! R R TEST THAT ALL R/W BITS IN "BKR'' CAN BE SET/CLR R R AR AR T TR PR ORI AN RN R AR A NRAANONRCNORENE TS17: SCOPE .REM 4 TEST ABSTRACT: 3436 2222288223222 3437 3438 3439 3440 ;22; THIS TEST VERIFIES THAT ALL BITS IN THE BREAK CONTROL REGISTER CAN BF SET AND CLEARED INDIVIDUAILY. IT USES A BIT MASK (RGMSK&: 177777) TO DEFINE THE R/W BITS (ALL 16.). R5 ALWAYS CONTAINS THE BIT CURRENTLY SELECTED FOR TEST. THE TEST SEQUENCE IS AS FOLLOWS: 3443 3444 3445 1. SELECT A BIT TO TESTY 2. SET THE BIT AND VERIFY THAT IT SET PROPERLY 3. CLEAR THE BIT AND VERIFY THAT IT CLEARED PROPERLY 3448 3449 3450 ANY ERROR DETVECTED IS REPORYED AND THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE. 3452 RERERERRE gzzg 4. REPEAT 1 THRU & UNTIL ALL BITS YAVE BECN TESTED. 3451 ERRORS: 3453 3454 3455 3456 3457 3458 3459 3460 ;22; 1.) FAIL TO SET: 2.) FAIL .J CLR: 3463 DEBUG: 1.) ERROR S5 IS CALLED TO REPORT BOTH FAIL TO SET PROPERLY AND FAIL TO CLEAR PROPERLY FAULTS. SYNC: AEANESE 3464 m7277 m7277 SH4 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 (P2 32228} 3465 3466 3467 ;zgg 1.) THE ONLY DIFFERENCES IN THE DATA PATH HERE AND THAT FOT THE PREVIOUS TESTS ARE THE ACTUAL REGISTER CHIPS AND THE INPUT SELECTED ON THE OUTPUT DATA MULTIPLEXORS. %2;? 2.) IF ALL BITS FAIL THE PROBLEM IS MOST LIKELY THE M7277. gz;g 3.) IF ONLY ONE OR TWO FAIL THE PROBLEM IS MOST LIKELY THE M7278. 3474 KEY LOGIC: 3475 P22 222223; 3476 3477 3478 M7277 g:gg LOAD BCR H DATA TO BUS H DATA SOURCE (A,B.C) H 3481 g:g% 3484 3485 SH& . 003702 003710 012737 010102 003736 001110 FU1 EN2 DUT,DU2.DT2 M7278 SHS - SH8 74175 REGISTER CHIPS (ES51,E38,.E67,E60) SHS - SH8 74151'S MUX CHIPS INPUT PIN 13 MOV MoV #3% ,SLPERR R1,R2 ;SET UP THE ERROR LOOP RETURN ;GENERATE ''BKR'' ADDRESS IN R2 CZDHM=-D-0 CZOHMD . P11 3486 3487 3488 3489 3490 34N 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 MACY11 30A(1052) 09-MAR-78 15:32 003712 003716 003722 003726 003730 003732 003734 062702 012705 030537 001003 006305 001430 000772 003736 003740 003742 003750 003752 003754 003756 010504 005012 112761 050512 011203 020304 001403 003760 003764 004737 104005 003766 003770 003776 004000 004002 005004 112761 040512 011203 001752 004004 004010 004012 004737 104005 000746 10-MAR-78 17 000014 000001 027670 1%: 2%: 3%: 000000 000016 024412 000000 024412 000017 4%: t 7 08:05 FAGE 85 TEST THAT ALL R/W BITS IN "'BKR'' CAN BE SET/CLR ADD MoV BIY BNE ASL BEQ BR #BKR,R2 #1,R5 RS ,RGMSK4 3% RS TST10 1% MoV (LR Mmovs BIS Mov CMP BEQ RS,R4 (R2) #0,SSR(R1) RS, (R2) (R2) ,R3 R3,R4 43 sSET UP S/B DATA ;INIT REG BEING TESTED ;SCOPE SYNC ;SET THE SELECTED BIT IN "'BKR" ;GET THE WAS DATA ;DID BIT SET 0K ;BR IF YES JSR ERROR PC,SUER2 5 ;GO SET UP ERROR INFO ;BKR BIT FAILED YO SET PROPERLY CLR MOve 8IC MoV 8EQ R4 #0,SSR+1(R1) R5,(R2) (R2) ,R3 2% ;SET UP S/B DATA ;SCOPEE SYNC : CLEAR BKR 81T ;GET THE BKR WAS DATA ;BR IF BKR BIT CLEARED 0K JSR ERROR BR PC,SUER2 5 23 ;GO SET UP ERROR INFO ;BKR BIT FAILED TO CLR PRCPEKLY ;GO SELECT NEXT BIT INIT BIT TEST MARKER ;TEST THIS BIT ?? ;BR IF YES ;SHIFT BIT MARKER ;.BR IF ALL BITS TESTED ;GO TEST THE BIT sta 0083 SEQ 0082 (ZDHM-D-0 CZDHMD.P11 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3547 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 MACY11 30A(1052) 09-MAR-78 15:32 F 7 08:05 PAGE 86 TEST THAT ALL R/W BITS 10-MAR-78 110 P R LR Rt ;*TEST 10 IR 004014 000004 R TEST e T T T P T L R T TEST THAY ALL R/W BITS IN "'SSR'' CAN BE SEV/CLR AR TST10: -REM SEQ 0084 SEQ 0083 IN "'SSR' CAN BE SET/CLR RN ISR AR R R PR TR ER AR A T ENE AN EAE IR AN R IED SCOPE X ABSTRALT: IE2A2 SRS THIS TEST VERIFIES THAT ALL R/W BITS IN THE SILO STATUS REGISTER (SSR) CAN BE SET AND CLEARED INDIVIDUALLY. IT USES A BIT MASK (RGMSK5: 100077) TO DEFINE THE R/W BITS (15,5,4,3,2,1, AND 0). R5 ALWAYS CONTAINS THE BIT CURRENTLY SELECTED FOR TEST. THE TEST SEQUENCE IS AS FOLLOWS: 1. 2. 3. 4. SELECT A BIT TO TEST SET THE BIT AND VERIFY THAT IT SET PROPERLY CLEAR THE BIT AND VERIFY THAT [T CLEARED PROPERLY REPEAT 1 THRU 3 UNTIL ALL BITS ARE TESTED ANY ERRORS DETECTED ARE REPORTED AND NEXT BIT IN SEQUENCE. THEN THE TEST RESUMES WITH THE ERRORS: L3222 1.) 8224 ERROR 6 IS CALLED TO REPOORT BOTH FAIL FAIL TO CLEAR PROPERLY FAULTS. TC SET PROPERLY AND SYNC: Y 1.) FAIL TO SET: 2.) FAIL TO CLR- M7277 SH4 M7277 SH4 LOAD LPR H LOAD BCR H EP2 FU1 DEBUG: L2228 2 1.) 2.) 3.) 4.) THE ONLY DIFFERENCES BETWEEN THEE DATA PATHS USED BY THIS TEST AND THAT USED BY THE PREVIOUS TESTS ARE THE ACTUAL '‘SSR'' REGISTER CHIPS AND THE INPUT PIN SELECTED ON THE OUTPUT DATA MULTIPLEXORS. IF ALL BITS FAIL IT IS MOST LIKELY THE M7277 IF BITS <13:08> FAIL IT IS MOST LIKELY THE M7279 IF JUST ONE OR TWO BITS FAIL IT IS MOST LIKELY THE M7278 KEY LOGIC: I AARSSRS SRR M7277 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H DATA TO BUS H DATA SOURCE (A,B,C) H M7279 SH2 SSR <13:08> H M7278 SHS5 - SH8 CR1 CP2 EN2 Dut,DU2.DTZ (E20 AND E24) REGISTER CHIPS E53,E68, OR E69 (74175'S) OUTPUT MUX CHIPS - (74151'S PIN 12) CZDHM-D-0 CZDHMD P 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 MACY11 30A(1052) 09-MAR-~78 15:32 004016 004024 004026 004032 004036 004042 004044 004046 004050 012737 010102 062702 012705 030537 001003 006305 001435 000772 004052 004054 004056 004064 004066 004070 004074 004076 010504 005012 012761 050512 N11203 12703 vcu304 001403 004100 004104 004737 004106 004110 004116 004120 004122 004126 004130 005004 012761 040512 011203 042703 020304 001745 004132 004136 004140 004737 104006 104006 000741 004052 10-MAR-78 110 001110 000016 000001 027672 1%: 2%: 08:05 {EST PAGE 87 G THAT ALL R/W BITS 000000 000004 024412 000000 077700 024412 000014 4%: SET/CLR ;SET UP THE ERROR LOOP RETURN ;SET UP S/B DATA BIC CMP BEQ R5,R4 (R2) #0.LPR(R1) RS, (R2) (R2) ,R3 #77700,R3 R3,R4 4% ;GET THE WAS DATA ;CLEAR OUT DON'T CARE BITS ;DID BIT SET OK ;BR IF YES JSR ERROR PC,SUER2 6 ;GO SET UP ERROR INFO ;SSR BIT FAILED TO SE7 PROPERLY CLR Mov R4 #0,BKR(R1) R5,(R2) ;SET UP S/B DATA BIT BNE ASL BEQ Mov CLR mov BIS Mov 077700 IN "'SSR'' CAN BE #3% ,SLPERR R1,R2 #SSR,R2 #1,R5 R5,RGMSKS mov MoV ADD mov BR 3%: 7 BIC Mov (R2) ,R3 BIC CMP BEQ #77700,R3 R3,R4 JSR ERROR BR PC,SUER2 6 2% 2% ;GENERATE ''SSR'® ADDRESS IN R2 ;INIT BIT TEST MARKER ;TEST THIS BIT ?? :BR [F YES sSHIFT BIT MARKER ;:BR IF ALL BITS TESTED ;6O TEST THE BIT ;INIT REG BEING TESTED ;SCOPE SYNC ;SET THE SELECTED BIT IN ''SSR” :SCOPE SYNC ;CLEAR SSR BIT ;GET THE SSR WAS DATA ;CLEAR JUNK BITS ;DID THE SSR BIT GET CLEARED ?? ;BR If SSR BIT CLEARED 0K ;GO SET UP ERROR INFO ;SSR BIT FAILED TO CLR PROPERLY ;60 SELECT NEXT BIT SEQ 0085 SEQ 0084 CZDHM-D-0 CZDHMD.P1) 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 MACY11 30A(1052) 09-MAR-78 15:32 H 7 08:05 PAGE 88 TEST THAT CLR/SET OF BIT ''N'" IN "LPR'* DOES NOT CLEAR ANY OTHER BITS 10-MAR-78 T PR A seTEST N I 004142 000004 TST11: -RER Ty L Ty Y T R I T R R PR T TEST THAT CLR/SET OF BIT “'N'" IN '"LPR'* DOES NOT CLEAR ANY OTHER BITS RN TR RN RN NN PN TR E RN RN RN RN RN E TN TR RN RS SCOPE 1 TEST ABSTRACT: tARAAEAARSREOARNY THE THIS TEST VERI+IES THAT SETTING AND CLEARING EACH R/W BIT IN ""LPR'' REGISTER DOES NOT DISTURB (CLEAR) ANY OTHER BIT IN THE REGISTER. A BIT MASK (RGMSK3: RS ALWAYS CONTAINS IS AS FOLLOWS: VNS - 3617 3618 3619 3620 3621 3622 3623 3624 3625 . . . . . 177767) IS USED TO DEFINE THE R/W BITS (ALL BUT BIT 03). THE BIT CUKRENTLY SELECTED FOR TEST. THE TEST SEQUENCE SELECT A BIY TO TESY SET ALL THE WRITABLE BITS CLEAR THE SELECTED BIT =~ VERIFY IT CLEARED PROPERLY SET THE SELECTED BIT - VERIFY IT SET PROPERLY REPEAT 1 THRU & UNTIL ALL BITS ARE TESTED ANY ERRORS DETECTED ARE REPORTED AND NEXT BIT IN SEQUENCE . 3626 3627 3628 3629 THEN THE TEST RESUMES WITH THE ERRORS: Ak kNN 1.) 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 ERROR & IS CALLED TO REPORY BOTH FAIL FAIL TO SET PROPERLY FAULTS. TO CLEAR PROPERLY AND SYNC: ALY 1.) 2.) FAIL T0 CLR: M7277 FAIL TO SET: M7277 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H (R1 P2 DEBUG: LAAR R4 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 R 1.) PROBLEMS DETECTED BY THIS TEST INDICATE ADJACENT BIT INTERFERENCE CAUSED BY CROSS TALK OR NOISE. PROBLEM IS MOST LIKELY THE M7278. KEY LOGIC: (SAME AS FOR TEST 6) kRARAE AR AL 004144 004152 004154 004160 004164 004170 004172 004174 004176 004200 004204 012737 004200 062702 012705 030537 001003 006305 001436 000772 00000¢ 013704 005012 027666 010102 000001 027666 001110 b4 1$: 28%: 3s: Mov mov ADD Mov BIT BNE #3% ,SLPERR R1,R2 #LPR,R2 #1,R5 RS5,RGMSK3 3% ;SET UP THE ERROR LOOP RETURN ;SET UP THE REG ADDR ;INIT BIT TEST MASK ;TEST THIS BIT ?? ;BR If YES ASL R5 ;SHIFT THE BIT TEST MASK Mov CLR RGMSK3, R4 (R2) ;SET UP S/B DATA ;INIT REG BEING TESTED BEQ BR SEQ 0086 TST12 1% ;.BR IF TESTED ALL BITS ;GO TEST THIS BIT SEQ 0085 CZOHM-D-G CZOHMD PN 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 004206 004214 004216 004222 004224 004226 004230 MACY11 30A(1052) 112761 040504 900000 09-MAR-78 15:32 013712 040512 011203 020304 001404 027666 004232 004236 004240 004737 024412 004242 004244 004252 004254 004256 004260 050504 112761 050512 011203 020304 001744 004262 004266 004270 004737 104004 10-MAR-78 TM 000016 MoV cmMp BEQ 000740 000000 000017 4%: #0,SSR(R1) R5.R4 RGMSK3, (R2) RS, (R2) (R2) ,R3 R3.R4 4% ;SCOPE SYNC ;CLR BIT N" ;sSET ALL R/W BITS IN LPR ;CLEAR BIT ''N"' IN LPR ;GET THE WAS DATA ;DID IT CLEAR OK ? ;BR IF YES ;GO SET UP ERROR INFO ;BIT ''N'' FAILED TO CLR PROPERLY ;GO TEST NEXT BIT JSR ERROR BR PC,SUER?Z BIS MovB BIS JSET BIT N'' IN S/B DATA cmp BEQ RS.R& #0,SSR+1(R1) R5,(R2) (R2),R3 R3,R4 2% JSR PC,SUER? ;G0 SET UP ERROR INFO BR 2% ;60 SELECT NEXT BIT MOV 024412 7 08:05 PAGE 89 TEST THAT CLR/SET OF BIT *'N'' IN "'LPR'' DOES NOT CLEAR ANY OTHER BITS MOvB 8IC MOV BIC 000754 104004 I ERROR 4 2% 4 ;SCOPE SYNC ;SET BIT “N'' IN LPR ;GET THE WAS DATA :DID BIT "'N"' SET PROPERLY ? ;BR IF YES ;BIT "N’ FAILED TO SET PROPERLY SEQ 0087 SEQ 0086 CZDHM-D-0 CIDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 112 3681 3726 3727 3728 3729 3730 3TN 3732 3733 3734 3735 3736 A R NN ;*TEST 12 7 IR NP R AR RN AN R TR G AR E N RO RN L T T T I T 004272 TST12: 000004 .REM SCOPE X TEST ABSTRACT: ISARERARRA2R22 2] B8IT THIS TEST VERIFIES THAT CLEARING AND SETTING EACA R/W IN THE BREAK CONTROL REGISTER INDIVIDUALLY DOES NOT DISTURB ANY OF THE OTHER BITS. A BIT MASK (RGMSK4: THE R/W BITS TEST. THE . FOR . 177777) IS USED TO DEF INE (ALL 16.). RS ALWAYS CONTAINS THE BIT CURRENTLY SELECTED TEST SEQUENCE IS AS FOLLOWS: SELECT A BIT TO TEST SET ALL WRITABLE BITS IN THE 'BKR" CLEAR THE SELECTED BIT AND VERIFY THAT IT CLEARED PROPERLY SET THE SELECYED BIT AND VERIFY THAT IT SET PROPERLY . REPEAT 1 THRU & UNTIL ALL BITS HAVE BEEN TESTED ANY ERROR DETECTED IS REORTRD AND THEN THE NEXT BIT IN SEQUENCE. TEST RESUMES WITH THE ERRORS: thRARRLR 1.) ERROR 5 IS CALLED TO REPORT BOTH CLEAR AND SET FAULTS. SYNC: 143 8 81 1.) FAIL TO CLR: 2.) FAIL TO SET: M7277 m7277 SH4 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 (P2 DEBUG: AERRAR 1.) LIKE THE PREVIOUS TEST, FAILURES HERE INDICATE INTERFERENCE CAUSED BY CROSS TALK OR NOISE. LIKELY THE M7278 MODULE. KEY LOGIC: ADJACENT BIT THE FAULT [S MOST (SAME AS FOR TEST 7) AEAARRRERL 004274 004302 004304 004310 004314 004320 004322 004324 004326 012737 010102 062702 012705 030537 001003 006305 001436 000772 004330 004330 004334 013704 040504 027670 00001¢ 060001 027670 001110 b4 18: 2%: 3s: SEQ 0088 TEST THAT CLR/SET OF BIT "'N'' IN 'BKR'* DOES NOT CLEAR ANY OTHER BITS [ 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715 3716 3717 3718 3719 3720 3721 3722 3723 3724 3725 J PAGE 90 TEST THAT CLR/SET OF BIT ''N'' IN "'BKR'' DOES NOT CLEAR ANY OTHER BITS WSS — 3682 3683 3684 3685 3686 3687 3688 3689 08:05 Mov MOV ADD Mov BIT BNE #38 ,SLPERR R1,R2 #BKR,R2 #1,R5 RS ,RGMSK4 3% mav RGMSK4 ,Ré ASL BEQ BR Bi( R5 TST13 1% RS,R& ;SET UP THE ERROR LOOP RETURN ;SET UP THE REG ADDR ;INIT BIT TEST MASK ;TEST THIS BIT ?? :BR IF YES sSHIFT THE BIT TEST MASK ;.BR IF TESTED ALL BITS ;GO TEST THIS BIT ;SET UP S/B DATA :CLR BIT "N" SEQ 0087 CZOKM-D-0 CZOHMD.P11 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 7752 3753 3754 3755 3756 3757 3758 004336 004340 004 344 004352 004354 004356 004360 MACY11 30A(1052) 09-MAR-78 15:32 005012 013712 112761 040512 011203 020304 001404 004362 004366 004370 004737 004372 004374 004402 004404 004406 004410 050504 112761 050512 011203 020304 001744 004412 0046416 004420 004737 104005 027670 000000 10-MAR-78 T12 CLR 000016 000017 4% REG BEING TESTED EC.SUERZ ;GO SET UP ERROR INFO 2% ;60 TEST NEXT BIT BIS MOVB BIS R5,R4 #0,SSR+1(R1) RS, (R2) MOV cmp BEQ 024412 ;INIT CLEAR ANY OTHER BITS JSR ERROR BR Cmp BEQ 000000 BIT “'N"' IN "'BKR'' DOES NOT RS, (R2) (R2) ,R3 R3,R4 4% BIC fov 024412 (R2) RGMSK4, (R2) 7 JSET ALL R/W BITS IN BKR . SCOPE SYNC ;CLEAR BIT *N'' [N BKR ;GET THE WAS DATA ;DID IT CLEAR OK ? ;BR IF YES MoV Move 000754 104005 000740 K 08:05 PAGE 91 TEST THAT CLR/SET OF JSR ERROR 8R #0,SSR(R1) ;BIT "'N'" FAILED TO CLR PROPERLY ;SET BIT “'N'' IN S/B DATA s SCOPE SYNC ;SET BIT "'N' IN BKR sGEY THE WAS DATA (R2),R3 R3,R4 2% EC.SUERZ 2$ ;DID BIT "N’ SET PROPERLY ? :PR IF YES GO SET UP ERROR INFO /Bn “N'* FAILED TO SET PROPERIY / LGO SELECT NEXT BIT SEQ 0089 SEQ 0088 CZDHA-D-0 CZDHMD . PN P R 006422 ¢ R R TST13: .REM 2004 R R R T P P R T PRI T A SEa 0090 Y TEST THAT CLR/SET OF BIT ''N'" IN "'SSR’’ DOES NOT CLEAR ANY OTHER BITS I Ry R Y R L T TP I SCOPE 4 TEST ABSTRACT: 1322222222220 23] THIS TEST VERIFIES THAT CLEARING AND SETTING EACH R/W BIT IN THE SILO STATUS REGISTER INDIVIDUALLY DOES NOT DISTURB ANY OF THE OTHER BITS. A BIT MASK (RGMSK5: 100077) IS USED TO DEFINE THE R/W BITS (15,5,4,3,2,1, AND 0). RS ALWAYS CONTAINS THE BIT CURRENTLY SELECTED 3770 3TN 3772 3773 3774 THE s 0 . o NN = FOR TEST. 3775 3776 3777 3778 TEST SEQUENCE SELECT IS AS FOLLOWS: A BIY TO TEST SET ALL WRITABLE BITS IN THE ''SSR* CLEAR THE SELECTED BIT AND VERIFY THAT IT CLEARED PROPERLY SET THE SELECTED BIT AND VERIFY THAT IT SET PROPERLY REPEAT 1 THRU & UNTIL ALL BITS HAVE BEEN TESTED ANY ERROR DETECTED IS REORTRD AND THEN THE TEST RESUMES WITH THE NEXT BIT IN SEQUENCE. 3779 3780 3781 3782 3783 3784 3785 3786 ERRORS: 3787 3788 3789 3790 3791 3792 3793 3794 3810 3811 3812 3813 3814 AR ;*TEST 13 3768 3769 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808 3809 L s 3759 3760 3761 3762 3763 3764 3765 3766 3767 MACY11 30A(1052) 09-MAR-78 15:32 7 L 08:05 PAGE 92 TEST THAT CLR/SET OF BIT "'N'' IN ''SSR'* DOES NOT CLEAR ANY OTHER BITS 10-MAR-78 113 Rt REE 1.) ERROR 6 IS CALLED TO REPORY BOTH CLEAR AND SET FAULTS. SYNC: ARRNR 1.) FAIL TO CLR: 2.) FAIL TO SET: M7277 M7277 SH4 SH4 LOAD LPR H LOAD BCR H £p2 FU1 DEBUG: e 1.) LIKE THE PREVIOUS TESY, FAILURES HERE INDICATE ADJACENT BIT INTERFERENCE CAUSED BY CROSS TALK OR NOISE. THE FAULT IS MOST LIKELY THE M7278 MODULE. KEY LOGIC: L2288 004424 004432 004434 004440 004444 004450 004452 012737 010102 062702 012705 030537 001003 004454 004456 006305 001442 000772 004460 004464 013704 040504 004460 00001¢€ 000001 027672 001110 L] 1$: 28: 027672 3s: (SAME AS FOR TEST 10) 00821 Mov Mov ADD MOV BIT BNE ASL #38 SLPERR R1,R2 #SSR,R2 #1,R5 RS ,RGMSKS 3s RS ;SET UP THE ERROR LOOP RETURN ;SET UP THE REG ADDR BR 1% ;G0 TEST THIS BIT BEQ Mov BIC TST14 RGMSKS,R4 RS.R4 ;INIT BIT TEST MASK ;TEST THIS BIT ?? ;BR IF YES ;SHIFT THE BIT TEST MASK ;.BR IF TESTED ALL BIYS ;SET UP S/B DATA ;CLR BIT "N SEQ 0089 CZDHM-0-0 CZOHMD.P11 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 004456 004470 004474 004502 004504 004506 004512 004514 MACY11 30A(1052) 09-MAR-78 15:32 005012 013712 012761 040512 011203 042703 020304 001404 004516 004522 004524 004737 004526 004530 004536 004540 004542 004546 004550 050504 012761 050512 011203 042703 020304 001740 004552 004556 004560 0V4737 104006 000734 106006 000752 027672 000000 10-MAR-78 T13 024412 PAGE 93 CLR 000004 BIC MoV BIC CMP BEQ 024412 077700 TEST mov Mov 077700 000000 08:05 JIR ERROR BR 000014 4%: THAT CLR/SET OF BIT "N"" IN "'SSR’' DOES NOT CLEAR ANY OTHER BITS ;INIT REG BEING TESTED ;SET ALL R/W BITS IN SSR ;SCOPE SYNC (R2) RGMSKS, (R?) #0,LPR(R1) RS, (R2) (R2) ,R3 #77700,R3 R3, R4 4% ;GET THE WAS DATA ;CLEAR JUNK BITS ;01D IT CLEAR OK ? ;BR IFf YES PC,SUER2 ;60 SET UP ERROR INFO ;CLEAR BIT ''N'" IN SSR 6 JBIT *'N'' FAILED TO CLR PROPERLY R5,R4 SSET BIT "N BIS MoV BIC cmP 8EQ RS, (R2) (R2) ,R3 #77700,R3 R3,R4 2% ;SET BIT ""N' [N SSR JSR ERROR BR PC,SUER2 6 BIS MoV 2s #0,BKR(R1) 23 ;60 TEST NEXT BIT ; SCOPE SYNC IN S/B DATA ;GET THE WAS DATA sCLEAR JUNK BITS ;DID BIT *°N'' SET PROPERLY ? ;BR IF YES ;G0 SEV UP ERROR INFO ;BIT 'N'' FAILED TO SET PROPERLY ;GO SELECT NEXT BIT SEQ 0091 SEQ 0090 3839 3840 3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3885 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880 3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 MACY11 30A(1052) 09-MAR-78 15:32 7 N 08:05 PAGE 94 “‘CAR’’* MEMORY ADDRESSING TEST 10-MAR-78 114 SEQ@ 0092 SEQ 0C9 ::t"tti!'t't'i"tttit"'ttt'tt't'ti"'t't'tttttttfitlttttttt't'tt ;eTEST 14 R 004562 000004 TST14: .REM R “‘CAR'' MEMORY ADDRESSING TEST R AR R A NN AT AN R AN RN R AR RN RN SCOPE 4 TEST ABSTRACT: 01 28 80 123223222332 THIS TEST VERIFIES THAT EACH LOCATION IN THE CURRENT ADDRESS MEMORY CAN BE UNIQUELY ADDRESSED. IT WRITES THE PATTERN SHOWN BELOW INTO THE MEMORY AND THEN READS BACK SACH LOCATION TO VERIFY THAT IV WAS WRITTEN CORRECTLY. SINCE THE MEMORY LOGIC IS PARTITIONED INTO FOUR 16 X & READ/WRITE MEMORY CHIPS, THE PATTERN RESULTS IN THE LINE NUMBER (00 - 17(8)) BEING WRITTEN AS DATA INTO TO EACH LOCATION (00 - 17(8)) IN EACH CHIP. THAT IS: LOCOO = 00, LOC 01 = 01, ....... Loc 17 = 17. MEMORY PATTERN: LOCATION CONTENTS 00 01 02 03 04 05 06 07 i 12 13 14 15 16 17 (BOTH OCTAL) 000000 010421 021042 031463 042104 052525 063146 073567 1 104210 125252 135673 146314 156735 167356 1 114631 ANY ERRORS DETECTED ARE REPORTED AND THEN THE TEST RESUMES CHECKING THEE NEXT LOCATION IN SEQUENCE UNTIL ALL 16. HAVE BEEN CHECKED. NOTE: THIS TEST ALWAYS CHECKS ALL 16. LINES REGARDLESS OF HOW THE LINE SELECTION PARAMETER WAS INITIALLY SET UP. ERRORS: (AR RS RS 1.) ERROR 7 IS CALLED TO REPORT ANY LINES (LOCATIONS) THAT FAIL. THE FAILING LINE # IS INCLUDED AS PART OF THE ERROR HEADER MESSAGE. SYNC: ARERE Y 1.) WRITE SYNC: M7277 2.) READ SYN(C: M7277 SH4 SH& LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H (R1 (P2 (X CZDHA-D-0 CZONMD.P11 CIOHM-D-0 CIDKMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 T14 3895 B 8 08:05 PAGE 95 *CAR’® MEMORY ADORESSING TESY SEQ 0093 SEQ 0092 DEBUG: 1) 31896 3397 %ggg 1.) 3900 3901 3902 gggz ANALYZE THE ERROR REPORTS CAREFULLY ASKING THE FOLLOWING QUESTIONS: A. DOES THE FAULT AFFECTY ONLY ONE LINE ? 8. DOES THE FAULT AFFECT ONLY ONE 4-BIT DATA GROUP ? IE <15:12>, <11:08>, <07:04>, OR <03:00> C. DOES ANY DATA AT ALL APPEAR TO BE WRITTEN ? 3905 gggg 2.) IF ""A"" IS TRUE THEN SUSPECT AN ADDRESSING PROBLEM IN THE MEMORY ADDRESS MUX. 3.) IF "B' IS TRUE THEN SUSPECT A DATA MUX, UP-COUNTER, MEMORY, OR INVECRTER CHIP PROBLENM. gg}} 4.) IF *'C'" IS TRUE SUSPECT A MEMORY WRITE TIMING PROBLEM. gg}i 5.) IN MOST CASES THE FAULT IS MOST LIKELY THE M7277 OR M7278. 3915 KEY LOGIC: 3908 ;g?g ) 3916 222220222 3917 3918 3919 M7277 SH4 gg%g LOAD CA H DATA TO BUS H £58-13 EN2 E55~-8 DATA SOURCE (A,B.C) puU1,0U2.DT2 3922 SHS MEMADD SOURCE SEL M 3930 3931 3932 ;ggz SHS 764157 MUX CHIP E48 764157 DATA MUX CHIPS E13,£06 BI1TS<07:00> 74193 COUNTER CHIPS E12,E05 BITS<07:00> 7489 MEMORY CHIPS E11,EQ04 BITS<07:00> 3923 3924 3925 3926 3927 gggg 3935 %ggg " 3938 3939 004564 004566 010102 062702 3942 004606 004737 3940 3941 004572 004600 3943 3944 3945 ggzg 004612 004614 004620 004622 3948 36049 3950 004624 (0N4630 004636 013737 012737 000415 105737 001001 005004 153711 112761 010412 000006 027312 177777 024544 001220 027312 1$: 030322 030322 000000 000016 28: CA MEM WRITE ENAB L ESO-1 BUF ADDRS TO BUS H £33-1 (SHD BE LOW) 74157 MUX CHIPS E33,E27,E20 BI171S<17:08> 74193 COUNTER CHIPS E19,E26,E32 BITS<17:08> 7489 MEMORY CHIPS E18,E25,E3" BITS<17:08> 7404 INVERTER CHIPS E30,E24 .E17 BITS<17:08> mM7278 SH5 THRU SH8 74151 DATA MUX OUTPUT CHIPS (PIN 1 MOV ADD R1,R2 #CAR,R2 ;COPY IT IN RZ :SET UP REGADR IN R2 JSR PC,SELINE ;60 SELECT A LINE NO. MOV mov LINSEL,$TAP? #-1,LINSEL JSAVE LINE SELECT PARAMETER ;D0 ALL LINES FOR THIS TESTY 8R TS18B BNE CLR 3s LINE P4 R4 ;:BR IF DONE ALL SELECTED LINES ;DOING LINE 00 ? ;BR IF NOT JINIT TEST DATA BISB mMovs Mov LINE, (R1) #0,S5SR(RY) R4, (R2) :SELECT A LINE :SCOPE SYN( :LOAD THE CAR REG. INPUT) MACY11 30A(1052) 004640 004644 062704 000760 010421 004646 004652 024544 004654 004660 004662 004737 0004 34 105737 001001 005004 004664 004670 004676 004700 004702 153711 112761 011203 020304 001412 030322 000000 004704 004710 004714 004716 004720 004726 004737 004537 030322 031155 012737 104007 024412 004730 004734 062704 000744 010421 5%: 004736 004742 005037 000721 030322 6%: 004744 013737 001220 (ZDHA-D-0 CIOHMD.P11 3951 3952 3953 3954 3955 3956 3957 3958 3959 3960 3961 3962 3943 3964 3965 3966 3967 3968 3969 3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 09-MAR-78 15:32 10-MAR-78 T14 c 8 08:05 PAGE 96 **CAR’" MEMORY ADDRESSING TEST ADD #10421,R4 JGENERATE NEW DATA JSR PC,SELINE ;GO SELECT A LINE NO. TSTB LINE 8R 33: 030322 000017 A ¥ 004736 BNE CLR 4% R4 BISB MOVB Mov LINE, (R1) #0,SSR+1(R1? (R2) ,R3 JSELECT A LINE s SCOPE SYNC ;GET CONTENTS OF CAR BEQ 5% ;WAS DATA 0K ? ;BR IF YES JSR JSR LINE PC,SUER? RS, SUNUM ;GO SET UP ERROR INFO ;SET UP LINE NO. IN MSG BUFFER mov #63,SLPERR 7 ;SET UP ERROR LOOP RETURN sCAR ADDRESSING ERROR ADD BR #10421,R4 3s ;GENERATE NEW S/B DATA ;GO CHECK NEXT LINE CLR LINE ;RESTART AT LINE 00 IF LOGPING Mov $STMP7,LINSEL ;RESTORE LINE SELECT PARAMETER EM7+47 001110 027312 ERROR 7§8: 73 ;GO DO NEXT LINE ;sBR IF CHECKED ALL LINES ;DOING LINE 00 ? ;BR IF NOT ;INIT S/B DATA BR CMP 024636 1% B8R R3.R4 1% ;GO RESTART SEQ 0094 SEQ 0093 CZDHM-D-0 CZDHMD.P11 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999 MACY11 30A(1052) 09-MAR-78 15:32 0 8 08:05 PAGE 97 "BCR’* MEMORY ADDRESSING TEST 10-MAR-78 115 SoRAREREE NN AR RN AN R AN AT AR ;«TEST 15 L 004752 000004 TST15: .REM SEQ 0095 SEQ 0094 RN AR AERENREREANANRRONARRTRAOERNENER "'BCR'* MEMORY ADDRESSING TEST a s T TEST ABSTRACT: 1328282232202 2R ] THIS TEST VERIFIES THAT EACH LOCATION IN THE BYTE COUNT MEMORY CAN BE UNIQUELY ADDRESSED. IT WRITES THE PATTERN SHOWN BELOW INTO THE MENORY AND THEN READS BACK EACH LOCATION TO VERIFY THAT [T WAS WRITTEN CORRECTLY. SINCE THE MEMORY LOGIC IS PARTITIONED INTO FOUR 16 X 4 READ/WRITE MEMORY CHIPS, THE PATTERN RESULTS [N THE LINE NUMBER (00 - 17(8)) BEING WRITTEN AS DATA INTO TO EACH {.OCATION (00 - 17(8)) IN EACH CHIP. THAT IS: L0OC00 = 00, LOC 01 = 01, ....... Loc 17 = 17. CONTENTS 4000 4001 4002 4003 4004 4005 4006 00 01 02 03 04 000000 010421 021042 031463 042104 4008 4009 4010 40N 4012 MEMORY PATTERN: 10 1 12 13 14 15 16 17 104210 114631 125252 135673 146314 156735 167356 177777 05 06 07 4007 4013 4014 4015 4029 4030 4031 4032 4033 4034 4035 IYLY SCOPE X LOCATION 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 N (BOTH GCTAL) 052525 063146 073567 ANY ERRORS DETECTED ARE REPORTED AND THEN THE TEST RESUMES CHECKING THEE NEXT LOCATION IN SEQUENCE UNTIL ALL 16. HAVE BEEN CHECKED. NOTE: THIS TEST ALWAYS CHECKS ALL 16. LINES REGARDLESS OE uog THE LINE SELECTION PARAMETER WAS INITIALLY SET UP. ERRORS: KERATAER 1.) ERROR THE 10 IS CALLED TO REPORT ANY LINES FATLING LINE # IS INCLUDED AS PART OF (LOCATIONS) THE THAT FAIL. ERROR HEADER MESSAGE. SYNC: L2834 1.) WRITE SYNC: M7277 2.) READ SYNC: M7277 SH4 SH4 LOAD SSR LOW BYTE H LOAD SSR HIGH BYTE H CR1 (P2 CZDHM-D-0 CZIOHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 115 4036 4037 4038 4039 E 8 08:05 PAGE 98 "BCR'* MEMORY ADDRESSING TEST (A2 RE 8 1.) ANALYZE A. B. 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 40,2 4063 4064 4065 4066 4067 4068 4069 C. 2.) 3.) IF THE ERROR REPORTS THE FOLLOWING QUESTIONS: A" IS TRUE THEN SUSPECT AN ADDRESSING PROBLEM IN THE MEMORY ADDRESS MUX. IF "B" IS TRUE THEN SUSPECT A DATA MUX, UP-COUNTER, MEMORY, OR INVERTER CHIP PROBLENM. 4.) Ir "'C'" IS TRUE SUSPECT A MEMORY WRITE 5.) IN MOST CASES THE FAULT TIMING PROBLEM. IS MOST LIKELY THE M7277 OR M7278. KEY LOGIC: 2828228841 M7277 M7278 4071 409N CAREFULLY ASKING DOES THE FAULT AFFECT ONLY ONE LINE ? DOES THE FAULT AFFECT ONLY ONE 4-BIT DATA GROUP ? IE <15:12>, <11:08>, <07:04>, OR <03:00» DOES ANY DATA AT ALL APPEAR TO BE WRITTEN ? SH4 LOAD BC H DATA 10 BUS H DATA SOURCE (A,B,0) Fu2 EN2 put,pu2,p1? SHS MEMADD SOURCE SEL H BC MEM WRITE ENAB L E55-8 E57-4 SH3 BUF ADDRS TO BUS H BITS<15:08> SHG 81715<07:00> 4070 4089 4090 SEQ 0095 DEBUG: 4040 4041 4072 4073 4074 4075 4076 4077 4078 4079 4080 4081 4082 4082 4084 4085 4086 4087 4088 SEQ 0096 004754 004756 004762 004770 004776 005002 005004 005010 005012 005014 €05020 010102 062702 013737 012737 004737 000415 X 000010 027312 177777 024544 105737 001001 005004 030322 153711 112761 030322 000000 001220 027312 000016 18: 2%: MOV ADD Mov Mov JSR BR TSTB BNE CLR BISB move £33-1 (SHD BE LOW) 74157 INPUT MUX CHIPS E18,E19 74193 UP COUNTER CHIPS E27.E?26 7489 MEMORY CHIPS E33,E3¢4 7404 INVERTER CHIPS E41,E42 74157 INPUT MUX CHIPS E16,E17 764193 UP COUNTER CHIPS E24 ,E25 7489 MEMORY CHIPS E31,E32 7404 INVERTER CHIPS E39,E40 SH5 THRU SH8 74151 DATA MUX OUTPUT CHIPS (PIN 1 R1,R2 #BCR,R2 LINSEL,SThP? #-1,LINSEL ;COPY IT IN R2 ;SET UP REGADR IN R?2 ;SAVE LINE SELECT PARAMETER ;DO ALL LINES FOR THIS TEST 3s LINE 23 ::BR IF DONE ALL SELECTED LINES ;:DOING LINE 00 ? ;BR If NOT LINE, (R1) sSELECT A LINE PC.SELINE R4 #0,SSR(R1) ;60 SELECT A LINE NO. ;INIT ;SCOPE TEST DATA SYNC INPUT) (ZDHM-D-0 CIOHMD . P11 4092 4093 4094 4095 4096 4097 4098 4099 6100 410 6102 4703 4104 4105 4106 6107 4108 6109 4110 MACY11 09-MAR-78 15:32 005026 005030 005034 010412 062704 000760 005036 005042 005044 005050 005052 004737 000434 005054 005060 005066 005070 005072 30A(1052) 10-MAR-78 115 024544 030322 153711 112761 011203 020304 001412 030322 000000 004737 004537 030322 031224 024412 026636 BR R4, (R2) #10421,R4 1% ;LOAD THE BCR REG. ;GENERATE NEW DATA JSR BR TS18 BNE CLR PC.SELINE 7% L INE 4% Ré ;G0 SELECT A LINE NO. ;:BR IF CHECKED ALL LINES BISB LINE, (R1) #0,SSR+1(R1) (R2) ,R3 R3,R4 5% JSELECT A LINE ;SCOPE SYNC ;GET CONTENTS OF BCR JSR JSR LINE EM10+44 MoV ERROR PC,SUER2 R5,SUNUM ;GO SET UP ERROR INFO ;GO SET UP L INE NO. IN MSG BUFFER #6% ,SLPERR ;SET UP ERROR LOOP RETURN ;BCR ADDRESSING ERROR ADD mov ADD 10421 105737 001001 005004 F 8 08:05 PAGE 99 "BCRTM" MEMORY ADDRESSING TEST 3s: 000C17 48 Movs MoV cMP BeQ 005074 005100 005104 005106 005110 005116 012737 104010 005126 005120 005124 062704 000744 010421 5%: 005126 005132 005037 000721 030322 005134 013737 001220 001110 027312 10 :GO DO NEXT LINE ;DO0ING LINE 00 ? ;BR IF NOT JINIT S/8 DATA ;WAS DATA 0K ? ;BR IF YES #10421,R4 BR 3s ;GENERATE NEW S/B DATA ;GO CHECK NEXT LINE 6%: CLR BR LINE 1% ;RESTART AT LINE 00 IF LOOPING 7%: Mov $STMP7,LINSEL JRESTORE THE LINE SELECT PARAMETER ;GO RESTART SEQ 0097 SEQ 0096 (ZDRR-D~0 CZDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 G 8 08:05 PAGE 100 ""CAR'" REGISTER TEST = ALL 1°S /7 ALL 0'S = ALL LINES 10-MAR-78 116 4122 IR 4123 ;*TEST 16 4124 4125 4126 4127 AT AR 005142 000004 N A R R R T LA PR R AR TR R AR AR AN NN RN SEQ 0098 SEQ 0097 RRENEY ‘'CAR'* REGISTER TEST = ALL 1°'S 7/ ALL 0'S = ALL LINES R R R R R P A AN A AN RN RN PR ARE R RN R NRNNRRARORNEE TST16: SCOPE -REM X TEST ABSTRACT: 6128 288222222228 4129 4130 4131 4132 THIS TEST VERIFIES THE ABILITY TO SET AND CLEAR ALL BITS IN ALL THE SELECTED LOCATIONS (LINES) OF THE CURRENT ADDRESS MEMORY. [T USES THE CONFIGURATION PARAMETER (LINSEL:) TO DEFINE WHICH LINES TO 2;;2 TEST. THE TEST SEQUENCE IS AS FOLLOWS: 4135 4136 4137 4138 4139 1. 2. SELECT A LINE # TO TEST LOAD THE SELECTED LOCATION WITH 177777 3. 4. 5. 2}2? READ IT BACK TO VERIFY ALL BITS SET LOAD THE SELECTED LOCATION WITH 000000 READ IT BACK TO VERIFY ALL BITS CLEARED 6. REPEAT STEPS 1 THRU 5 UNTIL ALL SELECTED LINES ARE TESTED. 4142 ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH THE NEXT 4145 ERRORS : 2}22 LINE # IN SEQUENCE AS DEFINED BY ''LINSEL'. 46146 12222232 4147 2}23 1.) 4150 4151 4152 4122 SYNC: tARAR 1'S: M7277 SH4 LOAD SSR LOW BYTE H (R1 2}22 2.) WRITE 0°S: M7277 SHé& LOAD SSR HIGH BYTE H (P2 4157 DEBUG: 4159 4160 KLY LOGIC: 1.) 4 4158 WRITE 22222 4161 7 005144 005146 005152 005156 010102 062702 004737 000443 4169 4170 4171 005164 005170 005174 153711 004537 030322 030322 024636 112761 010412 011203 020403 000000 005160 2};% 005176 4174 4175 4176 4177 005200 005206 005210 005212 012704 X 000006 024544 1%: 177777 (REFER TO TEST 14) MOV ADD JSR 8R R1,R2 #CAR,R2 PC,SELINE TS117 ;COPY IT INTO R? :R2 GETS CAR ADDRESS ;G0 SELECT A LINE NO. ;:BR IF DONE ALL SELECTED LINES B8ISB JSR LINE LINE, (R1) RS,SUNUM JSELECT A LINE NO. ;GO SET UP LINE NO. #0,SSR(RY) R4, (R2) (R2),R3 R4 ,R3 ;SCOPE SYNC ;LOAD A CAR WITH ALL ONES ;GET THE WAS DATA FROM THE CAR ;DID IT CONTAIN ALL ONES ?? MoV 031155 IS CALLED YO REPORT ALL DATA COMPARE ERRORS (REFER TO TEST 14) 222232223 4162 4163 4164 4165 4166 4167 4168 ERROR #-1,R4 sRESULT IN CAR S/B = 177777 IN MSG BUFFER EM7+4/ 000016 2%: MOVB MOV MOV cmp C20HM-D-0 CZDHMD P11 4178 6179 4180 L8 6182 4183 6184 6185 6186 6187 4188 4189 4190 LN 6192 6193 MACY11 30A(1052) 09-MAR-78 15:32 005214 001406 605216 005222 005230 004737 012737 104007 005232 005234 005242 005244 005240 005004 112761 010412 011203 001741 005250 005254 005262 005264 004737 012737 104007 000732 024412 005200 000000 10-MAR-78 T16 001110 000017 3%: 08:05 PAGE 101 "CAR’* REGISTER 001110 8 TEST - ALL 3% ::BR IF ALL 1'S JSR MoV ERROR PC,SUER2 ;ZS,SLPERR ;60 SET UP ERROR INFC ;SET UP ERRCR LOCP RETURN CLR MOVB MoV R4 #0,SSR+1(R1) R4, (R2) JRESULT IN CAR S/8 = 000000 ; SCOPE SYNC ;CLEAR SELECTED CAR (R2) ,R3 BEQ 1% Mov JSR PC,SUER2 ;SS.SLPERR ERROR B8R 1% SEQ 0099 sc@ 0098 1'S 7/ ALL 0°'S - ALL LINES 8EQ MoV 024412 005232 H ;FAILED TO SET ALL 1'S IN SELECTED CAR ;GET THE WAS DATA ;BR IF CAR GOT CLEARED ;GO SEY UP FOR ERROR CALL ;SET UP ERROR LOOP RETURN ;FAILED TO CLR ALL BITS IN SELECTED CAR ;G0 TEST NEXT LINE C(IDHM-D-0 CZDNMD ., P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 17 4194 T 4195 4197 N ;*TEST 17 L1196 4198 4199 8 1 08:05 PAGE 102 *BCR'" REGISTER TEST = ALL 1'S /7 ALL 0'S =~ ALL LINES 000004 TST17: AN T R A AR R AR NN RN N AR RO TIR NN NN “BCR'' REGISTER TEST = ALL 1'S / ALL 0°'S = ALL LINES AR 005266 N AN R R R A P R R RN AN E AN AR O AR RE R AN RN NRAR RN AR SCOPE .REM X TEST ABSTRACT: 4200 2222222222223 6201 4202 4203 4204 2582 THIS TEST VERIFIES THE ABILITY TO SET AND CLEAR ALL BITS 1. SELECT A LINE # TO TESTY 4209 4210 4211 3. 4. 5. READ IT BACK TO VERIFY ALL BITS SET LOAD THE SELECTED LOCATION WITH 000000 READ 17 BACK TO VERIFY ALL BIiS CLEARED 4208 2. LOAD THE SELECTED LOCATION WITH 177777 2%}% 6. REPEAT STEPS 1 THRU S UNTIL ALL SELECTED LINES ARE TESTED. 4214 ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH THE NEXT 4217 ERRORS: 4219 4%3? 1.) 4222 SYNC: 4224 25%2 1.) WRITE 1°S: M7277 SHé LOAD SSR LOW BYTE H CR1 2%%; 2.) WRITE 0°S: mM7277 SH4 LOAD SSR HIGH BYTE H (P2 4229 DEBUG: 25}2 LINE # IN SEQUENCE AS DEFINED BY ''LINSEL'. 4218 (2222223 4 4223 228801 4231 4232 10 IS CALLED TO REPORT ALL DATA COMPARE ERRORS (REFER TO TEST 15) KEY LOGIC: 4233 '222228222, 4 4239 005270 005272 005276 005302 010102 062702 004737 000443 012704 153711 004537 030322 031224 177777 030322 024636 4246 4247 4248 4249 005324 005332 005334 005336 112761 010412 011203 020403 000000 4240 4241 4242 4243 252; ERROR '2X2L; 4230 4238 IN ALL THE SELECTED LOCATIONS (LINES) OF THE BYTE COUNT MEMORY. IT USES THE CONFIGURATION PARAMETER (LINSEL:) TO DEFINE WHICH LINES TO TEST. THE TEST SEQUENCE IS AS FOLLOWS: 4207 4234 4235 4236 4237 SEQ 0100 SEC 0099 005304 005310 005314 005320 005322 000010 024544 1%: (REFER TO TEST 15) MoV ADD JSR BR R1,R2 #B(R,R2 PC,SELINE 15120 ;COPY IT INTO R2 ;R2 GETS BCR ADDRESS ;G0 SELECT A LINE NO. ;:BR IF DONE ALL SELECTED LINES MovB MoV MOV cmp #0,SSR(RT) R4, (R2) (R2),R3 R4 ,R3 ;SCOPE SYNC sLOAD A BCR WITH ALL ONES ;GET THE WAS DATA FROM THE BCR ;DID IT COMTAIN ALL ONES ?? MoV #-1,R4 BISB LINE, (R1) JSR RS, SUNUM L INE EM10+44 000016 2%: ;RESULT IN BCR S/B = 177777 JSELECT A LINE NO. ;GO SET UP LINE NO. IN MSG BUFFER CZIOHM-D-0 CZOHMD P11 4250 6251 4252 4253 4254 4255 6256 4257 4258 4259 4260 4261 4262 4263 4264 4265 MACY11 30A(1052) 09-MAR-78 15:32 005340 001406 005342 005346 005354 004737 012737 104010 005356 005360 005366 c0537¢ 005372 005004 112761 010412 011203 001741 005374 005400 005406 005410 004737 012737 104010 000732 10-MAR-78 117 024412 005324 001110 000000 000017 024412 005356 001110 J 8 08.05 PAGE 103 “BCR'* REGISTER TEST - ALL BEQ 3s ;:BR IF ALL 1'S JSR PC,SUERZ :SS.SLPERR ;GO SET UP ERROR INFO sSET UP ERROR LOOP RETURN R4 #0,SSR+1(R1) R4, (R2) ;RESULT IN BCR S/B = 000000 ;SCOPE SYNC MOV ERROR 3%: 1'S / ALL 0'S - ALL LINES CLR MOVB MoV MOV sFAILED TO SET ALL 1'S IN SELECTED B(CR BEQ (R2) ,R3 19 ;CLEAR SELECTED BCR ;GET THE WAS DATA ;:BR 1F BCR GOT CLEARED JSR PC,SUERZ #3%,SLPERR 10 1$ ;60 SET UP FOR ERROR CALL ;SET UP ERROR LOOP RETURN ;FALLED TO CLR ALL BITS IN SELECTED BCR ;60 TEST NEXT LINE MOV ERROR BR SEa 0101 SEQ 0100 CZDHM-D-0 CZOHMD.P11 4266 6267 6268 4269 4270 6271 mACY11 30A(1052) 09~MAR-78 15:32 10-mMAR-78 08:05 120 K PAGE 104 8 SEQ 0102 *‘CAR’* MEMORY PATTERNS TEST /7 0°'S DISTURB SEQ@ 0101 JoNRARRAARRERCERERLAARERALARARRINORARCRLAIRCERORRRRARRRANRANNQONGNCARRENTY ;«TEST 20 P 005412 L 15720: .REM 000004 R e "'CAR'® MEMORY PATTERNS TEST / 0'S DISTURB e R T R I R T PP T P T AT T SCOPE X TEST ABSTRACT: 4272 6273 (2222222088082 4275 4276 6277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4296 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 LOCATION '*N'' GF THE °''CAR'* MEMORY, IT DOES NOT DISTURB ANY BITS IN ANY OTHER LOCATIONS. THERE ARE THREE TEST PATTERNS USED« (177777, 6274 THIS TEST VERIFIES THAT WHEN A TEST PATTERN IS WRITTEN INTO ~NO N8 NP = 125252, 052525) FOR EACH LOCATION SELECTED BY THE CONFIGURATION PARAMETER "'LINSEL''. THE TEST SEQUENCE IS AS FOLLOWS: . . . . . SELECT A TESY PATTERN SELECT A LINE # TO TEST CLEAR ALL 16. LOCATIONS IN THE MEMORY WRITE THE TEST PATTERN INTO THE SELECTED LOCATION VERIFY THAT THE PATTERN WAS WRITTEN CORRECTLY AND THAT NO OTHER LOCATIONS WERE DISTURBED. . REPEAT 2 THRU 5 UNTIL ALL SELECTED LINES TESTED . REPEAT 1 THRU 6 UNTIL ALL THREE PATTERNS TESTED ALL ERRORS ARE REPORTED AND THEN THE NEXT LINE IN SEQUENCE. TEST RESUMES WITH CHECKING THE ERRORS: YRR ER 1.) ERROR 46 IS CALLED TO REPORY ANY ERROR DETECTED. THE INFCORMATION PRINTED INCLUDES THE LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE PATTERN USED. SYNCe ERRRNE 1.) WRITE LINE: M7277 SH& LOAD SSR LOW BYTE H CR1 2.) READ CHECK: M7277 SH& LOAD SSR HIGH BYTE H cP2 DEBUG: (REFER TO TEST 14) Tt KEY LOGIC: L2232 822 005414 005416 005422 005426 005432 005434 005440 005442 005450 016102 062702 012705 012537 001472 004737 000772 113737 105037 X 009006 027330 001204 1%: 024544 11%: 030322 001210 030324 2%: (REFER TO TEST 14) 828 mov ADD R1,R2 #CAR,R2 Mov (R5)¢+,8$TMP1 MoV ;SET UP REGADR #PATRNA,RS ;SET UP POINTER TO DATA PATTERNS BEQ JSR BR movs 1ST21 PC,SELINE 1% LINE,LINEA ;:BR IF DONE THREE PATTERNS ;60 SELECT A LINE TO TEST ;BR IF DONE ALL SELECTED LINES :SAVE THE LINE NO. FOR ERROR LOOPING CLRB $TMP3 ;INIT LINE COUNTER ;GET A DATA TEST PATTERN CZDHM-D-0 CZOHMD.P11 (322 6323 4324 4325 4326 4327 4328 4329 4330 4331 4332 (333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 6346 4347 §348 4349 4350 4351 4352 4353 MACY11 30A(1052) 09-MAR-78 15:32 005454 005460 005462 005466 005474 113711 005012 105237 123727 001367 005476 005502 005510 137N 112761 030324 105037 013704 001206 005514 005520 005524 005530 005536 005540 005546 005550 00555¢ 005554 013712 113711 112761 011203 123737 001401 10-MAR-78 120 38: 001210 001210 001210 000000 001204 000020 000016 001204 001206 000000 000017 001206 030322 005556 005562 005566 005570 005572 005600 004737 004537 001206 033776 012737 005602 005606 005614 005616 105237 104046 122737 001707 000740 024500 024636 001206 000020 ;SELECT A LINE TO CLEAR ;CLR CAR FOR THAT LINE ;GENERATE NEW LINE NO. ;DONE CLEARING ALL LINES ? :BR IF NOT MOvVB move LINEA, (R1) ;SET LINE SELECT BITS ;SCOPE SYNC ;LOAD CAR WITH TEST PATTERN CLRB Mov Move Move mov $TMP1, (R2) $THPZ $TMP1,R4 $TMP2, (R1) #0,SSR+1(R1) (R2) ,R3 $TMP2,LINE ;INIT A LINE COUNTER ;SET UP S/B DATA sSET LINE SELECT IN SCR s SCOPE SYNC ;GET WAS DATA ;1S (HIS THE LINE WITH THE TEST PATTERN ;BR IF IT IS ;MAKE S/B DATA = 000000 ;CORRECT DATA IN CAR ? ;BR IF YES JSR JSR PC,SUER4 R5,SUNUM ;60 SET UP ERROR IN FO :GO SET UP LINE NO. IN MSG BUFFER Mov #2% ,SLPERR 46 sSET UP ERROR LOOP RETURN ; INCORRECT DATA READ FROM CAR INCB CMPB BEQ BR $TMP2 #20,3THP2 ;GENERATE NEXT LINE NO. ;DONE ALL LINES ? ;BR If YES ;GO CHECK NEXT LINE ERROR 6%: #0,SSR(R1) CLR CMP BEQ $THP2 EML6+63 001110 001206 $TMP3, (R1) (R2) $TAP3 $TMP3,#20 3s CLR INCB CMPB BNE CMPB BEQ 5%: 005450 movs mov 4%: 005004 020304 001412 8 L 08:05 PAGE 105 "'CAR’" MEMORY PATTERNS TEST / 0'S DISTURB 1% 31 SEQ 0103 SEQ 0102 C2Z0HM-D-0 CIDHMD.P11Y MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 121 08:05 PAGE 106 “BCR'° MEMORY PATTERNS TEST /7 0'S DISTURB (354 PR R 4355 oTEST 21 4356 4357 4358 P 005620 000004 T R TST21: .REM 4359 5EQ 0104 SEQ 0103 Re ey R **8CR'' MEMORY PATTERNS TEST / 0'S DISTURSB e R R R SCOPE 1 TECT ABSTRACT: 4360 2222222222222 4361 46362 4363 4364 4365 2326 THIS TEST VERIFIES THAT WHEN A TEST PATTERN IS WRITTEN INTO LOCATION °'N'' OF THE ''BCR'' MEMORY, IT DOES NOT DISTURB ANY BITS IN ANY OTHER LOCATIONS. THERE ARE THREE TEST PATTERNS USED+ (177777, 125252, 052525) FOR EACH LOCATION SELECTED BY THE CONFIGURATION PAR-~ AMETER "‘LINSEL''. THE TEST SEQUENCE IS AS FOLLOWS: 567 4368 1. 4369 4370 4371 4372 4373 4374 2;;2 2. 3. 4. S. SELECT A TEST PATTERN SELECT A LINE # TO TEST CLEAR ALL 16. LOCATIONS IN THE MEMORY WRITE THE TEST PATTERN INTO THE SELECTED LOCATIUN VERIFY THAT THE PATTERN WAS WRITTEN CORRECTLY AND THAT NO OTHER LOCATIONS WERE DISTURBED. 6. REPEAT 2 THRU 5 UNTIL ALL SELECTED LINES TESTED 7. REPEAT 1 THRU 6 UNTIL ALL THREE PATTERNS TESTED 4377 4378 4379 ALL ERRORS ARE REPORTED AND THEN THE TEST RESUMES WITH CHECKINGC THE NEXT LINE IN SEQUENCE. 4380 4381 4382 4383 4384 4385 4386 4387 ERRORS: rRERTRR 1.) ERROR 47 1S CALLED TO REPORT ANY ERROR DETECTED. THE INFORMATION PRINTED INCLUDES THE LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE PATTERN USED. SYNCe LI88 (22222 43389 2%3? 1.) WRITE LINE: W7277 SH4 LOAC SSR LOW BYTE H CR1 2;3% 2.) READ CHECK: M7277 SH4 LOAD SSR HIGH BYTE H {P2 4394 DEBUG: 4396 4397 KEY LOGIC: 4398 2222131 4398 4399 4400 4401 4402 4403 4404 4405 46406 228; 4409 e sy] (REFER YO TEST 15) 221223228, 005622 005624 005630 005634 005640 005642 005646 005650 005656 010102 062702 012705 012537 001472 1 000010 027330 001204 1$: 004737 024544 118%: 113737 030322 105037 001210 000772 030324 2s: (REFER TO TEST 15) MOV ADD R1,R2 #BCR,R2 ;SET UP REGADR JSR PC,SELINE ;GO SELECT A LINE TO TEST Mov MOV BEQ BR #PATRNA RS (R5)+,8TMP1 TST22 ;SET UP PQINTER TO DATA PATTERNS ;GET A DATA TEST PATTERN ;:BR 1F DONE THREE PATTERNS 1% ;BR IF SELECTED ALL LINES MOVB LINE,LINEA CLRB $TMP3 JSAVE THE LINE NO. FOR ERROR LOOP ;INIT LINE COUNTER CZ0HR-D~0 CIOHMD P11 4410 0611 4612 4613 4414 4615 4616 4617 4618 4419 4420 4621 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4636 4437 4438 4439 4440 4441 005662 005666 005670 005674 005702 MACY11 30A(1652) C9-MAR-78 15:32 113711 005012 1G-MAR-78 121 38: 001210 105237 123727 001367 001210 001210 113711 112761 030324 000000 001204 105037 001206 001204 001206 000000 000017 123737 001401 005004 020304 001412 001206 030322 005764 005770 005774 005776 006000 006006 004737 004537 024500 024636 034176 012737 104047 005656 001110 006010 006014 006022 006024 105237 122737 001707 000740 001206 0000620 001206 005704 005710 005716 005722 005726 005732 005736 005744 005746 005754 005756 005760 005762 013712 013704 11371 112761 011203 001206 N movs CLR 000020 INCB (mMP8 BNE 000016 movs mMovs Mov 4%: ;SELECT A LINE TO CLEAR ;CLR BCR FOR THAT LINE ;GENERATE NEW LINE NO. ;DONE CLEARING ALL LINES ? ;BR IF NOT LINEA, (R1) ;SET LINE SELECT BITS ;SCOFE SYNC #0,SSR(R1) $TMP1, (R2) :LOAD BCR WITH TEST PATTERN CLR CmpP BEQ ;INIT A LINE COUNTER ;SET UP S/8 DATA sSELECT A LINE TO CHECK :SCOPE SYNC ;GET WAS DATA ;IS THIS THE LINE WITH THE TEST PATTERN :BR IF IT IS JSR JCR PC,SUER4 RS, SUNUM ;G0 SET UP ERROR IN fO ;GO SET UP LINE NO.IN MSG BUFFER MOV #2% ,SLPERR ;SET YP ERROR LOOP RETURN - INCORRECT DATA READ FROM BCR INCB CMPB BEO BR $TMP2 #20,3TMP2 118 3 ;GENERATE NEXT LIME NO. ;DONE ALL LINES ? $TMP2 EM4LT+56 ERROR 6%: $TAP3, (R1) (R2) $TMP3 $TMP3, 420 3s $TMP2 $TMP1,R4 $TMP2,(R1) #0,SSR+1(R1) (R2) ,R3 $TMP2,LINE 5% R& R3,R4 6$ CLRB MoV movs movse MOV CMP8 BEQ 5$: 8 08:05 PAGE 107 ‘‘BCR'* MEMORY PATTERNS TEST /7 0°'S DISTURB 47 ;MAKE S/B DATA = 000000 s CORRECT DATA IN BCR ? ;BR IF YES :BR IF YES ;G0 CHECK NEXT LINE SEQ 0105 SEQ 0104 (IDHR-D-0 D . P11 CZDHM 4642 4443 4644 44645 4646 4647 4648 4649 450 4451 MACY11 30A(1052) 09-MAR-78 15:32 8 10-MAR-78 122 08:05 PAGE 108 "'CAR’’ MEMORY PATYTERNS TEST 7/ 1'S DISTURB seTEST 22 L 006026 TST22: .REM 000004 4492 4493 4494 4495 4496 4487 *‘CAR’" MEMORY PATTERNS TESY / 1°S DISTURB T R I R R R Iy R e R P YOS T I Y32 LY SCOPE b4 TEST ABSTRACT: 21222228 THIS 5 TEST VERIFIES THAT WHEN ALL ZEROS ARE WRITTEN INTO tINE '‘N’ IN THE °''CAR’* MEMORY, IT DOES NOT CLEAR ANY BITS IN ANY OTHER LOCATIONS. OgL:OTHg %INES SELECTED BY ""LINSEL'' ARE TESTED. THE TEST SEQUENCE 1S LLOWS: S — A . . . . 5. 4461 4489 4490 4491 SEQ 0106 SEQ 0105 ':'t."t"'.'Q't"""""'t"Q!tQ""QQ."'.Q...'.Q.'Q'...""" 4452 4453 4454 4455 44656 4457 4458 4459 4460 4662 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485 4486 4487 4488 9 SELECT A LINE TO TEST SET ALL ONES (177777) INTO ALL MEMORY LOCATIONS CLEAR THE SELECTED LINE VERIFY THAT ONLY THE SELECTED LINE WAS CLEARED AND ALL OTHER LINES STILL CONTAIN 177777 REPEATY STEPS 1 THRU & UNTIL ALL SELECTED LINES ARE TESTED ALL ERRORS ARE REPORTED AND THEN THE LINE IN SEQUENCE. TEST RESUMES CHECKING THE NEXT ERRORS: AR ARNE 1.) ERROR 46 IS CALLED TO REPORT ALL ERRORS. THE INFORMATION PRINTED INCLUDES THE LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE PATTERN USED. SYNC: tenne 1.) WRITE LINE: M7277 SH& LOAD SSR LOW BYTE H Rl 2.) CHECK LINE: M7277 SH4 LOAD SSR HIGH BYTE H CP2 DEBUG: (REFER TO TEST 14) iy KEY LOGIC: (REFER TO TEST 14) TeRRERRENY 006030 006032 006036 006042 006046 006052 006054 006062 006066 006072 006074 006100 010102 062702 012705 010537 004737 000465 113737 4 000006 177777 001204 024544 030322 18: 030324 28: 38: 001210 0C1210 001210 001210 000020 MoV ADD mov mov R1,R2 #CAR,R2 #-1,R5 RS.$TMP1 ;SET UP REGADR TS123 ::BR IF DONE ALL LINES ;TEST PATERRN IN RS = 177777 PC,SELINE :SAVE FOR ERROR REPORTING ;GO SELECT A LINE TO TEST Movs LINE,LINEA ;SAVE THE LINE NO. CLRB Mmove S$TMP3 $TMP3, (R1) s INIT LINE COUNTER SSELECT A LINE TO CLEAR INCB $TMP3 ;GENERATE NEW LINE NO. JSR B8R MoV CMPB RS, (R2) $TMP3,#20 FOR ERROR LOOP ;LOAD CAR WITK 177777 ;DONE SETTING ALL LINES TO 177777 ? CZDHM-D-0 CZOHMD PN 4498 4499 4500 4501 4502 4503 4504 4505 6506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 6517 4518 4519 4520 4521 4522 4523 4524 6525 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 122 006106 001367 006110 006114 006122 113711 112761 005012 030324 000000 006124 006130 006132 006136 006144 006146 006154 006156 006160 006162 105037 005004 113711 112761 011203 123737 001401 010504 020304 001412 001206 006164 006170 006174 006176 006200 006206 004737 004537 001206 033776 012737 024500 024636 006062 001110 006210 006214 105237 122737 001711 000741 001206 000020 001206 006222 006224 104046 000016 000017 001206 030322 5%: 3s :BR IF NOT MOVB Mmove #0,S5R(RY) LINEA, (R1) sSET LINE ;SCOPE SYNC ;CLEAR THE CAR UNDER TEST CLRB CLR MOovB movBe MOV CMPB 8EQ Mov CMP BEQ $TMP2 R4 $TMP2, (R1) #0,SSR+1(R1) (R2) ,R3 $TMP2,LINE 5% R5,R4 R3,R4 6% SINIT A LINE COUNTER ;MAKE S/8 DATA = 000000 sSELECT A LINE TO CHECK ;SCOPE SYNC ;GET WAS DATA ;IS THIS THE LINE WITH THE TEST PATTERN ;BR IF IV IS ;MAKE S/B DATA = 177777 ;CORRECT DATA IN CAR ? ;BR IF YES JSR JSR $TMP2 PC,SUER4 R5,SUNUM ;GO SET UP ERROR IN FO ;GO SET UP LINE NO. IN MSG BUFFER Mov ERROR #2% ,SLPERR 46 ;SET UP ERROR LOOP RETURN ; INCORRECT DATA READ FROM CAR INCB (MPB BEQ BR #20,8TMP2 19 43 S$THP2 ;GENERATE NEXT LINE NO. ;DONE ALL LINES ? ;BR IF YES EML6+63 6%: 4 SEQ 0107 SEQ 0106 / 1°'S DISTURB BNE CLR 4%: 001206 0000G0 c9 08:05 PAGE 109 "'CAR’' MERORY PATTERNS TEST (R2) SELECT IN ;GO CHECK NEXT LINE SCR CZDHM-D-0 CZDHMD.P11 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 10-MAR-78 08:05 123 PAGE AR AR R R ;*TEST 23 RN 006226 TST23%: .REM 000004 9 D 11V SEQ 0108 SEQ 0107 "'BCR’' MEMORY PATTERNS TEST / 1'S DISTURB T L R P P ST LSS TI TS ISR "'BCR’* MEMORY PATTERNS TEST / 1'S DISTURB N RN RN A N R AR RN R RN R AR AR AR AN RN R RA N RO AR N LY RS SCOPE ] TEST ABSTRACT: 1238222022208 2] THIS TEST VERIFIES THAT WHEN ALL ZEROS ARE WRiTTEN INTO LINE ‘''N* IN THE *'BCR'* MEMORY, IT DOES NOT CLEAR ANY BITS IN ANY OTHER LOCATIONS. ONLY THg gINES SELECTED BY ''LINSEL'' ARE TESTED. THE TEST SEQUENCE IS PN P¥] AS FOLLOWS: . SELECT A LINE TQO TESTY . CLEAR THE SELECTED LINE VERIFY THAT ONLY THE SELECTED LINE WAS CLEARED . . 4526 6527 4528 4529 4530 4531 4532 4533 6534 4535 4536 4537 4538 4539 4540 4541 6542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 MACY'1 50A(1052) 09-MAR-78 15:32 5. SET ALL ONES (177777) INTO ALL MEMORY LOCATIONS AND ALL OTHER LINES STILL CONTAIN 177777 REPEAT STEPS 1 THRU & UNTIL ALL SELECTED LINES ARE TESTED ALL ERRORS ARE REPORTED AND THEN THE LINE IN SEQUENCE. TEST RESUMES CHECKING THE NEXT ERRORS: (282284 1.) ERROR 47 IS CALLED TO REPORT ALL ERRORS. THE INFORMATION PRINTED INCLUDES THE LINE # WRITTEN, THE LINE # BEING CHECKED, AND THE PATTERN USED. SYNC: XA 1.) WRITE LINE: M7277 SH4 LOAD SSR LOW BYTE H CR1 2.) CHECK LINE: M7277 SH4 LOAD SSR HIGH BYTE H P2 DEBUG: LR (REFER TO TEST 15) 82E; KEY LOGIC: (REFER TO TEST 15) TARRENRTAS 006230 006232 006236 006242 006246 006252 006254 006262 006266 006272 006274 006300 010102 062702 012705 010537 004737 000465 113737 4 000010 177777 00120¢ 024544 030322 R1,R2 #BCR,R2 mov JSR BR R5,$TMP1 PC,SELINE TST24 MOV 1$: 030324 001210 001210 001210 001210 Mov ADD move 2%: 3s: 000020 #-1,R5 ;TEST PATERRN IN RS = 177777 LINE,LINEA ;SAVE THE LINE NO. CLRB MovB $TMP3 $TMP3, (RD) INCB $TMP3 MoV CmMPB ;SET UP REGADR RS, (R2) $TMP3,#20 sSAVE IT FOR ERROR REPORTING ;60 SELECT A LINE TO TEST ;.BR IF DONE ALL LINES ;INIT LINE COUNTER ;SELECT A LINE TO_INIT :LOAD BCR WITH 177777 ;GENERATE NEW LINE NO. ;DONE SETTING ALL LINES TO 177777 ? CIOHR-D-0 CZDHMD.P11 6582 6583 4584 4585 4586 4587 4588 4589 4590 45N 6592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 MACY11 30A(1052) 09-MAR-78 15:32 006306 001367 006310 0V6314 006322 113711 112761 005012 030324 000000 006324 006330 006332 006336 006344 006346 006354 006356 006360 006362 105037 005004 113711 112761 011203 123737 001401 010504 020304 001412 001206 006364 006370 006374 006376 006400 006406 004737 004537 001206 034176 012737 104047 024500 024636 006410 006414 006422 105237 122737 001711 001206 000020 006424 000741 10-MAR-78 123 000076 4%: 001206 000060 006017 001206 030322 PAGE 001206 9 3s ;BR IF NOV MOVB Mmovs CLR #0,SSR(R1) LINEA, (R1) ;SET LINE SELECT BITS ;SCOPE SYNC ;CLEAR THE BCR UNDER TEST CRB CLR MOVB MovB (R2) $TMP2 R4 $TMP2, (R1) #0,SSR+1(R1) (R2),R3 JINIT A LINE CGUNTER ;MAKE S/B DATA = 000000 ;SELECT A LINE TO CHECK ;SCOPE SYNC ;GET WAS DATA ;IS THIS THE LINE WITH THE TEST PATTERN ;BR IF IT IS CMPB BEQ MoV CMP BEQ $TMP2,LINE 5% R5,R4 JSR JSR PC,SUER4 R5,SUNUM ;GO SET UP ERROR IN FO ;GO SET UP LINE NO. IN MSG BUFFER MoV #2% ,SLPERR 47 ;SET UP ERROR LOOP RETURN s INCORRECT DATA RcCAD FROM BCR INCB CmMPB $THP? #20,8THMP2 1% 4% ;GENERATE NEXT LINE NO. ;DONE ALL LINES ? ;BR IF YES ;G0 CHECK NEXT LINE EMLT+56 ERROR 6%: E BNE $TMPZ 001110 111 “BCR’' MEMORY PATTERNS TEST / 1'S DISTURB MoV 5%: 006262 08:05 BEQ BR R3.R4 6% ;MAKE S/B DATA = 177777 :CORRECT DATA IN BCR ? ;BR IF YES SEQ 0109 SEQ 0108 (Z0HM-D-0 CZOHMD.P11 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 6650 4651 4652 4653 4654 4655 4656 4657 4658 4659 4660 4661 4662 4663 4664 6665 09-MAR-78 15:32 F 10-MAR-78 124 9 08:05 PAGE 112 TEST THAT “'CAR’* MEMORY EXT BITS SET/CLR PROPERLY SEe@ 0110 SEQ 0109 ot RttRRERtERRNRNCRNRERNCATEERRERCLORCACOROCRRRRQRAOANRRAROARNAQNRAOACROTRTE SeTEST 24 LRt TEST THAT "'CAR'* MEMORY EXT BITS SET/CLR PROPEKLY N R RPN E RN P RN TR ARG AR RRINERNRSE TST24: SCOPE 1 .REM TEST ABSTRACT: vehbkARRARREEINYE THIS TEST VERIFIES THAT THE ''EXT MEM' BITS (CAR<17:16> CAN BE SET AND CLEARED IN ALL ''CAR'' MEMORY LOCATIONS. IT WRITES THE BINARY TEST PATTERNS (11, 01, AND 10) INTO BITS<17:16> TO CHE(K EVERY MEMORY LOCATION. .« » ESNDD — 000004 . . 006426 (¥, ] 4619 4620 4621 4622 4623 4624 4625 4626 6627 4628 6629 4630 463N 4632 4633 4634 4635 4636 30A(1052) . THE TEST SEQUENCE IS AS FOLLOWS: SELECT A TEST PATTERN TO USE CLEAR ALL 18 BITS IN ALL 16 LOCATIONS SELECT A LINE TO TESTY WRITE THE TEST PATTERN INTO <17:16> OF THE SELECTED LOCATION READ CHECK ALL LOCATIONS TO VERIFY THAT ONLY THE SELECTED LOCATION CONTAINS THE PATTERN . REPEAT STEPS 3 THRU 5 UNTIL ALL SELECTED LINES TESTED . REPEAT STEPS 1 THRU 6 UNTIL ALL PATTERNS USED ~N O~ 4610 4611 6612 4613 4614 4615 4616 6617 4618 PACY11 ALL ERRORS ARE REPORTED AND THEN THE LINE IN SEQUENCE. NOTES: TEST RESUM:5S CHECKING THE NEXT 1.) BITS<05:04> IN THE ''SCR'' ARE USED TO WRITE THE EXT MEM BITS 2.) BITS<07:06> IN THE ''SSR'' ARE USED TO CHECK BITS<17:16> ERRORS: RAXRRRRK 1.) ERROR 7 IS CALLED TO REPORY ALL ERRORS SYNC: trrren 1.) WRITE CAR: 2.7 READ CAR: M7277 SH4 LOAD LPR H EP2 M7277 SH4 LOAD BCR H FU2 DEBUG: ARRARN 1.) ASSUMING THAT THE PREVIOUS ‘'CAR'' MEMORY TESTS RAN ERROR FREE, THE PROBLEM IS EITHER THE M7277 OR THE M7278 2.) SET UP SCOPE ERROR LOOP AND START BACKTRACKING THROUGH THE LCGIC STARTING WITH THE KEY SIGNALS BELOW. KEY LOGIC: (28222222 %] M7277 SHS SCROS H SCRO4 H SSRO7 H D2 CE1 CF1 I (ZDHM-D-0 CZ0hMD PN 4666 §667 4668 4669 4679 4671 4672 4673 4674 4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 469N 4692 4693 4694 4695 4696 4697 4698 4699 4700 4701 4702 4703 4704 4705 4706 4707 4708 4709 64710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 MACY11 30A(€1052) 09-MAR-78 15:32 10-MAR-78 124 9 6 08:05 PAGE 113 TEST THAT '"CAR'' MEMORY EXT BITS SET/CLP PROPERLY SSR06 H 006430 006432 006436 006442 006446 006452 006454 006460 006464 006470 006474 006500 006504 006512 006314 006520 006522 006526 006532 006540 006546 006552 006556 006562 006566 006574 006600 006602 006606 006614 006616 006620 006622 006624 006630 006634 006636 006640 006646 006650 006654 006662 010102 062702 012705 012537 012537 001505 000016 027340 001704 001206 105037 162711 153711 162711 005061 105237 122737 001362 001210 000017 001210 000060 000006 001210 000020 004737 000750 153711 024544 153711 012761 012761 105037 013704 142711 153711 012761 016103 011203 042703 123737 001401 005004 020304 001412 004737 004537 001212 031155 012737 104007 105237 122737 001674 030322 001204 000000 000000 001212 001206 000017 001212 000000 000006 177477 030322 M7278 SH? NOTE: THER MAY BE A PRINT ERROR ON SH7 QOF THE M7278. THE SIGNALS INTO THE MUX CHIPS E66 AND ES8 COME fROM THE M7277 SHS RATHER FROM M7279 SH3. mMov ADD Mov Mov MOV BEQ R1,R2 #SSR,R2 #PATRNB RS (RS)+, STHP1 (R5)+,$THP2 TS125 2%: 3%: CLRB BICB BIS8 BICB CLR INCB (MPB BNE $TMP3 SINIT A LINE COUNTER #17,(R1) INIT LINE SELECT BITS IN ''SCRTM $TMP3, (R1) ;SELECT A LINE IN SCR #60, (R1) ;SO WE CLEAR ALL THE MEM EXT BITS CAR(R1) ;CLEAR A CAR STMP3 ;GENERATE NXT LINE NO. #20,3TMP3 ;CLEARED THE WHOLE THING ? 38 :BR IF NOT A ¥ JSR BR PC,SELINE 1$ :GO SELECT A LINE NO. sBR IF DONE ALL LINES $TMP1, (R1) sSET UP MEM EXT BIT PATTERN 1%: 6uN1210 BISB 81s8 MoV mov 000004 000006 5%: 000014 001212 024412 024636 001212 000020 BICB BIS8 LINE, (R?) #0,LPR(R1) #0,CAR(R1) $THP4 $TMP2 R4 #7,(R1) $TMP4, (R1) MUX CHIPS E66 AND ES8 (INPUT PIN 12) ;SET UP REGADR ;SET UP POINTER TO DATA PATTERNS ;GET THE PATTERNS ::BR IF DONE ALL PATTERNS ;SET UP LINE SELECT BITS ;SCOPE SYNC ;WRITE EXT BITS IN THIS LOCATICN SsINIT A LINE COUNTER ;SET UP S/B DATA ;INIT SELECT BITS IN ''SCR" SSET SELECT BITS IN SCR ;SCOPE SYNC BIC CMPB BEQ CLR cmp BEQ #177477 ,R3 LINE . STMP4 6% R4 R3,R4 s :CLEAR JUNK BITS ;LINE UNDER TEST ?? ;BR IF YES ;MAKE S/B DATA = 000000 ;WERE MEM EX7 BITS CORRECT ? JSR JSR $TMPS PC,SUER2 RS, SUNUM ;GO SET UP ERROR ;GO SET LINE NO. CAR(R1} ,R3 (R2) ,R3 ;READ THE SELECTED "'CAR'’ ;GET THE WAS DATA ;BR IF YES INFO IN MSG BUFFER ERROR l4 #2%,SLPERR ;SET UP ERROR LOOP RETURN INCE (MPB BEQ $TMP4 ;GENERATE NXT LINE NO. 2% ;BR IF MOV 7%: 74151 #0,BKR(R1) Em7+47 001110 001212 CLRB Mov MoV Mov MOV 6%: 006454 LB #20,3TMP4 ;MEM EXT BITS READ INCORRECTLY ;DONE ALL LINES YES SEQ 01N SEQ 0110 CZDHM-D-0 CZDHMD . P11 4722 0066646 MACY11 30A(1052) 09-MAR-78 15:32 000732 10-MAR-78 124 H 9 PAGE 114 08:05 TEST THAT "'CAR'' MEMORY EXT BITS SET/CLR PROPFR( Y BR 5% ;60 CHECK NEXT LINE SEQ 0112 SEQ@ 011 CZDHM-D-0 CIDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 9 I 08:05 PAGE 115 TEST INTR. ENAB. BITS - INTR. 10-MAR-78 125 (723 IR 4724 ;*TEST 25 4725 4726 4727 4728 R R DA 006666 000004 R R R R R TEST R AR R T N R R R R C R R R INTR. ENAB. RN R R RN SEQ 0113 SEQ 0112 CONDITION DISABLED R R R BITS - R R R AR AR INTR. AN AR R R AR IR R AN R CNONEY CONDITION DISABLED R AN NN RN AT R AR E R RN T1ST25: SCOPE .REM X TEST ABSTRACT: 4729 ' S222228222228 6730 4731 THIS 4732 4733 4734 4735 4736 TEST VERIFIES THAT NO TRANSMITTER OR RECEIVER INTERRUPT OCCURS WHEN THE ENABLE BIT IS SET WITH OQUT THE INTERRUPTING CONDITION ACTIVE. A BIT MASK (INTMSK: 030100) 1S UESED TO DEFINE THE ].E. BITS. IN THE "'SCR'* (BITS 13, 12, AND 06). THE TEST SEQUENCE IS AS FOLLOWS: 473%7 1. SET UP THE XMIT AND RCVR VECTORS 4738 4739 2. 3. SELECT AN I.E. BIT TO TEST INIT THE SP AND LOCK OUT INTERRUPTS 4741 4742 4;23 5. 6. 7. CLEAR THE PSW TO ALLOW INTRS IF NO INTR: REPEAT 2 THRU S UNTIL ALL BITS TESTED IF INTR: REPORY ERROR AND (ONTINUE W]TH NEXT BIT 47490 4. SET THE SELECTED BIT IN THE °''SCR" 4744 4745 4746 4747 4748 ALL ERRORS ARE IN SEQUENCE . REPORTED AND THEN THE TEST RESUMES WITH THE NEXT BIT ERRORS: 4749 TRk ER NS 4750 2;2; 1.) ERROR 11 IS CALLED 1O REPORT RCVR INTR FAULTS 2;22 2.) ERROR 12 IS CALLED TO REPORT XMITTR INTR FAULTS 4755 SYNC: 4757 4758 DEBUG: 4756 2222 4759 M7277 2.) 4766 KEY LOGIC: 1.) 2;2? L767 2;;? 4773 4774 4775 4776 4777 4778 INIT A H EfF2 PROBLEM IS MOST LIKELY THE M7289 MODULE If THIS IS THE FIRST TEST TO FAIL. SET UP SCOPE ERROR LOOP AND BACKTRACK THROUGH THE LOGIC STARTING WITH THE KEY LOGIC BELOW. ' 22228223322} 4768 4769 4772 SH3 ' 228281 4760 4761 4762 4763 - 006670 006676 006700 006704 006710 006714 006716 012737 010102 013703 012723 113723 105723 012723 006746 027304 006776 030316 007020 y 001110 m7289 SH6 MoV #3%,SLPERR ;SET UP THE ERROR LOOQP RETURN Mmov #5%,(R3)+ ;UPDATE POINTER ;60 TO 5% !F XMITTR INTRS MOV MoV MOV MOVB TSTB TO TEST XMIT INT REQ H RCV INT REQ H R1,R2 DHVCT,R3 #48, (R3)+ DHRLVL, (R3)+ (R3)+ FM1 DP1 sMAKE 1T REGADR 700 ;GET FIRST VECTOR ADDRESS ;60 7O 3% IF RCVR INTRS MACY11 30A(105¢2) 006722 006726 006732 006736 006740 006742 006744 113713 012705 030537 001003 006305 001437 000772 030317 000001 027676 006746 006752 006756 006762 006764 006766 006772 006774 012706 004737 012711 010504 050511 004737 000240 000761 001100 027164 004000 006776 007002 007004 007910 007012 007016 00473%7 011103 004737 027200 012716 000002 006740 007020 007024 007026 027200 007034 007040 004737 011103 004737 104012 012716 000002 007042 007046 012706 004737 001100 026770 (ZDHM-D-0 CIDHMD P 4779 4780 4781 4782 (783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800 4801 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811 007032 09-MAR-78 15:32 104011 10-MAR-78 125 1%: 2%: 08:05 TEST PAGE MOVB mov BIT BNE ASL BEQ BR 3%: MoV JSR MOV MoV BIS JSR NOP BR 027150 4%: 024416 5%: 024416 JSR MoV JSR ERROR 6%: INTR. J 9 ENAB. BITS ~ DHTLVL, (R3) #1,R5 R5, INTHSK 33 R5 6% 1% INTR. PC,SAPS ;SAVE ?%.SUERZA #2%, (SP) JSR PC,SAPS SEQ 0113 JINIT BIT TEST MARKER STEST THIS BIT 2?7 ;BR IF YES :SHIFT THE MARKER ;BR iF TESTED ALL REQUIRED BITS ;GO TEST FOR THIS ONE 2$ (R1) ,R3 SEQ 0114 CCNDITION DISABLED ;RESET SP FOR ERROR LOOPING :GO LOCK OUT INTRS ;CLEAR THE DH11 INTERFACE ;SET UP S/B DATA ;SET THE TEST I.E. BIT ;GO CLEAR PSW JWAIT A BIT TO ALLOW INTR ;0K - GO DO NEXT I.E. BIT #STACK,SP PC,CHPS2 #BI17T11,(R1) RS, R4 RS, (R1) PC,CHPS1 mMov RTI THE ERROR PSW :GET THE WAS DATA ;60 SET UP ERROR INFO ;DH11 RCVR SHOULD NOT HAVE sSET UP TO RETURN INTERRUPTED sRETURN TO TEST NEXT BIT mov RTI 928, (SP) ;SAVE THE ERROR PSW ;GET THE WAS DATA ;60 SET UP ERROR INFO sXMITTER SHOULD NOT HAVE INTERRUPTED ;SET UP TO RETURN MOV JSR #STACK,SP PC,RESTRP ;RESET THE SP JUST IN CASE ;GO RESTORE TRAP CATCHER IN VECTOR Mov JSR ERROR 006740 116 (R1) ,R3 PC,SUER2A 12 sRETURN TO TEST NEXT BIT (2DHA-D-0 CZOWMD . P11 MACYI1 30A(1052) 09~MAR-78 15:32 10-MAR-78 126 08:05 4812 AN 4813 ;¢TEST 26 (814 4815 4816 4817 I 007052 000004 PAGE 117 TEST CHAR. K AVAIL. AR R 9 [.E. R RN R R W!TH INTR. R P PR TEST CHAR. AVAIL. AR R R P AR AR R P U R I1.E. AR AR R AN AN SEQ 0114 NN R AR E NIRRT RO NS WITH INTR. AN AT SEQ 0115 CONDITION ACTIVE A AR T T RN CONDITION ACTIVE ERANANERIRR NN TS126: SCOPE .REM X TEST ABSTRACT: 4818 1222222 22232322; 4819 4820 4821 235% THES TEST USES MAINT. MODE (SCR09=1) TO SET THE CHAR AVAIL BIT (SCR7) TO GENERATE A RCVR INTERRUPT THROUGH THE PROPER VECTOR. THE TEST SEQUENCE IS AS FOLLOWS: 4824 1. SET UP THE VECTORS 4825 4826 4827 22%8 2. ISSUE DH11 ‘'MASTER CLR'',RESET THE SP, AND LOCK OUT INTRS 3. PRIMT THE DH11 TO GENERATE A RCVR INTR 4, CLEAR THE PSW TO ALLOW INTRS 5. REPORT NO RCVR INTR OR FALSE XMITTR INTR. 4830 zgg; ALL ERRORS ARE REPORTED AND THEN THE TEST RESETS THE VECTOR AND SP AND CONTINUES TO THE NEXT TEST IN THE PROGRAM. 4833 ERRORS: 4834 112228282 4835 4836 1.) ERROR zggg 2.) 4839 SYNC: 4841 4842 DEBUG: 4840 ERROR 2228 (843 13 12 m7277 IS CALLED TO REPORT RCVR INTR FAULTS IS CALLED TO REPORT XMITTR INTR FAULTS SH3 INIT A H EF2 222222 4844 4845 4846 4847 2328 1.) IF NO RCVR INTR OCCURRED THE PROBLEM IS EITHER SECTION ""A’" OF M7821 OR THE M7289 - SH6. 2.) IF A FALSE XMIT INTR OCCURRED THE PROBLEM ]S MOST LIKELY THE M7821 GENERATING AN INCORRECT VECTOR ADDRESS. 4850 KEY LOGIC: 4,851 4852 222222228 4853 4854 4855 4856 4857 4858 M7289 SH6 M7821 SEC A" BUS A BR L 2228 €31-12 BUS SACK L BUS BG IN H A’ MASTER L ue T2 81 N1 VECTOR BIT 02 H D2 4861 NOTE: 4862 4863 2322 4866 4867 THE 012737 010102 007132 001110 CAUSED SYSTEM RE-CONFIGURATION TO ISOLATE THE FAULTY SuB- " 007054 007062 REMEMBER THAT PROBLEMS IN THIS AREA (OULD BE BY ANY DEVICE IN THE SYSTEM INCLUDING THE ''CPU". SYSTEM MAY BE REQUIRED. MOV MoV #13,SLPERR R1,R2 ;SET UP THE ERROR LOOP RETURN sMAKE IT REGADR TO0O MACY11 30A(1052) 027304 007222 030316 007146 013703 012723 113723 105723 012723 113713 012711 012706 004737 012711 052711 052711 004737 000240 007150 007154 007156 007160 007162 007166 004737 011103 005011 005011 012704 004737 007176 007202 007204 007210 007212 007214 007220 004737 011103 012704 005011 004737 024416 007222 007226 012706 004737 001100 026770 CIDHM-D-0 CZDHMD P11 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 (882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4,898 4899 4900 490 007064 007070 007074 007100 007102 007106 007112 007116 007122 007126 007132 007136 007142 007172 007174 09-MAR-78 15:32 104013 000412 005011 104012 007176 030317 004000 001100 027164 001060 000100 000200 027150 10-MAR-78 126 08:05 PAGE 118 TEST CHAR. AVAIL. mov MoV move 1%: 1578 mov move mov mMov JSR MOV BIS BIS JSR NOP 027200 JSR Mov CLR 001300 024416 Mov 027200 CLR JSR ERROR BR 2s: 001300 Is: JSR Mov Mov | L.E. DHVCT,R3 #3838, (R3)+ DHRLVL, (R3)+ (R3)+ #28,(R3)+ DHTLVL, (R3) #BIT11,(R1) #STACK,SP PC,CHPS2 #81709, (R1) #B1706, (R1) #B1T07, (R1) PC,CHPST PC,SAPS (R1) ,R3 (R1) (R1) #1300,R4 PC,SUERZA 13 3s PC,SAPS CLR CLR JSR ERROR (R1) ,R3 #1300,R4 (R1) (R1) PC,SUERZ2A 12 MOV #STACK,SP JSR 9 L PC,RESTRP WITH INTR. CONDITION ACTIVE ;GET FIRST VECTOR ADDR ;GO TO 38 IF RCVR INTRS ;UPDATE POINTER ;GO TO 3% ON XMITTR INT®" ;CLR THE DH11 sRESET THE SP FOR ERROR LOOPS ;60 LOCK OUT INTRS :SET MAINT MGDE BIT ;SET CHAR AVAILABLE I.E. BIT ;SET THE CHAR AVAIL BIT TO FORCE INTR ;GO CLEAR PSW ;GIVE IT A LITTLE TIME :SAVE THE ERRGR PSW ;GET THE WAS DATA ;CLEAR OUT THE SCR ;SET UP S/B DATA ;GO SET UP ERROR INFO ;TIMED OUT AWAITING CHAR AVAIL INTR ;GO EXIT TEST :SAVE THE ERRCR PSW ;GET WAS DATA sSET UP S/8 DATA ;CLR OUT SCR REG ;GO SET UP ERROR INFO JUNEXPECTED XMITTR INTR sRESET THE SP ;GO RESTORE TRAP CATCHER SEQ 0136 SEQ 0115 CZONM-D-0 CZDOHMD.P11 4902 4903 4904 4905 4906 4907 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 127 TeTEST 27 S 007232 4953 4954 4955 4956 4957 I.E. WITH INTR. CONDITION ACTIVE SILO OVFLW. 00000030 1.E. 230200 20000 WITH INTR. R0RRRERRRRR20R CONDITION ACTIVE R0 22022202 SCOPE X LREM TEST ABSTRACT SR80 2R THIS TEST USES MAINT. MODE (SCRO9=1) INTERRUPT. THE TEST SEQUENCE IS AS FOLLOWS: 1. 2. 3. 4. 5. TO ENABLE SILO FULL SET UP XMIT AND RCVR VECTORS RESET THE DH11 AND S.P. - THE LOCK OUT INTRS. PRIME DH11 TO GENEKATE SILO FULL INTR. - ALLOW INTRS. REPORT ERROR IF NO RCVR. INTR OCCURS OR A FALSE XMIT INTR. DOES OCCUR AFTER REPORTING ANY ERRORS DETECTED RESET THE SP AND VECTORS THEN GO TO TEST 30 ERRORS: L E22222 1. ERROR 43 2. ERROR 12 SYNC: 4928 4952 TEST 3222320300022 1§127: 000004 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4947 4948 4949 4950 4951 "9 ':"tttt"'tti'tttttt'tt"t't"t"i't't'tittt'.tttt"ttttt'tt.t'. 4908 4909 4910 4929 4930 4931 4932 4933 4934 4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 64946 08:05 PAGE 119 TEST SILO OVFLW. M7277 IS CALLED TO REF., T NO RCVR INTR OCCURRED IS CALLED TO RE-_RY FALSE TRANSMITTER INTR. SH3 INIT A H EF2 L2228 DEBUG: TR AY 1. 2. IF THE RECEIVER INTR FAILED TO INTERRUPT PROBLEM [S MOST LIKELY THE M7289 MODULE IF A FALSE XMITTR INTR OCCURRED PROBLEM IS MOST LIKELY THE M7281 MODULE KEY LOGIC: (23R8 007234 007242 007244 007250 007254 007260 007262 007266 007272 007276 007302 007306 001100 00727¢ 001110 4 027304 007402 030316 007356 030317 004000 027164 001000 1%: 28221 M7289 SHG M7821 "'B'* SECTION MOV MOV Mov Mov MOVB TSTB MoV #1$ SLPERR R1,R2 DHVCT R3 #38, (R3)+ DHRLVL, (R3) + (R3)+ #2%,(R3)+ ;SET UP THE ERROR LOOP RETURN ;MAKE IT REGADR TOO Mov Mmov JSR mov #BIT11,(R1) #STACK,SP PC,CHPS2 #B81T09,(R1) ;CLR THE DHI1 Mmove E35,E50, OR EN SCR 14 H (STORAGE) DS1 DHTLVL, (R3) ;GET FIRST VECTOR ADDR ;GO TO 3% IF RCVR INTRS ;UPDATE POINTER ;GO TO 2% ON XMITTR INTRS ;RESET THE_SP FOR ERROR LOOPS ;G0 _LOCK OUT INTRS ;SET MAINT MODE BIT SEQ@ 0117 SEQ 0116 C(ZOHA-D-0 LZDHMD P11 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 007312 007316 007322 007326 MACY11 30A(1052) 09-MAR-78 15:32 05271 ns52711 V04737 000240 040000 010000 027150 007330 007334 007336 007340 007342 007346 007352 007354 004737 011103 005011 005011 012704 004737 4978 007356 007362 007364 007370 007372 007374 007400 004737 011103 012704 005011 005011 004737 024416 4980 4981 007402 007406 012706 004737 001100 026770 4977 4979 104043 000412 104012 10-MAR-78 127 027200 PAGE 120 3%- WITH INTR. SEQ 0118 SEQ 0117 CONDITION ACTIVE #BIT14,(RD) #81712, (R1) PC.CHPST JSET SILO OVFLW 1.E. BIT ;SET THE SILO FULL BIT TO FORCE INTR ;GO CLEAR PSW ;GIVE IT A LITTLE TIME JSR PC,SAPS ;SAVE JSR ERROR BR (R1) ,R3 (R1) (R1) #51000,R4 PC,SUER2A 43 3s JSR PC,SAPS CLR CLR JSR ERROR (R1) PC,SUERZA 12 MoV JSR #STACK,SP PC,RESTRP MOV 051000 [.E. BIS BIS JSR NOP CLR CLR 2%: N TEST SILO OVFLW. mov 051000 024416 027260 08:05 Mov Mov (R1),R3 #51000,R4 (R1) THE ERROR PSW ;GEY THE WAS DATA ;CLEAR OUT THE SCR ;SET UP S/8 DATA ;GO SET UP ERRCR INFO ;TIMED QUT AWAITING SILO OVFLW ;GO EXIT TEST ;SAVE THE ERROR PSW ;GET WAS DATA ;SET UP §/B DATA ;CLR OUT SCR REG ;GO SET UP ERROR INFO ;UNEXPECTED XMITTR INTR sRESET THE SP ;GO RESTORE TRAP CATCHER INTR CIDHM-D-0 D . P11 CZOHR 4982 4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 MACYi1 30A(1052) 09-MAR~78 15:32 A 5033 5034 5035 5036 5037 08:05 PAGE 121 TEST NON EX WEM |.E. ;eTEST 30 007412 WITH INTR. SEQ 0119 SEQ 0118 CONDITION ACTIVE 22212 2222000020 0220022221202 2222822222 R] NN R TEST NON EX MEM I.E. NN R PR WITH INTR. CONDITION ACTIVE AT PR AL AL RN R AT IR R RN A NIRRT ARANTS TST30. SCOPE 4 .REM TEST ABSTRACT: 00004 AN RRAEREY THIS TEST VERIFIES THAT THE NON-EX-MEM BIT (SCR10) CAN CAUSE A TRANSMITTER INTERRUPY VIA THE PROPER VECTOR. THE TEST SEQUENCE IS AS FOLLOWS: 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006 5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018 €019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 8 10 10-MAR~78 150 1. SET UP XMIT AND RCVR VECTORS 2. 3. CLEAR THE DH11, RESET SP, AND LOCK OUT INTRS PRIME DH11 TO GENERATE YMIT INTR IN MAINT. MODE S. REPORT ERROR IF NO XMIT 4. 6. ALLOW INTRS. A FALSE RCVR INTR OCCURS INTR OCCURS OR [F REST SP AND VECTORS THEN GO TO TEST 3t ERRORS: TARRRRR 1. . ERROR 44 2. ERROR 11 SYNC: PP mM7277 IS CALLED IF NON-EX-MEM FAILS TO GENERATE XMIT IS CALLED IF FALSE RCVR INTR OCCURS SH3 INIT A H INTR EF2 DEBUG: L82202 1. 2. IF THE NON-EX-MEM INTERRUPT FAILS TO OCCUR PROBLEM IS MOST LIKELY THE M7289 MODULE IF A FALSE RCVR INTR OCCURS PROBLEM IS MOST LIKELY THE M7289 OR THE M7281 MODULES. KEY LOGIC: (SRR 007414 007422 007424 007430 007434 007440 007442 007446 007452 007456 007462 007466 007452 001110 027304 007536 030316 007562 030317 004000 001100 012711 027164 001000 S22 M7289 SH6 MoV MOV MoV MoV Movs 18 ,SLPERR R1,R2 DHVCT,R3 #28,(R3)+ DHRLVL, (R3) + ;SET UP THE ERROR LOOP RETURN sMAKE IT REGADR T00 ;GET FIRST VECTOR ADDR ;GO TO 2% IF RCVR INTRS Mov move #3%,(R3)+ DHTLVL, (R3) :GO TO 3% ON XMITTR INTRS JSR Mov PC,CHPS2 #B1T09, (R1) 1ST8 1%: MoV mov SCR 10 H (NO EX MEM) E35, E41, OR €48 {(R3)+ :UPDATE POINTER #BIT11,(R1) #STACK,SP ;CLR THE DH! FL1 JRESET THE SP FOR ERROR LOOPS ;GO LOCK OUT INTRS sSET MAINT MODE BIT (Z0HM-D-0 CZ0HMD.P11 5038 5039 5040 007472 00747¢ 007502 MACY11 30A(1052) 09-MAR-78 15:32 CONDITION ACTIVE 020000 0062000 027150 BIS BIS JSR NOP #B1T13,(R1) #81T10, (R1) PC,CHPSY JSET XMITTR I.E. BIT ;SET THE NON EX MEM BIT TO FCRCE INTR ;GO CLEAR PSW ;GIVE IT A LITTLE TIME 027200 JSP MoV CLR CLR MoV JSR ERROR BR PC,SAPS (R1) ,R3 (R1) (R1) #23000,R4 PC,SUER2A 44 ;SAVF THE ERROR PSW ;GET THE WAS DATA ;CLEAR OUT THE SCR JSR MoV Mov CLR CLR JSR ERROR PC,SAPS (R1) ,R3 #23000,R4 (R1) (R1) PC,SUERZA 11 ;SAVE THE ERROR PSW ;GET WAS DATA ;SET UP S/B DATA sCLR OUT SCR REG Mov JSR #STACK,SP PC,RESTRP ;RESET THE SP ;GO RESTORE TRAP CATCHER 007506 000240 5043 5044 5045 5046 5047 5048 5049 007510 007514 007576 007520 007522 007526 007532 004737 011103 005011 005011 012704 004737 104044 5052 5053 5054 5055 5056 5057 2828 007536 007542 0075446 007550 007552 007554 007560 004737 011103 012704 005011 005011 004737 104011 027200 5060 5067 007562 007566 012706 004737 001100 026770 007534 €10 08:05 PAGE 122 TEST NON EX MEM I.E. WITH INTR. 052711 052711 004737 ggz; ggg? 10-MAR-78 130 023060 024416 000412 2%: 023000 024416 3s: 3$ ;SET UP S/B DATA ;GO SET UP ERROR INFO ;TIMED OUT AWAITING NON EX MEM INTR ;GO EXIT TEST ;GO SET UP ERROR INFO ;UNEXPECTED RCVR INTR SEQ 0120 SEQ 0119 (ZDHA-D-0 CZOHMD.P11 5062 5063 5064 5065 5066 5067 5068 5069 5370 5071 5072 5073 5074 MACY11 30A€1052) 09-MAR-78 15:32 D 10 08:05 PAGE 123 TEST XMITTR DONE 1.E. 10-MAR-78 31 A AL AL ;eTEST 31 007572 1ST31: .REM 000004 cd b ek ud D b TEST XMITTR DONE I.E. WITH INTR. CONDITION ACTIVE SCOPE % IS AS FOLLOWS: 1. 2. SET UP XMIYT AND RCVR VECTORS CLEAR THE DH11, RESET SP, AND LOCK OUT 4. 5. CLEAR PSW TO ALLOW INTRS REPOT ERROR IF XMITTR FAILS TO INTR OR A 3. PRIME DH11 TO GENERATE ''XMIT DONE'' INTR FALSE INTR OCCURS RCVR INTRS ERRORS: (28282 84 1. 2. ERROR 45 ERROR 11 SYNC: M7277 IS CALLED TO REPORT ‘'XMIT DONE'® INTR FAILED TO OCCUR IS CALLED TO REPORT FALSE RCVR INTRS SH3 INIT A H EF2 *eAEY DEBUG: L82242 5093 5094 5095 5096 5097 5098 5099 5100 5101 o AR RARRRRARRRARRARRRRd )] THIS TEST VERIFIES THAT XMIT DONE (SCR15) CAN BE SET TN MAINT. MODE TO CAgSE A XMITTR INTR VIA THE PROPER VECTOR. THE TEST SEQUENCE 5091 5092 e AR AR AEENRARERENEEY 5085 5086 5087 5088 5089 5090 b b ) e wd b b OO NOWVES WA =000 AR AR SEQ 0121 SEC 0120 CONDITION ACTIVE TEST ABSTRACT: 5080 5081 5082 5083 5084 b A RARA INTR. ::‘Qtttt'."ii'i"t"Q"ffiii't"""""t.tittl.t.tii'i'.il'lt"t 5075 5076 5077 5078 5079 VAAVAVA IV WILWA VAV AR AR WITH 1. 2. IF NO XMIT INTR OCCURS PROBLEM IS MOST LIKELY THE M7289 MODULE IF A FALSE RCVR INTR. OCCURS PROBLEM IS MOST LIXCLY THE M7821 MODULE. KEY LOGIC: kAR 007574 007602 007604 007610 007614 007620 007622 007626 007632 007636 007642 007646 007652 007656 012737 010102 013703 012723 113723 105723 012723 113713 012711 012706 004737 012711 052711 052711 007632 001110 b4 027304 007716 03031¢ 007742 030317 004000 001100 027164 001000 020000 100000 1%: RERS M7289 SH6 Mov mov Mov Mov #13,SLPERR R1,R2 DHVCT ,R3 #28,(R3)+ MOVB 1STB MoV Movs MoV MOV JSR Mmov BIS BIS SCR 15 H (XMIT) FR2 E48, ESO DHRLVL, (R3)+ (R3)+ #33, (R3)+ DHTLVL, (R3) ;SET UP THE ERROR LOOP RETURN sMAKE IT REGADR TOO ;GET FIRST VECTOR ADDR ;GO TO 2% IF RCVR INTRS ;UPDATE POINTER ;G0 TO 3% ON XMITTR INTRS #BIT11,(R1) :CLR THE DH11 PC,CHPS?2 ;G0 LOCK QUT INTRS #STACK,SP #BIT09,(R1) #BIT13,(R1) #BIT15,(R1) ;RESET THE SP FOR ERROR LOOPS ;SET MAINT MODE BIT ;SET XMIT DONt I.E. BIT ;SET THE XMITTR DONE BIT TO FORCE INTR (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 B3] 08:05 PAGE 124 £ 10 TEST XMITTR DONE [.E. WITH INTR. 5118 g};g 007662 007666 004737 000240 027150 JSR NOP PC,CHPST ;60 CLEAR PSW ;GIVE IT A LITTLE TIME 5121 5122 5123 51264 5125 5126 5127 g}gg 007670 007674 007676 007700 007702 007706 007712 007714 004737 011103 005011 005011 012704 004737 104045 000412 027200 JSR Mov CLR CLR MoV JSR ERROR BR PC,SAPS (R1),R3 (R1) (R1) #121000,R4 PC,SUER2A 45 3s ;SAVE THE ERROR PSW ;GET THE WAS DATA ;CLEAR OUT THE SCR 5130 5131 007716 007722 004737 011103 JSR Mov PC,SAPS (R1),R3 ;SAVE THE ERROR PSw ;GET WAS DATA :SET UP S/B DATA ;CLR OUT SCR REG 5132 5133 5134 5135 g}gg 5138 5139 0077264 007730 007732 007734 007740 012704 005011 005011 004737 104011 007742 007746 012706 004737 121000 024416 027200 2%: 121000 mov CLR CLR JSR ERROR 024416 001100 026770 3s: MoV JSR #121000,R4 (R1) «R1) PC,SUER2A 11 #STACK,SP PC,RESTRP SEQ 0122 SEQ 0121 CONDITION ACTIVE ;SET UYP S/B DATA ;GO SET UP ERROR INFO sTIMED QUT AWAITING XMIT DONE ;GO EXIT TEST ;GO SET UP ERROR INFO ;UNEXPECTED RCVR INTR JRESET THE SP ;GO RESTORE TRAP CATCHER INTR (ZOHM-D-0 CIDHMD . P11 5140 5141 5142 5143 5144 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 132 F PAGE 125 BASIC 10 TRANSMITTER ‘"NPR'" LOGIC TEST SEC 0123 SEQ 012¢ 1 ':!'i.tt"""'.i""'.'i'l'""tti"ttt'!i'tQQ"Qtttttt'ttt"t't SeTEST 32 BASIC TRANSMITTER ‘'NPR'' LOGIC TEST 1 :;t'it""'t"""t'iQi"'t"'t"'i"t""'t.'t'ttttttttttt!!'tQt 007752 000004 TST32: SCOFE .REM 1 TEST ABSTRACT: THIS TESYT LINES TEST SEQUENCE [« XV, IJNOV] NR THE @ o 8 CLEAR ALL LOCATIONS IN "‘CAR'' AND "BCR'' MEMORIES e e —t —d O 00~ el o v e —_ d . D i ) . d e IF INTR TIMEOUT OCCURS REPORT ERROR AND RESTART AT STEP ¢ IF XMIT INTERRUPT OCCURS CHECK AND REPORT ANY ERRORS: (SCR15=1) THE FOLLOWING CONDITIONS A. XMIT DONE SET C. D. "CAR'' REGISTER GOT INCREMENTED TO +1 °''BCR' REGISTER GO INCREMENTED TO O "BAR" BIT GOV CLEARED . REPEAT STEP 2 THRU 11 UNTIL ALL SELECTED LINES TESTED . — Wnno d D d i AFTER TESTING ALL LINES CLEAR THE DH11, RESET THE VECTOR (2228421 ERROR 15 ERROR 14 ERROR 14 S} NN ENANPNY — e -l e i i el i STOP BIT ACTIVATE SELECTED XRITTR AND ENABLE XMIT DONE CLEAR PSW TO ALLOW INTR. ACTIVATE TIMER TO WAIT FOR XMIT DONE INTR ERRORS: S ki TO XMIT ONE CHAR FROM LOCATION O 9600 BAUD, 5-BITS, 1 i A WA WM AT AVAEARLIT WA WA WV WD WA WM ARV INTRS AND CLEAR THE DH11 PRIME DH11 CLEAR PSW, RESET SP, AND GO YO TEST 33. ERROR 14 ERROR 14 IS CALLED IF XMIT DONE FAILS TO INTR ON TIME IS CALLED IF XMIT DONE NOT SET IS CALLED IF "BAR' BIT FAILED TO CLEAR IS CALLED If '‘CAR' NOT INCREMENTED PROPERLY IS CALLED IF ""BCR'® NOT INCREMENTED PROPERLY D el A%LEERROR MESSAGE HEADERS LINE. SYNC: M7277 SH3 INCLUDE INIT A H THE LINE NO. OF THE FAILING EF2 TR (NOTE: USE SR09=1 7O LOCK ON FAILING LINE ANL SR13=1 INHIBIT ERROR PRINTOUT TO MINIMIZE SCOPE LGOP.) h —h d —d SELECTED IS AS FOLLOWS: LOCK OUT B. ) i il S ol FROM LOCATION O ON ALL SET UP THE XMKITTR VECTOR SELECT A LINE # TO TEST RESET THE SP e B D e D il AT WA A W d — e BTV D 0O OO 0 0O O 00 0o©0 Co 0o 2 0o O 0o OB SNNN~N NNNN NN O oo (X V] N = OO0 NO ML O O 00 ~¢O WV - OO0 NN W=D WVHAWAWAAWMIWAIWA VIV TRANSMITS A SINGLE BYTE (AS SELECTED BY THE CONFIGURATION PARAMETER "'LINSEL:'') ONE AT A TIME. i ——-d b ot b VA VL ALK seARdpARELIERLEY TO DEBUG: L2288 81 1. IF ALL LINES FAIL TO INTERRUPT ON TIME, SUSPECT LOSS OF 9600 BAUD (ZDHA-D-0 CZ0nMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 132 5196 5197 5198 5199 5200 5201 2. 3. 4. 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 G 10 08:05 PAGE 126 BASIC TRANSMITTER ''NPR'' LOGIC TEST SEQ 0124 SEQ 0123 1 CLOCK SIGNAL OR BYTE COUNT DECODER ON M7278 SH3 (XMIT FINISHED PULSE L) 1F GROUP OF 8 LINES <15:08> OR <07:00> FAIL TO INTERRUPT ON TIME, SUSPECT THE BUFFERED CLOCK SIGNALS (TOP AND BOT) ON THE M7288 SH3 IF ONLY ONE LINE FAILS TO INTERRUPT ON TIME, SUSPECT LOSS OF CLOCK IN IF LINE [NCORRECT LINE MULTIPLEXORS M7288 SH4~SH11. INTERRUPTED OK BUT ''SCR', REFER TO KEY LOGIC SIGNALS BELOW. "'BAR', ''CAR'', OR 'BCR'' WAS KEY LOGIC: ArATRARETEYY XMIT DOWNE FAILED M7289 M7278 TO SET: SH6 SH3 SCR15 H FR2 XMIT FINISHED PULSE L AR1 "'BAR'* BIT FAILED TO CLEAR: M7278 SH3 SHS SHé SH7 SH8 ""CAR'' REG NOT M7277 M796 "BCR'" REG NOT 012737 013703 062703 012723 113713 004737 000552 010010 027304 000004 010154 030317 024544 010010 010014 010016 010022 010026 010032 010038 010042 010046 010054 010062 012706 010102 012704 153704 004737 004737 012711 001100 153711 012761 012761 053761 001110 1$: 2%: 120000 030322 024715 027164 004000 030322 177777 033500 027314 1 <11:08> H <07:04> H <03:00> H (7474 E62, E63 (7474) E70, E71 (7474) E78, E79 (7474) INCREMENTED: SH6 END CYCLE PULSE DLY H SHS AND SH6 “'CAR'' MEMORY LOGIC FL2 END CYCLE H P2 INCREMENTED: END CYCLE L N2 Mov Mov ADD Mov movs #2%,SLPERR DHVCT,R3 #4 R3 #43,(R3)+ DHTLVL, (R3) ;SET UP ERROR LGOP RETURN ;GEY THE FIRST VECTOR ADDRESS ;POINT TO XMITTR ENTRY ;G0 TO 48 ON XMITTR INTR BR 8s ;BR JSR SH3 AND SH& ''BCR'* MEMORY LOGIC PC,SELINE Mmov #STACK,SP MOoY #120000,R4 Mov BISB JSR JSR 000010 000004 000012 BAR <15:00> L <15:12> H E54, ES55 M796 M7278 007754 007762 007766 007772 007776 010002 010006 CLR BAR BAR BAR BAR MoV BISB MoV Mov BIS ;GO SELECT A LINE NO. IF TO TEST TESTED ALL SELECTED LINES ;RESET SP FOR ERROR LOOPS? R1,R2 ;SET UP REGADR LINE R4 PC,CLCABC PC,CHPS2 ;GO CLEAR CAR AND BCR MEMORIES ;G0 LOCK OUT INTRS #33500,LPR(RT) LINMSK,BAR(R1) ;SET UP LINE PARAMETERS ACTIVATE SELECTED LINE #1711, (RD) LINE, (RT) #-1,BCR(R1) ;SET UP S/8 DATA ;CLEAR THE DH11 INTFRFACE ;SELECT A LINE NO. ;SET BYTE COUNT TO -1 C0MM-0-0 CIOHMD . P11 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 9266 5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 52N 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 MACY1Y 30A(1052? 010070 010074 052711 004737 020000 027150 010100 010106 010112 010114 010120 012737 005037 000240 004737 000774 000001 010122 010126 010130 010134 010140 010144 010146 010150 010152 004737 011103 042703 004737 004537 030322 031522 027200 010754 010156 005711 010160 010164 010166 010172 027200 010176 010200 004737 011103 004737 004737 104014 000700 010202 010206 016703 001413 000012 010210 010214 010220 010222 010226 010232 010234 004737 062702 005004 004737 004737 104014 000662 027200 000012 010236 010242 010246 016103 022703 001414 000006 000001 010250 010254 010260 010264 010270 010274 010276 004737 012704 062702 004737 004737 027200 00000 000006 024416 010372 010300 010304 016103 001636 09-MAR-78 15:32 030352 027016 10-MAR-78 132 030350 3% BIS JSR #BIT13,(R1) PC.CHPSI MOV CLR NOP JSR #1,TIMEA TIMEB BR PC,TIMEIT 3% JSR JSR mMov BIC 000200 024416 024636 JSR L INE BR 4% 100411 5%: 024416 010372 TIMER PC,SAPS ;SAVE THE ERROR PsSW PC,SUER2A ;GO SET UP ERROR INFO ;GO SET LINE NO. IN ERROR MSG (R1) ,R3 #B1707,R3 R5,SUNUM 000010 7%: 1% ;TIMER ROUTINE WILL MOVE RETURN PC AROUND ;sTHIS BRANCH IF TIMEOUT OCCURS ;GET THE WAS DATA ;WE'RE NOT INTERESTED IN THIS BIT ;TIMEOUT WHILE AWAITING XMIT ;GO TEST NEXT LINE (R1) ;DID XMIT DONE SET ?? ;BR IF YES JSR PC,SAPS :SAVE THE ERROR PSW ;GET THE WAS DATA :GO SET UP ERROR INFO SOME ERROR STUFF ;GO SEVT UP (R1) .R3 PC,SUERZA PC,9% 14 1$ ;XMIT DONE FAILED TO SET BAR(R1) ,R3 6% :GET WAS DATA FROM "'BAR'' JSR ADD CLR JSR JSR ERROR PC,SAPS #BAR,R2 R4 PC,SUERZA PC.9$ 14 ;SAVE THE ERROR PSW ;SET UP REGADR 1% INTR ;GO TEST NEXT LINE Mov BEQ ;BR IF BAR BIT GOT CLEARED JSET UP S/B DATA ;GO SEY UP ERROR INFO ;GO SET UP SOME ERROR STUFF ;BAR BIT FAILED TO CLEAR ;GO TEST NEXT LINE cMpP #1,R3 7$ ;GET THE WAS DATA FROM (AR ;DID IT GET INCREMENTED ? ;BR IF YES JSR MOV ADD JSR JSR ERROR BR PC,SAPS ’1,R4 #CAR,R2 PC,SUERZA PC.9% 14 1% ;SAVE THE ERROR PSW ;SET UP S/8 DATA ;SET UP REGADR ;GO SET UP ERROR INFO ;60 SET UP SOME ERROR STUFF INCREMENTED PROPERLY :CAR REG NOT ;GO TEST NEXT LINE MoV BEQ B(R(R1),R3 1% ;GET WAS DATA FROM B(CR ;BR IF BCR GOT INCREMENTED TO 00GO00 MOV BEQ 000641 JINIT TIMER A ;INIT TIMER B ;D0 NOTHING WAIT 5% TST B8R 6%: ;ENABLE INTERRUPT ON XMIT DONE ;60 CLEAR PSW BMI MOV JSR JSR ERROR BR 024416 010372 SEQ 0125 SEQ 0124 s CALL EM15+43 15 ERROR 104015 000713 104014 H 10 PAGE 127 08:05 BASIC TRANSMITTER ''NPR'’ LOGIC TEST 1 CAR(R1) ,R3 CZDHM-D-0 CZDHAG PN Py b ad od b e d NN — o O —h i ~NO NS [V AV QY AV IV IV T v AV RN LV AV AV, TV TV, [V IV N v ]e 5308 5309 010306 010312 010314 010320 010324 010330 MACY11 30A€1052) 09-MAR-78 15:32 004737 005004 062702 004737 004737 104014 010332 000623 010334 010340 010344 010350 010352 010356 010360 010364 010370 012711 013703 062703 010313 062723 005013 004737 012706 000405 010372 010376 010400 010402 004537 030322 031454 000207 70-MAR-78 132 027200 :SAVE THE ERROR PSW ;SET UP 5/8B DATA ;SET UP REGADR ;GO SET UP ERROR INFO ;GO SET UP SOME ERROR STUFF ;BCR REG NOT INCREMENTED PROPERLY ;60 TEST NEXT LINE #BIT11,(RY) ;CLEAR THE DH11 ;GET THE VECTOR ADDR ;POINT TO XMIT VECTOR ;RESTORE TRAP CATCHER PC,CHPST #STACK,SP BR TS133 ;60 CLEAR PSW ;RESET THE STACK POINTER ;G0 TO NEXT TEST JSR RS, SUNUM ;GO SET UP LINE NO. g ;RETURN ADD JSR JSR ERROR B8R 8%: 000002 MOV MoV ADD MOV ADD 027150 001100 MOV 024636 CLR JSR : 9% SEQ 0126 SEQ 0125 PC,SAPS JSR CLR €00010 024416 010372 004000 027304 000004 110 08:05 PAGE 128 BASIC TRANSMITTEK ''NPRTM LOGIC TEST L INE EM14+44 RTS R4 #BCR,R2 PC,SUERZA PC.9% 14 1% DHVCT,R3 #4 ,R3 R3,(RY) #2,(R3)+ (R3) IN MSG. TO REPORT ERROR (ZDHM-D-0 CIDHMD.P11 30A(1052) 09-MAR-78 15:32 J 10 08:05 PAGE 129 TRANSMITTR NPR LOGIC TEST 2 10-MAR-78 133 TRANSRITTR NPR LOGIC TEST 2 ;;"'t..'ii"t""'"tt"'i'tt"""t""'t't"tttttttttt!t!ttttt 010404 7S133: LREM 000004 SCOPE X TEST ABSTRACT: Q 2R 2 (222222200 5337 5338 5339 5340 5341 THIS TEST IS SIMILAR TO TEST 32 EXCEPT THAT ALL LOCATIONS IN THE 'BCR" AND ‘'CAR'' MEMORIES ARE TESTED TO VERIFY THAT TRANSMISSION ON THE SELECTED LINE DID NOT DISTURB ANY UNSELECTED LOCATIONS IN THE MEMORIES. IF ALSO OPERATES IN "'FLAG'' MODE RATHER THAN USING INTERRUPTS. THE TEST SEQUENCE IS AS 5342 ~N s s a2 5347 5348 5349 5350 5351 5352 5353 5354 5355 5356 ¢« NS W 5346 s FOLLOWS: 5343 5344 5345 SELECT A LINE # TO TEST (AS DEFINED BY ''LINSEL:"") CLEAR BOTH THE '‘CAR'* AND "BCR'' MEMORIES LOAD THE ‘'BCR'' MEMORY WITH ALL ONES (BYTE COUNT = -1) ACTIVATE THE XMITTER ON THE SELECTED LINE ACTIVATE IF "'XMIT REPEAT 1 IF *"XMIT TIMER TO WAIT FOR ‘‘XMIT DONE"’ DONE'* FAILS TO SET ON TIME -~ REPORT ERROR AND THRU 5 UNTIL ALL SELECTED LINES TESTED DONE'' SETS CHECK ALL LOCATIONS IN THE ''BCR’* MEMORY REPORT ANY UNSELECTED LINES NOT CONTAINING -1 8. 5357 5358 5359 5360 5361 9. AND THE SELECTED LINE IF IT DOES NOT CONTAIN O CHECK ALL LOCATIONS IN THE °‘‘CAR'’ MEMORY AND REPORT ANY UNSELECTED %8C¢1{0N51N0T CONTAINING O AND THE SELECTED LINE IF IT DOES NOT NTAIN +1, REPEAT STEPS 1 THRU 8 UNTIL ALL SELECTED LINES TESTED. ERRORS: AR 5362 5363 5364 5365 53486 5367 5368 5369 5370 S371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 SEQ@ §127 SEQ 0126 ';'!'.t""'t""it"""l"i'ttt't'ttttt"tttitttttt'ttt.l"t'tt SeTEST 33 . 5330 133 5332 5333 5334 5335 5536 MACY11 ERE 1. ERROR 50 2. 3. ERROR 51 ERROR 51 SYNC: M7277 CALLED IF XMIT DONE TIMEOUT ERROR DETECTED. CALLED IF ''BCR'* MEMORY ERROR DETECTED CALLED IF ‘'CAR'® MEMORY ERROR DETECTED SH3 INIT A H EF2 L22224 DEBUG: | A AAS 2 1. ASSUMING TEST 32 RAN ERROR FREE THE PROBLEM IS MOST LIKELY THE: M7278 MODULE IFf '‘BCR'' ERRORS M7277 MODULE 1F ''CAR'' ERRORS KEY LOGIC: (SAME AS TEST 32) LAS22 RS 4] 010406 010414 010420 010422 010426 010432 012737 004737 000544 052711 004737 004737 010422 024544 004000 024716 024760 001110 b4 18: 2%: MoV JSR #2%,SLPERR PC,SELINE ;SET UP ERROR LOOP RETURN ;GO SELECT A LINE TO TESTY BIS JSR JSR #BI1T11, (RV) PC,CLCABC PC.LDBCR ;CLEAR THE DHI ;G0 CLEAR '‘CAR’' AND ''BCR'' MEMORIES ;GO LOAD "'BCR'* MZMORY WITH ALL ONES BR TST34 ;.BR if DONE ALL SELECTED LINES (ZDHA-D-0 CZDHAD . P11 MACY11 30A(1052) 09-MAR-78 15:32 5386 5387 g;gg 010436 0106442 010450 153711 012761 013761 030322 033500 027314 5390 5391 5392 5393 5394 5395 010456 010464 010470 010472 010474 010500 012737 005037 005711 100423 004737 000773 000001 030352 5398 010502 004737 027200 5400 010510 012704 100000 2%3? 5399 010506 011103 010514 010520 010522 010526 010532 010534 010536 010540 153704 010102 004737 004537 030322 034254 104050 000725 5410 010542 005037 001220 5412 5413 S414 5415 070552 010556 010562 010570 012704 016103 123737 001001 177777 000010 030322 010546 113711 005037 001202 5422 010612 013737 001220 010620 010622 010626 010632 010102 062702 004737 104051 030322 010634 010636 010642 010650 010652 005004 016103 123737 001001 005204 gzgg 10656 001416 5436 010660 005037 001202 5438 010672 013737 001220 5437 5439 5440 5441 010654 010664 010700 010702 010706 000006 030322 010102 062702 004737 000006 024500 MoV CLR TST gnl JSR BR #1,TIREA TIMEB (R1) 43 PC,TIMELT 3s JINIT TIMER A ;INIT TIMER B ;XMITTR DONE YET ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC JSR PC.,SAPS :SAVE THE ERROR PSW MoV #BITI1S5,R4 ;SET UP S/B DATA 001220 001202 001204 :MAKE REGADR = DEVADR ;GO SET UP ERROR INFO ;SET LINE NO. IN MSG STAP? ;INIT A LINE COUNTER MoV MoV chPB BNE #-1,R4 BCR(R1),R3 LINE,STHP7 63 ;SET UP S/B DATA ;GET THE WAS BYTE COUNT ;WAS THIS THE ACTIVE LINE ?? :BR IF NOT CLR $STMPO MOV $STAP7,$THPY MoV ADD JSR ERROR 7%: :GET THE WAS DATA CLR MOVB 001204 LINE R4 R1,R2 PC,SUER2A RS, SUNUM :AROUND THIS BRANCH IF TIME OUT OCCURS :TIMED OUT AWAITING XMIT DONE ON SEL LINE ;GO TRY THE NEXT LINE CLR cmp BEQ 001202 (R1),R3 ;ACTIVATE XMIT ON SELECTED LINE 50 13 6$: 8s: 030322 :SELECT THE LINE ;SET UP PARAMETERS MOovB 001220 020304 113737 MoV LINE, (RT) #33500,LPR(R1) LINMSK,BAR(R1) 3 ¥ 000910 024500 5428 5429 €430 5431 5432 5433 48 005004 020304 001416 113737 BISB MoV BISB MoV JSR JSR LINE EMS0+53 ERROR BR 001220 010600 K 10 08:05 PAGE 130 TRANSMITTR NPR LOGIC TEST 2 Mov 024636 5420 5423 56424 5425 ;259 3%: 024416 010572 010574 010576 010604 030350 030322 5416 5417 gz;g 5421 000004 000012 027016 5401 5602 5403 5404 5405 5406 5407 gzgg 5411 10-MAR-78 133 STHP7, (R1) R4 R3,R4 78 LINE,STHPO ;SELECT LINE NO. IN '‘SCR'' :CHANGE S/B DATA 10 000000 :WAS BYTE COUNT CORRECT ?? :BR IF YES :SAVE THE ACTIVE LINE NO. ;SAVE THE LINE NO. BEING CHECKED R1,R2 #BCR,R2 PC,SUER4 51 :SET UP REGADR = BCR REG ADDR CLR mov CMPB BNE INC R4 CAR(R1) ,R3 LINE,STMP7 8s A JSET UP S/B DATA :GET THE WAS DATA ;IS THIS THE ACTIVE LINE :BR IF NOT :BUMP THE CAR ADDRESS FOR ACTIVE LINE BEQ 9s :BR IF YES o, [ R3,R4 ;60 SET UP ERROR INFO :BYTE COUNT INCORRECT :CAR CONTENTS CORRECT ?? CiR $TMPO JSET UP ACT LINE NO. Mov S$TAP7.,8TMP1 :SAVE THE LINE NO. BEING CHECKED mMovs MoV ADD JSR LINE,STMPO R1,R2 #CAR,R2 PC,SUER4 :SET UP REGADR ;SET UP THE ERROR INFO SEQ 0128 SEQ 0127 CZDHM-D-0 (ZDHMD.P1N 5442 5443 5444 5445 5446 5447 MACY11 30A(1052) 09-MAR-78 15:32 010712 104051 010714 010720 010726 010730 005237 022737 001707 000631 10-MAR-78 133 L 10 08:05 PAGE 131 TRANSMITTR NPR LOGIC TEST 2 ERROR 001220 000020 007220 : 9% INC CMP BEQ BR 51 ;CAR REG INCORRECT STHP?7 ;GENERATE NEW LINE NO. ;TESTED ALL LINES ;BR IF NOT ;GO SELECT NEXT ACTIVE LINE #20,8THP7 5% 1% SEQ 0129 SEQ 0128 CZOKM-D-0 CZDHMD .P11 5448 5449 5450 5451 5652 56453 56454 5455 5656 5657 5458 5459 5460 5661 5462 5663 5464 5465 5466 5467 54668 5469 5470 5471 5472 5473 5674 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497 5498 5499 5500 5501 5502 5503 MACY1?' 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 134 P PAGE 132 R P 000004 SEQ@ 0130 SEQ 0129 TEST THAT CHARACTER AVAILABLE CAN CAUSE RCVR INTERRUPT LA e R s*TEST 34 010732 n10 s TST34: .REM L TEST LR T I L R A THAT CHARACTER AVAILABLE CAN CAUSE RCVR e e e R e ey INTERRUPT T T T SCOPE X TEST ABSTRACT: |2423342220204 Q] THIS TEST VERIFIES THAT WHEN "'CHAR AVAIL' (BITO7 IN ''SCR'’) SETS AS A RESULT OF XMITTING AND RECEIVING ONE CHARACTER (USING SILO MAINT MODE) IT CAUSES A RCVR INTR VIA THE PROPER VECTOR. THE TEST SEQUENCE IS AS FOLLOWS: 1. SET UP THE RCVR VECTOR 2. LOCK OUT 4. 5. CLEAR PSW TO ALLOW INTERRUPTS ACTIVATE TIMER TO WAIT FOR INTR TO OCCUR IF NO RCVR INTR OCCURS REPORT ERROR AND GO TO STEP 9 3. 6. 7. 8. 9. INTRS, RESET SP, AND CLEAR DH11 USE MAINT MODE TO LOAD A CHAR INTO THE SILO (DATA=125252) WHEN RCVR INTRS - CHECK SILO DATA FOR 125252 - IF NOT CORRECT REPORT ERROR AND GO YO STEP 9 CHECK THAT SILO FILL LEVEL=1 -~ IF NOT REPORT ERROR RESET SP, CLEAR PSW, RESET VECTOR, AND GO TO TEST 35 : ERRORS 8828221 1. 2. 3. ERROR 13 ERROR 52 ERROR 6 SYNC: M7277 IS CALLED TO REPORT RCVR TIMEOUT ERROR IS CALLED TO REPORT SILO DATA INCORRECT IS CALLED TO REPORT INCORRECT SILO FILL COUNT SH3 INIT A H EF2 Y ANk DEBUG: ARRPRS 1. 2. IF NOT RCVR INTR QCCURS SUSPECT THE M7277, M7281, CR M7279 MODULES I1F SILO DATA OR FILL~ERRORS SUSPECT THE M7279 MODULE KEY LOGIC: AN AERERY M7279 SH1 SILO DATA MUX'S (74157'S) SSR15 H CR1 SH2 DATA READY L NRC 15 H DV oL SILO MEMORY LOAD SILO L 5.068 MHZ (CLOCK) SSR <13:00> H (E13,E17,E8,E3) 0J2 DN1 (€20,E24) DP1 M7289 SHé6 RCV INT REQ H M7278 SH8 SSR <03:00> H 3341°'S C2ZDHA-D-0 CZDHMD . P11 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 5526 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 $551 5552 5553 5554 5555 5556 5557 5958 5559 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 134 08:05 TEST THAT CHARACTER AVAILABLE CAN CAUSE RCVR SH? 010734 010742 010746 010752 010756 010762 010766 010772 011000 011004 011010 011014 011016 012737 013703 012723 113713 004737 012706 012711 052761 012711 004737 012703 005303 001376 011020 011024 011026 011032 011036 011040 004737 011103 012704 004737 011042 011046 011052 011056 011060 016105 016103 012704 020304 001410 000016 000002 125252 011062 011066 011072 011076 011100 004737 062702 004737 027200 000002 024416 011102 011106 011110 011114 011116 010503 042703 012704 020304 001407 011120 011124 011130 011134 004737 062702 004737 027200 000016 024416 011136 011142 011146 011150 011154 011156 011162 012706 004737 005011 013703 010313 062723 005013 001100 027150 104013 010756 027304 031042 030316 027164 001100 004000 100000 000100 027150 001000 001110 1%: 000016 2%: 027200 DEC BNE 3%: 027304 000002 DHVCT ,R3 #38,(R3)+ DHRLVL, (R3) PC,CHPS? #STACK,S? #BIT11,(RY) #BIT15,SSR(RT) #81106, (RY) PC,CHPSI #1000,R3 R3 2% PC,SAPS ;SET UP THE ERROR LOOP RETURN :GE:+ FIRST VECTOR ADDR ;GO TO 3% ON RCVR INTERRUPT ;GO LOCK OUT INTRS ;RESET SP FOR ERROR LOOPS ;CLEAR THE DH1 ;SET SILO MAINT, BIT TO LOAD SILO ;ENABLE CHAR. AVAIL INTERRUPT ;GO CLEAR PSW JINIT TIRMER ;DEC TIMER :BR IF NO TIMEOUT :SAVE THE ERROR PSW sSAVE THE SILO STATUS REG. ;GET THE WAS DATA ;SET UP S/B DATA PC,SAPS #NRC,R2 PC,SUER2A :SAVE THE ERROR PSW UP REGADR :SET ;GO SET UP ERROR INFO :DATA COMPARE ERROR ;GET QuY R5,R3 #140377,R3 #400,R4 R3,R4 5% sNOW GET JSR ERROR PC,SAPS #SSR,R2 :C,SUERZA ;SAVE THE ERROR PSW ;SET UP REGADR ;SET UP ERROR INFO ;SSR COUNT NOT CORRECT MOV #STACK,SP ;RESET THE STACK POINTER JSR JSR ERROR BR nov BIC L cmp BEQ JSR ADD 5%: #1% ,SLPERR SSR(R1) ,RS NRC(R1) ,R3 #125252,R4 R3,R4 mov mov Mov ADD : 49 SSR <07:00> H ;GET THE WAS DATA JSET UP S/B DATA ;GO SET UP ERROR INFO CHP BEQ 140377 000400 INTERRUPT (R1),R3 #300,R4 PC,SUERZA 13 5% JSR ERROR B8R 000416 104006 MoV JSR 000436 104052 mov MoV Mov move JSR MOV MOV 8IS MoV JSR MOV MoV 000300 024416 N 10 PAGE 133 JSR CLR mov Mov ADD (LR 4% 52 5% PC,CHPST (R1) DHNVCT,R3 R3,(RY) #2,(R3)+ (R3) ;CHAR AVAIL FAILED 7O SET ON TIME ;ESCAPE FROM THIS TEST - CATASTROPHIC ERROR ;WAS = S/B = 125252 7? :BR IF IT IS THW SILO STATUS REG AGAIN ;CLR OUT JUNK JSET UP S/B DATA ;SSR CHAR COUNT = 1 ;BR IF IT IS 27 ;GO CLEAR PSW ;RESET 1.E. BIT ;GET FIRST VECTOR ADDR ;RESTORE TRAP (AT(HER Sea 013 SEa 0130 (ZDHM-D-0 CIDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 B 1N 08:05 PAGE 134 TEST THAT THE SILO STATUS REG COURTS UP CORRECTLY 10-MAR-78 135 59560 R A 5561 ;TEST 35 5562 5563 5564 5565 R R 011164 000004 R R 5966 R R e Yy TEST THAY THE SILO STATUS REG COUNTS UP CORRECTLY TN R T N R P R A A AR R AR RN R RN R RN ORI RO RN RO RO OARNERNCS THIS TEST VERIFIES THAT THE SILO FILL LEVEL COUNTS UP CORRECTLY WHEN ALL COUNTS (0-77) ARE TESTED BY LOADING THE SILO USING MAINT MODE. 1. 2. 3. 4, 5. 5581 THE TESY SEQUENCE IS AS FOLLOWS: INIT "'STMP7'' TO START WITH A COUNT=01 CLEAR THE DH!1 LOAD THE SILO WITH 125252'S IN MAINT MODE UNTIL # OF WORDS INDICATED BY THE COUNT ARE LOADED AFTER LOADING REQUIRED COUNT CHECK THAT FILL LEVEL BITS (SSR<13:08>) EQUAL COUNT - [F NOT REPORT ERROR INCREMENT COUNT IN ''STMP7'' AND REPEAT 1 THRU & UNTIL ALL COUNTS (01-77) HAVE BEEN TESED ERRORS: 5582 TRRRAER 5583 gggg 1. 5586 SYNC: 5588 5589 DEBUG: 5591 ggg% 1. 5594 KEY LOGIC: 5587 ERROR 6 kRRKE 5590 m7277 IS CALLED TO REPORT SILO FILL LEVEL ERRORS SH3 INIT A H EF2 22228 5595 FAILURES IN THIS TEST MOST LIKELY INDICATE A BAD M7279 MODULE 222222222, 5607 5608 011166 011170 011174 011202 011206 011212 010102 062702 012737 012711 013705 005004 5611 5612 011224 011226 005303 001376 5613 5614 5615 R 2222222322222 5572 5573 5574 5575 5576 5577 5578 gg;g 5609 5610 R TST35: SCOPE .REM 4 TEST ABSTRA(T: 5567 5568 5569 g;;g 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606 e R A EQ 0132 SEQ 0131 011214 011220 011230 011234 011236 X 000016 000001 004000 001220 052712 012703 100000 001000 042712 005204 005305 100000 001220 18: 2%: 3s: M7279 SH2 MoV ADD MOV Mov MOV (LR R1,R2 #SSR,R2 #1,$THP7 #BIT11,(R1) $TMP7 RS R4 DEC BNE BIC INC DEC R3 3s BIS MoV SSR <13:08> LOAD SILO L DJZ 5.068 MHZ (CLGCK) DN1 DATA READY L DV1 #81T715,(R2) #1000,R3 #B81715,(R2) R& RS sMAKE REGADR = SSR ;START WITH COUNT OF 1 ;CLEAR THE DHI ;SAVE CHARACTER COUNT BEING TESTED JINIT A CHAR COUNTER ;SET THE SILO MAINT BIT ;INIT A TIMER ;STALL TO ALLOW TIME TO LOAD SILO ;CLEAR SILO MAINT. BIT ;COUNT A CHAR LOADED ;DECREMENT TEST COUNT CZDOHM-D-0 D . P11 CZOHM 5616 5617 5618 5619 5620 5621 5622 5623 5624 5625 5626 5627 5628 5629 5630 5631 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 135 011240 001365 011242 011244 011250 011252 011254 011203 042703 000304 020304 001406 011256 011262 011270 004737 012737 104006 024412 011262 001110 011272 005237 022737 001336 001220 000100 001220 011276 011304 08:05 TEST BNE Mov BIC 140377 SWAB CMP BEQ JSR 48 PAGE 135 THAT THE cn SILO SEQ 0133 SEQ 0132 STATUS REG COUNTS UP CORRECTLY 2$ ;BR UNTIL WE'VE LOADED THE (R2) ,R3 ;SET THE WAS COUNT R4 R3.R4 4% JSET UP S/B DATA ;TEST COUNT = SILO COUNTER ? ;BR IF YES #140377 ,R3 TEST COUNT ;CLR JUNK BITS PC,SUERZ Mov #18 ,SLPERR ERROR 6 ;GO SET UP ERROR INFO sSET UP ERROR LOCP RETURN INC CMP BNE ; INCREMENT TO NEXT COUNT TO TEST sMAXIMUM COUNT ?? ;BR IF NOT STMP7 #100,8TMP7 1% ;SSR FAILED TO UP-COUNT CORRECTLY MACYT1 30A(1052) 09-MAR-78 15:32 (Z0HM-D-0 CZDHMD.P11 SARAA AR AL AR J+TEST 36 AR RS AR AR ARl Rl Rttt dlltdd) TEST THAT SILO STATUS REGISTER DOWN COUNTS CORRECTLY ::ttttttti't't'f!t'ttt't't"tt"'ttt'tt"'t"li'ttttii't't'it"'i 011306 000004 7ST36: SCOPE REM TEST ABSTRACT: IR A28 2000282 0 o e o « WSS — THIS TEST VERIFIES THAT THE SILO FILL LEVEL COUNTS DOWN PROPERLY WHEN WORDS ARE READ FROM THE SILO. ALL COUNTS FROM 77-00 ARE TESTED. THE TEST SEQUENCE IS AS FOLLOWS: INIT ""STMP7'' TO START WITH A COUNT OfF 1 CLEAR THE DH11 AND FILL SILO WITH 64. WORDS READ THE NO. OF WORDS SPECIFIED BY COUNT CHECK THAT FILL LEVEL=64. MINUS COUNT - REPORT ERRORS INCREMENT ''STMP7'' AND REPEAT 2 THRU 4 UNTIL ALL COUNTS TESTED. ERRORS: ARS8 2R 1. ERROR 6 SYNC: M7277 IS CALLED TO REPORT SH3 INIT A H SILO FILL LEVEL ERRORS EF2 L2222 DEBUG: (REFER TO TEST 35) LA A A4S KEY LOGIC: (REFER TO TEST 35) ek —b b md Y Y IV A LA A RV AV VIV TV RV LV AV OO WNAWVME (NN — =2 — OO0, OO OSIrOMNO Ghur GhurGur ghurd 010102 062702 012737 012711 012705 163705 W N N [V =000 ~ ~N (=T Y =] ~ O ek b b e md b G b b — i D wd ol ol ol — bl d prorQur Qour-Quur Querhur Suer G b OCOO0O0O0OOOOOCOOO LR 28823241 —t 5671 5672 5673 5674 5675 5676 5677 5678 5679 5680 5681 5682 5683 5684 5685 5686 5687 A QOO0 OO0 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 5649 5650 5651 5652 5653 5654 5655 5656 5657 5658 5659 5660 5661 5662 5663 5664 5665 5666 5667 5668 5669 5670 DERR 08:05 PAGE 136 TEST THAT SILO STATUS REGISTER DOWN COUNTS CORRECTLY 10-MAR-78 136 013703 012704 005761 005304 001376 005303 001370 012703 012704 052712 005304 001376 042712 005303 001366 b4 000016 000001 004000 000100 001220 000100 001000 100000 2%: MOV MoV MoV SUB Mmov Mov 3$: gEE 1$: 1000C0 001220 001000 000002 MoV ADD BIS N BIC DEC BNE 4 5%: Mov MoV TST DEC BNE DEC BNE R1,R2 #SSR,R2 ;SET UP REGADR 21,3TAP7 #BIT11,(RY) #100,R5 $TMP7 RS #100,R3 #1000,R4 sSTART WITH COUNT =1 ;CLR THE DHNM ;TEST COUNT SHOULD BE 64(10) MINUS s THE NO. OF CHARS READ g: ;STALL TO ALLOW SILO TO LOAD ;COUNTER USED TO FILL SILO ;INIT TIRER #B81715,(R2) sSET SILO MAINT. BIT #BIT15,(R2) R3 2$ ;CLEAR THE SILO MAINT BIT ;COUNT ONE CHAR LOADED ;BR UNTIL ALL LCADED $TMP7 ,R3 ; INIT COUNTER FOR READING SILO #1000,R4 NRC(R1) R4 5% R3 48 ;INIT TIMER READ THE SILO ;GIVE IT TIME TO SETTLE ;COUNT ONE READ ;BR UNTIL WE'VE READ TEST COUNT SEQ 0154 SEQ 0133 (ZDHM-D-~0 CZOHMY PN 5688 5689 5690 5691 5692 5693 5694 5695 5696 5697 5698 5699 5700 5701 5702 5703 5704 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-/8 136 011426 011430 011203 042703 010504 000304 020304 001406 011432 011436 011444 004737 012737 104006 024412 011324 001110 011446 011452 011460 005237 0¢2737 001321 001220 000101 001220 011414 011416 011422 011424 08:05 TEST PAGE 137 mov 160377 (r2) ,R3 ;GET THE WAS DATA RS,R& R4 ;SCT UP S/B DATA #140377 ,R2 CMP R3,R4 ;DID IT DOWN COUNT OK ?? JSR PC,SUER?2 ;6O SET UP ERROR INFO ERROR 6 ;SILO STATUS REG. INC $STMP7 BEQ MOV cMP BNE SEQ 0135 SEQ 0134 SILO STATUS REGISTER DOWN COUNTS CORRECTLY BIC MoV SWAB 6%: THAT EN 6% #13,SLPERR #101,8TMP7 1% .CLR JUNK BITS ;BR IF YES ;SET UP ERROR LOOP RETURN ;UPDATE COUNT DOWN-COUNTED ;TESTED ALL COUNTS ?? ;BR IF NOT INCORRECTLY (ZOHWM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 (8:05 137 A 5706 ;*TEST 37 5708 5709 §710 5711 5712 §71% 5714 $715 5716 5717 5718 5719 I 011462 000004 AR R NN Rt N R RN R COUNTS 0,1,2.4.8.16, AND 32 R R R R R R PR R LR R RN TEST SILO ALARM LEVEL FOR A R A AN R N NN NN RO RRS COUNTS 0,1,2,4.8,16, AND 32 AR AN AR AR AR R IR AR AR RN AR TST37: SCOPE .REM X TEST ABSTRACT: EARRRARARNRRNE THIS TEST VERIFIES THAT THE SILO ALARM LEVEL WORKS PROPERLY FOR INTEGRAL POWER OF 2 COUNTS (0, 1, 2, 4, B, 16, AND 32). THE TEST SEQUENCE IS AS FOLLOWS: 1. 2. §720 3. 5721 5722 5723 5724 5725 g;gg 4. S. €. 5728 5729 5730 5731 5732 INIT "'STMP7'' TO START WITH ALARM LEVEL OF 000 CLEAR THE DH11 AND LOAD THEN SILO WITH THAT NO. OF WORDS THAT IS ONE GREATER THAN THE ALARM LEVEL. VERIFY THAT ''DATA READY'' DOES NOT SET UNTIL THE FILL LEVEL EXCEEDS THE ALARM LEVEL. REPORT ERRORS I[Ff: A. °'READY'' SETS TOO SOON B. °''READY'' SETS TOO LATE SHIFT "'STMP7'' LEFT TO GENERATE NEXT POWER OF 2 LEVEL REPEAT 2 THRU 5 UNTIL ALL 7 TEST LEVELS CHECKED NOTE: FOR (A) ABOVE IF '‘READY’" SETS JUST ONE WORD 10O SOON, IT IS ALLOWED, BUT ANYTHING GREATER RESULTS IN AN ERROR MESSAGE. ERRORS: §733 'S12222 5734 5735 5736 5737 5738 SYNC: 5740 5741 DEBUG: 1. 5739 ERROR 6 IS CALLED TO REPORY BOTH TYPES OF ERRORS OUTLINED IN 4(A,B) ABOVE 1232 5742 M7277 SH3 INIT A H EF2 tARERR 5743 5744 1. 5745 5746 5747 ERRORS IN THIS TEST ONLY ON THE M7279 - SH? INDICATE BAD COMPARATOR CHIP (EZ23 OR E19) KEY LOGIC: 5748 5749 5750 5751 5752 5753 5754 5755 5756 5757 5758 5759 5760 1N TEST SILO ALARM LEVEL FOR 5708 5707 F PAGE 138 222222222 M7279 SH2 E19 - PIN 5 ALSO SAME LOGIC AS TEST 35 011464 011472 011474 011500 011504 011510 011514 012737 010102 062702 005037 012711 013705 010512 011504 000016 001220 004000 001220 001110 4 18: MOV MOV ADD CLR mov Mov Mov #1% ,SLPERR R1,R2 #SSR,R2 $THP? #BIT11,(R1) $TMP7 RS RS, (R2) (COMPARATOR) :SET UP THE ERROR LOOP RETURN ;SET UP REGADR ;START WITH LEVEL 00 ;CLEAR THE DHI1 ;SAVE IT IN RS JSET ALARM LEVEL IN SSR SEQ 0136 SEQ 0135 CZDHM-D-0 CZDHMD.P11 5761 5762 5763 5764 5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 £783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 011516 011520 011524 011530 AACY11 30A(1052) 09-MAR-78 15:32 005205 052712 012703 005303 00137¢ 042712 005305 011532 011534 011540 011542 011544 011546 011550 105711 100412 005705 001363 011552 011556 011562 011566 011570 034737 004737 004737 104006 000426 011572 011574 005705 011576 011602 011606 011610 011614 011620 011622 004737 022705 001417 004737 004737 104006 00041 011624 011626 011632 011634 011636 011640 011644 011203 013704 005204 000304 105004 153704 000207 011646 011652 011654 011656 011660 011662 005737 001002 000261 000401 000241 006137 032737 001703 011666 011674 10-MAR-78 137 2%: 100000 001000 3s: 100000 08:05 TEST PAGE 139 4%: 027200 000001 5%: 001220 001220 001220 000100 6% 7%: 001220 AND 32 JSR PC,SAPS .SAVE ERROR BR 6 6% ;SILO ALARM LEVEL FAILED AT ;GO CKHECK NEXT COUNT (R1) 4% RS 2% PC.5% PC,SUERZA ;CHAR AVAIL SET YEI ;BR IF IT IS ;SHOULD [T BE ?? ;BR IF NOT THE ERROR PSW ;GO SET UP S/B DATA ;GO SET UP ERROR INFO SELECTED COUNT TST BEQ RS 6% ;SHOULD IT HAVE BEEN SET ;BR IF YES JSR PC,SAPS ;SAVE Mov MoV INC SWAB CLRB (R2) ,R3 $TMP7 R4 R4 R4 R4 ;GET WAS DATA ;SET UP THE S/8 DATA RTS PC ;RETURN TO SET UP AND KEPORT ERROR TST BNE SEC BR CLe ROL BIT $TMP7 4] ;COUNT AT Z2ERO ;B8R IF NOT ;SET THE 'C'' BIT ;GO SET UP COUNT ;CLEAR THE ''C"’" BIT ;SHIFT POWER OF TWO BIT :DONE ALL POWERS ?? BIS8 001220 COUNTS 0,1,2,4.8,16, ;LOAD ONE MORE THAN FILL LEVEL JSET SILO MAINT. TO LOAD A (HAR ;INIT STALL TIMER sWAIT FOR SILO TO SETVTLE ;BR TIL R3 GOES TO 000000 sCLR THE SILO MAINT BIT ; COUNT ONE LOADED CMP BEG JSR JSR ERROR BR 011624 024416 FOR RS #BIT15, (R #1000,R3 R3 3$ #BIT15,(R2) RS JSR JSR 001424 SILO ALARM LEVEL INC 8is MOV DEC BNE BIC DEC 1ST8 BMI TS7 BNE 027200 011624 024416 6 11 BEQ #1,RS 6% PC.5% PC,SUERZA 6 6% TMP7,R4 8% $TMP? #BIT6,8TMP7 1% (CHAR AVAIL) THE ERROR PSW ;1S 1T OFF BY ONLY ONE ?? :BR IF YES ~ WE'LL ALLOW HIM THIS ;GO SET UP S/B DATA ;6O SET UP ERROR INFO sSILO ALARM LEVEL FAILED ;60 CHECK NEXT COUNT :BR IF NOT SEQ 0137 SEQ 0136 (Z0HN-D-0 CIDHMD.P11 MACY11 30A(1052) C9-MAR-78 15:32 H 11 15-MAR-78 140 08:05 PAGE 140 TRANSMITTER TIRING TEST - ALL SELECTED LINES - ALL S810 AN 5811 c¢TEST 40 5812 5813 5814 5815 5816 5817 5818 819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 N 011676 000004 1. 2. 3. 4. 5. 6. gggg 7. 5844 SYNC: 5846 5847 DEBUG: 5849 5850 5851 5852 5853 gg;g 5856 S857 O LS TRANSMITYER TIMING TEST - ALL SELECTED LINES =~ ALL AN R R A AR R R RN R E AN AR R E RN RN AN A R RO R ER A NANY SPEEDS SELECT A LINE # TO TEST (AS DEFINED BY ''LINSEL:'") INIT ""STMP7'" TO SYART WITH SO BAUD AND A RELATIVE TIMER "'TIMEC'" TO =1 (177777) CLEAR THE DH11 AND ACTIVATE SELECTED LINE TO TRANSMIT THREE CHARS. ACTIVATE TIMER TO UPDATE ''TIMEB’' THE LINE SPEED TIMER IF *'XMIT DONE'' FAILS TO SET ON TIME - REPORT ERROR AND REPEAT 3 THRU 4 UNTIL ALL SPEEDS CHECKED - THEN REPEAT 1 THRU 5 UNTIL ALL LINES CHECKED 1F *'XMIT DONE'' SETS VERIFY TIMEB LESS THAN TIMEC IF NOT REPORT ERROR - MAKE TIMEC = TIMEB AND REPEAT 3 THRU S5 UNTIL ALL SPEEDS CHECKED REPEAT 1 THRU 6 FOR ALL SELECTED LINES. ERROR 53 ERROR 17 rRRER mM7277 IS CALLED TO REPORT XMIT TIMEOUT ERRORS 1S CALLED TO REPORT TIMING ERRORS SH3 INIT A H €fe I2222X3 1. 2. 3. IF ALL LINES FAIL ON ALL SPEEDS SUSPECT THE CLOCK MODULE M4540 IF ALL LINES FAIL ON JUST ONE SPEED (THE SAME ONE) SUPECT EITHER THE CLOCK MODULE OR THE M7288 MODULE (TIMING SELECT MUXES) IF JUST ONE LINE FAILS SUSPECT EITHER THE UART MODULE (M7280) EITHER FOR LINES <15:08> OR <07:00> OR THE M7288 MODULE KEY LOGIC: 2R3 22021 5858 5859 5860 5861 5862 gggz 5865 NN 228282 1. 2. S848 R R E RN PR RO AN NN ERRORS: ggz% S845 R R THIS TEST PERFORMA A '"RELATIVE'' TIMING TEST FOR ALL BAUD RATES ON ALL SELECTED | INES. IT DOES NOT MEASURE ABSOLUTL TIMES BUT SIMPLY VERIFIES THAT EACH SUCCESSIVE SPEED FROM 50 TO 9600 BAUD IS FASTER THAN THE PREVIOUS SPEED. THE TEST SEQUENCE IS A3 FOLLOWS: 5833 5834 5835 5840 5841 T AN Rt R OO X I L N 5832 5839 RN TST40: SCOPE .REM X TEST ABSTRACT: 5830 5831 5838 NN RN N SEQ 0338 SEQ 0137 SPEEDS M4540 m7288 mM7280 g SH? <9600:50> BAUD SIGNALS SH3 BOT AND TOP BUF CLOCK SIGNALS SH4&,6,8,0R 10 TX CLOCK NN L SIGNALS TBMT LINE ''N'' SIGNALS ON UART PIN 2¢ TX CLOCK LINE ''N'' SIGNALS ON UART PIN 40 (ZDHM~D-0 CZDHMD P11 012737 004737 000534 012737 012737 012711 011730 024544 001110 002100 177777 0046000 030322 177775 090006 001220 027314 001220 030354 153711 012761 005061 013761 013761 001220 001202 001202 177760 001202 012704 153704 004737 004537 030322 034254 100000 b S2NOSONVOONO N b cud h h NN b b wd b — AWV S b — W (=] b i d b BIC Mov Mov 8Is8 JSR JSR LINE 000426 013737 od MOV 5%: 7%: 031617 030352 030354 8%: STHP7,$THPO $TMPO $TMPO $THPO #177760,8THPO (R1) ,R3 #B1707 ,R3 R1,R2 #BIT15,R4 LINE,R4 sSELECY A XMIT SPEED sACTIVATE THE TRANSMITTER JINIT TIMER A ;INIT TIMER B ;XMITTR DONE SET YET ? ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS sSAVE AND SET UP THE SPEED (CODE ;GET THE WAS DATA ;CLEAR UNINTERESTING BITS sMAKE REGADR = DEVADR ;SET UP S/B DATA ;VIMED OUT WAITING FOR XMIT DONE ;GO TEST NEXT SPEED Mov MOV TIMEB,R3 TIMEC,R4 R3,R4 ;GET THE WAS COUNT sGET LASTR CHECK COUNT ; COMPARE RELATIVE TIMES sBR IF THIS SPEED FASTER THAN LAST ;SPEED TESTED PC,SAPS ;SAVE THE ERROR PSW ;GET SPEED CODE AND RIGHT JUSTIFY JSR 8% $TMP7,R2 R2 R2 R2 #177760,R2 PC,SUERZA R5,SUNUM :STRIP AWAY ALL JUNK ;G0 SET UP ERROR INFO ERROR 17 ;TRANSMITTER SPEED Mov TIMEB, TIMEC ;SET UP NEW CHECK TIMER COUNT EB17+41 104017 5% PC,TIMEIT 4% ;INIT RELATIVE TIME CHECKER ;CLEAR THE DH! ;SELECT IT IN THE SCR ;SET BYTE COUNT TO XFER 3 CHARS ;GET TEST DATA STARTING AT LOC. 0 53 8$ JSR JSR LINE 024636 #1,TIMEA TIMEB (R1) sSET UP ERROR LOOP RETURN ;GO SELECY A LINE TO TEST ;.BR IF TESTED ALL SELECTED LINES INIT T1 START WITH LOWEST SPEED ERROR 8R Mmov SWAB ASR ASR BIC 177760 024416 CAR(RY) $TMP7,LPR(R1) L INMSK,BAR(R1) SPEEDS ;GO SET UP ERROR INFO ;GO SET LINE NO. IN MSG CMP BLO 103420 #2$ SLPERR PC,SELINE TST41 #2100,8THP7 #-1,TIREC #BIT11,(R1) LINE, (R1) #-3 ,BCR(R1) SELECTED LINES - ALL PC.,SUER2A R5,SUNUM EM50+53 027200 001220 h e TST B8Ml JSR BR SWAB ASR ASR BIC 104053 004737 013702 000302 006202 006202 042702 004737 004537 030322 b CLR MoV 030322 024416 024636 030352 030354 i 4%: 000200 013703 013704 020304 b MoV 013737 000337 006237 006237 042737 011103 042703 012102 012106 012112 012114 b JSR B8R 030350 2s: 3%: 027016 001202 001202 Mov 000004 000012 000010 000001 030352 010102 18. N 08:05 PAGE 141 TRANSMITTER TIMING TEST - ALL MOV MoV Mov BIS8 mov CLR Mmov Mov 012737 005037 005711 100437 004737 000773 NN NN 012012 012020 012024 012030 012034 012042 012044 012050 012052 012056 012062 012066 012072 012074 012076 012100 N 5913 5914 5915 5916 5917 5918 5919 $920 5921 011774 012000 012002 012004 012010 OOO0OO0O0OO0O0OOOO 5910 5911 5912 011766 ey 5907 5908 5909 30A(1052) 09-MAR-78 15:32 011700 011706 011712 011714 011722 011730 011734 011740 011746 011752 011760 o 5864 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 10-MAR-78 140 MACY11 ;GO PUT LINE NO. IN MSG INCORRECT SEQ 0139 SEG 0138 CZDHM-D~-0 CZDKMD.P11 5922 5923 5924 5925 5926 012164 012172 012200 012202 MACY11 30A(1052) 09-MAR-78 15:32 062737 022737 001253 000641 002100 035600 10-MAR-78 140 001220 001220 08:05 PAGE 142 TRANSHITTER ADD (mp BNE 8R J TIMING 1N TEST #2100,83TMpP7 #35600,8TMP7 2% 1% - ALL SELECTED LINES ;GENERATE NEXT SPEED ;DONE ALL SPEEDS ? ;BR IF NOT ;GO TEST NEXT LINE - ALL SPEEDS SE@ 0140 SEQ 0139 (IDHM-D-0 CZOHMD.P11 5927 5928 5929 5930 5931 MACY11 30A(1052) 09-MAR-78 15:32 10~-MAR-78 741 MR 5980 5981 5982 RECEIVER AA A AR K 1 143 TIMING TEST AR RR ~ ALL ARt AR SELECTED LINES - ALL AR AR RECEIVER TIMING TEST - ALL AR SEQ 0141 SEQ 0140 SPEEDS Rl RRdld) SELECTED LINES - ALL SPEEDS JIARARARACRRRENECCCARROCTREOIRARRARERRROEARENRARNRRAARONORNORANRORNANEY 012204 7ST41: 000004 SCOPE 1 .REM TEST ABSTRACT: 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5976 5977 5978 5979 PAGE J*TEST 41 5932 5957 5958 5959 5960 5961 5962 5943 5964 5965 5966 5967 5968 5969 3970 5971 5972 5973 5974 5975 08:05 13222222022 28R Q] THIS TEST IS IDENTICAL TO CHECK RECEIVER TIMING. THE ARE USED FOR ERROR CHECKING. TO TEST 40 EXCEPT SEQUENCE IT WAITS FOR "'DATA READY' IS SIMILAR AND THE SAME TIMERS ERRORS: tRARARN 1. 2. ERROR 54 ERROR 20 SYNC: M7277 IS CALLED TO REPORT RCVR TIMEOUT ERRORS IS CALLED TO REPORT RCVR TIMING ERRORS SH3 INIT A H EF2 (8 2 824 (SAME AS TEST 42) DEBUG: LR R RS KEY LOGIC: (SAME AS TEST 42 PLUS) L AS2 R3804 M7288 SH5.7.9.11 RX CLOCK NN L SIGNALS BUF DA LINE *'N’' UART PIN 19 RX CLOCK LINE "'N"' UART PIN 17 MOV #2%,SLPERR PC,SELINE M7280 012737 004737 000534 012737 012737 012711 012711 153711 012761 005061 013761 013761 012737 005037 105711 100435 004737 000773 013737 006337 006337 012236 024544 001110 002100 177777 004000 001000 030322 177777 000006 001220 027314 001220 030354 000001 030352 JSR 8R Mov 15742 #2100,$THP7 #-1,TIREC #BIT11,(RY) #8179, (R1) MOV #-1,BCR(RY) 000004 000012 MoV MOV $TMP7 ,LPR(R1) 030350 MoV CLR 1ST8 BMI JSR #1,TIMEA TIMEB (R1) 000019 2$: 3s: MOV MOV MoV IS8 CLR 4%: 027016 001220 001202 001202 1%: BR 001202 Mov ASL ASL LINE, (R1) CAR(RY) LINMSK ,BAR(R1) 5% PC,TIMEIT 4% $TMP7,$THPO $TMPO $TMPO ;SET UP ERROR LOOP RETURN ;GO SELECT A LINE TO TEST ;:BR IF TESTED ALL SELECTED LINES JINIT TO START WITH LOWEST SPEED ;INIT RELATIVE TIME CHECKER ;CLEAR THE DH11 sSET MAINTENANCE MODE ENABLE sSELECT IT IN THE SCR ;SET BYTE COUNT TO XFER 1 CHAR sGET TEST DATA STARTING AT LOC. 0 ;SELECT A XMIT SPEED ;ACTIVATE THE TRANSMITTER SJINIT TIMER A ;INIT TIMER B ;RCVR DONE YET ?? :BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN P( ;AROUND THIS BRANCH IF TIME OUT OCCURS ;SAVE AND SET UP THE SPEED CODE CICHM-D-0 CZOHMD P11 5983 5984 5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 5995 5996 5997 5998 5999 6000 6001 6032 6003 6004 6005 6006 6007 6008 6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 012342 012346 012354 012356 012360 012364 012370 012374 012400 0124n2 012404 012406 MACY11 30A(1052) 000337 042737 011103 010102 012704 153704 004737 004537 030322 032076 104054 000426 001202 177760 09-MAR-78 15:32 10-MAR-78 T41 L N 08:05 PAGE 144 RECEIVER TIMING TEST - ALL SELECTED LINES - ALL SWAB 001202 BIC mov Mov MoV 100200 030322 024416 024636 BISB JSR 013703 013704 020304 030352 030354 5%: 012424 012430 012434 012436 012440 012442 012446 012452 012656 012460 012462 004737 013702 006302 006302 000302 042702 004737 004537 030322 031756 027200 001220 7%: RS, SUNUM ;60 SEYT UP ERROR INFO ;GO SET LINE NO. IN MSG ERRLR BR 54 8s ;TIMED OUT WAITING FOR MoV MOV TIMEC,R4 TIMEB,R3 ;GET THE WAS COUNT ;GET THE CHECK COUNT ; COMPARE RELATIVE TIMES ;BR IF TIME INDICATES THIS SPEED FASTER ; THAN LAST SPEED 012464 012472 012500 012506 012510 013737 062737 022737 001253 000641 030352 002100 035600 JSR MoV ASL ASL SWAB 8IC JSR JSR LINE 177760 024416 024636 EM20+36 104020 ERROR 030354 001220 001220 8s: LINE,R4 JSR L INE CMP BLO 103420 $TRPO #177760,8TMPO (R1) ,R3 ;GET THE WAS DATA R1,R2 ;MAKE REGADR = DEVADR #BIT15+BIT07,R4 ;SET UP S/B DATA PC,SUERZ2A EM2c 51 012410 012414 012420 012622 SPEEDS Mov ADD CMP BNE BR R3.R4 8s PC,SAPS $STMP7,R2 R R2 R2 #177760,R2 PC,SUERZ2A RS, SUNUM ;GO TEST NEXT SPEED CHAR AVAIL ;SAVE THE ERROR PSW sGET SPEED CODE AND RIGHT JUSTIFY JSTRIP AWAY ALL JUNK ;GO SET UP ERROR INFO ;60 PUT LINE NO. IN MSG 20 sRECEIVER SPEED INCORRECT TIMEB,TIMEC sSET UP NEW CHECK TIMER COUNT ;GENERATE NEXT SPEED ;DONE ALL SPEEDS ? ;BR IF NOT ;GO TEST NEXT LINE #2100,3ThP?7 #35600,8THP7 2% 1% SEQ 0142 SEQ 0141 CZDHM-D-0 CZDHMD .PN 6020 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 T41 08:05 PAGE RECEIVER 145 LR TIMING TEST - ALL SELECTED LINES - ALL SPEEDS SEQ 0143 SEQ 0142 CZDHM-D~0 CZOHMO .P11 MR AR AL s*TEST 42 TST42: .REM 6059 6060 6061 6062 6063 6064 6065 6066 6067 6068 6069 6070 5071 6072 60/3 6074 6075 6076 ARASARALRARARARRAARARARARRRA R AR RRRRRRRRldd]ll]) VERIFY STORAGE OVERFLOW - NON MAINT., MODE -~ ALL SFLECTED LINES RNt AT eI e Rt RN TR RNNRRIIRIRACRIROEILSE SCOPE 3 TEST ABSTRACT: (222002220 RR S]] THIS TEST VERIFIES THAY THE STORAGE OVERFLOW BIT (SCR14) SETS ASD CL§ARS PROPERLY FOR ALL SCLECTED LINES. THE TEST SEQUENCE IS AS N - FOLLOWS: wn . LAV . . . 000004 o~ 012512 . . 9. 6048 6054 6055 6056 6057 6058 AR IR 6047 6049 6050 6051 6052 6053 AR AALS ~ 6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 N1 08:05 PAGE 146 VERIFY S° AGE OVERFLOW - NON MAINT. MODE - ALL SELECTED LINES 10-MAR~78 142 (> ] 6021 6022 6023 6024 €025 6026 MACY11 30A(1052) 09-MAR-78 15:32 SET UP THE ERROR RETURN SELECT A LINE NUMBER TO TEST -~ GO TO NEXT SELECTED LINES HAVE BEEN TESTED. PRIME THE SELECTED LINE TO XMIT 65(10) TEST If ALL CHARS. ACTIVATE THE SELECTED LINE AND WAIT FOR STORAGE OVERF.OW TO SET (SCR14=1) IF SCR14 FAILS TO SEY ON TIME - REPORT ERROR AND THEN CONTINUE WITH THE NEXT LINE IF (STEP 2.. IT SETS OK - READ THE ''NRC'' REG TWICE TO EMPTY TWO WORDS FROM THE SILO. AFTER A BRIEF STALL, VERIFY THAT SCR14 HAS CLEARED - IF NOT REPORT ERROR AND CONTINUE WITH NEXT LINE (STEPZ2) IF IT CLEARS OK, VERIFY THAT THE FILL COUNT (SSR<15:08>) CONTAINS A 77(8) - IF NOT REPORT ERROR AND CONTINUE WITH NEXT LINE (STEP 2). ¥E§$e; STEPS 2 THRU 8 UNTIL ALL SELECTED LINES HAVE BEEN ERRORS: shARRTRNY 1. ERROR SYNC: 57 M7277 IS CALLED TO REPORT SH3 INIT A ALL H ERRORS DETECTED. EFe tRRE R DEBUG: tTRARAY 1. PROBLEM CAN VERY LIKELY BE BE SURE THAT NO TEST YOU HAVE ONE ON FOR THIS TEST. 2. PROBLEM ]S POSSIBLY ON THE M7289 MODULE SIGNAL KEY FEEDING THIS LOGIC. CONNECTOR IS PRESENT. (SH&4) OR SOME LOGIC: (A2RARES2 A M7289 SH4 STORAGE OVERFLOW L READY IN PULSE H UC1 MASTER DA H UC2 MASTER Pa H £43-12 £40-11 BH? BD? SEQ 0144 SEQ 0143 CZDHM-D-0 CZDHMD.P11 6077 6078 6079 6080 6081 €082 [o 5 -l e o wd D Mo Fe N b d Vo N b ¥ g and 6083 6084 6085 6086 6087 6088 6089 6090 6091 6092 6093 6094 6095 6096 6097 6098 6099 6100 6101 6102 6103 6104 6105 6106 6107 012514 012522 012526 012530 012534 MACY11 30A(1052) 012737 004737 000535 012711 010102 113711 005061 012530 024544 030322 000006 09-MAR-78 15:32 012536 012542 012546 012554 012562 012761 10-MAR-78 142 001110 004000 012761 013761 033500 027314 000010 012570 012576 012602 012606 012610 012614 012737 005037 032711 001024 004737 00077¢ 000001 030352 040000 030350 012616 012622 012626 012632 012634 012640 012644 012650 012652 012654 012656 004737 012704 153704 011103 042703 004737 004537 030322 034741 104057 000721 027200 040000 030322 012660 012666 012674 012700 012702 012704 012710 016137 016137 012705 000002 000002 001000 001376 032711 001420 040000 012712 012716 012720 012724 012726 012732 004737 005004 153704 011103 042703 004737 004537 030322 034741 104057 000664 027200 012752 012760 122761 001660 0000/7 012762 012766 004737 012704 027200 037400 012736 012742 012744 012746 012750 18: 28: 177677 005305 4 08:05 PAGE 147 VERIFY STORAGE OVERFLOW - NON MAINT. MODE - ALL SELECTED LINES mov JSR BR MoV MoV move CLR #2838 ,SLPERR PC,SELINE TST43 #BIT11,(RY) R1.R2 LINE, (R1) CAR(R1) Mov Mov #33500,LPR(R1) LINMSK,BAR(R1) Mmov 000004 000012 38: 027016 137760 024416 024636 B 12 #-65.,BCR(R1) 4$: 41%: 030322 13’760 024416 (024636 000017 5§: sMAKE REGADR = DEVADR JSELECY # LINE sSET UP LURRENT ADDRESS ;SET UP BYTE COUNT ;SET UP LPR: 9600 BAUD,5 BIT CHARS sACTIVATE THE SELECTED LINE mov CLR BIT BNE JSR BR #1,TIREA TIMEB #BIT14,(R1) 4s PC,TIMEIT 3s cINIT TIMERS JSR Mov BISB MoV BIC PC,SAPS #BIT14,R4 LINE R4 (R1),R3 #137760,R3 PC,SUER2A R5,SUNUM ;60 SAVE PSW :SET UP S/B DATA JSR JSR LINE EM57+44 ERROR 57 BR 18 001220 001220 ,StT UP ERROR RETURN ;60 CFLECT A LINE NO. TO TEST ;:BR It DONE ALL >ELECTED LINES ;CLEAR YHE DHNN MoV MoV Mov NRC(R1) ,$THP? NRC(R1),$TMP?7 #1000,R5 BNE BIT BEQ 41% #BIT14, (RT) 5% CEC RS ;STOREGE OVERFLOW YET ?? sBR IF YES YOU SHOULD GET IT sCALL TIMER ;B8R IF NO TIME OUT ;SET UP WAS DATA sCLEAR UNINTERESTING BITS ;GO SET UP ERROR INFO sPUT LINE NO. IN MESSAGE ;STORAGE OVERFLOW FAILED TO SET ;GO TRY NEXT LINE ;READ THE SILO sREAD IT AGAIN ;INIT STALL COUNTER ; COUNT TIMER ;BR IF NO TIMEOUT :DID OVERFLOW GO AWAY ? ;BR IF YES JSR CLR B1S8 Mov BIC JSR JSR LINE EMST+44 ERROR BR PC,SAPS R4 LINE, R4 (R1) ,R3 #137760,R3 PC,SUER2A R5,SUNUM ;GO SAVE THE PSW ;SET UP S/B DATA 57 1% sSTORAGE BIT FAILED TO CLEAR :GO TRY NEXT LINE CMPB BEQ #77,SSR+1(R1) 1% ;WAS IT REALLY 65. ?? JSR Mov PC,SAPS #374L00,R4 ;GO SAVE PSW JSET UP S/B DATA ;SET UP WAS DATA sCLEAR UNINTERESTING BITS ;GO SET UP ERROR INFO ;PUT LINE NO. IN MSG SEQ 0145 SEQ 0144 30A(1052) 6133 6134 6135 6136 6137 6138 6139 6140 N2772 012776 013002 013006 013012 013014 013016 062702 016103 004737 004537 030322 034741 000016 000016 024416 024636 104057 EMST7+44 57 ERROR 6161 013020 000640 BR 09-MAR-78 15:32 10-MAR-78 £ 12 PAGE 148 08:05 VERIFY STORAGE OVERFLOW ~ NON MAINT. MODE ~ AL: MACY11 (ZDHM-D-0 CZDOHMD PN 142 ADD MOV JSR JSR LINE #SSR,R2 SSR(R1) ,R3 PC,SUER2A RS, SUNUM 1% SELECTED LINES sSET UP RFGADR ;SAVE WAS DATA ;GO SEYT UP ERROR INFO sPUT LINE NO. IN MSG ;READING SILO FAILED TO DEC SSR OR :STORAGE OVFL SET AT WRONG COUNT ;GO TRY NEXT LINE SEG 0146 SEQ 0145 C(OHM-D-0 CZDHMD . P11 MACY11 30A(105¢) 09-MAR-78 15:32 6142 6143 6144 6145 6146 6147 AN R soTEST 43 013022 000004 TST43: .REM N R RN R R R T RN RN RO A R AN E RO R IO RN TN AR BASIC DATA TEST - ALL SELECTED LINES/ALL CHAR LENGTHS RN R R R R At PP R I F P RN AR N RN RN E NP RO N RO R AR SCOPE 1 TEST ABSTRACT: 6148 6149 6150 6751 6152 6153 6154 6155 6156 6157 6158 6159 6160 6161 6162 6163 6164 6165 6166 6167 6168 6169 6170 617 6172 6173 6174 6175 6176 6177 6178 6179 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190 6191 6192 6193 6194 6195 6196 6197 D 12 08:05 PAGE 149 BASIC DATA TEST - ALL SELECTED LINES/ALL CHAR LENGTHS 10-MAR-78 T43 (222220822000 Q4 THIS TEST VERIFIES MITTED AND RECEIVED ON ALL (5, 6, 7, AND 8 BITS). 1. 2. SET UP THE ERROR LOOP RETURN SELECT A LINE NO. TO TEST - GO TO THE NEXT TEST IF DONE ALL SELECTED LINES. GET A TEST CHARACTER FROM THE DATA TABLE AND UPDATE THE TABLE POINTER. CLEAR THE DH1 PRIME THE SELECTED LINE TO XMIT ONE CHAR AT 9600 BAUD 3. 4. THE THAT A SINGLE ALL ONES CHAR. CAN BE TRANSSELECTED LINES AT ALL FOUR CHAR LENGTHS TcST SEQUENCE IS AS FOLLOWS: S. 6. WAIT FOR ''CHAR AVAIL' TO SET - IF TIMEOUT REPORT ERROR AND RESTART AT STEP 8. 7. 8. IF NO TIMEOUT - CHECK DATA AND REPORT ANY ERRORS INCREMENT ''SCR'* REG TO CHANGE CHAR LENGTH - IF DONE ALL FOUR GO TO STEP 2 - IF NOT THEN STEP &. ERRORS: tRAR LA 1. 2. ERROR ERROR SYNC: TR 55 23 M7277 IS CALLED TO REPORT RCVR TIMEOUT. IS CALLED TO REPORT DATA COMPARE ERRORS SH3 INIT A H EF2 EN DEBUG: 1A828 84 1. 2. 3. IF FAULT AFFECTS ONLY ONE LINE AT ALL CHAR LENGTHS, BAD UART MODULE M7280. SUSPECT A IF FAULT AFFECTS ONLY ONE BIT ON ALL LINES, SUSPECT THE THE M7279 MODULE. IF FAULT AFFECTS ONLY CERTAIN CHAR LENGTHS, SUSPECT EITHER THE M7278 OR THE UART MODULE M7280. KEY LOGIC: AR RRER A M7280'S UART CHIPS PINS <12:05 013024 012737 013052 001110 M7279 SH1 E1,E2,E6, OR E7 M7278 SH8 NB2 LPR 01 H NB1 LPR 00 H mov #3%,SLPERR FH1 FH ;SET UP ERROR LOOP RETURN SEQ 0147 SEQ 0146 CZDHM-D-0 CZDHMD P11 6198 6199 6200 6201 6202 6203 6204 6205 6206 6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220 6221 6222 6223 6224 6225 6226 6227 6228 6229 6230 6231 6232 6233 6234 6235 6236 6237 0238 6239 6240 6241 6242 6243 6244 5245 6246 6247 6248 MACY11 30A(1052) 004737 024544 09-MAR-78 15:32 013032 013036 013040 013044 013046 000511 012705 005002 013056 153711 013052 013062 013070 013076 013104 0°3110 012761 012761 012761 050261 053761 013116 013124 013130 013132 013134 013140 012737 005037 105711 100424 004737 000773 000001 030352 004737 027200 011103 04270% 012704 153704 004737 004537 030322 032076 016103 012704 153704 000304 153704 020304 001407 013232 004737 004537 030322 032137 013250 013252 013256 013260 1%: 001220 004000 030322 177777 001220 033560 000004 027314 2%: 3s: 000010 000006 000004 030350 4%: 177560 000200 030322 024416 024636 001273 000664 JSR BR MoV CLR mMov MOV BISB 024412 024636 6%: #TDATAZ RS R2 (R5)+,$THP?7 #81711,(R1) LINE, (R1) #-1,BCR(R1) #STMP7,CAR(RY) #33500,LPR(R1) R2,LPR(R1) LINMSK,BAR(R1) JSR MoV BIC PC,SAPS 5% PC.TIMEIT 48 SELECTED LINES/ALL CHAR LENGTHS ;G0 SELECT A LINE 70 TEST ;.BR IF DONLC ALL SELECTED LINES ;GET POINTER TO DATA TABLE ;INIT R2 TO START AT CHAR LENGTH OF 5 BITS sPUT TEST CHAR IN XMIT BUFFER ;CLEAR THE DH1 SSELECY THE LINE ;SET BYTE COUNT TO -1 ;SET CURRENT ADDRESS REG ;SET BAUD RATE TG 9600 ;SELECT CHAR LENGTH ;ACTIVATE THE SELECTED LINE ;INIT TIMER A JINIT TIMER B ;RCVR DONE YET ?? ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS :SAVE THE ERROR PSW ;GET THE SCR ;CLEAR UNINTERESTING BITS :SET UP S/B DATA BISB JSR JSR (R1) ,R3 #177560,R3 #200,R4 LINE R4 PC,SUERZ2A RS5,SUNUM BR 55 63 ;CHAR AVAIL FAILED TO SET ON TIME ;GO TEST NEXT CHAR LENGTH NRC(R1) ,R3 #200,R4 LINE R4 R4 $TMP7,R4 R3.R4 63 ;GET THE WAS DATA JSR JSR LINE PC,SUERZ2 RS, SUNUM ;GO SET UP THE ERROR INFO ;GO PUT LINE NO. IN MSG ERROR 23 ;DATA COMPARE ERROR INC CMp BNE BR R2 #4,R2 ;DO NEXT CHAR LENGTH ON SELECTED LINE 1% ;GO DO NEXT LINE MoV MoV EM23+36 000004 TST44 #1,TIMEA TIMEB (R1) BISB SWAB 8158 Cmp BEQ 001220 PC,SELINE Mov CLR TS18 BMI JSR BR LINE EM22+51 ERROR 5%: E 12 BASIC DATA TEST - ALL MoV 106023 005202 022702 PAGE 150 BIS B1S 000012 027016 000002 000200 030322 08:05 mov mov MoV 104055 000422 013204 013210 013214 013220 013222 013226 013230 013236 013242 013244 013246 743 030336 012537 012711 013142 013146 013150 013154 013160 013164 013170 013174 013176 013200 013202 10-MAR-78 2% ;GO SET UP ERROR INFO ;GO SET LINE NO. IN MSG JSET UP THE S/B DATA IN R4 ;WAS THE RCVD DATA CORRECT ;BR IF YES ?? :HAVE WE DONE ALL FOUR CHAR LENGTHS ?? :BR IF NOT SEQ 0148 SEQ 0147 (ZDHM-D-0 CZOMHMD.P11 MACYT1 09-MAR-78 15:32 6249 6285 6286 6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301 6302 6303 6304 10-MAR-78 08:05 T44 LML AAAAALRLSAALE TST“: - ALL AR AL SEQ 014Y SEQ 0148 SELECTED LINES AR ARARARRRRRRRRRRRRRRR D) SINGLE LINE DATA TEST - ALL SELECTED LINES R 000004 12 LINE DATA TEST 'TEST 44 013262 F PAGE 151 SINGLE T Ty SCOPE X -REM TEST ABSTRACT: S22 22220R 8244 THIS TEST TRANSMITS AND RECEIVES A BINARY (000 -5377) ON ALL SELECTED LINES. FOLLOWS: 1. SET UP THE 7. IF NO TIMEOUT READ THE COUNT PATTERN THE TEST SEQUENCE IS AS ERROR LOOP RETURN 2. 6O SELECT A LINE NO. TO TEST - IF DONE ALL SELECTED LINES THEN GO TO THE NEXT TEST . 3. CLEAR THE DH11 AND PRIME THE SELECTED LINE TO xmI7Y TO XMIT 256. CHARS AT 9600. BAUD - 8 BIT CHARS. 4. SET UP RS TO POINT TO RCVR CORE BUFFER. 5. ACTIVATE THE SELECTED XMITTER. 6. WAIT FOR '‘CHAR AVAIL'® TO SET BEFORE READING THE SILO. If RCVR TIMEOUT REPORT ERROR AND RESTART AT STEP 2. oo 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282 6283 6284 30A(1052) . 9. SILO AND STORE THE WORD IN THE RCVR CORE BUFFER - WHEN THE BUFFER IS FULL GO TO STEP8 IF NOT THEN GO TO STEP 6. COMPARE THE XMIT AND RCVR CORE ALL DATA COMPARE ERRORS. IMAGE BUFFERS AND REPORT CHECK THE "'BAR'', ''BCR'', AND "'CAR'® REGISTERS FOR CORRECT CONTENTS - REPORT ALL ERRORS. 10.G0 TO STEP 2 ERRORS: AAARRRE 1. 2. ERROR ERROR 22 37 4. 5. ERROR ERROR 10 7 3. ERROR SYNC: 40 M7277 IS CALLED TO REPORT '‘DATA AVAIL'' TIMEOUT ' DATA COMPARE ERRORS " " " " " SH3 INIT A H " "'BAR'* REG NOT CLEARED " "'BCR'" REG NOT ALL ZEROES " "'CAR'' REG NOT UPDATED CORRECTLY EF2 L2288 DEBUG: S LASRS 1. 2. 3. IF THE FAULT AFFECTS ONE OR MORE LINES IN AN B LINE GROUP <15:08> OR <07:00>, SWAP THE M7280 MODULES. IF THE FAULT SHIFTS SO THAT THE ERROR INDICATES DIFFERENT LINES THE PROBLEM IS MOST LIKELY THE M7280 THE SYMPTOM SHIFTED TO. IF THE FAULT GIVES DATA ERRORS BUT AFFECTS ONLY CERTAIN PATTERNS ON ONE LINE THE FAULT 1S MOST LIKELY A "‘UART'' CHIP. IF THE FAULT GIVES DATA ERRORS BUT AFFECTS ONLY CERTAIN PATTERNS ON ALL LINES SUSPECT THE DATA PATHS EXTERNAL TO, THE M7280 MODULES. (ZDHR-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 6305 6306 6307 6308 6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339 6340 6341 6342 6343 6344 6345 6346 6347 6348 6349 6350 6351 6352 6353 6354 6355 6356 6357 6358 6359 6360 4. 013264 013272 013276 013300 013302 013306 013312 013316 013322 013330 013336 013344 013350 013354 012737 004737 000401 000402 000137 013701 012711 153711 012761 012761 012761 012705 052711 013761 013306 024544 LOGIC fAT AR 4 1%: BR BR JMP MoV 004737 010102 011203 042703 012704 027200 013452 013456 013462 016125 022705 001344 000002 037312 013464 012702 012701 037312 036312 042704 000304 153704 152704 000304 177400 027016 MOV MOV CLR TS18 BMI JSR B8R JSR MOV Mov 176400 BIC MoV 001200 030322 024416 024636 000710 030322 000200 6% S$: CAUSES NO DATA ERRORS BUT GIVES "BAR'’, SEQ 0149 'BCR'’, OR '‘CAR'’" ERRORS (REFER TO TEST 43) #2%,SLPERR PC,SELINE 118 2% 8$ DHADR,R1 #B81711,(R1) LINE, (RT) #TBUF ,CAR(RT) #-400,8CR(R1) #33503,LPR(R1) #RBUF RS #B1709, (R1) L INMSK ,BAR(R1) ;SET UP ERROR LOOP RETURN ;GO SELECY A LINE TO TEST :.BR IF ALL SELECTED LINES DONE ;GO TEST IV JEXIT TEST sRESET DEVADR ;CLEAR THE DH11 ;SET SELECY BITS IN SCR sSET UP BUS ADDRESS REG ;SET UP BYTE COUNT +SET LINE PARAMETERS ;SET UP POINTER TO INPUT DATA BUFFER :SET MAINT MODE BIT JACTIVATE THE SELECTED LINE #2,TIMEA TIMEB (R1) 31 PC,TIMEIT JINIT TIRMER A JINIT TIMER 8 sRCVR DONE YET 77 ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS R1,R2 (R2) ,R3 #176400,R3 #1200,Ré PC,SAPS ;SAVE THE ERROR PSW ;SET UP REGADR ;GET THE WAS DATA ;CLEAR JUNK BITS ;SET UP S/B DATA 3$ BISB JSR JSR LINE LINE,R4 PC,SUERZA RS, SUNUM ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ERROR BR 22 ;CHAR AVAIL TIMEQUT ;GO TRY NEXT LINE Mov CMP BNE NRC(R1),(RS5)+ 228UF*1000,R5 ;SAVE THE RECEIVED DATA ; INPUT BUFFER FULL ?? ;BR IF NOT MOV MOV #T1BUF ,R2 #RBUF ,R1 (R2) ,Ré #177400,R4 R4 ;SET UP POINTER TO OUTPUT BUFFER EM22+51 104022 111204 MoV JSR 030350 3%: SEQ 0150 SELECTED LINES RAY 000012 11$: 2%: =~ ALL THE M7278 OR M7277 MODULES. 001000 027314 036312 013406 013412 013414 013416 013422 013426 013432 013436 013442 013444 013446 013450 013479 013474 013476 013502 013504 013510 013514 KEY FAULT BISB MoV Mov Mov MoV BIS MOV 000002 030352 004737 004537 030322 032076 THE 000006 000010 000004 012737 005037 135711 100425 004737 153704 001110 IF SUSPECT 013732 027302 004000 030322 037312 177400 033503 013362 013370 013374 013376 013400 013404 000773 6 12 PAGE 152 08:05 SINGLE L INE DATA TEST 10-MAR-78 T44 MOVB BIC SWAB BIS8B BISB SWAB 1% LINE, R4 #200,R4 R4 ;SET UP POINTER TO INPUT BUFFER ;SET UP S/B DATA IN Ré (ZOHM-D-0 C(ZOHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 6361 6362 2%22 013516 013520 013522 011103 020304 001407 6365 6366 6367 6368 gggg 013524 013530 013534 013536 013540 004737 004537 030322 033354 104037 637 6372 6373 6374 gg;z 013542 013544 013550 013554 005202 062701 022701 001347 6377 6378 6379 6380 2?31 013556 013562 013564 013570 013572 013701 010102 062702 005712 007413 027302 013574 004737 027200 10-MAR-78 144 08:05 PAGE 000002 6%: 037312 (R1),R3 R3.R4 6% ;GET THE WAS DATA ;DATA CORRECT ?? ;BR IF YES JSR PC,SUER? JSR RS, SUNUM LINE EM37+33 ERROR 37 ;GO SET UP ERROR INFD ;PUT LINE NO. IN MESSAGE INC ADD BNE R2 #2,R1 #RBUF +1000,R1 5% ;UPDATE DATA BUFFER POINTERS H ;COMPARED ALL 256. CHARS ?? ;BR IF NOT MOV MoV ADD TST BEG DHADR,R1 R1,R2 #BAR,R?2 (R2) 7% ;RESET DEVADR ;SET UP REGADR JSR PC,SAPS ;SAVE 40 ;"'BAR'" REG NOT ALL Z2EROES Mov ADD TST R1,R¢ #BCR,R2 (R2) 71% ;SET U® REGADR JSR MoV CLR JSR JSR L INE EM10+44 ERROR PC,SAPS (R2),R3 R4 PC,SUERZA R5,SUNUM ;SAVE THE ERROR PSW ;GET THE WAS DATA :SET UP THE S/B DATA ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE 10 ;BYTE COUNT ~NCT ALc ZEROES Mov ADD CMP BEQ R1,R2 #CAR,R2 #TBUF+400,(R2) 72% ;SET UP REGADR JSR MOV MoV JSR JSR LINE PC,SAPS (R2) ,R3 #TBUF +400,R4 PC,SUER2A R5,SUNUM ;SAVE THE ERROR PSW ;GET THE WAS DATA ;SET UP S/B DATA ;GO SET UP ERRGR INFO ;GO PUT LINE NO IN MESSAGE cmp 000012 H 12 SINGLE LINE DATA TEST - ALL SELECTED LINES MoV cmp BEQ 024412 024636 153 ;DATA COMPARE ERROR ;WAS THE ''BAR'’ ALL ZEROES ?? ;BR IF YES [ 6383 6384 6385 6386 6387 6388 6389 ggg? 013600 013602 013604 013610 013614 013616 013620 011203 005004 004737 004537 030322 033417 104040 6392 6393 6394 013622 013624 013630 01010 062702 005712 6397 6398 6399 6400 6401 6402 6403 2282 013634 013640 013642 013644 013650 013654 013656 013660 004737 011203 005004 004737 004537 030322 031224 104010 6406 6407 6408 22?8 013662 013664 013670 013674 010102 062702 022712 001414 6411 6412 6413 6414 6415 6416 013676 013702 013704 013710 013714 013720 004737 011203 012704 004737 004537 030322 gggg 013632 Mmov CLR JSR JSR LINE EM40+40 ERROR 024416 024636 000010 7$: 001413 BEQ 027200 024416 024636 00000¢ 037712 027200 037712 024416 024636 71%: (R2) ,R3 R4 PC,SUER2A RS, SUNUM THE ERROR PSW ;GET THE WAS DATA sSET UP S/B DATA ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ;BYTE COUNT REG ALL ZEROES ? ;:BR IF BYTE COUNT ZERO ;DID "'CAR'" INCREMENT PROPERLY ? ;BR IF YES SEQ 0151 SEQ 0150 CIDHA-D~0 CZOHMD PN 6617 6418 6419 6420 6421 6427 MACY11 30A(1052) 09-MAR-78 15:32 013722 013724 031155 013726 000137 013732 000240 10-MAR-78 T44 SELECTED LINES EM7+47 ERROR 7 ;""CAR'* NOT UPDATED CORRECTLY 72%: JMP 1% ;GO DO NEXT LINE 8s: NOP 104007 013272 I 12 08:05 PAGE 154 SINGLE LINE DATA TEST - ALL JEXIT POINT SEQ 0152 SEC 0151 CIDHAMD.P1Y MACY11 30AC1052) 09-MAR-78 15:32 10-MAR-78 145 6423 6424 BASIC PARITY LOGIC TEST - ALL SELECTED LINES - ODD PARITY s*TEST 45 000004 R I AN AR RN AR R AR NN NS E RSO EARERERNARRS BASIC PARITY LOGIC TEST - ALL SELECTED LINES - ODD PARITY A 013734 J 12 PAGE 155 RN 6425 6426 6427 6428 08:05 AR R R R A R R R R AR T A AN N E NN RN RO R RN RN RN N OOOEN TST4S5: SCOPE .REM 4 TEST ABSTRACT: 6429 (22222222222334 6430 6431 6432 g:%z THIS TEST VERIFIES THE ODD PARITY FUNCTION FOR ALL SELECTED LINES USING THE ''BREAK'' FUNCTION TO FORCE PARITY ERRORS. REFER TO THE FLOW CHARTS IN THE PROGRAM DOCUMENTATION FOR TEST SEQUENCES. 6435 ERRORS: 6437 6438 2228 1. 2. 6441 SYNC: 6436 ' 282288 6442 ERERR 6443 6444 6445 6446 gzig 6451 6452 6453 6454 6455 22;9 6461 6462 6463 6464 6465 6466 6467 64068 6469 6470 22;; 6473 6474 6475 6476 6477 6478 22 33 M7277 IS CALLED TO REPORT RCVR TIMEOUT IS CALLED TO REPORT DATA/PARITY ERRORS SH3 INIT A H EF2 DEBUG: RRREES gzgg 6458 6459 6460 ERROR ERROR 1. IF FAULT AFFECTS ALL LINES SUSPECT THE M7278 MODULE. 2. 1F 1T AFFECTS ONLY ONE LINE SUSPECT THE ''UART'' MODULE FOR THAT LINE. KEY LOGIC: ERREERNEESE " 013736 013744 013750 013752 013756 013762 013766 013770 013774 014002 014010 014016 014024 014032 014040 014046 014052 014054 014056 014062 012737 004737 000506 013752 024544 001110 1%: SH7 MGv JSR BR #2% ,SLPERR PC,SELINE TST46 012711 012704 153704 000304 153711 012737 0127617 004000 000260 030322 030322 000377 073563 030334 000004 MOV MOV BISB SWAB BISB MOV MoV 012761 013761 013761 03033¢ 027314 027314 000006 000014 000012 MOV MoV MoV 012737 005037 105711 000001 030352 012761 100423 004737 000773 177777 027016 2%: M7278 000010 MOV 030350 3s: MOV CLR TS18B BMI JSR BR PEN LPRO4 L PEV LPROS L #BIT11,(RY1) #260,R4 LINE R4 R& LINE, (R1) #377,TDATAY #73563,LPR(R1) #-1,BCR(R1) #TDATAT,CAR(RY) LINMSK,BKR(R1) LINMSK,BAR(R1) #1,TIMEA TIMEB (R1) 4% PC,TIMEIT 3% FF2 FN1 JSET UP ERROR LOOP RETURN ;60 SELECT A LINE NO. ;:BR IF ALL SELECTED LINES DONE JCLEAR OUT THE DH11 JSET UP THE S/B DATA IN R4 ;SET LINE NO. IN SCR ;LOAD XMIT BUFFER WITH TEST CHARA(CTER SET UP THE LINE PARAMETERS ;LOAD THE BYTE COUNT REG :LOAD THE BUS ADDR REG SET BREAK BIT FOR SELECTED LINE ACTIVATE THE XMITIR sINIT TIMER A JINIT TIMER B ;RCVR DONE YET ?? ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN PC SEQ 0153 SEQ 0152 e~ (Z0HM-D-0 CZUHM-D-Q CZDHMD PN 6479 6480 6481 6482 6483 6484 6435 6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497 6498 6499 6500 6501 6502 6503 6504 6505 MACY11 30A(1052» 09-MAR-78 15:32 10-MAR-78 145 K 12 08:05 PAGE 156 BASIC PARITY LOGIC TEST =~ ALL SELECTED LINES - 0DD PARITY ;AROUND THIS BRANCH 014064 014070 014072 014076 014102 014104 014110 014114 014116 014120 014122 004737 011103 012704 153704 010102 004737 004537 030322 032076 014124 014130 014132 016103 020304 001704 000002 014134 014140 014142 014146 014152 014156 014160 014162 014164 004737 010102 062702 004737 004537 030322 033070 027200 027200 024416 024636 104033 000667 000002 024416 024636 RS, ZJNUM ;SET UP REGADR ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE ERROR BR 22 1 ;TIMED OUT WAITING FOR DATA AVAIL ;60 TEST NEXT LINE MOV CMP BEQ NRC(R1),R3 R3,R4 1% JGET THE WAS DATA JSR MOV ADD PC,SAPS R1,R2 ;SAVE THE ERROR PSW LINE EM22+51 104022 4%: OUT OCCURS :SAVE THE ERROR PSW ;GET THE WAS DATA JSR 000710 TIME PC,SAPS (R1) ,R3 #100200,R4 LINE RS R1,R? PC,SUERZ2A JSR MOV MoV 81SB MoV JSR 100200 030322 IF JSR JSR L INE #NRC ,R? PC.SUERZA RS, SUNUM EM33+40 ERROR 33 B8R 1% ;SET UP THE S/B DATA ;CORRECT DATA RECEIVEL ?? ;BR IF YES ;SET UP THE REGADR ;GO SET UP ERROR INFO ;PUT LINE NO. IN MESSAGE s INCORRECT DATA OR PARITY ERROR ;60 TEST NEXT LINE SEQ 0154 SEQ 0153 C(ZDHM-D-0 CZOHMD.P11 6506 6507 6508 6509 6510 6511 6512 6513 6514 6315 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559 6560 €561 MACY11 30A(1052) 09-MAR-78 15:32 L1 10-M/.R-78 146 08:05 PAGE 157 MULTI-LINE PARITY DATA TEST - ALL SELECTED LINES PR EAAA R AAAAAAARARAARAR TRTEST 46 AR MULTI-LINE A RARRRARAARAR PARITY DATA TEST R AR - ALL SEGC 0155 SEQ 0154 ARRRRRddldd]) SELECTED LINES ;:!'t'i't'ti't""iti'i"ttittfit"t'i'i"i'ttttttt".'t'.'.'..'tt 014166 15T46: SCOPE .REM X TEST ABSTRACT: 000004 1322222220224 2] THIS TEST VERIFIES ALL SFLECTEC LI’ .S CAN TRANSMIT AND RECEIVE A BINARY COUNT PATTERN WHEN RUN CONCURRENTLY. ALL CHAR LENGTHS (5, 6, AND 8 BITS3) ARE TESTED WITH BCTH EVEN AND ODD PARITY CHECKING SPECIFIED THE TEST ACTUALLY INCLUDES EIGHT SUB-TESTS - THE PARAMETERS FOR EACH SUB-TEST RETRIEVED FROM A TABLE TAGGED ''PRTYTB:''. TO DETERMINE THE TEST SEQUENCE. REFER TO THIS TABLE ERRNRS: 2222223 1. 2. ERROR ERROR 41 42 IS CALLED TO REPORT FALSE RECEIVER INTRS. IS CALLED TO REPORT SILO OVERFLOW ERRORS 4. ERROR 35 1S CALLED TO REPORT TEST TIMEOUTS 3. ERROR SYNC: 34 IS CALLED TO REPORYT PARITY/DATA ERRORS (NONE) RARRR DEBUG: (REFER TO TEST 495) L3382 84 KEY LOGIC: (REFER TO TEST 45) 1233882323031 014170 014176 014202 014206 014212 014216 014222 014224 014230 014234 014240 014244 014250 014254 014260 014266 014274 014300 014304 014310 014314 014320 012737 012705 005037 162705 005337 022705 001456 012706 013701 012537 012537 005237 012711 004737 016137 013737 004737 013702 012722 113712 012711 013737 014206 027364 001220 000004 001220 027420 001100 027302 001216 001214 001220 00400C 025020 000004 027312 027164 027304 014376 030316 000100 027312 001110 4 MoV #18 ,SLPERR ;SET UP THE ERROR LOOP RETURN (LR SUB DEC S InP7 #4,RS5 $TRP7 :START WITH SUB TEST #00 JRESET POINTER FOR ERROR LOOPS ;RESET SUB TEST # FOR ERROR LOOP 21s ;:BR IF YES (RS5)+,S$THPS S$TMP7 JGET THE LINE PARAMETERS ;GENERATE NEW SUB-TEST NO. [ [s)" 1%: 2%: CMpP BEQ MOV MOV MoV MOV INC 001202 001210 027560 MOV JSR MOV MoV JSR MOV MoV MOVB MOV MoV #PRTYTB+4 RS #PRTYTB+40 RS #STACK,SP DHADR,R1 (R5)+,$TMP6 #BIT11,(RY) PC,SUPPAR LPR(R1) ,$TMPO LINSEL,$THP3 PC,CHPS? DHVCT ,R2 #38,(R2)+ DHRLVL, (R2) #100, (R1) LINSEL,LINACT ;SET UP POINTER TO TEST PARAMETERS ;DONE ALL 8. SuB TESTS ?? JRESET STACK POINTER FOR ERROR LOOPS sRESET DEVADR FOR ERROR LOOPS ;GET THE BYTE COUNT PARAMETER ;CLEAR THE DH11 ;G0 SET UP PARAMETERS ;SAVE CURRENT LINE PARAMETERS ;SAVE SELECTED LINES PARAMETER ;60 LOCK OUT INTRS JSET UP THE VECTOR :G0O TO 3% ON RCVR INTERRUPT ;ENABLE CHAR AVAIL INTERRUPTS ;FLAG ALL SELECTED LINES ACTIVE MACY11 30A(1052) 09-MAR-78 15:32 CZDHM-D-0 CZCHMD.P11 6613 6614 5615 6616 6617 027312 001102 177400 027150 014616 014360 014364 014370 014374 012706 004737 004737 000556 001100 027150 026770 T46 €00012 001206 001206 08:05 PAGE 158 MULTI-LINE PARITY DATA TEST - ALL SELECTED LINES MOV Mov8 LINSEL ,BAR(R1) STSTNM,STHP2 ACTIVATE ALL SELECTEDLINES ;SAVE THE TEST NO. JSR JMP PC,CHPST 7% ;GO CLEAR PSW ;GO WAIT FOR INTERRUPTS #STACK,SP PC,CHPS PC,RESTRP 1ST47 ;RESTORE THE SP ;GO CLEAR PSW BIC 21%: m12 MOv JSR JSR BR #177400,8TMP2 ;RESTORE TRAP CATCHER ;:G0 TO NEXT TEST JRECEIVER INTERRUPT SERVICE ROUTINE 014376 014402 014404 005037 105711 001212 014406 012711 004000 014412 014414 104041 040000 014424 012711 104042 000671 004000 014434 014440 014042 014444 014450 014452 014456 014464 014466 014474 014476 014500 014502 014506 016103 010302 000302 042702 006302 005237 00000¢ — ~n w W (=] N " o N Sy LR &»H f ©O urGur Gru-Qur 022737 001744 036237 001002 104000 000755 010237 006237 026203 001426 004737 012711 016204 062701 062702 004737 004537 001212 033144 004537 001220 CLR $TMP4 BMI 43 (R1) ;CHAR AVAIL MoV #BIT11, (R1) ;CLEAR OUT THE DH11 B8R 2$ ;GO TRY NEXT SUB TEST 1578 ERROR 000700 032711 001404 014430 014432 3s: 100404 014416 014422 Qe 6589 ¢S90 6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 6610 6611 6612 Gi3761 113737 042737 004737 000137 e Ghar GG 6566 6567 6568 6569 6570 6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 6587 6588 014326 014334 014342 014350 014354 OCOO0O0O0O0O0OO0OO0O 6562 6563 6564 6565 10-MAR-78 4s: 001212 000101 001212 030246 027312 mov #BIT1T,(RY) sCLEAR OUT THE DH11 Mov Mov SWAB NRC(R1) ,R3 R3,R2 R2 ;GET THE WAS DATA SEXTRACT AND SAVE LINE NO. BNE ERROR BR 024636 42 23 #177760,R2 R2 S$TAP4 #101,$TMHP4 3s ;SILO OVERFLOW ERROR ;GO TRY NEXT SuB TEST ;GENERATE TABLE OFFSETR SULNSEL(R2) ,LINSEL 51 ;1S THIS ONE OF THE SELECTED LINES? ;1F SO,G0 ANALYZE THE CHARACTER ;INDICATE SOME KIND OF ERROR ;CHECK THE NEXT SI'O ENTRY MoV ASR 58 R2,STMP4 $THP4 BEQ 63 RBUF (R2) ,R3 ;CORRECT DATA RECEIVED ?? JSR Mov Mov PC,SAPS #BIT11,(R1) RBUF (R2) ,R4 ;SAVE THE ERROR PSW ;CLEAR OUT THE DHMY ;SET UP S/B DATA PC,SUERZ2A ;GO SET UP ERROR INFO CHP 024416 024636 INTERRUPT - CHAR AVAIL NOT SET :SILO OVERFLOW ?? :BR IF NOT BIT 51%: JRCVR FALSE SET #BIT14,(R1) 5% BIC ASL INC cMP BEQ 177760 YES BIT BEQ ERROR BR 5%: 41 ;BR IF ADD ADD JSR JSR $THP4 #NRC ,R1 #RBUF ,R2 R5,SUNUM EM34+57 JSR RS, SUNUM $TMP7 :BR [F YES ;SET UP WAS ADDRESS ;SET UP S/B ADDRESS ;PUT LINE NO. IN MESSAGE ;PUT SUBTEST NO. IN MESSAGE SEQ@ 0156 cEQ 0155 (ZOHM-D-0 (ZOHMD PN 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 MACY11 30A(1052) 09-MAR-78 15:32 014566 014570 014572 033162 104034 000611 014574 014600 014604 014606 014614 105262 005262 001003 046237 000002 10-MAR-78 146 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6656 6655 PAGE 159 MULTI-LINE EM3&+67 036312 027562 027520 6s: 027560 6628 6629 08:05 61%: N 12 PARITY DATA TEST - ALL ERROk BR 34 2% INCB RBUF (R2) ;GENERATE NEW RCVD DATA MULPTB(R2) ;COUNT ONE BYTES RECEIVED 613 ;BR IF NOT DONE LINBIT(R2) ,LINACT ;FLAG THIS LINE DONE INC BNE 8IC RT] SEQ 0157 SEQ 0156 SELECTED LINES sPARITY DATA COMPARE ;GO TRY NEXT SUBTEST ERROR sRETURN TO WAIT ROUTINE ;WAIT ROUTINE 000002 030352 000012 014642 012737 005037 005761 001413 004737 000772 014644 014652 014656 014660 016137 012711 104035 000137 000012 004000 014664 014672 014676 014702 014704 014710 012737 005037 005737 001411 004737 000772 000001 030352 027560 014712 014720 014724 014726 013737 012711 027560 004000 000137 014216 014616 014624 014630 014634 014636 104035 030350 7%: 8s: 027016 001210 TST BEQ JSR BR Mov MOV 014216 030350 MOV CLR 9s: 10$: 027016 001210 118: #2,TIMEA TIMEB BAR(RY) 9% PC,TIMELT 8% BAR(R1) ,$TMP3 #817T11,(R1) JINIT TIMER A ;INIT TIMER B sALL LINES DONE XMITTING ?7 ;BR IF YES sCALL THE TIMER ;TIRER ROUTINE WILL MOVE sARQUND THIS BRANCH IF RETURN PC TIME OUT OCCURS ;SAVE THE ACTIVE LINES FLAG ;CLEAR OUT THE DH11 sTIRED OUT WAITING FOR TRANSMITTERS TO FINISH :GO TRY NEXT SUBTEST ERROR JMP 35 2% MOV CLR #1,TIMEA TImEB LINACT 113 PC,TIREIT 108 JINIT TIMER A INIT TIMER B sALL CHARS RECEIVED ? LINACT,STMP3 sSET UP ACTIVE LINE PARAMETER sCLEAR QUT THE DH11 TST BEQ JSR BR MOV MOV ERROR JMP #BIT11,(RYV) 35 2% ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN P( ;AROUND THIS BRANCH IF TIME OUT OCCURS :SILO EMPTY TIMEOUT ;GO TRY NEXT SuB TEST i G (ZOMR-D-0 CZOHmD . P11 000004 15147: .REM TEST ABSTRACT: ArANEARAREANSETS THIS TEST VERIFIES THAT ALL SELECTED LINES CAN TURN AROUND - A SINGLE TEST CHARACTER (377) AND (000) IS AS FOLLOWS: W NOWVIES D IN AUTO ECHO MODE. THE TEST SEQUENCE SEY UP THE ERROR LOOP RETURN RETRIEVE THE AUTO-ECHO TEST DATA FROM "AETAB:'' AND UPDATE THE POINTER. GO SELECT A LINE NO. TO TEST - GO TO STEP 10 IF DONE ALL SELECTED LINES. . CLEAR THE ‘''CAR'' AND ''BCR'' MEMORIES. PRIME THE SELECTED LINE TO XMIT ONE ACTIVATE THE SELECTED TRANSMITTER. . CHAR WITH A.E. ENABLED. U¢ITTEgR2"C“AR AVAIL" = IF TIMEOUT REPORT ERROR AND RESTART AT 00 6678 6679 6693 6694 6695 6696 6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708 6709 6710 671 - ALL SELECTED LINES SCOPE I . 014732 6670 6671 6672 6673 6674 6675 6676 6677 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692 AUTO ECHO TEST 1 ::"tttttt"""""".l""""""tI.i'....Ql‘fi.'."""'.".'. 6663 6664 6665 6666 6667 6668 6669 SEQ 0158 SEQ@ 0157 SRR RRANEERRARNLOCRRNCRRRORARNQEOCESESAQROOCEROECORARNRORIARARERROGEQNCQEOCOORNCTLTTD DeTEST 47 . 6661 6662 B 13 08:05 PAGE 160 AUTO ECHO TEST 1 - ALL SELECTED LINES 10-MAR-78 147 . 6656 6657 6658 6659 6660 MACY11 30A(1052) 09-MAR-78 15:32 S . IF NO TIMEOUT - READ SILO AND COMPARE AUTO ECHO DATA RECEIVED REPORT DATA COMPARE ERRORS AND RESTART AT STEP 2 IF NO ERRORS REPEAT STEPS 7 AND 8 SIXTY-FOUR TIMES THEN TURN OFF A.E. ENABLE AND READ LAST CHAR FROM SILO.. CHECK LASTY CHAR FOR DATA COMPARE ERRORS - REPORT ERRORS IF ANY - AND RE- START AT STEP 2. 10.CHANGE A.E. TABLE POINTER TO POINT TO '‘AETABO:'" (0'S DATA) AND REPEAT STEPS 2 THRU 9. ERRORS: L2228 1. 22 ERROR 24 SYNC: M7277 IS CALLED TO REPORT ALL ERRORS SH& LOAD BAR LB+HB L CN2 LR228 DEBUG: EERARS 1. IF ALL LINES FAIL, SUSPECT EITHER THE M7277 OR M7289 2. 1F ONLY ONE LINE FAILS SUSPECT THE M7288 3. LOOP ON THE FAILING LINE AND TRACK BACK THROUGH THE KEY LOGIC. KEY LOGIC: ARk ARRNER M7277 SH3 SH4 AE GO L €S2 7402 "‘OR'* GATE CHIPS E38 OR E41 74157 MUX CHIPS E39 OR 342 E35 - PIN 2 STUCK LOW CZOHM-D-0 CZDHMD.P11 10-MAR-78 147 c 13 08:05 PAGE 161 AUTO ECHO TEST 1 - ALL SELECTED LINES M7289 SK3 SH& 014734 014742 014746 014752 014756 014762 014764 014766 014770 014774 014776 015000 015006 015010 015014 015014 015016 015022 015026 015034 015040 015046 015054 015060 015066 b —_— e O oo e ~N oo ~ON A nro o n b b 150 b b b 134 140 144 b — — b — - 130 ol B wwd e el wd el e il il D —d NN HO VAV AV, LV ] AV AV AV NV AV LV AV AV AV AV NV 3V ] b COO0O 015074 015102 OCOCOCOO0ODO0O0O0OOO 6712 6713 6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732 6733 6734 6735 6736 6737 6738 6739 6740 6741 6742 6743 6744 6745 6746 6747 6748 6749 6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 6763 6764 6765 6766 6767 MACY11 30A(1052) 09-MAR-78 15:32 012737 005037 012711 012705 005037 000261 000401 000241 006137 001407 012504 033737 001767 004737 000522 004737 113711 012761 010561 162761 012737 005037 012761 013761 015016 001210 004000 027420 027316 027316 027312 024544 };:: 024716 030322 177777 000006 000002 000100 001216 133503 027314 2s: 000002 030352 004737 000773 027016 004737 005061 010102 011103 042703 012704 153704 004737 027200 004537 030322 €32274 104024 1$: 13%: 000004 100000 000200 030322 024416 024636 000010 000006 001220 000004 000012 030350 3s: AE GO L Ex1 AE SCAN MUX E22 PIN 10 SAMPLE STATUS H E21-12 M7288 SH5, MOV #28,SLPERR JSET UP ERROR LOOP RETURN Mov MoV CLR #BIT11,(RY) #AETAB,RS LMSK1 ;CLEAR THE DN11 ;GET POINTER TO AUTO ECHO DATA TABLE JINIT BIT TEST MARKER CLR 7%: 027316 012737 005037 105711 100427 001110 )4 SEQ 0159 SEQ 0158 SEC BR cLC ROL BEQ MOV BIT BEQ JSR 7, 9, 1 AE ENABLE ''NN'' H CONTROL FLOPS 764174 CHIPS PIN 15 $TMP3 13% ;INIT 1/0 DATA FLAG ;SET ''C'* BIT FOR MARKER ;G0 SHIFT MASK LMSK1 ;INIT THE '°C' BIT ;SHIFT BIT MARKER PC,SELINE ;GO SELECTY A LINE 12% (R5)+,R4 LMSK1,LINSEL 18 ;BR IF DONE ALL LINES :SET UP THE S/B DATA sTEST THIS LINE ? ;BR IF NOT TO TEST BR 6% ;:BR IF ALL SELECTED LINES TESTED Movs LINE, (R1) JSET SELECT BITS IN SCR REG JSR PC,CLCABC :GO CLEAR '"'CAR'® AND 'BCR'' MEMORIES mov MOV suBs MOV CLR MOV MOV #-1,BCR(R1) RS.CAR(RY) #2,CAR(RY) #100,81MP7 $THP6 #133503,LPR(R1) LINMSK,.BAR(R1) MOV CLR #2,TIREA TIMEB JINIT TIMER A SINIT TIMERB L JSR BR 43 PC.TIMELY 3 ;BR IF YES ;CALL THE TIMER ;VIMER ROUTINE WILL MOVE RETURN PC JAROUND THIS BRANCH IF TIME OUT OCCURS JSR CLR MOV MOV BIC MOV BISB JSR JSR PC,SAPS LPR(R1) R1,R2 (R1),R3 #81T15,R3 #200,R4 LINE R4 PC,SUERZA RS, SUNUM TST1B LINE (R1) EM24+35 ERROR 24 JSET UP TO XFER CNE CHAR ;SET UP THE BUS ADDRESS REG ;sCORRECT BUS ADDRESS ;COUNT 64 CHARS TO BE RECEIVED IN AUTO FCHO JINIT CHAR COUNTER ;SET UP LINE PARAMETER REG :ACTIVATE THE LINE JCHAR AVAIL SET ?? :SAVE THE £RROR PSW ;TURN OFF AUTO ECHO MODE ;MAKE REGADR = DEVADR JGET THE WAS DATA ;CLEAR JUNK BIT ;SEY UP S/B DATA ;60 SET UP ERROR INFO ;GO SET LINE NO. IN MSG ;DATA AVAIL FAILED TO SET ON TIME CZDHM-D-0 D . P11 CZCHM 6768 6769 6770 6771 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 67387 6788 6789 6790 6791 6792 6793 6794 6795 6796 6797 MACY11 30A(1052) 09-MAR-78 15:32 0151586 000677 015170 015174 015200 015202 005237 016103 020304 001417 001216 000002 015204 015210 015214 015216 015222 015¢26 015232 015234 015236 015240 004737 005061 010102 062702 004737 004537 030322 032274 104024 000652 027200 015242 015246 015250 015252 015260 005337 003317 100646 042761 000712 301220 015262 015266 015270 015274 01300 005137 001406 005037 012705 001210 000137 10-MAR-78 147 A ¥ 08:05 PAGE 162 AUTO ECHO TEST $THP6 NRC(R1) .R3 R3,R4 5% ;COUNT ONE CHAR RECVD ;GET THE WAS DATA :WAS CHAR AUTO ECHOED CORRECTLY ? ;BR IF YES JSR CLR PC,SAPS ;SAVE THE ERROR PSW ;DISABLE AUTO ECHO .SET UP REGADR JSR LINE EM24+35 100000 030322 027460 014750 000004 6%: SELECTED LINES INC Mov JSR 5%: - ALL ;GO TRY NEXT LINE MoV ADD 000002 024416 024636 1 1% CHp BEQ 000004 D13 LPR{RT) R1,R2 #NRC,R2 PC,SUERZA RS, SUNUM ;G0 SEY UP ERROR INFOQ ;PUT LINE NO. IN ERROR MSG6 ERROR BR 24 :CHAR AUTO ECHOED INCORRECTLY ;GO TRY NEXT LINE DEC BGT 8MI BIC BR $TMP?7 3$ :COUNT ONE CHAR READ OUT OF 64 ;BR IF NOT LAST ONE :.BR IF LAST ONE READ ;DISABLE AUTO ECHO ;GO READ LAST CHAR COM BEQ CLR mov JMP 1% 1$ #BIT15,LPR(R1) 3s $TMP3 TST50 LINE #AETABO RS 7$ :TOGGLE 1/0 FLAG ;.BR IF DONE BOTH 1/0 DATA SINIT LINE NO 10 00 ;SET POINTER TO 0'S TABLE sREPEAT TEST FOR ZERO PATTERNS SEa 0160 SEQ 0159 CZOHM~D-0 CZOHMD . P11 6798 6799 6800 6801 6802 6803 6804 6805 6800 6807 6808 6809 6810 6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822 MACY11 30A41052) 09-MAR-78 15:32 5831 6832 6833 6834 6835 6836 6837 6838 6839 6840 6841 6842 6843 6844 6845 6846 6847 5848 6849 685C 6851 6852 6353 08:05 PAGE 163 AUTO ECHO TEST 2 - ALL SELECYED LINES SE0 0161 SEQ 0160 ;:t'.'.t"tttt'tt.tt'ti"t""".i""""t..ttit'.t!."t"'.'ttt ;*TEST 50 AUTO ECHO TEST 2 - ALL SELECTED LINES JIRRANEEEN RN LA R TR NN R AT LA 015304 TST50: 000004 SCOPE LN YRR RRAOCERRAAARRARRARNECEASOORNRONNTY % .REM TEST ABSTRACT: EEARNAREEEREREY THIS TEST IS SIMILAR TO TEST 47 EXCEPT ALL SELECTED LINES OTHER THAN THE A.E. TEST LINE ARE ACTIVELY TURNING AROUND A BTNARY COUNT TEST PATTERN IN NON-AUTO ECHO MODE AND THE A.E. TEST LINE IS TESTED FOR ALL 1'S DATA ONLY. ERRORS: ARt hkw 1. 2. ERROR ERROR SYNC: 32 31 M7277 IS CALLED TO REPORT A.E. TEST TIMEOUTS IS CALLED TO REPORT ALL DATA COMPARE ERRORS SH4 LOAD BAR LB+HB L CN2 LR A RS DEBUG: THRERY 65623 6824 6825 6826 6827 6828 €829 6830 E 13 10-MAR-78 150 REFER TO TEST 47 KEY LOGIC: L A8 RS2 20S REFER TO TEST 47 015306 015314 015320 015324 015326 015330 015332 015336 012737 012705 005037 000261 000401 000241 006137 001410 012537 033737 001766 004737 015362 027420 027316 001110 027316 001220 027316 b4 Mov #2838 ,SLPER. LMSK? 1$: CLR SEC BR CLC s BEQ MOV BIT BEQ JSR Mov 128: 027312 024544 000575 013701 012711 004737 027302 004000 027040 153711 030322 000006 010561 162761 012761 000002 177777 2%: 000006 000010 #AETAB,RS 128 :SET UP ERROR LOCP RETURN ;SET POINTER TO A.E. ;INIT BIT TEST MASK ;GENERATER MARKER BIT ;GO SHIFT MASK ;INIT THE '"C'' 81T IN ''C'' ROL LMSKY 1% (R5)+,$THP? LMSKT,LINSEL 1% PC,SELINE ;BR IF TESTED ALL LINES JGET THE A.E. TEST DATA FOR THIS LINE ;TEST THIS LINE ? ;BR IF NOT ;GO SELECT A LINE BR TST51 ::BR IF DONE ALL SELECTED LINES MoV DHADR ,R1 #BI1T11,(R1) PC,SETALL ;CLEAR OUT THE DH11 ;GO SET UP FOR BINARY COUNT XFER ON BISB Mov sus LINE,(R1) RS,CAR(RY) #2,CAR(RY) JSELECT THE LINE FOR A.E. TEST ;SET BUS ADDR TO XMIT TEST CHAR ;CORRECT THE ADDRESS MOV JSR Mov #-1,BCR(RT) ;SHIFT TEST DATA TABLE TEST BIT ;RESET DEVADR IN CASE OF ERROR [0OP ;ALL LINES OTHER THAN THE SELECTED ONE ;XMIT ONE CHAR ON THIS LINE CIDHM-D-0 (ZDHMD.P11 6854 6855 6856 6857 6858 6859 6860 6861 6862 6863 6864 6865 6866 6867 6868 6869 6870 6871 015422 015430 015436 015444 015452 015460 015466 015472 015476 015500 015504 015506 015514 015520 6872 6873 6874 6875 6876 6877 6878 6879 6880 6881 6882 6883 6884 6885 6886 6887 6888 6889 6890 6891 6892 6893 6894 6895 6896 6897 6898 6899 6900 6901 6902 6903 6904 6905 6906 6907 6908 6909 MACY11 30A(1052) 012761 113737 062737 043737 013761 133503 001102 09-MAR-78 15:32 16-MAR-78 150 027312 000604 001206 001206 027560 000012 012737 005037 016103 000002 030350 004737 000772 027016 16137 006537 030322 032765 104032 000700 000004 024636 100414 177400 027314 030352 000002 F 13 08:05 PAGE 164 AUTO ECHO TEST 2 - ALL SELECTED LINES SEQ 0162 SEQ 01&° MoV Mmovs BiC BIC Mmov #133503 ,LPR(R1) STSTNM,STHP2 #177400,8THP2 LINMSK,LINACT LINSEL,BAR(RY) ;DO IT AT 9600 BAUD/8 BITS sSAVE THE TEST NO. 21%: MoV 3%: #2,TIMEA TIMEB JINIT JINIT Mov 49 PC,TIMELT ;BR IF YES ;CALL THE TIMER 001202 CLR BM! JSR BR NRC(R1) ,R3 3$ ;MAKE THIS LINE APPEAR INACTIVE ACTIVATE ALL SELECTED TRANSMITTERS TIMER A TIMER B sGET THE WAS DATA ;TIMER ROUTINE WILL MOVE RETURN P( ;AROUND THIS BRANCH IF TIME OUT OCCURS LPR(R1) ,$TMPO R5.SUNUM ;SAVE THE CURRENT "'LPR"’ sPUT LINE NO. IN MESSAGE ERROK BR 32 ;AUTO ECHO TIMEOUT Mov Rz.Ré sEXTRACT LINE NUMBER OF Mov JSR LINE EM32+35 1% ;GO TRY NEXT LINE RCVD (HAR 015552 015560 010304 000304 042704 010402 006302 123704 001432 036237 001737 015562 015566 026203 001447 036312 CMP BEQ RBUF (R2) ,R3 ;RECVD DATA CORRECT ?? 015570 015574 015600 015604 015610 015614 015620 004737 010437 016204 062702 012701 604737 004537 001214 032630 104031 000137 027200 001214 JSR MOV MOV ADD MOV JSR PC,SAPS sSAVE ERROR JMP 31 :NON-ECHO DATA COMPARE ERROR cmp BEQ R3,$TMP7 ;CHAR ECHOED OK ?? JSR PC,SAPS #$TMP7 ,R2 sSAVE THE ERROR PSW ;SAVE THE S/B ADDRESS #177703,R1 PC,SUER2A RS,SUNUM ;SAVE THE WAS ADDRESS ;60 SET UP ERROR INFO ;GO SET UP LINE NO. IN MESSAGE 015624 015626 015630 015632 4%: 177760 030322 030246 02731¢ 036312 036312 177703 024416 024636 SWAB BIC MoV ASL (MPB BEQ BIT BEQ JSR $TMPS EM3T+45 015330 015636 015642 020337 001427 001220 015644 015650 015654 015660 015664 015670 004737 012702 013704 012701 004737 004537 027200 001220 001220 177703 024416 024636 5%: MoV Mov Mov JSR JSR R #177760,R4 R4, R2 R2 L INE R4 5% :SAVE IT IN R2 ;GENERATE TABLE INDEX IN R2 ;IS THIS THE A.E. TEST LINE ?? ;BRANCH IF YES. SLNSEL(R2),LINSEL 218 6% R4 ,$TMPS RBUF (R2) ,R4 #RBUF ,R2 #177703,R1 PC,SUERZA R5,SUNUM 1$ 7$ $TMP7 R4 ;BR IF IT WAS THE ERROR PSW sSAVE THE LINE NUMBER ;SET UP S/B DATA :SET UP S/B ADDRESS ;SET UP THE WAS ADDRESS ;GO SET UP ERROR INFO ;sPUT LINE NO. IN MESSAGE ;GO TRY NEXT LINE ;BR IF YES :SAVE THE S/8 DATA CIDHA-D-0 CZCHMD P11 6910 6911 6912 6913 6914 6915 6916 6917 6918 6919 6920 6921 6922 6923 6924 MACY11 30A(1052) 09-MAR-78 15:32 015700 015702 030322 032630 104031 000137 015706 015712 015714 015722 015726 015730 015736 015742 015744 015750 105262 001262 046237 005737 001254 042761 105761 001002 000137 000137 015674 015676 10-MAR-78 150 G 13 08:05 PAGE 165 AUTO ECHG TEST 2 - ALL SELECTED LINES LINE EM31+445 015330 6%: 036312 027520 027560 027560 100000 000017 000004 015330 015460 7%: 8%: ERROR JAP 3 INCB RBUF (R2) ;GENERATE NEXT EXPECTED DATA ON THIS LINE 218 ;BR IF ITS NOT BACK TO 000 LINBIT(R2) ,LINACT . INDICATE THIOS LINE CONE 256 BYTES LINACT sALL LINES INACTIVE 21s ;BR IF NOT #BIT15,LPR(RT) ;TURN OFF THE A.E. BITY ) SSR+1(R1 ;SILO EMPTY 727 8% :BR [F NOT BNE BIC ST BNE BIC TSTB BNE JMP JMP 19 1% 21% ;AUTO ECHO LINE DATA ERROR ;60 TRY NEXT LINE ;GO TEST NEXT LINE ;GO EMPTY [T SEQ 0163 SEQ 0162 (Z0Wn-D-0 CIDHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR~78 TS1 08:05 PAGE 166 AUTO ECHO TEST 6925 A 6926 ;oTEST 51 6927 6928 6929 AR 015754 000004 TST51: .REM 6930 TN R R 3 - ALL R R RN R Rt L P LR R R R AN AR AN AN AUTO ECHO TEST NN AN R SEQ 0164 SEQ 0163 SELECTED LINES OO E RN ERRT RS 3 - ALL SELECTED LINES AN TR E R RN O R R AR R A RO L RO AN NA R OOEE SCOPE X TEST ABSTRA(T: 6931 222228222228 6932 6933 6934 6935 6936 6937 ERRORS: 6939 6940 1. 6943 SYNC: THIS TEST IS IDENTICAL TO TEST 47 EXCEPT ALL SELECTED LINES ARE ACTIVATED CONCURRENTLY RATHER THAN ONE AT A TIME AND ONLY THE ALL 1°'S DATA IS USED. 6938 ' S22222. 282; 2. 6944 ERROR ERROR X222 6945 6946 6947 6948 6949 6950 6951 36 31 M7277 IS CALLED TO REPORT ''DATA AVAIL'' TIMEOUTS IS CALLED TO REPORT A.E. DATA ERRORS SH4 LOAD BAR LB+HB L (N2 DEBUG: Iy REFER TO TEST 47 KEY LOGIC: 6952 6953 6954 6955 6956 6957 6958 6959 6960 6961 6962 6963 6964 6965 6966 6967 A H 13 2222222222 REFER TO TEST 47 012737 012711 012705 012702 012703 010261 012761 012761 005023 062702 005211 005305 001362 113737 042737 013737 013761 015764 004000 000020 027420 036252 000006 177777 131403 6968 6969 6970 6971 6972 28;2 015756 015764 015770 015774 016000 016004 016010 016016 016026 016026 016032 014034 016036 016040 0160646 0160564 016062 001110 001102 177400 027312 027312 001206 001206 027560 000012 6975 6976 6977 6978 697¢ 6980 016070 016076 016102 016106 016110 016112 012737 005037 005037 105711 100410 004737 000002 030352 001212 030350 000010 000004 b4 1%: 2%: 000002 027016 3%: MOV MOV [0} MOV MOV mov MOV MOV CLR ADD INC DEC BNE MOVB BIC MOV MOV #18,SLPERR JSET UP THE ERROR LOOP RETURN #BIT11,(RY) ;CLEAR OUT THE DM #20,R5 ;INIT COUNTER TO SET UP 16. LINES #AETAB,R? ;SET UP POINTER TO AUTO ECXHO TEST DATA #RCNT ,R3 ;R3 POINTS TO TABLE OF CHAR COUNTERS R2.CAR(RY) ;SET UP BUS ADDRESS REG #-1,BCR(R1) ;SEYT UP BYTE COUNT REG #131403,LPR(R1) ;SET UP LINE PARAMETERS (R3)+ ;CLEAR A COUNTER #2.R2 ;UPDATE POINTERS (R1) sSELECT NEXT LINE RS ; COUNT ONE DONE 23 ;sBR TILL 16. DONE $TSTNM, STMP? ;SAVE THE TEST NO. #177400,8TMP2 LINSEL,LINACT ;SET FLAG TO INDICATE ALL 16. ACTIVE LINSEL.BAR(R1) ACTIVATE ALL XMITTERS MOV CLR (LR TSTB BMI JSR #2,TIMEA TIMER $TMP4 (R1D) 4% PC,TIMEIT JINIT TIMER A :INIT TIMERB ;CHAR AVAIL SET YET ? ;BR IF YES ;CALL THE TIMER (ZDHM-D-0 CZOHMD.P11 6981 6982 6983 6984 6985 6986 6987 6988 6989 6990 6991 6992 6993 6994 6995 6996 6997 6998 6999 7000 7001 7002 7003 7004 7005 7006 7007 7008 7009 7010 7011 7012 7013 7014 7015 7016 7017 7018 7019 7020 7021 MACY11 30A(1052) 09-MAR-78 15:32 016116 000771 016120 916126 016130 016137 016132 016136 016140 016142 016146 016152 016154 016160 016166 016170 016176 016200 016202 016204 016210 016214 104036 000004 10-MAR-78 151 001202 016103 000002 010237 006302 005237 022737 001745 036237 001002 001216 49. 177760 001212 000101 001212 030246 027312 03625¢ 027420 41%: 016216 016222 016226 016232 016236 016242 016246 016250 016252 016254 004737 016204 062702 062701 004737 004537 001216 032630 104031 000415 027200 02742v 027420 000002 024416 024636 016256 016264 016266 016272 016300 016306 022762 001306 013711 042761 046237 001275 000100 036252 001216 100000 027520 000004 027560 3 - ALL SEG 0165 SEQ 0164 SELECTED LINEC sTIMER ROUTINE WILL MOVE RETURN P( MoV LPR(R1) ,8TMPO ;SAVE Mov NRC(R1) ,R3 ;GET mov SWAB BIC Mov ASL 36 TST52 R3,R2 R2 #177760,R2 R2,$TMP6 R2 $TMP4 ;AROUND THIS BRANCH THE IF TIME OUT OCCURS ''LPR'’ REG ;DATA AVAILABLE TIMEOUTY ;sEXIT TEST ON ERROR THE WAS DATA ;BUILD AND SAVE LINE NO. ;SAVE THE LINE NO. ;GENERATE TABLE OFFSET CMP 8taQ BIT BNE ERROR BR INC CMP BEQ #101,8TMP4 3$ SUNSEL(R2) ,LINSEL ;IS THIS ONE OF THE SELECTED LINES? 41$ :1F SO,GO ANALYZE THE CHARACTER ;INDICATE SOME KIND OF ERROR 49 ;GO GET THE NEXT CHARACTER RCNT(R2) ;COUNT THE CHARACTER R3,AETAB(R2) ;1S THE DATA CORRECT ?? 5% sBR IFf YES JSR Mov ADD ADD JSR PC,SAPS AETAB(R2) R4 #AETAB,R2 #NRC,R1 PC,SUERZA JSR $TMP6 5%: 13 3s INC 104000 000753 005262 020362 001420 1 BR ERROR BR 000467 010302 000302 042702 08:05 PAGE 167 AUTO ECHO TEST R5,SUNUM ;SAVE THE ERROR PSW ;GET THE S/8 DATA ;GENERATE S/B ADDRESS ;GENERATE THE WAS ADDRESS ;GO SET UP ERROR INFO sPUT LINE NO. IN MESSAGE EM31+45 ERROR 31 BR TST52 ;DATA COMPARE ERROR ;;EXIT TEST ON ERROR CmpP #100,RCNT(R2) ;DONE 64. CHARS ON THIS LINE ? BNE 3% ;BR BNE Mov BIC BIC 3s ;BR IF NOT $TMP6, (R1) ;SELECT LINE IN SCR REG #BIT15,LPR(R1) TURN OFF A.E. BIT LINBIT(R2),LINACT sALL LINES INACTIVE [F NOT ?? (ZDHM-D-0 CZOHMD . P11 7022 7023 7024 7025 7026 7027 7028 7029 7030 703 7032 MACY11 30A(1052) 09-MAR~-78 15:32 J 13 10-MAR-78 152 08:05 PAGE 168 BREAK BIT TEST - ALL SELECTED LINES crRAANREREERARRRRARARRRGACERCEARRRRCEORNGORANOOURNRARRARRAOERNRNNRNCEARCTETR ;eTEST 52 016310 000004 1§752: .REM 1228822222882 FOR ALL 7036 7037 7038 7039 7040 7041 7042 7043 7044 7045 7046 7047 7048 7049 7050 7051 7060 7061 7062 7063 7064 7065 7066 7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 SCOPE % TEST ABSTRACT: 7034 7035 7056 7057 7058 7059 BREAK BIT TEST - ALL SELECTED LINES ;:tt""t't"'i'ii'i"i'i""'it""t""t'tfit't.t.tfil't'itt.t"' 7033 7052 7053 7056 7055 SEQ@ 0166 SEQ 0165 THIS TEST VERIFIES THAT THE 1 . THE SELECTED LINES. SET UP THE TEST ''BREAK'' FEATURE WORKS PROPERLY SEQUENCE IS AS ERROR LOOP RETURN FOLLOWS: 2. RETRIEVE 3. GO SELECT A LINE TO TEST - GO TO THE NEXT TEST SELECTED LINES 4 . 5. 6. 7. TABLE THE CORRECT S/B DATA FROM THE AND UPDATE THE POINTER. ''BREAK'' DATA IF DONE ALL RESET THE DH11 AND CLEAR THE '"'CAR'' AND ''BCR’' MEMORIES. PRIME SELECTED LINE TO OUTPUT TWO "'NULL'' CHARS TO CLEAR UART ACTIVATE THE SELECTED LINE WALIT FOR SILO TO RECEIVE TWO NULLS - IF TIMEOUT REPORT ERROR AND RESTART AT STEP 2 8 . IF NO TIMEOUT CLEAR THE SELECTED DH11 AND RESELECT LINE NO. 9 . PRIME SELECTED LINE TO OUT PUT 256. CHARS. 1 0.SET THE SELECTED LINE'S BREAK BIT 1 1.ACTIVATE THE SELECTED LINE 1 2.WAIT FOR ''BAR' REG TO CLEAR ~F TIMEOUT REPORT ERROR AND RESTART AT STEP 2 13.1F NO TIMEOUT VERIFY THAT THE SILO RECEIVED ONLY ONE CHARIF NOT REPORT ERROR AND RESTART AT STEP 2 14.1F SILO RECEIVED ONLY ONE CHAR VERIFY THAT IT WAS A 'BREAK" CHAR ~ [F NOT REPORT ERROR ~ AND RESTART AT STEP 2 ERRORS: (222220841 1. ERROR SYNC: 25 M7277 IS CALLED TO REPORT ALL ERRORS SH4 LOAD BCR H Fu1 kAR Y DEBUG: (AR08 1. IF ALL LINES FAILED SUSPECT THAT THE M7277 IS NOT GENERATING THE BREAK CONTROL REG LOAD SIGNAL. 2. IF ONLY ONE LINE FAILS SUSPECT THE BREAK (ONTROL LOGIC ON THE M7278 KEY SIGNALS: TRREREEERERY M7277 SH& M7278 SHS LOAD BCR H fFUl THRU SH8 74175 REGISTER CHIPS ES1, E38, E67, E6O (ZDHM-D-0 CZDHRD PN 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095 7096 7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 152 08:05 PAGE 169 BREAK BIT TEST K 13 - ALL SELECTED LINES 76400 DRIVERS 016312 016320 016324 016330 016332 016334 016336 016342 016344 016346 016354 012737 012705 005037 000261 000401 000241 006137 001411 012504 033737 001767 004737 016372 027622 027316 027316 016406 016414 016422 016430 012761 012761 012761 013761 030356 016436 016444 016450 016456 016460 016464 012737 005037 122761 001432 004737 000771 000001 030352 000002 016466 016472 016476 016500 016504 016506 016512 016516 016520 016524 016530 004737 010437 010102 027200 001204 016332 016534 016540 016542 016544 016550 016554 016562 016570 177776 033503 027314 MoV 027312 118: JSR move 12% LMSK1 1% (RS)+,R& LMSKT,LINSEL 1% PC,SELINE 118 2% 9 #BIT11,(RY) PC,CLCABC LINE, (R1) ;SET BIT MARKER IN ''C" ;GO SHIFT MASK SINIT THE '°C’’ BIT sSHIFT TEST MARKER ;BR IF ALL LINES DONE ;GEY TEST DATA FOR THIS LINE sLINE SELECTED ? ;BR IF NOT ;GO SELECT A LINE TO TEST ;:BR IF OONE ALL SELECTED LINES ;60 TEST THE SELECTED LINE ;GO EXIT TEST ;CLEAR THE DH11 ;GO CLR THE ''CAR'® AND ''BCR'' MEMORIES ;SELECT THE LINE #TNULL,CAR(RT) #-2,BCR(R1) sSET UP TO OUTPUT TWO NULL CHARS ;SET BYTE COUNT TO 2 sSET UP LINE PARAMETERS sACTIVATE SELECTED LINE 030350 Mov #1,TINEA TIMEB #2,SSR+1(RY) 43 PC,TIMEIT ;INIT TIRER A SINIT TIRER B 000017 3s: CLR (CMPB BEQ JSR B8R 001204 MOV LINE EM25+34 ERROR BR 000674 004000 030322 037312 177400 033503 LASK1 ;SET UP ERROR LOOP RETURN ;SET UP POINTER TO BREAK DATA TABLE JINIT BIT TEST MASK MoV Mov Mov Mov 024416 024636 100377 000002 #2% ,SLPERR #BRKTAB,RS 000006 000010 000004 000012 JSR MOV MOV ADD MOV 8IC MOV SWAB JSR JSR 042703 012704 000304 004737 004537 030322 032333 013704 012711 113711 012761 012761 012761 BIT BEQ JSR BR BR JMP MoV 027016 000016 104025 ROL BEQ 017046 004000 024716 030322 062702 011203 CLR SEC BR (L 024544 000137 012711 004737 113711 mov MoV 027316 016356 016362 016364 016366 016372 016376 016402 000401 000402 001110 E45, E46, E75. ET76 4% 000006 000010 000004 Mov MOvVB Mov Mov Mov #33503,LPR(R1) LINMSK,BAR(R1) 3s PC,SAPS R4, STMPY R1,R2 #SSR,R2 (R2) ,R3 #100377,R3 #2,R4 R& PC.SUER2A RS, SUNUM $TMP1,R4 25 1% #1711, (R1) LINE, (R1) #TBUF ,CAR(RT) #-400,BCR(R1) #33503,LPR(R1) :TWO CHARS RECEIVED ?? ;BR IF YES ;CALL THE TIMER ;TIMER ROUTINE WILL MOVE RETURN P( sAROUND THIS BRANCH IF TIME OUT OCCURS :SAVE THE ERROR PSW ;SAVE S/B DATA ;SET UP REGADR ;GET THE WAS DATA s CLEAR JUNK ;SET UP S/8 DATA ;GO SET UP ERROR INFO ;GO PUT LINE NO. IN MESSAGE SRESTORE S/B DATA ;TIMED OUT WAITING FOR TWO NULLS ;GO TRY NEXT LINE :CLEAR THE INTERFACE ;SELECT THE LINE ;SET UP BUS ADDRESS REG FO R XMITTR ;SET BYTE COUNT TO XMIT 25 6( 10) CHARS ;SET UP LINE PARAMETERS SEQ 0167 SEQ 0166 (ZDHM-D-0 CZDHMD. P11 7134 7135 7136 7137 7138 7139 7140 7141 7142 7143 7144 714° 7146 7147 7148 7149 7150 7151 7152 7153 7154 7155 7156 7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167 7168 7169 7170 7N 7172 7173 7174 7175 7176 7177 7178 7179 7180 7181 7182 7183 7184 7185 718¢ 7187 7188 7189 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 152 L 13 08:05 PAGE 170 BREAK BIT TEST - ALL SELECTED LINES 016576 016604 013761 013761 027314 027314 000014 000012 MoV mov L INMSK,BKR(R1) L INMSK ,BAR(R1) ;SET BREAK BIT FOR ACTIVE LINE +ACTIVATE THE SELECTED LINE 016612 016620 016624 016630 016632 016636 012737 005037 005761 0014626 004737 000772 000005 030352 000012 030350 MoV CLR TST #5,TIMEA JINIT TIMER A ;INIT TIMER B ;BAR BIT CLEARED ?? ;BR IFD YES ;CALL THE TIMER 016640 016644 016650 016652 016656 016660 004737 010437 01010¢ 062702 027200 001204 016662 016666 016672 016674 016676 016702 016704 011203 005004 004737 004537 030322 032333 013704 104025 000613 027016 PC,TIMELT 5% PC,SAPS sTIMER ROUTINE WILL MOVE RETURN PC ;AROUND THIS BRANCH IF TIME OUT OCCURS ; SAVE THE ERROR PSW R4, $TMPY R1,R2 #BAR,R2 (R2) ,R3 R4 PC,SUERZA RS, SUNUM :SAVE THE S/B DATA ;SET UP REGADR 25 ;GET THE WAS DATA ;SET UP S/B DATA 024416 024636 001204 MOV $TMP1,R4 BR 1% ;RESTORE THE S/B DATA ;BAR BIT FAILED TO CLEAR ;GO TRY NEXT LINE #1,SSR+1(RY) 7% ;ONE CHAR RECEJVED ? ;BR IF YES PC,SAPS ;SAVE THE ERROR PSW ;SAVE THE S/B DATA 000001 016716 016722 004737 010437 010102 062702 011203 042703 012704 000304 004737 004537 030322 032333 013704 027200 001204 104025 mov MoV ADD MOV BAR(R1) o$ CLR JSR JSR LINE 122761 001430 016742 016746 016750 016754 016760 016762 016764 016770 016772 BEQ JSR BR JSR 000012 016706 016714 016726 016730 016734 016736 S$: TIMEB EM25+34 ERROR 060017 6$: JSR MoV Mov ADD MoV BIC MOV 0000158 100377 000001 SWAB JSR JSR LINE 024416 024636 EM25+34 001204 000137 016334 016776 017002 017004 017006 016103 020304 001002 000137 000002 017012 017016 017020 017024 017030 017034 004737 010102 062702 004737 004537 030322 027200 Mov ERROR JMP 7%: 016334 000002 024416 024636 CMPB BEQ mov CMP BNE JHP 8%: JSR MoV ADD JSR JSR LINE R4,$THPY #SSR,R2 (R2) ,R3 #100377,R3 #1,R4 R&4 PC,SUER2A RS, SUNUM :GO SET UP ERROR INFO ;PUT LINE NO IN MESSAGE :SET UP REGADR :GET THE WAS DATA s CLEAR JUNK ;SET UP S/B DATA ;GO SET UP ERROR INFO ;GO PUT LINE NG. IN MESSAGE 25 ;RESTORE THE S/B DATA sFAILED TO RECEIVE THE ONE CHAR NRC(R1),R3 R3,R4 8s 1% JGET THE WAS DATA JWAS IT A BREAK CHAR ? sBR IF NOT CORRECT ;GO TEST NEXT LINE PC,SAPS ;SAVE THE ERROR PSW ;SET UP REGADR $TMP1,RS 18 R1,R2 #NRC,R2 PC,SUERZA RS, SUNUM ;GO TRY NEXT LINE ;G0 SET UP ERROR INFO ;PUT LINE NO IN MESSAGE SEQ 0168 SEQ 0167 (ZOHWM-D-0 CZOHMD . P11 7190 7191 7192 ;}gz 017036 017040 017042 017046 MACY11 30A(13052: 09-MAR-78 15:32 032333 104025 000137 000240 016336 10-MAR-73 152 "3 PAGE 171 08:05 BREAK BIT TEST - ALL SELECTED LINES EM25+34 2] ERROR 9%: JAP NOP 1$ s INCORRECT DATA RECEIVED ;GO TRY NEXT LINE JEXIT THIS TEST SEQ 0169 SEQ 0168 (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 7195 017050 TST53: LREM 000004 IZ222 82222832 ] THIS TEST VERIFIES THAT THE RECEIVERS ON ALL "BLINDED’' WHEN THE HALF~DUPLEX MODE oo ~NO~ e “« . e . o NN — IS AS FOLLOWS: « SEQUENCE IS ENABLED. SELECTED LINES ARE THE TEST SET UP THE ERROR LOOP RETURN GO SELECT A LINE NO. TO TEST IF DONE ALL SELECTED LINES - GO TO THE NEXT TEST RESET THE DH11 AND CLEAR THE ''CAR’' AND ''BCR'' MEMORIES PRIME THE SELECTED DH11 TO XMIT 256. CHARS IN HALFDUPLEX MODE. ACTIVATE THE SELECTED LINE AND WAIT FOR THE 'BAR'' REG TO CLEAR IF TIMEOUT - REPORT ERROR AND GO TO STEP 2 IF NO TIMEOUT VERIFY THE '‘CHAR AVAIL' DID NOT SET (RECEIVER BLéN?ED)TEPIS ERROR REPORT IT AND GO TO STEPZ - IF NO ERROR GO 10 S : ERRORS thARERL 7221 1. ERROR SYNC: 7¢.3 77.6 7227 7228 7229 7230 7231 7232 26 M7277 IS CALLED TO REPORT ALL ERRORS SH3 INIT A H EF2 LA R 28] DEBUG: I LL 1. SUSPECT EITHER THE M7289 OR THE M7288 MODULES KEY LOGIC: (2R R2S ] 17052 17060 (=1 =1 7246 7247 7248 7249 7250 SCOPE X TEST, ABSTRACT: 7222 7223 7224 7245 HALF DUPLEX TEST - ALL SELECTED LINES :;'tttttt't'""tti"'t"i"'ttt't"tttt'ii'.i'ii'tt'tt""ttt'tt 7213 7214 7215 7216 7217 7218 7219 7220 7233 7234 7235 7236 7237 7238 7239 7240 7241 7242 7243 7244 SEQ 0170 SEQ 0169 DIEARANRNETCRAAASAETRALERNCARAOCCERCOOOERCERRRARORNRORARONROCANACAIARONRCETSE S+TEST 53 7196 7197 7198 7199 7200 7201 7202 7203 7204 7205 7206 7207 7208 7209 7210 7211 7212 N 13 08:05 PAGE 172 HALF ODUPLEX TEST - ALL SELECTED LINES 10-MAR-78 153 17064 017066 017072 017076 017102 012737 004737 000477 012711 004737 153711 012761 017066 024544 004000 024716 030322 037312 001110 4 1%: c$: 000006 M7289 ShS HALF DUPLEX <i5:00> H SIGNALS END OF CHAR <15:00> SIGNALS M7288 SHS SH7 SH9 SH1 HALF DUPLEX <03:00> <07:00> " " <11:08> " " <15:12> MoV #2% ,SLPERR ;SET UP ERROR LOOP RETURN BR MOV TST54 #BIT11,(RT) ;:BR IF ALL LINES TESTED ;CLEAR THE INTERFACE BISB LINE, (R1) JSR JSR MOV PC,SELINE PC,CLCABC #T1BUF ,CAR(RT) H H H H SIGNALS SIGNALS SIGNALS SIGNALS ;GO CLR THE "‘CAR’' AND °''BCR'' MEMORIES ;SELECT THE LINE L,POINT TO XMIT BUFFER CZDOWMN-D-0 CZONMD .P11 7251 7252 7253 7254 7255 7256 7257 7258 7259 7260 7261 7262 7263 7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278 7279 7280 7281 7282 7283 7284 7285 7286 7287 7288 MACY1] 30A(1052) 09-MAR-78 15:32 017110 017116 017124 012761 012761 013761 017132 017140 017144 017150 017152 017156 012737 005037 005761 001423 004737 000772 017160 017164 004737 016103 010102 062702 005004 004737 004537 030322 032376 017170 017172 017176 017200 017204 017210 017212 017214 017216 177400 073503 027314 000001 030352 000012 10-MAR-78 153 105711 100316 017224 017230 017232 017234 017240 017244 017250 017254 017256 017260 017262 004737 010102 011103 042703 113704 004737 004537 030322 032376 104026 000676 HALF PAGE 173 DUPLEX TEST - ALL nov mov mov #-400,BCR(R1) #73503,LPR(RT) LINMSK ,BAR(R1) ;XMIT 256(10) CHARS ;SET UP THE LINE PARAMETERS ;ACTIVATE THE SELECTED LINE 03C350 mov CLR TST #1,TIHEA TIRES BAR(R1) JINIT TIME A SINIT TIME B ;WAIT FOR XMITTR TO FINISH :BR IF XMITTR FINISHED ;CALL TIMER ;TIMER WILL MOVE RETURN PC AROUND 3s: 027016 027200 000012 000012 024416 024636 BEQ JSR BR 4%: 100000 030322 024416 024636 43 PC,TIMELY 3$ ;THIS BRANCH IF TIMEOUT OCCURS JSR MOV Mov ADD CLR JSR JSR LINE PC,SAPS BAR(R1) ,R3 R1,R2 #BAR ,R2 R4 PC,SUER2A R5,SUNUM ;SAVE THE ERROR PSW :GET THE WAS DATA ;SET UP REGADR ERROR BR 26 1$ ;BAR BIT FAILED TO CLEAR ON TIME ;GO TRY NEXT LINE 1ST8 BPL (R1) 1% ;CHAR AVAIL SET ?? ;BR [F NOT IT SHOULDN'T BE JSR Mov MoV PC,SAPS R1,R2 (R1) ,R3 ;SAVE THE ERROR PSW ;SET UP REGADR ;GET WAS DATA EM26+37 027200 SEQ 0171 SEQ 0170 SELECTED LINES 000010 000004 000012 104026 000720 017220 017222 08:05 B 14 BIC Mov8 JSR JSR LINE #BIT15,R3 LINE, RS PC,SUER2A R5,SUNUM EM26+37 ERROR 26 BR 1% ;SET UP NEW S/B DATA ;GO SET UP THE ERROR INFO ;PUT LINE NO. IN MESSAGE :CLEAR JUNK BIT ;SET UP S/8 DATA ;GO SETUP ERROR INFO ;PUT LINE NO. IN MSG sHALF DUPLEX FAILED TO BLIND RECVR ;GO SELECT NEXT LINE CZOHM-D-0 CZDHMD.P11 7289 7290 7291 7292 7293 7294 7295 7296 7297 7298 7299 7300 7301 7302 7303 7304 MACY11 30A(1052) 09-MAR-78 15:32 € 10-MAR-78 154 08:05 PAGE 174 VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES T T R 000004 RN TST54: -RERM T TR P T T T SR T Y VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES RN NN RN AR R AR E R R SRR L EENRAN RO AR ERENEARRROIROIRSE TEST ABSTRACT: 1222222222200 R4 ] THIS TEST VERIFIES THAT ""OVERRUN'' SETS PROPERLY FOR ALL LINES THAT ARE SELECTED FOR TEST WHEN THE OVERRUN CONDITION IS FORCED BY THE PROGRAM. THE TEST SFQUENCE IS AS FOLLOWS: 1. 2. SET UP THE ERROR LOOP RETURN SELECY A LINE NO. TO TEST - IF THE NEXT TEST. DONE ALL LINES 60 TO 3. PRIME THE SELECTED LINE TO XMIT 68. 7308 7309 7310 7311 7312 7313 7314 7315 7316 7317 7318 7319 7320 7321 7322 7323 7324 7325 6. ACTIVATE THE SELECTED LINE CHARS 5. WAIT FOR '‘XMIT DONE'' TO SET - IF TIMEOUT REPORT ERROR 7307 7. AND RESTART AT STEP 2 IF NO TIMEOUT READ 65. CHARS FROM THE SILO AND VERIFY THAT “'OVERRUN'' IS SET ON THE LAST WORD READ IF NOT REPORT ERROR AND RESTART AT STEP 2 ERRORS: s S 1. 2. A RSS2 ERROR ERROR SYNC: 50 56 M7277 IS CALLED TO REPORT *'XMIT DONE ‘' TIMEOUTS 1S CALLEDT TO REPORY '‘OVERRUN'® ERROR SH3 INIT A H EF2 TRAAY DEBUG: ARARRL 7326 7343 Ty SCOPE 4. 7344 T 4 7305 7306 7327 7328 7329 7330 7331 7332 7333 7334 7335 7336 7337 7338 7339 7340 7341 7342 I seTEST 54 017264 14 1. 1 FAULT APPEARS ON ONLY ONE LINE SUSPECT UART MODULE FOR THE APPROPRIATE LINE IN QUESTION. 2. IF FAULT APPEARS ON ALL LINES SUSPECT THE M7279 MODULE KEY LOGIC: |S2RR2222 221 M7279 SH1 MASTER OR H M7280 SH2 SH2-5 UC1 OR 2 MASTER OR EN2 UART PIN 15 (BUF OR LINE NN) MoV JSR BR #28,SLPERR PC,SELINE TST55 ;SET UP ERROR LOOP RETURN ;GO SELECT A LINE # TO TEST ;:BR IF DONc ALL SELECTED LINES movs LINE, (R1) ;SELECT THE LINE TO TEST SH2 £12-9 MEMORY CHIP (3341) E13-11 X 012737 004737 000512 012711 1371 017302 024544 004000 030322 001110 18: 2%: Mov #BIT11,(R1) ;CLEAR OUT THE DH! SEQ 0172 SEQ 0171 CZOMN-D-0 CIDHMD . P11 7345 7346 7347 7348 7349 7350 7351 7352 7353 7354 7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365 7366 7367 7368 7369 7370 7371 7372 7373 7374 7375 7376 7377 7378 7379 7380 7381 7382 7383 7384 7385 7386 7387 7388 7389 7390 MACY11 30A(1052) 09-MAR-78 15:32 10-%AR-7 8 15 4 08: 05 PAGE 175 D 14 VERIFY THAT OVERRUN CAN SET PROPERLY - ALL SELECTED LINES sSET UP CURRENT ADDRESS ;SET UP BYTE COUNT REG ;00 IT AT 9600 BAUD - 8 BITS 017312 017320 017326 017334 012761 012761 012761 013761 037312 177674 033503 027314 006006 000010 000004 000012 nov nov MoV nov #1BUF ,CAR(RT) 017342 017350 017354 017356 012737 005037 005711 000001 030350 MoV sINIT TIMERS A AND B 004737 000773 027016 #1,TINEA TIMEB (R1) 4% PC,TIMEIY 004737 027200 PC,SAPS 042703 077760 030322 ;GO SAVE PSW sGET THE WAS DATA sCLEAR UNINTERESTING BITS ;SET UP S/B DATA 017360 017364 017366 (17372 017374 017400 017404 077410 0i7412 017416 017422 017424 017426 017430 017432 017440 017444 017446 017452 017456 01746¢ 017466 017470 017472 017474 017500 017502 017506 017512 017516 017520 017522 017524 100425 011103 113704 052704 010102 004737 004537 030322 034254 030352 3%: JSR MoV BIC Movs 100000 BIS MoV 024416 024636 JSR JSR LINE EM50+53 104050 000721 012737 113704 000304 152704 052704 016103 005337 001373 020304 001700 004737 010102 062702 004737 004537 030322 034672 104056 000663 CLR 1§71 8nl JSR B8R 000101 030322 001204 4$: 000101 140000 000002 001204 027200 000002 024416 024636 5%: #-68. ,BCR(RY) #33503,LPR(RY) LINMSK ,BAR(R1) 3s (R1) ,R3 #77760,R3 LINE R4 #BIT15,R4 R1,R2 PC,SUER2A R5,SUNUN sACTIVATE THE SELECTED LINE ;TRANSRITTER 2ONE :BR IF YES ;CALL TIRER ;BR IF NO TIMEOUT ?? ;SET UP REGADR ;GO SET UP ERROR INFO ;PUT LINE NO. IN PESSAGE HEADER ERROR BR 50 ;REPORT XMIT DONE TIME OUT ;CO TRY NEXT LINE MoV MovB #65.,3THP1 ;SET UP TO READ 65. WORDS FROM SILO ;SET UP S/B DATA 1% LINE,R4 SWAB BISB BIS MoV DEC BNE CmpP BEQ R& #65. R4 #BIT15+BIT14 RS ;PUT JSR MOV ADD JSR JSR LINE PC,SAPS NRC(R1) ,R3 $TMP1 5% R3.R4 1% #NRC,R2 PC.,SUERZA R5.SUNUM EM56+42 ERROR 56 8R 1% IN OVERRUN AND VALID DATA BITS sGET WAS DATA FROM SILO s COUNT ONE WORD READ :BR TIL 65. READ ;WAS DATA AND OVERRUN CORRECT ?? ;BR IF YES TRY NEXT SELECTED LINE ;GO SAVE PSW sSET UP REGADR ;GO SET UP ERROR INFO ;GO PUT LINE NO. IN MSG HDR ;OVERRUN OR DATA INCORRECT ;GO TEST NEXT SELECTED LINE SEa 0173 SEQ 0172 (ZOHA-D-0 CZ0MMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 155 7391 7392 7393 7394 7395 7396 7397 7398 7399 7400 76401 7402 7403 7404 7405 7406 AR LAR AR AR ;oTEST 55 AR AR AR RS R SEQ 0174 SEQ 0173 Rl Rt RRTRs) ABBREVIATED MODEM CONTROL DIAGNOSTIC T T I T T 017526 TST55: 000004 -REM TEST SCOPE X ABSTRACT: 1222222202200 Q 2] AND ARE THE FOLLOWING & TESTS ARE EXTRACTED FROM DIDHK DIAGNOSTIC INSERTED HERE SO THAT ALL LEVEL CONVERTERS AND CABLES CAN BE CHECKED WITH JUST ONE PROGRAM (RATHER THAN TWO) USING THE H315 TURNAROUND CONNECTOR. CAN BE 7407 7408 7409 7410 7411 7412 76413 76414 THIS TEST VERIFIES THAT THE LINE ENABLE FUNCTION FLIP-FLOP SET AND CLEARED FOR THE SELECTED LINE. ERRORS 24 L2888 THE IF ANY ERRORS OCCUR IN THE FOLLOWING TESTS, MODEM CONTROL DIAGNOSYIC SHOULD BE RUN IN THEN DIDHK, ITS ENTIRETY FOR A MORE COMPLETE MODEM CONTROL CHECKOUT. 7415 7416 7617 7418 7419 7420 76421 7422 7423 7424 7425 7426 7427 7428 7429 7430 76431 7432 7433 7434 7435 7436 7437 7438 7439 7440 7441 7442 7443 7444 7445 7446 E 14 08:05 PAGE 176 ABBREVIATED MODEM C(ONTROL DIAGNOSTIC b4 017530 017536 017540 017544 017550 017556 017562 017566 017572 017600 017606 017612 017614 017616 017620 017624 017630 017632 017636 017644 017652 017656 017662 017670 017674 017700 017706 7712 017714 032777 001402 000137 012700 013737 006337 063700 011037 013737 062737 005737 001004 002000 020576 030144 030320 001202 001202 030310 030310 000002 030310 161402 001202 28: 030312 030312 005077 013737 042737 113701 010137 012777 012702 010177 012777 005077 005005 017704 #BIT10,aSWR 2% ;CHECK MODEM CONTROL? ;BRANCH IF YES. mov #OMADRS ,RO ;RO POINTS TO BEGINNING OF DM ADDRESS TABLE. JMP MoV ASL ADD MoV MoV 010452 030310 000340 030322 001206 002000 000020 010410 000001 010376 010372 001202 MUx11: 177776 013420 Mux118: DHMCSR,DHMLSR pOITN ;BRANCH IF YES. DHMCSR JMP JSR BR ENDA PC,SELINE 18156 CLR MOV dDHMCSR DHMCSR,$TMPO Movs MoV MOV LINE,R1 R1,8THP2 #CLRAUX ,3DHMCSR #340,PS :1S THERE A MODEM CONTROL HERE? :NO MODEM CONTROL FOUND. ;;BR :GET OUTTA HERE. ;GO SELECT A LINE. IF DONE ALL SELECTED LINES ;CLEAR CONTROL STATUS REGISTER ;SAVE DEVICE REGISTER FOR ERROR MESSAGE ;ENABLE INTERRUPTS ;SAVE LINE NUMBER fOR ERRGR MESSAGE Mov R1,3DHNMCSR sSELECT LINE TO Bt TESTED CLR aDHMCSR ;THE STEP BIT WILL BE USED TO FIND RIGHT LINE Mov 010404 ;DOUBLE TMPO ;CREATE AN OFFSET. ;MOVE THE DM ADDRESS INTO DHMCSR. BNE BIC MUXT1A: DHNUR,STHPO $THPO $TMPO,RO (RO) ,DHMCSR ;SAVE LINE STATUS REGISTER ADDRESS. TYPE DOIT11: ;OTHERWISE, GET OUT. #2 ,DHMLSR MSGS 020576 024544 ENDA ADD TST 104401 036216 000137 004737 000473 BIT BEQ CLR Mmov #LINENA ,3DHMLSR RS adDHML SR, R4 ;SET LINE ENABLE FUNCTION FLIP-FLOP ;READ LINE STATUS REGISTER CIDPHR-D-( CZOHMD.P11 7447 7448 7449 7450 7651 7452 7453 76454 7455 7456 7457 7458 7459 7460 7461 7462 7463 7464 7465 7466 7467 7468 7469 76470 7647 7472 017720 017724 017730 017732 017734 017740 017742 017744 017746 917750 017752 017760 017762 017764 017766 017772 017774 020000 020004 020006 020012 020014 020016 MACY11 30A(1052) 117703 010364 1/7760 09-MAR-78 15:32 042703 020103 001002 012705 10-MAR-78 755 104960 MUX11C: 105227 001375 017704 001704 104060 000702 010316 010312 000000 010300 010330 177 F 14 SEQ 0175 ABBREVIATED MODEM CONTROL DIAGNOSTIC aDHMCSR ,R3 SEQ 0174 JREAD CONTROL STATUS REGISTER BIC CMP BNE #177760,R3 R1,R3 MUX11¢ cmp BEQ BIT BNE ERROR RS ,R4 Mux110 R5,R4 Mux11D 6V .70 BE SET ; COMPARE EXPECTED AND RECE:VED JRESULTS ;TEST TO SEE IF THE LINE ENABLE BIT WAS SET ;IF SO, EVERYTHING IS OK ;INDICATE A MODEM CONTROL ERROR RS R1,3DHMCSR R1,R3 sSET LINE COUNTER TO SELECTED LINE 20 .4 ;DELAY FOR CABLE ;DITTO MoV 000001 000400 PAGE MOVB 020504 001403 030504 001001 052777 005302 001353 005005 010177 010103 005077 08:05 Mux11D: BIS DEC BNE CLR MUXT1F: MoV Mov #LINENA RS #STEP ,aDHMCSR R2 Mux118 CLR aDHMLSR Mov d0HMLSR R4 INCB BNE BEQ ERROR BR poITNM 60 DOITI ;CLEAR UNWANTED BITS ;IF LINE NUMBER=SELECTED LINE NUMBER, SEXCEPT LINE ENABLE FUNCTION FLIP FLOP ;EXAMINE NEXT LINE ;CLEAR LINE ENABLE FLIP FLOP SREAD LINE STATUS REGISTER ;WAS LINE ENABLE FUNCTION FLIP FLOP ;CLEARED ;MODEM CONRTROL ERROR ;DO THE NEXT LINE THAT IS SELE(CTED (IDHM-D-0 CZDHMD P11 7473 7474 7475 7476 7477 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 156 S*TEST 56 7504 7505 7506 7507 7508 7509 7510 751 7512 7513 7514 7515 7516 7517 7518 7519 7520 7521 7522 7523 7524 7525 7526 7527 7528 MODEM CONTROL DIUAGNOSTIC CONTINUED ;;tt..ittiffl"!'it"t'"'iQfitt'tt't't't't'.tl'tttt"t'tttt""t't 020020 T1ST156: 000004 -REM SCOPE 2 TEST ABSTRACT: 7479 7480 7481 7482 7483 7484 7485 7486 7487 7488 7489 7501 7502 7503 SEQ 0176 SEQ 0175 CONTINUED SoARNAEARRTERERANERSERELERRRACRNRASORORCCERORNCRRERAQOCRAQNONORRACROETROLTEOEORTY 76478 7490 7491 7492 7493 76494 7495 7496 7497 7498 7499 7500 6 14 08:05 PAGE 178 MODEM CONTROL DIAGNOSTIC 1SS842R22RE22 D2 IF THIS TEST VERIFIES THAT CLEAR TO SEND AND ""LINE ENABLE'® AND TERMINAL ARE SET FOR THE CARRIER ARE SELECTED LINE. SET ERRORS: AN DZDHK. 020022 020026 020032 020034 020040 020046 020052 020060 020064 020070 020074 020102 020106 020110 020114 020120 020124 020126 020130 020134 020136 020140 020142 020150 020152 020154 020160 020162 020166 020174 020200 020202 020206 020210 020212 020214 005077 004737 000471 005077 042737 113701 012777 010137 012702 010177 012777 005077 005005 017704 010250 000340 030322 002000 001206 000020 010214 000003 010202 042703 010176 010170 177760 012705 000143 117703 020103 001002 020405 001401 104060 052777 005302 001355 012705 010103 010177 062777 105227 001375 017704 020504 001704 104060 000702 X DOIT1S5: 010264 024544 177776 010230 010210 MUX15: MUX158: 000000 010104 (LR aDHML SR BR TSTS57 JSR 010140 MUX15D: MUX15E: 010116 RUN THE PC,SELINE MODEM CONTROL DIAGNOSTIC, sCLEAR LINE STATUS REGISTHR ;GO SELECT A LINE. ;:BR IF DONE ALL SELECTED LINES CLR aDHMCSR MoV #CLRMUX ,8DHMCSR SJRESET ALL Mov CLR CLR Mov Movs #LINENA+TRMRDY ,@DHMLSR SDHMCSR RS SDHMLSR R4 SDHMCSR,R3 ;SET LINE ENABLE +TRMRDY :CLEAR CONTROL REGISTER ;CLEAR EXPECTED RESULT ;READ LINE STATUS ;READ LINE NUMBER Mov #LINENA+TRMRDY+CO+CS, RS BIC Mmove 8IC CHP BNE 000001 010122 000002 ANY ERRORS OCCUR, Mov MUX15A: MOV mMov MUX15C: 000400 IF CMmP #340,PS LINE.RT R1,$TMP2 #16.,R2 R1,8DHMCSR #177760,R3 R1,R3 MUx15C R4 RS ;CLEAR CONTROL REGISTER ;ENABLE INTERRUPTS THE LINE STATUS REGISTERS ;SAVE LINE NBUMBER FOR ERROR MESSAGE ;16 LINES JSELECT A LINE s CLEAR UNWANTED BITS ;IF RECEIVED LINE=SELECTED LINE SEXPECT LINE ENABLE AND ;sCLEAR TO SEND AND CARRIER ARE SET . COMPARE EXPECTED AND BEQ ERROR MUX150 60 ;RECEIVED RESULTS -MODEM CONTROL ERROR BNE MoV MUX158 #LINENA,RS ;ARE NOT DONE FOR THIS LINE ;EXPECT LINE ENABLE BIS DEC MOV Mov BIC INCB BNE MOV CMP BEQ ERROR BR #STEP,aDHMCSR R2 R1,R3 R1,3DHMCSR #TRMRDY ,8DHMLSR #0 .~4 dDHMLSR R4 R5,R4 DOIT15 60 DOIT15 ;UPDATE LINE COUNTER ;CONTINUE IF ALL CHECKS ;ON SELECTED LINE ;SELECT LINE ;CLEAR TERMINAL ;DELAY FOR CABLE ;01770 sREAD LINE STATUS REGISTER ;ONLY LINE ENABLE SHOULD BE ;SET ON THIS LINE ;MODEM COMNTROL ERROR ;GO DO THE NEXT LINE (Z0HM-D-0 CZDHMD .P11 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 i57 H 14 08:05 PAGE 179 MODEM CONTROL DIAGNOSTIC CONTINUED 7529 IR 7530 ;oTEST S7 7531 7532 7533 7534 020216 000004 7540 ERRORS: 7541 7543 7544 7545 7562 7563 7564 7565 7566 7567 7568 7569 7570 7571 7572 7573 7574 7575 7576 7577 7578 7579 7580 7581 7582 7583 AR R R R RR A AR C RN TR ERARRANRANRNCRAOROERNNY THIS TEST VERIFIES THAT RING IS SET IF TO SEND ARE SET FOR THE SELECTED LINE. "LINE ENABLE'' AND TERERENRR 7542 7561 ARG RAORROARENS ISR 222 REQUEST 7555 7556 7557 7558 7559 7560 AN ER RN 1S157: SCOPE -REM 1 TEST ABSTRACT: 7536 7537 ;ggg 7547 7548 7549 7550 7551 7552 7553 7554 EA MODEM CONTROL DIAGNOSTIC CONTINUED DA AR 7535 75646 T RN PR RN LR R RN RN TR R R LR R R SE@ 0177 SEQ 0176 DZDHK. 020220 020226 020230 020232 020236 020244 020250 020254 020260 020264 020272 020276 020300 020306 020310 005077 004737 000466 005077 042737 113701 010137 012702 010177 012777 005077 005005 017704 117703 042703 020314 020316 020320 020103 001002 012705 020324 020326 020330 020332 020340 020342 020344 020350 020352 020356 020364 020370 020372 020376 020400 020402 020404 020405 001401 104060 052777 005302 001355 012705 010103 010177 042777 105227 001375 017704 020504 001707 104060 000705 1 010066 024544 DOIT16: 010052 000340 030322 001206 000020 MUX16: 010024 000005 010012 177775 MUX16A: 010020 010006 010000 177760 007750 000001 007714 (LR JSR BR CLR 8IC Move Mov MOV BIC MUX16C: 007732 00000¢ 000000 ANY ERRORS OCCUR, MOV MoV CLR MUX16B: CLR MoV MOVB 000205 000400 IF Mux16D: MUX16E: 007726 dDHMLSR PC,SELINE TST60 dDHMCSR #340,PS LINE,R1 R1,$TMP2 ’16.,R2 RUN THE ;:BR R1,3DHMCSR #LINENA+RS ,@DHMLSR 3DHMCSR RS @DHMLSR R4 8DHMCSR ,R3 #177760,R3 CHpP BNE MoV R1,R3 MUX16C #LINENA+RS+RING,RS CMP BEQ ERROR BIS DEC BNE MoV MOV MOV BIC INCB BNE MoV CMP BEQ ERROR BR R4 ,R5 MUX16D 60 #STEP,3DHMCSR R2 MUX16B #LINENA RS R1,R3 R1,3DHMCSR #RS,aDHMLSR #0 =4 @DHMLSR R4 R5,R4 DOIT16 60 DOIT16 MODEM CONTROL DIAGNOSTIC, IF ;CLEAR LINE STATUS REGISTER ;GO SELECT A LINE. DONE ALL SELECTED LINES :CLEAR CONTROL REGISTER :ENABLE INTERRUPTS ;SAVE LINE NBUMBER FOR ERROR MESSAGE ;16 LINES ;SELECT A LINE ;SET LINE ENABLE +RS ;CLEAR CONTROL REGISTER ;CLEAR EXPECTED RESULT ;READ LINE STATUS :READ LINE NUMBER ; CLEAR UNVANTED BITS ;1F RECEIVED LINE=SELECTED LINE ;EXPECT LINE ENABLE AND sRING IS SET ; COMPARE EXPECTED AND ;RECEIVED RESULTS ;MODEM CONTROL ERROR ;UPDATE LINE COUNTER sCONTINUE IF ALL CHECKS :ARE NOT DONE FOR THIS LINE ;EXPECT LINE ENABLE ;ON SELECTED LINE ;SELECT LINE ;CLEAR REQUEST TO SEND :DELAY FOR CABLE ;DITTO ;READ LINE STATUS REGISTER ;ONLY LINE ENABLE SHOULD BE :SET ON THIS LINE ;MODEM CONTROL ERROR ;G0 DO THE NEXT LINE ( [DHM-D=~0 D . PN CZ0HM 7584 7585 7586 7587 7588 7589 7590 7591 7592 7593 7594 7595 7596 7597 7598 7599 7600 7601 7602 7603 7604 7605 7606 7607 7608 7609 7610 7611 7612 7613 7614 7615 7616 7617 7618 7619 7620 7621 7622 7623 7624 7625 7626 7627 7628 7629 7630 7631 7632 7633 7634 7635 7636 7637 7638 7639 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 160 I 14 08:05 PAGE 180 MODEM CONTROL DIAGNOSTIC CONTINUED SEQ 0178 SEQ 0177 JoatmtttRRttERCRICRCERNRRERRORRRCRRCCRRORORRRORRAAARARGRROOARNORARROGOQORNTETYE s*TEST 60 MODEM CONTROL DIAGNOSTIC CONTINUED sovtNRERAARRIRRRALRRRCCROCAORROCRIRORNCECORRROCRARRROACROEOARORANRORORANCOOOY 020406 TST160: -REM 000004 SCOPE X TEST ABSTRA(T: IS8 8220RR802 02 THIS TEST VERIFIES THAT SECONDARY RECEIVE IS SET IF "LINE ENABLE'' AND SECONDARY TRANSMIT ARE SET FOR THE SELECTED LINE. ERRORS: TRAAARRAR DZDHK. 020410 020414 020420 020422 020426 020434 020440 020444 020450 020454 020462 020466 020470 020474 020500 020504 020506 020510 020514 020516 020520 020522 020530 020532 020534 020540 020542 020546 020554 020560 020562 020566 020570 020572 020574 005077 004737 000466 005077 042737 113701 010137 012702 010177 012777 005077 005005 017704 007662 000340 030322 001206 000020 007634 000011 007622 117703 042703 007616 007610 177760 001002 012705 000031 020103 X DOIT17: 007676 024544 177776 MUX17A: 007630 052777 005302 001355 012705 010103 010177 042777 105227 001375 017704 020504 001707 104060 000705 007524 8IC movse mov MOV MoV CLR MUX17B: CLR MoV movs Mov 007560 000001 007542 000010 000000 (LR JSR BR (LR Mov MUX17C: 000400 ANY ERRORS OCCUR, BIC Cmp BNE 020405 001401 104060 MUX17: IF MUx17D: MUX17E: 007536 CMP RUN THE aDHML SR PC,SELINE ;CLEAR LINE STATUS REGISTER. ;60 SELECT A LINE. aDHMCSR #340,PS ;CLEAR CONTROL REGISTER ;ENABLE INTERRUPTS R1,8TMP2 #16.,R2 R1,8DHMCSR ;SAVE LINE NBUMBER FOR ERROR MESSAGE ;16 LINES sSELECT A LINE aDHMCSR R5 SDHMLSR RS S8DHMCSR,R3 ;CLEAR CONTRCL REGISTER ENDA LINE ,R1 #LINENA+SECTX,aDHMLSR #177760,R3 R1,R3 MUX17C #LINENA+SECTX+SECRX,RS R4, RS BEQ ERROR Mux170 60 DEC BNE R2 MUX178 BIC INCB BNE mov CMP BEQ ERROR BR #SECTX,aDHMLSR #0 .~4 dDHMLSR R4 R5,R4 DOITY? 60 DOIT17 BIS Mov MOV Mov MODEM CONTROL DIAGNOSTIC, #STEP ,IDHMCSR #LINENA RS R1,R3 R1,3DHMCSR ;SET LINE ENABLE +SECTX ;CLEAR EXPECTED RESULT ;READ LINE STATUS ;READ LINE NUMBER ;CLEAR UNWANTED BITS ;IF RECEIVED LINE=SELECTED LINE SEXPECT LINE ENABLE AND ;SECONDARY RECEIVE IS SET ; COMPARE EXPECTED AND sRECEIVED RESULTS ;MODEM CONTROL ERROR ;UPDATE LINE COUNTER ;CONTINUE IF ALL CHECKS sARE NOT DONE FOR THIS LINE SEXPECT LINE ENABLE ;ON SELECTED LINE ;SELECT LINE :CLEAR SECONDARY TRANSMIT ;DELAY FOR CABLE :DITTO sREAD LINE STATUS REGISTER ;ONLY LINE ENABLE SHOULD BE ;SET ON THIS LINE ;MODEM CONTROL ERROR ;G0 DC THE NEXT LINE CZDHA-D-0 CZDHMD PN 7640 7641 7642 7643 7644 7645 7646 7647 7648 7649 7650 7651 7652 7653 7654 7655 7656 7657 7658 7659 7660 7661 7662 7663 7664 7665 7666 7667 7668 7669 7670 7671 7672 7673 7674 7675 7676 7677 7678 7679 7680 7681 7682 7683 7684 7685 7686 7687 7688 7689 7690 7691 7692 7693 7694 7695 020576 020600 020606 020612 020620 020626 020634 020640 020642 020650 020652 020656 MACY11 30A(1052) 09-MAR-78 15:32 000004 012737 005237 062737 062737 062737 006337 001410 033737 001752 105037 000137 000240 030320 000002 000002 000002 027306 027306 10-MAR-78 160 020662 J 14 08:05 PAGE 181 MODEM CONTROL DIAGNOSTIC ENDA: 030326 030330 030332 001102 002744 SCOPE Mov INC ADD ADD ADD ASL BEQ #240,3ECP DHNUN #2,ADPTR #2,VCPIR #2 ,BRPTR SELMSK $ECP :NOP THE SCOPE AT THE BEGINNING OF ;GENERATE NEW DH11 NUMBER ;UPDATE THE TABLE POINTERS 8EQ ENDA ;BR 8Iv 027310 .SBTTL SEQ 0179 SEQ 0178 (ONTINUED EOP JSHIFT MARKER TO TEST NEXT DHI ;BR IF TESTED ALL SELECTED DH11'S SELMSK,DHSEL ;1S THIS DH11 SELECTED ? CLRB $TSTNM JMP RSTRTA END OF PASS ROUTINE IF NOT ;INIT TEST NUMBER ;GO TEST THIS DH! R T T T e e SR R TR 2 ;*INCREMENT THE PASS NUMBER (SPASS) S«TYPE "'END PASS #XXXXX'' (WHERE XXXXX ;s*1F THERES A MONITOR GO TO I7 IS A DECIMAL NUMBER) ;*1F THERE ISN'T JUMP TO STARTZ 020662 020662 020664 020670 020674 020700 020706 020710 020712 020714 020716 020720 020722 020726 020732 020734 020740 020744 020746 020750 020752 020754 020756 020760 020760 020762 020764 020767 020774 021002 000004 005037 005037 005237 042737 005327 $EOP: 001102 001222 001240 100000 SCOPE CLR 001240 000001 003022 012737 000001 020710 104401 013746 104405 104401 013700 001405 000005 004710 000240 000240 000240 000137 €02640 377 015 050040 000043 SEOPCT: $SENDCT: 020767 001240 377 042412 051501 86T $DOAGN (PC)+,3(P()+ 1 ;sRESTORE TYPE ., SENDMG ::;TYPE ""END PASS #' . SENULL ;:60 TYPE~-~DECIMAL ASCI] s:TYPE A NULL CHARACTER .WORD MOV .WORD $EOPCT TYPDS TYPE $SENDAD: PC, (RO 000 042116 020123 SRTNAD: $ENULL: SENDMG: .SBTTL AN JMP .WORD .BYTE .ASCIZ JIYES $PASS,-(SP) af4é2 RO BEQ RESET JSR NOP NOP NOP ;;LERO THE NUMBER OF ITERATIONS ::; INCREMENT THE PASS NUMBER ;;DON'T ALLOW A NEG. NUMBER ;. L00P? 1 $GET42: MOV $DOAGN: ;s 1ERO THE TEST NUMBER STIMES $PASS #100000,8PASS (PC)+ MOV 020764 000042 $STSTNM CLR INC BIC DEC COUNTER ; ;SAVE SPASS FOR TYPEOUTY WITH SIGN ;;GET MONITOR ADDRESS $DOAGN ;;BRANCH IF NO MONITOR :;CLEAR THE WORLD ;:G0 TO MONITOR 5 SAVE ROOM ;s FOR S ACTN al(PC)+ ; ;RETURN START? -1,-1,0 ;:NULL CHARACTER STRING <15><12>/END PASS #/ SCOPE HANDLER ROUTINE AR R R AN AR Rt AR AR R RN RN R AR NN RA RN RN ;*THIS ROUTINE CONTROLS THE LOOPING OF SUBTESTS. IT WILL INCREMENT ;*AND LOAD THE TEST NUMBER(STSTNM) INTO THE DISPLAY REG.(DISPLAY<7:0>) ;*AND LOAD THE ERROR FLAG (SERFLG) INTO DISPLAY<15:08> CZDHR-D-0 CZOHMD P11 MACY11 30A(105¢) 09-MAR-78 15:32 10-MAR-78 7707 7708 7709 7710 771 7712 7713 7714 7715 7716 7717 7718 7719 7720 7721 7722 7723 7724 7725 7726 7727 7728 7729 7730 7731 7732 7733 7734 7735 7736 7737 7738 7739 7740 7741 7742 7743 7744 7745 7746 7747 7748 7749 7750 7751 PAGE ;*THE ;*CALL I $SCOPE: 021024 104407 005037 013701 032777 001114 021026 000416 021030 021034 021042 021046 021052 021054 021056 021062 021064 021064 021072 013746 012737 005737 012637 000463 022626 012637 000423 000004 021054 177060 000004 032777 001404 127737 001465 105737 001421 123737 101015 032777 001404 013737 000446 105037 005037 000415 032777 001011 000400 160046 160040 001102 021016 021074 021102 021104 021110 021112 021120 021122 021130 021132 021140 021142 021146 021152 021154 021162 021164 021170 021172 021176 021204 021206 021214 021222 021226 021234 021240 021244 021250 005737 001406 005237 023737 002024 012737 013737 105237 113737 011637 011637 005037 112737 160114 1%: $XTSTR: 5%: 000004 001103 (KSWR CLR MOV BIT BNE 001115 001103 001000 160010 001110 001106 001103 001222 001240 001104 001222 000001 021272 001102 001102 001106 001110 001224 000001 7%: 4% 157756 BR 3%: 001104 001222 001236 001115 L INE DHADR R1 #BIT14,aSUWR SOVER CODE 63 FOR THE XOR @#ERRVEC,-(SP) MOV TST MOV BR #5% ,@#ERRVEC an177060 (SP)+ ,S#ERRVEC $SVLAD MOV (SP)+,3#ERRVEC cmpP (SP)¢+,(SP)+ BR 7% BIT BEQ CMPB BEQ TST8 BEQ CMPB BHI BIT BEQ #B1T708,3SWR 23 OSWR,STSTNM $SOVER SERFLG 38 SERMAX ,SERFLG 3% #BIT09,aSWR 43 B8R $OVER MOV CLRB (LR BR BIT BNE TST 001104 OF 6S:; MRRNNEND OF 2%: ARE: ::SCOPE=]0T SCOPE MOV 000004 THIS ROUTINE INAIBIT ITERATIONS LOOP ON ERROR LOOP ON TEST IN SWR<7:0> JHMRANSIART 004000 SEQ@ 0180 SEQ 0179 LOOP ON TEST ;eSW11=1 ;+SW09=1 ;*SW08=1 030322 027302 040000 14 SWITCH OPTIONS PROVIDED BY ;eSU14=1 021004 021004 021006 021012 K 182 SCOPE HAMDLER ROUTINE 7696 7697 7€98 7699 7700 7701 7702 7703 7704 7705 7706 08:05 BEQ INC cmp BGE 1%: MOV MOV $SVLAD: INCB MOVB MOV MoV CLR MOVB CODE FOR THE SLPERR,SLPADR SERFLG STIMES 1% #B8IT11,aSuR 1% $PASS 13 $ICNT STIMES,SICNTY $SOVER #1,SICNT SMXCNT,STIMES $TSTNM $STSTNM,STESTN (SP),SLPADR (SP),SLPERR SESCAPE #1,SERMAX FOR CHANGE iN SOFT-SWR ;;TEST JINIT THE LINE NO. TO ZERO ;SET UP DEVADR IN R1 ;:LOOP ON PRESENT TEST? JIYES IF SW14=1 TESTERNEANN ::1F RUNNING ON THE ''XOR'' TESTER CHANGE ;:THIS INSTRUCTION TO A ''NOP'" (NOP=240) ;:SAVE THE CONTENTS OF THE ERROR VECTOR ::SET FOR TIMEOUTY ;:TIME OUT ON XOR? ;:RESTORE THE ERROR VECTOR ;:60 TO THE NEXT TEST ;;CLEAR THE STACK AFTEK A TIME OuT ;;RESTORE THE ERROR VECTOR ;;LO0P ON THE PRESENT TEST XOR TESTERSNNNN ;:LOOP ON SPEC. TEST? ;:BR IF NO :sON THE RIGHT TEST? ;:BR IF YES s :HAS AN ERROR OCCURRED? ;:BR IF NO ;:MAX. ERRORS FOR THIS SWR<7:0> TEST OCCURRED? ;:BR IF NO ::LOOP ON ERROR? ;:BR IF NO 2:SEY LOOP ADDRESS TO LAST SCOPE ;;LERC THE ERROR FLAG ;:CLEAR THE NUMBER OF ITERATIONS TO MAKE ;;ESCAPE TO THE NEXT TEST ;s INHIBIT ITERATIONS? ;:BR IF YES 1F FIRST PASS OF PROGRAM ;3 INHIBIT ITERATIONS b ;; INCRERENT ITERATION COUNT :;CHECK THE NUMBER OF ITERATIONS MADE ;:BR IF MORE ITERATION REQUIRED ::REINITIALIZE THE ITERATION COUNTER ;:SET NUMBER OF ITERATIONS TO DO ;;COUNT TEST NUMBERS $:SET TEST NUMBER IN APT MAILBOX ::SAVE SCOPE LOOP ADDRESS :;SAVE ERROR LOOP ADDRESS ;s CLEAR THE ESCAPE FROM ERROR ADDRESS ;;ONLY ALLOW ONE(1) ERROR ON NEXT TEST (ZDHM-D-0 CZOHMD.P11 7752 7753 7754 7755 7756 7757 7758 7759 7760 7761 7762 7763 7764 7765 7766 7767 7768 7769 7770 7771 7772 7773 7774 7775 7776 [4aa4 7778 7779 7780 7781 7782 7783 7784 7785 7786 7787 7788 7789 7790 7791 7792 7793 7794 7795 7796 7797 7798 7799 7800 7801 7802 7803 7804 7805 7806 7807 021256 021264 021270 021272 MACY11 30A(1052) 013777 013716 000002 000010 001102 001106 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 183 SCOPE HANDLER ROUTINE 157656 SOVER: SMXCNT: .SBTTL MOV MoV RTI L 14 SEQ 0181 SEQ 0180 STSTNP,IDISPLAY $LPADR, (SP) 10 ERROR HANDLER ROUTINE ;;DISPLAY TEST NUMBER ;;FUDGE RETURN ADDRESS ;.FIXES PS J:MAX. NUMBER OF ITERATIONS ;;tl'tttttt"'lt'tt't't'tttttt'ttt'lt'itttt'tttt'fiti!i't"'t'ttttt s*THIS ROUTINE WILL INCRERENT THE ERROR FLAG AND THE ERROR COUNT, ;*SAVE THE ERROR ITEM NUMBER AND THE ADDRESS OF THE ERROR CAtL :*AND GO TO SERRTYP ON ERROR ;*THE SWITCH OPTIONS PROVIDED BY THIS ROUTINE ARE: ;*SW15=1 HALT ON ERROR ;*SW13=1 ;*SW09=1 :*CALL i* 021274 021274 021276 021302 021304 021312 021316 021322 021330 021336 021344 021346 021352 021356 021356 021364 021366 021374 021400 021401 021402 021404 021410 021612 021414 021416 021424 021426 021432 021436 021440 021444 021444 021452 021454 021456 021456 104407 105237 001775 013777 005237 011637 162737 117737 032777 001004 004737 104401 122737 001007 113737 004737 000 000 000777 005777 100002 000000 104407 032777 001402 013716 005737 001402 013716 022737 001001 000000 000002 $ERROR: 001103 001102 001112 001116 000002 157562 020000 7%: 157630 000001 001252 001114 022566 021400 20%: 218: 22$: 157530 2s: 157514 3s: 001110 001224 43 001224 s 020750 ERROR N CKSWR INCB BEQ MoV INC MOV SuB Move ;s TEST FOR CHANGE IN SOFT-SWR ::SET THE ERROR FLAG 7% ;:DON'T LET THE FLAG GO TO ZERO STSTNM ADISPLAY ;;DISPLAY TEST NUMBER AND ERROR FLAG SERTTL ;s INC THE ERROR COUNT (SP) ,SERRP( ;:GET ADDRESS OF ERROR INSTRUCTION #2,3ERRPC @SERRPC,SITEMB ;;STRIP AND SAVE THE ERROR ITEM CODE TYPE LSCRLF BIT BNE JSR 021460 001227 001000 INHIBIT ERROR TYPEQOUTS LOOP ON ERROR 6%: .SBTTL SERFLG #BIT13,aSWR 208 PC,SERRTYP :;SKIP TYPEOUT IF SET ;:SKIP TYPEOUTS ;:G0 TO USER ERROR ROUTINE (MPB BNE MOVB JSR .BYTE .BYTE #APTENV,SENV 28 $ITEMB,218 PC.SATYS 0 0 ;;RUNNING IN APT MODE :;NO,SKIP APT ERROR REPORT ;;SET ITEM NUMBER AS ERROR NUMBER ;;REPORT FATAL ERROR TO APT TST BPL HALT aSWR 3s ; sHALYT ON ERROR ::SKIP IF CONTINUE ;sHALT ON ERROR! B8R CKSWR 22% BIT #BI709,aSuWR TST SESCAPE BEQ MOV BEQ MOV CmpP 000042 ; sERROR=EMT AND N-ERROR ITEM NUMBER BNE HALT 48 $LPERR, (SP) 5% SESCAPE,(SP) #SENDAD 3442 63 ::APT ERROR LOOP ;:;TEST FOR CHANGE IN SOFT-SWR ;:LOOP ON ERROR SWITCH SET? ::BR IF NO :;FUDGE RETURN FOR LOOPING ;:CHECK FOR AN ESCAPE ADDRESS ;:;BR IF NONE ;:FUDGE RETURN ADDRESS FOR ESCAPE :sACT=11 AUTO-ACCEPT? ; :BRANCH IF NO 2 YES RTI :sRETURN ERROR MESSAGE TYPEOUT ROUTINE CIDHP-D-0 CZDHMD PN 7808 7809 7810 7811 7812 7813 7814 7815 7816 7817 7818 7819 7820 7821 7822 7823 7824 7825 7826 7827 7828 7829 7830 7831 7832 7833 7834 7835 7836 7837 7838 7839 7840 7841 7842 7843 7844 7845 7846 7847 7848 7849 7850 7851 7852 7853 7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 MACY11 30A(1052) 09-MAR-78 15:32 LIRS 10-MAR-78 08:05 PAGE 184 ERROR MESSAGE TYPEOUT ROUTINE IR N N AR RN RN PR SEQ 0182 SEQ 0181 TR T PR E NN RO AR R E R EN T RRAR AR ENERE ;*THIS ROUTINE USES THE '"ITEM CONTROL BYTE'' (SITEMB) TO DETERMINE WHICH :*ERROR IS TO BE REPORTED. [T THEN OBTAINS, FROM THE '‘ERROR TABLE'' (SERRTB), ;*AND REPORTS THE APPROPRIATE INFORMATION CONCERNING THE ERROR. 021460 021460 021464 021466 021470 021474 010046 005000 153700 001004 021476 013746 021502 021504 021506 021510 021512 021514 021516 021522 021526 021530 021532 104402 000426 021534 021540 021544 021546 021550 021552 021556 021560 021562 021564 021570 021572 021572 021574 021576 021600 021602 021606 021610 104401 005300 006300 006300 006300 062700 012037 001404 104401 000000 104401 012037 001404 104401 000000 104401 011000 001004 012600 104401 000207 013046 104402 005710 001770 104401 000771 020040 021614 001227 SERRTYP: TYPE Mov CLR BISB BNE 001114 MOV 001116 TYPOC 1$: 001356 021532 001227 021550 001227 001227 2%: 3s: 4% 5%: 6$: 7 000 8s: .SBTTL ;:"'CARRIAGE RETURN'' & ''LINE FEED" RO a#SITEMB,RO 1 ;sPICKUP THE ITEM INDEX $ERRPC,-(SP) B8R 6% mMov (R0O)+,2$8 DEC ASL ASL ASL ADD BEQ TYPE LWORD TYPE MOV BEQ TYPE WORD TYPE mov BNE MOV TYPE RTS mov 021610 LSCRLF RO.,-(SP) TYPOC TST BEQ TYPE BR JASCIZ RO RO RO RO #SERRTB,RO 3s ;:SAVE RO ;:;1F ITEM NUMBER IS 2ERO, JUST ::;TYPE THE PC :;SAVE SERRPC FOR TYPEOUT OF THE ERROR ; ;ERROR ADDRESS ::G0 TYPE--OCTAL ASCIICALL ;:GET QUY DIG!TS) ;;ADJUST THE INDEX SO THAT IT WILL M WORK FOR THE ERROR TASLE ;;FORM TABLE POINTER ;:PICKUP ‘'ERROR MESSAGE'® POINTER O .SCRLF (RO) ,RO 7% (SP)+,R0 LSCRLF J:SKIP TYPEOUT IF NO POINTER ;:TYPE THE "'ERROR MESSAGE'’ ::"ERROR MESSAGE'' POINTER GOES HERE ::""CARRIAGE RETURN'' & '"LINE FEED"’ ;:PICKUP "'DATA HEADER'® POINTER ;:;SKIP TYPEQUT IF O ;s TYPE THE ''DATA HEADER' ;:"'DATA HEADER'® POINTER GOES HERE ;:""CARRIAGE RETUARN'" & '"LINE FEED'' ;:PICKUP "'DATA TABLE'' POINTER ::G0 TYPE THE DATA :;RESTORE RO ::"'"CARRIAGE RETURN'® & "'LINE FEED' a(RO) ¢+, -(SP) :;SAVE 8(RO)+ FOR TYPEOUT O LSCRLF (RO)+,48 5% PC (RO) 6% ,8% 7% [/ / .EVEN BINARY TO OCTAL (ASCII) 2 :RETURN ;:G0 TYPE-~OCTAL ASCIICALL DIGITS) ;:1S THERE ANOTHER NUMBER? ;:BR IF NO ;:TYPE TWO(2) SPACES ;:LO0P ::TWO(2) SPACES AND TYPE ;,'tttt*tti't'i*"t'ti*'t't'i'if'iiiti (232223333323 3323332323228822230} :*«THIS ROUTINE IS USED TO CHANGE A 16-BIT BINARY NUMBER TO A 6-DIGIT ;*OCTAL (ASCII) NUMBER AND TYPE IT. ;+$TYPOS---ENTER HERE TO SETUP SUPPRESS ZEROS AND NUMBER OF DIGITS 10 TYPE ;«CALL: . M M ;Y MoV TYPOS .BYTE .BYTE NUM,-(SP) N L] ;;NUMBER TO BE TYPED ;;CALL FOR TYPEOUT ;:N=1 TO 6 FOR NUMBER OF DIGITS TO TYPE ;M1 0RO LIDHM-D=0 CZ0HMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 N 14 10-MAR-78 08:05 PAGE 185 BINARY TO OCTAL (ASCII) AND TYPE 7864 SEQ 0183 SEQ 0182 o % ;:1=TYPE LEADING ZEROS ;ggg M ::0=SUPPRESS LEADING ZEROS 7867 7868 7869 7870 ;g;; ;*S$TYPON=----ENTER HERE TO TYPE OUT WITH THE SAME PARAMETERS AS :x$TYPOS OR S$TYPOC :*CALL: st nov NUM,-(SP) ::NUMBER T0 BE TYPED M TYPON ;sCALL FOR TYPEOUT iR THE LAST bR4 7873 7874 7875 ;g;g :«$TYPOC~---ENTER HERE FOR TYPEOUT OF A 16 BIT NUMBER ;*CALL: o% MOV NUM, - (SP) ; ;NUMBER TO BE TYPED o TYPOC ;s CALL FOR TYPEOUT 7878 7879 7880 7881 7882 7883 7884 7885 7886 7887 021614 021620 021626 021632 021636 021640 021646 021654 021662 021664 017646 116637 112637 062716 000406 112737 112737 112737 010346 010446 7889 7890 7891 7892 7893 7894 7895 7896 7897 7898 7899 7900 7901 021670 021674 021676 021702 021706 021712 021716 021720 021722 021724 021726 021730 021732 113704 005404 062706 110437 113704 016605 005003 006105 000404 006105 006105 006105 010503 7903 021736 105337 022040 021744 042703 177770 021754 021756 001403 005204 7888 7902 7904 7905 7906 7907 7908 7909 7910 7911 7912 7913 7914 7915 7916 7917 7918 7919 (021666 021734 021742 021750 021752 021760 021764 021770 021774 022000 022004 022006 022010 022012 022014 010546 006103 100016 001002 005704 052703 052703 110337 104401 105337 003347 002402 005204 000744 012605 000000 000001 022041 (00002 000001 000006 000005 022037 022037 022041 022036 $TYPOS: MOV mOVB MOVvB ADD BR S$TYPOC: MOVB Mova STYPON: MOVB MoV Mov 000006 022040 022037 000012 1$: 2%: 022034 022034 022036 :;PICKUP THE MODE ;:LOAD ZERO FILL SWITCH ;;NUMBER OF DIGITS TO TYPE ;;ADJUST RETURN ADDRESS MCVB NEG ADD Move Move MOV CLR ROL BR ROL ROL ROL MOV $OMODE+1,R4 R4 #6,R4 R4, SOMODE SOFILL,R4 12(SP),RS R3 RS 3s RS RS RS R5,R3 ;:GET THE NUMBER OF DIGITS TO TYPE DECB $OMODE MOV 022041 000060C 000040 3(SP),-(SP) 1(SP),$0FILL (SP)+,SOMODE+1 #2,(SP) STYPON #1,80FILL #6,$0MODE +1 #5,80CNT R3,-(SP) R4 ,-(SP) LS ¥ ROL BPL 5%: 7%: 6%: 7% ;.BR BEQ INC 5% R #'0,R3 £ ,R3 R3,8% ,8% $OCNT % 6% R4 MOVB TYPE DECB BGT BLT INC BR Mov ;sSUBTRACT IT FOR MAX. ALLOWED ;:SAVE 1T FOR USE ;:GEY THE 2ERO FILL SWITCH ;:PICKUP THE INPUT NUMBER ;. CLEAR THE OUTPUT WORD ; ;ROTATE MSB INTO *'C'* ;.60 DO MS8 ;.FORM THIS DIGIT ;;GET LSB OF THIS DIGIT #177770,R3 BIS BIS ::SAVE RS R3 BIC BNE TST 4%: RS5,=-(SP) 5:SET THE 2ERO FILL SWITCH ;:;SET FOR SIX(6) DIGITS ;:SET THE ITERATION COUNT ;;SAVE R3 ;:SAVE R4 4% R4 2% (SP)+,RS ;s TYPE THIS DIGIT? IF NO ;;GET RID OF JUNK ;:TEST FOR O ;;SUPPRESS THIS 0? ;:;BR IF YES ::DON'T SUPPRESS ANYMORE 0°'S ;sMAKE THIS DIGIT ASCII ::MAKE ASCII IF NOT ALREADY ;:SAVE FOR TYPING ; ;GO TYPE THIS DIGIT ; ;COUNT BY 1 ;:;BR IF MORE T0 DO ;:BR IF DONE ;s INSURE LAST DIGIT ISN'T A BLANK ;;G0 DO THE LAST DIGIT : ;RESTORE RS 7920 7921 7922 7923 7924 7925 7926 7927 7928 7929 7930 7931 7932 7933 7934 7935 7936 7937 7938 7939 7940 7941 7942 7943 7944 7945 7946 7947 7948 7949 7950 7951 7952 7953 7954 7955 7956 7957 7958 7959 7960 7961 7962 7963 7964 7965 7966 7967 7968 7969 7970 9N 7972 7973 7974 7975 022016 022020 022022 022030 022032 022034 022035 022036 022037 022040 MACY11 30A(1052) 09-MAR-78 15:32 012604 012603 016666 012616 000002 000 000 000 000 000000 200002 10-MAR-78 08:05 PAGE BINARY TO OCTAL mov MOV mov mov RTI 000004 8s: .BYTE .BYTE .BYTE .BYTE $OCNT: SOFILL: : $OMODE .SBTTL PN L e .WORD e R SEQ 0184 SEQ 0183 (ASCII) AND TYPE (SP)+, R4 (SP)+ ,R3 2(SP) ,4(SP) (SP)+,(SP) CONVERT BINARY ;*THIS ROUTINE B 15 186 OO0OOO CZOHR-D-0 CZOHRD.P11 ; ;RESTORE R4 ;;RESTORE R3 ;sSET THE STACK FOR RETURNING s ;RETURN ;:STORAGE FOR ASCl1] DIGIT ;;TERMINATOR FOR TYPE ROUTINE ;:0CTAL DIGIT COUNTER ;s ZERO FILL SWITCH ;s NUMBER OF DIGITS TO TYPE TO DECIMAL AND TYPE ROUTINE T g e Ry S R R e Lttt it IS USED TO CHANGE A 16-BIT BINARY NUMBER TO A S-DIGIT ;*SIGNED DECIMAL (ASCII) NUMBER AND TYPE IT. DEPENDING ON WHETHER THE ;*NUMBER [S POSITIVE OR NEGATIVE A SPACE OR A MINUS SIGN WILL BE TYPED ;*BFFURE THE FIRST DIGIT OF THE NUMBER. LEADING ZEROS WILL ALWAYS BE ;*REPLACED WITH SPACES. s*CALL: . . % 022042 022042 022044 022046 022050 022052 022054 022060 022064 022066 022070 022076 022100 022104 022110 022112 022116 022120 022122 022124 022126 022130 022132 022134 022136 022140 022142 022144 022152 022156 022162 022164 022166 022172 $TYPDS: 010046 010146 010246 010346 010546 012746 016605 100004 005405 112766 005000 012703 112723 005002 016001 160105 020200 000020 000055 000001 022256 000040 2$: 022246 3s: 002402 005202 000774 060105 005702 001002 105716 4%: 100407 106316 103003 116663 052702 052702 110223 005720 020027 002746 1%: 5%: 000001 000060 000040 000010 177777 6%: 7%: MOV TYPDS - (SP) NUM, MoV Mmov mov Mov Mov mMov mov BPL NEG movs RO,-(SP) R1,-(SP) R2,~-(SP) R3,-(SP) RS5,=-(SP) #20200,-(SP) CLR Mov move CLR MoV suB BLT INC BR ADD 18T BNE TS1B BMI ASLB B8CC MovB BIS BIS MovB TST cMP BLY 20(SP) RS 1% RS #'-,1(SP) RO #$DBLK ,R3 #' (R3¢ R2 $OTBL(RO) .R R1.,RS 43 R? 3s R2 5% (SP) 7% (SP) 63 1(SP),=1(R3) #'0,R2 # _R2 R2,(R3)+ (RO) ¢+ RO.#10 2% ;sPUT THE BINARY NUMBER ON ;:60 TO THE ROUTINE THE STA(K ;;PUSH RO ON STACK ::PUSH R1 ON STACK ;:PUSH R2 ON STACK ::PUSH R3 ON STACK ::PUSH R5 ON STACK 2:SET BLANK SWITCH AND SIGN ;:GET THE INPUT NUMBER ;;BR IF INPUT IS POS. :;MAKE THE BINARY NUMBER POS. ;:MAKE THE ASCII NUMBER NEG. ;. ZERO THE CONSTANTS INDEX ::SETUP THE OUTPUT POINTER ssSET THE FIRST CHARACTER TO A BLANK ;:CLEAR THE BCD NUMBER ;.GET THE CONSTANT :.FORM THIS BCD DIGIT ;:BR 1F DONE ;- INCREASE THE BCD DIGIT BY 1 ;;ADD BACK THE CONSTANT ;s CHECK IF BCD DIGIT=0 ::FALL THROUGH IF O ;:STILL OOING LEADING 0°S? ;:BR IF YES ::ASD? ;:BR IF NO :;YES~=SET THE SIGN ;:MAKE THE BCD DIGIT ASCI! 2:MAKE 1T A SPACE IF NOT ALREADY A DIGIT ;:PUT THIS CHARACTER IN THE OUTPUT BUFFER :3JUST INCREMENTING ;;CHECK THE TABLE INDEX ;:G0 DO THE NEXT DIGIT (ZDOHM-~D-0 CZDHMD.P11 7976 7977 7978 7979 7980 7981 7982 7983 7984 7985 7986 7987 7988 7989 7990 7991 7952 7993 7994 7995 7996 7997 7998 7999 8000 8001 8002 8003 8004 8005 8006 8007 5008 8009 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 022174 022176 022200 022202 022204 022206 022214 022216 022220 022222 022224 022226 022230 022234 022242 022244 022246 022250 022252 022254 022256 MACY11 30A(1052) 09~MAR-78 15:32 003002 010502 006764 105726 100003 116663 105013 012605 012603 15 10-MAR-78 08:05 PAGE 187 CONVERT BINARY TO DECIMAL AND TYPE ROUTINE 8%: 177777 177776 022256 000002 000004 9%: 012602 012601 012600 104401 016666 012616 000002 023420 0C1750 000144 sOoTBL: 000012 000004 $DBLK: .SBTTL SEQ 0185 SEC 0184 BGT MoV BR TSTB BPL 8% RS.R2 63 (SP)+ 9% ;.60 TO EXIT ::GET THE LSD ;:G0 CHANGE TO ASCII J:WAS THE LSD THE FIRST NON-ZERQ? ;:BR IF NO CLRB MoV MoV MoV MOV MOV (R3) (SP)+,RS (SP)+,R3 (SP)+ ,R2 (SP)+,R1 (SP)+ RO J:SET :;POP ::sPOP ;;POP J:POP ;.POP MovB TYPE MOV MOV RT1I 10000. 1000. 100. 10. =-1(SP) ,~2(R3) . SDBLK 2(SP),4(SP) (SP)+, (SP) ;J:YES-=SET THE SIGN FOR TYPING THE TERMINATOR STACK INTO RS STACK INTO R3 STACK INTO R? STACK INTO R1 STACK INTO RO ;:NOW TYPE THE NUMBER ;sADJUST THE STACK ;sRETURN TG USER .BLKW 4 TYPE ROUTINE ;;tttttt't"f (222332232323222234342222432223232322322223328 32322222 J*ROUTINE TO TYPE ASCIZ MESSAGE. MESSAGE MUST TERMINATE WITH A O BYTE. ;*THE ROUTINE WILL INSERT A NUMBER Of NULL CHARACTERS AFTER A LINE FEED. ;eNOTE1: SNULL CONTAINS THE CHARACTER TO BE USED AS THE FILLER CHARACTER, s *NOTEZ: ;*NOTE3: SFILLS CONTAINS THE NUMBER OF FILLER CHARACTERS REQUIRED. SFILLC CONTAINS THE CHARACTER TO FILL AFTER. ;t J*CALL: ;*1) USING A TRAP INSTRUCTION :.OR ;t i* ) TYPE +MRESADR JsMESADR IS FIRST ADDRESS OF AN ASCIZ STRING STPFLG 1% ::1S THERE A TERMINAL? ;:BR IF YES 33 ;s LEAVE TYPE MESADR ;t 022266 022272 022274 022276 022300 022302 022306 022314 022316 022324 022326 022332 022336 022340 022346 022350 022352 022354 105737 100002 000000 000430 010046 017600 122737 001011 132737 001405 010037 004737 000000 132737 001003 112046 001005 005726 001157 $TYPE: TST8B 8PL HALT 1%: 000002 000001 001252 000100 001253 022336 022556 000040 0012535 61$: 62%: 2%: BR MoV MoV {nPB8 BNE BITB BEQ MOV JSR .WORD BITB BNE Mov8 BNE TST RO,~(SP) 82(SP),R0O #APTENV,SENV 62% #APTSPOOL ,$ENVM 623 RO,61% PC,SATY3 O #APTCSUP,SENVM 60% (RO)+,-(SP) 43 (SP)+ JoHALT HERE IF NO TERMINAL ::SAVE RO ::GET ADDRESS OF ASCIZ STRING ::RUNNING IN APT MODE ;:NO,GO CHECK FOR APT CONSOLE ;;SPOOL MESSAGE TO APT ;sNO,GO CHECK FOR CONSOLE 3 :SETUP MESSAGE ADDRESS FOR APT ;:SPO0OL MESSAGE TO APT ; sMESSAGE ADDRESS ::APT CONSOLE SUPPRESSED ;3YES,SKIP TYPE OUT :;PUSH CHARACTER TO BE TYPED ONTO STACK ;:BR IF IT ISN'T THE TERMINATOX ;:1F TERMINATOR POP IT OFF THE STACK (ZDHR-~D~0 CZDHMD . P11 8032 8033 8034 8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047 8048 8049 3050 8051 8052 8053 8054 8055 8056 8057 2058 8059 8060 8061 8062 8063 8064 8065 8066 8067 8Cs8 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079 8080 8081 8082 8083 8084 8085 8086 8087 022356 022360 022364 022366 022372 022374 022400 022402 022404 022406 022410 022414 022416 022422 022426 022430 022434 022440 022442 022446 022452 MACY11 30A(1052) 09-MAR-78 15:32 012600 062716 000002 122716 001430 122716 001006 005726 10-MAR-78 08:05 PAGE TYPC ROUTINC 000002 60%: 3%: 000011 (% : 000200 104401 001227 105037 000755 004737 123726 001350 013746 105366 002770 004737 105337 000770 022544 022500 001156 5%: 6%: 001154 7%: 022500 022544 SEQ 0186 SEQ 0185 ; ;RESTORE RO (SP)+ RO r2,(SP) MOV ADD RTI CHPB ;;ADJUST RETURN PC ;s RETURN JsBRANCH IF <HT> #HT, (SP) 8s BEQ ChPB BNE TSTY TYPE $CRLF CLRB BR JSR {mPB BNE ; ;BRANCH IF NOT <(CRLF> #CRLF, (SP) 5% (SP)+ <CR><LF> EQUIV ;.POP CR AND LF A TYPE ;s ;s CLEAR CHARACTER COUNT ::GET NEXT CHARACTER ::G0 TYPE THIS CHARACTER ;o 1S IT TIME FOR FILLER CHARS.? ::1F NO GO GET NEXT CHAR. ;:GET # OF FILLER CHARS. NEEDED :;AND THE NULL CHAR. ::DOES A NULL NEED TO BE TYPED? ::BR IF NO--GO POP THE NULL OFF OF ;.60 TYPE A NULL ;D0 NOT COUNT AS A COUNT ;.L00P SCHARPCNT 23 PC,STYPEC SFILLL,(SP)+ 2% $NULL,~(SP) MOV 000001 D15 188 1(SP) 6% DECB BLT JSR DECB BR PC,STYPEC SCHARCNT 7% STACK ;HORIZONTAL TAB PROCESSOR 022454 022460 022464 022472 022474 022476 022500 022504 022506 022514 022522 022524 022530 022532 022540 022542 022544 022546 022550 022556 022564 022566 022574 022574 022576 022600 022604 112716 004737 132737 001372 000040 022500 000007 8$%: 022544 005726 000724 105777 100375 116677 122766 001003 105037 000406 122766 001402 105227 000000 000207 112737 112737 000403 112737 010046 010146 105737 001450 156444 000002 000015 156436 000002 022544 000012 000002 9%: JSR BITB BNE TST BR $TYPEC: TSTB BPL MOVB CMPB BNE CLRB BR 1%: CMPB BEQ INCB $CHARCNT : .WORD $TYPEX: RTS .SBTTL APT PR AAAR AR 00C001 000001 023014 023012 SATY1: 000001 023014 $ATY4: SATY(: 023012 MOVB $ATY3: MOVB MOVB BR MOVB Mov Mov TST8 BEQ s ;REPLACE TAB WITH SPACE # ,(SP) PC,STYPEC #7.,8CHARCNT ;s TYPE A SPACE ; ;BRANCH IF NOT AT ;:TAB STOP ::POP SPACE OFF STACK s;GET NEXT CHARACTER s;WALT UNTIL PRINTER IS READY Ss (SP)+ 23 asTPS STYPEC 2(SP),a81PB ::LOAD CHAR TO BE TYPED INTO DATA REG. ;oIS CHARACTER A CARRIAGE RETURN? ; ;BRANCH [F NO ::EE?;-CLEAR CHARACTER COUNT ;o EX ;1S CHARACTER A LINE FEED? : ;BRANCH IF YES #CR,2(SP) 1% SCHARCNTY S$TYPEX #LF ,2(SP) $STYPEX (PC)+ ;s COUNT THE CHARACTER ; CHARACTER COUNT STORAGE 0 PC COMMUNICATIONS ROUTINE RARRRARdat iRl #1,8FFLG #1,8MFLG SATY( #1,8FFLG RO,~-(SP) R1,-(SP) SMFLG 5% e lie ittt sttt Rttt it ;:70 REPORT FATAL ERROR ;70 TYPE A MESSAGE ;.TO ONLY REPORT FATAL ERROR ;;PUSH RO ON STACK :;PUSH R1 ON STACK ;s SEOULD TYPE A MESSAGE? BR IF NOT: ;s its] CZOWM-D-0 CZDHNMD P11 8088 8089 8090 8091 8092 8093 8094 8095 8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 OO0~ b b d e D d b b — — d d b e b ©0 0o 0o Co Oo GO 0o GO 8106 8107 022606 022614 022616 022624 022626 022632 022640 022644 022646 022652 022654 022656 022662 022664 (122670 022676 022700 022706 022714 022720 022724 022726 022726 022732 022734 022740 022742 022746 022750 022756 022764 022770 022774 023000 023004 023006 023010 023012 023013 023014 E 15 MACY11 30A(1052) 122737 000001 001252 000100 001253 09-MAR-78 15:32 001031 132737 001425 017600 062766 005737 001375 010037 105720 001376 163700 006200 010037 012737 000413 017637 062766 013746 004737 000000 105737 001416 005737 001413 005737 001375 017637 062766 005237 105037 105037 105037 012601 012600 000207 000 000 000 023016 000200 000001 000100 000040 000004 000002 001232 10-MAR-78 08:05 PAGE 189 APT COMMUNICATIONS ROUTINE 000004 001246 1%: 2%: 001246 001250 000004 000004 000002 177776 022266 001232 022724 000004 3%: g:: 023014 10%: 001252 001232 000004 000002 001232 023014 023013 023012 118%: 001234 000004 12%: (MPB BNE 8ITB 8EQ MoV #APTENV,SENV 3s #APTSPOOL ,SENVM 3% @4 (SP) RO ; ;OPERATING UNDER APT? ;:1F NOT: BR ; ;SHOULD SPOOL MESSAGES? ::1F NOT: BR ;;GET MESSAGE ADDR. TST BNE MoV TSTB BNE SuB ASR MOV ngv SMSGTYPE 1% RU, $MSGAD (RO)+ 2% $MSGAD,RO RO RO, SMSGLGT g:,SHSGTYPE ;;SEE IF DONE W/ LAST XMISSION? soIF NOT: WAST ;;PUT ADDR IN MAILBOX ;:FIND UND OF MESSAGE a4 (SP) 4% #2,4(SP) 177776 ,~(SP) PC,STYPE ;. PUT MSG ADDR IN JSR LINKAGE ;:BUMP RETURN ADDRESS ;:PUSH 177776 ON STACK ::CALL TYPE MACRO ADD B MoV ADD MOV JSR #2.,4(SP) :;BUMP RETURN ADDR. ;:;SUB START OF MESSAGE ;:GET MESSAGE LNGTH IN WORDS ;;PUT LENGTH IN MAILBOX ;i TELL APT TO TAKE MSG. .WORD O TSTB $SFFLG : :SHOULD REPORT FATAL ERROR? TST SMSGTYPE ;+FINISHED LAST MESSAGE? BEQ TST BEQ 12% SENV 12% BNE MOV ADD INC CLRB CLRB CLRB 118 84 (SP) ,SFATAL #2,4(SP) $MSGTYPE $FFLG SLFLG SMFLG RTS .BYTE PC 0 MOV MoV $MFLG: S$LFLG: $FFLG: SEQ 0187 SEQ 0186 (SP)+ R (SP)+ RO .BYTE 0 .BYTE 0 .EVEN APYSIZE=200 APTENV=001 APTSPOOL=100 APTCSUP=040 LSBTTL TTY INPUT ROUTINE ::1F NOT: BR ; ;RUNNING UNDER APT? ;:IF NOT: BR ;o 1F NOT: WAIT ;;GET ERROR # ;:BUMP RETURN ADDR. ;:TELL APT YO TAKE ERROR ;;CLEAR FATAL FLAG :;CLEAR LOG FLAG ;s CLEAR MESSAGE FLAG ;;POP STACK ;:POP STACK INTO R1 INTO RO ;s RETURN ;s MESSG. FLAG ;;LOG FLAG ;sFATAL FLAG :"ti"'ttit'ttt'ttttttt'ttt'tt'i"i't'it"'tttttfitttttit"ttttt'i .ENABL LS8 ",'t.ttitttt"'t'fii’i"tiif"i'i'tttfitt'tii'tfittfittt't'ttttill'tti' ;*SOFTWARE SWITCH REGISTER CHANGE ROUTINE. JYROUTINE IS ENTERED FROM THE TRAP HANDLER, AND WILL J*SERVICE THE TEST FOR CHANGE IN SOFTWARE SWITCH REGISTER TRAP CALL 023016 022737 000176 001140 ;*WHEN OPERATING S$SCKSWR: CMP IN TTY FLAG MODE. #SWREG, SWR ;1S THE SOFT-SWR SELECTED? (ZDHM-D-0 CZDHMD . P11 8144 023024 MACY11 30A(1052) 09-MAR-78 15:32 001074 105777 10-MAR-78 TTY 8145 8146 8147 8148 8149 8150 8151 8152 023026 023032 023034 023040 023044 023050 023052 023060 100071 117746 042716 022726 001062 123727 001456 8154 8155 8156 8157 023062 023066 023072 023076 023100 023104 023106 023110 023114 104401 104401 013746 104402 104401 005046 005046 105777 100375 023707 023116 023122 117746 042716 156024 177600 023126 023132 023134 023140 023144 021627 001005 104401 062706 000757 000025 9%: 023664 000006 20%: 023146 021627 001022 005766 001403 016677 062706 104401 123727 001003 012777 000002 004737 021627 002420 021027 000015 : 108 8153 8158 8159 8160 8161 8162 8163 8164 8165 8166 8167 8168 8169 8170 8171 8172 8173 8174 8175 B176 8177 8178 8179 8180 8181 8182 8183 8184 8185 8186 8187 8188 8189 8190 8191 8192 8193 8194 8195 8196 8197 8198 8199 023152 023154 023160 023162 023170 023174 023200 023206 023210 023216 023220 023224 023230 023232 023236 023240 023244 023250 023252 023254 023256 023260 023264 003015 042726 005766 001403 006316 006316 006316 005266 056616 08:05 INPUT ROUTINE 156112 156106 177600 000007 001134 000001 023671 023676 000176 $GTSWR: 19%: 156030 7%: 000004 000002 000006 001227 001135 000001 000100 155726 022500 000060 000067 000060 000002 000002 177776 17%: 190 F 15 SEQ 0188 SEQ 0187 BNE TSTB 8PL MOVB BIC CMpP BNE CMPB BEC 15% 1 3¢ 15% a8TKkB,~(SP) # C177,(SP) #7,(SP)+ 15% #1 $AUTOB, 15% ; ;BRANCH IF NO ;s CHAR THERE? ;;1F NO, DON'T WAIT AROUND ;:SAVE THE CHAR ;:STRIP-OFF THE ASCII ;15 1T A CONTROL G? ;:NO, RETURN TO USER ;:ARE WE RUNNING IN AUTO-MODE? ;;8RANCH IF YES TYPE TYPE MOV TYPOC TYPE CLR CLR TST8 BPL .SCNTLG . SMSWR . SMNEW -(SP) -(SP) as$TKs 7% ;;ECHO THE CONTROL-G ( G) ;:TYPE CURRENT CONTENTS ;s SAVE SWREG FOR TYPEOUT ::GO TYPE--OCTAL ASCII(ALL DIGITS) ; ;PROMPT FOR NEW SWR s+ CLEAR COUNTER ;: THE NEW SWR ;s CHAR THERE? 1F NOT TRY AGAIN ;. mMovB 8IC a$TKB,-(SP) # C177,(SP) CMP BNE TYPE ADD BR (SP),#25 108 CMp BNE TST BEQ MoV ADD TYPE CMPB BNE MOV RT1 JSR CMpP BLY CMP BGT BIC TS1 BEG 155750 PAGE ASL ASL ASL INC BIS SWREG,-(SP) LSCNTLU #6,SP 19% (SP),#15 16$ 4 (SP) 118 2(SP) ,aSwWR #6,SP +SCRLF M SINTAG, 158 #100,3%7KS PC,.STYPEC (SP),#60 18% (SP),#67 18% #60, (SP)+ 2(SP) 17% (SP) (SP) (SP) 2(SP) =2(SP),(SP) . ::P1CK UP CHAR ;;MAKE IT 7-BIT ASCII ;:1S 1T A CONTROL-U? : ;BRANCH IF NOT ;:YES, ECHO CONTROL-U ( W) ; : IGNORE PREVIOUS INPUT ;:LET'S TRY IT AGAIN 5018 IT A <CR>? ; ;BRANCH IF NO ;;YES, IS IT THE FIRST CHAR? ; cBRANCH IF YES ;s SAVE NEW SWR ;;CLEAR UP STACK ::ECHO <CR> AND <LF> ;RE~ENABLE TTY KBD INTERRUPTS? :;BRANCH IF NOT JsRE-ENABLE YTY KBD INTERRUPTS ;;RETURN ;;ECHO CHAR ;;CHAR < 0? ;;BRANCH [F YES :;CHAR > T? ;;BRANCH IF YES ::STRIP-OFF ASCII ;1S THIS THE FIRST CHAR ;;BRANCH IF YES ;. NO, SHIFT PRESENT CHAR OVER TO MAKE H FOR NEW ONE. ROOM H ;:KEEP COUNT OF CHAR ;:SET IN NEW CHAR (IDHM-D-0 CZDHMD P11 8200 8201 8202 8203 8204 8205 8206 8207 8208 8209 8210 8211 8212 8213 8214 8215 8216 8217 8218 8219 8220 8221 8222 8223 8224 8225 8226 8227 8228 8229 8230 8231 8232 8233 8234 8235 8236 8237 8238 8239 8240 8241 8242 8243 8244 8245 8246 8247 8248 8249 8250 8251 8252 8253 8254 8255 023270 023272 023276 MACY11 50A(1052) 09-MAR-~78 15:32 000707 104401 000720 10-MAR-78 TTY 001226 G 15 08:05 PAGE 191 INPUT ROUTINE 18%: .DSABL SEQ 0189 SEQ 0188 B8R 7% ;:GET THE NEXT ONE BR 20% ::SIMULATE TYPE LSB . SQUES ;i VTYPE 2<CR><LF> CONTROL-U ;;tttttttttt"tttttttitt‘tttt"ttt'ttt"tttttttitttttttttt"ttttt ;*THIS ROUTINE ;«CALL: 023300 023302 023310 023314 023316 023324 023332 023340 023342 023346 023350 023354 023360 023364 023366 023370 023376 023400 023406 023410 023416 011646 016666 105777 100375 117766 042766 026627 001013 105777 100375 117746 042716 022627 001366 000750 026627 002407 026627 003003 042766 000002 000004 155630 000002 155624 177600 000004 000004 000023 000C04 000004 000175 000040 000004 SINGLE CHARACTER FROM THE TTY ;INPUT A SINGLE CHARACTER FROM THE ;sCHARACTER IS ON THE STACK J:WITH PARITY BIT STRIPPED OFF $RDCHR: MOV (SP),-(SP) ;;PUSH DOWN THE PC 1%: TST8 BPL MOVB BIC cmp asTKS 1% a%TKB,4(SP) ;:WAIT FOR J:A CHARACTER ;;READ THE TTY k$ 1 asTkKsS ; sBRANCH IF NO ;;WAIT FOR A CHARACTER MOV BNE TISTB 8PL MOoV8 000140 A RDCHR RETURN HERE 155572 177600 000021 000004 INPUT ot . ® Pt 2$: 155576 WILL 3s%: 4%: BIC CMp ONE BR cmp SLT cmp BGT BIC RTI 4(SP),2(SP) # C<177>,4(SP) 4(SP) ,#23 2% as$TkB,-(SP) # C177,(SP) (SP)+ 221 2s 18 4(SP),,140 43 4(SP),#175 43 #40,4(SP) :sSAVE TTY THE PS ;;GET RID OF JUNK IF ANY ::1S IT A CONTROL=-S? ;:LOOP UNTIL 1TS THERE ::GET CHARACTER J:MAKE IT 7-BIT ASCII ;IS IT A CONTROL-Q? ::1F NOT DISCARD 1IT ;:YES, RESUME ;3 1S 17 UPPER CASE? :;BRANCH IF YES ;:IS 1T A SPECIAL CHAR? :;BRANCH [F YES ;sMAKE IT UPPER CASE 5 ;60 BACK TO USER ;"'ttttii'ti"tt'fitttttt"ttttttttt'tt"tttttflttttttttfittttt*tttt ;*THIS ROUTINE WILL ;*CALL: 023420 023422 023424 023430 023434 023436 023440 023442 023446 023450 023452 023454 023462 023466 010346 005046 012703 022703 101456 104410 112613 122713 001022 005716 001007 112737 104401 012716 023654 023664 000134 023652 1727777 H it ;¥ RDLIN RETURN HERE ;s INPUT A STRING FROM THE TTY ;;ADDRESS OF FIRST CHARACTER WILL BE ON THE STACK ;; TERMINATOR WILL BE A BYTE OF ALL 0°'S $RDLIN: MOV (LR R3,-(SP) -(SP) ;s SAVE R3 ;:CLEAR THE RUBOUT KEY CMpP #STTYIN+8. RS ;;BUFFER FULL? 1%: 2%: 000177 108: 023652 INPUT A STRING FROM THE TTY MOV BLOS RDCHR MOVB (MPB BNE TST BNE MovB TYPE MoV #STTYIN,RS 43 (SP)+,(R3) #177,(R3) 5% (SP) 63 ¥ 98 ,9% #-1,(SP) ;:GET ADDRESS ;;BR IF YES ;:60 READ ONE CHARACTER FROM THE ;:GET CHARACTER ;218 IT A RUBQUT ;.BR IF NO :: 1S THIS THE FIRST RUBOUT? ;:BR IF NO ;;TYPE A BACK SLASH ;:SET THE RUBOUT KEY TTY - (ZDHM-D-0 CZDHMD. PN 8256 8257 8258 8259 8260 8261 8262 8263 8264 8265 8266 8267 8268 8269 8270 8271 8272 8273 8274 8275 8276 8277 8278 8279 8280 8281 8282 8283 8284 8285 8286 8287 8288 8289 8290 8291 8292 8293 8294 8295 8296 8297 8298 8299 8300 8301 8302 8303 8304 8305 8306 8307 8308 8309 8310 83n MACYT1 30A(1052) 09-MAR-78 15:32 023472 023474 023500 023502 023506 023512 023514 023516 023520 023526 023532 023534 005303 020327 103434 111337 104401 000746 005716 001406 112737 104401 005016 122713 000025 023542 104401 023664 122713 001011 105013 104401 104401 000717 104401 000712 111337 104401 122723 001305 105063 104401 005726 012603 000022 023540 001003 023546 023550 023554 023556 023560 023564 023570 023572 023576 023600 023604 023610 023614 023616 023622 023626 023630 023632 023634 023642 023650 023652 023653 023654 023664 023671 023676 023704 023707 023714 000726 011646 016666 012766 000002 000 000 000010 052536 136 005015 020075 040 036440 10-MAR-/8 TTY 08:05 FPAGE 192 INPUT ROUTINE 6%: 023654 5%: 000134 023652 023652 BS: 001227 023654 4%: 023652 023652 000015 3% 177777 001230 023654 TYPE BR .98 2% ;:60 TYPE ;:G0 READ ANOTHER MOovVB ¢ TS7 BEQ CLR 000002 000004 (R3).9% (SP) 7% ,9% 9% ;:SETUP TO TYPEOUT THE DELETED CHAR. (HAR. ;;RUBOUT KEY SET? ;:BR IF NO ;:TYPE A BACK SLASH (SP) ;;CLEAR THE RUBOUT KEY 8% LSCNTLU ;:BR IF NO ;s TYPE A CONTROL ''U” CMPB BNE CLRB #22,(R3) 3s (R3) ;1S CHARACTER A '" R'7? ;;BRANCH [F NO ;;CLEAR THE CHARACTER TYPE LSTTYIN ;:TYPE ,$QUES 1% iTYPE A ' ;. CLEAR THE BUFFER AND LOOP (mMPB BNE TYPE BR BR TYPE BR MOVB #25,(R3) 1% ,$CRLF 2% (R3).,9% TYPE CMPB BNE .98 015 (R3)+ 2% TST (SP)+ CLRB TYPE 9%: 005015 006507 053523 000 047040 000040 ::BACKUP BY ONE ;:STACK EMPTY? ;:BR IF YES TYPE 001226 000004 R3 R3,#STTYIN 43 TYPE 7%: SEQ 0190 SEQ 0189 DEC L pP 8LO mOoV8 023652 023652 H 15 -1(R3) LJSLF ;; 1S CHARACTER A CTRL U? ::G0 START OVER J;TYPE A 'CR B ''LF" THE INPUT STRING ;:G0 PICKUP ANOTHER CHACTER ;;ECHO THE CHARACTER ;:;CHECK FOR RETURN ;.LO0P IF NOT RETURN ;;CLEAR RETURN (THE 15) ;. TYPE A LINE FEED ;;CLEAN RUBOUT KEY FROM THE STACK MoV MOV MOV MOV (SP)+,R3 (SP) ,-(SP) 4(SP),2(SP) #STTYIN,4(SP) 0 ;s STORAGE FOR ASCII CHAR. TO TYPE 0 ;: TERMINATOR 8. ;;RESERVE 8 BYTES FOR TTY INPUT /7 U/<15><12> ;;CONTROL "'V 7/ 6/<15><12> ;;CONTROL ''G" <15><12>/SWR = / / RTI ;RESTORE R3 ;ADJUST THE STACK AND PUT ADDRESS OF : FIRST ASCII CHARACTER ON IT s s RETURN 000 000012 020122 S$STTYIN: $CNTLU: SCNTLG: SMSWR: .BYTE BYTE .BLKB .ASCIZ .ASCIZ _ASCIZ 053505 SMNEW: _ASCIZ .SBTTL READ AN OCTAL NUMBER FROM THE NFAAAAARAARARRE THE NEW =/ ARttt ittt TTY ittt it ittt ot s ;*THIS ROUTINE WILL READ AN OCTAL (ASCII) NUMBER FROM THE TTY AND J*CHANGE IT TO BINARY. ;«THE INPUT CHARACTERS WILL BE CHECKED TO INSURED THEY ARE LEGAL ;*OCTAL DIGITS. IF AN ILLEGAL CHARACTER IS READ A '"?"" WILL BE TYPED ;*FOLLOWED BY A CARRIAGE RETURN-LINE FEED. THE COMPLETE NUMBER MUST ;*THEN BE RETYPED. THE INPUT IS TERMINATED BY TYPING A CARRIAGE RETURN. s*CALL: M A RDOCT RETURN HERE ::READ AN OCTAL NUMBER ;;LOW ORDER BITS ARE ON TOP OF THE STACK (ZDHM-D-0 CIZDHMD . P11 8312 8313 8314 8515 8316 8317 8318 8319 8320 8321 8322 8323 8324 8325 8326 8327 8328 8329 8330 8331 8332 8333 8334 8335 8336 8337 8338 8339 8340 8341 8342 8343 8344 8345 8346 8347 8348 8349 8350 8351 8352 8353 8354 8355 8356 8357 8358 8359 8360 8361 8362 8363 8364 8365 836¢ 8367 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE READ AN OCTAL 193 NUMBER 15 I FROM THE .t 023720 023722 023730 023732 023734 023736 023740 023742 023746 023750 023752 023754 023756 023762 023764 023770 023772 023774 023776 024000 024002 024004 024006 024012 024014 024016 024020 024024 024030 024032 024034 024036 024040 024042 024044 024046 024050 024054 024056 011646 016666 010046 000004 010146 010246 104411 012600 010037 005001 005002 112046 001420 122716 003026 122716 002423 006301 006102 006301 006102 006301 006102 042716 062601 000756 005726 010166 010237 012602 012601 012600 000002 005726 105010 104401 000000 104401 000730 000000 000002 $RDOCT: 1%: 024046 2%: 000060 000067 177770 000012 024056 3%: 001226 ;:HIGH ORDER BITS ARE MOV MoV MOV MOV (SP),-(SP) 4(SP),2(SF) RO,-(SP) R1,-(SP) MOV R2.,-(SP) /DL IN MOV MOV CLR CLR (SP)+ R0 RO,5% R1 R2 BEQ CMPB 86T CMPB BLT ASL ROL 3 #'0,(SP) 48 #'7,(5P) 4% R1 R? ROL ASL ROL BIC ADD BR R2 R1 R2 # (7,(5P) (SP)+,R1 23 Mov R1.,12(SP) MOVB (RO)+,=-(SP) IS8T MOV MOV MOV MOV AN S%: $HIOCT: .SBTTL SEQ 0191 SEQ 0190 TTY RT1 TST .WORD TYPE BR .WORD R ;:READ AN ASCIZ LINE ;;GET ADDRFSS OF ST ;sAND SAVE IT ;. CLEAR DATA WORD CHARACTER ;:PICKUP THIS CHARACTER ;. 1F ZERO GET OuT ;sMAKE SURE THIS CHARACTER ;:1S AN OCTAL DIGIT vl ;. *8 R2,$HIOCT (SP)+,R? (SP)+ R1 (SP)+ RO ;:POP STACK INTO R2 ;.POP STACK INTO R1 ;;POP STACK INTO RO R A ; :RETURN ;;CLEAN PARTIAL ;. TYPE O .SQUES 1% 0 R ;SAVE THE RESULT FROM STACK ;;SET A TERMINATOR UP THRU THE BAD C(HAR. J:UT R ROLET ;s TRY AGAIN ;sHIGH ORDER BITS GO HERE TRAP DECODER AR AR ;:PUSH R2 ON STACK (SP)+ (RO) TYPE THE ;:STRIP THE ASCI] JUNK ;:ADD IN THIS DIGIT ;. LOOP ;;CLEAN TERMINATOR FROM STACK (SP)+ CLRB ::PROVIDE SPACE OR ;s INPUT NUMBER ;;PUSH RO ON STACK ;;PUSH R1 ON STACK IN SHIOCT RNt R AR R A AR NN R RN AR AR AR R AR RO N RRRY ;*THIS ROUTINE WILL PICKUP THE LOWER BYTE OF THE °''TRAP'' INSTRUCTION ;*AND USE IT TO INDEX THRQUGHM THE TRAP TABLE FOR THE STARTING ADDReSS ;*0F THE DESIRED ROUTINE. THEN USING THE ADDRESS OBTAINED IT WILL ;*G0 TO THAT ROUTINE. 024060 024062 024066 024070 024072 024074 024100 010046 016600 005740 111000 006300 016000 000200 000002 024114 $TRAP: MOV RO,-(SP) ;s SAVE RO 1§71 mMovs ~(RO) (RO),RO ; ;BACKUP BY 2 ;;GET RIGHT BYTE OF MoV ASL Mov RTS 2(SP),RO RO $TRPAD(RO) ,RO RO ;:GET TRAP ADDRESS ;;POSITION FOR ;;INDEX TO TABLE ;:G0 TO ROUTINE TRAP INDEXING (ZDHM-D-~0 CZDHMD PN 8368 8369 8570 8371 8372 8373 8374 8375 8376 8377 8378 8379 8380 8381 8382 8383 8384 8385 8386 8387 8388 8389 8390 8391 8392 8393 8394 8395 8396 8397 8398 8399 8400 8401 8402 8403 8404 8405 8406 8407 8408 8409 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 8420 8421 8422 8423 024102 024104 026112 MACY11 30A(€1052) 09-MAR-78 15:32 011646 016666 000002 000004 10-MAR-78 08:05 TRAP DECODER 000002 PAGE ;:THIS IS USE $TRAP2: MOV .SBTTL TRAP TABLE s*THIS TO HANDLE THE CONTAINS THE SEQ 0192 SEQ 0191 "'GETPRI'' MACRO (SP) ,~(SP) 4 (SP),2(SP) mov RT!I TABLE J 15 194 ;:MOVE STARTING ;*BY THE "'TRAP'' INSTRUCTION. THE PC DOWN ;;MOVE THE PSW DOWN s ;RESTORE THE PSW ADDRESSES OF THE ROUTINES CALLED ROUTINE 024114 024116 024120 024122 024124 024126 024102 022266 021640 021614 021654 022042 $TYPE $TYPOC $TYPOS $TYPON $TYPDS 024130 023066 $GTSWR 026132 024134 024136 024140 023016 023300 023420 023720 $CKSWR ;s CALL=CKSWR TRAP+7(104407) $RDCHR ;s CALL=RDCHR TRAP+10(104410) SROLIN s s CALL=RDLIN TRAP+11(104411) $RDOCT s : CALL=ROOCY TRAP+12(104412) POWER DOWN AND UP ROUTINES .SBTTL R 024142 024150 024156 024160 024162 024164 024166 024170 024172 024176 024202 024210 024212 012737 012737 010046 010146 010246 010346 010446 010546 017746 010637 012737 000000 024306 000340 000024 000026 MOV Mov Mov Mov Mov Mov ) Mov MOV MoV HALT 000024 000776 012737 013706 005037 005237 001375 012677 012605 012604 BR 024306 024312 024312 024312 154674 000024 TRAP+1(104401) TRAP+2(104402) TRAP+3(104403) TRAP+4 (104404) TRAP+5(104405) TTY TYPEOUT ROUTINE TYPE OCTAL NUMBER (WITH LEADING ;s CALL=GTSWR TRAP+6(104406) GET SOFT-SWR SETTING TEST FOR CHANGE IN SOFT-SWR TTY TYPEIN CHARACTER ROUTINE TTY TYPEIN STRING ROUTINE READ AN OCTAL NUMBER FROM TTY EARA AR AR #S$1LLUP @#PWRVEC ;;SET FOR FAST UP #340,8#PURVEC+2 ;;PRIO:7 RO,-(SP) ::PUSH RO ON STACK R1,-(SP) ;;PUSH R1 ON STACK R2,-(SP) ::PUSH R2 ON STA(CK R3,~(SP) ;;PUSH R3 ON STACK R&,-(SP) ;;PUSH R4 ON STACK RS,=(SP) ;:PUSH R5 ON STACK aSWR,~(SP) ;sPUSH @SWR ON STACK SP,$SAVRé ;s SAVE SP #S$PURUP ,3#PWRVEC ;;SET UP VECTOR .~ ARAR ARttt ; s HANG UP Rttt ettt Rs ittt ittt ;POWER UP ROUTINE $PWRUP: 1%: MOV Mov CLR INC BNE Mov MOV Mov #SILLUP,3#PWJRVEC ;,;SET FOR FAST DOWN $SAVRG,SP ::GET SP $SAVRS ::WAIT LOOP FOR THE TTY $SAVRG 1% (SP)+,aSWR (SP)+,RS (SP)+,R4 ZEROS) TYPE OCTAL NUMBER (NO LEADING ZEROS) TYPE OCTAL NUMBER (AS PER LAST CALL) TYPE DECIMAL NUMBER (WITH SIGMN) AR AAARARRARRL ARttt iRt sttt ittt it tldd) Mov 154742 024312 024214 ;s CALL=TYPE ;s CALL=TYPOC s s CALL=TYPOS ;s CALL=TYPON ;s CALL=TYPDS ;POWER DOWN ROUTINE SPWRDN: R 024214 024222 024226 024232 024236 024240 024244 024246 AR $TRAP? ;sWALIT FOR THE INC ;.0 WORD ;:POP STACK INTO aSWR :;POP STACK INTO RS :;POP STACK INTO R4 i sl ) CZOHM-0-0 CZDHAD.P11 8424 8425 8426 8427 8428 8429 8430 8431 8432 8433 8434 8435 8436 8437 8438 8439 8440 8441 024250 024252 024254 024256 024260 024266 024274 MACY11 30A(1052) 09-MAR-78 15:32 012603 012602 012601 012600 012737 012737 104401 024142 000340 K 15 10-MAR-78 08:05 PAGE 195 POWER DOWN AND UP ROUTINES 000024 000026 024314 012716 002744 000002 000000 000776 024276 024300 024302 024304 024306 024310 024312 024314 024322 000000 005015 000122 047520 024324 004737 027244 SPWRMG: $PWRAD: $ILLUP: 042527 $SAVR6: SPOWER: SEQ 0193 SEQ 0192 nov mov MoV MoV Mov Mov TYPE (SP)+,R3 ;:POP STACK INTO R3 (SP)+,R2 ;;POP STACK INTO R? (SP)+,R1 ;:POP STACK INTO R (SP)+,R0 ;:POP STACK INTO RO FSPWRDN,@#PWRVEC ;;SET UP THE POWER DOWN VECTOR #340,3#PURVEC+2 ;;PRIO:7 .WORD $POWER (PC)+, (SP) RSTRTA Mov -WORD RTI HALT BR 0 .2 LASCI2 <15><12>"'POWER"’ .EVEN JSR PC,DCACHE ;REPORT THE POWER FAILURE ; sPOWER FAIL MESSAGE POINTER J;RESTART AT RSTRTA :sRESTART ADDRESS ;; THE POWER UP SEQUENCE WAS STARTED ;; BEFORE ;. PUT THE ;DISABLE THE POWER DOWN WAS COMPLETE SP HERE CACHE ;;++D (ZDHM-D-0 CZDHMD . P11 8442 8443 8444 8445 8446 8447 8448 8449 8450 8451 8452 8453 8454 8455 8456 8457 8458 8459 8460 8461 8462 8463 8464 8465 8466 8467 8468 8469 MACY11 30A(1052) 03-MAR-78 15:32 10-MAR-78 8487 8488 8489 8490 8491 8492 8493 8494 8495 8496 8497 L 15 PAGE 196 SEQ 0194 SEQ 0193 POWER DOWN AND UP ROUTINES ;;tt".t.'t""t"'t"tt"""ttttti"t"'ttti"tltttlt'tt'tkt'tt ;COMMON DH11 SERVICE ROUTINES MAAAAAAAAAAAS R ;THIS ROUTINE AR AR IS AR AR ARt Rl CALLED DURING START UP do R ittt TO LOAD ;OUTPUT BUFFER WITH A BINARY COUNT TEST PATTERN 024330 024334 024336 026340 024342 024346 024350 012701 005002 110221 005202 022702 001373 000207 037312 LDTBF1: MOV CLR 18: Mmove INC cmHp 000400 BNE RTS #TBUF R R2 R2,(R1)+ R2 #400,R2 1% PC THE Rinll) XMITTER ;POINT TO START OF BUFFER ;INIT DATA BYTE GENERATOR ;LOAD ONE CHAR ;GENERATE NEXT CHAR ;LOADED 256(10) BYTES ;BR IF NOT . ;RETURN TO START TESTING sTHIS ROUTINE SEYS UP THE ERROR INFORMATION REQUIRED BY ANY TEST ;USING A "'DH1'' HEADER 024352 024356 024362 024366 024372 024376 024402 024410 004737 113700 010037 010137 010237 010637 062737 000207 027200 001102 001162 001164 001166 001176 000002 SUER1: JSR PC,SAPS : SAVE THE ERROR PSW mov RO, SREGO sSAVE THE TEST NO. MoV MOV ADD R2,SREG2 R6,SREGS #2 ,3REG6 ;SAVE THE REG ADDRESS ;SAVE THE SP sCORRECT FOR CALLING JSR Move MoV 001176 RTS $STSTNM, RO R1,S$REG1 PC ;SAVE THE TEST NO. ;SAVE THE DH11 ADDR FOR ERROR PRINT sRETURN TO CALLING ROUTINE ;THIS ROUTINE IS CALLED BY THOSE TESTS USING A ''DH2'' HEADER TO 8470 8471 8472 8473 8474 8475 8476 8477 8478 8479 8480 8481 8482 8483 8484 8485 8486 08:05 ;SAVE THE ERROR INFORMATION IN 'DT2" 024412 024416 024422 024426 024432 024436 024442 024446 024452 024460 004737 113700 010037 010137 010237 010337 010437 010637 062737 000207 027200 001102 001162 001164 001166 001170 001172 001176 000002 SUER2: JSR SUER2A: MOVB MoV PC.,SAPS $TSTNM,RO RO, SREGO mMov MOV MOV Mov R2,SREGZ R3,$REG3 R4, SREG4 R6,$REG6 Mov 001176 ADD RTS R1,SREG1 #2 ,$REGS PC :SAVE THE ERROR PSW ;GET THE TEST NO. sSAVE THE REGISTERS-TEST# ;SAVE THE DH ADDRESS sSAVE THE REGISTER ADDRESS ;SAVE THE WAS DATA ;SAVE THE S/B8 DATA :SAVE THE STACK POINTER ;CORRECT FOR CALLING JSR ;RETURN TO REPORT ERROR sTHIS ROUTINE IS CALLED TO SET UP ERROR INFORMATION FOR THE ;BUS ERROR AND RSVD INSTR ERROR ROUTINES 024462 024466 024472 024476 010037 010137 010237 000207 001162 001164 00116¢ SUER3: MOV MOV Mov RTS RO, SREGO R1,$REG] R2,SREG? PC ;SAVE THE REGS sRETURN TO REPORT ERROR sTHIS ROUTINE IS CALLED TO SET UP ERROR INFORMATION FOR THE ;CAR/BCR MEMORY PATTERNS TESTS 024500 024504 024512 024516 005037 113737 113700 010037 001202 030324 001102 001162 001202 SUER4: (LR MovB Move Mov $TMPO LINEA,STHPO $TSTNZ,RO RO, SREGO ;SAVE THE LINE NO. WRITTEN :SAVE THE TEST NUMBER ;SAVE THE REGISTER INFORMATION CZ0OHM-D-0 C2ZOHMD . P11 8498 8499 8500 8501 gggg 024522 024526 024532 024536 024542 MACY11 30A(1052) 09-MAR-78 15:32 010137 010237 010337 010437 000207 n 15 10-MAR-78 08:05 PAGE 197 POWER DOWN AND UP ROUTINES 001164 001166 001170 001172 nov nov MoV MoV RTS 8504 :THIS ROUTINE gggz 8527 8528 gg%g IS CALLED TO SELECT A NEW LINE NO. BASED ON THE ;JSR PC,SELINE :CALL THE ROUTINE TSTB BNE COMB MOV CLRB BR INCB ASL BEQ BIT 8EQ ADD BR LINE+1 1 LINE+1 #1,LINMSK LINE 23 LINE L INMSK 3s ;FIRST TIME THROUGH FOR ANY TEST ? :BR IF NOT ;SET ENTRY FLAG ;INIT SELECT TEST MASK TO TEST LINE 00 :START WITH LINE #00 ;GO TEST FOR LINE #00 ;GENERATE NEW LINE NO. sSHIFT SELECT MASK TO TEST NXT LINE :RETURN TO EXIT BRANCH - ALL LINES DONE BICB RTS LINE #17,3DHADR PC :INIT ENTRY FLAG AND LINE NO. TO 000 :BR 024544 024550 024552 024556 024564 024570 024572 024576 024602 024604 024612 024614 024620 105737 001010 105137 012737 105037 000405 105237 006337 001407 033737 001767 062716 000402 024626 024634 142777 000207 024622 005037 030323 030323 000001 030322 SELINE: 027314 030322 027314 027314 1%: 027312 2%: 002446 4$: 000002 030322 000017 8531 8532 318 CLR 1% LINMSK,LINSEL 18 #2,(SP) 43 ;EXIT BRANCH-ROUTINE MOVES THE RETURN :PC AROUND THIS BR IF MORE LINES ARE ;YET TO BE TESTED ;IS THE LINE SELECTED FOR TEST ?? ;BR IF NOT :MOVE RETURN PC AROUND EXIT BRANCH ;RETURN TO TEST SELECTED LINE :INIT LINE SELECT BITS IN ''SCR" :RETURN TO CALLING TEST :THIS ROUTINE IS CALLED TO CONVERT EITHER THE “'DH’' NUMBER OR THE ;" LINE'' NUMBER TO TWO ASCII CHARACTERS AND MOVE THEM INTO A gg;z :PARTICULAR MESSAGE BUFFER FOR ERROR REPORTING gggg :CALLING SEQUENCE 8537 8538 ;JSR sADDR1 RS, SUNUM MoV MOV mov MoV MOV MOVB MOV ASR ASR ASR 8IC ADD RO,-(SP) R1,-(SP) R2,-(SP) (RS)+,R0 (RS)+,R1 (RO) RO RO,R2 R2 R2 R #177770,R2 ¥60,R2 ggzg 8541 8542 8543 8544 8545 8546 8547 8548 8549 8550 8551 8552 8553 ;RETURN TO PATTERNS TEST ;CALLING SEQUENCE: 8510 8511 gg}% 8523 8524 8525 8526 PC ;VALUE OF THE LINE SELECTION PARAMETER 8507 5508 8509 8514 8515 8516 8517 8518 8519 8520 85271 85-¢ R1,$REGT R2.,$REG?2 R3,$REG3 R4, SREG4 SEQ 0195 SEQ 0194 ;ADDR2 024636 024636 024640 024642 024644 024646 024650 024652 024654 024656 024660 024662 024666 010046 010146 010246 012500 012501 111000 010002 006202 006202 006202 042702 062702 SUNUM: 177770 000060 ;CALL TO THIS ROUTINE :ADDRESS OF THE NUMBER TO BE CONVERTED ;ADDRESS OF THE MSG BUFFER SLOT :;PUSH RO ON STACK ::PUSH R1 ON STACK ;:PUSH R2 ON STACK ;GET ADDRESS OF NUMBER :GET MSG BUFFER ADDR :GET NO. TO BE CONVERTED ;SAVE IT IN R2 :SHIFT MSD TO LSD POSITION ;CLR JUNK BITS JMAKE IT ASCII - 8605 8606 8607 8608 8609 SEQ 0196 001220 000017 STMP7 $TMP7, (R1) CAR(R1) BCR(RT) STMP7 #20,8TMP7 19 #£17,(R1) . PC SINIT A COUNTER JSELECT A LINE ;CLEAR A CAR LOCATION ;CLEAR A BCR LOCATION ;GENERATE NEW LINE NO. sDONE ALL LINES ? ;BR IF NOT ;SET ''SCR'* TO SELECT LINE 00 JRETURN TO CALLER sTHIS ROUTINE IS CALLED TO LOAD THE '‘'BCR'' MEMORY WITH ALL ONES ;1T ASSUMES THAT THE ADDRESS OF THE SCR IS IN R1 024760 024764 024770 024776 025002 025010 025012 025016 005037 113711 012761 005237 022737 001365 142711 000207 001220 001220 177777 €01220 000020 000010 LDBCR: 1%: 001220 000017 (LR move Mov INC cmHpP BNE BICB RTS STHP? $THP7, (R1) sINIT A COUNTER JSELECT A LINE $STMP? #20,8THpP7 18 ;GENERATE NEXT LINE NO. ;DONE ALL LINES ? ;BR IF NOT PC sRETURN TO CALLER #-1,BCR(RT) #17,(R1) ;LOAD BCR LOC. WITH 177777 ;SET ''SCR'' TO SELECT LINE 00 ;THIS ROUTINE CALLED TO SET UP FOR PARITY TESTS 025020 025026 025030 025032 025036 025042 025050 025056 025064 025070 025074 025076 025100 025104 025110 025114 025116 025122 025126 025132 012737 105011 005002 012703 012704 012761 013761 013761 105062 110364 005211 005203 062702 062704 005337 001352 012704 013724 022704 001373 000020 000200 000001 037312 001216 001214 036312 036312 001212 000006 000010 000004 SUPPAR: 1%: Mov MoV MoV MOV MoV CLRB MOVB INC INC 000002 000002 001212 027562 001216 027622 MOV CLRB CLR ADD ADD DEC BNE 2%: Mov MOV CMP BNE #20,3THP4 (R1) R2 #200,R3 ’1,R4 #TBUF ,CAR(R1) $TMP6,BCR(RT) $TMPS ,LPR(R1) RBUF (R2) RS ,RBUF (R4) (R1) R3 #2,R2 #2,R4 $TMP4 18 #MULPTB R4 $TMPO, (RG)+ S:ULPTB'QO,RA ;SET UP FOR 16. LINES sINIT SCR TO START AT LINE 00 ;INIT INDEX REGISTER FOR RBUF (EVEN) ;SET UP CONSTANT sINIT INDEX REG FOR RBUF (0DD) ;LOAD BUS ADDRESS REWG ;LOAD BYTE COUNT REG ;LOAD LINE PARAMETERS ;INIT DATA BYTE IN RBUF TO START AT 000 JSET CONSTANT IN HIGH BYTE JSELECT NEXT LINE ;GENERATE NEW CONSTANT ;UPDATE POINTERS TO RBUF (EVEN/0DD) ;COUNT ONE LINE SETUP - W R T T CLR MOVB (LR CLR INC cmp 8NE 8IcB RIS — T AN CLCABC: 1%: W 001220 001220 000006 000010 001220 000020 TR 005037 113711 005061 005061 005237 022737 001364 142711 000207 T 024716 024722 024726 024732 024736 024742 024750 024752 024756 AT ;1T ASSUMES THAT THE ADDRESS Of THE ''SCR" IS IN R1 T ;THIS ROUTINE IS CALLED TO CLEAR THE ''CAR'* AND ''BCR'' MEMORIES N RETURN TO CALLER e TM ;;POP STACK INTO R1 ::POP STACK INTO RO NTVITYCY AT T W ¢ 012602 012601 012600 000205 T 000060 ;PUT IT IN MSG BUFFER ;CLR JUNK FROM LSD JMAKE 1T ASCI! ;PUT LSD IN THE BUFFER ;;POP STACK INTO R2 R2,(R1)+ #177770,R0 #60,R0 RO, (R1) (SP)+,R2 (SP)+,R1 (SP)+,RC RS e movs BIC ADD Move mov mov MOV RTS 177770 P N e TR SEQ 0195 POWER DOWN AND UP ROUTINES WL 110011 N 15 R 042700 062700 PAGE 198 Y 8603 8604 110221 08:05 ;BR TILL ALL 16. SET UP ;SET UP TABLE POINTER ;SET UP BYTE COUNT ENTRY ;SET UP ALL COUNTS ? ;BR [F NOT PN 8581 8582 8583 8584 8585 8586 8587 8588 8589 8590 8591 8572 8593 8594 8595 8596 8597 8598 8599 8600 8601 8602 024672 024674 024700 024704 024706 024710 024712 024714 10-MAR-78 e 8554 8555 8556 8557 8558 8559 8560 8561 8562 8563 8564 8565 8566 8567 8568 8569 8570 8571 8572 8573 8574 8575 8576 8577 8578 8579 8580 MACY11 30A(1052) 09-MAR-78 15:32 e (ZDHM-D-0 CZDHMD P CZDHR-D~0 C2ZDHMD.P11 8610 8611 8612 8613 8614 8615 8616 8617 8618 8619 8620 8621 8622 8623 8624 8625 8626 8627 8678 86¢9 8630 8631 8632 8633 8634 8635 8636 8637 8638 8639 8640 8641 8642 8643 8644 8645 8646 8647 8648 8649 8650 8651 8652 8653 8654 8655 8656 8657 8658 8659 8660 8661 8662 8663 8664 8665 025134 025136 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 199 B8 16 Sea 0197 POWER DOWN AND UP ROUTINES 105011 CLRB 000207 RTS ;THIS ROUTINE SEQ 0196 (R1) JINIT SCR TO PC AUTOSIZES THE = JRETURN TO PA, !+ SYSTEM TO DETERMINE (. LINE 00 TEST THE ADDRESSES AND SVECTORS OF THE DH11°S AND MODEM CONTROL'S. 025140 025142 025144 025150 025152 025154 025160 025162 025166 025174 025200 001373 013746 012737 012703 012702 000004 025274 030144 030042 025204 012701 160020 025210 025212 025216 005711 005761 052711 000016 004000 025222 025226 025232 025236 052711 052711 032711 001410 025240 010046 005003 012702 005022 005203 020327 AUTOSZ: 030042 25%: 000102 MOv CLR Mov #DHADRS ,R2 ;POINT CMP R3,#102 sHAVE WE CLEARED ALL ENTRIES? MoV Mov Mov mov ars,-(SP) #4S 3N #DMADRS ,R3 #DHADRS ,R2 ;SAVE TRAP VECTOR. ;SETUP FOR NON-EXISTENT MEMORY TRAP. ;SETUP DM ADDRESS TABLE POINTER, sSET UP DH ADDRESS TABLE POINTER. Mov #160020,R1 ;R1=FIRST ADDRESS TO BE TESTED. TST TST (R1) 16(R1) ;SEE IF ADDRESS IN R1 RESPONDS. :CHECK TO SEE IF DEVICE IS MODULO 20. ghg BNE 000004 1$: RO, -(SP) R3 é%Z)* 258 TO BEGINNING OF TABLE sCLEAR AUTOSIZER TABLES. ;BRANCH IF NOT. BIS #4000, (R1) 001000 002000 003000 BIS #1000, (R1) BIT BEQ #3000, (R1) 3s 052711 000400 BIS #400, (R1) 025244 032711 002400 BIT #2400, (R1) 025250 025252 025256 001003 042711 010122 001000 BNE BIC MoV 3s #1000, (R1) R1,(R2)+ ;IF NOT, CHECK TO SEE IF ;CLEAR MAINTENANCE BIT. 025260 025264 025266 025272 020127 001406 062701 000746 3s: cHp BEQ ADD BR R1,#163760 5% #20,R1 18 ;HAVE WE REACHED THE TOP OF THE FLOATING ADDRESSES. ;1F YES, GET OUT. :IF NOT, UPDATE ADDRESS AND ;G0 CHECK IT. 025274 025300 012716 000002 48: :?Y #3%,(SP) ;IF DH ADDRESS DOES NOT RESPOND, BIS 163760 000020 025260 #2000, (R1) ;1F 1T 1S, CONTINUE ;AND CHECK TO SEE sIF THIS ADDRESS CONTAINS ;A DH-11, ;CHECK TO INSURE THESE BITS SET. :1F NOT, BRANCH. ;SET THE MAINTENANCE BIT, THE NON;EXISTENT MEMORY BIT AND THE CLEAR sNON-EXISTENT MEMORY INTERRUPT BIT. ;1S THIS A DH-11? (BITS 8 AND 10 SHOULD ;CLEAR IF THIS IS A DH11.) ;SAVE THIS IS A MODEM CONTROL. THE ADDRESS IN THE DH ADR TABLE. GO TQ 3%. ;TEST FOR MODEM CONTROL ADDRESS 025302 025310 025314 025316 012737 012701 005711 010123 025334 170500 025320 025324 020127 001406 170670 000004 5%: 21%: 238: mov 638,304 sSETUP FOR NON-EXISTENT MEMORY TRAP. CMP BEQ R1,#170670 228 ;SO SAVE THE ADDRESS. ;HAVE WE REACHED THE TOP OF THE MODEM ADDRESSES? ;IF YES, GET OUT. MoV 1§7 Mov #170500,R1 (R1) R1.(R3)+ ;R1=FIRST ADDRESS 7O BE TESTED. ;SEE IF ADDRESS RESPONDS. ;1F IT DOES, THIS IS A MODEM CONTROL, (ZDHM-D-0 CZDHMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 8666 gggg 025326 025332 062701 000770 000010 8669 025334 012716 025320 8672 8673 8674 8675 gg;g 025342 025346 025352 025354 025360 012637 162702 001003 104401 000000 000004 030042 8678 8679 8680 8681 8682 8683 8684 8685 025362 025364 025366 025370 025372 025374 025376 0256400 006202 005000 006100 005200 005302 005702 001373 010037 030314 8688 8689 8690 025404 025410 012702 012705 030042 030104 8692 8693 gggg 025422 025430 025434 012737 012703 012704 025532 000300 000302 8696 8697 8698 8699 8700 8701 g;gg 025440 010423 025442 0256446 025450 012724 022324 020427 025454 101771 8704 g;gz 025456 025460 005712 001441 8707 8708 8709 8710 g;}; 025462 025466 025474 005037 052772 052772 025502 005000 8713 8714 8715 8716 8717 g;:g 025504 025506 025510 025514 025522 025530 005200 001376 104401 052772 042772 000752 8720 8721 025532 025534 011601 042701 gg;? gggg 8691 025340 0256414 000002 012737 C 16 10-MAR-78 08:05 PAGE 200 POWER DOWN AND UP ROUTINES ADD BR #10,R1 21% ;1F NOT, UPDATE ADDRESS AND ;GO CHECK IT. 6%: Mov #2338, (SP) ;IF DM ADDRESS DOES NOT RESPOND, GO TO 23%. 22%: Mov suB BNE TYPE HALT (SP)+,and #DHADRS ,R2 7% LMSG1 ;RESTORE TRAP VECTOR. ;HAVE WE FOUND ANY DHI1'S AT ALL? :1F YES, BRANCH :NO DH11'S WERE FOUND, 7%: ASR CLR ROL INC DEC TST BNE Mov R2 RO RO RO R2 R2 8% RO,S$DHSEL ;R2 NOW CONTAINS THE NUMBER ;OF DH'S FOUND. ;FILL RO WITH 1°S ; CORRESPONDING TO :THE NUMBER OF CLH'S ;FOUND. 035604 8%: 000340 000022 000020 000004 001000 108: 000000 000000 118: 035634 004000 001000 000007 RTI ;FIND DH VECTOR: MOV #DHADRS ,R2 Mov #DHVEC RS mov #340,3#10TVEC+2 Mov #128,32I0TVEC MOV #300,R3 MoV #302,R4 98: 177776 001000 000300 SEQ 0198 SEQ 0197 000000 000000 12%: ;SDHSEL CONTAINS THE DH SELECTION PARAMETER. sIE. ALL DH'S FOUND WILL BE TESTED. ;SETUP POINTER TO BEGINNING OF DH ;ADDRESS TABLE AND VECTOR TABLE. ;SET 10T TRAP PRIORITY TO 7. ;SETUP 10T TRAP VECTOR. sSTARY OF FLOATING VECTORS ;PC OF IOT INSTR. MoV R4, (R3)+ MOV CMP cmp #6,(R4)+ (R3)+,(R4)+ R4, #1000 BLOS 9s sFILL VECTOR AREA WITH ADDRESS ;OF NEXT INSTR (.+2) sNEXT INSTRUCTION IS AN IOT TRAP. sUPDATE R3+R4. ;HAVE WE REACHED TO TOP OF THE sVECTOR SPACE? ;1F NOT, REPEAT PROCESS. TST BEQ (R2) 138 ;HAVE WE CHECK ALL DH'S? ;IF YES, GET OUT + CHECK FOR MODEM CONTROL'S VECTORS. CLR BIS BIS PS #1000,3(R2) #300,3(R2) CLR RO ;ZERO CPU PRIORITY, <SET MAINTENANCE BIT SATTEMPT TO CAUSE RECEIVER s INTERRUPT, IN BNt TYPE BIS BIC BR RO 118 MSG2 #4000,3(R2) #1000,a(R2) 108 MoV BIC (SP) ,R1 #7,R1 JWALT... ;ERROR MSG-NO DH RECEIVER INTERRUPT OCCURRED. ;DO A MASTER CLEAR ;CLEAR MAINTENANCE BIT ;CLEAR GARBAGE. CZOHM-D~0 C204mD.P11 8722 8723 8724 8725 8726 g;g; 025540 025542 025544 025550 025556 025562 MACYT1 30A(1052) 09-MAR-78 15:32 010125 022626 012716 052772 042732 000002 025456 004000 001000 D 16 10-MAR-78 08:05 PAGE 201 POWER DOWN AND UP ROUiINES 000000 g;gg 025564 025570 025574 012702 012705 012737 8735 025602 005712 8736 8737 8738 8739 3;2? 025604 025606 025612 02562C 025626 001441 005037 052772 052772 005000 8742 8743 8744 025630 025632 025634 005200 001376 104401 g;z; 025654 000752 025640 025646 052772 042772 8749 8750 8751 8752 025656 025660 025664 025666 011601 162701 010125 022626 8754 8755 8756 g;g; 025674 025702 052772 042732 8753 025670 012716 025706 000002 8759 8760 8761 g;gg 025710 025716 (025720 025724 012737 012600 012703 012704 8764 025730 010423 8766 025732 012724 8765 8767 8768 8769 025736 025740 025744 022324 020427 101771 8771 8772 8773 8774 8775 8776 8777 025746 025752 025756 025760 0137Q1 005737 001403 163701 025764 025766 005401 010137 8770 R1,(R5)+ (SP)+,(SP)+ 2108, (SP) #4000,3(R2) #1000,3(R2)+ ;SAVE VECTOR ADDRESS. ;POP STACK :SETUP FOR RETURN. ;00 A MASTER CLEAR ;CLEAR MAINTENANCE BIT. :FIND MODEM CONTROL VECTORS: 8731 8732 g;gz 8745 8746 MoV cHp MOV BIS BIC RT1 SEQ 0199, SEQ 0198 ‘ 030144 030206 025656 13%: 000020 148%: 177776 001000 000300 000000 000000 15%: 035701 004000 001000 000000 000000 025602 004000 001000 ST ;SET POINTERS TO BEGINNING OF ;ADR TABLE & VECTOR TABLE. ;SET 10T TRAP VECTOR. 178 PS #1000,3(R2) #300,a(R2) RO (R2) ;HAVE WE CHECKED ALL DM'S? INC BNE TYPE BIS BIC RO 158 ,MSG3 SWALT .. .. #4000,a(R2) #1000,a(R2) ;ERROR MSG - NO MODEM CONTROL INTERRUPT OCCURRED. ;CLEAR BITS PREVIOUSLY SET. :CLEAR MAINTENANCE BIT. . _mov SuB MOV CMp (SP),R1 #4,R1 R1,(RS)+ (SP)+,(SP)+ ;CALCULATE VECTOR ADDRESS. :SAVE VECTOR ADDRESS. ;POP STACK. BIS BIC #4000,3(R2) #1000,3(R2)+ MOV 000000 #DMADRS ,R2 #DMVEC,RS #16$,3#I0TVEC BEQ CLR BIS BIS CLR B8R 168: 000004 MoV MOV Mov 148 #1483, (SP) RTI 021004 000020 :SETUP FOR RETURN. ;CLEAR BITS PREVIOUSLY SET. ;CLEAR MAINTENANCE BIT AND ;POINT TO NEXT MODEM CONTROL ADURESS. 17%: MoV MoV Mov mov #$SCOPE.,a#IOTVEC :;RESTORE IOT VECTOR FOR SCOPE ROUTINE. (SP)+,RO :RESTORE RO. #300,R3 :START OF FLOATING VECTORS. #302,R4 18%: MOV R4, (R3)+ ;FILL VECTOR AREA WITH ADDRESS OF NEXT MoV 20, (R4)+ (R3)+,(R4)+ R4, #1000 18% sNEXT INSTRUCTION IS A HALT. :UPDATE R3 & R4. JARE WE DONE? :1F NOT, REPEAT UNTIL ADDRESSES Mov TST BEQ SuB S#DHVEC ,R1 S#DHVEC +2 26% A#DHVEC+2,R1 NEG mov R1 R1,ADRVEC :LEY R1 POINT TO 1ST DH VECTOR ADDRESS. ;1S THERE MORE THAN ONE VECTOR? ;BRANCH IF NOT. ;DETERMINE NUMBER OF ADDRESSES ;BETWEEN DH VECTORS (10(8) OR 20(8)). :MAKE R1 POSITIVE. ;SAVE THAT NUMBER. 000300 000302 000000 cmp CMp BLOS 001000 030104 030106 030106 030306 ;1F YES, GET OUT. :1ZERO CPU PRIORITY :SET MAINTENANCE BIT. SATTEMPT TO CAUSE INTERRUPT. 268$: ;INSTRUCTION (.+2). :377 TO 777 ARE DONE. (ZOHM-C=-0 CIDHMD.P11 8778 8779 8780 8781 8782 8783 8784 8785 8786 8787 8788 8789 8790 8791 8792 8793 8794 8795 8796 8797 8798 8799 8800 8801 8802 8803 8804 €805 8806 8807 8808 8809 8810 8811 8812 8813 8814 8815 8816 8817 8818 8819 8820 8821 8822 8823 8824 8825 8826 8827 8828 8829 8830 8831 8832 8833 MACY11 30A(1052) 09-MAR-78 15:32 025772 026000 026002 026004 026006 026012 026016 026022 032777 001442 104401 035754 012701 012702 012703 012704 026026 026030 026032 026C33 026034 026036 026040 026041 026042 026046 026050 026052 026053 026054 026060 026062 026064 026065 026066 026070 012146 104403 006 001 012246 104403 005 000 104401 012346 104403 006 001 104401 012446 104403 005 000 104401 001227 005711 001354 005713 001352 104401 000207 026072 026074 026076 026100 026102 026106 000002 10-MAR-78 08:05 PAGE 202 152140 BIT BEQ TYPE DEVRAP 19%: MOV (R1)+,-(SP) TYPOS .BYTE .BYTE 6 1 (R2)+,-(SP) .BYTE .BYTE 5 0 . SPACE (R3)+,-(5P) TYPE MOV TYPOS .BYTE .BYTE TYPE 035750 MOV TYPOS .BYTE .BYTE TYPE $CRLF TST 20%: BNE TST BNE TYPE RTS sTELETYPE 104401 026130 026134 026136 026140 026144 035507 104412 012600 001407 022700 001406 022700 001403 000764 012700 000207 026146 026152 004737 012700 INPARA: 000010 00002¢ 000020 027244 177777 3s: 4%: INPARC: 208 #DHADRS ,R1 #DHVEC ,R2 #DMADRS ,R3 #DMVEC R4 MOV TYPOS 035750 #BIT1,3SWR MoV MoV MoV MOV JTHIS ROUTINE 026110 026112 026114 026116 026120 026122 026126 16 Sea 0200 SEQ 0199 POWER DOWN AND UP ROUTINES 030042 030104 030144 030206 001227 E TYPE VCW( RDOCY MOV BEQ CMpP BEQ CmpP BEQ B8R 6 1 . SPACE (RG)+,-(SP) 5 0 ;SHOULD DEVICE MAP BE TYPED OUT? ;1F NOT, RETURN. :TYPEQUT MAP OF DH & MODEM CONTROL'S FOUND. ;R1=BEGINNING ;R2=BEGINNING ;R3=BEGINNING ;R4=BEGINNING ;MOVE DATA TO BE ;TYPE DATA TYPED sTYPE DATA sMOVE :TYPE DATA T0 BE DATA. TYPED. ;MOVE DATA TO BE TYPED. ;TYPE A CARRIAGE RETURN & LINE sTYPE DATA. FEED. (R1) 19% (R3) 19% ;HAVE WE TYPED ALL DH ENTRIES? ;1F NOT, DO IT AGAIN. sAAVE WE TYPED ALL DM ENTRIES? .IF NOT - ONE MORE TIME. PC ;IF YES, GO BACK TO MAIN PROGRAM. SCRLF IS USED TO ACCEPT INPUT PARAMETERS FROM THE CONSOLE ;"'ASK FOR NO. ADDRESSES BETWEEN VECTORS" (SP)+,RO 3s #10,R0 4% #20,R0 ;READ OCTAL NO. FM TTY ;GET THE NO. HE TYPED ;BR IF HE TYPED <CR> :10(8) ADDRESSES BETWEEN VECTORS ? ;BR IF YES ;20(8) ADDRESSES BETWEEN VECTORS ?? ;BR mMov #20,R0 PC JSR PC,DCACHE #-1,R0 ;DISABLE CACHE Mov DH ADDRESS TABLE. DH VECTOR TABLE. MODEM CONTROL ADDRESS TABLE. MODEM CONTPOL VECTOR TABLE. ;MOVE DATA TO BE TYPED 4% INPARA RTS OF OF OF OF IF YES ;ASK ALL OVER AGAIN ;SET UP CONSTANT FOR 20(8) ADDRESSES ;RETURN TO CALLER :SET FLAG IN RO ;;++D MACY11 30A(1052) 026156 000137 0C2164 026162 026166 026174 004737 012737 000137 027244 177777 002164 026200 026204 026212 026214 026216 026220 026222 026224 026226 013701 030042 000001 CZDHMD.P11 8834 8835 8836 8837 8838 8839 8840 8841 8842 8843 8844 8845 8846 8847 8848 8849 8850 8851 8852 8853 8854 8855 8856 8857 8858 8859 8860 8861 8862 8863 8864 8865 8866 8867 8868 8869 8870 8871 8872 8873 8874 8875 8876 8877 8878 8879 8880 8881 8882 8883 8884 8885 8886 8887 8888 8889 09-MAR-78 15:32 032777 026232 001405 104401 035064 104412 012601 001403 004737 000770 026234 026240 026246 026250 026252 026254 026256 026260 026262 026266 013701 032777 001405 104401 035130 104412 012601 001403 004737 000770 026270 026274 026276 026300 026306 026310 026312 026314 026316 026320 026322 013701 005700 100404 032777 001405 026326 026330 026332 026340 026342 026344 026346 026350 026352 026354 026360 026362 026370 026376 026400 026402 005700 100404 032777 001410 104401 035375 104412 012601 001403 010137 000403 012737 032777 10-MAR-78 001403 104401 035437 PAGE 203 JHP 030000 152726 INPARX: JSR mov JHP INPAR: MoV 1%: TYPE BIT BEQ 2%: 030104 000001 INPARY: MoV 1%: TYPE 152672 BIT BEQ 2%: 030314 INPAR3: Mov TST 152632 2$: 027310 1¢: INPARG: 000001 152600 BMI BIT BEQ TYPE SEQ 0201 SEQ 0200 Mov TST BMI BEG TYPE BEQ 027312 152542 ;G0 ASK FOR SELECT PARAMETER PC,DCACHE #-1,VCFLG BEGINA JDISABLE @ #DHADRS ,R1 #BITO,aSWR sMOVE ADDRESS OF FIRST DH INTO R1., ;ARE PARAMETERS TO BE INPUT MANUALLY? ;BRANCH IF NOT. ;ASK FOR DEVICE ADDRESS (SP)+ ,R1 INPAR1 PC,CHKADR 19 MoV BR MOV BIT BEQ TYPE INMSG7 CACHE JSET SETUP FLAG ;GO START upP 2% * a#DHVEC R #B170,3SWR 2% ;.++D JsREAD IN WHAT IS TYPED ;GET THE NO. HE TYPED ;BR IF DEFAULT ;GO0 CHECK VALIDITY OF THE ADDR ;ERROR BRANCH ;MOVE FIRSY DH VECTOR INTO R1. ;ARE PARAMETERS TO BE INPUT MANUALLY? ;BRANCH If NOT. ;ASK FOR VECTOR ADDRESS INPAR3 ;READ IN WHAT HE TYPES ;GET THE ADDRESS ;BR IF DEFAULTY 1% ;ERROR BRANCH a#SDHSEL R RO 2% sMOVE DEVICE SELECTION PARAMETER INTO R1. (SP)+,R1 PC,CHKVCT #BIT0,3SWR . 1% (SP)+,R1 INPARS R1,DHSEL RO 3% #BIT0,aSwR 1% 1nuMSG6 RDOCT MOV 027312 SEGINA INMSG3 RDOCTY MoV BEQ BIT 3 $: 177777 000400 16 INMSG2 RDOCT MoV 8EQ JSR BR 026526 000001 F INMSG1 RDOCT MoV BEQ JSR BR 026412 104401 035177 104412 012601 001402 010137 08:05 POWER DOWN AND UP ROUTINES Ny — L X CIDHM-D-0 (SP)+,R1 1% R1,LINSEL 2% #-1,LINSEL #BIT8,aswR EXPAR :GO CHECK VALIDITY OF VECTOR ;DID WE START AT 210? ;BRANCH IF YES. ;1S PARAMETER TO BE INPUT MANUALLY? ;BRANCH IF NOT. ;ASK FOR DEVICE SELECTION PARAMETER ;READ IN WHAT HE TYPES :GET THE SELECT PARAMETER DEFAULT ;BR IF :SET UP DH11 SELECTION PARAMETER ;01D WE START AT 210? ;BRANCH IF YES. ;1S LINE SELECT PARAMETER TQ BE sBRANCH IF NO. sASK FOR LINE SELECT PARAMETER INPUT MANUALLY? ;GET WHAT HE TYPES ;GET PARAMETER :BR IF DEFAULT ;SET UP LINE SELECT PARAMETER s CONTINUE ;SET UP DEFAULT (ALL LINES) sHALT AFTER SET UP 2? NOT ;BR If ;TYPE CONTINUE MESSAGE PRIOR TO HALTING CIDHM-D-0 CZOHMD.P11 8890 8891 8892 8893 8894 8895 8896 8897 8898 8899 8900 8901 8902 8903 8904 8905 8506 8907 8908 8909 8910 8911 8912 8913 8914 8915 8916 8917 8918 8919 8920 8921 8922 8923 8924 8925 8926 8927 8928 8929 8930 8931 8932 8933 8934 8935 8936 8937 8938 8939 8940 8941 8942 8943 8944 8945 MACY11 09-MAP-78 15:32 026404 026406 000000 000137 026412 026416 026420 026422 (26426 026430 026432 026436 026440 026444 026450 026456 026460 020127 002001 000437 020127 002401 000433 032701 001030 062716 012702 032777 001011 012703 026464 013704 012322 026470 026472 026474 026476 026500 026502 026504 026510 026514 026516 026520 026522 30A(1052) 006204 005704 001374 000411 010122 062701 022702 001372 10-MAR-78 POWER EXPAR: 160020 CHKADR: 1604620 1%: 000017 2%: 000002 027700 000001 152462 030042 030314 6%: 026526 026532 026534 026536 026542 026544 026546 026552 026554 026560 026564 026572 026574 020127 002001 000436 020127 002401 000432 032701 001027 062716 012702 032777 00101 012703 026600 026604 013704 012322 026606 026610 026612 026614 026616 006204 005704 001374 000410 010122 HALT 3%: 000020 027740 4% 5%: 000300 CHKVCT: 001000 1%: 000007 2%: 000002 027740 000001 152346 03010¢ 030314 6%: G 16 (CMP BGE BR LMP BLT BR BIT BNE ADD MOV BIT BNE MOV R1,#160020 1% 4 R1,#160420 2% 4% #17,R1 4% #2,(SP) #DHADTB,R2 MOV $DHSEL R4 ASR R4 [ [0} SEQ 0202 SEQ 0201 ROUTINES START? #B170,aSWR 3s #DHADRS ,R3 (R3)+,(R2)+ ;DEPRESS CONTINUE TO RESUME TESTING ;60 START UP THE PROGRAM ;1S ADDRESS ABOVE OR EQUAL ;BR IF YES TO LOW LIMIT ;BR IF NOT ;IS IT BELOW THE HIGH LIMIT? ;BR IF YES ;BR IF NOT ;CORRECT BOUNDARY ? ;BR IF NOT ;MOVE RETURN PC AROUND ERROR BRANCH ;POINT TO BEGIN OF ADDR TABLE ;ARE WE AUTOSIZING? ;BRANCH IF NOT. ;POINT TO BEGINNING OF AUTOSIZER ;DH ADDRESS TABLE. ¢MOVE CONTENTS OF AUTOSIZER DH TABLE ;7O THE TABLE USED BY PROGRAM. BNE BR R4 6% 5% R1,(R2)+ #20,R1 #DHADTB+40,R2 33 5% INMSG4 RTS ;HAVE WE MOVED ALL TABLE ENTRIES? ;BRANCH IF NOT--ONE MORE TIME. sRETURN TO INPUT ROUTINES. SETR UP A TABLE ENTRY ;GENERATE NEXT DH11 ADDR ;END OF TABLE ? ;BR IF NOT ;RETURN TO INPUT ROUTINES ;TELL HIM HE GOOFED PC ;RETURN TO INPUT ROUTINES CMP R1,#300 BLT BR BIT BNE ADD Mov 8IT BNE mov b 3 4% #7,R1 43 #2,(5P) #DHVCTB,R2 #BIT0,aSwR 3% #DHVEC ,R3 Mov $OHSEL R4 BR MoV ADD Cmp TYPE B8GE B8R cMpP Mmov ASR TST 3s: 204 JWP TSTY BNE 104401 026524 PAGE DOWN AND UP 002640 000402 035250 000207 08:05 BNE BR mov 13 4% R1.,#1000 (R3)+,(R2)+ R4 R4 6% 5% R1,(R2)+ ;IS ADDRESS ABOVE OR EQUAL TO LOW LIMIT ;BR IF YES ;BR IF NOT ;1S 1T BELOW THE HIGH LIMIT? ;BR IF YES ;BR If NOT :CORRECT BOUNDARY 7 ;BR IF NOT ;MOVE RETURN PC AROUND ERROR BRANCH ;POINT TO BEGIN OF VECTOR TABLE ;ARE WE AUTOSIZING? :BRANCH IF NOT. ;POINT TO BEGIMING OF AUTOSIZER ;OH VECTOR TABLE. ;MOVE CONTENTS OF AUTOSIZER VECTOR ;TABLE TO TABLE USED BY PROGRAM. ;HAVE WE MOVED ALL TABLE ENTRIES? ;BRANCH IF NOT--ONE MORE TIME. ;RETURN TO INPUT ROUTINES. ;SETR UP A TABLE ENTRY r CZDHM-D-0 CZ0HMD.P11 8946 8947 8948 8949 8950 8951 8952 8953 8954 8955 8956 8957 8958 8959 8960 8961 8962 8963 8964 8965 8966 8967 8968 8969 8970 8971 8972 8973 8974 8975 8976 8977 8978 8979 8980 8981 8982 8983 8984 8985 8986 8987 8988 8989 8990 8991 8992 8993 8994 8995 8996 8997 8998 8999 9000 9001 026620 026622 026626 026630 026632 026634 0¢6636 026640 026646 026652 026654 026656 026662 026666 026672 026700 026702 026704 026710 026714 026722 026726 026730 026732 026736 026742 026746 026754 026756 026760 026764 MACY11 30A(1052) 09-MAR-78 15:32 060001 02270¢ 001373 000402 10-MAR-78 POWER ADD 49: 035321 000207 5%: 000340 001176 001102 001100 024462 026702 004737 000137 027150 002734 012737 010637 012601 012602 113700 012706 004737 012737 104030 000005 004737 000137 000340 001176 001102 001100 024462 026756 027150 002734 001202 CHpP BNE BR TYPE INMSGS RTS RO,R1 #OHVCTB+4L0 R2 3% 5% Sea 0203 SEQ 0202 TWO ROUTINES BUSER: MOV MOV MoV MOV Move MOV 1%: RESERR: 001110 1%: ;GENERATE NEXT DH11 ADDR ;END OF TABLE ? ;BR IF NOT sRETURN TO INPUT ROUTINES ;TELL HIM HE GOOFED PC ;THESE 001110 001202 H 16 PAGE 205 DOWN AND UP ROUTINES 030000 104401 012737 010637 012601 012602 113700 012706 004737 012737 104027 000005 08:05 ;RETURN TO INPUT ROUTINES SERVICE UNEXPECTED BUS ERROR AND RSVD #340,3TMPO SP,SREG6 (SP)+,R1 (SP)+ ,R2 $TSTNM,RO ;SAVE THE PSW ;SAVE THE SP :GET THE TRAP P( ;GET THE TRAP PSW JSR PC,SUER3 Mmov #1$ SLPERR ERROR RESET JSR JMP 27 PC,CHPSI REST1 ;GO SET UP ERROR INFO ;ALWAYS COME BACK 10 1% ;UNEXPECTED BUS ERROR TRAP ;PREPARE TO RESTART ;GO CLEAR PSW ;GO RESTART THE PROGRAM MOV mov mov Mov movs Mov JSR MoV ERROR RESET JSR JMP #STACK,SP #340,3TMPO SP,S$REG6 (SP)+,R1 (SP)+,R2 STSTNM,RO #STACK,SP PC,SUER3 #1$,SLPERR 30 PC,CHPSY RESTY INSTR TRAPS ;GET TEST NO. JRESET THE STACK POINTER :SAVE THE PSW :SAVE THE SP ;GET THE TRAP P( ;sGET THE TRAP PSW ;GET TEST NO. ;RESET THE STACK POINTER ;60 SET UP ERROR INFO sALWAYS COME BACK TO 1% JUNEXPECTED RSVD INSTR ERROR TRAP ;PREPARE TO RESTART ;GO CLEAR PSW ;GO RESTART THE PROGRAM ;THIS ROUTINE IS CALLED WHEN A TEST NEEDS TO RESTGRE "HE TRAP ;CATCHER IN THE DH11 VECTOR 026770 026774 026776 027002 027004 027006 027012 027014 013703 010313 062723 005023 010313 062723 005023 000207 027304 RESTRP: 000002 000002 MOV MoV ADD CLR MOV ADD CLR RTS DHVCT ,R3 ;GET VECTOR ADDRESS PC ;RETURN TO CALLING TEST R3, (R3) #2,(R3)+ (R3)+ R3,(R3) #2,(R3)+ (R3)+ ;RESTORE THE TRAP CAT(HER ;THIS ROUTINE CALLED BY ANY TEST THAT NEEDS A TIMING WAIT LOOP ;"'TIMEA" IS INITIALIZED BY THE CALLING ROUTINE 7O THE MINIMUM REQUIRED ;VALUE AND '‘TIMEB'' IS CLEARED TO 000000. IF A TIME OUT OCCURS THIS JROUTINE WILL MOVE THE RETURN PC AROUND THE °'‘'LOOP'* BRANCH BACK IN ;THE ROUTINE THAT CALLED IT TO ALLOW REPORTING AN ERROR MESSAGE 027016 027022 005237 001005 030352 TIMEIT: INC BNE TIMEB 1% ;COUNT B ;BR IF NOT ZERO (ZOHM-D-0 (ZDHMD . P11 9002 9003 9004 9005 9006 9007 9008 9009 9010 9011 9012 9013 9014 9015 9016 9017 9018 9019 9020 9021 9022 9023 9024 9025 9026 9027 9028 9029 9030 9031 9032 9033 9034 9035 9036 9037 9038 9039 9040 9041 9042 9043 9044 9045 9046 9047 9048 9049 9050 9051 9052 9053 9054 9055 9056 Q057 027024 027030 027032 027036 "ACY11 30A(1052) 005337 001002 062716 000207 030350 vy-MAR-78 15:32 10-MAR-78 POWER 08:05 PAGE 1%: ;THIS SEQ 0204 SEQ 0203 DOWN AND UP ROUTINES DEC BNE 000002 116 206 ADD 1% #2,(SP) RTS PC ROUTINE ;COUNT TIME A :BR IF NO TIMEOUT ;MOVE RETURN PC TO ALLOW ERROR REPORT JRETURN TO THE CALLING TEST TIMEA CALLED BY THE AUTO ECHO TEST TO SET UP FOR TRANSFERRING ;A BINARY COUNT TEST PATTERN ON ALL LINES 027040 027046 027050 027054 027060 027062 027070 027076 027104 07110 027114 027116 027120 027124 027130 027134 027136 027144 027146 012737 005002 012703 012704 005011 012761 012761 012761 105062 110364 005211 005203 062702 062704 005337 001352 013737 005011 000207 000020 001216 SETALL: 000200 000001 037312 177400 031403 036312 036312 MoV 000006 000010 000004 1%: CLR MoV MoV Mov CLRB MOovVB INC INC ADD ADD DEC BNE 000002 000002 061216 027312 MOV CLR MoV 027560 Mov CLR RTS #20,8TMP6 R2 #200,R3 #1,R4 (R1) #TBUF ,CAR(RY) #-400,BCR(R1) #31403,LPR(RT) RBUF (R2) R3,RBUF (R4) (R1) R3 #2,R2 #2,R4 $TMP6 1$ LINSEL,LINACT (R1) PC ;SEY UP SIXTEEN LINES ;INIT A TABLE INDEX REG sSET UP TO GENERATE HI BYTE OF EXPECTED DATA ;SET UP INDEX REG TO ODD BYTES ;START WITH LINE 00 ;SET UP BUS ADDR REG sSET UP BYTE COUNT REG ;SET UP FOR 4800 BAUD/8 BIT CHARS ;sSTART WITH DATA CHAR OF 000 :SET UP HIGH BYTE OF EXPECTED DATA ;GEN NEW LINE NO. IN SCR ;UPDATE THE POINTERS AND DATA ;COUNT ONE LINE DONE ;BR TIL ALL 16 SET UP ;SET SOFTWARE FLAG FOR ALL LINES ACTIVE ;PUT SCR REG BACK TO LINE 00 JRETURN TO AUTO ECHO TEST ;THIS ROUTINE IS CALLED TO SET PSW PRIORITY TO 000 IN ORDER 2TO BE LSIT1 COMPATIBLE 027150 027154 027160 027162 012745 012746 000002 000207 000000 027162 CHPS1: 1$: MOV Mov RTI RTS #0,-(SP) #18%,-(SP) PC :NEW PSW sNEW PC ;Ch Rt CIGE PSW JRN TO CALLING TEST ;THIS ROUTINE DOES THE SAME THING EXCEPT IT SET THE PSW ;PRIORITY TO 340 (LEVEL 7 ) TO LOCK OUT INTRS 027164 027170 027174 027176 012746 012746 000002 000207 000340 027176 (HPS2: 18: MOV MOV RT1 RTS #340,-(SP) #18,-(sP) PC ;NEW PSW JNEW PC ; CHANGE THE PSW ;RETURN TO CALLING TEST ;THIS ROUTINE IS ALSO FOR LSI COMPATIBILITY AND IT IS CALLED ;TO SAVE THE PSW IN ''$TMPO" 027200 027202 027206 027214 027216 027224 027230 027232 005046 013746 012737 104400 016666 012716 000002 012637 000034 027216 000002 027232 000034 SAPS: 000034 000006 CLR MOV MoV 1%: TRAP MOV Mov 2%: Mov RTI 2(SP),6(SP) #2%,(SP) ; TEMP STORAGE TO SAVE PSW sSAVE TRAP VECTOR POINTER ;GO TO 1$ ON TRAP ;G0 TO IV ;GET PSW SAVED ;GO TO 2% ON RTI (SP)+,34 ;RESTORE VECTOR ~(SP) 34 ,-(SP) 18,34 (lDHR-D-0 CZDONMD . P11 9058 9059 9060 9061 9062 9063 027236 027242 MACYTT 30A(1052) 012637 000207 001202 09~-MAR-78 15:32 10-MAR-78 08:05 PAGE 207 J 16 SEQ 0205 POWER DOWN AND UP ROUTINES MOV RTS (SP)+,$THPO PC SEQ C204 sFINALLY SAVE PSW IN STMPO gggg ;SUBROUTINE TO SIZE FOR AN 11/70 CENTRAL PROCESSOR : IF IT IS AN 11/70 CPU, CACHE WILL BE DISABLED M IF NOT AN 11/70 CPU, NO ACTION TAKEN 9066 9067 ;CALLED BY ; 9068 9069 9070 9071 9072 9073 9074 9075 9076 gg;g 027244 027250 027256 027262 027270 027272 027274 027300 013746 012737 005737 012737 000401 022626 012637 000207 000004 027272 177746 000014 (000004 000004 ; ; DCACHE: JSR PC,DCACHE NO ARGUEMENTS PASSED MOV MoV TST MOV BR CMpP MOV 177746 1%: 2%: RTS 22 oD e aké,~(SP) s, ans aN177746 #14,30177746 2% (SP)+,(SP)+ (SP)+,a#4 PC e ;SAVE TRAP INFO ;SETUP FOR TIMEOUT JTEST FOR CACHE ;OISABLE CACHE JEXIT, CACHE DISABLED JCLEAN UP STACK JRETURN 9079 i 9080 9081 9082 ;ADDITIONAL PROGRAM CONSTANTS AND VARIABLES PR R AR N AR R AR R AR AN R AN AN AR RN A AR AR R AR AN AR AR sl 22222222222 2222222222227 A NS 9083 000002 NRC=2 ;INDEX CONST. TO ACCESS NEXT RCVD CHAR REG 9087 9088 gggg 000012 000014 000016 8AR=12 BKR=14 SSR=16 :INDEX CONST. sINDEX CONST. ;INDEX CONST. 9084 9085 9086 000004 000006 000010 LPR=4 CAR=6 BCR=10 ;INDEX CONST. ;INDEX CONST. ;INDEX CONST. TO TO TO TO TO TO ACCESS LINE PARAMETER REG. ACCESS CURRENT ADDRESS REG. ACCESS BYTE COUNT REG. ACCESS BUFFER ACTIVE REG. ACCESS BREAK CONTROL REG. ACCESS SILO STATUS REG. 9091 9092 9093 90946 9095 9096 9097 9098 9099 027302 027304 027306 027310 027312 027314 027316 000000 000000 000000 000003 177777 000000 000000 DHADR: 0 DHVCT: O SELMSK: 0 DHSEL: 3 LINSEL: 177777 LINMSK: 0 LMSK1: O 027320 000004 MSTCLR: .BLKW 9102 9103 9104 177777 125252 052525 ;BIT PATTERNS USED WITH '"'CAR'* AND ''BCR'' TESTS 027336 177777 125252 052525 PATRNA: 3122 027330 027332 027334 000000 ;TABLE TERMINATOR 9107 9108 9109 9110 9111 9112 9113 027340 027342 027344 027346 027350 027352 027354 000060 000300 000020 000100 000040 000200 000000 PATRNB: 60 300 20 100 40 200 0 ;BIT PATTERNS USED IN ''CAR'' MEM EXT BIT TESTY 3}8? 000000 4 JHOLDS THE ''SCR'' ADDRESS OF THE DH11 UNDER TEST ;HOLDS THE 1ST VECTOR ADDRESS OF THE DH11 UNDER TEST ;BIT TST MARKER FOR SELECTING DH11'S SPECIFIES DH11°'S SELECTED FOR TESY ;SPECIFIES LINES TO TEST ;MARKER USED TO TEST FOR LINES TO TEST sALTERNATE MARKER TO SUPPORT THE JSELECY LINES FEATURE ;FOUR WORD ADDRESS TABLE USED BY THE TEST THAT ;CHECKS OPERATION OF ‘'‘MASTER CLR' ;TABLE TERMINATOR (ZDHM-D-0 CZOHMD . P11 9114 9115 9116 9117 9118 9119 9120 9121 9122 9123 9124 9125 9126 9127 9128 9129 9130 9131 9132 9133 9134 9135 9136 9137 9138 9139 9140 9141 9142 9143 9144 9145 9146 9147 9148 9149 9150 9151 9152 9153 9154 9155 9156 9157 9158 9159 9160 9161 9162 9163 9164 9165 9166 9167 9168 9169 027356 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 208 K 16 SEQ 0206 SEQ 0205 POWER DOWN AND UP ROUTINES 000000 :TABLE TERMINATOR 0 sTHIS TABLE STORES THE BYTE COUNT AND LINE PARAMETERS ;8 SUBTESTS IN THE MULTILINE PARITY/DATA TEST 027360 027362 027364 027366 027370 027372 027374 027376 027400 027402 027404 027406 027410 027412 027414 027416 177400 027363 177400 027323 PRTYTB: -400 27363 -400 27323 =200 27362 =200 27322 177600 027362 177600 027322 177700 27361 177700 027321 177740 027360 -100 27361 -100 27321 =40 27360 -40 27320 177740 027320 :256 CHARS ;2400 BAUD ;256 CHARS ;2400 BAUD -~ ;128 CHARS ;2400 BAUD ;128 CHARS ;2400 BAUD ;64 CHARS ;2400 BAUD ;64 CHARS ;2400 BAUD ;32 CHARS ;2400 BAUD ;32 CHARS ;2400 BAUD FOR THE ODD PARITY - B BITS EVEN PARITY - 8 BITS ODD PARITY - 7 BITS EVEN PARITY - 7 BITS ODD PARITY - 6 BITS EVEN PARITY -~ 6 BITS ODD PARITY - 5 BITS EVEN PARITY - 5 BITS ;THIS 16 WORD TABLE CONTAINS THE TEST DATA USED BY THE AUTO ECHO sTEST (ALL 1'S DATA TABLE) 027420 027422 027424 027426 027430 027432 027434 027436 027440 027442 027444 027446 027450 027452 027454 027456 100377 100777 101377 101777 102377 102777 AETAB: 100377 100777 101377 ;TEST DATA FOR LINE 00 ;TEST DATA FOR LINE 01 101777 102377 102777 103377 103777 104377 104777 105377 105777 106377 106777 107377 107777 103377 103777 104377 104777 105377 105777 106377 106777 107377 107777 ;TEST DATA FOR LINE 17 :THIS 16 WOR) TABLE CONTAINS THE TEST DATA USED BY THE AUTO ECHO ;TEST (ALL 0'S DATA TABLE) 027460 027462 027464 027466 027470 027472 027474 027476 027500 027502 027504 100000 100400 101000 101400 102000 102400 103000 103400 104000 104400 105000 AETABO: 100000 100400 101000 101400 102000 102400 103000 103400 104000 104400 105000 ;TEST DATA FOR LINE 00 ;TEST DATA FOR LINE 01 CIDHM-D-0 CZDHMD PN 9170 9171 9172 9173 9174 9175 9176 9177 9178 9179 9180 9181 9182 9183 9184 9185 9186 9187 9188 9189 9190 9191 9192 9193 9194 9195 9196 9197 9198 9199 9200 9201 9202 9203 9204 9205 9206 9207 9208 9209 9210 9211 9212 9213 9214 9215 9216 9217 9218 9219 9220 9221 9222 9223 9224 9225 027506 027510 027512 027514 027516 MACYT1 30A(1052) 09-MAR-78 15:32 L 16 10-MAR-78 08:05 PAGE 209 POWER DOWN AND UP ROUTINES 105400 105400 106000 106400 107000 107400 106000 1064600 107000 107400 ;THIS ;LINE 027520 027522 027524 027526 027530 027532 027534 027536 027540 027542 027544 027546 027550 027552 IS DONE LINBIT: 027556 027560 000000 LINACT: 027554 ;TEST DATA FOR LINE TABLE USED BY 000001 000002 000004 000010 000020 000040 000100 000200 000400 001000 002000 004000 010000 020000 040000 100000 Sea 0207 SEQ 0206 THE AUTO ECHO TEST 2 17 TO RESET ACTIVE BIT WHEN A ;DEACTIVATE LINE 00 ;sDEACTIVATE LINE 01 BIT00 BIT01 BITO2 BIT03 BIT04 81705 BIT06 BIT07 81708 BITO9 ;DEACTIVATE LINE 17 sMAINTAINS STATUS OF ACTIVE LINES ;DURING AUTO ECHO TEST 2 0 ;THIS TABLE CONTAINS 16. COUNTERS USED BYN THE MULTI-LINE sPARITY TESY 027562 000020 MULPTB: TO KEEP TRACK OF .BLKW 16. TOTAL CHARS RECEIVED ;SIXTEEN WORD COUNTERS TABLE ;THIS 16 WORD TABLE CONTAINS THE TEST DATA USED BY THE BREAK BIT sTEST 027622 027624 027626 027630 120000 120400 121000 121400 122000 122400 123000 123400 124000 124400 027632 027634 027636 027640 027642 027644 027646 027650 027652 027654 027656 027660 125000 125400 126000 126400 127000 127400 027662 131177 ;TEST DATA FOR LINE 00 ;TEST DATA FOR LINE 01 BRKTAB: RGMSK1: 127400 ;TEST DATA FOR LINE 17 131177 ;MASK TO SPECIFY R/W BITS FOR NORMAL ‘'SCR'' REG TEST CZOKM-D-0 CZDHMD PN 9226 9227 9228 9229 9230 9231 9232 9233 9234 9235 9236 9237 9238 9239 9240 9241 9242 9243 9244 9245 9246 9247 9248 9249 9250 9251 9252 9253 9254 9255 9256 9257 9258 9259 9260 9261 9262 9263 9264 9265 9266 9267 9268 9269 9270 9271 9272 9273 9274 9275 9276 9277 9278 9279 9280 9281 027664 027666 027670 027672 027674 027676 MACY11 30A(1052) 09-MAR~78 15:32 046600 177767 177777 100077 042200 030100 10-MAR-78 08:05 PAGE 20 M6 SEQ 0208 SeQ 0207 POWER DOWN AND UP ROUTINES RGMSK2: RGMSK3: RGMSK4: RGMSKS: RGMSK6: INTMSK: 46600 177767 1777177 100077 42200 30100 s MASK s MASK ;MASK JMASK :MASK :MASK TO SPECIFY READ ONLY BITS IN "'SCR'° FOR NORMAL MODE TEST TO SPECIFY R/W BITS IN 'LPR'" TO SPECIFY R/W BITS IN 'BKR'' TO SPECIFY R/W BITS IN ''SSR" TO SPECIFY READ ONLY BITS IN ''SCR'* FOR MAINT. MODE TEST USED TO SELECT INTR BITS TO TEST ;DH11 ADDRESS TABLE - THIS TABLE CONTAINS THE ''SCR'' ADDRESS FOR UP TC ;SIXTEEN DH11'S 027700 027702 027704 027706 027710 027712 027714 027716 027720 027722 027724 027726 027730 027732 027734 027736 160020 160040 160060 160100 160120 160140 160160 160200 160220 160240 160260 DHADTB: " 160300 160320 160340 160360 160400 160020 160040 160060 160100 160120 160140 160160 160200 160220 160240 160260 160300 160320 160340 160360 160400 ;ADDRESS OF FIRST DH11 ;ADDRESS OF SECOND DH11 ;ADDRESS OF THE LAST DH11 ;DH11 VECTOR TABLE - THIS TABLE CONTAINS THE VECTOR ADDRESSES FOR UP ;7O SIXTEEN DH11'S 027740 027742 027744 027746 000330 000350 000370 000410 000430 000450 027750 027752 027754 027756 027760 027762 027764 027766 027770 027772 027774 027776 000470 000510 000530 000550 000570 000610 000630 000650 000670 000710 030000 000000 DHVCTB: 330 350 370 410 430 ;ADDRESS OF VECTOR FOR FIRST DH11 ;ADDRESS OF VECTOR FOR SECOND DH11 450 470 510 530 550 570 610 630 650 670 VCFLG: 710 ;ADDRESS OF VECTOR FOR LAST DHM O ;VECTOR SET UP FLAGG ;BR PRIORITY LEVEL TABLE ~ THIS TABLE CONTAINS THE PRIORITY LEVELS ;FOR UP TO SIXTEEN DH11'S - THE RCVR LEVEL IS STORED IN THE LOW BYTE ;AND THE XMTTR LEVEL IN THE HIGH BYTE 030002 030004 120240 120249 BRLVL: 720240 120240 ;BRLEVELS FOR FIRST DH11 ;:BR LEVELS FOR SECOND DH11 9289 9290 9291 9292 9293 9294 9295 9296 9297 9298 9299 9300 9301 9302 9303 9304 9305 9306 9307 9308 9309 9310 9311 9312 9313 9314 9315 9316 9317 9318 9319 9320 9321 9322 9323 9324 9325 9326 9327 9328 9329 9330 9331 9332 9333 9334 9335 9336 9337 030006 030010 030012 030014 030016 030020 030022 030024 030026 030030 030032 030034 030036 030040 030042 030042 030044 030046 030050 030052 030054 030056 030060 030062 030064 030066 030070 030072 030074 030076 030100 030102 10-MAR-78 08:05 IS FILLED BY THE AUTOSIZER. DHADRS: WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD sTHIS DH VECTOR 030104 030104 030106 030110 030112 030114 030116 030120 030122 030124 030126 030130 030132 030134 030136 030140 030142 000000 000000 000000 000000 000000 000000 006000 000000 000000 000000 000000 000000 000000 000000 000000 000000 SEQ 0209 SEQ 02 8 ;THIS DH ADDRESS TABLE 120240 120240 120240 120240 120240 120240 120240 120240 120240 000000 000000 000000 000000 000000 000000 000000 1 ;BR LEVELS FOR LAST DH11 120240 120240 000000 B 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 120240 000000 000000 000000 000000 000000 000000 000000 000000 000000 PAGE 211 POWER DOW«d AND UP ROUTINES DHVEC: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD OOOOOOOOOCOOOOOOO 9282 9283 9284 9285 9286 9287 9288 MACY11 30A(1052) 09-MAR-78 15:32 QOO0 OO0OOOOOOOOOOO CZDHM-D-0 (ZDHMD.P11 TABLE IS FILLED BY THE AUTOSIZER. CZDHM-D-0 CZDHMD PN 93N 9372 9373 9374 9375 9376 9377 9378 9379 9380 9381 9382 9383 9384 9385 9386 9387 9388 9389 9390 9391 9392 9393 08:05 PAGE 212 POWER DOWN AND UP ROUTINES 030144 030144 030146 030150 030152 030154 030156 030160 030162 030164 030166 030170 030172 030174 030176 030200 030202 030204 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 DMADRS: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD sTHIS DM VECTOR TABLE 030206 030206 030210 030212 030214 030216 030220 030222 030224 030226 030230 030232 030234 030236 030240 030242 030244 030246 030246 030250 030252 030254 030256 030260 030262 030264 030266 030270 030272 030274 030276 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000001 000002 000004 000010 000020 000040 000100 000200 000400 001000 002000 004000 010000 DMVEC: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD SLNSEL: .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD .WORD IS FILLED BY THE AUTOSIZER. OCOO0OO0OOOOOOOOOCOOOOO0O ;THIS DM ADDRESS TABLE COO0OO0OOOOODOO0O0OOOO 9370 10-%AR-78 OO 9342 9343 9344 9345 9346 9347 9348 9349 9350 9351 9352 9353 9354 9355 9356 9357 9358 9359 9360 9361 9362 9363 9364 9365 9366 9367 9368 9369 30A(1052) N =N 9338 9339 9340 9341 MACY11 09-MAR-78 15:32 100 200 400 1000 2000 4000 10000 IS FILLED BY THE AUTOSIZER. Sea 0210 SEQ 0209 (IDHM-D-0 CZOHMD.P11 9394 9395 9396 9397 9398 9399 9400 9401 9402 9403 9404 9405 9406 9407 9408 9409 9410 9411 9412 9413 9414 9415 9416 9417 9418 9419 9420 9421 9422 9423 9424 9425 9426 9427 9428 9429 9430 9431 9432 9433 9434 9435 9436 9437 9438 MACY11 30A(1052) 09~MAR-78 15:32 10-MAR-78 08:05 .WORD .WORD .WORD 030306 030310 030312 030314 030316 030317 030320 030322 030324 000000 000000 000000 000000 000 000 000000 000000 000000 ADRVEC: 0 DHMCSR: 0 030326 030330 030332 000000 000000 000000 ADPTR: 0 030336 030340 030342 030344 030346 030350 030352 030354 030356 000000 000037 000077 000177 000377 000000 000000 000000 000000 000000 1 SEQ 0211 SEQ@ 0210 20000 40000 100000 020000 040000 100000 030334 D POWER DOWN AND UP ROUTINES 030300 030302 030304 000400 000001 000002 000004 000010 000020 000040 000100 000200 002000 PAGE 213 ;ADDRESSES BETWEEN VECTORS - FILLED BY THE AUTOSIZER ;MODEM CONTROL CONTRCL AND STATUS REGISTER. DHMLSR: 0 ;MODEM CONTROL LINE STATUS REGISTER. $DHSEL: 0 ;DEVICE SELECY PARAMETER - FILLLED BY THE AUTOSIZER. DHRLVL: .BYTE 0 ;BR LEVEL FOR RCVR DHTLVL: .BYTE O ;BR LEVEL FOR XMITTER DHNUM: O ;CONTAINS NUMBER OF THE DH11 UNDER TEST LINE: O ;CONTINES NUMBER OF THE LINE UNDER TEST LINEA: 0 ;LOCATION TO SAVE LINE NUMBER ;ADDRESS POINTERS TO SET UP TABLES WHEN INPUTTING PARAMETERS VCPTR: BRPTR: ;THE 0 0 FOLLOWING ;POINTS TO ADDRESS TABLE ;POINTS TO VECTOR TABLE ;POINTS TO BR LEVEL TABLE TEN CONSTANTS ARE USED BY THE MODEM CONTROL PORTION OF THIS PROGRAM. STEP=400 L INENA=1 TRMRDY=2 RS=4 SECTX=10 SECRX=20 £S=40 €0=100 RING=200 CLRMUX=2000 TDATAT: TDATA2: TITFLG: TIMEA: TIMEB: TIMEC: TNULL: 0O 37 77 177 377 O O 0 O O sDATA BUFFER FOR BASIC DATA TEST ;TEST DATA FOR FIVE BIT CHAR ;TEST DATA FOR SIX BIT CHAR ;TEST DATA FOR SEVEN BIT CHAR sTEST DATA FOR EIGHY BIT CHAR ;FLAG TO ALLOW PRINTING TITLE ONLY ONCE ;GENERAL PURPOSE TIMERS ;TIMER FOR TIMING TESTS ;CONTAINS TWO NULL CHARS USED BY BREAK TEST CZOWM-D-0 CZOHMD . P11 MACY11 30A(1052) 09-MAR-78 15:32 £E 10-MAR-78 08:05 PAGE 214 POWER DOWN AND UP ROUTINES 9439 R 9440 ;ERROR MESSAGE 9441 R 9442 3423 444 9445 9446 9447 9448 9449 9450 9451 9452 9453 9454 9455 9456 9457 9458 9459 9460 9461 9462 9463 9464 R R e 1 SEQ 0212 SEQ 0211 R R R e INFORMAYION - MESSAGE BUFFERS AND POINTERS R A R R A AR R R T R T AR A AR R AR R AN AR NN AR stgd) RO RN :INFORMATION FOR MESSAGE 1 030360 030366 030374 030402 030410 030416 030424 030427 030434 030442 030450 030456 030464 030472 030500 044104 043505 020122 042522 040503 052040 052125 040 020040 024523 051450 020040 020040 042101 043505 030461 051511 042522 041516 051525 046511 000 050050 020040 020040 024520 042524 042040 020122 042101 0510640 042524 042506 020105 042105 047505 EMi: .ASCIZ 'DH11 024503 050050 020040 020040 DHI1: JASCIZ * 030506 (30514 030522 001116 001162 000000 001202 001164 001176 001166 .EVEN DT1: .WORD SERRPC,$TMPO,$REG6,SREGO,$REGT,SREGZ.0 052123 053105 051040 000122 3222 REGISTER REFERENCE (PO) (PS) (SP) CAUSED TIMEOUT® TEST DEVADR REGADR' :INFORMATION FOR MESSAGE 2 9467 9468 9469 9470 9471 9472 9473 9474 9475 9476 9477 9478 9479 9480 96481 9482 9483 9484 9485 9486 9487 030524 030532 030540 030546 030554 030562 030570 030576 030604 030612 030620 030626 030634 030642 030650 030656 9490 9491 9492 9493 9494 030702 030710 030716 030724 030732 030660 030666 030674 054523 041440 046117 051511 051105 024040 020040 020051 050123 052040 020040 051104 040507 053440 020040 000 030660 001116 001162 001170 052123 047117 051040 042524 047522 0461520 024040 020040 020051 051505 042504 020040 051104 051501 051440 046505 051124 043505 020122 000122 020051 051520 024040 020040 020124 040526 042522 020040 020040 041057 001202 001164 001172 001176 001166 000000 3233 EM2: LASCIZ 'SYSTEM CONTROL REGISTER ERROR' DH2: LASCIZ ' .EVEN DT2: .WORD S$ERRPC,$TMPO,$REG6,$REGO,SREGT,SREG2,SREG3,$REG4 .0 (PO) (PS) (SP) TEST DEVADR REGADR ;INFORMATION FOR MESSAGE 3 044104 051501 046103 040506 052040 030461 042524 040505 046111 020117 046440 020122 020122 042105 046103 EM3: LASCIZ 'DH11 MASTER CLEAR FAILED TO CLR SPECIFIED REG' WAS S/B’ CIDHM-D-0 CZONMD . P11 9495 9496 9497 9498 9499 9500 9501 9502 9503 9504 9505 9506 9507 9508 9509 9510 9511 9512 9513 9514 9515 9516 9517 9518 9519 9520 9521 9522 9523 9524 9525 9526 9527 9528 9529 9530 9531 9532 9533 9534 9535 9536 9537 9538 9539 9540 9541 9542 9543 9544 9545 9546 9547 9548 9549 9550 030740 030746 030754 MACY11 30A€1052) 09-MAR-78 15:32 020122 043111 042522 050123 042511 000107 10-MAR-78 08:05 PAGE 215 £ 1 SEa 0213 SEQ 0212 POWER DOWN AND UP ROUTINES 041505 020104 ; INFORMATION FOR MESSAGE 4 030760 030766 030774 031002 031010 044514 051101 051105 051511 051105 042516 046501 051040 042524 047522 050040 052105 043505 020122 000122 EM4: LASCIZ 'LINE PARAMETER REGISTER ERROR' ; INFORMATION FOR MESSAGE 5 031016 031024 031032 031040 031046 051102 047503 020114 052123 051122 040505 052116 042522 051105 051117 020113 047522 EMS: .ASCl1Z 'BREAK CONTROL REGISTER ERROR’ 044507 042440 000 :INFORMATION FOR MESSAGE 6 031053 031060 031066 031074 031102 123 052123 051040 042524 047522 046111 052101 043505 020122 000122 020117 051525 051511 051105 EM6: .ASCIZ 'SILO STATUS REGISTER ERROR' :INFORMATION FOR MESSAGE 7 031106 031114 031122 031130 031136 031144 031152 052503 020124 051505 044507 042440 026440 020105 051122 042101 020123 052123 051122 046040 054043 047105 051104 042522 051105 051117 047111 000130 EM7: .ASCIZ 'CURRENT ADDRESS REGISTER ERROR - LINE #XX' ; INFORMATION FOR MESSAGE 10 031160 031166 031174 031202 031210 031216 031224 054502 052517 051040 042524 047522 044514 054130 042524 052116 043505 020122 020122 042516 00¢ 041440 051105 051511 051105 020055 021440 EM10: .ASCIZ 'BYTE COUNTER REGISTER SRROR - LINE #XxX' ;INFORMATION FOR MESSAGE 11 031227 031234 031242 031250 031256 031264 125 041505 044104 053103 042524 000124 042516 042524 030461 020122 051122 050130 020104 051040 047111 050125 EM11: LASCIZ "UNEXPECTED DH11 RCVR INTERRUPT' — (I0HM-D-0 D . P11 CZDHM 9551 9552 9553 9554 9555 9556 9557 9558 9559 9560 9561 9562 9563 9564 9565 9566 9567 9568 9569 9570 9571 9572 9573 9574 9575 9576 9577 9578 9579 9580 9581 9582 9583 9584 9585 9586 9587 9588 9589 9590 9591 9592 9593 9594 9595 9596 9597 9598 9599 9600 9601 9602 9603 9604 9605 9606 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 216 6 1 SEQ 0214 SEQ 0213 POWER DOWN AND UP ROUTINES ; INFORMATION FOR MESSAGE 12 031266 031274 031302 031310 031316 031324 054105 042105 020061 051124 051105 000 042520 042040 046530 044440 052522 EM12: .ASCIZ '"UNEXPECTED DH11 XMITTR INTERRUPT' FAILED TO GENERATE ; INFORMATION FOR MESSAGE 13 031327 031334 031342 031350 031356 031364 031372 031400 031406 020117 040522 053103 062524 000124 040510 044501 020105 042105 042507 042524 020122 051122 020122 040514 040506 052040 042516 051040 047111 050125 EmM13: .ASCIZ 'CHAR AVAILABLE RCVR INTERRUPT' ;INFORMATION FOR MESSAGE 14 031410 031416 031424 031432 031440 031446 031454 051124 052111 050116 044507 047522 044514 020040 047101 042524 020122 020103 020122 042516 noo 046523 020122 047514 051105 020055 021440 EM14: LASCIZ 'TRANSMITTER NPR LOGIC ERROR ~ LINE # ' ;INFORMATION FOR MESSAGE 15 031457 031464 031472 031500 031506 031514 031522 130 020122 042105 047111 050125 044514 020040 044515 040506 052040 042524 020124 042516 000 052124 046111 EM15: LASCIZ 'XMITTR FAILED TO INTERRUPT - LINE # ° 020117 051122 020055 021440 ;INFORMATION FOR MESSAGE 16 031525 031532 031540 031546 031554 122 040506 052040 042524 000124 053103 046111 020117 051122 020122 042105 047111 050125 EM16: LASCIE 'RCVR FAILED TO INTERRUPT' ; INFORMATION FOR MESSAGE 17 031556 031564 031572 031600 051124 052111 044524 042440 047101 042524 044515 051122 046523 020122 043516 051117 EM17: LASCIZ "TRANSMITTER TIMING ERROR - LINE # ' (ZDHM-D-0 CZOHMD.P11 9607 9608 9609 031606 031614 031622 9610 9611 9612 9613 9614 9615 9616 9617 9618 9619 9620 32%} 031630 031636 031644 031652 031660 031666 031674 031702 031710 031716 9623 9624 031720 031726 MACY11 30A(1052) 09-MAR-78 15:32 026440 020105 024040 020040 020051 050123 052040 020040 051104 042505 044524 020040 000103 H 10-MAR-78 08:05 PAGE 217 POWER DOWN AND UP ROUTINES 046040 020043 047111 000040 024040 020040 020051 051505 042504 020040 020104 0462515 044524 051520 024040 020040 020124 040526 050123 020040 020102 042515 041520 020051 031734 031742 031750 031756 9632 9633 9634 9635 9636 9637 9638 9639 031761 031766 031774 032002 032010 032016 032024 9642 9643 9644 9645 9646 9647 032025 032032 032040 032046 032054 032062 042522 051105 047111 047522 044514 020040 042503 052040 020107 020122 042516 000 053111 046511 LASCIZ Y (PO) (PS) (SP) TEST DEVADR SPEED TIMEB TIMEC' EM20: .ASCIZ 'RECEIVER TIMING ERROR =~ LINE # WAS S/B’ ° 051105 020055 021440 :INFORMATION FOR MESSAGE 21 gggg 122 040506 052040 042524 020124 042516 000 053103 046111 020117 051122 020055 021440 020122 042105 047111 050125 044514 020040 322? EM21: LASCIZ 'RCVR FAILED TO INTERRUPT - LINE # ° ; INFORMATION FOR MESSAGE 22 032070 032076 103 053101 040506 052040 020124 046511 044514 020040 040510 044501 046111 020117 047117 020105 042516 000 020122 020114 042105 042523 052040 020055 EM22: .ASCIZ 'CHAR AVAIL FAILED TO SET ON TIME - LINE # ' 021440 322} 9653 965L 9655 9656 9657 9658 9659 9660 9661 9662 DH6: SEQ@ 0215 SEQ 0214 ;INFORMATION FOR MESSAGE 20 9625 9626 9627 9628 9629 9648 gggg 1 ;INFORMATION FOR MESSAGE 23 032101 032106 032114 032122 032130 032136 032142 032150 032156 032164 102 042040 042524 051122 046040 020043 024040 020040 020051 050123 051507 052101 052123 051117 047111 000040 041520 024040 020040 020051 041511 020101 042440 026440 020105 EM23: ,ASCIZ 'BASIC DATA TEST ERROR - LINE # ' 020051 051520 024040 020040 DH7: LASCIZ ' DEVADR (PO) (PS) (SP) TEST CHRLNG (ZOHM-D-0 CZDHMD . P11 9663 9664 9665 9666 9667 9668 9669 9670 9671 9672 9673 9674 9675 9676 9677 9678 9679 9680 9681 9682 9683 9684 9685 9686 9687 9688 9689 9690 9691 9692 9693 9694 9695 9696 9697 9698 9699 9700 9701 9702 9703 9704 9705 9706 9707 9708 970% 9710 9711 9712 9713 9714 9715 9716 9717 9718 032172 032200 032206 032214 032222 032230 032236 MACY11 30A(1052) 052040 020040 051104 046122 053440 020040 000 051505 042504 020040 043516 051501 051440 09-MAR-78 15:32 10-MAR-78 (08:05 PAGE 218 1 1 SEQ 0216 SEQ 0215 POWER DOWN AND UP ROUTINES 020124 040526 044103 020040 020040 041057 ;INFORMATION fOR MESSAGE 24 032237 032244 032252 032260 032266 032274 101 041505 051505 047522 044514 020040 052125 047510 020124 020122 042516 000 020117 €52040 051105 020055 021440 EM24: LASCI2Z 'AUTO ECHO TEST ERROR - LINE # ' ;INFORMATION FOR MESSAGE 25 032277 032304 032312 032320 032326 032334 102 041040 051505 047522 044514 020040 042522 052111 020124 020122 042516 000 045501 052040 051105 020055 021440 EM25: .ASCI2 'BREAK BIT TEST ERROR - LINE ¥ ° ;INFORMATION FOR MESSAGE 26 032337 032344 032352 032360 032366 032374 110 052504 052040 051105 020055 021440 046101 046120 051505 047522 044514 020040 026506 054105 020124 020122 042516 c00 EM26: LASCI2 'HALF-DUPLEX TEST ERROR - LINE # ' ; INFORMATION FOR MESSAGE 27 032401 032406 032414 032422 032430 125 032470 032476 032504 041505 052502 047522 050101 040 020040 024523 051450 020040 020040 041520 050122 032512 032520 032526 001116 001162 000000 032433 032440 032446 032454 032462 042516 042524 020123 020122 000 050050 020040 020040 024520 04252¢ 052040 020040 051520 050130 020104 051105 051124 EM27: LASCIYL "UNEXPECTED BUS ERROR TRAP' 024503 050050 020040 020040 052123 050122 DH3: LASCI2 ' 001202 001164 001176 001166 DT3: .WORD $ERRPC,S$TMPO,SREGH, SREGO, SREGT,SREGZ.0 052040 000040 .EVEN ; INFORMATION (PO) (PS) FOR MESSAGE 30 (SP) TEST TRPPC TRPPS ' (ZOHM-D-0 CZDHMD P11 9719 9720 9721 9722 9723 9724 9725 9726 9727 9728 9729 9730 9734 9732 9733 9734 9735 9736 9737 9738 9739 9740 9741 9742 9743 9744 9745 9746 9747 9748 9749 9750 9751 9752 9753 9754 9755 9756 9757 9758 9759 9760 9761 9762 L9763 9764 9765 9766 9767 9768 9769 9770 9771 9772 9773 9774 032530 032536 032544 032552 032560 MACY11 30A(1052) 09-MAR-78 15:32 047125 052103 053123 052123 050101 054105 042105 020104 020122 000 10-MAR-78 08:05 PAGE 219 1 J Sea 0217 SEQ C216 POWER DOWN AND UP ROUTINES 042520 051040 047111 051124 EM30: .ASCIZ "UNEXPECTED RSVD INSTR TRAP' : INFORMATION FOR MESSAGE 31 032563 032570 032576 032604 032612 032620 032626 032633 032640 032646 032654 032662 032670 032676 032704 032712 032720 032726 10 052125 041505 . 047510 052101 020101 050115 05110 051105 047522 020055 044514 021440 020040 040 050050 020040 020040 024523 020040 051450 024520 020040 042524 020040 053440 042101 020122 040502 051104 020040 040527 020040 020040 000102 020117 042040 047503 020105 020122 0642516 000 024503 050050 020040 020040 052123 051501 051440 020040 020123 027523 EM31: -ASCIZ *AUTO ECHO DATA COMPARE DH&: .ASCIZ ' (PO) (PS) (SP) FRROR - LINE TEST # WASADR ' SBADR WAS ;INFORMATION FOR MESSAGE 32 032730 032736 032744 032752 032760 032766 032772 033000 033006 033014 052501 044103 052123 047505 046040 020043 024040 020040 024507 051505 047524 020117 052040 052125 047111 000040 041520 046050 020040 000124 042440 042524 046511 026440 020105 EM32: LASCIZ 'AUTO ECHO TEST 020051 051120 052040 DH5: .ASCIZ 't 033020 033026 001116 000000 001202 001206 .EVEN DT4: .WORD SERRPC,$TMPO,$TMP2,0 (PO) (LPRG) TIMEOUT - LINE # ° TEST! ;INFORMATION FOR MESSAGE 33 033030 033036 033044 033052 033060 033066 040520 046040 052040 051105 020055 021440 044522 043517 051505 047522 044514 0200640 054524 041511 020124 020122 042516 000 EM33: LASCIZ "PARITY LOGIC TEST ERROR - LINE # ' ; INFORMATION FOR MESSAGE 34 033G73 115 046125 044524 EM34: .ASCIZ "MULTI-LINE PARITY DATA TEST ERROR -~ LINE # - SUBTEST # S/B' (ZOHA-D-0 CZDOHMD . P11 9775 9776 9777 9778 9779 9780 9781 9782 g;gz 9785 9786 9787 9788 9789 9790 9791 9792 9793 9794 9795 9796 9797 9798 9799 9800 9801 9802 9803 9804 9805 9806 9807 033100 033106 033114 033122 033130 033136 033144 033152 033160 MACY11 30A(1052) 09-MAR-78 15:32 0445055 040520 042040 042524 051122 046040 020043 052523 020124 047111 044522 052101 052123 051117 047111 020040 052102 020043 10-MAR-78 08:05 PAGE 220 POWER DOWN AND UP ROUTINES 042440 026440 020105 020055 051505 000040 033166 033174 033202 033210 033216 033224 033232 033240 033246 033254 033262 033270 052515 044514 051101 040504 051505 042515 024040 020040 024507 046124 033262 001116 000000 052114 042516 052111 040526 020124 052517 041520 046050 020040 047111 001202 026511 050040 020131 052040 044524 000124 020051 051120 041501 000 001210 EM35: .ASCIZ ‘MULTI-LINE PARITY DATA TEST TIMEOUT' DH14: LASCIZ ' .EVEN DT6: .WORD SERRP(,$TMPO,$TMP3,0 (PO (LPRG) ACTLIN' ; INFORMATION FOR MESSAGE 36 033272 033300 033306 033314 044103 040526 042514 047505 051101 046111 052040 052125 040440 041101 046511 000 EM36: .ASCIZ °'CHAR AVAILABLE TIMEOUT' : :INFORMATION FOR MESSAGE 37 033321 033326 033334 033342 033350 033356 104 047503 020105 020122 042516 000 052101 050115 051105 020055 021440 020101 051101 047522 044514 020040 9819 9820 9821 033357 033364 033372 102 020122 042526 043125 041501 051040 042506 044524 043505 9823 9824 9825 033404 033414 026440 020105 046040 020043 0<7111 000040 gg}g EM37: .ASCIZ 'DATA COMPARE ERROR - LINE # ' :INFORMATION FOR MESSAGE 40 033400 042440 051122 EM40: _ASCIZ 'BUFFER ACTIVE REG ERROR - LINE # 051117 gggg 9830 ¢ : INFORMATION FOR MESSAGE 35 9810 9811 9812 9813 9814 9815 9816 9828 9829 SEQ 0218 SEQ 0217 020105 054524 020101 3%83 9822 1 K ;INFORMATION FOR MESSAGE 41 03342¢ 033430 033436 041522 046101 052116 051126 042523 051105 043040 044440 052522 EM4T: .ASCIZ 'RCVR FALSE INTERRUPT' ' CZDHM-D~0 C20HMD . P11 9831 9832 033444 9835 9836 033447 033454 MACY11 30A(1052) 09-MAR-78 15:32 052120 L 10-MAR-78 08:05 PAGE 221 POWER DOWN AND UP ROUTINES : INFORMATION FOR MESSAGE 42 9837 9838 9839 033462 033470 9842 033473 123 053117 053517 051117 046111 051105 042440 000 020117 046106 033500 033506 0335146 033522 9848 9849 9850 9851 033536 033544 033552 033530 1 23 046111 020117 053117 053517 042514 043440 051105 043040 020104 047105 046106 044501 047524 051105 051126 051105 000 044440 052522 052116 052120 052101 020105 033553 033560 033566 033574 033602 033610 033616 033624 033632 9869 033656 116 047117 042440 052101 052111 052116 052120 020105 051124 051105 000 046530 044440 052522 020130 054522 042514 043440 042515 043040 020104 047105 047515 044501 047524 051105 130 047504 064515 042516 020124 043040 047524 043440 047105 033650 044501 033664 033672 033700 033706 051105 046530 044440 052522 042514 ‘'SILO OVERFLOW FAILED TO GENERATE RCVR INTERRUPT' EM44: ASCIZ 'NON EX MEMORY FAILED TO GENERATE XMITTR INTERRUPT' 052101 052111 052116 052120 EM4S: LASCIZ 'XMIT DONE FAILED TO GENERATE XMITTR INTERRUPT' 020104 020105 051124 051105 000 3%;2 9877 9878 9879 9880 9881 9882 9883 9884 9885 9886 _ASCIZ ; INFORMATION FOR MESSAGE 45 033635 033642 9870 9871 9872 9873 9874 EM&3: ;INFORMATION FOR MESSAGE 44 9866 9867 9868 'SILO OVERFLOW ERROR' 041522 ggg% 9859 9860 9861 9862 9863 gggg _ASCI!Z :INFORMATION FOR MESSAGE 43 9843 9844 9845 9846 9855 9856 9857 9858 EM4L2: 051122 3%2? 9854 SEQ 0219 SEQ 0218 000 gggz 9847 1 :INFORMATION FOR MESSAGE 46 033713 033720 033726 033734 033742 033750 033756 033764 033772 034000 103 052116 042522 046505 040520 051516 020124 020122 042516 000 051125 040440 051523 051117 052124 052040 051105 020055 021440 042522 042104 046440 020131 051105 051505 047522 044514 020040 EM46: .ASCIZ 'CURRENT ADDRESS MEMORY PATTERNS TEST ERROR - LINE ¥ ° CIOHM-D-0 CZDHMD P11 9887 9888 9889 9890 9891 9892 9893 9894 2895 034001 034006 034014 034022 034030 034036 034044 034052 034060 034066 034074 9896 9897 9898 9899 034076 9900 034104 9901 034112 9902 9903 9904 9905 034120 9906 034126 9907 -034134 9908 034142 9909 034150 9910 034156 9911 034164 9912 034172 9913 034200 9914 9915 9916 034201 9917 034206 9918 034214 9919 034222 9920 034230 9921 034236 9922 034244 9923 034252 9924 9925 9926 9927 034257 9928 034264 9929 034272 9930 034300 9931 034306 9932 034314 9933 034322 9934 034330 9935 034336 9936 034344 9937 034352 9938 034360 9939 034366 9940 034374 9941 034402 9942 n 10-MAR-78 08:05 PAGE 222 POWER DOWN AND UP ROUTINES MACY11 30A(1052) 040 020040 053505 052101 020040 020040 042101 043505 020040 020040 000102 050050 046040 020122 051124 042524 042040 020122 042101 040527 020040 024503 047111 050040 020116 052123 053105 051040 020122 020123 DH10: 001116 001162 001170 001202 001164 001172 001204 001166 000000 DTS: 09-MAR-78 15:32 (PC) LINEWR SEQ 0220 SEQ 0219 -ASCIZ * PATTRN TEST DEVADR REGADR WAS .WORD SERRPC,$TMPO,$TMP1,SREGO,SREGT ,SREGZ,SREG3,$REG4,0 /B’ 027523 .EVEN ;INFORMATION FOR MESSAGE 47 054502 052517 046505 040520 051516 020124 020122 042516 000 124 044524 020124 047111 020122 042040 020055 021440 042524 052116 051117 052124 052040 051105 020055 021440 041440 046440 EM4LT: .ASCIZ 'BYTE COUNT MEMORY PATTERNS TEST ERROR - LINE # ° 020131 051105 051505 047522 044514 020040 ;INFORMATION FOR MESSAGE 50 051505 042515 040527 020107 046530 047117 044514 020040 020124 052517 052111 047506 052111 020105 042516 000 EMS50: LASCIZ 'TEST TIMEQUT WAITING FOR XMIT DONE - LINE # °' ] ; INFORMATION FOR MESSAGE 51 116 043517 051505 051105 024040 020040 052103 041516 052040 020040 051104 040507 053440 020040 000 051120 uéIsn 020124 047522 041520 044514 020040 045510 051505 042504 020040 051104 051501 0514490 046040 052040 EMST: LASCIZ "NPR LOGIC DH11: LASC1Z Y TEST 2 ERROR' 020062 000122 020051 040516 044514 020040 020124 040526 042522 020040 020040 041057 (PO LINACT LINCHK TEST DEVADR REGADR WAS S/B’ {J0HM-D-0 (204RD PN 9943 9944 9945 9946 9947 9948 9949 9950 9951 9952 9953 9954 9955 9956 9957 9958 9959 9960 9961 9962 9963 9964 9965 9966 9967 9968 9969 9970 997 9972 9973 9974 9975 9976 9977 9978 9979 9980 9981 9982 9983 9984 9985 9986 9987 9988 9989 9990 9991 9992 9993 9994 9995 9996 9997 9998 MACY1T 30A(1052) 09-MAR-/8 15:32 10-MAR-78 08.05 PAGE 223 N SEQ 0221 SEQ 0220 POWER DOWUN AND UP ROUTINES ;INFORMATION FOR MESSAGE 52 034403 034410 034416 034424 034432 102 042040 047503 020105 000122 051501 052101 050115 051105 041511 020101 051101 067522 EMS2. LASCIZ *BASIC DATA COMPARE ERROR' ; INFORMATION FOR MESSAGE 53 034434 034442 034450 034456 034464 034472 034500 034506 034514 034522 034530 0246040 020040 020104 050123 052040 020040 051104 040507 053440 020040 000 041520 050123 020040 020051 051505 042504 020040 051104 051501 051440 020051 042505 024040 020040 020124 040526 042522 020040 020040 041057 DH12: LASCIZ 't (PO) SPEED (sP) TEST DEVADR REGADR WAS $/B° (SP) TEST DEVADR CHRLNG SCRWAS SCRS/B* ;INFORMATION FOR MESSAGE 55 034531 034536 034544 034552 034560 034566 034574 034602 034610 034616 034624 040 020040 024523 051450 020040 020040 042107 031110 051440 020123 027523 050050 020040 020040 024520 042524 042040 020122 047114 051103 051440 000102 024503 050050 020040 020040 052123 053105 041440 020107 040527 051103 DH13: LASCI2 ' (PO (PS) ; INFORMATIOPN FOR MESSAGE 56 034630 034636 034644 034652 034660 034666 034674 053117 020116 040506 052040 020124 042516 000 051105 044502 046111 020117 020055 021440 052522 020124 042105 042523 044514 020040 EMS56: LASCIZ 'OVERRUN BIT FAILED TO SET - LINE # ;INFORMATION FOR MESSAGE 57 034675 034702 034710 034716 034724 034732 034740 123 042507 043122 044502 046111 046040 020043 047524 047440 047514 020124 042105 047111 000040 040522 042526 020127 0405006 026440 020105 EMS7: .ASCIZ 'STORAGE OVERHLOW BIT FAILED - LINE # (10HM-D-0 CZOHMD PN 9999 10000 10001 10002 10003 10004 10005 10006 10007 10008 10009 10010 10011 10012 10013 10014 10015 10016 10017 10018 10019 10020 10021 10022 10023 10024 10025 10026 10027 10028 10029 10030 10031 10032 10033 10034 10035 10036 10037 10038 10039 10040 10041 10042 10043 10044 10045 10046 10047 10048 10049 10050 10051 10052 10053 10054 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 B PASE 224 2 SEQ 0222 SEQ 0221 POWER DOWN AND UP ROUTINES :INFORMATION FOR MESSAGE 6C 034744 034752 034760 034766 034774 035000 035006 035014 035022 035030 035036 035037 035044 035052 035060 035064 035072 035100 035106 035114 035122 035130 035136 035144 035152 035160 035166 035174 035177 035204 035212 035220 035226 035234 035242 035250 035256 035264 035272 035300 035306 035314 035321 035326 035334 035342 035350 035356 035364 035372 035375 DH15: / (PC) DEVADR LINE / 020040 020051 042101 046040 020040 035000 024040 042040 020122 047111 000 005015 026515 042040 044504 052123 000 015 044524 030510 006440 005015 051440 042104 043040 051111 030510 005015 055103 026504 030510 043501 041511 044104 020060 020061 047516 005015 TITLE: LASCIZ <15><12>'CZDHM-D-0 052012 051505 042040 020043 TITLEZ: .ASCIZ <15><12>'TESTING DH11 042520 INMSG1: .ASCIZ <15><12>'TYPE INMSG2: .ASCI1Z <15><12>'TYPE VECTOR ADDRESS FOR FIRST DH11°'<15><12> INMSG3: .ASCIZ <15><12>"TYPE DH11 INMSGé4: .ASCI2 <15><12>' INVALID DH11 SCR ADDRESS - TRY AGAIN'<15><12> INMSGS: .ASCIZ <15><12>' INVALID DH11 VECTOR ADDRESS - TRY AGAIN'<15><12> INMSG6: +ASCIZ <15><12>'TYPE LINE SELECTION PARAMETER'<15><12> 053040 020122 051505 020122 020124 005015 015 020105 042040 020105 052103 040520 042524 005015 044514 030461 040440 051523 054522 047111 015 046101 030510 052103 042104 026440 040440 005015 015 041520 053105 020040 020105 .ASCIZ .EVEN sMISCELLANEOUS MESSAGES 043516 020061 000012 054524 051103 042522 051117 052123 006461 054524 041505 042101 020123 044506 044104 000 052012 044104 053105 042523 047511 040522 006522 047111 020104 051440 042104 026440 040440 005015 044412 042111 020061 051117 042522 052040 040507 000 052012 040440 051523 043040 042040 000012 042520 047524 051104 047506 051522 030461 050131 030461 041511 042514 020116 042515 000012 040526 044104 051103 042522 052040 040507 000 053116 042040 DH11 # DIAGNOSTIC'<15><12> '<15><12> SCR ADDRESS FOR DEVICE FIRST DH11'<15><12> SELECTION PARAMETER'<15><12> 042526 040440 051523 054522 047111 050131 CZOHM-D-0 CZDHMD.P11 10055 10056 10057 10058 10059 10060 10061 10062 10063 10064 10065 10066 10067 10068 10069 10070 10071 10072 10073 10074 10075 10076 10077 10078 10079 10080 10081 10082 10083 10084 10085 10086 10087 10086 10089 10090 10091 10092 10093 10094 10095 10096 10097 10098 10099 10100 10101 10102 10103 10104 10105 10106 10107 10108 10109 10110 035402 035410 035416 035424 035432 035437 035444 035452 N35460 035466 035474 035502 035507 035514 035522 035530 035536 035544 035552 035560 035566 035574 035602 035604 035612 035620 035626 035634 035642 035650 035656 035664 035672 035700 035701 035706 035714 035722 035730 035736 035744 035750 035754 035762 035770 035776 036004 036012 036017 036024 036032 036040 036046 036054 036062 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PAGE 225 cC g ¢ POWER DOWN AND UP ROUTINES SEQT0222 020105 051440 044524 051101 051105 015 042522 047503 042525 051440 052040 043516 044514 046105 047117 046501 005015 042012 051523 052116 020042 040524 051505 005015 042516 041505 050040 052105 000 050105 021040 047111 047524 052122 044524 015 020105 043117 042522 024040 024514 042527 041505 024040 020122 000012 047516 023461 042522 042116 047516 042522 051105 051105 047440 042522 000 052012 047516 040440 051523 041517 041040 047105 047524 030061 030062 050131 020056 042104 051505 040524 052105 053040 051522 047440 006451 VCW(: .ASCIZ <15><12>*'TYPE NO. 042040 020123 043040 006456 042040 042503 044440 052522 041503 027104 030510 042527 052517 000012 020110 053111 052116 052120 051125 005015 MSG1: LASCIZ /NO DH11'S WERE FOUND./<15><12> MSG2: LASCIZ 'NO DH RECEIVER 020117 020115 047515 047503 020114 051122 041517 042105 MSG3: LASCIZ 'NO MODEM CONTROL SPACE: DEVMAP: .ASCIZ <ASCII <15><12>'DH11, MODEM CONTROL DEVICE MAP:'<15><12> LASCII <15><12>'DH11 116 042504 052116 047111 050125 052503 006456 020040 005015 020054 020115 047522 044526 050101 015 020061 030461 042117 047117 020040 046505 047522 042524 020124 051122 000012 000040 044104 047515 047503 020114 042503 006472 042012 020040 020040 046505 051124 046440 041440 INMSG?7: .ASCIZ <15><12>'DEPRESS "'CONTINUE'' TO START TESTING'<15><12> ) / 000 030461 042504 052116 042504 046440 012 030510 044104 046440 041440 046117 042117 047117 v ss‘hgs OF ADDRESSES (OCTAL) BETWEEN VECTORS / INTERRUPT OCCURRED.'<15><12> INTERRUPT OCCURRED.'<15><12> DH11 MODEM CONTdOL MODEM CONTROL' ¢1C OR 20)*'<15><1 (Z0HM-D-0 CZDHMD.P11 — ol ) - D od D wd wd D d b &M\)NNNN—.—O-—D—!—D—D_‘—! BN 2O 00O WS i) - d ed md d b h D D b —d b ) COO0O0OO0O0ODODOOCOD 10111 101 10126 036070 036074 036102 036110 036116 036124 036132 036140 036146 036154 036162 036170 036176 036204 036212 036216 036224 036232 036240 036246 036252 MACY11 30A(1052) 09-MAR-78 15:32 051124 005015 020040 020124 051104 020040 006524 005015 020115 047522 047522 047125 045510 047107 006503 005015 042117 047117 043040 005015 036252 000020 046117 042101 053040 020040 020123 053040 006412 047515 047503 020114 026122 042040 042040 051517 000012 047516 046505 051124 052517 000 10-MAR-78 08:05 PAGE 226 D 2 SEQ 0224 SEQ 0223 POWER DOWN AND UP ROUTINES 051522 041505 0460440 020040 041505 000012 042504 052116 051105 051040 042132 040511 044524 046440 041440 046117 .ASCIZ <15><12>'ADRS VECT ADRS VECT'<155<12><15><12> MSG4: .ASCIZ <15><12>"MODEM CONTROL ERROR, RUN DZDHK DIAGNOSTIC'<15><12> MSGS: LASCIZ <15><12>/N0 MODEM CONTROL FOUND/<15><12> 042116 .EVEN ;SIXTEEN CHAR COUNTERS USED BY THE AUTO ECHO TEST #3 RCNT: .BLKW 16. ;256. WORD RECEIVER INPUT BUFFER 036312 000400 : RBUF .BLKW 256. :256(10) BYTE TRANSMITTER OUTPUT DATA BUFFER 037312 .EVEN 000400 : TBUF 000001 .END .BLKB 256. (ZDHM-D-0 CZDHMD.P1Y ABASE ACDW1 ACDW2 ACPUOP ADDWO ADDW1 ADRVEC AENV AENVM 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 030326 030306 000000 000000 027420 027460 AFATAL= 000000 AETAB AETABO AMADR1= 000000 IAMADR2= 000000 MADR3= 000000 MADR4L= 000000 MAMS1= €00000 MANS?2= 000000 MAMS 3= 000000 MAMSL= 000000 MSGAD= 000000 MSGLG= 000000 MSGTY= 000000 MTYP1= nTyp2= nTYP3= MTYP4= PASS = PRIOR= PTCSU= PTENV= 000000 000000 000000 000000 000000 000000 000040 000001 000200 000100 000000 000000 000000 000000 025140 000000 MACY1] 30A(1052) 09-11AR-78 15:32 26437 2437 2437 26437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2938+ 2927 2437 2437 6725 6795 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 2437 8027 7783 2896 8022 2437 2437 2437 2437 2922 2437 10-MAR-78 08:05 PAGE 228 CROSS REFERENCE TABLE 2478 2480 2481 2452 2482 2483 2492 2493 2494 2495 2496 2497 2484 2485 2486 2487 2488 2489 2490 2491 2643 2479 2945+ 8777+ 2448 2449 6832 91594 2440 2465 2469 2472 2475 2459 2467 2470 2473 2445 2446 2439 2460 2468 2471 2474 2442 81324 8020 81294 8090 2450 2441 2444 2451 86164 2476 2953 7643+ 94094 6960 7002 7006 8088 8130# 9393 81314 E 2 -~ USER SYMBCL> 7007 9139# SEQ 0225 SEQ 0224 CZDHM-D~-0 CZDHMD.P11 AVECT2= 000000 [BAR = 000012 lecR = 000010 BEGIN EGINA 1T0 = 81700 = 1101 = 1702 = 1703 = 1104 = 1705 = 1106 = BI1T07 = 002156 002164 000001 000001 000002 000004 000010 000020 000040 000100 000200 B1T08 = 000400 81709 = 001000 IT1 = 000002 1110 = 002000 1111 = 004000 BIT12 81113 BIT14 BIT15 = = = = 010000 020000 040000 100000 BIT2 113 114 115 116 117 118 119 = = = = = = = = 000004 000010 000020 000040 000100 000200 000400 001000 KR = 000014 BPTVEC= 000014 RKTAB 027622 RLVL - 030002 RPTR 030332 026640 USER CAR = 000006 CHKADR CHRVCT 026412 026526 (HPS2 CKSWR = CLCABC CLRMUX= 027164 104407 024716 002000 fcHPST 027150 MACY11 30A(1052) 09-MAR-78 15:32 2437 F 10~MAR-78 08:05 PAGE 229 CROSS REFERENCE TABLE -~ USER SYMBOLS 2477 SEQ 0226 SEQ 0225 6638 5282 6746+ 5286 6858+ 5388+ 6973+« 5876+ 7103+ 5970+ 7135+ 6087+ 7139 6209+ 6326+ 6379 64710 6562+ 6632 6322+ 4237 6393 4401 6468+ 4570 6740r 5249+ 6853+ 5305 6963« 5310 7101+ 5413 7132+ 5424 5873« 7346+ 5967+ 8569+ 6085+ 8581« 6205+ 8596+ 8841 8852 8865 8876 8904 8934 5516 9185 5892 5987 9186 3324 3325 3336 4877 4957 5037 5115 6325 7730 5383 6586 5514 6608 5606 6639 5669 6653 5766 5894 5987 6760 5251+ 9087# 4081 9016+« 2226 28564 2358# 23484 23474 23464 23454 23440 2343# 23424 23414 23404 23394 7794 23574 2338# 23374 5758 6724 23364 23354 2334 2333 6789 23564 2355# 23544 23534 2352# 2351 23504 2549# 3080 23654 7082 2940 2940« 2911 3939 6084+ 7345+ 8848 8859 4792 90344 4788 7705 5245 7440 90864 2854# 8834 2920 2358 2357 2356 2355 2354 2353 2352 2351 2350 2349 9188 8778 5039 3089 5871 6847 4959 5038 4958 5117 6920 8838 2925 9179 9180 9181 9182 9183 9184 4878 4879 7722 3N 5264 9187 3313 7148 7253+ 7257 7257 7264 7266 7348¢ 7417 4789 5964 6958 9191 5116 6091 5400 7019 9189 4874 6081 7096 4954 6203 7129 5034 6319 7247 5112 6461 7343 5247 6552 7737 5316 6579 9190 5252 6097 5515 7281 7778 6113 5609 7361 9192 6583 5613 7374 7374 5674 9194 7708 5677 9193 5762 3593« 3727 3829+ 4702+« 6470+ 7134+ 90884 2947+ 89564 4165 6206 8568+ 8894# 89244 4880 2955 7645+ 94114 4313 6321+ 8595+ 4486 6407 9015+ 4686 6469 9085# 4696 6741+ 4703 6742 5293 6851+ 5299 6852+ 56429 6962+ 7100+ 5440 5874+ 71351 7250+ 4960 5040 5118 5253 5322 5517 5553 6565 6569 8966 8979 4876 7770 5384 7497 4956 7793 6738 94244 5036 8392« 7097 5114 5246 5512 6556 90424 7248 85664 5804 8886 5965 3486 92084 92804 5968+ (ZDKM-D-0 CZDHMD.P11 = = = = MACY11 30A(1052) 09-MAR-78 15:32 6 000100 000015 000200 000040 027244 7509 22734 22744 7509 2854 94224 8066 8037 94214 8441 035754 8781 10098# 027700 2938 8903 = 177570 027302 030042 030310 22804 2953+ 8618 7424+ 7500« 7612« 030312 7425+ 030320 2941+ 030316 027370 030317 027304 027740 030104 030427 034001 034306 034434 034531 033232 034744 030562 032433 032633 032772 031622 032142 001142 000174 030144 030206 017624 020022 020220 020410 = 177570 036506 030660 032512 033020 034076 033262 c= 000030 030360 7559 2955+ 2948 4779 2954 2939 8690 2520 2781 2802 2816 2830 2718 2850 2527 2632 2844 2675 2689 2696 2618 2646 24014 22228 7420 8732 7428 764910 75474 76024 2279% 2521 2528 2619 2761 2676 2697 2782 2719 23684 2519 2 10-MAR-78 08:05 PAGE 230 CROSS REFERENCE TABLE -- USER SYMBOLS sta 0227 SEQ 0226 8076 8076 8832 8836 90704 6318 8626 6377 8673 6548 8689 6846 8782 7707 8840 8528+ 8906 90914 92994 7425 7427 7435+ 7436 7440 7442+ 7444 7446 76464 7467 76491« 7501« 7642« 94044 7633 94004 5108 5511 6559 94024 511 5237 94034 9256# 8774 5234 5317 8783 8851 8936 93204 2541 2654 2548 2661 2555 2668 2562 2704 2569 2739 2576 2760 97054 2732 2746 96094 97354 2753 Q7554 2892« 7752+ 7773+ 8625 8785 743204 7525 7580 8731 9361# 7469 7527 7582 8784 93404 2400 94614 2883 2626 2633 2401 7502« 7615 74260 7575« 2944+ 4776 7648 4873 4774 8933 8771 94524 2788 99314 2823 99674 9793# 10001 253 2639 94724 2682 2711 2725 2625 96594 2884+ 2892 7635 2884 8917 7505 76264 7443+ 7578 2957 4870 8872« 4953 4868 8947 8772 9236# 7514« 7629+ 7602« 76421 4950 9094« 5033 4948 7519« 93994 7611+ 5030 5028 7550« 7614 5106 7555« 7630+ 7557+ 7447 7458 7462+ 7494 7497« 7504 7520% 7523 7547+ 7556+ 5509 5555 6557 8985 90924 2583 2767 2590 2774 2597 2795 2604 2809 2611 2837 2605 2612 7560 7569+ 7574+ 7610+ 98874 99534 v 7471 7637 2535 2542 2549 2556 2563 2570 2577 2584 2591 2598 2768 2683 2726 2775 97144 2747 2796 2810 2817 2824 2831 2838 2845 9484k 2789 97984 2867+ 94454 7605+ 2803 2868+ 2640 2754 98994 2647 2851 2655 97604 2662 2669 2690 2705 2712 2733 2740 CZDHM-D-0 CZOHMD.P11 MACYT1 09-MAR-78 15:32 2568 2575 2582 2589 2596 2603 2610 031160 031227 031266 031327 031410 031457 031525 031556 030524 031720 031761 032025 032101 032237 032277 032337 032401 030702 032530 032563 032730 033030 033073 033166 033272 033321 2617 2526 2624 2631 2638 2645 2653 2660 2667 2674 2533 2681 2688 2695 2703 2710 2717 2724 2731 2540 2738 030760 033357 037422 033447 033473 033553 033635 033713 034120 031016 034201 034257 034403 034630 034675 031053 031106 020576 000004 026406 12232233 104406 000011 035064 035130 035177 035250 035321 035375 035437 30A(1052) 2745 2752 2759 2766 2773 2780 2787 2547 2794 2801 2808 2836 2843 2554 2561 7419 ) 23614 8887 2221 2907 22714 8844 8855 8868 8921 8951 8879 8889 H 2 10-MAR-78 08:05 PAGE 231 CROSS REFERENCE TABLE -- USER SYMBOLS 64111 95454 9554# 95634 5328 5268 95954 5918 94674 6011 96324 2822 6242 6766 7124 7271 97004 94904 97204 6896 6871 6503 6615 97874 9803# 6368 9501# 6389 98284 98354 98424 98544 98664 4346 46434 9509# 2815 95274 99454 7387 6104 9517# 3969 7431 2881 88914 8384 83904 8035 100194 100254 100324 100394 100464 10054# 100604 4244 6403 9535# 5992 6227 6345 96734 7173 96914 7190 9682# 7012 9728# SEQ 0228 SEQ 0227 95754 95854 9603# 96234 2829 96534 6782 7154 7286 6911 97494 9765# 6618 6489 96424 97744 98104 98194 4518 4602 9877# 99054 5406 5899 7366 99814 6124 6138 9991# 6172 7604 4715 7640# 6417 9525# 2893« 2911+ 2912+« 3008 3009+ 3024+ 7713 77140 8385 8386 8387 8388 8390 8392 8393 8394 8395 2882+ 8076 7649 9916# 7716+ 7719+ (IDHR-D-0 D . P11 CZOHM INPAR3 L] 027312 LMSK1 027316 000004 MSG1 $G2 SG3 SG4 SG5 STCLR ULPTB ux1 UXT11A ux118 ux11c Ux110 UXT1E ux15s UX15A Ux158 ux15¢ ux150 UX1SE ux1é UXT6A uXx168 ux16c Ux160 8871 4781 23664 5385 2961 22724 6561+ 6625 3944 4171 5244 5898 6223 6465 7098 7371 4319+ 7443 5251 7135 3940 4882 6726+ 3081 6208+ 7019+ 8675 8715 8744 2849 7430 3074 6623+ 74350 030324 000001 027314 L INSEL LPR 2936 2929 2227 2225 8847 2935 026326 027676 000020 024760 024330 000012 027560 027520 030322 INPARG INTMSK 10TVEC LOBCR LOTBF1 LF L INACT LINBITY LINE 035604 035634 035701 036140 036216 027320 027562 017632 017662 017712 017740 017752 017766 020034 020064 020106 020134 020142 020160 020232 020254 020276 020324 020332 30A(1052) 09-MAR-78 15:32 026200 026110 026146 026162 026234 026270 INPAR INPARA INPARC INPARX INPARY LINEA L INENA L INMSK MACY11 7440 . 74454 7450 7454 74624 74944 74994 75034 7508 7512 75184 75504 75540 75584 7563 7567 1 SEQ 0229 SEQ 0228 1C-MAR-78 08:05 PAGE 232 CROSS REFERENCE TABLE -- USER SYMBOLS 88404 88174 88324 88364 8851# 8858 88744 92314 2865+ 85794 84494 8070 6625+ 6917 3948 4241 5248 5917 6226 6484 7123 7386 4328 7451 5388 7253 8826 8862# 2866+ 8076 6646 7020 3956 4243 5267 5966 6233 6488 7130 7438 4407+ 7501 5875 7348 3941+ 6972 6730+ 3338+ 6323 7102+ 3979+ 6973 6733 3086 8606 90994 8608 7460 74534 7456 74584 10079# 10083# 100904 101184 101264 7516 75114 75144 7571 75664 75694 3402 6467+ 7133+ 8691+« 8A92+ 8733+ 8759+ 6652 91794 3960 4319 5327 5988 6241 6502 7153 7496 6857+ 6917 6918 6972« 7020+ 9026+ 91964 3968 4337 5386 5991 6320 3976« 4407 5401 6010 6341 6762 7189 7607 4500 7556 6209 8523 4121 8523 6840 4086 4425 5405 6083 4090 4491 4098 4509 5421 6103 6367 4102 4575 4110 4593 7282 8516+ 8495 7611 6471 7285 8518+ 94064 7619 44616 7509 5970 8517« 4082 6997 6833+ 3582+ 6554 7252+ 9203# 6739 7172 7552 4491+ 7517 6087 8521+ 4083+ 7090 6837« 3649 6745+ 7347x 3817+ 6757 8597+ 6326 5614 6098 6358 6781 7270 8514 4584 7572 6470 6555 8883+ 6561 8885+ 6344 6765 7249 7706+ 4575+ 7564 9096# 7083« 4695+ 6776+ 9017« 7087« 5250+ 6789 90844 6794 6562 9026 7090 5387« 6854« 8520« 5872 6137 6416 6880 7360 8527+ 4169 4706 5895 6204 6463 6910 7365 9405# 6746 7627 6857 94164 7103 7134 6598 6733 6840 6858 5969+ 6920+ 6086+ 6964 6207+ 6984 5430 6118 6388 6850 9095# 9097# 5875+ 6868 5637 6123 6402 6870 7344 6113+ 4693 CZDHM-D-0 CZONMD.P11 MUX16€ Ux17 UXT/A UX178 ux17¢ UX170 UX17E RC = 020350 MACY11 30A(1052) 09-MAR-78 15:32 10-MAR-78 08:05 PATRNA 027330 PATRNB 027340 PIRQ = 177772 4314 4677 22784 4402 9107# 91024 RTYTB PRO = R1 = R¢ = R3 = R4 = RS = R6 = 027360 000000 000040 000100 000140 000200 000240 000300 6541 2295# 22964 22974 22984 22994 23004 23014 6545 91194 = 177776 22754 S = 000340 PSW = 177776 PWRVEC= 000024 RBUF 036312 RCNT 036252 RDCHR = 104410 RDLIN = RDOCT = RESERR RESTRP RESTRT REST1 RESVEC= RGMSK1 RGMSK2 RGMSK3 RGMSK4 RGMSKS RGMSK6 ING = S = RSTRTA SAPS 104411 104412 026714 026770 002676 002734 000010 027662 027664 027666 027670 027672 027674 000200 000004 002744 027200 SECRX = 000020 SECTX = 000010 SELINE SELMSK SETALL 024544 027306 027040 2 SEQ 0230 SEQ 0229 7573# 76054 76094 76134 7618 7622 7628#4 5530 R7 J CROSS REFERENCE TABLE -- USER SYMBOLS 020422 020444 020466 020514 020522 020540 000002 IRQVE= 000240 PAGE 233 6862 23724 23024 7626 76214 76244 5536 6988 5683 7008 6108 7179 6109 7186 6231 7375 6349 7383 6493 90834 6499 6590 6610 6771 6778 22764 23674 6324 8599« 6961 8247 8319 83954 2913 4811 29448 29504 23628 3157 3223 34C4 3488 3574 3304 7564 7556 2949 2276 76437« 7495y (51 7606+ 8707+« 8737« 2871+ 6350 9018+« 7001* 83934 83944 8819 89694 4901 2952 8967 2913+ 9225# 92264 3651 3729 3807 9230# 94234 7564 29534 2872« 6354 9019« 7016 8400+ 6374 10138# 101344 8401+ 6604 8410+ 6609 8416+ 6611 B428r 6622+ B429+ 6885 6890 6891 6915+ 8598« 8845 8856 3669 8880 4981 5061 5139 6570 89854 3657 3735 3813 3661 3738 3816 9227# 92284 92294 7575 7651 9418# 8433 5043 5773 6497 7357 5052 5782 6607 7381 51 5909 6756 8460 5130 6002 6775 8472 5262 6096 6888 9050# 5285 6131 7005 94204 7619 4972 5547 6481 7278 5275 6116 6904 7619 7611 4963 5535 6411 7263 7630 9419# 4096 6198 4166 6314 4238 6459 4317 6735 4405 6842 4489 7092 4573 7245 4691 7341 5238 7432 5381 7492 7646% 7648 90954 4796 5297 6219 7113 3942 5867 7548 2942+« 6848 8980 2914« 4803 5308 6336 7145 4883 5398 6383 7162 3954 5960 4084 6079 2948 90104 2950+ 7603 85144 4892 5522 6397 7184 ¢ ZDHM-D-0 CZDHMD. P11 SPACE 035750 SSR = 000016 STACK = 001100 START1 START2 002500 002640 SUER2 024412 SUER2A 024416 STEP = 000400 STKLMT= 177774 SUER1 024352 SUER SUERG SUNUM 024462 024500 024636 SUPPAR SWR 025020 001140 SWREG sW0 sW00 sW01 sw02 sW03 sW04 SW0S sW06 sW07 SWO8 sW09 sWl = = = = = = = = = = = = 000176 000001 000001 000002 000004 000010 000020 000040 000100 000200 000400 001000 000002 swil sW12 sWi3 sWi4 sW1S sw2 Sw3 swé SWS swé = = = = = = = = = = 004000 010000 020000 040000 100000 000004 000010 000020 000040 000100 sw8 SWw9 = 000400 001000 sw10 sw? = 002000 = 000200 MACY11 30A(1052) 09-MAR-78 15:32 8795 3079 3739+ 4417 6128 22664 5323 29114 2932 76458 22774 3018 3093 3667 5624 4798 5300 6121 6908 84864 4343 2956 5897 6415 7171 6553 2400# 7730 8876 22234 23304 23204 23194 23184 23174 23164 23154 23144 23134 23124 23114 2329# 2310# 23094 23084 23074 23064 2305# 23284 23274 23264 23254 23244 23234 23224 2321# K 2 PAGE 234 08:05 10-MAR-78 CROSS REFERENCE TABLE -~ USER SYMBOLS 8800 3166+ 3750+ 4423+ 6133 2863 5513 100974 3176« 3805 4501+ 6134 29384 7514 2951 7569 7685 8891 94154 3181 3745 6239 4,888 5403 6224 3236 3756 6365 3320 3824 84724 4968 5537 6386 7170 84604 3172 3678 5696 4805 5311 6135 7009 8962 4431 3967 5916 6487 7188 8590# 2861 7737 8886 2891 2330 2329 2328 2327 2326 2325 2324 2323 2322 2321 4787 5552 7121 8975 4515 4109 5990 6501 7269 2883+ 7778 8904 2905 3231+ 3949+ 4507+ 6921 4810 6547 7624 4897 5525 6342 7151 4599 4170 6009 6613 7284 2885 7790 8934 8143 3314« 3961+ 4585+ 7107 4875 €568 5425 4242 6102 6616 7364 2891+ 7794 8156 SEQ 0231 SEQ 0230 3496w 4185+ 42460 5548 4257+ 5604 3659+ 4329+ 5667 4335 5035 5060 5113 5138 5261 3427 4180 3502 4190 4252 6262 3589 3600 4712 5057 5786 6486 7283 5126 5896 6500 7363 5135 5915 6612 7384 5265 5989 6763 84734 5277 6008 5288 6101 6893 4516 6225 6869 4600 6240 6894 4713 6343 6909 5266 6366 7010 5326 6387 7122 5404 6401 7385 B494# 4432 6136 6780 8541# 2898+ 8143 2905 8180+ 2920 8408 2925 8421« 8778 7417 7708 8841 8852 3326+ 3412+ 3422+ 4174 5515+ 4091« 4591+ 7116 4900 8961 4103+ 4676 7159 4955 3332 3836 3344 3966 3418 4108 4977 5549 6400 7187 5048 5775 6414 7268 5441 4344 6122 6764 8974 7165 4980 5529 90894 3506+ 3572 3511 6779 7722 3672+ 5756 7152 7724 8865 (ZOHM-D-0 D . P11 CZ0HM 030354 027016 6645+ 5870+ 5258 5391+ 6749+ 5904 5394 030346 035000 035037 000060 2856+ 2918 2958 23704 rimes 030352 TIMEC TIMELIT TITFLG TITLE TITLE2 TKVEC = TNULL 030356 TPVEC = 000064 TRAPVE= 000034 TRMRDY= 000002 TRTVEC= 000014 1ST20 003014 004014 004142 004272 004422 004562 004752 005142 005266 003104 005412 TST21 15122 15123 TST24 TST125 TST26 TST127 TST3 TST30 TST31 1S132 TST33 TST34 TST35 005620 006026 006226 006426 006666 007052 007232 003204 007412 007572 007752 010404 010732 011164 TST37 TST4 TST40 TST41 TST42 011462 003314 011676 012204 012512 TST45 1ST46 TST4? 013734 014166 TST36 7ST43 TST44 09-MAR-78 15:32 L 2 10-MAR-78 08:05 PAGE 235 CROSS REFERENCE TABLE =-- USER SYMBOLS 6353 6469 94274 5390+ 000014 037312 030334 030336 030350 TST14 TSTIS TST16 TST17 1812 36A(1052) 23634 6321 6466+ 6200 5255+ TBITVE= TBUF TDATA1 TDATA2 TIMEA 1ST1 TST10 TST11 TST12 TST13 MACY11 011306 013022 013262 014732 7105+ 5256+ 7109 7100 2371# 23694 7501 23644 2967# 3691 3577 3654 3732 3810 39834 641254 4167 30284 4239 4316 4404 4490 4574 4680 48154 49054 3087 49854 5065# 51434 5324 5382 55634 56354 5708# 3161 58134 5868 5961 6080 6199 64264 6460 6571 SEQ 0232 SEQ 0231 6408 6413 7131 7250 7345 8449 8595 9015 101442 5972+ 7350+ 5903 6976+ 5963+ 5976 7354 9431# 6089+ 6211 94324 5973+ 7138+ 6014+ 6215 6328+ 6473+ 6630 6644 67480 6860+ 6975 5996 7256+ 94344 6014 7351« 6090+ 9000« 6212+ 9433 6329+ 6474 6631e 6477 6634 6648 6752 6864 6980 2915 5878+ 7255+ 5879+ 6861+ 5921+ 5882 7259 2919+ 2960 100154 7137+ 7141 100094 94264 94354 2869+ 7509 3517# 36064 36844 37624 38424 41974 42694 43574 44454 45294 46134 47264 31004 53334 54514 31874 59304 60244 61454 62524 65094 66594 2870+ 7520 94174 9002+ 5921 7106+ 5997 6093 90004 6332 (ZDHR-D-0 D . P11 CIDHM MACY11 09-MAR-78 15:32 003376 015304 015754 016310 017050 017264 017526 020020 020216 6844 6986 7198# 7246 7342 020406 003700 7549 3407 3226 6793 7433 7493 003564 3307 104405 104401 2917 7674 7913 8274 8795 7822 104402 104404 104403 030000 030330 035507 000214 h oo L A2 AN 0 30A(1052) 022574 022550 022556 022566 001134 001306 001122 001126 001312 001314 022544 023016 001100 000010 000020 000010 000010 023671 023664 001260 - 001227 022256 001316 001320 001342 001344 001346 001350 001352 00135¢4 v 83874 83864 2923 2939 8818 2248 8110 8081 80794 8025 7786 23974 2478# 23924 23944 24804 24814 8042+ 81434 23804 24124 24124 24104 264204 8154 8171 24524 24314 8806 7954 24824 24834 24924 24934 24944 24954 24964 24974 n 2?2 SEQ 0233 SEQ 0232 10-MAR-78 08:05 PAGE 236 CROSS REFERENCE TABLE ~-- USER SYMBOLS 32434 6801 6928# 7014 70254 72924 73944 764764 75324 33504 75874 34334 83884 2959 7988 7429 7672 7675 8155 8284 8817 7781 8158 8348 8843 7814 817 7831 8182 8384w 8867 7833 8201 8430 8878 8040 8277 8805 8157 8154 8280 8811 8385# 8792 8837+ 2954 8797 92734 8151 8300 8052+ 8392 2858 24134 24134 2412 26214 82954 8269 8059 8068+ 80734 2859 24140 24140 2867 24154 24154 2873 24164 24164 2874 2417H 241 7# 2875 24184 24184 24194 2419 24208 26204 24224 26238 24240 24254 24264 24274 26288 7781 8811 7988 7806 7814 7833 7838 7842 8041 8076 8275 8800 7846 8788 2930+ 2946+ 100684 7644+ 8350 8854 7836 8254 8675 8888 7838 8260 8715 8920 8265 8744 8950 8269 8780 8182 8274 8294 8353 7842 7849 8802 9410# 2254 8125 8083# 8080# 8082# 2909+ 82944 79964 (ZDHN-D-0 (Z0KMD .P11 $0Dw2 $00W3 $00W4 $00WS MACY11 30A(1052) 09-MAR-78 15:32 001322 001324 001326 001330 001332 001334 248440 24854 24864 246874 24884 246894 001340 001242 24918 24438 001336 001310 030314 020760 022246 020750 020716 020767 020764 001252 001253 020662 020710 001103 001115 021274 001116 001356 021460 001112 00122% 24754 8685¢ 7668 7957 2235 2873 7672 7675 24484 24494 76610 2873+« 23834 23894 2867 23900 2516# 7780 23874 24294 24470 2260 26400 8079+« 24084 24070 23914 23934 76764 81554 2204 22554 8341+ 001230 023013 030246 001106 24320 8120« 6598 2385 001110 001264 2 SEQ 0234 SEQ 0233 24908 001252 001356 001234 023014 001156 001155 001120 001124 020740 023066 000001 000214 024056 001104 024306 001135 001114 N 10-MAR-78 08:05 PAGE 237 CROSS REFERENCE TABLE -- USER SYMBOLS 2384N 8400 23984 23884 23864 39700 4946 6313¢ 8963+ 24654 8862 7677 79924 76794 76704 76874 76864 2903 2896 7647 76674 7695 2B76+ 77694 7775« 7828 7813 7774+ 2875¢ 25004 8116¢ 8082+ 8045 8076 8938 94014 7783 8022 76608 7671 7726 7728 8020 8027 8088 8090 8112 7728 I1751s 773+ 7756 7756 7771« 7806 7776 7777 7806 7820 9461 9484 9714 9760 9798 9899 7750« 7797 7799 7806 8110 8076 8119+ 81274 7742 B4354 8300 7785 8076 TT4hr 7755 7806 8284 7817 8294 8353 6997 2963+ 93804 7732« 7748+ 7753 3400% 4435+« 5697+ 7244w 3484+ 4519 5754r 7340+ 3570+ 4603+ 5866+ 7732 36L7+ 4716% 5959+ 7749 3725+ 4772+ 6078t 7755 8908 76834 7801 7806 8390 2205 83524 Ti41e 8416 8183 7777+ 7806 81264 6882 2877+ 2878+ 4112+ 5026* 6458+ 8976+ 3020+ 4181+ 5104+ 6540+ 309+ 4191+ 5233+ 6722+ 3153« 4253+ 5380r 6831+ 3237« 4263 5508+ 6957« 7755 3301« 4347+ 5625+ 7081« 38(3s 4P s6e ¢ ,97+ /796 (I0HR-D~0 CZOKMD.P11 MACY11 30A(1052) 09-MAR-78 15:32 SMADR2 SMADR3 SMADRS 001270 001274 001300 24694 24724 24754 SMAMS1 SMANSZ MAMS3 MAMSS MBADR MFLG SMNEW MSGAD $MSGLG SMSGTY SMSWR SMTYP1 MTYP2 MTYP3 MTYP4 SMXCNT SNULL SNWTST= 001262 001266 001272 001276 000216 023012 023707 001246 001250 001232 023676 001263 001267 001273 001277 021272 001156 000001 24594 24674 24704 24734 22564 8080« 8158 24454 24464 24394 8155 24604 24684 24714 24744 7745 264064 29644 41220 SMAIL 001232 2256 53304 67984 $OCNT $OMODE $OVER $PASS $PASTM SPOWER SPWRAD SPWRDN SPWRMG SPWRUP SQUES SROCHR SRODE(C= SROLIN RDOCT SRDSZ = 022036 022040 021256 001240 000222 024314 024302 024142 024276 024214 001226 023300 wrewee | 023420 023720 000010 7885+« 7880+ 7709 24424 22584 8431 84334 2871 84314 8410 24304 82144 8396 82424 83144 82354 REGO SREG1 SREG2 001162 001164 001166 24124 24134 24140 REGAD SREG3 $REG4 SREGS REG6 $REG7? RINAD REA = SAVRE= SAVR6 $SCOPE 001160 001170 001172 001174 001176 001200 020762 eeeene weerer | 024312 021004 SETUP= 000137 24104 24154 24164 24174 24184 24194 10-MAR-78 08:05 PAGE 238 B 3 CROSS REFERENCE TABLE -- USER SYMBOLS 2260 2438% 2895 2903 8086 82984 8096+ 8121« 81254 8101+ 8094 82964 77554 8047 30254 4194 54484 69254 7914 7884+ 7725 2895+ SEQ 0235 SEQ 0234 7747 7783 8020 33474 45264 34304 LO610N 35144 L7234 60214 8099 8102+« 8114 8118+ 8076 30974 4L266K 3184K 4L354N 32404 44428 55604 70224 79274 7889 7733 7664 56324 71954 57054 7289% 58104 7391k 59274 74734 75294 7892+ 7743 7665+ 7903« 77524 7673 7929« 7686 7739 7756 36034 48124 61424 75844 36814 49024 62494 37594 49824 642384 38394 50628 65004 3980# 51404 66564 2900 7662 7705 84384 84004 8428 84164 7806 8393 8076 8201 8277 8294 8350 8353 B462+ B463+ BL64r B474r B475« B476% BLBEr B4BT+ B4BBr 8497+ B49Br B499+r 9461 9461 9461 9484 9484 9484 9714 9714 9714 9899 9899 9899 8465+ B4L66* 8479+ B4BO+ 8957+ 8970 9461 9484 9714 8417 8418+ 8419+ B437# 2864 2865 2867 2869 2871 2873 2874 2875 2877 8394 8395 8477« B478+ 8500+ B501r 9484 9484 9899 9899 76854 8396 8396 8409+ 2865 28574 77044 8759 (ZOHM-D-0 CZDHMD . P11 3 $STUP = 17%277 SSVLAD 021222 $SVPC = 000214 $SWR = 165400 $SWREG $SWRMK= STESTN STIMES $TKB $TKS $TMPH 001254 000000 001236 001222 001146 001144 001202 $TMP1 001204 $TMP2 001206 $TMP3 001210 $TMP4 001212 $TMPS 001214 $TMP6 001216 $TMP? $TN 001220 = 000061 MACY11 30A(1052) 09-MAR-78 15:32 7770 28574 7717 22334 21924 2877 3843 5066 6510 7678 7727 7778 24504 2214 24414 264284 26034 2402# 246200 5983« 9058+ 26214 7114« 24224 4504 4699 24234 4577+ 9798 26244 6977+ 2425# 24264 24274 5605+ 5798 6015+ 6839+ 22044 32440 3654 4167 4526 49864 5632 6142 6793 $1PB $TPFLG $TPS TRAP TRAP2 $TRP = STRPAD 001152 001157 001150 024060 024102 000013 024114 7289 7588# 24054 24094 246044 2869 83724 83764 8366 c 3 10-MAR-78 08:05 PAGE 239 CROSS REFERENCE TABLE -- USER SYMBOLS 7793 7808 8138 8300 2209 2968 6126 5334 6802 2210 3029 4198 5452 6929 2211 3101 SEQ 0236 SEQ 0235 77464 2238 2204 2878 3984 7794 7806 7736 4270 5564 7026 7697 7737 2215 7700 7701 7724 2874+ 8136 8136 5420+ 5984+ 7663+ 8147 8145 5421+ 6554+ 9484 4330 7146+ 4334 4509 6564 4322 4580+ 7735+ 8164 8161 7742 5144 6660 7684 7728 7790 2898 77472 9461 4315+ 7125 4332« 4506 6563+ 4321« 4578 4698+ 6994« 6550+ 6549+ 3940+ 5607 5803+ 6016 6901 2964 3307 3681 4194 45304 5062 56364 61464 6798 72934 8065+ 8014 8063 83614 8383 8385# 8383# 7686 7735 4701 6995 6889+ 6744 3979 5628+ 5804 6108+ 6905 29684 3347 3685# 41984 4574 50664 5705 6199 68024 7342 7696 5636+ 6868+ 9714 4333 7155 4337 4517 6855¢ 4324+ 4581 4706 8590+ 6895 6770+ 4082+ 5629 5869+ 6109+ 6906 3025 33514 3732 4239 4610 5140 5709# 6249 6844 7391 8434 8218 8185+ 5437+ 6984+ 9760 4403+ 7163+ 4345 4522+ 6856+ 4325 4682+ 4714 8604+ 8597 6992+ 4121 5668+ 2212 3188 4358 5636 7199 7698 7749 7745+ 8224 8216 5886+ 76421+ 9798 4418 7174 4350« 2428 3434 7395 7700 7755 5931 7477 7708 7762 5888+ 7423 4488+ 7376+ 4420+ 4590 2874 3685 4906 6253 2875 5980+ 8495+ 5081+ 8956+ 5982+ 8969+ 4678+ 4694 5422+ 5438+ 4425 4601 7553+ 4493+ 4433 4606 7608+ 4439 4679+ 4494 4438+ 4607 9760 4496+ 6603 6614 5444 5791 5445 5795 6003 6786+ 2429 3518 4727 6025 2430 3607 7533 7720 7763 4816 6166 7588 7722 7764 5889« 7436+ 5890« 8494+ 4572« 9879 4422 4593 7698% 4413 4614 8222 5887+ 7422+ 9899 4421 7370+ 4719+ 4720 6575+ 6595+ 6596 6602+ 70N 5410+ 7018 8596 5414 5700 5922+ 6542+ 8571 31014 3491 3839 4354 L7274 8607 5422 5701 5923 6544 8579« 3161 3514 38434 4358# 4812 9010+ 5430 5757+ L, 62t 6551+ 8580 3184 35184 9024+ 5438 5759 5969 6617 8582+ 3188# 4404 48164 4442 4902 76774 7022 7493 8391# 8392 4409+ 6925 4680 5324 58144 6423 69294 8388# 8389# 4270# 7433 7657 7723 7765 3763 4986 6427 7663 7726 7774 7755 4684 4523 6970+ 5875 6202+ 8566+ 30294 3407 3759 73954 2214 3351 4530 5814 4351 4588« 6971+ 4410 4687 5671 5886 6206 8567 3087 3430 3763# 4266 46144 51444 5810 62534 2213 3244 44646 5709 7293 7699 7752 5411 5681 5910 6235 8570+ 3097 34344 3810 4316 4723 5330 5868 64274 6986 7473 76439+ 4412+ 4688 53344 5927 6460 7014 6555« 5382 5931# 6506 6638+ 3980 6652+ 3577 39844 6723+ 5980 6743+ 8583 3226 3603 46122 L4460 4906# 6497 6792+ 3240 36074 41264 4490 4982 70264 7529 56524 6021 6571 7195 75334 5560 60254 6656 55644 6080 6660# 83934 83944 83954 83964 5448 5961 6510# 7199# 7549 7246 7584 8076 8076 8076 83864 8387# 8390 CZDMM-D-0 CZOHMD . P11 $TSTM MACY11 3DA(1052) 09-MAR-78 15:32 000220 $TSTNM 001102 STTYIN 023654 STYPDS 022042 STYPBN= $TYPE STYPEC STYPEX tveses 8388 7882 021614 001244 78834 78784 2444 000224 001256 001302 001304 XTSTR 021026 $GET4= 000000 OFILL 022037 $4L0CAT=z eeener | 7711# 76784 7879+ 7708 22174 2877 79964 97974 8080 22444 <BASTA= wevten { .$X = 000214 037712 ERRORS DETECTED: 6855 8473 8257 6970 8496 8275 8107 8051 8071 8376 8058 80744 78854 8387 7883+« 7780 7893 7928# 2233 2963 81284 22344 7466 8136 8385 8386 8384 8063¢ 7650+ 8960 8289 7662+ 8973 B293# 8064 8187 22214 2878 8076 22364 7522 82934 2238¢ 7577 8294 100064 8083 2249 101314 101344 101384 10144# 000 O RUN-TIME: 32 38 1 SECONDS RUN-TIME RATIO: 254/72=3.5 49k DOCUMENT PAGES: 7695 SEQ 0237 SEQ 0236 7724 7746« 7747 7752 7756 7773 2433 7806 92034 2862 78524 94834 . DSK2:C2DHMD ,DSKZ:CZDHMD . SEQ=DSKZ:CZDHMD.SML ,DHMMAD.P11,CZDHMD.P11 CORE USED: 3 22594 26451 24764 24774 = 037712 . ABS. 79424 8389 021654 $TYPOS SUNIT . 6563 8461 8245 80144 8044 8069 021640 UNETH USWR VECTT VECT2 J 23828 7806 8244 022266 022500 022546 STYPOC STYPON 2257# D 10-MAR-78 08:05 PAGE 240 CROSS REFERENCE TABLE -- USER SYMBOLS (97 PAGES) 237 2244 7632 8300 22458 7686 8353 2247H 7690 8412 2249x 7755 84306 2379 7756 90994
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