Digital PDFs

DEC-11-HRSB-D

August 1973

12 pages

Original

19MB

view download

OCR Version

6.8MB

view download

Document:	H720 PSU & box manual part-1
Order Number:	DEC-11-HRSB-D
Revision:	0
Pages:	12
Original Filename:	H720%20PSU%20&%20box%20manual%20part-1.tif

OCR Text

DEC-11-HR5B-D

H720

power supply and
mounting box
manual

DIGITAL EQUIPMENT CORPORATION « MAYNARD, MASSACHUSETTS

1st Printing August 1970
2nd Printing (Rev) March 1971
3rd Printing December 1971

4th Printing May 1972
5th Printing November 1972
6th Printing February 1973

The material in this manual is for informational

purposes and is subject to change without notice.

The following are trademarks of Digital Equipment
Corporation, Maynard, Massachusetts:

DEC

PDP

FLIP CHIP

FOCAL

DIGITAL

COMPUTER LAB

UNIBUS

CONTENTS
Page

CHAPTER 1

INTRODUCTION

1-1

CHAPTER 2

POWER SUPPLY

2.1

Introduction

2-1

2.2

General Description

2-1

2.2.1

AC Power Distribution

2-1

22.2

Unregulated DC Supply

2-1

2.3

Block Diagram Description

2-2

2.3.1

Switching Mode Regulation

2.3.2

Basic Regulators

2-2

2.3.3

+5V Regulator

2-2

2.3.3.1

Overcurrent Protection

2.3.3.2

Overvoltage Sensing and Crowbar

2-4

2.34

-15V Regulator

2.3.5

Page
4.3.2

Environmental Requirements

4.3.3

Power Require «ents

4-2

4.3.4

Cable Requirements

4-2

4.4

Installation

4.5

Data Sheets

Figure No.

4-3

Title

Art No.

Page

2-1

+5 Volt Regulator (Simplified Schematic)

11-0097

2-2

+5 Volt Regulator Waveforms

11-0098

2-2

2-3

H720 Block Diagram (A and B Version)

11-0099

2-2

2-4

H720 Block Diagram (E and F Version)

11-0291

AC LO Circuit

2-4

2-5

+5V Driver Stages (A and B Version)

11-0100

2-5

2.3.6

DC LO Circuit

2-4

2-6a

Simplified Differential Amplifier

11-0101

2-5

Detailed Description

2-4

2-6b

Differential Amplifier Schematic

11-0102

2-5

24.1

+5V Regulator

2-4

2-7

+5V Driver Stages (E and F Version)

11-0290

2-5

24.1.1

Overcurrent Protection

2-6

2-8

Overcurrent Protection Circuit

11-0103

2-6

24.1.2

Overvoltage Crowbar Circuit

2-9

Overvoltage Crowbar Circuit

11-0104

24.2

-15V Regulator

2-6

2-10

-15 Volt Driver

11-0105

2-6

2.4.2.1

Driver

2-6

2-11

-15V Differential Amplifier

11-0106

2-6

2.4.2.2

Differential Amplifier

2-12

-15V Overcurrent Circuit

11-0107

2-7

24.2.3

Overcurrent Protection

2-6

2-13

-15V Crowbar Circuit

11-0108

2-7

24.2.4

-15V Crowbar Circuit

2-7

2-14

AC LO — Simplified Schematic

11-0109

2-7

2.4.3

AC LO Circuit

2-7

2-15

AC LO Circuit Schematic

11-0110

2-7

24.4

DC LO Circuit

2-16

DC LO Simplified Schematic

11-0111

2-8

2-17

DC LO — Circuit Schematic

11-0112

CHAPTER 3

MOUNTING BOX

3-1

Basic Mounting Box

3.1

Scope

4-1

PDP-11 Position Assignments

2-8

3-1

3-1
11-0113

4-2

3.2

Description

3-1

3.3

Models

3-1

CHAPTER 4

INSTALLATION

4.1

Introduction

4-1

2-1

H720 Power Supply Models

2-1

4-1

3-1

Mounting Box Models

3-1

4-1

PDP-11 System Configurations

4-1

4.2

System Configuration

4.3

Installation Planning

4.3.1

Space Requirements

Table No.

Title

Page

iii

CHAPTER 1
INTRODUCTION

This manual provides the user with information on the PDP-11 Power Supply amd Mounting Box; their system
configurations and installation procedures.

The H720 Power Supply is described in Chapter 2, which provides the user with the theory of operation and
circuit diagrams necessary for comprehension and maintenance. Both general and detailed descriptions of the
power supply are included; the level of discussion assumes that the reader is familiar with basic electronic theory.

NOTE

Sections of this manual refer to specific engineering drawings
which are contained in the second volume entitled 7720 Power
Supply and Mounting Box, Engineering Drawings. The drawings in the above manual reflect the latest print revisions.
Chapter 3 comprises descriptions of the modular concept of the PDP-11 System and the four available mounting

box models.
Installation procedures are covered in Chapter 4, which describes all applicable PDP-11 System configurations

and planning requirements. The remainder of the chapter contains a series of data sheets on the six basic system
configurations and the major hardware components, including a brief description of the item, specifications, and
installation drawings.

1-1

CHAPTER 2
POWER SUPPLY

Unregulated outputs of +8V at 1.5 amps and -25V at 1.5 amps are also available. In addition, a sine wave clipped

2.1 INTRODUCTION

The H720 Power Supply provides both regulated and unregulated ac and dc power for the PDP-11 System. This

supply furnishes all power required by components mounted in either a basic or extension mounting box.
This chapter provides the theory of operation of the power supply and is divided into three major parts: general
description, block diagram description, and detailed description. As it is beyond the scope of this chapter to
present detailed maintenance procedures, emphasis is placed instead on how the power supply should function

both at ground and +5V (nominal) is provided for the line clock, and a pair of logic levels (AC LO and DC LO)
are provided to warn the processor of imminent power failure.

Switching mode regulation, employed in the +5V and -15V supplies, offers the advantages of compactness and
high efficiency over an analog-type regulator at the expense of a slightly greater circuit complexity. Dynamic

over- and under-voltage protection and current-limiting are implemented on the two regulated voltages.

during normal operation. The user can then utilize this information when analyzing trouble symptoms to
extrapolate necessary corrective action.

2.2.1 AC Power Distribution

The physical dimensions and electrical specifications of the H720 Power Supply are given in the appropriate data
sheet in Chapter 4 of this manual.

Incoming ac power is applied through fuse F1 of the H720 Power Supply, and then routed above the fans to the

OFF/POWER/PANEL LOCK switch on the front panel. (Both ac lines connect to this switch.) Power is then
routed to the back of the supply where two accessory outlets are provided, and is then applied through fuse F2

2.2 GENERAL DESCRIPTION

to the primary winding of the power transformer. A split primary with jumpers is used to allow operation at

The H720 Power Supply provides both regulated and unregulated ac and dc power for the PDP-11 System. There

either 120V or 240 Vac. One pair of fans is connected across each primary winding to ensure that the fans always

are two basic versions of the power supply and two models of each version, as shown in Table 2-1.

receive 120 Vac.

Models E and F of the H720 have four features in the ac control section that distinguish them from the A and B

Table 2-1

models. These features are:

H720 Power Supply Models
Version

Model No.

A&B

H720-A

Models A and B are identical except for input voltage

H720-B

requirements.

H720-C

Models C and D are door-mounted versions of models

H720-D

A, B, E, or F. A metal frame accepts the entire power

C&D

Remarks

supply for use with some peripheral controllers.

E&F

H720-E

Models E and F are identical except for input voltage

H720-F

requirements. Ac control and increased +5V current

The incoming ac line uses a circuit breaker rather than a fuse.

The control portion permits switchable remote and local control to provide the capability of
one unit controlling several others (see the schematic of the control portion).

The POWER switch on the front panel of the computer switches only a single ground control
line to activate the ac input, rather than switching both sides of the ac line as in the A and B
version.

A thermal detector is used to turn off the supply in the event of excessive temperature.

The remainder of the ac portion of the E and F versions is essentially the same as that of the A and B versions.

capabilities distinguish these models from the A and

B models.

2.2.2 Unregulated DC Supply
The H720 Power Supply, designed to mount in the BA11 Mounting Box, furnishes all power required by com-

The basic £25 Vdc are developed from a pair of full-wave bridge rectifier circuits connected to the center-tap of

ponents in either a basic or extension mounting box. The input voltage may be either 120V or 240V at 50/60 Hz.

the secondary winding of the power transformer. A 22,000 uF capacitor on each dc voltage leg provides filtering.

Regulated outputs of +5V at 16 amps (A and B version), or at 22 amps (E and F version), and -15V at 10 amps

In addition, there is a pair of taps (approximately 8V rms) on either side of the center tap. This voltage is full-

(both versions) are available.

wave rectified but unfiltered, and provides power for the console indicator lamps.

2-1

2.3 BLOCK DIAGRAM DESCRIPTION

When the output voltage reaches 5.1V, the feedback amplifier opens switch S1. At this point, the field around

This section presents a brief review of switching mode regulation and a block diagram description of the H720

Power Supply. Since the +5V and -15V regulators are nearly identical, only the +5V regulator is covered in
detail. This is followed by a description of the crowbar circuits and the AC LO and DC LO logic circuits.

choke L1 begins to collapse, maintaining a flow of current through load resistor R1 into ground (when S1 is open,

the current path is completed through diode D1 to the other side of the choke). The output voltage decays,

however, and when it reaches +4.9V, the feedback amplifier closes switch S1 and the output again starts to rise
toward 5.1V. The power supply continues to oscillate in this manner, although the output voltage actually
fluctuates between 4.9 and 5.1V, it maintains an average output of 5.0V.

2.3.1 Switching Mode Regulation
Figure 2-1 is a highly simplified schematic diagram of the regulator used in the +5V supply. Figure 2-2 shows the

If the load should increase, the output voltage decays at a faster rate and switch S1 closes sooner. In other words,
the frequency (and, therefore, the duty cycle) of the waveform at point A increases. This is the method the regu-

waveforms taken at points A and B in Figure 2-1.

lator uses to respond to a decrease in input voltage or an increase in load current. Conversely, at higher input

voltages or smaller loads, the frequency (and duty cycle) drops. In this manner, the regulator maintains the output voltage at a constant value.
1

;

(4.9V—5.1V)

is a differential amplifier followed by several stages of amplification. However, because the transistor is either

2 D1

In the actual circuit employed in the power supply, switch S1 is a switching transistor and the feedback amplifier

I R

FEEDBACK
AMP

—=c1

saturated or cut off, the average dissipation is kept low.

SR
)

2.3.2 Basic Regulators
The heart of both the +5V and -15V regulators is a driver (see Figure 2-3 for A and B version, Figure 2-4 for E
NOTES:

1. WAVEFORMS AT POINTS @ AND

SHOWN ON FIGURE 2-2

and F version). The driver controls the base of the switching transistor, holding it either in saturation or at cut-

2.S1 1S A SWITCHING TRANSISTOR

off. There are three inputs to the driver. For the +5V regulator, these three inputs are:

3.FEEDBACK AMP IS A DIFFERENTIAL AMPLIFIER
1H-0097

the +5V differential

amplifier output, the output of an overcurrent-sensing circuit, and the output of the overvoltage crowbar circuit.

For the -15V regulator, the three inputs are:

the -15V differential amplifier output, the output of the overcurrent-

sensing circuit, and the output of the +5V low-sensing circuit.

Figure 2-1 +5 Volt Regulator (Simplified Schematic)

2.3.3 +5V Regulator
Under normal operating conditions, the only active input to the +5V driver is the output of the differential
POWER
o|N

S1
opfins

+25V = ——|-

|
I

amplifier. The differential amplifier compares the regulator output voltage with a zener-regulated reference

S1
CLOSES

voltage and provides an output representing the difference between the two voltages. When the +5V line
approaches 5.1V, the differential amplifier signals the driver to cut off transistor Q1 (the switching transistor on

the heat sink) until the output decays to 4.9V, at which time the amplifier signals the driver to turn on Q1 again.

-This oscillation continues as described under switching mode regulation, Paragraph 2.3.1. Thus, the feedback

loop during normal operation is from the +5V input, to the differential amplifier, to the driver, and finally, to

|
|

the switching transistor which controls the +5V level applied to the differential amplifier.

:
|

2.3.3.1 Overcurrent Protection — The amplitude of the current drawn by the load through the switching tran-

]

oV
NOTE:

sistor is sensed by monitoring the voltage drop across 0.05§2 of resistance that is in series with the unregulated

NOTE:

RIPPLE

FOR CLARITY.

EXAGGERATED

+25V supply. If the current (and, therefore, the voltage drop across the resistance) becomes too high, the

overcurrent-sensing circuit signals the driver to turn off the switch (this signal overrides the input from the

WAVEFORMS ARE TAKEN AT POINTS @ AND

differential amplifier). Due to the time constants in the overcurrent-sensing circuit, the switch remains off until

ON FIGURE 2-1.

the current drops nearly to zero. At this time, normal feedback through the differential amplifier is resumed.

PERIOD VARIES FROM 20 pSEC TO SO wSEC DEPENDING ON LOAD.
11-0098

If the condition producing excessive current is still present, the overcurrent-sensing circuit again overrides the

differential amplifier and cuts off the switching transistor. While the overcurrent condition remains, this
Figure 2-2 +5 Volt Regulator Waveforms

action continues. The regulator continues to oscillate, but in a different mode and at a somewhat lower fre-

quency. Short circuit current is limited to approximately 30 amps in this mode.

When power is first applied, switch S1 is closed and the output voltage starts to rise toward +25V. However, due
to the combined action of choke L1 and capacitor C1, this voltage rise is relatively slow, as shown in waveform B.

2-2

NOTE
Overcurrent sensing in the +5V line is not used in the E and F
models.

__]I«H TLswVN_3ilHsum._HI,
I3 Gi-‘20 . G1-170A 1lIVv3RH__H
,

lljhnn

|pee 012VS+
S20't20

€20'120'610'810

23I0S'N032S0 OL<«e—| S+ 012V

Gi- 012V

1i6600~

IO 20

IVILNIN34 10

34 10 IVILNIN

he IVGI- 071

1620-11

EISL v — G+€OMO7 SG1-0'21T0'A60

20'dG3Dn'ipDu'a0LD| L1d0°W9V10 g

43A18d 34 10}IvILN3Y

+
S
M
O
1
7
0
A
G
I
3
I
S
N
3
S
)
H
V
E
M
O
Y
)
D
c
o
c
i
'
2
1
0
'
6
0
I
10 20

01JvsS+
G20'v20

. SO'$0'010 > 34£1100I'V9I1L0N3N G+4€‘2r10y79.0l2AiH0a3A0o—af el£20'132I0S'N61I0S'8100120<—]
a—— IV 01

f|fee——Oo0—-"\-_oo020—w4eAASGZZ-+3G3SI+NS3N'I32IS°S0 )__|/In&—&uv80'H64H2O3+0OLI'LAI91II0M7MH'S0S1QA0T—T&AdiN=_NIéiSscSc_%||dz/Nnw.I—HV»&,.\o7&HV3SENM3OsSND*]._ 50p01 T<=<ao—|A~GA+G
2IN31]€-CLH07Jo0[gweider(qV)pued(UOISIOA
W
O
N
A
S
i
0
V
f
e
—
0
1
3
I
S
N
3
I
S
0
1
0
V
AG2+—O—"2\4O—% - _| ® SH+O£L01°I1M00SA AAS—=@_|H o® m@mo;wwo—@ |e 30I7S1N234I0S 0720dA<G_++—
8jAg2-eo—=o-3SN3IS _I9&Ins0i'Hg2O0-L'9I70M'S100CLHT—Yoss0[qXw%|e|ziIm:d&,eoidg)pue&A(AUOISIO B=-E—|AG
W
O
u
S
c
i
9
V
l
e
—
0
1
3
S
N
3
S
20 | 1O JRG

h.—lul

20'020

2-3

2.3.3.2 Overvoltage Sensing and Crowbar — It is necessary to protect the logic from voltages in excess of +6V.

For this reason, an overvoltage-sensing circuit triggers an SCR which short circuits the +5V line to ground if it
rises above +6V. When the crowbar is triggered, a signal is sent to the +5V driver to turn off the switching tran-

sistor. This signal also overrides the normal feedback mode. Once triggered, the SCR does not stop conducting
and the voltage across it (the output) drops to zero. When the voltage again rises to +6V, the crowbar again
triggers and a third mode of oscillation occurs. If the malfunction causing the overvoltage condition is of such a

nature that the switching transistor does not turn off (for example, it is shorted), then the SCR remains conduct-

2.3.6 DC LO Circuit
The DC LO level is another bus-type signal which, when asserted, indicates that one or the other of the regulated
dc output levels is dropping. The DC LO signal is independent of the AC LO circuit, but tollows AC LO within a

few ms in the case of power shutdown. During power up, DC LO is negated before AC LO because the +5V and

-15V levels are present before the +25V and -25V supplies are up to full voltage. It is possible to have only DC LO
asserted if, for example, the +5V crowbar is triggered.

ing and the overcurrent-sensing circuit attempts to turn off the transistor. If this fails, then fuse F2 (mounted on

The DC LO-sensing circuits (see Figure 2-3) compare the +5V and -15V lines for a three-to-one ratio. If either

the regulator board) opens, breaking the circuit entirely.

voltage drops, the circuit asserts DC LO. The third input to the DC LO circuits comes from the +5V low-sensing

circuit. The purpOSe of this input is to Speed up the response to a low +5V condition, thus ensuring that DC LO
2.3.4 -15V Regulator

is asserted at the same time the -15V crowbar is activated.

It should be noted that the -15V regulator is nearly a mirror image of the +5V regulator (see Figure 2-3), and

It should be noted that if the +5V and -15V levels drop at exactlya three-to-one ratio, the DC LO-sensing circuits

operation is very similar,

do not assert DC LO. A DC LOssignal, however, is required to indicate that the voltage is dropping, regardless of

Normally, the -15V differential amplifier provides the signal to the -15V driver that controls switching transistor

the ratio. The -15V line is then grounded by the +5V low-sensing circuit as soon as the +5V line drops to 4.5V,

Q2 (on the heat sink), and the output voltage rises and falls between 14.9V and 15.1V. The regulator oscillates
in exactly the same manner as described for the +5V regulator (Paragraph 2.3.3).

which in turn causes DC LO to be asserted.

2.4 DETAILED DESCRIPTION

Overcurrent protection also functions in the same manner (refer to Paragraph 2.3.3.1). The voltage drop across

0.0552 of resistance, which is in series with the -25V line, is monitored.

In this case, however, current limiting

takes place at 14-16 amps.

A thorough understanding of the block diagram discussion (refer to Paragraph 2.3) should aid the user considerably in understanding the material presented in the following paragraphs. The circuit descriptions follow the same
general outline used in the block diagram discussion: basic regulators, crowbar circuits, and AC LO and DC LO

The only major difference between this regulator and the +5V regulator is the third input to the driver. In this

logic circuits.

case, the input comes from a circuit which senses the +5V line and signals the driver to turn off the -15V switching transistor if the +5V line drops below approximately 4.5V. (The signal also triggers the -15V crowbar.) The

purpose of this circuit is to protect the core memory, which cannot withstand -15V unless it is also provided with

For the following discussions, refer to the circuit diagram for the regulator board (5408475-0-1), in addition to

figures specifically called out in the text.

the full +5V level. No oscillation occurs in this case, and the switching transistor is simply held off until the +5V
level is back to full operating voltage.

The -15V crowbar grounds the -15V line through a power transistor rather than an SCR. This power transistor is
activated by the +5V sensing circuit only when the +5V line drops below 4.5V. The sensing circuit is activated if
the +5V regulator goes into an overcurrent or overvoltage mode, and whenever power falls below the minimum
required operating level. (Power falls below the minimum level not only when power is lost but also for a short

interval during turn on and turn off of the system.) In other words, any condition that causes the +5V level to be
less than 4.5V activates the -15V crowbar. (There is no overvoltage protection circuit on the -15V regulator.)

2.4.1 +5V Regulator
As mentioned previously, the heart of each regulator is the driver. Based upon three inputs, the driver controls
the state of the switching transistor. The driver stages for the +5V regulator are shown in Figure 2-5, and consist
of transistors Q10, Q4, and Q5. Transistor Q5 drives the base of the series-switching transistor Q1, which is
mounted on the heat sink.

When power is first applied, Q10 remains cut off because none of the three inputs shown on the figure are

sufficiently positive to draw base current. Since Q10 is not conducting, base current flows in Q4 through resistor

R18 to the +25V line (which starts at ground and rises very quickly to +25V when power is applied). When the
2.3.5 AC LO Circuit

base of Q4 reaches approximately 2.1V, it draws current through resistors R14 and R13. The drop across R14

The AC LO is a bus-type signal sent from the power supply to the processor. This signal, when asserted, indicates

forward-biases QS5, which in turn draws base current through Q1 and allows it to stay on while the output

that power failure is imminent. From the time AC LO drops to ground, the supply has two ms of power left at

voltage is rising toward 5.0V,

full load.

When the output exceeds 5.0V, the differential amplifier pulls the base of Q10 positive to approximately +0.7V

The AC LO signal is developed by comparing each unregulated voltage with its corresponding regulated voltage.

and draws base current through it. As Q10 turns on, its collector drops toward ground. When it drops below

If either drops too close to the regulated level, AC LO is asserted. This occurs, for example, when the +25V line

+2.1V, Q4 no longer conducts (diodes D2 and D3 raise the effective base voltage of Q4 to 2.1V:

0.7V in the

drops to approximately 18V and when the -25V line drops to approximately 20V. Both lines are sensed

transistor, and 0.7V forward drop through each diode). When Q4 cuts off, Q5 also cuts off because there is no

separately (as shown on the block diagram); however, if the -15V section detects a loss of voltage, it asserts AC

path for base current flow. This in turn cuts off Q1, and its base returns to the same potential as the emitter, due

LO by forcing the +5V detection circuits to become active, which actually asserts the level.

to resistor R1.

Therc is a small amount of hysteresis designed into each circuit to prevent “hunting” when voltages approach the

Note that transistors Q10, Q4, and QS5 are used in a common emitter configuration. Transistor Q1 in the +5V

threshold levels. For example, if AC LO is asserted at an input of 100 Vac, the input must rise to 103V before

line is used in the common collector configuration (an emitter follower). Whenever Q10 is conducting, Q4, QS5,

AC LO is negated.

and Q1 are cut off, and when Q4, Q5, and QI are conducting, Q10 is cut off.

2-4

+25v

As an example of amplifier operation, assume that the +5V line is too high. The current flow through resistor

R37, which is the sum of the current from the base of Q17 and the current from the +5V line through resistor
c27

SR18

r OF
FROM +5V CROWBAR

Cxe__

—

— —

R38, tends to increase with the rising voltage. However, less base current flows in Q17 so that the current through

fi)

SRI13

' EER! Q)

IUJF

]1'%0

R37 remains constant and the voltage at the base remains at 3.2V. As Q17 cuts off, Q16 must draw more current
through resistor R33 to maintain the emitter at 3.9V. Consequently, Q16 conducts more, which means the
collector goes more positive. This biases Q10 on, which causes the series-switching transistor to cut off.
When the +5V line drops below 5.0V, the above action is reversed. The base of transistor Q17 draws more current

FROM =45V DIFF AMP

010

$R25

$3.3K

FROM +5V 0.C. SENSE

_I_ |

¥ 02

I(c:}i

‘J.?

;

“u

through resistor R37 to maintain the 3.2V level. Transistor Q17 conducts more and Q16 conducts less, allowing

the collector voltage to drop. This allows Q10 to turn off, which

HEAT SINK

in turn allows the series-switching transistor to conduct again. The
total current through resistor R33 alternates between Q16 and

Q17:

c16

when the input is too high, Q16 carries most of the current;

when the input is too low, Q17 carries most of the current.

:ERL

g ?gozn

Figure 2-6b is a schematic of the complete differential amplifier.

g 523
016

Potentiometer R38 (shown as a fixed resistor in the simplified

2R a

T0 010

provides ac coupling to the +5V input to speed up the amplifier

;gfi

response time. Diode D10 compensates for the temperature

Figure 2-5 +5V Driver Stages (A and B Version)

o17

schematic) permits adjustment of the +5V level. Capacitor C10

I -0100

:::'mto

?,_82\, =~

“characteristics of diode D8. Capacitor C8 bypasses the base of

$R37

r31 DAE

;;D?,%Q

._..“(

1H-0102

transistor Q16 to improve noise immunity.

The base of transistor Q10 can be made positive by either the +5V crowbar circuit or the overcurrent-se

The +5V regulator for H720 Models E and F has circuit changes,

circuit. In either case, there is sufficient base drive current to override the differential amplifier input
and turn

as shown in Figure 2-7. The basic operation of this circuit is

on Q10, which cuts off Q1.

identical to that described for the A and B versions. However,

nsing

Figure 2-6b
Differential Amplifier Schematic

circuit modifications have been made to accommodate the increased current output capabilities at +5V. The

Capacitor C6 and resistor R67 provide a positive feedback path from the collector of Q4 to the base of QI10, to

modifications include a parallel pair of switching transistors (Q1 and Q3) and increased gain in the switch driver

improve the circuit turn-on time and stabilize the switching frequency. Diode D35 clamps the collector of Q4 to

circuit (Q2).

protect it from excessive positive transients during switching.
+25V

because of its high gain and noise immunity, compares the +5V line to a fixed reference voltage and produces an

SR18

error signal which is the difference between the two, and controls the

122K

state
of the switching transistor. The fixed reference is provided at the
base of transistor Q16 by resistor R32 and diode D8. The variable
voltage is applied to the base of Q17 through the divider network, con-

+5V

FROM +5V CROWBAR

sisting of resistors R38 and R37 and diode D10.

FROM -5V DIFF AMP

that transistors are current-sensitive rather than voltage-sensitive devices,»

Q16

Q17

and that each junction acts as a diode. In other words, it maintains a

emitters of transistors Q16 and Q17 remain at a constant voltage

R67

BASE

TO Q10

R34

T —T———— -1

pi Q1

| 7274

l
Q2

¥oe

—I- T

Th&f l

)

1>——}

:ER38

c2 l

| $ri

SR13

V Q10

? Q4

SR37

’25’3,2\/

os[

1'50

0.7V drop when forward-biased (in the case of a silicon transistor). The

405

C;i

R64

To understand operation of the differential amplifier, it should be noted

)

‘

L
| T AAAAY

Figure 2-6a is a simplified schematic of the differential amplifier used in the regulator. This amplifier, employed

I
DI

__HEAT SINK_|

(approximately 3.9V), due to the regulated 3.2V on the base of Q16

maintain these voltages.

SRL
Hy

Figure 2-6a

100

transistor Q17 remains at 3.2V, which is 0.7V below the emitters.
When the amplifier is operating, it is the current flows which change to

H-0i0t

plus the forward drop of the emitter-base junction of Q16. The base of

Simplified Differential Amplifier

11-0290

Figure 2-7 +5V Driver Stages (E and F Version)

2.4.1.1 Overcurrent Protection — The overcurrent protection circuit schematic is shown in Figure 2-8. Transistor
Q2 is usually not conducting because, under normal operating conditions, there is insufficient voltage developed

establishes cut-off bias on Q8 when Q7 is not conducting.) If transistor Q8 is on, base current flows in transistor

Q2 and brings the switching transistor into conduction.

across resistors R10 and R11 to forward-bias the transistor.

However, if the current pulses through these resistors become
too high (approximately 30A), the drop across resistor R66

SWITCHING

becomes greater than 0.7V and base current flows in tran-

TRANSISTOR

-25V

sistor Q2. When this occurs, capacitor C3 charges through

A To?r %@gE

Q2 to 25V immediately, and the base of Q10 is kept positive

%?.

by this voltage. With Q10 conducting, the series-switching

SRIO,R11

3.05

transistor is cut off, the current flow through resistors R10

¢ SA_;BAOQ

SR66<C4

<’2.7KT,02;1 F

SR15

247K

and R11 stops, and transistor Q2 turns off. Capacitor C3

must then discharge through resistor R25, which process

{HEAT SINK) v

+25V

holds the switching transistor cut off for a period of time,

1-0103

thus providing some amount of fold-back in the current-

limiting mode. Capacitor C4 provides a further delay and

DIFF AMP

Figure 2-8 Overcurrent Protection Circuit

also prevents noise spikes from triggering transistor Q2.

R3
10K

0.C. SENSE

¥ o2

D24

2.4.1.2 Overvoltage Crowbar Circuit — The overvoltage crowbar circuit schematic is shown in Figure 2-9. Under
normal conditions, the trigger input to the SCR (Q27) is at ground because the voltage across zener diode D11 is

too small to cause it to conduct. As the +5V line approaches

1H-0108

6V, zener diode D11 conducts and the voltage drop across
resistor R43 draws gate current and triggers the SCR.

The

+5V

SCR shorts the +5V line to ground through resistor R44,

2o%

which is a current-limiting resistor. The SCR remains on

Y g_’gv
¢

until capacitors C12, C14, and C16 discharge.

When the SCR

Figure 2-10 -15 Volt Driver

+5V LINE

fires, the voltage drop across resistor R44

forward-biases the base of transistor Q26, which then con-

J‘

|
&3

When the output exceeds -15V, the differential amplifier biases Q11 on. This cuts off transistors, Q6, Q7, Q8,

AS o TO BASE OF Q10

and Q2 until the output drops below 15V. If the overcurrent-sensing circuit is activated, it draws base current

from Q11 through resistor R3. If the +5V line falls below 4.5V, transistor Q3 conducts and clamps the base of

<R43

2470

Q6 near ground, thereby cutting off series-switching transistor Q2. (Refer to Paragraph 2.4.2.4.) Note that all

ducts. This pulls the base of Q10 positive through resistor
R64, turning off the series-switching transistor until the

1-0104

transistors in the -15V driver are common emitter configurations.

output capacitors are discharged. Transistor Q26 is a

germanium transistor used to reduce the threshold level for

Figure 2-9 Overvoltage Crowbar Circuit

2.4.2.2 Differential Amplifier — The -15V differential amplifier (see Figure 2-11) is nearly identical in operation

turn-on and to speed up turn-off of transistor Q1 when

to the +5V amplifier described in Paragraph 2.4.1. With the exception of those differences noted below, each

crowbar fires.

component serves the same function as its counterpart in

the +5V differential amplifier.
2.4.2 -15V Regulator

The -15V amplifier uses NPN transistors to accommodate

The -15V regulator is similar to the +5V regulator; although there are differences in individual circuits, their basic
operation is identical. Subsequent paragraphs discuss the -15V regulator circuits.

2.4.2.1

Driver — The -15V driver (see Figure 2-10) controls the state of switching transistor Q2 on the heat sink.

The driver is controlled by signals from three sources:

~15v

the -15V differential amplifier, the -15V overcurrent-

sensing circuit, and the +5V low-sensing circuit. The first two signals control the base of transistor Q11.

However, the input from the +5V low-sensing circuit effects control through transistor Q3. This is a departure

from the circuit in the +5V regulator which connects all three inputs to the base of transistor Q10.

the negative voltage.

Resistor R36 alters the ratio of the

divider network at the base of transistor Q14, thus main-

taining a 3.2V reference. Resistor R28 is changed to a 10K
resistor because of the higher voltage involved.

2.4.2.3 Overcurrent Protection — The overcurrent-sensing
circuit (see Figure 2-12) for the -15V regulator monitors
the amplitude of the current pulses being drawn by the -15V
load and shuts off the series-switching transistor if the cur-

Figure 2-11

-15V Differential Amplifier

Normal operation is the same as that of the +5V driver. When transistor Q11 is off, base current from transistor

rent becomes too high. This is accomplished by sensing the

Q6 flows through resistor R15 and Q6 conducts. This draws current through resistors R20 and R1 9, forward-

voltage drop across resistors R6 and R7. When this drop

biasing transistor Q7. This action turns on transistor Q8 through current-limiting resistor R22. (Resistor R22

becomes too high, transistor Q1 is forward-biased and pulls the base of transistor Q11 negative through resistor

2-6

R3. This cuts off switching transistor Q2 on the heat sink, thereby stopping the current flow. Capacitor C2 must
then charge through resistors R4 and RS. This keeps transistor Q1 turned on for a short period of time. When

capacitor C2 is sufficiently charged, base current no longer flows

capacitor used to slow down the circuit and improve noise

The AC LO signal is developed by similar, but indepefident, circuits for the +25V and -25V levels. These two
circuits are basically Schmitt triggers.

in Q1 and normal operation is resumed. Capacitor C1 is a Miller
s

2.4.3 ACLO Circuit

e a2Nk

Figure 2-14 is a simplified schematic of the +25V circuit; Figure 2-15 is a

schematic of the complete AC LO circuit.

immunity.

During normal operating conditions, the voltage at the

+215V

junction of resistors R54 and R53 (see Figure 2-14) should

2.4.2.4 -15V Crowbar Circuit — The -15V crowbar circuit

Siox

be approximately 8V because these resistors form a two-

(see Figure 2-13) includes the +5V low-sensing circuit (Q3)

to-one divider network. However, diode D21 clamps this

to trigger the crowbar. The collector of transistor Q3 is con-

nected through diode D22 to the DC LO circuit, and through

-25V

the emitter and the base of transistor Q24 are at the same

diode D4 to the base of transistor Q6, to implement turn-off

1H-0107

of the -15V regulator when transistor Q3 is conducting.

junction to prevent it from exceeding 5V. This means that (APPROXIMATE 3R>3

RS0 N %59
oas

potential (+5V) and the transistor is cut off. Since tran-

Figure 2-12 -15V Overcurrent Circuit

potential because diode D1 holds the base exactly 5V below

33K
feo

sistor Q24 is not drawing current through resistors R62

The base of transistor Q3 is normally very close to ground

024

3.3K

and R59, transistor Q25 is also biased off.

Assume now that the raw 25V supply starts to drop. The

the +5V level. When the +5V line drops, the base of Q3 shows a corresponding drop until base current flows

regulator maintains the +5V level but eventually, at about

through resistor R12 to the -15V line. This causes Q3 to conduct and draws current through resistors R17 and

+15V (raw), the junction of resistors R54 and R53 (and

R16.

Figure 2-14 AC LO — Simplified Schematic

the base of Q24) starts to drop below 5V. Diode D21 is
now reverse-biased and transistor Q24 becomes forward-biased when the base drops to approximately 4.3V. As

Q24 begins conducting, the base of Q25 goes positive because Q24 is now drawing current through R59 and R62.
~15V

When transistor Q25 turns on, it draws even more base current from Q24 through resistor R60.
p

sR30

0.1

—-25V

shi2
37500

:‘

D1
& 5.2V

/})>o12

R23
K

SR47

$3.3K

¥ D17

+25V

R46

Q15

8.2K

SR55

210K

2 D21

AvA.vAv

2.7K

34.7K

Q20

R29
100 O

+5V

:; ;?054

d)ozz

~C7
O1pF

-15V

RGO

10K

K,;j)ga,

3-3K

& po7
AC LO

<§025

& D23

+SV

D22
TO DC LO CKT

SR51
$27K

SR50

<4.7K

SR53
28.2K

sRez
T 3.3K

TO BASE OF 06
11-0108

1H-0110

Figure 2-13 -15V Crowbar Circuit
Figure 2-15 AC LO Circuit Schematic

The drop across R17 biases transistor Q9 on, which then draws current through resistors R24, R23, and R29,

Transistors Q24 and Q25 are dynamically related to each other. As one conducts, it causes the other to conduct

thus causing transistors Q12 and Q15, connected as a Darlington pair, to conduct. Transistor Q15 then grounds

more; this in turn causes the first one to conduct still further. This action introduces hysteresis into the circuit so

the -15V line through current-limiting resistor R30.

that the transistors react quickly to any voltage changes.

It should be noted that the -15V line does not actually drop to ground, but remains at approximately a -1V or

When transistor Q25 is conducting, note that resistor R60 is placed in parallel with resistor R53, thereby lowering

-2V level. This occurs because, once capacitors C11, C13, C15, and C17 are discharged, the crowbar circuit

the resistance of the bottom leg of the divider formed by resistors R54 and R53. In order to overcome this, the

reverts to a steady state with just enough negative voltage to keep transistor Q3 turned on.

+25V line must return to approximately +18V before the base is high enough to cut off Q24 and turn off Q25.

2-7

It is this action that introduces the previously mentioned hysteresis into the circuit. When Q25
1s conducting, it
also pulls the AC LO line on the Unibus to ground potential (asserted level).
The -25V portion of the AC LO circuit (see Figure 2-15) functions in the same manner as the

+25V portion of

the circuit, except that PNP transistors are used and the divider ratio is different, because failure

of the -25V raw

level must be detected sooner than failure of the +25V level. If the -25V circuit becomes active,
it asserts AC LO

by pulling the base of transistor Q24 more negative through resistor R58. This turns on Q24,
which in turn causes
transistor Q25 to conduct and assert AC LO as before.

Diode D27 allows the AC LO signal from all H720 Power Supplies in a given system to be ORed together on

the

Unibus to indicate a failure in any H720 in the system.

24.7K
$£562 N0

2.4.4 DC LO Circuit

Figure 2-16

is a simplified schematic of the detection portion of the DC LO circuits. Resistors R45 , R39, R40,

and R41 form a precision voltage divider between the +5V and -15V lines. As long as this divider
maintains a
one-to-three voltage ratio, the points on either side of diode D16 are

Assume now that the -15V level starts rising toward ground. Both the

+5V

ducts, it causes DC LO to be asserted.

IRr39

2562 0

If the +5V level drops, both bases (Q18 and Q19) feel a more negative
voltage and Q18 becomes forward-biased. When Q18 conducts, it
causes DC LO to be asserted.

Q18 and Q19 are cut off, transistor Q21 is biased through resistor
R49, and transistor Q23 is off. If transistor Q19 conducts (indicating

D19

‘

gigg; q

3 R4

SR42

)

zl:

<5620

15V
Fi=-0111

——CROWBAR
¢—PL——TO0-15V AMP

28.2K

-15v
HH-0ne

Figure 2-16 DC LO —

Figure 2-17 DC LO — Circuit Schematic

Simplified Schematic

Q23.

When Q23 turns on, DC LO is pulled to ground potential (asserted).
Resistors R42, R56, and R57 are connected as a divider network between -15V and +5V. The junction of
resistors R56 and R57 (anode of diode D19) is normally slightly negative. However, if transistor Q18 is conduct-

ing (low +5V line), the junction of resistors R56 and R42 goes to ground and the anode of diode D19 goes

positive. This also forward-biases transistor Q23 and asserts DC LC.

Note that diodes D20 and D19 form an OR gate to the base of transistor Q23. Diode D18 is used to protect Q23
from high reverse bias, and capacitor C21 is a Miller integrator which increases noise immunity for Q23.
If transistor Q3 should conduct as a result of a low +5V line, this also grounds the junction of resistors R42 and

R56 through diode D22, and turns on transistor Q23 to assert DC LO.
Diode D26 allows the DC LO signal from all H720 Power Supplies in a given system to be ORed together on the

éf;

510
5
,,:fl

AD18

SR40
5620

a low -15V line), it pulls the base of Q21 to ground, cutting it off.

2-8

Fe7K

023

ToVv
2 D1

2R39

3’562(1

This raises the anode of diode D20 toward +5V through resistor R52, and base current flows in transistor

Unibus to indicate a failure in any H720 in the system.

SRS57

A 022

018

Figure 2-17 illustrates the entire DC LO circuit, including transistor

Q3, which is the +5V low detection transistor. Normally, transistors

005

R42

¥oie

& Do ALl .

015 sy

base of transistor Q18 and the base of transistor Q19 feel a more

positive voltage, and Q19 becomes forward-biased. When Q19 con-

Q21

24.7k

& ffi

{ i £d %%

ca21

N5V wurearsd

3R45

y3620

Tor i

Q18

nis

¥$0io

a few tenths of a volt above and below ground. (The 0.7V forward
drop of diode D16 splits almost evenly on either side of ground.)

10K

D20