Digital PDFs

MISC-684EC8C2

1988

346 pages

Original

8.9MB

Document:	PDPll DIAGNOSTIC HANDBOOK 1988
Order Number:	MISC-684EC8C2
Revision:
Pages:	346
Original Filename:

OCR Text

mamoomo

PDPll DIAGNOSTIC HANDBOOK
1988
This handbook is the result of the personal initiative and eHort
of Hanspeter Steinegger, System Support Engineer in the Swill
TSSC. He used every spare minute to complete this booklet.
This handbook is meant to be a tool for Field Engineers.
It il the second edition of the "FIELD ENGINEERING
DIAGNOSTIC HANDBOOK" which was produced 5 years ago by
the GER Product Support Organisation. This new handbook
replaces the orange paperback which was pubHshed in 1982.
My compHments to Hanspeter, who demonstrated what an individual
can achieve and in which direction we should go to be even more
efficient as a Support Organisation.

COPYRIGHT 1987 DIGITAL EQUIPMENT CORPORATION.
ALL RIGHTS RESERVED.
The in/ormation in this document is subject to change without notice and should
not be construed as a commitment by Digital Equipment Corporation. Digital
Equipment Corporation assumes no responibility lor any elTors that may appear in
this manual.

fOREWORD
This diagnostic handbook will help you to maintain and repaJl- PDPIl systems and
tlleir optjons. f.'ven jJ you are not trained or are not Jami/iar wHll an option. with
the help oj this book. you should be able to lind and run tIle correct diagnostic
test
Some inJonnation regarding the layout oj this book
Each diagnostic test had to lit on one page. and one page is not much. Due to that
limited space, I was not able to include error iruormation. In case you get errors
and you are unsure what the meaning is. your local Telephone Support Center can
give you Jurther error jruormation (this is not valid lor non Digital employees).

I wrote the diagnostic name with the newest revision level in this book (example
EQKCEI . "El" is the REV. level as 01 September 1987). The XXDP monitor will accept
"??" in place 01 an revision level (example : .R EQKC??). In this case it will run
any revision it linds on the diagnostic media This can help you to determine jJ
your diagnostic test is at the newest revision. In time newer revision will exist
there/ore 1 would advise you to note them in your book.
At the end 0/ this book you lind a index oj all the valid PDPII diagnostic programs
available today. Together with the DEC·XIl modules there are over a thousand
tests.

Zuerich 30 - September 1987

TABLE OF CONTENS

CHAPTER 1
1-1

1-2
1-3
1-4
1-5
1-6

1-7
I-S
1-9
1-10

1-11
1~12

1-13
1-14
1-15
1-16

1-17
I-IS
1-19

1-20
1-21

1-22
1-23
1-24

1-25
1-26
1-27

1-2S
1-29

1-30
1-31
1-32

1-33
1-34
1-35
1-36
1-37

1-3S
1-39
1-40
1-41
1-42

CPU's - MEMORIES - FLOATING-POINT
11/45 CPU TRAP TEST
11/45 MEMORY MANAGEMENT UNIT TEST
11/40, 11/45 INSTRUCTION EXERCISER
FP11-C FLOATING POINT TEST 1
FPll-C FLOATING POINT TEST 2
11170 CPU DIAGNOSTIC PART 1
11170 CPU DIAGNOSTIC PART 2
11170 CACHE TEST 1
11170 CACHE TEST 2
11170 MEMORY MANAGEMENT UNIT TEST
11170 UNIBUS MAP TEST
11170 POWER FAIL TEST
11170 CORE MEMORY MJ 11
11170 MOS MEMORY MKll
11170 INSTRUCTION I/O EXER
11170 RH70 MASSBUS CONTROLLER TEST
11/34 FLOATING POINT FP11-A TEST 1
11/34 FLOATING POINT FP11-A TEST 2
11/34 FLOATING POINT FPll-A TEST 3
11/34 BASIC CPU TEST
11/34 CPU TRAP TEST
11134 EIS - EXTENDED INSTRUCTION TEST
11/34 CACHE DIAGNOSTIC
11/34 INSTRUCTION I/O EXERCISER
11/34 MEMORY MANAGEMENT TEST
INTERFACE ADDRESS AND VECTOR ASSIGNMENTS
11/04 BASIC CPU TEST
11/04 CPU TRAP TEST
11123 FLOATING POINT (MSlSS) TEST 1
11123 FLOATING POINT (MSlSS) TEST 2
11123/24 MEMORY MANAGEMENT UNIT TEST
11/23/24 BASIC CPU TEST
11/23/24 KEFll FLOATING POINT CHIP TEST 1
11123/24 KEFlI FLOATING POINT CHIP TEST 2
11/24 CPU BOARD M7133 GO-NOGO TEST
11124 SLU & LTC (M7133) DIAGNOSTIC
11124 CIS COMMERCIAL INSTRUCTION SET
11123 + KDFll-B SLU & LTC (MSlS9) TEST
11123+ KDFll-B CPU BOARD (MStS9) GO-NOGO
MICRO PDPll CPU GO-NOGO TEST
11/44 FLOATING POINT (M7093) TEST 1
11/44 FLOATING POINT (M7093) TEST 2

1-43
1-44
1-45
1-46
1-47
1-48
1-49
1-50
1-51

1-52
1-53
1-54
1-55
1-56
1-57
1-58
1-59
1-60
1-61
1-62

1-63
1-64
1-65
1-66
1-67

1-68
1-69
1-70
1-71

1-72
1-73
1-74

1-75
1-76
1-77
1-78
1-79
1-80
1-81
1-82
1-83
1-84
1-85
1-86
1-87
1-88

11/44 FLOATING POINT (M7093) TEST 3
11/44 BASIC CPU TEST
11/44 CPU TRAP TEST
11/44 POWER FAIL TEST
11/44 MULTI FUNCTION MOD. (M7096)
11/44 CACHE (M7097) TEST
11/44 MEMORY MANAGEMENT TEST 1
11/44 MEMORY MANAGEMENT TEST 2
11/44 UNIBUS MAP (M7134) TEST

11 121 KXT -11 SBC TEST
11/84/83/73 EEPROM LOADER
11/84/83/73 CPU BOARD (M8190) TEST
11/53 CPU BOARD TEST
11/84 UNIBUS ADAPTER (M819l) TEST
11/60 FLOATING POINT TEST 1
11/60 FLOATING POINT TEST 2
11/60 FLOATING POINT TEST 3
11/60 FLOATING POINT TEST 4
11/60 FLOATING POINT TEST 5
11/60 BASIC CPU TEST

11/60 CPU TRAP TEST
11/60 INSTRUCTION 110 EXERCISER
11/60 CACHE DIAGNOSTIC
11/60 MEMORY MANAGEMENT TEST
11/03 LSI BASIC INSTRUCTION TEST
11/03 LSI EIS INSTRUCTION TEST
11/03 LSI FlS INSTRUCTION TEST
11/03 LSI TRAP TEST
11/03 LSI 4K SYSTEM INTERRUPT EXER
11/03 LSI DIBOL INSTRUCTION TEST I
11/03 LSI DIBOL INSTRUCTION TEST 2
11/03 LSI TRAP TEST (30K SYSTEM)
MSVll-J Q-BUS MOS MEMORY TEST
MSVll-D/L/P 0-4 MEGABYTE EXER
Q-BUS MEMORY QUICK VERIFY TEST
11/73 KDJll-A CPU BASIC INSTRUCTION TEST
11/73 KDJlI-A (M8192) MEMORY MANAGEMENT TEST
11/73 KDJlI-A FLOATING POINT DIAGNOSTIC
11/73 KDJlI-A CACHE DIAGNOSTIC
PDPll CIS COMMERCIAL INSTRUCTION SET TEST
LSI MEMORY 0-28K (l24K) WORD TEST
11/60 MFI1S-K MOS MEMORY TEST
PDPll MSll-LlM MEMORY TEST
PDPll MS11-L/M/P MOS MEMORS TEST
PDPll INSTRUCTION EXER
PDPll 0-124K WORD MEMORY (NOT ECC) 'TEST

CHAPTER 2
2-1
2-2
2-3
2-4
2-5
2-6
2-7

2-8
2-9
2-10

2-11
2-12
2-13
2-14
2-15
2-16
2-17

2-18
2-19

2-20
2-21
2-22
2-23

2-24
2-25
2-26
2-27

2-28
2-29
2-30

2-31
2-32
2-33
2-34
2-35

2-36
2-37

2-38
2-39
2-40

2-41
2-42
2-43

COMMUNICA nON - PRINTERS - MODULES
DHVII Q-BUS 8 LINE ASYNCHR. TEST I
DHVII Q-BUS 8 LINE ASYNCHR. TEST 2
DHVII Q-BUS 8 LINE ASYNCHR. TEST 3
DHVll Q-BUS 8 LINE ASYNCHR. QUICK TEST
DLV11-J Q-BUS 4 LINE ASYNCHR. LOGIC TEST
DMVll MULTIPOINT SYNCHR. STATIC DIAG. PART 1
DMVll MULTIPOINT SYNCHR. STATIC DIAG. PART 2
DMVll MULTIPOINT SYNCHR. LINE UNIT TEST 1
DMVII MULTIPOINT SYNCHR. LINE UNIT TEST 2
DMVll MULTIPOINT SYNCHR. LINE UNIT TEST 3
DPVII Q-BUS I LINE SYNCH. FUNCTIONAL TEST
DLVll-E Q-BUS ASYNCH. INTERF. OFF-LINE TEST
DZVll, DZQll Q-BUS 4 LINE ASYNCHR. TEST 1
DZVII, DZQll Q-BUS 4 LINE ASYNCHR. TEST 2
DZVII, DZQll Q-BUS 4 LINE EIA ECHO TEST
DLVII Q-BUS 1 LINE ASYNCHR. LOGIC TEST
MXV11-A MULTI FUNCTION MODULE DIAGNOSTIC
MXVll-B MULTI FUNCTION MODULE DIAGNOSTIC
DEQNA Q-BUS ETHERNET INTERF. NI EXERCISER
DMP, DMVll SYNCHR. DATA COM. LINK TEST
DUPll DATA COMMUNICATION 1.INK TEST
DHll, DMll 16 LINE ASYNCHR. STATIC LOGIC TEST
DH II MEMORY TEST
DH II TRANSMITTER AND RECEIVER TEST
DHII SPEED SELECTION LOGIC TEST
DHll/DMll MODEM GONTROL MULTIPLEXER TEST
DH II COMPREHENSIVE DIAGN. TEST
DH II DATA RELIABILITY TEST
DHUII 16 LINE ASYNCHR. FUNCTIONAL TEST 1
DHUll 16 LINE ASYNCHR. FUNCTIONAL TEST 2
DHUll 16 LINE ASYNCHR. FUNCTIONAL TEST 3
DHUII 16 LINE ASYNCHR. FUNCTIONAL TEST 4
DLll-E, DLll-C. DLlI-D OFF-LINE DIAG.
DLll-W 1 11/44 MFM LINE ASYNCHRON. TEST
DMCII SYNCHRONOUS INTERF. MICRO-PROC TEST
DMCII SYNCHRONOUS INTERF. LINE UNIT TEST 1
DMCII SYNCHRONOUS INTERF. LINE UNIT TEST 2
DMCII SYNCHRONOUS INTERF. CROM & JUMP TEST
DMCll SYNCHRONOUS INTERF. FREE RUNNING TEST
DMRll SYNCHRONOUS INTERF. FUNCTIONAL DIAG.
DMPIL DMRll. DMCII. KMCII PROCESSOR TEST 1
DMPIl, DMRIl, DMCll. KMCll PROCESSOR TEST 2
DMCIL DMRIL KMCll (M8203) LINE UNIT TEST 1

2-44
2-45
2-46
2-47
2-48
2-49
2-50
2-51
2-52
2-53
2-54
2-55
2-56
2-57
2-58
2-59
2-60
2-61
2-62
2-63
2-64
2-65
2-66
2-67
2-68
2-69
2-70
2-71

DMCII. DMRII. KMCII (M8203) LINE UNIT TEST 2
DUPll SYNCH. INTERf. OffLINE TRANSM. TEST
DUPll SYNCHRONOUS INTERf. OffLINE RECE. TEST
DUPII SYNCHRONOUS SDLC TEST
DUPII (M7867) CONFIDENCE TEST
DRII-B. DIRECT MEMORY ACCESS TEST
DRll-C (M7860) WITH TESTCABLE BC08R TEST
DZll 8 LINE ASYNCHRONOUS INTERf. TEST
KMCll-A lOP M8204 MICRO DIAGNOCTIC
KMCll-A M8204 READ/WRITE MICRO-PROC TEST
KMCll-A MICRO-PROC JUMP & CRAM TEST
KMCll-B M8206 STATIC TEST PART 1
KMCll-B M8206 STATIC TEST PART 2
KWll-P PROGRAMMABLE CLOCK TEST
KXJlI-CA SLAVE CPU TEST
LA36 TERMINAL ON DLll TEST
DECSA ETHERNET TERMINAL SERVER TEST
LNOl LASER PRINTER TEST
LPll. 2310 PRINTER TEST
LP05.LPll, LP14 PRINTER TEST
LP25, LP26, LP27. LP07 PRINTER TEST
LSll CENTRONICS PRINTER TEST
M9312 BOOT MODULE TEST
DEQUNA ETHERNET INTERf. FUNCTIONAL TEST
DEUNA ETHERNET INTERF. REPAIR LEVEL TEST
DEUNA ETHERNET INTERF. FUNCTIONAL DIAGN.
DEUNA ETHERNET INTERF. NIE EXERCISER
DELUA ETHERNET INTERFACE FUNCTIONAL DIAG.

CHAPTER 3
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9

3-10
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
3-19

3-20
3-21
3-22
3-23
3-24
3-25
3-26
3-27
3-28
3-29
3-30
3-31
3-32
3-33
3-34
3-35

3-36
3-37
3-38
3-39
3-40
3-41
3-42
3-43
3-44

DISK's
RC2S DISK PERFORMANCE EXER
RC25 DISK FRONT END TEST
RC2S DISK PACK FORMATTER
RK611 DISK CONTROLLER TEST 1
RK611 DISK CONTROLLER TEST 2
RK611 DISK CONTROLLER TEST 3
RK611 DISK CONTROLLER TEST 4
RK611 DISK CONTROLLER TEST 5
RKOS/07 DUAL PORT DIAGNOSTIC
RK06/07 DISK DRIVE DIAG. TEST 1
RKOS/07 DISK DRIVE DIAG. TEST 2
RK06/07 DISK DRIVE DIAG. TEST 3
RKSII CONTROLLER FUNCTIONAL TEST S
RKOS/07 DISK PACK FORMATTER
RKOS/07 DRIVE DINAMIC TEST PART 1
RKOS/07 DRIVE DYNAMIC TEST PART 2
RKOS/07 PERFORMANCE EXERCISER
RKOS/07 DRIVE COMPATIBILITY TEST
RKOS/07 USER DEFINED TEST
RP04/0S/0S MECHANICAL & READ/WRITE TEST
RP04/0S/0S PACK FORMATTER
RP04/05/0S HEAD ALIGNMENT PROGRAM
RP04/0S/06 MULTI-DRIVE LOGIC TEST
RP04/0S/0S DUAL CONTROLLER TEST 1
RP04/0S/06 DUAL CONTROLLER TEST 2
RP04/0S/0S DISKLESS TEST PART 1
RP04/0S/0S DISKLESS TEST PART 2
RP04/0S/0S DISK CONTR. (DCL) TEST 1
RP04/0S/0S DISK CONTR. (DCL) TEST 2
RP07 DISK HDA FORMATTER / SCANNER
RP07 FUNCTIONAL TEST
RP07 FRONT END TEST
RP07 DUAL PORT TEST
RP07 PERFORMANCE EXERCISER
RKll, RKOS PERFORMANCE EXERCISER
RKII. RKOS UTILITY PACKAGE
RKII-C/-D BASIC LOGIC TEST 1
RKII-C/-D BASIC LOGIC TEST 2
RKII. RKOS DINAMIC TEST
RLVll DISKLESS CONTROLLER TEST
RLVll/12. RLll DISKLESS CONTROLLER TEST
RLVl1/12. RLll CONTROLLER TEST 1
RLVll/12. RLll CONTROLLER TEST 2
RLOl/02 DRIVE TEST 1

3-45
3-46
3-47
3-48
3-49
3-50
3-51
3-52
3-53
3-54
3-55
3-56
3-57
3-58
3-59
3-60
3-61
3-62
3-63
3-64
3-65
3-66
3-67
3-68
3-69
3-70
3-71
3-72
3-73
3-74
3-75
3-76
3-77
3-78
3-79
3-80
3-81
3-82
3-83
3-84
3-85
3-86
3-87
3-88
3-89
3-90
3-91

RL01l02 DRIVE TEST 2
RLOlI02 PERFORMANCE EXERCISER (11121)
RLOl/02 PERFORMANCE EXERCISER
RLOI/02 DRIVE COMPATIBILITY TEST
RLOI/02 BAD SECTOR FILE UTILITY
RL01l02 DRIVE TEST 3
RM02/03/05 PACK FORMATTER PROGRAM
RM02/03/05 DRIVE FUNCTIONAL TEST 1
RM02/03/05 DRIVE FUNCTIONAL TEST 2
RM02/03/05 DRIVE FUNCTIONAL TEST 3
RM02/03/05 DISKLESS DCL/RH TEST I
RM02/03/05 DISKLESS DCLiRH TEST 2
RM02/03/05 DUAL PORT TEST PART I
RM02/03/05 DUAL PORT TEST PART 2
RM02/03/05 DRIVE COMPATIBILITY TEST
RM02/03/05 PERFORMANCE EXERCISER
RM02/03/05 EXTENDED DRIVE TEST
RM80 PERFORMANCE EXERCISER
RM80 DISKLESS RM-ADAPTER/RH TEST 1
RM80 DISKLESS RM-ADAPTER/RH TEST 2
RM80 FUNCTIONAL TEST PART 1
RM80 FUNCTIONAL TEST PART 2
RM80 FUNCTIONAL TEST PART 3
RM80 FUNCTIONAL TEST PART 4
RM80 DUAL PORT TEST PART 1.
RM80 DUAL PORT TEST PART 2
RM80 HDA FORMATTER PROGRAM
RQDXl/2/3 RUX50. RX50. RD51/52 EXER.
RQDXl/2 RD51/52 DISK FORMATTER
RQDX3 RD31/51/52/53/54. RX33 FORMATTER
RQDX. RD51/52/53. RX50. RUX50 DUP TEST
RX33 FLOPPY DISKETTE fORMATTER
RHII. RS03/04 BASIC fUNCTION TEST
RS03. RS03/04 DATA RELIABILITY TEST
RS04 MAINTENANCE MODE DIAGNOSTIC
RXII. RXOI FLOPPY RELIABILITY TEST
RXII INTERFACE TEST
RX02 PERFORMANCE EXERCISER TEST (11121)
RXV21-RX02 FUNCTIONAL / LOGIC TEST (11/21)
RX02 PERFORMANCE EXERCISER TEST
RX02 FORMAT CHANGE UTILITY
RXV21/RX211-RX02 FUNCTIONAL / LOGIC TEST
UDA/KDA50 RAxx BASIC SUBSYSTEM DIAG.
UDA/KDA50 RAxx DISK EXERCISER
UDA/KDA50 RAxx MSCP SUBSYSTEM EXER.
UDA/KDA50 RAxx FORMATTER
RASO/80/81/82 BAD BLOCK REPL. UTILITY

CHAPTER 4
4-1

4-2
4-3
4-4
4-S
4-6
4-7

4-8
4-9

4-10
4-11
4-12

4-13
4-14
4-1S

4-16
4-17
4-18
4-19

4-20
4-21
4-22

4-23
4-24
4-2S

4-26
4-27
4-28

4-29

4-30
4-31

4-32

4-33
4-34
4-3S
4-36
4-37
4-38

4-39

4-40
4-41

4-42
4-43

4-44
4-4S

TAPE's
TSVOS TAPE DRIVE DIAGNOSTIC TEST I
TSVOS TAPE DRIVE DIAGNOSTIC TEST 2
TSVOS TAPE DRIVE DIAGNOSTIC TEST 3
TSVOS TAPE DRIVE DIAGNOSTIC TEST 4
TSVOS DATA RELIABILITY TEST
TAll TU60 CASSETTE TAPE BASIC TEST I
TCll DEC TAPE BASIC LOGIC TEST 1
TM03. TEI6. TUn fUNCTIONAL TEST I
TM03. TEI6. Tun fUNCTIONAL TEST 2
TM03. TEI6. Tun BASIC fUNCTION TEST
TM03. TEI6. TU77 DATA RELIABILITY PROGRAM
TM03. TEI6, Tun DRIVE fUNCTION TIMER
TKSO fRONT END fUNCTIONAL TEST
TKSO DATA RELIABILITY TEST
TK2S fRONT END fUNCTIONAL TEST I
TK2S fRONT END fUNCTIONAL TEST 2
TK2S fRONT END fUNCTIONAL TEST 3
TK2S fRONT END fUNCTIONAL TEST 4
TK2S DATA RELIABILITY TEST
TS03. TEIO, TUIO BASIC fUNCTION TEST
TMI!. TUIO. TElO DATA RELIABILITY TEST
TMI!. TUIO 7 CH DATA RELIABILITY PROGRAM
TMII. TUlO DRIVE fUNCTION TIMER
TMAll/TMBll TUlO. TEIO DRIVE fUNCTION TIMER
TMAll/TMBll. TEIO. TUIO SUPL. IN8TR. TEST
TS03. TUIO. TEIO DATA RELIABILITY TEST
TSUOS TAPE DRIVE DIAGNOSTIC TEST 1
TSUOS TAPE DRIVE DIAGNOSTIC TEST 2
TSUOS TAPE DRIVE DIAGNOSTIC TEST 3
TSUOS TAPE DRIVE DIAGNOSTIC TEST 4
TMAll/TMBll/TS03 DRIVE fUNCTION TIMER
TMAll/TMBI!. TS03 SUPPL. INSTR. TEST
TSI!. T804 DATA RELIABILITY TEST
TSl1. T804 CONTROL LOGIC TEST
TU81 DATA RELIABILITY TEST
TU81 fRONT END fUNCTION TEST
TM02. TUI6, TEI6 DATA RELIAB. TEST
TM02. TUI6. TE16 BASIC fUNCTION TEST
TM02. TUI6. TEI6 CONTROL LOGIC TEST
TM02. TU16 DRIVE fUNCTION TIMER
TM02. TEI6 DRIVE fUNCTION TIMER
TM02, TU4S DATA RELIABILITY TEST
TM02. TU4S BASIC fUNCTION TEST
TM02, TU45 CONTROL LOGIC TEST
TM02. TU45 DRIVE fUNCTION TIMER

4-46
4-47

4-48
4-49
4-50
4-51
4-52
4-53
4-54
4-55
4-56

4-57

APPENDIX 1

TM03. TU45 CONTROL LOGIC TEST 1
TM03. TU45 CONTROL LOGIC TEST 2
TM03. TU45 BASIC fUNCTION TEST
TM03. TU45 DATA RELIABILITY TEST
TM03. TU45 DRIVE fUNCTION TIMER
TU58 PERfORMANCE EXERCISER (11121)
TU58 PERfORMANCE EXERCISER
TU80 OAT A RELIABILITY TEST
TU80 fRONT END DIAGNOSTIC PART 1
TU80 fRONT END DIAGNOSTIC PART 2
TU80 fRONT END DIAGNOSTIC PART 3
TUBO fRONT END DIAGNOSTIC PART 4

DIAGNOSTIC INDEX

CPU's MEMORIES CPU's MEM ...
11/45 CPU, MMU
11/40
FPII-C
iii70 CPU,CACHE
11/70 MMU. UNIBUS MAP
11/70 MJII CORE MEMORY
11/70 MKII MaS MEMORY
11/34 CPU, FPP, CACHE
ADDRESS & VEC. ASSIGNM.
11/04 CEll
II /23/24 CPU, FPP, CIS
11/44 FPP. CPU, CACHE
11/21 CPU
11/84/83/73
11/60 FPP, CPU, CACHE
11/03 LSI
MSVII-J
MSVII-L/D/P
11/73 LSI CPU
11/60 MEMORY MFIIS-K
MEMORY MSII/L/M/P
PDPII INSTR./ I/O EXER
1-0

CKBMEO

11/45 CPU
11/45 CPU TRAP TEST

ABSTRACT:
This program checks that on all trap operations register 6 is decremented the
correct amount. that the correct PC is saved on the stack. that the old condition
codes and priority are placed on the stack and that the new status and
condition codes are correct. Both the TRAP and E:MT trap instructions are
tested to see that all combinations will trap. Checked also is that all reserved
instructions will trap. Verification of the TRAP instruction 000003 which is used
for software debug routines like ODT DDT is done. Also the trace bit is tested.
Stack overflow. the RTI and RTT instructions are checked.
OPERATING PROCEDURES':

.R CKBME:O
the test will ring the bell on pass completion
II an error is detected. there will be a program 1101t. In this case register 6
(the stacJcpointer) should be examined to determine its contens. Memory as
specified by R6 contains the PC + 2 of the failing instruction which caused the
laulty trap or interrupt.
SWITCH SETTINGS :
no switch settings

1-1

11/45 MMU

CKTGEO

11/45 MEMORY MANAGEMENT TEST
ABSTRACT;
This program is designed using a "BOTTOM UP" approach starting with the
smallest segment 01 MEMORY MANAGEMENT logic and building up to cover
all the logic. The program begins by testing some 01 the internal CPU data
and address path and address detection logic, then works outward through
the MEM. MANAGEMENT registers. It is assumed that the CPU has been tested.
or are known to be good. This test is able to mop and exercising I/O devices
like TCll, LPll. KWlJ-L and RFlI disk:;.
OPERA TING PROCEDURES

_R CKTGED
The program will immediatly halt.
Set the desired switch settings.
Press continue_
The program will print a $ at the end 011 each Memol'Y bonk (4KW).
and a asterisk will be typed at the end oj a lull pass thru all memory.
SWITCH SETTINGS :

Switch settings before the program start
SWI5=
SWI4=
SWI3=
SWI2=

SWll=
SWlO=

SW09=
SWOB;:

holt on error
loop on current test
inhibit all error typeouts
inhibit trace trapping
inhibit iterations
inhibit processor test
inhibit cycling supervisor mapping
inhibit cycling supervisor page 7 access key

Switch settings to be set alter the program holt.
SW07=

SWOG=
SW05=
SW04=
SWDD=

inhibit TCII dec tape
inhibit RFlI disk
inhibit line printer
inhibit line clock
inhibit TTY output

1-2

CQKCGO

11/40/45
11140/45 INSTRUCTION EXERCISER
ABSTRACT:

This is a overall test 01 the 1114D145 CPU. Memory Management in User and
Kernel mode and all 01 the memory. In particular it tests the CPU and executes
each instruction in all address modes and includes tests lor traps. interrupts.
the Unibus and the Massbus. 11 not deselected. the program relocates the test
codes throughout memo~/. JlJso, if selected, the program will relocate using
available disks. RF. RK. RP04. RSD4 and RKD6. Precautions must be taken to
ensure the PROTECTION OF USER DISKS. Writers comment: this is a very
good program use it as mutch as possible.
OPERA TING PROCEDURES :

.R CQKCGD
The test will print alter a pass:
"DCQKC DONE"
CONTROL SWITCH SETTINGS :
SWI5 = I halt on error
SWI4 = I loop on current subtest

SWl3 = I inhibit error typeout
SWI2= I inhibit relocation (run only lirst BK 01 memory)
SW 11 =
inhibit sub test iteration
SWID=
ring bell on error
inhibit relocation (above 2BK)
SWD9=
SWDB= I load PDP 11/45 micro-break register with SWR <07:00>
SWD7= I print end 01 pass typeout "THE QUICK BROWN FOX ..
SWD6= I inhibit clock interrupts
SWD5= 1 enable relocation via all available disks
SWD4=
enable random disk address selection lor relocation
SWD3=
enable relocation via 110 device
SWD2=
SWDI=
SWDD=

o
2

3
4

5
6
7

device codes--;this switches when set cause the program
device codes--;to relocate the test code using the device
device codes--;specilied below:
CPU
RKll
RFll
RP11
RC
RP04
RSD4
RK06

1-3

FPII-C

EFPAAO

11/45/55170 FPII-C FLOATING POINT TEST 1
ABSTRACT:
This is the Floating point processor diagnostic FPll-C and consists 01 two
programs designed to detect and report logic faults in the FPP of the 111451
55 and 70 system. This part I is the basic FPP instruction test. Alter this test
run also part 2 "EFPBAl".
OPERA TING PROCEDURES

.R EFPAAO

SWITCH SETTINGS:
SWI5 =
halt on error
SW13=
loop on current test
SWI2=
inhibit all error type outs
SWll =
not used
SWIO=
inhibit iterations
SW09=
ring bell on error
SWOB =
loop on error
SW07 =
loop on sub test specified in S W < 07:00 >
SW07= 0 load micro-break register with S W < 07:00>
SWOG = 1 selects subtest I micro-break reg.
SW05 =
selects subtest I micro-break reg.
SW04 =
selects subtest micro-break reg.
SW03 =
selects subtest micro-break reg.

1-4

FPII-C

EFPBAI

11/45/55/70 FPll-C FLOATING POINT TEST 2
ABSTRACT:
Tllis is tIle Floating point processol- diagnostic FPll-C and consists 0/ two
progroms designed to detect and report logic faults in the FPP of the 111451
55 and 70 system. This port 2 is tIle multiply - divide and ROM test.
OPERA T!NG PROCEDURES

.R EFPBAI

SWITCH SETTINGS:
SW 15 =
holt on error
SW13 =
loop on current test
SW12 ==
inhibit all error type outs
SWll ==
skip memory management tests
SWlO=
inhibit iterotions
ring bell on error
SW09=
loop on error
SWOB=
loop on sub test specified in SW <07:00>
SW07=
SW07= o load micro-break register with SW <07:00>
SW06= 1 selects subtest 1 micro-break reg.
selects subtest 1 micro-brealc reg.
SW05=
selects subtest
micro-break reg.
SW04=
selects subtest
micro-break reg.
SW03=

1-5

11/70 CPU

EKBADO

11170 CPu DIAGNOSTIC PART 1
ABSTRACT:
Tbs diagnostic is the /in;t part 01 the 11170 CPU, it designed to detect and
report logic laults in the CPU. Any lault detected in this progrum causes the
progrum to .. HALl ..•. After this, run the second part of the CPU test, EKBBFO.
OPERA TING PROCEDURES :

set the switch register by < CONTROL P> (RD console)
CON = xxxxxx WZ
(W = deposit xxxxxx into console switcll register)
(R
read and type console switc11 settings)
(Z = switch console terminal back to program)
.R EKBADO
SWITCH SETTINGS
SW15 = 1 halt on error
SW14 = 1 loop on test
SW13= 1 inhibit error typeouts
SW12 = 1 inhibit T-bit trupping
SWll= 1 inhibit iterutions
SWlO;::: 1 ring bell on error
SW09;:::
loop on error
SWOB=
loop on test in SWR <07:00>
SW07=
not used
SWOG =
skip bus request G test
SW05 = 1 skip bus request 5 test
S W04 = 1 skip bus request 4 test
SWOO= 1 skip operator intervention testing

1-6

EKBBFO

11/70 CPU
11170 CPu DIAGNOSTIC PART 2
ABSTRACT:

This diagnostic is the second part 01 tile
instructions and miscellaneous logic.

ll170 CPU,

it tests advanced

OPERA TING PROCEDURES :

set the switch register by < CONTHOL P> (RD con:>ole)
CON = xxxxxx WZ
(W = deposit xxxxxx into console switch register)
(R
read and type console switc11 settings)
(Z = switch console terminal back to program)

.R EKBBfO
SWITCH SETTINGS

SWl5 =
SWl4 =
SW13 =.
SWI2=

SWl1=
SWlO=

SW09=
SWOB=

SW07=.o
SWD6~

SWD5=
SW04=
SW02=
SWDI =
SWDO=

halt on error
loop on test
inhibit error typeouts
inhibit T·bit trapping
inhibit iterations
ring bell on error
loop on error
loop on test in SWR < 07:00>
not used
skip bus request 6 test
skip bus request 5 test
slcip bus request 4 test
test selector (witl) switch B)
test selector (with switch B)
skip operator intervention testing

EKBCDI

11/70
11/70 CACHE TEST 1

ABSTRACT:
The programs EKBC and EKBD are repair and and test programs of the cache
memory system in the 1I170 system. The failures (if any) are typically
identified with a failing circuit when the report is made, but the overal
diagnostic philosophy has been to locate the failing module out oj Jour.
MBl42
MBl43
MB144
MBl45

CCB CACHE CONTROL BOARD
ADM CACHE ADDRESS MEMORY BOARD
DTM CACHE DATA MEMORY BOARD
CDP CACHE DATA PATHS BOARD

The program EKBC is designed to test the boards MBl42 and MB145. while
EKBD is designed to test MBl43 and MB144.
OPERATING PROCEDURES :
set the switch register by < CONTROL P> (RD console)
CON == xxxxxx WZ
(W = deposit xxx xxx into console switch register)
(R
read and type conllole Ilwitcil Ilellings I
(Z = switch console terminal back to program)
.R EKBCDI

SWITCH SETTINGS:
halt on error
SWI5==
SWI4=
loop on test
SWI3=
inhibit error printout
SWI2=
not used
SWl1=
inhibit iterotions
ring bell on error
SWlO=
SW09=
loop on error
SWOB=
loop on test in SWR < 06:00>
SW07=
skip execution oj tests which use memory management
SW06=
selects the subtest in case S W 08 is Oll
selects the subtest in case SW 08 is on
SW05=
selects the subtest in case SW 08 is 011
SW04=
selects tIle subtest in case SW 08 is on
SW03=
selects the subtest m case SW 08 is on
SW02=
selects tlHJ subtesl in case SW 08 is Oil
SWOI =
selects the subtest in calle SW 08 is on
SWOO=

1-8

EKBDEI

11/70
11170 CACHE TEST 2
ABSTRACT:

The programs EKBC and EKBD are repair and and test programs 01 the cache
memory system in the III 70 system. TIle failures (if any) are typically
identified with a failing circuit wIlen the reporl is made, but the overal
diagnostic philosophy has been to locate the failing module out 01 lour.

M8142
MB143
MBl44
MB145

CCB CACHE CONTROL BOARD
ADM CACHE ADDRESS MEMORY BOARD

DTM CACHE DATA MEMORY BOARD
CDP CACHE DATA PATHS BOARD

The program EKBC is designed to test the boards M8142 and M8145, while
EKBD (this test) is designed to test M8143 and MB144.
OPERA TING PROCEDURES :

set tIle switch register by <CONTROL P> (RD console)
CON = xxxxxx WZ
(W = deposit xxxxxx into console switch register)
(R
read and type console switch settings I
(Z = switch console terminal back to program)
.R EKBDEI

SWITCH SETTINGS :

SW15=
SW14=

SW13=
SW12=
SWI1=
SWlO=
SW09=
SWOB=
SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SWOl=
SWOO=

l1alt on error
loop on test
inhibit error printout
not used
inhibit iterations
ring bell on error
loop on error
loop on test in SWR < 06:00>
skip execution of tests whicll lise memory management
1 selects the subtest in case SW 08 is on
1 selects the subtest in case SW DB is on
I selects the subtest in case SW 08 is on
1 selects the subtest in case SW DB is on
1 selects the sllbtest in case SW DB is on
1 selects the sllbtest in case SW DB is on
1 selects the subtest in case SW DB is on

}-9

EKBEEI

11/70 MMU

11170 MEMORY MANAGEMENT TEST
ABSTRACT:
This program was designed using a "BOTTOM UP" approach starting with the
smallest segment 01 MEMORY MANAGE.'MENT logic and building up to cover
all the logic. The program begins by testing some 01 the internal CPU data
and address path and address detection logic. then works outward through
the ME.'M. MANAGEMENT registers It is assumed that both the CPU and the
CACHE have been tested. or are known to be good.

OPERA TING PROCEDURES :
set the switch register by < CONTROL P>
CON = xxxxxx WZ
(W = deposit xxxxxx into console switch register)
(R
read and type console swi tch se ttings I CON = RJ
(Z = switch console terminal back to program)

.R EKBEEI
SWITCH SETTINGS
SW15 =
halt on error
SWl4 =
loop on current test
SWI3=
inhibit all error typeouts
SWl2 =
inhibit trace trapping
inhibit iterations
SWll =
ring bell on error
SWlO=
loop on error
SW09=
loop on test in SWR < 06:00>
SWOB=
inhibit multiple error typeouts
SW07=
selects subtest
SWOG=
SW05=
selects subtest
SW04=
selects subtest

1-10

EKBFDI

11/70
11/70 (M8141) UNIBUS MAP TEST
ABSTRACT:

This program assumes the CPU. cache and mem-management to be OK. It
tests that all map registers can be addressed. tests all map registers with
data patterns. addressing main memory through the UNIBUS by relocating to
top 128K and MAP disabled. and tests relocation via UNIBUS - UNIBUS-MAP .
MrMORY. jj the program catches an error in a eariy test and is aHowed ;0
continue mnning through the later test the error indications from those later
tests may be invalid. This is due to the stnlcture of the program, which
assumes that all areas tested prior to the current test are functioning properly.
The test is giving YOll even chip level error descriptions.
OPERA TING P~OCEDURES :

set the switch register by < CONTROL P>
CON = xxxxxx WZ
(W = deposit into console switch register)
(R = read and type console switch settings I CON = RJ
(Z = switch console terminal back to program)
(C = continue out from a halt state)
(H = CPU halt)
(I = initialize CPU and Unibus. clear all error ergister)
(N = execute next instnlction in the program and halO
.R EKBFDI
SWITCH SETTINGS

SWI5 =
halt on error
loop on current test
SWI4=
inhibit error printout
SWI3=
inhibit trace trapping
SWI2=
inhibit iterations
SWll=
SWIO= I bell on error
SW09= I loop on error
SW08= I loop on test in SWR <06:00>
inhibit multiple error typeouts
SW07=
selects the subtest in case SW 08 is on
SW06=
selects the subtest in case S W 08 is on
SW05=
SW04=
selects the subtest in case SW 08 is on
selects the subtest in case SW 08 is on
SW03=
SW02=
selects the subtest in case SW 08 is on
SWOl=
selects the subtest in case SW 08 is on
selects the subtest in case SW 08 is on
SWOO=

1-11

11/70

EKBGCO

11170 POWER FAIL TEST
ABSTRACT:
This test is made oj 2 .sections section 1 and section 2. Section 1 serves as a
test oj CPU logic validity during a power lail sequpnce and consists 01 16
subtests. This are simple power lail tests that guarantee that the proper
machine states are entered on power Jail and power lip. This section can be
run on a standard unmodilied 11170 processor. Section 2 is Jor 11174 multi
processor systems. This gets enabled by setting bit 601 the SWR. All standard
11170 CPU diagnostics should lirst be run to insure proper operation under
nonnal stable power condition. The bootstrap has to be in the normal mode.
obtaining a new PC lrom memory location 24 (not "POWEH UP REBOOT").
Test 25 is an overal System power Jail and recovery lest.

OPERA TING PROCEDURES :

.R EKBGCO

It prints :
CEKBG-C 11170 POWER FAIL
[UNIPROCESSOR MODE IS IN EFFECT]
ENTERING SECTION 1
INTERRUPT THE POWER AFTER THE TEST NUMBER APPEARS IN THE DISPLA Y.
IF YOU HAVE A RD CONSOLE. INTERRUPT THE POWEH
AT THE END OF THIS MESSAGE.
Manualy power down. then up again lor each subtest (15 octal times) until
the "END PASS" message is printed.

SWITCH SETTINGS:
SW15 :=
halt on error
SW14=
loop on test
enable system power fail test (sub test 25)
SWOB=
SW07=
disable section 1 (test multiprocessor mode only)

)·12

11/70 MJII

EMJADO

11170 Mjll PARITY MEMORY DIAGNOSTIC
ABSTRACT:
This progrom has the ability to test memory from address 000000 to address
17157171. It does so using unique address techniques. worst case noise patterns
and instruction execution throughout memory. Tllis program may be used to
adjust and margin memory.

11 there are parity errors in the lower area 01 core memory then you
have to clear this first before booting with the following routine
DEPOSIT A 14747 OCTAL INTO LOCATION 157176
LOAD ADDRESS 157116. RUN. WAlT A SECOND. HALT
OPERA TING PROCEDURES :
set tIle desired switches
11 the RD console is installed use < CONTROL P>. xxx xxx WZ
to set the swich register

.R EM/ADO
An asterisk "It" will be printed alter each pass.
"CEM/A DONE" will be printed after each pass.
SWITCH SETTINGS :
SWI5=
halt on error
SWI4=
loop on test
inhibit error typeout
SWI3=
inllibit relocationl use of memory management
SWI2=
SWI1=
inhibit subtest iteration
ring bell on error
SWlO=
display error count in display
SW09=
holt program (unrelocated)
SWOB=
SW07=
SWOG=
use IB bit unibus mopping only
not used
SW05=
SW04=
not used

1-13

EMKABO

11/70-MKll

11170 MKll ECC (also mixed MJ/MK) MEMORY DIAG.
ABSTRACT:
This program has the ability to test memory lrom addre:;:; OOOOOD to address
17757777. It does so using unique address techniques, worst case noise patterns
and instruction execution throughout memory. The intention 01 thi:; program
is to test as comprehensively a:; possible MaS memories used on the 1117D
system. The test is also lor MaS/CORE mixed configurations. In case you have
a intermittend problem and you can have the system lor a longer time run
the test in "KAMIKAZE" mode, this cause:; all patterns to be run but takes
very long lor one pass. Be car/ull with setting bit D in the SWR, in the maindec
listing is the note: "FOR FIELD SERVICE THIS SWITCH SHOULD ALWAYS BE
OFF". My comment: lor one or two passes you call set this switch lor a quick
verify but il you leave it on lor a longer time (4·24h) it will report errors or
cra:;h even with a good memory. This test has a special maintenance mode
(ljeld service mode) to provide speciJic lunctional capabilitie:;.
Put a OD04DO into SWR to stop the test «CONTROL P> 000400WZ)
Use < CONTROL T> to see whats happening
Use < CONTROL F> to enter field service mode
FS mode D
exit held service mode
FS mode 1
type out mem CSR register I 2 =- load CSR register
FS mode 3
examine memolY I 4 == write memory loco with xxx
FS mode 5
select ban.k lesl'
FS mode 10= type error summary
FS mode 13= enter kamika2e mode / 14- exit kamikaze mode
FS mode 15= turn cache oli / 16" tum cache on

FS mode 99= type "Jield service mode" Jwlp loxt
OPERA TING PROCEDURES :
R £'MKABD
it prints a memory map
SWITCH SETTINGS
SWI5=halt on error
SWJ4=
loop on test
inllibit error typeout
SW13=
inhibit relocation
SWJ2=
SWll;.o
inhibit subtest iteration
ring bell on error
SWlO=loop on error
SWD9=
halt program (unrelocoled)
SWOB=SW07~
detailed error reporls
SW06= J print configuration MAP
SW05= 1 limit max er"mr'S per bOllk
SW04"-' J FAT terminal IlJ2 color better)
test mode (ban],s iorwan:l/rov, patterns ior./rev)
SW03=
SW02=
fe:;t mode
SW01=
test mode
SWOO=
detect single b,t errOI"S

1-14

EQKCEI

11/70

11170 INSTRUCTION / I/O EXERCISER
ABSTRACT:
This is a overall test 01 the 11170 CPU. Memory Management in User and
Kernel mode and all 01 the memory. It executes each instruction in all address
modes and includes tests lor traps. intern/pts. the Unibus and the massbus.
II not deselected. the program relocates the test codes throughout memory.
Also. if selected. the program will relocate using available disks. RPt13. RKt15.
RP04. RS03104. Precautions must be taken to ensure the PROTECTION OF USER
DISKS.

Writers comment: this is one ot the 2. best and most importend 11170 test. the
other is EMKABO memory test.
OPERA TING PROCEDURES
.R EQKCEI

It will print a help text.
You can set the optional switch register
(w ith RD console < CONTROL P> xxxxxx WZ)
Type a character to start the test.
The test will print atter a subpass:
ITHE QUICK BROWN FOX JUMPED OVER THE LAZY DOGS BACK 0123456789
Execution time depends on the memory size.
CONTROL SWITCH SETTINGS:
set tIle SWR as the help text has typed.

1-15

11/70 RH70

ERHAEI

11170 RH70 CONTROLLER TEST
ABSTRACT;

This progrom tests the RH70 in the PDP 11170 subsystem. It uses any working
RH70 peripheral connected to the RH70 under test. It can test up to four RH70
connected to the subsystem. Altllough the pecipherol connected is used, the
peripheral is not tested by this program. The drive on the RH70 must have a
scrotch pack installed. A tape drive must have a scrotch tape mounted.
OPERA TlNG PROCEDURES :

.R ERHAEI
Set switch register before starting.
The test prints :

CERHAEO RH70 CTRLR DIAG
ON RH NO 1 BASE 176700 FOUND RM03 SlNGLE.' PORT
AT UNIT NUMBER 0 VECTOR 000254

TESTING RH NO 1 USING BASE 176700 RM SINGLE.' PORT
AT UNIT NUMBER 0 VECTOR 000254
SWITCH SETTINGS :

SWI5=
SW14=
SW13=
SW12=
SWll =
SWlO=
SW09=
SWOB=
. SW07=
SW06=
SW05=
SW04=
SW03=
SW02=

halt on error
loop on current test
inhibit all error typeout:;
not used
inhibit iterotions
ring bell on error
loop on error
loop on subtest specified in S W < 07:00 >
selects subtest
selects subtest
selects subtest
selects subte:;t
selects subtest
selects subtest

11/34 FPP

FFPAAI
11 /34 FLOATING POINT TEST

ABSTRACT:
This is the Floating point processor diagnostic of the 11/34 FPll·A (M8267). To
test the entire FPll·A. nm port 1.2 and 3. Run the tests in sequence (/irst port
1 then 2 and 3). Eacll otller pass will exercise the T·BIT trapping starting with
pass 3 then 5.7.9... unless SW 12 is on. This diagnostic tests the following
instructions: LDFPS. STFPS. crcc. SETF. SETD. SEn. SErLo STST. LDF. LDD.
STD. ADDF. ADDD. SUBF. SUBD.
OPERA TING PROCEDURES :
.R FFPAAI

Set switch register before starting.
If there isn't any SWR it will print:

SWR

000000 NEW

SWITCH SETTINGS :
holt on error
SW15=
SW14=
loop on current test
inhibit all error typeouts
SW13=
inhibit T·bit trapping
SW12=
SWll =
inhibit iterations
SWIO=
ring bell on error
SW09 =
loop on error
SWOB=loop on subtest specilied in SW <06:00>
SW07= I print error summary
SW06 = I selects subtest
SW05 = I selects subtest
SW04 = I selects subtest
SW03 = 1 selects subtest

1-17

11/34 FPP

FFPBAO
11/34 FLOATING POINT TEST 2

ABSTRACT:
This is the Floating point processor diagnostic of the 11/34. the FPll-A (MB267).
To test the entire FP11-A, run part 1.2 and 3. Run the tests in sequence (Jjrst
part 1 then 2 and 3). This diagnostic tests the following instructions: ADDF.
ADDD. SUBD. CMPD. CMPF, DIVD, DIVF, MULD, MULE'. MODD. MODF. Some
long floating-point instructions can be interrupted (by Unibus-Interrupt) and
started again (as jJ that instruction had never been started). This Junction can
not be tested in the field.

OPERA TING PROCEDURES
.R FFPBAO

Set switch register before starting.
If there isn't any SWR it will print
SWR

= 00000 NEW =

SWITCH SETTINGS :
SWl5 ==
halt on error
SW14=
loop on current test
SW13=
inhibit 011 error typeouts
SW12=
inhibit T-bit trapping
SW11 =
inhibit iterations
SWlO=
ring bell on error
SW09=
loop on error
SWOB=
loop on subtest specified in SW <06:00>
SW07= 1 print error summary
SW06= 1 :>elects :>llbte:>t
SW05 = 1 selects subte:>t
SW04 = 1 selects subtest
SW03= 1 selects subte:>t

1-18

FFPCBO

11/34 FPP
11 /34 FLOATING POINT TEST 3
ABSTRACT:

This is the Floating point processor diagnostic of the 11134, the FP11-A (M8261).
To test the entire FP11-A, run part 1,2 and 3. Run the tests in sequence (/irst
part 1 then 2 and 3). Part 3 tests a lot of diHerent floating point instructions,
some of them with all possible source and destination modes. the results of
the hardware iioating point module is compared against the corree; results
written into the diagnostic. Some long floating point instructions can be
interrupted (by Unibus-InterruptJand started again (as if it that instruction
had never been started). This function can not be tested in the field.
OPERA TING PROCEDURES

.R FFPCBO
Set switch register before starting.
II there isn't any it will print
SWR

= 000000 NEW

SWITCH SETTINGS :

halt on error
SW15=
loop on current test
SW14=
SW13=
inhibit a~l error typeouts
inhibit T-bit trapping
SW12=
inhibit iterations
SWll=
ring bell on error
SWIO=
SW09=
loop on error
loop on subtest specified in SW <06:00>
SWOB=
SW01= 1 print error summary
SW06= 1 selects subtest
selects subtest
SW05=
SW04=
selects subtest

1-19

11/34 CPU

FKAACO

11/34 BASIC CPU TEST
ABSTRACT:
This test checks all of the processor logic and microcode for all basic 11134
instructions except the TRAP's and memory management instructions. In
particular it tests:
-all branches on the condition codes
-intenal data path with different data patterns
-all scratch pad registers {GPR's}
-the PSW, write into and read it back
-all possible address modes

To test the full 11134 CPU, nm after:
FKABDO trap test
fKACAD EIS test
FKTGCO Memory management test I
FKTHBO Memory management test 2
OPERA TING PROCEDURES

.R FKAACO
The diagnostic will print a end oj pass message
after a sucessiull run.
The diagnostic responds to the detection oj all errors by
storing certain information in memory and halting the processor.
SWITCH SETTINGS :
No switch settings available

1·20

FKABDO

11/34 CPU
11/34 CPU TRAP TEST

ABSTRACT:
This progmm checks that on all tmp operations register 6 is decremented the
correct amount. that the correct PC is saved on the stack. that the old condition
codes and priority are placed on the stack and tltat the new status and
condition codes are correct. Both the TRAP and EMT tmp instructions are
tested to see that aii combinations wiH trap. Checked aiso is titat ail reserved
instructions will trap. Verification 01 the TRAP instruction 000003 which is used
. for soltware debug routines like ODT DDT is done. Also tIle tmce bit is tested.
Stack overflow. the RTf and RTT instructions are checked.
OPERA TING PROCEDURES

.R FKABDO
the test will print the title
"CFKABDO 11134 TRAPS TST"
Alter one pass it prints
"CFKABDO 11134 TRAP TST DONE"
11 an error is detected. there will be a program halt. In this case register I;
(the stackpointerJ should be examined to determine its contens. Memory as
specified by R6 contains the PC + 2 01 the failing instruction which caused the
laulty trap or interrupt.
SWITCH SETTINGS :
no switch settings

1-21

11/34 EIS

FKACAO

11/34 EIS - EXTENDED INSTRUCTION SET TEST
ABSTRACT:
This diagnostic tests the ASH. ASHC. MUL and DIV instructions. This
instructions are integroted into the basic CPU and is not an option lor the
11 J34.

OPERA TING PROCEDURES :
.R FKACAO

The test will print only :
"END PASS"

SWITCH SETTINGS
SW 15 = 1 halt on error
SW14= 1 not used
SW13=
inhibit error typeouts
use memory loc 176 if no SWR is available.

1-22

11/34 CACHE

FKKABO

1l/34 CACHE DIAGNOSTIC
ABSTRACT:
This is the 11134 cache diagnostic (M8268}. It uses the line clock (50, 60 Hz} lor
time messurement (memory Ioc 176 = 000101" 60 Hz and 001 lor 50 Hz}. 124KW
of memory is needed for complete checkout 01 the TAG section in the cache.
For the DMA test you need a UNIBUS exerciser box or board. It tests:
-that all 4 cache control registers can be written and read,
-all hit bits to be set alter a hit
-the datapath and RAM chips with a data pattern (rotateing a I in O's}
-the cache Ilush leature
-the cache parity error logic
-that the 110 page is not cached
-the address path and TAG lield with patterns
-the cache bypass mode
-that all DMA write invalidates cache (need UNIBUS exed
-and so on ....... .
OPERA TING PROCEDURES

.R FKKABO
The program prints its name and expected run time and enters
the command mode by prompting: "CACHE = >"
Valid commands are:

RUN
starts the test
<CONTROL C> stops the test and returns to command mode
LOT
CLOT
LOE
CLOE
HOE
CHOE
IER
CIER
I.ST xxx
CLST
Example

loop on test in error
cancel LOT
loop on error
cancel LOE
halt on error
cancel HOE
inhibit error print out
cancellER
loop on selected test, xxx
cancel LST

test number

LST 121 will execute all tests belore 121 and will loop on
this test alter.

123

FKTGCO

11/34

11/34 INSTRUCTION / I/O EXERCISER
ABSTRACT:
This is a overoll test oj the 11134 CPU. Memory Management in User and
Kernel mode and up to 124K words of memory. It executes each instruction
in all address modes and includes tests for Traps. interrupts and Unibus. It
is using peripherols like a RKll·RKD5 and TCll. writes data to the entire disk
and verifies it by a write check.
OPERA TING PROCEDURES

L FKTGCD
set the CSR in loc 174 and SWR in 176 and start test at 2DD or
.R FKTGCD Jor a deJault run.
CONTROL SWITCH SETTINGS:
set the desired memory management option .switc11es ill loc 174
SWD5 = I inhibit variable memory expansion
SWD2= 1 inhibit test the 4K bank as 32K virTual
SWDI = 1 inhibit use 01 USER MODE
SWDD = 1 disable MEMORY MANAGEMENT
SWITCH SETTINGS:
halt on error
SWI5=
loop on current test
SWI4=
inhibit all error typeout
SWI3=
SWI2=
inhibit tmce trapping
inhibit iterotions
SWll=
inhibit processor test
SWlD=

This switches are only read at start of the test
SWD7= 1 lise line printer
SWD6=
test TCll DECTAPE
SWD5 =
test RF 11 DISK
SWD4 =
test LINE CLOCK
SWD3 =
test RKll disk
SWDD=
inhibit l'TY output

1-24

11/34 MEM.MANAG.

FKTHBO

11/34 MEMORY MANAGEMENT TEST
ABSTRACT:
This progl'Om was designed using a "BOTTOM UP" approach starting with the
smallest segment 01 MI.'MORY MANAGI.'MENT logic and building up to cover
all the logic. The program begins by testing some 01 tIle internal CPU data
and address path and address detection logic. then works outward through
ihe MEM. MANAGEr"fENT l'egisien..
OPERA TING PROCEDURES :

.R FKTHBO
The test will print:
CFKTHBO 11134 MEMORY MGM1' DIAG.
SWR

= 000000 NEW

SWITCH SETTINGS :
SWI5 -=
halt on error
SW14= I loop on current test
SW 13 = 1 inhibit all error typeouts
SWI2= 1 inhibit trace trapping
SWll = 1 inhibit iterations
SWlO= I ring bell on error
SW09= I loop on error
SWOB=
loop on test in SWR <07:00>
SW07=
use < CONTROL G> to change SWR in loc 176

1-25

ADDRESS/VECTOR

FLOAT

UNIBUS/Q-BUS ADDRESS AND VECTOR ASSIGNMENTS
ABSTRACT;
This program helps you to assign addresses and vectors to options on the
Q·BUS or UNIBUS. It prints a help text, tllen you have to enter the option.s
you like to connect and coniigure on the bus. The pragIUm will print you
then the address and vector lor each inter/ace.
OPERA TING PROCEDURES :

.R FLOAT
the test will prints :
CZFLA FLOAT UTILITY PROG . VERSION: CO
CONTROL C TO RESTART PROGRAM
CONTROL Z TO PRINT SELECTED LIST
CONTROL S TO STOP PRINTING
CONTROL Q TO CONTINUE PRINTING
CONTROL A TO BACK UP DEVICE LIST
TERMINAL TYPES:
A = LA36 NO FlU
L = LAl2D 100 FlLL CHARACTER
V = VT52 OR VT 100 50 f'ILL CHARACTER
ENTER TERMINAL TYPE.(A,L, VJ? L
POSSIBLE OPTIONS ARE
FA·FLOATING ADDRESSL'S, WI,DH,DQ,ETC.)
VA·FLOATING ADDRE'SSES AND VECTORS.
HE·HELP
EX-EXIT
ENTER OPTION:

i26

GKAAAO

11/04
11/04 BASIC CPU TEST
ABSTRACT:

This test checks all 01 the processor logic and microcode lor all basic 11104
instructions except the TRAP's and memOlY management instructions. In
particular it tests;
-all branches on the condition codes
-internai data path wiih diHereni data patterns
-all scratch pod registers (GPR'sJ
-the PSW, write into and read it back
-all possible address modes
-all instructions specified above
OPERA TING PROCEDURES

.R GKAAAO
tile test will prints :
"END OF DGKAA"
TI)e diagnostic responds to the detection 01 all errors by
storing certain information in memory and halting the processor.
SWITCH SETTINGS :

No switch settings available

1-27

JKDHBO

11/24
KEfll-B CIS DIAGNOSTIC
ABSTRACT:

This program veriJies the Kf.Tll-BA (CIS commercial instruction set) option
with both memory management enabled and disabled. It allows the user to
check out any combination 01 CIS chips. In virtually all cases, lault isolation
is to the CIS chip level. The CIS option consists 01 six MOS-LSI control chips
contained in three 40~pin hybrid carriers. All CIS instructjons are chip
partitioned, i. e. all the code lor a particular instruction is contained on a
particular control c1lip. TJle exception is that all CIS instructions must pass
throug the lint CIS chip (control chip DC303-004) belore reaching their
destination chip. To run this test the lirst CIS chip (DC303-004) must be installed_
I have never seen the 3 40-pin llybrid chips separat, rather I have
seen all 6 chips on one big ceramic hybrid.
OPERA TING PROCEDURES

.R ]KDHBO
The test print:
C]KDHBO KEFll B CIS DIAGNOSTIC
SWR = 000000 NEW
SWITCH SETTINGS :

SWI5=
SWI4=
SWIJ =
SWI2=
SWll=
SWlO=
SW09=
SWOB=
SW07 =
SW06 =
SW05 =
SW04 =
SW03=
SW02 =
SWOl =
SWOO=

halt on error
scope loop
inhibit error typeout
not used
inhibit subtest iteration
not used
not used
not used
Mem. Management always disabled
Mem. Management always disabled
test CIS control chip 9 (DC303-009)
test CIS control chip B (DC303-00B)
test CIS control chip 7 (DC303-007)
test CIS control chip 6 (DC303-006)
test CIS control chip 5 (DC303-005)
test CIS control chip 4 (DC303·004)
jJ SW < 05:00> are all zero (delault mode) then the diagnostic will
test all six CIS chips.

1-37

GKABCO

11/04
11/04 CPU TRAP TEST

ABSTRACT:
This program checks that on all trap operations register 6 is decremented the
correct amount. that the correct PC is saved on tile stack. that the old condition
codes and priority are placed on the stack and tllOt the new status and
condition codes are correct. Both the TRAP and EMT trap instructions are
tested to see that all combinations will trap. Checked also is that all reserved
instructions will trap. Veri/kation oJ the TRAP instruction 000003 which is used
Jor soJtware debug routines like ODT DDT is done. Also the trace bit is tested.
Stack overflow. the RTI and RTT instructions are checked.
OPERA TING PROCEDURES

R GKABCO

the test will print: "END OF DGKAB"
II an error is detected. there will be a program J101t. In this case register 6
(the stackpointerJ should be examined to determine its contens. Memory as
specilied by R6 contains the PC + 2 oJ tIle Jailing instruction which caused the
Jaulty trap or interrupt.
SWITCH SETTINGS :
no switch settings

In case you run this test witllOut a DLlI . Console, YOt! can set the bit 0
in memory location 322 to a 1. This· makes the test nlflning without a TTY
console, but disables testing the WAlf instruction and tlle intelTupt operation.

1·28

11/23 FPP

JFPAAI

11/23 FPP (M8188) FLOATING POINT TEST
ABSTRACT:
TIJis is the Floating point processor diagnostic FPFll and consists 01 two
programs designed to detect and report logic laults in tlJe LSI 11123 FPFll
/looting point processor module (MBIBB) .

. R ]FPAAI
The test prints:
C]FPAA FPFll DIAGNOSTIC. PART 1
SWR = 000000 NEW
SWITCH SETTINGS :
halt on error
SWI5=
SW13.=.
loop on current test
SW12....:.
inhibit all error typeouts
print test numbers
SWlJ=
inlJibit iterations
SWIO=
ring bell on error
SW09=
loop on error
SWOB=
SW07=
loop on subtest specified in S W < 06:00>
reserved lor logic analyzer
SW06=
selects subtest
SW05=
SW04=
selects subtest
selects subtest
SW03=

use < CONTROL G> to modify tlJe SWR at loc 176

1-29

11/23 FPP

JFPBAO

11/23 FPP (M8I88) FLOATING POINT TEST 2

ABSTRACT:

This is the Floating po in t processor diagnostic FPFl J and consists oj two
programs designed to detect and report logic Jaults in the LSI 11123 FPF 11
iloating point processor module (MBIBBJ.
OPERA TING PROCEDURES :

.R ]FPBAO
The test prints:
C]FPBA FPFll DIAGNOSTIC, PART

SWR

= 000000 NEW

SWITCH SETTINGS :

SW15=
SW13=
SW12=
SWll=
SWlO=
SW09=
SWOB=

SW01=
SW06=
SW05=
SW04=
SW03=

holt on error
1 loop on current test
I inhibit all error typeout
1 print test numbers

1 inhibit iterations
ring bell on error
loop on error
loop on subtest speciiied Jll S W < 06:00 >
reserved lor logic analy~er
selects subtest
selects subtest
selects subtest
use < CONTROL G> to modify tIle SWR at lac 116

1-30

JKDADI

11/23/24 MMU

11/23/24 MEMORY MANAGEMENT TEST
ABSTRACT:
This program was designed using a "BOTTOM UP" approach starting with the
smallest segment 01 MEMORY MANAGEMENT logic and building up to cover
all the logic. The program begins by testing some 01 the internal CPU data
and address path and address detection logic. then works outwards through
the MEM. MANAGEMENT registers. Then i8-bit and 22-bit mode reiocation is
tested.
OPERA TING PROCEDURES :
.R JKDADI

The test will print:
CJKDADO KTFll-AA MMU DIAG.

SWR

= 000000 NEW

SWITCH SETTINGS :
SW15 =
halt on error
SW14= 1 loop on current test
SW13= 1 inhibit all error typeouts
SW12= 1 inhibit trace trapping
SWll= 1 inhibit iterations
ring bell on error
SWlO=
SW09= 'I loop on error
SWOB=
loop on test in SWR < 07:00>
SW07=

1-31

11/23/24 CPU

JKDBDO

11/23/24 BASIC CPU TEST
ABSTRACT:
This test checks the DCFlI-AA processor logic and microcode. It consists 01
three parts: basic CPU instruction tests. TRAP tests and EIS instructions tests.
In the lirst and second part. the program will halt on error. in part three.
the EIS tests. when a error is detected. the error PC and test number will be
typed and the program will continue execution.
CPU test: checks out the basic PDPll instructions in every addressing
mode with various data patterns.
TRAP test: tests all trap instructions. trap overflow conditions R6 (stack
pointer). interrupts. the reset and wait instruction_
EIS test: tests ASH. ASHC, MUL and DIV instructions.
OPERATING PROCEDURES

.R ]KDBDO
This is the normal start at 200
the program will print
C]KDBDO DCFlI AA CPU DIAGNOSTIC

END PASS
I
END PASS ,15
The initial con tens oj loc J 76 is 000000. the L1ser may
halt the program (normaly by the "BREAK" key on the console)
open location 176 and cllOnge it. tlwn r'Cstart the diagnostic
at 200.
SWITCH SETTINGS
SW 15 =
halt on error (part 3 only)
SW14=
inhibit error typeout (part 3 only)
SWOI =
CIS chip set present
.SWOO=
skip trap test

1-32

JKDCBO

11/23/24

11/23/24 KEFlt FLOATING POINT CHIP TEST 1
ABSTRACT:

The two programs IKDCBO & IKDDBO are desined to detect and report logic
laults in the F·ll MMU and FPP chip set (because part 01 the FP microcode
is in the MMU chipJ. The program prints the total number 01 passes completed.
The test assumes that the basic CPU is laultless. to make sure run IKDBDO
CPU test.

OPERA TING PROCEDURES :

.R IKDCBO
The program prints its name. and
SWR

= 000000 NEW

SWITCH SETTINGS:

SWl5 = 1 halt on error
SW14 = 1 loop on current test
SWI3= 1 inhibit all error type outs
SW12 = 1 inhibit T·bit trapping
SWll = 1 inhibit iterations
SWlO= 1 ring bell on error
SW09= 1 loop on error
SWOB = I loop on subtest speci/ied in S W < 06:00 >
SW06= I selects subtest
SW05= I selects subtest
SW04 = 1 selects subtest
SW03 = I selects subtest
SW02 = I selects subtest

1-33

11/23/24

JKDDBO

11123/24 KEFll FLOATING POINT CHIP TEST 2
ABSTRACT:
The two programs ]KDCBO & ]KDDBO are desined to detect and report logic
laults in the F·II MMU and FPP c11ip set (because part 01 the FP microcode
is in the MMU chip). The program prints the total number 01 passes completed.
The test assumes that the basic CPU is laultless, to make sure run ]KDBDO
CPU test.

OPERA TING PROCEDURES

.R ]KDDBO
The program prints its name. and
SWR = 000000 NEW

SWITCH SETTINGS :
SW15 =
halt on error
SW14=
loop on current test
SWI3=
inhibit all error type outs
SW12=
inhibit T·bit trapping
SWII =
inhibit iterations
ring bell on error
SWlO=
SW09=
loop on error
loop on subtest specilied in SW <06:00>
SWOB=
selects subtest
SWOG=
selects subtest
SW05=
selects subtes'
SW04=
selects subtest
SW03=
selects subtest
SW02=

1·34

JKDEBO

11/24

11/24 CPU-BOARD M7133 GO-NOGO TEST
ABSTRACT:

This program is a GO·NOGO test lor tlle PDP 11124 CPU board. It tests the
CPU including EIS. the MMU. tlle FPP. the LTC and both SLU's. It does not
contain the capabilities 01 scope looping. error recovery or printing 01 error
in/ormation. Error halts do indicate wllich device lailed to allow the technician
to determine which diagnostic to use to fix tile board or who; field replaceable
unit may lix the board. The second SLU must have TURN·AROUND connector
installed.
OPERA TING PROCEDURES

.R }KDEBO
II you want to change SWITCHES .
halt CPU. change loc 176. restart like @20OG.
The progrom just halts in case oj an error!
First pass runtime (worst case) 45 seconds
SWITCH SETTINGS :

SWl5 =
not used
SW07 = I not used
SWOG= 1 not used
SW05 = I program reserved· progrom will set if CIS chip present
SW04 = 1 inhibit testing oj SLU2
SW03 == I inhibit testing oj LTC
SW02== 1 inhibit testing oj SLUl
inhibit testing FPP instruction set
SWOl=
inhibit testing oj memory management unit
SWOO=

1-35

JKDFBO

11/24

11/24 SLU & LTC (M7133) DIAGNOSTIC
ABSTRACT:
This program tests both serial line units (SLU's) and the line time clock (LTC)
on the CPU (M7133) module. Its main purpose is to provide scope looping lor
repair personnel. Error type-outs identily a lunction being done and lailed
and to what logical portion 01 the board it lailed on. The test needs a
TURN-AROUND connector installed on SLU2.
OPERA TING PROCEDURES :
.R ]KDFBO

This will start the test at 200 (normal start)
Start address 204 will execute the ECHO test
An " ... is printed at the beginning 01 the test. The ECHO
test reads a character Irom the terminal ,writes that
character to the temlinal and reports any error.
Start address 210 is the terminal output test. Depressing
any character at the terminal halts the test.

SWR = 000000 NEW
SWITCH SETTINGS:
SW15 =
halt on error
scope loop
SW14=
SWI3=
inhibit error typeout
SW12=
SWll= 1 not used
SW1O= 1 inhibit error l1ags test
SW09=
loop on error
SWOB=
not used
SW07=
disable SLU2 data test
SWOG=
inhibit LTC tests
SW05 =
inhibit all SLU tests (both SLUS)
SW04 =
inhibit SLUl testing
SW03 = 1 inhibit SLU2 te::;ting

1·36

JKDHBO

11/24
KEfll-B CIS DIAGNOSTIC
ABSTRACT:

Tllis program verilies tIle KEf'll-BA (CIS commercial instruction set) option
with both memory management enabled and disabled. It allows the user to
check out any combination 01 CIS chips. In virtually all cases, lault isolation
is to the CIS chip level. The CIS option consists 01 six MOS-LSI control chips
cOIi;oiiled iil three 40-pin hybrid carriers. .411 CIS instructions are chip
partitioned, i. e. all the code lor a particular instruction is contained on a
particular control c11ip. TIle exception is that all CIS instructions must pass
throug the first CIS chip (control chip DC303-004) before reaching their
destination chip. To run this test the first CIS chip (DC303-004) must be installed.
I have never seen the 3 40-pin llybrid chips separat, rather 1 have
seen all 6 chips on one big ceramic hybrid.
OPERATING PROCEDURES

.R ]KDHBO
The test print :
C]KDHBO KEf'll B CIS DIAGNOSTIC
SWR = 000000 NEW

SWITCH SETTINGS :

SW15 = 1 halt on error
SW14= I scope loop
SW 13 = 1 inhibit error typeout
SWI2= I not used
inhibit subtest iteration
SWll=
SWlO=
not used
SW09=
not used
not used
SW08=
SW07 =
Mem. Management always disabled
SW06 =
Mem. Management always disabled
SW05 =
test CIS control chip 9 (DC303-009)
SW04 =
test CIS control chip 8 (DC303-008)
SW03=
test CIS control chip 7 (DC303-007)
SW02 =
test CIS con trol chip 6 (DC303-006)
SWOI =
test CIS control chip 5 (DC303-005)
SWOO= I test CIS control chip 4 (DC303-004)
if SW < 05:00> are all zero (delault mode) then the diagnostic will
test all six CIS chips.

1-37

JKDIBO

11/23 +

KDFlI-B SLU & LTC (M8189) DIAGNOSTIC
ABSTRACT;
This program tests both :;erial line unit:; (SLU's) and the line time clock (LTC)
on the CPU (M8189) module. Its main purpose i:; to provide scope looping lor
repair personnel. Error type-outs identity a lunction being done and lailed
and to what logical portion 01 the board it failed on. The test need:; a
TURN-AROUND connector installed on SLU2.
OPERATING PROCEDURES;

.R ]KDIBo
This will start tIle te:;t at 200 (normal :;tart)
Start address 204 will execute the ECHO te:;t
An "*,, is printed at the beginning 01 the te:;t. rIle f.'CIlO te:;t
reads a character from the terminal ,write:; that character to
the terminal and reports any error.
Start address 210 is the terminal output te:;t Depre:;:;ing
any character at the terminal halts the te:;t

SWR

= 000000 NEW

SWITCH SETTINGS :
SW15=
halt on elTor
SW14 =
scope loop
SW 13 =
inhibit error typeout
SW12=
not used
SWll=
inhibit error 11ags te:;t
SWlO=
loop on error
SW09=
not used
SWD8=
disable SIU2 data te:;t
SWD7=
inhibit LTC tests
SW06=
inhibit all SLU te:;ts (both SLUS)
SWD5=
inhibit SLUI te:;ting
SWD4=
inhibit SLU2 te:;ting
SW03=

.-3U

11/23 +

.JKDJBO

KDFlI-B CPU-BOARD M8189 GO-NOGO TEST
ABSTRACT:
This program is a go-nogo test for the MICRO PDPll CPU board. It tests the
CPU including EIS. the MMU. the FPP. tlle LTC and both SLU's. It does not
contain tIle capabilities of scope looping. error recovery or printing oJ error
information. Error halts do indicate wllich device Jailed to allow the technician
to determine which diagnostic to use to fix the board or what field replaceable
unit may fix tlle board. The second SLU must have tum around connector
installed. This program is set to do minimum testing unless action is taken
via the SoJtware switcll register (memory loco 176). Bits 1. 6. 7-10 have been
set up such that the program will bypass certain tests unless the switch register
bit is set.
OPERATING PROCEDURES

.R JKDJBO
IJ you want to change SWITCHES halt CPU,(Break if enabled}

change loc 176, restart like ,u)200G.
START TESTING
error reporting looks like
"FAILED DURING CPU TESTS"
SWITCH SETTINGS :
not used
SW15=
not used
SWll=
test E102 switches
SWlO=
test parity error detection
SW09=
use the Q22-BUSEXER
SWOB=
test the upper 5 address bits Jor time out
SW07=
SW06=
test using a Q-BUS exerciser
SW05= 1 program reserved - progrom will set if CIS chip present
SW04= 1 inhibit testing oJ SLU2
SW03= 1 inhibit testing oj LTC
inhibit testing oj SLUI
SW02=
SWOI=
test FPP instruction set
SWOO=
inhibit testing oj memory management unit

1-39

JKL5BO

MICRO PDP!!

KDFlI-BE CPU-BOARD M8189 GO-NOGO TEST
ABSTRACT:
This program is a go-nogo test lor the MICRO PDPll CPU board. It tests the
CPU including EIS. the MMU, the FPP. the LTC and both SLU's. It does not
contain the capabilities 01 scope looping. error recovery or pl"inting 01 error
in/ormation. Error halts do indicate Wllicll device lailed to allow the technician
to determine which diagnostic to use to lix the board or wllOt lield replaceable
unit may fix the board. The second SLU must have turn around connector
installed. This program is set to do minimum testing unless action is taken
via the Software switch register (memory loc. 176). Bits I. 6. 7-10 have been
set up such that the program will bypass certain tests unless the switch register
bit is set.
OPERA TlNG PROCEDURES
.R ]KL5BO

Ii you want to cllOJlge SWITCHES·
halt CPU. (Break iJ enabled:
change loc 176, r-estart like ·u!200G

START TESTING
ernH- reporting looks like
"FAILED DURING CPU Tf.'Sl'S"
SWITCH SETTINGS:
SWI5=
not used
not used
SWll=
test E102 switches
SWIO=
test parity error detection
SW09=
use the Q22-BUSl.'XER
SWOB=
SW07=
test the upper 5 address bits for time out
test using a Q-BUS exerciser
SWOG=
SW05= 1 program reserved - proglUm will set if CIS chip present
SW04= I inhibit testing 01 Sl.U2
SW03=
inhibit testing 01 LTC
inhibit testing 01 SLU 1
SW02=
test FPP instruction set
SWOl ""
inllibit testing 01 memor), mOllagoJlwnt unit
SWOO=

}-40

11/44

KFPADO
11/44 FLOATING POINT (M7093) TEST 1

ABSTRACT:

This is tlie Floating poin t processor diagnostic 01 the 11144. it is almost identical
to the 11134 FP11·A test. To test the entire FP11·F. run part 1.2 and 3. Run the
tests in sequence (Iirst part 1 then 2 and 3). Each other pass will exercise the
T·BIT trapping starting with pass 3 then 5. 7, 9 ... unless SW 12 is 1. This
diagnostic tests the lollo!A·ing instructions: LDPPS, STFPg, epee. SErF. SETD,
SETI. SETL. STST. LDF. LDD. STD. ADDF. ADDD. SUBF. SUBD.
OPERA TING PROCEDURES :

.R KFPADO
Set switch register by <CONTROL P>
> > >D SW xxxxxx< CR>
»>C<CR> . back to program mode
SWITCH SETTINGS :

SW15=
SWI4=
SWI3=
SW12=
SW11=
SWlO=
SW09=
SWOB=
SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SWOI=
SWOO=

holt on error
1 loop on current test
I inhibit all error type outs
1 inhibit T·bit trapping
1 inhibit iterations
1 ring bell on error
I loop on error
I loop on subtest specilied in SW <06:00>
I print error summary
J selects subtest
J selects subtest
J selects subtest
J selects subtest
1 selects subtest
I selects subtest
I selects subtest

1-41

KFPBCO

11/44

11/44 FLOATING POINT (M7093) TEST 2
ABSTRACT:
This is the Floating poin t processor diagnostic of the 11144. it is almost identical
to the 11134 FPll-A test. To test the entire FPll-F. run part 1.2 and 3. Run the
tests in sequence (iirst part 1 then 2 and 3). This diagnostic tests the following
instructions: ADDF. ADDD. SUBD. CMPD. CMPF. DIVD. DIVF. MULD. MULF.
MODD. MODI'. Some long floating-point instnlctions can be interrupted (by
Unibus-Interrupt) and started again (as if that instruction had never been
started). This function can not be tested in the field
OPERA TING PROCEDURES

.R KFPBCO
Set switch register by <CONTROL P>
> > > D S W xxxxxx < C H >
> > > C < Cl1 > - back to pl'ogram mode
SWITCH SETTINGS:
SW15=
halt on error
SW14=
loop on current test
SW13=
inhibit all error type outs
SW12=
inhibit T-bit tropping
SW I I =
inhibit iterotions
SWIO=
ring bell on en'or
SW09=
loop on error
SWOB=
loop on subtest speciJied in SW <06:00>
SW07= 1 print enur summary
SWD6= 1 selects subtest
SWD5 =
selects subtest
SWD4 =
selects subtest
SWD3 =
selects subtest
SWD2 =
selects subtest
SWDI =
selects sublest
SWOD=
selects subtest

l-42

KFPCDO

11/44

11/44 FLOATING POINT (M7093) TEST 3
ABSTRACT:
This is the Floating point processor diagnostic of the 1I144, it is almost identical
to the 11134 FPll-A test. To test the entire FPll-F, nm part 1,2 and 3. Run the
tests in sequence (/irst part I then 2 and 3). Pari 3 tests a lot 0/ diHerent
floating point instructions, some oj them witl} all possible source and
destination modes. The resuits oi the hardware iioaring point moauie is
compared against the correct results written into the diagnostic. Some long
lloatjng-point instructions can be interrupted (by Unibus-Interrupt) and started
again (as iI that instruction had never been storied). This Junction can not
be tested in the field.
OPERA TING PROCEDURES

.R KFPCDO
Se t sw itc h register by < CONTROL P>
> > > D SW xxxxxx < C R >
»>C<CR> - back to program mode
SWITCH SETTINGS :
SWI5=
halt on error
loop on current test
SWI4=
SWI3=
inhibit all error type outs
SWI2=
inhibit T-bit trapping
inhibit ite rations
SWll=
ring bell on error
SWIO=
loop on en'Or
SW09=
loop on subtest specilied in SW < 06:00>
SWOB=
SW07= I print error summary
SW06= I selects subtesl
selects subtest
SW05=
SW04= I selects subtest
SW03= I selects subtest
SW02= I selects subtest
SWOI= I selects subtest
SWOO= I selects subtest

1-43

11/44

KKAABO

11/44 BASIC CPU TEST
ABSTRACT:
This tests checks all of the processor logic and microcode lor all basic 11144
inst,·uctions except the TRAP's and memory management instructions. In
particular it tests:
-all branches on the condition codes
-intenal data path with different data patterns
-all scratch pad registers (GPR's)
-the PSW, write into and read it back
-all possible address m~des
-all instructions speciiied above.
-the EIS instructions ASH. ASHe. MUL. DIV
OPERATING PROCEDURES

.R KKAABO
the test will print
END OF C!{KAABO 11144 CPUIEIS

The diagnostic responds to the detectIOn 01 all errors by
storing certain information in memol'Y and halting the processor.
SWITCH SETTINGS:

no switch settings

1·44

KKABDI

11/44
11/44 CPU TRAP TEST

ABSTRACT:
This program checks that on all trap operations register 6 is decremented the
correct amount, that the correct PC is saved on the stack, that the old condition
codes and priority are placed on the stade and tllOt the new status and
condition codes are correct. Both the TRAP and EMT trap instructions are
tested to see that all combinations lZ.fill trap. Cl!eclced also is that all reserved
instructions will trap. Verification 01 the TRAP instruction 000003 which is used
lor soltware debug routines Wee ODT DDT is done. Also the trace bit is tested.
Stack overllow, the RTI and RTT instructions are checked.
OPERA TING PROCEDURES

.R KKABDI
the test will print :
END OF CKKABDO 11/44 TRAPS
11 an error is detected, there will be a program halt. In this case register 6
(the stackpointerJ should be examined to determine its contens. Memory as
specilied by R6 contains the PC + 2 01 the Jailing instruction which caused the
faulty trap or in terrupt.
SWITCH SETTINGS :
no switch settings

1-45

KKACCO

11/44
11/44 POWER fAIL TEST

ABSTRACT:
This test is made 01 11 subtests. The 2 milisecond power down and power up
time is checked on each power lail. The sub tests elleck the following:
-01 simple power down/up test in kernel
-02 power lail with branch instmction
-03 power lail with EMT trap
-04 power Jail with odd address
-05 power Jail with time-out in kernel
-06 power Jail with stack overflow
-07 power Jail with reset
-10 power Jail with memory management abort
-11 will use memory management to nm the volatility test
Jor all memory available

It is assumed that CPU, tmps, memory management and Unibus MAP
diagnostic have been run success/ully.
OPERA TING PROCEDURES

.R KKACCO
It prints:
CKKACCO 11/44 POWER FAIL TEST
BOOT ENABLE SWITCH MUST BE OFF
Then it prints the size 01 memory and opemting instnlction.
The subtest number will be printed at the beginning 01 eaell
test. Manualy power down, then up again lor each subtest until
the "END PASS" message is printed.
For MOS memory with no battery-backup use tile Sl'D BY (stand by' mode.
SWITCH SETTINGS:
SW 14 == 1 loop on test
This bit must be set to a I alter en'or halt every lime the tost
is to be repeated.

1·4b

KKFBAO

11 144- > > > TIE
11/44 (M7096) MFM-8085 TEST
ABSTRACT:

The Multi Function Module (MFM) sell test is desined to test hardware
assosiated with the 8085 Front-End CPU, llOndling the concole functions on the
11144. The T test checks the 8085 subsystem (CPU, ROM's and RAM's). This
test does not inter/ere with the state 01 the big CPU and memory. Alter a
successful pass it prints "CONSOLE". In addition. a LED on the MFM module
will be turned on at the beginning 01 "T" and extinguished at the successful
completion 01 "T" test. It tests:
The "T" sequence :
ROM checksum test
RAM data test
RAM address test
TIle "TIE sequence
all "T" basic tests
halt and continue test
PAX data line test
PAX address line test
Console switcJl register test
THIS DIAGNOSTIC IS IN ROM's AND NOT ON DISK OR TAPE
OPERA TING PROCEDURES :

> > >T<CR>
> > >TIE<CR>

this starts the console sell test
this starts the console extensive test

The tests resides in the Console ROM's
"CONSOLE TEST" is a progress message and some letters indicate the
start 01 a new subtest.
C
0-2K ROM test
o
2·4K ROM test
NSO
console RAM data test
LE
testing done
T
data bus test
E
PAX address test
switch register test
S
test complete
T

1-47

11/44

KKKACO

11/44 (M7097) CACHE TEST
ABSTRACT:
The diagnostic is a logic test of the 11144 cache. The maintenance features
olfered by the 11144 cache allows information to be read in key areas 01 the
cache allowing the diagnostic to isolate failures to data paths, and in some
cases Ie·s. At the start of the diagnostic, a small area of write control logic
and the maintenance feature:s are assumed to be working. The cache is
completly turned ofl and not turned on until 90 pel"Cent of the diagnostic is
complete The test is using Mem. Management and Unibus-MAP The following
is tested:
-cache registers, address select logic, AMR register,
-that the 110 page is not cached
-the address path and TAG field with pattern:s
-the cache bypass mode
-that a OMA-write invalidates cache (the Unibus-Exerciser board
is needed to perform OMA ·s)
.... and so on ..... .
OPERA TING PROCEDURES
se t the sw itc h registe r by < CONTHOL P>
> > >0 SW xxxxxx<CR>
> > > C (back to program mode)
.R KKKACO

SWITCH SETTINGS:
SW15=
halt on error
loop on test :specified in SW < 07.00>
SW14=
inhibit error printout
SW13=
inhibit iterations
SW12=
loop on error
SW09=
diag. will verify that invalidation will occure due to
SW08=
a read hit bypass condition. Test assume:s pJJy:sical strap W2 is in.
selects the subtest in case S W 08 i:s Oil
SW07=
SW06=
selects the subtest in case SW 08 JS on
selects the subte:st in case SW 08 i!) 011
SW05=
SW04=
selects the subte!)t in ca:se SW 08 I!) 011
SW03=
selects the stlblest in ca:se SW DB i:s on
SW02=
selects the sllbtest in case SW DB i!) on
SWOI =
selects the subte!)t in case SW 08 I!) on
SWOO=
selects the sllbtest in case SW 08 is on

I 43

KKTABI

11/44

11/44 MEMORY MANAGEMENT TEST 1
ABSTRACT:
This program is the memory management logic test part l,using a "bottom
up" approach starting with tile smallest segment and building up to cover all
01 the logic. Every other pass starting will) Il)e Ihird one (3,5,7.. ) will exercise
T-bit trapping unless inhibitted. The test is able 10 handle power lails, but
only RD to R6 ore saved. It tasts :
-the PSW. all PAR's and PDR's in Kernel mode.
-the Supervisor and User mode in I and D space.
-the MMRO. MMRI. MMR2 and MMR3 registers by using dilJerent data patterns.
-the Mem. Management in maintenance mode,
-18 bit mapping. 22 bit mapping.
-the W-bit (written into page bit)
OPERA TING PROCEDURES :
set the switch register by <CONTROL P>
> > >D SW xxxxxx<CR>
> > >C (back to program mode)

.R KKTABI
< CONTROL C> will cause the program to type the present test and pass
number, requests a new value lor the switc1) register and starts with
sub test I again.
SWITCH SETTINGS:
halt on error
SWI5=
SWI4=
loop on c~rrent test
inhibit error printout
SW13=
inhibit trace trapping
SW12=
SWlO= I bell on error
SW09= 1 loop On error
SW08= I loop on test in SWR <07:00>
SW07=
selects the subtest in case SW 08 is on
SW06=
selects the subtest in case SW 08 is on
SW05=
selects the subtest in case SW 08 is on
SW04=
selects the subtest in case SW 08 is on
SW03=
selects the sllbtest in case SW 08 is on
SW02=
selects the sllbtest in case SW 08 is on
SWOI =
selects tl)e subtest in case SW 08 is on
SWOO=
selects the subtest in case SW 08 is on

1-49

KKTBDO

11/44

11/44 MEMORY MANAGEMENT TEST 2
ABSTRACT:
This program is the memory management logic test part 2, complementing
part 1. It tests the special abort sequences, MfPI, MTPI and CSM instruction.
Run KKTABO beJore this one. Every other pass starting with the third one
(3,5.7) will exercise T-bit trapping unless inhibitted. The test is able to handle
power Jails. It tests :
-the non resident abort sequence,
-the read only abort sequence
-the page 1engh abort sequence
-the abort sequence in super/ user mode
-the instruction/data space abort
-tests the Move From/To Previous Instruction (MfPI, MTPl)
-tests the CSM (call supervisor mode) instructIOn
OPERA TING PROCEDURES :
set the switch register by < CON'f'HOL P>
> > > D S W xxxxxx < C R >
> > > C (back to program mode)

.R KKTBDO
< CONTROL C> will cause tIle program to type the present test and pass
number. requests a new value for tIle switcil register and starts with
sub test I again.
SWITCH SETTINGS :
halt on error
SWI5=
loop on current test
SWI4=
inhibit error printout
SW13=
inl1ibit trace trapping
SW12=
bell on error
SWlO=
loop on error
SW09=
loop on test in SWR <07:00>
SW08=
SW07=
selects the subtest in case SW 08 is on
SW06=
selects the sublest in case SW 08 is on
selects the subtest in case SW 08 is on
SW05=
SW04=
selects the subtest 111 cost! SW 08 IS on
selects the subtest III case SW 08 IS on
SW03=
SW02=
selects the subtest ill case SW 08 is all
selects the subtest In case SW DB IS on
SWOI=
selects the subtest ill case SW 08 IS all
SWOO=

11/44

KKUAEO

11/44 (M7098). 11124 (M7134) UNIBUS MAP TEST
ABSTRACT:
This program assumes the CPU, cache and mem-management to be OK. It
tests that all map registers can be addressed. tests all map registers with
data patterns, addressing main memory thlUugll tIle UNIBUS by relocating to
top l28K and MAP disabled. tests relocation via UNIBUS - UNIBUS-MAP -

MEMORY. tests the LMA register liast mapped address reg.; ana tests the
UNIBUS memory when optionaly selected by SW 05= 1. There may be some
cases wllere a bad cache module can intedere into tllis test and prohibits
close isolation 01 an error. In tllis case you can run with the cache disabled.
Simply load the cadI CSR register (17777746) witl) 001000 tllen S 200 (start 0200).
II CPU is an 11124 program will prompt lor a switch register input.
OPERA TING PROCEDURES :

set the switch register by <CONTROL P>
> > >D SW xxxxxx<CR>
> > > C (back to program mode)
.R KKUAEO
SWITCH SETTINGS

SWI5=
SWI4=
SWI3=
SWI2=
SWll=
SWIO=
SW09=
SW08=
SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SWOI=
SWOO=

halt on error
loop on current test
inhibit error printout
inhibit trace trapping
set when running on 11124 and UNIBUS memory
I belJ on error
I loop on error
loop on test in SWR <05:00>
inhibit multiple error typeouts
select Cache tests
select UNIBUS memory test
1 selects the subtest in case S W 08 is on
I selects the subtest in case SW 08 is on
I selects the subtest in case SW 08 is on
I selects the subtest in case SW 08 is on
selects the subtest in case SW DB is on

1-51

NKXABO

11/21-KXT-II CPU
KXT-ll (M8063/M7676) SBe TEST

ABSTRACT:
The KXTll is a Tll-based single board computer (SBC-ll). It includes a Tll
CPU. up to 12 KW RAM. sockets Jor optional ROM's. two 8 bit serial 110 ports
and one 8 bit parallel 110 port. This program has 147 (octal) tests designed
to verily the integrity oj those components. It tests in the Jollowing sequence:
1. T11 CPU instruction tests
2. TIl CPU traps and interrupt tests
3. local RAM tests
4. local ROM address test
5. serial line unit 1 tests
6. serial line unit 2 tests
7. parallel 110 port tests
The program has the lollowing default parameters:
start address
172000 (power up start)
restart address
172004 (time·out restart)
local ROM address
110000 (lKW macro-ODT lor 11121) or
local ROM address
164000 (2KW macro·ODT Jor 11121+)
local RAM address
160000 (2KW for 11121) or
lo,'al RAM address
100000 (12KW for 11121 +) or
local RAM address
140000 (4KW lor 11121 +)
BEVNT vector
100 PRI6
140 PR17
BHALT vector
serial line unit 1 add.
177560 console terminal
serial line unit 1 vec.
60
serial line unit 2 add.
177540 with loop-back connector
serial line unit 2 vec.
120
parallel port address
116200 with loo-back connector
parallel port out·vec.
130
parallel port in-vec.
134
Q-BUS RAM address
OOODOO 16KW
OPERA TING PROCEDURES :

RUN NKXiWO
SWR

put the loop-back connector H3275 on.

= 000000 NEW

SWITCH SETTINGS :
SWI5= 1 halt on error
SW 13 = 1 inhibit error typeout:>
SWI2= 1 print error :>ummary at END-PASS
SW09= 1 loop on error
use "CONl'ROL G" to enter soJtware SWH In loco 176

1-52

KDJII-B

OEEAAO
11184/83/73 (M8190) [EPROM LOADER

ABSTRACT:
Tile KD111-B lIas two on-board ROM's. One contains the sell-test and the boot
code. The other contains the bose area with hardware selection parameters.
optional bootstraps. optional UFn (user friendly diagn.) system descriptrion
area. and optional forein language text. The purpose of this proglum is to
load the local language into the EEPROM. For eadl language is a particular
progrom.

UK ENGLISH
DUTCH
FRENCH
GERMAN
ITALIAN
SPANISH
SWEDISH
US ENGLISH

OEEAAO
OEEBAO
OEECAO
OEEDAO
OEEEAO
OEEFAO
OEEGBO
OEEHAO

OPERA TING PROCEDURES

RUN OEE???
wait until the program types the prompt (.) again.

1-53

OKDAGO

KDJII-B CPU

11/84/83173 (M8190) CPU/CACHE/MMU/SLU TEST
ABSTRACT:

This diagnostic tests the KDJlI-B CPU board, including the /11 chip set, on
board cache, on board ROM's, including 16 bit and the B bit EEPROM, serial
line unit, and line time clock. Some oj the Junctionality oj the cache is hidden
inside the 111 and the rest oj the Junctions is implemented in two on board
GATE-ARRAYS. The storage capacity oj the cache is 4 k bytes oj RAM, called
data-RAM's.It is a quad height 022 bus module.
OPERA TING PROCEDURES :

RUN OKDAGO
• KDI11-B CPU DIAGNOSTIC· COKDADO *
SWR

= 000000 NEW :;:

SWITCH SETTINGS ;
SW 15 = 1 halt on error
SW14:::;: 1 loop on current test
SWI3= 1 inhibit error typeouts
SW12= 1 EEPROM subtest run switch

SWll = 1 inhibit iterations
SWlO= 1 bell on error
SW09;;:; 1 loop on error
SWOB;;:; 1 loop on test in SWR <05:00>
SW07;;:; 1 do extensive cache data RAM test
SW06= 1 do extensive cache TAG RAM test
SW05;;:; 1 subtest number
SW04;;:; 1 subtast number
SW03 = 1 subtesr number
use "CONTROL G" to enter software SWR in loco 176

1-54

OKDDDO

11/53

KDJlI-D CLUSTER (CPU + MEMORY + .. ) M7554 DIAGNOSTIC
ABSTRACT

This diagnostic tests the 11/53 CPU board including the III chip set, on-board
memory on-board ROM's, serial line unit, line time clock and the bus
arbitrotion. TIle memory is 512 K byte witll parity detection and has a CSR
to determine parity errors. It has also 2 SLU (serial line units) with internal
loop back mode lor diognosik ond hos 0 user selecioble baud raie of 300 io
38400 baud .
. There is a CPU part 01 the test where it tests
CPU instuctions,
Memory Management Unit
f'loating Point instructions
. On board memory tests
memory data patll
memory accessability
memory error register
data shorts and stuck at bits
quick verily data and addressing test
parity detect logic and RAM's
.On board ROM code tests
the 16 bit checksum in the ROM's
.Line time clock tests
LTC bit 7
LKS interrupt priority
.Serial line unit tests
.and so on
OPERA TING PROCEDURES

.R OKDD??
• KD/11-DA CPU DIAGNOSTIC - COKDDCO
SWR = 000000 NEW
SWITCH SETTINGS :

SW15 =
SW14=
SWI3=
SW12=
SWl1=
SWlD=
SW09=
SW08=
SW07=
SW06=

halt on error
loop on current test
inhibit error printouts
enable test tracing
inhibit subtest iterations
ring bell 011 error
loop on error
loop on test specified in SW < 05:00>
inhibit the check parity test
not used

1-55

OKTACO

11/84

11/84 UNIBUS ADAPTER TEST M8191
ABSTRACT:

This diagnostic tests the UNIBUS-ADAPTER tuBA) module MB191. The
lunctionality 01 the module is : Unibus - PMI bus adapter (where PMI is a
laster version ot a Q22-BUS). M9312 compatible boot lacility. and the
Unibus-MAP logic. The module also has a DMA cache store, utilised lor doing
DMA transters trom memory to Unibus devices. The UBA can be programmed
to do diagnostic cycles to verily some 01 the luntionality without requiring
any oj the peripherals to be actually connected to the unibus. There are 54
(decimal) subtests.
OPERATING PROCEDURES :

.R OKTACO
COKTACO KTI11-B DIAGNOSTIC
SWR

= 000000 NEW

SWITCH SETTINGS :
SWI5= 1 halt on error
SWl4 = 1 loop on current test
SWI3= 1 inhibit error printouts

SWI2=
SWll =
SWlO=
SW09=
SWOB=
SW07=
SWOG=
SW05 =
SW04 =

I
1 inhibit subtest iterations
1 ring bell on error
I loop on error
I loop on test specilied in SW <05:00>
1 not used
I not used
1 selects subtest number iI SWOB is on
1 selects subtest number iI SWOB is on

i-56

11/60

QFPABO

11/60 FLOATING POINT TEST 1
ABSTRACT:
This is the Floating point processor diagnostic. lor the "WARM FPP" which is
standard in the 11160 CPU and the "Hal' FPP". tl10t one is an option (4 modules
M7878. M7879. M78BO and M78BlJ. When the progrom is started a message is
printed indicating the presence or absence of tIle optional FPll·E hot /loating
point unit (based upon the "WHAMi·Rf.'G" bit 4;. The pl-ogrom selects and tests
HOT or WARM-FP by setting and dearing bit 12 of the LOG·FLAG-INTERRUPT
reg. (select HOT·FP = 1. select WARM·FP
OJ. Tll;s test supports power fail.
but none 01 the FPll registers are saved. Tllis can !'estllt in a error message
typed after power is'restored. Tllis test assumes CPU. CACHE. and MEMORY
are OK.
.0-

OPERA TING PROCEDURES :

.R QFPABO
The progrom prints its name and starts testing
In case of an error you can see in the first line 01 the errOI- message
weher the error happend in the HOT or WAllM FPll.
SWITCH SETTINGS:
SW15 =
halt on error
SW14=
loop on current test
SWI3=
inhibit all error typeout
SWI2= 1 inhibit "END PASS" typeouts
SWll = J inhibit iterotions
SWlO=
ring bell on error
SW09=
loop on error
SWOB=
loop on test specified in mem loco 01150
SW07=
not used
SWOl =
test only unit (WARM- or HOT FP) specified in SW <00>
SWOl = 0 select alternately HOT·FP then WARM·FP
SWOO= 1 select "WARM FP" only
SWOO= 0 select "HOT FP" only

I-57

QFPBBO

11/60
11 /60 FLOATING POINT TEST 2

ABSTRACT;
This is the Floating point processor diagnostic. for the "WARM FPP" which is
standard in the 11160 CPU and the "HOT FPP". that one is an option (4 modules
M7878. M7879. M7880 and M7881). When the program is started a message is
printed indicating the presence or absence 01 tIle optional FP11-E hot floating
point unit (based upon the "WHAMI-REG" bit 4). The program selects and tests
HOT or WARM·FP by setting and clearing bit 12 of the LOG-FLAG-INTERRUPT
reg. (select HOT·FP = 1, select WARM·FP = 0). This test supports power fail.
but none of the FPll registers are saved. This can result in a error message
typed after power is restored. This test assumes CPU. CACHE. and MEMORY
are OK.
OPERA TING PROCEDURES :

.R QFPBBO
The program prints its name and starts testing
In case 0/ an error you can see in the lirst line oj the error messoge
weher the error happend in the HOT or WARM FPll.
SWITCH SETTINGS:
SW15 =
halt on error
SW14= 1 loop on current test
SW13:;:; 1 inhibit all error typeouts
SW12= 1 inhibit "END PASS" typeouts
SWll = 1 inhibit iterations
SWlO= 1 ring bell on error
SW09:;:; 1 loop on error
SW08 = 1 loop on test specified in memo loc 1150
SW07:;:; 1 not used
SWOI:;:; 1 test only unit (WARM- or HOT FP) speci/ied in SW < 00>
SWOl = 0 select alternately HOT·FP then WARM-E'P
SWOO:;:; I select "WARM E'P" only
SWOO:;:; 0 select "HOT E'P" only

1-53

11/60

QFPCBO
11 /60 FLOATING POINT TEST 3

ABSTRACT:
This is the Floating point processor diagnostic, lor the "WARM FPP" which is
standard in the 11160 CPU and the "HOT FPP", that one is an option (4 modules
M7878, M7879, M7880 and M7881). WJlen tIle progrom is started a message is
printed indicating the presence or absence 01 the optional FPll-E hot /looting
point unit (based upon the "~JIHA"fl-REG" bit 4). The program selects and tests
HOT or WARM-FP by setting and clearing bit 12 01 the LOG-FLAG-INTERRUPT
reg. (select HOT-FP = 1, select WARM-FP = OJ. The test is using the DLll-W
line clock to provide I/O interrupts during execution. II present the KWll-P
progrommable clock will also be utilized. This test supports power fail. but
none 01 the FPll registers are saved. This can result in a error message typed
alter power is restored. This test assumes CPU, CACHE, and MEMORY are
OK.
OPERA TING PROCEDURES

.R QFPCBO
The progrom prints its name and starts testing
In case 01 an error you can see in the lirst line 01 the error message
weher the error happend in the HOT or WARM FPll.
SWITCH SETTINGS:
SW15 =
halt on error
SW14 =
loop on current test
SW13=
inhibit all error typeouts
SWI2= 1 inhibit "END PASS" typeouts
SWll = 1 inhibit iterotions
SWlO=
ring bell on error
SW09=
loop on error
SWOB =
loop on test specilied in memo loco 1150
SW07=
not used
SWOl =
test only unit (WARM- or HOT FP) specuied in SW <00>
SWOl = 0 select alternately HOT-FP then WARM-FP
SWOO= 1 select "WARM FP" only
SWOO= 0 select "HOT FP" only

1-59

QFPDBO

11/60
11/60 FLOATING POINT TEST 4

ABSTRACT:
This is the Floating point processor exerciser, doing randomly ADD, SUB, MUL
and DEV instructions in the "WARM FPP" which is IStandard in the 1116D CPU
and the "HOT FPP", that one is an option (4 modules M7878, M7879, M788D and
M788J). When the program is started a message is printed indicating the
presence or absence of the optional FPll·E hot floating point unit (based upon
the "WHAMI·REG" bit 4). The program selects and tests HOT or WARM·fP by
setting and clearing bit 12 of the LOG·FLAG·INTERRUPT reg. (select HOT·fP
= 1, select WARM·fP = OJ. The test is using the DLll·W line clock to provide
I/O interrupts during execution. Ii present the KWll·P programmable clock
will also be utilized. This test supports power fail, but none of the fPIl registers
are saved. This can result in a error message typed after power is restored.
This test assumes CPU, CACHE, and MEMORY are OK.
OPERA TING PROCEDURES :

.R QfPDBO
The program prints its name and starts testing
In case 01 an error you can see In the first line 01 the error message
weher th(l error happend in the HOT or WARM FPll.
SWITCH SETTINGS :
halt on error
SWI5=
loop on current test
SW14=
inhibit all error type outs
SW13=
SW12= 1 inhibit "END PASS" typeouts
SWll= 1 inhibit iterations
SWID= 1 ring bell on error
SWD9= I loop on error
SWD8= 1 loop on test specified in memo loco 01150
SWD7= 1 not used
SWDI= I test only unit (WARM- or HOT FP) specjJied in SW <00>
SWD1= D select alternately HOT·FP then WARM·FP
SWOO= 1 select "WARM fP" only
SWOO= o select "HOT FP" only

1·60

II/SO

QFPEAO
11/60 FLOATING POINT TEST 5

ABSTRACT:
This program is a hardware oriented macro diagnostic lor the FPll·E "HOT"
FP processor option 01 the 11160 CPU ("HOT FPP" is an option (4 modules
M7878. M7879. M7880 and M78BJ). Tllis test supports power lail. but none 01 the
FPll registers are saved. This can result in a error message typed alter power
is restored. This test assumes CPU. CACHE. and MEMORY are OK.
OPERA TING PROCEDURES :
.R QFPEAO
The program prints its name and starts testing
SWITCH SETTINGS :
SW15= 1 halt on error
SW14 = 1 loop on current test
SW13 = I inhibit all error type outs
SW12= 1 inhibit "END PASS" typeouts
SWll = 1 inhibit iterations
SWlO= 1 ring bell on error
SW09= 1 loop on error
SWOB= I loop on test specilied in memo loc 01150
SW07= 1 not used
SW06= 1 16. BIT FP data typeouts
SW06= 0 SIGNIEXPIFRAC FP data typeouts
SW05 = 1 summary only error printouts
SW05 = 0 detailed error printouts
SW04 = 1 iI error occures and loop-on error (SW09) is set
lorce a tight loop on error to occur.

1-61

11/60

QKDAEO
11/60 BASIC CPU TEST

ABSTRACT;
This tests are partitioned into lour sections: 1. basic CPU test to verily the
"Hardcore". Any lault causes the program to halt. 2. basic instruction test.
any error cause a halt. 3. Comprehensive instruction test (main program) tests
all instructions and reports any error. 4. Tests instructions in various
combinations. manipulating variable data patterns. It also tests the MED and
error logging leatures 01 the CPU.
OPERA TING PROCEDURES

.R QKDAEO
the test will print a "END PASS., 1 rOTAL ERRORS SINCE." message

SWITCH SETTINGS ;
halt on error
SW15=
loop on current test
SW14=
inhibit normal error printouts
SWI3=
inhibit all error printouts
SW12=
inhibit subtest iterations
SWll=
loop on test in SWR < 08:00
SW10=
loop on error
SW09=
not used
SW08=
SW07=
not used

1-62

QKDBAO

11/60
11/60 CPU TRAP TEST

ABSTRACT:
This program checks that on all tmp operations register 6 is decremented the
correct amount. that tIle correct PC is saved on the stack. that tIle old condition
codes and priority are placed on tIle stack and that the new status and
condition codes are correct. Both the THAP and EMT trap instructions are
tested to see tnat aii combinations wiii imp. Cilecked also is that all restricted
instructions will trap. Verilication 01 the THAP instruction 000003 which is used
lor soltware debug routines like ODT DDT is done. Also tIle tmce bit is tested.
Stack overllow. yellow and red zone violation OI"e chedced.
OPERA TING PROCEDURES

.R QKDBAO
the test will print a "END PASS it 1 TOTAL ERRORS SINCE .. " message

II an error is detected. there will be a program halt. In this case register 6
(the stackpointer) should be examined to determine its contens. Memory as
specified by R6 contains the PC + 2 01 the Jailing instruction which caused the
laulty trap or interrupt.
SWITCH SETTINGS :
no switch settings

1-63

QKDCAO

11/60

11/60 INSTRUCTION / I/O EXERCISER
ABSTRACT:
This is a overall test 01 the 11160 CPU. Memory Management in User and
Kernel mode and up to l24K words 01 memory It executes each instruction
in all address modes and includes tests lor Traps. Interrupts. Floating point.
the Unibus and the Massbus. It is using peripherals like a RKll·RK05 lor
relocating the program. The low byte 01 the display register contains the
current test I. the upper byte displays bits 11:4 01 Kernel PARD (correspond
to bits 17: 10 physical address). Power Jail is supported.
OPERA TING PROCEDURES :
.1t#t

TAKE CARE TEST WRITES ONTO THE DISK ***

.R QKDCAO
The test will write the disk and unit # whicll will be used Jor
relocation and waits lor the operator to type a character·
it gives you time to writeprotect a customer or diagnostic disk.
SWITCH SETTINGS :
halt on error
SW15=
loop on current test that you are in
SW14=
inhibit all error type outs
SW13=
inhibit use 01 Unibus Exerciser if present
SW12=
inhibit iterations
SW11=
ring bell on error
SW1O=
loop on error
SW09=
SWOB=
relocate with CPU (no disk needed)
SW07=
inhibit system size typeout
inhibit relocation
SW06=
inhibit round robin {use only selected disk rather all
SW05=
inhibit random disk addressing
SW04=
inhibit use 01 Massbus tester (il present)
SW03=

SWR <0:2> along witl} SW 05 selects a disk
SW02=
SWOl=
SWOO=

o
4

RPll I RP03
RKll I RK05
RHll I RP04
RH1J / HS03104

1·64

II/SO

QKKAAO
11/60 CACHE DIAGNOSTIC

ABSTRACT:
TlIis program is a 13KW program. but 124 K words are needed lor complete
clIeck 01 the caclIe TAG held. Also needed is a NPR device lor testing
invalidation 01 cache locations dudng NPH's DATa's (SW OB = H. The choise
is: Unibus Exer. RK05. RP03 or TUlO. WIlen SW OB is set the test will request
you to select one 01 this devices. Belore any device is choosen, it should be
powered up. write enabled (scratch media loaded) and in the ready state.
The program will then ask you device specific questions. The diagnostic checks
tlle caclle data path as well as the cadle RAM dlips witll several data patterns.
When SW 07 is set tlle program will ask you to switclI of the machine and
on again. This test will check the initialisation (dear) 01 tlle cache (only with
core memory or battery back up).
OPERA TING PROCEDURES :

.R QKKAAO

the test will print a "END PASS It I TOTAL ERRORS SINCE .. " message
SWITCH SETTINGS :

halt on error
SWI5=
loop on current test that you are in
SWI4=
inhibit all error type outs
SWI3=
SWI2=
bypass tests using Memory Management
SWIl =
inhibit iterations
SWIO=
ring bell on error
SW09=
loop on error
SWOB = 1 enable NPR device tests
SW07= 1 enable power up test

1-65

QKTABO

11/60

11/60 MEMORY MANAGEMENT TEST
ABSTRACT:
This program will test all of the memory management logic. including the
stack limit register logic. and enables the operator to isolate the detected
failures to a replacable module. It is assumed that the CPU has been tested.
or is known to be functioning correctly. This test is started from address 200.
The 11160 cache is turned 0/1 for the first pass of the program and is turned
back on for the second and subsequent passes.
OPERA TING PROCEDURES :
.R QKTABO

the test will print a "END PASS f I TOTAL ERRORS SlNCf:." message
SWITCH SETTINGS:
SW15= 1 halt on error
SW14= 1 loop on the test that you are in
SW13= 1 inhibit all error type outs
SW12= 1 inhibit trace trap
SWll= 1 inhibit iterations after first pass
SWlO= 1 ring bell on error
SW09= 1 loop on error
loop on test in SWR <06:00>
SWOB=
inhibit multiple error type outs
SW07=

1-66

LSI-II

VKAACO
LSI-II BASIC 1ST RUCTION TEST

ABSTRACT:
This program tests the LS1-11 BASIC instruction set in all modes. Trap type
instructions are not tested. This test needs at least 4KW of memory. Place the
LTC switch in 011 position. This test call be power' foiled witll no error.
OPERA TiNG PROCEDURES

R VKAACO

tIle test will print a "END PASS" message
First pass will toke about I second
Other passes less than 20 seconds
SWITCH SETTINGS :

no swich settings available

1-67

LSI-II

VKABBO
LSI-li EIS ISTRUCTION TEST

ABSTRACT:
This program tests the LSI-11 EIS instruction set <ASH, ASHe, MUL and DIV>
option using registers 0-5 at least once with each instructioll. It is also checked
that extended instructions can be interrupted (by the console teletype). The
program should be run lor at least 2 passes with all switches low.
OPERA TlNG PROCEDURES :

.R VKABBO

set optional switches in memo loc 422
restart program.
the test will print a "END PASS" me.:;.:;age
SWITCH SETTINGS:
SW15 =
halt on error
SW14=
not used
inhibit printout
SW13=
not used
SW12=
SWll =
not used

1-68

VKACCI

LSI-II
LSI-II FlS ISTRUCTION TEST

ABSTRACT;
This progmm tests the LSI-ll Hooting instnrction set < FADD. FSUB. FMUL and
FDIV> option with fixed number patterns. using each register at least once
as the s}ack pointer. The LINE-CLOCK LTC switch must be in the oH position.
OPERA riNG PROCEDURES ;

.R VKACCI
set optional switches in memo loc 422
restart program
SWITCH SETTINGS :

SW15 = I holt on error
SWl4 = I scope loop
SWI3= I inhibit printout
SWI2=
inhibit tmce trapping
SWll =
enable iterations 01 subroutines
SWlO= I bell on error
SW09= I loop on error
SWOB = 1 loop on test in SWR < 07:00>

1-69

VKADCI

LSI-II
LSI-ll TRAP TEST

ABSTRACT:
This is a test oj all operations and instructions that causes traps, oddities 01
register 6, interrupts, the reset and wait instructions. It nms in LSI·ll or PDT·l1
with a SLU and 4k word of memory The clock must be disabled.
OPERATING PROCEDURES :

.R VKADCl

set optional switches in memo loc 422
restart program
SWITCH SETTINGS :
SW06 = 1 inhibi t testing EISI £IS opcodes 070000 . 075037
SW05 = 1 inhibit "END OF PASS" typeouts
SW04= 1 inhibit testing opcodes 75400·767'17 Jor r-eserved. instr. traps
SW03= 1 do not allow opcodes 170000·177777 to do re:;. in:;t. traps
SW02=
do not allow opcodec 76030·76057 (DIS r-e:;erved)
SWOl =
test 110 address space 160000 . 167776
SWOO=
not used

1-70

LSI-II

VKAHAI
LSI-II 4K SYSTEM (INTERRUPT) EXERCISER

ABSTRACT:
This is an LSI·I I 4k systems exerciser. It is a test 01 the processors ability to
ope rote peripherals in interrupt mode. It is nol a complete test 01 the
peripherals themselves. The test occupies less than 4k oJ memory but does
run a memory address test 01 all available memory above 4k. A processor
instruction test is run while allowing tlie peripherals to interrupt at random.
11 relocation is enabled the processor instnlclion test is run in each 4k memory
bank. 11 you test the DRVI I. insure test cable (BCOBRJ is installed.
OPERATING PROCEDURES

.R VKAHAI
set optional switches in memo loc 176
restart progrom
SWITCH SETTINGS :
SW15=
halt on error
loop on subtest
SWI4=
inhibit error printouts
SW13=
inhibit T bit trapping
SW12=
inhibit subtest iteration
SWl1=
inhibit processor instruction tesl
SWIO=
inhibit instruction test relocation
SW09=
restart program on error
SWOB=
inhibit end oJ pass printout
SW07=
static switch settings
inhibit ASR33 low speed reader lest
SW06=
inhibit line printer test
SW05=
inhibit DRVll parollel line unit test
SW04=
SW03= 1 inl1ibit EISI FIS test
SW02= I inhibit console output test
SWOl=
inhibit Iloppy unit 1 test
inllibit Jloppy unit 0 test
SWOO=

static switch settings can only be modilied iJ the test is to be
restarted at 200

1-71

VKAIBO

LSI-II
LSI-ll DIBOL INSTR. SET PART 1
ABSTRACT:

This program verjJies the operation 01 the dibol move and string instructions
01 the LSI· 11. The program checks that ead} instruction is interruptable using
the console SLU interlace and runs alternate passes with the trace trap
enabled. You need a LSI·ll with Dibol chip installed.
OPERA T1NG PROCEDURES :

.R VKAIBD

SWITCH SETTINGS

SW15 = I halt on error
SWI4= 1 scope loop
SW13= 1 inhibit error typeout
SW12= I inhibit trace trap
SWl1 =
not used
not used
SW1D=
loop on error
SW09=
loop on test on SWR < 05: 00 >
SWaB =
inhibit interruptability tests
SW07=
not used
SWOG=
use "CONTROL G" to enter soltware SWR in loco 176

1·72

LSI-II

VKAJBO
LSI-ll DIBOL INSTR. SET PART 2

ABSTRACT:
This program veriJies the operation of tile dibol decimal instructions oj the
LSI-H. The program checks that eael) instruction is interruptable using the
console SLU interface and runs alternate passes with the tmce trap enabled.
You need a LSI-ll with Dibol chip installed.
OPERA TING PROCEDURES :
.R VKA/BO

There are 53 (octal) subtests in this diagnostic program
SWITCH SETTINGS:
SWl5 = I halt on error
SWl4 = I scope loop
SWI3= I inhibit error typeout
SWl2 = 1 inhibit tmce trap
SWll =
not used
SWIO=
not used
SW09=
loop on error
SWOB= 1 loop on test on SWR <05:00>
SW07= 1 inhibit interruptability tests
SW06= I not used
use "CONTROL Gil to enter software SWR in loc. 176

1-73

VKALAI

LSI-II

LSI-II TRAP TEST (30KW MEMORY + FIS)
ABSTRACT:
This program is a copy 01 VKAD?? with minor changes. The changes enable
the the program to run with 30 KW 01 memory on the system. The program
also defaults to running with "FIS" options. This is a test oj all operations and
instructions that causes traps. oddities oj register 6. interrupts. the reset and
wait instructions.
OPERA TING PROCEDURES :

.R VKALAl
set optional switches in memo loc 422
restart program
SWITCH SETTINGS :
SW15 ==
not used
SW14==
not used
SWOG= 1 inhibit EISIFIS option tests
SW05 == 1 do not print "END OF PASS"
SW04 ==
do not allow opcodes 75400· 76777 to do res. instr. tmps
SW03==
do not allow opcodes 170000·177777 to do res. inst. traps
SW02 ==
do not allow opcodec 76030· 76057 (DIS reserved)
not used
SW01==
not used
SWOO=

!-74

MSVII-J MEMORY

VMJABO

MSVll-J ECC (also mixed L/J/P TYPE) MEMORY DIAG.
ABSTRACT:

This program has the ability to test memory from address 000000' to address
17757777. It does so using unique address techniques. worst case noise patterns
and instruction execution throughout memory. The intention of this program
is to test as comprehensively as possible MOS memories used on the LSI-bus
without concentrating on anyone system. On the other side. this test is also
not intended to be a total 100 % test of the memory. Other tests (DEC-Xll)
that to 110 may find memory problems Ihat this test is unable to. This test
has a special maintenance mode (field service mode) to provide specific
functional capabilities. The first pass is a "QV" - quick verily pass.
Use < CONTROL C> to stop the program.
Use <CONTROL T> to see whats happelllng
Use < CONTROL F> to enter field service mode
FS mode 0 == exit field service mode
FS mode 1 = typeout CSR register I 2 = load CSR register
FS mode 3 = examine memory I 4 = write memory lac. with xxx
FS mode 5
select bank test
FS mode B
type out error summary
FS mode II = enter kamikaze mode I 12 = exit kamikaze mode
FS mode 13= turn cache oH I 14= tum cache on
FS mode 17= test all banks and typeout the bank and pattern
FS mode 99= type "field service mode" help text
OPERA TING PROCEDURES

.R VMJABO

SWR

= 000000

NEW =
it prints a memory map

SWITCH SETTINGS :
SW15 = I halt on error
SW14= 1 loop on test
SW13=
inhibit error typeout

SW12 =
SWll =
SWlO=
SW09=
SWOB ==
SW07=
SWOG=
SW05=
SW04=
SW03=
SWOO=

inhibit relocation
inhibit subtest iteration
ring bell on error
loop on error
halt program (unrelocated)
detailed error reports
inhibit configuration MAP
limit max errors per bank
FAT terminal (132 col. or betted
detect single bit en'ors

1-75

Q-BUS MEMORY

VMSACO

0-4 MEGABYTE MEMORY EXER. (mixed D/L/P)
ABSTRACT:

This program has the ability to test memory from address 000000 to address
17757777. It does so using unique address techniques. worst case noise patterns
and instruction execution throughout memory. The intention of this program
is to test as comprehensively as possible all MOS memories used on the
LSI·bus without concentrating on anyone system. On the other side. this test
is also not intended to be a total 100 % test of the memory. Other tests
(D£C·Xll) that to 110 may find memory problems that this test is unable to.
This test does not run jJ you have MSVll·] (MB037) memory installed. use
VMJABO. Execution time for parity memory is 5 min. for 124 Kbyte. 20 min for
512 Kbyte. 120 min for 2560 Kbyte.
OPERA TING PROCEDURES :

.R VMSA??
SWR ;:;: 000000

NEW =

KT.I1 (MEMORY MANAGEMENT) AVAILABLE
22 BIT ADR A VAIL
MEMORY MAP:
FROM 000000 TO 3777777

SWITCH SETTINGS ;
.SWI5=
halt on error
loop on test
SWI4=
SW13=
inhibit error typeout
SW12=
inhibit memory management (initialy only)
SWll=
inhibit subtest iteration
SWlO;:;:
ring bell on error
SW09= 1 loop on error
SWOB= 1 loop on test in SWR <4:0>
SW07;:;:
inhibit program relocation
SWOG=
inhibit parity error detection
SW05=
inhibit exercising vector area

1·76

Q-BUS MEMORY

VMSBDO

0-4 MEGABYTE MEMORY QUICK VERIFY
ABSTRACT:

This program was created to do a quick verily test 01 Q-BUS memory. This
was needed especially lor testing the memory 01 a MICRO PDP-II. The program
is designed to give the user Iriendly messages. There must be more than 64
KW 01 memory. It will tell you how long one pass will approximately take.
OPERA TING PROCEDURES :

.R VMSB??
VMSBCO
-MEMORY 1024K bytes. Test time - 6 minutes. 44 seconds ... ...... .OK
-MEMORY 1024K bytes. test time - 6 minutes. 44 seconds ....... ... OK

1-77

KDJII-A CPU

ZKDJB2

KDJlI-A (M8192) BASIC INSTR. IEISITRAP TEST
ABSTRACT:

This diagnostic tests the KD/1l basic instruction set including EIS. TRAPS, and
the alternate register set. Ensure that halt trap option is disabled (jumper W9
installed).
OPERA TING PROCEDURES

.R ZKD]??
SWR = 000000 NEW
At the end 01 each pass the diagnostic name and pass cOllnt are printed.
SWITCH SETTINGS :
SW12:;;;;
not used
SWll = not used
SW 10 =
do not test BEVENT
SW09=
extended cache test
SWOB:;;;;
18 bit address only

use "CONTROL G" to enter software SWR in loco 176

New reVISIon oJ DC/11 (/11 CPU Chip) chip has a change to fix a problem
found with ASH and ASHC instructions. The old diagnostic (REV Bl) will
Jail with the new DCll1 chip set installed.
You need a patch.

1-78

ZKDKBO

KDJII-A MMU

KDJlI-A (M8192) MEMORY MANAGEMENT DIAG.
ABSTRACT:

This diagnostic focuses on testing tIle MEMORY MANAGEMENT UNIT
lunctionality. The test requires 4 megabytes 0/ Q·BUS memory to lully test
the MMU adder. A subset 01 the adder is tested if les~ than 4 megabyte 01
memory is available. In addition. lor testing in Q.BUS systems with only 18
address bUs. set bit 08 in the software switch register (loc. 176) to skip 0.11
tests which require 22 bit addressing.
OPERA TING PROCEDURES :

.R ZKDKBO

SWR = 000000 NEW
At the end 01 each pass the diagnostic name and pass count are printed.
SWITCH SETTINGS :
SWl2 =
not used

SWIl = 1 not used
SWlO= 1 do not test BE VENT
SW09= 1 extended cache test
SWD8=
18 bit address only
use "CONTROL Gil to enter soltware SWR in loco 176

1-79

ZKDLBO

KDJII-A FP

KDJlI-A (M8192) FLOATING POINT DIAGNOSTIC
ABSTRACT;

This diagno:stic locuses on testing the Iloating point in:struction lunctionality.
En:sure that halt trap option is disabled (jumper W9 installed). You need 32
KW 01 memory. Keep in mind that each KDJ·ll chip has a Hoating pOint
processor implemented, optional is a /loating poil accelerator chip.
OPERA TING PROCEDURES :
.R ZKDLBO

SWR = 000000 NEW
At the end of each pass the diagnostic name and pass count are printed.
SWITCH SETTINGS :
SW12 =
not used
SWll =
not used
SW 10 =
do not test BEVENT
SWD9=
extended cache test
SWD8 =
18 bit address only

use "CONTROL G" to enter software SWR in loco 176

i-GO

ZKDMBO

KDJII-A CACHE

KDJlI-A (M8192) CACHE MEMORY DIAGNOSTIC
ABSTRACT:
This diagnostic Jocuses on testing tIle functionality of tIle cache memory
system. A switch is provided in the software switch register to disable 22 bit
address generation in 18 bit Q-BUS systems. This is implemented by set~ing
bit 08 to a one. In addition, a switch is provided to enable tIle execution oJ
the cacile data, cache TAG RA1v1 data reliabiiity tests. This tests are very long
and may not be desired in all cases. This tests are enabled by setting bit 09
in the software switch register (loc. 176) to one. The longest test is the TAG
RAM DATA reliability test whic1l takes approx. 25 minutes to execute. For this
reason the data reliability tests are normaly deselected.
OPERA TING PROCEDURES

.R ZKDMBO
SWR

= 000000 NEW

SWITCH SETTINGS:
SWI2=
not used
not used
SWll=
SWlO= 1 do not test BEVENT
SW09= 1 extended cache tests
18 bit address only
SW08=
use "CONTROL G" to enter software SWR in loco 176

1-81

ZKEECO

CIS

CIS COMMERCIAL INSTRUCTION SET TEST
ABSTRACT:

This diagnostic is not directed at any specilic CIS hardware (11/44. 11/24... )
implementation but rather is intended to provide a exerciser lor all PDPll
CIS processors. Therelor it can run on a 11/23, 11/24. 11/44 having CIS option.
It tests all CIS instructions in register and inline mode by using all
combinations 01 operands and data types. in USER, SUPER and KERNEL mode,
memory management enabled and disabled. D-SPACE enabled and disabled
and interrupts. Operands lor each test caoSa are either extracted lrom input
tables or generated using a random number generater. Expected results are
computed in the loop by emulating CIS instructions using basic PDP11
instructions.
OPERA TING PROCEDURES

.R ZKEECO
SWR :;::: 000000 NEW
set optional switches
SA :;::: Start address
SA:;::: 204 enter parameters manualy
SA = 210 run quick verily mode only

Starting at 200 will do a quick verity pass, then a normal pass
(about 30 minutes) lollowed by a random exerciser until the operator
stops it.
Starting at 204 will get you into a dialog mode ;
TEST INTERRUPS IN CIS INSTR. (KW 11 REQUIRED) Y OR N ?
INTR SOURCE (R=LTC, N=KWll·P 100KHZ, C=KWll·P 10KHZ ..
RANDOM EXERCISE MODE (Y OR N) ?
ENTER INSTRUCTION TO TEST < ALL>
CONTROL CHARACTERS:
"CONTR T" display test number and instruction under test
"CONTR C" restart exerciser (only when started at 204)
"CONTR D" display all operands and results, continue
"CONTR E" same as "CONTR D" but query lor continue
"CONTR 0" print progress report ON/OPP toggle.
SWITCH SETTINGS :
SWOO= 1 program will query lor test. (in decimal) to stop and display
lise "CONTROL G" to enter soJ#ware SWH In Joe. 176

1-82

LSI MEMORY

ZKMAFO

0-28K (l24K) WORD MEMORY TEST
ABSTRACT:
This diagnostic will test 0-28K, with switch 12= 1 0-124kW of MaS or CORE
memoryon a PDP (LS1) family computer. Some tests are worst case lor MaS
and some for core, but all tests are always nln. The test occupies less than
2K of memory so it can be used to test a system with only 4lcW 01 memory.
This test is not intended to be a 100 % test oj Ihe memory. Other tests that
do 110 may lind memory problems that this test is unable to find.
OPERA TING PROCEDURES

.R ZKMAFO

SWR = 000000 NEW
Set optional switches
To halt the test, type CONTROL-C, this will insure the pmgram is relocated
back to lower memory. Be patient. Ihe CONTROL-C is only recognized at the
end
01 tIle current subtest.
SWITCH SETTINGS:
halt on error
SWI5=
SWI4=
loop on sub test delined by bits < 3:0>
inhibit ermr typeout
SWI3=
SW12=
enable testing above 28K (witll memory management)
enable parity testing
SWl1=
halt alter each subtest
SWlO=
inhibit pmgram relocation
SW09=
type lirst failing bit error per 4kW
SWOB=
enable long galloping test
SW07=
inhibit memory sizing
SW06=
SW05= I inhibit "PASS #Xx" printout
SW04= I inhibit printouts
SW03=
test number
SW02=
test number
test number
SWOl=
SWOO=
test number
use "CONTROL G" to enter software SWR in loco 176

1-83

11/60 MOS MEMORY

ZMMLCO

11/60 MEMORY DIAGNOSTIC
ABSTRACT:
This diagnostic progrom runs on PDPlll60 with MFllS·K ECC memory installed.
It tests memory Irom 0 . 124k. There are a lot 01 11160 with MSll·L installed.
on which this test does not run error free.
OPERATING PROCEDURES :
.R ZMMLCO

The test prints the CSR address and memory limit
The first pass is a quick one
Wait for the second "END PASS" message
Halt test only by < control C> to be sure no DOUBLE' ERROR forced
during test is left in the memory.
II there is. and you have battery back up option installed then
switch oH all (machine and battery circuit breaker) to clear the
double bit error.
Set operoting switches
SWITCH SETTINGS :
halt on error
SW15=
SWI4=
loop on subtest by SW < 3:0>
inhibit error typeout
SWI3=
inhibit relocation (testing above 28K)
SWI2=
enable printouts of single errors (disable E'CC)
SWll=
SWlO:::; I halt after each subtest
SW09= 1 inhibit progrom relocation
SWOB= 1 type lint uncorrectable error only
SW01= 1 enable XOR printout lor array test
SW06= 1 inhibit memory sizing
SW05= 1 inhibit "END PASS Ixx" and relocation printouts
SW04:::; I scan memory with ECC disable. no test run
SW03= 1 test
SW02=
test I
SW01=
test I
test f
SWOO=

1-84

. ZMSDDO

MOS MEMORY
MSll-L/M MEMORY TEST
ABSTRACT:

This diagnostic program runs on all PDPll with memory management and
MSll·L and/or MSll·M memory (also mixed). It has special maintenance mode
(/jeld service mode) to provide special lunctional capabilities. It must be on
16K words boundaries starting at 000.
OPERA TING PROCEDURES :

.R ZMSDDO
SA = 202 restart address

SWR = 000000 NEW =
Set operating switches
Control "K"
kill error print out and skip pattern
Control "T"
tell me what's happening
Control "F"
enter lield service mode
in command mode :99 will print you a help message

o
I

2
3
4
5
6

EXIT
READ CSR
LOAD CSR
EXAMINE MEMORY
MODIFY MEMORY
SELECT BANK & TEST
TYPE CONFIG MAP

SWITCH SETTINGS

SW15 = halt on error
SW14=
loop on sub test
inhibit error typeout
SW13=
inhibit relocation
SW12=
SWll =
inhibit subtest iteration (quick verily)
SWIO=
ring bell on error
SW09=
loop on error
SWOB = halt program (restore loaders)
SW07 =
detailed error reports
SW06=
inhibit configuration map
SW05 =
limit max errors per bank
SW04 = I lat terminal (132 columns or better)
SW03 = I test mode
SW02-=
test mode
SWOJ =
test mode
SWOO==
detect single bit errors

1·85

ZMSPBO

MOS MEMORY
MSll-L/M/P MEMORY TESt

ABSTRACT:
This diagnostic program runs on all 11124144's with MSll-LIMIP MOS memory.
It has special maintenance mode Weld service mode) to provide special
lunctional capabilities. It must be on 16 K words boundaries starting at 000.
OPERA TING PROCEDURES :

.R ZMSPBO

SA = 202 restart address
SWR = OOOODD NEW ;;;;
Set operating switches
Control "K"
kill error print out and skip pattern
Control "T"
tell me what's happening
Control "F"
enter lield service mode
in command mode :99 will print you a help message
SWITCH SETTINGS :
SW15= 1 halt on error
SW14= 1 loop on subtest
SW13= 1 inhibit error typeout
SW12;;:: 1 inhibit relocation
SWll = 1 inhibit subtest iteration (quick verily)
SWlO= 1 ring bell on error
SWD9;;:: 1 loop on error
SWDB =
halt program (restore loaders)
SWD1=
detailed error reports
SWD6=
inhibit con/iguration map
SWD5 = 1 limit max errors per bank
SWD4 = 1 lat terminal (132 columns or betted
SWD3;;:: 1 test mode
SWD2=
test mode
SWDI =
test mode
SWDO=
detect single bit errors

1-86

ZQKCFO

PDPll CPU

PDPll FAMILY INSTRUCTION EXERCISER
ABSTRACT:

This diagnostic progmm is designed to be a comprel1ensive check 01 the PDPll
CPU's (no memory management is tested). The progmm executes each
instruction in all address modes and includes tests lor traps and the console
interrupt sequence. The progmm does not test instructions not common to the
H/20 or 11105. The program relocaies ilJe iesi code iluvugllOUi memory 0-28k.
OPERA TING PROCEDURE:S

.R ZQKCFO
Set opemting switches
Pass count is printed alter each pass
"DZQKC DONE" is printed when done.
SWITCH SETTINGS
holt on error
SWI5=
loop on subtest
SW14=
inhibit error typeout
SW13=
inhibit relocation
SWI2=
inhibit subtest iteration
SWll=
ring bell on error
SWlO=
not used
SW09=
not used
SWOB=
inhibit end 01 pass printout
SW07=

1-87

ZQMCG3

MEMORY

O-124K WORD MEMORY (not ECC) TEST
ABSTRACT:
This diagnostic progmm has the ability to test memory trom address 000 000
to address 757 117. It does so by using: unique addressing techniques. worse
case noise patterns. and instruction execution throughout memory. The
sMallest unit 01 memory this program will recognize is 4 kw.There is also a
special routine to typeout all unibus address mnges which do not timeout.
Core memory as well as MaS memory is tested with or without parity check
(lor ECC memory use an other test) This test is also not intended to be a
100% test 01 the memory. Other tests that do 110 may lind memory problems
that this test is unable to. Optional is : Memory management and parity
memory control modules.

OPERATING PROCEDURES :

.R ZQMCG3
SA = 204 conversation mode (enter lirst and last address)
SA = 210 restart address
SA = 214 restore loader and halt
SA = 220 memory map typeout routine
SWR = 000000 NEW =
Set operating switches

SWITCH SETTINGS :
SW15=
halt on error
SW14=
loop on subtest
SWI3=
inhibit error typeout
SW12=
inhibit memory management (initial start only)
SWll=
inhibit subtest iteration
SWLO=
ring bell on error
SW09=
loop on error
SWOB=
loop on test in SWR< 4:0>
SW07=
inhibit progmm relocation
SW06=
inhibit parity en'or detection
SW05=
inhibit exercising vector area (loc O-LOOO)

1-88

COMMUNICATION. PRINTERS
BOOT MODULES. TERMINALS
REALTIME eLK. SLAVE CPU's
DHVII
DMVII
DLVII-E
DZQll
MXVII-A
DEQNA
DUPII
DMl1
DMCl1
KMCl1
DRII-B
DZII
KMCII-B
KXJII-CA
DECSA
LPII 2310
LP2S/26/27
LSII
DEQNA
DELUA

DLVll-j
DPVll
DZVll
DLVll
MXVl1-B
DMPll
DHII
DHUl1
DL11
DMRll
DUPll
DRII-C
KMCII-A
KWII-P
LA36
LNOI
LPOS/11/14
LP07
M9312
DEUNA
2-0

VDHAEO

DHVII

DHV-ll M3104 FUNCTIONAL TEST PART 1 OF 3
ABSTRACT:
This is a port 01 the DHVII lunctional veri/ication test. This port 01 the test
verilies that the reset, register access, and interrupt lunctions 01 the board
are functioning correctly. Normaly it tests all available lines, but iI you wont
only a particular line to be tested then use the active line bit map question
iset bit 3 to a one lor line 3 in octal to be tested;.
OPERA TING PROCEDURES :

.R VDHAEO

This program is running under the supervisory program
This supervisory progrom will first talk to you
CVDHA-E-O
DHVll-M FUNC TST PART I
UNIT IS DHVll-M
RSTRT ADR 142060
DR>STA
CHANGE HW (L) ? Y
tUNITS (0) ? 1
UNIT 0
CSR ADDRESS: (0) 160460 ?
INTERRUPT VECTOR ADDRESS : (0) 300 ?
ACTIVE LINE BIT MAP : (0) 377 ?
INTERRUPT BR LEVEL (0) 4 ?
CHANGE SW (L) ? Y
REPORT UNIT NUMBER AS EACH UNIT IS TESTED: (L) Y ?
NUMBER OF INDIVIDUAL DATA ERRORS TO REPORT ON A LINE: (D) 0 ?
ROM VERSION PRINTOUT ON THE FIRST PASS (t) Y ?
ROM VERSION NUMBERS : PROC 1 = 2 (O) PROC 2 = 2 (O)

2-1

VDHBEO

DHVII

DHV-ll M3104 FUNCTIONAL TEST PART 2 OF 3
ABSTRACT:
This is a part 01 the DHVll functional veriJication test. This part 01 the test
verifies that the major communication lunctions 0/ the board are functioning
correctly. Normaly it tests all available lines. but iI you wont only a particular
line to be tested then use the active line bit mop question (set bit 3 to a one
lor line 3 in octal to be tested).
OPERA TING PROCEDURES :

.R VDHBEO
This program is running under the supervisory program
This supervisory program will iirst talk to you
CVDHB-E-O
DHVll-M fUNC TST PART 2
UNIT IS DHVll·M
RSTRT ADR 142060
DR>STA
CHANGE HW (L) ? Y
'UNITS (0) ? I
UNIT 0
CSR ADD.flESS : (0) 160460 ?
INTERRUPT VECTOR ADDRESS (0) 300 ?
ACTIVE LINE BIT MAP : (0) 377 ?
TYPE OF LOOPBACK
1
INTERNAL
2
3

4
5
6
7

H3277
H325
H3101
H3103

70·22629
H3J5B: (0) 2 ?

INTERRUPT BR LEVEL (0) 4 ?
CHANGE SW (L) ? Y
REPORT UNIT NUMBER AS EACH UNIT IS TESTED: (L) Y ?
NUMBER Of INDIVIDUAL DATA ERRORS TO REPORT ON A LINE: (0) ?

2·2

VDHCEO

DHVII

DHV-ll M3104 FUNCTIONAL TEST PART 3 OF 3
ABSTRACT:
This is a part of the DHVll functional verilication test. This part of the test
verifies that the major communication functions of the board are functioning
correctly. Normaly it tests all available lines. but if you want only a particular
line to be tested then use the active line bit mop question (set bit 3 to a one
for line 3 in octal to be tested).
OPERA TING PROCEDURES :

.R VDHCEO
This program is running under the supervisory program
This supervisory progrom will fir":>t ta1lc to you
CVDHC·E·O
DHV II·M FUNC TST PART 3
UNIT IS DHV 11·M
RSTRT ADR 142060
DR>STA
CHANGE HW (L) ? Y
,UNITS (0) ? 1
UNIT 0
CSR ADDRESS : (0) 160460 ?
INTERRUPT VECTOR ADDRESS : (0) 300 ?
ACTIVE LINE BIT MAP : (0) 377 ?
TYPE OF LOOPBACK
INTERNAL
2
H3277
H325
3
4
H3101
H3103
5
6
70·22629
7
H315B : (0) 2 ?
INTERRUPT BR LEVEL (0) 4 ?
CHANGE SW (L) ? Y
REPORT UNIT NUMBER AS EACH UNIT IS TESTED: (L) Y ?
NUMBER OF INDIVIDUAL DATA ERRORS TO REPORT ON A LINE: (0) ?

2·3

DHVII

VDHECO

DHV -11 M3104 QUICK FUNCTIONAL USER FRIENDLY
ABSTRACT:
Tt.is JS a function verification test for the DHVll-M. 8 line asynchronous
multiplexer. This program has been created for inclusion within the 11184 User
Friendly Diagnostic (UFD). This is a merged program of the following tests:
VDHAxx. VDHBxx and VDHCxx. Some code from this three tests got removed
which required external loopback or other operator intervention.
OPERA TING PROCEDURES :

.R VDHECO
This program is running under the supervisory program
This supervisory program will first talk to you
CVDHE-C-O
DHVll-M TEST, ORION UFD
UNIT IS DHVll-M
RSTRT ADR 142060
DR>STA
CHANGE HW (t) ? Y
'UNITS (D) ? 1
UNIT 0
CSR ADDRESS: (0) 160460 ?
INTERRUPT VECTOR ADDRESS : (0) 300 ?
INTERRUPT BR LEVEL : (0) 4 ?

2-4

VDLABO

DLVII-J
DLVll-J LOGIC TEST
ABSTRACT;

This diagnostic program is a logic test to verily tIle operation oJ the DLVll-/.
Testing is done in two distinct phases: all selected channels per DLVll-] module
are tested individually, and secondly the DLVll-] module is tested as a whole
for dlannel interaction problems. This test operates lip to 2 DLVll-] serial line
interlaces conljgured at consecutive base addresses. The program will do auto
sizing il the device MAP "$DEVM" = O. The operator must install data wrap
around connectors (H3270-A' to do data testing. Tllis diagnostic assumes that
tIle operator has initialized location "$USWR" (user switch register memory
loc 00/220} and "$DEVM" (device map memory loco 1252' to the proper values.
De/ault address 176560 vector 60 lor the console
delault address 176500 vector 300 lor tIle first serial channel
II your configuration is not standard, wlite the lirst RCSR address into
memory loco 1250 (176500 is de/aultJ and tIle vector into memory loco 1244
(300 is default).
$USWR - memory loco 1220 - bit interpretation
bit 11·9 console device

o
2
bit 04 run data wrap around tests
bit 03 breake detection enabled
bit 02 even or odd parity
bit 01 parity enabled
bit 00 number oJ data bits transmitted

yes console on mod. 1 chan 3
console not on DLVll·]
console on module 2
yes
yes
odd
no
8 bit

OPERA TING PROCEDURES ;

.R VDLABO
This starts the test att address 200 (normal start).
CVDLABO DLVll·] TEST
SWR = 000000 NEW
SWITCH SETTINGS ;

SWl5 =
SWI4=
SWl3 =
SW12 =

SWIl =
SWlO=
SW09=

SWOB=

halt on error
loop on test
inhibit error print out
enable performance reports
inhibit iteration
bell on error
I loop on error
I loop on test in SWR < 7:0>

SW07= 1

SW06=
use "CONTROL G" to enter soltware SWR at loc 176.

2-5

VDMACI

DMVII

DMV-ll MICRO CONTROLLER STATIC DIAG. PART 1
ABSTRACT:

The MB053 and MB064 are single-line synchronous. micro-processor based
communications interlaces which can support both character oriented (DDCMP.
BSC. ETC) and bit-oriented protocols. This program tests the CSRS. RAM. and
basic micro-processor logic on these boards. The MB064 has integral modem.
OPERA TING PROCEDURES :

.R VDMACI
This program is running under the supervisory program
This supervisory program will first talk to you
CVDMA-C-J
DMV-l1 U-CONTROL LOGIC DIAG - PART 1 Of 2
UNIT IS MB053 OR MB064
RSTRT ADR 142060
DR>STA
CHANGE HW (L) ? Y
IUNITS (0) ? 1
UNIT 0
DEVICE CSR ADDRESS: (0) 16D020 ?
DEVICE VECTOR ADDRESS ; (0) 300 ?
DEVICE PRIORITY LEVEL : (0) 4 ?
No software parameters available

2-6

VDMBCO

DMVII

DMV-ll MICRO CONTROLLER STATIC DIAG. PART 2
ABSTRACT:
The MB053 and MB064 are single-line synchronous. micro-processor based
communications interlaces which can support botll cllOracter oriented (DDCMP.
BSC. ETC} and bit-oriented protocols. Tllis program tests the CSRS. RAM. and
basic micro-processor logic on these boards. The MB064 has integral modem.
OPERA TING PROCEDURES :

.R VDMBCO
This program is running under Ille supervisory program
This supervisory program will first taUe to you
CVDMB-C-O
DMV-Il U-CONTROL LOGIC DIAG - PART 2 OF 2
UNIT IS MB053 OR MB064
RSTRT ADR 142060
DR>STA
CHANGE HW (LJ ? Y
IUNITS (V} ? 1
UNIT 0
DEVICE CSR ADDRESS : (O} 160020 ?
DEVICE VECTOR ADDRESS : (O} 300 ?
DEVICE PRIORITY LEVEL : (O} 4 ?
IS THE PROCESSOR STRAPPED TO MODE 0 ON POWER-UP (LJ Y ?
BOARD TYPE (0= MB064. 1 = MB053-EIA} . (O} 0 ?
IS THIS A MANUFACTURING TEST STAND? (LJ N ?
No software parameters available

2-7

VDMCCI

DMVII

DMV-ll LINE UNIT STATIC DIAG. PART 1
ABSTRACT:
The MB053 and MB064 are single-line synchronous. micro-processor based
communications inter/aces which can support both character oriented (ODCMP.
BSC. ETC) and bit-oriented protocols. This program tests the VIA. FIFO and
basic USYRT logic on these boards. The MB064 has integral modem. The line
ur.it is integrated on the same board as tile micro-processor is. There are 3
tests to run just tor the line-unit part.
OPERA TING PROCEDURES :

.R VDMCCI
This program is running under the supervisory program
This supervisory program will iin>t talk to you
CVDMC-C-J
DMV-ll LINE UNIT TESTS - PART 1 OF 3
UNIT IS MB053 OR MB064
RSTRT ADR 142060
DR>STA
CHANGE HW (L) ? Y
IUNITS (0) ? 1
UNIT 0
DEVICE CSR ADDRESS: (0) 160020 ?
DEVICE VECTOR ADDRESS ; (0) 300 ?
DEVICE PRIORITY LEVEL : (0) 4 ?
SWITCH PACK II (BOOT ADDRESS) : (0) 0 ?
SWITCH PACK 12 ((DDCMP ADDRESS) ; (0) 0 ?
BOARD TYPE (0 == MBD64. 1 = MB053- V. 35
2 == MBD53-EIA) : (0) 0 ?
BAUD RATE (0= LOW (19.2) 1 == HIGH (56K)) ; (0)
No software parameters available

2-8

VDMDCO

DMVII

DMV-ll LINE UNIT STATIC DIAG. PART 2
ABSTRACT:

The MB053 and/or MB064 are single-line synchronous. micro-processor based
communications interlaces whicll can support hoth character oriented (DDCMP.
BSC. ETC) and bit-oriented protocols. Tllis program tests the line oriented
logic on these board. The MB064 has integral modem. The line unit is integrated
on the same board as the micro-processor is. There are 3 tests to run just Jor
the line-unit part.
OPERA TING PROCEDURES :

.R VDMDCO
This program is running under the supervisory program
This supervisory program will lirst talk to you
CVDMD-C-O
DMV-ll LINE UNIT TESTS - PART 2 OF 3
UNIT IS MB053 OR MB064
RSTRT ADR 142060
DR>STA
CHANGE HW (L) ? Y
'UNITS (D) ? 1
UNIT 0
DEVICE CSR ADDRESS: (0) 160020 ?
DEVICE VECTOR ADDRESS : (0) 300 ?
DEVICE PRIORITY LEVEL : (0) 4 ?
No soltware parameters available

2-9

VDMECO

DMVll

DMV -11 LINE UNIT STATIC DIAG, PART 3 OF 3
ABSTRACT:
The M8053 and/or MB064 are single-line synchronous. micro-processor based
communications interlaces which can support both character oriented (DDCMP.
BSC, ETC) and bit-oriented protocols. This program tests the integral modem
and associated logic on these boards. The MB064 has integral modem. The
line unit is integrated on the same board as the micro-processor is. There are
3 tests to run just lor the line-unit part.
OPERA TING PROCEDURES :

.R VDMECO
This program is running under the supervisory program
This supervisory program will fjr.;t talk to you
CVDME-C-O
DMV-li LINE UNIT TESTS - PART 3 Of 3
UNIT IS MB053 OR MB064
RSTRT ADR 142060
DR>STA
CHANGE HW (L) ? Y
tUNITS (0) ? 1
UNIT 0
DEVICE CSR ADDRESS: (0) 160020 ?
DEVICE VECTOR ADDRESS . (0) 300 ?
DEVICE PRIORITY LEVEL : (0) 4 ?
BOARD TYPE (0 = MB064, 1 = M8053- V. 35,
2 = M8053·L'IA) . (0) 0 ?
TURNAROUND CONNECTOR TYPE0=H3254 & H3255, 1 = INTEGRAL MODEM CABLE, 2=EIA CABLE
3 = V.35 CABLE. 4 = NONE: (0) 0 ?
No software parameters available

2-10

VDPVCI

DPVll

DPVll M8020 SERIAL SYNCHRONOUS FUNCTIONAL TEST
ABSTRACT:
This program is running under the run-time supervisor. This test can run in
4 dilJerent modes, internal loop-back (no loop-back connector needed), RS423
loopback, RS422 loopback, local modem loop and remote modem loop. Internal
loopback runs the diagnostic througll tIle USYNRT maintenance mode
loopback, ilIa drivers will noi be iesied. nS423 requires a H3260 onboard
connector or the BCOSC cable and the H3259 connector.
OPERATING PROCEDURES :

.R VDPVCl
This program is running under the supervisory program_
This supervisory program will first talk to you.
CVDPV-C-J
DIAGNOSTIC TESTS
UNIT IS DPV 11
RESTART ADDRESS 142060
DR>STA
CHANGE HW (L) ?
tlUNITS (0) ? 1 < CR >
UNIT 0
ADDRESS : (0) ? 160010 ? < CR >
VECTOR (0) ? 300< CR >
LOOPBACKo INTERNAL,
RS423,
2
RS422,
3
LOCAL MODEM LOOP,
4
REMOTE MODEM LOOP (0): 1 ?<CR>

2-11

VDVADI

DLVII-E
DLVII-E OFF-LINE DIAGNOSTIC

ABSTRACT:
This diagnostic program is a logic test to verily the operation of the DLVll-E.
The program has set initialy defaults to all options, except programmable
baude rate. This test operates up to 16 identically configured DLVll-E
interlaces. The default address of the first interlace is 175610. vector 300. 11
the address is not standard. then the program has to be modified $BASE
(175610) is memo loco 1250. SVECTl (300) is mem loco 1244. The loc $USWR is
memo loco 1220 and contains all the user selectable options. The default value
is (071110).
bit 14 (-FR) and (-FD) jumpers in
yes
bit 13 cable terminated (H315)
yes
bit 12 breake generation enabled
yes
bit 11-8 baud rate oHset
05 = 110 baud
bit 07 programmable baud rate
o no
bit 06 common speed
1
yes
bit 05 even or odd parity
Dodd
bit 04 parity enabled
o no
bit 03-0 lof data bits
10 = 8
OPERA TING PROCEDURES

.R VDVAD1
This starts the test att address 200 (normal start).
CVDVA-D DLVll-E OFFLINE TEST
SWR

= 000000 NEW

SWITCH SETTINGS :
SW15 =
halt on error
SW14=
scope loop
SW13:;:::
inhibit error print out
SW12=
not used
SWll =
inhibit iteration
SWlO:;::: 1 bell on error
SW09= 1 loop on error
SWOB=
loop on test in SWR < 7:0>
SW07=
SW06=
use "CONTROL G" to enter soltware SWR at loc 176.

2-!2

DZVII/DZQIl

VDZAD3

DZVll M7957 / DZQll M3106 DIAG. TEST 1 OF 2
ABSTRACT:

This test veriJies the DZVlll DZQl1 operates according to specilications.
Parameters may be supplied to the program by either "AUTO SIZING" or
input from the user on the console by having SWOO= 1 at start time. Auto
sizing will be done the first time the program is started and SW07= 0, SWOO= 0
and S W03 = O. For a normai run (auio sizing. all SW = 000 000; no TURN-AROUIID
connector is needed, it uses the internal maintenance loop. The cables and
line drivers can not be tested in this mode.
OPERA TING PROCEDURES :

(SWR) = /000000/ = /01
manual mode
normaly you run the auto mode (easy to run) but
1 explane here the manual mode
CVDZAD3
FOUR LINE ASYNC MUX TESTS, PART 1 OF 2
1ST CSR ADDRESS-(160000:167770):
VECTOR ADDRESS-(300:770):
MAINTENANCE MODE
{EXTERNAL < H325 > (E)J:
{INTERNAL < DZVCSR03 = 1 (1)]:
{STAGGERED <H329> (S)]:
# OF DZVll'S IN OCTAL (1:20):

SWITCH SETTINGS :

SW15=
SW14=
SW13=
SWI2=
SWl1=
SWlO=
SW09=
SW08=
SW07=
SW06=
SW04=
SW03=
SW02=
SWOloc
SWOO ..-

holt on error
I loop on current test
I inhibit error print out
1 bell on error
1 inhibit iterations
1 escape to next test
loop with current data
catch error and loop on it
no auto size
reselect DZVll's desired active
select delay parameter
extra parameter input
lock on selected test
restart program at selected test
get users parameters from console

2-13

VDZBDO

DZVII/DZQll

DZVll M79S7 / DZQll M310S DIAG. TEST 2 OF 2
ABSTRACT;

This test verifies the DZVlll DZQll opemtes according to specs. Pammeters
may be supplied to the progmm by either "AUTO SIZlNG" or input from the
user on the console by having SWOO= 1 at start time. Auto sizing will be done
the first time the program is started and S W07 = 0, S WOO = 0 and SW03 =O. For
a normal run (auto sizing, all S W = 000 000) no TURN·AROUND connector is
needed, it uses the internal maintenance loop. The cables and line drivers
can not be tested in this mode.
OPERA TING PROCEDURES :

.R VDZBDO
(SWR) = 10000001 = 101
manual mode
nonnaly you run the auto mode (easy to run) but
I explane here the manual mode
CVDZBDO
FOUR LINE ASYNC MUX 1'£'STS, PART 2 Of' 2
1ST CSR ADDRESS·(160000:167nO):
VECTOR ADDRESS -( 300: nO):
MAINTENANCE MODE
[EXTERNAL < H325 > (E)]
[INTERNAL < DZVCSR03 = 1 (1)]
[STAGGERED < H329 > (S)]:

* OF DZVll'S IN OCTAL (1:20):
SWITCH SETTINGS :
SW 15 = 1 holt on error
SWI4= 1 loop on current test
SWI3= 1 inhibit error print out
SW 12=
bell on error
SWll =
inhibit itemtions
SW 10=
escape to next test
SW09=
loop with current data
SWOB =
catch error and loop on it
SW07=
no auto size

SW06=
SW04=
SW03=
SW02=
SWOI=
SWOO=

reselect DZVll's desired active
select delay pammeter
extm parameter input
lock on selected test
restart program at selected test
get users parameters trom console

2-14

DZVII IDZQ II

VDzeBI

DZVll M7957 / DZQll M3106 EIA CABLE/ECHO TEST
ABSTRACT:
This test is designed as a non-chainable standalone diagnostic providing the
operator with direct control over the testing 01 all DZVll EIA cables. Connect
a terminal to any line on the DZVl JlDZQll and type line number on the
console and you will get a printout on the connected terminal. Alter you can
type any character on the terminal and tile computer via DZV11 will give you
the ECHO to test the input circuit. II you do the cable test put a H325
TURN·AROUND connector on a line and select the line number on the console.
OPERA TING PROCEDURES

.R VDZCBl
(SWR) = 10000001 = I
CVDZCB
DZVll ECHO AND CABLE TESTS
CONTROL REG ADDRESS·1601oo< CR >
VECTOR ADDRESS-31O< CR >
WHICH TEST ECHO OR CABLE (E or C) E < CR >
BAUD RATE-SOl 75111011351 15013001600112001180024001480017200 or 9600< CR >
LlNE-oo<CR>
At this point the message:
THE QUICK BROWN FOX JUMPED OVER THE LAZY DOGS BACK 0123456789
should be printed on the terminal.
The program will then print on the console terminal:
TYPE' A CHAR. ON DZVII terminal
Any printable character which is typed on the DZVll terminal will be ECHOED
back on the terminal.
SWITCH SETTINGS :
SWl5 =
halt on error
SW14 =
not used
SWl3 =
inhibit error print out
SW12 =
bell on error
SWII =
not used
escape to the end of pass alter an error
SWlO=
not used
SW09=
SW08=
restart the test alter an error

2·15

VKAEB2

DLVll
DLVll (M1940) LOGIC TEST

ABSTRACT:
This is a logic test of the DLV 11 serial line unit for the LSI·11 computer. This
test will operate on the DLVll without any special test devices by default.
However a special wrap module can be used and tested by option. This is a
multiple device test which will operate on the console DLVll addressed at
177560. and up to 8 additional DLVll's with specified addresses. Default address
lor console : 177560 next 176500.

Remember lor 110 baude use 2 stop bits, all oIlIer baude rates only 1 stop
bit.
OPERA TING PROCEDURES
.R VKAEB2

Set bits in the Software switch reg. in loco 422
restart program at 200
SWITCH SETTINGS :
SW15::;:
continue on error
SW14::;:
scope loop
SW13::;:
not used
SW12 =
not used
SWll::;:
not used
SWI0::;:
loop on current test
SWD9=
run wrap test
SWDB::;:
set device map manualy
SWD7::;:
not used
SW06::;:
not used

2-16

VMXAAO

MXVII-A

MXVll-A LOGIC TEST (2 SLU,ROM's,CLOCK,RAM's)
ABSTRACT:
This diagnostic is a logic test to verily the operation 01 the 2 Serial Line Units.
ROM and clock options, tIle PCR register and the DDR register and the RAM
on the MXVll-A. The progrom will test to whatever options the device MAP
is set to. The progrom prints the con tens oj the device MAP lor verilication.
Each 0/ the 2 SLU channeis are tested individuaiiy. The operoior must install
data wrap around connectors to do data testing. To bypass data tests. the
operotor must modily tIle device MAP.
The delault Address and Vectors are as follows:
Channel 0 (SLU} address 776500
(memory loc. 001254)
vector 300
(mem loc. 001 256)
Channel I (SLU} address 777560
(memory loco 001260)
vector 60
(memory loco 001 262)
OPERA TING PROCEDURES :

.R VMXAAO

= 000000

NEW

DEVM = 000000

NEW

SWR

(device map)

bit 15 = 1 (100000) bypass channel 0 test
bit 14 = 1 (040000) 7 bits/word witll parity
bit 12= I (O10000) even parity (bit = a odd parity)
bit I1 = I (004000) Break detection enabled channel 0
bit 10= 1 (002000) bypass data wrap tests channel 0
bit 08= 1 (000400) test channel I
bit 07= 1 (000200) 7 bits/word with parity channell
bit 05= 1 (000040) even parity (bit = 0 odd parity)
bit 04 = 1 (000020) breake detection enabled channel
bit 03 = 1 (000010) bypass data wrap tests channel I
bit 02 = I (000004) bypass RAM tests
bit 01 = 1 (000002) bypass ROM testing
bit 00= I (000001) clock option enabled test
SWITCH SETTINGS :
halt on error
SWI5=
SW14=
loop on current test
SWI3=
inhibit error print out
enable performance reports
SW12=
inhibit iterotions
SW1I=
SWIO= 1 belJ on error
SW09= 1 loop on error
loop on test in SWR < 7:0>
SW08=
SW07 -=
test number to loop on
test number to loop on
SWOO=change loc 176 (soltware SWRJ to enter new switches

2-17

MXVII-B

VMXBAO

MXVll-B LOGIC TEST (2 SLU,ROM's,CLOCK,RAM's)
ABSTRACT:
This diagnostic is a logic test to verify the operation oj the 2 Serial Line Units,
ROM and clock options. the PCR register and the DDR register and the RAM
on the MXVll-B. The program will test to whatever options the device MAP
is set to. The program prints the con tens of the device MAP Jor veri/ication.
Each oj the 2 SLU channels are tested individually. The operator must install
data wrap around connectors to do data testing. To bypass data tests. the
operator must modily the device MAP.
The default Address and Vectors are as follows:
Channel 0 (SLU) address 776500
(memory loco 001254)
vector 300
(mem loco 001256)
Channell (SLU) address 777560
(memory loco 001260)
vector 60
(memory loco 001262)
OPERA TING PROCEDURES :

.R VMXBAO
SWR = 000000

NEW

DEVM = 000000

NEW

(device map)

bit 15 = 1 (100000) bypass channel 0 test
bit 13 = 1 (020000) 2 MXVIIB modules Jor test
bit 12= 1 (010000) CPU has no Memory Management
bit 11 = 1 (004000) Break detection enabled channel 0
bit 10= 1 (002000) bypass data wrap tests channel 0
bit 09= 1 (001000) do data internal-wrap tests
bit 08 = I (000400) test channel 1
bit 07= 1 (000200) bypass PCR register test
bit 06= 1 (000100) bypass use oj LED's
bit 04= 1 1000020) breake detection enabled channel 1
bit 03 = 1 (000010) do data internal-wrap tests cllOnnel 1
bit 02 = 1 (000004) bypass RAM tests
bit 01 = 1 (000002) ROM present, do test
bit 00= 1 (00000l) clock option enabled test
SWITCH SETTINGS :
halt on error
SW15=
loop on current test
SW14=
inhibit error print out
SW13=
enable performance reports
SW12=
SWll
inhibit iterations
SWlO",bell on error
SW09=
loop on error
SW08.=.
loop on test in SWR < 7:0 >
SW07test number /0 loop 011
SWOO
test number to loop on
chauge loe 176 (soJtware SWRJ 10 f:lllltn
0.=.

I1t;'W

2-18

:,wilclw.>

VNIADO

DEQNA/DELQA

DEQNA (M7504) NI EXERCISER DIAGNOSTIC
DELQA (M7516) NI EXERCISER DIAGNOSTIC
ABSTRACT:

The network interconnect exerciser (NIE) program is meant to provide lield
service with a tool lor detennining the connectivity 01 nodes on the network
interconnect (NI). The NIE program will detennine the ability 01 nodes on the
NI to communicate with each other and provide node installation verification
and problem isolation. The NIE uses the low level maintenance features of
the DEQNA/DELQA to provide testing without interrupting nonnal operation
01 the NI. The VAX version 01 the NIE can also be nm conncurrently on another
node. with each version running independently 01 each other.
OPERA TING PROCEDURES :

.R VNIA??
This program is running under the supervisory program.
This supervisory program will lirst talk to you.
CVNIA-D-O
CVNIADO DEQNA. DELQA NI EXERCISER
UNIT IS DEQNA
RSTRT ADR 142060
DR>START
CHANGE HW (LJ ? Y
'UNITS (0) ? 1< CR >
UNIT 0
DEVICE CSR ADDRESS? (0) ? 174440<CR>
INTERRUPT VECTOR ADDRESS? (0) ? 700< CR >
INTERRUPT PRIORITY LEVEL ? (0) 5 ?
this is a standard address and vector.
NIE>
now you are in a command mode. you can type
NIE> (A) ? HELP
with this command you will get the help text
below is a example of use lull commands
NIE> (A) CLEAR NODE/ALL
NIE> (A) BUILD
NIE> (A) SHOW NODES
NIE> (A) RUN TEST/PASS=nn
TEST=DJRECT. LOOPPAJR or PATTERN
NIE> (A) SHOW COUNTERS
NIE> (A) SUMMARY

2-19

ZCLMCO

DMP.DMV-ll

DMPll. DMVll DATA COMMUNICATION LINK TEST
ABSTRACT:

This DCLT (data com link test) is meant to provide field service with a tool
to maintain DMPll, DMVll to DDCMP multipoint communication links. This
program will provide the coverage necessary to detect failures to the computer
equipment. the communication link. or the modem.
OPERA TING PROCEDURES:
This program is running under the supervisory program.
This supervisory program will first talk to you .
.R ZCLMCO

CZCLM-C-O
CZLMCO DMP DMV-ll DATA COMM. LINK TEST
UNIT IS DMP OR DMV 11
RSTRT ADR 145702
DR>START
CHANGE HW (L) ? Y
'UNITS (0) ? 1 < CR >
UNIT 0
FULL DUPLEX OPERATION: (i) Y ?
DEVICE CSR ADDRESS. (0) 160170
INTERRUPT VECTOR ADDRESS: (0) 300 ?
INTERRUPT PRIORITY : (OJ 5 ?
OPTION TYPE 0== DMP, 1 = DMV . (0) 1
IS THIS MULTIPOINT NETWORK: (L) N ?
IS THIS A CONTROL STATION: (L) N ?
THIS IS DCLT. TYPE "H" OR "?" FOR DETAILS
MODE == ACTIVE I PASS = 0001
INOSTA TUSI CHECKINOECHOINOMODEMINOPR01'OCOL
DCLT> (A) ?
DCLT> (A) ? H<CR>
DCLT>
DCLT>
DCLT>
DCLT>

now you are in command mode. you can type
this will print a help text
below is a example oJ u:~e/llll commands
(A) CLEAR EXPECTLIST
(A) SET EXPECTMSG = IALT
(A) SHOW EXPECTLIST
(A) SHOW TRANSMITLIST

DCLT> fA) RUN MODf=ACTlVf
MODf= RfCfIVE
MODf", TRANSMIT
MODE ~ TALK
MODf ,= US1TN
DCl.T> (A) PRINT
gels yOIl to repol1 level prompt HPT>
aPT> Jl
2-20

DUPII

ZDCLBO
DUPll DATA COMMUNICATION LINK TEST

ABSTRACT:

This DCLT (data com link test) is meant to provide field service with a tool
to maintain DUPll communication links. This program allows the DUPll to
communicate with other synchronous (including DDCMP) devices on point to
point or muitidrop networks. This DCLT program will provide the covenJge
necessary to detect failures to tIle computer equipment. the communication
link. or the modem.
OPERA TING PROCEDURES :

This program is running under the supervisory program.
This supervisory program will lir":;t taUe to you.
R ZDCLBO
CZDCL-B-O
DUP-ll DATA COMM LINK TEST
UNIT IS DUP-ll
RSTRT ADR 145702
DR > START
CHANGL' HW (L) ? Y.
tUNITS (0) ? 1 < CR >
UNIT 0
FULL DUPLEX OPE'RATION: (L) Y ?
DEVICE CSR ADDRESS: (0) 160170 ?
INTERRUPT VECTOR ADDRESS: (0) 300 ?
REMOTE NODE "ITEP": (1) N ?
IS THIS A MULTIPOINT NETWORK: (LJ N ?
ADDRESS THIS STATION: (0) 1 ?
THIS IS DCLT. TYPE "H" OR "?" FOR DETAILS
MODE = ACTIVE I PASS = 0001
INOSTATUSICHECKINOECHOINOMODEMINOPROTOCOL
DCLT> (A) ?
DCLT> (A) ? H<CR>

now you are in command mode. you can type
this will print a help text
below is a example of use/ull commands
DCLT> (A) CLEAR EXPECTLIST
DCtT> (A) SL'T EXPECTMSG = IALT
DCLT> (A) SHOW EXPECTLIST
DCLT> (A) SHOW TRANSMITLIST
DCLT> (A) RUN MODE=ACTIVE
MODE = RECEIVE
MODE = TRANSMIT
MODE=TALK
MODE = LISTEN
DCLT> (A) PRINT
gets you to report level prompt RPT>
RPT> H
get he~

2-21

ZOHAOO

OHII
DHll STATIC LOGIC TEST

ABSTRACT:
The DHll static logic test is designed to provide a means lor testing the correct
lunction 01 all read/write bits in the lollowing DHll registers: DHll system
control register, DHII line parameter register, DHll break control register,
DHll silo status register. In addition, tests are provided to check the lunction
01 those bits that are read only in maintenance mode. This test does not need
a TURN·AROUND connector.
OPERA TING PROCEDURES :
.R ZDHADO

This starts the test at address 200 (normal start).
The program will type·

DHll STATIC LOGIC TEST
VECTOR ADDRESS·
CONTROL REGISTER ADDRESS·
R

CZDHA·DO

indicating run state
is end 01 pass message

SWITCH SETTINGS
SW 15 = 1 holt on error
SW14= 1 scope loop
SW13= 1 inhibit error print out
SW12=
SWll = inhibit iteration
escape to next test on error
SWlO=
SW09= 1 freeze variable parameter in current test
SWOB= 1
SW01= 1 start program at selected test
SWOO= 1 change parameters at program restart

2-22

ZDHBCO

DHll
DH 11 MEMORY TEST

ABSTRACT:
The DUll memory test is a test 01 tIle byte count and bus address memories
oj tIle DHII Each memory is tested lor addressability and data read/write
capability No TURN-AROUND connector is needed.
OPERA TiNG PROCEDURES

.R ZDflBCO
This starts the test at address 200 (normal startJ.
Tile program will type:
Dllll MEMORY TEST
VI.'CTOR ADDRESSCONTROL REGISTER ADDRESS-

indicate run state

CZDHB-CO

is end 01 pass message

SWITCH SETTINGS
SWI5= 1 halt on error
SWI4= I scope loop
SWI3=
inhibit error print out
SW12=
inhibit iteration
SWlJ=
escape to next test on error
SWlO=
SW09=
lreeze variable parameter in current test
SWOB=
SW01=
start program at selected test
SWOO=
change parameters at program restart

2-23

ZDHCCO

DHII

DHII TRANSMITTER AND RECEIVER TEST
ABSTRACT:
The DII" hunsmi"er and receiver logic 'UI checks "Ie basic 'rolismiUer and
receiver Junclions. funclions .es.ed include inen'upls. operolion 01 'ransmiller
HPR 'ogic. and operalion 01 receiver silo logic NO rUIlN,AROUND conneclor
is uaeded.
OPERATING PROCEDURES :

.R ZDIICCO
This ,'a,1s .he 'est

0' address 200 Inol'mol

The program will Iype:
DII"

THANSMITTeR AND ReCelVCR LOGIC TL'ST

veCTon ADDReSS·
CONTROL ReGISTeR ADDReSS,
R

indico.e run s'o'e

CZDIIC·CO

is end 01 poss menage

SWITCH SETTINGS
SWI5;:; I hal. on elTor
SWI4:: '.cope loop
SW 13 = I inhibH error print out
SWI2= ,
SW" = I inhibit i'ero.ion
SWIO .. 'escape
next 'e,' on error
SW09- 1 II-.. e,e variable porume'er in cuo'eu' 'est
SWOB= I
SW01"," I
program
selec'ed 'es'
SWOO=- I change parame'ers a. program 1'0"011

"0""

2·24

:.101'0.

ZDHDDO

DHII

DHll SPEED SELECTION LOGIC TEST
ABSTRACT:

The DHll speed selection logic test verifies that tIle speed selection functions
01 the line parameter register operate properly lor each transmitter and

receiver line. Transmitter timing is cllecked first. and then r'6ceiver timing is
tested. TIle program uses a relative timing comparison to determine iI line
speed selec:iioIi is con'eci. No TURN·AROUND connector is needed.
OPERA TING PROCEDURES
.R ZmfDDO

This storts the test at address 200 (normal start).
The program will type:
DHll SPEED SELECTION LOGIC TEST
VECTOR ADDRESS·
CONTROL REGISTER ADDRESS·
R
indicates run state:
006222 NO CLOCK
LINE SPEED

00
00

01
02

01
OJ

01
02

enter vector
enter CSR addree

SWITCH SETTINGS

SW15 =
holt on error
SW14 =
scope loop
SW13=
inhibit error print out
SW12=
SWll = J'inhibit iteration
SWIO= 1 escape to next test on error
SW09=
freeze variable parameter in current test
SWOB=
start program at selected test
SW01=
change parameters at program restart
SWOO=

2·25

DHII/DMII

ZDHKFO

DMll MODEM CONTROL MULTIPL. TEST
ABSTRACT:

The DMll diagnostic tests the modem control multiplexer used with the DHII
(and others) and consists 01 4 groups 01 tests.
GROUP 0 . all line scaner and line mux lunctions are tested (no test connector)
GROUP I . a single line is tested using modem cable and a H315 test connector.
GROUP 2 . connect-disconnect test lor lD3A modems
GROUP 3 - connect-disconnect test lor 202C modems
OPERA TING PROCEDURES

.R ZDHKFO
This starts the test at address 200 (normal start)
The program will type:
CZDHK MODEM CONTROL DIAGNOSTIC
SWR= 000000

NEW = 000001
type DOl to enter vector and address

VECTOR ADDRESS :
CONTROL REGISTER ADDRESS :
LINE SELECT PARAMETER :
select line (modem) 001 = line 0, 002 = line I, 004 = line 2
OlD= line 3, lDOO= line 9 (each bit represents a line)
177777= select all lines
TEST: type test-group (0·3)
SWITCH SETTINGS:

SW15 =
SWI4=
SW13=
SW12=
SWll=
SWlD=
SW09=
SW01=
SWOO~

halt on error
loop on current test
inhibit error print out
inhibit iteration
escape to next test on error
lreeze data
start program at selected test
change parameters at p,-og,-am restart

2-26

ZDHMD2

DHII

DH 11 COMPREHENSIVE DIAGN. TEST
ABSTRACT:

The DHll comprellensive diagnostig test is replacing the older ZDHAxx ... to
ZDHKxx. It consists 01 48 logically sequenced tests. The program is conliguroble
by the autosizer or by console dialogue to lest all 16 lines. Individual lines
within a DHll may be selected or deselected lor testing. Whenever an error
is detected Ci comprehensivG error report is typed that allows the user to
isolate the lault to a lunctional area 01 logic. Test WI and 105 through 107
(test group IJ 01 the modem control diagn. ZDHKxx llave been included in this
program. In this way all the level converters and cables can be checked with
just one program using the H315 turnaround connector.
OPERA TING PROCEDURES :

.R ZDHMD2
This starts the test at address 200 (normal startJ.
set the SWR
000000 worst case testing
set the SWR
000002 to type the de\,ice map
set the SWR
004000 lor a quick pass
set the SWR
002000 to skip modem control test
The program will type:
CZDHM·D·O DHll DIAGNOSTIC
with S WR = 000001 it will ask you :
TYPE NO. Of' ADDRESSES (OCTAL) BETWEEN VECTORS (10 OR 20)
TYPE SCR ADDRESS FOR FIRST DHll 160020
TYPE VECTOR ADDRESS FOR FIRST DHll 330
TYPE DHll DEVICE SELECTION PARAMETER (which DHll)
TYPE LINE SELECTION PARAMETI.'R (wllich line)
TESTING DHll #00
Without TURN·AROUND·CONNECTOR test 42 and lutller will lail
SWITCH SETTINGS :
SW15 = I halt on error
SWl4 = I scope loop
SWI3= J'inhibit error print out
SWl2 = I

SWl1=
SW1O=
SW09=
SWOB=
SWOI",
SWOO=

inhibit iteration
inhibit modem control tests
lock on hard error
run test in SWR < 07:00>
type device map generated by the autosizer
manual parameter entry

2·27

ZDHNDO

DHII
DHll DATA RELIABILITY TEST

ABSTRACT;
This DHll diagnostic consists oj three sub-programs. Sub-program 1 is the
data reliabHity test. It can test up to 16 DHll one alter the other, using all
combinations oj line parameters (baude rate. character length. parity etc.).
All errors detected are reported on the console device as they occure and
also logged in error statistics tables. Sub-program 2 is a single line echo test.
able to test any line by using an terminal connected to this line and
Sub-program 3 is a data pattern/coble test using an H315 test connector on
the line under test.
OPERA TING PROCEDURES

.R ZDHNDO
This starts the test at address 200 (normal start).
This will run Sub-program 1 and will test all lines on all DHll Jound
set the SWR
000200 worst case testing
set the SWR :; 000002 to type the device map
To run the Sub-prgram 2 start program at address 214
II you start the program with SWR = 000001 you get into console dialog.
enter number oj addresses between vector":;. device address.
vector.
enter which DHll to select (in binary. 001 = DHll 100)
enter which line to select {in binary. 005 = line ID and 2
To run the Sub-program 3 start program at address 220
SWITCH SETTINGS:
SW15=
halt on error
SW14=
loop on currently selected DH 11
SWI3=
inhibi t printout
SW09=
halts aJter configuration to pemlit printing preconiig. map
SWDB= 1 perform a standard pass (with iterations)
SWOI= I type device map
SWOO= 1 allow user to input parameters

2-28

ZDHUBO

DHUII

FUNCTIONAL VERIFICATION TEST 1
ABSTRACT:

This diagnostic is part one of the DHUll functional verification test. This tests
the reset. selltest. register address. BMP code and interrupt functions of the
board. This test does not need a TURN-AROUND connector.
OPERA TING PROCEDURES :

.R ZDHUBO
This program is running under the supervisory program
This supervisory progrom will first talk to you
CZDHU-B-O
DHU-ll rUNC TST PARTl
UNIT IS DHU-ll
RSTRT ADR 145702
DR>STA
CHANGE HW (t) ? Y
'UNITS (0) ? 1
UNIT 0
CSR ADDRESS: (OJ 160460 ?
INTERRUPT VECTOR ADDRESS: (0) 310 ?
ACTIVE LINE BIT MAP: (0) 177777 ?
INTERRUPT BR LL'VEL: (0) 5 ?
CHANGE SW (L) ? Y
REPORT UNIT NUMBER AS EACH UNIT IS TESTED: (t) Y ?
ROM VERSION PRINTOUT ON THE FIRST PASS: (L) Y ?
EXTENDED ERROR REPORTING: (LJ N ?
NUMBER OF INDIVIDUAL DATA f:RRORS TO REPORT ON A LINE: (D) 0 ?

229

ZDHVBO

DHUll

FUNCTIONAL VERIFICATION TEST 2
ABSTRACT:
This diagnostic is part two of the DHU functional veriJication test. This tests
the basic and major comunication functions of the board. This progrom does
not perfoem extensive data tronsmitssion and reception tests.
OPERA TING PROCEDURES :

.R ZDHVBO
This program is running under the supervisory program
This supervisory progrom will iirst talk to you
CZDHV-B-O
DHU-ll FUNC TST PART 2
UNIT IS DHU-11
RSTRT ADR 145702
DR>STA
CHANGE HW (L) ? Y
'UNITS (D) ? J
UNIT 0
CSR ADDRESS: (0) 160460 ?
INTERRUPT VECTOR ADDRESS: (0) 310 ?
ACTIVE LINE BIT MAP: (0) 177777 ?
TYPE OF LOOPBACK (1 = INTERNAL. 2 = H3D29 or H3277): (0) 2 ?
CHANGE SW (t) ? Y
REPORT UNIT NUMBER AS f.'ACH UNIT IS TESTED: (t) Y ?
EXTENDED ERROR REPORTING: (L) N ?

2-30

ZDHWBO

DHUII

FUNCTIONAL VERIFICATION TEST 3
ABSTRACT:

This diagnostic is parl three 01 'he DHU lunctional veri/ication test. This tests
'he modem control signals 01 tIle board. This program does not perform
extensive data transmitssion and reception tests.
OPER.Jl. TING PROCEDURES :

.R ZDHWBO
This program is running unde'- the supervisory program
This supervisory program will lirst tallc to you

CZDHW-B-O
DHU-Il FUNC TST PART 3
UNIT IS DHU·ll
RSTRT ADR 145702
DR>STA
CHANGE HW (t) ? Y
'UNITS (D) ? 1
UNIT 0
CSR ADDRESS: (0) 160460 ?
ACTIVE LINE BIT MAP: (0) 177777 ?
TYPE OF LOOPBACK (1 = INTERNAL. 2 = H3029 or H3277): (0) 2 ?
CHANGE SW (L) ? Y
REPORT UNIT NUMBER AS EACH UNIT IS TESTED: (L) Y ?
EXTENDED ERROR REPORTING: (t) N ?
NUMBER OF INDIVIDUAL DATA ERRORS TO REPORT ON A LINE: (0) 0 ?

2-31

ZDHXAI

DHUll

FUNCTIONAL VERIFICA nON TEST 4
ABSTRACT:

This diagnostic is part lour 01 the DHU lunctional verjJication test. This tests
extensively data transmition and reception. This program also includes a
keyboard echo and modem loopback test.
OPERA TING PROCEDURES :

,R ZDHXAI
This program is running under the supervisory program
This supervisory program will lirst talk to you
CZDHX-A-O
DHU-ll FUNC TST PART 4
UNIT IS DHU-ll
RSTRT ADR 145702
DR>STA
CHANGE HW (L) ? Y
fUNITS (D) ? 1
UNIT 0
CSR ADDRESS : (0) 160460 ?
INTERRUPT VECTOR ADDRESS: (0) 310 ?
ACTIVE LINE BIT MAP: (0) 177777 ?
TYPE OF LOOPBACK (1 = INTERNAL. 2 = H3029 or H3277). 3 = H325
4 = MODEM. 5 = KEYBOARD ECHO): (0) 2 ?
CHANGE SW (L) ? Y
REPORT UNIT NUMBER AS EACH UNIT IS TESTED: (LJ Y ?
REPORT NUMBER OF BITS Tf:STf:D IN DMA ADDR TEST: (L) N ?
EXTENDED l:.'RROR REPORTING: (LJ N ?
NUMBER OF INDIVIDUAL DATA ERRORS TO REPORT ON A LINE: (D) 0 ?

2-32

OLII-E, c/o

ZOLAHO

DLll-E, c/o OFF-LINE DIAGNOSTIC
ABSTRACT:

Two separate diagnostic programs are provided for tIle OL11-E, ZOLA?? OL11-F:
off line tests and ZOLB?? DUI-E on-line tests. Tlte offline tests test all DLll·F:
logic and may be used to individually test up to 31 OLlI-E's. The 011 line tests
do not require a modem, however a special jumper connector is required
(11325). For the on~ljne test you need a modem and Ci suitable terminal device.
The DLll-C and DLlI·D can also be tested with this offline test. This are both
tested in maintenance mode (no turn-around). Tllere are five DLll's : A,B,C,D
and E.
M7BOO YA
DLll-A is 20 rnA current loop
DU loB is EIA RS232C
M7BOO
DU l-C is a more flexible DLll-A (20mA) M7BOO
.DL11-D is a more flexible DL11-B (EIA)
M7BOO
DLlI-E is with fuJJ modem control (HA) M7BOO
OPERA TING PROCEDURES

.R ZOLAIIO
This starts the test ott address 200 (normal start).
Restart address is 204.
TYPE PROGRAM NUMBER

o
1
2
3
4

inputlouput logic tests
transmitter scope loop
receiver scope loop
single character maint. mode data test
special binary count maint. mode data test

SWITCH SETTINGS :

SWl5 =
SWl4 =
SWI3=
S W 12 =
SW11 =
SWIO=
SW09=
SWDB=
SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SWDI=
SWOO=

halt on error
scope loop
inhibit error print out
selec t line number and lock on it
inhibit iteration
halt at end 01 current test
loop on selected routine
disable stall mode
routine to be run (if enabled by S W 09)
routine to be run (if enabled by SW 09)
routine to be run (if enabled by S W 09)
routine to be run (if enabled by S W 09)
routine to be run (if enabled by S W 09)
routine to be run (if enabled by S W 09)
routine to be run (if enabled by S W 09)

use "CONTROL GU to enter soltware SWH 01 loe /76.
2-33

ZDLDIO

DLII-W
DLll-W / 11/44 MFU-SLU TEST

ABSTRACT:
This is a logic test Jor the DLlI- W as well as the 11144 MPU-SLU (serial line
unit). The test can optionaly check transmit and receive signals with a H325
turnaround connector (SW 07= 1). This test is mainly for the console serial
line and line clock interlace. but can test up to 15 additional identically
configured DLlI interlaces. Console address 177560 vector 60, line-clock address
177546 vector 100. additional DLll address 176500 vector 300. The test is able
to handle power Jails. The ECHO test (start at 204) reads a character from
terminal and writes it back and reports any error. Type "CONTROL C" to
stop the ECHO test.
OPERA TING PROCEDURES
.R ZDLDIO

This starts the test ott address 200 (normal start).
Start address 204 will execute the L'CHO test.
Start address 210 will execute the terminal output test.

SWITCH SETTINGS :
SW15 =
halt on error
SW14 =
loop on current test
SW13=
inhibit error print out
SW12=
not used
not used
SWll=
enable error flags tests
SWlO=
loop on error
SW09=
enable BREAK function tests
SWOB=
SW07=
run datatest through loop-back connector
SWOG= 1 halt in ROMCLK routine belore clocking micro-proc.
SW05= I inhibit lineclock test
allow manual setting 01 DEVICE MAP
SW04=
inhibit SLU test (test only line clock)
SW03=
SW02= 1 Jor 11144 enable BREAK and ERROE FLAG test (SW B & 10 on)
SWOl= 1 11144 select auto initiation oj rIA test via turn around cable
SWOO= 1

use "CONTROL G" to enter software SWR at loc 176.

ZDLDCO this test needs modification Jor the 11144
ZDLDDO does not alow vectors greater then 376
ZDLDEO has several timing problems on 11144
ZDLDGO needs correction for 11/24
ZDLDHO the terminal output test did not dIed lor XON - XOPF

2-34

DMCII

ZDMCDO
DMCII BASIC R/W and MICRO-PROC. TEST

ABSTRACT:

This program tests the DMCII micro'processor (M8200· YA or M8200- YB). It
performs write/read tests on the DMC Unibus registers, cllecks the
micro-processor operation and its memory, exercises NPR's into main memory.
It does not require a line-unit. This test runs on a KMCll (MB204) however it
is not advised that this diagnostic he usod to checl, a KMCll r rother you
should check a KMCll with the KMCll diagnostic package. There are live off
line diagnostics that are to be nlll in sequence to insure that iI an error
should occure it will be detected at an early stage: ZDMC??, ZDME?? ZDMF??
ZDMG?? and ZDMH??
OPERA TING PROCEDURES :

.R ZDMCDO
this, with all switches down. will do a "AUTO SIZING"
with SWR bit 0= I will do manual input (questions)
with SWR bit 7= 1 will use existing parameters Irom previous DMCll
diagnostic runs.
in manual mode it will ask:
HOW MANY DMCll's TO BE TESTED ? 1 < CR>
01

CSR ADDRESS? 160010< CR >
VECTOR ADDRESS'! 310< CR >
BR PRIORITY LEVEL ? (4,5,6,7) ? 5 < CR >
DOES MICRO-PROCESSOR HAVE CRAM? (Y OR NJ N<CR>
WHICH LINE UNIT? IF NONE TYPE "N", IF MB201 TYPE "1",
IF MB202 TYPE "2" ? 1 < CR >
IS THE LOOP BACK CONNECTOR ON ? Y < CR >
SWI1'CH PACtl (DDCMP LINEf) ? 377< CR >
SWITCH PACt2 (BMB73 BOOT ADD) ? 377<CR>
SWITCH SETTINGS:

SWl5 =
SWI4=
SWI3=
SWI2=
SWll=
SWIO=
SW09=
SWOB=
SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SWOI =
SWOO=

halt on error
loop on current test
inhibit error print out
bell on error
inhibit iterotions
escape to next test on error
loop with current data
catch error and loop on it
use previous parameter table
halt in ROMCLK routine before clocking micro-proc.

reselect DMCIl's desired active
lock on selected test
restart program at selected test
build new status table from questillons
2-35

DMCII-AR/AL

ZDMED2

DMCll LINE UNIT TEST (008201/008202) 1
ABSTRACT:
This program tests the DMCll-AR and DMC ll-AL line unit. It performs
writel read tests on the DMC line unit registers. It checks lor proper transmitter,
receiver, and BCC operation in DDCMP mode. The modem signals are also
checked. This test requires a DMC micro-processor (M82DD or MB2D4) to run.
For best diagnosis a turn-around connector should be installed. however the
diagnostic will run without it (some tests are skipped). There are live 011 line
diagnostics that are to be run in sequence to insure that if an error should
occure it will be detected at an early stage : ZDMC??, ZDME??, ZDMF??,
ZDMG?? and ZDMH??
OPERA TlNG PROCEDURES :
.R ZDMED2

this, with all switches down, will do a "AUro SIZING"
with SWR bit D= 1 will do manual input (questions)
with SWR bit 7= 1 will use existing parometers from previous DMCII
diagnostic runs.
in manual mode it will ask.
HOW MANY DMCll's TO BE' TES1'f.'D ? i<CR>
01
CSR ADDRESS? 160010< CR >
VECTOR ADDRESS? 310< CR >
BR PRIORITY LEVEL? (4,5,6,7) ? 5<CR>
DOES MICRO-PROCESSOR HAVE CHAM? (Y OR NJ N<CR>
WHICH LINE UNIT? IF NONE TYPE "N", IF M8201 TYPE "1",
IF M8202 TYPE "2" ? 1 < CR >
IS THE LOOP BACK CONNECTOR ON ? Y < CR >
if the answer was "Y" and MB2Dl, YOIi have to enter modem type
SWITCH PACtl (DDCMP LINE'f) ? 37'l<CR>
SWITCH PACn (BMB73 BOOT ADD) ? 377<CR>
SWITCH SETTINGS :
SWI5 =
halt on error
SW14 =
loop on current test
SW13=
inhibit error print out
SW12= 1 bell on error
SW 11 = 1 inhibit iterations
SW1O=
escape to next test on error
SWD9=
loop with current data
SWDB =
catch error and loop on it
use previous parameter table
SWD7=
halt in ROMCLK routine belore c1oc1cing micro-proc.
SWD6=
SWD5=
SWD4=
SW03=
reselect DMCll's desired active
SWD2=
lock on selected test
restart program at selected test
SWDJ '"
SWDDbuild new status table from qucstHiollS
2-36

DMCII-AR/AL

ZDMFC2

DMCII LINE UNIT TEST (M8201/M8202) 2
ABSTRACT:

This program tests the DMCIl-All and DMCIl-AL line unit. It per/orms
write/read tests on tile DMC line unit registers. It cllecb lor proper transmitter,
receiver. and BCC operation in bit stuH mode. The modem signals are also
c1lecked. Tllis test requin~s a DMC micro-processo,- (M8Z00 or M8204) to run_
for best diagnosis a tum-around connector snouid be installed. however the
diagnostic will run without it (some tests are skipped). There are live 011 line
diagnostics 1110t are to be run in sequence to insure tllat iJ an error should
occure it will be detected at an early stage : lDMC?? lDME??, ZDMF??,
ZDMG?? and ZDMII??
OPERA TING PROCEDURES :

.R lDMFC2
this. with all switches down, will do a "AUTO SIZING"
with SWR bit 0= 1 will do manual input (questions)
wi/ll SWR bit 7= 1 will use existing palOmeter:; hom previous DMCll
diagnostic runs.
in manual mode it will asJc:
HOW MANY DMCll's TO BE Tf:S1'f:D ? 1< CI1 >
01
CSR ADDRESS? 160010< CR >
VE'CTOH ADDRESS? 31O<CR>
BR PRIORITY LEVEL ? (4,5,6,7) ? 5 < CR >
DOES MICRO-PROCESSOR HAVE CRAM? (Y OR NJ N<CR>
WHICH LINE UNIT? IF NONE TYPE "N", IF M8Z0l TYPE "I".
If M8Z02 TYPE "Z" ? 1< CR >
IS THE LOOP BACK CONNECTOR ON ? Y < CR >
if the answer was "Y" and MB201, you have to enter modem type
SWITCH PACtl (DDCMP LINEt) ? 377<CR>
SWITCH PACt2 (BM873 BOOT ADD) ? 377< CR >
SWITCH SETTINGS :
SW 15 =- 1 halt on error
SW14= 1 loop on current test

SW13 = 1 inhibit error print out
SW12= I bell on error
SW 11 = 1 inhibit iterations
SWI0= I escape to next test on error
SW09= I loop with current data
SWOB = I catch error and loop on it
SW07= , ! use previous parameter table
SW06= I holt in ROMCLK routine belore c10clcing micro-proc.
SW05 =
SW04 =
reselect DMCIl's desired active
SW03=
lock on selected test
SW02 =
restart program at selected test
SWOl =
build new status table Jrom ques/iuons
SWOO=
2-37

ZDMGDO

DMC Il-ARI AL
DMCll CROM & JUMP TST

ABSTRACT:
This program tests the DMCll-AR and DMCII-AL micro-processors (M8200-YA,
M8200- YB). It perlonns jump tests on the micro-processor and veriJies the
control ROM oj the M8200. This diagnostic will not nm on a KMC 11 (M8204),
however it is possible to load the KMC CRAM with the DMC micro-code. See
test 2 Jor details. There are Jive oil line diagnostics that are to be run in
sequence to insure that if an error should occure it will be detected at an
eady stage: ZDMC??, ZDME??, ZDMF??, ZDMG?? and ZDMH?? Parameters must
be set up to alert the diagnostics to the DMCll configuration.
OPERATING PROCEDURES
.R ZDMGDO
this, with all switches down, will do a "AUTO SIZING"
with SWR bit 0= I will do manual input (questions)
with SWR bit 7;;. 1 will use existing parameters Jrom previous DMCll
diagnostic runs.
in manual mode it will ask:
HOW MANY DMCll's TO BE TESTED ? 1 < CH >
01
CSR ADDRESS? 160010< CR >
VECTOR ADDRESS? 310< CH >
BR PRIORITY LEVEL? (4,5,6,7) ? 5<CR>
DOES MICRO-PROCESSOR HAVE CRAM? (Y OR NJ N<CR>
WHICH UNE UNIT? IF NONE TYPE "N", If M8201 TYPE "I",
If MB202 TYPE "2" ? 1 < CR >
IS THE LOOP BACK CONNECTOR ON ? Y < eH >
SWITCH PACIl (DDCMP UNE,) ? 377< CR >
SWITCH PACf2 (BMB73 BOOT ADD) ? 377<CR>
SWITCH SETTINGS:
SW 15;;.
halt on error
SW14;;.
loop on current test
SW13;;.
inhibit error print out
SW12= 1 bell on error
SW 11 = 1 inhibit iterations
SW 10 =
escape to next test on error
SWD9=
loop with cuo'ent data
SWDB =
catch error and loop Oil it
SW07=
use previous parameter table
SWD6=
halt in HOMCLK routine beJore clocking micro-proc.
SWD5.o..
SWD4=
reselect DMCll's desired active
SWD3=
lock on selected test
SWD2=
SWDI =
restart program at selected test
SWDD=
build new status table hom questiuons

2-38

ZDMHCI

DMCll
DMCII FREE RUNNING TESTS

ABSTRACT;
This program tests the DMC ll-AR (M8200- YA) and DMCll·AL (M8200- YB)or the
KMCll micro-processor (M8204). A line unit (M8201 or M8202) must be installed.
Currently there are Jive oH line diagnostics that are to be run in sequence
to insure that if on error should occure it will be detected at on early stage:

ZDI.fC??, ZD.A4£??, ZDMF??, ZDMG?? and ZDMH?? Pa: ameters must be set up
to alert the diagnostics to the DMC 11 conligur·ation. 1'l1ese parameters are
contained in the status table and are generated in two ways: I. manual input
- the operator answers questions. 2. autosizing· tlle program detennines the
parameters automaticaly.
4

OPERA TING PROCEDURES :

.R ZDMHCI
this. with all switches down. will do a "Auro SIZING"
with SWR bit 0= 1 will do manual input dialog (quest,ons)
with SWR bit 7= 1 will use existing pammeters Jrom previous DMCll
diagnostic runs.
in manual mode it will ask:

HOW MANY DMCll's TO BE: Tf.'SlTD ?
CSR ADDRE:SS ?
VE:CTOR ADDRE:SS ?
BR PRIORITY LEVEL? (4.5.6.7) ?
IF DMC HAS CRAM (8204) TYPE: "Y", IF CROM (M820D) TYPE "N" ?
DMCll-AR(REMOTE:.L.SPE:ED)OR DMCll-AL(LOCAL.H.SPE:E:D)TYPE "R" or "L"?
WHICH LU? IF NONE TYPE: "N". IF M8201 TYPE: "1". IF M8202 TYPE "2" ?
IS THE: LOOP BACK CONNECTOR ON ?
(O-377)
SWITCH PACU (DDCMP LINE: #) ?
(0·377)
SWITCH PACf2 (BM873 BOOT ADD) ?
SWITCH SETTINGS :

SWI5=
halt on error
SW14=
loop on current test
SW 13 =
inhibit error print out
SW12 = I bell on error
SWll -"" I inhibit iterations (quiclc pass)
SWlOo=:
escape to next test on error
SW09=
loop with current data
SW08=
cach error and loop on it
SW07=
use previous status table
SW06~
holt in ROMCLK routine before cloclcing micro-proc.
SW03=.o
reselect DMCII's desired active
SW02=
loclc on selected test
SWOl=
restart program at selected test
SWOO=
build new status table from questions.

2-39

ZDMID3

DMRII
DMRll FUNCTIONAL DIAGNOSTIC

ABSTRACT:
It is advised that the static diagnostic be run before these functional
diagnostics. It is assumed that the processor is in proper working condition.
Ensure that the swich 1 at location E·85 on the M8201 is on. II this switch is
oil, the maintenance bits in BSELl can't be used and certain tests will not be
correctly run. When choosing a cable test connection, ensure that the switch
pack E·39 on the M8203 is properly set up for the desired interlace. II chosing
test configuration option 1·4, it is not necessary to select the interlace: however
the baud rate must be correct. For example to run config. 3 (H3255·EIA) it is
nessary to have the baud rate to be within the £lA range.
OPERA TING PROCEDURES :

.R ZDMID3
This program is running under the supervisory program
This supervisory program will jin;t talk to you
CZDMI·D·O
DMR 11 FUNCTIONAL TESTS
UNIT IS DMR 11
RSTRT ADR 145102
DR>STA
CHANGE HW (L) ? Y
fUNITS (0) ? 1
UNIT 0
CSR ADDRESS: (0) 160110 ?
VECTOR ADDRESS: (0) 300 ?
TEST CONFIGURATION
o INTERNAL (NO CONNECTOR)
H3254 V.35
(NOTE: MODE 1·4 ALLOWS
2
H3254 . INTEGRAL
PROGRAM INTERFACE SELECTION)
3
H3255· RS232C/423
4
H3255· RS422
5
CABLE AND SW PACK INTERFACE SELECTED
(V. 35·H3250, RS232C·H325, £154231 422-H325l)
INTEGRAL·BC55A·lD,

* SELECT THE FOLLOWING ONLY U' THt' MODEM SUPPOFITS LOOPBACK *
6 == LOCAL LOOP
1 = REMOTE LOOP
(OJ 5 ?
CHANGE SOfTWARE (LJ ? N

2-40

~8200/~8204/07

ZD~PDO

DMP/DMR/DMC/KMCll M8200104/07 MICROPROCESSOR TEST 1
ABSTRACT;

This program tests M8200. M8204 or M8207 microprocessor. It is the lirst 01 two
diagnostics lor these options. The M820x microprocessor uses an eight bit data
patll with a sixteen bit instruction memory. 1'11e instruction memory and data
memory are two separate memories. The microprocessor is designed Jor
moving data at high rates ;0 work os 0 lligh speed liIlk between processors
when used with a line unit. The M8200 and M8207 llOve PROM instruction
memories. The M8204 has writable control store. The memory size between
all three processors vary also.
OPERA TING PROCEDURES :

.R ZDMPDO
This program is running under the supervisory program
This supervisory program will lirst talk to you
CZDMP·D·O
M8207 DIAG. II OF 2
UNiT IS M8200.M8204.0R M8207
RSTRT ADR 145702
DR>STA
CHANGE HW (L) ? Y
IUNITS {D) ? 1
UNIT 0
WHICH MICRO·CPU? (O=M8200. 4=M8204. 7=M8207 (0) 7 ?
MICRO·CPU CSR ADDRESS: (0) 160170 ?
MICRO·PROCESSOR VECTOR ADDRESS : (0) JOO ?
MICRO· PROCESSOR PRIORITY LEVEL (0) 5 ?
No software parame ters available

2·41

ZDMQEO

M8200/M8204/07

DMP/DMH/DMC/KMCll M8200/04/07 MICROPROCESSOH TEST 2
ABSTRACT:
This program tests M8200. M8204 or M8207 microprocessor. It is the second 01
two diagnostics lor these options. The M820x microprocessor uses an eight bit
data path with a sixteen bit instruction memory. The instruction memory and
data memory are two separate memories. The microprocessor is designed lor
moving data at high rates to work as a high speed link between processors
when used with a line unit. The M8200 and M8207 have PROM instruction
memories. The M8204 has writable control store. The memory size between
all three processors vary also.
OPERA TING PROCEDURES :

.R ZDMQEO
This program is running under the supervisory program
This supervisory program will first talk to you
CZDMQ-E-O
M8207 DIAG. f2 OF 2
UNIT IS M8200.M8204.0R M8207
RSTRT ADR 145702
DR>STA
CHANGE HW (L) ? Y
tUNITS (D) ? 1
UNIT 0
WHICH MICRO-CPU? (0 = M8200. 4 = M8204. 1 = M8201 (0) 7 ?
MICRO-CPU CSR ADDRESS; (0) 160170 ?
MICRO-PROCESSOR RUN SWITCH TYPE 0 If Off. 1 If' ON : (0) 1 ?
No soltware parameters available

2-42

ZDMRFO

M8203

DMCll/DMRll/KMCll M8203 LINE UNIT STATIC TEST 1
ABSTRACT:

This program tests M8203 synchronus line unit module whic}l supports both
character-oriented (VDCMP. BSC. .. ) and bit oriented (SDLC. HDLC .. .) protocols_
The purpose 0/ this program is to per/om1 diagnostc lesting 0/ all M8203 logic
in a relatively static manner. The following Junctions will be pedormed: line
unit register addressing. USYRT addressing. static hit interaction and
read/write logic test. Put H3254 and H3255 . H325. H3250 or H3251 test connector
in (il not present. some tests will be skipped).
OPERA TING PROCEDURES :

.R ZDMRFO
This program is running under the supervisory program
This supervisory program will /irst tolk to you
CZDMR-F-O
M8203 STATIC LOGIC TESTS - PART I OF 2
UNIT IS M8203
RSl'RT ADR 145702
DR>STA
CHANGE HW (L) ? Y
#UNITS (VJ ? 1
UNIT 0
DEVICE CSR ADDRESS: (OJ 160170 ?
M8207 RUN SWITCH (E28 SW7) - TYPE 0 ·IF OFF. I IF ON : (0) I ?
CHANGE SW (L) ? N
No software parame ters available

2-43

ZDMSFO

M8203

DMCll/DMRll/KMCll M8203 UNE UNIT STATIC TEST 2
ABSTRACT:

This program tests MB203 synchronus line unit module which supports both
character-oriented (DDCMP, ESC . .. ) and bit oriented (SDLC, HDLC ... ) protocols.
The pUIpose oj this program is to pedonn diagnostc testing oj all M8203 logic
in a relatively static manner. The Jollowing Junctions will be pedonned: line
unit register addressing, USYRT addressing. static bit interaction and
read/write logic test. Put H3254 and H3255 , H325. H3250 or H3251 test connector
in (iJ not present. some tests will be skipped).
OPERA TING PROCEDURES :

.R ZDMSFO
This program is running under the supervisory program
This supervisory program wjlJ linst talk to you
CZDMS-F-O
MB203 STATIC LOGIC TESTS - PART 2 OF 2
UNIT IS M8203
RSTRT ADR 145702
DR>STA
CHANGE HW (L) ? Y
'UNITS (0) ? 1
UNIT 0
DEVICE CSR ADDRESS.: {OJ 160170 ?
M8203 REG 11 (E134 SWlO.9 . E121 SW9.10 : {OJ 0 ?
MB203 REG 15 (E134 SWB-l) : (a) 0 ?
M8203 REG 16 {E121 SWB-lJ (0) 0 ?
SELECT TURNAROUND TYPE; 0 = H3254&H3255. 1 =:. H325.
2=H3250. 3= H325 1, 4=INTEGRAL MODE'M HDX SWITCH.
5=MOD LOC. 6=MOD REM, 7= NONE' : (a) 0 ?
SELECT BAUDE RATE; TYPE '0' FOR 2.4K; '}' FOR 4.8K;
'2' FOR 9.6Ki '3' FOR 19.2K; '4' FOR 56K; '5' FOR 250K;
'6' FOR 500K; '7' FOR 1 MEG BAUD: (0)
CHANGE SW (L) ? N

2-44

DUPll

ZDPBCO
DUPll (M7867) orLINE SDLe XMTR

ABSTRACT:
The function of this program is to verily Ihat tile option operates according
to speci/ications. Parameters may be set to alert diagnostics as to the DUPll
configuration by answering the parameter dialog. All questions should be
answered and then each diagnostic will overlay tllese parameters wl)ich are
stored in the memory (in the status tabie;' The diagnostic wiii nm up to eight
consecutively addressed and consecutively vectored DUP 11 's in a chain mode.
This program tests the control and status registers. In addition, the transmitter
SDLC functions are checked in maintenance internal mode.
OPERA TING PROCEDURES :
.R ZDPBCO

This will start the DUPll test at address 200
with switch-reg 000000 it will use default parameters
CSR = 160050 VECTOR 770
With switch-reg
"000001" before starting at 200 ,new parameters
are requested.
With switch-reg
"000200" before starting at 200 ,it will use
parameters from previous DUPll tests rim before.
/I you enter new parameters, it will ask you:
REC CSR ADDRS
VI::C ADRS
PRIORITY (4 TO 7)
OF DUP's (IN OCTAL)
IS THE OPTIONAL CLR IMPR IN? (Y OR NJ
IS THE H325 CONNECTOR ON? (Y OR N)

SWITCH SETTINGS :
SWI5=
halt on error
loop on current test
SWI4=
inhibit error print out
SWl3=
SW12= I bell on error
SWll= 1 inhibit iterations
escape to next test on error
SWIO=
SW09=
loop with current data
SWOB = 1 catch error and loop on it
SW07= ,I use previous status table
SW06=
not used
select DUPll's desired active
SW03=
lock on selected test
SW02=
SWOl=
restart program at selected lest
SWOD=
enter parameters using manual dialog

iI Ihe CPU has no switch register it will use memory loco 176
use "CONTROL Gil to enter software SWR at loc 176.

2-45

ZDPCDO

DUPII

DUPII (M7867) orLlNE SDLC RCVR
ABSTRACT;
The Junction 01 this program is to verily that tlle option operates according
to specifications. Parameters may be set to alert diagnostics as to the DUPll
configuration by answering the parameter dialog. All questions should be
answered and then each diagnostic will overlay these parameters which are
stored in the memory (in the status table). The diagnostic will run up to eight
consecutively addressed and consecutively vectored DUPll's in a chain mode.
ZDPDxx tests the receiver SDLC functions in maintenance internal mode, that
is, clocking of the device is done by the program.
OPERA TING PROCEDURES

.R ZDPC??
This will start the DUPll test at address 200
with switch-reg OOQOOO it will use default pammeters
CSR := 160050 VECTOR 770
With switch-reg
"000001" before starting at 200 ,new parameters
are requested.
With switch·reg
"000200" be/ore starting at 200 ,it will use
parameters trom previous DUPll tests run before.
11 you enter new parameters, it will ask you:
REC CSR ADDRS
VEC ADRS
PRIORITY (4 TO 7)
I OF DUP's (IN OCTAL)
IS THE OPTIONAL CLR IMPR IN? (Y OR NJ
IS THE H325 CONNECTOR ON? (Y OR N)
SWITCH SETTINGS :
SW15:=
halt on error
SW14:=
loop on current test
SW13:=
inhibit error print out
SW12:= 1 bell on error
SWll:= 1 inhibit iterations
SWlO:= 1 escape to next test OJ) enol'
SW09:= 1 loop with current data
SWOB:=
catch error and loop on it
SW07:=
use previous status table
SWOG:=
not used
select DUPll's desired active
SW03=
lock on selected test
SW02=
SW01=
restart program at selected test
SWOO=
enter parameters using manual dialog
if the CPU has no switcll register it will use memory loco 176

use "CONTROL G" to enter software SWR at loc 176.

2-46

ZDPDDO

DUPII
DUPII (M7867) SOLe TEST

ABSTRACT:
The lunction 01 this progrom is to verily that the option operates according
to specilications. Parameters may be set to alert diagnostics as to the DUPll
configuration by answering the parameter dialog. All questions should be
answered and then e~ch diagnostic will overlay these parameters which are
stored in the memory (in the status table) TIle diagnostic will nm up to eight
consecutively addressed and consecutively vectored DUPll's in a chain mode.
ZDPDxx tests the DUPll to run a limited SDLC protocoll and long data patterns.
Specilic data patterns are run to prove bit-stull capability. The EIA data gates
are proven and the priority logic lunctions are checked.
OPERA TING PROCEDURES

.R ZDPD??
This will start the DUPll test at address 200
with switch-reg 000000 it will use default parameters
CSR = 160050 VECTOR 770
With switch-reg
"000001" before starting at 200 .new parameters
are requested.
With switch-reg
"000200" before starting at 200 .it will use
parometers Irom previous DUPll tests run before.
If you enter new parometers. it will ask you:
REC CSR ADDRS
VEC ADRS
PRIORITY (4 TO 7)
IS THE OPTIONAL CLR ]MPR IN? (Y OR N)
IS THE H325 CONNECTOR ON? (Y OR N)
SWITCH SETTINGS :

SWI5=
SW14=
SW13=
SW12=

SWll=
SWIO=
SW09=
SWOB=
SW07=
SW06=
SW03=
SW02=
SWOI=
SWOO=

halt on error
loop on current test
inhibit error print out
1 bell on error
I inhibit iterations
escape to next test on error
loop with current data
catch error and loop on it
use previous status table
not used
select DUPll's desired active
lock on selected test
restart program at selected test
enter parameters using manual dialog

i1 the CPU has no switch register it wilJ use memory loco 176
use "CONTROL G" to enter software SWR at loe 176.

2-47

ZDPECO

DUPII
DUPII (M7867) CONFIDENCE TEST
ABSTRACT:

The function of this program is to provide a level of confidence in the operation
of the DUPll without changing jumpers or switches from customer
configuration. The option is tested in SDLC mode, then in DEC mode using a
simulated DDCMP-line protocol with an imbedded CRC character. Both of this
modes will be tested over a cable if a turnaround is possible. The modem
control lines wi11 also be tested it the H325 turnaround connector is used. The
determination of what will be tested is done by answering a :~parameter
dialog". Additionaly the modem data leads may be tested it a modem has
the analog loopback feature enabled.
OPERA TING PROCEDURES :

.R ZDPE??
This will stati the DUPll test at address 200
with switch 7 = "0" new parameters are needed.
with switch 7 = "1" before starting at 200 old parameters
from previous tests are used.
if you enter new parameters, it will ask you:
REC CSR ADDRS
VEC ADRS
IS A MODEM WITH ANALOG LOOPBACK ENABLED CONNECTf.'D? Y OR NJ
IS THE H325 CONNECTOR ON? (Y OR NJ
ARE THE DEFAULT JUMPERS ALL IN? (Y OR NJ
IS THE OPTIONAL CLR JUMPER IN? (Y OR NJ
SEC TX JUMPER IN? (Y OR NJ
SEC RX JUMPER IN? (Y OR NJ
ARE DSC 1 AND 2 BOTH IN? (Y OR NJ
SWITCH SETTINGS :

SWl5=
halt on error
loop on current test
SWl4=
inhibit error print out
SW13=
SWl2= 1 bell on error
SWll= 1 inhibit iterations
SWlO= 1 escape to next test on error
not used
SW09=
catch error and loop on it
SWOB=
SW07=
use previous status table
lock on selected test
SW02=
restart program at selected te.:;t
SWOl =
SWOO=
not used
11 the CPU has no switch registel- it will use memory 10c:. 176
use "CONTROL G" to enter .:;oitware SWR at loe 176.

2-48

ZDRBIO

DRII-B

DRII-B (four slot backplane) NPR DIAG.
ABSTRACT:

This is a logic test 01 the "NPR GENE'RAL INTERFACE" DRll·B. There is a
special maintenance leature that allows testing 01 NPR's without a customers
device attached. There is a second test included lor exercising the DAll·B
interprocessor link. The DRll·B test should be run in each computer be/ore
testing the DA11 . B. VAl J-B consisting of 2 1,,17229 modules and 2 BC08R cables.
OPERA TING PROCEDURES

.R ZDRB??
This will start the DRll·B test at address 200
Starting lor the DAll·B
load address 1006 lor the slave computer press start.
computer will halt.
load address 1000 lor the master computer press start.
computer will halt.
press continue on the slave
press continue on the master
SWITCH SETTINGS :

SW15 = halt on error
SWI4:::
loop on current test
SWI3:::
inhibit error print out
SWI2=
inhibit tmce trap
SWll:::
inhibit itemtions
SWlO:::
not used
SW09=
not used
SW02::: binary BR level 01 DRll·B (4.5 or 6)
SWOl::: binary BR level 01 DRll·B (4.5.or 6)
SWOO::: binary BR level 01 DRll·B (4.5.or 6)
if SW02·SWOO = 0 the BR level 01 the DRll·B is assumed ::: 5
if the CPU has no switch register it will use memory loco 176

use "CONTROL G" to enter soltware SWR at loc 176.

2-49

ZDReHl

DRII-C

DRll-C (M7860) with Testcable BC08R
ABSTRACT;
This is a logic test oj the DR ll-C. Fo.r this test to operate a special maintenance
cable must be connected (BC08RJ. This test will check up to 32 sequentional
DRll-C's.
OPERA TING PROCEDURES :
.R ZDRC??

This will start the test at address 200
use 204 Jor special entronce - Jor testing unique DRll-C
use 210 lor restart
For start address 204 :
lst halt - set switches to CSR address 01 DRll-C - press continue
2nd halt - set switches to Vector address oj DR ll-C - press cont.
set switch 10 to "1" to inhibit sequencing to next DR ll-C
SWITCH SETTINGS :
SWl5 = 1 halt on error
SW14 = 1 loop on current test
SW13= 1 inhibit error print out
SW12= 1 not used
SWll =
inhibit iterotions
SWlO=
do not advance to next DR lJ-C
SW09=
inhibit printout oj device tested
if the CPU has no switch register it will lise memory loco 176
use "CONTROL G" to enter soJtwore SWR ot loc 176.

2-50

DZII

ZDZAIO
DZll (M7819 EIA and M7814 20m)

ABSTRACT:

Parometers may be supplied to tIle program by eitl1er "auto sizing" or input
from the user on the console by having SWOO= I at start time. Auto sizing
will be done only the lirst time the progrom is started and SWOO. 03.01 = 00.
The autosizer detects DZll address and vector'S and determine wether it is a
CIA or 20mA board. A turnaround connector is needed in order to tast the
parity and break logic. Test with SWR = 000 does not need a TURN-AROUND
connector.
H3271 = Turnaround connector lor EIA module. - H3190 Jor 20mA module
H325 = Turnaround and dispatch pa~nel testing lor EIA module.
OPERA TING PROCEDURES :

.R ZDZAIO
with SWR = 000. will do a "AUTO SIZING", with SWR = 001 manual input
in manual mode it will ask:
1ST CSR ADDRESS (160000: 163700):
1ST VECTOR ADDRESS (300:770):
BR LEVEL (4:6):
TYPE "A" FOR EIA MODULE OR "B" FOR 20 MA (A:B):
maintenance mode
[EXTERNAL < H325 > -EIA ONL Y (E)]
[INTERNAL < DZCSR03 = I>
(In
[STAGGERED <H3271 >-EIA ONLY (S))
[STAGGERED <H3190>-20MA ONLY (S)}
t OF DZ)l's <IN OCTAL> (1:20):
It will print "END PASS CZDZA-I CSR: 160100 VEC: 310....
Starting at address 210 with SWR = 002 calles the CABLE/ECHO - TERMINAL
TEST
to verily the cables and distribution pannel. Put a terminal on any line. select
the baude rote and line on the console terminal. The progrom prints on the
console: TERMINAL ECHO TEST. and on the terminal connected to the DZ:
THE QUICK BROWN FOX JUMPED ....
SWITCH SETTINGS:

SWI5=
halt on error
SWI4=
loop on current test
SWI3=
inhibit error print out
SWI2= I bell on error
SWII = I inhibit iterotions
SWIO= I escape to next test on error
SW09= I loop with current data
SWOB= 1 catch error and loop on it
SW07= I use previous parameter table
SW06= 1 reselect DZII's desired active
SW04= 1 select delay parometer
SW03=
extro parameter inputs (speed . .. J
SW02=
lock on selected test
SWOl=
restart program at selected test
SWOO=
build new status table from questiuons
2-51

ZKCAAO

KMCII-A

KMCll-A lOP M8204 MICRO DIAGNOSTIC
ABSTRACT:

This program tests the KMC micro-processor. It perlorms write / read tests on
the KMC unibus registers. checks the micro processor operation, checks out
main memory. scratch pad memory, the ALU Junctions as well as interrupts
and NPR operation. It does not require a line-unit to run.

OPERA TING PROCEDURES :
.R ZKCAAO
this, with all switches down, will do a "AUTO SIZING"
with SWR bit 0= 1 will do manual input (questions)
with SWR bit 7= 1 will use existing parameters irom previous KMCll
diagnostic runs.
in manual mode it will ask:

HOW MANY KMCll's TO BE TESTED? I <CR>
01
CSR ADDRESS? 160010< CR >
VECTOR ADDRESS? 310<CR>
BR PRIORITY LEVEL ? (4,5,6,1) ? 5 < CR >
WHICH LINE UNIT? IF NONE TYPE "N", IF M8201 TYPE "l".
IF M8202 TYPE "2" ? I<CR>
IS THE LOOP BACK CONNECTOR ON ? Y< CR >
SWITCH PACtH (DDCMP LINEI) ? 311< CR >
SWITCH PACI2 (BM813 BOOT ADD) ? 311< CR >

SWITCH SETTINGS:
SWl5 = 1 halt on error
SW14= 1 loop on current test
SWI3=
inhibit error print out
SW12=
bell on error
SWll=
inhibit iterations
SWIO=
escape to next test on error
loop with current data
SW09=
catch error and loop on it
SWOB=
use previous parameter table
SW07=
halt in ROMCLK routine before clocking micro-proc.
SW06=
SW05=
SW04=:;
reselect KMCll's desired active
SW03=
lock on selected test
SW02=
restart program at selected test
SWOl =
SWOO=
build new status table hom quesliuons

2-52

KMCII-A

ZKCCAI

KMCll-A M8204 READ/WRITE MICRO-PROC. TEST
ABSTRACT:
This progrom tests the KMC micro-processor. It perlorms write I read tests on
the KMC unibus registers, checks tIle micro processor operotion, checks out
main memory. scrotch pad memory, the ALU functions as weH as interrupts
and NPR operotion. It does not require a line-unit to run.
OPERA TING PROCEDURES :

.R ZKCCAI
this, with all switches down. will do a "AUTO SIZING"
with SWR bit 0= I will do manual input (questions)
with SWR bit 7= 1 will use existing parometers from previous KMCll
diagnostic runs.
in manual mode it will ask:

HOW MANY KMCll's TO BE TESTED? l<CR>
01
CSR ADDRESS? IGOOJO<CR>
VECTOR ADDRESS? 310< CR >
BR PRIORITY LEVEL ? (4.5.6.7) ? 5 < CR>
WHICH LINE UNIT? IF NONE TYPE "N", IF M8201 TYPE" 1",
IF M8202 TYPE "2" ? 1 < CR >
IS THE LOOP BACK CONNECTOR ON ? Y< CR >
SWITCH PACU (DDCMP LlNEI) ? 377<CR>
SWITCH PACn (BM873 BOOT ADD) ? 377<CR>
SWITCH SETTINGS :
SW15 = J halt on error
SW14= 1 loop on current test
SW13= I inhibit error print out
SWI2= I bell on error
SWll = I inhibit iterotions
SWIO= I escape to next test on error
SW09= I loop with current data
SWOB = I catch error and loop on it
SW07= I use previous parameter table
SWOG =
holt in ROMCLK routine before clocking micro-proc.

SW05=
SW04=
SW03 =
SW02 =
SWOJ =
SWOO=

reselect KMCll's desired active
lock on selected test
restart program at selected test
build new status table from questiuons

2-53

ZKCDAO

KMCII-A/AR

MAIN MEMORY, JUMP AND CRAM TESTS ON MICRO-PROC.
KMCll-A or -AR (M8204/M8200-YA) with KMCll-DA/FA
ABSTRACT:

This progrom tests the KMC micro·processor. Parometers must be set up lor
the diagnostic to the KMCll configuration. They are generated in two ways
. manual input or autosizing. This program tests the KMCll-AR micro processor
(M8204-YA) with low speed crom, or the KMC11 (M8204). It performs jump tests
on the micro-processor, and tests the CRAM and other unique lunctions 01 the
M8204. II a KMCII-AR (MB200- YA) and line unit (M820J) are present, Jree-running
tests are performed. These tests are skipper iJ a KMC (M8204) or no line-unit
is present.
OPERA TING PROCEDURES :

.R ZKCDAO
this, with all switches down. will do a "AUTO SIZING"
with SWR bit 0= 1 will do manual input (questions)
with SWR bit 1= 1 will use existing parometers Irom previous KMCll
diagnostic runs.

in manual mode it will ask;
HOW MANY KMCll's TO BE Tf.'STED ? l<CR>
01
CSR ADDRESS? 160010< CR >
VECTOR ADDRESS? 310< CR >
BR PRIORITY LEVEL ? (4.5.6,1) ? 5 < CR>
WHICH UNE UNIT? IF NONE' TYPE "N", IF M820l TYPE "1",
IF M8202 TYPE "2" ? 1 < CR >
IS THE LOOP BACK CONNECTOR ON ? Y < CR >
SWITCH PACtl (DDCMP UNEI) ? 377<CR>
SWITCH PACf2 (BMB13 BOOT ADD) ? 377<CR>
SWITCH SETTINGS:
SW15= 1 halt on error
SWI4= I loop on current test
SWl3= I inhibit errol" print out
SW 12 = 1 bell on error
SWll = 1 inhibit iterotions
SW1O= 1 escape to next test on error
SW09= 1 loop with current data

SWOB =

catch error and loop on it
use previous parameter table
SW06= 1 halt in ROMCLK roullne beion: clocking micro·proc.
SW05= 1

SW07=

SW04 :;
SW03 =

reselect KMCIl's de:;ired active
SW02 =
lock on selected te:;t
SWOl=
restart program at selected test
SWOO
I build new status table Imm 4uestlllons
2-54

RM02/03/0S

ZRMOBI

FUNCTIONAL TEST PART 3
ABSTRACT:

This program continues from part 2 and tests extensively write read and write
check operations using different data patterns. Select t11e 'TYPE HELP TEXT
(L) N ? to list all tests performed. Each unit to be tested must be loaded with
a scratch pack.
OPERA TING PROCEDURES :
START ADDRESS
SA = 200 nonnal startaddress (address = 176700, vector
SA = 204 to change address and vector of the RH/RM

254)

The program will print:
CZRMOBO - RM05/ 3/ 2 FUNCTIONAL TEST, PT 3
SWR :::: 000000 NEW ::::
you can change the switcll register now.
11 you have a switch register on the CPU change it there.

TYPE HELP TEXT (L) N ?
you can answer with 'Y' and it will print the list of all tests
and the meaning 01 tIle switch settings.
You have to select a drive or type 'A' lor all drives.

To ensure that no bad headers are left on tile disk pack, tllis program
should be halted by typing a CONTROL C, As a resolt, tIle program will
be halted when the drive under test has completed testing.
SWITCH SETTINGS :
SWI5:::: 1 halt on error
SWI4:::: 1 loop on test
SWI3= 1 inhibit error typeout:;
SWI2::::
inhibit item/ions
SWJl=
bell on error
SWIO=
loop on specjJic error
SW09=
SWOB= I loop on test as per S W < 07·00 >
SW07= 1 TN 12B

SWOG=
SW05=
SW04=
SW03=
SW02=
SWOI =
SWOO=

TN 64
TN 32
TN 16
TN 08
TN 04
TN 02
TN OJ

3-54

ZKMBAO

KMCII-B

KMCll-B M8206 STATIC TEST PART 1
ABSTRACT:
This progrom tests 1 to 64 KMCll-R modules. It consists oj a set 01 sequential
logic tests used to verily the logic 01 the KMC ll-R. It is nm be/ore. and in
conjunction with ZKMRxx to lully check tIle KMCll-R logic .

. R ZKMRAO
This program is running under the supervisory program.
This supervisory progrom will first talk to you.
CZKMR-A-O
CZKMRAO KMCII-R STATIC PART J
UNIT IS M8206
RSTRT ADR 145702
DR > STAIFLAG:PNT
CHANGE HW (LJ ? Y
It UNITS (OJ ? I

UNIT 0,.
CSR ADDRESS: (OJ 174100 ?< CR >
VECTOR ADDRESS: (OJ 300 ?<CR>
PRIORITY LEVEL : (0) 5 ? < CR >

2-55

ZKMCAO

KMCII-B

KMCll-B M8206 STATIC TEST PART 2
ABSTRACT:
This program tests 1 to 64 KMCII-B modules. It consists oj a set oj sequential
logic tests used to verily the logic oj the KMCI1-B. It is run aJter, and in
conjunction with ZKMBxx to Jully check the KMCll-B logic.
OPERA TING PROCEDURES :

.R ZKMCAO
This program is running under the supervisory program.
This supervisory program will Jirst talk to you.
CZKMC-A-O
CZKMCAO KMC I1-B STATIC PART2
UNIT IS M8206
RSTRT ADR 145702
DR>STAIFLAG:PNT
CHANGE HW (L) ? Y

* UNITS (D) ? 1
UNIT 0
CSR ADDRESS: {OJ 174100 ?< CR >
RUN REMOTE POWERFAIL TEST? O=NO, 1 = YES

2-56

(0)

O<CR>

KWII-P

ZKWBJI

KWll-P PROGRAM. REAL TIME CLOCKL TEST
ABSTRACT:
This diagnostic verilies proper operation oj the KWI1·P. It contains a series
01 incremental routines that test the control and status register, count set
buHer, counter, and interrupt vector address using 100 KHz, 10KHz line and
external lrequencies.
OPERA TING PROCEDURES
R ZKWB??

START ADDRESS
SA = 200 normal start
SA = 204 restart address (primarily used by XOR testel'
SA = 210 timing test
SA = 214 double or single real time clock test 100 KHz
SA = 220 double or single real time clock test 10 KHz
SA = 224 double or single real time clock test 60 Hz
SA = 230 double or single real time clock test 50 Hz
II no hardware switch register is available the program will automatically
use the contens 01 loc 176 as the soltware switch register.
SWITCH SETTINGS:
SW15=
halt on error
SW14=
loop alter error is detected
SWI3=
inhibit error reports
SWI2=
SWll =
inhibit iterations
SWlO=
SW04=
enable synchronisation tests (2 KWll-P interl. needed)
SW03= 1 adjusts delays lor 11160, 11170 or 11145 with MOS
SW02= 1 CLK2 present-execute repeatability tests

2-57

KXJII-CA SLAVE CPU

ZKXABO

KXJlI-CA 1/0 SLAVE CPU TEST
ABSTRACT:
This diagnostic is a Junctional test oj the entire module. It consists oj two
major sections: the KXJ11-CA test code and the :;upport routines which reside
in the arbiter's memory. The suppor routines include routines to: size arbiter
memory. determine what type oj processor tIle orbilter cpu is (KDJ1l. KDF11
ect.) and communicate between the arbitter and the slave CPU. This diagnostic
can run in three modes : SHC mode tests the KX/l1·CA as a single board
computer (to enter this mode bit 11 in the software switch register 176 must
be set to = I and the lOP ID swich on the KX/ll-CA to be tested must be
set to 0 or I), single lOP mode tests the KX/ll·CA as the only I/O processor
in an arbitter system, or multiple lOP mode can test up to 14 KX]11-CA modules
on the arbiter's Q-HUS.

To run this test your system needs DLVll (DLVll-]. . .)compatible serial line
ports Jor each KX/ll-CA to be tested plus one for the orbter's console port.
OPERA TING PROCEDURES :
The diagnostic is loaded via a mass storrage device connected to the arbiter
RUN ZKXABO
SWITCH SETTINGS :
SWl5 =
halt on error
SW14=
inhibit error summary
SWI3=
inhibits error reports
SW12=
lOP IDI is known good Jor testing
SWll=
test stand alone lOP
execute extanded memory test
SWlO=
loop on error
SW09=
SWOB=
loop on test in SWR<6:0>
SW07=
inhibit test number/title

2-58

LA36 TERMINAL

ZLAFAI

LA36 TERMINAL ON DLll TEST
ABSTRACT:

This diagnostic verifies proper operotion of the LA36 tenninal on DLll. DLVll
type interlace. Up to 48 terminals. including the console device. can be tested
at a time. Control of this diagnostic may be through a switcll register. or via
interactive console terminal commands. TIle diagnostic sell sizes the system
as 10;- as the interfaces, and ther intern;pt vectors.
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 nonnal start
SA = 1372 restart address
The diagnostic will ask if console control is desired. Answer "Y" if you want
to use interoctive commands. otheJwise type "N" for switch register control.
11 "Y" is typed a menu of available commands is printed on the console. and
the progrom will wait for command input.
When switch register control is selected the program wjJJ halt. Set the
switches. then press continue.
SWITCH SETTINGS :
SWl5 = I halt on error
SW14 = 1 loop after error is detected
SW13 = I inhibit error reports
SW12=
print interlace table
inhibit iterotions
SWll=

SWIO=
SW06=
SW05=

run all tests in sequence
run all available lines

2-59

ZLDIAO

DECSA

DECSA REPAIR LEVEL DIAGNOSTIC
ABSTRACT;
The program is called the LOADABEL DIAGNOSTIC IMAGE. The communication
server can request the loading and running oj the loadable diagnostic image
"LDr aJter successJul completion oj the seli·tests.
OPERA TING PROCEDURES :
press START button
wai t Jor 88.88 to blink
press TEST button to "IN" position
display shows ethernet address. then L 3~ ...... 50 . this is loading image
take TEST button out (by pressing in again)

Connect a local terminal onto the DECSA behind the pannel (1200 baude)
This should display PLU>
PLU>H (help) prints you a help message
RUN CIDSAA. or CIDSBA. or S YSEXE

Currently there are Jive diagnostics and a system exerciser that can be
executed separately in manual mode.
This program is running under the supervisory program.
This supervisory program will lirst talk to you.
CIDSA·B·O
CIDSAB PAM REPAIR DIAGNOSTIC it 1
UNIT IS M31lD M3111
DR> START / PASS: 1/ FLAG. PNT < CR>
CHANGE HW? Y

start, I pass, print test NR

UNIBUS ADDRESS OF PAM 171200 ?<CR>
HARD ERROR INTERRUPT VECTOR (0) 130 ?<CR>
SOFT ERROR INTERRUPT VEcrOH (O) 134 ?<CR>
DO YOU WISH TO CHANGE MARGIN CONDITION (L) ? < CH >
The display on the DECSA shows you the subtest number executed.

2·60

LNO 1 LASER PRINTER

ZLNADO

LNOI LASER PRINTER TEST
ABSTRACT:

TIlis diagnostic verifies proper operation of the LNOI laser printer and its
associated M7258 control unit which interlaces to the PDP-ll CPU. There are
20 subtests which assures a comprehensive checkout of the lunctional capability
01 the printer.
Test i interlace logic test
Test 2 data transler paths test
Test 3 printable characters test
Test 4 non-printable characters test
Test 5 print control test
Test 6 muliple line advance test
Test 7 overstrike test
Test 8 interlock test
Test 9 absolule and relative positioning test
Test JO line leed new line mode test
Test II power-up delault test
Test 12 tabs test
Test 13 margins test
Test 14 underline test
Test 15 partial line up. partial line down test
Test 16 drawn vectors test
Test 17 justify test
Test 18 portrait test
Test 1910nt test
Test 20 miscelaneous control lunctions test
OPERA TING PROCEDURES :

.R ZLNADO
This program is running under the supervisory program.
This supervisory program will first talk to you.
CZLNA-D-O
CZLNADO LINE PRINTER DIAGNOSTIC
UNIT IS LNOI
RSTRT ADR 147642
DR> START I FLAG: PNT
CHANGE HW (L) ? Y
# UNITS (0) ? I

UNIT 0
LPll ADDRESS (0) 177514 ?<CR>
INTERRUPT VECTOR (0) 200 ? < CR >
CHANGE SW (L) ? N
RUN MANUAL INTERVENTION TESTS (LJ N ?
AUTODROP ERROR COUNT (OJ 5 ?
2-61

LPll 2310 PRINTER

ZLPABI

LPll-CONTR. AND DATA PROD.2310 PRINTER
ABSTRACT:

The LPllline printer diagnostic test program is designed to provide a thorough
check-out 01 the printer control interlace electronics as well as the electronic
and mecanical portions 01 the line printer itself. The program consists 01 a
series 01 seven tests and drive routines, each 01 which can be selected and
operated independently 01 the others using speciaJ entry points. The first test
(test 1) is composed 01 several tests designed to check-out the processor
interlace control electronics and intercommunications data paths. Test 2, 3,
and 4 use worst case patterns to test printer performance and endurance while
test 5 and 6 provide drive lor printer hammer allignment and intensity
adjustment procedures and test 01 the paper slew and clutch operations.
OPERA TING PROCEDURES

.R ZLPABI
SA = START ADDRESS
SA = 600 control test
SA = 610 test data paths
SA = 614 test character gen.
SA = 620 test test zone and format
SA = 624 test hammer worst case
SA = 630 rotating pattern
SA = 634 double wedge pattern
SA = 640 hammer alignment test
SA = 644 slew test

SA :;;; 650 scope loop test

test
section 1
test
section 2
tes t
se tion 3
test 1 section 4
test 2
test 3
test 4
test 5
test 6
test 7

SWITCH SETTINGS:

SW15 =
SW14 =
SW13 =
SW12=

halt alter error printout (in static test only)
132 col. line printer
96 character set
loop on test

2-62

LPOS/ll/141 PRINTER

ZLPKHO

LPOS/lll14 PRINTER TEST
ABSTRACT:

This diagnostic verifies proper operotion of the LP05. LPll. LPl4 line printer
and its associated M725B control unit which interlaces to the PDP-II CPU. There
are ]2 subtests. and 3 parts. part one checks out the processor interlace and
the printers inter-communication data paths and manual intervention test.
Part two is a printing test desjgned to test the line printers mecanism itsell.
The last part is a scope driver routine Jor trouble shooting the line printer.
OPERA TING PROCEDURES

.R ZLPKHO
SA = Start Address
SA = 600 skip operotor intervention test
SA = 700 run special scope driver routine
SA = 404 print speed test using line time clock
50 Hz patch loc 3212 Jrom 7020 to 5670
SWITCH SETTINGS:

SWl5 =
loop on error (in test 1 only)
SW 14 = optional DA VFU available
SWI3 =
96 character set
SWl2 = loop on test
SWll = send only one charocter to line printer in scope mode
SW]O= 1 LPI4 printer 0 = LP051LP]4
SW09 = I inhibit error reports
SWOB= I
SWOO=
used Jor print speed manual timing

2-63

LP2S/2S/27/07 PRINTER

ZLPLGO

LP25126/27 107 ILGxx PRINTER TEST
ABSTRACT:
This diagnostic verifies proper operation 01 the LP25. LP26. LP27. LGxx or LP07
line printer and its associated M7258 control unit which interlaces to the PDP· 11
CPU. LG series printers will be tested as on LP26. due to the good LGxx
internal sell· test. There are 12 subtests. Any mix 01 printer types (LP ... ILG .. .)
can be tested up to a total oj sixteen units.
OPERA TING PROCEDURES :

.R ZLPLGO
This program is running under the supervisory program.
This supervisory program will iirst talk to you.
CZLPL·F·O
CLPLFO LINE PRINTER DIAGNOSTIC
UNIT IS LP25.LP26.LP27.LP07,LGOI
RSTRT ADR 147642
DR>STARTIFLAG:PNT
CHANGE HW (L) ? Y

* UNITS

(D) ? I

UNIT 0
LPll ADDRESS (0) 177514 ?<CR>
INTERRUPT VECTOR (0) 200 ?< CR >
ENTER 0 IF LP25. 1 IF LP26! LGxx. 2 IF LP07, 3 IF LP27 (0) ? 0
96 CHARACTER BAND (1) N ? < CR >
CHANGE SW (1) ? N
RUN MANUAL INTERVENTION TESTS (1) N ?
PERFORM MANUAL PRINTING SPEED Mf.'ASUREMENl' (1) N ?
DESIRED TIME INTERVAL FOR PRIN1'ING SPEED CALCULATION (0) 60 ?
TESTING IN U.S.A. (L) Y ?
AUTODROP ERROR COUNT (D) 5 ?

2·64

LS 11 PRINTER

ZLSABO

LSll CENTRONICS PRINTER TEST
ABSTRACT:
This diagnostic verifies proper operation of tlte centronics line printer and
assosiated control unit. It consists 01 a manual intervention check test, lonnat
control characters test, timing tests .....

. R ZLSABO
SA = Start Address
SA = 600 restart address after appropriate swich settings

I pass takes approx. 11 minutes.
Set operating switches
SWITCH SETTINGS:
SWl5 = I halt on error
SWl4 = I scope loop
SWl3 =
inhibit error typeout
SWI2=
select "print time free" puIs generater
SW1J=
elongation on SWR input test
SWlO=
selection of a particular test
SW09=
select manual intervention test
SWaB =
test number selection
SW07=
SW06=
test number selection
test munber selection
SW05=
SW04=
test number selection
SW03=
test number selection
test number selection
SW02=
SWOI=
test number selection
SWOO=
test number selection

M9312 BOOT MODULE

ZM9BEO

M9312 11/24/44 BOOT STRAP TEST
ABSTRACT:
This diagnostic verilies the ROM in/ormation on the M9312 bootstrap tenninator
or 11144 124 UBI tenninator, Ii 11144 CPU, the M9312 is not needed lor this test
(the M9312 module is integrated in the UBI module). This test reads all bytes
in the ROM, calculates the checksum and compares it with the checksum
written in the ROM.
OPERA TING PROCEDURES :

.R ZM9BEO
SA = Start Address
SA = 204 restart address

Set operating switches
SWITCH SETTINGS :
SW15 =
halt on error
SW14=
SWI3=
inhibit error typeout
SW12=
SWll=
SWlO=
bell on error

2-66

DEQNA/DELQA

ZQNAIO

DEQNA (M7S04) (ETHERNET) FUNCTIONAL DIAGNOSTIC
DELQA (M7S16) (ETHERNET) FUNCTIONAL DIAGNOSTIC
ABSTRACT:
The program tests the lunctionality 01 the DEQNA I DELQA in a 18 or 22 bit
Q·bus environment. This ZQNA test attempts to isolate laults to the following
field replacable units: DEQNA. DELQA bulkhead assembly. transceiver cable.
cii'C"uit breaker (fuse in bulkhead assembly), and transceiver. A configuration
01 up to two units will be accepted lor test. The internal and internal! extended
loopback mode tests do not require the transceiver or the loopback connector
to be unplugged. The external loopback mode may be used with a terminated
tronsceiver that has no network cable attached.
OPERA TING PROCEDURES :

.R ZQNA??
This program is running under the supervisory program.
This supervisory progrom will lirst talk to you.
CZQNA-I·O
DEQNAI DELQA FUNCTIONAL TEST
UNIT IS DEQNAIM7504
RSTRT ADR 142060
start. print test NR
DR >STAIFLAG:PNT < CR >
'UNITS (D) ? 1 < CR >
UNIT 0
DEQNA I/O PAGE ADR (0) 174440 ?< CR >
INTERRUPT VECTOR ADR (0) ? 700< CR >
this is a standard address and vector.
CHANGE SW (L) ? Y
DO YOU WANT TO TEST SANITY TIMER (L) N ?
EXTERNAL LOOPBACK MODE (L) N ?
SYSTEM HAS BLOCK·MODE MEMORY (L) Y ?
IS LOOPBACK CONNECTOR IN DEQNA (L) N ?
NXM TEST? MUST HAVE < 4MB MEMORY (L) N ?

2-67

ZUAABO

DEUNA

DEUNA (M77921M7793) REPAIR LEVEL DIAGNOSTIC
ABSTRACT:
Theprogrom tests the functionality of the DEUNA. This diagnostic was designed
to detect static and dinamic hardware failures in the DEUNA boardset. It will
only run in a standalone. oJ/line environment. The DEUNA is logicaly removed
from the 'wire' by the diagnostic. so no messages from other nodes on the
network. to the DEUNA under test, will disturbe the test. However. because
this diagnostic runs the DEUNA sell-test in test 9. and the sell-test performs
an external loopback as part of its testing procedure, it is recommended that
the DEUNA transceiver cable be removed from the H4000 transceiver and
plugged into a field service external loopback connector. There are 46 subtests
in this program.
OPERA TING PROCEDURES :

.R ZUAABO
This program is running under the supervisory program.
This supervisory program will first talk to you

CZUAA-B-O
DEUNA REPAIR DlAGNOSI'IC
UNll' IS DEUNA
RSTRT ADR 142060
DR >STAI FLAG:PNI' < CR >
tUNITS (D) ? l<CR>

start. print test NR

UNII' 0
WHAT IS I'HE PCSRO ADDRESS? (0) ? 174510< CR >
WHAT IS THE VECI'OR ADDRESS? (0) ? 120<CR>
this is a standard address and vector.

2-68

ZUABCO

DEUNA

DEUNA (M7792/M7793) FUNCTIONAL DIAGNOSTIC
ABSTRACT:
The program tests the functionality oj the DEUNA. A configuration 01 up to
eight units will be accepted Jor test. This diagnostic will only operate in a
stand alone. oli1ine environment using the operational microcode. This test
needs a DEUNA with an external loopback connector or transceiver cable
connected to coaxiai cabie. There are 28 subiesis.
OPERA TING PROCEDURES :

.R ZUABCO
This program is running under tIle supelvisory program.
This supervisory program will Ji rst talk to you.
CZUAB-C-O
DEUNA PDPII FUNCTIONAL DIAGNOS1'lC
UNIT IS DEUNA
RSTRT ADR 142060
start. prin t test NR
DR >STAIFLAG:PNT < CR >
fUNITS (V) ? 1< CR >
UNIT 0
WHAT IS THE PCSRO ADDRESS? (OJ? 17451O<CR>
WHAT IS THE VECTOR ADDRESS? (OJ? 120<CR>
this is a standard address and vector.
CHANGE SW (LJ ? Y
RUN TEST 20 IN EXTERNAL LOOPBACK MODE? (LJ N ?
to do that you need the loop-back connector.

2-69

ZUACDO

DEUNA

DEUNA / DELUA NIE EXERCISER DIAGNOSTIC
ABSTRACT:
The network interconnect exerciser (NIE) program is meant to provide field
service with a tool Jor determining the connectivity oj nodes on the network
interconnect (ND. The NIE program will determine the ability oj nodes on the
NI to communicate with each other and provide node installation veriJication
and problem isolation. The NIE uses the low level maintenance features 01
the DEUNA to provide testing without interrupting normal operation 01 the NI.
The VAX version 01 the NIE can also be run conncurrently on another node.
with each version running independently 01 each othee
OPERATING PROCEDURES :
.R ZUACDO
This program is running under the supervisory program.
This supervisory progrom will lin;t talk to you.
CZUAC-D-O
CZUAC DEUNA, DELUA NI EXERCISER
UN,fT IS DEUNA. DELUA
RSTRT ADR 142060
DR > START
CHANGE HW IL) ? Y
#UNITS (0) ? 1 < CR >
UNIT 0
WHAT IS THE PCSRO ADDRESS? (0) ? 174510< CR >
WHAT IS THE VECTOR ADDRESS? (0) ? 120< eR >
WHAT IS THE PRIORITY LEVEL ? (0) 5 ?
this is a standard address and vector.
ETHERNET DEFAULT ADDRESS (HEX): 08·00-2B-03·2D·40

NIE>
now you are in a command mode, you can type
NIE> (A) ? HELP
with this command you will get tlle help text
below is a example 01 use lull commands
NIE> (A) CLEAR NODE/ALL
NIE> (A) BUILD
NIE> (A) SHOW NODES
NIE> (A) RUN PATTERN
NIE:> (A) SHOW COUNTERS
NIE> (A) SUMMARY

2-70

ZUADBO

DELUA

DELUA (M7521) FUNCTIONAL DIAGNOSTIC
ABSTRACT:

The program tests the functionality of the DELUA. A configuration 01 up to
eight units will be accepted lor test. This diagnostic will only operate in a
stand alone. ollline environment using the opemtional microcode. This test
needs a DELUA with an external 100pback connector or transceiver cable
connected to coaxial cable. There are 27 siibtests.
OPERA TING PROCEDURES :

.R ZUADBO
This program is running under tIle supervisory program.
This supervisory program will first talk to you.
CZUAD-B-O
DELUA PDPll fUNCTIONAL DIAGNOSTIC
UNIT IS DELUA
RSTRT ADR 142060
DR>STA/fLAG:PNT<CR>
start. print test NR
tUNITS (0) ? 1 < CR >
UNIT 0
WHAT IS THE PCSRO ADDRESS? (0) ? 17451O<CR>
WHAT IS THE VECTOR ADDRESS? (0) ? 120<CR>
this is a standard address and vector.
CHANGE SW (L) ? Y
RUN EXTERNAL LOOPBACK MODE TEST (REQ. H40BO OR EQU/V. LOOPBACK ?
YIN (1) N ?
TO AVIOD MAN. INTERVENTION INSTALL H40BO OR EQUIV. LOOPBACK NOW
YIN (LJ N ?

2-71

DISK's DISK's DISK's DISK's
RC2S
RKSII
RKOS/07
RP04/0S/06

RP07
RKII/OS
RLVll/12
RLII
RLOI/02
RM02/03/0S
RMSO
RQDXl/2/3
RXSO/RUXSO
RDSl/S2
RDS3/S4
RX33
RD31
RS03/04
RXOI/02
RASO/Sl/S2
RASO
UDA/KDASO
3-0

M8739/M7740/RC25

ZRCDBO

M8739/M7740/RC25 PERFORMANCE EXER
ABSTRACT:

This exerciser is designed to verily the integrity of the drivels) and to detect
faults at the functional level only. This test tries to simulate a stresslul
operating system. These conditions are created by issuing a heavy load 01
MSCP 110 commands to all online units. You can select write·only. read·only.
writes and reads. wriie·compares and read·compares. This exerciser can test
up to 4 controllers. each controller having up to 2 drives. All RC2S drives to
be tested by this program must have been successfully verified by the RC2S
AZTEC front·end I host diagnostic (ZRCFCO)
OPERA TING PROCEDURES :

.R ZRCDBO
This program is running under the supervisory program.
This supervisory program will first talk to you.
CZRCD·B·O
RC25 DISK EXERCISER
UNIT IS SINGLE RC2S PLATTER
RSTRT ADR 145702
DR > START
CHANGE HW (L) ? Y
#UNITS (D) ? 1< CR >

disk drives

UNIT 0
IP ADDRESS (0) 172150 ?<CR>
VECTOR (0) 154 ?<CR>
BR LEVEL (0) 5 ?<CR>
PLATTER ADDRESS (UNIT PLUG) (V) 0 ?<CR>
even number = removable cardridge
odd number = fixed disk
ALLOW WRITES TO CUSTOMER DATA AREA ON THIS PLATTER (LJ ? N
CHANGE SW (L) ? Y
ERROR LIMIT (0 FOR NO LIMIT) (V) 32 ?
TRANSFER LIMIT IN MEGABYTES (0 FOR NO LIMIT) (D) 2 ? 10
SUPPRESS PRINTING ERROR LOG MESSAGES (L) Y ?
RUN DM EXERCISER INSTEAD OF MULTI DRIVE SUBTEST (L) N ?
RANDOM SEEK MODE (L) Y ?
STARTING TRACK (V) 0 ?
ENDING TRACK (V) 1641 ?

3·1

ZRCFCO

M8739/M7740/RC25

M8739/M7740/RC25 FRONT END TEST
ABSTRACT:
This test is a basic functional test of the RC25 subsystem. It verifies: that the
CPU can communicate correctly with the RC25 disk through the adapter. that
the RC25 can seek and select the heads properly. that the RC25 confonns to
the specjJied seek and rotational times. and that it can perform all functions
in response to MSCP commands.
OPERA TING PROCEDURES :
.R ZRCFCO
This program is running under the supervisory program.
This supervisory program will first talk to you.
CZRCF-C-O
RC25 FRONT END I HOST DIAGNOSTIC
UNIT IS AZTEC RC25 PLATTER
RSTRT ADR 145702
DR > START
CHANGE HW (L) ? Y
IUNITS (0) ? 1 < CR >

(unit

1 single patter)

UNIT 0
IP ADDRESS (0) 172150 ?<CR>
VECTOR (0) 154 ?< CR >
BR LEVEL {OJ 5 ?<CR>
PLATTER ADDRESS (UNIT PLUG) (D) ?< CR >
even number = removable cardridge
odd number = fixed disk
CHANGE SW (L) ? Y
USE TOP SURFACE FOR SINGLE SURFACE TEST (L) Y ?
DO YOU WISH TO UMIT AlIEA TE.'STED IN TESTS 15-18 (L) N ?
NUMBER OF RETRIES FOR TEST If' E.'HROR OCCURED (DJ 0 ?
DO YOU WISH TO CONTINUE TESTING AFTER RETRIES? (L) N ?
DO YOU WISH TO DO THE MANUAL INTERVENTION TEST? (LJ N I
DO YOU WISH TRACE MODE ? (LJ Y ?

3-2

ZRCHBO

RC25
RC25 DISK PACK FORMATTER
ABSTRACT:

This program will prepare RC25 media for use as addressable storage by
providing headers and replacing of bad blocks. There are three modes 01
formatter operations: 1. REFORMAT: this mode is used to format a medium
which has been previously formatted, and is being reformatted to clear
exisiing oaia. It assumes thai the FeT is still intact. 2. RESTORE: only for
manu/octuring. 3. RECONSTRUCT: this mode is lIsed when none 01 the other
modes is possible. It detects bad blocks by per/orming repetitive read checks
of each sector. For this reason, a reconstruct om takes considerably longer
than the other modes.
OPERA TING PROCEDURES :

.R ZRCHBO
This program is running under tIle supervisory program.
This supervisory program will first talk to you.
CZRCH-B-O
RC25 DISK FORMATTER
UNIT IS RC25 DISK DRIVE SUBSYSTEM
RSTRT ADR 145702
DR>START
CHANGE HW (L) ? Y
'UNITS (V) ? 1 < CR >

(unit

1 single patter)

UNIT 0
RC25 IP REGISTER ADDRESS (O) 172150 ?<CR>
RC25 INTERRUPT VECTOR ADD. (0) 154 ? < CR >
. RC25 BUS REQUEST LEVEL (0) 5 ?< CR >
UNIT NUMBER TO BRING ONLINE (UNIT PLUG) (V) ? < CR >
even number = removable card ridge
odd number = fixed disk
CHANGE SW (L) ? Y
FORMAT IN UNATTENDED REFORMAT MODE (t) Y ?
ENTER DATE <MM-DD-YYYY> (A)

3-3

ZR6ADO

RK611

RK611 CONTROLLER TEST. PART 1
ABSTRACT:
The RK611 diskless controller diagnostic part 1 reads and writes every
RK611 regi:,;ter. tests the interrupt mechanism. and tests the silo loading
logic. No RK06107 drive is required lor program execution.
OPERA TING PROCEDURES :

.R ZR6ADO
START ADDRESSES:
SA = 200 normal starting
SA =; 204 restart program
SA = 214 request bus address, vector addre:,;s and priority modification
first pass : 7 seconds
subsequent: 2 minutes
SWITCH SETTINGS:
SW15=;
halt on error
SW 14 = 1 loop on test
SW 13 = 1 inhibit error typeout
SW 12 = 1 abort alter 20 errors
SWll = 1 inhibit test iterotions
SWlO= 1 ring bell on error
SW09=
loop on error
SWOB =
loop on test in SWR (7-0)

use "CONTROL a" to enter software SWR at loco 176

3-4

ZR6BDO

RK611
RK611 CONTROLLER TEST. PART 2

ABSTRACT:
The RK611 diskless controller diagnostic part 2 tests the loading 01 the drive
bus messages by executing class A commands. Some tests execute commands
partialy in maintenance mode and partially at normal speed to 1001 the
controller and lorce errors. No RK06107 drive is required lor program execution.

deseleci all drives (port A and Bout).
OPERA TING PROCEDURES
.R ZR6BDO
START ADDRESSES:
SA = 200 normal starting

SA = 204 restart program
SA = 214 request bus address. vector address and pliority modification
normal RKCSI address 177440. vector 210.

lirst pass: 7 seconds
subsequent: 2 minutes
SWITCH SETTINGS :
SWI5=
halt on error
SWI4= I loop on test
SWI3= 1 inhibit error typeout
SW12= 1 abort alter 20 errors
SWll= 1 inhibit test iterations
SWIO=
ring bell on error
SW09=
loop on error
SW08= I loop on test in SWR (7-0J

use "CONTROL a" to enter soltware SWR at loco 176

3-5

RK611

ZR6CEO
RK611 CONTROLLER TEST, PART 3

ABSTRACT:

The RK611 diskless controller diagnostiC part 3 tests the loading 01 the drive
bus messages shilt register by executing class B commands, tests index and
sector pulse detection. tests silo and NPR trans/en> Irom memory in 16 and 18
bit mode, tests non-existent memory and unibus parity error detection, tests
read and write MFM loopback, and tests class B instruction erron>. Most tests
execute commands in maintenance mode. No RKOS/07 drive is required lor
program execution, deselect all drives (port A and Bout).
OPERA TING PROCEDURES :

.R ZR6CEO
START ADDRESSES:
SA = 200 normal starting
SA = 204 restart program
SA = 214 request bus address, vector address and priority modification
normal RKCSI address 177440, vector 210.
lirst pass: 3D seconds
subsequent: 8 minutes
SWITCH SETTINGS:
SW 15::::

halt on error
SWI4= I loop 011 test
SW /3= / Inhibit error typeout
SW12=, 1 abort aiter 20 errors
SW 11 ::
mhlbit test iterations
ring bell on error
SWlO=
SW09=
loop on error'
SW08=
loop on test In SWR (7-0)
use "CONTROL GU to enter soltware SWR at loco 176

3-6

ZR6DDO

RK611

RK611 CONTROLLER TEST. PART 4
ABST·RACT:

The RK611 diskless controller diagnostic part 4 tests the loading 01 the drive
bus message shilt register by executing class C commands. tests header
generation lor search operations. tests write data NPR translers to silo. tests
header recognition. tests cylinder. track and sector increments alter successlul
header search. tests detection 01 all header type errors, tests ECC generation
and writing. tests partial sector write (zero lill), tests 18 bit lormat ECC
generation and data writes. No RK06/07 drive is required lor program
execution. deselect all drives (port A and B ouO.
OPERA TING PROCEDURES

.R ZR6DDO
START ADDRESSES:
SA = 200 normal starting
SA = 204 restart program
SA = 214 request bus address, vector address and priority modification

normal RKCSI address 177440, vector 210.
lirst pass: 25 seconds
subsequent: 3 minutes
SWITCH SETTINGS

SW15 = halt on error
SWl4 =
loop on test
SWI3=
inhibit error typeout
SWI2=
abort alter 20 errors
SWll = inhibit test iterations
SWI0=
ring bell on error
SW09 =
loop on error
SW08 = I loop on test in SWR (7.0)
use "CONTROL a" to enter soltware SWR at loco 176

3-7

ZR6ECO

RK611

RK611 CONTROLLER TEST, PART 5
ABSTRACT:
The RK611 diskless controller diagnostic part 5 tests multi·sector data transfers,
tests mid-transfer seeks, tests cylinder overflow checking. tests NPR translers
to memory. tests ECC error detection and correction. tests write check both
16 and lB bit mode and lorces write check errors. No RK06107 drive is required
lor program execution. deselect all drives (port A and Bout).
OPERA TING PROCEDURES :

.R ZR6ECO
START ADDRESSES:
SA = 200 nonnal starting
SA = 204 restart program
SA = 214 request bus address. vector address and priority modification
nonnal RKCSI address 177440, vector 210.
lirst pass : 60 seconds
subsequent: 3 minutes
SWITCH SETTINGS
halt on error
SWI5=
loop on test
SWI4=
inhibit error typeout
SWI3=
abort alter 20 errors
SWI2=
inhibit test iterations
SWll=
ring bell on error
SW1O=
loop on error
SW09=
loop on test in SWR (7·0)
SWOB=

use "CONTROL G" to enter soltware SWR at loco 176

3-8

RKOS/07

ZR6GCO
RK06/07 DUAL PORT DIAGNOSTIC

ABSTRACT:
The RK06/07 dual port logic test performs a series 01 lests which verily that
the dual port option is lunctioning properly. Both ports 01 the disk are cabled
to the same controller by a standard cable and tIle dual port test switch is
enabled on the dual port module. The ellect 01 this is that one drive appeares
as two UlljjS o.ne on port A Cind one on port B. The bit 0 01 the unit select
number on port B is complemented. This arrangement allows the dual port
logic to be tested lrom one CPU/Controller to a maximum 0/ 4 drives. The
test needs a pack installed and the drive ready.
OPERA TING PROCEDURES :

.R ZR6GCO
START ADDRESSES:
SA = 200 normal starting
SA = 220 request bus address. vector address and priority modilication
normal RKCSI address 177440. vector 210.
one pass : 2.5 minutes
SWITCH SETTINGS:
SW15=
halt on error
SW14=
loop on test
SW13=
inhibit error typeout
SWI2=
bypass drive alter 20 efrors
inhibit test iterations
SWl1=
ring bell on error
SW10=
SW09=
loop on error
SWOB ,=
loop on test in SWR (7-0)
use "CONTROL G" to enter soltware SWR at loco 176

3-9

RKOS/07

ZRSHFO

RKOS/07 DISK DRIVE DIAGNOSTIC TEST 1
ABSTRACT:
The RK06107 test 1 checks that the drive is capable 01 performing all static
tests. insures that the drive can write and read headers. insures that the drive
can perform seeks. lormats the pack and checks error detection. Install a good
diskpack and spin it up. wait lor ready then run the test.
OPERA TING PROCEDURES :
.R ZR6HFO

START ADDRESSES:
SA = 200 normal starting
SA = 204 same as 200 but bypass test 16 (N square)
SA = 220 request bus address. vector address and priority modiJication
normal RKCSI address 177440, vector 210.
SA = 230 same as 220 but bypass test 16 (N square)
one pass . RK06 7 minutes
one pass: RK07 14 minutes
SWITCH SETTINGS :
halt on error
SW15=
SW14=
loop on test
SW13=
inhibit error typeout
SWI2=
bypass drive alter 20 errors
SWll =.
inhibit test iterations
ring bell on error
SW1O=
SW09=
loop on error
SWOB= 1 loop on test in SWR 0-0)

use "CONTROL Gil to enter software SWR at loco 176

3-10

ZR6IFO

RKOS/07

RKOS/07 DISK DRIVE DIAGNOSTIC TEST 2
ABSTRACT:
The RK06107 test 2 checks that the drive is capable 01 performing read and
write data operations, worst case pattern, spiral writing and reading and all
offset operations are performed.
OPERA TING PROCEDURES

.R ZR61FO
START ADDRESSES:
SA = 200 normal starting
SA = 220 request bus address, vector address and priority modification
normal RKCSI address 177440, vector 210.
Load program, scratch pack installed and drive ready, drives not to be tested
must have both ports deselected.
one pass: 1.5 minutes
SWITCH SETTINGS :
SW15= 1 halt on error
SWI4= I loop on test
SW13=
inhibit error typeout
SWI2=
bypass drive alter 20 errors
SWll =
inhibit test iterations
SWI0=
ring bell on error
SW09=
loop on error
SWOB =
loop on test in SWR (7.0)

use "CONTROL G" to enter soltware SWR at loco 176

3·11

RKOS/07

ZRSJFO

RKOS/07 DISK DRIVE DIAGNOSTIC TEST 3
ABSTRACT:

The RK06107 test 3 is the manual intervention test. You have to open and close
the door. pull ou the unit select plug. push the port switch and so one .....
OPERA TING PROCEDURES

.R ZR6JFO
SA = 220 request bus address. vector address and priority modification
normal RKCS1 address 177440. vector 210.
Load program. scratch pack installed and drive ready, drives not to be tested
must have both ports deselected.
SWITCH SETTINGS:

halt on error
SW15=
loop on test
SW14=
inhibit error typeout
SW13=
SW12= 1 bypass drive after 20 errors
SWll= 1 inhibit test iterations
ring bell on error
SWIO=
loop on error
SW09=
use "CONTROL GU to change software SWR at loco 176

3-12

ZR6KGO

RK611

RK6U CONTROLLER FUNCTIONAL TEST
ABSTRACT:
The RK611 lunctional controller diagnostic completes the testing 01 an RK611
controller. This program tests those areas in the controller that could not be
tested in a diskless environment.
OPERA TiNG PROCEDURES

.R ZR6KGO
SA = 204 restart address
SA = 214 request bus address. vector address and priority modification
SA = 220 is the phase locked loop clock adjustment start.
normal RKCSI address 177440. vector 210.

Load program. scratch pack installed and drive ready. drives not to be tested
must have both ports deselected.
SWITCH SETTINGS :

SW15=
SW14=
SW13=
SW12=
SWll=
SWlO=
SW09==
SWOB=

halt on error
loop on test
inhibit error typeout
bypass drive alter 20 errors
inhibit test iterations
ring bell on error
loop on error
execute test number specified in SW < 7-0>

use "CONTROL G" to change software SWR at loco 176

3-13

ZRSLDO

RKOS/07
RKOS/RK07 PACK FORMATTER
ABSTRACT:

This utility can write. read and verily headers and data on a pack. reports
the pack serial number, you can verily a pack with data on in a read-only
mode and it formats a pack and all sectors found bad will be added to the
"BAD SECTOR FILE". 11 this lile is corrupted you will not be able to lormat
this pack. you can lix this problem with the "ZR6R?? utility. RSX (BAD) or
RSTS.
OPERA TING PROCEDURES :

START ADDRESSES:
SA = 200 normal starting
SA = 204 restart address

This test has the standard address and vector in it.
To change this patch loc 2570 Jor RKBAS (normal 177440) and
loc 2572 Jor RKVEC (normaly 210).
Load program. pack installed and drive ready,
You can get a help info with this diagnostic
Below, i.s a example to format a pack in drice 0 (RK07)

DRIVE TYPE (S OR 7) 7
DRIVE NUM =0
SECTOR/TRACK = < CR >
MODE= <CR>
EVEN CYLINDER PATTERN = < CR >
ODD CYLINDER PATTERN = < CR >
TRACK LIMITS = <CR>
OFFSET= <CR>
ANY SECTOR TO BE FLAGED BAD? (TYPE Y OR N)N < CR >
PRESERVE SOFTWARE BAD SECTOR FILES? (TYPE T OR N) Y < CR >
SOFTWARE DETECTED BAD SECTOR FILES PRESERVED
SWITCH SETTINGS :
SWI5= 1 halt on error
SW14 = 1 loop on current cyliIlder and track operation
SW13 =
inhibit error typeout

SW12=
SWIl=
SW1O=
SW09=
SWOB=
SW07=
SWOI=

ring beJJ on error

report summar}' of all bad sectors

report all data ill error

use "CONTllOL GU to cllOnge !)oitwam SWII at lac

3-14

176

ZR6MEI

RKOS/07
RKOS/07 DYNAMIC TEST PART 1

ABSTRACT:
This RK06/07 test provides a functional shakedown of the entire subsystem.
including the unibus interlace and access to main memory. The testing in
pOli I employs worst-case situations involving mecanical positioning. disk
addressing and data trons/ers. In addition. measurements. are made pertaining
io drive operotional timjng.
OPERA TING PROCEDURES :'

.R ZR6MEI
SA = 204 request bus address. vector address and priority modification
nocmal RKCSI address 171440. vector 210.
SA = 220 dual-access data test 22

Load program. scratch pack installed and drive ready. drives not to be tested
must have both ports deselected.
Runtime lirst pass: 14 minutes
Runtime subsequent: 21 minutes
Patch location 166 Irom 000000 to 000001 lor 50 Hz timing.
SWITCH SETTINGS :

SWI5=
halt on error
SW14 =
loop on test
SWI3 = inhibit error typeout
SWI2=
report description only. on error
SWll = inhibit test iterotions
SWIO=
ring bell on error
SW09= 1 loop on error
SWOB = 1 apply random stall between operotions
SW07=
do explicit seeks in tests 1·12
SWOG=
report one error per transler in tests 17.21
SW05 =
inhibit writes in test 21
inhibit write checks in test 21
SW04=
inhibit reads and soltware compares in test 21
SW03=
inhibit soltware compares in test 21
SW02=
read alter a write check error in test 21
SW01=
report all soltware compare errors in tests 17.21
SWOO=
use "CONTROL a" to change software SWR at loco 176

3-15

ZRSNE3

RKOS/07
RK06/07 DYNAMIC TEST PART 2
ABSTRACT:

This RK06/07 test provides a Junctional shakedown oj the entire subsystem.
including the unibus interiace and access to main memory. The testing in
part 2 employs worst-case situations involving head oJiseting. memory
addressing and data transJers. unibus cycle contention and muliple drive
operations. In addition. an RK06/07 head alignment aid is provided to do
ON-LINE alignment oj drive heads.
OPERA TING PROCEDURES

.R ZR6NE3
SA = 204 request bus address. vector address and priority modjJication
normal RKCSI address 177440. vector 210.
SA = 224 head alignment aid program start

Load program. scratch pack installed and drive ready. drives not to be tested
must have both ports deselected.
Runtime Jirst pass : 2 minutes
Runtime subsequent: 3 minutes
SWITCH SETTINGS :

SWl5 =
SWl4 =
SWl3=
SWl2 =
SWll=
SW1O=
SW09=
SWOB=
SW07=
SW06=
SW02=
SWOl=
SWOO=

halt on error
loop on test
inhibit error typeout
report description only. on error
inhibit test iterotions
ring bell on error
loop on error
apply random stall between operations
report one error per transfer in tests 2-4

inhibit writes in te::;t 1
report all software compare errors in te:;t:; 2-4

lise "CONTROL G" to change soitware SWR at loco 176

3-16

ZRSPDO

RKOS/07

RKOS/07 PERFORMANCE EXERCISER
ABSTRACT:

This RK06107 performance exerciser will exercise in a random overlapped
manner 1 to 8 RK06 or RK07 disk drives attached to the some controller. Drives
under test can be added to or dropped from the test by operator command.
It executes reads. writes and writes followed by a write check at random
blocks on ihe disk. Any time you can get Q error statistjc.
OPERA TING PROCEDURES

.R ZR6PDO
SA = 204 restart address
SA = 214 request bus address. vector address and pliority modification

normal'RKCSl address 177440. vector 210.
I.oad program. scratch pock installed and drives ready, drives not to be tested
must have both ports deselected.
The following commands are available in command mode
( < CONTROL C> gets you into the command mode}.
Tn
Dn
Pn

Sn
Wn

initiate testing on drive n (number)
drop drive n (number)
change parameters on drive n (number}
print statistics of drive n (number}
write and verily the pock on drive n (number)

SWITCH SETTINGS :

SW15=
SWI4=
SW13=
SWI2=
SWlD=
SW09=
SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SWOJ =
SWOO=

holt on error
loop on current operations
inhibit error typeout
ring bell on error

inhibit dropping drives on clearable errors
inhibit dropping drives if op count threshold is exceeded
inhibit dropping drives if error threshold exceeded
display entire sector read before retry sequence
inhibit software data comparisons

use "CONTROL G" to change software SWR at loco 176

3-17

ZRSQCO

RKOS/07

RKOS/RK07 DRIVE COMPATIBILITY TEST
ABSTRACT:
This utility helps to verify the compatibility 01 up to 16 RK06 or RK01 drives.
Compatibility is defined here as the ability of a drive to write data which
can be read successfully by all other drives. and odditionoly the ability of a
drive to completely over-write data written by all other drives. The testing
is done in two posses. For the entire test you need only one pock but you
have to move that one around into all drives.
OPERA TING PROCEDURES :
START ADDRESSES:
SA = 200 start program for one subsystem only
SA = 204 start pass 1 lor more than one subsy:otem
SA = 220 start pass 2 for more than one subsystem

Follow as the program instructs you!

SWITCH SETTINGS :
halt on error
SW15=
SW14=
loop on current test
inhibit error typeout
SW13=
report description only, on errors
SWI2=
SWl1=
unused
ring bell on error
SWlD=
loop on error
SW09=
apply random stoll between operations
SW08=
SW01= 1 type bod sector files at start
SWOl= 1 unused
use "CONTROL a" to change software SWR at loco 176

ZR6RCI

RKOS/07
RKOS/07 USER DEFINED TEST

ABSTRACT:
This RK06107 test provides the capability 01 entering. editing. saving. recalling
and executing test programs designed by the user. It operates interactively
to allow the user to develop a specilic test made 01 subsystem commands.
checking and reporting in any sequence. A lunction the field service uses
often is the formatting and creation of the BAD SECTOR FILE of which you
find a description below.
OPERA TING PROCEDURES :

.R ZR6RCI
You get into the command mode
TYPE HP TO PRINT HELP FILE
"'HP
below you find the example which formats and
creates a empty BAD SECTOR FILE on a RK07 drive 0
SF = set function
SF.CC = set function. controller clear
"'SF.CC<CR>
SF.DC = drive clear. drive# 0
"'SF.DC.O< CR >
DT = drive type is RK07
"'DT.7
SF.PA = pack acknowledge. drivel 0
"'SF.PA.O< CR >
WH = write header drive 0
"'SF. WH.O.1456.2.0.102< CR >
cylinder 1456. track 2. sector O.
"'DP.X.pack serial number<CR>
6 digits
OOOOOO<CR>
OOOOOO<CR>
OOOOOO<CR>
177777<CR>
177777 < CR> < CR >
"'SF. WD.O.1456.2.0.12000.X < CR>
"'CO<CR>
COMPILE OK
"'RU<CR>
SWITCH SETTINGS
SW15 = I halt on error
SWI4 = I loop on test
SW 13 = I inhibit error typeout
SWII = I inhibit test iterations
SWlO=
ring bell on error
SW09=
loop on error
SW02 =
inhibit all data compare error reports
SWOI =
report all data compare error
SWOO = J short error report

use "CONTROL GU to change software SWR at loc. 176

3-19

RP04/0S/06

ZRJADO

MECHANICAL AND READ/WRITE TEST
ABSTRACT:
This program will check seeks. access times. read and write. track and sector
addressing. Each drive to be tested has to have a lormatted disk pack.
programmable (dual port) drives may be tested.
OPERA TING PROCEDURES :
START ADDRESSES;
SA = 2DD normal starting (inhibit dual ported drives)
SA = 2D4 select operating pammeteT'S (inhibit dual ported drives)
SA = 210 select RHIIIRH7D addresses (do not inhibit dual ported drives)
SA=214 combination 01 2D4121O (do not inhibit dual ported drives)
SA = 22D same as 2DD but no inhibitions
SA = 224 same as 2D4 but no inhibitions
SWITCH SETTINGS :
halt on elTor
SW15=
SW14=
loop on test
inhibit error type out
SW13=
SWll =
inhibit iterations
SW1O=
ring bell on elTor
SWD9=
loop on error
SWD8= 1 print error message on line printer
SWD7= 1 read control switch settings from TTY
SWD6= 1 inhibit time reports (tests 12-15)
SWD5 ==
report one error per sector (test 16 & 17)
SWD4 =
inhibit writes (test 20)
SWD3 =
inhibit write checks (test 2D)
SWD2 =
inhibit read and soltware compares (test 20)
'SWDI =
inhibit soltware compares (test 2D)
SWOO= 1 perform read alter write check (test 20)
use "CONTROL a" to enter software SWR at loco 176
CONTROL SWITCH SETTINGS :
SWDD=
== 20 sector (lB bit) I 0 = 22 sector mode (16 bit)
SWD5=
inhibit software tlmeouts (dIsable watchdog timer)
5DH2 power source
SWD6==
SW07==
do explicit seek:; be/ore dOlO transier:;
SW07= o do read header and data commands in tests 0-6
SWD8== 1 do explicit seeb bo/ore data tmnslers
SW 12 ==
incrementIng :;ta11:; In tesl 4
SWl3 =
use random stoll times
SWI4=
stall alter eve'1' drive lunction
SW15 =
JOhJblt wrlle pock be/ore lestlllg (test 16)
Delault condition 01 C.sW (J5 "- 00) '-" 0
To enter control switcll from TTY. following are used:
<. > cn (period:: a statement terminator
<. > cn (period period)' end 01 modllicatJon and start 01 test
<. > CR (comma): seperator between drive No. and test No.
< I> cn (slash): test NO. followed by slasll. opens tllOt test lor modification
nUBOUT. delete last character
3-20

ZRJBDO

RP04/0S/06
RP04/S/6 FORMATTER PROGRAM

ABSTRACT:
This program formats disk pocks in either 16 or 18 bit mode and performs a
check of the pock's surface by reading bock the written bit pattern.
You can select a read only mode ('C' = c11eck mode).

NOTE: ThIs program is noi iniended to be a entice sec/or verilication test.
for doing that you need more and different data patterns.
OPERATING PROCEDURES:

START ADDRESSES:
SA = 200 normal starting (inhibit dual ported drives)

SA::: 204 non-standard RHll or RH70 address/vector (enable dual ported drives)
SA = 210 select RHll / RH70 addresses (do not inhibit dual ported drives)

SA::: 220 some as 200 but no inhibitions
PROGRAM DIALOG:
PROGRAM MODE (C or FJ : C:::check F=-Jormat & check. default <CR>:::F
OPERATE IN 22 SECTOR (16 bit mode) (Y or N)
DRIVE:
ENTER ADDRESS LIMITS: < CR > = default
SELECT DATA PATTERN: 0= zeros
1 = ones
2 = worst case < CR > ::: de/ault. worst case
"Control C" will print you the current cylinder and track address.
By typing "control C" during typing tile current cylinder and trock address.
the program will abort. This is the proper way to holt the program. II not
done this way. a sector may be improperly formatted.
RUN TIME:

FORMAT

RP04/05
RP06

8 min.
16 min.

VERIFICA nON
4 min.
8 min.

SWITCH SETTINGS :
SW15::: 1 halt on error
SWl3 = 1 inhibit error typeout
SWlO= I bell on error
SW09::: 1 loop on error
SW07= I print solt errors as they occur
SW02 = 1 don't display system status alter initial start
SWOl = 1 loop on the current track
SWOO= 1 loop the program on selected drive

use "CONTROL G" to enter soltware SWR at loc. 176

3-21

TOTAL
12 min.
24 min.

RP04/0S/06

ZRJCBO

RP04/S/6 HEAD ALIGNMENT PROGRAM
ABSTRACT:
A program to check out head alignment oj RP04/05/06. or used as a tool
to align head with the appropriate drive test box.
The progrom also contains a utility routine which performs 5000 rondom
seeks without data transiers. The random seek utility allows the ope rotor
to exercise the drive with the alignment pack in place and then re-verily
head alignment.
OPERA TING PROCEDURES
START ADDRESSES:
SA = 200 normal starting (RHll I RH70 has standard address and vector)
SA = 204 to change non-standard addresses oj RHll I RH70.

Connect the test box and mount the alignment pack.
Select the drive to be aligned in response to the typeout on the console.
Answer the mode oj operotion : A I V or E
A = alignment V = verily E = exerciser (5000 seeks)
Ii an A is selected. the program will position the heads over the alignment
cylinder and then ask Jor a head. The head entered will be selected and the
progrom will ask Jor a new head. Until the new head is entered. the last one
will remain selected.

HEAD ALIGNMENT:
on RP04105 the progrom checks Jor each head being within
+ 1-150 microinches oj trock centerline oj CYL 245 and·
+ 1-350 microinches oj trock centerline oj CYL 004 and 400.
on RP06 the progrom checks Jor each head being within
+. - 75 microinches oj trock centerline oj CYL 496 and
+ 1-175 microinches oj trock centerline oj CYL 008 and 800.
Ii not within these limits. the progrom will type an error message Jor
that particular head. lJ S W 00= 1. the actual value oj the oUset will
be typed out. Heads out oj tolerance will not be identjJied.
SWITCH SETTINGS:
SWl5=
halt on error
inhibit error typeout
SWJ3=
loop on error
SW09=
check alignment oj the specjJied head
SW02=
loop on the current head
SWOI=
SWOD=
type all track center values

use "CONTROL a" to enter software SWR at loco 176

3-22

ZRJDEO

RP04/0S/06

RP04/S/6 RP MULTI-DRIVE LOGIC TEST
ABSTRACT:

Per/orms interactive tests on RP041516 connected to a rriassbus with RHll or
RH70. Single or dual port testing is possible. Uses overlapped operation.
between the drives. All data transler commands are used, selected randomly.
Uses lormatted disk packs.
OPERA TING PROCEDURES :

START ADDRESSES:
SA = 200 normal starting (RHll I RH70 has standard addr.176700 vec. 254)
SA = 204 to change non-standard addresses 01 RHII I RH70.
SA = 220 same as 200 but dual ported drives are not inhibited.
KEYBOARD COMMANDS:
(alter a CONTR. C)
T = assign drives lor test
R = performs a sequential read 01 a pack
W = write and check data pack with a datapattern
S = request a drive performance summary
D = deassign a drive under test
T, W, R require address limits, drive ID and bad block inlo to be entered or
use delaults, a "period" is delining delault values lor the remaining entries
and starts execution.
Maximum 16 bad sectors may be entered on a pack in the lormat
C, T,S
EXAMPLE: 145,04,12
Examples : T1
R5
D3
RUNTIME:

ass.drive 1 lor test
read pack on drive 5
deassign drive 3

1 drive = 2,5 hrs.
1 drive = 25 hrs.

TA
RA
DA

all drives
all packs
all drives

8 drives = 11 hrs. (data transler mode)
8 drives = 40 hrs. (seek verily mode)

SWITCH SETTINGS :

SW15 = halt on error
SW13=
inhibit error typeout
SWlO=
ring the bell on error
SW07=
display all data compare errors
SW06=
do not alter the current operation parameters
SW05 = I partial register display
SW04 = 1 do not deassign drives
SW03 = I display the sector in error if 'DCK' 'DTE' or 'WCE'
SW02 =
inhibit subsystem status typeout during startup
SWOl =
inhibit data comparison alter read orders
SWOO =
read only mode
use "CONTROL Gil to enter soltware SWR at loco 176

3-23

ZRJEDO

RP04/0S/06
DU AL CONTROLLER TEST, PART

ABSTRACT;
This is a series 01 tests which verily that the RP041 51 6 dual controller
logic is luntioning properly. Only the control logic is tested by this
program, data handling in the dual controller mode is not tested.

Both ports 01 the drive are cabled to the same massbus by a special adapter
cable (PIN 1010501-02). This arrangement allows the dual controller logic
to be tested Irom one PDP-ll computer. With this cable, the drive appears as
two units on the massbus. Each port 01 the drive will respond to a diHerent
massbus address. The address 01 each port will depend upon the drive's "DP"
board - module M1115 lor RP04's. or by the address plug lor RP0516's

•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••
Any other drive on the massbus which has an address in conilict with
either 01 the test addresses must be powered down .

•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••

OPERA TING PROCEDURES :
Switch the "controller select" switch on the drive to be tested to the
AlB position. Cycle the drive up.
Start the program.
Enter the drive number.
Enter the test number to be run. Carriage return will run all tests.

START ADDRESSES;
SA = 200 normal starting (RH 11 I RH70 has standard addr.176700 vec. 254)
SA .;- 204 to change non-standard addresses 01 RHll I RH70.
SWITCH SETTINGS .
SW 15 =
halt on error
SW 14 =
loop on test
SW13=
inhibit error typeout
inhibit test itemtions
SWJ1=
l'jng bell on error
SW1O=
loop on error
SW09=

use "CONTROL G" to enter so/twal"'f3 SWR at loco 176

3-24

ZRJFAO

RP04/0S/06

DU AL CONTROLLER TEST. PART 2

ABSTRACT:
This is a series of tests which verily that tIle IlP041516 dual controller
logic is funtioning properly. Only the control 10gJe JS tested by this
program, data handling in the dual controller mode IS not tested.

Both ports of the drive are cabled to tile same massbus by a special adapter
cable (PIN 7010507·02). This arrangement allows tIle dual controller logic
to be tested from one PDp·II computeI' Witll this coble, the drive appears as
two units on the massbus. Each por't 01 tlle dl'ive will respond to a diHerent
massbus address. The address of each port will depend upon the drive's "DP"
board· module M7775 lor RP04's, or by the address plug for RP0516's

******** •• ** •• *•• ***•• *••••••••••• *•• *******************************.*****
Any other drive on the massbus wllicll has an addr-ess in con/lict with
either oj the test addresses must be powered down.

*************.** •• *••••••••••••••• *******************.***************.****
OPERA TING PROCEDURES :
Switch the "controller select" switch on tIle dl'ive to be tested to the
AI B position. Cycle the drive up.
Start the program.
Enter the drive number.
Enter tIle test number to be run. Carriage return will run all tests.
There are 14 tests
START ADDRESSES:
SA = 200 normal starting (RHll I RH70 has standard addr.176700 vee. 254)
SA = 210 to change non·standard addresses 01 RHII I RH70.

SWITCH SETTINGS :
SWI5=
SWI4=
SWI3=
SWII =
SW1O=
SW09=

halt on error
loop on test.
inhibit error typeout
inhibit test iterations
ring bell on error
loop on error

use "CONTROL au to enter software SWR at lac. 176

3·25

ZRJGEO

RP04/0S/06
DISKLESS TEST. PART 1

ABSTRACT:
This test is used to test the device control logic connected to either
an RHll or RH70 disk drive controller. The DCL is mainly tested.
1J the disk is powered up, it is required to get the disk to the
"heads unloaded" position. After a success/ul run of this test it can
be assum\ld that the DCL part. which handels data, is working properly.
All data commands use the maintenance register in the wraparound mode.
This test assumes that the RH70 specific test (ERHAEl) has been
successfully run.
OPERA TING PROCEDURES :
START ADDRESSES:

·Switch 12 must be set when this program is to be run using an RH70
SA = 200 normal starting (RHll I RH70 has standard addr.176700 vec. 254)
SA = 204 to change non-standard addresses of RHll I RH70.
SA = 210 unit selection (program asks for unit number)
SWITCH SETTINGS:
SW 15 =
halt on error
SWI4= 1 loop on test
SW13 = 1 inhibit error typeout
SWI2=
RH70 controller select
SWll =
inhibit test iterations
SW10=
ring bell on error
SW09 =
loop on error
SWOB =
loop on test in SWR (7·OJ
SW07=
stop further doto misscompare printout
SW06= 1 ECC test· compare end result only

use "CONTROL au to enter soltware SWR at loco 176

3-26

ZRJHEO

RP04/0S/06
DISKLESS TEST, PART 2

ABSTRACT:
This test is used to test the device control logic connected to either
an RHll or RH70 disk drive controller. The DCL is mainly tested.
11 the disk is powered up, it is required to get the disk to the
"heads unloaded" position. Alter a successful run 01 this test it can
be assumed that the DCL part, ,"vhien handels data, is ~vorkjng properly.
All data commands use the maintenance register in the wraparound mode.
This test assumes that the RH70 speci/ic test (ERHAEl) has been
successlully run.
OPERA TING PROCEDURES :
START ADDRESSES:

·Switch 12 must be set when this program is to be run using an RH10
SA = 200 normal starting (RHll I RH70 has standard addr.176700 vec. 254)
SA = 204 to change 'non-standard addresses oJ RHII / RH70.
SA = 210 unit selection (program asks Jor unit number)
SWITCH SETTINGS:
halt on error
SW15=
loop on test
SW14=
inhibit error typeout
SW13=
RH70 controller select
SW12=
inhibit test iterations
SWll=
ring bell on error
SW10=
SW09= 1 loop on error
SWOB= 1 loop on test in SWR (7-0)
SW07= 1 stop lurther data misscompare printout
SWOG= 1 ECC test - compare end result only

use "CONTROL G" to enter soltware SWR at loco 116

3-27

ZRJIDO

RP04/0S/06

FUNCTIONAL CONTROllER (DCl) TEST. PART 1
ABSTRACT:
This tests the rest 01 the "DCL" (together with ZRJGxx and ZRJHxx). Alter this
one run ZRJIDO. Ii all this 4 tests run without error, it can be assumed that
the "DCL" works OK. It uses the disk sur/ace and the drive mechanics. It does
not need a lormatted disk pack. The test assumes a good scratch pack (not
to many bad sec tors).
OPERA TING PROCEDURES :
START ADDRESSES:
SA = 200 normal starting (RHll I RH70 has standard addr.176700 vec. 254)
It will test all drives available one alter an other.
SA = 204 to change non-standard addresses 01 RHll I RH70.
SA = 210 lor unit selection
SA:;:::: 220 same as 200 but will not nln tests needing manual intervention.
SWITCH SETTINGS:
·Use switch 12 = 1 if run on a 11170

SW15= 1 halt on' error
SW14:::::: 1 loop on test
SW13= 1 inhibit error typeout
SW12=
RH7D controller selected
inhibit iterotions
SWll=
SW10=
ring the bell on error
loop on error
SWD9=
loop on test in SWR < 7-0>
SWDB=
SW07=
stop luther data compares iJ SWOB is low
type all error registers iJ SWOB is low
SWD6=
multy address plug test iJ S WOB is low
SW05=
use 'CONTROL G" to enter soltware SWR at loco 176

3-28

ZRJJDO

RP04/0S/06

FUNCTIONAL CONTROLLER (DCL) TEST, PART 2
ABSTRACT:

This tests the rest 01 the "DCL" (together witl) ZRJGxx, ZRJHxx and ZRJIxx). II
all this 4 tests run without error, it can be assumed that the "DCL" works OK.
It uses the disk surface and the drive mechanics. It does not need a lormatted
disk pack. The test assumes a good scratch pack (not to many bad sectors).
OPERA TING PROCEDURES :

START ADDRESSES:
SA = 200 normal starting (RHll I RH70 has standard addr.176700 vec. 254)
It will test all drives available one alter an other.
SA = 204 to change non-standard addresses 01 RHll I RH70.
SA = 210 lor unit selection
SWITCH SETTINGS :

*Use switch 12 = 1 if run on a ll170

SWI5= I halt on error
SWl4 = I loop on test
SWI3= I inhibit error typeout
. SWI2= 1 RH70 controller selected
SWll = 1 inhibit iterations
SWI0= 1 ring the bell on error
SW09 = I loop on error
S WOB = 1 loop on test in SWR < 7-0 >
SW07=
stop luther data compares if SWOB is low
SW06=
type all error registers if SWOB is low
use "CONTROL G" to enter soltware SWR at loco 176

3-29

ZRJKBO

RP07
RP07 FORMA TTERISCANNER

ABSTRACT:
This is the 16 bit iormatterlscanner program. The format process uses media
"Dl::n:CT SKIPS" in addition to bad sector l1agging. This program has basicaly
6 Junctions: Jonnat, verily. scan, list, modily and write fE2. This program is
running under the Supervisor.
OPERA TING PROCEDURES :
To be used only by RP07 trained iield engineers

.R ZRIKBO
DR>START <CR>
Answer the hardware questions 01 the Supervisor
Then you have to enter the option:
lonnat headers and data on the disk pack
I
verily headers and track descriptors
2
scan the disk pack Jor new defects and record them
3
list the defective tracks and the headers of defective sectors
4
modily the track descriptor
5
write the second field service cylinder only

Ii your answer was a 0, 2 or a 4 then the program will ask you:
"Do yoy want to write anywhere on media (L) N ?"
A "N" (no) will lorce the program to use the held selvice cylinder only.
A "Y" will destroy all customer data on the pack.

Now you can change the drive parameters
"MIN CYL (0) 0 ? "
"MAX CYL (0) 630 ? "
"MIN TRK (D) 0 ? "
"MAX TRK (0) 31 ? "

3-30

ZRJLBO

RP07
RP07 fUNCTIONAL TEST
ABSTRACT:

This test will verily that the disk is capable 01 periorming seeks. that the
seeks and access times are within tolerance. that the addressing circuitry
operates properly. and that write and read data capabilities are lunctional.
This program is running under the supervisory program. 11 a KWII-P system
clock is not installed on the system, the timing tests will not be executed.
OPERA TING PROCEDURES :

.R ZRJLBP
DR > START
Answer the hardware questions oJ the Supervisor
Then you will be prompted by

CHANGE SW (t) ?
normal run is de/ault < CR >
il you answer "YES" to this question you can change the
lollowing drive parameters:
STARTING CYL (D) 0 ?
ENDING CYL (DJ 629 ?
INCREMENT CYL (D) 1 ?
STARTING TRK (D) 0 ?
ENDING TRK (D) 31 ?
INCREMENT TRK (D) 1 ?
STARTING SEC (D) 0 ?
ENDING SEC (D) 49 ?
DATA PATTERN (O) 030221 ?
DO YOU want TO WRITE ANYWHERE ON MEDIA (t) N ?
A "N" (no) will lorce the program to use the lield service cylinder only.
A "Y" will destroy all customer data on the pack.

It will print a warning message :
! CUSTOMER DATA WILL BE OVERWRITTEN! (test 17 & 18)

CONTINUE (t) ?
This test 17 and 18 (writing test) will only be run when the "WRITE DATA
ANYWHERE ON THE MEDIA" option is selected by the operator.

3-31

ZRJMBO

RP07

RP07 FRONT -END / ISOLATOR TEST
ABSTRACT:
This is a program which partially automates the pathlinder document to allow
computerized sequential diagnosis 01 an RP07. The program initially
demonstrates hardware integrity between the RHxx controller, associated
cabling and the disk control logic (DCL). Satisiactory completion 01 this phase
01 testing then pennUs "HOST" invocation 01 the RP07 resident
microdiagnostics, those speciJicalJy allowing remote execution, to ascertain a
reasonable level 01 con/idence in the disk drive. This program is running
under the supervisory program.
OPERA TING PROCEDURES :

.R ZRIMBO
DR > START
Answer the hardware questions 01 the Supervisor
Then you will be prompted by :

CHANGE SW (L) ?
nonnal run is delault < CR >
iI you answer "YES" to this question you can change the
lollowing drive parameters:

"EXECUTE TEST 25., MASSBUS INTERFACE SWITCH TEST (L) Y ?"
The test 25 requires manual intervention.
"FOR DRIVE N, WILL YOU PLACE THE MASSBUS DISABLE
SWITCH ]12-S01 IN THE DISABLE.'D (DOWN) POSITION?"
"EXECUTE TEST 52., PRINT CONTENS OF INl'ERNAL ERROR LOG (L) Y ?
The error log in the RP07 may be uselul as a
troubleshooting tool, and as sud) may be printed.
"SE.'LECT A TRACK FOR THE /lP07 INTEllNAL RD-WHl" TESTS (t) N ?"
"EXECUTE TEST 60, SELE.'CT A MICRO-DIAGNOCnC FOR EXEC. (L) N ?"

3-32

ZRJNAO

RP07
RP07 DU AL PORT TEST

ABSTRACT:
This test per/orms a series of tests which verify that the RP07 dual port logic
is functioning properly. Only the control logic is tested by this program, data
handling in the dual port mode is not tested by this progrom. Both ports 01
the drive are cabled to the some mossbus by a special coble. This arrangement
aHows the duo! port logic to be tested from one PDPll ! RHll or RH70. Power
down all mossbus disks except the one to test because you can get on disk
address conlliet. This program is running under the supervisory program.
OPERATING PROCEDURES :

.R ZRINAO
DR>START <CR>
Answer the hardware questions of the Supervisor

UNIT 1
RPCS 1 ADRS (0) 176700 ?
VECTOR (0) 254 ?
BR LEVL'L (0) 5 ?
DRIVE If (0) 0 ?
Supervisory commands are:
START
RL'START
CON1'lNUL'
PROCEED
EXIT
ADD
DROP
PRINT
DISPLAY
FLAGS
ZFLAGS

There are 32 subtests.

3-33

ZRJOBO

RP07
RP07 PERFORMANCE EXERCISER
ABSTRACT:

This program is designed to perform an interactive test on RP07 disk drives
connected to a massbus subsystem. The drives may be controlled by an RH70
controller. You can verily that the drives under test are performing to their
data error rate and seek error rate. The program will exercise drives connected
as either single or dual port units. Dual port drives are tested by loading and
running the program Irom both controlling systems. Operations on the
multi-drive coniigurations are overlapped (other drives are performing
seek/search operations while one drive is per/orming a data trans/ed.
OPERA TING PROCEDURES

.R ZR/OBO
Start address 204 allows to change the delault RPI RH address
or any drive parameters.
writes lirst datapattern, then goes into a testing mode.
(alter a CONTR. C)
KEYBOARD COMMANDS:
T = assign a drive lor test
R = performs a sequential read 01 a pack
W = write and check data pack with a datapattern
S = request a drive performance summary
D = deassign a drive under test
End 01 pass occures when the drive l1as read 2.58 x lODD million words
II S W09 = 1 the end 01 pass occures at 0.645 x lODD mi Ilion words read.
SWITCH SETTINGS :
SW 15 = halt on error
SW 13 = inhibit error type out

swuj= ring bell on error
SW09= change end 01 pass to 114 01 normal
SWOB= inhibit end 01 pass messages
SWD7= display all data compare errors
SWD6= do not alter the current operation parameten;
SW05 = partial register display it error (no ECC reg.)
SWD4 = do not drop drives at end 01 test or max. en'or count
SW03= display the sector in en'or iI 'DCK', 'DTE' or 'WCF'
SWD2 = do not type drive status at program start I no per/orm. report
SWDI = inhibit data compare alter read wlo 'DCK' error
SWDD =- read only mode

3-34

RKll RKOS/J IF

ZRKHGO

RKOS PERFORMANCE EXERCISER
ABSTRACT:
This program simulates a operating system nmning on RK05's and checks lor
errors tllat arise in such on environment. It uses overlapped seeks with polling
tIle drives etc. This test expects a good 10mlOtted scratch pack on all drives
to be tested. It can test up to B drives all together. One pass can take Irom

30 to 90 minutes.
Belore running this test make sure ZRKJ?? ZRKK?? ZRKL?? and ZRKI?? (utility
package / pock formatter) run with no error.

OPERA TING PROCEDURES

.R ZRKHGO
SA = 200 normal starling (writing /irst data pattern)
. SA = 210 restart address. go straight to exerciser and skips test 1·7
SWITCH SETTINGS :

SWI5=
SWI3=
SWI2=

SWl1=
SWIO=
SW09=

SWOB=
SW06=
SW05=

SWD4=
SWD3=
SW02=
SW01=

SWOO=

holt on error
inhibit error typeout
type out the error history
dump out all RKll registers
ring the bell on error
loop on specific error
dump out transfer data and elTor statistics
select bus address limits lor data transfers
holt before doing the next set 01 commands
do not rewrite the disk on 210 restart
type out elapsed time at error
drop drive alter maximum errors
type serial number 01 erroring drive
type only elapsed time if SWDB and SW03

use "CONTROL Gil to enter soltware SWR at loco 176

3-35

ZRKIFO

RKII RK05/J/F
RKOS UTILITY PACKAGE

ABSTRACT:
This program is not a diagnostic. rather it llelps to make adjustments. and
provides some utility programs needed to maintain RK05 disks.
OPERA TING PROCEDURES :
START ADDRESSES:
SA = 200 nonnal starting

The RKll utility package is divided into eight sections.
It will print a menue:
SECTION

o
1

2
3
4
5
6
7

NAME
INDEX
COMPATIBILITY TEST
OSCILLATING SEEK PACKAGE
FORMA1TEH SUHFACL' vt'HlFIt'R
fRONT PANNEL TEST
RK05 CONTROL PANNL'L 1'ES1' 2
HEAD ALIGNMENT /lOUTIN£.'
POWER fAILUllE mUlilNG WIllTE) TEST

TYPE=x
0= to adjust the index/sector timing to 70 us (+ ·12us).
To do that you need an alignment pack.

1 = to conJinn the Jact that a group oj drives are truly compatible.
2= to per/orm servo adjustments andlor seek logic clwc1wut by
per/onning seeks between user speciJied address.
The program requests to enter drive number and halts.
Enter drive number in SW (drive 0 = SWO= I}.
press continue.
The program requests to enter seek address and halts.
Enter seek address in SW reg. (4 cylinder seek = 2000)
(max cylinder seek 0·202 cylinders seek = 145000 in SW reg.)
press continue.

The rest should be stmit iOlWard.
SWITCH SETTINGS :
Section 2 oscillating seek pachage is utiing the tiwitches to tell
the program how big seeks to pertonn
Use "CONTROL G" to enter software SWR at loc 176

3-36

RKII/C/D

ZRKJEO
RK 11 BASIC LOG IC TEST # 1

ABSTRACT:

This program is part-l 01 2 and it checks ony the drive-independent logic 01
the RKll controller. no drive is needed. After tllis test run part 2 (ZRKKxx).
OPERA TING PROCEDURES :

.R ZRKJEO
TIle program will print:
END PASS t I
END PASS t 2 ....
SWITCH SETTINGS :

SW15= I halt on error
SWl4 = 1 loop on test
SWl3 = I inhibit error typeout
SW12= 1 loop on error
SW 11 = 1 inhibit iterations
SWlO= 1 testing on simulator
SW09= 1 loop on specilic error
SWOB = 1 loop on test as per SW < 07-00>
use "CONTROL Gil to enter soltware SWR at loco 176

3-37

ZRKKF2

RKII/C/D
RKll BASIC LOGIC TEST #2

ABSTRACT:
This program is part-2 oj 2 and it checks the rest 01 the controller logic. Make
sure that the drives to be tested are loaded with disks and are in 'RUN' and
'WRT' enabled. Put drives that are not to be tested on 'LOAD' mode. This
test is also capable 01 detecting laults in the drive.
OPERA TING PROCEDURES :

.R ZRKKF2
The program will print:

RK 11 BASIC LOGIC TEST 2
MAlNDEC-ll CZRKKF
TO TEST DRIVE 'N' HALT PROGRAM .....
DRIVES TO BE TESTED?
you enter the drive It like : 0,1.2 < cn >
DRIVE 0
DRIVE I
DRIVE 2
END PASS.
SWITCH SETTINGS :
S~fJ5 = 1 halt on error
SWI4= 1 loop on test
SWI3= 1 inhibit error typeout
SW12= 1 loop on error
SW J 1 = I inhibit iterations
SW 10= 1 testing on simulator
SW09= 1 loop on specific error
SWOB = 1 loop on test as per S W < 07-00>
SW06= I drop the drive alter maximum number 01 errors occur

use "CONTROL GU to enter soltwOl"e SWR at loco 176

3-38

ZRKLEO

RKII/RK05
RKOS DINAMIC TEST

ABSTRACT:
This progrom demonstrates the electromechanical integrity 01 the RK05 (RK05F)
drive. It checks linear positioner control and speed control. verifies read-write
logic integrity and provides a timer 10'" the seek lunction. Belore real testing
starts. the program lormats and then checks the pack lor correct lormat.
OPERA TING PROCEDURES

.R ZRKLEO

SA = 210 conversational mode
II any particular drive is to be selected Jor testing. put that drive
into "RUN" and "WRITE ENABLE" mode Put the rest of the drives on "LOAD"
and "WRITE LOCK". Then start as usual.
SWITCH SETTINGS:
SWI5=
halt on error
loop on test
SWI4=
inhibit error typeout
SWI3=
loop on error
SWI2=
SWll= I dump all RKll registers on error
SWlO= I ring bell on error
loop on specilic error
SW09=
SWOB=
loop on test as per SW<07·00>
SW07=
SWD6=
type seek timer
SW05=
type the small graph
SW04= I print the complete graph
SWD3= I terminate lunction selected by user
SW02=
drop the drive alter max. allowable errors
SWOI=
ask for data pattern
SWDO=

use "CONTROL G" to enter software SWR at loc. 176

3-39

RLVll

VRLACO
RL V 11 DISKLESS CONTROLLER TEST

ABSTRACT:

This program tests only the controller. tests registers read/write Junction. test
the reset Junction. the NO-OP Junction. interrupts and the maintenance
Junction. This test runs only on the RLVll controller (MBOI3. MBOI4).
OPERA TING PROCEDURES :

.R VRLACO
This program is running under the supervisory program.
This supervisory program will first talk to you.
CVRLA-C-O
CVRLACO RLVll RLOI DISKLESS DIAGNOSTIC
UNIT IS RLVlI
RESTART ADDRESS 145702
DR>START <CR>
You have to answer the hardware questions.
This is a (mostly used) example
CHANGE HW (t) ? Y < CR >
UNITS (0) ? 1< CR >
UNIT 0
11123 PROCESSOR (L) Y ?
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (0) 160 ? < CR >
DHIVE (0) 0 ? <CR>
BR LEVEL (0) 5 ? <CR>
f

CHANGE SW (t) ? Y < CR >
DROP ON ERROR LIMIT (t) N ?
AUTOSIZE (t) N ?
CVRLA rop 1
o Cumulative errors

3-40

VRLBCO

RLV12

RLV12 DISKLESS CONTROLLER TEST
ABSTRACT:

This program tests tIle RLVI2. RLVII and/or RLII disk controllers with or
without a drive attaclled. This test is a modified VRLABO test. retaining all
previous tests and got upgraded to include additional testing lor the RLV12.
In RLVI2 mode. the program tests the basic interlace logic. control register
manipulation and functionality. The RLV12 maintenance mode function is
executed to test controller write/read data paths without a drive present. The
extended addressing capability is tested in 18 or 22 bit mode depending on
the type and ammount of memory installed in the test system.
OPERA TING PROCEDURES

.R VRLB??
This program is running under the supervisory program.
This supervisory program will first ta1lc to you.
CVRLB·C·O
RLV12 DISKLESS
UNIT IS RLVI2. RLVIl. OR RLll
RESTART ADDRESS 145702
DR>START <CR>
You have to answer the hardware questions.
This is a (mostly used) example;

CHANGE HW (LJ ? Y < CR >

* UNITS (V) ? l<CR>

UNIT 0
RLV12 (L) Y ?
RLVll (LJ Y ?
CSR ADDRESS (a) 174400 ?
VECTOR (a) 160 ?
BR LEVEL (a) 4 ? < CR>
CHANGE SW (L) ? Y < CR >
ERROR LIMIT FOR AUTO· DROP (V) 0 ?
ALL REMAINING QUERIES ARE FOR OPTIONAL (MANUFACTORING)
G5388 TI.'ST·LOOP·MODULE SIT-UP. USE < ~Z > TO BYPASS.
G5388 TLM INSTALLED (LJ N ? N
MMU AVAILABLE
MEMORY SIZE 384 KW
22 BIT ADDRESSING
CVRLB EOP I

o Cumulative errors
3-41

ZRLGEO

RLII/RLVII/RLVl2

RLlI/RLVll/RLV12 CONTROLLER TEST 1
ABSTRACT:
This program is part 1 0/ 2. It start:; by checking ba:;ic interlace logic with
register manipulation. Then interrupts are tested with the corresponding BR
level. NOOP. get status. read headers. head select. exten:;ively checks the
CRC logic and seek operations. It tests the lull controller but by default also
exercises the drive. This test does not write onto the disk but it is strongly
recommended not to use a customer disk. II you want you can put the drive
in to ., WRITE PROTECT" mode.

OPERA TING PROCEDURES :

.R ZRLGEO
This program is running under the supervisory program.
This supervisory program will first talk to yOll.

CZRLG·E·O
CZRLG TESTS CONTR. FUNCTIONS. INTERFACE LOGIC. REG. OPERATIONS
UNIT IS RLOl.RLD2
RESTART ADDRESS 142060
DR>START <CR>
You have to answer the hardware que:;tions.
This is a (mostly used) example :
CHANGE HW (L) ? Y<CR>
t UNITS (D) ? 1 < CR>
UNIT O<CR>
RLlI= I. RLVll=2. RLVI2=3 (0) ? I<CR>
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (a) 160 ? < CR >
DRIVE (a) 0 ? <CR>
DRIVE TYPE "" RLOI (L) Y ? N < CR > (no /or RL02)
BR tEVEL (0) 5 ? <CR>
CHANGE SW (LJ ? N<CR>
NEXT TEST MA Y ZERO LOAD UNIT. DO IT ANYWA Y ? Y
It wW type (if no error:;)
CZRLG EOP 1
D Cumulative tHTOA"l)

3·42

RLII/RLVII/RLVl2

ZRLHBI

RLll/RLVll/RLVI2 CONTROLLER TEST 2
ABSTRACT:
This progIUm is pari 2 of 2. It continues testing of the RL controller. It tests
the write function in different ways. proper increment 01 RLBA reg., header
not found with write. multiple sector" translers. read function in diHerent ways.
checlls the SILO in the controller. tIle write-c11eck function. read without
header-compare. Tllis test writes onto the disk.
OPERA TING PROCEDURES :

.R ZRLHBI
This program is running under the supervisory program.
This supervisory pragIUm will first talk to you.
CZRLH-B-O
CZRLH TESTS WRITE DATA. READ DATA. AND WRITE CHECK OPERATIONS
UNIT IS RLOI.RI.02
RESTART ADDRESS 145702
DR>START <CR>
You have to answer the hardware questions.
This is a (mostly used) example
CHANGE HW (L) ? Y < CR >
# UNITS (0) ? 1 < CR>

UNIT O<CR>
RLH (L) Y?<CR>
BUS ADDRESS (O) 174400 ? < CR >
DRIVE TYPE = RLOI (L) Y ? N
VECTOR (O) 160 ? < CR >
BR LEVEL (O) 5 ? <CR>
DRIVE (O) 0 ? I<CR>
CHANGE SW (L) ? N < CR >
It will type (jJ no errors)
CZRLH EOP 1

o TOTAL ERRS

3-43

ZRLIDI

RLOI/RL02
RLOI/02 DRIVE TEST 1

ABSTRACT:
This program is part 1 01 2. The program runs on the first drive before starting
on the second. It tests: get status from drive with reset, get status, seek, and
read header. Only seeks with 0 difference are used so no head movement is
required. Optional : operator intervention test, head load and unload test,
drive select test, head alignment support routine.
OPERA TING PROCEDURES :

.R ZRLIDI
This program is running under the supervisory program.
This supervisory progrom will lirst talk to you.

CZRLI-D-O
CZRLI TESTS THE RLOI·02 INTERfACE AND BASIC DRIVE LOGIC
UNIT IS RLOI, RL02
RESTART ADDRESS 145702
DR>START <CR>
You have to answer the hardware questions.
This is a (mostly used) example
Change HW (LJ ? Y < CR >

* UNITS

(V) ? 1 < CR >

UNIT O<CR>
RLll (L) Y ?< CR >
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (0) 160 ? < eR >
DRIVE (0) 0 ? 1 < CR >
DRIVE TYPE == RLOI IL) Y ? N
BR LEVEL (0) 5 ? <CR>
CHANGE SW (LJ ? N<CR>
It will type (il no el'rol's)

CZRI.I EOP 1

o TOTAl, ERRS
1J YOll answer Y to tIle question
CHANGL' SW (LJ ? Y < Cli >

EXt'CUTE DRIVE SELECT 1'ESTS (U N ?
EXECUTE HEAD ALIGNMEN1' SUPPORT (1.J N ?
DO MANUAL INTERVENTION rESTS (LJ N ?
INPUT ERROR UMTT
20 ?

3-44

RLOI/RL02

ZRLJB2
RLOl/02 DRIVE TEST 2 (SEEK)

ABSTRACT;
This program is part 2 of 2. The test star-ts detecting outer and inner guard
band. Seek operations undergo a broad range of testing using single
diHerences. proceeding to seeks 01 greater differences. Tllis test does not write
onto tIle disk. yOIl can put it into tlte "WRITE· PROTECT" mode.
OPERA TING PROCEDURES ;

.R ZHLJB2
This program is running under tIle supervisory program.
This supervisory program will lirst talk to you
CZRL]·B·O
CZRLJ TESTS OUTER & INNER GUARD BAND DETECTION AND SEEK
OPERATIONS
UNIT IS RLOl.RL02
RESTART ADDRESS 145702
DH>STAHT <CR>
You have to answer the hardwar'e questions.
This is a (mostly used) example
Change HW (LJ ? Y < CR >
., UNITS (V) ? 1 < CR >
UNIT O<CR>
HUI (LJ Y?<CR>
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (0) 160 ? < CR >
DRIVE (0) 0 ? I<CR>
DRIVE TYPE = RLOI (L) Y ? N
BR LEVEL (0) 5 ? <CR>
ClJange SW (L) ? N<CR>
It will type (il no errors)
CZRL] EOP 1
o TOTAL ERRS
11 you answer Y to the question :
CHANGE SW (LJ ? Y < CR >
you can change the following parameters:
USE ALL CYL (L) N ?
USE ALL SECT (LJ N ?
LO W SEEK LIMIT (LJ N ?
UPPER SEEK LIMIT (LJ N ?
USE ONLY ONE SURF (LJ N ?
INPUT ERROR LIMIT (V) 20 ?
DATA CMP ERR LMT (V) 10 ?

3·45

NRLKAO

11/21-RLOI/RL02

11/21 - RLOI/02 PERFORMANCE EXERCISER
ABSTRACT:

The program tries to simulate a user environment. It will randomly exercise
up to 2 controllers and 8 drives. Initialy the bad sector lile is read Jrom each
drive and stored in memory. then each pack is written with one oj eight data
patterns. The drives are randomly picked and given a random string Junction
oj:
1. seek. write. write-check
2. seek. read data. compare data
3. seek. read headers, read 1 sector with no header compare. get status
4. seek. read. read
OPERA TING PROCEDURES :

.R NRLKAO
This program is running under the supervisory program.
This supervisory program will first talk to you.
DR>START <CR>
You have to answer the hardware questions.
This is a (mostly used) example :
Change HW (L) ? Y < CR >
it UNITS (0)

? 2< CR > (this is the number 01 drives)

UNIT O<CR>
RLll (t) Y?<CR>
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (OJ 160 ? < CR >
DRIVE (0) 0 ? 1 < CR >
DRIVI.' TYPE == RLOl (L) Y ? N
BR Ll::VI.'L (0) 5 ? <CR>
UNIT

Change SW (t) ? N < CR >
to get a summary type <CONTH C>
DR>PRI
alter tile summary. to continue type
DR>CON
II you answer Y to tlUiJ quesilOll
CHANGE.' SW (t) ? Y <. CII >
you can change a lot 01 paromeler:. like
RETRY LMT (0) 1 ?
TIME BETWEEN REPORTS (MIN) (0) 240 ?

3-46

RLOI/RL02

ZRLKB3

RLOI /02 PERFORMANCE EXERCISER
ABSTRACT:

The progrom tries to simulate a user environment. It will rondomly exercise
up to 2 controllers and 8 drives. Initialy tl1e bad sector lile is read Irom each
drive and stored in memory. then eacll pad is written witl) one 01 eight data
patterns. The drives are rondomly picked and given a random string lunction
_L-

VI.

1. seek. write. write-check
2. seek. read data. compare data
3. seek. read headers. read I sector witll no header compare. get status
4. seek. read. read
OPERA TING PROCEDURES :

.R ZRLKB3
This program is running under the supervisory program.
This supervisory progrom will lirst taUe to you.
DR>START <CR>
You have to answer the hardware questions.
This is a (mostly used) example :
CHANGE HW (t) ? Y < CR >
• UNITS (0) ? 2 < CR > (this is the number 01 drives)
UNIT O<CR>
RLll (L) Y?<CR>
BUS ADDRESS (0) 174400 ? <CR>
VECTOR (0) 160 ? < CR >
DRIVE (0) 0 ? 1 < CR >
DRIVE TYPE = RLOI (L) Y ? N
BR LEVEL (0) 5 ? < CR >
UNIT 1

CHANGE SW (L) ? N<CR>
to ge t a summary type < CONTR C>
DR>PRI
alter .the summary. to continue type
DR>CON
II you answer Y to the question :
CHANGE SW (L) ? Y <CR>
you can change a lot 01 parometers like:
RETRY LMT (0) 1 ?
TIME BETWEEN REPORTS (MIN) (0) 240 ?

347

RLOl/RL02

ZRLLCI

RLOI/02 DRIVE COMPATIBILITY TEST
ABSTRACT:
This program checks that all drives on a computerside are compatible with
each other Le. a drive can read the data written on a other drive. The program
attempts to lind ten sets 01 tracks at predetermined spots that contain no bad
sectors. The ten sectors are on both sur/aces. inner outer and middle cylinders.
As th~ pack is moved between drives the following checks are made:
1. each drive can overwrite each other drive.
2. each drive can read each othes data.
3. each drive can write to the nearby cylinders (written by other drives)
without disturbing the others data.
OPERATING PROCEDURES

.R ZRLLCI
This program is running under the supervisory program.
This supervisory proglUm will first talk to you.
DR>START <CR>
You have to answer the hardware questions.
This is a (mostly used) example :
Change HW (L) ? Y < CR >

* UNITS (D) ? 2 < CR > (this is the number oj drives on the System)
UNIT O<CIl>
RUI (LJ Y ?< CR >
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (0) 160 ? < CR >
DRIVE (0) 0 ? 1 < CR >
DRIVE l'YPE = RLOI (t) Y ? N
BR LEVEL (0) 5 ? <CR>
UNIT I

You have to unload tile dnve and move tile same pack to Ille next
drive as tile proglUm AIIstructs YOli.

3-48

RLOI/RL02

ZRLMBI

RLOI/02 BAD SECTOR FILE UTILITY
ABSTRACT:

This program has the following utilities
1. REPORT CONTENS OF THE BAD SECTOR FILE
2. ADD A SECTOR TO THE 'FIELD' BAD SECTOR FILL'
3. DELETE A SECTOR FROM THE 'FIELD' BAD SECTOR FILE
4. VERIFY PACK - READ ONL Y
5. WRITE PACK WITH WORST CASE.' DAl'A PA1'1'E.'RN AND VERIFY
6. MAKL' A BAD SECTOR FILE
7. PRINT HELP MESSAGE

ENTER COMMAND (1 - 7) - (0) ?
Make sure you have a known good drive beJore using tllis utility.
The utility 4 is very use/ull to verily any dolo pack witll data
on. It will report if any data on the pack cannot be read or the
CRC on the end is bad. In this case put the drive into write
protect mode.
The utility 5 is a good program to test a pack, but tllis one
will read and write
OPERA TING PROCEDURES :

.R ZRLMBI
This program is running under the supervisory program.
This supervisory program will first talk to YOll.
DR> Sl'AHT < CR>
You have to answer the hardware questions.
This is a (mostly used) example
Change HW (L) ? Y< CR >
it UNI1'S (0) ? 1 < CR >

UNIT O<CR>

RLll (L) Y ? < C R >
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (0) 160 ? < CR >
DRIVE (0) 0 ? 1 <CR>
DRIVE TYPE = RLOI (t) Y ? N
BR LEVL'L (0) 5 ? < CR >
Then you get the menue, lrom that YOll have to select the utility.

3-49

ZRLNCO

RLOI/RL02

RLOl/02 DRIVE TEST 3 (SEEK/READ)
ABSTRACT:
This program exercises RLOl102 di:.k drives on RLIllRLVII controllers. It starts
by testing the :.implest Junction:. first u:.ing the logic tested in earlier tests to
ted more complex Junctions. First it tests :.eeh then data tronsien. It reads
the bad sector Jiles into memory and will use thi:. later to prevent testing on
bad sectors.
It has 8 subte:.ts:

I. seek timing
2. basic read data test
3. write I read data test part I(with 8 patters)
4. rotational timing test
5. write I read data test part 2
6. write lock error and data protection te:.t
7. adjacent cylinder interlerence te:.t
8. overwrite te:.t
OPERA TING PROCEDURES

.R ZRLNCO
This program is running under the supervisory program.
This supervisory progrom will first taU, to you.
DR>START <eR>
You have to answer the hardware que:;tions.
This is a (mostly u:.ed) example :
Change HW (LJ ? Y < CR >
• UNITS (D) ? 2<CR> (thi:. i:; tile number oj drive:;)
UNIT O<CR>
RLll (L) Y ?<CR>
BUS ADDRESS (0) 174400 ? < CR >
VECTOR (0) 160 ? < CR >
,DRIVE (0; O? l<CR>
DRJVE 1'VPE' = RLOl (L) Y ? N
BR LEVE'L (0) 5 ? <CR>
UNI1' I

II you au:.wer Y to the quc:.tion
CHANGE SW (LJ ? V <: Cll >
you can change a lot oj parometcr.s lilw:
USE ALL CYL (t) N ?
USE' ALL SEcr (LJ N ?
DO MANUAl. INTL'RVENTJON TEST (I.) N ?
iJ no crror Jound it will print

CZHLN EOP 1

o TOrAL t..'RRS
3-50

RM02/03/05

ZRMLBI

RM02l03/0S PACK FORMATTER PROGRAM
ABSTRACT:

This program formats disk packs either in 16 bit or 18 bit mode and I or
performs a check of the pack's surlace by reading back the wlitten headers
and data bi t pattern.
You can select a verify mode only.
NOTE: This program is not intended to be a entire sector verification test.
lor doing that you need more and diHerent data patterns.
OPERA TING PROCEDURES :

START ADDRESSES:
SA = 200 normal starling address (address 176700. vector 254).
SA = 204 non-standard RHll or RH70 address/vector and to use the bad
sector lile utility routines.
Aiter start the program prints the UNIT STATUS table
o
LOAD DEVICE
I
ONLINE RM03
2
NOT PRESENT
Now you have to answer the questions printed.
DO YOU WANT TO FORMAT (LJ Y ? « CR > lor yes. N Jor verify only)
DO YOU WANT 16. BIT MODE (L) Y ? «CR> lor yes)

DRIVE :J
CHANGE DRIVE PARAMETERS (L) N ?
11 you answer with Y (yes) you can enter address limits and
you get the menue of the bad sector Iile utility.
ENTER ADDRESS LIMITS:
MINCYL
0 I
MAXCYL
822 I
MINTRK
0 I
MAXTRK
4 /
FORMAT & HEADER VERIFY. OPERATE IN 16. BIT MODe
SELEcr ONE OF THE FOLLOWING FUNCTIONS
you get 5 subprogroms to select lrom.
SWITCH SETTINGS :
SW 15 = I llalt on error
SW 13 = I inhibit error typeout

SWlO= I bell on error
I loop on error
SW02 = I don't display system status alter initial starl
SWOI == I loop on the current track
SWOO= I loop the progrom on selected d,ive
use "CONTROL a" to enter software SWR at loc 176

SW09 =

3-51

RM02/03/0S

ZRMMB2

fUNCTIONAL TEST PART 1
ABSTRACT:
This test starts with simple functions like error clear test, diagnostic mode
test, pack acknowledge test, recalibrate test, oHset test. interrupt test, return
to centerline test, seek test look ahead test and so one. Each unit to test must
be loaded with a scratch pack.
OPERA TING PROCEDURES :
START ADDRESS
SA = 200 nonnal startaddress (address = 176700, vector
SA= 204 to change address and vector 01 the RHIRM
The program will print:

254)

CZRMMBO . RM05/312 FUNCTIONAL TEST, PT I
SWR

= 000000 NEW =
you can change the switch register now.
II you have a switch register on the CPU change it there.

TYPE HELP TEXT (L) N ?
you can answer with 'Y' and it will print the list 01 all tests
and the meaning of the switch settings.

You have to select a drive or type 'A' for all drives.
SWITCH SETTINGS :
SW15 =
halt on error
SW14=
loop on test
SWI3:;;
inhibit error typeout
SW12:;;
SWll:;;
inhibit iterations
SWIO=
bell on error
loop on specjJjc errol'
SW09=
SWOB= I loop on test as per SW<07-00>
SW07= 1 TN 128
SW06=
TN 64
SW05=
TN 32
TN 16
SW04=
TN 08
SW03=
SW02=
TN 04
TN 02
SWOl=
1'N 01
SWOO=

RM02/03/05

ZRMN131

fUNCTIONAL TEST PART 2
ABSTRACT:
This program continues Irom part I and tests mainly write, read and write
check operations using headers and data. Select the 'TYPE HELP TEXT (LJ N
? to list all tests performed.
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 normal startaddress (address = 176700, vector
SA = 204 to change address and vector 01 the RHIRM
The program will print:

254)

CZRMNBO . RM051312 FUNCTIONAL TEST, PT 2
SWR = 000000 NEW =
you can change the switch register now.
II you have a switch register on the CPU change it there.
TYPE HELP TEXT (L) N ?
you can answer with 'Y' and it will print the list 01 all tests
and the meaning 01 the switch settings.
You have to select a drive or type 'A' lor all drives.
SWITCH SETTINGS:
SW15 = 1 halt on error
SW14 = 1 loop on test
SWI3= 1 inhibit error typeouts
SWI2=
SWll = inhibit iterations
SWI0=
bell on error
SW09=
loop on specific error
SW08= 1 loop on test as per SW<07·00>
SW07= 1 TN 128
SW06= 1 TN 64
SW05= 1 TN 32
SW04= 1 TN 16
SW03=
TN 08
SW02= 1 TN 04
SWOl = 1 TN 02
SWOO= 1 TN 01

3-53

ZRMPB2

RM02/03/05

DISKLESS OCL/RU DIAGNOSTIC PART 1
ABSTRACT:

This program detects failures in the RH massbus controller as well as in the
massbus RM adapter. There are 120 (octal) subtests. Select the 'TYPE HELP
TEXT (L) N ?' to get the discription of all test.
OPERA T!NG PROCEDURES :

START ADDRESS
SA = 200 nonnal startaddress (address = 176700, vector
SA = 204 to change address and vector of the RHIRM
The program will print:

254)

CZRMPBO - RM051312 DISKLESS TEST, PT I
SWR = 000000 NEW =
you can change the switch register now.
11 you have a switch register on the CPU change it there.
TYPE HE.'LP TEXT (LJ N ?
you can- answer with 'Y' and it will print the list 01 all tests
and the meaning 01 the switch se ttings.
You have to select a drive or type 'A' lor all drives.
SWITCH SETTINGS:
SW15 = I halt on error

SW14 = 1 loop on test
SWI3=
inhibit error typeouts
SW12=
SWll =
inhibit iterations
SWI0=
bell on error
SW09=
loop on error
SW08= I loop on test as per SW<07-00>
SW07= I TN 128
SW06= 1 TN 64
SW05= I TN 32
SW04= 1 TN 16
SW03= 1 TN 08
SW02=
TN 04
SWOl =
TN 02
SWOO=
TN 01

355

ZRMQBl

RM02/03/05

DISKLESS DCL/RH DIAGNOSTIC PART 2
ABSTRACT:
This program detects lailures in the RH massbus controller as well as in the
massbus RM adapter. It continues testing lrom part 1. There are 24 (octal)
subtests. This program is using the maintenance mode 01 the RM adapter a
lot. Answer yes (Y) to: 'TYPE HELP TEXT (LJ N ?' to get the discription 01 all
test.
OPERA TING PROCEDURES :
START ADDRESS
SA = 200 normal startaddress (address = 176700. vector
SA = 204 to change address and vector 01 the RHIRM
The program will print:

254)

CZRMQBO . RM051312 DISKLESS n:ST, PT 2
SWR = 000000 NEW =

you can change the switch register now.
II you have a switch register on the CPU change it there.

TYPE HELP TEXT (L) N ?
you can answer with 'Y' and it will print the list 01 all tests
and the meaning oj the switch settings.
You have to select a drive or type 'A' for all drives.
SWITCH SETTINGS :
SW15 =
halt on error
SWI4=
loop on test
SW 13 =
inhibit error typeouts
SW12=
SWll =
inhibit iterations
SWlO= 1 bell on error
SW09= 1 loop on error
SW08= 1 loop on test as per SW<07·00>
SW07= 1 l'N 128
SW06= 1 TN 64
SW05= 1 TN 32
SW04= 1 'f'N 16
SW03:=
TN 08
TN 04
SW02=
TN 02
SWOl=
swao= TN OJ

3-56

ZRMRBO

RM02/03/05
RM DUAL PORT TEST PART 1
ABSTRACT:

This test performs a series 01 tests which verily that the RM02103105 dual port
logic is functioning properly. Only the control logic is tested by this program.
data handling in the dual port mode is not tested by this program. Both ports
of the drive are cabled to the same massbus by a special cable. This
arrangement aiiows the duai port logic to be tested from one PDPii ; RHii
or RH70. The part 2 performs manual intervention tests.
OPERA TING PROCEDURES :

Connect the dual port test cable (PIN: 7010507-02).
Any other drive on the massbus which has an address in conflict with
either of the test addresses must be powered down.
I recommend to power down all drives except the one to test.
START ADDRESS
SA = 200 normal startaddress (controller address = 176700. vector = 254)
SA = 204 restart address. the program will use the current drive address.
SA = 210 to allow the address of the RHll I RH70 to be changed.
The program will print:

CZRMRBO - RM051312 DUAL PORT LOGIC TEST. PT I
SWR

= 000000 NEW =
you can change the switch register now
or < CR > for no change.
11 you have switches on the CPU. change it there.

Enter the drive number.
Enter the test number «

cn > will run all tests).

SWITCH SETTINGS :

SW15=
halt on error
SWI4=
loop on test
SWI3=
inhibit error typeout
SW12=
SWll = inhibit iterations
SWIO= I bell on error
SW09= I loop on error

3-57

RM02/03/0S

ZRMSBO

RM DUAL PORT TEST PART 2
ABSTRACT:
This is part 2 01 2 and is used to test the "DUAL PORT SELECT" switch. This
pan is the manual intervention pan.
OPERA TING PROCEDURES :

Connect the dual port test cable (PIN: 7010507·02).
Any other drive on the massbus which has an address in conilict with
either 01 the test addresses must be powered down.
I recommend to power down all drives except the two under test.

START ADDRESS
SA = 200 normal stanaddress (controller address = 176700. vector = 254)
SA = 204 restart address. the program will use tIle current drive address.
SA = 210 to allow the address 01 tIle HH 11 I RH70 to be changed.

The program will print:
CZRMSBO . RM051312 DUAL PORT LOGIC 1'ES1'. P1' 2
SWR

= (100000 NEW =
you can change the switch register now
or < CR > lor no change.
Ii you have switches on the CPU. change it there.

Enter the drive number.
Enter the test number « CR > will run all tests).
SWITCH SETTINGS :
halt on error
SW15=
SW14=
loop on test
SW13=
inhibit error typeout
SW12=
SWll =
inJlibit iterations
SWlD= 1 bell on error
SW09= 1 loop on error

ZRMTBO

RM02/03/05
RM DRIVE COMPATIBILITY TEST
ABSTRACT:

This progrum veri/ies the compatibility 01 lip to 16 RM drives which may
,-aside on 1 or more RH/RM subsystems. Compatibility is defined here as the
ability of a drive to write data which can be read succesS/ully by all other
drives. and additionally the ability 01 a drive to completely over-write data
written by all other drives. It test specialy :
1. Head mis-alignment
2. Positioner lateral misalignment
3. Spindle-Cartridge interface runout
4. Improper levels of write current
S. incorrect addressing 01 read/write heads
Testing is done in two passes. In pass 1. compatibility data patterns are written
by all the drives upon the same disk pack. In pass 2. the data from all drives
is read by each drive. with head oHset.
OPERA TING PROCEDURES :
START ADDRESS
SA = 200 normal startaddress (controller address = 176700. vector = 254)

Here the program assumes that all drives are on this system.
SA =- 204 to change RH/RM address and vector and to run pass 1.
SA = 210 to change RHIRM address and vector and to run pass 2.

The progrum will print:
CZHMTBO . HMOS/3 2 DHIVE COMPATIBILITY TST
SWR

= 000000 NEW =
you can change the switch register now
or < CR > for no change.
11 you have switches on the CPU. change it there.

SUBSYS "A" DRIVES (S):
Enter how many drives you have on sys A (2.3.S.7<CR>J
Follow all instructions typed by the progrum.
SWITCH SETTINGS :

SW15 =
SWI4=
SWI3=
SWI2=
SWll=
SWIO=
SW09=
SWOB==
SW07=

halt on error
loop on current test
inhibit error typeout
inhibit truce trap
1 bell on error
I loop on error
I apply random staa between operutions
1 type bad sector files at start

3-59

RM02/03/05

ZRMUBI

RM DRIVE PERfORMANCE EXERCISER
ABSTRACT:
This program is designed to perform an interactive test on RM02/03/05 disk
drives connected to a massbus subsystem. You can verify that the drives
under test are performing to their data error rate and seek error rate. The
program will exercise drives connected as either single or dual port units.
Dual port drives are tested by loading and running the program from both
controlling systems. Operations on the multi-drive configurations are
overlapped (other drives are performing seek/search operations while one
drive is performing a data transler).
OPERA TING PROCEDURES :
START ADDRESS
SA:::; 200 normal startaddress (controller address :::; 176700, vector :::; 254)
Data patterns will be written to all Oil-line drives first before
the
test goes into testing mode
SA:::; 204 to change RHIRM address and vector.

The program wW print:
CZRMUBO - RM05/312 PERFORMANCE EXERCISER
$WR

000000 NEW =
you can change the switch register now
or < CR > for no change.
II you have switches on the CPU, change it there.
CHANGE PARAMETERS (L) N ?
KEYBOARD COMMANDS:
Tn
assign drive number "n" for test
Dn
drop drive "n"
Rn
per/orms a sequential read of a pack in drive "n"
Sn
print performance summary of drive "n"
Wn = write and check data pack with a data pattern in drive "n"
WTn = write and test after drive "n"

SWITCH SETTINGS :
SW 15 =
halt on error
SW 13 =
inhibit error typeout
SW10= I bell on error
SWOB = 1 inllibit end oj pass message
SWD7display 011 doto compare errors
do not alter tho current operation parameters
SW06=
do not display E'CC registers JO case ot errors
SW05=
SW04=
do not drop drives at end 01 test I max error COllllt reached
SWD3=
dIsplay sector':> in enor
SW02=
JOhiblt subsystem status report during startllp
SWOI=
1l1hibit data compare altet' read commond
SWOO,-,read only mode
3-60

ZRMVBl

RM02/03/05
EXTENDED DRIVE TEST
ABSTRACT:

This program tests extensively seek functions. seek timing. track/sector
addressing. and that the data storage and retrieval capabilities are functioning
properly.
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 normal startaddress (address
176700. vector
SA = 204 select operating parameters
SA = 210 ,select RHll I RH70 address and vector
SA = 214 combination of 204 and 210

254)

The program will print:

CZRMVBO . RM051312 EXTENDED DRIVE n:ST
SWR

= 000000 NEW

you can change the switch register now.
11 you have a switch register on the CPU change it there.
When the program is started from location 200 or 210. tests 0-10, 12,
13. 15·20 will be run using all available online drives. II the operator
wishes to select the drives to be tested. the tests to be performed, or
the parameters to be used. the conversation mode may be entered by typing
a
CONTROL C or by starting the program from either location 204 or 214.
SWITCH SETTINGS :

halt on elTor
SW15=
SWI4=
loop on test
inhibit error typeouts
SWI3=
type out test number
SWI2=
inhibit iterations
SWll=
SWlO= I bell on error
SW09= 1 loop on error
SWOB= I print error messages on line printer
SW07=
read "C. SWR" settings from TTY
SW06=
inhibit time reports
report one error per sector
SW05=
SW04=
inhibit writes in test 20
SW03=
inhibit writechecks in test 20
SW02=
inhibit read and software compare in test 20
SWOI=
inhibit software compare in test 20
SWOO= 1 perform read alter write check in test 20

3·61

ZRNAAO

RM80
RM80 PERFORMANCE EXERCISER
ABSTRACT:

This program is designed to perform an interactive test on RMBD disk drives
connected to a massbus subsystem. You can verify that the drives under test
are perfol"ming to their data error rate and seek error rate. The program will
exercise drives connected as either single or dual port units. Dual port drives
are tested by loading and running the program from both controlling systems.
Operations on the multi-drive configurations are overlapped (other drives are
performing seele/search operations while one drive is per/orming a data
transled.
OPERA TING PROCEDURES

.R ZRNAAD
START ADDRESS
SA:;;:: 200 normal startaddress (controller address -= 176700, vector = 254)
Data patterns will be written to all on·line drivel> first be/ore the
test goes into testing mode
SA:;;:: 204 to change RH/RM8D address and vectol-.
The program will print:
CZRNAAO - RMBD PERFORMANCE EXERCISER
SWR :;;:: 000000 NEW:;;::
you can change the SWR now or < CR > lor no change.
lJ you have switches on the CPU, change it there.
DO YOU WISH TO EXERCISE ONLY FE CYLINDERS (L) Y ?
CHANGE PARAMETERS (LJ N ?
KEYBOARD COMMANDS:
To get into command mode during testing. type a "CONTROL C"
Tn
assign drive number "n" for test
Dn
drop drive "n"
Rn
performs a sequential read 01 a pock in drive "n"
Sn
print performance summary 0/ drive "n"
Wn = write and check data pock with a data pattern in drive "n"
WTn :;;:: write and test alter drive "n"

SWITCH SETTINGS :

SW15 =
halt on error
SW13 =
inhibit error typeout
SW 10 = 1 bell on error
SWDB = 1 inhibit end 01 pass message
SWD7=.
display all data compare errors
SW06""
do not olte!- the curr-ent operation pammete,))
SW05 =
do not display f;CC registers JO case ot en'Ors
SW04 =
do not drop drives at end 01 te:;t I max el'J'Or COUllt l-eached
SW03 =
display sectors in error
SWD2 =Illhibit subsystem I>tatus report dUring startllp
SWDI =
inhibit dOlO compare oiler read command
SWOD· i read ouiy mode
3-62

ZRNBAO

RM80

DISKLESS RM-ADAPTER / RH DIAGNOSTIC PART 1
ABSTRACT:
This progrom detects lailures in the RII massbus controller as well as in the
massbus RM adapter. There are 120 (octal) subtests. Select the TYPE HELP

TEXT (LJ N ?' to get the discription 01 all test .

.R ZRNBAO
START ADDRESS
SA = 200 normal starladdress (address = 176700, vector
SA == 204 to change address and vector 01 t11e RHIRM
The progrom will print:

254)

CZRNBAO - RM80 DISKLESS TEST, PT I
SWR

= 000000 NEW ==
you can change the switch register now.
II you have a switch register on the CPU change it there_

TYPE HELP TEXT (LJ N ?
you can answer with 'Y' and it will print the list 01 all tests
and the meaning 01 the switch settings.

You have to select a drive or type 'A' lor all drives.
SWITCH SETTINGS :

SWI5=
SW14=
SW13==
SW12==
SWl1==
SWID=
SW09=
SW08=
SW07=
SW06==
SW05=
SW04=
SW03=
SW02=
SWOl ==
SWOO=

halt on elTor
loop on test
inhibit error typeouts
inhibit iterotions
1 bell on error
1 loop on error
1 loop on test in SW<07-00>
1 TN 128
1 TN 64
1 TN 32
1 TN 16
1 TN 08
TN 04
1 TN 02
1 TN 01

3-63

ZRNCAO

RM80

DISKLESS RM-ADAPTER / RH DIAGNOSTIC PART 2
ABSTRACT:
This progrom detects lailures in the RH massbus controller as well as in the
massbus RM adapter. It continues testing lrom part 1. There are 24 (octal)
subtests. This progrom is using the maintenance mode 01 the RM adapter a
lot. Answer yes (Y) to: 'TYPE HELP TEXT (L) N ?' to get the discription 01 all
test.
OPERA TING PROCEDURES :
.R ZRNCAO
START ADDRESS
SA:;:: 200 normal startaddress (address '-'- 176700, vector
SA=2D4 to change address and vector 01 the RHIRM
The progrom will print:

254)

CZRNCAO - RMBD DISKLESS TEST, PT. 2
SWR

= DDDDDD NEW =
you can change the switch register now
II you have a switch register on the CPU change it there.

TYPE HELP TEXT (L) N ?
you can answer with 'Y' and it will print the list 01 all tests
and the meaning 01 the switch settings.
You have to select a drive or type 'A' lor all drives.
SWITCH SETTINGS :
SW 15:;::
halt on error
SW14=
loop on test
SW13=
inhibit error typeouts
SWI2=
inhibit iterations
SWll=
SWID= 1 bell on error
SWD9= 1 loop on errol'
SWDB= 1 loop on test as per S W < 07-00 >
SWD7= 1 TN 128
TN 64
SWDG=
TN 32
SWD5=
TN 16
SWD4=
SWD3;;;..
TN D8
TN 04
SWD2=
SWDI =
TN 02
SWOO~
TN 01

3-64

ZRNDAO

RM80
RM80 FUNCTIONAL TEST PART 1

ABSTRACT:
This is the first oJ 4 programs, wllich would nornlOly be nm in sequence,
starting with part 1. Bri elly , part 1 tests JlOusekeeping and mecanical
positioning operations like controller clear test, pack acknowledge test,
recaJibrate test, ollset test, return to centerline test, seek test, search test and
SO Oil. l·here ara 67 (octal' sub tests in part 1.
OPERA TING PROCEDURES

.R ZRNDAO
START ADDRESS
SA = 200 normal startaddress (address ~ 176700, vector
SA = 204 to change address and vector of the RHIRM
The program will print:

254)

CZRNDAO . RM80 FUNCTIONAL n;ST. Pl'
SWR = 000000 NEW =
you can change the switch register now.
11 you have a switch register on the CPU change it there.
TYPE HELP TEXT (LJ N ?
you can answer with 'Y' and it will print the list 01 all tests
and the meaning oJ the switch settings.
You have to select a drive or type 'A' Jor all drives.
SWITCH SETTINGS :
SW15=
halt on error
loop on test
SW14=
inhibit error typeouts
SW13=
SW12=
inhibit iterations
SWll=
SWlO= 1 bell on error
SW09= 1 loop on error
SW08= 1 loop on test as per SW<07·00>
SW07= 1 TN 128
TN 64
SW06=
TN 32
SW05=
TN 16
SW04=
SW03= 1 TN 08
SW02= I TN 04
SWOl= 1 TN 02
SWOO= 1 TN 01

365

ZRNEAO

RM80
RM80 FUNCTIONAL TEST PART 2

ABSTRACT:
This is the second oj 4 programs, which would normaly be run in sequence,
starting with part 1. BrieJly, part 2 tests write, read and write check operations
like lormat test, read header test, read invalid sector test, Jormat FE cylinder
test and so on. There are 31 (octal) subtests in part 2.
This test does not overwrite customer data.
OPERA TING PROCEDURES :

.R ZRNEAO
START ADDRESS
SA;;; 200 normal startaddress (address = 176700, vector
SA;;; 204 to change address and vector oj the RHIRM
The progrom will print:

254)

CZRNEAO - RM80 FUNCTIONAL TEST, PT 2
SWR ;;; 000000 NEW :=
you can change the switch register' now.
II you have a switch register on the CPU change it there.
TYPE HELP TEXT (L) N ?
you can answer with 'Y' and it will print the list oj all tests
and the meaning 01 the switch settings.
You have to select a drive or type 'A' for all drives
The program must be halted only by typing "CONTROL C" on the console,
othervise bad header information may be lelt on the disk.
SWITCH SETTINGS :
SW15;;;
halt on error
SW14;;;
loop on test
SWI3;;;
inllibit error typeouts
SWI2;;;
SWl1;;;
inhibit iterations
SW1D;;;
bell on error
SW09;;;
loop on error
SW08;;; 1 loop on test as per SW<07·00>
SW07= 1 TN 128
SW06= I TN 64
fN 32
SW05=
SW04=
l'N 16
SW03=
TN 08
SW02=
TN 04
SWOl =
TN 02
SWDO=
TN D1

3-66

ZRNFAO

RM80
RM80 FUNCTIONAL TEST PART 3
ABSTRACT:

This is the third 01 4 programs. whicll would normal}' be nll1 in sequence.
starting with port 1. Briefly. port 3 tests write. read and write check operations
using data pattrens. and lorcing diflerent en'or conditions. There are 23 (octal)
subtests in port 3.
This test does not over. ·"rite customer data. l!11 data translers \JI/il1 be
per/onned on the FE cylinders only.
OPERA TING PROCEDURES :

.R ZRNFAO
START ADDRESS
SA = 200 nonna1 startaddress (address = 176700. vector
SA = 204 to change address and vector 01 the RH I RM
The program will print:

254)

CZRNFAO . RM80 FUNCnONAL TL'ST, PT 3
SWR

000000 NEW =
you can change the SWitcll register now.
II you have a switch register on the CPU change it there.

TYPE HELP TEXT (LJ N ?
you can answer with 'Y' and it will print the list 01 all tests
and the meaning 01 the switch settings.
You have to select a drive or type 'A' lor all drives.
The program must be halted only by typing "CONTROL C" on the console,
othervise bod header in/onnation may be 1elt on the disk.
SWITCH SETTINGS ;

halt on error
SWI5=
loop on test
SW14=
SW13=
inhibit error typeouts
SW12=
SWll ==
inhibit iterations
SWlO= 1 bell on error
SW09= 1 loop on error
SW08= 1 loop on testasperSW<07·00>
SW07= 1 TN 128
SW06=
TN 64
SW05= 1 TN 32
SW04= 1 TN 16
SW03= 1 TN 08
SW02=
TN 04
SWOI = 1 TN 02
SWOO= 1 TN 01
3·67

ZRNGAO

RM80
RM80 fUNCTIONAL TEST PART 4

ABSTRACT:
This is the last 01 4 progroms. which would normaly be run in sequence.
starting with part 1. Briefly. part 4 tests seeks. checks that seek times are
within tolerance and that the trock/sector addressing Circuitry operates
properly. There is absolutely no writting of data involved in this program.
There are 15 (octal) subtests in part 4.
This test does not overwrite customer data.
OPERA TING PROCEDURES :

.R ZRNGAO
START ADDRESS
SA = 200 normal startaddress (address
SA = 204 select operating parometers
SA = 210 select RH controller addresses
SA = 214 combination of 204 and 210

176700. vee tor

254)

The progrom will print:
CZRNGAO - RMBO FUNCTIONAL TEST. PT 4
SWR

= 000000 NEW =
you can change the switch register now.
Ii you have a switch register on the CPU change it there.

You have to select a drive or type 'A' lor all drives.
SWITCH SETTINGS :
SW15 =
halt on error
SWI4",
loop on test
SW13=
inhibit error typeouts
SWI2=
type test number
SWll =
inhibit iterotions
SWlO= 1 bell on error
SW09= 1 loop on error
SWOB", 1 print error message on line printer
SW07",
read "C. SWR" settings Jrol1l TTY
SWD6= 1 inhibit time reports (test 11·15)
CONTROL SWITCH SETTINGS :
SWD6= I 50 Hz power source (lor seek timing)
SWOG ~ 0 GO Hz powee source (for seek timing!

3-68

ZRNHAO

RM80
RM80 DUAL PORT TEST PART 1
ABSTRACT:

This test performs a series of tests wllicl1 verily that tIle liMBO dual port logic
is functioning properly. Only the coull-ol logic is tested by this program. data
handling in the dual port mode is not tested by tllis program. Both ports 01
the drive are cabled to tIle same massbus by a special cable. This arrangement
allows tl!f' dual port logic to be tested hom one PDPll I RHll or RH70. The
part 2 performs manual intervention tests.
OPERA TING PROCEDURES :

Connect the dual port test cable. (PIN: 7010507-02).
Any otller drive on the massbus w}lich }lOS an address in con/lict with
either of the test addresses must be powered down.
1 recommend to power down all drives except the one to test .
.R ZRNHAO
START ADDRESS
SA:= 200 normal startaddress (controller addr-ess := 176700. vector = 254)
SA:= 204 restart address. the progr-am will use the current drive address.
SA := 210 to allow the address of the RH 11 I RH70 to be changed.

The program will print:
CZRNHAO - RMBO DUAL PORT LOGIC TEST, PT 1
SWR

= 000000 NEW =
you can change the switch register now
or < CR > for no change.
If you have switches on the CPU. change it there.

f.'nter the drive number.
Enter the test number « CR > will run all tests).
SWITCH SETTINGS :
SWI5:=
halt on error
SW14 =
loop on test
SW13 =
inhibit error typeout
SWI2=

SWll =

inhibit iterations

SWlO= 1 bell on error

SW09= 1 loop on error

3-69

ZRNIAO

RM80
RM80 DUAL PORT TEST PART 2
ABSTRACT:

This is part 2 01 2 and is used to test the "DUAL PORT SELECT" switch. This
part is the manual intervention part.
OPERATING PROCEDURES :

Connect the dual port test cable (PIN: 7010507·02).

Any other drive on the massbus which has an address in conflict with
either 01 the test addresses must be powered down.
I recommend to power down all drives except the one to test .

.R ZRNIAO
START ADDRESS
SA = 200 nonnal startaddress (controller address = 176700. vector = 254)
SA = 204 restart address. the program will use the cun"ent drive address.
SA = 210 to allow the address 01 the RHll I RH70 to be changed.
The program will print:
CZRNIAO - RMBO DUAL PORT LOGIC TEST. PT 2
SWR = 000000 NEW =
you can change the switch register now
or < CR > lor no change.
JJ you have switches on the CPU. change it there.
Enter the drive number.
Enter the test number « CR > will run all tests).
SWITCH SETTINGS :
SW15 =
halt on en'or
SW14=
loop on test
SW13=
inhibit error typeout

SW12=
SWll =

inhibit iterations
SWlO= 1 bell on error
SW09= 1 loop 011 error

3·7G

ZRNJBO

RM80
RM80 HDA FORMATTER PROGRAM
ABSTRACT:

nlis program is a reconstruction process lor 16 bit applications that
re-establishes tIle lactory lonnat 01 a IlDA. Tllis is not a troubleshooting tool,
also HDA's should not be lormatted unless tIle eXisting lormat has been
damaged by hardware or soltware lailures. Manulacturing has much better
methods and equipment to scan a HDA lor bad or' rnaryinal sectors (which
can be sometimes be read and sometimes not) tllan we in the lield. So always
remember, do not lormat any HDA unless you I'f~aly have a good reason to
do so.

NOTE: This program is not intended to be a entire sector verilication test,
lor doing that you need more and diJJerent data patterns.
OPERA TING PROCEDURES

.R ZENJBO
Alter start the program prints:
CZRN/BO - RM80 fORMATTER UTILITY
DRIVE' f:
enter the drive number address lollowed by a < CR >
OPTIONS:
the lollowing commands are available:
IN
fO
FO:f

initialize the bod sector lile. This will destroy the
contens 01 all the bod sector liles.
lonnat tIle disk (all cylinders 0-560)
lonnat the FE cylinders only (cyl. 559 trk. 2 . cyl 560 trk 13J

LI
LI:L
VFL==N
ERL == N
CSR=N
VEC=N

list tIle physical addresses 01 tIle delects in all bad sector liles.
list the logical addresses 01 the delects in all bod sector liles.
verily I how many times to read tIle data in verily mode.
error limit count belore the lormat is aborted.
RM bose address (delault is 176700)
RM vector address (delault is 254)

EXAMPLE:
OPTION: rOICSR == 176000lVEC == 260lVn '-" 31EHL -" 10< CR>

3·71

RQDX/RUXSO/RX/RD

ZRQAHO

RQDXl/2/3, RUXSO, RXSO, RDSl. RDS2 EXERCISER'
ABSTRACT:
This program is a subsystem perionnance exerciser testing the RQDX1I2/3 or
RUX50 controller with RD51. RD52 and/or RX50 connected. It tries to simulate
a user environment. It will test up to 4 units (drives) For the winchester drives
you can specify not to overwrite customer data.
OPERATING PROCEDURES :

.R ZRQAHO
This program is running under the supervisory program.
This supervisory program will li,.,.t talk to you.

DRSSM·Gl
CZRQA.H·O
RD I RX EXERCISER
UNIT IS RQDX or RUX50
RESTART ADDRESS 145702
DR>
You have to answer the hardware questions.
For each drive to test you hove to answer the 7 questions.
DR>START<CR>
Change HW (L) ? Y < CR >
f UNITS (D) ? 3< CR >
drives to test (RX50 is 2 units)
IP ADDRESS (0) 172150 ? < CR >
VECTOR ADDRESS fD) 154 ? < CR >
BR LEVEL {USUALLY 4·RQDX 5·RUX50J {OJ 4 < CR >
DRIVE NUMBER (D) 0 ?
RDxx usually a I RX50 usally 1 and 2

TEST ENTIRE CUSTOMER DATA AREA OF THIS DISK (t) ? N
jJ you answer witlt "Y" yes then it will overwrite the entire
disk. if you answer' "N" no. then you can enter limits (LBN's)

WRITE ON CUSTOMER DATA AREA ON THIS DISK UNIT (LI ?
answer with "N" iJ customer data have to be retained.
Change SW {LI

Here you can entel' time. error limit:;. tran:;ier limits. halt on
bad blocks hard errors and so on
It will plint a nice :;tati:;tic every aprox

3-72

15 :;econd:;.

RQDXI/2 RD51/52

ZRQBCI

RQOXll2 ROSl/52 FORMATTER
ABSTRACT:
This program is tIle lront end Wllicll iuvol<es tile 10mlOtter lor the RD51152 in
the RQDX1I2. It interlaces with the actual Jormatter which is in the controller.
This program in the RQDX will prompt Jor any ill/ormation it needs. and then
begins running. A run consists 01 marking tIle disk as un/ormatted. lonnatting
it runnjng three passes o! a sur/ace analysis, saving the Fer and ReT, and
marking the disk as lormatted.
OPERA TING PROCEDURES :

.R ZRQBCl
This program is running under tlIe supervisory program.
This supervisory progrom wjJJ Jir-st talk to you.
ZRQB-C-l
RD5I152 DISK FORMATTER
UNIT IS RQDXI DISK DRIVE SUBSYSTEM
m:START ADDRESS 145702
DR>STA<CR>
You have to answer the hardware questions.
Change HW (L) ? Y < CR >
Answer no to use the pre-built answers lor all hardware questions.
This program is pre·build to /orTnat unit 0 with delault answers.
# UNITS (0) ? 1 < CR >
UNIT 0
IP REGISTER ADDRESS (0) 172150 ? < CR >
INTERRUPT VECTOR ADDRESS (0) 154 ? < CR >
BUS REQUEST LEVEL (0) 4 < CR >
CHANGE SW iL) N
For Jieldservice use a "N" lor no.
Now the lormatter oJ the RQDX will talk to you (not supervisor)
The questions asked depend on tlIe version oJ t1)e controller
microcode in tlIe RQDX. When the controller is Jirst initialized.
the host detennines which version (8 or 9) is running.
ENTL'R DATE <MM-DD-YYYY> (A) ? 03-13·1987
ENTER UNIT NUMBER TO FORMAT <0> : (0) 0 ? 0
USE EXISTING BAD BLOCK INFORMATION <N>: (L) Y ?
trie first witlI "Y" if error then trie "N"
USE.' DOWN·LINE LOAD <N>: (L) N ?
CONTINUE IF BAD BLOCK INFORMATION IS INACCESSABLE <N>: (L) N ?
ENTER NON ZERO SERIAL NUMBER : 533885
FORMAT BEGUN
FORMAT COMPLETE

3-73

RQDX3 RD51/52/53/54

ZRQCFO

RQDX3 RD31/51/52153/54/RX33 FORMATTER
ABSTRACT:

This progrom is the front end which invokes the formatter in the RQDX3. This
formatter is dillerent from the RQDX1I2 one. Also a disk on a RQDX1I2 has
an other format structure then one on a RQDX3. it needs reformatting jJ you
change the controller from RQDX1I2 to RQDX3. The RQDX3 controller has
more functionality in it like getting the UIT (UNIT IDENTIFICATION TABLE)
from a disk into the controller. This program in the RQDX3 will prompt for
any in/ormation it needs. and then begins running. A run consists of marking
the disk as uniormatted. formatting it. running several passes of a surlace
analysis. saving the FCT (iactory control table)(except RD51 which has no FCn
and RCT (replacement control table). and marking the disk as formatted.
There is a lot more to know about this lormatter but due to lack 01 space can
not be explaned here.
OPERATING PROCEDURES :

This program is running under the supervisory program.
This supervisory progrom will first talk to you.
ZRQC·F·O
RQDX3 DISK FORMAT/PARK DISK UTILITY
UNIT IS RD5l. RD52. RD53. RD31. RD54. RX33
RESTART ADDRESS 145702
DR>STA<CR>
You have to answer the hardware questions
Change HW (L) ? Y < CR >
UNITS (D) ? l<CR>
UNIT 0
IP REGISTER ADDRESS (0) 172150 ? < CR >
INTERRUPT VECTOR ADDRESS (0) 154 ? < CR>
JUST PARK THE HEADS (L) N ? N
lor shipping the drive place the heads in the park position.
AUTO FORMAT MODE (L) Y ? Y
You can run the "AUTOSIZER". This will give you
a nice list what disktype he found on the RQDX3.
LOGICAL DRIVE (0·255). (D) 0 ?
DRIVE SERIAL NUMBER (1·32000) (D) ?
AUTOSIZER FOUND:
Types a nice table
WARNING ALL DATA ON DISK WILL BE DESTROYED. CONTINUE? N ? Y
MSCP CONTROllER MODEL f: 19
MICROCODE VERSION f: 2

FORMAT BEGUN
PASS DOD03 BEG
Ii you get the message: no progress shown alter a cmd timeout
leave it running for some minutes.
PASS 00005 BEG
FORMAT COMPLETE
finaly you get ~he Lable about the bod LBNs. RHNs. DBNs.
LBN;;: logical block number. RBN ~ replacement bn. DBN =
3-74

diagncs[~(;

ox:.

RQDXl/2 RUX50

ZRQDAO

RQDXl12 RUXSO RDSl/S2IS3/RXSO SUBSYSTEM EXERCISER
ABSTRACT:
Tl1is program consists of two ports. Tl1e initialization test is running first. Tl1is
first cl1ecks out tl1e controller.
OPERA TING PROCEDURES :

.R ZRQDAO
Tl1is program is running under the supervisory program.
Tl1is supervisory progrom will lin.t toll< to you.
ZRQD·A-O
RDI RX EXERCISER
UNIT IS RD5l. RD52. RD53. RD31. RD54. HX33
RESTART ADDRESS 145702
DR>STA<CR>
You l1ave to answer tl1e Itardware questions.
Cltange HW (L) ? N < CR >
answer N to run the pre-build con}iguJ·ation 01 4 drives.
tltis does not write on customer data area .
• UNITS (D) ? 2< CR >
answer how many disk to test.
UNIT 0
IP Rf.'GISTER ADDRESS (0) 172150 ? < CH >
VECTOR ADDRESS (0) 154 ? < CR >
BR LEVE.'L [usually 4-RQDX 5-RUX50J (0) 4 ?
DRIVE NUMBER (0) 0 ?
AJ.SO RUN DUP EXERCISER (LJ Y ?
Only the DUP exer. uses DBNs (diagnostic blocks) lor writes.
to Tests writes without deleting customer data.
WRITE ON DIAGNOSTIC AREA (LJ Y ?
TEST E.'NTlRE CUSTOMER DATA AREA Of' THIS DISK (L) Y ?
jJ you soy no you can specify a area (start LBN. end LBN)
WIlITE ON CUSTOMER DATA AREA ON THIS lJISK UNIT (L) ?
**WARNING - CUSTOMER DATA WILL BE OVERWHI1'Tf.'N ... CONFIRM (L) ?
CHANGE SW (L) N
Every 20 second you will get a nice summary
The upper table is from the normal MSCP test
The lower one is from tlte DUP test.
Tl1ere are 4 types 01 errors:
System latal errors detected by the diagn. supervisor
Drive latal errors
Hard error (non recoverable solterror)
Solterrors (normaly media related) reported by MSCP

3-75

ZRQFCO

RQDX3/RX33
RX33 FORMATTER

ABSTRACT:
This program is the front end wl1ich invokes the formatter for the RX33 in the
RQDX3. This program will never work on the RQDX1I2. This formatter uses
the DUP protocol to answer questions asked by the format progrom in the
controller microcode. This program in the RQDX will prompt lor any
inlormation it needs. and then begins running. Once online. all available
blocks 'on the diskette are tested by a series of MSCP read and write
commands. II any bad blocks are found. the diskette should be disgarded.
OPERA TING PROCEDURES :

.R ZRQFCO
This program is running under the supervisory program.
This supervisory progrom will first talk to you.
ZRQF-C-O
RQDX3 RX33 fORMAT UTILITY
UNIT IS RX33
RESTART ADDRESS 145702
DR>STA <CR>
You have to answer the hardware questions.
CHANGE HW (L) ? Y<CR>

* UNITS (D) ? 1 < CR >
UNIT 0
IP REGISTER ADDRESS (0) 172150 ? <CR>
INTERRUPT VECTOR ADDRESS (0) 154 ? < CR >
LOGICAL DRIVE (0-255) (D) 1 ?
WARNING - REMOVE BOOT DISKETTE IF IN DRIVE ....
INSERT DISKETTE TO BE FORMATTED.
MSCP CONTROLLER MODEL I: 19
MICROCODE VERSION I: 2
FORMAT BEGUN
FORMAT COMPLETE

3-76

RHII RS03/04

ZRSBHO

RHll RS03/04 BASIC FUNCTION TEST
ABSTRACT:

TIlis program verifies that the RHll COlllloller and Ihe RS03. RS04 disks are
operating correctly. TI)is is not a reliabilily dJognostic It can test up to 8
drives mixed RS03 and RS04.
OPERA T!NG PROCEDURES

.R ZRSBHO
all switches down or zero lor worst case
The program will nlO and bell will ";ng once every pass.
SA = 220 write lock test

Starting addresses lor testing tlle RHll-RS03t04 register" using tIle
switch register.
250
254
260
264
270
274
300
304
310

314

word count register test
bus address register test
disk address register test
drive status register test
error register test
look ahead register test
RSCS2 register test
attention register test
maintenance register test
RSCSI register test

SWITCH SETTINGS :

SWl5 =
halt on elTor
SWl4 =
loop on test
SW13 =
inhibit typeouts
SW12=
SWll = inhibit iterations
SW 10 '" 1 bell on error
SW09= 1 loop on error
SW08= 1 loop on test as per SW<07-00>r
use "CONTROL G" to enter software SWR at loc. 176

3·77

RHII R503/04

ZR5CGO

RH11 RS03/04 DATA RELIABILITY TEST
ABSTRACT:
This program verifies that the RHll controller and the RSD3, RSD4 disk are
operating correctly. This is a reliability diagnostic with a series 01 disk address
and data pattern tests. 11 there is a power lail while the diagnostic is running,
the program will wait lor approx. 5 minutes, to give all the drives time to
come back up to speed. be/ore restarting the te:>t :>equence. With the swich
10 up you will get into the conversational mode where you can change program
parameters. like MULTI DRIVE MODE ? UNIT f ? WD CT ? PATTERN.
OPERA TING PROCEDURES

.R ZRSCGO
all switches down or zero Jor worst case
The program will now map the data buJlers in 4k segments up to 124k.
It will then type out the parameters 01 the data buJJers.

SWITCH SETTINGS :
SW15=
halt on error
SW14 =
loop on function
SW13=
inhibit typeouts
SW12=
inhibit compari:>on in memory
SWll =
holt on completion oj transJer
SWlO=
enter conversational mode
SW09=
loop on error
SWDB =
data reliability mode
SW07=
wait in wait mode Jor intern/pt (waitillst,.uctionJ
SWDG=
optional typeout 01 retry error:>
SW05 =
inhibit pass count
SWD4=
allow B errors typeout In the compare routine
SW03 =
typeout oj errors
SWD2=
inhibit memolY management
SWDI =
data test only
SWDD=
drop drive alter 20 error.;

u:>e "CONTROL GU to ente,. software SWR at loco 176

3-70

ZRSDCO

RHII RS04

HHll RS04 MAINTENANCE MODE DIAGNOSTIC
ABSTRACT:
This program has two modes. The operator may select Wllich drive he wants
tested or he can let the program sequence through all the drives on the
system. The first part 01 this diagnostic will test the drive registers associated
with the drive under test. The program will also test the HH controller registers
to confirm that the controller is working con-ectly. Tile second part of this
diagnostic will test the drive in maintenance mode. This "MAINTENANCE
MODE" test capability isolates the digi tal electronics from the analog and
allows independen t testing of tIle digital logic.
OPERA TING PROCEDURES

.R ZRSDCO
The program will type
TEST ALL DHIVES ? (Y or N)
11 the operator types "Y" it will test all drives
11 the operator types "N" the program will type
TYPE UNIT
Tests only that drive ; program prints
ALL ERROR LIGHTS ON SELECTED UNIT SHOULD BE ON
-CHL'CK· THEN HIT CONTINUE

SA = 220
The program will then test all RS04 drives on the system.
SWITCH SETTINGS: /
SW 15 =
halt on error
SWI4=
loop on test
SWI3=
inhibit typeouts
SW 12 =
typeout all errors in data compare routine
SWII =
run maintenance mode verily test
SW 10 = 1 bell on error
SW09= I loop on error
SWOB = 1 loop on test in SW < 7:0>

use "CONTROL G" to enter software SWR at loco 176

3·79

ZRXAFO

RXII/RXOI

RXII/RXOl SYSTEM RELIABILITY TEST
ABSTRACT:
This program checks the RXll system by writing. reading and verifying various
data patterns under various head movements. It can tronsier data and checks
lor errors over the entire diskette. trocks and sectors. A diskette must be
inserted in each drive to test.
OPERATING PROCEDURES :
START ADDRESSES:
SA = 200 nonnaJ starting
SA = 202 restart address
SA = 204 dump all errors collected
Standard address RXCS = 177110, RXDB = 177112, Vector= 264
II you have non standard address modify memory location
loc 1204 lor new vector
loc 1206 lor new address RXCS
loc 1210 lor new address RXDB

loc 1212 contains parameter bits
bit 15 (I) 1000000 select drive unit
bit 14 (1) 400000 select drive unit 0
SWITCH SETTINGS:
SW15 =
halt on error
SW14=
halt at end of pass
SW13=
inhibit typeouts
SWI2=
typeout only 10 data error:>
SWll =
no retry on error, log hard elTor
SWOB =
no recalibr. on seek en'or:>

use "CONTROL G" to enler :>oltware SWR at loco 116

3,80

ZRXBFO

RXll
RXII INTERFACE TEST

ABSTRACT:
1'l1is program c11ecks the RXll interlace M7846. It tests tIle done flag. interrupt
address and level. initialization, read status register, fill and empty data
buHer with data patterns. A diskette must be inserted in each drive to test.
OPERA TING PROCEDURES

.R ZRXBFO
SA == 202 restart address

Standard address RXCS == 177170, RXDB == 177172, Vector = 264
If you have non standard address modify memory location
loc 1204 for new vector
loc 1206 for new address RXCS
(RXDB is calculated from RXCS)
loc 1212 contains parameter bits (a 0= test botll units)
bit 15 (1) 1000000 select drive unit 1
bit 14 (1) 400000 select drive unit 0
End of pass message is a "D" and the bell rings.
SWITCH SETTINGS :
SWI5=
halt on error
halt at end of pass
SWI4=
inhibit typeouts
SW13=
SWI2=
loop on test
lock on error
SWll=
halt at end of test
SWIO=
limit data error printout
SW09=
SW08=
inhibit recalibration
inhibit bell on error
SWOO=

use "CONTROL G" to enter software SWR at loco 176

3-81

NRXDAO

11/21-RX02

11/21 - RX02 PERFORMANCE EXERCISER
ABSTRACT:
This program exercises up to 4 RX02 drives, maintains drive statistics and
provides run summaries. It will give the user confidence, alter successlully
running, that the subsystem is per/orming within speciiication.
OPERA TlNG PROCEDURES :
This program is running under the supervisory program.
This supervisory program will lin;t talk to you .

.R NRXDAO

DRSSM·Gl
CNRXDAO-O
RX02 SS PERF EXER
UNIT IS RX02
RSTRT ADR 145102
DR>
You have to answer the hardware questions.
This is a (mostly used) example :
DR>STA<CR>
CHANGE HW (L) ? Y < CR >
t UNITS (D) 2<CR>

(how many drives ?)

UNIT 0
RX BUS ADR (0) 177170 ?<CR>
VECTOR ADR {OJ 264 ? < CR >
DRIVE * (0) 0 ? O<CR>
EXP WRD·CR (0) 0 ? < CR >

(lor Juture expansion)

UNIT 1
RX BUS ADR (0) 177170 ?<CR>
VECTOR ADR (0) 264 ? < CR >
DRIVE t (0) 0 ? 1 < CR>
EXP WRD-CR (0) 0 ? < CR >

(lor iuture exponsionl

CHANGE SW (t) ? N<CR>
Aiter about 30 minutes (CPU depend.) it will print a statistJcal report.
To get one any time, type < CONTR. C>
DR>PRI<CR>
The test starts with Unit 0 (drive 0) and change.s oiter about 15 min.
to Unit 1 (drive lJ.

3-82

11/21-RX02

NRXFAO

11/21 - RXV21/RX02 fUNCTIONAL I LOGIC TEST
ABSTRACT:

This progmm consists 01 a lunction test and a logic test. The user can select
to run either or both: The diagnostic dela!llt~ to run the logic test. It exercises
up to 4 RX02 drives.
OPERA TING PROCEDURES :

This program is running under tlle supervisory p'-ogram.
This supervisory progmm will lirst taIR to you .
.R NRXFAO
DRSSM-Gl
CNRXFAO-O
RX02 fUNCTION-LOGIC TEST
UNIT IS RX02
RSTRT ADR 145702
DR>
You have to answer the hardware questions.
This is a (mostly used) example :
DR>STA<CR>
CHANGE HW (L) ? Y < CR >
It UNITS (D) 2<CR>

(how many drives ?)

UNIT 0
RX BUS ADR (0) 177170 ?< CR >
VECTOR ADR (0) 264 ? < CR>
DRIVE
(0) 0 ? O<CR>
EXP WllD-CR (0) 0 ? < CR> (lor luture expansion)
BR-U'VEL (0) 5 ? < CR >

UNIT 1
RX BUS ADR (0) 177170 ?< CR >
VECTOR ADR (0) 264 ?< CR >
VRlVl.'
(0) 0 ? I<CR>
EXP WRD-CR (0) 0 ? < CR > (lor luture expansion)
ER-LEVEL (0) 5 ? < CR >

CHANGE SW (L) ? N<CR>

here you have the lollowing options:

TEST HELP?
LOGIC TEST MODE?
FUNCTION TEST MODE ?
DEVICE fATAL THRESHOLD LEVEL?

The test starts with Unit 0 (drive OJ and changes alter about 15 min.
to Unit 1 (drive 1).

3-83

ZRXDCO

RX02
RX02 PERFORMANCE EXERCISER

ABSTRACT;
This program exercises up to 4 RX02 drives. main tains dri ve statistics and
provides run summaries. It will give the user conJidence. after successfully
running. that the subsystem is performing within specjJication.
OPERA TING PROCEDURES :

This program is running under the supervisory program.
This supervisory program will fir.;t talk to you.
DRSSM·Gl
CZRXDCO·O
RX02 SS PERF EXER
UNIT IS RX02
RSTRT ADR 145702
DR>
You have to answer the hardware questions.
This is a (mostly used) example :
DR>STA<CR>
CHANGE HW (L) ? Y<CR>
t UNITS (0) 2< CR >

(how many drives ?)

UNIT 0
RX BUS ADR (0) 177170 ?<CR>
VECTOR ADR (0) 264 ? < CR >
DRIVE t (O) 0 ? 0< CR >
EXP WRD·CR (0) 0 ? < CR >

(lor future expansion)

UNIT 1
RX BUS ADR (0) 177170 ? < CR >
VECTOR ADR (0) 264 ? < CR >
DRIVE t (0) 0 ? l<CR>
EXP WRD·CR (0) 0 ? < CR>

(Jor future expansion)

CHANGE SW (L) ? N < Cll >
Alter about 30 minutes (CPU depend.) it will print a statistical report.
To get one any time. type < CON TIl. C>
DR>PRI<CR>
The test starts with Unit 0 (d,-ive O) and changes alter about 15 min.
to UnJt 1 (drive I).

3-04

ZRXEA2

RX02
RX02 FORMAT CHANGE UTILITY

ABSTRACT:
T/lis program is a utility to change a single density diskette to doube density
(default) or vis versa on both drives. Alter. it verifies the diskette. This is not
a real formatting (writing headers).
OPERA TING PROCEDURES :

.R ZRXEA2
Start address 210
Start address 220

restart address
debug mode

It will type "HELP? (Y or HI
It will type a nice help text jJ you answer with Y
SET DISKETTE TO SINGLE DENSITY ? (Y OR N) N < CR >
VERIfY DISKETTE CRC (ALL TRACKS)? (Y OR NJ Y < CR >
fLOPPY DISK SYSTEM: 0 ADDRESS CHANGE? (Y OR NJ N < CR >
fORMAT DONE ON FOLLOWING
SYSTEM:O DRIVE:O DRIVE: 1
fORMAT COMPLETED
DO YOU WANT TO FORMAT MORE DISKF:1"TES? (Y 011 NJ N Y<CR>
SWITCH SETTINGS :
SW15 = 1 holt on error
SWI4= I extended error reports
SWI3= I inhibit error reports
SWI2 = 1 bus init on error jJ loop
SWll = 1 not used
SW09= I loop on error

3-85

RX02

ZRXFBO
RXV211RX211 RX02 FUNCTIONAL / LOGIC TEST

\.BSTRACT :
This program consists of a function test and a logic fest. TIle user can select
to run either or both. The diagnostic defaults to run the logic test. It exercises
up to 4 RX02 drives.
OPERA TING PROCEDURES :
This program is running under the supervisory program.
This supervisory program will first talk to you.

DRSSM-GJ
CZRXFBO-O
RX02 FUNCTION-LOGIC TEST
UNIT IS RX02
RSTRT ADR 145702
DR>
You have to answer the hardware questions.
This is a (mostly used) example :
DR>STA<CR>
CHANGE HW (L) ? Y < eR:>
I UNITS (D) 2< CR:>
UNIT 0
RX BUS ADR (0) 177170 1<CR:>
VECTOR ADR {OJ 264 1 < CR:>
DRIVE I (OJ 0 ? O<CR:>
EXP WRD-CR (0) 0 ? < CR:>
BR-LEVEL (OJ 5 ? < CR:>
UNIT 1
RX BUS ADR (0) 177110 1 < CR>
VECTOR ADR (0) 264 ? < cn:>
DRIVE
(OJ 0 ? 1 < cn :>
EXP WRD·CR (0) 0 ? < cn:>
Bn·LEV£'L (0) 5 1 < cn:>

(how many drives 1)

(/01' future

expansion)

(Jar luluce

expansion)

CHANGE SW (1) ? N < cn:>

llere you have tIle lollowing options:

TEST HELP?
LOGIC TEST MODE ?
FUNCTION Tf.'ST MODE?
Dl'VlCE FATAL l'HHESHOLD U:.'Vt'L ?

The test starts witll Unit a (drive 0) and changes alte,' about 15 min.
to Unit 1 (drive 1).

3-86

UDASO/KDA50/RAxx

ZUDHAI

UDA50/KDA50/RAxx BASIC SUBSYSTEM DIAGNOSTIC
ABSTRACT:

nlis diagnostic is testing the UDA50A or Ille KDA50-Q disk controller and the
associated disk drives. There are tllree tests witllin tllis diagnostic:
Test I Buss addressing test_ Runs the UDA50 or KDA50 ROM resident
diagnostic. then Jurtller tests the bus address intedace and
contr'oller memory_
Test 2 : Disk resident diagnostic test. executes Ihe diagnostic in each
disk drive.
Test 3 : Disk Junction test. Functionaly tests each dis/< drive to ensure
the drive can seek. read, write and formal.
OPERA TING PROCEDURES :

.R ZUDHAI
This program is running under the supervisory program.
This supervisory program will Jin>t talk to you_
CZUDH-A-l
CZUDHAO UDA50A,KDA50-Q BASIC SUBSY
UNIT IS LOGICAL DISK DRIVE
RSTIlT ADR 145702
start, print test NR
DR >STAIFLAG:PNT< CR >
CHANGE HW (L) ? Y
ItUNITS (V) ? 1 < CR >

disk drives

UNIT 0
CSR ADDRESS OF CONTROLLER (0) 172/50 ?<CR>
VL'CTOR (0) 154 ?<CR>
IJR LEVL'L (0) 5 ?< CR >
DRIVE
(0) 0 ?< CR >

CHANGE SW (L) ? Y
ENTL'R MANUAL INTERVENTION MODE' IN TEST 2 (t) N ?

3-37

UDA50/KDA50/RAxx

ZUDIAO

UDASO/KDASO/RAxx DISK EXERCISER
ABSTRACT:
This diagnostic is testing the UDA50A or the KDA50-Q disk controller and the
associated disk drives. There is only one test within this diagnostic:
Test 1 : Exercises the disk drives in a manner similar to normal operating
systems. This test should be used to gain conJidence in the reliability
oj

the disk drive.
OPERA TING PROCEDURES :

.R ZUDIAO
This program is running under the supecvisory program.
This supervisory program will lirst talk to you.
CZUDI-A-O
CZUDIAO UDA50A.KDA50-Q DRIVE EXER
UNIT IS LOGICAL DISK DRIVE:
RSTRT ADR 145702
DR>STAIFLAG:PNT<CR>
start. print test NIl
CHANGE HW (t) ? Y
fUNITS (0) ? 1 < CR >

disk drives

UNIT 0
Cr-R ADDRESS OF CONTROLLE'R (0) 172150 ?<CR>
DRIVE
(D) 0 ?<CR>
EXERCISE ON CUSTOMER DATA AREA (t) N ?<CR>

CHANGE SW (L) ? Y
ENTER MANUAL INTERVENTION MODE FOR SPECIAL DIAGNOSIS (L) N ?
ERROR LIMIT (0) 32 ?
READ TRANSFER LIMIT IN MEGABYTES - 0 FOR NO LlNIT (0) 0 ?
SUPRESS PRINTING SOFT EImORS (LJ Y ?
DO INlrIAL WRITE ON STAHr (LJ Y ?
ENABLE ERROR LOG (LJ N ?
THE FOLLOWING QUESTION HEFE'R TO UNIT 0 CONTR. AT 172150 DRIVE 0
NUMBER OF BAD BLOCKS (0) 0 ? 2
BAD BLOCK (A) 0 ? xxxx
BAD BLOCK (A) 0 ? 2345
1'11e program will allow wntes and reads to tilese blocks but
no errors will be printed lor this blocks.
CHANGE TESTING PARAMETERS FOR TillS DRIVE.' (LJ N ?

3-88

UDA50/KDA50/RAxx

ZUDJCO

UDASO/KDASO/RAxx MSCP SUBSYSTEM EXERCISER
ABSTRACT;
This diagnostic is using the MSCP interlace to the UDA50A or the KDASO-Q
disk controllers to per/onn extensive input/output operations on all selected
SDI (standard disk interlace) compatible disk drives and selected controllers.
This test supports up to 2 controllers witl} each up to lour drives. There are
three te.,>f.,; within this diagnostic:
Test 1 : controller verification test, initialize test, sell tcst, controller
memory and data path test, set characteristics test.
Test 2 : subsysten veri/jcation test, initialize contl"oJ/ers and drives, set
drives online and available, reads, seek, writes and data compare tests.
Test 3 : subsystem exerciser.
OPERA TING PROCEDURES :

.R ZUD/CO
This program is running under the supervisory program.
This supervisory program will first talk to you.
CZULJ/-C-O
CZUD/CO UDA50A,KDA50-Q DISK SUBSYS1TM E'Xf.'RCISf.'R
UNIT IS DSA DISK DRIVE
RSTRT ADR 145702
start, print tost NH
DR> STAIFLAG:PNT < CR >
CHANGE.- HW (LJ ? Y
ItUNITS (D) ? 1 < CR >

disk drives

UNIT 0
CSR ADDRESS OF CONTROLLER (0) 172150 ?<CR>
DRIVE It (D) 0 ?< CR>
WRITE' ON CUSTOMER DATA AREA (LJ N ? < CR >
CHANGE' SW (LJ ? Y
THE: FOLLOWING QUESTIONS APPLY ONLY TO TEST 3:
f.'NTf.'R MANUAL IN1TRVENTION MODE' (LJ N ?
HARD ERROR LIMIT (D) 1 ?
E'XERCISER TIME LIMIT IN MINUTES (D) 60 ?
MINUTES BETWE'£'N STATISTICAL REPORTS (0) 15 ?
PRINT SOFT ERROR MESSAGES (L) N ?
DO DATA PATTERN VERIFICATION ON READS (LJ Y ?
DO DATA PATTERN VERIFICATION ON WRITES (L) N ?
USE VARIABLE LENGTH TRANSFERS (L) Y ?
MAXIMUM TRANSFER SIZE IN BLOCKS (D) B ?

3-89

UDASO/KDASO/RAxx

ZUDKeo

RA80. RA8l. RA82. RAGO FORMATTER
ABSTRACT:

This program tormats any disk drive connected to a UDA5DA. KDA5D-Q disk
controller. No changes to this program will be needed to format new disk
drives as they become available. Reformat - tormat the disk with the bad
sector information that was written onto the disk at the tactory. This is the
normal way to format a disk. Do not reformat any disk jJ you do not have a
good reason (just undefined errors on a disk is not a good reason).
OPERA TING PROCEDURES :

.R ZUDKCD
This program is running under tIle supervisory program.
This supervisory program will lirst talk to you.
CZUDK-C-D
CZUDKCD UDA50A.KDA50-Q fORMATTER
UNIT IS RA SERIES DISK DRIVE
RSTRT ADR 145702
DR > START
CHANGE HW (L) ? Y
IUNITS (V)? I<CR>

disk drives

UNIT D
CSR ADDRESS (0) 172150 ?<CR>
DRIVE I (DJ 0 ?<CR>
At the end the formatter should print "fCT sucessfully used".
II not inform support.

3-90

UDA50/KDA50/RAxx

ZUDLAO

RABO/Bl/B2, RAGO BAD BLOCK REPL. UTILITY
ABSTRACT;
This program is normaly not on the distribution disk or tape, it is on a separat
tape (contact your support group in case YOll wont it) You /leod to know exactly
what YOll wont to do with this program, otherwise do not lise this program.
This is not a diagnostic test any way. II YOll wallt to study this pmgram. print
out the help text lile (about 30 pages) stlldy this core/lilly and iJ every thing
is clear then you are a candidate to use this program. III short, what you can
do with this program is: read a pack (HDA) with data on (read/only, check
every block to be readable), replace a bod blode i/ one exists (BBR) , print all

replaced LBN's.
OPERA TING PROCEDURES :

.R ZUDLAO
This program is running 1I1ldOl' the supe/visory program.
This supervisory program wjJJ first talk to YOll.

CZUDL·A-O
Bod Rlock Replacement Utility
UNIT IS Local disk drive
RSTRl' ADR 145702
DR >START
CHANGE HW (L) ? Y
#UNITS (D) ? 1 < CR >

number o/disk drives

UNIT 0
CSR ADDRESS (0) 172150 ?< CR >
VECTOR (0) 154 ?<CR>
BR LF.'VEL (D) 5 ? < CR>
UNIBUS BURST RATE (D) 63 ?<CR>
DRIVE.' # (D) 0 ?<CR>
BAD BLOCK REPLACEMENT UTILITY.
WARNING: All drives configured lor test
MUST have customer data backed-up.
Have you backed-up customer data (t) N ? Y < CR >
It is recommended that YOll read the operator help
information before pmceeding.
Display operator Help (t) N ?
to read-only the HDA, give tile following answers:
Automatic or Manual replacement (AIM) A ? < CR >
Automatic crash recovery (t) Y ? < CR >
Display replacements as they occllre (t) Y ? < CR >
Display RCT replacement descriptors (t) N ? Y < CR >
Enable replacements (t) Y ? N < CR >
L'nable write with Forced Error flag (t) Y ? N < CR >
3-91

TAPE's TAPE's TAPE's TAPE's
T5V05
TAil
TM03
TE16
TU77
TK50
TK25
T503
TEIO
TUIO
TMII
TMAII
TMBII
T5U05
T511
T504
TU81
TM02
TUI6
TU45
TU58
TU80
4-0

VTSAeD

TSVD5
TSV05 (Q-BUS) DIAGNOSTIC PART
ABSTRACT:
The TSV05 diagnostics are

intended to provide conlidence in the basic
lunctionality 01 this subsystem. As such. this should be the lirst host level
diagnostic run on the TS V05 to verily installation or lor troubleshooting. this
progran consists 01 11 subtests which are executed in sequence.

1 initialize #1
2 wrap data high byte test
3 wrap data low byte test
4 RAM test
5 second initialization test
6 command reject test
7 write characteristics test
8 volume check
9 completion interrupt
10 basic packet protocol test
11 non-tape motion command tests
Alter test 1 run test 2.3 and 4.
OPERA TING PROCEDURES :

This program is running under the supervisory program.
This supervisory program will lirst talk to you.
R VTSA??
CVTSA-C-O
**** TSV05 LOGIC DIAGNOSTIC - REPLACE M7196 IF ERROR ****
UNIT IS TS V05
RESTART ADR 145702
(print each test number)
DR>STARTIFLA:PNT< CR>
You have to answer the hardware questions.
Change HW (L) ? Y< CR >
# UNITS (D) ? 1 < CR >
UNIT 0
DEVICE ADDRESS (TSBAITSDB) (D) 172520 ? <CR>
INTERRUPT VECTOR (0) 224 ? < CR >

CHANGE SW (L)
INHIBIT ITERATIONS (t) N ?

4-1

VTSBEO

TSV05

TSV05 (Q-BUS) DIAGNOSTIC PART 2
ABSTRACT:

The TSV05 diagnostics are intended to provide confidence in the basic
lunctionality 01 this subsystem. As such, this should be the second host level
diagnostic run on the TS V05 to verily installation or for troubleshooting. This
progran consists 01 12 subtests, 1·9 are executed in sequence, 10·12 are
standalone and have to be selected specialy (START ITEST: ll)
1 initialize alter write characteristics
2 basic write subsystem memory command
3 DMA memory addressing
4 RAM exerciser test
5 FIfO exerciser
6 static transport bus interface test
7 transport bus interlace loopback test
8 read/write data parity check test
9 miscellaneous logic checks test
10 manual intervention
11 configuration type out
12 scope loops

Alter test 2 run test 3 and 4.
OPERA TING PROCEDURES :

This program is running under the supervisory program.
This supervisory program will first talk to you.
R VTSB??
CVTSB·E·O
u . . TSV05 LOGIC DIAGNOSTIC
UNIT IS TS V05
RESTART ADR 145702
DR> START / fLA: PNT < CR >

REPLACE M7l96 If ERROR *to*to

(print each test numbed

You have to answer the hardware questions.
Change HW (t} ? Y < CR >
UNITS (D) ? I<CR>
UNIT a
DEVICE ADDRESS (TSBAITSDB) (O) 172520 ? < CR >
INTERRUPT VECTOR (a) 224 ? < CR >
f

CHANGE SW (L;
INHIBIT I1'L'RATIONS (L) N ?

4-2

TSV05

VTSCDO
TSVOS (Q-BUS) DIAGNOSTIC PART 3

ABSTRACT:
The TSV05 diagnostics are intended to provide confidence in the basic
functionality 01 this subsystem. As such. this should be the third host level
diagnostic run on the TS V05 10 verily installation or lor troubleshooting. This
progran consists of 8 subtests which are executed in sequence.

I initialize #4 lest
2 oil-line and reject rewind
3 basic wrile dolo
4 basic read data (forward and reverse)
5 space records
6 rereads
7 write data retry
8 write read tape mark
Alter test 3 run test 4.
OPERA TING PROCEDURES :

This program is running under the supervisory program.
This supervisory program will lirst talk to you.
R VTSC??
CVTSC·D-O
uu TSV05 LOGIC DIAGNOSTIC - CHK CABLES - TRANSPORT IF ERROR . u .
UNIT IS TS V05
RESTART ADR 145702
(print each test number)
DR > STARTIFLAPNT < CR>
You have to answer the hardware questions.

Change HW (L) ? Y < CR >

* UNITS (D) ? l<CR>

UNIT 0
DEVICE ADDRESS (TSBAITSDB) (D) 172520 ? < CR >
INTERRUPT VECTOR (OJ 224 ? < CR >
CHANGE SW (L)
INHIBIT ITERATIONS (LJ N ?

4-3

VTSDEO

TSV05

TSV05 (Q-BUS) DIAGNOSTIC PART 4
ABSTRACT:

The TS VD5 diagnostics are intended to provide confidence in tIle basic
functionality 01 this subsystem. As such. this should be the lourth host level
diagnostic nm on the TSV05 to verily installation or for troubleshooting. This
progrun consists 01 8 subtests which are executed in sequence.
I skip tope marks test
2 no-op and initialize test
3 erose and operution incomplete test
4 data parity test
5 test operutions at EOT
6 extended mode leatures
7 record buHering
8 lunction timing
This is the lost 01 4 tests to run
OPERA TING PROCEDURES :

This program is rUllning under the .!>lIpel'vi.!>ory program.
This supervisory progrum will Jin;t toll, to you.
R VTSD??
CVTSD·E-D
.... TSVD5 LOGIC DIAGNOSTIC - CHECK TRANSPORT IF ERROR ....
UNIT IS TSV05
RESTART ADR 145702
(print each te.!>t numbed
DR> START I FLA: PNT < cn >
You have to answer the hardware questions.
Challge HW (L) ? Y<CR>
(D) ? l<CR>
UNIT 0
DEVICE ADDRESS (TSBAITSDB) (0) 172520 ? < CR >
INTERRUPT VECTOR (0) 224 ? < CR >

* UNITS

CHANGE SW (LJ
INHIBIT ITERATIONS (L) N ?

4-4

TSV05

VTSEDO
TSV05 DATA RELIABILITY TEST

ABSTRACT:

This program can be used as a basic Junction test, data reliability test or
compatibility test. Tllis diagnostic can test one controller and up to 2 drives.
This program mainly verilies tlIat the tape drives under test are performing
to there data error rate specjJied. It consists of 5 parts :
Test 1 basic functions
Test 2 data reliability
Test 3 write compatibility write utility
Test 4 read compatibility read utility
Test 5 operator selected sequence utility
OPERA TING PROCEDURES :

.R VTSE??
This program is rUllning under tIle sllpen'isory program.
This supervisory program will first tall, to you
CVTSE-D·O
DATA RELIABILITY TEST
UNIT IS TS V05
RSTRT ADR 145702
DR>START
answer the hardware questions
CHANGE HW (L) ? Y < CR >
UNITS (D) ? I<CR>
TSDB ADDRESS (0) 172520 ? < CR>
VECTOR (0) 224 ?< CR >
CHANGE SW (t) ? N<CR>
here you can change some software parameters like:
CLEAR COUNTERS (t) Y ?
RESET RANDOM VARIABLES (L) N ?
HALT AFTER EACH CMD (L) N ?
INHIBIT RECOVERY (t) Y ?
DISABLE INTERRUPTS (t) N ?
INHIBIT RFC ERROR REPORT (L) ?
CHANGE COMMAND SEQUENCE (L) ?

Tape Unit must be online a tape loaded at BOT
and a write enable ring in.

4-5

ZTAACO

TAII/TUSO

TAll CASSETTE BASIC LOGIC TEST III
ABSTRACT:

Thi:; program is part-1 01 2 and contains a series oj basic logic tests that check
the TAll lor proper operation.
OPERA TING PROCEDURES :

START ADDRESSES:
SA; 200 nonnal starting
SA = 204 select drivels) belore starting test
SA; 210 select drivels) and addresses belore starting test
SA; 214 setup lor manual looping
SA; 220 write Iile gap Irom BOT to EaT
SA = 224 write continous blocks 01 data
SA = 230 read continues blocks 01 data
SA; 234 write Iile gap and a block 01 data
SA = 240 read block 01 data and a lile gap
SA = 244 space Iwd lile gap Irom BOT to EaT
SA ; 250 back space lile gap
SA; 500 load switch register into the TACS (control/status)
SA = 600 write switch register on tape Irom BOT to EOT
SA; 700 read lrom BOT to EaT
load a write enabled cassette in both drives
rewind both drives
start test
the program will ring every pass
SWITCH SETTINGS
SW15 =
halt on error
SW14;
loop on test
SW13;
inhibit error typeouts

SW12;
SWl1; 1 inhibit iterations
SWlO= 1 ring bell on error
loop on error
SW09=
SWOB=
loop on test as per SW<07·00>
use "CONTROL G" to enter soJtware SWR at loco 176

4-6

Tell

ZTCAAO
TC 11 BASIC LOGIC TEST It 1

ABSTRACT:
This progmm is part-l 01 3 and contallls a series 01 basic logic tests that
checks tl10t each 01 tIle controller registel-s can be referenced without causing
bus error tmps and all bits con be set and cleared A special routine (test OJ
is available in the progmmas a maintenallce aid in adjusting the TC 1J control

delays.
OPERA TING PROCEDURES

.R ZTCAAO
SA == 1000 restart address

The progmm identjJies itseU. types setup instructions. SR options
message. and holts.
Perform setup (all transports must be 011. set WRTM switch and WALL
switch to 011 position) and set SW if any.
Press continue.
SWITCH SETTINGS :
halt on error
SWI5=
enter scope mode
SWJ4=
inhibit error typeouts
SWI3=
SWI2=
inhibit itemtions
SWll=
halt at end 01 test currently executing
SWlO=
SW09=
loop on test as per SW < 07·00>

To get to tIle adjustment maintenance routine. load address 1000.
set SW9= I and SW07 to SWOO = 0 and press start.

4-7

ZTEAEO

TM03/TElS/TU77
TM03 FUNCTIONAL TEST PART 1
ABSTRACT:

This program is designed to sequentially test all control logic lunctionality 01
the TM03. Each test will attempt to isolate lailures to the module level and
provide printout in/onnation which will identily the lailing module. It will use
the maintenance mode 01 the TM03. There are 51 (octal) tests.
OPERATING PROCEDURES :
.11 ZTEAEo

SA = 200 nonnal startaddress
SA = 210 restart address (no header printed)

Tape Unit must be online and a tape loaded at BOT
Answer the lollowing questions:
REGISTER START: 112440
VECTOR ADDRESS: 224
IS CONTROLLER /UMPERED IN NON·STANDARD MODE, ?
TYPE 2 FOR NON = STANDARD OR CR FOR STANDARD?
TM03 DRIVE: 0
controller select number
TEI6/TUn SLAVE: 0
tape drive select number
STATIC TESTS ONLY: 0
(O=no. l=yes)
SLA VE TYPE (0= TEI6. 1 = TU71): 0
SWR = 000000 NEW =

SWITCH SETTINGS :
SWI5= 1 halt on error
SW14 = 1 loop on errors
SW13= 1 inhibit error typeout
SW12"" 1 halt at end 01 pass
SWll = 1 inhibit iterations
SWlO= 1 halt alter current test
SW09= 1 do manual intervention tests

SWOB=
SW07=
SW06=
SW05 = 1 selects individual test
SW04 = I selects individual test
SW03= 1 selects individual test
SW02= 1 selects jndividual test
SWOI = 1 selects individual test
SWOO= 1 selects individual test
use "CONTROL G" to enter soltware SWR at loco 176

4-8

TM03/TElS/TU77

ZTEBCO

TM03 FUNCTIONAL TEST PART 2
ABSTRACT:
This program is designed to sequentially test tIle data fonnatting functionality
01 the TM03. Each test will attempt to isolate failures to tIle module level and
provide printout infonnation which will identify the failing module. It will use
the maintenance mode 01 the TM03. There are 20 (octal) tests.
OPERA TING PROCEDURES :

.R Zn:BCO
SA = 210 restart address (no header printed)

Tape Unit must be online and a tape loaded at BOT
Answer the lollowing questions:
REGISTER START: 172440
. VECTOR ADDRESS: 224
TM03 DRIVE: 0
controller select number
TE16/l'un SLAVE: 0
tape drive select number
SLAVE TYPE (0= TE16. I = TUn): 0
SWR = 000000 NEW:::

SWITCH SETTINGS :
SWl5 = 1 halt on error
SWl4 = 1 loop on errors
SWI3= I inhibit error typeout
SWI2= I halt at end 01 pass
SWll = 1 inhibit iterotions
SWlO=
halt alter current test
SW09=
inhibit wrap data check
SWOB=
inhibi t wrap status check
SW07=
selectable wrap data pattern (in single test)
SW06=
SW05::: I selects individual test
SW04 = 1 selects individual test
SW03= 1 selects individual test
SW02= I selects individual test
SWOl= I selects individual test
SWOO= 1 selects individual test

use "CONTROL G" to enter soltware SWR at loco 176

4-9

ZTECFO

TM03/TElS/TU77

TM03/TE16/TU77 BASIC FUNCTION TEST
ABSTRACT:
This program is intended to test aJl 01 the basic operations 01 the TM03/TE16/
TUn Subsystem. write. read. space. erase. rewind. ect. There are 27 (octal)
tests.
OPERA TING PROCEDURES :

.R ZTECFO
SA:::; 210 restart address (no header printed)
Tape Unit must be online and a tape loaded at BOT with a write enable
ring installed.
Answer the lollowing questions:
REGISTER START: 1'12440
VECTOR ADDRESS: 224
IS CONTROLLER /UMPERED IN NON· STANDARD MODE
TYPE 2 FOR NON· STANDARD OR < CR > FOR STANDARD:
DRIVE NUMBER: 0
controJler select number
SLA VE NUMBER: 0
tape drive select numbe
SERIAL NO: 12345
RH ONLY (NO:::; O. YES:::; 1): (0) ?
SWR :::; 000000 NEW:::;

SWITCH SETTINGS :
SW15:::; I halt on error
SW14:::; J loop on error
SW13= 1 inhibit error typeout
SW12:::; 1 do not halt at end 01 pass
SWll:::; I inhibit iterations
SWlO:::; 1 halt alter current test
SW09:::; 1
SW05:::;
SW04:::: 1 selects individual test
SW03:::: 1 selects individual test
SW02:::: 1 selects individual test
SW01:::; 1 selects individual test
SWOO:::: I selects individual test

use "CONTROL G" to enter soltware SWR at joe. 176

4·10

ZTEDEO

TM03/TElS/TU77

TM03/TE1S/TU77 DATA RELIABILITY PROGRAM
ABSTRACT:
Wit}1 t11is program you can verily tllat the tape drives under test are
per/orming to there data error rate specilied. Up to 8 drives can be tested
by a single execution of the program. The pl'Ogram tests writs, reads, rewinds,
tape positioning, EOT·BOT sensing.
OPERATING PROCEDURES :
START ADDRESS
SA = 200 nonnal startaddress
SA = 204 restart address (keep parameters)
SA = 240 all default except RH address and vector.

Tape Unit: ONLINE. TAPE LOADED at BOT. WRITE ENABLED
Answer the following questions:
REGISTER START: 172440
VECTOR ADDRESS: 224
DRIVE NUMBER: 0
SLAVE NUMBER: 0
DENSITY (3 or 4):
PARITY (0 or 1):
FORMAT (14,15 or 16):
SLAVE NUMBER: I
RECORD COUNT: 100
CHARACTER COUNT: 200
PATTERN NUMBER : I
TAPE MARK: 0
INTERCHANGE READ: 0
SINGLE PASS:O
STAUS:

controller select number
tape drive select number
3 = 800. 4 = 1600 BPI
0= ODD, I = EVEN
14=mormal. 15=core dump
16= PDPI5 or IBM compatible
< CR > if no more drives
1·117777 gives blocking factor
20·10000 c1lOracters per record
0·15 different data patterns
1 = one tape mark alter each data block
0= nonnal I = interchange
1 = stop after one pass
1·177771 (time delay between functions)

SWITCH SETTINGS
RECOMMENDED SWITCH SETTING: 000720
SWI5= 1 halt on erro1'
SWJ4= 1 print read/write statistics
SW 13 == 1 do not check data errors
SWI2.=
do not check write status errors
SW 11=
do not check read status errors
SWlO.=
do not print any error
SWD9 -=
rewind all available tapes
SWD8 =
generate random data
SW07 = 1 generate random character count
SWD6= 1 generate random record count
SW05:=. 1 yozzle on current record
SW04.=
do write/read retries
SW03 ==
do not read forward
SW02=
do not read reverse
SWOl ==
read forward lirst
SWOO=
do not write
use "CONTROL Gil to enter soltware SWR at loco 116
4-11

ZTEEEO

TM03/TElS/TU77

TM03/TElS/TU77 DRIVE FUNCTION TIMER
ABSTRACT:

This program will check both the logic generated time delays as well as the
distances traveled by the tape. Actual tape speed may also be checked by
using the speed tests with an 800 BPI SKEW tape.
OPERA TING PROCEDURES :

.R ZTEEEO
SA; 210 restart address (use parameters from the previous run)
Tape Unit must be online and a tape loaded at BOT with a write
enable ring in.
Answer the questions:
FIRST ADDRESS OF CONTROLLER: 172440
TM03 DRIVE #'s TO BE TESTED: ALL (or 0-7)
FOR TM03 DRIVE X TYPE SLAVE *'s TO BE TESTl:.'D: ALL (or 0·7)
SPEED TESTS (YES/NO) : NO
The program will start testing timing functions.
On completetion the program will halt the CPU.
To repeat test press continue.
SWITCH SETTINGS :

SW15 = 1 halt on error
SW14= 1 loop on current test
SW13; 1 inhibit error typeout
SW12= 1
SWll;
inhibit subtest iterations
dont print function times
SW1O=
SW09;
bell on error
SWOB=
do not halt after one pass
SWOG=
SW05; 1 selects individual test
SW04; 1 selects individual test
SW03; 1 selects individual test
SW02= I selects individual test
SWOl; I selects individual test
SWOO= 1 selects individual test
use "CONTROL G" to enter software SWR at loco 176

4-12

ZTKAEO

TK50/TK70

TK50/TK70 FRONT END FUNCTIONAL TEST
ABSTRACT:

The TK50/70 lunctional diagnostic is intended to provide conJidence in the
. basic functionality 01 this subsystem. As such. tlJis should be the lirst host
level diagnostic nm on the TK50170 subsystem to verily ill:>tallation or lor
troubleshooting. Emphasis is placed on isolating laults to the field replaceable
unit (fHUJ. Up to four TK50170 units con be tested sequentialy. One pass will
take about 20 minutes. This is not a data reliability test. There are 9 subtests
performed by the diagnostic code; subtest 10 invokes the controller resident
level 2 microdiagnostics.
OPERA TING PROCEDURES :

.R ZTKA??
This program is running under the supervisory program.
This supervisory program will first talk to you.
CZTKA·E-O
CZTKAEO TK50170 FUNCTIONAL
UNIT IS TK50
RSTRT ADR 145702
DR>STA<CR>
You have to answer the hardware questions.
Change HW (LJ ? Y < CR >

* UNITS

(D) ? l<CR>
UNIT 0
TKIP ADDRESS (OJ 174500 ? < eR >
TK VECTOR (O) 260 ? < CR >
TIMSCP UNIT NUMBER (0) 0 <CR>

TESTING UNIT 0
On the end you will get a nice summary table

BLOCKS WRITTEN CHANNEL 1 : 2290
BLOCKS WRITTEN CHANNEL 2 ; 2290
BLOCKS READ CHANNEL I : 2190
(there are physicaly 2 read/write heads/channels)

4-13

ZTKBCO

TK50/TK70

TKSO/TK70 DATA RELIABIUTY TEST
ABSTRACT

This program will exercise the TK50170 and establish the performance quality
oj each unit through accumulation oj statistics. Predetermined se'quences 01
operations will pennit read and write compatibility (media intecchange
testing) and data reliability testing. This test accepts up to 4 units. This test
is not a Jault isolation tool.
OPERA TING PROCEDURES :

.R ZTKB??
This program is running under the supervisory program.
This supervisory pmgram will lin;t talk to you.
CZTKB-C-O
CZTKBCO DATA RELIABILITY
UNIT IS TK50
RSTRT ADR 145702
DR>STA<CR>
You have to answer the hardware questions.
Change HW (L) ? Y < cn >
if uNITS (0) ? 1 <CR>
UNIT 0
TKIP ADDRESS (0) 174500 ? < CR >
T I MSCP UNIT NUMBER (0) 0 < CR>
CHANGE SW (t) ? N<CR>
here you can select time 01 day clock.
change contcoller parameters.
change printing parame ters.
change test parameten;.
One end 01 pass will require approximately 1 llOur and 10 minutes Jor each
uni t to test.
Any unrecoverable write. read or hardware error means that this unit
did not pass the test.

4-14

ZTKEBO

TK25

TK25 FRONT END FUNCTIONAL TEST
ABSTRACT:
The TK25 lunctional diagnostics are intended to provide conlidence in the
basic lunctionality 01 the TK25 subsystem. As such, tllis should be the lirst
host level diagnostic run on the TK25 to verily installation or lor
troubleshooting. One pass will take about 1 minutes. This is not a data

reliability test.
There are 11 subtests :
1 Initialization test, build in microdiagnostics (FRU is TK25 controller)
2 Controller RAM test (FRU is TK25 controller)
3 Command reject test (FRU is TK25 controlled
4 Write characteristics command (fRU is TK25 controller)
5 Volume check (fRU is TK25 controller)
6 Completion interrupt (fRU is TK25 controlled
7 Basic packet protocol test (fRU is TK25 controller)
8 Non tape motion commands test (fRU is TK25 controller)
9 Memory addressing test (fRU is TK25 controller)
10 Initialize alter write charocteristics (FRU is TK25 controlled
II Basic write subsystem memory command test (fRU is TK25 controller)
Alter test 1 run test 2,3 and 4.
OPERA TING PROCEDURES :

.R ZTKEBO
This program is running under the supervisory program.
This supervisory progrom will first talk to you.
CZTKE:-B·O
CZl'KEAO TK-25 fRT END fUNC #1
UNIT IS TK-25
RSTRT ADR 145702
DH>STA<CR>
You have to answer the hardware questions.
Change HW (LJ ? Y < CR >
It UNITS (D) ? 1 < CR>
UNIT 0
DEVICE ADDRESS (TSSRJ (0) 172522 ? < CR >
INTL'RRUPT VECTOR (OJ 224 ? < CR >
CHANGE SW (L)
ENABLE CONTROLLER RAM DUMP ON ERROR (LJ N ?
INHIBIT ITERATIONS (L) N ?

4-15

ZTKFAO

TK25

TK25 FRONT END FUNCTIONAL TEST 2
ABSTRACT:
The TK25 Junctional diagnostics are intended to provide confidence in the
basic Junctionality oj the TK25 subsystem. This should be the second host level
diagnostics to run on the TK25 to verily installation or lor troubleshooting.
One pass will take about 1 minutes.
There are 1 subtests :
1 Initialization test t2
2 Off line reject and rewind test.
3 Basic write test.
4 Basic read data test (Jorward and reverse).
5 Manual intervention test
6 Configuration type out
'I Scope loop

Alter test 2 run test 3 and 4.
OPERA TING PROCEDURES :

.R ZTKFAO

This program is running under the supervisory program.
This supervisory progrom will lirst talk to you.
CZTKF·A·O
CZTKFAO TK·25 FRT END FUNC #2
UNIT IS TK·25
RSTRT ADR 145'102
il you want manual intervention test
DR>STA<CR>
type STARTlfLAG:PNTITEST:5IPASS: 1 < CR>
il you want configuration type out
type STARTIFLAG:PNTITEST:6IPASS: 1 <CR>
il you want scope loop
type STARTlfLAG:PNTITEST: 'IPASS: 1 < CR >

You have to answer the hardware que:>tions.
Change HW (L) ? Y < CR >
(D) ? I<CR>
UNIT 0
DEVICE ADDRESS (TSSR) (0) 172522 ? < CR>
INTERRUPT VECTOR (0) 224 ? < CR >
INTERRUPT PRIORITY (OJ 5 ?< CR >

* UNITS

CHANGE SW (L)
il you type "Y" it will ask
ENABLE CONTROLLER RAM DUMP ON L·RROR (L) N ?
INHIBIT ITERATIONS (i) N ?
4-16

TK25

ZTKGAO
TK25 FRONT END FUNCTIONAL TEST 3

ABSTRACT:

The TK25 functional diagnostics are intended to provide confidence in the
basic functionality 01 the TK25 subsystem 1'lIis should be tIle third host level
diagnostics to run on the TK25 to verily installation or for troubleshooting.
One pass will take about 6 minutes
There are 4 s!!blests
I Space records test
2 Rereads test
3 Write data retry test
4 write/read tape mark
Alter test 3 run test 4.
OPERA TING PROCEDURES :

.R ZTKGAO
This program is running under tIle supervisory program.
This supervisory progrom will lir.>t talk to you.
CZTKG-A-O
CZTKGAO TK-25 fRT f.'ND rUNC 113
UNIT IS TK-25
RSTRT ADR 145702
DR>STA<CR>
You have to answer tIle hardware questions.
Change HW (LJ ? Y < CR >
11 UNITS (0) ? 1< CR>
UNIT 0
DL'VICE ADDRESS (TSSR} (OJ 172522 ? < CR >
INTERRUPT VECTOR (0) 224 ? < CR >
INTERRUPT PRIORITY (0) 5 ?< cn >
CHANGE SW (L)
if you type "Y" it will ask
ENABLE CONTROLLER RAM DUMP ON ERROR (LJ N ?
INHIBIT ITERATIONS (LJ N ?

4-17

ZTKHBO

TK25

TK25 FRONT END FUNCTIONAL TEST 4
ABSTRACT:
The TK25 Junctional diagnostics are intended to provide conlidence in the
basic Junctionality oj the TK25 subsystem. This should be the Jourth host level
diagnostics to run on the TK25 to verily installation or lor troubleshooting.
One pass will toke about 30 minutes.
There are 5 subtests :

I Write tape mark retry test
2 Skip tope marks
3 No-op and initialize test
4 Erase and operation incomplete test
5 Operations at EOT
This is the lost Junctional test.
OPERATING PROCEDURES :

.R ZTKHBO
This program is running under the supervisory program.
This supervisory program will first talk to you.

CZTKH-B-O
CZTKHBO TK-25 FRT END FUNC 14
UNIT IS TK-25
RSTRT ADR 145702
(print test numbers)
DR> STAI FLAG:PNT < CR >
You have to answer the hardware que!>tions.
Change HW (t) ? Y < CR >
I UNITS (V) ? I<CR>
UNIT 0
DEVICE ADDRESS (TSSm (0) 172522 ? < CR >
INTERRUPT VECTOR (0) 224 ? < CR >
INTERRUPT PRIORITY (0) 5 ? < CR >

CHANGE SW (L)
iI yo u type II Y" it will ask

ENABLE CONTROLLER RAM DUMP ON ERROR (L) N ?
INHIBIT ITERATIONS (t) N ?
INHIBIT EOT CHECKING (REDUCES RUN TIME" BY 22 MINU'fES) (L) N ?

4-!8

ZTKIBO

TK25
TK25 DATA RELABILITY TEST

ABSTRACT:
This progrom can be used as a basic lunction test, a data reliability test, a
compatability test, or to execute a sequence 01 operoter selected commands.
This diagnostic can test up to 4 units in a round robin laslIion.
There are 6 tests in this progrom :

I Basic JUllctions
2 Data reliability
3 Write and read streaming test
4 Write compatibility utility
5 Read compatibility utility
6 Operator selected sequenced utility

OPERA TING PROCEDURES :

.R ZTKIBO
This program is running under tile supelVisory program.
This supervisory progrom will lirst talk to you.
CZTKI-B-O
CZTKIBO TK-25 DATA RELIABILITY Tl.'ST
UNIT IS TK-25
RSTRT ADR 145702
DR>STA
You have to answer the hardware questions.
Change HW (LJ ? Y < CR >
• UNITS (OJ ? I<CR>
UNIT 0
TSSR ADDRESS (OJ 172522 ? < CR >
VECTOR (OJ 224 ? < CR >
CHANGE SW (LJ
if you type "Y" it will ask
CLEAR COUNTERS (LJ Y ?
RESET RANDOM VARIABLES (LJ N ?
HALT AfTER EACH COMMAND (LJ ?
PRINT SOfT ERRORS (LJ N ?
INHIBIT RECOVERY (LJ N ?
BAD TAPE SPOT DETECT (LJ Y ?
DISABLE INTERRUPTS (LJ N ?
INHIBIT REC ERROR REPORTS (LJ N ?
CONTROLLER RAM DUMP (LJ N ?
ENABLE EARLY WARNING MESSAGES (LJ N ?
CHANGE COMMAND SEQUENCE (LJ N ?
One lull pass takes about (1l123+J 2,5 hours
4-19

ZTMAIO

TS03/TEIO/TUIO

TS03/TElO/TUIO BASIC FUNCTION TEST
ABSTRACT:
This program is intended to test all 01 the basic operations 01 the TS031TElO1
TUlO Subsystem. write. read. space. erose. rewind. and it selected manual
intervention.
OPERA TING PROCEDURES :

Tape Unit must be online and a tape loaded at BOT
and write enabled.
The proglllm will type: SET SWD = 1 If 7 CHANNEL
II appropriate set SWD and then press continue

SWITCH SETTINGS :
SW15= 1 halt on error
SW14::;: 1 loop on error
SW13= 1 inhibit error typeout
SW12= 1 inhibit subtest iteration
SWll =
single pass
SWlO::;:
inhibit manual intervention test
SW09::;: 1 TS03 tape drive
SWOl = 1
SWOO::;: 1 test 1 channel tape drive

use "CONTROL G" to enter software SWR at loco 176

4-20

TMII/TUIO/TEIO

ZTMBGO

TMll/TS03/TElO/TUlO DATA RELIABILITY PROGRAM
ABSTRACT:
With tllis program you can verily Illot the tope drives under test are
perlomling to tllere data error rate speciJied. Up 10 8 dlives (9 channel onlyJ
can be tested by a single execution 01 Ihe pl"Ogl-alll. The pn)gram tests writs.
reads. rewinds. tape positioning. COT-HOT sensing. There al"'e 6 subtests
available for selection jJ started at 204 or 210 There are also 8 data patterns
to select.
OPERA TING PROCEDURES
START ADDRESS
SA = 200 normal startaddress all parameters are delault
SA =:c 204 operator controlled parameter and unit selection
SA = 210 same as above but instead 4k - Bk memory available

Tape Units to test must be online and a tape loaded at BOT
and a write enable ring in.

11 you start at 204 or 210 the program will type
"Sf:LeCT UNITS" (ljke 0.1.2.3<CR>J
SWITCH SETTINGS
SWI5-=
SWI4=
SWI3= I print errors only at end 01 tape
SWI2= I
SW09=
SWOB= I print error statistics
SW07== I
write statistical recovery
SW06=
delete write xirg
SW05==
delete read re-trys
SWD4==
SW03== 1 print alter parity errors
SWD2== 1
SWDI ==
change data pattern (to next one)
SWOO==

use "CONTROL G" to enter soltware SWR at loco 176

4-21

ZTMCDO

TMII/TUIO

TMll/TUlO (7 CHANNEL) DATA RELIABILITY PROGRAM
ABSTRACT:

With this progrom you can verify that the tape drives under test are
perionning to there data error rote specjJied. Up to 8 drives (7 channel only)
can be tested by a single execution 01 the program. The progrom tests writs.
reads. rewinds. tape positioning. EOT-BOT sensing. There are G subtests
available lor selection it started at 204 or 210. There are also 8 data patterns
to select.
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 nonnal startaddress all parameters are default.
SA = 204 operotor controlled parometer and unit selection
SA = 210 same as above but instead 4k . 8k memory available
Tape Units to test must be online a tape loaded at BOT
and a write enable ring in.
II you start at 204 or 210 the program will type

"SELECT UNITS" (like 0.1.2,3<CR»
SWITCH SETTINGS

SW15:::;
SW14=
SW13= 1 print errors only at end of tape
SW12:::; 1
SW09:::;
SW08:::; 1 print error statistics
SW07:::; 1
SWOG:::; 1 write statistical recovery
SW05:::; 1 delete write xirg
SW04 = 1 delete read re-trys
SW03- 1 print alter parity errors
SW02- 1
SWOl:::;
SWOO:::;
change data pattern (to next one)
use "CONTROL a" to enter software SWR at loco 176

4-22

TMII/TUIO

ZTMDEO

TMlllTUlO (7 or 9 CHANNEL) DRIVE FUNCTION TIMER
ABSTRACT:

TIle TMll drive Junction timer assists in testing oj tIle TMll controller and
TUlO tape unit, selected operations are executed, timed and the times ant
printed (in miliseconds) there is no limit or' error testing facilities in the
program, the decision on the validity oj times measUl-ed must be made by
the operator.
OPERA TING PROCEDURES

.R ZTMDEO
Tape Units to test must be online a tape loaded at BOT
and a write enable ring in.
BeJore starting set control switc1les in memory location 176
to select a Tape-Unit (U no lront pannel switches).
On completion oj all tests "END OF TIMING" will be printed and the
processor will halt. To repeat test, simply press continue.
CONTROL SWITCH SETTINGS :
SWI5=
unit 0, 7 channel
SWI4=
unit I, 7 channel

SWIJ,,SWI2=
SW 11'""
SWIO=
SW09=
SWOB=
. SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SWOI=
SWOO=

unit 2, 7 channel
unit 3, 7 channel
unit 4, 7 c1lOnnel
unit 5, 7 channel
unit 6, 7 channel
unit 7, 7 channel
unit 0, 9 channel
unit I, 9 channel
unit 2, 9 channel
unit 3, 9 channel
unit 4, 9 channel
unit 5, 9 channel
unit 6, 9 channel
unit 7; 9 channel

use "CONTROL G" to enter soJtware SWR at loco 176

4·23

TMll/TMAll/TMBll

ZTMEEO

TMAll/TMBll/TUlO/TElO (7/9 CHANNEL) DRIVE fUNCTION TIMER
ABSTRACT:
The TMlllTMAlllTMBll drive iunction timer assists in testing of the controller
and tape units. selected operations are executed, timed and the times are
printed (in miliseconds) there is no limit or error testing lacilities in the
program. the decision on the validity 01 times measured must be made by
the operator.
OPERA TING PROCEDURES :

.R lTMEED
Tape Units to test must be online and a tape loaded at BOT
and a write enable ring in.
Before starting set control switches in memory location 176
to select a Tape-Unit (il no lront pannel switches).
On completion 01 all tests "END OF TIMING" will be printed and the
processor will halt. To repeat test. simply press continue.
CONTROL SWITCH SETTINGS :
SWI5=
unit D. 1 channel
SWI4=
unit 1. 1 channel
SW13=
unit 2. 7 channel
SW12=
unit 3. 7 channel
SWll=
unit 4. 1 channel
SW1D=
unit 5. 1 channel
SWD9=
unit 6. 1 channel
SWOB=
unit 7. 7 channel
SWD7=
unit D. 9 channel
SWD6=
unit 1. 9 channel
SWD5=
unit 2. 9 channel
SWD4=
unit 3. 9 channel
SWD3=
unit 4. 9 channel
SWD2=
unit 5. 9 channel
unit 6, 9 channel
SWOl=
SWOD=
unit 7. 9 dlannel
use "CONTROL G" to enter software SWR at loco 176

4-24

TMA/BII/TEIO/TUIO

ZTMFFO

TMA- TMBlllTEIO/TU 10 SUPPL. INSTRUCTION TEST
ABSTRACT:
This program is intended to be used in addition to the Zl'MAlO test to complete
testing of the mag tape controller. The progrum consists of only lour tests
which check only the TMA,B·ll leotI/res of data tmnsler at odd byte starting
address and operation incomplete time Ollt.
OPERA TING PROCEDURES :

.R ZTMFFO
SA = 210 restart address (no header printed)

Tape Unit must be online and a tape loaded at BOT
and write enabled.
When storied at 200 the program will print a identification header
and requests tIle unit number to be typed on the concole.

SWITCH SETTINGS:
SW 15 =
halt on error
loop on error
SW14=
inhibit error typeout
SW13=
SW 12 = inhibit sub test iteration
SW 11 =
do not halt at end 01 pass
SW1O=
halt at end 01 current test
SW09=
SW02 =
select individual test ..
SWOl =
select individual test ..
SWOO= 1 select individual test" (0 = all tests)

use "CONTROL G" to enter soltware SWR at loco 176

4-25

ZTMHFO

TS03/TUIO/TEIO

TM.A.Bll/TS03/TUlO/TElO DATA RELIABILITY TEST
ABSTRACT:

With this program you can verily that the tape drives under test are
performing to there data error rate specuied. Up to B drives (7 or 9 channel)
can be tested by a single execution 01 the program. The program tests writing.
reading. rewinding. tape positioning. EOT-BOT sensing.
OPERA TING PROCEDURES :

START ADDRESS
SA == 200 normal starladdress enter all parameters
SA == 204 restart address (keep parameters. continue data pattern sequence)
SA = 210 same as above but reset data pattern like start at 200
SA = 240 special start. special sequence of testing
Tape Unit must be online and a tape loaded at BOT
and a write enable ring in.
Answer the following questions:
REGISTER START: 172520
VECTOR ADDRESS: 224
UNIT NUMBER: 0
DENSITY (0 - 3):
PARITY to or l):
UNIT NUMBER: < CR >
RECORD COUNT: 100
CHARACTER COUNT: 200
PATTERN NUMBI.'R :
TAPE.' MARK: 0
SINGLE PASS:O
STALLS:

drive select number
0= 200. 1 = 556. 2 = BOOBPI 7ch. 3 == BOOB PI 9ch
0= ODD. 1 = EVEN
< CR > jJ no more uuits
1-177777 gives blocking lactor
4·4000 character.) per record
0-20 di/lereut data patterns
1 = one tape mark aiter each data block
I"'" stop alter olle pass
1·177777 (time delay between lunctions)

SWITCH SETTINGS
RECOMMENDED SWITCH SETTING 000700
SW15=
1101t on error
SWI4=
yo;ale on CUrT'ent block
do not check data ermr~
SW 13 =SWI2=do not check Wille !ltoills error:.
do not clleck reod :;/U/IIS t;I,TOI'S
SWJl=
SW 1O=do not p"int OilY 131'1'01
rewind all available tope:.
SW09=
generate lundom data
SWOB=
genarule lundom chal'actt11 COlII]/
SW07=
gene,ute random I'aco,.d cOllnt
SW06=
YO.t.:,do on curn:'lll rcc:o!d
SW05print :.tatistic!)
SW04SW03,-,do not read
SW02=
SWOI -"disable nHIles
SWOO -=
do not w,lte
lillie "CONTROl. C" to ttll/til :;ot/wo",: SWH at lot,. 1'16
4·26

ZTSAAO

TSU05
TSU05 DIAGNOSTIC PART I
ABSTRACT:

The TSU05 diagnostics are intended to provide confidence in the basic
functionality of this subsystem. As such. tllis should be the first host level
diagnostic nm on the TSU05 to verily installation or for troubleshooting. this
progron consists of 11 subtests Wllicll are executed in sequence.
1 bus reset test
2 wrap data high byte
3 wrap data low byte
4 M7455 RAM test
5 second initialization test
6 command reject test
7 write charocteristics test
8 volume check test
9 completion interrupt test
10 basic packet protocol test
11 non·tape motion command tests

Alter test 1 run test 2.3 and 4.
OPERA TING PROCEDURES :

.R ZTSAAO
This program is running under the supervisory program.
This supervisory progrom will first talk to you.
CZTSA·A·O
**** TSU05 DIAGNOSTIC PART 1 REPLACE M7455 IF ERROR ****
UNIT IS TSU05
RESTART ADR 142060
(print eacll test number)
DR> STARTIFLA:PNT < CR >
You have to answer the hardware questions.
CllOnge HW (L) ? Y < CR >
It UNITS (V) ? 1 < CR>
UNIT 0
DEVICE ADDRESS (TSBAITSDB) (V) 172520 ? < CR >
INl'ERRUPT VECTOR (0) 224 ? < CR >
CHANGE SW (LJ
INHIBIT ITERATIONS (L) N ?

4-21

ZTSBAO

TSU05
TSU05 DIAGNOSTIC PART 2

ABSTRACT:
The TSU05 diagnostics are intended to provide conlidence in the basic
lunctionality 01 this subsystem. As such. this should be the second host level
diagnostic run on the TSU05 to verily installation or lor troubleshooting. This
program consists oj 12 subtests. 1-9 are executed in sequence. 10-12 are
standalone and have to be selected specialy (START/TEST: 11)

1 initialize alter write characteristics
2 basic write subsystem memory command
3 DMA memory addressing
4 M7455 RAM exerciser test
5 extended leatures switch and timer A and B
6 FIFO exerciser
7 static transport bus interlace test
8 transport bus interlace loopback test
9 readlwrite data parity test
10 manual intervention
11 con/iguration type out
12 scope loops
Alter test 2 run test 3 and 4.
OPERA TING PROCEDURES :

.R ZTSBAO
This program is running under the supervisory program.
This supervisory program will first talk to you

CZTSB-A-O
•••• TSU05 DIAG PART 2 REPLACE M7455 IF ERROR ....
UNIT IS TSU05
RESTART ADR 145702
DR >STARTIFLA:PNT<CR>
print each test number
You have to answer the han:lware questions.
Change HW (LJ ? Y < CR >
• UNITS (VJ ? I<CR>
UNIT 0
Dr'Vler' ADDRESS (TSBAITSDBJ (0) 172520 ? <CR>
INTERRUPT VECTOR (0) 224 ? < CR >

CHANGE SW (LJ
INHIBIT ITERATIONS (LJ N ?

4-28

TSU05

ZTSCAO
TSU05 DIAGNOSTIC PART 3

ABSTRACT:

The TSU05 diagnostics are intended to pl'ovide conJidence in the basic
functionality 01 this subsystem. As such, this should be the third host level
diagnostic run on the TSU05 to verify installation or Jor troubleshooting. This
progrom consists 01 8 subtests which are executed in sequence.
I initialize #4 test
2 oil-line and reject rewind
3 basic write data
4 basic read data (forward and reverse)
5 space records
6 rereads
7 write data retry
8 write I read tape mark
Alter test 3 run test 4.
OPERA TING PROCEDURES :

.R ZTSCAO
This program is running under the supervisory program.
This supervisory progrom will lirst ta1lc to you.
CZTSC-A-O
".". TSU05 DIAG PART 3 CHK CABLES - TRANSPORT IF ERROR ."..
UNIT IS TSU05
RESTART ADR 145702
DR>STARTIFLA:PNT<CR>
(print each test numbed
You have to answer the hardware questions.

Change HW (L) ? Y < CR >
# UNITS (V) ? 1 < CR >
UNIT 0
DEVICE ADDRESS (TSBAITSDB) (V) 172520 ? < CR >
INTERRUPT VECTOR (0) 224 ? < eR >
CHANGE SW (L)
INHIBIT ITERATIONS (L) N ?

4-29

ZT5DAO

T5U05
TSU05 DIAGNOSTIC PART 4
ABSTRACT:

The TSU05 diagnostics are intended to provide confidence in the basic
Junctionality oj this subsystem. As such, this should be the Jourth host level
diagnostic run on the TSU05 to verify installation or Jor troubleshooting. This
pragrom consists oj 9 subtests which are executed in sequence.
1 write tape mark retry
2 skip tape marks
3 no-op "clean tape" and initialize
4 erase and operotion incomplete
5 data parity test
6 operotions at EOT
7 extended mode Jeatures
8 record buHering
9 Junction timing
This is the last oj 4 tests to run
OPERA TING PROCEDURES :

.R ZTSDAO
This program is running under the supervisory program.
This supervisory pragrom will Jirst ta11c to you.
CZTSD-A·O
.... TSU05 DIAG PART 4 CHECK TRANSPORT IF ERROR ••••
UNIT IS TSU05
RESTART ADR 145702
(print each test numbed
DR> START / FLA: PNT < CR >
You have to answer the hardware quostions.
Change HW (L) ? Y< CR >
(V) ? 1 < CR >
UNIT 0
DEVICE ADDRESS (TSBAITSDBJ (0) 172520 ? <- CR >
INTERRUPT VECTOR (OJ 224 ? < ell >

* UNITS

CHANGE SW (L)
INHIBIT ITERATIONS (I.) N ?

4-30

TMAII/TMBII/T803

ZTSEBO

TMAII/TMBII TS03 DRIVE FUNCTION TIMER
ABSTRACT:
The TMAITMBll drive Junction timer assists in testing of Ille tope controller
and TS03 tope unit. selected operations are executed. timed and the times
are printed (in miliseconds) there is no limit or error testing facilities in the
program. the decision on the validity 01 times measured must be made by
the operotor. Ether 1 or 2 TS03 units may be selected.
OPERA TING PROCEDURES :

.R ZTSEBO
Tope Units to test must be online and a tape loaded at BOT
and a write enable ring in.
Enter starting register address
II speed test only, enter a one (1).
II all others, enter a zero (0).
II speed test, mount a 800 BPI skew tape and type < eR >
The program will automaticaly find the available TSD3 tope unit.
The progrom will begin timing functions.
On completion of all tests it prints "END OF TIMING" and holts.
To repeat test: press continue.
SWITCH SETTINGS:
no switch settings

4-31

ZTSFDO

TMA.BII/TS03

TMA-TMBll TS03 SUPPL. INSTRUCTION TEST
ABSTRACT:
This program is intended to be used in addition to the ZTMAIO test to complete
testing oj the mag tape controller. The program consists 01 only Jour tests
which check only the TMA,B·ll leatures 01 data transfer at odd byte starting
address and operation incomplete time out.
OPERA TING PROCEDURES :

.R ZTSFDO
SA;;:; 210 restart address (no header printed)

Tape Unit must be online, a tape loaded at BOT
and write enabled.
When started at 200 tIle program will print a identification lleader
and requests the unit number to be typed 011 the cOllcole.

SWITCH SETTINGS :
SW15;;:;
halt on elTor
SW14;;:;
loop on error
SW13;;:;
inhibit error typeout
SW12=
inhibit subtest iteration
SWll =
do not halt at end oj pass
SWIO=
halt at end oj cun-ent test
SW09=
SW02=
select individual tes' •
SWOl;;:;
select individual tes' •
SWOO=
select individual test • (O=a11 tests)

use "CONTROL au to enter sOJtwOI-e SWR at loco 176

4·32

TSII/TS04

ZTSHDO

TSll TS04 DATA RELIABILITY TEST
ABSTRACT:

This progrom can be used as a basic function test, data reliability test,
compatibility test or to execute a sequence 01 operotor selected commands.
This progrom mainly verifies that the tape drives under test are performing
to there data error rate specified. It consists 01 5 parts:
Te$t 1 bO$ic lunctions
Test 2 data reliability
Test 3 compatibility write-utility
Test 4 compatibility read-utility
Test 5 operotor selected sequence utility
OPEf!.A TING PROCEDURES :

.R ZTSHDO
This program is running under the supervisory program.
This supervisory progrom will lirst talk to you.
CZTSH-D-O
DATA RELIABlLITY n:ST
UNIT IS TSll
RSTRT ADR 145702
DR>START
answer the hardware questions
CHANGE HW (L) ? Y < CR >
UNITS (0) ? l<CR>
TSSR ADDRESS (OJ 172522 ? < CR >
VECTOR (0) 244 ? < CR >
CHANGE SW (L) ? N < CR >
here you can change some soltwate parameters like
CLEAR COUNTERS (t) Y ?
RESET RANDOM VARIABLES (L) N ?
HALT AFTER EACH CMD (L) N ?
PRINT RECOVERABLE ERRORS iL) N ?
INHIBIT RECOVERY (t) Y ?
DISABLE INTERRUPTS (t) N ?
INHIBIT RFC ERROR REPORT (t) ?
CHANGE COMMAND SEQUENCE (t) ?
Tape Unit must be online and a tape loaded at BOT
and a write enable ring in.

4-33

ZTSIeo

TSII/TS04
TSl} TS04 CONTROL LOGIC TEST
ABSTRACT:

This diagnostic tests one unit at the time, but will sequentialy test up to 4
units. The units do not have to be on line and a tape does not have to be
loaded to run this diagnostic. This program executes TS11 and TS04 commands
in the diagnostic wraparound mode to identiiy failing modules.
It consists of 10 subtest :
Test I PDPII-TSll wrap test
Test 2 PDPll-TS04 wrap test
Test 3 set TS04 characteristc test
Test 4 per/orm data wrap on the P.E. read formatter
Test 5 wrap a data pattern to check each track
Test 6 skew the data on a track by one byte
Test 7 check the dead track logic by rippling a doad track thru
Test 8 lookup table test
Test 9 inline micro diagnostic test
Test 10 init micro diagnostic test
OPERA TING PROCEDURES :

.R ZTSICO
This program is running under the supervisory program.
This supervisory program will first talk to you.
CZTSI-C-O
CONTROL LOGIC TEST
UNIT IS TS11
RSTRT ADR 145702
DH::> START
answer the hardware questions
CHANGE HW (L) ? Y < CR >
UNITS (0) ? I<CR>
TSSR ADDRESS (OJ 172522 ?<CR>
VL'CTOR (0) 224 ?<CR>
CHANGE SW (LJ ? N<CR>
here YOIl can change some soltware parameters like:
ENABLE DATA COMPARE ERROR PRINTS FOR TESTS 4-7 (L) N ?

4-34

ZTUIAO

TU81
TUB} DATA RELIABILITY TEST

ABSTRACT:
This program will exercise the TUB1 and establish the performance quality 01
each unit through the accumulation oj statistics. Predetermined sequences 01
operations will permit read and write compatibility (media interchange
testing) and data reliability testing. The data reliability program will detect
functional laults. but will not provide diagnostic isolation to the lield
replaceable unit. One pass with default parameters will take about 1 hour
and 10 minutes (twice BOT to EOTJ.
This program consists 01 7 parts :
Test 1 basic functions
Test 2 quick verily read/write test
Test 3 complex read/write test
Test 4 write interchange test
Test 5 read unknown tape
rest 6 start/stop write/read test
Test 7 conversation test
OPERA TING PROCEDURES :

.R ZTUIAO
This program is running under the supervisory program.
This supervisory program will first talk to you.
CZTUl·A·O
CZTUIAO TUB1 DATA RELIAB TEST
UNIT IS TUB1
RSTRT ADR 145702
DR > START
answer the hardware questions
CHANGE HW (LJ ? Y < CR >
UNITS (V) ? I<CR>
UNIT 0
TKIP ADDRESS (0) 174500 ?<CR>
T / MSCP UNIT NUMBER (0) 0 ? < CR >
CHANGE SW (L) ? N<CR>
here you can change some soltware parameters like:
ENABLE TIME OF DA Y CLOCK (L) N ?
CHANGE CONTROLLER PARAMETERS (LJ ?
INITIAL DENSITY OF EACH TEST IS GCR {LJ ?
CHANGE PRINTING PARAMETERS {U N ?
CHANGE TEST PARAMERERS (LJ N ?
Tape Unit must be online and a tape loaded at BOT
and a WrIte enable ring in.

4-35

ZTU2DO

TU81

TUB1 FRONT END FUNCTION TEST
ABSTRACT:

This program should be the first host level diagnostic run on the TUBl to
verily installation. or Jor troubleshooting. This diagnostic tests one unit at the
time. but will sequentialy test up to 4 units. In addition to host level testing
the program will implicitly invoke the TUB1's controller resident level 1 sell· test
microdiagnostics as well as explicitly invoking the controllers level 2
microdiagn os tics. To run a Jull pass oj the program. a I)cratch tape must be
mounted on the unit.
OPERA TING PROCEDURES :

This program is running under the I)upervisory program.
This supervisory program will iin;t talk to you .
.R ZTU2DO

CZTU2·D·0
CZTU2DO TUB1 FUNCTIONAL DIAGNOSTIC
UNIT IS TUBI
RSTRT ADR 145702
DR > START
answer the hardware questions
CHANGE HW (L) ? Y < CR >
UNITS (D) ? 1 <CR>
TUIP ADDRESS (0) 174500 ? < CR >
VECTOR (0) 260 ?<CR>
TIMSCP UNIT NUMBER (0) 0 ?<CR>
First pass will take about 20 minutes. others 24 minutes.

4-36

TM02/TUlS/TElS

ZTUAJO

TM02/TUlS/TElS DATA RELIABILITY TEST
ABSTRACT:

The program is exercising any tape drive 1110t can be operated through the
TM02 controller lNRZl. 7 or 9 Track. PE). Up to 8 drives may be tested by a
single ",n of the program. It exercises wlites. reads. rewinds. tape positioning.
EOT . BOT sensing and assumes a good 1111 and TM02.
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 normal startaddress . enter parameters
SA = 204 restart address - keep parameters
SA = 210 same as 204 except data pattern is returned to fixed one
SA = 240 special test sequence I enter only HH addr. and vector
SA = 300 restart - short parameter entry.

Put Tape Units online. at BOT and write ring in.
Answer the lollowing questions:
REGISTER START = 172440< CR >
VECTOR = 224 < CR >
DRIVE NUMBER
controller number
SLA VE NUMBER
tape unit n umbe r
DE.'NSITY =
3 = 800. 4 = 1600BPI
PARITY =
o =even. 1 =odd
fORMAT =
14 = nomlOl. 15 = core dump
SLA VE NUMBER
next tape unit or < CR > for no more
(l - 177777) blocking factor
RECORD COUNT = 100
CHARACTER COUNT = 200 (20-4000) c11aracters per record
(0·15) different data patterns
PATTERN NUMBER =
TAPE MARKS = 0
I = one tape mark alter each data block
INTERCHANGE READ
0
o = normal. 1 = interchange read
SINGLE PASS = 0
o = stop alter one pass
1·177777 (time delay between functions)
STALLS = I
SWITCH SETTINGS

RECOMMENDED S WITCH SETTING : 000720
SWI5 = I stop on error
SW14 = I print read/write statistics
SWI3= I do not check data errors
SWI2=
do not check write status errors
do not check read status errors
SWlJ '"
do not print any errors
SWlO=
rewind all available tapes
SW09=
SWOB=generate random data
generate random character count
SW07"
generate random record count
SW06=
SW05",
yozzle on current record
do write/read retries
SW04=
do not read forward
SW03=
do not read reverse
SW02""
SWOl=
read lorward first
SWoO=
do not write
"CONTROL G" to enter soltware SWR at loco 176
4-37

ZTUBHO

TM02/TUlS/TElS

TM02/TU1S/TE1S BASIC fUNCTION TEST
ABSTRACT;
This program is intended to test all oj tIle basic Junctional level operations
oj the TMD2-TU16/TE16 mag. tape system. All Junctions. write. read, space,
erase, rewind, ect. will be tested. In addition to the TMD2-l'U16/TEI6 tests, the
RH will be tested separotely ill so Jar as it is possible to separote the RH
from the TM02-TU16/TE16 itseli.
OPERA TING PROCEDURES
.R ZTUBHD

Start address 210 ;:::; restart address - keep parameters
Put Tape Units online. tape loaded at BOT and write ring in.
Answer the following questions:
REGISTER START;:::; 17244D< CR >
VECTOR;:::; 224<CR>
DRIVE: NUMBER;:::;
controller number
SLA VE NUMBER;:::;
tape unit number
D;:::; RHll, 1;:::; RH70
RHll OR RH7D;:::;
RH ONLY;:::;
1;:::; test only RH
NRZ ONLY;:::;
0= no 1= yes

SWITCH SETTINGS ;
SW15;:::;
stop on error
SWI4;:::;
loop on error
SW13;:::;
do not print errors
SWI2;:::;
inhibit iterotions
SW 11 ==
do not stop aJter one pass
SWlO;:::;
halt after current test
SW09==
SWOB;:::;
SW04 ==
select subtest·
SWD3;:::;
select subtest·
SW02;:::;
select subtest·
SW01;:::;
select subtest·
SWOO;:::;
select subtest·
• all ze ro ;:::; all tes ts
use "CONTROL G" to enter soLtware SWR 01 loc. 1'/6

4-38

TM02/TUlS/TElS

ZTUCGO

TM02lTUlS/TEIS CONTROL LOGIC TEST
ABSTRACT:
This program tests all control logic and data formatting functions within the

TM02 formatter. Each test will attempt to isolate failures to the module level
and prints the failing module number. Tlter'(] are two major' areas 01 testing
:control logic (test 1-41157-64) and data formatting (test 42-56)
OPERATING PROCEDURES :

.R ZTUCGO
START ADDRESS
SA = 200 normal startaddress - enter parameters
SA = 210 restart address· keep parameters
Put Tape Units online. tape loaded at BOT and write ring in.
Answer the lollowing questions:
REGISTER START = 172440< CR >
VECTOR = 224<CR>
controller number
DRIVE NUMBER =
DRIVE NUMBER =
< CR > it only one
tape unit number
SLA VE NUMBER =
NRZ ONLY=
0= no 1 = yes
STATIC TEST ONLY;
O=no.l:z:yes
SWITCH SETTINGS :
SWI5= 1 halt on error
SWI4= 1 loop on error
SWI3= 1 do not print errors
SWI2= 1 inhibit iterations
SWll = 1 do not stop alter one pass
SWlO= I halt alter current test
SW09= 1 do manual intervention test
SWOB = I inhibit wrap around data check
SW07= I inhibit wrap around status check
SW06= 1 selectable wrap data pattern
SW05 = 1 select subtest*

SW04 = 1 select subtest*
SW03 = 1 select subtest*
SW02= 1 select subtest*
SWOI = 1 select subtest*
SWOO= 1 select subtest*
* all zero = all tests
use "CONTROL G" to enter soltware SWR at loco 176

4-39

ZTUDDO

TM02/TU16

TM02lTU16 DRIVE FUNCTION TIMER
ABSTRACT:
This program measures the time required and gap size produced by the
TM021TUJ6 Mag. tape. The test will check bOtll tIle logic generated time delay.,
and the distances travled by the tape in response. Actual tape speed may
also be checked by using the speed tests with an 800 BPI skew tape.
OPERA TING PROCEDURES :

.R ZTUDDO
SWR"" 000000 NEW""
Put Tape Units online, tape loaded at BOT and write ring in.
Answer the loll owing questions:
TYPE FIRST ADDRESS OF CONTROLLER : 172440
TYPE TM02 DRIVE "s TO BE n'STED : 0
FOR TM02 DRIVE 0 TYPE SLAVE "s 1'0 BE TESTED:O

(standard)

(0"" FIRST TM02)
(normaly slave

TAPE SPEED TESTS ONL Y ? :
NJ1Z ONLY? .'

(0"" no, I"" yes)
(O=no,l=yes)

The program halts aiter one pass, press continue to do one more pass.

SWITCH SETTINGS:
SWI5= I halt on error
SW 14 = J loop on current subtest
SW13= 1 do not print erron;
SW 11::; 1 inhibit iterations
SWlO= I inhibit printing oi lunction times
SW09= I bell on error
SW07::; 1 halt aiter selected test
SWOG::; 1 do not halt aiter one pass
SW05 = 1 select subtest*
SW04::; I select subtest*
SW03 = ! select subtest*
SW02 = I select subtest*
SWOl = 1 select subtest*
SWOO= 1 select subtest*

* all zero = all tests
use "CONTROL GU to enter soJtware SWR at loco 176

4-40

ZTUGCI

TM02/TEl6

TM02lTE16 DRIVE FUNCTION TIMER
ABSTRACT:

This program measures the time required and gop size produced by the
TM021TE16 Mag. tope. The test will check both the logic generated time delays,
and the distances traveled by the tope in response. Actual tape speed may
also be checked by using the speed tests with on 800 BPI skew tope.
OPERA TING PROCEDURES :

.R ZTUGCl
SWR= 000000 NEW=
Put Tope Units online, tope loaded at BOT and write ring in.
Answer the following questions:
TYPE FIRST ADDRESS OF CONTROLLI.'H : 172440
TYPE TM02 DRIVE #'s TO BE TESTED: 0
FOR TM02 DRIVE 0 TYPE SLAVE *'s TO BE TESTED:
TAPE SPEED TESTS ONLY? :
NRZ ONLY? :

(standard}
(0:= FIRST TM02}
(normaly slave O}
(0= no, 1 = yes}
(0= no, 1 = yes}

The program holts alter one pass, press continue to do one more pass.
SWITCH SETTINGS :

SW 15 =
holt on elTor
SW14=
loop on current subtest
SWIJ=
do not print errors
SWl1=
inhibit iterations
SWI0=
inhibit printing of lunction times
SW09= 1 bell on error
SW07= I holt alter selected test
do not holt alter one pass
SW06=
SW05=
select subtest·
SW04 = select subtest*
SWOJ = 1 select subtest*
SW02 = 1 select subtest·
SWOl = 1 select subtest*
SWOO= 1 select subtest*
• all zero = all tests
use "CONTROL Gil to enter soltware SWR at loco 176

4-41

ZTUIAO

TM02/TU45

TM02/TU45 DATA RELIABILITY TEST
ABSTRACT:
The program is exercising the TU45 drive on the TM02 controller. Up to 8
drives may be tested by a single run 01 the program. It exercises writes.
reads. rewinds. tape positioning. EOT . BOT sensing and assumes a good RH
and TM02.
OPERA TING PROCEDURES :
START ADDRESS
SA = 200 normal startaddress . enter pammeters
SA = 204 restart address . keep parameters
SA = 210 same as 204 except data pattern is returned to fixed one
SA = 240 special test sequence I enter only RH addr. and vector
SA = 300 restart - short parameter entry.
Put Tape Units online. at BOT and write ring in.
Answer the lollowing questions:
REGISTER START: 112440< CR >
VECTOR: 224 < CR >
DRIVE NUMBER:O
controller number
tape unit number
SLA VE NUMBER:O
DENSITY:4
3 = 800. 4 = 1600BPI
PARITY:
o =even. 1 ""odd
FORMAT:
14 = normal, 15 = core dump
SLA VE NUMBER: < CR >
next tape unit or < CR > Jor no more
(1 . 177777) blocking lactor
RECORD COUNT: 100
(20-4000} characters per record
CHARACTER COUNT: 200
PA1'TERN NUMBER: 1
(0-15) dille rent data patterns
TAPE MARKS: 0
1 = one tape mark alter aad) data block
= normal. 1 .;.. interdlOnge read
INTERCHANGE READ:
SINGLE PASS: 0
o = stop aJter one pass
1-177777 (time delay between Junctions)
STALLS: 1

SWITCH SETTINGS
REROMMENDED SWITCH SETTING 000720
SW 15 -" 1 stop on en-or
SW 14 = 1 print readlwrite statistics
SWI3= 1 do not check data erron;
SWI2= 1 do not check write status errors
SW 11 =
do not check read status errors
SWlO=
do not print any error~
SW09=
rewind all available tapes
SW08 =
genemte mndom data
SW07=
genemte mndom clJOracter count
genemte mndom record count
SWD6=
yozzle on current record
SW05=
SW04=
do write/read retries
SW03~
do not read 10lwald
SW02=
do not read rever'Se
SWOl=
read forward lirst
SWOO,,do not wri.:s
"CONTROL G" to onter so/twaro SWH 01 ioc
4-42

i76

TM02/TU45

ZTUJAO

TM02lTU45 BASIC FUNCTION TEST
ABSTRACT;

This program is intended to test all oj tIle basic Junctional level operations
TM02-TU45 Mag. Tape system. All lunctions. write, read, space, erase,
rewind. ect. will be tested. In addition to the TM02-TU45 tests. the RH will be
tested separately in so Jar as it is possible to sepan~te the RH lrom the

01 the

TIIAn'l.,·rrAc
f'Y'U£-f u-r...,

, , __ II
JI.:)t1U.

OPERA TING PROCEDURES :

.R ZTU/AO
STAIlT ADDRESS
SA = 200 normal startaddress . enter parameters
SA = 210 restart address - keep parameters
Put Tape Units online. tape loaded at BOT and write ring in.
Answer the lollowing questions:

REGISTER START = 172440< CR >
VECTOll = 224<CR>
controller number
DRIVE NUMBER =
SLA VE NUMBER =
tape unit number
RHlI OR RH70=
0= RHll. 1 = RH70
RH ONLY=
I = test only RH
NRZ ONLY=
0= no 1 = yes

SWITCH SETTINGS :

SW15 = 1 stop on error
SWl4= 1 loop on error
SW13 = do not print errors
SW 12 =
inhibit iterations
SWll=
do not stop alter one pass
SWIO=
halt alter current test
SW09=
SWOB=
SW04 = 1 select subtest'"
SW03 = 1 select sub test'"
SW02 = 1 select subtest'"
SWOl = 1 select subtest'"
SWOO= 1 select subtest'"
.. all zero = all tests
use "CONTROL G" to enter soltware SWR at loco 176

4-43

ZTUKAO

TM02/TU45
TM02lTU45 CONTROL LOGIC TEST
ABSTRACT:

This program tests all control logic and data formatting functions within the
TM02 formatter. Each test will attempt to isolate failures to the module level
and prints the foiling module number. There are two major areas of testing
:control logic (test 1-41157-(4) and data formatting (test 42-56).
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 normal startaddress . enter parameters
SA = 210 restart address· keep parameters
Put Tope Units online. tope loaded at BOT and write ring in.
Answer the following questions:
REGISTER START = 172440< CR >
VECTOR = 224<CR>
DRIVE NUMBER =
controller number
DRIVE NUMBER =
< CR > if only one
SLA VE NUMBER =
tope unit number
NRZ ONLY=
0= no 1= yes
STATIC TEST ONLY:
O=no.l=yes
SWITCH SETTINGS :
SW 15 =
1101t on error
SWI4=
loop on error
do not print errors
SWI3=

SWI2=
SWll=
SWI0=
SW09=
SWOB=
SW07=
SW06=
SW05=
SW04=
SW03=
SW02=
SW01=
SWOO;::

inhibit iterations
do not stop alter one pass
holt after current test
do manual intervention test
inhibit wrap around data check
inhibit wrap around status check
selectable wrap data patteI'll
select subtest·
selec t subtest·
select :mbtest·
selec t subtest*
selec t subtest·
select subtest·

• all zero ;:: all tests
use "CONTROL G" to enter software SWR at loco 176

4-44

TM02/TU45

ZTULAO

TM02lTU4S DRIVE FUNCTION TIMER
ABSTRACT:

This progrom measures the time required and gap size produced by the
TM021TU45 Mag. tape. The test will check both the logic generated time delays.
and the distances traveled by tIle tape in response. Actual tape speed may
also be checked by using the speed tests with an 800 BPI skew tape.
OPERA TING PROCEDURES :

.R ZTU1.AO
START ADDRESS
SA", 200 normal startaddress . enter parameter.:;
SWR = 000000 NEW =
Put Tape Units online. tape loaded at BOT and write ring in.
Answer the lollowing questions:

TYPE FIRST ADDRESS OF CONTROLLE"R : 172440
TYPE TM02 DRIVE *'J TO BE TESTED: 0
FOR TM02 DRIVE 0 TYPE SLAVE #'s TO BE Tf."STED:O
TAPE SPEED TESTS ONLY? ;
NRZ ONLY? :

(standard)
(0= FIRST TM02)
(normaly slave 0)
(0= no. 1 = yes)
(0= no. I = yes)

The program halts alter one pass. press continue to do one more pass.
SWITCH SETTINGS :

SW15 ==
SWI4=
SWI3==

SWll=
SWIO==
SWD9==
SW07=
SW06=
SW05=

SW04=
SW03=
SW02::;

SWOl::;
SWDO=

halt on error
loop on current subtest
do not print errors
inhibit iterotions
inhibit printing 01 lunction times
bell on error
halt alter selected test
do not halt alter one pass
select subtest·
1 select sub test·
I select subtest·
1 select subtest·
1 select subtest·
1 select sub test·

• all zero ::; all tests
use "CONTROL G" to enter soltware SWR at loco 176

4-45

ZTUOBO

TM03/TU45

TM03/TU4S CONTROL LOGIC TEST 1
ABSTRACT :
This program is intended to test 011 control logic fUJlctionality of the TM03
controller. Each test will attempt to isolate failures to the module level and
provide printout in/onnation which will identify the failing module. The level
of fault isolation is possible because 01 the TM03 stn/cture and its maintenance
mode.
OPERA TING PROCEDURES :
.R ZTUOBO

START ADDRESS
SA == 200 nonnal startaddress . enter parameten;
SA == 210 restart address· keep parameters
Put Tape Units online. tape loaded at BOT and write ring in.
Answer the lollowing questions:
REGISTER START: 172440< CR >
VECTOR: 224 < CR >
TM03 DRIVE:
TU45 SLAVE:
STATIC TEST ONLY;

controller number
tape ullit number
0= no 1= ye:;

SWITCH SETTINGS :
SWI5= 1 stop on error
SWI4= 1 loop on error
SW13==
do not print errors
SW12==
do not stop alter one pass
SW 11 ==
inhibit iterations
SW1O=
halt alter current test
SW09=
do manual intervention tests

SWDB=
SWD5 ==
SW04 =
SWD3 =
SWD2 =
SWDI ==
SWDO =

select subtest*
select subtest*
select subtest*
select subtest*
select subtest·
select subtest·

• 011 l!!ero
all tests
use "CONTROL G" to enter software SWR ot loc. 176
:=;

4·46

ZTUPBO

TM03/TU45

TM03/TU45 CONTROL LOGIC TEST 2
ABSTRACT:

This program is intended to test all data formatting functionality of the TM03
controller. Each test will attempt to isolate lailures to tIle module level and
provide printout inlormation which will identify the lailing module. The level
of lault isolation is possible because 01 the TM03 structure and its maintenance
mode.
OPERATING PROCEDURES

.R ZTUPBO
START ADDRESS
SA:::: 200 normal startaddress . enter parumeters
SA:::: 210 restart address· keep parameters
Put Tape Units online, tape loaded at BOT and write ring in.
Answer the lollowing questions:
REGISTER START: 172440<CR>
VECTOR: 224 < CR>
TM03 DRIVE:
controller number
TU45 SLAVE:
tope unit number
SWITCH SETTINGS
SWI5::::
stop on efTor
loop on error
SWI4=
SWI3::::
do not print errors
SW12=
do not stop alter one pass
inhibit iterations
SWll=

SWlO::::
SW09::::
SWOB=
SW07=
SWOG=

SW05::::
SW04::::
SW03::::
SW02=
SWOl::::
SWOO=

halt alter current test
inhibit wrap around data check
inhibit wrap around status chedc
selectable wrap data pattern (in single tesO
select subtest*
select subtest*
select subtest*
select subtest*
select subtest·
select subtest*

• all zero == all tests
use "CONTROL G" to enter software SWR at loco 176

4-47

ZTUQBO

TM03/TU45
TM03/TU4S BASIC FUNCTION TEST

ABSTRACT:
This program is intended to test all of the basic lunctional level operations
01 the TM031TU45 Mag. Tope system. All functions. write. read, space, erase,
rewind ect. wilJ be tested. In addition to the TM031TU45 tests, the RH will be
tested separately in so for as it is possible to separate the RH lrom the

TM031TU45 itsell.
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 normal startaddress - enter pammeters
SA = 210 restart address· keep parameters
Put Tope Units online, tope loaded at BOT and write ring in.
Answer the following questions:
REGISTER START: 112440< CR >
VECTOR: 224 < CR>
DRIVE NUMBER:O
SLA VE NUMBER:
SERIAL NUMBER:
RH ONLY:

controller number
TAPE UNIT NUMBER
printed by the program
1 = test only RH

SWITCH SETTINGS

S,W 15 = J stop on error
SW 14 = 1 loop on error
SW13= 1 do not print errors
SW12=
do not stop aiter one pass
Inhibit iterations
SWll=
holt after current test
SWlO=
SW09=
SWOB=
SW04=
selec t subtest·
select subtest·
SW03=
SW02=
select sub test·
selec t sub test·
SWOl=
select subtest·
SWOO=
• all zero = all tests
use "CONTROL G" to enter soltware SWR at loc 176

4·48

ZTURBO

TM03/TU45

TM03/TU 45 DATA RELIABILITY TEST
ABSTRACT:

The program is exercising the TU45 drive tlJat can be operated through the
TM03 controller. Up to 8 drives may be tested by a single run 01 the program.
It exercises writes. reads. rewind. tape positioning. EOT - BOT sensing and
assumes a good RH and TM03.
OPERA TING PROCEDURES :

START ADDRESS
SA = 200 nonnal startaddress - enter parameters
SA = 204 restart address - keep parameters
SA = 210 same as 204 except data pattern is returned to fixed one
SA = 240 special test sequence / enter only RH addr. and vector
SA = 300 restart - short parameter entry.
Put Tape Units online. at BOT and write ring in.
Answer the lollowing questions:
REGISTER START: 172440<CR>
VECTOR: 224<CR>
DRIVE NUMBER:O
controller number
SLAVE NUMBER:O
tape unit number
DENS/TY:4
3 = 800. 4 = 1600BPI
PARITY:
o = even, I c" odd
FORMAT:
14 == nonnal, IS = core dump
SLA VE NUMBER: < CR >
next tape unit or < CR > lor no more
RECORD COUNT: 100
(1 - 177777) blocking lactor
CHAIlACTER COUNT: 200
(20·4000) chamcters per record
PATTERN NUMBER: 1
(0-15) dillerent data patterns
TAPE MARKS: 0
I = one tape mOl-k alter each data block
INTE.'RCHANGE READ: 0
o = nonnal. 1 = interchange read
SINGLE PASS: 0
o = stop alter one pass
STALLS: 1
1·177777 (time delay between functions)
SWITCH SETTINGS

RECOMMENDED S WITCH SETTING

000720

SW15 = 1 stop on error
SWI4= 1 print read/write statistics

SW13 = 1 do not check lor data errors
SWI2= 1 do not check lor write status errors
SWll = 1 do not check for read status errors

SWIO= 1 do not print any errors
rewind all available tapes
generate random data
generate random character count
generate random record count
yozzle on current record
do write/read retries
do not read forward
do not read reverse
SWOI = read forward first
SWOO=
do not write
"CONTROL G" to enter soJtwore SWR at lac. 176

SW09=
SW08=
SW07=
SW06=
SW05 =
SW04=
SW03:::
SW02=

4-49

ZTUSBO

TM03/TU45

TM03/TU45 DRIVE FUNCTION TIMER
ABSTRACT:
Thisprogrom measures the time required and gap size produced by the
TMD31TU45 Mag. tape. The test will check both the logic generoted time delays,
and the distances traveled by the tape in response. Actual tope speed may
also be checked by using the speed tests witlt on BOD BPI skew tape.
OPERA TING PROCEDURES :

.R ZTUSBO
SWR::;: 000000 NEW::;:
Put Tope Units online. tape loaded at BOT and write ring in.
Answer the following questions:
TYPE FIRST ADDRESS OF CONTROLLER : 172440
TYPE TMD3 DRIVE #'s TO BE TESTED' 0
FOR TMD3 DRIVE 0 TYPE SLAVE .'s TO BE TESTED:D
TAPE SPEED. TESTS ONLY?

(standard)
FIRST TM03)
(normaly slave O)
(0= no, 1::;: yes)

(0=

The progrom halts alter one pass. press continue to do one more pass.
SWITCH SETTINGS:
SW15=
1101t on error
SWI4=
loop on current subtest
SWI3=
do not print errors
SWI2""
inhibit iterations
SWll=
inhibit printing 01 function times
SWlO=
ring bell on error
SWD9=
type line item alter each iterotion
SWDB=
SW01::;:
SWOG;:::
do not halt after one pass
SWD5;:::
select subtest·
SW04=
select subtest·
select subtest·
SW03=
select subtest·
SWD2=
selee t subtest·
SWOl=
select subtest*
SWDD""
• all zero = all tests
use "CONTROL G" to enter SOitwOl'e SWR at loc

4-50

176

NTUUAO

11/21-TU58

11121 - TUSS PERFORMANCE EXERCISER
ABSTRACT:

This program will exercise Irom 1 to 8 TU58 controller boards. each 01 which
supports 1 or 2 drives. The program implements the "maintenance mode"
switch within all packet commands. Statistical summaries are provided lor all
units tested. The program consists 01 9 subtests:
Test 1 initiates !Jell test
Test 2 seek test. seeks to BOT tl1en to EOT on both tracks
Test 3 writes. then reads in 512 byte/block mode
Test 4 writes. then reads in 128 byte/ block mode
Test 5 write tape
Test 6 read tape
Test 7 write verily tape
Test 8 read modilied threshold tape
Test 9 tests modilied radial serial protocol
OPERA TING PROCEDURES ;

This program is running under tile supervisory program.
l'his supervisory program will lirst talk to you .
.R NTUUAO
CNTUU·A·O
TU58 PERF EXER
UNIT IS TU58 CONTROLLER
RSTRT ADR 145702
DR>STA<CR>
You have to answer the hardware questions.
Change HW (L) ? Y < CR >

* UNITS (V) ? 1< eR >

UNIT 0
TU58 CSR (OJ 176500 ? < eR >
VECTOR ADDR. (O) 300 ? < CR >
PDT INTERFACE (L) N ? N<CR>
TEST DRIVE 0 (L) Y ? < eR >
TEST DRIVE 1 (L) Y ? < eR >
CHANGE SW (L) ? Y<CR>.
NUMBER OF BLOCKS; TEST 5·8 (8 TO 512) (V) 8 ?
ADD DR
TO DATA PATTERN:TEST 5·8 (t) Y ?
STA1'lSTICS PRINTED AT EOP (L) Y ?
COMPARE DATA ON READ (L) Y ?
PRINl' PACKET ON ERROR (L) Y ?

To get the summary any time. type <control C> and then PRI < CR >

4-51

ZTUUFO

TUS8
TUSS PERFORMANCE EXERCISER
ABSTRACT:

This progrom will exercise Irom I to 8 TU58 controller boards, each 01 which
supports I or 2 drives. The progrom implements the "maintenance mode"
switch within all pocket commands. Statistical summaries are provided lor all
units tested. The progrom consists 01 9 subtests:
Test 1 initiates sell test
Test 2 seek test, seeks to BOT then to E07' on both tracks
Test 3 writes, then reads in 512 byte/block mode
Test 4 writes, then reads in 128 byte/ block mode
Test 5 write tope
Test 6 read tope
Test 7 write verily tope
7'est 8 read modified threshold tope
Test 9 tests modified radial serial protocol
OPERA TING PROCEDURES :

.R Z7'UUFO
This program is running under the supervisory program.
This supervisory progrom will iin>t talk to you.

CZTUU·F·O
TU58 PERF EXER
UNI7' IS TU58 CONTROLLER
RSTRT ADR 145702
DR >S7'A < CR >
You have to answer the hardware questions.
Change HW (L) ? Y< CR >
UNITS (0) ? l<CR>
UNI7' 0
TU58 CSR (0) 176500 ? < CR >
VEC7'OR ADDR. (0) 300 ? < CR >
PDT INTI:.'RFACE (L) N ? N < CR >
7'ES7' DRIVE 0 (t) Y ? < CR >
n:sr DRIVE: 1 (L) Y ? < CR>
f

CHANGE SW (t) ? Y<CR>,
NUMBER OF BLOCKS: 7'EST 5·8 (8 TO 512) (0) 8 ?
ADD DR ff 7'0 DA7'A PA7''ff.RN:'fEST 5·8 (t) Y ?
S'fA'flSTICS PRINTED AT EOP (t) Y ?
COMPARE DATA ON W:AD (1.) Y ?
PH/NT PACKET ON ERliOH (1.) Y ?

To get the summary any time, type < control C'"> and then PHI < CR >

4·52

ZTUVBO

TU80
TU80 DATA RELIABILITY TEST
ABSTRACT:

This progmm is exercising the TUBO drive and can be used as a basic function
test. a data reliability test or a compatibility test. It can test up to 4 units
simuntaneously.
There are 6 tests in this progmm:
Test 1 basic functions
Test 2 data reliability
Test 3 write and read streaming test
Test 4 write compatibility I write utility
Test 5 read compatibility I read utility
Test 6 opemtor selected sequence utiljty
OPERA TING PROCEDURES :

Put Tape Units online. tape loaded at B01' and write ring in.
This program is running under the supervisory program.
This supervisory progmm will lirst talk to you .
.R ZTUVBO
CZTUV·B·O
DATA RELIABILITY TEST
UNIT IS TUBO
RSTRT ADR 145702
DR> STAt FLAG: PNT < CR >
'UNITS (D) ? 1 < CR >

(start, print test NRJ

UNIT 0
TSSR ADDRESS (0) 172522 ? < CR >
VECTOR (0) 224 ?<CR>
CHANGE SW (t) N < CR >
if you type "Y" you can change:
CLEAR COUNTERS (L) Y ?
RESf.'T RANDOM VARIABLES (L) N ?
HALT AFTER EACH CMD (L) N ?
PRINT SOFT ERRORS (t) N ?
INHIBIT RECOVERY (t) N ?
BAD TAPE SPOT DETECT (L) Y ?
DISABLE' INTERRUPTS (t) N ?
INHIBIT RFC ERROR REPORT (L) N ?
M7454 RAM DUNP (L) N ?
CHANGE CMD SEQ (L) N ?

Test 2 will print a summary table

4·53

ZTUWAO

TU80

Tuao FRONT END DIAGNOSTIC PART 1
ABSTRACT:
This program is testing the functionality of the TUBO drive, provides error
messages which identify failing functions and aids in the repair of the device.
This is the first test out of four.
There are 11 tests in this program:
Test 01 initialization test
Test 02 ram test
Test 03 command reject test
Test 04 write characteristic test
Test 05 volume check test
Test 06 completion interrupt test
Test 07 basic packet protocol test
Test DB non-tape motion commands test
Test 09 DMA mempry addressing test
Test 10 initialization after write characteristics test
Test 11 basic write subsystem memory command test
OPERA TING PROCEDURES :
Put Tape Units online, tape loaded at BOT.
This program is running under the sllpervisory program
This supervisory program will first talk to YOIl
.R ZTUWAO
CZTUW-A·d
CZTUWAO TUBO FRONT END PRT A
UNIT IS TUBO
RSTRT ADR 145702
DR> STAI FLAG:PNT < CR >
IWNITS (D) ? 1 < CR >

(start, print test Nfl)

UNIT 0
DEVICE ADDRESS (TSSR) (0) 172522 ?<CR>
INTERRUPT VECTOR (0) 224 ?< CR >
IN1'f.'RRUPT PRIORITY (0) 5 ?
CHANGE SW (L) N<CH>
i/ yOIl type "Y" YOII can change:
ENABLE M7454 RAM DUMP ON £'RROfi (L) N ?
INHlHIT l7'ERATIONS (t) N ?

4-54

Tuao

ZTUXAO
TU80 FRONT END DIAGNOSTIC PART 2

ABSTRACT:

This program is testing the functionality of the TUBO drive, provides error
messages wl1ich identify failing Junctions and aids in the J-epair oj the device.
This is the second test out oj Jour. Run test ZTUYAO and ZTUZAO alter this
one.
There ore B tests in this program:
Test 01 FIfO exerciser test
Test 02 initialize #4 test
Test 03 oll·line reject and rewind test
Test 04 basic write data test
Test 05 basic read data (forward and reverse} test
Test 06 manual intervention test
Test 07 conliguration typeout test
Test OB scope loops test
OPERA TING PROCEDURES :

Put Tape Units online. tape loaded at BOT and write enabled.
This program is running under the supervisory program.
This supervisory program will lirst talle to you .
.R ZTUXAO
CZTUX·A·O
CZTUXAO TUBO fRONT END PRT B
UNIT IS TUBO
RSTRT ADR 145702
DR>STA/fLAG:PNT<CR>
(stan. print test NRJ
'UNITS (V} ? 1< CR >
UNIT 0
DEVICE ADDRESS (TSSR) (0) 172522 ?<CR>
INTERRUPT VECTOR (0) 224 ?<CR>
INTERRUPT PRIORITY (0) 5 ?
CHANGE SW (L) N<CR>
if you type "Y" you can change:
ENABLE M7454 RAM DUMP ON ERROR (LJ N ?
INHIBIT ITERATIONS (L) N ?

4·55

ZTUYAO

TU80

TU80 fRONT END DIAGNOSTIC PART 3
ABSTRACT;
This progrom is testing the lunctionality 01 the TUBO drive. provides error
messages which identify lailing Junctions and aids in the repair 01 the device.
This is the third test out 01 lour. Run test ZTUZAO after this one.
There are 4 tests in this progrom:
Test 01 space records test
Test 02 reread tests
Test 03 write data retry test
Test 04 write tape mark test
OPERA TING PROCEDURES :
Put Tape Units online, tape loaded at BOT and write enabled.

This program is running under the supelVisory program.
This supervisory progrom will first talk to YOll .
.R ZTUYAO
CZTUY·A·O
CZTUYAO TUBO f'RONl' I.'ND PRl' C
UNIT IS TUBO
RSTRT ADR 145702
DR >STAIf'LAG:PNT< CR >
fWNITS (0) ? 1 < CR >

(stan. print tost Nfl)

UNIT 0
DEVICE ADDRESS (TSSRJ (0) 172522 ? < cn >
INTERRUPT VECTOR (0) 224 ? < Cli >
INTf.'RRUPT PRlORll'Y (0) 5 ?
CHANGE SW (L) N<CR>
if YOll type "Y" you can cJlOnge:
ENABLE M7454 RAM DUMP ON EItHOR (LJ N
INHIBIT I1'£'RATIONS (LJ N ?

4·56

ZTUZAO

TU80

Tuao FRONT END DIAGNOSTIC PART 4
ABSTRACT:

This progrom is testing tIle Junctionality oJ the TUBa drive, provides elTor
messages which identify Jailing Junctions and aids in the repair 01 the device.
Thjs js the last one out 01 lour tests.
There are 6 tests in this progrom:
Test 01 write tape mark retry test
Test 02 skip tape marks test
Test 03 no-op ("clean tape") and initialize test
Test 04 erase and operotion incomplete test
Test 05 operotions at EOT test
Test 06 lunction timing test
OPERA TING PROCEDURES :

Put Tape Units online, tape loaded at BOT and write enabled.
This program is running under the supervisory program.
This supervisory progrom will lirst talk to you .
.R ZTUZAO
CZTUZ·A-O
CZTUZAO TUBa FRONT END PRT D
UNIT IS TUBa
RSTRT ADR 145702
DR> STAI FLAG:PNT < CR >
#UNITS (D) ? 1 < CR >

(start, print test NRJ

UNIT 0
DEVICE ADDRESS (TSSR) (0) 172522 ? < CR >
INTERRUPT VECTOR (0) 224 ?<CR>
INTERRUPT PRIORITY (0) 5 ?
CHANGE SW iL) N<CR>
iI you type "Y" you can change:
ENABLE M7454 RAM DUMP ON ERROR (l.) N ?
INHIBIT ITERATIONS (t) N ?

4-57

INDEX IN ALPHABETICAL ORDER
INCLUDES UPDATE 1150 RELEASE Vl33 SEP-1987
(THEY ARE NOT ALL TESTS ON THE MEDIA ANY MORE)
01
02
03
04
05
06
07
08
09
10
11
12
13
14
IS
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

XXBOOT.MON
XXDPXM.SYS
XXDPSM.SYS
DRSXM .SYS
DRSSM .SYS
DIR .SYS
DB .SYS
DD .SYS
DK .SYS
DL .SYS
OM .SYS
DP .SYS
DR .SYS
DS .SYS
DT .STS
OX .SYS
DY .SYS
DU .SYS
DY .SYS
LP .SYS
MT .SYS
MM .SYS
MS .SYS
MU .SYS
DATE .SYS
DUSZ .SYS
UPD2 .BIN
UPDAT .BIC
XTECO .BIC
DXCL .BIC
SETUP .BIC
PATCH .BIC
HELP .TXT
XMONFO.UB

OLD FILE MAINTENANCE UTIUTY
FILE MAINTENANCE UTIUTY
TEXT EDITOR PROGRAM
DEC-XII CONFIGURATOR - UNKER
TABLE EDITOR FOR "DRS> TESTS"
UTILITY TO PATCH BINARY PROGRAMS
VERSION 2 HELP FILE
DEC-XII MONITOR LIBRARY

35
36
37
38
39
40

BKDMOO.BIC
BKEABO.BIC
BKEBAO.BIN
BKMAAO.BIN
BKTADO.BIC
BKTBBO.BIC

11/35/40 CPU TRAP TEST
11/35/40 KEll/F FLOATING INSTR. SET TEST
11/35/40 KEll/F FLOATING INSTR. SET EXER
DEC SYSTEM 1080 BASIC MEMORY TIMING TEST
11/35/40 MEMORY MAN. BASIC LOGIC TEST
11/35/40 MEMORY MAN AG. ACCESS TEST

XXDP EXTENDED RESIDENT MONITOR
XXDP SMAL RESIDENT MONITOR
THE EXTENDED DIAGN. RUNTIME SYSTEM
THE SMAL DIAGN. RUNTIME SYSTEM
DIRECTORY PROGRAM
RP04/RP05/RP06 DRIVER
TU58 DRIVER
RKIllRK05 DRIVER
RLOI/RL02 DRIVER
RK06/RK07 DRIVER
RPII/RP02· 103 DRIVER
RM02lRM03/RM05 DRIVER
RS03/RS04 DRIVER
TC II DECT APE DRIVER
RXll/RXOl DRIVER
RX211/RX02 DRIVER
RA60 DRIVER
RX02 DRIVER
LPII DRIVER
TMll I TUlO. TElO DRIVER
TUl6/TEI6 DRIVER
TS04/TU80 DRIVER
TK50 DRIVER
DATE COMMAND HANDLER

A-I

41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77

78
79
80
81
82
83
84
85
86

BKTCBO.BIC
BK,TDCO. BIC
BKTFDO.BIC
BKTGDl.BIC
BQAAAO.BIN
BQEACl.BIC
BVTADO.BIN
CFPABO.BIC
CFPBBO.BIC
CFPCBO.BIC
CFPDCO.BIC
CFPEBO.BIC
CFPFBO.BIC
CFPGCO.BIC
CFPHBO.BIC
CFPIBO.BIC
CFPIBO.BIC
CFPKBO.BIC
CFPLBO.BIC
CFPMBO.BIC
CFPODO.BIC
CFPRCO.BIC
CFPSDO.BIC
CFPTEO.BIC
CFPUDO.BIC
CKBABO.BIC
CKBBBO.BIC
CKBCCO.BIC
CKBDCO.BIC
CKBECO.BIC
CKBFDO.BIC
CKBGBO.BIC
CKBHBO.BIC
CKBIBO.BIC
CKBIAO.BIC
CKBKAO.BIC
CKBLAO.BIC
CKBMEO.BIC
CKBNCO.BIC
CKBOAO.BIC
CKBPBO.BIC
CKBQBO.BIN
CKBREO.BIC
CKTABO.BIC
CKTBCO.BIC
CKTCAO.BIC

11/35/40 MEMORY MAN. MTPIIMFPI TEST
11/35/40 MEMORY MANAG. STATES TEST

11/35/40 MEMORY MANAG. ABORT TEST
11/35/40 MEMORY MANAGEMENT EXER.
WATCHDOG TIMER WITH CLOCK TEST
11/35/40 CPU DIAGNOSTIC
VT20 DIAGNOSTIC
11/45 FPll BASIC INSTRUCTION TEST 1
11/45 FP11 BASIC INSTRUCTION TEST 2
11/45 FP11 BASIC INSTRUCTION TEST 3
11/45 FPll BASIC INSTRUCTION TEST 4
11/45 PF11 BASIC INSTRUCTION TEST 5
11/45 FPll BASIC INSTRUCTION TEST 6
11/45 FP11 BASIC INSTRUCTION TEST 7
11/45 FPll BASIC INSTRUCTION TEST 8
11/45 FPll BASIC INSTRUCTION TEST 9
11/45 FP11 BASIC INSTRUCTION TEST 10
11/45 FP11 BASIC INSTRUCTION TEST 11
11/45 FPll BASIC INSTRUCTION TEST 12
11/45 FPll BASIC INSTRUCTION TEST 13
11/45 FPll BASIC INSTRUCTION EXER.
11/45 FPll LDDISTD EXERCISER
11/45 FPll ADD AND SUBTRACT EXERCISER
11145 FPll MULTIPLY EXERCISER
11/45 FPll DIVIDE EXERCISER
11/35/40/45 SXT INSTRUCTION TEST
11/35/40/45 SOB INSTRUCTION TEST
11/35/40/45 XOR INSTRUCTION TEST
11/35/40/45 MARK INSTRUCTION TEST
11/35/40/45 RTl/RTT INSTRUCTION TEST
11/35/40/45 STACK LIMIT TEST
11/35/40/45 SPL (SET PRIOR. LEVEL INSTR)TEST
11/45 REGISTER TEST
11145 ASH (ARITHMETIC SHIFT) INSTR. TEST
11/45 ASHC (ARITHM SHIFT COMB) INSTR. TEST
11/45 MULTIPLY INSTRUCTION TEST
11/45 DIVIDE INSTRUCTION TEST
*11/45 TRAP TEST
11/45 PIRQ (PROGR. INTERR. REQ.) TEST
11/45 STATES (USER. KERNEL) TEST
11/45 POWER FAIL TEST
11/45 CONSOLE SWITCH TEST
11/40/45 CPU PARITY T1:5T
11/45 KTlI-C MEMORY MANAG. LOGIC TEST 1
11/45 KTlI-C MEMORY MANAG LOGIC TEST 2
11/45 KTlI-C MEMOHY MANAG LOGIC TEST 3

A-2

087
088
089
090
091
092
093
094
095

CKTDAO.BIC
CKTEBO.BIC
CKTFDO.BIC
CKTGEO.BIC
CMFAFO.BIC
CMSBBO.BIN
CQKACO.BIC
CQKCGO.BIN
DOAAO .BIC

nn~

nnD lin

U;JO

097
098
099
100
101
102
103
104
105
106
107
108
109
110
III
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132

UUUC1.U

D.'"
.v
.....

DOCAO .BIC
DODAO .BIC
DOEAO .BIC
DOFAO .BIC
DOGAO .BIC
DOIAO .BIC
DOIAO .BIC
DOKAO .BIC
DOLAO .BIC
DOMAO .BIC
D6BAO .BIN
D6DBO .BIN
D6FCO .BIN
DGTAD2.BIC
DGTBDO.BIC
DGTCCO.BIC
DGTDDO.BIC
DGTEDO.BIC
DGTGBO.BIC
DKWAAO.BIC
DKWBAO.BIC
DQAAAO.BIC
DQABAO.BIN
EFPAAO.BIC
EFPBAl.BIC
EKBADO.BIC
EKBBFO.BIC
EKBCDI.BIC
EKBDEl.BIC
EKBEE1.BIC
EKBFDl.BIC
EKBGCO.BIC
EI{BHAO.BIC
EMIADO.BIC
EMKABO.BIC
EQKCEl.BIC

KTII-C MTPD/I (MOVE TO PREVIOUS .. ) TEST
KTll-C MFPDII (MOVE FROM PREVIO .. ) TEST
KTII-C MEMORY MGMT ABORT TEST
*KTII-C EXERCISER
11/35/40/45 MSIl.MFll.MAll-P PARITY TEST
11/45 MOS MEMORY REFRESH TEST
11/45 DIVIDE AND MULTIPLY INSTR. EXER.
* 11 135.40. 45 INSTRUCTION EXERCISER
PDPII INSTRUCTION (BRANCH) TEST 1
DnDI I

.£&.;'.£ • •

'~'~Tn

U ... -.J'U.

I,..n~l

, .................

Dn
11 ~T"'U\ Treo ... "
vun
.......... ' ....".,£

PDPII INSTR. (UNARY) TEST 3
PDPII INSTR. (UNARY & BINARY) TEST 4
PDPll INSTR. (ROTATE & SHIFT) TEST 5
PDPll INSTR. (COMPARE) TEST 6
PDPll INSTR. (NOT COMPARE) TEST 7
PDPll INSTR. (BIS.BIC.BIT) TEST 9
PDPll INSTR. (ADD) TEST 10
PDPIl INSTR. (SUBTR.) TEST 11
PDPll INSTR. (JUMP) TEST 12
PDPII INSTR. (JSR.RIS RTI) TEST 13
AA 11 CALIBRATION
VT06 DIAGNOSTIC
LABIl DIAGNOSTIC
GT40/GT44 INSTRUCTION TEST 1
GT40/GT44 INSTRUCTION TEST 2
GT40/GT44 VISUAL DISPLAY TEST (VRI4)
GT40 ROM VERIFY
GT40 QUICK VERIFY
GT40/GT44 VISUAL DISPLAY TEST (VRI7)
LINE FREQUENCY CLOCK TEST
WATCHDOG TIMER (KW11-W) LOGIC TEST
PDPll F AMIL Y INSTRUCTION EXER
0-124K MEMORY EXER.
*11/45/55/70 FPll-C DIAGNOSTIC PART 1
*11/45/55170 FPll-C DIAGNOSTIC PART 2
*11170 CPU DIAGN. PART I (BASIC INSTR)
*11170 CPU DIAGN. PART 2 (ADVANC.lNST)
*11170 CACHE DIAGNOSTIC PART 1
*11170 CACHE DIAGNOSTIC PART 2
*11170 MEMORY MANAGEMENT DIAGNOSTIC
*11170 UNIBUS MAP DIAGNOSTIC
*11170 POWER FAIL TEST
11170 M9301-YC BOOTSTRAP DIAGN. TEST
*11170 MJlI CORE MEMORY EXERCISER
*11170 MKll MOS MEMORY EXERCISER
*11170 INSTRUCTIONISYSTEM EXER.

A-3

133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178

ERHAEl.BIC
ERSAAO.BIC
ERSBCO.BIC
ERSCBO.BIC
ERSDDO.BIN
ffPAAl.BIN
ffPBAO.BIN
ffPCBO.BIC
fKAACO.BIC
FKABOO.BIC
fKACAl.BIC
fKKABO.BIN
fKTGCO.BIC
fKTHBO.BIN
fLOAT .BIN
GKAAAO.BIC
GKABCO.BIC
IDLAAO.BIC
]fPAAl.BIC
JfPBAO.BIC
IKDADl.BIC
IKDBDO.BIC
IKDCBO.BIC
IKDDBO.BIC
JKDEBO.BIN
IKDfBO.BIN
JKDHBO.BIC
IKDIBO.BIC
JKDJBO.BIN
JKL5BO.BIC
JM9ABO.BIN
KfPADO.BIC
KfPBCO.BIC
KFPCDO.BIC
KKAABO.BIC
KKABDl.BIC
KKACCO.BIC
KKFAAO.--KKfBAO.--KKKACO.BIC
KKTABl.BIC
KKTBDO.BIN
KKUAEO.BIN
NAAAAO.BIN
NAXAAO.BIN
NDLAAO.BIN

*11170 RH70 TEST (WITH DISK OR TAPE ON)

11/70 RH70 RS03/04 BASIC FUNCTION TEST
II 170 RH70 RS03/04 DATA RELIAR TEST
ll170 RH70 RS03 MAINTENANCE MODE DIAG.
11170 RH70 RS04 MAINTENANCE MODE DIAG.
*11/34 FP11-A (M8267) DIAGNOSTIC PART 1
*11/34 fP11-A iM8267)DIAGNOSTIC PART 2
*11134 fPII-A (M8267)DIAGNOSTIC PART 3
* 11 /34 CPU DIAGNOSTIC
*11/34 TRAP TEST
*11/34 EIS INSTRUCTION TEST
*11/34 CACHE (M8268) DIAGNOSTIC
*11/34 INSTRUCTION/SYSTEM EXERCISER
*11/34 MEMORY MANAGEMENT DIAGN.
*PRINTS VECTORS AND ADDRESS ASSIGNMENTS
*11/04 CPU (M7263) DIAGNOSTIC
*11/04 CPU (M7263) TRAP TEST
11/23B SLU/DLVll-J DIAGNOSTIC
*11/23 WITH fPfll (M8188 MODULE) PART 1
*11/23 WITH fPfll (M8l88 MODULE) PART 2
*11/23/24 (KDfll) MEMORY MANAGEM. DIAGN.
*11/23/24 (KDf11) CPU DIAGNOSTIC
*11/23/24 KEfll fLOATING POINT TEST 1
*11/23124 KEfll fLOATING POINT TEST 2
*11124 CPU BOARD (M7133) DlAG.(EIS.MMU.fPP .. )
*11/24 SLU & LTC TEST (M7133)
*11124 KEfll-B CIS (COMMERCIAL INSTR.SET)
*11/23-B (M8189) SLU & LTC DIAGNOSTIC
*11/23-PLUS (M8189) GO/NOGO CPU TEST
*MICRO (KDfll-B) 11/23 PLUS GO/NOGO CPU TEST
11124 ROM M9312 TEST
*11/44 fPll-f (M7093) DIAGNOSTIC PART 1
*11/44 fP11-f (M7093)DIAGNOSTIC PART 2
*11/44 fPl1-f (M7093)DIAGNOSTIC PART 3
*11/44 CPU & EIS INSTR. EXER.
*11/44 TRAP TEST
*11/44 POWER FAIL TEST
11/44 BOOT STRAP ROM DIAGN. -NOT ON DISK*11/44 CONSOLE ROM DIAGN. -NOT ON DISK*11/44 CACHE (M7097) DIAGNOSTIC
*11/44 MEMORY MANAGEMENT TEST PART 1
*11/44 MEMORY MANAGEMENT TEST PART 2
*11/44 UNIBUS MAP TEST (M7098)
AAV11 (A6001 & FALCON) (LOG.lFUNCT. TEST
AXVII-C / ADV11-C (fALCON) rUNCT. TEST.
DLVll-) (M8043 & fALCON) LOGIC TEST

A-4

179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224

NDMAAO.BIC
NDMBAO.BIC
NDMCAO.BIC
NDMDAO.BIC
NDMEAO.BIC
NDPVAO.BIN
NDRAAO.BIN
NDRCAO.BIN
NDRDAO.BIN
NDUQAO.BIN
NDURAO.BIN
NDUSAO.BIN
NDUTAO.BIN
NDUUAO.BIN
NDUVAO.BIN
NDVAAO.BIN
NDVCAO.BIN
NDZAAO.BIN
NDZBAO.BIN
NDZCAO.BIN
NIBAAO.BIN
NKAFAO.BIN
NKMAAO.BIC
NKMBBO.BIC
NKMCAO.BIN
NKMDAO.BIC
NKMEAO.BIC
NKTCAO.BIC
NKWAAO.BIC
NKXABO.BIC
NMXAAO.BIC
NQNAAO.BIN
NRLGAO.BIC
NRLHAO.BIC
NRLIAO.BIC
NRLJAO.BIC
NRLKAO.BIC
NRLLAO.BIN
NRQAAO.BIN
NRXDAO.BIN
NRXEAO.BIN
NRXFAO.BIC
NSBCDO.BIN
NSBPCO.BIN
NSCPBO.BIN
NTSAAO.BIC

DMVll (M8053/M8064)(FALCON) MP TEST 1
DMVll (M8053/M8064)(F ALCON) MP TEST 2
DMVll (M8053/M8064)(FALCON) LU TEST 1
DMVll (M8053/M8064)(FALCON) LU TEST 2
DMVII (M8053/M8064) (F ALCON) LU TEST 3
DPVll (FALCON) FUNCTIONAL TEST
DRVll-B (FALCON) TEST (LOOP BACK CABLE)
DRVll-J (FALCON) TEST 1
DRVll-J (FALCON) TEST 2
DUVII (FALCON) OFFLINE LOGIC TEST
DUVII (FALCON) OFFLINE RECEIVER TEST
DUVll (FALCON) OFFLINE REC. TIMING TEST
DUV11 (FALCON) OFFLINE TRANSMITTER TEST
DUVll (FALCON) OFFLINE TIM/INTERR. TEST
DUVII (FALCON) OFFLINE COMBINED TEST
DLVll-E (FALCON) OFFLINE TEST
DLV11-F (FALCON) OFFLINE TEST
DZVll (FALCON) DIAGNOSTIC PART 1
DZV11 (FALCON) DIAGNOSTIC PART 2
DZV11 (FALCON) CABLE/ECHO TEST
IBVI1-A (FALCON) DIAGNOSTIC
DRV11 (FALCON) LOGIC TEST
LSI MOS/CORE MEMORY 0-124K EXER.
KMVll-A (FALCON) LINE CONTR. TEST
KMVll-A (FALCON) FIRMWARE TEST
KMVll-A/B (007500/007501) (FALCON) TEST
KMVII-B (FALCON) LINE CONTR. TEST
KXTlI-CA (M8377) BUS TEST
KWVll-A (FALCON) DIAGNOSTIC
*KXTll SBC 11121.11121 + CPU TEST
MXVll-A (FALCON) TEST
DEQNA (M7404) (FALCON) TEST
RLVll (FALCON) TEST 1
RLVll (FALCON) TEST 2
RLV11/RL01/02 (FALCON) TEST 1
RLVII/RLOl/02 (FALCON) TEST 2
*RLOI/02 DRIVE (FALCON) PERFORM.
RLOI/02 DRIVE (FALCON) COMPAT.
RQDXl (FALCON) EXERCISER
*RX02 (FALCON) PERFORMANCE TEST
RX02 (FALCON) FORMATTER
*RX02 (FALCON) FUNCTIONAL TEST
SBCI1121 + SYSTEM DIAGNOSTIC TEST 1
SBC11/21 + SYSTEM DIAGNOSTIC TEST 2
SBC11/21 + SYSTEM DIAGNOSTIC TEST 3
TSV05 (FALCON) FUNCTIONAL TEST 1

A-5

225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270

NTSBAO.BIC
NTSCAO.BIC
NTSDAO.BIC
NTSEAO.BIC
NTUUAO.BIN
OEEAAO.BIC
OEEBAO.BIC
OEECAO.BIC
OEEDAO.BIC
OEEEAO.BIC
OEEFAO.BIC
OEEGBO.BIC
OEEHAO.BIC
OKDAGO.BIC
OKDBAO.BIN
OKDDDO.BIN
OKTACO.BIC
QFPABO.BIC
QFPBBO.BIC
QFPCBO.BIC
QFPDBO.BIC
QFPEAO.BIC
QKDAEO.BIC
QKDBAO.BIC
QKDCAO.BIC
QKKAAO.BIC
QKTABO.BIC
QKUAAO.BIC
QKUBBO.--RDTACO.BIN
RIIABO.BIC
RLPABO.BIN
RLPBBO.BIN
RLPCAO.BIN
RLPDAO.BIN
RLPEAO.BIN
RLPFCO.BIN
RLPGCO.BIN
RLPHAO.BIN
RLPIAO.BIN
RLPJAO.BIN
RLPKCO.BIN
RLPLAO.BIC
RLPMBO.BIN
RLPNA1.BIC
TDHABO.MPG

TSV05 (FALCON) FUNCTIONAL TEST 2
TSV05 (FALCON) FUNCTIONAL TEST 3
TSV05 (FALCON) FUNCTIONAL TEST 4
TSV05 (FALCON) DATA RELIABILITY
*TU58 (FALCON) PERFORMANCE EXER
*KDJ11-B EEPROM UK ENGLISH LOADER
KDJ11-B EEPROM DUTCH LOADER'
KDJ11-B EEPROM FRENCH LOADER
KDJ11-B EEPROM GERMAN LOADER
KDJ II-B EEPROM IT ALlAN LOADER
KDJ II-B EEPROM SPANISH LOADER
KDJ II-B EEPROM SWEDISH LOADER
KDJlI-B EEPROM US ENGLISH LOADER
*KDJ11-B CPU BOARD (&CACHE.SLU) TEST
KDJll-B EA ROM BLASTER AND MAINT. UTIL.
*KDJlI-DA CLUSTER (BOARD) TEST
*11/84 (KDJlI-B) UNIBUS ADAPTER TEST
*11/60 FPll-E FLOATING POINT TEST I
*11/60 FPll-E FLOATING POINT TEST 2
*11/60 FPll-E FLOATING POINT TEST 3
*11/60 FPll-E FLOATING POINT TEST 4
*11/60 FPll-E FLOATING POINT TEST 5
*11/60 BASIC CPU TEST
*11/60 CPU TRAP TEST
*11/60 INSTRUCTION/SYSTEM EXER.
*11/60 CACHE TEST
*11/60 MEMORY MANAGEMENT TEST
11/60 WCS (WRITABLE CONTROL STORE)TEST
11/60 MICRODIAGNOSTIC -NOT ON DISKUNIBUS SWITCH DT07 PORT MODULE TEST
DIP11-A lIST (M8717) INTERPROCESSOR TEST
LPA-l1 SUBSYSTEM EXERCISER
LPA/ AAII-K ANALOG CIRCUITRY TEST
LPA/ ARll LOGIC TEST 1
LPA/ AR11 LOGIC TEST 2
LPA/ ARll LOGIC TEST 3
LPA/DRll-K INPUT OUTPUT LOGIC TEST
LPA/KWll-K DUAL REAL TIME CLOCK TEST
LPA/LPS DIAGNOSTIC TEST I
LPA/LPS DIAGNOSTIC TEST 2
LPA/LPS DIAGNOSTIC TEST 3
LPA/ ADll-K TEST (WITH/WITHOUT WRAPAR.)
LPA/DMCll (M8200-YC) DIAGNOSTIC TEST 1
LPA/DMCll (M8200-YC) DIAGNOSTIC TEST 2
LPA/IPBM (M8254) fIELD DIAGNOSTIC
DH 11 DEVICE ROUTINE FOR MPG

A-6

271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316

TD]ABO.MPG
TDLABO.MPG
TDOABO.MPG
TDUAAO.MPG
TLPABO.MPG
TMGACO.MPG
TMMABO.MPG
TMSAAO.MPG
TPCABO.MPG
TR3AAO.MPG
TR6AAO.MPG
TRI{ABO. MPG
TRPABO.MPG
TRSAAO.MPG
TTCABO.MPG
TTMABO.MPG
TVDABO.MPG
TCMPG .BIN
RI<MPG .BIN
TMMPG .BIN
THMPG .BIN
RXMPG .BIN
RBMPG .BIN
VAAAAI.BIC
VADACO.BIC
VAXABO.BIC
VCDABO.BIC
VCDBBO.BIC
VCDCBO.BIC
VCDDBO.BIC
VCLHCO.BIN
VCMAAO.BIC
VDHAEO.BIC
VDHBEO.BIC
VDHCEI.BIC
VDHECO.BIC
VDLABO.BIC
VDMACI.BIN
VDMBCO.BIN
VDMCCI.BIN
VDMDCO.BIN
VDMECO.BIN
VDPVCl.BIN
VDRACO.BIC
VDRBAO.BIN
VDRCCO.BIC

D]ll DEVICE ROUTINE fon MPG
DLII DEVICE ROUTINE fOR MPG
DOll DEVICE ROUTINE fOR MPG
DU II DEVICE ROUTINE fOR MPG
LPII/LSII DEVICE ROUTINE FOR MPG
MAINTENANCE PROGRAM GENERATOR
MEMORY MANAGEMENT fOR MPG
MINIMUM SUPPORT DEV ROUTINE
PCll/PRII DEVICE ROUTINE fOR MPG
RP02/03 DEVICE ROUTINE fOR MPG
RK06 DEVICE ROUTINE fOR MPG
Rims DEVICE ROUTINE FOR MPG
RP04/05/06 DEVICE ROUTINE fOR MPG
RS03/04 DEVICE ROUTINE FOR MPG
TC II DEVICE ROUTINE fOR MPG
TMll DEVICE ROUTINE FOR MPG
VALID DEVICE TABLES fOR MPG
TC II MPG MONITOR
RKll MPG MONITOR
TMII/TUIO MPG MONITOR
TM02lTU 16 MPG MONITOR
RXIl/RXOl MPG MONITOR
RP04/05/06 MPG MONITOR
AA~ll 4 CHANNEL D/A CONVERTER TEST
ADV II AID CONVERTER PERFORMANCE TEST
ADVll-CI AXVll-C AID CONVERTER TEST
MDE MICRO DEVEL. ENVIRONM. M8740 TEST
MDE STATE ANALYZER (M8741) TEST
MDE TARGET EMULATOR (M8742) TEST
MDE SYSTEM BUS DIAGNOSTIC
DPVll/DA/DB (M8020) DATA COM LINK TEST
CMOll-K CSS OPTION CARD RD DIAGN.
*DHVII (M3104) fUNCTIONAL TEST I
*DHVII (M3104) fUNCTIONAL TEST 2
*DHVII (M3104) fUNCTIONAL TEST 3
*DHVII (M3104) TEST ORION
*DLVII-] LOGIC TEST
*DMVII MICRO CONTR. STATIC TEST I
*DMVII (M8053 OR M8064) STATIC TEST 2
*DMVII LINE UNIT STATIC TEST I
*DMVII LINE UNIT STATIC TEST 2
*DMVII LINE UNIT STATIC TEST 3
*DPVII (M8020) fUNCTIONAL DIAGNOSTIC
DRVll-B DMA AND LOGIC TEST
DRVll-B (M7950) INTERPROCESSOR EXERCISER
DRVll-] (M8049) DIAGNOSTIC TEST I

A-7

317
31B
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362

VDRDBO.BIC
VDVADI.BIN
VDVCCl.BIN
VDZAD3.BIC
VDZBDO.BIC
VDZCB1.BIN
VDZDAO.BIN
VHQADO.BIN
VIBABO.BIC
VIBBA1.BIC
VKAACO.BIC
VKABBO.BIC
VKACCI.BIC
VKADCI.BIC
VKAEB2.BIC
VKAFEO.BIN
VKAHAI.BIC
VKAIBO.BIN
VKAJBO.BIN
VKALAl.BIC
VKDADO.BIN
VKDBAO.BIC
VKMABI.BIN
VKMBBI.BIN
VKMCAI.BIN
VKMEBI.BIN
VKMHAO.BIN
VKMJAO.BIN
VKPAAO.BIC
VKUAAO.BIN
VKWACO.BIC
VM8AFO.BIC
VMEMAO.BIC
VMJABO.BIC
VMNACl.BIC
VMNBBO.BIC
VMNCBI.BIC
VMNDAI.BIC
VMNEAI.BIC
VMNFCO.BIC
VMNGAO.BIC
VMRAAO.BIC
VMSACO.BIC
VMSBDO.BIC
VMXAAO.BIC
VMXBAO.BIN

DRVII-J (M8049) DIAGNOSTIC TEST 2
*DLVll-E OffLINE TEST
DLVll-f OffLINE TEST
*DZVI1IDZQll DIAGN. TEST I
*DZVII/DZQll DIAGN. TEST 2
*DZVII/DZQII CABLE/ECHO TEST
DZVII OVERLAY fOR INTERPROC. PROG.
DHVI1IDHQII CXAI6/CXY08 fUNCT. TEST
IBVII-A DIAGNOSTIC (ADDRESS 760150)
IBVII-A DIAGNOSTIC (ADDRESS 771420)
*11103 CPU BASIC INSTRUCTION TEST
*11103 CPU EIS INSTRUCTION TEST
'. *11/03 FIS INSTRUCTION TEST
*11/03 TRAP TEST
*DL V II WITH LSI TEST
DRVI1 LOGIC TEST
*LSI 4K SYSTEM (lNTERR.) EXER.
*11103 DIS (DIBOL INSTR. SET) TEST I
*11103 DIS (DIBOL INSTR. SET) TEST 2
*11103 (30K MEMORY & FIS) TRAP TEST
PDT 11/150 SYSTEM EXERCISER
PDT 11/130 SYSTEM EXERCISER
KMVll-A/B (M7500/M750I) LOGIC TEST
KMVll-A LINE CONTROLLER TEST
KMVll-A (FIRMWARE) FUNCTIONAL TEST
KMVll-B (M750l) LINE CONTR. TEST
KMVll-C LOGIC DIAGNOSTIC
KMVll-C (FIRMWARE) FUNTIONAL TEST
KPVll-A DIAGNOSTIC
KUVll (LSI WCS) DIAGNOSTIC
KWVll-A PROGR. REAL-TIME CLOCK TEST
*BDVll/KDFll BOOTSTRAP/ROM DIAGN. TEST
LSI NON-VOLATILE MEMORY(CORE.BBU -MOS)TEST
*MSVll-J (MIXED L-J-P) MEMORY DIAGNOSTIC
MINC-ll ANALOG/DIGITAL PERFORMANCE TEST
MINC-II DIGITAL-IN DIAGNOSTIC
MINC-II CLOCK TEST
MINC-ll DIGITAL/ANALOG TEST
MINC-II DIGITAL-OUT TEST
MINC-II STARTUP/SIZER DIAGN.
MINC-II CHAIN TERMINATOR PROGRAM
LSIlI UVPROM-RAM TEST
*0-4 MEGABYTE MEMORY EXER. (MIXED D.L.P)
*0-4 MEGABYTE MEMORY QUICK VERIFY
*MXVII-A LOGIC TEST (2 SLU .ROM.CLOCK.RAM)
*MXVII-B LOGIC TEST (2 SLU ,ROM,CLOCK.RAM)

A-8

*DEQNA NETWORK INTERCONNECT EXERCISER
PCS (PROCESS CONTROL SS) TEST
*RLV II CONTROLLER TEST
*RLVI2 OR RLVIl CONTROLLER TEST
*TSV05 SUBSYSTEM fUNCTIONAL TEST 1
*TSV05 SUBSYSTEM fUNCTIONAL TEST 2
*TSV05 SUBSYSTEM fUNCTIONAL TEST 3
*TSV05 SUBSYSTEM fUNCTIONAL TEST 4
*TSV05 DATA RELIABILITY TEST

373
374
375
376

VNIADO.BIC
VPCAHO.BIC
VRLACO.BIN
VRLBCO.BIC
VTSACO.BIC
VTSBEO.BIC
VTSCDO.BIC
VTSDEO.BIC
VTSEDO.BIC
,nrco K D I DJ,...
y y "~Ul • .LJ"''''
VVTAA1.BIN
VVTBAO.BIN
VVTCAO.BIN
WQAABO.BIN

377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407

XAAADO.OB)
XAABCO.OB)
XAACBO.OB)
XAAVAO.OB)
XADAEO.OB)
XADBBO.OB)
XADCBO.OB)
XADVAO.OB)
XAfAEO.OB)
XARACO.OB)
XBBABO.OB)
XBEACO.OB)
XBMCNO.OB)
XBMDEO.OB)
XBMEBO.OB)
XBMFBO.OB)
XBMGBO.OB)
XBMHBO.OB)
XBMIBO.OB)
XBTABO.OB)
XBTBBO.OB)
XBTCCO.OB)
XCBAEO.OB)
XCBBEO.OB)
XCBCFO.OB)
XCDAGO.OB]
XCIABO.OB)
XCMACO.OB)
XCM)BO.OB)
XCPAGO.OB)
XCPBKO.OB)

DEC-X M. AAll1VTOI-A EXER
DEC-X M. AAll-K SCOPE CONTR. EXER
DEC-X M. AAVll EXER
DEC-X M. AAV11-D EXER
DEC-X M. ADOI-D AID CONV. EXER
DEC-X M. ADll-K EXER
DEC-X M. ADVll EXER
DEC-X M. ADV11-D EXER
DEC-X M. AfCll CONVERTER EXER
DEC-X M. ARll AID CONVERTER EXER
DEC-X M. KITll-D EXER
DEC-X M. M7855 BUS-TESTER EXER
DEC-X M. DIVERS. BOOTSTRAP EXER
DEC-X M. BDVII ROMS EXER MODULE
DEC-X M. BM873-YF BOOTSTRAP EXER
DEC-X M. BM873- YH BOOTSTRAP EXER
DEC-X M. BM873- Y) BOOTSTRAP EXER
DEC-X M. M9312 BOOTSTRAP EXER
DEC-X M. M9301/M9311 BOOTSTRAP EXER
DEC-X M. BUS TESTER A EXER
DEC-X M. BUS TESTER B EXER
DEC-X M. Q22BE Q-BUS EXER
DEC-X M. CBll SCAN EXER
DEC-X M. CBIl DISTRIBUTE EXER
DEC-X M. CBII-HA EXER
DEC-X M. CDIl EXER
DEC-X M. CISP EXER
DEC-X M. CSS CMSllK EXER
DEC-X M. CMRII EXER
DEC-X M. PDPll CPU EXER
DEC-X M. CPU EIS EXER

363
364
365
366
367
368
369
370
371
'1'71)

vII.

"CO"
I I "TCOII
yt,Jw &&1
Ya,.I&&

I,...COC\
,,",,,utJI

"JKI"!"',..,.CTJ,...
"".I.~').,-,"& .. ,-,....,& • ....,

VTV30-)/H VT30-H LOGIC TEST
VTV30-)/H VT30-H DISPLAY TEST
VTV30- K LOG IC TEST
11 W03 LSI SYSTEM TEST

A-9

408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453

XCRAGO.OB)
XCSTAO.OBJ
XDCAGO.OBJ
XDFABO.OB)
XDHALO.OBJ
XDHUAO.OBJ
XDHVHO.OBJ
XDJALO.OBJ
XDLALO.OBJ
XDLBDO.OB)
XDMB)O.OBJ
XDMCCO.OB)
XDMDFO.OBJ
XDMECO.OB)
XDMRCO.OBJ
XDMSAO.OB)
XDNAHO.OB)
XDPAEO.OBJ
XDPBBO.OB)
XDPVCO.OB)
XDQAIO.OBJ
XDRADO.OB)
XDRBJO.OB)
XDRCIO.OBJ
XDRDCO.OBJ
XDRECO.OBJ
XDRFEO.OBj
XDR)CO.OB)
XDRKAO.OBJ
XDRQAO.OB)
XDRUAO.OBJ
XDRVBO.OBj
XDRWDO.OBj
XDTADO.OBJ
XDUAIO.OBJ
XDUBEO.OBJ
XDVABl.OB)
XDXAGO.OBJ
XDZAGO.OBJ
XDZBCO.OBJ
XDZMAO.OBJ
XFPAGO.OBJ
XFPBFO.OB)
XFPCAO.OBJ
XGTAEO.OB]
XIBADO.OBJ

DEC-X M. CRII EXER
DEC-X M. CAST CONTROL EXER
DEC-X M. DCll EXER
DEC-X M. DFAOl
DEC-X M. DHII 16 LINE EXER
DEC-X M. DHUll EXER
DEC-X M. DHVll EXER
DEC-X M. DJll EXER
DEC-X M. DLll-W/DLVll-J EXER
DEC-X M. DLll-E/DLVll-E EXER
DEC-X M. DMll-BB 16 LINE EXER
DEC-X M. DMC-ll EXER
DEC-X M. DMPII/DMV11 EXER
DEC-X M. DMPll/DMVll SLV
DEC-X M. DMR-ll EXER
DEC-X M. DMll-BA 9 LINE EXER
DEC-X M. DNll EXER
DEC-X M. DPII EXER
DEC-X M. DUPll EXER
DEC-X M. DPVll EXER
DEC-X M. 0011 EXER
DEC-X M. DRll-A EXER
DEC-X M. DRll-B EXER
DEC-X M. DRll-C EXER
DEC-X M. DRII-K EXER
DEC-X M. DRII-L EXER
DEC-X M. DRVll-B EXER
DEC-X M. DRVil-} EXER
DEC-X M. CSS DR70 EXER
DEC-X M. DRQ3B INTERFACE M7549
DEC-X-M. DRUll EXER
DEC-X M. DRVll-WA EXER
DEC-X M. DRll-W EXER
DEC- X M. DTE20 EXER
DEC-X M. DUll EXER
DEC-X M. UDA50/KDA50 EXER
DEC-X M. DVll EXER
DEC-X M. DXll EXER
DEC-X M. DZll EXER
DEC-X M. DZVll/DZQll EXER
DEC-X M. DZMll EXER
DEC-X M. FPll (11140.45) EXER
DEC-X M. fPlll AlBIC EXER
DEC-X M. CTRL BRIDGE EXER
DEC- X M. GT 40 EXER
DEC-X M. IBVII-A EXER

A-lO

454
455
456
457
458
459
460
461
462

XICADO.OBj
XICBCO.OBj
XIEAAO.OBJ
XIEBAO.OBj
XIECAO.OBJ
XKCTAO.OBJ
XKEADO.OBJ
XKGADO.OBJ
XKLAEO.OBj

463

XKMAAO.OBj

464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499

XKMCDO.OBj
XKMDBO.OBj
XKMKAO.OBj
XKMSAO.OBj
XKUABO.OBj
XKWAHO.OBj
XKWBLO.OBj
XKWCBO.OBj
XKWDBO.OBj
XKWEBO.OBj
XKWFBO.OBJ
XKWGBO.OBj
XLKABO.OBj
XLPAFO.OBj
XLPBFO.OBj
XLPCEO.OBj
XLPDFO.OBj
XLPEDO.OBj
XLPFBO.OBj
XLPHEO.OBj
XLPjBO.OBj
XMLAAO.OBj
XMNABO.OBj
XMNBBO.OBj
XMNCBO.OBj
XMNDBO.OBj
XMNEBO.OBj
XMRAAO.OBJ
XMRBAO.OBj
XNCADO.OBj
XNCBBO.OBj
XPAAFO.OBj
XPABGO.OBj
XPCCEO.OBj
XPCSCO.OBj
XPLACO.OBJ

DEC-X M. ICSll EXER
DEC-X M. ICRll EXER
DEC-X M. IEUll/IEQll EXER
DEC-X M. IECll-A EXER
DEC-X M. IECll-B EXER
DEC-X M. KCT32 EXER
DEC-X M. KEll EXER
DEC-X M. KGll EXER
DEC-X M. KLII EXER
DEC-X ivi. KiviCii-B EXEn
DEC-X M. KMCll EXER
DEC-X M. KMVII-A/B EXER
DEC-X M. KMVll-C EXER
DEC-X M. KMS11-K EXER
DEC-X M. KUVII-AA EXER
DEC-X M. KW11-L EXER
DEC-X M. KWll-P EXER
DEC-X M. KWII-W EXER
DEC-X M. KWII-K EXER
DEC-X M. KWVII-K EXER
DEC-X M. GROSS TMNG EXER
DEC-X M. KWll-C EXER
DEC-X M. LKll EXER
DEC-X M. LPll PRINTER EXER
DEC-X M. LPS-KW EXER
DEC-X M. LPSII/LPS-VC EXER
DEC-X M. LPS-AD.NP EXER
DEC-X M. LPDll EXER
DEC-X M. LP20 EXER
DEC-X M. LPAll-XX EXER
DEC-X M. LPVll EXER
DEC-X M. MLll EXER
DEC-X M. MNCAD (AID) EXER
DEC-X M. MNCDI EXER
DEC-X M. MNCKW EXER
DEC-X. M. MNCDA EXER
DEC-X M. MNCOO EXER
DEC-X M. M7765 MIRA MODULE EXER
DEC-X M. M7763 MIRA MODULE EXER
DEC-X M. NCll-A EXER
DEC-X M. NCVII-A EXER
DEC-X M. PA611 READER EXER
DEC-X M. PA611 PUNCH EXER
DEC-X M. PCll EXER
DEC-X M. PCSll 1/0 EXER
DEC-X M. PCL EXER

A-ll

500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545

XQNADO.OBJ
XRCADO.OBJ
XRCFCO.OBJ
XRFAGO.OBJ
XRHAAO.OBJ
XRKAGO.OB)
XRKBH1.0BJ
XRLAKO.OB)
XRMBCO.OBJ
XRMDBO.OB)
XRNABO.OB)
XRQAIO.OB)
XRXAEO.OB)
XRXBCO.OB)
XTAADO.OB)
XTCAGO.OB)
XTKACO.OB)
XTKBBO.OB)
XTMA)O.OB)
XTMBMO.OB)
XTMDBO.OB)
XTRADO.OB)
XTSACO.OB)
XTSVAO.OB)
XTUADO.OB)
XTUCBO.OB)
XUACBO.OB)
XUADBO.OBJ
XUDADO.OBJ
XVSACO.OBJ
XVSBBO.OB)
XVSCBO.OBJ
XVSVAO.OB)
XVTABO.OB)
XVTBBO.OBJ
XVTCBO.OBJ
XVTVBO.OBJ
XXYADO.OBJ
XXYBBO.OB)
ZAABAO.BIN
ZAACBO.BIC
ZAAFAO.BIN
ZAAVAO.BIN
ZADACO.BIN
ZADBBO.BIN
ZADFAO.BIN

DEC-X M. DEQNA EXER
DEC-X M. RCll EXER
DEC-X M. RC25 EXER
DEC-X M. RFll EXER
DEC-X M. CSS RHOl EXER
DEC-X M. RKll/RK05 EXER
DEC-X M. RK611 RK06/07 EXER
DEC-X M. RLll/RLVll/RLV12 EXER
DEC-X M. RM02/03 WITH RH11 EXER
DEC-X M. RP04/5/6 RM02/3 EXER
DEC-X M. RP07/RM02/3/5/80 EXER
DEC-X M. RQDXl/2/3 RUX50 EXER
DEC-X M. RX01 EXER
DEC-X M. RX02 EXER
DEC-X M. TAll EXER
DEC-X M. TCll EXER
DEC-X M. TK50 EXER
DEC-X M. TK25 EXER
DEC- X M. TM 11 EXER
DEC-X M. TM02l03 TU/TE16 EXER
DEC-X M. TM78 EXER
DEC-X M. TR79F EXER
DEC-X M. TS11/TS04/TU80 EXER
DEC-X M. TSV05 EXER
DEC-X M. TU58 EXER
DEC-X M. TU81 (E) EXER
DEC-X M. DEUNA EXER
DEC-X M. DELUA EXER
DEC-X M. UDC11 EXER
DEC-X M. VS60 EXER
DEC-X M. VSVOI EXER
DEC-X M. VSVll CSS EXER
DEC-X M. VSV21 EXER
DEC-X M. VT20 EXER
DEC-X M. DH 11 IVT20 EXER
DEC-X M. VTV30 CSS EXER
DEC-X M. VTV30H/J VT30H EXER
DEC-X M. XYll PLOTTER EXER
DEC-X M. CSS XY311 EXER
AA Il-A/B/C SCOPE CONTROL TEST
AAll-K ANALOG CIRCUITRY TEST
AAFOI-A WITH DRUll-C/DRll-C TEST
AAVll-D DRS LOGIC TEST
AD021 ADll DIAGNOSTIC
ADOI-D DIAGNOSTIC TEST
ADfll CONVERSION TEST

A-i2

546
547
548
549
550
551
552
553
554
555

556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591

ZADGAO.BIN
ZADHAO.BIN
ZADIAO.BIN
ZADJAO.BIN
ZADKAO.BIN
ZADLB3.BIC
ZADVAO.BIN
ZAFACO.BIC
ZARABO.BIC
ZARBBO.BiC
ZARCBI.BIC
ZBMAEO.BIC
ZBMBAO.BIN
ZBMCAO.BIN
ZBMDJO.BIC
ZBMHAO.BIC
ZBMKBO.BIC
ZCBACO.BIN
ZCBHBO.BIN
ZCDADO.BIN
ZCDBBO.BIN
ZCLKCO.BIN
ZCLMCO.BIN
ZCMBBI.BIN
ZCMJCO.BIN
ZCRACO.BIN
ZCRBCO.BIC
ZCTAAO.BIN
ZCTBAO.BIN
ZDAAAO.BIN
ZDABAO.BIN
·ZDAVAO.BIN
ZDCADO.BIN
ZDCBBO.BIN
ZDCLBO.BIC
ZDCOCO.BIN
ZDFACO.BIN
ZDf'BBO.BIN
ZDHADO.BIN
ZDHBCO.BIN
ZDHCCO.BIN
ZDHDDO.BIN
ZDHECO.BIN
ZDHFCO.BIN
ZDHGCO.BIN
ZDHHCO.BIN

ADFlI LOGIC DIAGNOSTIC TEST 1
ADFlI ANALOG TESTS 2
ADFlI EXERCISER FOR 1024 CANNEL
AD02 SPECIAL 1024 CH. LOGIC TEST
ADFlI MULTI CH. SAMPLE & HOLD TEST
ADII-K PERFORMANCE TEST
ADVII-D DRS LOGIC TEST
AFCII ANALOG MULTIPLEXER DIAGNOSTIC
ARll DIAGNOSTIC TEST I
Aiii i DiAGNOSTiC TEST :2
ARll DIAGNOSTIC TEST 3
BM792Y A-H/K/L BOOTSTRAP LOADER TEST
BM792- YB DIAGNOSTIC TEST
BM792- YC DIAGNOSTIC TEST
BM873 UNIVERSAL RESTART ROM TEST
BM792-YH BOOTSTRAP LOADER TEST
BM792- YK BOOTSTRAP LOADER TEST
CBll LOGIC TEST
CBll-HA (M7291) LOGIC TEST
CDll CARD READER DIAGNOSTIC
CDll/CD20 CARD READER DIAGNOSTIC
*DMRIl.DMCll DATA COMM. LINK TEST
*DMPll,DMVll DATA COMM. LINK TEST
CM II-F CARD READER DIAGNOSTIC TEST
CMRII (COMPACT MICRO REMOTE) TEST
CRll CARD READER TEST
CRll/CMll-F DIAGNOSTIC TEST
CTSll- IC WITH 8035/8045 (ASCD) TEST
CTSII- IC WITH 8035/8045 (HOLLO) TEST
DAll-F BUS WINDOW STATIC TEST
DAll-F BUS WINDOW EXERCISER
DAVII (CSS) INTERPROCESSOR EXERCISER
DCll (ASYNC. MODEM INTERF.) OFFLINE TEST
DCll (ASYNC. MODEM INTERF.) ONLINE TEST
*DUPll DATA COMM. LINK TEST
DC II OVERLAY FOR INTERPROC. TEST
DUll/DFCll & DPll/DFCll OFFLINE EXER
DF AOl FUNCTIONAL DIAGN.
*DHll STATIC LOGIC TEST
*DHll MEMORY TEST
*DH II TRANSM. RECEIVER LOGIC TEST
*DH II SPEED SELECTION LOGIC TEST
DHll CHARACTER LENGTH AND DATA TEST
DHll SINGLE LINE DATA TEST
DHll SINGLE LINE PARITY & MULTI L. DATA
DHll AUTO-ECHO TEST

A-13

592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637

ZDHIDO.BIN
ZDHJCO.BIC
ZDHKFO.BIN
ZDHLCO.BIN
ZDHMD2.BIC
ZDHNDO.BIC
ZDHUBO.BIN
ZDHVBO.BIN
ZDHWBO.BIN
ZDHXAI.BIN
ZDIAFO.BIC
ZDJBGO.BIC
ZDIDBO.BIN
ZDLAHO.BIN
ZDLBCO.BIN
ZDLCDO.BIN
ZDLDIO.BIN
ZDLODO.BIN
ZDMADO.BIN
ZDMBDO.BIC
ZDMCDO.BIN
ZDMED2.BIC
ZDMFC2.BIC
ZDMGDO.BIC
ZDMHCl.BIC
ZDMID3.BIC
ZDMOAO.BIN
ZDMPDO.BIC
ZDMQEO.BIC
ZDMRFO.BIC
ZDMSFO.BIC
ZDMTFO.BIC
ZDNADO.BIN
ZDPADO.BIN
ZDPBCO.BIC
ZDPCDO.BIC
ZDPDDO.BIN
ZDPECO.BIN
ZDPFBO.BIN
ZDPGBO.BIN
ZDPOCO.BIN
ZDQADO.BIC
ZDQBDO.BIC
ZDQCEO.BIC
ZDQDEO.BIC
ZDQEEO.BIC

DHll BREAK AND HALF-DUPLEX TEST
DHll ECHO / CABLE TEST
*DH11 MODEM CONTROL MULTIPLEXER TEST
DHII OVERLAY FOR INTERPROC. TEST
*DH II COMPREHENSIVE DIAG. TEST
*DH II DATA RELIABILITY TEST
*DHUll FUNCTIONAL VERIFIC. TEST 1
*DHUll FUNCTIONAL VERIFIC. TEST 2
*DHUll FUNCTIONAL VERIFIC. TEST 3
*DHUll FUNCTIONAL VERIFIC. TEST 4
DIll LOGIC TEST
D)l1 ON LINE/OFF LINE EXER.
DJll OVERLAY fOR INTERPROC. TEST
*DLII-E.C.D OFF LINE TEST
DLll-E ON LINE TEST
DLll-C.D E OFF LINE TEST
*DLll-W 1 11/44 MFM SLU TEST
DLII OVERLAY FOR INTERPROC. TEST
DMll (ASYNC. DATA MUX) LOGIC TEST
DMll (ASYNC. DATA MUX) DATA TEST
*DMCII (M8200- YA/YB)FUNCTIONAL TEST
*DMCll (M8201 OR M8202)LINE UNIT TEST I
*DMCII (M8201 OR M8202)LINE UNIT TEST 2
*DMCll-AR/AL ((M8200-YA/YB) CROM & JUMP TEST
*DMCll FREE RUNNING TEST
*DMRII FUNCTIONAL DIAGNOSTIC
DMCll OVERLAY FOR INTERPROC. TEST
*DMRll MICROPROC. M8200/04/07 TEST 1
*DMRll MICROPROC. M8200/04/07 TEST 2
*DMC/KMC/DMRll (M8203) LINE UNIT TEST 1
*DMC/KMC/DMRII (M8203) LINE UNIT TEST 2
DMP/DMVll MULTIDROP INTERF. TEST
DN II DIALEX STATIC AND ONLINE TEST
DPII EXERCISER
*DUPll OFF LINE DIAGN. TEST 1
*DUPll OFF LINE DIAGN. TEST 2
*DUPll DIAGNOSTIC TEST 3
*DUPll CONFIDENCE TEST
DUPII OVERLAY FOR INTERPROC. TEST
VT621DUPll DIAGNOSTIC
DPll OVERLAY fOR INTERPROC. TEST
00 II BASIC R/W TEST 1
DQ II BASIC R/W TEST 2
DQ 11 BASIC NPR AND INTERRUPT TEST
0011 RECEIVER TRANSMITTER EXER.
0011 MISC. RX AND TX TESTS

A-14

638
639
640
641
642
643
644
645
646

547
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683

ZDQFFO.BIC
ZDQGBO.BIC
ZDQHEO.BIC
ZDQOOO.BIN
ZDRBIO.BIN
ZDRCHI.BIC
ZDRDAO.BIN
ZDREAO.BIN
ZDRFAO.BIN
ZDRGEO.BIC
ZDRHAI.BIN
ZDRIBO.BIC
ZDRKBO.BIN
ZDRLDO.BIC
ZDRMAO.BIN
ZDRQAO.BIN
ZDRUAO.BIN
ZDRVCO.BIN
ZDTABO.BIC
ZDUAEO.BIC
ZDUBDO.BIC
ZDUCOO.BIC
ZDUDDO.BIC
ZDUEDO.BIC
ZDUFDO.BIC
ZDUOBO.BIN
ZDUQCI.BIN
ZDURBl.BIC
ZDUSBl.BIC
ZDUTBl.BIC
ZDUUBI.BIC
ZDUVBl.BIC
ZDVACO.BIC
ZDVBCO.BIC
ZDVCDO.BIC
ZDVDDI.BIC
ZDVECl.BIC
ZDVFAO.BIC
ZDVOBO.BIC
ZDVZAO.BIN
ZDXAD3.BIC
ZDXDAO.BIN
ZDXEAO.BIN
ZDXFDO.BIN
ZDXGCO.BIN
ZDXHDO.BIC

DQII CHARACTER DETECT TESTS
DQll STARTER PROG. (BUILD A PARAM.)
0011 CHARACTER LENGTH AND INTERR. TEST
DOll OVERLAY FOR INTERPROC. TEST
*DRII-B/DAII-B NPR LOGIC TEST
*DRll-C LOGIC TEST (MAITEN. CABLE)
DRll-A DUAL INTERFACE MASTER TEST
DRll-A DUAL INTERFACE SLAVE TEST
DRll-A DUAL INTERFACE EXERCISER

,nf'!'''''

nIH
TrC:T
Ii 'P-TT ,...lilH r \
AJ"'. & 1_1T
&
a . . . . .....,"'-'1.&'"
... .a...u.& 1M
, .... &1. a..a..... .... ",A a.U&4LII

DRll-L/M EXER (WITH MAl NT. CABLE)
DRll-A LOGIC TEST (MAINT. CABLE)
DRll-W INTERPROC. EXER (2 COMPUTER)
DRII-W NPR TEST IN DRII-W AND B MODE
DR70 MASSBUS CHANNEL INTERF. DIAG.
DRQ3B PARALLEL DMA 110 MOD. FUNCT. T
DRUll-C/DRQll-C PROCESSOR LINK TEST
DRVll-WA DMA INTERFACE TEST
DTII DIAGNOSTIC
DU II OFF LINE LOGIC TEST
DU II OFF LINE RECEIVER TEST
DUll OFF LINE RECEIVER TIMING TEST
DU II OFF LINE TRANSMITTER TEST
DUll OFF LINE TIMING AND INTERR. TEST
DU II OFF LINE MULTI DU II EXERCISER
DU 11 OVERLAY FOR INTERPROC: TEST
DUVll OFF LINE LOGIC TEST
DUVll OFF LINE RECEIVER TEST
DUVll OFF LINE RECEIVER TIMING TESTS
DUVII OFF LINE TRANSMITTER TESTS
DUVII OFF LINE TIMING & INTERR.TEST
DUVll OFF LINE MULTIPLE DUVll EXER.
DVll BASIC REGISTER R/W TEST
DVll STATIC LINE CARDS TEST
DVl1 ROM TEST PART I
DVll ROM TEST PART 2
DVll MODEM CONTROL AND CABLE TEST
. DVll ASYNCHRONOUS LINE CARDS TEST
DVll OVERLAY FOR INTERPROC. TEST
DVll 16 LINE SYNCHR. MULTI TEST
DXll-B (DEC-IBM INTERF.) TEST 1
DXll-B I 2848 DIAGNOSTIC
DXll FRIEND
DXll-B (DEC-IBM INTERF.) TEST 2
DXll-B OFF LINE DIAGN. EXER.
DXll-B ONLINE MAINTEN. CABLE EXER.

A-IS

684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729

ZDXICO.BIC
ZDX)CO.BIC
ZDXKAO.BIN
ZDZAIO.BIN
ZDZBCO.BIN
ZDZCBO.BIN
ZDZGAO.BIN
ZDZHAO.BIN
ZfLACO.BIN
ZFPAAO.BIC
ZFPBAO.BIC
ZfPCAO.BIC
ZfPDAO.BIC
ZGSAAO.BIN
ZGSBAO.BIN
ZICADO.BIN
ZIDVAO:BIN
ZIEACO.BIN
ZIEBAO.BIN
ZIECAO.BIN
ZIRAAO.BIN
ZIRBAl.BIN
ZITADO.BIN
ZIXVBO.BIN
ZKAQHO.BIC
ZKARBO.BIC
ZKCAAO.BIC
ZKCCAl.BIC
ZKCDAO.BIC
ZKCEBO.BIC
ZKCFBO.BIC
ZKCGAO.BIC
ZKCHAO.BIC
ZKCIBO.BIN
ZKCTAO.BIN
ZKDAAO.BIN
ZKDJB2.BIC
ZKDKBO.BIC
ZKDLBO.BIC
ZKDMBO.BIC
ZKEBBO.BIC
ZKECAO.BIN
ZKEDAO.BIC
ZKEECO.BIC
ZKGABO.BIC
ZKHABO.BIC

DXll-B RESPONDER PROGRAM
DXII-B OFFLINE MEMORY ADDRESSING TEST
DXll-B ON LINE OS EXER.
*DZII ASYNC. LINE MUX TEST
DZll OVERLAY FOR INTERPROC. TEST
VT62 1 DZll DIAGNOSTIC TEST
GS03 / DZ II LOG IC TEST
DZMll FUNCTIONAL TEST
FLOA TING ADDRESS/VECTOR UTILITY
VAX FRONT END PROC. BRIDGE LOG.TEST
VAX FRONT END PROC. BRIDGE LINK TEST
110 PAGE ADDRESS FINDER
PROM CHECKSUM CALCULATOR/CHECKER
GS03-WD LINE SWITCH CONTROLED BY DZQl1
GS03-WD LINE SWITCH CONTROLED BY DHVll
ICSll CONTROLLER TEST
IDVll-D (CSS) FIVE CHANNEL COUNTER TEST
IEU/IEQII (CSS) FUNCTIONAL TEST
IECII-A (CSS) IEC-BUS CONTR. TEST
IECll-B WITH IECll-A (CSS) TEST
ICRll (M8094.M8098.M8096) TEST
ICRll (lNDUSTR. CONTR. REMOTE) TEST
INTERPROCESSOR TEST PROGRAM (lTEP)
IDV/IAVll FUNCTIONAL TEST
PDPll (11/35.40.45.34 ... )POWER FAIL TEST
PDP II TRAP TEST
*KMCll MICRO-PROC. (M8204) TEST
*KMC II MICRO-PROC. READ/WRITE TEST
*KMCII MICRO-PROC. JUMP, CRAM TEST
KMCII DDCMP LINE UNIT (M8201/8202) TEST
KMC II BITSTUFF LINE UNIT R/W TEST
KMCll MICRO-PROC. FREE RUNNING TEST
ISBll-A SERIAL BUS EXERCISER
RMT DIAGNOSTIC EXERCISER
KCT32 DIAGNOSTC
BBI-D DMA INTERFACE DIAGN.
*KDJll-A BASIC INSTR. SET.EIS & TRAP TEST
*KD1l1-A MEMORY MANAGEMENT DIAGNOSTIC
*KDJlI-A FLOATING POINT DIAGN.
*KDJlI-A CACHE MEMORY DIAGNOSTIC
EAE II LOGIC TEST
EAEll RANDOM EXERCISER
KEII-B DIAGNOSTC PACKAGE
*CIS (COMMERCIAl. INSTR. SET) PROC. TEST
KGll-A CRC (CYCLIC REDUNDANCY CHECK) TEST
KlTlI-H (UNIBUS INPUT/OUTP.) TEST

A-16

730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775

ZKLAEO.BIC
ZKMAFO.BIC
ZKMBAO.BIN
ZKMCAO.BIN
ZKMDAO.BIN
ZKMEAO.BIN
ZKMFAO.BIN
ZKMGAO.BIN
ZKMOAO.BIN
ZKMSAO.BIN
ZKMUAO.BIN
ZKMVAO.BIN
ZKTCAO.BIN
ZKUAEO.BIN
ZKUBCO.BIN
ZKVABO.BIN
ZKVBBO.BIN
ZKVCAO.BIN
ZKWAGO.BIC
ZKWBJl.BIC
ZKWCC2.BIN
ZKWKA2.BIC
ZKWLAO.BIN
ZKXABO.BIN
ZKXCAO.BIN
ZLABAl.BIC
ZLACFO.BIN
ZLADDO.BIN
ZLAEBO.BIN
ZLAFAl.BIN
ZLAIBO.~IN

ZLCACO.BIN
ZLCPAO.BIN
ZLDIAO.BIN
ZLKAAO.BIN
ZLNADO.BIN
ZLPABl.BIN
ZLPBBO.BIN
ZLPCCO.BIC
ZLPDCO.BIC
ZLPmO.BIC
ZLPJBO.BIN
ZLPKHO.BIN
ZLPLGO.BIN
ZLQPBO.BIN
ZLSABO.BIC

KLlI I DLll-A TELETYPE TEST
*PDPll 0-124K MOS OR CORE MEMORY TEST
*KMCll-B (M8206) STATIC TEST 1
*KMCll-B (M8206) STATIC TEST 2
KMCll-DMSll-DA LINE UNIT STAT. TEST
KMCll-DMSll-DA LINE UNIT DYNAM. TEST
KMSll-BD-DMll-BA (MODEM CONTR.) TEST
OM II-BA MODEM CONTROL TEST
KMCll OVERLAY FOR INTERPROC. TEST
KMSll-BD/BE (DDCMP) DATA COM.L1NK TEST
KMSll-BL/BM (DDCMP) DATA COM.L1NK TEST
KMSI1-K FUNCTIONAL (CPU & LU MOD) TEST
KXTlI-CA SINGLE BOARD COMPo DIAG.
UNIBUS SYSTEM EXER (WITH M7855) DIAGN.
M7855 MODULE TEST PROGRAM
VT71 KEYBOARD DIAGNOSTIC
VT71 CONTROL & VIDEO TEST
VT71 TERMINAL DIAGNOSTIC
KWll-L LINE FREQUENCY CLOCK TEST
*KWll-P PROGRAMABLE REAL TIME CLOCK TEST
KWll-W WATCH DOG TIMER TEST
KWll-K LOGIC TEST
KW ll-C LOGIC TEST
*KXJll-CA DIAGNOSTIC
KXJlI-CA DIAGNOSTIC (Q-BUS)
LA30 TERMINAL TEST
LA36 TERMINAL TEST ON DL 11 OR KLll
LA36 TERMINAL TEST ON DHll OR DJll
LA180 PRINTER DIAGNOSTIC
*LA36 0-48 TERMINAL) ON DLlI/DLVll
LA34/LA38 ON DZll FUNCTIONAL TEST
LCll/LA30 TERMINAL TEST
LCPOI (CSS) COLOR PRINTER DIAGNOSTIC
*DECSA (DEC ETHER. COM. SERV.) REPAIR T
LKll·A PUSH BUTTON MODULE TEST
*LNOI LASER PRINTER DIAGNOSTIC
*LPI1/LPOI PRINTER DIAGNOSTIC
LPCll INTERFACE DIAGNOSTIC TEST
LPSll (LAB. PERIPHERAL SYS.) TEST 1
LPSll (LAB. PERIPHERAL SYS.) TEST 2
LPSll DRA OPTION I/O TEST
LPDll INTERFACE DIAG. TEST
*LP05/LPll/LPI4 LINE PRINTER TEST
*LP25/LP26/LP27/LP07 LINE PRINTER TEST
LQPSE-F ON DZll.DLll-W.DLVll-F/J TEST
*LSll CENTRONICS PRINTER TEST

A·17

176
177
178
179
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
B04
805
806
807
808

B09
810
811
812
813

B14
B15
BlS

B17
BIB
B19
B20

B21

ZLVABO.BIC
ZLXACO.BIN
ZM9AEO.BIC
ZM9BEO.BIN
ZMDSAO.BIN
ZMLADO.BIN
ZMLBBO.BIN
ZMLCBO.BIN
ZMMJAO.BIC
ZMMLCO.BIC
ZMRAAO.BIC
ZMSDDO.BIN
ZMSPCO.BIN
ZNCACl.BIC
ZNCBCO.BIN
ZNCCCO.BIN
ZNCDBO.BIN
ZNIAAO.--ZNWAAO.BIN
ZPAACO.BIN
ZPABAO.BIN
ZPCAEO.BIN
ZPLACO.BIN
ZPLBCO.BIN
ZPMACO.BIN
ZPRBAO.BIN
ZQBBAO.BIN
ZQKBHO.BIC
ZQKCFO.BIC
ZQMABl.BIN
ZQMBHO.BIN
ZQMCHO.BIC
ZQNAID.BIN
ZR6ADO.BIN
ZR6BDO.BIN
ZRSCED.BIN
ZRSDDO.BIN
ZR6ECO.BIN
ZRSGCO.BIC
ZR6HFO.BIC
ZRSIFO.BIC
ZRSJFO.BIN
ZRSKGO.BIN
ZRSLDO.BIN
ZRSMEl.BIC
ZRSNE3.BIC

LVll PRINTER PLOTTER (LVOI-AX/BX)TEST
LXYll/LXY21 OR LXVll DIAGNOSTIC
M9301. M9400 BOOTSTRAP MODULE TEST
*M9312 I 11/44 UBI BOOT MODULE TEST
llMDS-A CUS TEST
MLll SOLID STATE DISK LOGIC TEST
MLll SOLID STATE DISK PERFORMANCE EXER
MLll SOLID STATE DISK MAINT. PROGRAM
PDPll MEMORY TEST 8K SPECIAL
*MFl1S-K MEMORY DIAGNOSTIC
MIRA DUAL MICRO 11/83 OR 11/83 TEST
*MS11-L/M MEMORY DIAGNOSTIC
*MSll-L/M/P MOS MEMORY DIAGNOSTIC
NCll-A LOGIC (GAMMA CAMERA INTERF.) T
NCll-A GAMMA 11 EXERCISER
NCVl1 LOGIC TEST
NCVll PERFORMANCE EXERCISER
DEUNA RSX NI EXERCISER
NW11 MATCHOOG DIAGNOSTIC
TYP-1l RDR/PUNCH DIAGNOSTC
MULTI READER/PUNCHER EXERCISER
PC11 READER PUNCHER TEST
PCL 11 (PARALLEL COM. LINK) EXERCISER
PCLll STAND ALONE TEST
PDM-70 DIAGNOSTIC TEST
PRSOI TOGGLE IN TEST PROGRAM
M9312 ROM BLASTER UTILITY
PDP11 4K SYSTEM EXERCISER (O-2BKW) (old)
*PDP11 F AMIL Y INSTRUCTION EXERCISER
PDPll MEMORY 110 EXERCISER
0-128K MEMORY EXERCISER (OLD)
*PDP11 MEMORY TEST (O-124KW)
*DEQNA (ETHERNET) fUNCTIONAL TEST
*RK611 DISKLESS CONTROLLER TEST 1
*RKS11 DISKLESS CONTROLLER TEST 2
*RK611 DISKLESS CONTROLLER TEST 3
*RKSll DISKLESS CONTROLLER TEST 4
*RKS11 DISKLESS CONTROLLER TEST 5
*RKSll/RKOS/07 DUAL PORT DIAGNOSTIC
*RK06/07 DISK DRIVE DIAGNOSTIC TEST 1
*RKOS/07 DISK DRIVE DIAGNOSTIC TEST 2
*RKOS/07 DISK DRIVE DIAGNOSTIC TEST 3
*RKSll FUNCTIONAL CONTROLLER TEST
*RK06/07 fORMATTER PROGRAM
*RKOS/07 DYNAMIC TEST PART 1
*RKOS/07 DYNAMIC TEST PART 2

A-IS

822
823
824
825
82S
827
828
829
830
831
832
833
834
835
83S
837
838
839
840
841
842
843
844
845
84S
847
848
849
850
851
852
853
854
855
85S
857
858
859
860
8S1
8S2
863
8S4
865
866
867

ZRSPDO.BIN
ZRSQCO.BIN
ZRSRCl.BIN
ZRCABO.BIC
ZRCBBO.BIC
ZRCCBO.BIC
ZRCDBO.BIN
ZRCFCO.BIN
ZRCHBO.BIN
ZRFABO.BIC
ZRFBBI.BIC
ZRFCBO.BIC
ZRHBFO.BIC
ZRJADO.BIC
ZRJBDO.BIC
ZRJCBO.BIC
ZRJDEO.BIC
ZRJEDO.BIN
ZRJFAO.BIN
ZRJGEO.BIC
ZRJHEO.BIC
ZRJIDO.BIC
ZRJJDO.BIC
ZRJKBO.BIC
ZRJLBO.BIC
ZRJMBO.BIC
ZRJNAO.BIC
ZR)OBO.BIC
ZRKHGO.BIC
ZRKIFO.BIN
ZRKJEO.BIC
ZRKKF2.BIC
ZRKLEO.BIC
ZRLGEO.BIC
ZRLHBl.BIC
ZRLIDl.BIN
ZRLJCO.BIC
ZRLKB3.BIC
ZRLLCl.BIN
ZRLMBI.BIN
ZRLNCO.BIC
ZRMLBl.BIC
ZRMMB2.BIC
ZRMNBl.BIC
ZRMOBI.BIC
ZRMPB3.BIC

*RKOS/07 PERFORMANCE EXERCISER
*RKOS/07 COMPATIBILITY TEST
*RKOS/07 USER DEFINED TEST
RCll (RSS4) FIXED HEAD DISK STATIC TEST
RCll (RS64) FIXED HEAD DISK DATA TEST
RCII MULTI DISK EXERCISER
*RC25 DISK DRIVE FUNCTIONAL EXER
*RC25 DISK DRIVE BASIC FUNCTIONAL TEST
*RC25 DISK PACK FORMATTER
RFll FIXED HEAD DISK STATIC TEST
RFll FIXED HEAD DISK DATA TEST
RFII FIXED HEAD DISK MULTI DISK TEST
RHII MASSBUS 1/0 CONTROLLER TEST
*RP04/05/0S MECANICAL AND READ/WRITE TEST
*RP04/05/0S FORMATTER PROGRAM
*RP04/05/0S HEAD ALIGNMENT PROGRAM
*RP04/05/0S MULTI-DRIVE LOGIC TEST
*RP04/05/0S DUAL-PORT LOGIC TEST PART I
*RP04/05/0S DUAL-PORT LOGIC TEST PART 2
*RP04/05/0S DISKLESS TEST PART I
*RP04/05/0S DISKLESS TEST PART 2
*RP04/05/0S FUNCTIONAL CONTROLLER TEST 1
*RP04/05/0S FUNCTIONAL CONTROLLER TEST 2
*RP07 HDA FORMATTER I SCANER UTILITY
*RP07 FUNCTIONAL TEST
*RP07 FRONT-END (CONTROLLER) ISOLATOR TEST
*RP07 DUAL PORT TEST
*RP07 PERFORMANCE EXERCISER
*RKll/RK05-J/F PERFORMANCE EXERCISER
*RKII/RK05-J/F UTILITY PROGRAMS
*RKll/RK05-JlF BASIC LOGIC TEST I
*RKll/RK05-J/F BASIC LOGIC TEST 2
*RKll/RK05-J/F DINAMIC TEST
*RLll/RLVll CONTROLLER TEST 1
*RLlI/RLVll CONTROLLER TEST 2
*RLOl/02 DRIVE TEST I
*RLOI/02 DRIVE TEST 2 (SEEK TEST)
*RLOl/02 PERFORMANCE EXERCISER
*RLOl/02 COMPATIBILITY TEST PROGRAM
*RLOI/02 BAD SECTOR FILE UTILITY
*RLOl/02 DRIVE TEST 3 (SEEK/READ/WRITE TEST)
*RM02/03/05 DISK PACK FORMATIER
*RM02/03/05 SUBSYSTEM FUNCTIONAL TEST 1
*RM02/03/05 SUBSYSTEM FUNCTIONAL TEST 2
·*RM02/03/05 SUBSYSTEM FUNCTIONAL TEST 3
*RM02/03/05 DISKLESS CONTR. DIAG. PART I

A-19

868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891 '
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913

ZRMQB1.BIC
ZRMRBO.BIN
ZRMSBO.BIN
ZRMTBO.BIN
ZRMUB1.BIC
ZRMVBl.BIC
ZRNAAO.BIC
ZRNBAO.BIC
ZRNCAO.BIC
ZRNDAO.BIC
ZRNEAO.BIC
ZRNfAO.BIC
ZRNGAO.BIC
ZRNHAO.BIC
ZRNIAO.BIC
ZRNJBO.BIC
ZRP1CO.BIC
ZRP2BO.BIN
ZRPAD1.BIN
ZRPBEO.BIN
ZRPCDO.BIC
ZRPDBO.BIN
ZRPEAO.BIN
ZRPfBO.BIC
ZRPGBO.BIC
ZRPHAO.BIN
ZRPWCO.BIC
ZRPYD1.BIC
ZRPZCO.BIC
ZRQAHO.BIC
ZRQBCl.BIN
ZRQCfO.BIC
ZRQDAO.BIN
ZRQEBO.BIC
ZRQfCO.BIC
ZRQGAO.BIN
ZRSBHO.BIN
ZRSCGO.BIC
ZRSDCO.BIN
ZRSECO.BIN
ZRTACO.BIN
ZRXAfO.BIC
ZRXBfO.BIC
ZRXCAO.BIN
ZRXDCO.BIC
ZRXEA2.BIC

*RM02l03/05 DISKLESS CONTR. DIAG. PART 2
*RM02l03/05 DUAL PORT TEST 1
*RM02l03/05 DUAL PORT TEST 2
*RM02l03/05 DRIVE COMPATIBILITY TEST
*RM02l03/05 PERfORMANCE EXERCISER
*RM02/03/05 EXTENDED DRIVE TEST
*RM80 PERfORMANCE EXERCISER
*RM80 DISKLESS TEST 1
*RM80 DISKLESS TEST 2
*RM80 fUNCTIONAL TEST 1
*RM80 fUNCTIONAL TEST 2
*RM80 fUNCTIONAL TEST 3
*RM80 fUNCTIONAL TEST 4
*RM80 DUAL PORT TEST 1
*RM80 DUAL PORT TEST 2
*RM80 HDA fORMATTER UTILITY
RPll-E/RP02l03 MULTI DRIVE EXER.
RPll-E/RP02l03 DISK PACK fORMATTER
RPll-C/RP03 DISKLESS DIAGNOSTIC
PRll-C/RP03 DATA RELIABILITY TEST
RPII-C/RP02l03 MULTI DRIVE DIAGN.
RPll-C/RP03 DISK PACK fORMATTER
RPll IRP02 DISKLESS DIAGNOSTIC
RPll IRP02 DATA RELIABILITY TEST
RPII IRP02 MULTI DRIVE DIAGNOSTIC
RPll IRP02 DISK PACK fORMATTER
RPII-E IRP02/03 DISKLESS LOGIC TEST
RPll-E IRP02l3 fUNCT. LOGIC R/W TEST
RP11-E IRP02l3 POSITIONING TEST
*RQDX1/2/3 IRX50 RUX50/RD51/52 EXER.
*RQDXI12 /RD51/52 fORMATTER
*RQDX3/RD31 151/521 53/54/RX33 fORMATTER
*RQDX1/2/3 DUP EXERCISER
RQDX3 RD51/52153/54. RX50. RX33 EXER.
*RQDX3 RX33 HIGH DENSITY fLOPPY fORMATTER
RQDX1/2/3 UTILITY. CONTROLLER/DRIVE INfO.
*RHll RS03/04 BASIC fUNCTION DIAGNOSTIC
*RHII RS03/04 DATA RELIABILITY TEST
*RHll RS04 MAINTENANCE MODE DIAGNOSTIC
RHll RS03 MAINTENANCE MODE DIAGNOSTIC
RTOllRT02 TERMINAL TEST
*RX11/RXOl SYSTEM RELIABILITY TEST
*RXll INTERfACE (M7846) DIAGNOSTIC
RXII/RXVII/RXV211/RXV21 RX02 UTIL. DRIVER
*RX02 (up to 4 drives) SUBSYS. PERfORM. EXER.
*RX02 DISKETTE fORMATTER (sing./double chang.)

A-20

914
915
916
917
918
919
920
921
922

ZRXFBO.BIC
ZTAACO.BIN
ZTABCO.BIN
ZTACCO.BIN
ZTADDO.BIN
ZTAECO.BIC
ZTAFCO.BIN
ZTAHAO.BIN
ZTCAAO.BIC

923

ZTCBEO.BIC

924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959

ZTCCAO.BIC
ZTCDCO.BIC
ZTCEOO.BIC
ZTEAEO.BIN
ZTEBCO.BIN
ZTEC~O.BIN

ZTEDEO.BIN
ZTEEEO.BIN
ZTEFBO.BIN
ZTKAEO.BIN
ZTKBCO.BIN
ZTKEBO.BIC
ZTKFAO.BIC
ZTKGAO.BIC
ZTKHBO.BIN
ZTKIBO.BIN
ZTMAIO.BIC
ZTMBGO.BIN
ZTMCOO.BIC
ZTMDEO.BIN
ZTMEEO.BIC
ZTMFFI.BIC
ZTMGCO.BIN
ZTMHFl.BIC
ZTMICO.BIN
ZTRACO.BIC
ZTRBOO.BIC
ZTSAAO.BIC
ZTSBAO.BIC
ZTSCAO.BIC
ZTSDAO.BIC
ZTSEBO.BIC
ZTSFDO.BIC
ZTSGBO.BIN
ZTSHOO.BIN
ZTSICO.BIN

*RX02 FUNCTIONAL LOGIC TEST
*TAII CASSETTE BASIC LOGIC TEST I
TAll CASSETTE BASIC LOGIC TEST 2
TAll CASSETTE MANUAL INTERVENTION TEST
TAll CASSETTE MOTION TEST
T A II CASSETTE DATA RELIABILITY TEST
TAll CASSETTE ABSOLUTE LOADER
TAll CASSETTE COPY PROGRAM
*TC 11 BASIC LOGIC TEST 1

'V"

.... ,.. l '

'b II ~I''''

Dn~'v

.. ,...,.,"".,,.. 'J:.~'

LVU'v

TrC""r

n
,£

TC II BASIC LOGIC TEST 3
TC II READ AND WRITE ALL
TC II DEC TAPE EXERCISER
*TM03-TEI6/TU77 CONTROL LOGIC TEST I
*TM03-TEI6/TU77 CONTROL LOGIC TEST 2
*TM03-TEI6/TU77 BASIC FUNCTION TEST
*TM03-TE16/TU77 DATA RELIABILITY TEST
*TM03-TEI6/TU77 DRIVE FUNCTION TIMER
TM02l03-TUI6/TEI6/TU77 UTILITY DRIVER
*TK50/TK70 FRONT END FUNCTION TEST
*TK50/TK70 DATA RELIABILITY TEST
*TK25 FRONT END FUNCTION TEST 1
*TK25 FRONT END FUNCTION TEST 2
*TK25 FRONT END FUNCTION TEST 3
*TK25 FRONT END FUNCTION TEST 4
*TK25 DATA RELIABILITY TEST
*TMll/TMAll/TMBll TS03/TUIO BASIC TEST
*TMll/TUIO DATA RELIABILITY TEST 9TRK
*TMll/TUIO DATA RELIABILITY TEST 7TRK
*TMll/TUIO DRIVE FUNCTION TIMER
*TMAll/TMBll/TUlO DRIVE FUNCTION TIMER
*TMAll/TMBll/TUIO SUPPLEMENT INSTR. TEST
TMAll/TMBll/TUIO UTILITY DRIVER
*TMll/TMAll/TMBll/TS03/TUlO MULTIDR. DATA
TM78 CONTROLER/LOG IC TEST
TR79F TAPE DIAGNOSTIC
TR79F UTILITY PROGRAM
*TSU05 DIAGNOSTIC PART I
*TSU05 DIAGNOSTIC PART 2
*TSU05 DIAGNOSTIC PART 3
*TSU05 DIAGNOSTIC PART 4
*TS03 DRIVE FUNCTION TIMER
*TS03 SUPPLEMENTAL TEST
TS03 UTILITY DRIVER
*TS 11 ITS04 DATA RELIABILITY TEST
*TSll/TS04 CONTROL LOGIC TEST

A-21

960
961
962
963
964
965
988
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005

ZTUIAO.BIN
ZTU2DO.BIN
ZTUAJO.BIN
ZTUBHO.BIN
ZTUCGO.BIN
ZTUDDO,BIN
ZTUEDO.BIN
ZTUFAO.BIN
ZTUGCl.BIC
ZTUIAO.BIN
ZTUIAO.BIN
ZTUKAO.BIN
ZTULAO.BIN
ZTUMAO.BIN
ZTUNAO.BIN
ZTUOBO.BIC
ZTUPBO.BIC
ZTU9BO.BIC
ZTURBO.BIC
ZTUSBO.BIN
ZTUTAO.BIN
ZTUUFO.BIN
ZTUVBO.BIN
ZTUWAO.BIC
ZTUXAO.BIC
ZTUYAO.BIC
ZTUZAO.BIC
ZUAABO.BIN
ZUABCO.BIC
ZUACDO.BIN
ZUADBl.BIC
ZUDADO.BIN
ZUDBBO.BIC
ZUDHAl.BIC
ZUDIAO.BIC
ZUDICO.BIC
ZUDKCO.BIN
ZUDLAO.BIN
ZUDMAO.BIN
ZUFlEO.BIN
ZUF2EO.BIN
ZUF3AO.BIN
ZUF4AO.BIN
ZURCDO.BIN
ZUTKEO.BIN
ZVSABO.BIC

*TU81 DATA RELIABILITY TEST
*TU81 FRONT END FUNCTION TEST
*TM02lTU16/TE161 RELIABILITY TEST
*TM02lTU16/TE16/TU77 BASIC FUNCTION TEST
*TM02/TU16 CONTROL LOGIC TEST
*TM02/TU16 DRIVE FUNCTION TIMER TEST
TM02/TU18 UTILITY DRIVER
DATA ON PAPER TAPE CREATE PROGRAM
*TM02lTE16 DRIVE FUNCTION TIMER
*TM02lTU45 DATA RELIABILITY TEST
*TM02/TU45 BASIC FUNCTION TEST
*TM02lTU45 CONTROL LOGIC TEST
*TM02lTU45 DRIVE FUNCTION TIMER TEST
TM02lTU45 UTILITY DRIVER
TM02lTU45 DATA TP CRT
*TM03/TU45 CONTROL LOGIC TEST PART 1
*TM03/TU45 CONTROL LOGIC TEST PART 2
*TM03/TU45 BASIC FUNCTION TEST
*TM03/TU 45 DATA RELIABILITY TEST
*TM03/TU45 DRIVE FUNCTION TIMER TEST
TM03/TU45 UTILITY DRIVER
*TU58 PERFORMANCE EXERCISER
*TU80 DATA RELIABILITY TEST
*TU80 FRONT END DIAGNOSTIC PART 1
*TU80 FRONT END DIAGNOSTIC PART 2
*TU80 FRONT END DIAGNOSTIC PART 3
*TU80 FRONT END DIAGNOSTIC PART 4
*DEUNA (M7792/M7793) REPAIR LEVEL DIAGN.
*DEUNA (M7792/M7793) FUNCTIONAL DIAGN.
*DEUNA (M77921M7793) NI EXERCISER
*DELUA FUNCTIONAL DIAGNOSTIC
UDCII SYSTEM FUNCTIONAL EXERCISER
UDCll CONTROL TEST
*UDA50/KDA50/RAxx BASIC SUBSYSTEM DIAGN.
·UDA50/KDA50/RAxx DISK EXERCISER
*UDA50/KDA50/RAxx SUBSYSTEM EXERCISER
*UDA50/KDA50/RAxx FORMATTER
*UDA50/KDA50/RAxx HDA (BAD BLOCKS) SCRUBBER
UDA/KDA ERROR LOG UTILITY
MICRO-II USER TEST # 1
MICRO-ll USER TEST 112
MICRO-II USER TEST 113
MICRO-II USER TEST 114
MICRO-ii RC25 USER TEST
MICRO-il TK25 USER TEST
VS60 INSTRUCTION TEST PART 1

A-22

100S
1007
1008
1009
1010
1011
1012
1013
1014
1015
lOIS
1017
1018
1019
1020
1021
1022
1023
1024
1025
102S
1027

ZVSBBO.BIC
ZVSCCO.BIC
ZVSDCO.BIC
ZVSEAO.BIC
ZVSFAO.BIC
ZVSVAO.BIN
ZVSWBO.BIN
ZVTAAO.BIC
ZVTBDO.BIC
ZVTCFO.BIN
ZVTDBl.BIC
ZVTEBO.BIN
ZVTGAO.BIN
ZVTHCO.BIC
ZVTJBO.BIN
ZVTKAO.BIN
ZVTLAO.BIN
ZVTMAO.BIN
ZVTNAO.BIC
ZVTOAO.BIC
ZVTVAO.BIN
ZVTZAO.BIN

VSSO INSTRUCTION TEST PART 2
VS60 INSTRUCTION TEST PART 3
VSSO VISUAL DISPLAY TEST
VSVOI DIAGNOSTIC TEST
VS60 VISUAL WITH X-Y PONT CORRELATION
VSVll/VSll COLOUR LOOKUP OPTION TEST
VSV21 DIAGNOSTC TEST
VT36 DIAGNOSTIC PART 2
VT05 TERMINAL DISPLAY TEST
VT50A.B.H/52 TERMINAL ACCEPTANCE TEST
VT55 ACCEPTANCE TEST
VT20 HOST COMPUTER PROGRAM
DHll/VT20 HOST COMPUTER PROGRAM
DL 11 I VTSI EXERCISER
Djll/VT61 EXERCISER
VT INPUT LINE LOOPBACK PROGRAM
VTSI-T/V71-T MULTI LINE LOOP TEST
VTSI ACCEPTANCE TEST
VTl05 ACCEPTANCE TEST
M7142 CRT CONTROL LOGIC. ASCII ACCEPT. TEST
VTV31-K VIDEO INTERFACE DIAGNOSTIC (CSS)
VT36 DIAGNOSTIC PART 3

* = OPERATING DESCRIPTION IN THIS BOOK

A-23