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Document:	VAX-11/780 System Maintenance Guide
Order Number:	EK-11780-PG
Revision:	001
Pages:	410
Original Filename:

OCR Text

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EK-117

VAX-11/780

SYSTEM MAINTENANCE GUIDE

First Edition, December 1978

The material in this manual is for informational purposes and
is subject to change without notice.

Digital Equipment Corporation assumes no responsibility for

any errors which may appear in this manual.

Printed in U.S.A.

The following are trademarks of Digital Equipment Corporation,
Maynard, Massachusetts:

DIGITAL
DEC
PDP
DECUS
UNIBUS

DECsystem-10
DECSYSTEM-20
DIBOL
EDUSYSTEM
VAX
VMS

5/81-14

MASSBUS
OMNIBUS
0s/8
RSTS
RSX
IAS

CONTENTS

SECTION 2

Y
—
L W

Introduction

VAX-11/780 Hardware Manuals
VAX-11/780 Peripheral Manuals
VAX-11/780 Software Documentation

M
H W

INTRODUCTION

[ENL

SECTION 1

ARCHITECTURE

Data Types

2-2

Summary of Addressing Modes
Special Register Usage

2-5

VAX-11 Instruction Set by Opcode

2-6

2-3

VAX-11 Instruction Operand Specifier Notation
VAX-11 Instruction Set

Branch Conditions

2-8

2-26

VAX-11/780 Processor Register Addresses

2-27

VAX-11/780 Processor Register Bit Configurations

2-28

System Control Block

2-36

Process Control Block

2-38

Protection Codes

2-39

Interrupt Priority Requests

2-40

Exception Conditions

2-41

Virtual and Physical Address Relationship
Virtual and Physical Address Space

2-42

2-43

Page Table Formats and Page Table Entry Format

2-44

Example of Page Frame Allocation (Relocation)

2-45

Virtual and Physical Address Formats

2-46

Virtual Pages Mapped to Physical Space

2-47

System Virtual to Physical Address Translation
Scheme

2-48

Example

2-49

System Virtual to Physical Address Translation,
Process Virtual to Physical Address Translation
Scheme

2-50

CONTENTS (Continued)
Process Virtual to Physical Address Translation,

Example

2-51

Address Calculation for a TB Hit During a Miss

Microtrap

2-52

Address Calculation for a TB Miss During a Miss

Microtrap

SECTION3

2-b3

HARDWARE BLOCK DIAGRAMS AND
REGISTER BIT CONFIGURATIONS

VAX-11/780 General Block Diagram

3-2

CPU Block Diagram

3-3

Data Path Block Diagram

3-4

Instruction Decode Block Diagram

3-5

Instruction Buffer Block Diagram

3-6

PROM Control Store (PCS) Block Diagram

3-7

Writable Control Store (WCS) Block Diagram

3-8

SBI Control Low Bits (SBL) Block Diagram

3-9

SBI Control High Bits (SBH) Block Diagram

3-10

Cache Data Matrix Block Diagram

3-11

Cache Address Matrix Block Diagram

3-12

Translation Buffer Data Matrix Block Diagram

3-13

Translation Buffer Address Matrix Block Diagram

3-14

Clock Module Block Diagram

3-15

Microsequencer Block Diagram

3-16

Floating-Point Accelerator Block Diagram

3-17

Console Subsystem Configuration

3-18

Console Interface Board Block Diagram

3-19

ID Bus Map

3-20

ID Bus Register Bit Configurations

3-26

QBus Signal Description

3-60

QBus Registers (lower)
QBus Registers (upper)

3-53
3-64

SBI Configuration

3-bb

SBI Parity Field Configuration

3-56

CONTENTS (Continued)
SBI Field Description

3-57

SBI 1/O Register Addressing

3-59

SBI Information Transfer Formats

3-60

SBI Faults

3-61

SBI Signals, Backplane Pins

3-62

Memory Block Diagram, Part 1

3-63

Memory Block Diagram, Part 2

3-64

Memory 1/O Data Logic

3-65

Memory Configuration Register A

3-66

Memory Configuration Register B

3-67

Memory Configuration Register C

3-68

UBA (DW780) Block Diagram

3-69

UBA Address Space and C/A Format

3-70

SBI to Unibus Control Address Translation

3-71

Unibus to SBI Address Translation

3-72

Simplified Flow of Major Control Functions within
the UBA

3-73

UBA Registers

3-74

UBA Configuration Register, Bit Configuration

3-74

UBA Control Register, Bit Configuration

3-74

UBA Status Register, Bit Configuration

3-75

UBA Diagnostic Control Register, Bit

Configuration

3-75

UBA Failed Map Entry Register, Bit

Configuration

3-76

UBA Failed Unibus Address Register, Bit

Configuration

3-76

UBA Buffer Selection Verification Register,
Bit Configuration

3-76

UBA BR Receive Vector Register, Bit

Configuration

3-77

UBA Data Path Register, Bit Configuration

3-77

UBA Map Register, Bit Configuration

3-77

Unibus Configuration

3-78

Unibus Signal Description

3-79

CONTENTS (Continued)
Standard and Modified Unibus Pin Assignments

3-81

Addresses and Vectors for Unibus Devices

3-83

RK611 Register Contents

3-83

DZ11 Register Contents

3-86

MBA (RH780) Block Diagram

3-87

MBA Register Address Offsets

3-89

MBA Registers

3-90

MBA Configuration/Status Register, Bit
Configuration

3-90

MBA Control Register, Bit Configuration
MBA Status Register, Bit Configuration
MBA Virtual Address Register, Bit

3-90

Configuration

3-91

MBA Byte Counter Register, Bit Configuration
MBA Diagnostic Register, Bit Configuration

3-92

3-91

3-92

MBA Map Register, Bit Configuration
Massbus Disk Drive Register Address Calculation

3-92

Chart

3-93

RP0O5/RP06 Register Contents

3-94

RMO3 Register Contents

3-95

TMOS3 Register Contents

3-96

Massbus Signal Cable Pin Assignments

3-98

SECTION4

CONFIGURATION/JUMPERS
4-2

Module Utilization Chart

IKA780 TR, SYS.ID Register Jumpers
KA780 WCS Jumpers

4-4

MS780 Configuration for REV H Backpanel

4-5

Memory Array Addresses

Memory Syndrome Bit Decoding Chart
DW780 (UBA) Backpanel Jumper Configuration
RH780 (MBA) Backpanel Jumper Configuration

4-7
4-8

KD11-F Module Jumper Configuration

4-10

MSV-11B Module Jumper Configuration

4-11

CONTENTS (Continued)
M9400-YE Cable Connections
DLV11 Jumper Configuration
DLV 11-E Jumper Configuration

SECTION5

4-12

4-13
4-14

MICROPROCESSOR

Control Store Field Map

Microcode Routines which Support Console

Software, Starting Addresses

5-3

Microtrap Vectors
How to Read the Microcode

5-6

Microcode Branch Enable Functions

b-7

VAX-11/780 Microcode, Control ROM Field
Definitions
VAX-11/780 Microcode, Memory Control Functions

5-10

FPA Control ROM Field Definitions

5-44

VAX-11/780 System Microcode Macros

SECTION6

5-18

5-19

TROUBLESHOOTING TOOLS/
DIAGNOSTICS

Console Help File
Console Abbreviation Rules

6-5

Console-Remote Access Help File
Microdebugger Help File
Error Message Help File
V Bus Channel Configuration

6-7

6-10

6-13

V Bus Directory

6-14

Booting

6-26

LLogout

6-27

Double Error Halt

6-29

Explanation of Version Numbers for Console

VAX-11/780 Microcode Machine Check Error

Microdiagnostics Run, Console Terminal Output

Vii

6-30

CONTENTS (Continued)
Load and Run Stand-Alone Macrodiagnostics

(off-line)

6-31

Load and Run Macrodiagnostics Under VMS

(on-line)

6-32

Microdiagnostic Monitor Commands

6-33

Microdiagnostic Pseudo Instruction

6-40

Microdiagnostics Control ROM Field Definitions

6-52

Diagnostic Supervisor Commands

6-94

SECTION7

SYSTEM OPERATION

VMS Boot Procedure

7-2

Use of Filex to Transfer Diagnostic Files

7-5

Terminal Function Keys

7-7

Commands for Terminal Communication and
Control

7-8

Commands for File Manipulation

7-9

Commands for Device Handling

7-11

Commands for Program Development and Control

7-12

Commands for Command Procedures and Batch

Jobs

7-14

UETP Operating Instruction Summary

7-16

Printing the Error Log File

7-20

SECTION8

CONVERSION TABLES AND
INTEGRATED CIRCUIT DIAGRAMS

Hex Adder

8-2

Hex Subtracter

8-3

Hex/Decimal Conversion

8-4

Hex/Octal Conversion
Octal/Decimal Conversion

8-6

Hexadecimal/ASCII Conversion

8-7

25510 Four Bit Shifter Chip with Tristate Output

8-8

26S10 Bus Transceiver Chip

8-9

viii

CONTENTS (Continued)
74L.S181 ALU Chip

8-10

74182 Look Ahead Carry Chip

8-11

74L.S670 4 X 4 Register File Chip

8-12

82523, 825123 256 Bit Bipolar PROM Chip
85568 64 Bit Edge Triggered D Type Register File

8-13

Chip with Tristate Outputs

8-14

DEC 8646 4 Bit Tristate Backplane Interconnect

Transceiver Chip

93406 1024 Bit ROM Chip
9403 FIFO Buffer Chip
DC101 Arbitrator Chip

DCO03 Interrupt Chip
DCO004 Protocol Chip

DCO05 Transceiver Chip

8-15

8-16
8-17

8-18

8-21
8-22

8-23

SECTION 1
INTRODUCTION

INTRODUCTION

This

handbook
is
troubleshooting,

designed
as
a
single
source
summary
of
maintenance,
operating,
and
programming
information
on
the
VAX-11/780
computer
system.
The
materials
provided
complement
the
detailed
information
available
in
the
hardware
and
software manual
sets,
the
print
sets,
and
program
listings. The handbook will serve as a quick reference for Digital
field service, manufacturing, training, and engineering personnel.
The
materials
included
consist
of
tables,
lists,
1listings,
diagrams,
and
procedures.
This
format
assumes
that
readers
are
familiar
with
the
VAX-11/780
system
and
its
nomenclature
and
mnemonics,
For

explanations

these

materials

and

VAX-11/780

items
Hard

copy manuals

Digital
444

Equipment

Whitney

Northboro,
Attn:

further

can

ordered

details

Library

from:

Corporation

Street
MA

01532

Printing

Customer

For

for

system,
see the VAX-11/780 Microfiche
listed in the following three tables.

and Circulation
Services Section

information

concerning

Services

microfiche

Digital Equipment Corporation
Micropublishing Group
Crosby Drive
Bedford, MA

(NR2/M15)

libraries,

contact:

the

and

the

VAX-11/780 HARDWARE MANUALS

Control Number

Form

EK-PS780-TD-001

Fiche

EK-SI980-IN-001

Hard

copy

User's Guide

EK-DS780-UG-001

Hard

copy

DS780 Diagnostic System
Technical Description

EK-DS780-TD-001

Fiche

EK-FP780-TD-001

Fiche

Technical Documentation

EK-REP06-TD-001

Fiche

VAX-11/780 Central Processor
Technical Description

EK-KA780-TD-001

Fiche

VAX-11/780 Memory System
Technical Description

EK-MS780-TD-001

Fiche

DW780 Unibus Adaptor
Technical Description

EK-DW780-TD-001

Fiche

KC780 Console Interface
Technical Description

EK-KC780-TD-001

Fiche

VAX-11/780 Software Handbook

EB08126

Hard

copy

VAX-11/780 Architecture Handbook

EB07466

Hard

copy

Document Title
VAX-11/780

Power

System

Technical Description

VAX-11/780 System Installation

Manual

DS780 Diagnostic System

FP780 Floating Point Processor
Technical Description

REPO5/REP06 Subsystem

VAX-11/780 PERIPHERAL MANUALS

Document

Title

Control

LA35/LA35 DECwriter
User's Manual
VT-52

Form

II
EK-LA3635-0P-002

Hard

copy

EK-VT52-MM-001

Hard

copy

EK-RM03-UG-001

Hard

copy

67-01/51.20-01

Hard

copy

EK-OTE16-TM-001

Hard

copy

DECscope

Maintenance
RM03

Number

Disk

User's

Manual

Subsystem

Manual

RPO5/RP06 DEC Disk Storage
Drive Technical Manual

TE1S5/TE1O0W/TE10N
Transport

DECTAPE

Maintenance

Manual

RX8/RX11l Floppy Disk
Maintenance Manual
LSI-11,

PDP-11/03

User's

LP11/LS11/LAl1ll
User's Manual

Line

CR11/CM11

Reader

Card

Manual

DEC

Printer

Peripherals

Hard

copy

Hard

copy

EK-LPI11-0P-001

Hard

copy

EK-CR11-TM-004

Hard

copy

EK-LA180-MM-002

Hard

copy

EB05961

Hard

copy

System

Maintenance

Manual

PDP-11

EK-RX01-MM-002
EK-LSI11-TM-003

Printer

Manual

LA180

ER-0012

Handbook

VAX-11/780 SOFTWARE DOCUMENTATION

VOLUME

System

Reference

DOCUMENT TITLE

DEC ORDER NUMBER

VAX/VMS Primer

AA-DO30A-TE

VAX/VMS Summary
Description

AA-DO022A-TE

VAX/VMS Information

AA-DO16A-TE

VAX/VMS Release

AA-DO15A-TE

Directory

Notes

VAX-11

Software

AA-DO021A-TE

VAX/VMS

System

AA-DO18A-TE

Installation Guide
Services

Reference

Manual

System

VAX/VMS Command
Language User's

Reference

Guide

VOLUME

VAX-11]

AA-DO023A-TE

AA-DO19A-TE

Linker

Reference Manual

VAX-11 Symbolic
Debugger Reference

AA-DO026A-TE

VAX-11/RSX-11M
Programmer's
Reference Manual

AA-DO020A-TE

VAX-11/RSX-11M
User's Guide

AA-DO20A-TE

Manual
VOLUME

System

Reference

VAX-11

AA-DO32A-TE

MACRO

Language

Reference

Manual
VAX-11

MACRO

AA-DO33A-TE

vAX-11]

Common

AA-DO036A-TE

User's Guide

VOLUME

System

Procedures

Run-time Procedure
Library Reference
Manual

VAX-11 Test Editing
Reference Manual

1-6

AA-DO29A-TE

VAX-11/780 SOFTWARE DOCUMENTATION

VOLUME

VAX/VMS

Operator's

AA-DO25A-TE

Guide

System

Procedures

VAX/VMS System
Manager's Guide

AA-D927A-TE

VAX/VMS

AA-DO17A-TE

System

Messages and Recovery
Procedures Manual

VAX/VMS UETP
User's Guide
VAX-11]

Disk

AA-D643A-TE

Save

and Compress
Guide
VOLUME

VAX /VMS

1/0

VAX/VMS
Guide

I/0

AA-D739A-TE

User's

AA-DO28A-TE

Introduction to
VAX-11 Record
Management Services

AA-DO028A-TE

VAX-11

AA-DO31A-TE

Record

Management
Reference
VAX-11

Services
Manual

Record

AA-D781A-TE

Management Services
User's Guide

RMS-11/

IAS/RXS-11M RMS-11
MACRO Programmer's

SORT

Reference

VOLUME

AA-0002A-TC

Manual

Introduction

AA-0001A-TC

RMS-11
RSX-11M

RMS-11

Utilities
Guide
PDP-11

AA-DO83A-TC

User's

SORT

AA-3341C-TC

Reference Manual
VOLUME

VAX-11

FORTRAN

Optional

IV-PLUS

Software

Reference

AA-DO34A-TE

Language

Manual

FORTRAN

VAX-11

FORTRAN

IV-PLUS

IV-PLUS
Guide

User's

1-7

AA-DO35A-TE

VAX-11/780 SOFTWARE DOCUMENTATION

VOLUME

PDP-11

FORTRAN

Language
Manual

FORTRAN

FORTRAN
Language Reference
Manual Update
Notice No. 1
PDP-11

DEC-11-LFLRA-C-D

Reference

Optional
Software

IAS-RSX-11

FORTRAN

DEC-11-LFLRA-C-DN1

DEC-11-LMFUA-D-D

IV User's Guide
VOLUME

Optional
Software

PDP-11

AA-1749D-TC

COBOL

Language

Reference

Manual
PDP-11

COBOL

User's

Guide

PDP-11

COBOL

AA-1757C-TC

COBOL

Pocket

AA-1750C-TC

Guide
VOLUME

BASIC

AA-0153A-TK

PLUS-2

Language
Manual

Reference

BASIC

PLUS -2

VOLUME

Optional

AA-0157A-TC

PLUS-2

RSX-11M/IAS
Guide

User's

AA-D902A-TE

DECnet-VAX

System Manager's
Guide

Software

AA-DO901A-TE

DECnet-VAX
DECnet

VOLUME

User's

Guide

User's

Guide

AA-C742A-TC

Optional

DATATRIEVE-AA

Software
DATATRIEVE

1-8

SECTION 2
ARCHITECTURE

NOILOVYHS

SR ]
(75
()]

NOISID3Hd SL1910

IVYWID3a NIAIS A1ILVYWIXOHddY

IVIWI93A NIILXIS ATILVIXOHddY

ONILVOTd

S1I8¥9 | ONILVO14 318N00

S118 ZE

2-2

eGmrersss et

'TVHIANID YIALSIOIHYDNISIHUAVY

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L PSS9 TZE 0

n - = = < e >= o L < @] (@] cc L %] 7 = O = o (@] w n

2-3

j‘AAaSwpapssuoTjTeeiaagqsearirakeelwpbell3asooapslouoiiTSsorsdqebeAsrpoTolespaxdtmsaSai0as1iaH®aapsIeoB9uddoujp20uuitu1ennrspnqPRoiIlsb1sTiu0Roip3Adsuusrebxtesruasapiupsparopiweapip1ess3Tp3neosewi3bayopxousuwesseaseq193s1ba1
ds

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oaP£S0Z1QTTTT18q6 p2aapp9s9Iaiui3aj31nooxkeo1oeAyMmq1NmmqIarbabp3oujuaS99ajsoaowAaqATgptTpeT33T3IeRRadEIATTA®T93T®231a131IeETT[®®11 T_I_sMssqgad9auasiaiuaisppesspipaeplyeie$s__pp1#uM1g9poeepf As As As As Ks Aj As Ks 1

WYHYDHOHUd YILNNOD DNIS HYA Y
SUMMARY OF ADDRESSING MODES

¢oTqexapul

a -

2-4

Xxn NN
E
O

[

SPECIAL REGISTER USAGE

Conventional Software
Register

Hardware Use

Use

Results of POLY,CRC;
length counter in

character & decimal

Results of functions, status
of services (not saved or
restored on procedure call)

Result of POLYD; address
counter in character &
decimal instructions

Result of functions (not
saved or restored on
_procedure call)

instructions

Length counter

any

character & decimal
instructions
R3,

Address counter 1in
character & decimal

any

instructions
R6-R11

None

any

(R12)

Argument pointer saved &
loaded by CALL, restored

Argument pointer

(R13)

frame pointer saved &
loaded by CALL, used &
restored by RET

(R14)

Stack

(R15)

Program

(base

address of argument list)

S
T S

by RET

Frame pointer;
signalling

Stack pointer

pointer

Program counter

counter

2-5

condition

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VAX-11 INSTRUCTION SET BY OPCODE

2-6

VAX-11 INSTRUCTION OPERAND SPECIFIER NOTATION

OPERAND

SPECIFIERS

ARE

SPECIFIED

<NAME>.<ACCESS

NAME
THE

---

SUGGESTIVE

THE

FOLLOWING

TYPE><DATA

NAME

FOR

MANNER:

TYPE>

OPERAND

THE

CONTEXT

INSTRUCTION

ACCESS

TYPE

---

LETTER

DENOTING

OPERAND

SPECIFIER

ACCESS

TYPE:
A

CALCULATE

THE

OPERAND.

ADDRESS

THE

ACTUAL

== B

OPERAND.

CALCULATION

<DATA

REFERENCE.

OPERAND

GIVEN

SIZE

OPERAND

READ,

THIS

NOT

READ

OPERAND

DATA

TYPE

DOUBLE

- FLOATING
l

BYTE

QUAD

- WORD

THE

SPECIFIED

LONGWORD

CONTEXT

WHICH

ADDRESS

SPECIFIER

DISPLACEMENT

POTENTIALLY

MODIFIED

MEMORY

IS A BRANCH
IS GIVEN BY

AND

WRITTEN.

OPERATION.

ONLY.
ONLY.

LETTER

DENOTING

THE

DATA

TYPE

THE
.

LONG

TYPE>.

OPERAND
BRANCH

INDIVISIBLE

WRITE

OPERAND:

ADDRESS

RETURNED

INSTRUCTION

DISPLACEMENT.
<DATA TYPE>.
M

EFFECTIVE

FLOATING

WORD

2-7

VAX-11 INSTRUCTION SET

2-8

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NOILIANOD SIA0D

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VAX-11 INSTRUCTION SET

o~ <

VAX-11 INSTRUCTION SET

2-10

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NOILIANOD SdA0D

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VAX-11 INSTRUCTION SET

&N = 1

VAX-11 INSTRUCTION SET

INIWIOY1dSIa

2-12

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NOILIANOD S3Q0D

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VAX-11 INSTRUCTION SET

(QINDISN

2-13

VAX-11 INSTRUCTION SET

1NsId

2-14

> < X D == = 72, - o - Q - = = 70/ LLI -

3qdLyNISIUd

LNSId

1NSId

LNSId

3LDO8Nu9YsD

NNIITTIOOUUSS ‘‘MMYY ‘‘94VYY°°HHAAgAYYOOdYSS N‘IMTYL/INSEATL‘SMAY

, z

$NO3IL0IANOD

2-15

VAX-11 INSTRUCTION SET

LNSIQ

LNSIa

1NSI3

2-16

LNSIa

NITHAIA‘M¥° NHAVIHATIAA9V'AIQMY
‘pL ddOWMdYy-d°NIIATNOIYSLXddaXdTvddILsI-N‘W9vANNVYILJZYIdHISgIyLNI

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NOILIANOD S3IAO0D

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VAX-11 INSTRUCTION SET

T(4=0>YIA)Q T(AJ0—=¥I)A>Q A(T30=¥1)AIQ <A(T40=¥>)HIAQ

N 1 M~

(TA40=—¥1)A>Id {TAJ0=—¥I)A>Q

aLdAdIozlvd ELA€qFNAVuMIYA3oIMdA0

VAX-11 INSTRUCTION SET

2-18

VE 201TNITIdLEI0VD0‘1MYHI‘LaOv*VTHHVAYHVDYLda0

NOILIANOD S3A0D

ZNIT10YS‘MY*Z¥AVvOHSgV 0 0=04 0 0

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VAX-11 INSTRUCTION SET

J2QF€ILWNAO6ITIEWOWD ZYQHMALWNAOW€ITMAWOD ¥YWJ€IOdLSOASIHDWO0aIdwY

2-19

o0°T‘=M>T1D]uLsdYa

VAX-11 INSTRUCTION SET

0 0 0=9NIY¥LS &Ssd 0>9NIY¥LS 1Lsa

2-20

OM°Lsa ‘Oy-ous

OS3JFIVINAH4O0ATWY

(NOHILVIYNLSOIA=NAJTLSTA) baIdAN€oOvWd daIOAvLOnWd ‘HNAg9yTMv°OYTHIS°d HdTJFDAIOLIVANYVLTIHZOUASNVHWDL

0L QAOW IAOKW 4740 0

SNO3ILqIAONDO

VAX-11 INSTRUCTION SET

SNO3ILdIA0NDO

2-21

SNO3ILAI0NOD

J4dL6 dAYVHSNd HSNd S3AIUMAQVY J0 4qL7X980 d

GL AX10d FLVNIVAZTVIWONATIOd37€4N0d

‘qy-oyy‘Md-3Iyod¥avigl"Y 0>04 0=04 ONILVO1dOTJAYIAO 0M

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T‘3NsI1H03L 1‘N38I7H0L3

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VAX-11 INSTRUCTION SET

~<o

0v-ous

Ho 1Yn0d

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NOILIANOD SEA0D

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VAX-11 INSTRUCTION SET

2-23

VAX-11 INSTRUCTION SET

‘MY NITIIA ‘49v¥-HAAVEns ‘My°NITENS

2-24

La344d§ 0a4o8ds3a =««« dJdg33IIIAAAYY¥IIISSSIITIYYY OOOLLL 03d40dA0 »0 ¥D ¥x0 ¥0 +

NOILIANOD Sd 0D

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VAX-11 INSTRUCTION SET

2-25

BRANCH CONDITIONS

OPCODE

CONDITIONS

BGTR

Nor

BLEQ

N or 2 =1

BNEQ

BNEQU

z =0

BEQL

BEQLU

BGEQ

=20

BLSS

BGTRU

Cor

BLEQU

Cor Z =1

BVC

V=20

BVS

v =1

BGEQU

BCC

=20

BLSSU

BCS

2-26

=20

VAX-11/780 PROCESSOR REGISTER ADDRESSES

HEX

DEC

KSP

Kernel

ESP

Executive

stack

pointer

SSP

Supervisor

stack

usp

User

pointer

ISP

Interrupt

05
06
07

5
6
7

reserved
reserved
reserved

POBR

base

POLR

length

P1BR

base

PILR

length

System

stack

pointer

stack

pointer

0cC

SBR

SLR

OE
OF

14
15

reserved
reserved

System base

PCBB

Process

11
12

17
18

SCBB
IPL

System control block base
Interrupt priority level

length

control

ASTR

AST

14
15

20
21

SIRR
SISR

Software
Software

level

reserved

block

base

interrupt
interrupt

request
summary

reserved

ICCS

Interval

NICR

ICR

Interval

1B
1C

27
28

TODR
reserved

Time

1D
1E

29
30

reserved
reserved

1F
20
21
22

31
32
33
34

reserved
RXCS
RXDB
TXCS

23
24

35
36

TXDB
reserved

25
26
27

37
38
39

reserved
reserved
reserved

ACCS

Accelerator

control/status

29
2A
2B

41
42
43

ACCR
reserved
reserved

Accelerator

reserved

clock

interval
of

count

day

control/status

count

Console
Console
Console

receive control/status
receive data buffer
transmit control/status

Console

transmit

data

buffer

WCSA

Writable

control

store

address

WCSD

Writable

control

store

2E
2F
30
31
32

46
47

reserved
reserved

data

48
49
50

SBIFS
SBIS
SBISC

SBIMT

SBI

fault/status

SBI

silo

SBI
SBI

silo comparator
maintenance

SBIER

SBI

error

SBITA

SBI

SBIQC

SBI

timeout address
quadword clear

RO
WO

37
38

reserved

MME

39
3A

57
58

TBIA

Memory management enable
Translation buffer invalidate

all

Wwo

TBIS

Translation

reserved

single

3C
3D
3E

60
61
62

MBRK
PMR
SID

reserved

buffer

invalidate

Microprogram breakpoint
Performance monitor register
System

identification

2-27

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG #

DEC. HEX NAME ID#
-

ESP

KSP

01
02

SSP

uspP

ISP

28 KERNEL STACK POINTER
29 EXECUTIVE STACK POINTER

2A SUPERVISOR STACK POINTER
28 USER STACK POINTER

2¢c INTERRUPT STACK POINTER
00

VIRTUAL ADDRESS OF TOP OF STACK

POBR

24 PO BASE REGISTER
RESERVED OPERAND FAULT IF VLA <2**31

P1BR

25 Pl BASE REGISTER
RESERVED OPERAND FAULT IF VLA <2**31 - 2**21
02

POLR

01 00

VIRTUAL LONGWORD ADDRESS

3c PO LENGTH REGISTER

LENGTH OF POPT IN LONGWORDS

P1LR

SLR

3o PI LENGTH REGISTER
2%*21 - LENGTH OF P1PT IN LONGWORDS

3¢ SYSTEM LENGTH REGISTER
LENGTH OF SPT IN LONGWORDS

RESERVED OPERAND FAULT IF MBZ #0
31

MBZ

LENGTH IN LONGWORDS

]
TK-0709

2-28

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG. #

DEC. HEX NAME

3A PROCESS CONTROL BLOCK BASE

PCBB

RESERVED OPERAND FAULT IF MBZ # 0.

313029

II\]BZ,

SCBB

02 01 00

PHYSICAL LONGWORD ADDRESS OF PCB

]

SYSTEM CONTROL BLOCK BASE
RESERVED OPERAND FAULT IF MBZ # 0.

3130 29

IMjZI

IPLR

020100

PHYSICAL PAGE ADDRESS OF SCB

INTERRUPT PRIORITY LEVEL REGISTER
31

ASTR 0C

IMBZ]

MBZ

05 04

IPSL<20: 1?>|

LAST LEVEL REGISTER
RESERVED OPERAND FAULT IF NOT VALID I.E., MBZ #0.

03 02

12.

SBR

MBZ

ASTLVL

SYSTEM BASE REGISTER
RESERVED OPERAND FAULT IF MBZ # O.

31 3029

‘ MBZI

PHYSICAL LONGWORD ADDRESS

02 01 00

IMIEI
TK-0711

2-29

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG. #

DEC. HEX

NAME

ID#

ICCS

O0A

INTERVAL CLOCK CONTROL /STATUS

08 0706050403

161514

31 30.

T ERR

wWC {ERR

0100

| L[ [wez | ]

]

WC{!NT

|E—

XEGR}W/O
SGL CLK

BITS 4,5 ARE 11/780 SPECIFIC
25

NICR

NEXT INTERVAL COUNT REGISTER

r NEXT INTERVAL (1 MICROSECOND INCREMENTS, TWO’S COMPLEMENT)
WRITE ONLY
26

ICR

INTERVAL COUNT REGISTER

RESERVED OPERAND FAULT IF WRITE

INTERVAL COUNT (1 MICROSECOND INCREMENTS)
READ ONLY

TODR

TIME OF DAY REGISTER

r
20

TIME OF DAY (10 MILLISECOND INCREMENTS)

SOFTWARE INTERRUPT REQUEST REGISTER

SIRR

RESERVED OPERAND FAULT IF READ

0403

WRITE ONLY

156

SISR

SOFTWARE INTERRUPT SUMMARY REGISTER
31

1615

0100

SOFTWARE INTERRUPT REQUEST I |

MBZ

4321
FEDCBA987605

MBZ

TK-0710

2-30

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG.#
DEC

HEX

NAME

ID#

RXCS

CONSOLE RECEIVE CONTROL/STATUS
31

08 07 06 05

MBZ

l IlEl

MBZ

DONE

RXDB

CONSOLE RECEIVE DATA BUFFER

RESERVED OPERAND FAULT IF WRITTEN
31

24 23

BYTE 3

16 15

BY"IiE 2

08 07

BYTE 1

BYTEO

READ ONLY

TXCS

CONSOLE TRANSMIT CONTROL /STATUS
31

08 0706 05

MBZ

READY

TXDB

CONSOLE TRANSMIT DATA BUFFER
RESERVED OPERAND FAULT IF READ

24 23

BYTE 3

16 15

BYTE2

08 07

BYTE 1

BYTE O

]

WRITE ONLY
TK-0707

2-31

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG.#
DEC

HEX

NAME

1D#

ACCS

17 ACCELLERATOR CONTROL/STATUS
3130

ERR

ACCR

282726

16 15 14

RES OPR

ACC ENA

l\}fi:CELLERATO;(4 %AINTEN/-\NCE16 161413

[
|

MICRO BREAK (WRITE)

CURRENT ADDRESS (READ)

BRK

ADD

WCSA

J
WRT

TRP

0908

I TRAP ADDRESS

WRT

ACC TYPE

MIC MAT

22 WRITEABLE CONTROL STORE ADDRESS
31

[

1615141312

MBZ

WCS ADDRESS

PINV
3
MOD
CTR

WCSD

WRITEABLE CONTROL STORE DATA
WRITE: WCS DATA
READ: WCS PRESENT

WCS PRESENT

0706 050403020100
TK-0708

2-32

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG.#

DEC

HEX

NAME

SBIFS 1B

ID#

SBI FAULT/STATUS
3130292827 2625

201918171615

MBZ

FLT

UNX

XMT

MBZ

WC{L

XMT

OCK}

FLT —— FLT
SIG }R/O

FLT

INT

R/O

SBIS

SBI SILO
313029

2524

SBI ID

2221

AFT’__INT
FLT
LOC
50.

sSBIsC

18171615

SBI
I TAG

.
SBI TR <15:0>

SBI <M3:M0>
LSBI
o)
CNF
< 1:0>
R
<B31:B28
>

SBI SILO COMPARATOR
313029282726

[*l II

INT

2322

2019

1615

lTAG l FIELD l
COMP|

MBZ

COUNT

COMP CMD

coND _ OR MASK

CMP
siLo

LCK
L“un

LOCK

CND

LOCK

CODES

*CLEARED ON ANY WRITE TO SBISC

SBIMT

SB|l MAINTENANCE
31302928 27

23222120

1716 1514131211 10090807

TSI
F] FI
[ ] ]

F|R

WRT |MLT

SEQ |XMIT

REV F
UNEX
SBI
RD
PO

—

R/O

RE\l/

sl | CACHE
INV

EfERLD

EN
SBI Y
INV

—
R/O

F TME OUT

|miss|REP

|a1

GO MAT

61 MAT

FF
MISS REP
GO
GO

> R/O

REV SBI P1

DSBL SBI CYC ]
TK-0705

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG.#

DEC

HEX

NAME

ID#

SBIER 19 SBI ERROR REGISTER

16 151413121110 0908 07 060504030201 00

RDS CRD INT EN
CRD
WC

RDS

CP TIME OUT

R/O {CP TIME OUT STATUS
MBZ

R/O{CP SBI ERR CNF
WC

IB RDS

IB TIME OUT

IB TIME OUT STATUS
R/O

IB SBI ERR CNF
MLT ERR

NOT BSY
MBZ

SBITA 1A SBI TIMEOUT ADDRESS

RESERVED OPERAND FAULT IF WRITE

31302928 27

lol

< 29:2>
PHYSICAL ADDRESS
READ ONLY

MODE
PROT
CHK

SBIQC

SBl QUAD CLEAR
RESERVED OPERAND FAULT IF READ
RESERVED OPREAND FAULT IF MBZ #0

3130 29

IMBZl

PHYSICAL QUADWORD ADDRESS

0302

I MBZ I

WRITE ONLY
TK-0706

2-34

VAX-11/780 PROCESSOR REGISTER BIT CONFIGURATIONS

REG.#
DEC HEX

NAME

MME

ID#

MEMORY MANAGEMENT ENABLE
WRITE 1 ALSO CAUSES MICROCODE TO INVALIDATE TB.
31

0100

i
MME

TRANSLATION BUFFER INVALIDATE ALL

TBIA

RESERVED OPERAND FAULT IF READ

|
58

WRITE ONLY

TRANSLATION BUFFER INVALIDATE SINGLE

TBIS

RESERVED OPERAND FAULT IF READ

]

VIRTUAL ADDRESS
WRITE ONLY

3C°

MBRK

MICROPROGRAM BREAKPOINT

1312

[
61

PMR

0ocC

MICRO PROGRAM ADDRESS 1

PERFORMANCE MONITOR REGISTER
RESERVED OPERAND FAULT IF >1
31

0100

SID

MBZ

l ]

SYSTEM IDENTIFICATION
RESERVED OPERAND FAULT IF WRITE
31

I SYSTEM TYPE

24 23

16 15

ECO LEVEL

READ ONLY

2-35

1211

l PALAKST I SYSTEM SERIAL NUMBER
TK-0704

WILSAS TOULNOD ¥D0 7d dSvYd

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809oVA8e¢z%«% TNdIgSNIoWONWdNvHHDII¥dDLOIlVdIMIMLNSV(ONaMdAVYOlW)YgVILLSL:JSOWNA)dAISTYNVAOYANOHHONASYFLLI1‘Ld4vyYLIVdoIMlNlgnvLVvd(dAALNaNVIOVYYTAYIdWId¥IdHOYLON0ISaQNYYAYdOODMMHIOIdd1LNIOHHNISSVANNSdddNLOSIOONALLWTNNdYOOd1HDSMMOdNOV7dVOY3ILILSSLOSLNSIYOISMNOIYIS
0xOFdadA--0$8D ‘TTaUSIYNAMDSINJIINOWSSANTIVIAYA¥TILSIYYId-N€I

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(W3TIO0€YLI0S7NX1SO8D) Q0‘I@A¥ISNIYN

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xo087£S28-19 1‘FTY4aY8dAMsHLnIIJN1IAInNOvISdaHTnIIyWAdTIIsLTdydTZ
8dax4 T‘IaSdNsDnNFnAIAaDIAY¥ISHIYNI

YOLDIA

NOILdDXd NOILdOXd NOILdUOXd NOILdOXd NOILdOXd NOILJdDXd NOILdOXd NOILdOXd NOILdIOXH NOILJdJOXd NOILdJOXH NOIJLdOXd NOILAdDXd LANYHYILNT LAdNHYALNI LdNYALNI LdNYUILNI LdNYHLNT LAdNYILNI LANYHALNI LdNYILNI

JOLOJA JOLOJA HOLO3A HYOLOIA HOLOJA YOLDIA YOLOJA YOLOHEA YOLO3A YOLOIA YOLOEA YOLOJIA HYOLOJA YOLOJIA HOLOJA HOLDIA YOLOEA

2-36

SMOdI0V‘NTS1ILYI?HSNW¥1AIYLT¥Dn2NYLOdvSDVAd (0INMdALO7IVTJIH9GY€IOSALT1lVNIDLWdS)

LdNYYILNI HOLOIA
LANYYELNI
LdNYYILNI
LdAYYILNT
LdNYYILNI

dOLJOdA

dOLOdA
HOLOUA

SYSTEM CONTROL BLOCK

LdS9od NOTIVOYNV¥IIWHLLIIIVDTOQIIANIdODONDMONIOITTLMJUDLHNSYYILMHAOSANTNIAIHIdAYIdALOA9d¥O4YldZdYdL

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8S0a9YLyO3S1Q9HSQITJOUDI2Y1MS(U08T.I/RT3UOD13B10T9NdYsALAYsafun*pebueyo

DDOD0ELd9€TTT-1--00V0D8TTT««xx II19d9SSS 0334449 v0 G0 9L0

JNO4ILaIAoNOdD

2-37

LWH

LNIOdMVIYd

LILAdNNYYIILNNII HYOOLLOOJIIAA
SYSTEM CONTROL BLOCK

LOI

SaUYaodvy

|awaZaW g1td| oS+

\4TVYOISXHd9DNOTqUOMSSHIYAAV¥Yg0Jd0#80d 05+ Z9NWF

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zyd 8T+

S3IDO0YUd TOHINOD XD071€ dsSvd (gdd)sy €od 0+
PROCESS CONTROL BLOCK

8ds+ 98Zy+ Z0T%d+ 8opd+v1s+d

2-38

PROTECTION CODES

CODE

MEANING
K

O
0O

0
0

UNPREDICTABLE
R/W
*
*

R/W

RO
R/W

*
R/W

*
*

R/W

MODE

(00)

KERNEL

(01)

EXECUTIVE

(10)

SUPERVISOR

(11)

USER

2-39

KERNEL

EXECUTIVE

SUPERVISOR

USER

READ

R/W

READ WRITE

ACCESS
ONLY

INTERRUPT PRIORITY REQUESTS

oLT-0F1
o

—

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JYMLAOS

T3AT Jd 1l

dd1 g7

T ug/03y4

01d1ISs

6¥dTI

4d0I Yd0l

2-40

EXCEPTION CONDITIONS

CONDITION

VECTOR

MACHINE

KERNEL

CHECK

STACK

RESERVED

DEC

PRIVILEGED

NOT

VALID

OPCODES

CUSTOMER

RESERVED

OPERANDS

RESERVED

ADDRESSING

ACCESS

CONTROL

TRANSLATION
TRACE
BPT

INSTRUCTIONS

RESERVED

NOT

OPCODES

10
14

18
MODES

VIOLATION

VALID

TRAP

OPCODE

COMPATABILITY
ARITHMETIC

MODE

TRAP

30
34

CHMK

OPCODE

CHME

OPCODE

CHMS

OPCODE

CHMU

OPCODE

2-41

VIRTUAL AND PHYSICAL ADDRESS RELATIONSHIP

VIRTUAL
ADDRESS
SPACE

PHYSICAL

I—

ADDRESS

MAIN

| —

SPACE

DISK

MEMORY

I PROCESS TRANSFERS
| BY SOFTWARE

l
ADDRESS SPACE AS
REFERENCED BY THE

ACTUAL ADDRESS
SPACE

CPU
TK-0027

2-42

VIRTUAL AND PHYSICAL ADDRESS SPACE
VIRTUAL ADDRESS SPACE

L 32 ADDRESS BITS j
FFFFFFFF g

RESERVED

0000000

BFFFFFFFqg

f/TgS'XL

SYSTEM SPACE

SPACE

CONTAINS PROCESS PAGE

TABLES FOR ALL PROCESSES

SO SPACE

ON SYSTEM
80000000 4

/FFFFFFFg

CONTROL SPACE

CONTAINS INFORMATION

MAINTAINED BY SYSTEM

INCLUDING USER

P1 SPACE

40000000 4 | _STACK

| PER PROCESS

3FFFFFFF, o

VIRTUAL SPACE

PROGRAM SPACE

CONTAINS PROCESS IMAGE

PO SPACE

CURRENTLY EXECUTING

00000000 14

J
TK-0036

PHYSICAL ADDRESS SPACE

[

30 ADDRESS BITS ]
3FFFFFFF,
1/0
SPACE
20000000 14
1FFFFFFFyq
PRIMARY
MEMORY

SPACE

00000000,
TK-0037

2-43

PAGE TABLE FORMATS AND PAGE TABLE ENTRY FORMAT

PAGE TABLE FORMATS

SYSTEMREGION PAGE TABLE
PAGE TABLE ENTRY FOR VIRTUAL PAGE O (FIRST ENTRY)

SYSTEM BASE REGISTER

PTE FOR VPN 1

(CONTAINS THE PHYSICAL ADDRESS

PTE FOR VPN 2

OF THE FIRST ENTRY OF THE PAGE

TABLE)

SYSTEM LENGTH REGISTER
(CONTAINS THE NUMBER OF PAGE
TABLE ENTRIES, N)

PAGE TABLE ENTRY FOR VIRTUAL PAGE N -1 (LAST ENTRY)
PER-PROCESS PAGE TABLES
SYSTEM REGION PAGE TABLE

CONTROL REGION BASE
REGISTER

PAGE TABLE ENTRY FOR VIRTUAL PAGE 2*22-N

PTE FOR VPN 2%22-(N-1)

(CONTAINS THE VIRTAUL ADDRESS

PTE FOR VPN 2*22-(N-2)

OF BASE OF THE PAGE TABLE)

PTE FOR VPN 2*22-(N-3)

CONTROL REGION LENGTH
REGISTER

(CONTAINS THE VIRTUAL ADDRESS
OF THE FIRST ENTRY IN THE PAGE

TABLE FOR VIRTUAL PAGE NUMBER
2**22-N, WHERE N IS THE NUMBER

OF PAGE TABLE ENTIRES)

'PTE FOR VPN 2*22-1 (LAST ENTRY)

SYSTEM REGION PAGE TABLE

PROGRAM REGION BASE
REGISTER

PAGE TABLE ENTRY FOR VIRTUAL PAGE O (FIRST ENTRY)
PTE FOR VPN 1

(CONTAINS THE VIRTUAL ADDRESS
OF THE FIRST ENTRY IN THE PAGE

PTE FOR VPN 2

PTE FOR VPN 3

TABLE)

PROGRAM REGION LENGTH

(CONTAINS THE NUMBER OF PAGE
TABLE ENTRIES, N)

PTE FOR VIRTUAL PAGE N-1 (LAST ENTRY)
TK-0732

PAGE TABLE ENTRY FORMAT

31 30

PROT

- 00

21 20

27 26 25

PFN

MBZ

TK-0714

2.44

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30VdS

savav

a3AY3S3IY

dNA Z

NdA

NdA L

NdA Z

(0d) ‘

2-45

vivda

NSNOILVvJ01
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d4Ad=N =N T3DVNdLHIWAV3HDLVdH3HIgWBNWN
Ndd ¢
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€Nd

0NdA h 0000

d444444€

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h 000 000%

° 10HINOD

444444489

3..0vdS ZL++0NNN°NNdddAAA W3I1SAS d04044040/8

d444d4444

AVNLYIA
EXAMPLE OF PAGE FRAME ALLOCATION (RELOCATION)

}Nd

VIRTUAL AND PHYSICAL ADDRESS FORMATS

VIRTUAL ADDRESS

3130 29

0908

VIRTUAL PAGE NUMBER

BYTE

\WITHIN PAGE

PROGRAM REGION

00
01

CONTROL REGION

SYSTEM REGION

RESERVED

PHYSICAL ADDRESS

—

PAGE FRAME NUMBER

000

MEMORY ADDRESS

001

I/0 SPACE ADDRESS

09 08

313029 28

BYTE

I THIN PAGE

TK-0734

2-46

VIRTUAL PAGES MAPPED TO PHYSICAL SPACE

VIRTUAL

ADDRESS
SPACE

RESERVED
PHYSICAL
ADDRESS
SPACE
SPAGE TABLE

SEN

VPN N

SYSTEM

‘

PFN N-1F

P1 PAGE TABLE
FOR PROCESS X

.
:

PEN 2

VPN 1

VPN O
VPN N+1

:
O3S
GOs

VPN N+2

PEN

PAGES

‘

PEN N-1

PFN 3
PEN

VPN 2N-1
PER

PO PAGE TABLE

PROCESS{
PAGES

FOR PROCESS X

VPN N

VPN 1
VPN 0

‘

eene
PFN 1

PFN O

PFN

PEN3 [

TK-0035

SYSTEM VIRTUAL TO PHYSICAL ADDRESS TRANSLATION
SCHEME

O
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n
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SYSTEM VIRTUAL TO PHYSICAL ADDRESS TRANSLATION,

EXAMPLE

$H3Od10394

PROCESS VIRTUAL TO PHYSICAL ADDRESS TRANSLATION
SCHEME

09 08

30 29

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32
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)

7
31

|
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2120

SYSTEM PTE

30
31

2120

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2-50

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PROCESS VIRTUAL TO PHYSICAL ADDRESS TRANSLATION,
EXAMPLE

ADDRESS CALCULATION FOR A TB HIT DURING A MISS
MICROTRAP

[A W|Loud Nid

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fio;8

2-52

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SECTION 3
HARDWARE BLOCK DIAGRAMS
AND REGISTER BIT CONFIGURATIONS

VAX-11/780 GENERAL BLOCK DIAGRAM

CENTRAL PROCESSING UNIT

| CPU

—:

WITH FULL

| FLOATING POINT,

DECIMAL, AND
CHARACTER STRING

FPA |
|

_ 1 NSTRUCTIONS

CACHE MEMORY

CONSOLE
SUBSYSTEM

r
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Piccoscipsamsinaeiinii

MEMORY SUBSYSTEM

PORT FOR _| LSI-11
REMOTE _| MICROCOMPUTER
DIAGNOSIS

cey

ELOPPY
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—256KB | |
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CONTROLLER

r
~ — ={ MEMORY

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LUP TO 8MBYTES

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A
r
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= 4 ECC MOS

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)

A‘l

i iiicinn i i
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(13.3

MB/sec)

FPA=FLOATING POINT ACCELERATOR

UNIBUS

ADAPTOR

MASSBUS

ADAPTOR

L UP TO 4 TOTAL

WCS=WRITABLE CONTROL STORE

(1.5 MB/sec)

(2.0 MB/sec)
MASSBUS

;———_—d

—

wes

TK-0733

3-2

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CPU BLOCK DIAGRAM

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DATA PATH BLOCK DIAGRAM

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INSTRUCTION DECODE BLOCK DIAGRAM

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CONSOLE SUBSYSTEM CONFIGURATION

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ID BUS

MICROSEQUENCER

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PANEL

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ID BUS MAP

3-25

LNSIbB)*

—g—

ID BUS REGISTER BIT CONFIGURATIONS

ID#:
Bit

NAME:

IBUF

Fields

<31:00>

Description
Data

Bytes

Instruction

Read

Only

Located

ID#:
Bit

NAME:

Fields

<31:00>

Buffer

<3:0>

TIME

M8223

(IDPL)

DAY

Description
32

bit

100

counter

Hertz

Rate

Read/Write

ID#:
Bit

SYSTEM

NAME:

Fields

<31:24>

Located

M8224

(IRCN)

Description
System

Type

01=VAX-11/780
<23:16>

ECO

Level

<15:12>

Manufacturing Plant

<11:00>

System

Serial

Read

Selected
Read

ID#:
Bit

NAME:

Fields

<07>

from

jumpers

M8236

Backpanel

CIBC,D,E

RXCS
Description

Done
Set

<06>

Number

Only

console

data

available

Read

Only

Interrupt

Enable

3-26

software

RXDB

signifying

ID BUS REGISTER BIT CONFIGURATIONS

Allows

Interrupt

when

Done

Set

Read/Write

Located

ID#:

Bit

Description

Data

from Console
Read

Bit

Subsystem

Only

Located

ID#:

on M8236

Description
Ready
Set

console

receive
Read

<06 >

Interrupt
Allow

<31:0>

Enable
interrupt

console

ID#:

NAME:

Fields

<31:00>

Ready

(CIBE)

subsystem

Write Only
Located on M8236

Bit

when

Description

Data

Description
Read:

Write:

Ready

Only

TXDB

NAME:

Fields

indicate

data

Read/Write
Located on M8236

Bit

(CIBC,D,E)

TXCS

NAME:

Fields

<07>

ID#:

(CIBE)

RXDB

NAME:

Fields

<31:0>

on M8236

Q Register

Read/Write

3-27

(CIBC,D,E)

set

——

ID BUS REGISTER BIT CONFIGURATIONS

Located

on:

<7:00>

M8228

<15:08>

(DCPC)

M8227

(DDPC)

<31:16> MB8226

ID#:
Bit

NAME:

Fields

<31:00>

INTERVAL COUNTER

Description
Data

loaded

into

on overflow or

<31:16>
<15:00>

ID#:

NAME:

Fields

<15>

<07>

Bit

counter

CLK

CONTL

M8230
<8231

(CEHP)
(ICLS)

INTERVAL CLOCK

STATUS

Error

Over run second
Serviced.

overflow before

Read/Write

Clear

Interrupt

Request
when

counter

Read/Write
Interrupt

overflows

Clear

Enable

Enables

interrupt

overflow

Read/Write
<05>

Single

CLK

Advance

counter

step

Write Only
<04>

XFER

Forces

Write
<00>

REG

Description

Set

<06 >

interval

XFER

Only

Write

Bit

(DEPL,M)

interval

Only

RUN

3-28

counter

first

ID BUS REGISTER BIT CONFIGURATIONS

Allows

counter

increment

micro-second

rate

Read/Write

Located
on M8231

ID#:

<31:00>

INTERVAL COUNTER

NAME:

Bit Fields

Description

Up Counter

Bit

Read

micro-second

NAME:

(CEHP)
(ICLS)

CPU ERROR STATUS

Nested

Error

Used

by Memory Management Microcode

Read Only
Located on M8230

<15>

Control

Store

(CEHP)

Parity

Error

Summary

"OR"

of Control

Store

Parity

Read

Only

Located

<14:12>

(CES)

Description

Bit Fields
<16>

rate

Only

<31:16> M8230
<15:00> M8231

ID#:

(ICLS)

on M8231

(ICLS)

Control Store Parity Error Bits
<14>=Group

<13>=Group

<12>=Group

Read

Only

Located
<11>

E ALU

<10>

<09>

ALU

M8231

3-29

(ICLS)

Error

Bits

ID BUS REGISTER BIT CONFIGURATIONS

<08>

ALU

<07>

ALU

C31
Read/Write

Located

<06:04>

on M8231

(ICLS)

Arithmetic Trap Code
7=Decimal divide by 0
6=Decimal Overflow
5=Float Underflow
4=Float divide by 0
3=Float Overflow
2=Integer divide by
l=Integer Overflow
0=No Trap Pending

Read/Write

Located

<03>

on M8231

Performance Monitor
Loaded

Read

by Microcode

Read/Write
Located on M8231

<02:01>

AST

deliver

Read/Write
Located on M8231

Bit

NAME:

Fields

<25>

(ICLS)

Level

Used

ID#:

(ICLS)

Enable

AST SIR during

(ICLS)

VECTOR
Description

Prior

Valid

Indicates at least one bit was
priority field
Read

set

last

Only

Located
<24:21>

RET

on M8230

(CEHP)

Priority

Priority encoded value of bits <31:16> of
bit mask last written into vector register.
Read

Only

3-30

ID BUS REGISTER BIT CONFIGURATIONS

Located

<20:16>

Number

vector

Read

Only

Read

NAME:

written

M8230

(CEHP)

Generated

Vector

SOFTWARE

M8231

(ICLS)

INTERRUPT

Description

Fields

<20:16>

last

Only

Located

ID#:

(CEHP)

Vector

Hardware

Bit

ones

into

Located

<08:00>

M8230

Ones

Interrupt Priority

Level

Pending

Level of highest interrupt active
at last interrupt strobe time
Read

Only

Located
<15:01>

Software

M8230

Interrupt

Pending

(ICLS)

Software

Interrupt

Flags

Read/Write
Located

ID#:
Bit

NAME:

M8231

PROCESSOR STATUS

(ICLS)

LONGWORD

Description

Fields

<31>

Compatibility
CPU

Mode

executing PDP-11

mode

instructions

Read/Write
Located
<30>

Trace

M8230

(CEHP)

Pending
At end of an instruction and if
equal a trace trap is initiated

3-31

trace

pending

ID BUS REGISTER BIT CONFIGURATIONS

Read/Write
Located on M8230

27>

First

Part

(CEHP)

Done

Microcode sets
within certain

this bit at defined points
instructions, stating that

instruction may be restarted from that point

interrupt of

instruction occurs.

Read/Write
Located

<26>

Interrupt

on M8230

(CEHP)

Stack

Indicates CP operating

interrupt

software

stack

Read/Write
Located
<25:24>

Current

on M8230

(CEHP)

operating

mode

Mode

Current

3=USER
2=SUPERVISOR
1=EXECUTIVE
0=KERNEL

Read/Write
Located
<23:22>

on M8230

Previous
Mode

(CEHP)

Mode

operating

mode

(before

Change

Inst.)

3=USER
2=SUPERVISOR

1=EXECUTIVE

0=KERNEL

Read/Write
Located
<20:16>

Interrupt

M8230

Priority

Current

(CEHP)

Level

Interrupt

Priority

Level

Read/Write
Located

on M8230

<07>

Enable decimal

<06>

Enable:floating underflow exceptions

overflow exceptions

3-32

CPU

ID BUS REGISTER BIT CONFIGURATIONS

<05>

Enable

integer

overflow

exceptions

Read/Write

<04>

T bit

<03>

Located

M8231

Results

setting

(ICLS)

Trace

Pending

bit

<02>

bit

<01>

bit

<00>

bit
Read/Write
Located

ID#:
Bit

NAME:

(ICLS)

BUFFER

DATA

Description

vValid
Allows
used

hits

index

equals

Write

Only

Located

<30:27>

M8231

TRANSLATION

Fields

<31>

with
and

VA<13:9>&31

address<30:14>

MUX<30:14>

M8220

(CAMV)

Protection dee
Define

0000
0001

0010

Protection

Address

Kernel

Exec

Super

User
*

Unpredictable
R/W

0011

0100
0101

R/W

0111

*
*

1000
1001

R/W

*
R/W

*
*

R/W

0110

1010

R/W

1011

1100

R/W

1101

R/W

1110

R/W

3-33

ID BUS REGISTER BIT CONFIGURATIONS

R/W
RO

1111

access

Read/Write
Read

Write

Only

Located on M8220

(CAMV)

Modify

<26>

Notes a modified
Write

Only

Located on M8220

<20:0>

page

(CAMV)

Page Frame Number

When translation occurs these bits become
page numbers i.e., PA<29:09>

Write

Only

Located on M8222

ID#:

NAME: T BUFF REG 0
Description

Bit Fields
<20:18>

(TBME)

Force replace

Directs TB writes to defined groups
20=Write

BOTH

19=Force Replace Group 1
18=Force Replace Group 0

Read/Write

Located on M8222

<17:16>

(TBME)

Force Miss
Force TB Miss on defined group
17=Group

16=Group

Read/Write

Located on M8222

<15:08>

(TBME)

Last Reference

Data on last Non-Nop memory reference
<15>
<14>

Status of uFS Bit

Status of uADS Bit
<13:10> Status of uMCT Field

3-34

ID BUS REGISTER BIT CONFIGURATIONS

<09>

1
1

<08>

means
means

IB WCHK existed
Ref delayed one

on an
cycle

IB
by

reference
IB Auto

reload
Read

Only

Located

Indicate
1

6=Group

(TBME)

M8222

Parity

Error

bad

was

parity

errors

Data

Byte

errors

7))

]

o
n

~Group

Located

M8222

(TBME)

MME

Enable

Memory Management

Read/Write

ID#:
Bit

NAME:

Fields

<20:09>

Located

TBUFF

REG

M8222

Description

Parity

hit

generated.

Read/Write

<00>

(TBME)

errors

HFHHEOOOKKMHFHOO

HMEODOD»OOA9AANDWN
O

Allows

group

Only

Located
Force

which

7=Group

Read

<04:01>

M8222

Hit

= Q

<07:06>

Error

Status

3-35

(TBME)

ID BUS REGISTER BIT CONFIGURATIONS

20=1

Group

19=1
18=1
17=1
16=1

[ 1]

15=1

Data

Byte

1
0
0

2
1
0

[1]

2
1
0
2
1
0

1
1
1
0
0
0

1l4=]

13=1
12=1
11=1
10=1

9=1

Clears
Located on M8222 (TBME)

Read/Any Write

CP TB

<08>

Parity

Error

Indicate TB Utrap has been requested
Read/Any Write Clears
Located on M8222 (TBME)
<06>

Pulse

TB Write

Last

Indicates which TB group was last written
0=Group
1=Group

O
1

Both - Unpredictable
Read

Only

Located
Bad

<04>

on M8222

Contents of
Read

IPA

IPA are not meaningful

Only

Located
<03:00>

(TBME)

IPA

on M8222

(TBME)

Info

Status of last load
3=1 TB Miss on load
2=1 TB Parity error

from

IPA

1=1 Protection violation or miss
0=1 Automatic hardware initiated 1load
Read

Only

Located

ID#:

NAME:

‘

on M8222

(TBME)

ACCELERATOR MAINT.

3-36

ID BUS REGISTER BIT CONFIGURATIONS

Bit

Fields

<31>

Description
Write

Trap

When

Address

set

clocks

trap address

Write Only
Located on M8286
<23:16>

Trap

(FMHR)

Address

Use

ACC

trap

form

ROM

address

M8286

(FMHR)

Read/Write

<15>

Write

Located

Micro

Match

Setting

clocks

bits<8:0>
Write

Micro

micro

this

M8287

micro

Read Only
Located on M8287
Micro

from

(FMLP)

Match
Indicates

<08:00>

match

Only

Located

<14>

Break/Current

match

has

occured

(FMLP)

Address

Writes micro break register
Reads current micro program counter
Read/Write
Located

ID#:
Bit

NAME:

Fields

<31>

M8287

ACCELERATOR

CONTROL

STATUS

Description
Error

Read/Any Write
Located
<27>

(FMLP)

Reserved

M8286

Operand

Minus

zero

error

3-37

this
(FMHR)

reg

will

clear

ID BUS REGISTER BIT CONFIGURATIONS

Read

Only

Located on M8286

(FMHR)

Accelerator Enable

<15>

l=Enable Accelerator
0=Disable Accelerator
Read/Write

Located on M8287

<03:00>

(FMLP)

Accelerator type
01=FPA

Only

Read

Located on M8287

ID#:

NAME:

(FMLP)

SILO

Description

Bit Fields

16 location SILO used to store SBI activity
<31>

After

Fault

First entry after fault cleared
Read Only

Located on M8219

<30>

SBI

Read

Only

Located on M8219

<29:25>

SBI

Only

Located on M8219

(SBHJ)

SBI TAG<K2:0>
Read

Only

Located on M8219

<21:18>

(SBHJ)

ID<4:0>
Read

<24:22>

(SBHJ)

Interlock

(SBHJ)

SBI MASK<3:0> or SBI<B31:B28>
Silo written with SBI<KB31:B28> when SBI TAG
equals command address. Otherwise SBI <M3:MO0>
are

written

Read

Only

Located on M8219

3-38

(SBHJ)

ID BUS REGISTER BIT CONFIGURATIONS

<17:16>

SBI

CNF<K1:0>
Read

Only

Located
<15:00>

SBI

on M8222

TR<K15:00>
Read

Only

Located

ID#:
Bit

NAME:

Fields

<15>

(SBHJ)

SBI

on M8237

(TRSF)

ERROR REGISTER

Description

RDS

Interrupt
Enable

Enable

interrupt

for

RDS

errors

Read/Write
Located
<14>

on M8218

CRD

Received

<13>

corrected

Read/Write

Located

M8218

read

data

from

(SBLH)

read

data

Read/Wrtie

Located

M8218

Timeout

Status

12=1

Timeout

substitute

from

clear
(SBLH)

for

requested

cycle

RO o

110

- Read/Write

Also

<8>

memory

clear

RDS

Received

<12:10>

(SBLH)

device response
Device busy

Waiting for read
Impossible code

clears
Read

Located

SBI

Error

clear

bits<11:10>,

<11:10>

Only

M8218

(SBLH)

Confirmation

3-39

data

08,

memory

ID BUS REGISTER BIT CONFIGURATIONS

Set when CP requested cycle receives error
confirmation to command address transfer
Only

Read

Write 1 to bit 12 to clear
Located on M8218 (SBLH)
<07>

RDS

Data

Read

Substitute

for

Data

Read/Write 1 to clear
Located on M8218 (SBLF)

<06:04>

Status

Timeout

06=1 Timeout for IB requested cycle
4

—OMOO

=000

No device response
Device busy
Waiting for read data
Impossible code

6 - Read/Write 1 to clear
Also clears bits<5:3>
05:04 - Read Only
Located on M8218 (SBLE)

<03>

IB SBI Error Confirmation

Set when IB requested cycle receives error
confirmation

Read Only
Write 1 to bit 6
Located on M8218
<02>

Multiple CP

clear
(SBLF)

Error

Set with pending CP timeout or CP SBI Error
confirmation not serviced
Read

Only

Write 1 to bit 12 to clear
Located on M8218 (SBLF)
<01>

SBI

Not

Busy

Read Only
Located on M8218

3-40

(SBLF)

ID BUS REGISTER BIT CONFIGURATIONS

ID#:
Bit

NAME:

Fields

TIMEOUT

Latches
not

Physical

latch

for

Read

Only

Latched

Error

Data

SBI

O KHHOW

Equal

CP Timeout

(SBI

ERR REG

bit

12)=1

not

subject

User

M8219

(SBHJ)

Check
0

for

references

protection
on

M8219

check

(SBHJ)

Physicai Address
<27:00>=PA<29:02>
Located

ID#:

Fields

<31>

NAME:

SBI

Parity

FAULT

<27:16>

(SBHH,J)

<16:00>

(SBLF,H)

STATUS

Fault

SBI

Parity

Read

Only

Unexpected
Read

Multiple
Read

Read

Fault

M8219

Data

(SBHJ)

Fault

Only

Located

27>

Description

Located

<29>

will

Kernel

Located

Bit

Timeout;

Timeouts

Executive
Supervisor

hardware

<27:00>

Address

until

bit

Located

Protection

<29>

Mode
-0
O W

<31:30>

ADDRESS

Description

M8219

Transmitter

(SBHJ)

Fault

Only

Located

M8219

3-41

(SBHJ)

ID BUS REGISTER BIT CONFIGURATIONS

Transmitter

<26>

Read

During

Located

Error

<25>

Fault

Only

First

on M8219

(SBHJ)

Pass

Set

by microcode first
handling code; used to

time through fault
note double errors

Read/Write
Located
<24>

on M8219

(SBHJ)

Spare

Read/Write
Located

Fault

<19>

M8219

(SBHJ)

Latch
Set

from

SBI

fault

Read/Write

Located

M8219

Fault

<18>

Interrupt
Interrupt

clear
(SBHH)

Enable
on

SBI

fault

M8219

(SBHH)

M8219

(SBHH)

enable

Read/Write
Located

SBI

<17>

Fault
Read

Signal
Only

Located

Fault

<16>

Silo

Lock

Indicates

ID#:
Bit

Silo

bit

Located

M8219

NAME:

Fields

SBI

Read Only/
Write 1 to

SILO

locked

from

SBI

fault

clear

(SBHH)

COMPARATOR

Description
Allows
than

lock

silo

fault

3-42

predetermined

data

other

ID BUS REGISTER BIT CONFIGURATIONS

<31>

Comp

Silo

Lock

Unconditional

Locks
B.

when

count

Conditional
Lock

certain

looks

SBI.

signal
is generated
increment.
When

counter

Unlock

Read

Only

Clear

bit

29)

19:16)=F

lock

when

Comparator

(See

(bits

=F,

writing

conditions

exist.

When

compare

which

silo

will

number

match,

allows

counter

lock

into

counter

not

equal

counter

Located

Silo

<30>

Lock

M8219

Interrupt

(SBHJ)

Enable

Read/Write
Located

Lock

<29>

M8219

(SBHJ)

Unconditional
Enables

Silo

lock

when

counter

Read/Write
Located

Conditional

<28:27>

M8219

Lock

ID,

Tag

Tag,

(SBHJ)

Codes

compare

only
Command

Function

Read/Write
Located

<26:23>

Compare

Command

M8219

(SBHJ)

Mask<3:0>

Read/Write
Located

<22:20>

Compare

|
" Count

M8219

(SBHJ)

M8219

(SBHH)

Read/Write
Located

<19:16>

Tag<2:0>

Field<3:0>

3-43

(SBHH)

Mask

——

ID BUS REGISTER BIT CONFIGURATIONS

When =F allows silo lock
Read/Write
Located on M8219
1D

ID$§:

Bit

Fields

<31>

Description

Force PO

Reversal on SBI

Read/Write

on M8219

Located

<30>

(SBHJ)

Sequence Fault

Force Write

Read/Write

Located
<29>

(SBHH)

MAINTENANCE REGISTER

NAME:

on M8219

(SBHJ)

Force Unexpected Read Data Fault

Causes transmit of SBI TAG=0, Maintenance
ID, Undefined Data, good parity for
unexpected read data in a selected nexus
Read/Write

Located

<27:23>

on M8219

(SBHJ)

Maintenance ID<4:0>

Used to force unexpected
Read/Write

Located on M8219

22>

Force

SBI

(SBHJ)

read data
(SBHH)

Invalidate

Forces writes done by CPU on SBI
become cache invalidates
Read/Write

Located
<21>

Enable SBI

faults

on M8219

(SBHH)

Invalidate

Allows SBI writes to invalidate cache
Must be =1 for normal operation
Read/Write

Located
<20:17>

on M8219

Reverse Cache Parity

3-44

(SBHH)

ID BUS REGISTER BIT CONFIGURATIONS

Group

Reverse

Parity

Byte

Group

Byte

Address
Address

Group

Byte

Address

Group

Byte

Address

Group

Byte

Address

Byte

Address

Group

Unused

Group

Byte

Data

Group

Byte

Data

Group

Byte

Data
Data

Byte

Group

Byte

Data

Group

Byte

Data

Group

Byte

Group

Byte

Data
Data

Read/Write

<16:15>

Located

Cache

Miss

Force

M8219

(SBHH)

miss forced
Force miss Group

1
1

Force

miss
Force miss

Group

Groups

0,1

Read/Write

Located

<14:13>

Cache

<16> M8219
<15> M8218

(SBHH)
(SBLH)

Replacement

Group

1
1

0
1

Group 0 always
Undefined

Random

always

Read/Write
Located

<12>

Disable

M8218

(SBLH)

SBI

When

set,

SBI

cycles will

Read/Write
Located
<11>

Force

M8218

Reversal

Read/Write

3-45

(SBLH)

SBI

started

ID BUS REGISTER BIT CONFIGURATIONS

Cache

(SBLH)

on M8218

Located
<10:09>

Match
10=1 Group 1 Cache match
09=1 Group 0 Cache match
Read

Only

<08>

Force

(SBLH)

on M8218

Located
Timeout

timeouts

read

Forces

Read/Write
Located on M8218

1lE

ID#:
Bit

CACHE PARITY ERROR REGISTER

NAME:

Fields

<15>

(SBLH)

Description
Any

Error

Set when cache parity error on CP or

read

operations

Read/Write 1 clears entire
Located on M8218 (SBLH)
<14>

Error

When

error

When
IB

set

reference caused

Read

are

bit

and

set,

reference

clear,

error

Only

Located
Data

bit

and

bits

caused

<13:06>

Parity

on M8218

(SBLH)

O.K.

If Set Parity 0.K.,
meaningful

bit 15 must be set for

info.

Parity

Group

Byte 0

CDM

l O

l 2

3-46

the

ID BUS REGISTER BIT CONFIGURATIONS

Read

Only

Located

M8218

<13:8>

<05:00>

Address

Parity 0.K.

If Set Parity 0.K.,
meaningful info.
5

Parity
"

2 )

Bit

CAM
[

must

set

Byte

Group

]

11}

|1}

Only

on ‘M8218

(SBLF)

USTACK

NAME:

Fields

<15:00>

bit

Located

Read

ID#:

(SBLH)

(SBLF)

<7:6>

Description

Reading pops top address from micro stack

Writing

pushes

<15:00>

address

= Control

on micro
Store

stack

Address<15:00>

Read/Write
Located

ID#:
Bit

<12:00>

Data

used

stopping

compare micro
system

Read/Write
on

Located

ID#:

22
Fields

<15>

(USCD)

Description

Bit

M8235

UBREAK

NAME:

Fields

NAME:

WCS

clock

M8235

when

for

scope

SOMM

set

(USCD)

ADDRESS

Description

Invert

Parity

When

set

inverts

WCS

parity

Read/Write
Located

M8235

3-47

(USCD)

sync

for

ID BUS REGISTER BITV CONFIGURATIONS

<14:13>

Modulo

Counter

used

quantity of WCS

point

which

written

Read/Write
Located

<12:00>

Control

Store

Use

M8235

(USCD)

Address

WCS

for

writing

Read/Write
Located

ID#:
Bit

WCS

NAME:

Fields

M8235

(USCD)

DATA

Description

<31:00>

Data

<07:00>

Number

Used to

of WCS

write

data

Boards

into

present

0=1

0-1K

Present

1-2K

2-3K

3-4K

4-5K

5-6K

6-7K

7-8K

<31:8>Write

Only

<7:0>Read/Write
Located

M8233

3-48

(WCSB)

WCS

bit

ID BUS REGISTER BIT CONFIGURATIONS

ID#

NAME

POBR

P1BR

SBR

All

Registers

KSP

<31:24> M8230
<23:16> M8230
<15:08> M8231

ESP

<07:00> M8231

2A
2B

SSP

<31:00>
CEHN
CEHM
ICLR
ICLP

UsSp

ISP

2D
2E

FPDA
D.SY

Q.SY

30
31

33
34

T3
T4

Registers
Are

36
37

T6
T7

SCBB

POLR
P1LR

SLR

Are

thru

PCBB

3-49

CEHK,

2F
A

temps

ICLL

stored
on

All

then

stored

CEHK,

registers
Read/Write

temps

ICLL

Q BUS SIGNAL DESCRIPTION

I/0 Transfer Control Signals

Name

Description

BSYNC L

Synchronize - The bus master (LSI-11 processor) asserts BSYNC L to indicate that it has placed an address on BDAL <15:00> L. The transfer is in

progress until BSYNC L is negated.

BDIN L

Data Input - The LSI-11 asserts BDIN L for two types of operations:
1.

When it is asserted during BSYNC L time, BDIN L
specifies an input transfer with respect to the processor. It requires BRPLY L as a response. The processor asserts BDIN L when it is ready to accept data
from the slave device.

When the processor asserts BDIN L without BSYNC
L, it is requesting an interrupt vector from an interrupting device.

BDOUT L

Data Output - When the LSI-11 processor asserts BDOUT L, valid data is

on the bus for an output transfer from the processor to an I/O slave device.
The slave device deskews BDOUT L (pauses) before latching the data. The
slave device responding to the BDOUT L signal must assert BRPLY L to

complete the transfer.

3-50

Q BUS SIGNAL DESCRIPTION

I/0 Transfer Control Signals
Name

Description

BWTBT L

Write/Byte — The LSI-11 processor uses BWTBT L to control bus cycles in
two ways:

The processor asserts BWTBT L on the leading edge
of BSYNC L to indicate that an output sequence
(DATO or DATOB) is to follow.

The processor asserts BWTBT L together with
BDOUT L, on a DATOB cycle, for byte addressing.

BRPLY L

Reply - A slave device asserts BRPLY L in response to BDIN L and
BDOUT L on data transfers and in response to BIAKO L during interrupt
transfers. BRPLY indicates that the slave has asserted input data on the bus,
accepted output data from the bus, or asserted an interrupt vector on the
bus.

BIRQ L

Interrupt Request — A device asserts this signal when its interrupt enable and
interrupt request flip-flops are set. BIRQ L informs the processor that a
device has data to send to the processor (input) or that the device is ready to
accept output data from the processor. If the processor’s PS word bit 7 is 0,
the processor responds by acknowledging the request, asserting BDIN L and
BIAKO L.

Interrupt Control Signals

BIAKO L

and BIAKI L

Interrupt Acknowledge Output and Interrupt Acknowledge Input - The processor asserts this signal in response to an interrupt request (BIRQ L). The
processor asserts BIAKO L which is routed via the Q bus to the BIAKI L pin
of the first device on the bus. If this device is requesting an interrupt (asserting BIRQ L), it will block the passing of BIAKO L to the next device and
then place the interrupt vector on the bus. At the same time the device will
negate BIRQ L and assert BRPLY L. If the device is not asserting BIRQ L, it
passes BIAKI L to the next device via its own BIAKO L pin and the BIAKI
L pin of the lower priority device.
Address and Data Signals

BDAL <15:00> L

These 16 lines form the data/address path. Address information is first
placed on the bus by the bus master (processor). The processor then either
receives input data from or transmits output data to the addressed slave
device or memory location over the same 16 bus lines.

BBS7 L

Bank 7 Select - The bus master asserts BBS7 L when an address in the upper
4K bank (address in the 28K-32K range) is placed on the bus. BSYNC L is
then asserted, and BBS7 L remains active for the duration of the addressing
portion of the bus cycle.

3-51

Q BUS SIGNAL DESCRIPTION

Initialization, Power Fail Signals
Name

Description

BPOK H

Power OK - The power supply asserts this signal when primary power is
normal. If BPOK H is negated during processor operation, the processor
initiates a power fail trap sequence.

BDCOK H

BINIT L

DC Power OK - The power supply asserts this signal when there is sufficient

dc voltage available to sustain reliable system operation.

Initialize - The processor asserts BINIT L to initialize or clear all devices

connected to the Q bus. The signal is generated in response to a power up
condition (the negated condition of BDCOK H).
Halt and Refresh Signals

BHALT L

Processor Halt - When BHALT L is asserted, the processor responds by
halting normal program execution. External interrupts are ignored, but
memory refresh interrupts are enabled if W4 on the processor module is
removed. When the processor is in the halt state, it executes the ODT microcode, invoking console device (terminal) operation.

BREF L

Memory Refresh - This signal can be asserted by a processor microcodegenerated refresh interrupt sequence (when enabled) or by an external device.
BREF L forces all dynamic MOS memory units to be activated for each
BSYNC L/BDIN L bus transaction.

3-52

CIB Q BUS REGISTERS (LOWER)

QBUS
1D BUS
ADDRESS ADDRESS

163\

173

(163

173

163
173
<163)

173

(‘63>

173

163

173 )

(04)

000 ROM 0 I
002 ROM 1 I
044SPAREI

ROM 0 DATA <15:0>

15
15

006 ID

012 SPAREI

173 / 014 RX DONE

016TX

I R/O

SPARE

9
1T|ME

ID DATA <15:0>

1 R/O

010 1D

DATA HI [

READY

—I R/O

ROM 1 DATA <15:0>

DATA LO [

163

(069 (}gg)

ID DATA <31:16>

IR/O
0

SPARE

|0 =

)

|0 =

DNE

IRDY

ITIME ouT

- 0|

R/W

OIR/W

*START ADRS DETERMINED BY
JUMPER W1 ON M8236. SEE PAGE

CiBB OF M8236 PRINTS FOR
JUMPER DEFINITION’
TK-0204

3-563

CiB Q BUS REGIST ERS (UPPER)

ID BUS

ADDRESS

QBUS

ADDRESS

(05)

G‘;g) loDzoL(T)o |

(05)

<}§g> o HI

(05)

C‘;g} D LO [

(07)

1‘732

(07)

163 030 ID C/S [
173>

022 TO

I R/W

J R/W

TO ID <31:16>

[

J R/O

EM ID <15:0>

024 FM

J R/O

EM ID <31:16>

?SGHTM r
15

TO ID <15:0>

NVERTED)

RCV ID ADDRS <5:0>

CYCLE

J R/W

.
ID ADDRS <5:0>

MAINT
ID
WRITE

RCV
WRITE

QBUS

<173 032 MCR
163

—

ADDRESS

DISAB

ENAB

UPC12

REQ
14

<0->

STPD
06

(o) wimes LA T LA T T T ]

SBC

FREQ

CLK

ROM

NOP

163

RUN

FLPY

BOOT

MOTE

HALT

DNE
IE

V BUS SER CHNL <7:0>

LOCK

STATE

RE-

CNSL

RDY

CMND

PROCEED

STS

SOMM | FREQ
<1>

MAINT | STAR
INTR
RET

HLT

163
173 ) 036 V-BUS

I/Vll/lllllllllllljw
CPU
RESET

AUTO
RST

l
SLFTST

CPT
0

CPT
2

CLK

\%
LOAD
TK-0205

3-64

ARBITRATION

TR <15:00>
INFORMATION TRANSFER

P <1:0> (PARITY)

TAG <2:0> (TAG)

ID <4:0> (IDENTIFIER)

M <3:0> (MASK)

B <31:00> (INFORMATION)

{/{/vvv {/

SBI CONFIGURATION

RESPONSE

TRANSMIT/

CNF <1:0> (CONFIRMATION)
CONTROL

RECEIVE

NEXUS

UNJAM

FAIL
DEAD

ST T

NEXUS

RECEIVE

FAULT

TRANSMIT/

INTLK (INTERLOCK)

CLOCK (6 LINES)
INTERRUPT REQUEST
REQ <7:4> (REQUEST)
ALERT

MP1-2

SPARE (2 LINES)

TK-0077

3-65

SBI PARITY FIELD CONFIGURATION

I
P1 | PO

l FIELDJ rFIELDJ rER F'Ed [ F|ELD4J r
PARITY

—_— )
P <1:0>

TAG <2:0>

DENTI

ID <4:.0>

M <3: 0>

INFORMATION FIELD
B <31:00>

J
J

COMMAND FORMAT

FUNCTION
FIELD

ADDRESS
FIELD

F <3:.0>

A <27:00>
TK-0166

3-b6

SBI FIELD DESCRIPTION

Description

Field

Arbitration Group

Arbitration Field
[TR (15:00)]

Establishes a fixed priority among nexus for access to
and control of the information transfer path.

Information Transfer
Group

Information Field
[B (31:00)]

Bidirectional lines that transfer data, command/address, and interrupt information between
nexus.

Primary function: encoded to indicate a particular byte
within the 32-bit information field [B (31:00)].

Mask Field

[M (3:00)D]

Secondary function: in conjunction with the tag field,
indicates a particular type of read data.
Identifies the logical source or destination of informa-

Identifier Field
[ID (4:0)]

tion contained in B (31:00).

Tag Field
[TAG (2:0)]

Defines the transmit or receive information types and
the interpretation of the content of the ID and informa-

Function Field

[F (3:0)]
Parity Field

[P (1:0)]

tion fields.

Specifies the command code, in conjunction with the tag
field. This field is part of the 32-bit information field.
Provides even parity for all information transfer path

fields.

Response Group

Confirmation Field
[CNF (1:0)]

Encoded by a receiving nexus to specify one of four re“sponse types and indicate its capability to respond to the

Fault Field
(FAULT)

A cumulative error line to the CPU that indicates one of
several errors stored in the transmitting nexus fault register, and the associated SBI cycle in which the error

transmitter’s request.

occurred.

3-57

SBI FIELD DESCRIPTION

Field

Description

Interrupt Request
Group

Request Field

Allows a nexus to request an interrupt to service a condition requiring CPU intervention. Each request line
represents a level of nexus request priority.

Alert Field
(ALERT)

A cumulative status line that allows those nexus not
equipped with an interrupt mechanism to indicate a
change in power or operating conditions.

Control Group

Clock Field
(CLOCK)

Fail Field
(FAIL)

Dead Field
(DEAD)

Six control lines that provide the clock signals necessary

to synchronize SBI activity.

A single line from the restart nexus to provide a restart
signal to the CPU to initiate a system restart operation.

A single line to the CPU to indicate an impending clock
circuit or SBI terminating network power failure.

Unjam Field
(UNJAM)

A single line from the CPU to attached nexus that in-

Interlock Field
(INTLK)

A single line that provides coordination among nexus
responding to certain read/write commands to ensure
exclusive access to shared data structures.

itiates a restore operation.

3-68

LLl

[

0902£0082 0L08E30082 0800%7002 00$5T0082 0Z08910082

30s8a0¥a1048Sy 0T0Ys0D2Ia0Sy0Aa0H2dy 4L1 70SNOD

o)0b00820082

b1 0 0210 2 | 0 0,0 8

/5]

-2<oc
][

SBI INFORMATION TRANSFER FORMATS

READ DATA FORMAT
TAG

CORRECTED READ DATA FORMAT

MASK

TAG

|P1P0I0 0 ol

DATA BITS

lo 00 o]

["1!’0]0 0 OI
D

Io 00 1}

READ DATA SUBSTITUTE FORMAT
TAG

|P1P0|0 0 OI

MASK

]

1D ) ](?071 Ol

INTERRUPT SUMMARY RESPONSE FORMAT
MASK

IP1POIOOOI

IOOOOI

IOI

COMMAND ADDRESS FORMAT FOR READ MASKED
TAG

IP1P0101 1]

MASK

FUNCTION

l« e lo 00 1[

ADDRESS BITS

]

ADDRESS BITS

]

ADDRESS BITS

]

COMMAND ADDRESS FORMAT FOR WRITE MASKED
TAG

lP1POIO1 1]

MASK

FUNCTION

l~ .. -lo 01 ol

COMMAND ADDRESS FORMAT FOR INTERLOCK READ MASKED
TAG

IP1POIO 1 1|

MASK

FUNCTION

LR ~l0 10 Ol

COMMAND ADDRESS FORMAT FOR INTERLOCK WRITE MASKED
TAG

MASK

FUNCTION

|P1Po|01 1| ID I« . _- . Io 11 11

ADDRESS BITS

]

ADDRESS BITS

]

DDRESS BITS

COMMAND ADDRESS FORMAT FOR EXTENDED READ
TAG

IP‘ POlO 1 11

MASK__FUNCTION

l— - —l1 00 o]

COMMAND ADDRESS FORMAT FOR EXTENDED WRITE MASKED
TAG

lP1POIO1 11

MASK

FUNCTION

l .. .l1 01 1l

WRITE DATA FORMAT
MASK

[P1Po|1 0 1| ID

l«- .. l

BYTE 3

BYTE 2

BYTE 1

BYTEO

INTERRUPT SUMMARY READ FORMAT

]

MASK

IP1P0|110]

]oooolooooooooooooooooooooooool H I Ioooo
e

——

REG <7:4>
TK-0723

3-60

SBI

FAULTS

313029282726 2524232221201918 1716151413 121110 09080706 050403 02 0100

PWR |OVR

000X XXXX

MEMORY

DWN|TMP

001 00000

MBA

PWR

001 00001

001 00010

001 00011

PARITY FAULT

WRITE SEQUENCE FAULT

UNEXPECTED READ DATA FAULT

INTERLOCK SEQUENCE FAULT

MULTIPLE TRANSMITTER FAULT

001 00111

TRANSMITTER CURING CYCLE THAT

001 01000

CAUSED FAULT

001 01001

001 00100
O

001 00101

NO”

FLT FLT

001 00110

POWER DOWN

001 01010

POWER UP

001 01011

OVER TEMPERATURE

UBA

FLT

I1SQ

XMT

WsQ

PAR |URD|MXT
FLT |FLT |FLT

NEXUS TYPE CODE.

TK-0695

3-61

SBI SIGNALS, BACKPLANE PINS

CIATS+
3-62

NflvEeSsIw903wHL1ig[o(g0z:2i€1)NS—OsI3LHOaNvS8adSaWswD3XNyEW1SW8231(49L‘:U1M€8)1(X03:G1)nEsw1‘UM1X<3o.mmwmsTO3S0snHo81uLlN4OsD®|m8oALHOWIW

cZl|mS+|N1O2JZ2S8z3HnHeEsSwI53w|>~zVESWHvd(0°:3 01)9LI3HVOd NESH xg5oA >vyRX

d'48SW e

zs ————— AHOWIN

WESW sna1(40INT°1e)SW107€) |c3
|- 21907

3-63

Sng 18S WL (0 :GL)

& ovL (0°Z)VL

=sngbS1s082nS1g1d9g3‘0sS0s3|S70=1W|/b9Tz0Z4Mvv'48101vasowio170L01L7iHSE]52eL41S10I/W900N4073O317w9DMO|doriz)33s40aJ0IH'qN2~830O0l191S|s0DO3SWw3g7°80W0|nowAuNNNvDEAa4SSsAzWWNWsD020(‘330':348O5)HQ4U!lvAdH{{00Y:%{¥mH)0)°_O1m)DwA123N71OJV198HI40S1N7WHNW'OO3DD8W3S0aWwN0ENS3WN1EAS03WV41aNlI03l(4o0:vL)511g}W{Aoa0OVi:HH14Y€)]NEswLWXal(0%)z5»A®LivdM|swWL>@=4=N{0O:W1)&z
MEMORY BLOCK DIAGRAM, PART 1

m2QP=snaSsnn78g411%44SW44NN(tI0:€)___w99F44NmNSONDW_m__Es_LAgdsw‘onen)|99(4401NN:DD€19Ds3344svV8wvxnw|_\_|HOlL.V__a1an-Sowv1iv2a2018S93’N0y81—

e> INOW43INOWIWNIOW|dHvAHY1S010:518)WOH1vQa/80;/l2 —o

>-Zsn8wo7z4Sow4N9m4lw_I_uNawIo7"_0mHP:_LIsNwDHOaO4mDd1NvVDa1aEvmw__n_dfl_wJOHLINOD=-_5\3A053308053a\vlva~—‘s0naEN:SLEONW_1Svo.afipm.a_ldIvaw11iaLvwaWXOcVSolND8;[(1m0:E¥1)_AS(O0OWV1L:€7 L'o1aw(07:LeT’'0N:LEN)

sna 14 4NI (0 :1€)91907 —

L/\ 380M1S®$ NIWILBO
1AW

d'qLaw N39

_LAX

S'Q"ONOW

s[7S0n°4g0W)"

|Ie3NgyO(WLO0SH

sSns8 14 4NI (0 :1€)

{AIH1N0A:OYGWV1)

172

N'WNOW

H-HLAW

3-64

H-HLOW

sng SOW 1va (o n:ten)

3 ng 4s 83.LaW 3LaW HOLY , sHaAING snsgsowlva .
0810-24L

MEMORY BLOCK DIAGRAM, PART 2

H-HLAW

v1iva

H_OLlv1

(1s40SoN:4nLI8E)

MEMORY 1/0 DATA LOGIC

FILE INFORMATION BUS

BUS FL INF {31:00)
MCNB MUX EN 1 L
MCNB MUX EN 2 L

MCNB MUX EN 3 L
BUS FL INF

CNFG
il

CNFG REG A

CNFG

|cNEG REG B

—

v
A

REG

MCNB MUX SEL 2 L

MCNB MUX SEL 1 L
1/0 DATA MUX
STB

CNFG

REG

STATUS

CNFG REG €

SIGNALS

FROM

ADDRESS
REGISTER

MCNE MEM ADR (9:0)

OUTPUT

REG A

REG B

L
H

REG C

H
X

ROM BOOT
_

BOOTSTRAP |MCNL ROM DAT (31:00)

> ROM

ENB

MCNA ROM EN L—j

TK-0636

3-65

L|ll000lMXZ9E6B8J311LAA88 ll|L|O0O}|0L]|—-||——||JJIIAAGGNP88CSEEE
4L.3,I.MOS03dLVdONI1A4N3I7HV3IMOd dN

ddAL

AHOW3IN

vHOA dIHO

QH431SI93Y

.L1S4OAVIvHL3,9TMO

SHALOlnHI"dHV3d

3-66

OLLLO-AL

L]
L
R
E
F
T
F
R
F
L
T
T
E
F
L
L
JLIHMVILVA3ON3INDIS17Nv4
—NSIIAHVHLIMATOH(INN3AITLOV1LNH8II9STvYLH3MiI7dO8Lm¥VLN)YNI.NI1|3),A01IO0SAN0AVIVIANH3TONVIHNHAMIZ‘IQLSH3NAILI3A1V‘M8I<S0TIV:HTzI1H>LvISNaLLIN1H8I34SNVH1
MEMORY CONFIGURATION REGISTER A

|I3M0OAGL[ANA9]OP—,0ES}C |3IJ0OlL1PA8A]—9E8|JMlL0i8A1gAIM—eE}oe

R AHILIVE

0 10¢0 L

IHL AHOWIW

43I1NNOD

3H7O9AVLIHELHMAHONWI3LIYWVLdS3TSSO3HLANAOVD T

Ly3a7v13I4aNyBOJ3TDL7B1IZ4HO1NMIEALI89SETHV¥M€NL0OV¥NA0I5HL03I94SH0MLN03.VO88YL.0HN¥6LI0.<O,LGLNO:LI£NCZIL>EYSLNLYA1IS9LIOLLBL6LOCLT3H7OT1E49VCvSY.OTLISidLCmSIOCSN1DV8I0A333L0I4H0M4.H,LO,HOLI3L0V40V4J3HI4ONHI44H330d3HdS3IHAV
]

Sav3ySAVM1Y0 oz.w@fl.fi%@ONILYVLSSSIHAAYSINOY9J1A9

370100S¢NOD S 3¥04A¢a v Y431S1934 8
1S30V8d3A98

1SNIN.3890HOdJ08/LSIN

.L0SO3,VIldH,3AMd.1SYO3HLIV0vlH,391LM0 .31SV0L3I1H.83,LM

S3I4VvAN Oog

MEMORY CONFIGURATION REGISTER B

]¥**

dSNMLoVv1dS 14v01S31]02| JL1ITdN]ODZNI|LVOiVAaldvA

3-67

|JA2€HVZOHWIL3SIYW

8LLOML

g
=

LSNIN D08ZSW IHL08LLL IWVS IHL NO

YLLOAL

3DIAHIS DO HOH YA

3-68

51 AYVO0 0 1

8198H1v8l<i08<'s0E<>:0)L:IeTS>>VW
<0¥>aliss
HWVFrNN18s
18l9S180S3y<0<0::S€L>>
igs18S Mav3iaJ0THILNI

LN FHI

3480 <0 :L€>
|

[}

ale

IvNn AD3H gl

snaINn

dvand

IVN ELZBIN

sng1noYa<¥:£>(NI'sne)

188

198

IN A

30Vvd

)

‘avalgs WVYIN

3-69

]

das

‘daOgN

van - 3SLvaEn

aLvis

SNEINN

! van HJIi907MOd TIvd4d SSNNABIINNNN 007190Va

sngiNN
lnosng

VLEO-ML

QaNV ————SN H1Ni NI SNE) {LNO
snaY9vsLNOSA8) N1

SNEINN
sSNng NI

-TO—HL—NOoD

{HSINdN'8SOna)

WVFN 'av3aies

ad3aysvols aANSvYW

da Wvd
SH3ILJIHS

3Hol1S

21907 HIMOJ30Ad03NaS'0710V0_dVINS 3HA YJONVYH

<80BI:SLNEg>

H3ILNNOD

AWN Al <0 :ie>

93Y 93d

NT3sas [ oudin I}<0:€> vWa sSNaiN SN8——]¥OVSNISNA){LNO
N

300034

SN8INN

asngiNn{_<o0:IgN1O>D SNiV1is aiNvy "SH.AuO_wX]wTSmM_NoEwHESNNIAI<NpN:L2><(0L:N1O>sN8)

1TOHINeGD|me<rze:§a>ea!vNdOaIyLVYIdOK|mlo._ mDm_Z|_DJSJONHL1IINNlGvSan Y<5 -{sn<a_n(0an0vno:uo2)1>
AN ¢LZ8IN

aav

ISN 0LZ8W
<p:L>0V3H
ADH NSV

UBA (DW780) BLOCK DIAGRAM

188

ON 4 ASYIN JQOIN3

8LOZ8NW

UBA ADDRESS SPACE AND C/A FORMAT

SBI C/A Format for UBA Register Access

(SBI ADDRESS)

l <3:0> ‘ <3:0> | l l I l l‘ ll ll l l |NUMBER |l
MASK

FUNC

TK-032d

Base

SBI

TR
Num

Address
(Physical

SBI
Address

TR
Num

Address
(Physical
hex)

Address
(hex)

20002000

8000800

20010000

8004000

10
11
12
13
14
15

20014000
20016000
20018000
2001A000
2001C000
2001 E000

8005000
8005800
8006000
8006800
8007000
8007800

Base 10

2
3
4
5
6
7

hex)

20004000
20006000
20008000
2000A 000
2000C000
2000E000

Base 10

(hex)

8001000
8001800
8002000
8002800
8003000
8003800

20012000

8004800

Byte

UBA
Reg

Address
(Physical
hex)

CNFGR | 000

UBACR | 004

UBA
Reg

001

005
006
007

.
.
.
.
Reserved | 7EC

000

008
00C
010

002
003
004

BRSVR 0 | 020
BRSVR 1 | 024

008
009

UBASR
DCR
FMER

Byte

Address
(Physical
hex)

SBI
Address
(hex)

O1E
OlF
020

800
804

200
201

.
.
.
.
EB8
MR 494
EBC
MR 495
Reserved | ECO
.
.
Reserved | EFC

3-70

078
DPR 14
07C
DPR 15
Reserved | 080

MR O
MR |

00A
00B
00C
00D
00E
00F
010
011

SBI
Address
(hex)

.
.
1FF
.
.
3EE
3EF
3FO0
.
3FF

SBI TO UNIBUS CONTROL ADDRESS TRANSLATION

SBI COMMAND ADDRESS FORMAT

031

28272625242322212019181716
15

FUNC
l MASK
<3.0> |I <3.0>
|1 0 ololo'o o[o,po[al

———

UNIBUS

CONTROL
AND

UBA UNIBUS

ADDRESS DECODE

UBA NUMBER

—l

—

UBAO

— 0

UBA1

LONG WORD ADDRESS

UsAZ — 1.0
UBA3 —— 11

BYTE ADDRESS
ENCODER

UNIBUS

CONTROL

ADDRESS

L
C <1:.0>
|

210

UNIBUS ADDRESS BITS <17:02> I fl
UA

<17:00>

TK-0049

3-71

UNIBUS TO SBI ADDRESS TRANSLATION

UNIBUS CONTROL ADDRESS

BYTE WITHIN PAGE

_J\

MAP REG NUMBER

[

MAP
REG
NUMBER

UNIBUS TO SBI
ADDRESS

TRANSLATION
MAP

—SBI PAGE ADDRESS—
(PAGE FRAME NUMBER)
(21 BITS)
l

9
2

4
5
6

[o—

.
494
495

SBI COMMAND ADDRESS

FUNC

MASK
ENCODE

0131

MASKl FUNC l

SBI PAGE ADDRESS (PFN)

LONG WORD ADDJ
TK-0151

3-72

m>_mommAQV3HI-H'SHNOE'IHNSo_wodl]_d“in!.gmm{(8an)SN8iINJSNEBIN31LY da8a31v1S

—AvIH'HO4NDHOA1SNdIH Ibaésio3as| mmu_wzxm&.:}zo

3-73

21901

LaNvaLydNHY3le-AHVNINS (LA1dVsNn3)HHH3I1L9N0I7AHYWIN S

"HOINDHOG 1SNH318193YS380HLS

{8an)

Jouino |
waisioay |
¥3@023d 21907

N (aon)

1L[N3NNIOA3OOIN81IIILs3SO2L2LV0VN1VVI349VIHNHH0HWoLI7|HLILIINgINHNOOYDD3Q3J‘1ALVH11IdH3aHM0M‘-3HIH4SAN'IINHHLNa'ASYi'VIEHIu3NdWOmHUL.'.VU1VA¥YSE0H.NEd[L(83(NNSL1a(sIIN0O3sIvn8Nna})LNn)Iev2S—3NS4H3NaO(830VS0y)SNL)HT,SINNHIOIOD0IeY(3LLSYN|(L03s3v1dLHY3n9NOLS1a{H8)0YLY(00uI7013H3avLIHN4d)dS)A13iYN(uSaWIG[[H —daA_2vQO31Hva93d0H7VVi.viavaol_v“lasSonaNHfioiOdn%l1VfIL3dNiN4o#aN3fLHvlVdfYl_V%(82if11Nviv9nNd0|—)O71I_1LNILYf|__{HNg3OoIInOL)NOINNYDLISSNIOHIWN’dVSWY(9I8N1N0AA9ONIH0()NI1NaLvOwSnI3I)L2DN1IIAYL33I0LVVLSsJOnVa4IHNInALNIUSN|EINNo
WITHIN THE UBA

SIMPLIFIED FLOW OF MAJOR CONTROL FUNCTIONS

S0C0-ML

195

_gsn1a

‘UBA REGISTERS

UBA CONFIGURATION REGISTER, BIT CONFIGURATION
313029282726

2322

76543210

181716

VR
i

UNIBUS ADAPTOR CODE

UNIBUS INIT COMPLETE
UNIBUS POWER DOWN

UNIBUS INIT ASSERTED
ADAPTOR POWER UP
ADAPTOR POWER DOWN

TRANSMIT FAULT

MULTIPLE TRANSMITTER FAULT
INTERLOCK SEQUENCE FAULT
UNEXPECTED READ DATA FAULT
WRITE SEQUENCE FAULT
PARITY FAULT
TK-0119

UBA CONTROL REGISTER, BIT CONFIGURATION

6543210

3130292827126
4132|110

"D"l'gz REGISTER
BLE BITS

INTERRUPT FIELD SWITCH
BR INTERRUPT ENABLE

UNIBUS TO SBI ERROR INTERRUPT ENABLE
SBI TO UNIBUS ERROR INTERRUPT ENABLE

CONFIGURATION INTERRUPT ENABLE
UNIBUS POWER FAIL
ADAPTOR INIT
TK-0120

3-74

UBA REGISTERS
UBA STATUS REGISTER, BIT CONFIGURATION

27262524

109 876543210

BRRVR 7 FULL

BRRVR 6 FULL
BRRVR 5 FULL
BRRVR 4 FULL
READ DATA TIMEOUT

READ DATA SUBSTITUTE

CORRECTED READ DATA

COMMAND TRANSMIT ERROR
COMMAND TRANSMIT TIMEOUT
DATA PATH PARITY ERROR
INVALID MAP REGISTER

MAP REGISTER PARITY FAIL

LOST ERROR BIT

UNIBUS SEL TIMEOUT

UNIBUS SSYN TIMEOUT
TK-0121

UBA DIAGNOSTIC CONTROL REGISTER, BIT CONFIGURATION

UNUSED

r"A‘\

313029282726

UNUSED

r—A'\

24232221

1918

UNUSED

1615

N
8 7

SAME AS CONFIGURATION REGISTER BITS <23:00>

MICROSEQUENCER OK

SPARE

DISABLE | DEFEAT
INTERRUPT | DATA
PATH
PARITY
DEFEAT

TK-0055

P;T:;'T'Y

3-75

UBA REGISTERS

UBA FAILED MAP ENTRY REGISTER, BIT CONFIGURATION
0

9 8

31
UNUSED

\—

MAP REGISTER NUMBER
TK-0056

UBA FAILED UNIBUS ADDRESS REGISTER, BIT CONFIGURATION

16 15

UNUSED
——

—

FAILED UNIBUS TO SBI ADDRESS
UNIBUS ADDRESS BITS <17:02>

TK-0057

UBA BUFFER SELECTION VERIFICATION REGISTER, BIT CONFIGURATION
0

16 15

)

UNUSED

v—

TEST DATA
TK-0054

3-76

UBA REGISTERS

UBA BR RECEIVE VECTOR REGISTER, BIT CONFIGURATION
31 30 29 28127 26:2524.23.22 212019 18 17 16 1514 13 12 1110 09 08 07 06 05.04 03 02 01 00

IIIIIIIHlllllllllllllllllllll|I|
.

ADAPTOR INTERRUPT REQUEST INDICATOR

—

UNIBUS DEVICE INTERRUPT VECTOR
TK-0092

UBA DATA PATH REGISTER, BIT CONFIGURATION

16 15

2423

31302928

UNUSED
.

]

BUFFER [gfi_}l’fi

NOT
EMPTY

BUFFER STATE BITS BUFFERED UNIBUS ADDRESS (2-17)

FUNCTION

BUFFER

TRANSFER
ERROR

TK-0053

'UBA MAP REGISTER, BIT CONFIGURATION
0

212019

27262524

3130

UNUSED

~—
SBI PAGE ADDRESS

P ‘L

‘

\___Y_J
RESERVED

AND

ZERO

MAP

BYTE

OFESET

VALID BIT

BIT

LONGWORD

ACCESS

ENABLE

DATA

PATH

DESIGNATOR
ADDRESS
BIT 27

I/0 DESIGNATOR

3-77

TK-0052

UNIBUS CONFIGURATION

A00-17 (ADDRESS)

D0O0-15 (DATA)

CO-C1 (CONTROL)

MSYN (MASTER SYNC)
SSYN (SLAVE SYNC)

PA-PB (PARITY)
DEVICE

BR4-7 (BUS REQUEST)

UBT

BG4-7 (BUS GRANT)

NPR (NONPROCESSOR REQUEST)
NPG (NONPROCESSOR GRANT)

SACK (SELECTION ACKNOWLEDGE)
INTR (INTERRUPT)

BBSY (BUS BUSY)
INIT (INITIALIZE)
AC LO (AC LINE LOW)
DCLO (DCLINE LOW)

TK-0085

3-78

UNIBUS SIGNAL DESCRIPTION

Signal Line

Description

Data Transfer Group

Address Lines
[SA (17:00)]

These lines are used by the master device to select the
slave (actually a unique memory or device register address). SA (17:01) specifies a unique 16-bit word; SA00
specifies a byte within the word.

Data Lines
[D (15:00)]

These lines transfer information between master and
slave,

Control (C1, CO)

These signals are coded by the master device to control
the slave in one of the four possible data transfer operations specified below. Note that the transfer direction is
always designated with respect to the master device.
Data In (DATI): a data word or byte transferred into .
the master from the slave.
Data In Pause (DATIP): similar to DATI except that it
is always followed by a DATO/B to the same location.
Data Out (DATO): a data word is transferred out of the
master to the slave.
Data Out Byte (DATOB): identical to DATO except a
byte is transferred instead of a full word.

Parity A-B (PA, PB)

These signals transfer Unibus parity information. PA is
currently unused and not asserted. PB, when true, indicates a device parity error.

Master
Synchronization
(MSYN)

MSYN is asserted by the master to indicate to the slave
that valid address and control information (and data on
a DATO or DATOB) is present on the bus.

Slave

SSYN is asserted by the slave. On a DATO it indicates
that the slave has latched the write data. On a DATI/P
it indicates that the slave has asserted read data on the
Unibus.

Synchronization
(SSYN)

Interrupt (INTR)

This signal is asserted by an interrupting device, after it
becomes bus master, to inform the UBA that an interrupt is to be performed, and that the interrupt vector is
present on the D lines. INTR is negated upon receipt of
the assertion of SSYN by the UBA at the end of the
transaction. INTR may be asserted only by a device that
obtained bus mastership under the authority of a BG
signal.

Priority Arbitration
Group
Bus Request (BR7-BR4)

These signals are used by peripheral devices to request

Bus Grant (BG7-BG4)

These signals form the CPU and UBA response to a bus
request. Only one of the four will be asserted at any
time.

control of the bus for an interrupt operation.

3-79

UNIBUS SIGNAL DESCRIPTION

Signal Line

Description

Priority Arbitration
Group (Cont)
Nonprocessor Request
(NPR )

This is a bus request from a device for a transfer not
requiring CPU intervention (i.e., DMA).

Nonprocessor Grant
(NPG)

This is the grant in response to an NPR.

Selection Acknowledge
(SACK)

SACK is asserted by a bus-requesting device after having received a grant. Bus control passes to this device
when the current bus master completes its operation.

Bus Busy (BBSY)

BBSY indicates that the data lines of the bus are in use.
Itis asserted by the Unibus master.

Initialization Group
Initialize (INIT)

This signal is asserted by the terminator board (UBT)
when DC LO is asserted on the Unibus, and it stays
asserted for 10 ms following the negation of DC LO.

AC Line Low (AC LO)

This is an anticipatory signal that warns of an impending power failure. AC LO initiates the power fail trap
sequence and may also be issued in peripheral devices to
terminate operations in preparation for power loss.

DC Line Low (DC LO)

This signal is available from each system power supply
and remains clear as long as all dc voltages are within
the specified limits. If an out-of-voltage condition occurs, DC LO is asserted.

3-80

II.suNVlVdp||osnA1ANq0A1jOrYedDjo|1juoed1+1d0dn1pdoul1144d||H1s0O1g0V3140V1vd0sV 114Add||TTSNIAVSWTTSNIAVSW

uI4T11TIATDQ099VHaAgVVVv|||AT1T1pYLS0€+7159Ni86,[2eIe+00upN1ad0d4duOIiegY¥igD|A1L4€11I§0SL20L+6s892PNdQ4+001a[I1eddy4OuTIsIYipNgDOIOd 1TIC1ITc1udSL0¥vA4oAngNVYddvV|||AATHA1p95SNIAiNNL[4dee+SON9DNup9IsEVuOdgOO4NiedSYgYYlgDDD|||+MAAALd41W1L0OSINSVv95EP0d:39TVEN+4a[|L4e+dOSI9OguATYSpdI1YTi¥ONSDTIDyIH+OAddNAIOVE T1tc9TI1u1zuNrsH7i4dG4gdYA|||1T1T1pLS9EI086i29L[€ee0110upVsVVuieSl§ 1€T61TT1022I45¥E89L9PLV301I0IJOeYVVVT1uIdpiPsO
1TTANVV||TT11v4€5V1daQ 11TV4v5€1dd T<14a79||A1HNvy04D1dO0¥Y4D|4IL1Nv0vVId1«2A*+4NS1A+3SdNOvd ItT1nlna4dd||1AAT0NNA0SOOY¥Dd||dNASA01N-S0OT¥D
STANDARD AND MODIFIED UNIBUS PIN ASSIGNMENTS

3-81

000 T1TdSI99YSMXDNYy/NTTvHXdDD 0P0Z9Y9OTV%VLLLLLLL 6222604444777000888000 Y002LZ€3JdJIAdIEEETTT0O0OTCC 86
00 dT-9TM1Y4dCHIW LUOLT3QULYSAUOD047080 d€JIETO0T

vdn00000000#dTT1S21TT1dLTLOT8d94Sd1SO11I91IOaDd9OO9dK29dA3o4WYMMT1aMdiIAaADYYY//dNdM/1O/1AYyT1MO1O2TZSvadYUMdqaBSYaHy4dW1DWOVdD1NsVCVL9PbZL0PbTO(uLIOSTovOSLuLIrLaLSSTPvTHVVrY¥iyLLLLLLjLTV9paDLeOOGaV0qLLLLoL%Vo)vTdoesSa€€8a0040J6a4o(seass83602o0X03da>d0d444d4dJ4vaHad3a1gvvda47vv)Oi077757%ovA0ro4Jp00o00J-0a8dd88888vdo4od00e0o007p0vdpueTZOJZ0APJVJp989V(ZVE2ZE¢r€LpLX2€JIId€JddISJJEIJAddIHJdIJTS1IJIJA)EEEdIE00EX€EECTTT€T3ATTT000OOHO0O0O03ZZCCTCCJTzC8ASSTYAAY|S0((Y8Xs3dOJuLHd)O)JA
ADDRESSES AND VECTORS FOR UNIBUS DEVICES

10S48NELId/NTS1

3-82

RK611

SYSTEM
UNIBUS

CONTROL AND STATUS REGISTER 1

RKCS1
15

lDI IPAR
|

CERR

READ/WRITE
08

[

J07

0403

(OCTAL)

RDY‘ IEI 0 lF4 F3 l le F1 leol77744o

ga
o

(HEX)

2013FF20

CFMT

OCLR

CTo[CDTl

DCT

PHYSICAL
oy

ADDRESS pprEss FOR

BA17

BA16}

WORD COUNT REGI§;ER
RKWC

08 | 07

r; 14 {13 (12 11 |10 [09 [ 08 | 07 OGIOS 04 103 |02 | 01 | 0O 777442
WC

[WC | WC [WC

WC{WCIWC‘WC

WC[WC| WC | WC

WC!WCIWC‘WC'

2013FF22

BUS ADDRESS REGISTER
RKBA

R/W

08 | 07

l 15 |14 l13 l12 11 lm Iog Ios 07 {06 l 05 lo4 03 loz , 01 Ioo] 777444
BA|BA | BA

|BA | BA

[BA | BA

[BA|

BA | BA|

BA | BA | BA|BA

2013FF24

DISK ADDRESS (TRACK & SECTOR) REG
RKDA

Ioloiolo

RAW

08 | 07

012|T1ITA
TA | TA

0 | 0 I 0 | SASAlSAISA
4 3
9 1 [ SA
0 ]777446

2013FF26

TK-0767C

3-83

RK611 REGISTER CONTENTS

SYSTEM
PHYSICAL

BYTE

ADDRESS

FOR UBA O

CONTROL AND STAT FUS REGISTER 2

(HEX)

RKCS2
15

lBAl

FMJ¢w04UPEhEDNEMlNflJMDflUFE OR‘IR‘

2013FF28

SCLR

DRIVE STATUS REGISTER

READ ONLY

RKDS

[

lSDA‘PW‘ 0 WRL|0 l o‘DDT

‘vvl

SVAL

‘

2013FF2A

DROT l
|

SPLSF

ERROR REGISTER
RKER

DCK‘UNSlOPdDTE\NLEI

BSEFCH‘

|COE|

04
2013FF2C

DTYE l DRPAR
1

IDAE

FMTE

ATTENTION SUMMARY AND OFFSET
RKAS/OF
14
15

F\TN lATNlATN‘ATN ATN‘ATNlATN
7

04,

OF‘OFl OF
5

| 4

2013FF2E

TK-07678B

3-84

RK611 REGISTER CONTENTS

SYSTEM

DESIRED CYLINDER REGISTER
RKDC

R/W

12§11

[OlOIOIO

0807

044

UNIBUS

PHYSICAL

ADDRESS

ApDDRESS

(OCTAL)

FORUBAO

OIOIDCIDC DC[DCIDC[DC DCIDCIDCIDC]777460

BYTE

(HEX)

2013FF30

UNUSED

moee

I 15 [ 14 l 13 I 12 | 11 l 10 I 09 l 08 | 07 I 06 l 05 l 04 | 03] 02 l 01 | 00 |777464

2013FF34

DATA BUFFER

08 | 07

DB|

DB|DB|DB|DB|

DBl

lDBlDBlDBlDB|

R/W
DB|

DB|

00
DB | DB

MAINTENANCE REGISTER 1
RKMR1

[

T
RD

[

ECCW

PCA

08 | 07

| MERD

R/W

3[2|1lol777466

Ms | MS T wms [ ms

2013FF36

MIND | DMD

GATE

WRT

PAT

MSP

MCLK

MEWD

PCD

GATE

ECC POSITION REGISTER

RKECPS

08 | 07

|eprs

[eps

[eps [eps [ eps [ Eps

[eps

[eps | eps | Eps | EPS | EPS

04|03

ECC PATTERN REGISTER

RKECPT
15

12|11

2013FF38

08 ] 07

oToToo ]] 10 l 09 l 08 | 07 I 06 l 05 l 04 | 03 l 02 l 01 loo I 777472
epT [ePT|epT | EPT|EPT | EPT|EPT

|EPT [ EPT|EPT

[EPT

2013FF3A

MAINTENANCE REGISTER 2

RKMR2
15

HER

12}

08107

04]03

MAINTENANCE REGISTER 3

RKMR3
15

J11

CITT T

T T T

RO
)03

e aoraeec

e e

TK-0767A

3-85

(V4SiD)Vdus|gdvuNg3|Mug|gvMNH3E|NSug|o)NHE|gMHE|vNH8|4N8L|g4vnnE3l||g4vnyaN3L|dN8L|4N8L|4nIeSl|4noel|gnIaSy|+80L09Z+9Y03E107

s(OHdHnS(1NiL)SvNWVi)G1sDS|wAe0LGS9aYs||wHeI%0N9a90Il|||wNe0E\2§39Y%)a0IlY|[wWNe0H1Oa94YIlY|/waoe0£a2l||w)3e0N[I3£2Tl||wg30ylN2a)||vs30N09IT{|38aOdnNYNv|INOdYIQ|||W89OaIY¥nNNiINI3Y3|||N38OaV0vNnOINlSH30|||VaHO3vLnNi19I3HY0|||NHaO1uIn9NiiV7H3||S8a9OYniNI&Y3|S8OganvNiIN&H3||&EvOaNYn/INiH3||+.wvo9oo0lt1oo0ge9,r7\«PO+PV90OVI30EELLO1ZO0Z.

7e} Jan(HnHsL0om4,nL.)wLHIuONIlOHD|3|1AALV9XSAqL4Vw0AI|HALX9Vg1NLHyVO|OL|vo1GVA1VI1aaAsVy)aTV|YoNvVAlIsaNI|IyYVIL|(A£VA9Qa1"VV|DIaH|ANzvAXVa1yvJ|TaHL|HXvLAS1iWaDvda|0VAXiQ1IvYa,XHB9XYR1§RSYWvI£-R¢NI_SI0NU S8LoL

SoM oM oM om om31A8oM om oM om oM oM oM om WILSASIVOISAHd
od oy od oY oy od oH od oH oY oy od oH oH oH oH

aswsa0v¥daov(€n418oZ926Ig5£v0l.1(0X3H) A44_d1_4_d_L+1_43n3zLo3ySLz0ya£v59Hrad3v28 0oHd]y.M0 _L_4r_-4+r_o4_r_twrrt_+r__d_—1aow omM (Ha9£0Lzgv15¢)

4« ILASSHIIHHLLS13ZSQINHOAOVVYEYN3A4T3I4NOCOLJHL

DZ11 REGISTER CONTENTS

(Z)

VH@'3LSINH4ONSILVNnMdZO

I~ISW._omewLmNI%soNag3rt,ISWLNIsngSW]31SmA0H_I43%.N.Ax_GI\—m/N3t1HODz3Y38_Y Ss1Ysv313nSLIya1ia9Av3Y
E

3-87

< 3 —1

ISW ISW

_MO3HD

4si v.1va

din

INI SNg

TYNHILNI

TYNHILNISNG(31v1S-141)

|
S
H
A
V
/
A
W
o
< | o anay—]

AXNW NVA HSI SHIAIZOIY_

‘l.ll

(SH3IAIHQ31visidl)

VTYNHIBLNNITSYNNEY(33LLNV1IS-S1Y413)1S1934

03H0 <ysl|IS'WSle{W2(\H13A9I10437N03O1D)—4dNOaD_| NOILYHH3IdWO _—XNW73d8andviHIWin>dLlnoV1>ivaXSN_WH—IW

{ar'mvd)

ISW

G1gS /28Wo3vgLlo1OoI3Sa| Y70IS|W/NsOI3LvOaNvS|WHawdLNISN8 m_%wqm_.93y13Ssu380u1s|||9e0/2o8WS/¥TN13OL01HV1S1LI1SSN9IO32Dy

18S/vaw30V43LNI
GLLOML

()£

MBA (RH780) BLOCK DIAGRAM, PART 1

MBA (RH780) BLOCK DIAGRAM, PART 2

A\ 0zLO-ML

MASSBUS

TOHLNOD)

dOW dOWN

(——

LNi sNng

Afl
j

dOW

SNESSYW

| T | AT
1Ndino

viva XNW

40N HIW

FHVANOD

01Is

SNdAGaSiVNY

NV.iIvd

JilHM

daW

3-88

dain

H3ad4N8

LISJIJ0 WO¥d
I1dsS S dY¥dA v

dNI'T

¢0

spnoj3ydeaaTgas183dsV1WbsIy93s(14bS9)dy (YWS)

3-89

MM//d
M/d

‘TVOISAHd SS3IYAAVY

gTusaT3eSo1an0rkil1jg1i3epiUiI10avA3Dn/sbp3rS1uuis8enjS3uoausi)iotp)o1a)bvdysa1y39s31I91s9(3b1341obDss)yo11byb9sy(YY4(04dS(()DYY)¥¥DA))LISIJIO0WOppYeedaasaydySAVATdTuuoo
JdLSIOJY
MBA REGISTER ADDRESS OFFSETS

M/Hd

MBA REGISTERS

MBA CONFIGURATION/STATUS REGISTER, BIT CONFIGURATION

313029282726 25

LE L

o[ | oFF T

"OVER TEMPERATURE
(NOT IMPLEMENTED)

SBI PARITY ERROR
WRITE DATA

SEQUENCE ERROR

ADAPTOR CODE

ADAPTOR POWER UP

UNEXPECTED READ

ADAPTOR POWER DOWN

DATA ERROR
MULTIPLE

TRANSMITTER DURING FAULT

TRANSMITTER
ERROR

TK-0692

MBA CONTROL REGISTER, BIT CONFIGURATION

03020100

0000|0000|0000|0000[00OOlOOOOlOOOOI I l l]
MAINTENANCE MODE
INTERRUPT ENABLE

ABORT
INITIALIZE

NOTE: ALL BITS ARE READMWRITE EXCEPT INITIALIZE WHICH ALWAYS READS AS 0
TK-0693

3-90

MBA REGISTERS

MBA STATUS REGISTER, BIT CONFIGURATION

MBA STATUS REGISTER
313029

1918171615

12 1110 0908
07

[ T Tefofooefo[e]o[o[ [ TT Te[o[ [ TTT]

DATA TRANSFER

BUSY

060504 03 020100

PROGRAMMING
ERROR

NO RESPONSE _
CONFIRMATION

NON EXISTENT
DRIVE

CORRECTED ______
READ DATA

|MASSBUS CONTROL

WRITE ERROR

MASSBUS ATTENTION

DATA TRANSFER COMPLETE
DATA TRANSFER ABORT
DATA TRANSFER LATE
WRITE CHECK-UPPER ERROR

WRITE CHECK-LOWER ERROR
MISSED TRANSFER

MASSBUS EXCEPTION
MASSBUS DATA PARITY ERROR

MAP PARITY ERROR
INVALID MAP

ERROR CONFIRMATION
READ DATA SUBSTITUTE

INTERFACE SEQUENCE TIMEOUT
READ DATA TIMEOUT

NOTE:WRITE 1 TO CLEAR BITS IN
THIS REGISTER EXCEPT BIT 31
WHICH IS READ ONLY.
TK-0698

MBA VIRTUAL ADDRESS REGISTER, BIT CONFIGURATION

16 1561413 1211100908
0706 0504 03020100

[000 OIOO‘OOIOOOOIOOOI
\

MAP POINTER

PHYSICAL PAGE BYTE

ADDRESS
TK-0696

3-91

MBA REGISTERS

MBA BYTE COUNTER REGISTER, BIT CONFIGURATION

24 23

16 15

08 07

MASSBUS BYTE COUNTER

SBI BYTE COUNTER

(READ ONLY)

(READ/WRITE)

NOTE: DATA WRITTEN INTO THE

SBI BYTE COUNTER ISCOPIED

2's COMPEMENT OF THE

~ NUMBER OF BYTES TO BE TRANSFERED

INTO THE MASSBUS BYTE

COUNTER.

k0687

MBA DIAGNOSTIC REGISTER, BIT CONFIGURATION

313029 28272625 242322212019181716

161312

08 07

INVERT MASSBUS

MASSBUS

DATA PARITY

DRIVE

INVERT MASSBUS

SELECT

(READ ONLY)

CONTROL PARITY
INVERT MAP PARITY

MASSBUS REGISTER SELECT
(READ ONLY)

BLOCK SENDING-

COMMAND TO SBI

SIMULATE SCLK

SELECTED MDI B (READ ONLY)

SIMULATE EBL

(VALID DURING MAINTENANCE

SIMULATE OCC

MODE ONLY)

SIMULATE ATTN
MDI B SELECT

MASSBUS FAIL (READ ONLY)
MASSBUS RUN (READ ONLY)

MASSBUS WCLK (READ ONLY)

NOTE: BITS 21 AND 22 ARE READ/WRITE

MASSBUS EXC (READ ONLY)

FOR DIAGNOSTIC TEST PURPOSES
ONLY

MASSBUS CTOD (READ ONLY)

TK-A0694

MBA MAP REGISTER, BIT CONFIGURATION
31

16 15

08 07

o|ojojo|ojojof0]jo]0O
(.
VALID BIT

PHYSICAL PAGE FRAME NUMBER
TK-0715

3-92

MASSBUS DISK DRIVE REGISTER ADDRESS CALCULATION CHART

J0|U3T€dH8K0W¢)TYWC o0O4LJFTELd:
3-93

Q Y = %] o -

V4 z

Io=9ES8w)8==baamo|d®||l5[S=9iES42:w=a»@3Qo4|2 =<Lo°=a12oxggF>243}}bl=oa(®]o&)©loQN|]llo=cQ®|o]o[©oaQ|]2]glb2°adu[T ow-1oB-&|wly©~|o2ZZa;Zwl=]z®|[l&=«5a-o0-Q=&Smo°=]Z==P}h%@sO)<|ToAl.oe.<<<3(Wg4g&Te<=wL«g-= x&o]@-s%<<<<P]Wuow=o©S-8s o]]l

[-SN-Q]12} [=7d Z<€uwt->t

&-T8.}|[-lO@am2a40zo[)oeow3ju“o&<a2w]Om~Q©O&~[o&]m1P7w»nvoo~&»-nZ©g-z©2y[-y|=o=eSme}-~e[2~xowof]2<m<[%a5w[+wm3]t+=<w=3o}4o<[v@g<o}L”=o-wosl]c
=o
RP05/RP06 REGISTER CONTENTS

8 el sl el e gl g | o [13e] o |g2]|se]| 2 | ° | 25]|=

WNPSo[R=~2} =%wuo-})® @i«o|IS2=a&v~]Rywl}tafe~]ac~ o[=F«-Q<msanzOl~l)Z -| =<2Qv]

3-94

—

<O iwy@=

TK-O0722

T i3

o ]

.<
o

b—

oF ?ETET _zn_rmm_ta Zn__ba 1y m,wm_kdm_ 0 _ 0 _ 0 “ 0 _ 0 _ 2o3WH oL d fio _ 0 _ 0 _‘o # 0 _ 0 _opm_omm _ > _ omm_ww_ 0 _ 0 _ 0 _ 0 &o\_ vIny
2 oS

eOHOH
¢

TMO3 REGISTER CONTENTS

QEFDSREETSS

MNEMONIC

DT IfAlTAPlMOHI?CHIDROISPRI

NOT USED

(HEX)

TMO02/TMO03

FORMATTER/TRANSPORT TYPE (0-8)

(NRZ

FORMAT)

]

—

ICRCICRCCRC'CRC]CRClCRCICRC]CRCICRCI

)

—Y

PARJ7

NOT USED

(PEFORMAT)I

N———

]

IDTPIDT7|DTGIDT5,DT4IDT3,DT2|DT1IDTq
J

NOT USED

15_14

SN15

SN13
SN14

SN11
SN12

SN9

SN4
v

SN1
SN2

SNO

2ND DIGIT

SN3

SN6

3RD DIGIT

SN5

SN8
v

4TH DIGIT

SN7

SN10
J\.

1ST DIGIT

ACCL

SAC
FCS

NOT
USED

EAODTE

DEN 1

DEN2

FMT
SEL 3

DENO

FMT

FMT
SEL 1

SEL 2

EV
PAR
FMT

SELO

SS1
SS2

SSO

TK-0716

3-96

TMO03 REGISTER CONTENTS

ADDRESS
OFFSET
16

IF/SIF/4[F/3IF/ZIF/1[T/I

(HEX)

DEFINED BY MASSBUS CONTROLLER
15

k\TAIERRl PIP IMOLIWRLIEOTI

FUNCTION CODE
06

NOT USED

UNS

DTE

COR/CRC

OPI

CS/ITM

NEF

IIDBI TM IBOT[ LAI

NSG

NC/VPE

FMT

RMR

PER/LRC

SDWN

FCE

lDPRlDR4| SSCI PESI

DPAR

CPAR

ILF

ILR

Mfllllllllllllllllflc
MDF8 l MDF6 I MDF4 I MDF2 I MDFO I MC I MOP2 I
MOPO
MDF7

MDF5

MDF3

MDF1

SWC2

MAINTENANCE DATA FIELD

MOP3

MOP1

J N—— \

SWC

)

MODE OF OPERATION

ATAIATAIATAIATA|ATA|ATA|ATA[ATA

NOT USED

15
FC

FC|FC|FC|FC

|FC|FC

|FC

|FC|FC|FC|FC|FC

15 | 14113

111110

{09

08|

|12

|06 [ 05 | 04

TK-0717

3-97

MASSBUS SIGNAL CABLE PIN ASSIGNMENTS

Massbus Signal Cable Designations

Cable A

Polarity

Pin®

Cable
Massbus

A
B

MASS D00

MASS D01

MASS D02

MASS D03

"MASS D04

|12

114

M
P

|11

|17

w
X

Y
Z

|18

|19

MASS D05

MASS C00

UU | 39
VV | 40

MASS D11

|12

|14

M
P

+
-

MASS C06

MASS C07

MASS RS3

EE | 27

MASS RSO

MASS ATTN

MASS RS4

MASS CTOD

MM| 33

MASS WCLK

PP | 35

MASS RUN

|32

|37

|11

|25

TT | 38

MASS D10

MASS D09

MASS SCLK

130

RR | 36

MASS CO05

PP | 35

|34

FF | 28

|NN

MASS C04

MM | 33

DD | 26

KK |31

MASS D08

MASS C03

HH | 29

MASS D07

|27

MASS D06

MASS C02

MASS CO01

(|25

|24

Designation

120

|21

AA | 23
CC

Cable B

Massbus

Polarity

Pin®

Cable

Designation

w
X

Y
Z

MASS C08

MASS C09

|21

MASS C10

MASS C11 ~

MASS EXC

|18

120

|22

|23

BB | 24

DD | 26

LL | 32

NN | 34
RR | 36

SS | 37

TT ] 38

UU | 39
VV | 40

3-98

130

HH | 29

Note: Massbus cables are to be installed per markings on the cable.

KK | 31

*Alternate pin designation schemes

FF | 28
JJ

SPARE
GND

{19

|17

MASS EBL

MASS RS1

MASS RS2

MASS INIT

MASS SP1°

+
-

SPARE
GND

MASSBUS SIGNAL CABLE PIN ASSIGNMENTS

Massbus Signal Cable Designations

Cable

Pin*

Polarity

Designation

Massbus

Cable C

_
MASS D13

E
F

MASS D12

MASS D14

MASS D15

|21

MASS D16
MASS D17
MASS DPA

MASS C12
MASS C13
MASS Cl14

MASS C15

|22

AA | 23

MASS CPA

BB | 24

|25

DD | 26

EE | 27

MASS OCC
MASS DSO

FF | 28

HH | 29

MASS TRA

KK | 31

LL | 32

MASS DS1

MASS DS2

NN | 34

PP | 35

MASS DEM

RR | 36

SS | 37

TT ] 38

Uu | 39

|40

MASS SP2
MASS FAIL
GND

*Alternate pin designation schemes

3-99

SECTION 4

CONFIGURATION JUMPERS

MODULE UTILIZATION CHART

MODULE UTILIZATION KA780

221

M8234

PCS

M8233

WCS
*

0CS

M8233 OR M8234

16|

M8232

15|

M8231

ICL

14|

M8230

CEH

M8229

DAP

M8228

DCP

CLK

DDP

M8227

M8226

DEP

M8225

MB8224

DBP

M8223

IDP

€
5

M8222

TBM

M8221

COM

M8220

CAM

M8219

SBH

MB218

SBL

M8237

TRS

IRC

LyLygcibDygl
ALAJPIPIRE

NIN

MIMIMIMIMIM
OjJojjsis|sls
DiDi2|2)2]
2
URUR
78708717
LELI3f2¢§1
0

MIMIMIMIMIM
ololslsaslsls
piDl2f2f212
vfudzlizl717
LiLlislt7lsls

EfE

ELlE

PART NO. 3614748

MAY 384-448 KBYTE
MAY 448-512 KBYTE

M8211

MAY 512-576 KBYTE

M8211

MAY 576-640 KBYTE

MB8211

MAY 640-704 KBYTE

M8211

MAY 704-768 KBYTE

M8211

MAY 768-832 KBYTE

M8211

MAY 832-896 KBYTE

M8211

MAY 896-960 KBYTE

MB8211

MAY 960-1024 KBYTE

M9040

TRM

REV
TR#

REV

BfB|UJUJUJU
LELEAIM]IC]
S
AJAl
I
D]
B!
Kl

MAY 320-384 KBYTE

MB8211

MS780

MAY 256-320 K 3YTE

M8211

OPTION
KA780

MAY 192-256 KBYTE

(11780

RH 780 MODULE
UTILIZATION

M8211

12 | MB211

PART NO. 3614746

DW 780 MODULE
UTILIZATION
4

| 14

| 13 | M8211

USE BLANK MODULE 7014103

PART NO. 3615084

0-64 KBYTE

MAY 64-128 KBYTE

MAY. 128-192 KBYTE

* OPTIONAL IF NOT INSTALLED

* WHEN NOT INSTALLED USE
BLANK MODULE 7014103

MAY

16 | M8211

| 15 | M8211

H”H" "’I"’I“I“’l“’ ° :I

18]

MDT

17 | M8211

MCN

MB8285
M8235

MSB

19 | M8213

18 | M8212

FNM
Usc

FMH

MB8286

24|
23|

MODULE UTILIZATION MS780
20 | M8214

¥
*
¥

25]

)

CIB

FoT
FAD
FML

M8236

29]

(28] _M8269
Ms288
27|
M8287
26|

EZEZEA BN ES BN ECY BN S

BiIBIMIMIMIM

s
I

PART NO. 3614747

PART

4-2

NO.

36-14849-00

KA780 TR, SYS.ID REGISTER JUMPERS

I
1
B

J1l0

TR Arbitration

1
B

J1l1

1
1

L
L

\'AY

Level

Jl2

]
1

L
L

\'A"

1
]
J1l3

\'AY

System

Remove

Jumper

Bit

0
TR

Jumper

J13

Jl13

SIGNAL|

SEL

NAME

J13

Jl13

J13

8
9

J13
J13

DD
BB

J10

Jl1o0

Jilo

TR#

WIRE WRAP

FOM2

F02Cl1

——

F02D1

FO2E1

J13

J1l13

J13

Assert

)

SYSTEM

SERIAL

NUMBER

-—

FO2F2

5
6

J13

I
I

—-=

MFG

FO2H2

Jl13

F02J1

PLANT

J13

I.D.

F02J2

Jl13

FO2M1

Jl13

-—

FO2N1

Jl13

Bit

Signal

-—

FO2P1

Jl13

-—

CPU

FO2P2

-—

Jl13

CLUSTER

F02S2

Jl12

VvV

ECO

-—

FO2T2

Jl2

-—

LEVEL

FO2U1l

J12

-—

FO2U2

Jl2

25
26

Jl12
Jl12

JJ
FF

SYSTEM
TYPE

J12

28
29
30

J12

BB
Z
X

01-11/780
02=?

Jl2
Jl2

Jl2

4-3

03=?

Av-0

-]|¥3M89L-¢6L9 -I -1I -I I -- I I -I1 I

SI1-|]¥M|3p1djze-5¢0-TA2¥OM@ L-III ¥-II N-II 1--I7——1- Td-III 4V-dNOIa-I11LadO€-1I9S49OM2-I1z X--I
KA780 WCS JUMPERS

T1eC

4-4

9-I-IocdIC uoT3RWITIUOD WN

7--IIozdZdsai1pvyaoeds <
P

s e1p v buijieas IN 02d — = - I 6

¥4TI ¥lz ¥lv ¥l8 AWYN

TYNDIS|13ST19S1d9S198 o
Le
=

4-5

1ozI-d

z¥IZ90e3|bz1-Sa/dAwgZIA90e3zb1-tn/adAwg
G2Ma-1TeMds

¢T 89LAd449-004d CLOEAd44C2-000¢
¥CT80 Do5UIdWW 0000000007D8¥

A€ASo0ItTT86T494€LSYHVY AT|dpAiZCC087¥09Z¢11otL619C0eP98C7Ce8TST8SSL99w¢tNpaWuAyAAAnogbuSSdrdJ-Jd04i442Iddd014¥e44pd€Gaa0TL297-83-64s¥-0-V0-v00¥-40sd000d400adO¢TLD¢0i€N96V847pVYys0id798980vC0cZ¢FTav691o868C90C1€8Zg00d6e2I6IG¢eTE¢7L8¢c¢Su1TStWnpAAAA1 S€ddJdJd-4Jd-4Id0440T4d44I00L9A4€€9E0T-LEZ22~TD%8Y0--€--0000dJdJ0Od044000Nd0V44%08080YLT¢¢T€9¢
MEMORY ARRAY ADDRESSES

4-6

dIHDS3IYAdVY £E-vT £€-91

0T0%«+T01TO0 €0e0o7n1 T€¢CLE 0o4¢€9 T6¢SC 80¢c14 6LZzT€ 89¢T[4 S§L¢CT v9e10

JTWMOUNTAINVASSSILYIAd Ydvdyd LI1d NOILISOd

"YOoyTMd LNO 0TMO SI d9 NI JOoy d

diaddn

JIMOT

N0TTAO0T0=SxxO0TTO0SLI9€-LAMJTzodD0ONL1FnJAHgDO IS€cTKTLAiowsy(A0N4lATA9eSiSyI9sT1€T210pSTi0r-oZg1ZA00(I‘1ol¢0A1p4dTT)Z8NHI)6T(T1(J£€0oZu2¥8dZ808H10T21.4O 0LTD06T 7S€904OD1080)0
00IMLTO,I:NvOHAYOdLvdS3IJL¥dIV3gDdIHINnNONMJIlONSSLJIVIIXLHYddLddAILNdYIONDJNVIISdTL3TVITJAAIoSV¥O¥ud4d0*(SSIIWHILL¥S0T-L¢IddIH)DQds9L0nT-T¢ATdIINOHD0Ld4d3I¥NVad0YIL9EWANJdO0
MEMORY SYNDROME BIT DECODING CHART

4-7

DW780 (UBA) BACKPANEL JUMPER CONFIGURATION

SI- -91

L I I

-- I T Tatod - - - I [4

dJI¥TMdHIM

4-8

wM%u0¥3o*Pt8rieLanHbiYyuod 1=uo2134092191gl7. dITXs9nSl I6NZ-O4T¢1Id2-0d0c€ILc-TodT2nAI1z-Z0dcSInz-Tod

¥TIMZ¥ME%MM¥G%M9¥MM*8¥B8M6¥MOT¥MT*MZT¥MuotrjeanbijuodAJY-—AM
- e

, TEWION 103 3IST 08LHY

€ -- - I -— 13204 9 I -

4-9

LM———

4-10

—— LM

004031

333171989VvVvSNNI33aNAATO1d4da334HHvW0WOdOYHASHLOLNWN33IAIAIWISS1IT0HH3A7A3HY5OOWWIIWWONIYNAHS3H434
O
M
—
_
¥
9
2
L
I
N
H
O
L
1
3
"
A
3
H
3
)
A
N
V
(
H
3
1
V
1
AHOLOVA34NOIINOI04LON3DONVHILM)B(8M

LM B 8M

11NS3y

HECL4MM3dWNr -~1NO/-NI I L21N73QLIdSN3YYIALHIONWI3dI3W78VVNVL V1 3IO0>0INVE
S6OO9LMMM --~-= -I +HA3dHIO3MWHO3NdIOdWINA4N13OV4IH0SH30IJ€HL1lA379VN3I
L b=
KD11-F MODULE JUMPER CONFIGURATION

MSV-11B MODULE JUMPER CONFIGURATION

JUMPER

INJOUT

RESULT

MEMORY BANK
SELECT 1

—

(20000-37776)

ENABLES BRPLY
DURING REFRESH

A A

f
TK-0702

4-11

dA-0076NW I2uedyjoegd

M9400-YE CABLE CONNECTIONS

YreLt

4-12

<CLSTsL3Ta-0pLTLv¥T

DLV11 JUMPER CONFIGURATION

JUMPER

IN/OUT

RESULT

NO PARITY

25B

1STOP BIT

NB2

8 DATA BITS

NB1
PEV
FEH

X
X

8 DATA BITS
DON'T CARE PARITY EVEN/ODD
NO HALT ON FRAMING ERROR

EIA

NO EIA OPERATION

FR3

SELECTS 300 BAUD

FR2

SELECTS 300 BAUD

FR1

SELECTS 300 BAUD

CL4-CLO

20 MA ACTIVE XMIT. & RECEIVE

VECTOR JUMPERS SET TO 60-64

V7=l, V6=I, Vb=—, V3=|
ADDRESS JUMPERS SET TO 177560-177566

A12=—, A11=—, A10=—, A9=—, AB=—,
A7=1l, Ab=—, Ab=—, Ad=—, A3=I

CL2

CL3

ClL4

CL1

FRO

FR1

\C
w\%/
4%3
ST
TP

::;

—

N
TK-0701

4-13

DLV11-E JUMPER CONFIGURATION

DLV

R3 R2 R1

IIE

T3 T2 T1 TO

A12 A11
S

A10 A9 A8 A7 A6 A5 A4 A3
O

[

V8 V7 V6 V5 V4 V3
N
12P —-E PB BG

C C1

SS1H-BB-FR -FD RS

——

TK-0726

Toe\w/ma

~—7 T

//FB

==/

MI\;
—
TM
86| \I]T~

2—

71—

fl\m

V3-8—fl:—\\:

A3-12

HM‘“—FR
-FD
—

SECTION 5
CONTROL STORE

CONTROL STORE FIELD MAP

' 15

maatd el ol

EALU

12} 11

08, 07

JMP

24 23

28) 27

' 3¢

04! 03

20! 19

CCK

36! 35

00}

16}

]

et Sttt SR Setetl SEES ceanted Aatutut Sututnt Aninbd Al
e

MSC

! 47

B p e

1ADS

! 63

e e

KMX

60) 59

s Dt &

' 95

656 55

SI/ACM

BEN
B

92} 91

N
P

:
18C
'
e f=
e

PCK

]

48}

]

e et

88, 87

ALU

ACF

5-2

SGN

64}

st S

susB

[}

et Tt St Totl s

!
DK
i o e

68 67

e Sl et Sl Eonetd Stotd Sttt St

= pmm = o=

Do ccsn
o U3

72! 71

32}

St cosuted dutanet Setutets Sutuint Sttt S

s St Sattl Dt St

176! 75

52! 51

$===3%
v

]

St St

SPO

! FSi

|RMX]

SMX

EBMX |

m e m e e e f e pmmm f e f = f e pm e f m

40} 39

S (S

Lt St

44, 43

MCT/CID

'VAK | FEK}SCK}

-4

IEK

e
e

'
SHF
pm——ppm—t

84! 83

Dt Statad S

80|

bOAMX
BMX
s et el Sepend

MICROCODE ROUTINES WHICH SUPPORT CONSOLE SOFTWARE,

STARTING ADDRESSES

"CONSOLE

MICRO-CODE"

iMICRO-CODE

ROUTINES

SUPPORT

;ROUTINES EXPECT DATA IN RXDB,
;AND THEY RETURN DATA IN TXDB,

CONSOLE SOFTWARE.

AND IN ID[T1],I1D0[T2]
STATUS IN ID[D.SV],

:AND ADDITIONAL INFORMATION IN ID[T3].
;PC

USED

iNO EFFORT

WHENEVER

IS MADE

: INFORMATION AND

R15

SAVE

REFERENCED.

INTERNAL

PARAMETERS NEEDED

:ARE LOADED IN ID[RXDB]

REGISTERS,

FROM THE CONSOLE,

AND ID[T1],ID[T2].

:RESULTING DATA IS LOADED IN ID[TXDB] AND ID[T3],
:AND STATUS INFORMATION IS LOADED IN ID[D.SV].

iROUTINE:

START-ADDRESS:

PARAMETERS:(* MEANS SUPPLIED BY CONSOLE)

: EXAMINE MEMORY
:
:
;

120

ID[T1]=BYTE/WORD/LONG-PARAMETER
ID[RXDB]=VIRTUAL ADDRESS =
ID[TXDB]=MENORY DATA
ID[T3]=PHYSICAL ADDRESS

:DEPOSIT MEMORY
;
;
;
:

121

ID[T1]=BYTE/WORD/LONG-PARAMETER
ID[RXDB]=VIRTUAL ADDRESS *
10[T2]=MEMORY DATA =

:EXAM.GEN.REG.

122

:DEPO.GEN.REG.

123

;

ID[D.SV]=STATUS-CODE

ID[TXDB]=PHYSICAL ADDRESS
ID[D.SV]=STATUS-CODE

ID[RXDB]=REGISTER NUMBER =
ID[TXDB]=REGISTER DATA
ID[RXDB]=REGISTER NUMBER

ID[T2]=REGISTER DATA =

:EXAM.PROC.REG. 124

ID[RXDB]=REGISTER NUMBER =

:DEP.PROC.REG.
;

ID[RXDB]=REGISTER NUMBER
ID[T2)=REGISTER DATA =

;

125

:CONTINUE

127

:QUAD-CLEAR

129

; SBI-UNJAM

12A

ID[TXDB]=REGISTER

DATA

ID[RXDB]=QUAD-ADDRESS *

5-3

2seieeALitRDRIARlR.NwlllSittelAASRSRRAl

[|mOoD©"|Qom@8eo(~mOAvAeS}@]]]OYoC3IcOJ]-|¢)04wP—Q—o+Q=Ci[C-9[][g~+G4UZ([aw&~[a\=T\Ao(&ado"3dzF4nM4]e}]2]RR—LT(D=Q.C([-ovAOA1@o4}}]WU(v<a4x<~eSNU>L1om[oCc3|wO-Ma7Oot0Tn2[d]SW=o->wG-4w4oOm[+oUta=Q=O.+N~uSNw~aoOY=onxc].nRPIGUP[-\4o—2vA4NAv9"!D[~4[~]Y++SSoYaY0-B=)]-]tRB[[[|)w=ovO]—sa-1[2RNm[&[V}/]]]IS[-a0R@O->Q0O7n~2pNel])aMEL4[vO— <L¢O+wsoamY\[L0t]+TESu(L(1[(21<OQ@QO|<o-Q80®=o3pk}]]}]ook(o[o4L¢2-o3&)oL]]R[<[((8L-)ao\Av\+2=»=<:8:]'%})44](R-(N2~<==3«N]]R([9=[o»[«]«
no=wa07nn)
|@<+~

n —Ew"
[GN(—Lo

> >

a&®SeEk6Ae06B-&SeS5RS4EeSSLHEOAo+uB~—YAVRATESTC-RBTA%S=TOBtOiILtSSTbS»0>1]TO]t[S-l[RtLGtOBGOSA+w ®lITSTkeR0TtSTB0ASOTO0%RS$OOOS0
<4St0totTDoRl3SRSBLbTAiv.lLetToC tSLb|<TOLlIeAtt-Stb->e=x+eA>=x<-It-im+ tAeBtD-< -< ASR-AtlAtL
cBEN!
STAR Microcode:
Functions

“Branch Enable

Z—w2C +&C

PCS

Functions®

01,

FPLA

Neme

1))

5-4

— <- 2

MICRO 31(253)
Branch Enable

MICROCODE BRANCH ENABLE FUNCTIONS

04,
WCS113.
FEB

UPC<02>

—

17m—2}

16,
78

’31-danuary-77

UPC<0B1>

UPC<00>

o] [

[
]

MICROCODE
BRANCH ENABLE FUNCTIONS

:BEN| Name

;10 ! uTrap Vector

| UVECT<3>

;11 ! Last

! =PSL<FPD> |
'\

EALUN

Reference

114

|
!

115

Zero

1-31

Neg

.gt.31

ALU1-0

(previous

UPC<02>

UPC<00>

| uVECT<i1>

| uVECT<0>

Nested

Wr Chkw

=Read+

EALUZ

SC.ne.0

! Sign Src

SC.gt.0

Error

5C<9:8>

.ne.0

cycle)

Rlog

Empty]

=Intlik

Intik

SC<9:5>

.ne.0

ALU<1:0>

.eq.0

ALU<O1>

|
!
+

ALU<00>

STATE7-4

STATE<7>

STATE<6>

STATE<S>

STATE<4>

117

STATE3-0

STATE<3>

STATE<2>

STATE<1>

STATE<O>

;

;18
;

|
'

1BEN|
:

11C

Bytes

i
!

D<31:24>
.ne.o

|
!

D3-0
CC

D<03>

PSLSN>

ALU

UPC<04>

PSL

Mode

|
|

UPC<O03>

11D

Transiation

Test

J1E

|
+

PTE

valid

Data

Aligned

UPC<K02>

5-5

D<00>

H
+

psL<C>

IR<0>

ALU

C31

UPC<01>

UPC<00>

=-PSL<IS>%

=PSLCM>

H
H
+

D<7:0>
.ne.0

Mode

!
+

D<01>
PSL<V>

=-Console

|
!
+

ALU

-VAMX<30>

D<15:8>
.ne.o

—VAMX<31>

71F

D<02>
PSL<Z>

ALU

Name

|
!
+

PSL

D<23:16>
.ne.0

[

719

UPCKO1>

116

:1A

| UuVECT<2>

12 | EALU CC

UPC<03>

Kernel

Mode

TB Miss

1Access

‘

Viol]

1st

Miss

Modify)

MICROTRAP VECTORS

System Init

100
101

Unaligned

102

Trap

103

Page

Data

Trap

Modify Bit

104
105

Protection Violation
Translation Buffer Miss

106
107

Translation Buffer Parity Error

108

Cache

109
1 0A
10B

Reserved Floating Operand

Reserved
Reserved
Reserved

10C
10D

RDS Error
Timeout

10E

Odd

10F

Error

Parity

Address

Control

Error

Store

5-6

Parity Error

HOW TO READ THE MICROCODE

(1)

_Field Definitions

These occur at the beginning of the listing,

in the source file

form:

They have the
DEF.MIC.
sSYMBaCL/=J,K,L,M

The first parameter (J) is meaningful only when "D* is specified
as the default mechanism, and in that case, gives the default value of
the

field

hexadecimal.

The second parameter (K) givee the field size in (decimal) number

bits.

gives the field position in decimal

(L)

The third parameter

as the bit number of the rightmost bit of the field.
from 0

the

right.

The fourth parama2ter

mechanism for the field.
"D",

characters

"+",.

(M)

is optional,

The legal

Bits are numbered

and selects a default

values of this parameter are the

"D" means J is the default value of the field if no explicit

value

"$"

specified.

js used on

the jump address field to specify that the default

jump address is tne address of the next instruction assembled (not,
in general,

select

In general,

location +1).

the current

a field corresponds to the set of bits which provide

inputs for mixers or decoders, or controls for ALU's.

Examples:.

AMX/=0,2,20,D

The microcode field which controls AMX is two bits wide
and the rightmost bit is shown in the listing as bit 20 of the
If no value is specifically requested for the field,
micro.nstruction.
the wicroassembler will ensure that the field is 0.
ALU/=0,4,25

is 4 bits wide,

The field which controls alu

ending on

The fourth parameter of the field is omitted, so the field
bit 25.
is available to the microassembler (if no value is explicitly

(2)

Value

field)

the

for

called out

for modification.

Definitions

Following a field definition,

symbols may be created in that

field to correspond to values of the field.
SYMBOL=N

"N*"

is,

in hex,

examples:

the value of symbol

the form is:

when used in the field.

:Field definition in which following symbols exist

ALU/=0,4,25
XOR=7

A+8=8

"XOR"

Here the symbols

and "A+B" are defined for the "ALU"

field.

To the assembler, therefore, writing "ALU/XOR" means put the value 7
The symbols
into the 4-bit field encing on bit 25 of the microword.
are chosen for mnemonic significance, of course, so one reading
ALU shall be the
of
output
"the
as
"ALU/XOR"
interpret
would
the microcode
Similiarly, "ALU/A4B" is read as
exclusive or of its A and B inputs'.
"ALU produces

the

sum of

SCK/=0,1,23,D

A and

B".

:field definition for following symbols

NOP=0

LOAD=1

Here the symbols “NOP" and "LOAD" are cefined for the field named
We could write
"SCK", which controls the clocking of the SC register.
SCK/NOP in every microinstruction in which we did not want the SC
which
mechanism,
default
the
use
we
things,
to change, but to simpiify
ensures that unless a microinstruction explicitly specifies a change
0.
field
this
of
value
the
make
will
assembler
tre
to SC (by SCK/LOAD),
(3)

Label

Definitions

A micro instruction may be labelled by a symbol followed by colon
The address of the
preceding tne microinstruction definition.
microinstruction becomes the value of the symbol in the field named "J*.
example:

FOO:

J/FOO

This is a microinstruction whose "J" field (jump address) contains
It al!so defines the symbol "FOO" to be the address
the value "FOO".
Therefore, if executed by the microprocessor, it would
of itself.
loop on

(4)

itself.

Comments

A semicolon anywhere on a line causes the rest of the line
This text is an example of comments.
to be ignored by the assembler.

5-7

HOW TO READ THE MICROCODE

(5)

Microinstruction
A

word

followed by
symbol

string

period).

one

Definition

microcode

defined

digit

slash

(/),

for

(distinguished

Several

defined

field,

fields

microinstruction

commas.

followed

that

may

by
a

hex

the

specifying

value.

The

digit

string,

fact

that

field

value
or

name,

may
a

decimal

terminated

specified

separating

field/value

specifications

with

example:

AMX/LA,BMX/D,ALU/A-B
The

field

named

cause

the

mixer

“D",

field

()

"ALU"

"AMX"

the

has

side

value

given
of

ALU

the

value

named

"LA®

select

LA),

field

(to
*BMX®

has

value

“A=-B".

Continuation
The definftion of a microinstruction
lines by breaking it after any comma.

may be continued onto two ep
In other words, {f the
last non-blank, non=comment character on @ line is @ comma, the
instruction specification is continued on the following line.

example:

AMX/LA,BMX/D,

;Select

LA & D as

ALU

inputs

ALU/A-B
;Select ALU to perform A-B
By convention, a blank line and a line of hyphens appears between
microinstructions, to make it easier for the reader to distinguish
continuation

(7)

from

separate

microinstructions.

Macros

A macro is a symbol whose value is one or more
specifications and/or macros.
A macro definition is
the

macro

macro.

followed

the

brackets

quoted

its

value.

("[*

and

"]").

includes

paired

uses

"@"

followed

the

macro

body

brackets
by

should

string

WMacros

The

which

digit

replaced

may

have

definition

indicate

decimal
be

RC[]_D+KI[]

field/value
a line containing
the

value

the

where

the

string

the

parameters,

equivaient
enclosed

a macro with parameters

parameters
indicate

should

which

go,

and

symbols

parameters:

"AMX/D,KMX/82,BMX/KMX ,ALU/A+B,SPO.RC/@1"

This macro indicates that the first parameter (selected by @1)
be used as the value in the "SPO.RC" field, and the second parameter

the

look

"AMX/LA,BMX/D,ALU/A-B,D_ALU"
macro in a microinstruction definition

appearance

square

example:

D_LA-D
appearahce

The
to

name

value

the

"KMX"

field.

typical

use

this

macro

might

like:

RC[T1]_D+K[34]
In

this

case,

Macros

(8)

the

expansion

various

and

ioaded,

meaningful
.TITLE

.DCODE

has

ram

field

subsequent

defines

.SET

defines

string
entry

new

quoted

string

the

text
the

enables

.ENDIF

re—enables
enables

.CREF

and

appear

follows

the

page

contents

the

and

creates

.TOC

bits

an undefined
value of the
the

parameter

suppressed

numbered

radix

prefered

.NOCREF

assembly

enables

information

for

binary

selects

will
are

header,

and

beginning.

entry

pseudo-op.

enable

from

and

symbol

parts

the

parameter.
parameter is
value

right

instead

the

disable

.UCODE
the

the
of

not

zero,

the

default

zero,

and

parameter

named.

microinstruction.

radix

space.

collection

cross=reference

usage.

- LIST and .NOLIST enable and disable output listing.
.BIN and .NOBIN enable and disable leaving room at the
-MACHINE

which

of a conditional assembly parameter,
conditional assembly parameter,

assembly

defines

table

listing,

.DEFAULT assigns a value to
.IF enables assembly if the
.IFNOT
.RTOL

pseudo-operators:
subsequent microcode

definitions
and macros

value

redefines

.HEXADECIMAL

into

"MACRO.MICY.

microcode.

for

page

following
which

the
the

starts

.REGION

the

select

defines

"AMX/D,KMX/34,BMX/KMX, ALU/A+B,SPO.RC/T1TM

defined

therefore

.TOC

are

and

.PAGE

.CHANCE

would

functions

Pseudo Ops
The micro assembler

-UCODE
be

for

left

margin

output.

microassembler

features

5-8

needed

for

special

microproccessors.

HOW TO READ THE MICROCODE

(9)

Location Control

A microinstruction

"labelled" with a number

is assigned to that

address.

The character "=" at the beginning of a line, followed by
a string of 0's, 1's, and/or *'s, specifies a constraint on the
address of following microinstructions.
The number of characters
in the constraint string (excluding the "=") is the number of low=-order

bits constrained in the address.
The microassembler attempts to find
an unused location whose address has 0 bits in the positions
corresponding to 0's

the constraint

string and {1

bits where the

constraint has 1's.
Asterisks denote “don't care®" bit positions.
If there are any 0's in the constraint string, the constraint

implies a block of <2*%*N> microwords, where N is the number of 0's
in the string.

All

locations

in the block will

bits corresponding to 1's in the string,

will

the same

in all

locations of

have 1's in the address

and bit positions denoted by ='s

the block.

In such a constraint block, the default address progression
counting in the "0" positions of the constraint string, but a new
constraint string occuring within a block may force skipping over
some locations of the block.
Within a block, a new constraint

string does not change the pattern of default address progression,

merely advances the
microassembler

"{",

location counter over
later

fill

specifies that

the

A null
or "x")

will

them

in.

those

locations.

The

constraint string ("=" followed by anything but
serves to terminate a constraint block.

®0°,

examples:

This

The microassembler
the next

low—-order address bit

finds an even-odd pair of

two microinstructions

into

must be zero-=

locations,

and puts

them.

=11

This

specifies

both be ones.

that

two

low-order bits of

Since there are no 0's

assembler finds only one
zQ ok

the

the address must

in this constraint,

location meeting the constraint.

the

This specifies a pair of addresses, the first having a zero in
the "20" bit, and the second having a one in that position, but all
other

bit positions

the

same.

5-9

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

tFIELDS ARRANGED ALPHABETICALLY
ACF/=0,2,70,D

y ACCELERATOR

CONTROL

NOP=0

SYNC=1
TRAP=2
CONTROL=3

ACM/=0,3,55

ACCELLERATOR-DEPENDENT

CONTROL FUNCTION

+ACCELERATOR MISCELLANEOUS

CONTROL

PWR.UP=0

ABORT=1

RILTURN

ACCEL

TO MONITORING

IRD

POLY.DONE=8
ADS/=0,1,47

; ADDRESS SELECT

VA=0

IBA=1

. CREF

i ENABLE

ALU/=0F,4,66,D
A-B=00

yALU

CREF

CONTROL

ALU

FUNCTIONS

A-B.RLOG=01
A-B-1=02

; INSTRUCTION DEPENDENT

INST.DEP=03
A+B+1=04

A+B=05

A+B.RLOG=06
ORNOT=07
XOR=08

ANDNOT=09

NOTA=0A
A+B+PSL.C=08

tA
tA

OR=0C
AND=0D
B=0E
A=QF

OR. B
.AND. B

.NOCREF
AMX/=0,2,80

sAMX

TO ALU

LA=0
RAMX =1

;RAMX SIGN EXTENDED ACCORDING TO DT
;RAMX ZERO EXTENDED. OXT(L)=0

RAMX.SXT=2
RAMX.OXT=3

BEN/=0,5,72,D

; BRANCH ENABLE

ROR=2

1 NO BRANCH
: ALU Z
1 LA<1>, PSLLC>,

C31=3

ACCEL=6

1CODE FROM ACCELERATOR
1 (VAX MODE) =, ASRC+VSRC,
i
0--NORMAL, 1--QUAD OR
H
2--F1ELD,
3--ADDRESS
+(~11 MODE) =, O CLASS, U
; (VAX MODE) =, IR<2:1>

NGP=0Q

DATA.TYPE=8

END.DP1=8B
IR2-1=9
PC .MODES=9
REI=0A

SRC.PC=0A
IB.TEST=08
MUL=0C

SIGNS=0D
INTERRUPT=0E

ALU

C31,

LA<O>

7 (=11 MODE)
; (VAX MODE)
; (=11 MODE)

ASRC+Q+D
DOUBLE
CLASS+DM27

=, SM47+SM57+DM47+DM57,
MODE.LSS.ASTLVL, *, *
SRC R=PC

DST

7 0--TB MISS, 1--ERROR
v 2=-STALL, 3--DATA OK
1SC.NE.O, D<1:0>
1 Q<31>,

D.NE.O,

D<3i1>

LAST.REF=11

+AC LOW, INTERNAL INTERRUPT, INT REQ
10, D BYTE O VALID DIGIT, D2-0 NEG SIGN
;MICROTRAP DISPATCH VECTOR
1—FPD, NESTED ERROR, LOW TwO BITS:

ALUI-0=15

i 2--WRITE, 3--READ, WRITE CHK
;EALU N, EALU Z, SC.NEQ.O, S5
1SC<9:8>.NE.O, SC.GT.0, SC<9:5>.NE.O
{ RLOG EMPTY, ALU<K1:0>=0, ALU<1I>, ALU<O>

DECIMAL=0F
UTRAP=10

STATE7-4=16
STATE3-0=17

;

0—-READ INTERLOCK,

(ALU BITS

{STATE

<7:4>
1 STATE <3:0>

5-10

1-=READ,

READ CHK

FROM PREVIOUS STATE)

R=PC

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

D.BYTES=18
D3-0=19
PSL.CC=1A

1BYTES 3, 2, 1, 0 OF D.NE.O
1D<3:0>
+N,2,V,C OF PSL

ALU=18B

+ALU N, ALU Z, IR<0>, ALU C31
;1~VA<31:30>, -CONSOLE, IS+CM, KERNEL
+PTE VALID, ALIGNED, QUAD, +
;s O=-TRANSLATION OK, 31==WR CHK AND M=0
i 2--ACCESS VIOLATION, 3--TB MISS

PSL.MODE=1C
TB.TEST=1D

BMX/=0,3,82

TO ALU

1BMX

tA O IN THE BIT SELECTED
;LB UNLESS R=PC, THEN PC

MASK=0

PC.OR.LB=1

sPACKED

PACKED.FL=2

SC<4:0>

FLOATING

LB=3

LC=4
PC=5
KMX=6

RBMX=7

CCK/=0,3,20,D

:CONDITION CODES

NOP=0

:DEFAULT
:SAMPLE ALU &

TST.Z=3

EALU CONDITIONS
<FORCE V, NO EFFECT ON N, 2, C
:CLR Z IF ALU.NE.O,

ROR=4

*SET N & Z

LOAD.UBCC=1
SET.v=2

;CONSOLE &

NOP=1

ACK=5

CONT=7
READ.SC=9

READ.KMX=08

WRITE.SC=0D
WRITE.KMX=0F

FROM AMX 00

yDEFAULT, ALLOW AUTO IB READ
;SET CONSOLE ACKNOWLEGE FLAG
;+CLEAR CONSOLE MODE
;READ 1D BUS REG SELECTED BY SC
{READ ID BUS REG SELECTED BY UKMX
iWRITE REG SELECTED BY SC
REG SELECTED

+DEFAULT, HOLD
;DOUBLE SHIFT LEFT
;DOUBLE SHIFT RIGHT
;1IF NOT ALU CRY, SHIFT
i ELSE LOAD FROM SHF
;SHIFT LEFT

NQP=0

LEFT2=1
RIGHT2=2
Div=4

LEFT=5

+SHIFT RIGHT
+ LOAD SHF MUX,

RIGHT=6
SHF=8

1 LOAD
;1 LOAD

SHF.FL=9
ACCEL=0A

INTEGER

DAL.SC=0D
DAL.SV=0E
CLR=0F

1DATA

UKMX

LEFT

FCRMAT

SHF MUX, UNPACKED FLOATING FORMAT
ACCELERATOR DATA FROM DF BUS

{REFLECT BYTES AROUND
1 LOAD Q@ THRU DAL

BYTE.SwWAP=0B
Q=0C

LONG=0

FROM ALU,

UNAFFECTED

ID BUS CONTROL IF FS/1

iWRITE

DK/=0,4,88,D

DT/=0,2,78,D

FROM AMX[UDT]

:OTHERS

C_AMX0=6
INST.DEP=7

Cc1D/=0,4,42

SET N

:SET N AND Z FROM ALU[UDT]

N+Z_ALU=5

; LOAD
; LOAD

DAL[SC]
DAL[SHF

; LOAD

ZEROS

BIT

VAL]

TYPE

:CONTROLS AMX SIGN/ZERO EXTENDER, SHF AMOUNT,
;CONDITION CODE SETTING, AND MEMORY REFERENCES
‘

yDEFAULT

WORD=1

BYTE=2
INST.DEP=3

:INSTRUCTION DEPENDENT =--

;ANY OF ABOVE, OR QUAD/DOUBLE

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

EALYU/=0,3,13

EXPONENT

ALU

A=0

OR=1
ANDNOT=2

B=3
A+B=4
A-B=5
A+1=6

NABS.A-B=7

EBMX/=0,2,18

1—ABS(A-B)
SEBMX

EALU

FE=0

iDEFAULT

KMX=1

AMX.EXP=2

SHF.VAL=3

FEK/=0,1,24,D

+SHIFT
yFE

VALUE

CONTROL

NOP=0

iDEFAULT,

HOLD

LOAD=1

FS/=0,1,42

yFUNCTION

SELECT

FOR

43-46

MCT=0

+ENABLE

MEMORY

CONTROL

CID=1

ENABLE

AND

1EK/=0,2,30

INTERRUPT

AND

EXCEPTION

BUS

CONSOLE

CONTROL

ACKNOWLEDGE

NOP=0

ISTR=1

1STROBE

INTERRUPT

REQUESTS

1ACK=2

y INTERRUPT

ACKNOWLEDGE

EACK=3

{EXCEPTION

ACKNOWLEDGE

IBC/=0,4,92,D

+ IBUF

CONTROL

FUNCTIONS

NOP=0

sDEFAULT

STOP=1
FLUSH=2

;FLUSH

+CLEAR

BYTES

AND

0,1

LOAD

CLR.2.3=5

;tCLEAR

BYTES

2,3

BDEST=7

{ TRANSFER

CLR.0O=0C

;CLEAR
tCLEAR

BYTE 0
BYTE 1

CLR.0-3=0E

yCLEAR

CLR.1-5.COND=0F

+CLEAR

BYTES
BYTES

IBA

START=3
CLR.0.1=4

-e

CLR.1=0D

CLEAR

wo
we

+ ID

BUS

THERE

OPCOCDE)

(=11

ISTREAM

(VAX
(VAX
0-3
1-5

OPCODE)
SPECIFIER)

(-11

DATA)

CONDITIONALLY

SPECIFIER

NOTHING.

EVALUATION,

SELF-CONTAINED

ISTREAM

LITERAL.

ADDRESS

IBUF=0

yRD

1SPECIFIER/LITERAL

DAY.TIME=1

i RD+WR

+CURRENT
i

SYS.ID=3

DATA)

DISPLACEMENT

SPECIFIER, CLEAR IT.
1IF IMMEDIATE,
ABSOLUTE, OR DISPLACEMENT, CLEAR THE

ID.ADDR/=0,6,58

BRANCH

(-11

+RD

MUST

TIME

READ

$SYSTEM

DATA

DAY...

UNTIL

STOPS

FROM

CHANGING

IDENTIFICATION

RXCS=4

y RD+WR

i CONSOLE

RECIEVE

CONTROL/STATUS

RXDB=5

+RD

yCONSOLE

RECIEVE

DATA

TXCS=6

; RD+WR

TXDB=7

T WR

DQ=8

(TO-ID

BUFFER

;CONSOLE
+CONSOLE TRANSMIT DATA
+ (FROM-ID REGISTER)
+DATA -PATH

D/Q

BUFFER

REGISTERS

(MAINT ONLY)
PERICD REGISTER

NXT.PER=9

TWR

y INTERVAL

CLOCK

CLK.CS=0A

i RD+WR

y INTERVAL

CLOCK

CONTROL/STATUS

INTERVAL

i RD

+CURRENT

CES=0C

+RD+WR

VECTOR=0D

INTERVAL=0B

yRD+WR

yCPU ERROR/STATUS
yEXCEPTION & INTERRUPT

SIR=0E

;RD+WR

i SOFTWARE

INTERRUPT

PSL=0F

i RD+WR

yPROCESSOR

STATUS

TBUF=10

+TRANSLATION

COUNT

TBERO=12

;7B

BUFFER
ERROR/STATUS 0

TBER1=13

178

ERROR/STATUS

DATA

ACC.0=14

ACCELERATOR

1
REGISTER

ACC.1=15

YACCELERATOR

ACC.2=16

yACCELERATOR

ACC.CS=17

yACCELERATOR

5-12

CONTROL

LONGWORD

#0
#1

#2
CONTROL/STATUS

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

+NEXT ITEM FROM SBI HISTORY
;SBI ERROR REGISTER
+SBI TIMEQOUT ADDRESS

S1{0=18

SBI.ERR=19
TIME.ADDR=1A

y FAULT/STATUS

FAULT=18B

;SB1 SILO COMPARATOR
1SBI MAINTENANCE

comMp=1C
MAINT=1D

PARITY=1E
USTACK=20
UBREAK=21
WCS.ADDR=22
WCS.DATA=z23

; CACHE PARITY
+MICROSTACK
+MICRO BREAK

;WRITING WCS COUNTS ADDRESS
1 PROCESS SPACE 0 BASE REGISTER

¥R

POBR=24

1 PROCESS SPACE 1 BASE REGISTER
;SYSTEM SPACE BASE REGISTER

P1BR=25
SBR=26

+KERNEL STACK POINTER
1EXEC STACK POINTER

KSP=28

ESP=29
SSP=2A

+SUPERVISOR STACK POINTER
+USER STACK POINTER
: INTERRUPT STACK POINTER

UspP=28B

ISP=2C

FPDA=2D

D.SV=2E
Q.S5v=2F

i GENERAL TEMPS

T0=30

T1=31
T2=32
T3=33
T4=34

T5=35
T6=36
T7=37
T78=38
T9=39

i PROCESS CONTROL BLOCK BASE
+SYSTEM CONTROL BLOCK BASE
;PROCESS O LENGTH REGISTER
i PROCESS 1 LENGTH REGISTER
+SYSTEM LENGTH REGISTER

PCBB=3A

SCBB=38B
POLR=3C

P1LR=3D
SLR=3E

bWN-—-OWOV

:SYMBOLS ARE DEFINED BY
KMX/=0,6,

DEFAULT IS THE

:*NEXT MICRO WORD ADDRESS,
;FOLLOWING MICRO WORD

J4/=0,13,0,+

; CONSTANTS OR

8
0
1

2
3
4

SP1.CON=5
SP2.CON=6
ZERO=86
SC=7

*:"

FROM FK
1#8 FROM
+#1 FROM

+#2
+#3

FROM
FROM

FK
FK

+#4

FROM

+SPECIFIER

CONSTANT

;SECIFIER 2 CONSTANT (=11
OR ZEROS (VAX MODE)
;SC[9:0]

FROM

18 - 3F: CONSTANTS (1 CYCLE SETUP IF ALU IN ARITH MODE)
;DECIMAL VALUE OF CONSTANT

.14=8
.A0=9

.34=0A
.28=08B

.40=0C
.50=0D

.3000=0E

.EF=0F
.80=10
.8000=11

LFF=12

.FF00=13
.1E=14
.3F=15

.7F=16

.7=17
.F=18

.10=19
.FFEB=1A

.FFF0=18B

MODE)

120
;160

(AF,JL,MH)
(AF,Jl)

152

(AF)
(AF)

;40

‘

164

(AF,JL,MH,TF)

;80
112288

(AF ,MH)
(dJlL)

1239
;1128

(JL)
(AF,JL,MH,TF)

1=32768
;255
;=256
+ 30
163

(MH,AF,JL)
(AF)
(MH,AF,TF)

127

Y]
115
;116
;=24

:1=16

5-13

(AF)
(MH,TF)

(AF ,MH)
AF ,TF)
(MH,CM,
{MH,AF,JL,TF)
(MH,.TF)

(CM,JL,TF,MH)

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

.FFFB=1C

.3FF=20

-8
132
148
124
11023

(MH,AF,TF)
(CM)

.C=21

112

(CM,JL,TF,MH)

.0=22

113
v 31
17936
1176

(TF)
(AF,JL,MH,TF)
(JL,MH)
(MH)

.20=1D
.30=1E

.18=1F

.1F=23

.1F00=24

.B0=25

(CM,TF,MH)
(CM,JL,MH,TF)
(CM,AF ,MH,TF)

.E003=26

;

(CM)

.7C=27

1124
=32
196

(AF)
(Jl)
(TF)

1 ?
=17
1=15
125
=7

(JL)
(AF)
(AF)

.FFEO=28
.60=29

SPARE=2A
.DFCF=2B

.FFEF=2C
.FFF1=2D

.19=2E

.FFF9=2F
.FFFF=30
.88=31
.3030=32

.F0=33
.C0=34

.6=35
.9=36

.FFF6=37
.FFF5=38

(AF)

1=1
1136

(MH,JL,TF)
(AF)

(TF)

1240
1192
16
H )
=10

(TF)

(TF,MH)
(CM,JL,TF)
(CM
(CM)

=11

(CM)

.1A=39

126

(CM,AF,TF)

.24=3A

136

(CM,MH)
(CM,AF,TF)

.18=38

127

.FFFC=3C

.A=3D

:10

(AF,MH)

.7E=3E

1126

(AF,TF)

(CM,TF,MH)

SPARE=3F

MCT/=3E,6,42,D
TEST.RCHK=00

i MEMORY CONTROL
i TEST

TBUF

MEM.NOP=02

iNEITHER

TEST.WCHK=04

i TEST

WRITE.V.NOCHK=0A

{WRITE,

WITH

CPU

TBUF

READ

NOR

CHECK

GETS

WITH

WRITE

INHIBIT

TRAPS

NORMAL

VARIETY

WRITE.V.WCHK=0C
LCCRWRITE.V.XCHK=0E

tWRITE,

READ.V.RCHK=10

i READ,

NORMAL

VARIETY

READ.V.NOCHK=12

yREAD,

INHIBIT

TRAPS

READ.V.WCHK=14

i INTERLOCK

yREAD

FOR

WRITE,

{READ,

CHECK

yBEGIN

NEW

GOES

LOCKREAD.V.NOCHK=1A

i INTERLOCK

LOCKREAD.V.WCHK=1C

y INTERLOCK

SBI1.HOLS=20

;STOP

SBI.HOLD+UNJAM=22

ALL

CONTROLLED
TO

IBUFFER
BUFFER

READ,

INHIBIT

CHECK

NORMAL

VARIETY

ACTIVITY

{RESET

SBI

iCLEAR

CACHE

EXTWRITE.P=28

iEXTENDED

WRITE.P=2A

tWRITE,

LCCKWRITE.P=2E

i INTERLOCK
yREAD,

STREAM

READ,
SBI

iMICRODIAGNOSTIC

READ.INT.SUM=36

ADDRESS

INSTRUCTICN

INVALIDATE=24

READ.P=32

VIRTUAL

INSTRUCTION

VALIDATE=26

- LOCKREAD.P=3A

CYCLE

MODIFY

READ.V.IBCHK=16
READ.V.NEWPC=18

DATA

MEM

CHECK

ENTRIES

WRITE

FORCE
TO

VALID

CLEAR

MOS

PHYSICAL

WRITE,

PHYSICAL

y INTERRUPT

SUMMARY

; INTERLOCK

READ,

READ

PHYSICAL

ERRORS

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

{GIVE

ALLCW.IB.READ=3E
MsC/=0,4,26,0

IB A CYCLE

IT WANTS ONE

yDEFAULT

NCP=0

+CREATE NEW PSL FOR CHM
tUTRAP IF ALU<K1IE>=1, ALUK14:7>=0

CHK.CHM=01

CHK.FLT.OPR=02
CHK.GDD.ADDR=03
IRD=0C4

;THIS

STATE

LOAD.STATE=05
LCAD.ACC.CC=06

; TAKE

CONDITION CODES

INSTRUCTION

PSL<FPD>

1CLEAR
+ySET
+CLR
+SET

SET.FPC=09

CLR.NEST.ERR=0A
SET.NEST.ERR=08B
SECOND.REF=0C
RETRY .N3.TRAP=0D
RETRY.TRAP=0E
INH.CM, ADDR=0OF

SAME
NESTED
SAME

DECODE

FROM ACCELERATOR

i (AND POP RLOG STACK)

READ.RLOG=07

CLR.FPD=08

PCK/=s0,3,32,D

BIT

ERROR

FLAG

CPU

STATUS

;OF UNALIGNED DATA REFERENCE
tAPPLY SAVED CONTEXT, INHIBIT TRAPS
;APPLY SAVED CONTEXT TO THIS REF
ALLOW USE OF FULL 32-BIT ADDRESS

+ ADDRESS

COUNT

NOP=0

CONTROL
y DEFAULT

PC_va=1

PC_IEA=2
VA+4=3

IVA_VA+4

PC+1=4

1 PC_PC+1

PC+2=5

iPC_PC+2

FPC+4=6

iPC_PC+4

PC+N=7

;PC_PC+N,

DETERMINED

INSTR

BUFFER

QK/=0,4,51,D
NCP=0

yDEFAULT,

LEFTZ2=1

;DOUBLE

HOLD
SHIFT LEFT

RIGHT2=2

;DOUBLE

SHIFT

RIGHT

LEFT=5

RIGHT=6

1 LOAD
; LOAD

SHF=8

SHF.FL=9

SHF,
SHF,

INTEGER
UNPACKED

FORMAT
FLOATING

FORMAT

;DECIMAL CONSTANT = 6'S IN EACH NIBBLE
7 FOR WHICH ALU CRY OUT IS FALSE
i LOAD ACCELERATOR DATA FROM DF BUS

DEC.CON=0A
ACCEL=08B
D=0C
ID=0E

+LOAD

CLR=0F

; LOAD

ZERO

RAMX/=0,1,77,0

;DFTA

PATH MIXER TO AMX

+DATA

PATH MIXER

“'p=0

Q=1

RBMX/=0,1,77

BUS

yDEFAULT

BMX.

SAME

BIT

RAMX

G=0
D=1

SCK/=0,1,23,0

:SC

NOP=0

;DEFAULT,

LOAD=1

: LOAD

SGN/=0,3,48,D

HOLD

SMX<09:00>

+SIGN CONTROLS

NOP=0O

yDEFAULT

LOAD.SS=1

SS.FROM.SD=2
NOT.SD=3
SD.FROM.SS=4
SS.XOR.ALU=S
ADD.SUB=6

1 SS_ALUKIS>
1 SS_SD
1 SD_NOT SD
1 SD_SS
;SD_ALUKIS>,
+SD_ALUKI5>,

CLR.SD+5S=7

;CLEAR

SHF/=0,3,85,D
ALU=0

ALU

SHIFTER

SS_SS.XOR.ALU<K1IS>
SS_SS.XOR.ALU<15>.X0OR.IR<1>

BOTH

CONTROLS
;DEFAULT,

SHF_ALU

LEFT=1

tSHF_ALU(L1),

RIGHT=2
RIGHT2=4

i SHF_ALU(R1), INSERT SI CNTL
{SHF_ALU(DT: LO,L1,L2,L3), INSERT
+SHF_ALU(R2), INSERT SI CNTL

LEFT3=5

ySHF _ALU(L3)

ALU.DT=3

5-15

INSERT

CNTL

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

$1/=3,3,55,0D

;SHIFT

INPUT CONTROLS
:

SHF

:
:

PSL<N>
ALU 31

Q31
QO

ALU
Q31

C31

;
;

0
0

:
:

Q31
0

Q31
ALU

ALU
O

C31

MUL+=6
MUL-=7

;

DIvD=0

ASHR=1
ASHL=2

ZERO=3

D31
0

SPARE=4
LIV=S

SMX/=0,2,16

:MIXER

<9:0>

"EALU

FE=1

s FE<9:0>

ALU=2

ALU<09:00>

tALU<K14:07>

ALU.EXP=3

;SCRATCH

spP0/=0,7,35,D

PAD OPCODE,

BITS

+DEFAULT

NOP=0

; LOAD LC, ADR=SC[03:00]
{WRITE RC, ADR=SC[03:00]

LOAD.LC.S5C=6
WRITE.RC.SC=7

LOAD. LAB=1

FUNCTION BITS OF SPO FIELD
+LOAD LA, LB FROM R(ACN)
; LOAD LA_RN, HOLD LB
+WRITE RA, RB (ACN)

LOAD.LA=2
WRITE.RAB=3

SPO.ACN/=0,3,35

TO SC

EALU=0

SP0.AC/=0,4,38

0,1

ALU 0,1

+AC NUMBER

IN SPO

FIELD

; VAX MODE
H
H
HY

RA
SP1
SP2
SP2

+ 3

PRN

SC=5

HE:
-]

PRN+1
SC<03:00>

SP1+1=6

SP1

R+1

RB
SRC
DST
SRC

R
R
R

SRC

SP1.SP1=0
SP2.SP2=1

SP2.5P1=2
PRN=3

PRN+1=4

SPO.ACN11/=0,3,35

+AC

NUMBER

IN SPO

;=11

FIELD --

R
R
R

R+1

DST.SRC=2

RA
SRC
DST
DST

HEC)

SRC R

v 4
-]

SRC R .OR.
SC<03:00>

;SRC.SRC=3
SRC.CR.1=4

SPO.R/=0,3,39

R
R
R

:SCRATCH PAD FUNCS WITH LOW 4 BITS OF SP

LOAD.LC=2
WRITE.RC=3

LOAD. LAB=4
WRITE.RAB=5

LOAD.LABY.WRITE.RC=6
LOAD.LC.WRITE.RAB1=7

R
R

MODE

MOOE
HY
!

SC=5

SP2
SP1
PRN

DST.DST=1

SRC.SRC=0

RB
SF1

; LOAD LC, ADR=SPO.RN
:WRITE RC
;LOAD LA, LB
iWRITE RA, RB

SRC R .0OR.
SC<03:00>

AS ADR

:LOAD LA, LB[R1], AND WRITE RC[RN]
:LOAD LC[RN], AND WRITE RA, RB[R1]

VAX-11/780 MICROCODE, CONTROL ROM FIELD DEFINITIONS

SPO.RAB/=0,4,35

+RA/RB LOCATIONS

R1=1

R2=2

R3=3
R4=4

RS5=5
R6=6
R7=7
AP=0C
FP=0D

SP=0E

R15=0F

SPO.RC/=0,4,35
T0=0

tR12
tR13
i1R14
R15

:RC LOCATIONS

=
=
=

ARGUMENT LIST POINTER
STACK FRAME POINTER
STACK POINTER

PC,

TO SOFTWARE,

SCRATCH TO UCODE

T1=1
T2=2
T3=3
T4=4
T15=5
T6=6

T7=7

{MEM MGMT SAVES

LC.Sv=8

LC HERE

VA.SV=9
PTE.VA=0A

PTE.PA=0B
PC.5v=0C

SC.Sv=0D

VA .REF=0E
MBIT.VA=0F
PTE.MASK=0F
sus/=0,2,64,D

i SUBROUTINE CONTROL
yDEFAULT

NOP=0

1 PUSH UPC OF

CALL=1

ONTO

THIS MICROINSTRUCTION

USTACK

1 "OR" TOP OF USTACK TO UPC
+ AND POP USTACK
;REPLACE LOW 8 BITS OF NEXT
7 UPC WITH SPECIFIER DECODE
+ INSTRUCTION BUFFER

RET=2
SPEC=3

VAK/=0,1,25,D

FROM

1 DEFAULT
; LOAD VA

NOP=0

LOAD=1

2014

2015
2016

.BIN
;RE-ENABLE LISTING SPACE FOR BINARY OUTPUT
.CREF ;RE-ENABLE CROSS REFERENCE

VAX-11/780 MICROCODE, MEMORY CONTROL FUNCTIONS

:0ctober

¢t

vi
A
D MCT F!/!
S 3210 S!P!

IT A

0 0000 0V
0 0001 0,V

0 0010 0OV

-=-=-

!BC XATODT

His!'MC
EJAIT E
CIVIS S
KIEISS

N!
C!
T!
N!

trap

===

PLBDBC I}
AT UAPPE]
GGFDAAR]|
ENMRRR R|

11,

1976

Y = utrap on condition

* = utrap on condition unless MSC/

SECOND.REF or RETRY.NO.TRAP
N = do not utrap on condition
-~ =z hardware behaviour undefined.
ucode must prevent condition

RIN!'N N NNNNYNN,|
N!'NNNNRNNNNN!
WININNNNNNYNN]

TEST.RCHK
MEM.NOP
TEST.WCHK

0011

0
0
0
0

0100
0101
0110
0111

0/}
OlvV! W
W]
O}V)
0)V!1IwW

|
N!'YN=-=N=-YNY|
WIYIY Y * = Y Y Y N Y!
= = = - - Y N Y}
Nl=

WRITE.V.NOCHK
WRITE.V.WCHK
LOCKWRITE.V.XCHK

0 1000 0!V!
0 1001 0)V}

R!
R!

RIY!Y Y * *» N Y Y Y Y|
IN)'Y N = -=-N=-Y Y Y]

READ.V.RCHK
READ.V.NOCHK

0
0

1010
1011

O}V!
O}V!

R} WiYIY Y
R!IBIY!Y Y

1100

O0}V)

1111

1
1
1
1

0000
0CO1
0010
0011

O
HOLD
ININ
O
UNJAMIN!N
O!P!INVALI!N!N
O!P!
VAL
ININ

1
1

0100 O!P!EXTWRI!ININ N N NN NNN Y!
NINNNNNNNN Y]
W
0101 O|P

0110

1000

|
!

0
0

1101
1110

0111

O}V!IR|
O}V|IR)

O}P

= Y Y Y Y Y|
Y Y Y Y Y Y|

READ.V.WCHK
READ.V.IBCHK

RININ N NNNYNNN|
N!IYN-=-=N=YY Y|
WJY!Y Y - =Y = Y Y Y|

READ.V.NEWPC

N
N
N
N

*
Y

N N N NN N
N N N N NN
N N N N N N
N N NNNN

N}
N!
N}
N!

NNNNNY!

LOCKREAD.V.NOCHK
LOCKREAD.V.WCHK

SBI.HOLD
SBI.HOLD+UNJAM
INVALIDATE
VALIDATE

EXTWRITE.P
WRITE.P

!ININN N

LOCKWRITE.P

NINNNNNNNYY!

READ.P

|NIN N

READ.INT.SUM

1001

0}P|

1010

1011

O}JP!

1
1
1

1100
1101
1110

0!
!
0P}
!
0}

!NINNNNNNNY Y|

LOCKREAD.P

NINNNNNNNNN|

ALLOW.IB.READ

0 XXXX
1 XXXX

1} |
111}

' INNNNNNNN N/
IN!INNNNNNNNN]

NO MEMORY OPERATION
DEFAULT: ALLOW IB READ

1111

Abort

ISR

N NNNNN Y}

Ref on Trap? A A A

A A ARA

(A=any,

R=read)

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rADLX,

GVEerIDE(%U

HwX)

fUR

URIQUE

ALDKESS)

CURKREwD

ExAMINg

CUAMARDS)

ADUKRESS)

'LAST'(*)

t/p!

DEPUSLT

wURD)

EAAMIwE/DEPUSEL

TERMINALED

USE

kXAMIne

ALDRESS)

rFUR

<ADDKRESS>!

ADORESS

SIKING

I3:

10245,

'E/V

ThE

SHURTEST

10245

=eXAMIneS

INSTRUCTION

UP=CuDE,

SPECIFIER,

REGLISTEK(1R).

tXbCUTIUN

UlSPLAYS

PUINT

CUUNTER

=INITIALIZES THE CPU,DEPOSITS <ADDRESS>
TO

THE PC,

=ISSUES

YCONTINUE'

'HALT!

=HALTS

THE

ISP

'BOOT"

=B00TS

THE

CPU

'"INITIALIZE'

<ADLDRESSES> (UNLY

(PRUCESSUK

"EXAMINE

'START

d=NLV=1v]/

(LAST

FUR

'EXAMINE

<wUMbEr>,

'PSL?Y

LXAMPLES

SNUMBER>

ALL

KV,

FROM

=INITIALIZES

6-2

ISSUES

CONTINUE

DEFAULT

THE

CONTINUE TO

CPU

THE

DLEVICE

ISP,

THE

1SP.

CONSOLE HELP FILE

'SHOwW'
'SHOW

=DISPLAYS CONSOLE AND CPU
VERSION?

= ISPLAYS

'TEST!

=RUNS

VERSIONS OF

=CALLS

TUNJAM?

=UNJAMS

BUS'!

'SET

STEP

STATE'

'SET

STEP

INSTRUCT1ON'

'CLEAR

'NEXT

MICRO=DIAGNOSTIC

=ENABLE SINGLE

THE

=ENABLES

BUS CYCLE CLUCK

STEP!

SINGLE

NURMALONU

=<NUMBER>

'"QCLEAR <ADDRESS>!

=DOELS
Tu

'CLEAR

LAST

A QUAD

GUAD

'SIup un

SLOUwW'!

=SET

CPU

CLUCRKR

'SET

CLOCK

FAST!

=SET

CPU

'SET

CLUCK

WURMAL'

=SkT

CPU

'5e17

RELUCATIUN s<wUMBER>!

=pUTS

NUTE:

STEP'

TERMINAL

ARE:

MICRU=BREAK

TERMINAL

=PUTS

FKtUu

TUu

FAST

rkEQ

WUKMAL

1Ih1u

THE CunSULe'S

KRELUCATIuwn

KEGLISTER

ADDED

AND

VIRTUAL

=5ET

RELUCATIUN

EFFECTIVE
EXAMLINES

CUndULE

ADURESS

AND

FlLL

[HE

COUWT

TERMINAL

FOR

FHYSICAL

UEPUSITS.

UKD, LUNMG, WUAL

IN10

=CAUSES

CUNSULE TO

=UNLESS

MUDE

THIS

'PROGRAM

SwITCH

=LUAD

FILE

SPECIFiku

THE

'/START:<ADDRESS>'

ITHE

STAKLING

ADDRESS
O,

BLANKS

<bL¥I>

1l/0'

'PRUGRAM
A

wRITTeN

MUDE

I1/0'

'DISABLE'

MODE,

POSITION

KFIL&

FlLk

<FLLENARE>!

<CR>

EXIT

=LUAD

<FILENAMED!

NUMBER

AFTEK

'LUAD

LOCATIJUN

DLEFAULTS

=PRUCELSS

wliH

BENAbLLE

CLUCK

ARE

CONSUOLE

=PRINTS

NUTR

MATCh'

CLUCK

'@<FILENAME>!

'"WOAD/WCS

IS FuURCev

EKKRLKS)

SLuw.

COWTENLS

=SETS

'TP'(CDNTRUL-P)

'HELP!

ECC

UCTAL,HEX
,PHYSLICAL , VIRTUAL, INTERWAL

FILL:<NUMBER>'

PRUGRAM'

STEP

FEGISTER,

TO
'SET

UEF

<ADDRESS> ,wHICH

GENERAL,VBUS, IDBUS,BY1E,

'SET

TYPE

COMMAND

rReEY

'SET

BOUNDARY (CLKARS

=CLEARS

CLUCK

LEFAULT

MOLE

AKE Dunk,

«SLTS 'STOP Ui mICKU=boREAK mATCH' ENnABLe

SOMM'

'SET

STEP)

CLEAK TU

WURL

MUDE

MOVE

STEP CYCLES

VEPENDS

MODE

TIME STATE CLOCK

INSTRUCTION

= NABLE

<NUMBER>'

MUNLITOR,AWAILS COMMANDS

Sbl.

=ENAbLE SINGLE

'SET SOMM!

CUNSOLE

MICRU=DIAGNUSTILCS

'TEST/COM?

'SET STEP

STATE

MICROCOVE AND

INDIRECT
MAIN

QUALIFIek

FUR

LUAD,

CUMMAND

FILk

MEMOKY,

MAY

wWCS

ALSO

UTHERwISE

USED

LOAD

wlLL

SPECIFY
BEGIN

CONSOLE HELP FILE

CONSULE

=CAUSES CunSULe TO BkGLN CUMMAND LINKLING,

"LINK'

ALL

PRINTS REVEKSED PROMPT TU INUICATE LIWKING.

CUMMANUS TYPED vY USER wHILE LINKING Akk STORED
lv

CUNIRUL=C
"PERFURM?

<Anyi=CUnSuUbb=CU#MAMNDD!

LERMIKATES LIARING, (Stk PEKEFURM)

e XeCUTE A FlLe UF LINKED CUMMANWDS PREVIUUSLY
GENERATED

'REPEAT

VIA

'Liwng'

<CUNSULE=COMMAKL>,

=CALLS MICRU=DEBUGGER,
LYpe:

'"EwABLE

LALS!

bEXECUTE
bBY

LnTLL STUPPEDL
(tUR

A *C

DPEBULGGER

HeLP,

ACCESS

FLUPPY

"@wCSMUw.HLP!')

=ENARLES COnSULE SUFIWARE Td
1

THUSK

'REBOUT!

=CAUSES

"wAl'l

epHEN

DOwe!

CUMMAND,

[Ht CUwsuLbk TU REPEATELLY

= ChUSES
Tre

'wis!

EXECUTLIUWN.

LATER

INDIRECT CUMMAND FLLE PUR

SYs3TewmS

CUwndULE

wItH

CuMMANL wWILL CAUdSE
Unllug

'"UDuik'!

PRUOGRAM RUNNING

Jiw

eXECUTIUN

Wik

HALTS,

UPLKATUKR

ECUTIUN

wlLL

RKelLuav

ouf TwARR

BXECUTEL FRUM AN

DklvVe

UUAL ELUPPIES,

LDIRECT

CuUmMANL F1ubk,

CummAND rlLe eXECUTIUN
IS

S1GNAL

LHE

KReCRLIVED

EwUnM

VAX=11/780(CUMMAWMD

Cunllhuk),
TYPLS

TeRMLINALE).,

uk
A

1HE

FHILIS

1U stuop
lHE

F LLE

VAX=11/Tn0

“C(CuMmAnL

FILE

eX-

CONSOLE ABBREVIATION RULES

VAX=11/780 COUNSOLE ABBREVIATIUN RULES
THIS

REVeS g=NUV=77

FILE SHUWS 1THE SHOKRTEST UnNIQUE COMMAND STHINGS THAT

RECOGNIZED

ok CunSULE CUMMAND

COMMAND

SHUKTEST
'E

<ADDRESS>!

"EXAMINE

"DEPOSIT <ADDRESS>

'S5

"CONTINUE®
TH!

"HELP

'rik!

'BOOT'

"INITIALIZE'
'SHOW!

vy
'SH!

VERSION'

'TEST!

'SH

TUNJAM!

'ut

'SET

RELOCATLIONI<NUMBER>'

'SET

STEP

BUS'

'SET

STEP

STATE!

'SET

STkP

INSTRUCTION'

'SE R3I<NUMBEK>'

'SE S

'SE

'CLEAR STEP'

'CL

INEXT <NUMBER>!

IN <NUMBEK>'

TQCLEAR
1SET

<UATA>!

<ADDRESS>!

"HALT®

'SHUW

ABBREVIATIUN

<ADDRESS>!

'U <AUDKESS>

<DATA>!

'START <ADDRESS>'

<ADDRESS>!

SOMM!

10 <ADDRESS>!
'SE

SO!

'CLEAR SOMM'

'CL SU!

'SET

CLUCK FAST!'

'SE

"SET

CLOCK

SLOW!

1SE

C S

1SET

CLOCK

NORMAL'

1SE

1@<FILENAME>'

'@<FILENAME>'

6-5

wILL bk

LISTRD,

RECUGNIZED

CONSOLE ABBREVIATION RULES

'LOAD

<FILENAME>'

PLINK'

<KFLILENAME>'

'LI?

'PERFORM?

'REPEAT

<CONSOLE=COMMAND>'

'HCS!

<CONSOLE=COMMAND>'

"ENABLE

bLX1i:'?

"EN

'REBOOT'
'SET

TERMINAL

FILL:<NUMBER>'

'SET

TERMINAL

PROGRAM'

'SET

DEFAULT

"WAIT

DONE'

'SE

<OPTION=LIST>!

SHORTEST

/BYTE

/WORD

/LONG

/QUAD

F:<NUMBER>'

'SE

<OPTION=LIST>!

"wA

PR!

QUALIFIERS

ABBREVIATIUN

/0CTAL

/HEX

/PHYSICAL

/VIRTUAb‘

DX1i:g!

'REB'

/INTEKNAL

/GENERAL

/VBUS

/1DBUS

/VB

/1D

/HCS

/NEXT:<KNUMBER>

/uC

/N:<NUMBERD>

/CUMMAND

/START :<ADDRESS>

/S:<ADDRESS>

6-6

RECOUGNIZED

CONSOLE-REMOTE ACCESS HELP FILE

'ENAbLE

=ESTABLISH TEKMINAL TU [EKMINAL CUMMUNICATIUN

TALK'

BLTWEEN

"ENABLE

ECHU!

LUCAL
Unk

ANU

STRUCK

UTHER.

CONTRUL=P

REMUTE TERMINAL,

TeERMINAL

ARE

PRINTED

TeRM1NATES

=CAUSES CHAKACTERS TYPEL

KEYS
UN

THE

TALK.

TALK

MODE TU Bk

ECHOED BACK IU THE URIGINATING TER@INAL,
'ENABLE

LUCAL CuPY!

A COPY OF

-CAUSES THE LUCAL TERMINAL 7O GET

UF OUTPUT BELING SEN1
TU KEMOTE TERMINAL.,
"ENABLE

LOCAL CUNTROL'=ALLUWS THE LUCAL TERMINAL TO CUNTRUL THE SYSTEM WHEN
1HE CONSULE SWITCH

THE

KeMUTE POSIT1UNS,

DISe

ABLED 8Y A CONTRUL=P FRUM THE KEMULE RKMINAL.
'ENABLE

CARRIEK ERRUR'=CAUSES ThE CUNSULE TU PRINT
A

'/DISABLE ECHO'

LUSS UF

CARRIER

'2CAKRIER LUST'

veleCTED

=INHIBITS ECHOING OF CHARACTERS TYPED

'DISABLE LOCAL CupY!

ALl

REMNOTE

WHEN

INTERFACE.

TALK MUDE,

=DISABLE LUCAL TERMINAL FKRUM ReCELVING CUPY OF
QUTPUT

REMUTE

TERMINAL.

'DISABLE CARRIER ERRUR'=CAUSES CONSOLE TU INRIBIT PRINTING UF CARRIER
LOST

MESSAGE

wHEN

6-7

LOSS OF

CARR1ER

DETECTED.

MICRODEBUGGER HELP FILE

REV=0

!TO

STOP

PRINTLING,

TYPE

MAY

1977

DEBUGGER

'E/P
YE/ID

COMMANDS (ALL

TERMINATED

<ADDRESS>!
<ADDRESS>!

CARRIAGE

KRETURN)

=EXAMINE

PHYSICAL

=EXAMINE

WCS

BUS

MEMORY

<ADDRESS>'

~EXAMINE

<KFIELDNAME=1>,<FIELDNAME=2>,,, ,<F1lELDUNAME=N>
EXAMINE
THE

NOTE:

WCS

FLELDS

LOCATION,

LUCATION,

D1SPLAY

DISPLAY

ONLY

ALL

FIELDS

SPECIFIED,

ACF ,ACM,ADS,ALU,bEN,bBMX,CCK,CIL,DK,DT,EAL
EBM,FEK,FS,
IbC, LEK,UJM, KX, MCT,M8C,PCK,GK
KHMX,8CK,SGN,
SHF ,S1,5MX,SP0O,USU, VAK

<ADDRESS>!

“EXAmlINE

KEGISTER

<ADDRESS>!

“LXAMINE

<KSYMBULIC=NAMED>!

=L XAMLIne

ONE

THE

SYMBOLICALLY

NAMED

REGLSTERS

NOTE:

'O/P
'V/ID

<SYMBULLIC=NAMES>

<DATA>'

=DEPUSLIT

<DATA>!

DR,FtER,I8A,La,Ls,LC,Q,xL,S8C,S8R8,UPC

<DATA>
=UEPUSIT

<FLELLNAME=1>

THE

'/4'

FIELDS

1vTU

WUALIFIER
TO

PHYSICAL

<DATA>

<DATA=1>,<FIELDWNAME=2>

=DEPUSIT

NOTE:

wCS

MeMURY
IV

UnNCHANGERU,

MAY

USED

CLEARED.

6-8

I'0

REGS1TER

<DATA=2>,.c000000

LUCATION,

<FILLDNAME=1>,

ARE

BUS

CAUSE

PUTTING

<DATA=1>

£1TC,

UNSPeCIFIeD

ALL

UNSPECIFILED

FIELDS

MICRODEBUGGER HELP FILE

'D RA <ADDRESS> <DATA>!

=DEPOSIT <DATA> TO AN RA REGISTER

'D RC <ADDRESS> <DATA>'

=DEPOSIT <DATA> TO AN RC REGISTER

'D <SYMBOLIC=NAME> <DATA>'

=DEPOSIT <DATA> TO ONE OF THE SYMBOLICALLY
NAMED REGISTERS(SEE LIST ABOVE).

NOTE: DEPOSITS TO THE RLOG STACK(RL) ARE NOT SUPPORTED.

=RESUME MICRO=INSTRUCTION EXECUTION AS

'"CONTINUE'

SPECIFLED BY CONTENTS OF MICRO=PC(UPC)

'START <ADDRESS>!

=START MICRO-SEQUENCER AT <ADDRESS>,

-HALT THE MICRO=SEQUENCER

'"HALT'

'SET SOMM!

=SET THE 'STOP ON MICRO=-MATCH' ENABLE

"CLEAR SOMM'

-CLEAR THE 'STOP ON MICRU=MATCH' ENABLLE

'SET STEP!

=ENABLE SINGLE MICRO=INSTRUCT1ON STEP MUDE.

START OR CONTINUE WILL ALLUW ONE MICRU=
INSTRUCTION TU EXECUTE, 1HEN HALT THE
MICRO=SEQUENCER,

'CLEAR STEP'

~DISABLE SINGLE MICRU-INSTRUCTION STEP MUbE.

'RETURN'

RETUKN TO THE CUNSULE PRUGRAM

1OPEN <FILENAME>'

=UPEnN SPECIFLED FILE UN FLUPPY DRLIVE 0

'OPEN DX1:<FILENAME>!

-UPEN SPECIFLED Fluk UN FLUPPY DkIVe 1

NUTE:

'OPEN' IS USED [0 SPECIFY A FILE CUNTAINING THE MICRU=CUDE
CURRENTLY LOADED IN THE WCS PORTION UF THE CONTROL STURE.

(ADDRESSES 1U00(16) & UP IN THe CUNTROL STURE)
THIS FILE wILL Bk USED FUR ALL EXAMINES UF THE wCS,
SINCE THE wCS IS nNUT DIRECTLY WEAUABLE,

ERROR MESSAGE HELP FILE

T'<TEXT=STRING>'
THE

?'<KTEXT=STRING>'
THE

TFILE

?FILE

ANY

FILE

GENERATED

HELP

CONSOLE

COMMAND

PART

CAN

NOT

RECOUGNIZED

COUMMAND

COMMAND

TRANSLATED

RADSO

FILE,

WITH A

THE

'LOAD'

CURRENTLY

'HELP','BOOT',

BOOT

FILE,

WCS

'@'

LOADED

COMMAND DOES NOT

FLOPPY

DISC.

ATTEMPTED

FILE

MISSING

CAN

WCS LOAD

FROM

ALSO
IF

FLOPPY,

RESPONSE
CONSOLE

NOT

CONSOLE

CLK

THE

STOP,

WAITING

WAIT

LOOP,

FOR

REQUIRING

CPU

NOT

WAS

RESPUNSE

ASSISTANCE

THE

FROM

CPU

ABORTED

CONSOLE

FROM

CPU

SERVICE

WAS

1SSUED

LOOP

ABORTED

COMMAND

1SSUED

CUMMAND

COMMAND

CONSOLE

WAS

?FLOPPY

TIMED=0UT

CONSOLE

WHILE

?CPU

COMPLETE

FOUND

MATCH

7CPU

NOT

WITH

A <FILE=NAME> GIVEN

TNO CPU

ERR

<FILE=NAME> GIVEN

NOT

INCORRECT

<TEXT=STRING>

NAME
A

INCOMPLETE

<TEXT=STRING>

WHILE

THAT
THE

REQUIRES

CLOCK

WAS

THE

CPU

CLOCK

RUNNING

STUPPED

ERR,CODE=X
THE

CONSOLE

FLOPPY

DRIVER

DETECTED

ALWAYS

PRINTED

ARE

CObE=1

FLOPPY

HARDWARE

CODE=2

FILE

CODE=3

FLOPPY

CODE=4

COUNSOLE SOFTWARE REQUESTED AN ILLEGAL SECTOR NUMBER

?FLOPPY

NOUT

THE

DRIVER

FLOPPY

QUEUE

DRIVE

ATTEMPTED TO

VALID

ERROR
A

FOUND

UOVERFLOwW

FAILED

BECOME

READY

WHEN

BOOTING.

FLOPPY

CONSOLE
A

RADIX)

ERROR(CRC,PARITY,ETC)

READY

CONSOLE

TNO BOOT ON

?FLOPPY

HEX

CODES

FOLLOWS
¢ (CODES

NOT

ERROR,

BOOT

FLOPPY

BOOT

FROM

FLOPPY

THAT

DOES

NOT

CONTAILN

BLOCK.,

BOOT
ERROR

WAS

DETECTED

WHILE

ATTEMPTING

CONSOLE

BOOT,

ERROR MESSAGE HELP FILE

?MIC=ERR ON FUNCTION

A MICRO=ERROR OCCURRED IN THE CPU WHILE SERVICING A CONSOLE
REQUEST.

S8BI

ERROR

REGISTERS ARE DUMPED AFTER THIS MESSAGE

I8 PRINTED,
7INT=REG ERR
A

MICRO-ERROR OCCURRED

INTERNAL (PROCESSOR)

WHILE ATTEMPTING TO

ILLEGAL

REFERENCE

ADDRESS

WILL

CPU

CAUSE

THIS ERROR.
CODE=X

?MICRO=ERR,

UNRECOGNIZED MICRO=ERROR OCCURRED,

THE CPU

X'
PINT=STK

IS NOT

DBLE=ERR

?ILL

I/E

THE CODE RETURNED

RECOGNIZED

WAS RETURNED BY

ERROK

CODES.,

THE CPU,

HALTED

BECAUSE

THE

INTERRUPT

STACK

WAS

MARKED

INVALID

HLT

THE CPU

HAS DONE

'DOUBLE ERROR'

DETECTED

ILLEGAL

HALT

VEC

THE

CPU

INTERRUPT/EXCEPTION

VECTOR

WCS

CPU
NO

7CHM

RANGE OF

INVLD

7CPU

USR

THE

IS THE CODE THAT

THE CPU

?NO

DETECTED
USER

WCS

INTERRUPT/EXCEPTION

VECTOR

USER

WCS

AND

EXISTS

ERR
A

?MEM=MAN

CHANGE

MODE

INSTRUCTION

WAS

ATTEMPTED

FROM

THE

INTERRUPT

STACK

FAULT,CODE=XX

A VIRTUAL EXAMINE OR DEPOSIT CAUSED AN ERROR 'IN THE MEMORY
MANAGEMENT
RETURNED

MICRO=ROUTINE.
THE

BIT

= FAULT

WAS

BIT

BITS

LENGTH

ROUTINE,

WRITE
ACCESS

THRU

'XX'

WITH

THE

VIOLATION(BITS

PTE

MODIFY

ONE

NUMBERED

REFERENCE

INTENT

VIOLATION

SHOULD

IGNORED

6-11

BYTE

FOLLOWING

FROM

ERROR
BIT

CODE

ASSIGNMENTS:

RIGHT)

ERROR MESSAGE HELP FILE

?IND=COM

ERR

THE CONSOLE DETECTED AN ERROR IN THE FORMAT OF AN INDIRECT

COMMAND FILE. POSSIBLE ERRORS ARE:
IN AN INDIRECT COMMAND LINE,

1) MORE THAN 80 CHARACTERS

A CUMMAND LINE DID NOT

END WITH A CARRIGE RETURN AND LINE FEED.
INT

PENDING

THIS IS NOT ACTUALLY AN ERROR,

BUT INDICATES THAT AN ERROR

WAS PENDING AT THE TIME THAT A CONSOLE-REGQUESTED

HALT WAS PERFORMED. CONTINUE CPU TO CLEAR
?WARNING=WCS &

FPLA

VER

INTERRUPT,

MISMATCH

THE MICROCODE IN WCS IS NOT COMPATIBLE wIIH FPLA,

THIS MESSAGE IS PRINTED ON EACH ISP START OR CONTINUE,BUT
NO OTHER ACTION

TAKEN

CONSOLE.

TFATAL=HWHCS & PCS VER MISMATCH

THE MICROCODE IN PCS IS NOT COMPATIBLE WITh THAT

IN WCS,

ISP START AND CONTINUE ARE DISABLED BY CONSULE.
TMICRO=MACHINE

TIME

OUT

INDICATES THAT THE VAX=11/780 MICRO=MACHINE HAS FAILED
TO STROBE INTERRUPTS WITHIN THE MAX TIME PERIOD ALLOWED,
TREMOTE ACCESS

NOT

SUPPORTED

PRINTED WHEN CONSOLE MODE SWITCH ENTERS A

'REMOTE'

POSITION,

AND THE REMOTE SUPPORT SOFTWARE IS NOT INCLUDeD LN THe CONSOLE.
TTRAP=4,

RESTARTING CONSOLE

THE CONSULE TOOK A TIME=OUT TRAP.
TUNEXPECTED

MOUNT

CONSOLE WILL RESTART.

TRAP

CONSOLE FLOPPY,

THEN

TYPE

“C

CONSOLE TRAPPED TO AN UNUSED VECTUR,

CONSOLE REBOOTS WwHEN

“C TYPED

7Q=BLKD?

CONSOLE'S TERMINAL OUTPUT QUEUE 1S BLOCKED.

CONSOLE wILL REBOOT.

V BUS CHANNEL CONFIGURATION

V BUS

CHANNEL

MODULES

r—H

‘e

A
uscC

M8235

‘

CEH

M8230

DAP

ICL

M8229

M8231

IDP

CAM

CDM

IRC

M8224

M8220

M8223

M8221

SBL

SBH

M8218

‘

TBM

M8222

)

M8219

‘
FCT

M8289

FAD

M8288

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TK-0703

CHAN

BIT

(HEX)

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20001

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USCN
USCN
USCN
USCN

L)
0

A28

n2a5A

PR29

22@51

1)
17

222A
?@2R

@nese
AaPS3

00
2]
be
0o

anen
NO2E
AneF
AR3Q

PRas5s
LR
ArPASY
PRALA

PR3y

@02cC

angy2

IRy

N3y

ARASY

062

Banes

X Iy

M8235

MB235

M8235

MB8235
MB823§

CPTX

M8235

CPTX
CPTX

MB23§
MB235

MB235

CPTX
CPTX
CPTX

USCN

M823s

CPTX

USCN
USCN

MB23S

CPTX
CPTX
CPTX

USCN

MB23S

MB8235

USCN
USCN

MB235

"USCN
USCN

MB235S

USCN
USCN
USCN

MB235
MB235
MB23S
MB23S
MB235

USCF
USCF
USCF
USCF
USCF
USCF
USCF
USCF
USCF
USCF
usce
usce
uscJ

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

upCcsv
UPcsSv
uPCsSv
UPCSV
uPCS8Sv
UPCSV
upPcsv
UPCSV
UPCSvV
UPCSV
upcsv

01
a3
83
@4
@S
86
a@v
@8
@9
{0
i1

uPCsyv

1¢e
H
H

STALL
UTRAP

ECO DISPATCH 86 H
ID BUS XCVR EN L
CS WR (31:3006) H
€S WR (633832) H
CS WR (95864) H
WCS
WCS

WR CYCLE H
MEM AVAIL L

ACC OVERRIDE L
IBUF EN (@78100)
ALU

LAGD®

CPTX

CPTX
CPTX
CoTX
CPTX

M8235

USCF

UPCSvV

IXTXTXXIXTXTIXTIITIX

V BUS DIRECTORY

UBG

PsL

BIT

ALU

€

(1)

ust

LAGY

TBMD

(1)

uge H
UTRAP VECY B H
LASY REF CODE {

DAPD

$s(1)

CEHE
TBMD
ODPS
JJ

UTRAP

VECT

{

LAST REF CODE P H

NEe,

V BUS DIRECTORY

0038
8039
PO3A

22070
20071
00072

@038
e03cC
983D
A23E

20873
000874
00075
peaTe
eee77
00100

003F
pau4e
004y
P04
2043
Bayy

09102
00103

004s

00105

0046
2047

00126
00107
eni1e
00111
02112
Pe113
02114
02115

@848
6049
eo4A
f0uB
204C
@940
BOUE

P0101

02104

20116
00117

QOUF
pase
20sS1

f01et

Anse

00122

aes3
80854
0055

aALes

anseé

@057
2058
@059
#0S5A
8ess8
8osC

@esD
B0SE

Q0SF

P0120

2n1el

en12u
po1ee6
en127

0n130
eR131
pa132
00133
Pa134
Pa135
a0136
02137

8060

pa1UD

8061

00141

vose
2063
@064

00142

80143
20144

SIGNAL

USCN
USCN
USCN
USCN
USCN
USCN
USCN
USCN
USCN
UBCN
USCN
USCN
USCN
usce
usce
usce
USCP
u8ce
vace
usce
usce
usce
usce
UsCP
usce
USCH
usCJ
uscJ
UsSCJ
uscJ
uscJ

M8235S
M8235

cPTX
cPTX

CEHE
CEHF
ICLK

UsScJ
uscJ
uUsScJ

uscJ

USCM
USCHM

USCM
USCM
USCM
USCM
USCM

USCM

USCM
USCM
USCM
USCM
USCHM

M823S
M8238

M8235

M8235
M8235

M8235

M8235
M8235

M8235
M8235
M8235

M8235
M8235

M8235
M8235
M8235
M823S
M8235
M8235
M8 235

M8235
MB235
M823s

M8235
M8235
MB235
M8 235

M8235

M8235
MB235
MB235
M8235

MB235
MB235
M8235

MB23S
M8235

M8 235
MB235

MB235
MB235

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

CPTX

CPTX
CPTX
CPTX
CPTX
CPTX
CPT3
CPTO

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTe
CPT2
CPT2
CPTe
CPT2
CPT2
cPT2
CPT2
CPT2

UTRAP

(1)

UTRAP VECT
FPD BIV L
EALU N (1)

USCN

BEN

uscJ

PRIOR

PRIOR
PRIOR

1
2

L
L

UsCJ
USCM
USCHTM

USCM

uscTM
USCM
USCM
USCM
USCM
UsCwm
USCM

BUF

UPC
BUF UPC
BUF UPC
BUF UPC
BUF UPC
BUF UPC
BUF UPC
BUF UPC
BUF UPC
BUF UPC
BUF UPC

@@
@1
02
@3
@4
@S
@6
@7
M8
09
10

BUF

11
12

CPTX

RESERVED

8066

8067

02147

USCX

MB235

(1Bg14 )

UsCJ

USCM
USCM

V210|
USCX

(1 )

USCN BEN EN (1Fs1C )
USCN BEN EN (13310 )
USCN BEN EN (D700 )
USCN BEN EN (PF3@8 )
USCP BRBITA(1F31C)
ICLE BRBITO(1B8314)
ICLE BREITO(BF308)
usce BRBIT1(1F31C)
ICLE BRBIT1(1B314)
ICLE BRBIT1(0F308)
usce BRBIT2(1F11C)
ICLE BRBIT2(1Rs14)
ICLE BRBIT2(@F3108)
usce BRBITI(1F31C)
ICLE BRBIT3(1B314)
~USCP BRBIT4(1F31C)
USCH SYNC PULSE H
CIBN D MAINT RTN H
UscJ INIT (1) H
uscJ STYALL (1) H
UscJ UTRAP (1) H
uscJ UECO (1) H
uscJ MAINT RET (1)

CPTe2

2@145S
L RYTS

CEHE
CEHH
ICLK

cpve
cPT2
CPTe
CPTX
CPTX

MB235

ERR

EALU

MB235
M8235

VECT

NESTED

MB235

M8235

0065

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

NAME

BUF
RESERVED

USCM

RESERVED

UPC
UPC

EXTIXTIT
X

00065
00066

Ted6

XTI XIXIrrxrrTxrxx

20067

MODULE

e03S
Boe3e
0037

DWG

X IIXTITIXTIXIIXITTXI

817
COCTAL)

XXX

BIV

(HEX)

V BUS DIRECTORY

BIY

(HEX)

MODULE

CEHE
CEHE
CEHE
CEKE
CEHE
CEHF
CEHF
CEHF
CEHF
CEHP

M8l
MB823@

CEHA

MB230

CEHA
CEHA

Mg23e

M823@

ARl
e
0017
AN@2na

CEHA

MB23e

M8230

CPTX

gAvel
AR
pA@23
PR324
PAR25
8v026
epa27Y

CEHA
CEHA

CEHA

MB8230p
MB230a
MB23@
MB823m
MB230

nAN3H

CEHA
CEHA
CEHA

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

AneaA

0000

ARR

P0Q01

AAm2

ARBA2

PoR3

nveny

BAaY
naBs

AABVNYU
NOBARS

BAR6

RVBBGe
20607

Baay

0008
A0a9
ARAA
AneB

aaac
anen

AR0E

ABOF
2010
ont
neie

8613
PAty
naLs

eaie6
Ao17
218
)
J:B

A3R1
0

onRAty
anaie.
vAAL3
29014
Gn@aLs

PBA3Y

ARLF

peuse
20033
RY
LT
PIB3S
PAa3e
a0a3y

Anen

peaue

AQ1A

AALR

aa1C
naio

volE

SIGNAL

DWG

BIT

pa21
L

0n0oUy
LY

nres
ve24y

PAGYUY

aa2s

PAAUS

N6
a7

QAnde

nAGUY

CEHA

CEHA
CEHA
CEHA

CEHA
CEHA

M8230
MB8230
M&230
MB230
MB234a
MB233
MB823@
ME23%

MB23a

MB8230
MB230

M823a
Me23o
M8230

MB230

CEHA

MB8230

CEHA

MB2la@
M823@

CEHA
CEHB
CEHB
CEHB
CENC
CEHC
CEHC
CEHC
CEHC
CEHC

MBe 3@

MB230
MB23@

MB233

MB82308

MB23e@
MB230
M2l

MB8237

CPTX

PCcSC
SRLP
TeMW
CEHF
CEHF
CEXF
CEHF
IcLS
NEPM
DOPD
DEPD
NDEPD

CPTX

DDPB

AMX1S

CPTX
CPTX
CPTX
CPTX
CPTX

CPTX
CPTYX

CPTX
CPTX
CPTX

CPTX

CPTX
CPTX
CPTX

MB230

cPTX

CEHD
CEHD
CEHD

M8230

cPTX

MB&23n

ya2e

AGAecC

ABASY

CEKD
CEHD

MB23Aa

CEHE

MB823a

CEHE

MB234
MB239

MR239

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
cCPTX
CPTX
CPTX

MB823a

CPTX

M8230

CPTX
CPTX
CPTX
CPTX
CPTX

na2Dd

NB2E

woeF
3N

ARASS
LY
AvesS7
ANR6D

#0313

2uA61
PARG2
0RG63

6034
8a3s

20064
BAGES

0836
04a37

Y
neae67

A38
2039
R
Y
2038

P0079
80871

»ayl
a3

ee3C

883D
@A%E

va3F

oan7e
0007Y
aae74
20807s
8AB7T6
@ee77

CEHD

CEHR
CEHR

CEHR

CEHE
CEHE

CEHE
CEHE
CEKE

CEHE

CEHE
CEHE
CEHE
CEHX
CEHX
CEHX
CEHX

M8239

MB23n
MB230

MB23la
MB230

MB8231a
MB23a

Meg2la
MB239Q

MBe3n

MB23@

Ma23la
MB230

MB23@

MB230

6-16

PAR

PAR ERR (31:00) H
PAR ERR TRAP L
PROT UTRAP L
IRD STATE H
READ RLOG H
LOAD STATE H
CLR UWORD (1) H
EN ID XCEIV L
BMX3f L
BMXIS L
BMX@T L
AMX3IY L

CEHD

¥R
QRA2A

(95864)

ERR

PCSC

CPTX

pAau?
AR50
emRasy
24052
enASy

(]F-]-]

NAME

(0CTAL)

CPTX

CPTX
CPTX
CPTX

(63332)

"PCSC PAR ERR

DCPD AMXOT7 L
DEPK ALU BUFFY{ L
DCPL ALU CARRY31 L
DCPL ALU CARRYiS L
NCPL ALU CARRYO7 L
CEHA ALU BUFFIT L
CEHA ALU BUFFié6 L
CEHA ALU BUFFi1S L
CEHA ALU BUFFQ7 L

DEPN ALU(3Ot18)=20 L
DDPF
DCPF

ALU(1S:08)s0 L
ALU(OT:00)=06 L

DDPN

EALUBGS

BUS ALU BYTER2,3 A=2B H
BUS ALU BYTE{ A=B H
BUS ALU BYTED A=8 H
DCPA AMXOG L
DAPB AUALU=A PLUS B L
DAPB AUALUSA MINUS B L
H

DDPN EALUGS H
ACCX NDATA H
ACCX ZDATA H
ACCX VDATA H
ACCX CDATA H
CEHD SECOND REF H
SBLY STALL L

D@ CONT H
FLOAY H
WORD CONT H
BYTE CONT H
SAVE CONTEXT H
FLOAYT NZERO H
USCB CLR UTRAP L
DCPH VAB2(1) H
DCPJ VAQL(1) H
IRCJ
IRCJ
IRCJ
IRCJ
TRMW
DOPS

DCPJ
TRMW

VAQA(L) H
EN CMODADRS

H
TBMN PAGE EDGE H
TRMW EN UNALIGN TRAP
SALM TIMEOUT TRAP L
SBLR RDS TRAP L
TBMW TB PAR UTRAP L
TBMW

TBMW
CEHE

MISS

UTRAP

MBIT UTRAP L
€8 PE TRAP H

RESERVED

RESERVED
RESERVED

RESERVED

V BUS DIRECTORY

CHAN

BIY
(HEX)

0000

BIT

DWG

P0000

DAPA
DAPA
DAPA
DAPA
DAPA
DAPA
DAPA

82
82
82
82
82
a2
]
]
82

geot
000
0003
0004
000S
2006
2007
2008
9009

0000}
00802
00003
290004
A000S
00006
0007
00010
00011}

0008

22
82
82
8e
]
02
-}
82

@AaC
0200
00QE
000F
0010
0011
po1e
2013

09013

000814
20018
00016
20017
00020
001
gogee
00023

DAPC
DAPC
DAPC
DAPD
DAPF
DAPF
DAPF
DAPP

"}
02
82

0016
8017
0018

A01A
0018
@oic
8010
@01E
PB1F
Pe20
ge21
9022
0023
po2y

00026
0007
00030
00631
P0032
20033
00034
90035
00036

DAPF
DPAF
DAPYX
DAPYX
DAPYX
DAPL
DAPL
DAPL
DAPL

@0040
00041
eaQye
00043
0094y

DAPL
DAPL
DAPL
DAPL
DAPL

PoRU6
eQay7
ANpse
9MAS 1
0A0S2
80053
P0ASY

DAPL
DAPX
ICcLY
ICLA
ICLA
fcLA
ICLA

0a0Ss
00057
00060

]
02

]
82
o2
]
¥
B2

82
62
]
]
02

]

g2
02
82
22
02
P2
02

02
B2
82
¥

02
B2
B2

000A

naiy
90158

8019

2025

0026
@027
0028
P29
AA2A
9028
pa2c

0020

002E
002F
2030

90a31

0032
Aa33
2034

MODULE

7.8,

SIGNAL

NAME

(0CTAL)

200812

p002¢
00029

20037

0P8 UsS

0gnASS

P0061

00062
02063
PRB6Y

DAPA

DAPX
DAPX
DAPX

DAPC

DAPYX
DAPD

MB8229

CPTX

IRCF 0oPCO H
0OPCi M

M8R229
MB229
MB8R229
MB229
MB229
MB8229
MBR29
MB8229
MB8229

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

IRCF
IRCF
IRCF
IRCF
IRCF
IRCF
IRCF
CEHD
CEHD

M8229

CPTX

RESERVED

MB829

CPTX

M8229
M8229
MB8229
MB8229
MB229
MB8229
M@2es
MB8229

CPTX
CPTX
CPTX
CPTX
CPTX
cPTX
CPTX
CPTX

MB229
M8229
MB8229

CPTX
cPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

MB229
MB8229

MB229
MBR29
MB229
M829
M8229
M8229

CPTX
CPTX

0PC2 H
OPC3Y W
0OPCY H
0OPCS W
OPC6 H
OPCT H
MEMREF DT=B H
MEMREF DTe=LFDG H

RESERVED

IRCE BYTE CONT W
IRCE WORD CONT H
IRCE LFDQ CONY H
IRCH PC REG H
RESERVED
IRCE 8P1 CON2 H
IRCE SPi{ CON{ H
IRCE SP1

COND M

DAPB RLOG UPDATE H
CEHF READ RLOG H

RESERVED
RESERVED
RESERVED

RESERVED

MB229
M8229
MB8229
MB229
M8229

CPTX
CPTX
CPTX
cPTX
CPTX

RESERVED
IDOPN S§P1
10PN SP1
IDPN 8P1
IDPN SP{
IDPN 8P2
IDPN 8P2
IDPN SP2
IDPN 8P2
IDPN PRN
IDPN PRN

MB8229
MB8229
MB231
MB8231
MB8231
MB231
M823y

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

IDPN PRN 3 L
RESERVED
WCSC WCS EVEN PAR H
8BLM TIMO CNF INTR L
8SBHL FAULT INTR H
SBHE SBI ALERT R H
SBLM CRD RDS INTR L

IcLA
ICLA
ICLA

MB234
MB231
MB231

CPTX
CPTX
CPTX

SBHE 8BI
SBHE SBI
SBHE SBI

REQ7 R H
REQ6 R H
REQS R H

icLe
icLe
icLe

MB231
MB23§
MBR23 4

CPTX
CPTX
CPTX

ICLB
1CLB
ICLB

ACT 4 W
ACT 3 W
ACT 2 H

DAPL

ICLA

M8229

MB8229

MB23{

MB231

CPTX

ADRO
ADRY
ADRZ2
ADR3
ADRO

L
L
L
L

ADRY L
ADR2 L
ADR3 L
@ L
§ L

I0OPN PRN 2 L

8BHK COMP INTR H

SBHE SBI REQY R H
IPL
IPL
IPL

V BUS DIRECTORY

MODULE

7686

SIGNAL NAME

B2
"
" F
]
ve
e
B2
82
Be
B2
B2
82
B2
82
62
Be

aa3s
nA3e
BA37
pa38
P39
BAJA
AR3B
wa3c
233D
BO3E
BB 3F .
20u0
PAul
@vu?2
aeul
noUY

ARAA6S

ICLB
ICLB
ICLC

MB8231

CPTX
CPTX
cPTX
cPTX
CPTX
cPTX
CPTX
CPTX
CPTX
cPTX

IcLB
ICLB
CEXHJ
CEHJ
CEXJ
CEHJ
CEHR
CIB8

IPL ACT
IPL ACY
PRIOR 3
PRIOR 2
PRIOR |
PRIOR O
INTR REQ L
CNSL RCV INTR H

CEHP

1D30 H

Be
8e
Be
02

2A46
A4y
Qyus
049

BAYA

]
B2

LY TE:)
a@uc

I
6e
@2
B2
82
Be
82
82
62
82
Be

QAUE
PAUF
2aS0
00o51
pase
AAS3
0A54
PASS
20856
AASY
np%8

ve
Be
F]
82
82

BASA
2ASR
AAsSC
@aash
VASE

62
1]

er6n
ene1

pu104

MB231

RALA6

M8231

eaia7

MB231

ne11o
ei1
eAgie

MB231
MB231

MB231

Mg231

"eq1s

MB231

LLIRY]
AR11s
eR116
ea117

MB231
MB231
MB231

paile

ICLH
1CLH
ICLH

00ASF

P2126
nAaLeT
pa139
na134
Aa132
2133
20134
A213S
24136
a6137

0A62

pAtde

]

0063

AA143
nB14d

02
]
]

0065
0066
0Re7

AB14s

" F]

“F]

PU6Y

aviue

nriUy

na1deé
anLay

MB231
MB231

MB23y
MB231

MB23
1
MB231

ICLH
ICLH
ICLH
TCLH
1ICLJ
1CLJ
ICLJ
ICLJ
ICLJ
1ICLJ
ICLJ
1ICLJ
ICLK
ICLK
ICLX

MB231
MB231
MB231

MB231

MBeli
MB231
MBe3i

MB8231

CPTX

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

CPTX
CPTX
CPTX
CPTX

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
cPTX
CPTX
CPTX

IRCE STALL#SVC L
CIBN HALY REQG H

RESERVED

DDPS
DBPV
DOP8
DBPV
DDPS
DBPV
DDPS
DBPV
IRCH
IRCH
IRCF
IRCH

BRANCHI
BR BIT3
BRANCHZ
BR BIV2
BRANCHI
BR BIV!
BRANCHO
BR BITO
BRCI H
BRCA W
OPC 9 H
READ OP H

ICLE
ICLE
ICLE
ICLH
ICLH
IcLK
ICLKH
ICLH
ICLH
ICLH
ICLH

REM BEMX 82 H
REM BEMX 81 H
REM BEMX 80 H
ID TO PSL H
ID YO VECT L
ID YO CES H
ID YO ATMP L
ID TO BYMP L
IDM 82 L
IDM 81 L
IDM 86 L

SCO1}

RESERVED

DDPR 8SCOS
DDPR SCO4
DDPR SCO3
DDPR 8C@2

M8231

CPTX

DDPR

MB231

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

DDPR 8C@8
IcLJ D 7O

MB231
MB8231
MB231
MB231
MB8231

XMIT INTR
CODE2 (1)
CODE1 (1)
CODE® (1)

TXXxTxXxTxTxX

AB123
AA10S

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

CNSL
TRAP
TRAP
TRAP

POAT7
pei1oo0

@210814
03102

CIBS
CEHC
CEHC
CEHC

(
(
(
(
(

(
I

et puo

MB231
MB8231
M8231
M8231
M8231
MB231
MB231
MB231
MB231

neaTs

nEaTe

)
)
)
)
)
)

MEg231

PAAT3
oeaTd

ICL?
ICLE

Ans9

MB231
MB231
MB8231

avaTe

ee121
eoiee
pe1es
e0124
pn12s

MB8231

s pts puts

eadn

A0aTa
AA@AT1

I XTIXTXTIT
X

nAds

0na67

MB8231

ANAb66

rxXT

DKHG

(0CTAL)

BIT

ITXIETI@e

BIV

(HEX)

CHAN

ICLJ ID TO @ L
DOPN EALUQGY H
DDPN EALUS® L
RESERVED

H
H
H
H

V BUS DIRECTORY

CHAN

BIT
(HEX)

0BR0

03
03

29@2
nen3

BIT
(OCTAL)

MB222

CPTX

TBMD D TO MD L

MB22?2
MB822?2

CPTYX
cPY®

TBMD EN ID DRIVERS L
TBMS CPTO L

PBA11

03
03
03
23
23
03
83

@NDA
aven
aeac
@aaD
GA0E
PO0F
anio

0912
PAB13
P11y
fQA1S
10 BEY
o1y
neQen

83
83
83
03
¥3
93
P3
83

poat1e
013
014
P01S
potie
aQ17
18
019

geg2y
papee
pvaes
aaQ24
20025
Aea2eé
07
Avo3A
0@

APLA

83
23
83
03

paiB
pa1C
eeiD
A0 E

23
23
83
03
83
83

AP0
"pei
eaee
0223
ANy
Anes

o004Q
panyq
evQ4e
APPu3
neQuy
nanyus

23
83

paee
027

ARAUG
paady

83
23
03

nae9
PA2A
pRen

pPRSy
0Pas2
20253

0e20

PaPsSs

011

001F

P28

Po2C

NAME

TBMD

aa0ey
nAQAS
00A06
aeany
eneln

SIGNAL

T8MD
TBMS

adeu
anas
0Ad6
ARR7
00n8
an09

T,S,

RAQA0Q

Pea01

MODULE

ga@a2
N0aNS3

orel

03
03
23
03
03

DWG

TBMD

CPTX

TBMD

MASK

GRP @ WP L
GRP | WP L
7B GRP @ MATCH H
TB GRP 1 MATCH H
CMODD ADRS TRAP L

TBMU

MBR22
MBR22
M8222
MB222
MB22e

M8222

CPTX
CPTX
CPTX
CPYTX
CPTX

TBMF
TBMF
CAMU
CAMU
CEHE

TBMW
TBMX
TBMN
TBMN
TBMYX
TBMU
TBMK

MBR22
MB8eee
MBR22
MB222
MB822e2
MB82ee
MB22¢e

CPTX
CPTX
CPTX
CPYX
CPTX
CPTX
CPTX

CEHE CS PAR ERR H
RESERVED
USCB ABORY CYCLE H
IRCH IB WRITE CHK MW
RESERVED.

TBMK
TEMK
TBMC
TBMX
TBMX
TBMX
TBMW
TBMX
TBMX

MB222
MB2e22
MB8eee
MBe2e
MB222
MB2ee
M@2ee
MB222
MB2e2

CPTX

poO32

TBMX

MB222

CPTX

RESERVED

ARR33
veal3y
00035
gR@a36

TYBMD
TBMB
TBMB
TBMB

MBeee
M822e2
MBgee
MB82e?

CPTX
CPTX
CPTX
CPTX

CAMV
CAMV
CAMY
CaAMV

MODIFY
PROTECT
PROTECY
PROTECT

10PA
IDPA
IDPA
10PA
IDPA
IDPA

Ma224u
MB224
MB224
MB8224
M8224
MB8224

cPYR
cPYO
CPYo
CPTO
cPTo
CPY@

IDPA
IDPA

BUF BO=7(i)
BUF BRe6(1)
BPA=S(1)
BUF B@=4(1)
BUF B@=3({§)
BUF B80=2(1)

iDPA
10PA

MB224
MB224

CPTQ
cPT@

iDPA
IDPA
IDPA

MB8e24
MB224u
MB8e2y

290A37

fA250¢

NAASY

TBMF
TBMF
TBMC
TBMC
TBMU

MB222

TBMB

10PA

MB222

Mg2euy

CPTX

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPYX
CPTX

CPTX

cPTo

CPYO
CPTO
cpYa

CEHE

PAGE

TRAP

T8MU CANCEL L
SBLB SBI PA @9

|
$8LB SBI PA 10 L
88LB 8SBYI PA 11 L
TBMC ENABLE Ia H
RESERVED
RESERVED
88LS IB ERR LTH H
8BLT STALL L
RESERVED
RESERVED

CODE @ L
CODE {1 L
CODE 2 L

CAMY PROTECT CODE 3 L
IDPA

IDPA

BUF

IDPA
IDPA
IDPA
IDPA

BUF
BUF

IDPA
IDPA
IDPA

BUF Bleb(1)
BUF BieS(1)
BUF Bied4(1)

BR=1(1)
BO=0(1)

IDPA BUF BileT(1)

H
H
H
H
H
H

H
H

IDPA

M8224u

cPYo

I0PA

BUF

Bi=3({)

83
3
83
23

Bo2E
NoerF
An3a
AN3L

wonse
vApsS7
nAY6d
LY

iDpPa
IDPA
iDPH
I1DPH

MB224

CPYO

IDPA

BUF

Bilef(1)

M8224
MB8224
M8224

cePva
CPTO
cPTa

IDPA
IDPH

BUF
IBC

BieB(1)
3(¢1) H

IDPH

IBC

2(1)

83
83

0e33
AA34

PPB6T
neR6d

1DPH
i1DPH

MB224
M8224

cPTo
CPTX

IDPH

IBC

B(1)

CLR

¥3

nn3e

noo6?2

1D0PA

I1DPH

MBR24

MB22U

cPTO

cPTQ

IDPA BUF Bile2(1)

IDPH

IBC

1(1)
L

V BUS

MODULE

TeS,

Ba3S
BBY6

BOA6S
00066

1DPH

MB224

CPTX

1DPA

MB224

8037

e08N67T

1DPA

2038

20670

AAa%9
BBIA
PAIB
BBIC

nAvT1
pea7e
0ABT73
PBB74U

10PJ
10PX
1DPJ

CPTQ
CPTX
CPTX
CPTX
cPYO

AB3D
BAYE

eeaTs
neB76

BOA3IF

eABT7

Gou0

G160

AAL Y

S RNCR

Bose
AB43
ABLY
204s
ABU6

pB10e
0A1B3
001064
fa108
RALB6

6047

POUus
BpBUS
BALA
PBUB
8a4€
@auD

BAULE

G167

na11o
ALl
paiie
0113
G114
60118

GAUF
1Y)
651
8pse
#0653

6a§16
06417
@0120
goi1éet
paiee
AB123

ABSY

pai2d

0655
BeA%e
0087
bpasS8
@@59
AAS A
ABS8

po128
ABies
PB127
AA130
08131
pa13e
AA133

BasSc
¥a%0

0o134
P0A13S

ABSE

00136

BBSF

06137

MBeeu
MB2ey

MBe24
MBe2d

10PJ

MB224

1DPJ

MBe224

10PJ

10PJ
10PJ
1DPM
JDPM
10PM
1DPM
1DPM

MB8eey
Mgeead
MBeeu
MB224
MB8224

MB224
MB224y

i0BM

MB224
MBeey

10PL
1DPX

MB2edy

10PM

MBeed

1DPM

MB224

10PM

MB224

1DPM

MB2ey

10PM

10PM
10PM
1DPM
IRCH
IRCH
IRCC
IRCYX
IRCE
IRCJ
IRCJ
IRCM
IRCE
IRCE
IRCE
IRCE
IRCC
IRCC
IRCC
IRCX

Meeed
MB2ed

MB2ed
MBg224
MB22d
Mg§223
MBee3d

CPTX
CPTX
CPTX
CPYX

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

CPTX
CPTX
CPTX
CPTYX
cPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

SIGNAL

IRCE

NAME

SAVE
VAX

SBLR

D8T
IB

ipPA

COUNT H
FLUSH L
BS VAL(1)
B4 VAL(C1)
B3 VAL(G)
B2 VAL(OQ)

IRCD
IRCD
IRCD
iRCE
IRCE

SEL LONG L
SEL WORD L
SEL BYTE H
CTX 3 L
CTX 2 L

iRED

ipPL

MODE

ID BUS

ipPM

vaxsSL

ioPM B

MB8223

6-20

cPYO
cPYa

TRMX

ERR

TRMX TB MISS
CEHH FPD BIT
IRCE

L
L

ADVANCE

CON §
CON @

H
H

IRCM

DATA

icLD
fcLD
ICLD
ficLD

SERVICE
SERVICE
SERVICE
SERVICE

H
BIY
BIT
BIT

IRCC EXEC CT

2 H

IRCC
IRCC

TBMYX

CP7O
CPYO
cPyo
cPT®

TBMX

MB8223

MB223d
MB223

PC O H
DELTA

CPTH

cPYO

XCVR

DELTA PC

MB223

M8223

DEST

ipPM

Megeey

MB8223

H
H
H
W

ipPM B DELYA PC 2 H
IDPM {6 BIT B DEST L

IRCJ SP2
IRCJ SPe

MB8223

RESERVED

CPTX
CPTX
CPYX
CPTX

MB8223

DATA

I0PJ
10PJ
ioPJ
10PJ
I0PJ
ipoPJ

RESERVED

MB223

MODE H

READ

RESERVED.

CPTX

Maeeld
MB82el

IDPA

EXEC
EXEC

RESERVED

CV
CYT

@
1

H
H

DHG

TTII
X

BIV

(OCTAL)

Ny ==

BIT

(HEX)

V BUS DIRECTORY

MODULE

T.S.

SIGNAL

CPTX

TBMX
TBMX
T8MX
SBHF
§BHF
8BHF

A3B07
AAG
L

2000
pAGAY

CAMP
CAMP

MBe2an
M8229

VARG
2

CAMP

CPTX

pA@E2

MB220

CPTX

Ana3

AJBaAs3

0BAY

CAMB
CAMB

M82280

2AA4

Waa6s8

A0B3S
eARRT

CAMB
CAMB

eoma7
9C3A10

CAMS

nAAB

neAlq

A
AP
Boas

P001¢
0013

AAGC

Q0aA1d

CPTX
CPTX
CPTX
CPTX
CPTX
CPYX
CPTX
CPTX
CPTX
cPYX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPT3

ARB6

2@y

860
PAAE

PaBF
0A
001

P0e1S
PAQ1
6
nAa17

CAMS
CAMS
CAMT

MB8e220

MB2en

MB8220
MB220
M8220
MBeen

Mgaen

CAMT

MB8221

CAMY
CAMY

Mg22a
MB220
Mgean
MB8220

CAMU

CAMU
CAMK

MB822@Q

CAMK

MB8229
Mg2en

gail
aate

]l 4]
peeel
Armee

813

nYAR3

CAMP
CAMP

wa14

nog24

CAMM

2915

0002s
20026

CAMM

MB2en

MB22W
MB220
MBeen
MB220

cPYe

CPT1
CPT1

ALy
LLB

fRRe7

CAMM
CAMM

23030

CAMP

MB220

cPTX

PAGY1q

CAMP

CPTX

MB22@

A0@3e
noG33

CAMP

M8220

001A

0a1C

BOA3Y

@810

Q¥A3S
IR
Y
AA37

CPTX
CPTX
cPTX
CPTX

na1e6

OR1E

QO1F
hnea
peet

CAMP

MB22@

CAMX
CAMB

Maeea

CAMX

MB22¢

CAMB

Ba2A

POAYT
20AS0
PAAS
pAase

4a28

PAQS3

an2c
aged

07058

CAM|
CaML
CaAML
CAML
CAaML
CAML
CAM|
CAML
CAML
CAML
CAML
CAML
CAMB
CaMB

AA2E

Anase

EAMB

Qaee

pael

20041
puau2

00643

aned

PRA4Y

2025
2a2é6

aaQUs

aA7
@28

AAQU6

A0S5S4y

MB22@

MB22®
M8220
M8e220
MB2207

MB2ead

MB22V
Mg2ee

mMgeen
MBe2oe@
MB822¢

MBg22®@
MB22W

Ma2ea

MBeewn
MBR2m
MBa22n

CPTX
CPTX
CPTX

CPTX
cPYX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPYX
CPTX

§BHF
CAMS8
CAMS
CAM8
CAMT
CAMT
CAMT
CaMVY
CAMU

NAME

FORCE ERR 2 L
FORCE ERR § L
FORCE ERR @ L
REYV PAR FIELD
REV PAR FIELD
REV PAR FIELD

2
1
REV PAR FIELD ©
G@ ADR PAR 2 0D
G@ ADR PAR |
GO ADR PAR O
G3 ADR PAR 2 OD
G1 ADR PAR {
G1 ADR PAR ©
78 PAR 2 H
78 PAR | W

CAMU

CAMK
CAMK

6y MATCH
GO MATCH

PAR

SBLN
8BLN
CAMM
CAMM
CaMM
CAMM
CAMP
CAMP
SBHN
8§BHF

SBI MISS
G§ H
SB1 MISS
6O H
CPT3 B H
CPT2 B8 M
CPTI B L
CPT] B H
Gi WRITE ENABLE
GO WRITE ENABLE
FORCE MISS 6§ M
FORCE MISS GG H

H
H
DATA
DATA

RESERVED
CAMB LATCH VALID BIY
TBMX FORCE ERR 3 L
SBHF REV PAR FIELD 3

CAML Gi{
CAML G1
CaML G1
CAML Gi
CAML Gi
CAML Gi
CAML GO@

BYTE
BYTE
BYTE
BYTE
BYTE
BYTE
BYTE

CAML
CAML

G@
GB

BYTE
BYTE

2
2
1
1
@
@
2
2
|

PAR
PAR
PAR
PAR
PAR
PAR
PAR
PAR
PAR

0D
EV
0D
EV
0D
EV
0D
EV
00D

CAML
CAML
CAML

GO
GO@
G@

BYTE
BYYE
BYTE

§
@
@

PAR
PAR
PAR

EV
0D
EV

CAMB

TAG

PAR

EVEN H

CAMB
CAMB

TAG
TAG

PAR
PAR

{1
@

EVEN
EVEN

@AaS7

CAMB

cPT1

LAYCH

CAMB

MR22@

CPT1

CAMB
CAMB

PVA60

LATCH

CAMB

ME2ea

CPT1

CAMB PA

LATCH

nn3e

a6
nage6e

CAMB

CaMB

LATCH

87063

CAMB

MB22¢¥
MB822@

CPT1

AA33Y
Ry

AIa6Y
nNA6S

CAMB

CPTH
CPT1

CAMB
CAMB
CaMB
CAMB

PA
PA
Pa
PA

LATCH
LATCH
LATCH
LATCH

16
17
18
19

CAMB

LATCH

QA2F
nA3Q
26331

2938

AA36

LI LY

BA37

290367

CAMB
CAMB
CAMB

MB22Ww

MB22n
MB22¢

Mg22n
MBR2H

6-21

CPTH
CPT1
cPTi

EIXIXTITIITITIEZTITX

DWG

H
H

XTI IXTEITIXTIXIIXTIXIIXTXTEZXI

BIV
(O0CTAL)

BIT

IIXTIXTIIIXIIXTITXTI

(HEX)

V BUS DIRECTORY

MODULE

B4
B4y

PGB
8639

CAMB

PB3A

M822e
MB22o
MB220
M8220

8630

000670
60871
00872
00073
BoeB74
000875

84
0y

84
04
04
84
T
84
1]
8y

84
8y
84

P38
063C
PB3E
BO3IF
0040
BBY1
o0ue
PBY3
6044
PPUS

LY
Be47
ABY8

0049

PBUA

PB4c

By
84

]}
84

-]}

eaq

8yq

8y
By

0676
eas77y

80S3

2AS4Y

PAasS
easé

2057

P0S8
P0%9

P0SA

04
By
24
By
By
B4
By
84
04
0y
0y
84
0y
8y
0y
04
By
04
By
B4
04

P0S8
208C
20%D
AaSE
OOSF
0060
A6
[~ LY4
0R63
Bo64
G0o6S
0066
0067
2068
BO69
006
A
6868
#06C
@060
AQG6E
PA6F

M8eeo

MB8220

MB2en
MBR22@

MBee1
MBee1
M82e1

COMU
COMU
COMU
comMy

MBeei

coMY

MBeei

COMS
CDMS

M82el

60166
00107
pv110

'
RB N
00112

80117

pase

CAMB
CAMB

06104
20108

QAUE
PBUF
2081

CAMB
CAMB
CAMB

COMX
COMYX

PB4UD

B80S0

CAMB

661066
00101
006410
604163

60113
00114
00115

P0UB

CAMB

00116

00120
00121
00122
00123
00124
88125

80126
00127
001306
80131
0ol
0e133
24134
00138
00136
8137
0140
00141

0142

80143
pBLUY
8014S

00146

comMY

cOMU

M8ee1

MB221
M@eel
M8e21

M@ea1

MBR21
MBe21

MB221
MB221

M8ee
1
MBeeai

M8ee
i
M8eei

M8eel

CAMB PA LATCH 21
CAMB PA LATCH 22

CPT1
CPT1
CPT1
cPY1
CPT1

CAMB

CPTX

RESERVED
RESERVED

CPT1

CPTX
CPTX
CPTe
CPT1
CPT1
cPT1
cPT1

CPTX

CPTX
CPTX
CPTX
CPTX
cPTX
CPTX
CPTX
CPTX
CPTX
cPYX
CPTX
CPTX

M822
1

CPTX
cPTX
CPTX
CPTX
cPTX
CPTX
CPT1
CPTH
CPT1
CPTH
cPY1
CPTI
CPYH
CPT1
cPT1
CPTI
CPTX
CPTX
cPTX
CPTX
CPT3
cPT3

MB221

CPYX

M8221

CPT2
cPYe
cPve
]
(o

M822
1

Mgeei
MB221

MB221
M8221
M8221
Mg221
MB221

MB221
MB221
MB221

MB221
M8221
M8221

M8221
MB221
Mae2e!

00150

M8221

00154

CPT1

MB8221

00147

nB1Se
80153
#0154
00155
00156
00157

SIGNAL

MB221
MB221

M8221

MB221
MB221

MB221

6-22

NAME

qu.

CAMB
CAMB
CAMB
CAMB
CAMB

PA
PA
PA
PA
PA

LATCH

LATCH
LATCH
LATCH
LATCH
LATCH

24
25
26
27
28

XEXTXTIEIIXTITITXI

DWE

(OCTAL)

BIT

RESERVED

COMU CPT2 H
RESERVED

RESERVED

EDMU
COMU
TBMD
COMS
COMS
COMS

CPTY & L
CPTY1 A H
EN COM DATA L
Gi B3 PAR 0DD H
Gi B3 PAR EVEN H
G{ B2 PAR 00D H

CDMR
COMR
CDMR
CDMR

G@
G@
G@
G@

COMS
CDMS
CDMS
CDMS
CDMS

CDMR
COMR
CDMR
COMR

G| B2 PAR EVEN H
Gi Bl PAR 0DD H
G§ Bl PAR EVEN H
G} BP PAR 0DD H
Gi{ BO PAR EVEN H

G2
GA
GO
G@

PAR
PAR
PAR
PAR

B3
B3
B2
B2

PAR
PAR
PAR
PAR

Bi
Bi{
B@
BG

00D H
EVEN H
0DD H
EVEN H

RESERVED

COMH ADDR LATCH 1
CDMH

ADDR

LATCH

CDMH ADDR LATCH 9
COMH ADDR LATCH 8

CDMH ADDR LATCH 7

COMH
CDMH
COMH
CDMH
COMH
SBHF
SBHF
SBHF
SBHF
CAMP

FXIXTIXIITX

(HEX)

CHAN

ADDR LATCH g
ADDR LATCH
ADDR LATCH 4
ADDR LATCH 3
ADDR LATCH 2
REV PAR 3 L
REV PAR 2 L
REV PAR 1 L
REV PAR @ L
G WRITE ENABLE H

CAMP GA WRITE ENABLE H

RESERVED

COMA
COMA

MASK
MASK

3
2

H
H

CDMA

MASK

{

COMA

MASK

V BUS DIRECTORY

BIY

DWG

MODULE

SIGNAL NAME

(OCTAL)

T,8,

(HEX)

0s
4]
0s
0s
2s

e30e
0001
nan2
(Y TR )
AYou

00000
pee?y
aeR0e
p2@es
nAQAaY

SBLH
8BLF
8BLF
SBLE
SBLS

MB8218
MB218
MB218
MB218
MB218

CPTX
cPTX
CPTX
CPTX
CPTX

SBHP EN ID DRIVERS L
SBHP ID ADOR 2 L
8BHP ID ADDR | L
TBMC ENABLE IA H
88LS ADRS LATCH 29 H

8s
6s
8s
8s
0s
05
es
@s
@s
0s
0s
05
es
@s
0s
8s
05
05

8306
aea7
2008
0029
AAaA
aaA8
aenc
a4nd
APOE
QA0F
anie
aa1q
eaie
013
Aeid
0e1S
P0o16
naL7

oneasé
00087
eoaie
LB B
goaie
00013
eae14
nea1sS
poatie
@2817
A7020
pu@21
naee2
eenel
negad
nN0es
pBO26
anaeT

8§BLP
SBLF
SBLM
§BLP
8BLP
$BLP
8BLP
sSeLP
8$BLP
SBLM
SBLR
S8LE
sBLL
S$BLE
8§BLK
§8LO
$BLW
SBLR

MB218
MB218
MB8218
MB218
M8218
MB8218
MB218
M8218
MB8218
MB218
MB218
MB218
MB8218
MB8218
MB8218
MB8218
MB218
MB218

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
cPTX
CPTX
CPTX
CPTX
CPTX

8BLP MD TO D L
88HP ID ADDR @ L
8BHN CRD L
TBMN BUF UMCY @ L
TBMN BUF UMCT 1 L
TBMN BUF UMCT 2 L

0e19
Ad1A
naiB
paic
weiD
NALE
eALF
naee
aned
epee
0023

paAldy
e72A32
22033
22034
2203S
0a036
neel7
nepuo
nRady
0AB4e
@aneus

§BLX
8§8LC
sBLC
8$8LC
seLC
§8LC
SBLC
8$8LC
8eLC
§8LC
§8LC

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

RESERVED
SBLC WRITE DATA 00 H
88LC WRITE DATA 01 H
8$8LC WRITE DATA G2 H
$8LC WRITE DATA @3 H
§8LC WRITE DATA @4 H
8BLC WRITE DATA 8BS H
8BLC WRITE DATA 06 H
88LC WRITE DATA 07 H
88LC WRITE DATA 08 H
SBLC WRITE DATA 89 H

0aes

ARBYS

CHAN

8s
@s
85
0s
0s
@5
85
0s
@s
)
us
o5

s
0s

05
0s

2s
05
05
05
05
0s
oS
05
0s
0s

BIT

AAAS

Pn18

ney

Aa26

ouve7
wa2e

nae9

noa2a

eges
naec
waeo
wAeE
QveF
Pa3a
PA3y
voa3e
aaA33
0334

00Q4S

00030

faaud

avade

e0e47
eABSe
00@S1

0UnSe

PoAS3
QAASY
P0@SS
a0VSe
091as7
nAR6a
02061
00062
02063
0AR64

88LS

8$BLX

8s8LC

s8BLC

MB218

MB218
M8218
MB8218
MB218
MB8218
MB8218
MB218
MB218
MB8218
MB218
MB8218

M8218

CPTX

I0PJ IB REQ H

TBMN BUF UMCY 3 L

TBMN BUF UADS L
TBMN BUF UFS L
SBHN RDS L
8BHM SET INVALID L
8B8HM SET 8BI CYCLE H
8BHR SEND DATA W
SBHM ANY READ DATA L
8BLK LATCH TIMO REG L
T8MU CANCEL L
CLKL SYS INIT B L
8BLR FORCE SBI L
RESERVED

8BLC WRITE DATA 1@ H

8BLC WRITE DATA 1i H
H
§BLC WRITE DATA 13
88LC WRITE DATA 14 H

s§eLC

MBe218

CPTX

88LC WRITE DATA ie H

sBLC

MB218

cPTX

8B8LC WRITE DATA IS H

$8LC
88LC

seLc

s$8LC
s$BLC
$BLS
SBLA
SBLA
8$BHB
§B8HB
SBHB
§BHB
SBHB

MB218
M8218

MB218

Mge18
MBe18
MB218
M8218
MB8218
M8219
MB219
MB8219
MBe1so
M8219

6-23

CPTX
CPTX

CPTX

CPTX
CPTX
CPTX
CPTX
CPTX
CPYT3
cPT3
CPT3
CPT3
CPT3

7T8MD EN SBI DATA L
BUS MD BYTE @ PAR H
BUS MD BYTE { PAR H
SBLS SELECY SBI ADR L
ICLe IPL ACT @ L
ICLB IPL ACT 1 L
SBHB WRITE DATA 16 H
SBHB WRITE DATA 17 H
88HB WRITE DATA 18 W
8BHB WRITE DATA 19 H
$BHB WRITE DATA 20 M

V BUS DIRECTORY

08076
00a77
neioe

0641

nB101

004de
0043
aaad
@046

pojee
00103
po104
80165
0B106

o047
0a48

oei07
paiie

804s

BAYB
60e4cC

00111
eaile
06113
03114

204D

BB11S

Bo4S
@04A

OOYE
BOUF

8ese
8eS1

eese
86S3

eas54
80SS

8056
60S7
hesSe

8659
BaSA

eeiie

06117
po126

geiel
pBiee
eoies
B2

02125
gaiee6
egie7
6o130@
60131
o332

peso

883133
60134
00135

BOSE

PB136

POSF
0661
eB6e

6o137
pBi4e
po14q
edi42

8063

AB143

a86d

8065

eai44
neLus

8066

008146

0067

ee147

0068
006A
0068
8066C
606D

0ni15@
88151
88152
0@8153
60154
AB1SS

@O6E
BO6F

68156
86157

e06SE
pesc

0A60

2069

SBHM

8BHR
§BHR
§BHR
8$BHR
§BHR
S$BHR
SBHM

MB219

MB219
M8e219
MB219
MB219
MBR19

MB219
MB219
MB8219
MBe219
MBR19

MBe19

MB219
MB219

MB219
MB219
MB219
Mgeieo
M8219
MB219

MB219

MB219
MB219
M8219
MB219

MB219
MB219

SBHR

MER19

8§8HD

MB219

8§BHE
$BHR
SBHM
8BHE
SBHM
§BHM

MB219
MB219

§BHX

8§BHX
§BHX
S§BHX
8BHX
SBHX
88HX
8§BHX

MB219

MB8219
MB219
MB219

MB219
MB219
MB219
MB8219
M8219
MB219

MB219

Mg219

§BHX

MB219

8BHX
8§BHX
SBHX
8§BHX
SBHX
SBHX
§BHX
S$BHX

MB8219
MB219
MB219

MB21©
MB219

MB219
MB219
MBe19

6-24

CPTX
CPTX

CPTX
CPTX
CPTX
CPYX
CPTX
CPTX
CPTX
CPYO
CPTX
CPYX
cPTX
CPTX
CPTX
CPTX
CPTX
cPTX
CPTX
CPTX
CPTX

DATA

WRITE

DATA
DATA
DATA

WRITE
WRITE
WRITE

SBHB

WREITE

SBHB
8§8HB
SBHB
SBHB
SBHB
SBHB
SBHB
SBHB
SBHB

WRITE
WRITE

WRITE

DATA
DATA

WRITE

DATA

WRITE

DATA
RECEIVE MASK
RECEIVE MASK

RECEIVE

SBHA
SBLE

BUFFER

FULL

SBLE
SBLE

REC

PAR

REC

PAR

i
e
i

H
H
H

8$B8LE REC
8BLE REC
TR SEL {
TR SEL 2
TR SEL 4
TR SEL 8
TBMN BUF
TBMN BUF
TBMN BUF
TBMN BUF
TBMN BUF
TBMN

SBHM
8BHR
T8MD

SBLE
SBLL
CEHH

CLKL

CEHH
TBMN

EXPECY

PAR

L
L
L
UMCY
UMCY
UMCTY

UMCY
UADS
UFS L
SELECY 8BI ADRS
TRANS ENABLE L

BUF

EN §BI DATA
TRANS PAR L

TRANSMITY
CUR MODE
§YS INTY
CUR MODE
DIS PROY

RESERVED

RESERVED
RESERVED
RESERVED

CPTX

RESERVED

CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

RESERVED

CPTX
CPTX
cPTX
CPTX

MASK

2 PAR
3 PAR

LATE

MASK

RECEIVE

MD BYTE
MD BYTE

BUS
BUS

cPTX

CPTX

DATA
DATA
DATA

N
>

MB219

WRITE

SBHB
8BHB
SBHB
SBHB
SBHA

IIXTIETX

003E
AB3F
e064o

MB219
MB219

CPY3
CPY3
cPY3
CPT3
CPY3
CPY3
CPT3
CPT3
CPT3
CPY3
CPT3
CPT1
CPT1
CPYH
CPV1
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX
CPTX

TITIXTXTITIIXTIXTIXIX

eAGT3
PBOBT7Y
e0a7S

ee3B

M8219

T XTHRN)e=
&

863C

803D

MB219
MB219

i o

8§BHB
8BHB
§BHB
§BHB
§BHB
8§BHB
$BHB
SBHB
SEBHB
§BHB
§BHB
§8HB
8BHB
§BHB
8BHD
88KHD
SBHA
SBHL
8§BHE
SBHE
8BHE
SBHE
SBHM
§BHM
§BHM

88HB

NAME

6BIA

000865
POB66

noae67
pee7e
ean7
i
peaTe

SIGNAL

MODULE

RESERVED
RESERVED
RESERVED

RESERVED

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

RESERVED
RESERVED

e DO

Pa39

DH6

T
I

@835
Basles
8637
po36

BIV
(0CTAL)

BIY
(HEX)

V BUS DIRECTORY

CHAN

BIV
(HEX)

BIV
(OCTAL)

00008

peae
9083
0804

paat

e00s

06
06
@6

)
06
06
06
Pe
b6

2006

0087
0008
8009
ABaA
en0e
0anc

DWG

MODULE

20000

FCTP

MB288

gapne
fB003
P0aaY

FCTC
FCTH
FNME

M8288
M8288
M8286

PAB0D 1

PoB0S

00006

FCTP

FCYJ

FCTC

pooay
neeie
noaly
gaeaie
00013
a0014

FCTC
FNMY
FNMT
FNMT
FNMT
FNMT

M8288

MB8288

7.8,

CPTX

cPTYX

CPTX
CPTX
CPTX
CPTX

cPTX

MBa88
MB288
MB8288
MB8288
MB8288
MB8288

. CPTX
CPT3
CPT3
CPT3
CPT3
CPT3

DAPL

NAME

ACC

CONTEXY

PCYC CLR RR L
FCTH CP 8YNC H
FNME BUSEXP L
FCYJ

ACC

FCTC
FCTD
FCTD
FCTD
FCYD
FCTP

N DATA

FCTC ACC Z DATA H

80aD

a0a1s

FNMT

Mg288

000k
poaF
eaie

a0616
eenly
a0p2e

FNMY
FNMY
XXX X

MB288
MB288
MB288

CPT3
CPT3
CPTX

FCTP RB ADRS 1§ L
FCYP RB ADRS @ L
RESERVED

D6
D6
L)
b6
D6
b6

p01e
0013
Bei1d
0ais
@oieé
P617

eeoee
000l
eeoed
20025
edaee
0ane7

FPNMT
ENMT
FNMT
FNMY
FNMT
FNMTY

M8288
M8288
MB288
MB288
M8288
M8288

CPTX
CPTX
CPTX
cPTX
CPTX
CPTX

EALU C @ L
FCTE CoMPL L
FADA SPC (@) H
FNM8 EALU CIN L
FCTC SEL NORM H
RESERVED

PB19
0aiA
018

0031
eonle
P00833

FNMTY
FNMY
FNMY

)
06
06

be
%6
86
06
be
06
06
b6
@6
06
b6
06
06
Y6
b6
86
06
06
86

@011

pA18

6@1C

21D
PA1E
QOLF
anee
o1
peee
00el
pe24
aees
Paee6
0027
eneed
0029
na2A
an2e
03eC
a9eD
a02E
BagF

pea21

00030

Pe034

20035
00a36
AvB37
ooQ4e
aeady
popde
00843
popLY
pa@4s
pBR46
aee47
AG0OSe
neass
p0052
PARS3
noasy
evass
00856
a00S7

XXXX

FNMT

FNMY
FNMT
FNMT
FNMT
FNMT
FNMT
FNMTY
FNMY
FNMT
FNMY
FNMT
FNMY
FNMY
FNMT
FNMT
FNMY
FNMT
FNMY
FNMY

MB288

M8268
Mg288
MB288

MB288

M8288
Me288
M8288
MB288
MB288
MB288
MB288
M8268
MB288
Ma268
MB288
MB82es8
Mge2s
M82ee
M8228
MB2es
MB228
MB2e2#8
MB8228

6-25

CPTX

CPTe

CPTe
CPTe2
CPTe

CPTe

cPYeo
CPTX
CPTX
CPT1
CPT3
CPT3
CPT3
CPT1
CPT!
CPT1
CPTH
CPT3
CPT3
CPT3
CPT3
CPT3
CPT3
CPT3
CPTI

DAPL ACC RA CONTEXY § H

%6
@6
Be

CPT3

SIGNAL

FCTP

ADRS

RESERVED

FCTN LOAD

ARD

FCTN

BRO

FCTN LOAD ARi H
FCTN LOAD ARX H
FCTN LOAD BRY H
LOAD

FADS BUS_.FAD L
RESERVED
RESERVED
FCTN FAMX EN @ L
FCTA A 67 B8 H
FCTN SHF MUX ENI L
FCTN SHF MUX ENG L
FCTN FALU FUNC 8EL e H
FCTN FALU FUNC SEL 1 H
FCTN FALU FUNC SEL @ H
FCTN FAMX SEL { H
FCTF 8HF COUNT S W
FCTF 8HF COUNT 4 H
FCTF 8HWF COUNT 3 H
FCTF 8HF COUNT & H
FCTF SHF COUNT { H
FCTF 8HF COUNT @ H
FCTN FALU CARRY IN H
FCTN FAMX SEL © H

EXPLANATION OF VERSION NUMBERS FOR CONSOLE
BOOTING

VER

PCS=01 WCS=03-10

WHERE VERSION NUMBERS COME FROM
A.
PCS (i.e., 01l in example)

FPLA=03 CON

Version stored

PX03-08

in CID field on location 111

WCS

in PCS
.

Primary version number

Version

stored

(i.e.,

CID

field

in example)

location

1111

WCS

Secondary version number (i.e., 10 in example)
a.
Stored in CID field of location 1112 in WCS

How

read

The console puts the microaddress on the microstack,
asserts ROM NOP, does a maintenance return, steps the
microcode to the proper place,
and then reads the
1ID
address bits (that come from the control store ROM) from
bits <12:8> of the ID C/S register on CIB. The console

software

II.

ERROR
A.

stores

the

in 1103 memory.
example)

reads
the
significant

Jump
field
six bits of

complement

these

bits

The console initiates a maintenance return from location
"F80" which is an "ECO"TM location in the FPLA. The console
steps the microcode to the location following "F80" and
number

then

temporaries
FPLA (03 in

CON

the

(PX03-08

over
the
V-Bus,
the jump field are

the
least
the version

FPLA.

example)

Version of console software read from 1103 memory.

MESSAGES

"Warning-WCS

Checks WCS

FPLA version mismatch"

primary

version

and FPLA versions

are

the

Check WCS secondary version and PCS version is
same. Bits <5:4> of the WCS secondary version
compared to Bits <1:0> of the PCS version.

the
are

same.

B-

"Fatal-WCS

& PCS version mismatch"”

6-26

AJewngweded(dS)4+01(0E)83§MdQm|O

3°OpUadvZe-dUaB€p|4yOyla31]UeAd)qgA¥YueA4¥eu1dJ23yue3nAWaBIogu9d)tdNISyon)oueaJuwzIlNdO°js3HAa(8ZW}wdtuZLILes3j+Yo+Sua(iw)(eyddadJsjOpSSu))BaSdtYpuI]tU),®0JJa8OO|-yJJlpJuRdoaamdybAlU[aT90pulO1uoJLU|oujBJ((UlYoB9z,e€eWd2B))JBU@0Udu8Ll|a3iJdAlUaogyOpoDoUe|wde0s31J$tdHdpNOtuJe2(S@UUd3wP23JtIY3OS1d°yPDOIBs)0UOeBi(N0LJyyYldoDyv3lwL8asW1eiyYB=mWloEet(JjOyeBxSJwm3u0dyt3u=y)p2-oSguyWt3eJanUOd,oJ0BU9o0||

1JdSd ((ddSS))v8++ aauuoouu

3eu‘8I*oYNQa)jGsiaJe0yBn14lonYjg31tb3d8u1BIuuoSeINBladiyoApw¥ta/iduAJ8m|w3lVyeoyJgotAldunJ|uNS0aOl3yJ3Qopl0]p‘pPBuYaosJ+yutnO(jiolgJd0leoSyuwdd)JussAeCo99open|ywZejvE€1+iduo+++(teydJ(((dl3lewdddsysaSSSdl))))*>o)S¥}JU*JNaPDy32l0JyJoNIsDuL6€s810a14111gu((((wL6s8€LaE€€eeEw))))Jo0ayl“Al|@@9[ie339etnSS§dwliejJys05YAiA3YHLAup033Id8¥°1V1SJda8vs3/SaIi<ueyJJpspBwjpiJePbWoeweaJyJuOo3yjewyoy
VAX-11/780 MICROCODE MACHINE CHECK ERROR LOGOUT

3»‘aOUsS8ouM'e1yOoaBlUdSe JS°UO1L}4SI1BY0W9OatdUys=Jl|-UYLylS

6-27

0(@bJzav+j1s(etldbs)au

Ja°usi°rdye*niuaAlvyquet

VAX-11/780 MICROCODE MACHINE CHECK ERROR LOGOUT

6-28

°SI10119

S0Td4VoAdYo¥WdHyVLodIY-gLWdadK3JWdANdSV°o"WdYfHlVYd TSL9c70dd.LL

VIA/YA €L

29YoasM3pnIYLyoiVLldyIseL0NinSIUsdN-O/dDTNDiI1WT0PIT1pWRA*I3IWaT1L9BO4MdIMydIOYSlJI°VeaUdYsiq3ITd1,Tld9de)pY3UyosSO3°1,f*bIe(aJSTys1YT3els3i°Is1T3a89p3iIsuJSpSUepIZpTurJ68reb..Jyo1LuOatJ0oaI0ute1ow3s]®AaTie[yjTIr[TuaqMs[IeMqino°orq3opqaaU1yud0rU3u1Tp1a91yo[iuiz63o11Ti-seps0yOeLD3]bj3uAetpIrriodttopapsueuseUdeyT
DOUBLE ERROR HALT

6-29

MICRODIAGNOSTICS RUN, CONSOLE TERMINAL OUTPUT

>>>H

>>>1

HALTED AT 800082EE
INIT

SEQ DONE

>>>U

>>>TEST

:Console prompt, test command

V9.0
ZZ-ESKAB
01,02,03,04,

:Program title and version
;Section numbers

sConfiguration information
NO. OF WCS MODULES = 0002
6,17,
05,06,07,08,09,0A,08,0C,0D,0E,0F,10,11,12, 13,14,15,1
27,28,29, 2A, 2B, 2C, 2D, 2E,

18,19,1A,18B,1C,1D,1E,1F,20,21,22,23, 24,25,26,
2F,30,31,32,33,34,35, 36,

END PASS 0001

FLOPPY 2Z-ESZAD & TYPE "DI"
MOUNT
MIC>DI

;instructions
,microdiagnostic monitor prompt

37,38,39,34,38,3C,3D, 3E,

ssection number(s)

MS780 4K CHIP AT TR 01

:which is system specific

CPU TR= 00000010

MAX ADR+1= 00090000
DW780 AT TR 03
RH780 AT TR 08
RH780 AT TR 09

for second half

;configuration information

3F,40,41,42,43,44,45,46,47,48,49,4A,4B,4C, 4D, 4E, 4F, 50,

STARTING FPA TESTS

5D,
51,52,53,54,55,56,57,58,59,5A,5B,5C,

END PASS

0001

CPU HALTED,SOMM CLEAR,STEP=NONE,CLOCK=NORM

;CPU status

INIT SEQ DONE

sprogram

RAD=HE X,ADD=PHYS,DAT=LONG,FILL=00,REL= 00000000
HALTED AT 00000000
(RELOADING WCS)

LOAD DONE,

00003200 BYTES LOADED

VER: PCS=01 WCS=08-11 FPLA=08 CON=V02-03-L

6-30

;and console

;defaults
;econfiguration
;information

;console prompt

LOAD AND RUN STAND-ALONE MACRODIAGNOSTICS

(OFF-LINE)

Control

WO
W
Wwp
W

W
Wwo

LOCAL.

the

>>>,

<CODE>

Wo
W9
@

INITIALIZE

INIT SEQ
UNJAM

AND

the

program

prompt

symbol,

the

five

letter
of

designation

commands

CPU

HALTED

CPU
INIT

THE

control

the diagnostic program
to be loaded via the
indirect command file.

These

HALT

reutrn

displayed.

and

produced

HALT

console

mnemonic

TMo

>>>@<CODE>

console program console I/0 mode.
Note that the 5 position key switch
on the control panel should be set to

down

responses

are

automatically
<QEXIT>

DONE

CLEAR

THE

SBI

LO ESKAX.EXE/ST:200
LOAD

DONE,

0000DCO0

BYTES

LOADED

BYTES

LOADED

QUICK VERIFY

LOAD

START

DONE,

0000D000

10000

<@EOF>
<@EXIT>

SUPERVISOR.

ZZ-ESSAA-4.02.417

DS>

At this point,

;

;
;

Start
mode.

ST/SWITCHES

The

order
the

to modify

SWITCHES

are

program,

optional

to separately selectable
sections or tests

program starts,

refer

program

identifies

Woe
WY

The

and

default

program operation.

We
W
W
Wo
R

input

may be typed in,
program execution.

diagnostic

Control returns to the diagnostic
supervisor at the completion of the
diagnostic program. In order to load
and run another diagnostic program,
type Control P and repeat the above
procedure.
NOTE

Operator

any diagnostic

command

itself, and asks the operator for the
mnemonic of the device to be tested
and for other parameters necessary to

supervisor

08:39:21.31

QY9

DS>

;

DsS> ST
or

6-JUN-1978

DIAGNOSTIC

underlined.

6-31

LOAD AND RUN MACRODIAGNOSTICS UNDER VMS
(ON-LINE)

control

Return

$RUN

to VMS.

Load and run the diagnostic

ESSAA

supervisor.

The diagnostic

up,

identifies itself,

for

input.

and prompts

Two sets of commands can be used to load and run a diagnostic

program at

DS>RUN<KCODE>/SWITCHES

this

point:

to the

refers

<CODE>

program mnemonic.

(or)

DS>LOAD

starts

supervisor

<CODE>
il

DS>ST/SWITCHES

five letter

The SWITCHES

refer

to separately selectable

tests

sections within

diagnostic program.
SWITCHES

6-32

are program specific.

the SWITCHES
gram

each

These

run

are omitted,
in

the

default

the

pro-

mode.

MICRODIAGNOSTIC MONITOR COMMANDS

Description

Command/Flag

DIAGNOSE

Initializes

the

program

control

and

starts

microdiagnostic

test

number

one.

Valid

qualifiers

/TEST:

flags,

execution

are:

number

specified

prior

tests)

Dispatch

(do

execute

and

not

1loop

the

test
any
test

indefinitely.

/SECTION:
section
any

number

prior

Dispatch

specified

sections)

section

indefinitely.

/PASS:

diagnostics

the

returning

number

-1,

execute

—--

/TEST

/SECT

switch

continue

after

the

has

6-33

micro-

number

the

console.

the

micro-

indefinitely.

/CONTINUE

section

the

execute
on

the

specified

before

the

not

1loop

Execute

passes

diagnostics

(do

and

This

been

switch

used

automatically

specified

reached.

with

test

the

MICRODIAGNOSTIC MONITOR COMMANDS

/TEST:

<N>

execute

<M>

Dispatch

tests

<N>

(inclusive),

and

returnn

/SECT:

<M>

<N>,

<N>

execute

(inclusive),

test

<N>,

to command mode.

Dispatch

sections
and

through

<N>

return

to
through

command

<M>

mode.

NOTE

the

above

"/SECTION®

"/TEST®

and

value of

<N> must

to <M>.
will

variations

the

qualifiers,

the

less

than

If <M> is less than <N>,

start

<N>

and

continue

equal

testing
to

the

end.

NOTE

/JTEST

and

/SECT

cannot

specified

simultaneously.

Examples:

DIAG/TEST:2F

Dispatch

test number 2F

and

execute

indefinitely.

DIAG/SECT:B

Dispatch
it

section

number

and

execute

indefinitely.

DIAG /PASS:-1

Execute

all

indefinitely.

6-34

the

micro

diagnostics

MICRODIAGNOSTIC MONITOR COMMANDS

DIAG/TEST:2F /CONT
Dispatch

the

Continues

CONTINUE

test

remaining

without

and

start

execution

tests.

microdiagnostic

changing

the

execution

program

control

flags.

Set

and

Clear

Flags

SET/CLEAR FLAG HD

Sets

(or

clears)

Detection

SET/CLEAR FLAG HI

Sets

(or

clears)

Isolation

SET/CLEAR FLAG LOOP

Sets

SET/CLEAR FLAG NER

Sets

(or

the

Halt

Error

the

Halt

Error

Loop

flag.

clears)

(or

the

clears)

the

Error

flag.

Report

flag.

SET/CLEAR FLAG BELL

Sets

(or

clears)

the

Bell

SET/CLEAR FLAG

Sets

(or

clears)

the

Error

CLEAR

FLAG

ERABT

Clears

the

Loop

(Note

that

this

flag

Clears
(Note

the
that

6-35

Loop
this

Special

flag

cannot

Error

Abort

flag.

Section
be

set.)

Special

Test

cannot

set.)

flag.

MICRODIAGNOSTIC MONITOR COMMANDS

SET/CLEAR

FLAG ALL

Sets

(or

clears)

all

the

flags.

SET/CLEAR SOMM

Sets

(or

clears)

the

Stop

Micro

Match

bit.

SET/CLEAR

SOMM:<ADDRESS>

Loads

address
sets

(or

Micromatch

bit.

and

SET/CLEAR FP:<ADDRESS>

into

the

FPA

into

Loads

Micromatch

clears)

stop

sync

micro

SET

STEP

STATE

Sets the CPU clock to single time state.

SET

STEP

BUS

Sets the CPU clock to

SET STEP STATE and SET STEP BUS

the

Both

commands

single bus cycle.

monitor

the

cause

step

enter

mode.

Step mode types the current clock

state

triggered

character

and

the

current

any

out.

entered,

step

typed

value

for

If a space is typed, the

terminal input.
clock

waits

and

value,

UPC

the

UPC

other

mode

1is

exited.

SET

STEP

INSTRUCTION

Sets the hardware Single Instruction flag

and

returns

hardcore

tests

the
are

value of the Test PC

6-36

When

monitor.
invoked,

(TPC)

the

current

is typed.

The

MICRODIAGNOSTIC MONITOR COMMANDS

monitor

waits

space

instruction

value

SET CLOCK

FAST

for

terminal

typed,
is

the

executed

TPC

pseudo

and

current

the

typed.

step mode

any

other

character

Sets

CPU

clock

speed

the

fast

CPU

clock

speed

the

slow

the

typed,

input.

current

exited.

margin.

SET

CLOCK

SLOW

Sets

the

margin.

SET

CLOCK NORMAL

SET CLOCK

EXTERNAL

Sets

the

Sets

CPU

the

clock

CPU

speed

<clock

normal.

for

external

oscillator.

Examine

Commands

The

following

current

before
the

examine

commands

microinstruction

the

examine

first

examine

since

command

mode.

examines

execute

microinstructions.
T1-T8

are

destroyed
the

All

the

following

Bus,

advance

executing

6-37

the

Bus

and

is
the

successive

any

additional

Bus

registers

the

examines,

VBus

examines.

examines,

clock

command.

entering

during

for

the

executed

All

except

cause

performed,

monitor

not

except

CPTO

before

MICRODIAGNOSTIC MONITOR COMMANDS

EXAMINE

ID: <ADDRESS>

VBUS : <CHANNEL>

Displays

the

specified

right

RA: <ADDRESS>

RC: <ADDRESS>

the

ID BUS

<ADDRESS>.

<CHANNEL>.

side of

Displays
Pad

EXAMINE

Displays the contents of the VBUS channel
specified

EXAMINE

contents

the

the display.

the

contents

specified

contents

Pad

specified

the

Scratch

<ADDRESS>.

Displays’ the

the

Bit

the

<ADDRESS>.

EXAMINE

Displays

EXAMINE

Displays the contents of

EXAMINE

Displays the

EXAMINE

Displays the contents of the 0 Register.

EXAMINE

Displays

EXAMINE

Displays the contents of the FE Register.

EXAMINE

Displays

EXAMINE

pPC

Registers

the

contents of

contents

6-38

LA Latch.

the LC

Latch.

of the D Register.

contents of the

the

Counter.

the

SC Register.

the

VA Register.

contents

the

Program

MICRODIAGNOSTIC MONITOR COMMANDS

Deposit Command

The

deposit

examine
be

command,

deposited

user.

DEPOSIT ID:

<DATA>

DEPOSIT

RA:

<DATA>

DEPOSIT

RC:

<DATA>

DEPOSIT

LA:

<DATA>

DEPOSIT

LC:

<DATA>

DEPOSIT

DR:

<DATA>

DEPOSIT

OR:

<DATA>

DEPOSIT

SC:

<DATA>

DEPOSIT

FE:

<DATA>

DEPOSIT

VA:

<DATA>

DEPOSIT

PA:

<DATA>

command

6-39

the

same

except

that

the data

must

supplied

the

to
the

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

BLKMIC

<SCR ADDRESS>,

[SCR

<WORD COUNT>,

Move

the

<WORD

COUNT>

INDEX],

[<WCS ADDRESS

number

ADDRESS>,

indexed

<SCR

INDEX>,

indexed

<WCS

ADDRESS

specified,

the

bits).

the

<WCS

ADDRESS>

For

ADDRESS>

Otherwise,

used
it

example,
6)

starts
a

used

the

current

INDEX>

microword

would

the

WCS

with

physical

added

load

microwords

INDEX>.

indexed

pointer

96-bit

INDEX>]

96-bit

ADDRESS>,

<WCS ADDRESS>,

six

alpha

table

the

value

the

<SCR

index

ADDRESS>

<SCR

<WCS

INDEX>

words

character,

address.

<SCR

PDP-11

the

starting

WCS

into

from

is
to

(i.e.,

the

LSI-11

<WCS

memory.

14g

(<SCR

find

the

first

the WCS.

CHKPNT

the

[<PASS

error

set

during

zero,

the

flag

fail

address

specified,

The

address

the

typed

line

appear

zero,

the

[<FAIL

flag,

instructions),
not

ADDRESS>],

COMPARE

<FAIL

ADDRESS>]

<PASS

ADDRESS>.

the

instruction
named

instruction
ADDRESS>.

TRACE:.

6-40

neither

instruction

typed.

(see
If

These

CMPXXX

the
a

error

pass

or.

line.

addresses

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

CLOCK

Step

the

<TIMES>

system

clock

<TIMES>

1is

evenly

executed

for

each

<TIMES>

number

divisible

four

single

time

states.

four,

single

bus

cycles

are

<TIMES>.

CMPCA

[<MODE>],

<REGISTER>,

<DST ADDRESS>,

[<DST ADDRESS

INDEX>]

Compares

the

contents

with

the

ADDRESS>,

indexed

the

<MODE>
argument

the

most

the

not

the

specified,

argument

READID

1location

specified

<DST

the

IDREGHI,

the

INDEX>.

false,

in the compare

recent

console

<DST ADDRESS

argument

<MODE>

contents

set

the

defaults

specified

is the ID Bus

instruction.

6-41

error
to

flag.

EQUAL.

IDREGLO or

read

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

CMPCAD

[<MODE>],

<REGISTER)>,

<DST ADDRESS>,

[<DST ADDRESS

INDEX>]

Compare

the

contents

the

console

and

<REGISTER>+2

with

the

specified

<DST

ADDRESS

INDEX>.

<MODE>

the

argument

<MODE>

argument

the

used

most

ADDRESS>

not

the

<DST

false,

specified,

argument

recent

and

compare

READID

registers

contents

ADDRESS>+2,

set

the

flag.

IDREGLO or

Bus

<DST

va the

EQUAL.

specified

the

registers

indexed

error

it defaults

specified
the

IDREGHI,

that

was

the

read

instruction.

cMPCAM

CMPCAM

[<MODE>],
INDEX>],

Take

the

mask

contents
with

the

<REGISTER>,
<DST

the console

contents

ADDRESS

INDEX>,

indexed

by <DST ADDRESS

<MODE>

the

<MODE>

argument

and

compare

not

the

it with

[<MASK

[<DST ADDRESS

specified

ADDRESS>,

the

contents

set

the

ADDRESS

INDEX>]

<REGISTER>,

indexed

<DST

<MASK

ADDRESS>,

INDEX>.

argument
is

<MASK ADDRESS>,

ADDRESS>,

false,

specified,

it defaults

6-42

error
to

flag.

EQUAL.

the

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

If the <REGISTER> argument is specified as IDREGLO or IDREGHI,

in the compare

recent READIN

mask

performed

indexed

<MASK

The

is the ID Bus

that was

the

read

instruction.

taking

ADDRESS

contents

the

INDEX>,

ADDRESS>,

<MASK

complimenting

it,

and

bit

clearing the contents of <REGISTER> with it.

CMPCMD

[<MODE>],

<REGISTER>,

<MASK ADDRESS>,

INDEX>],

<DST ADDRESS>,

[<DST ADDRESS

[<MASK ADDRESS
INDEX>]

Take the contents of the console registers specified by <REGISTER>
and

<REGISTER>+2,

<MASK
with

ADDRESS>+2,
the

contents

<DST ADDRESS

the

mask

it with

indexed
of

the

contents

by <MASK ADDRESS

and

of <MASK
INDEX>,

ADDRESS>

and

compare

<DST ADDRESS>+2,

indexed

INDEX>.

<MODE>

argument

false,

set

the

error

flag.

the

{MODE> argument is not specified, it defaults to EQUAL.

If the <REGISTER> argument is specified as IDREGLO or IDREGHI, the

The mask is performed by taking the contents of <MASK ADDRESS> and

<MASK ADDRESS>+2,

indexed by <MASK ADDRESS INDEX>,

complementing

it, and bit clearing the contents of <REGISTER> and <REGISTER>+2.

6-43

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

CMPPCSV

CMPPCSV <DST ADDRESS>,

Compare
the

[<DST ADDRESS INDEX>]

the contents of the PC Save

INDEX>.

<DST ADDRESS>,

specified

location

the contents are not equal,

by <DST ADDRESS

indexed

set the error flag.

ENDLOOP

ENDLOOP

Add the

instruction)

(see LOOP

increment value of <INDEX NAME>

Compare

the current value of the index specified by <INDEX NAME>.

the

value

current

instruction).
last

value,

instruction.

with

the

value

last

1If

the

current value

the

instruction

(specified

less

following

the

than or equal
the most

Otherwise, go to the next sequential

LOOP
the

recent

LOOP

instruction.

ERRLOOP

Save

the

address

the

instruction.

detected, and the Loop or Error flag is set
execution

instruction

restarted

this

saved

executed.

6-44

error

(ref. subsection 4.6),

address

after

the

IFERROR

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

FETCH

<WCS

ADDRESS>,

the

[<WCS ADDRESS

numeric

1location

specified

ADDRESS

1INDEX>.

execute

contents

NOP>

specified,

<KWCS

maintenance
<WCS

maintenance

string,
by

ADDRESS>,

bit

the

[<WCS

ROM NOP>]

maintenance
1indexed

<WCS

string,

specified

the

<ROM

during

the

one

the

ADDRESS

MCR

return

alpha-numeric

location

by <WCS

ADDRESS>,

the

indexed

clear

execute

<WCS

ADDRESS>

return

INDEX>],

INDEX>.

return.

FLTONE

Generate
bit

<DST

32-bit

postion

NAME>,

and

ADDRESS>

ADDRESS>,

and

word

<INDEX

NAME>

all

=zeros.

specified

the

current

1load

word

this

<DST

into

Insert

the

value

logic

minus

location

one

specified

<INDEX
by

<DST

ADDRESS>+2.

FLTZRO

Generate
bit

<DST

32-bit

position

NAME>,

and

ADDRESS>

ADDRESS>,

and

word

specified

1load

<DST

this

<INDEX

NAME>

all

logic

the

current

word

into

the

ADDRESS>+2.

6-45

ones.
value

Insert
minus

location

zero

one

specified

the

<INDEX

<DST

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

IFERROR

If the error flag

<FAIL

is nonzero,

ADDRESS>

the

type the PC of this instruction,

the

Then,

and the good and bad data.

subtest number,

test number,

[<FAIL ADDRESS>]

[<MESSAGE NUMBER>],

IFERROR

HALTD

flag

not

set

(ref.

subsection

4.6).

If the error
go

flag

the next

is zero,

or the <FAIL ADDRESS>

is not specified,

instruction.

INITIALIZE

Set

bit,

Machine

CPU

the

single

the ROM NOP

clear
set

Control

bit

the

Machine

time

state

bit,

set

the

bit,

and

1Initialize

the

clear

and

set

the

Proceed

Control

single

bus

the

bit

KMXGEN

<SRC ADDRESS>,

Generate the KMUX address specified by the current value minus one
of

<INDEX

NAME>

microinstruction

and

1load

specified

1into

the

by <SRC ADDRESS>.

6-46

KMUX

field

the

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

LDIDREG

Load the

the

ID Bus

locations

indexed

<REGISTER>,

<SRC

the

<SCR

microstack,

INDEX>]

ADDRESS>

the contents

and

<SCR

WCS

ADDRESS>+2,

INDEX>.

contents
taken

[<SRC ADDRESS

specified by <REGISTER> with

specified

ADDRESS

<SRC ADDRESS>,

microbreak,

taken

bits.

address,

the

Otherwise,

bits.

LOADCA

LOADCA <REGISTER>,

Load

the

contents

console
of

the

<SRC ADDRESS

<SRC ADDRESS>,

location

INDEX>.

specified

This

[<SRC ADDRESS

instruction

INDEX>]

with

the

<SRC

ADDRESS>,

indexed

loads 16

bits of data.

LOOP

LOOP <INDEX NAME>,

Initialize

the

loop

<START>,

parameter

value specified by <START>.
the

ENDLOOP

instruction.

<END>,

the

Save the value specified by <END>

specified

for

Calculate

for the ENDLOOP instruction with the

the

<START>

increment

less

[<SIZE DEPENDENT>]

than

value

+1;

6-47

and

save

<INDEX

the

NAME>

increment

following algorithm:

equal

<END>,

otherwise,

set

value

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

is an <INDEX NAME>,

If <END>
name as

save the current wvalue of that index
index name.

value of this

the <END>

If <SIZE DEPENDENT> is specified, divide the larger of <START> and
<END>

two

there

only

one

WCS

module

the

system.

leave them unchanged.

Otherwise,

MASK

Take

MASK

<DST ADDRESS>,

the

contents

location

<MASK ADDRESS>,

complement

it,

and

bit clear the contents of location <DST ADDRESS> with it.

MOVE

Move

MOVE

,SRC ADDRESS.,

the

contents

INDEX>)

[<SRC ADDRESS INDEX.[,

of <SRC ADDRESS

INDEX>

(indexed by <SRC ADDRESS

to the location specified by <DST ADDRESS>.

NEWTST

[<TEST DESCRIPTION>],

NEWTST <TEST NAME>,

DESCRIPTION>],

[<KLOGIC

[<ERROR DESCRIPTION>],

[<SYNC

POINT

DESCRIPTION>]

This

instruction

creates

test header

document

for

the

specified

arguments.

It clears the error flag, and saves the PC of the next

instruction

for

looping

test.

6-48

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

READIN

READID

Reads

the

contents

Bus

into

specified

locations

IDREGLO and

and

loads

the

IDREGHI.

RESET

Executes

<LSI-11

reset

instruction>.

REPORT

<MODULE

Types

out

the

NAME

STRING>.

NAME

module

Microdiagnostic

STRING>

numbers

the

HALTI

modules

flag

specified

set,

return

<MODULE

the

<SRC

with

the

Monitor.

TSTVB

Load

and

<SRC

read

TABLE

the

TABLE

ADDRESS>,

V Bus

data

just

ADDRESS>,

VBus.

indexed
read.

[<SRC

TABLE

Compare

the

TABLE

The

<SRC

contents

TABLE>

6-49

ADDRESS

has

the

INDEX>]

the

data

INDEX>,

following

format:

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

1§:

.WORD

VBUSG

<CHANNEL

NUMBER>,

<BIT

NUMBER>,

<EXPECTED

BIT

<EXPECTED

BIT

VALUE>

2S:

.WORD

VBUSG

<CHANNEL

NUMBER>,

<BIT

NUMBER>,

VALUE>

The following

is an example of the <SRC TABLE ADDRESS

INDEX>:

1§,1

TSTVB

If the current value of the <SRC TABLE ADDRESS INDEX> is 2,
and the <SRC TABLE> looks like the above table,
<SRC TABLE ADDRESS> would be

the physical

2$.

SETPSW

SETPSW <DATA>

Load

the

LSI

processor

status

word

with

the

value

specified

<DATA>.

SETVEC

Set

the

eéxpected

LSI-11
trap

address

specified

routine.

6-50

<VECTOR

ADDRESS>

the

MICRODIAGNOSTIC PSEUDO INSTRUCTION DEFINITIONS

SKIP

the
S,

the

next
go

[<DST ADDRESS>]

<DST

ADDRESS>.

test.

the

1If

<KDST

ADDRESS>

starts

not

specified,

with

the

alpha

character

subtest.

SUBTEST

.Increment

the

subtest

counter.

TYPSIZE

Use

the

contents

location

configuration

and

that

tested.

the

will
test

stream

type

BADDATA

message

any

aborted

and

the

set:

WCS

module

bits

3-0

5th K of WCS is not present

count

are

and

zero

nonzero

6-51

determine

the

number

following

NER

(No

the
of

WCS
WCS

conditions

Error

Report)

module
modules
exist,
flag

MICRODIAGNOSTICS CONTROL ROM FIELD DEFINITIONS

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MICRODIAGNOSTICS CONTROL ROM FIELD DEFINITI

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MICRODIAGNOSTICS CONTROL ROM FIELD DEFINITIONS

6-93

DIAGNOSTIC SUPERVISOR COMMANDS

The diagnostic supervisor provides two major services. First, it
allows the operator to control and run the macro-diagnostic
programs through a command line interpreter. Second, it provides

a program interface of common services required by all macrodiagnostic

programs.

The diagnostic supervisor commands are grouped in three sets:
Program/test sequence control
Program flag control

Debug and utility features

Commands, switches and literal arguments may be abbreviated to the
minimum number of characters necessary to retain their unique

For example, the LOAD command can be specified by a
single "L", whereas the START command requires a minimum of "ST".
identity.

In the symbolic command descriptions which follow, certain special
Angle
characters are employed which require some explanation.
arguments
symbolic
brackets, "<" and ">", are used to enclose

which are satisfied by a numeric expression or character string.

Optional arguments are enclosed by square brackets, win and "]".
An "or®TM function is indicated with "!".

Literal arguments such as

ALL, OFF and FLAGS are capitalized.

PROGRAM/TEST SEQUENCE CONTROL COMMANDS

to select programs and portions
These commands enable the operator

of programs and to control the sequence of test execution.

Note

that the command line argument <file-spec> refers to the five
letter mnemonic code which identifies each diagnostic program.

6-94

DIAGNOSTIC SUPERVISOR COMMANDS

Load

Command

LOAD

<File-Spec>

This

command

causes

memory.

wuser

the

can

observed,

switch

used,;

[/PHYSICAL:<address>].

the

used

mode

(on

only

when

but

should

loaded

into

Supervisor

starting

normally

given

Diagnostic

The

file

the

1line.)

specified,

specified

address

omitted.

run

will

the

hexadecimal

format.

the

main

address

NOTE

When

diagnostic

stand

alone

program

must

and

console

Start
START

programs

are

runm

the

diagnostic

supervisor

mode,
the

loaded

both

with

commands

the

program

Command

[/SEC:<section

name>]-

[/TEST:<first>[:<last>!/SUBTEST:<num>][/PASS:<count>]

The

START

command

causes

execution

diagnostic

supervisor

determine

tested.

the

run

which

have

default

program

START
the

the

command

section.

enters

specific

default

been

the

Default

memory.

into

given

without

such

the

program

6-95

with
as,

Switches,

supervisor

intervention.

execution

dialogue

The

section

supervisor

parameters,

section.

selected

diagnostic

tests

calls

the

only

developer
do

begin
the

operator

which

the

begins,

unit

to
to

program

will

those

tests

run

not}require

the

operator

DIAGNOSTIC SUPERVISOR COMMANDS

The SECTION switch is program specific and not available for use

with all programs.

When a section is selected, only the tests

which it contains will be executed.

The TEST switch is used in two distinctly different ways.

If the

isor
"first" and "last" arguments are specified, the superv
%last",
sequentially passes control to tests "first" through
inclusively. If the "first" argument is combined with the SUBTEST
switch, program execution begins at the beginning of the "first"
the
test and terminates at the end of the subtest "num". If

, the

SUBTEST switch is used in conjunction with the PASS switch
operator is provided with a loop on subtest capability.

default
If the TEST switch is not specified, all tests within the
t
section of the program are executed. If only the "first" argumen

is specified with the TEST switch, the "last" argument is assumed
.

by default to be the highest numbered test within the program
Restart Command

RESTART [/SEC:<section-name>]-

[/TEST:<first>[:<1ast>!/SUBTEST:<num>]]—
[/PASS:<count>]

,
The RESTART command is similar to the START command. However
er
paramet
when using RESTART, the operator does not enter into the

be
retrieval dialogue with the program to select the device to

previous
tested. This information must have been set up with a
The
execution of the program in the START or RUN command line.
es.

RESTART switches are identical to the START switch

6-96

DIAGNOSTIC SUPERVISOR COMMANDS

Run Command
RUN

<file-spec>

[/SEC:

[/TEST:<first>

[:<last>

!/SUBTECT:<num>]]

The

RUN command

under

The

VMS.

RUN

is
is

<section-name>]!

[/PASS:<count>]

available
equivalent

command

switches

only when

diagnostic

and

are

LOAD

START

identical

programs
command

those

are

run

sequence.

the

START

command
.

Control

The

Control

returns

control

diagnostic

supervisor.

The

state.

operator

then

The

Continue

may

from

supervisor
issue

any

diagnostic

program

then

enters

valid

the

command

wait

command.

Command

CONTINUE

This

command

which

from

the

causes

program

breakpoint,

Summary

program

was

execution

suspended.

error

halt,

This

resume

command

Control

program's

the

used

point

proceed

summary

report

situation.

Command

SUMMARY

This

command

causes

the

code

section

which

prints

command

generally

diagnostic

program,

any

and

time,

Reliability

the

statistical

used

However,

would

Program

execution

only

the

after

summary

useful,

run

the

reports.

for

running

command
example,

conversation

6-97

Note
a

can
when

mode.

that
pass

this
of

used

the

Disk

DIAGNOSTIC SUPERVISOR COMMANDS

Abort Command
ABORT

returns
This command executes the program's cleanup code and

At
control to the supervisor which enters a command wait state.
RESTART or
this point, the operator may issue any command except
CONTINUE.

EXECUTION CONTROL FUNCTIONS

the
The execution control functions allow the operator to alter
stic
characteristiecs of the diagnostic programs and the diagno
reside
supervisor. These functions are implemented by flags which

d
in the diganostic supervisor and by event flags which are locate
printing
within the programs. The flags are used to control the
of the
ng
loopi
of error messages, ringing the bell, halting and
program,

etc.

Set Flags Command

SET [FLAGS] <arg-list>

l flags

This command results in the setting of the execution contro

list"
specified by warg-list". No other flags are affected. "Arg-1
is a string of flag mnemonics from the following table,

separated

commas.

HALT

Halt on error detection. When the program detects a
a
failure, if this flag is set, the supervisor enters
ated
command wait state after all error messages associ
may
or
with the failure have been output. The operat
then continue, restart or abort the program. This
flag takes precedence over the LOOP flag.
6-98

DIAGNOSTIC SUPERVISOR COMMANDS

LOOP

BELL

Loop

error.

gram

enter

Ssubtest

which

continue

until

by using

the

Bell

program

Inhibit

are

Inhibit
flag

detects

error

all

the

lines)

Inhibit

error

messages

are

for

each

output

Inhibit

summary

Suppresses

may

then

will

cause

the

whenever

level

Only

and

When
except

set,

this

those

which

set,

this

supervisor.

and

extended

header

will

restart,

operator

messages,

message

The

the

test

supervisor

operator

set,

level

basic

failure.

the

continue,

when

failure.

suppresses

and

pro-

Looping
to

The

the

failure.

messages

the

loop

returns

"bell"

program

information

scope

causes

failure.

flag,
a

set,

command.

messages

suppresses

concerning

flag

output

error

flag

This

suppresses
forced

the

error.
to

when

operator

Control

progranm.

flag

IE3

the

abort

the

IE2

detects

clear

the

flag,

predetermined

continue,

supervisor

IE1

This
a

When

extended
the

header

output

level

for

(first

each

When

information
basic

information

failure.

set,

concerning

information

three

this
the

messages

failure.

report.

statistical

report

6-99

When

set,

messages.

this

flag

DIAGNOSTIC SUPERVISOR COMMANDS

QUICK

the
Quick verify. This flag, when set, indicates to
mode
y
verif
program that the operator desires a quick
1is
of operation. The interpretation of this flag
program dependent.

SPOOL

List error messages on line printer.
set,

This flag, when

am
causes the supervisor to direct all progr

t,
messages to the line printer. In the VMS environmen
a
in
ed
the messages are not actually printed but enter
ile on disk.

TRACE

Report the execution of each test. When set, this
of
flag causes the supervisor to report the execution
the
as
each individual test within the program
supervisor dispatches control to that test.

LOCK.

les
Lock in physical memory. When set, this flag disab
the program relocation function. Self-relocating
al
programs are then jocked into their current physic
memory

OPERATOR

space.

to
Operator present. When set, this flag indicates
ble.
the supervisor that operator interaction is possi
to
ns
actio
e
When cleared, supervisor takes appropriat
t an
insure that the test session continues withou

operator.

PROMPT

Display long dialogue. When set, this flag indicates
to the supervisor that the operator wants to see the
l1imits and defaults for all questions printed by the
program.

6-100

DIAGNOSTIC SUPERVISOR COMMANDS

ALL

All

Clear
CLEAR

This

Flags

([FLAGS]

command

"arg-listTM.
flag

The

this

list.

Command

results

flags

other

the

separated

clearing

are

the

affected.

commas.

flags

Arg-list

See

the

Specified
is

SET

string

command

of
for

arguments.

Set
FLAGS

This

<arg-l1ist>

mnemonics

supported

SET

flags

Flags

Default

Command

DEFAULT

command

default

returns

flag

all

settings

Show Flags

flags

are

their

OPERATOR

initial

and

default

status.

PROMPT.

Command

SHOW FLAGS

This

command

current

status.

one

list

are

clear.

for

Set
SET EVENT

This

displays
The

those

Event

command

"arg-1list".

string

flags

No
flag

the

execution

are

which

control

displayed
are

two

flags

and

mnemonic

set,

the

other

for

the

event

flags

those

their
lists;
which

Command

<arg-1ist>!ALL

results

flags

Flags

[FLAGS]

all

other

the

setting

event

numbers

flags
the

6-101

are
range

affected.
of

1-23,

specified

"Arg-1list"

{is

separated

DIAGNOSTIC SUPERVISOR COMMANDS

that
commas. "ALL" may be specified instead of "arg-list". Note
employ
ams
event flags are program specific and that not all progr
them.

Clear Event Flags Command

CLEAR EVENT [FLAGS) <arg-list>!ALL

specified
This command results in the clearing of the event flags
list" is
by "arg-list". No other event flags are affected. "Arg-1
ted by
a string of flag numbers in the range of 1-23, separa
ist".
commas. An optional "ALL" may be specified instead of "arg-l
Show Event Flags Command
SHOW EVENT [FLAGS]

This command causes the diagnostic supervisor to display

a list of

the event flags that are currently set.
DEBUG AND UTILITY FEATURES

to alter
This third set of commands enables the operator
diagnostic program code.

Set Base Command

SET BASE <virtual-address>

register.
The command loads the address specified into a software
specified
This number is then used as a base to which the address
DEPOSIT
in the SET BREAKPOINT, CLEAR BREAKPOINT, EXAMINE, and
ncing
refere
commands is added. The SET BASE command is useful when
code in the diagnostic program listings. The base should
6-102

be set to

DIAGNOSTIC SUPERVISOR COMMANDS

the base address (see the program link map) of the program section
referenced. Then the program counter (PC) numbers provided in the

listings

1in

directly

used

can

referencing locations

in the

program sections.

Note:

Virtual address = Physical address (normally) when memory
management

is turned off.

Set Breakpoint Command

SET BREAKPOINT <address>

This command causes the diagnostic supervisor to assume control

when the program accesses the 1location specified by the
breakpoint address.
within

Clear

diagnostic

Breakpoint

A maximum of

15 breakpoints may be set

program.

Command

CLEAR BREAKPOINT <address>!ALL

This command clears previously set breakpoints.

Show Breakpoints

Command

SHOW BREAKPOINTS

This command displays all currently defined breakpoints.

Set
SET

This

Default

DEFAULT

command

Command

<arg-1list>

results

the

setting of default

EXAMINE and DEPOSIT commands.

The "arg-list"

6-103

qualifiers

for

the

argument consists of

DIAGNOSTIC SUPERVISOR COMMANDS

size

default

qualifier

separated

qualifier

specified,

comma

are

the

other

default

qualifier

options

qualifier

options

Default

defaults

Examine

EXAMINE

This

The

BYTE,

qualifier,

one

the

of memory in

the

are

Radix
OCTAL.

LONG.

[NEXT:

diagnostic
format

<number>)

supervisor

specified

points

byte

address

points

word

points

longword

display contents in hexadecimal radix

display contents‘in decimal radix

display contents

octal

radix

display contents

as ASCII

bytes

argument,

unless

by the

address

some

Optionally,

octal

immediately

also

when

other

command.

may

LONG.

DECIMAL and

"Address"

Size

display

the

qualifiers.

The

follows:

address

default

affected.

WORD

HEXADECIMAL,

[<address>]

causes

"addressTM

only

not

format,

PC,

one

default

Command

command

qualifiers

radix

present.

include
include

HEX and

[/<Qualifiers>)]

contents

both

default

are

and/or

specified,
radix

TM"address"

preceding

one

has
may

the

is
been

with

accepted
set

following:

PSL.

6-104

with

specified

"%D"

the

"%0%",

RO-R11,

hexadecimal
DEFAULT

decimal

respectively.

AP,

FP,

SP,

DIAGNOSTIC SUPERVISOR COMMANDS

Deposit

Command

DEPOSIT [/<Qualifiers>] <address> <data>

This command causes the diagnostic supervisor to accept data to be

placed in memory at the specified address in the format described
by the qualifiers.

The

The qualifiers are as follows:

address points to byte

address points to word

address points to longword

accept data in hexadecimal radix

accept data in decimal radix

accept data in octal

accept data in ASCII bytes

"address"

argument

1is

accepted

hexadecimal

format

default, unless some other radix has been set with the SET DEFAULT
command.

Optionally,

"address"

may

specified

decimal

octal by immediately preceding it with "%D" or "g0", respectively.

6-105

SECTION 7

SYSTEM OPERATION

VMS BOOT PROCEDURE

THIS

FILE

VHB.EXE
ON

THE

IT,

THE

DESCRIBES

THE

INPUT

NORMALLY

THE

BOUTSTRAP

SPECIFIED

BOOTSTRAP

DEVICE,

LOADED

PARAMETERS

LOAD

INTO

wILL
INTO

MEMURY

THE

LOOKUP

BOOTSTRAP

THE

FILE

MEMURY

AND

TRANSFER

LEAST

ONE

PAGE

PROGRAM

[10,40)SYSBOOT.EXE
CONTROL

ABOVE

THE

FIRST

AVALILABLE WORKING MEMORY TO ALLUW SPACE FOR THE RESTART PARAMETER

INPUT

BLOCK,

THE

SP,

STACK

THE

ADDKRESS

PUINTER,

THE

BASE

wHERE

THE

BOOTSTRAP

ALSO

SERVES

<3:0>=DEVICE

TYPk

CUDE

PASSED

TEMPORARY

THRUUGH

STACK

PUINTER.

PARAMETERS:
RO

<31:4>=MBZ;

DISK

CARIRIDGE

D1SK

<3:0>=SYSTEM

BUS

ADURESS("TR"

CUNFIGURATIUNS

I'He

FOLLOWING

<31:4>=MBZ;
FUR

MUST

PACK

(RMO03/RPO4/KPOS/RPUG/KPOT)

(RROB6/RKUT)

NUMBLER)

CUNVEWTION

HAS

BEEN

UbkD:

NUMBER

ADAPIEK

CUNTRULLER

UnIBUS

MASSBUS

AUAPTER

NUMKBER

MASSBUS

ADAPTER

NUMBEK

ADAPTER

UBA:

<31:18>=Mwvl;

<17:3>=Un1bUS

<2:0>=MB2

RROB/RKUT

FUK

CSR

3FFZ0

MoA:

7-2

ALLKESS

CUNTRUL

REGLSTER

VMS BOOT PROCEDURE

<31:a>=pMBL;

<3:U>=CONTRULLER/FORMALITER NUMBek

<3:0>=UNLIT wUMbBLR

<3134>=Mpsy

<31:0U>=LUGICAL BLUCK wUMBEK Tu READ AS BUUT BLOLCR

<31:u>=SUFTwARE BUUT CUNIRUL FLAGS
sl

MEANLING

CUNVERSATIONAL B8UUT, AT VAKIOUS PULINTS IN THE SYSTEHM

BUUT PRUCEDURE, PARAMETER AND Ulhner LINPUT wlLl, bl
SULICITED FRUM

DEBUG.,

[HE CLNSOLE.

TIHLS FULAG 1S PASSED THRUUGH TU VMS AND CAUSES

THE CODE FUR The EXeC LEBUGGER TU Bt INCLUDED IN
THe

RUNWING SYSTEM,

INITIAL BKEAKPOINL, I¥ THIS FLAG 1S SET, ANLD Tht EXEC
DEBUGGER CODE IS INCLUDED (FLAG bIl 1) THEN A BREAKPUINT
WILL UCCUR IMMEDIATELY AFTER THE EXEC ENABLES MAPPING.

BOUT BLUCK.

IF THIS rLAG 1S SET [HEN THE BOUT BLUCK

wILL BE READ AND CONTRUL TRANSFEKRED 10 1T.

DIAGNUSTIC BUUT.

TH1S ELAG CAUSES A BOUT BY FILE

NAME FUR THE DIAGNOSTIC SUPERVISOR.

BOOTSTRAP BREAKPOINT. TH1S FLAG CAUSES THt BOOTSTRAP
TO STOP A BREAKPULNT AFTER PERFURMING NECESSAKY INITIALIZATIOW LIF Il HAS BEEN BUILT w#lTH DEBUG CODE.

IMAGE HEADER., IF THIS FLAG IS8 SE1 THE TRANSFER ADDRESS
FRUM THE IMAGE HEADER uf THE BOUT FILE wlLL BE USED.

7-3

VMS BOOT PROCEDURE

OTHERWISE
BOOT

MEMORY
OF

TEST

MEMORY

FILE
OF

CONTROL

INHIBIT.

DURING

NAME.

THE

HALT

WILL

CAUSES

BOOT

BEFORE

OPTION

PFN

THAT

R10

HALT

R11

HALT

PSL

HALT CODE

ADDRESS+("X200)

BOTH

STACK

THE

FIRST

BYT

THE

THIS

THE

POINTER

THE

SOLICIT

CAUSES

FOK

FLAG

SPECIFIED
THE

POOL

DEBUGGING

PASSED
PAGES

WORKING

POINTER

A HALT

TU THE TRANSFER

USEFUL

FIRST

AND

INHIBITS

BOOTSTRAP

TRANSFER.

DELETION,

FROM

FLAG

TESTING

THE

NAME

FILE,

PREVENTS

REMOVED

USABLE

HBOUTSTRAPPING.

TO BE EXECUTED PRIOR
THIS

TRANSFER

FILE.

GOOD

MEMORY

MEMORY,

BUU1IFI1LE,

PURPUSES.

THROUGH

FROM

AVAILABLE

64KB

INSTKUCTION®

TU THE

BEING

THE

BOOTFILE

PERMANENTLY

PAGES,

REGLON

USE OF FILEX TO TRANSFER DIAGNOSTIC FILES

order

operating
files

from

Proceed

load

system,
the

Type

run

diagnostic

operator
disk

diskette

ZZ-ESZEB

the

key
LOCAL

under

transfer

VMS

pack

the

system may

into

the

floppy

device.

used.

drive.

The

can

1in

control

DISABLE

commands

under

VMS.

;

Control

Y to

return

;

VAX/VMS.

;

Allocate

the

system
be

VMS

disk

LOCAL

following

central

the

diagnostic

panel

the

position.

floppy disk.

ALLOCATED

$ MOUNT/FOR DX1:

MCR

programs

have

switch

$ ALL DXA1:

the

terminal

_DXA1

may

Any

position

either

floppy

follows.

Insert

and
the

; Mount the floppy disk.

FLX

FLX>/RS=DX1:<CODE>.

;

Invoke

;

displays

the

FILEX program.

;

Transfer,
the file

;

disk

;

CCODE>

;

program.

the

prompt

FILEX

symbol,

FLX>.

EXE/RT/IM

the
is

from

system device,

the mnemonic
Transfer

each

; needed in this manner.

7-5

the

floppy

where
the

file

USE OF FILEX TO TRANSFER DIAGNOSTIC FILES

FLX>/CO/BL:512./RS=DX1:ESSAA.EXE/RT/IM

transfer the diagnostic

;

supervisor.

FLX> ;1_

: Return control to VAX/VMS.

$ DISM DX1:

; Dismount the floppy disk.

$ DEALL DXA1:

: Deallocate the floppy disk.

: VAX/VMS

Sample console terminal output:

$ MCR FLX

FLX> /CO/BL:512./RS=DX1:ESSAA.EXE/RT/IM
FLX> /RS=DX1:ESMAA.EXE/RT/IM
FLX>

"Y'

7-6

prompt

TERMINAL FUNCTION KEYS

(Carriage
return.)
Transmits the current
line to the system for processing.
(On some
the RETURN key is labeled CR.)

RETURN

terminals,
Before

terminal

session,

initiates

1login

sequence.

Control

characters

Define

functions

CTRL

key
and
simultaneously.

echoed

CTR/C*

the

command
processing.
a

perfomed
when
the
key
are
pressed

CTRL/x key
terminal as “x.

During

Before

another

All

entry,

terminal

sequences

cancels

session,

are

command

initiates

1login

sequence.

CTRL/I

Duplicates

the

function of

CTRL/K

Advances

the

current

vertical

tab

CTRL/L

Form

CTRL/O

Alternately

CTRL/Q

CTRL/R

the

stop.

output

suppresses

the

and

continues

terminal

Retypes

the

Suspends

display

terminal.
output

that

was

suspended

CTRL/S.
current

the
cursor
line.

CTRL/S

1line

key.

feed.

Restarts

the TAB

input

positioned

terminal

line

output

the

and

1leaves

end

until

the

CTRL/Q

pressed.

CTRL/U

CTRL/Y

CTRL/2

Cancels

Interrupts

current

line

command

discards

it.

program

execution

command

interpreter.

control

Signals

end-of-file

and

the

returns

the
DELETE

the

for

data

entered

terminal.

Deletes

and

from

the

last
character
entered
at
the
and
backspaces
over
it.
(On
some
terminals,
the
DELETE
key
1is
1labeled
RUBOUT.)
terminal

ESCAPE

Has

special

uses

particular

commands

or
the
same
as RETURN.
(On some terminals,
the
key is labeled ALTMODE.)

programs,

but

generally

performs

function

ESCAPE
TAB

Moves

the

printing

element

terminal

terminal.

Most

every

the

terminals

character

7-7

tab
have

positions

cursor

the

stop

the

tab

stops

line.

COMMANDS FOR TERMINAL COMMUNICATION AND CONTROL

(String assignment.)

Defines a local symbol

name as a synonym for a DCL command.

(string assignment.) Defines a global symbol

name as a synonym for a DCL command.

Displays
command

terminal.

LOGOUT

Terminates communication between a
the

user and

system.

Passes

MCR

information about a command or a
the
on
gqualifier
parameter or

MCR

places

the

RSX-11M

message

operator's

command

environment,

line

terminal

in MCR

command mode.

REQUEST

Displays

terminal.

with

your

SET

PASSOWRD

Changes the password associated
user name for subsequent logins.

SET

TERMINAL

Defines the: characteristics of the terminal
for the duration of a terminal session.

SHOW

DAYTIME

Displays the current data and time of day on

SHOW

SYMBOL

Displays current local or global symbols and

SHOW

TERMINAL

Displays the current characteristics of the

the terminal.

the strings or values assigned to them.
terminal.

7-8

COMMANDS FOR FILE MANIPULATION

Adds the contents
the end of another

file.

COPY

Copies

files

CREATE

Creates

APPEND

one or more

DELETE/ENTRY

into

files

another

file
from
data
entered
or in the input stream.

Defines

new directory
files.

cataloging
DELETE

one

terminal

CREATE/DIRECTORY

Removes

a
directory
entry
files
and
makes
any
data
inaccessible.

Deletes

entry

from

the

file.
at

the

subdirectory

for

for
a
in
the

file

or
file(s)

batch

job

queue.

DIFFERENCES

Compares

the

contents of files and produces
indicating the differences between

a report
the two.
DIRECTORY

Displays information
of files.

DUMP

Displays
format.

EDIT

Begins
create

the

an
or

about

contents

interactive
modify

Queues

system

printer.

copy

file

editing

file.

file

for

group

binary

session

printing

the

PURGE

Deletes all but the most recent version
versions of a specified file or files.

RENAME

Changes

the

name

file

group

files.
SET

DEFAULT

Changes
the
default
directory
device used to identify files.

and/or

SET

QUEUE/ENTRY

Changes

in
SET

PROTECTION

the

the attributes
printer queue.

Changes
a

the

group

access

protection

of
to

files,

the

user.

7-9

file

status

applied

restricting
by

different

disk

entry

file

allowing