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EK-11034-MC-003

2000

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Document:	PDP-11/04/34/34A Maintenance Card
Order Number:	EK-11034-MC
Revision:	003
Pages:	48
Original Filename:

OCR Text

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CONTENTS
Console EmMulator ..o 1
KY11-LB Programmer’'s Console...........ccooveniiiiiin
e, 4
DD11-CK/DK/PK Backplanes .......c..ccccooevviieiniciiee 5
Troubleshooting ..., 6

Processor JUMPEIS ..o
ee
MMT oD
P

———— 10

e e 11

VIVE
T 1Y P 0T e
e
e1

MST1-EP/FP/JP MO .e, 15
R S T

L e
e
s 17

M7850 Panty Contro!ler

ettt
20

MO3BOT-YA/YB/YF. oot 22
VI BT Z e
e 25

DT 1-W et
e
e 30
KKT1-A CAChE ..., 34

Memory Management.........occooeoveeeece

e, 36

Current DIStriBULION oo 40
Backplane Jumper Configuration........c.cocovvvvoivoc. 41
Madified Unibus Pin Assignments..........occoooovei 42

EK-11034-MC-003

To obtain a copy of this document, use the number
above and order from Printing and Circulation
Services, NR 2.

CONSOLE EMULATOR
Sequence of events for standard® M9301/M9312 configuration on power up,

When boot switch depressed or return of ac power:

1. Primary CPU tests are executed (loop on error).
2.

(RO)

(R4)

(SP)

(PC)

XXXXXX

$or@

(M9312)

(M9301)

3. User can now exercise console functions provided
by console emulator routine.

4. On bootstrap command, secondary CPU and
memory tests are executed. These will halt on error, or if successful will boot device.

Console Functions

Load Address

Keyboard Strokes

L <SB> XXXXXX <CR>

Examine

E <SB>

Start

S <CR>

Deposit

Bootstrap

D <SB> XXXXXX <CR>
<Code> n <CR>
n = Unit number
(optional;

<SB> = Space bar
< CR> = Carriage return

defaults

to 0)

*For standard configuration, see page: 23, M9301; 26, M9312.
1

M9301

M9312

Device

Code

|YA | YB | YF

PCOb5
DL11-A/W
TUS55/56
TU/TE10, TSO3

PR
TT
DT
MT

X
X
X
X

X
X

X
X
X
X
X
X
X
X

X
X

TU/TE16,

TMO02/03
TUGBO
TUSB8
TS04
RXO01
RX02
RK03/05/05J
RP02/03

MM
CT
DD
MS
DX
DY
DK
DP

RP04/05/06,

RMO02/03
RLO1
RK06/07
RS03/04

DB
DL
DM
DS

X
X
X
X

Cross Reference: Device to Controller
Device

Controller

PCO5 (hi spd rdr)
ASR-33 (lo spd rdr)
TUB5/56
TU/TE10, TSO3
TU/TE16, TM02,03

PC11/R11
DL11-A/W
TC11
TTMM11/A11/B11
RH11

RXO01

RX11

TU60
RX02

RK03/05/05J
RP02/03
RP04/05/06, RM02/03

TA11

RXC11

RK11-C/D
RP11-C/E
RH11

RLO1

RL11

RKO6/07

RK611
RH11

RS03/04

“&
S

If M9301/M9312 is configured to run diagnostics and a

——

halt occurs when booting a device:

. Obtain register printout and prompt by rebooting.

2. Address in PC will indicate type of halt (processor
or memory).

3. If a memory halt, contents of RO, R4, and SP are
interpreted as shown below.

PROCESSOR HALTS

—» YA
PC = 165316, 165346, 165370
- YB
173450, 173470,173512

165646, 165662, 165676- YF, M9312
MEMORY HALTS
YF,M9312

YA.YB

RO = Expected Data
R4 = Received data
SP = Failing address

Failing address
Received data
Expected data

- YA
PC= 1658334
173762 - YB

1656776 —» YF

165772 - M9312

PROGRAN
|[KEY| = Function

[LSR| = (Display) —» Switch Reg
[ICNTRL-HLT/SS| = Halt/PC — Display

|[HLT/SS| (While Halted) = Inst. Step
[CNTRL-CONT| = Continue

[CNTRL-BOOT| = M9301/M9312 Program
[CNTRL-START] = Start
[CNTRL-INIT}] = Init

[CNTRL-#1] = Enter maintenance mode

See KY11-LB User’s Guide for setup and use of maintenance mode

(Display) = TDB = Temp Data Buffer

LED INDICATORS

DCON

BATT

All dc power +5 V to logic is on

Battery monitor IND (operative if BBU
option present)
OFF — No battery present or battery failure

- Battery present and charged

Flashing (slow)-

AC power OK and
battery is charging.

Flashing (fast)

—

Loss of ac power;
battery is discharging
while maintaining

MOS memory
contents

RUN

SR disp

State of processor, running or halted

Contents of switch register being displayed

MAINT

BUS ERR

Console in maintenance mode

Examine or deposit resulted in

a SSYN

timeout or a HALT REQ from the console failed to receive a HALT GRANT
* An 18-bit number is stored in Temp register.
4

DD11-CK/DK/PK BACKPLANES
DD11-CK

2 /// ////
3 ///////

o
)

A
A

!
!

spc

;

%MEMORY:

4&”3?335&31_'! c | a sc |
DD11-PK
B

D
T
|

PROCESSOR M7263
A

| M7266 CONTROL
L

T
]

! MEMORY |

" '|I M7265 DATA PATHS

EEIEEIEE

KD11-D 11/04

M8266 CO:NTRO L

]
l

]

N| M8265 DATA PATHS

-Ai
i

.A;
|
|

}
I
I
|

I
i

backplane)

'l‘f

-:AI

3:1?
-:A:

|
;

R
=

CAUTION: M9302 MUST ONLY BE INSTALLED AT END OF

STANDARD UNIBUS.
=

MUST CONTAIN MODULE OR BG CARD. (BG-ETCH TOWARD SLOT 9).

CAUTION: M8301/M9312 SHOULD NOT BE INSTALLED PAST $LOT 4.

= REMOVE JUMPER CA1-CB1 TO USE NPR DEVICE. @fi &7
A,

M8264 (NO-SACK TIMEOUT) INSTALLED IN SLOT 3 FOR KD11-E.

\\\\\ STANDARD UNIBUS

W MODIFIED UNIBUS
TK-1381

SYMPTOM

DISPLAY BLANK == RUN LIGHT

[-— DC LO ASSERTED

BAD KY11-LB

OFF

KY11-LB CABLE

| FURTHER TEST

SYMPTOM

— RUN LIGHT __ PRESS AND RELEASE
FLASHES

BOOT/INIT SWITCH

ONCE BUT
WILL NOT
STAY ON

e RUN LIGHT

IS OFF

DC ON LIGHT

PRINTOUT

IS ON

AND
PROMPT

I?OSSIBLE PROBLEM AREAI

SYMPTOME

ACTION 1

—

CHARACTER

SYMPTOM

RECEIVED

RUN LIGHT

NOT

IS ON

BUS INIT

KY11-LA OR KY11-LB
A

[FURTHER TESfl

SYMPTOM

HALT AND THEN

RUN LIGHT

" CONTINUE

REMAINS ON
RUN LIGHT
GOES OFF
AND

THEN ON

FOSSBILE PROBLEM AREA'

SYMPTOM
heee ANY

SYMPTOM
NOT

POWER

CONFIGURATION (MODULE

DESCRIBED

PLACEMENT, SWITCH

ABOVE

SETTINGS, ETC.)
TK-1377

NOTE

For a detailed explanation of these troubleshooting

actions, refer to PDP-11/34 Systems User Manual,
Section 6.

OTING - continued

SYMPTOM
PRINTOUT
OCCURS

lj’OSSIBLE PROBLEM AREA ]
g

SWITCH 2 ON M9301 IN OFF
POSITION

HALT/CONT SWITCH IN HALT
POSITION (KY11-LA ONLY)

PRINTOUT
g

NOT

—=2 CONSOLE INTERFACE PROBLEM

—
%

HALT GRANT OR HALT REQUEST PROBLEM

RECEIVED

—— 9301 DIP-SWITCH PROBLEM

— FAULTY M9301 OR M7263

SYMPTOM

lP—OSSIBl_E PROBLEM AREA ]

FURTHER TEST
POWER DOWN,

REMCVEUPM3302,
— POWER
POWER DOWN,
REMOVE
3y —

CONSCLE

INTER=ACE.

T-W)
(DL
POWER UP

PRINTOUT

RECEIVED

PRINTOUT
NOT

UNIBUS HUNG

RECEIVED

)
)
OR KY11-LB
KY11-LA

RUN LIGHT

CONSOLE T TERMINAL

RUN LIGHT

BRANCH-SELF

GOES OFF — TM OR INTERFACE

REMAINS

(M9301 DIAG.):

PROGRAM LOOPING

IN MEMORY
TK-1380

NOTE

DC on light does not necessarily indicate that dc

power is within the required levels.

- continued

SYMPTOM
CONTENTS OF

LOCATION

ACTION 2

—& 173024

ARE NOT

I POSSIBLE PROBLEM AREA I
INCORRECT M9301 SWITCH

SETTINGS

Mo301 HARDWARE FAILURE

173000

LOAD AND
EXAMINE

SYMPTOM |

ADDRESS

173024

L_,ANY OTHER

SYMPTOM

I POSSIBLE PROBLEM AREi]
INPUT

OPERATOR

FORMAT
ERROR

CONSOLE

EMULATOR
FAILURE

SYMPTOM

ACTION 3

LOWER
CASE KYBD

I POSSIBLE PROBLEM AREA ]

RUN LIGHT

DIAGNOSTIC TEST 6

GOES OFF

OR 7 FAILED

MEMORY TEST FAILED

TYPE A

M9301-YF TESTS SUCCESSFUL

BOOT

COMMAND _

OTHER

FOR A NON
EXISTENT

I SYMPTOM I

DEVICE

—& RUN LIGHT =

FURTHER TEST

BOOT SYSTEM TO GET PC

REMAINS ON

ACTION 4

SYMPTOM

> *INCORRECT
DEPOSIT 777
RESPONSE
IN ADDRESS 0.
ISSUE START

COMMAND.

FOSSIBLE PROBLEM AR EA]
INPUT FORMAT ERROR

{ON TERMINAL)

M9301 FIRMWARE FAULT

*KEY BOARD SHOULD NO LONGER RESPOND AND THE RUN LIGHT
SHOULD BE ON.
TK-1379

TROUBLESHOOTING - continued

ACTION 5

HALT THE

SYMPTOM

PROCESSOR

SHOULD BE

REMAINS ON

liOSSIBLE PROBLEM AREA]

(RUN LIGHT
— RUN LIGHT

HALT REQUEST PROBLEM

OFFR)

HALT GRANT PROBLEM
KY11-LA OR KY11-LB

MALFUNCTION

ACTION 6

CONTINUE

PROCESSOR

I SYMPTOW

I POSSIBLE PROBLEM AR EA]

—— RUN LIGHT _____ KY11.LA OR KY11-LB
OPERATION

FROM THE

HALTED

REMAINS

OFF

MALFUNCTION

STATE.

(RUN LIGHT SHOULD

BE ON.)

ACTION 7

sYmMPTOM

I POSSIBLE PROBLEM AR E;I

HALT

PROCESSOR
AND

INITIATE
BOOT

IS NOT

RECEIVED

FUNCTIONs

MOVE THE

HALT/CONT

SW BACK

TO CONTINUE.

(KY11-LA

{ SYMPTOM
—»WRONG

OLD PC

RECEIVED

ONLY)

I POSSIBLE PROBLEM AREXI
NOISE ON BOOT CABLE

BOOT/INIT SWITCH PRESSED
TWICE (KY11-LA ONLY)

(REGISTER PRINTOUT
SHOULD OCCUR WITH

“OLD PC" = 0)
TK-1378

11/34A

KD11-EA

M8265 (Data Paths)
W2 - N
W1,

M8266 (Control)

Enable parity detection — W1-IN

Disable parity detection — W1-OUT
11/34

KD11-E

M7265 (Data Paths)
W1, W2 - IN

M7266 (Control)

Enable parity detection — W1-OUT, W2-IN
Disable parity detection — W1-IN, W2-OUT
11/04

KD11-D
M7263

Enable parity detection — W1-IN, W2-0UT
Disable parity detection — W1-OUT, W2-IN

G652

W|7 W5H V\‘S W1

m07070

w8 W6 W4 W2

TK-1376

NOTE

Jumpers W9-W11 are factory set and not shown.
"

LDV~ | T Tl CAvED ) WIS Wl our
STARTING ADDRESS ASSIGNMENT

Address

Decimal
OK

8K
16K
24K
32K
40K
48K

56K
64K
72K
80K
88K

96K

104K
112K

Octal

000000

OQUT | OUT | OUT | IN

040000
100000
140000
200000
240000
300000

340000
400000
440000
500000
540000

600000

640000
700000

IN
IN

IN
OUT | IN
OuUT { OUT
IN

OUT | IN

ouT

W7 and W8 — OUT for PDP-11/04/34/34A.
11

VIVI 11-DP - continued
INTERLEAVED MEMORY OPERATION

One memory is assigned the odd addresses and
the other the even addresses within the same 32K
block.

W5-IN, W6-OUT - assigns even addresses

W5-0OUT, W6-IN — assigns odd addresses
Both memories must be assigned the same starting address.

STARTING ADDRESS ASSIGNMENT
(Interleaved-Memory Operation)
Address

Octal

000000

OuUT | OUT | IN

8K
16K
24K
32K
40K
48K
56K
64K
72K
80K
88K
96K

040000
100000
140000
200000
240000
300000
340000
400000
440000
500000
540000
600000

OUT §
OUT |
OUT |
OuUT §

IN
IN
IN
IN

IN
IN

OuT | OUT | OUT
OuUT | OUT | IN

IN
IN
IN
IN
IN
IN

ouT
OuUT { IN
IN
OUT | IN
OuUT | OUT
IN
OUT | IN
IN

Decimal

IN
IN

OuT | OUT
OUT | IN
ouT
IN
IN
IN

IN
IN

ouT
IN

BACKPLANE INSTALLATION

DD11-PK - Slots 2-8 (11/04)
DD11-PK — Slots 3-8 (11/34,34A)
DD11-DK — Slots 2-8

DD11-CK - Slots 2 and 3

NOTE

A grant continuity card (G727) must be installed in

slot D of the overhanging memory module.
12

J89

W6
ws

— W7

NOTE:

WI 2

w17 —\ .__./-.
]

JUMPERS NOT SHOWN ARE FACTORY SET
AND SHOULD NOT BE ALTERED IN THE
FIELD.

JUMPERS
W5

OUT

OUT - Out for PDP-11/04/34/34A

IN — For parity operation

INTERLEAVED/NON-INTERLEAVED OPERATION
®

W17

¢/
/]
i,

W17

{

W12

-1

,‘

‘\

NONINTERLEAVED

—-9
Lo

®— — —o—{

W12
ONE MEMORY

&INTERLEAVED

\\l/ & — — i}

W17

@
|

w12

OTHER MEMORY

TK-1384

J89 —

Provides connection for the field service memory

margining device. P/N 70-11459.
S1

Starting address selection.
13

111-YP CORE - continued

STARTING ADDRESS ASSIGNMENT
S1 Switch Selection

Address

S1-1181-21

S1-3|

S1-4|

S$1-5

OK
4K
8K
12K
16K
20K
24K
28K
32K
36K
40K

000000 | ON
020000 | ON
040000 | ON
060000 | ON
100000 | ON
120000 | ON
140000 | ON
160000 | ON
200000 | ON
220000 | ON
240000 | ON

84K
88K
92K
96K
100K
104K
108K
112K
116K
120K

OFF
OFF | ON
520000 )] OFF | ON
OFF | OFF | ON
540000 | OFF | ON
OFF | OFF | OFF
560000 | OFF | ON
ON
ON
600000 | OFF { OFF | ON
OFF
ON
620000 | OFF | OFF | ON
OFF | ON
640000 | OFF | OFF | ON
OFF | OFF
660000 | OFF | OFF | ON
ON
700000} OFF | OFF | OFF | ON
OFF
720000 | OFF | OFF | OFF | ON
740000 OFF | OFF | OFF | OFF | ON

44K
48K
52K
56K
60K
64K
68K
72K
76K
80K

OFF | OFF
OFF | ON
260000 | ON
ON
OFF | OFF | ON
300000 | ON
OFF
OFF | OFF | ON
320000 | ON
OFF | OFF | OFF | ON
340000 | ON
OFF | OFF | OFF | OFF
360000 ] ON
ON
ON
ON
400000 | OFF | ON
OFF
ON
ON
420000 | OFF | ON
OFF | ON
ON
440000 | OFF | ON
OFF ] OFF
ON
460000 | OFF | ON
ON
OFF | ON
500000 | OFF | ON

NOTE

For interleaved operation, both memories must have
the same starting address.

BACKPLANE INSTALLATION
DD11-PK — Slots 2-8 (11/04)
DD11-PK — Slots 3-8 (11/34,34A)
DD11-DK - Slots 2-8
DD11-CK — Slots 2 and 3
14

MS11-EP/FP/JP - M

JUMPER EYE
LETS

W2 e

M7847

o W1

W4 e o W3
WG e

o W5

E —— DIP SWITCHES

(A-J)

E§§M‘?*S
P

‘:}J Foo i g‘"‘ku T K ‘1 3 8 5

::}; Q:Afi L{:j fi,{é’“"

gi’?’ "~ ;‘j WB
”

‘_,::-;:w

MEMORY SIZE JUMPERS/SWITCHES

wa- | wio
size

| wa

| IN

8k | IN

|w2

[ws_ | 6

|we

| ouT | out

| ofr | oFe | OFF

| outr

| in

| orr

16K | IN

|IN

|oFf

12k

| oFr | oFF | OFF

BACKPLANE INSTALLATION

DD11-PK - Slots 2-8 (11/04)
DD11-PK - Slots 3-8 (11/34,34A)
DD11-DK — Slots 2-8
DD11-CK — Slots 2 or 3

| OFr |
| on

OFF

| OFF

MS11-EP/FP/JP-MOS

STARTING ADDRESS ASSIGNMENT .
Switch Selection

Address

Decimal ] Octal

OK
4K
8K
12K
16K
20K
24K
28K
32K
36K
40K

000000 | OFF
020000 | OFF
040000 | OFF
060000 | OFF
100000 | OFF
120000 | OFF
140000 | OFF
160000 { OFF
200000 | OFF
220000 | OFF
240000 | OFF

44K
48K
52K
56K
60K
64K
68K
72K
76K
80K
84K
88K
92K

260000
300000
320000
340000
360000
400000
420000

96K
100K
104K

108K
112K
116K
120K

Y P

%we TCIJES

440000
460000
500000
520000
540000
560000
600000
620000
640000
660000
700000
720000
740000

| OFF
| OFF
| ON
| ON
| ON
| ON
| ON
| ON
| ON
| ON
| ON
| ON
| ON
| ON
| ON
| ON

| ON
| ON
| OFF
| OFF

{OFF JOFF
{OFF |ON
JOFF JON
JOFF J{ON
JOFF {ON
{ON | OFF
{ON [ OFF
|{OFF
JON
JOFF
JON
JON
|ON
{ON
|[ON
fON
JON
|OFF
|OFF
JOFF
|OFF
|JOFF
JOFF
|OFF
JOFF
|ON
JON
|ON
|ON
JON
|ON
JON
|ON
|OFF
|OFF

JON | ON
[OFF| OFF
|JOFF| ON
|ON | OFF
|ON | ON
|OFF| OFF
JOFF] ON
ION | OFF
JON | ON
|OFF] OFF
|OFF} ON

JON
[ON
JOFF
JOFF
fOFF
JOFF
J{ON
|ON
JON
JON
[OFF
|JOFF
1OFF

|JON | OFF
{ON | ON
|OFF} OFF
fOFF} ON
JON | OFF
|ON | ON
|OFF| OFF
|OFF] ON
|ON | OFF
{ON | ON
JOFF| OFF
JOFF} ON
|ON | OFF

({OFF
(ON
(ON

[ON | ON
[OFF} OFF
|[OFF| ON

JON
|ON
JOFF
JOFF

|ON | OFF
|ON | ON
JOFF | OFF
{OFF| ON

MS11-L

M—]i?l_,_wwlllllllB

B
ol

B «
.%{ @

é%;

]

D2
L

| E O @ 'p/‘n

l
9

&©

W21/

féé%y T fary

631

] 2=

/fl

NOTE: JUMPERS W10-W16 AND W20 ARE FACTORY
SET AND NOT SHOWN.
TK-1386

JUMPERS
W5

W21

ouT

IN — for PDP-11/04/34/34A

OUT

IN
W1

ouT

IN-+5Vand+5VBBU (Normal Con-

figuration) -5V . 57 ’WB S

OUT-+5V only

m«‘

IN- +15
V (PDP- 11/04/34/34A)

OUT-+12V

OUT —Unibus/MUD operation (PDP- 11/04/34/34A)

IN— Special bus operation

SWITCHES/LEDS

Plsadles -7
Foer /g

S1 - Selects CSR address

S2 - Assigns MS11-L starting address
D2 - Indicates +5Vor +5V BBU power is being

supplied to refresh logic (green).
NOTE

MS11-L should not be extracted while D2 is ON.
D3 - Indicates a parity error has occurred (red).
17

ENIXCy

MS11-L — continued
STARTING ADDRESS ASSIGNMENT

S2 Switch Selection

Address

Decimal | Octal

S2-5[S2-6S2-7 [S2-8 |S2-9

OK
4K
8K
12K

000000
020000
040000
060000

| ON
| ON
| ON
| ON

JON
[ON
|ON
|JON

JON
|ON
||ON
|ON

[ON
[ON
|OFF
|OFF

|ON
({OFF
|ON
JOFF

16K
20K
24K

| ON
| ON
| ON
§ ON

|ON
JON
|ON

|JOFF
[OFF
|JOFF

JON
JON
|OFF

28K

100000
120000
140000
160000

|ON

|JOFF

J|OFF

32K
36K
40K

200000 | ON
220000 | ON
240000 § ON

|OFF
|OFF
|OFF

|ON
{ON
JON

|[ON
|{ON
[OFF

|[ON
|[OFF
jON
JOFF
|ON

44K

260000 | ON

||OFF

JON

[JOFF

{ON
|OFF

48K
52K
56K
60K

300000 | ON
320000 | ON
340000 | ON
360000 | ON

|OFF
[JOFF
|OFF

|OFF
JOFF
JOFF

{ON
JON
|OFF

|ON
|OFF
|ON

|OFF

JOFF

64K

400000

JON

|JON

|OFF
|ON
|OFF

|OFF

68K

420000 | OFF

JON

{OFF
||ON
|JON

72K

440000 | OFF

J{ON

|ON

|OFF

{ON

76K

460000 | OFF

|ON

80K

500000 | OFF

|ON

|JON
|OFF

|OFF
[ON

[OFF
|ON

84K

520000 | OFF
540000 | OFF

|JON
{ON

|(OFF
[OFF

|ON
JOFF

[OFF
[ON

88K

| OFF

|ON

92K

560000 § OFF

[ON

[JOFF

|OFF

96K

600000 | OFF

|OFF

{ON

|ON

|OFF
|ON

100K

620000 | OFF

|OFF

|ON

|JON

|JOFF

104K

640000 | OFF

JOFF

|ON

{OFF

|ON

108K

660000 | OFF

JOFF

JON

|OFF

112K

700000 | OFF

|OFF

JON

|ON

116K

720000 | OFF

|OFF

|ON

|JOFF

120K

740000 | OFF

JOFF

|OFF

JOFF

|ON

124K

760000

|OFF

}JOFF

|OFF

| OFF

NOTE

Switch positions S$2-1 through S2-4 should be set to

the ON position for PDP-11/04/34/34A.
18

MS11-L - continued
CSR ADDRESS SELECTION

Address

S$1-1

S$1-2

S$1-3

S1-4

772100

772102

OFF

772104

OFF

772106

OFF

772110

OFF

772112

OFF

772114

OFF

772116

OFF

772120

OFF

772122

OFF

772124

OFF

772126

OFF

772130

OFF

772132

OFF

772134

OFF

772136

OFF

The MS11-L memory does not require a parity controller

(M7850) but it can be installed in the same backplane as

other memories utilizing an M7850.
CSR
543210

1514131211

PARITY
ERROR

_—

Bl TS <17:11> OF

ERROR ADDRESS

ERROR
RETRIEVAL

WRITE WRONG PARITY
ERROR IND ENABLE
TK-1387

MS11-L BACKPLANE INSTALLATION
DD11-PK — Slots 3-8
DD11-DK - Slots 2-8
DD11-CK — Slots 2 and 3
19

M7850
—

R16

~ ADDRESS
C

CONTROL

LED

/JUMPERS

W5 IS FACTORY SET AND NOT SHOWN

One M7850 will generate and check parity for all

The M7850 does not differentiate between core

When a parity error is detected, the parity error
LED is latched ON. If error IND ENABLE (CSR bit
0) is set, the processor traps to 114.
When installed, the M7850 intercepts MEMORY
after checking
SSYN and asserts BUS SSYN

memory in its backplane.
or MOS.

parity.

SSYN DELAY (Adjustable via R16)

fiéfig%bfiav P

&JWMQ
»
ey
Rl 4%““ « o
O TIAATY CEhend,

INT BUS
SSYN L

1-5V

(BE‘])

115 NS

SSYN DLY

1.5V

0 H

(BB2)

CSR
1514

1211

543210

ERROR ADDRESS

PGy
Pigoiry

PARITY

ERROR

‘%,,.E;fifi:b.

~_ ADDRESS BITS <A17:A11>

OF FAULTY DATA WORD

n TRAS)
Au
TR
z
i
LE
AB
EN
D
IN
R
RO
i%S ER& 1Sevs IS it Mi,«%s;,f%
;

WRITE WRONG PARITY
15

ih-17%

jevoiusTe
20

TCG:

M7850 PARITY CONTROLLER continued
M7850 CSR address is factory set at 772100. Jumpers
W1-W4 allow selection of a unique address between

772100-772136.

CSR ADDRESS SELECTION
Address

772100"

772102

ouT

772104

ouT

772106

ouT

772110

OouT

772112

ouT

772114

ouT

772116

ouT

OouT

772120

ouT

IN
IN

772122

772124

OouT

ouT

772126

ouT

OuT

772130

ouT

772132

ouT

772134

ouT

OouT

772136

ouT

*Standard CSR address.

;

WG\I
W5H

/ W4

ws/II I Wi
w2

E l

el 10

P24
TP3L-D>

TK-1395

JUMPERS

W1-W6 - out for PDP-11/04/34/34A
FAST ON CONNECTIONS

TP1*
TP2
TP3

Black wire to
Red wire to
Shield

Boot ENA
Boot SW
NC

*Connect with battery backup only.

SWITCH S1 FUNCTIONS

Low ROM Enable

S1-1

YA
YB.YF

Must be on to enable diagnostics.
Must be on to enable console emulator and
diagnostics.

S$1-2
YA YB.YF

OFF

$1-3-10

YA,YB,YF

Power-up Reboot Enable

S1-1, 3-10 determine power-up function.

(S1-1, 3-10 are ignored.)

Normal user power-up routine. Trap to 24.
ROM Address Switches

Switch values determine device that is

booted, with or without diagnostics, on
power up.

‘i

/YF - continued
S1 SWITCH SETTINGS
Octal Code

Function On
Power Up

§1-3-51-10
|YB | YF
Diagnostics | YA
002

(002 | 644

Console emulator

YES*

000

{000

030

226 | 002

Boot DL11

YES

650

364

652

366

YES

660

704

662

706

YES

440

144

442

146

Boot RP11

YES

466

040

470

042

Boot RX11

YES

636

544

640

546

Vector through 24 | YES

Boot PC11
Boot RK11

Boot TA11

Boot TM11
Boot RK611

YES

624

626

YES

524

474

526

476

YES

662

664

Boot RH11

RP04/05/06
RS03/04
TU16

YES

224

226

YES

440

442

YES

054

056

A S1-2 OFF - Normal user power up through 24.

(S1-3-10 are ignored.)
*Standard M9301 configuration.

M9301-YA/YB/YF - continued

EXAMPLE: Boot DL11 (YA) with no diagnostics

OCTAL

CODE =

101

01T 0

NO SWITCH
FOR THIS
BIT POSITION

1
S1F142F3¢+4¢516¢7

819110

ON
OFF

a T
ON= ALLOWS S1-3-10 TO

DETERMINE POWER
UP FUNCTION

OFF = NO DIAGNOSTICS
TK-1394

:,?

Cfi -

l"‘\\;

«‘m‘% LA

ST I

DAWITT

ShHVE

BOOT SW

INPUT

RETURN
RETURN —

BOOT § mg312 BOOT ENB
INPUT

ROM

BOOT\

TP4 TP3 TP2 TP1

*1q

*3 \\

(S1)
N

E33

rRoM —~|

SWITCH BANK

E34

BOOT

ROM/

ADDRESS OFFSET

E35

ROM

W12

CONSOLE EMULATOR

‘

/—AND DIAGNOSTIC ROM

o
0
2][l

W7/C=3 W10

LO ROM ’[]
EN W8~

W4\

WS/I::/C:!

—

TK-1397

JUMPER CONFIGURATION FOR
PDP-11/04/34/34A
W1-W6 — OUT

- IN
W9-W10

- IN
W7

2
- OUT
W11-W1

w8 - OUT

M9301 TO M9312 FAST ON CONVERSION
2

o M931

From M930

Blk
Red

TP4
Blk
TP1
Red
A

TP1
TP2

TP3

fj}

(W{m}‘ ISR DT I g:

M93
- continue
12
d
CONFIGURATION FOR POWER-UP/BOOT

SWITCH FUNCTION
Console Emulator/Diagnostic ROM (P/N 23-248F1)

ROM

Location

Diagnostics

E20

$1-3 through 10

144

YES”

020

*Standard M9312 configuration.

BOOTSTRAP ROMS

Octal Code in $S1-3 - 10
Second
Device

First

ROM

Second

23-756A9

Device

and

Diag-

Device

Location

23-755A9
nostics | Al ROMS | Only

004

050

034

204

250

234

3 (E34)

404

450

434

1 (B35 1 vEg

006

052

036

236

252

206

2 (E33) 1 Vs

23-760A9
Only

YES

406

452

436

4 (E32)

604

650

634

YES

606

652

636

ALC

TlomS

A wg

“:13

)

(Fea
U aT00

é“”"%.f«%@ by
A YA

{
p

”fl? e

s=usStT

f”i

DT
i

oiLi éfifig %

o
H

-8

oy e,

oo P

),
:f

VI9312 - continued

EXAMPLE: Boot ROM location 3; first device; with diagnostics and power-up boot enabled.
0=OFF

1=ON
OCTAL

f@——o

’

f——*w——*v—"%

ll l

S1 I>1- 2434

<N le——oO

CODE

l l l LNOSWITCH
-8--9--10]

FOR THIS

BIT POSITION

S1 -1 = OFF,S1-2=0N
TK-1392

S1-1

Console emulator/diagnostic ROM

OFF —

is addressed on a boot function.
A device bootstrap ROM is ad-

dressed on a boot function.

S1-2

Enables power-up boot.

OFF —

Disables power-up boot.

S1-3-10 — The value in these switch positions controls
which

ROM

location

addressed

power-up or boot SW functions.

M9312 - continued
S1 Configuration Identification Without Removing

mM9312
1.

giVA AR

HG W -59%/7’"5“1;
é”“\ aw?‘w&’h‘ Lf\k!gk@}

Load and examine 773024. \, i7 'E\

2. Display

= 165XYZ
- indicates S1- 1ON

= 173XYZ
- indicates S1-1 OFF

3. Remaining octal digits (XYZ) are converted to bits
and associated to the on/off condition of S1-3
through S1-10.
XXX

YYY

S1-345

678

910

1=O0N

0 = OFF

ROM ldentification Without Removing M9312
Perform one of the following two operations.
1.

Run MAINDEC CZM9B.

Load and examine the following and compare data
to table below.

(E20) 7%5774 XXXXXX

(E35) 773000 — XXXXXX
(E33) 773200 — XXXXXX
(E34) 773400 — XXXXXX

8 7O

/2w
77 ¢y
¢

(E32) 773600 — XXXXXX @t

}

g"?fiw

75
ey

XXXXXX

Code

P/N

040460

23-248F1 C. E . %Qo

041524

23-761A9

042113

23-756A9 =72 ¢y

042114

23-751A9

042115

23-752A9

042120

042123

23-755A9
|

23-759A9
23-753A9

042130

042131

23-811A9

046515

23-757A9

046524

23-758A9

050122

23-760A9

177776

Continuation ROM of a multiple boot ROM

XXX777

Bad ROM or no ROM present

V9312 - continued
ROM IDENTIFICATION

First Device

P/N

Console Emulator

23-248F1

RLO1

23-751A9

RK0O6/07

23-752A9

Second Device

RXO1

23-753A9

RP02/03

23-755A9

RKO3/05

23-756A9 | TUbb5/56

RP04/05/06,
RMO02/03

TU16/E16

23-757A9

TU10/E10,TS03

23-758A9

RS03/04

23-759A9

PCO5

23-760A9

TUGBO

23-761A9

RX02

23-811A9

TS04

23-764A9

DL11-A/W

“Intentionally left blank. Can be used to document new ROMs
as they become available.

M7856
1

oA
=

R63

(SEE NOTE 2)

PG 2

st —{HI]
1

os— [T

sa—{ILI1]
1

< ~{[IL
ADDRESS AND VECTOR SELECTION

For standard console device address

= 77756X

vector

06X

ADDRESS:

(77400X - 77777X)*

-~j

A
)
:

1098765432

V///,mm lm
1= OFF

VECTOR:

(007 = 77X)

SWITCH S5- X
e

oFE
*

. I lNe
4o
%?3@

TSRS
-

RELAL

pbo.

8765432

W//////Almm
[ = Ong

SWITCH $2-X
TK-1393

*The last digit is not determined by the switches.

CCTR U

TTERy

DL11-W - continued
DATA FORMAT

No.

No. Bits

S4-4

S$4-3

Stop Bits | S4-5

5
6

ON
ON

ON
OFF

1
2

ON
OFF"

7| OFF
OFF
(8
e

ON
OFF*

Y o Cpors g L

PARITY

__Enable:

S4-6 WON

. Disable: S4-6 OFF Jins,
e

7 Jogf

Odd:

S4-2 ON

Even:

S4-2 OFF

TRANSMITTER

S$1-1

S1-2

S1-3

S1-6

S1-7

ON
OFF

OFF
ON

ON
OFF

S3-6

S3-7

8S3-8

839

S3-10

OFF

20 mA loop activeTM TM
20 mA loop passive
RECEIVER

ActiveTM *
Passive

PAPER TAPE READER ENABLE

$1-4

S1-5

8S1-8

§8§1-9

S1-10

Active TM *

OFF

Passive

OFF

RCVR Error Bits

Break

Enable: S4-7
ON ~

| Disable: S4-7 OFF |

Enable:

S4-1

| Disable: S4-1 OFF |
p

1.5 with five data bits.

** The most common configuration is with the DL11-W active
and the terminal passive.
31

DLTT-W - continued
XMIT

BAUD
RATE

S4-10

S3-1

S3-4

110

150

OFF

300

OFF

600

OFF

1200

OFF

2400

OFF

4800

OFF

9600

OFF

RECEIVE

BAUD

RATE

S3-2

S$3-3

S3-5

110

OFF

150

OFF

300

OFF

600

OFF

1200

OFF

2400

4800

OFF

9600

OFF

LINE CLOCK

Address set for 777546

S$5-9

$5-10

OFF
ON

ON
OFF

Enable (SLU and LTC)
Disable (SLU only)

DL11-W is line clock only. SLU

does not respond to any address.
NOTES

1. LTC must be disabled if SLU is other than console interface.

2. When using multiple DL11-W's, only one should

have LTC enabled. R63 should be removed on all
others.

TC.
e -

10
VESTOx
¢

IV B

L O A

DL11-W - continued
RCSR Console Address: 777560
.

FET

765#%”*0

\HEUK

S &7

cLet. T &

”‘%

= —
RCVR ACTIVE
Lo, —
RCVR DONE
INTERRUPT ENABLE —Z2L%.

ASTVEL

READER ENABLE

RBUF Console Address: 777562
0

15141312

T |

RECEIVED

ERROR

DATA

OVERRUN

JCEAD M

ERROR

FRAMING ERROR

“g

PARITY ERROR

XCSR Console Address: 777564
2

TRANSMITTER READY

TRANSMITTER INTERRUPT ENABLE

= MAINTENANCE

BREAK

3 { T Gruosa

ind

T B SEACE

CHagon

oo>

XBUF Console Address: 777566
0

TRANSMITTED DATA

LKS Console Address: 777546

LINE CLOCK MONITOR

T
ENABLE
LINE CLOCK INTERRUP

- ;g
-

1}{:&

v
1

EEEy

sCivay v,%a& ~ 33

L O0mS

TK-1382

Direct mapping. 1K words

Cache is installed in slot 3 if FP11A is not pre-

sent. If FP11-A is present, cache is installed in slot
5.

NOTE

Memory should be located between cache and all
NPR devices.

CACHE RESPONSES TO HIT/MISS OPERATIONS

Mode

Read

DMA

CPU

Miss

Hit

Miss

Not

Cache

Write Data

Affected | Affect- | Read

Write Tag

Write Valid

Read

Not

Inval-

Not

Bypass

Affected

|]idate

idate

Affected

Write
Bypass

Not
Affected

Inval|}idate

Invalidate

Not
Affected

Not

Inval-

Affected

|idate

Write
Data

Affected

Write

Not

Write

Valid

When installing cache, compute +5 Vdc consumption
for system modules to prevent overloading regulator capacity.
NOTE

Total +5 Vdc consumption for the modules housed in
the CPU backplane must not exceed 32 A.

KK11-A CACHE - continued -11/34ACACHE MEMORY ERROR REGISTER 777744
0

876654

el
PARITY ERROR HI BYTE

PARITY ERROR LOBYTE
TAG PARITY ERROR

CACHE CONTROL REGISTER 777746
1514131211109 8

76543 2 1 0

L
VALID STORE
IN USE

VALID CLEARIN
PROGRESS

WRITE WRONG TAG
PARITY

—
UNCONDITIONAL BYPASS
FLUSH CACHE

PARITY ERROR ABORT
WRITE WRONG DATA PARITY —
FORCE MISS HI

FORCE MISS LO

DISABLE PARITY ERROR

CACHE MAINTENANCE REGISTER 777750
1

WRITE TAG ALL ONES

CACHE HIT REGISTER 777752
98

—////

—

TAG ADDRESS

CONTAINS TAG FIELD OF
LAST VALID ACCESS

HIT REGISTER

INDICATES NUMBER OF HITS ON

LAST SiIX CPU ACCESSES

TO NON-1/0 PAGE MEMORY

1=HIT

0 = MISS
TK-1383

MEMORY MANAGEMENT
CAPABILITIES PROVIDED BY MEMORY
MANAGEMENT

Memory Size (words)

124K max (plus 4K for
1/0)

Virtual (16 bits)

Address Space

Modes of Operation

Kernel and user

Stack Pointers

2 (one per mode)

Memory Relocation

Physical (18 bits)

3210 words

Block

1 to 128 blocks (32 to

Page Length

4096 words)
16 (8 per mode)

No. of Pages

e
e

Size of Relocatable

32,768 words max

Memory

(8 X 4096)

Memory Protection

No access
Read only

Read/write

CONSTRUCTION OF A PHYSICAL ADDRESS
15
VIRTUAL
ADDRESS

1312

I ApF | BLOCK NO. |

DIB j

PAR

12 11

PAGE ADDRESS FIELD J
+ a—

PHYSICAL ADDRESS

}

17
r

J—-—-—

DIB

APF = ACTIVE PAGE FIELD

DIB = DISPLACEMENT IN BLOCK
PAR = PAGE ADDRESS REGISTER.

TK-1391

MENT - continued

-1 'fi/fi&/BdA—

Virtual Address
Range

Kernel

User

Addresses
PDR
PAR

772340
772342
772344
772346
1000004177776 | 772350
120000-137776 | 772352
140000-157776 | 772354
0-17776
20000-37776
40000-57776
60000-77776

160000-177776

77235@

{772300 | 777640
§772302 {777642
§772304 (777644
1772306 | 777646
§772310 §777650
|772312 §777652
1772314 §777654

772316

|777656

§777600
777602
777604
|/77606
777610
|777612
[777614

{777616

Bwn
=

To calculate a relocation constant:

A page may start on any 32,0 word boundary.
Take desired starting physical address.
Shift right six places.

The remaining 12 bits are the relocation constant
used in the PAR.

Example:

If PAR O (virtual address range 000000-017776)
should point to physical address 100000, then:

STARTING PHYSICAL ADDRESS

|oo1|ooolooo]ooolooolooo]ooo'

E‘VOO 1‘000]000‘000
RELOCATION CONSTANT
TO BE PLACED IN PARO
TK-1389

MEMORY MIANAGEMENT - continued

-11/34/34APAGE ADDRESS REGISTER (PAR)
15

1211

IPAGE ADDRESS FIELD (PAIfl

“

)

RELOCATION CONSTANT

PAGE DESCRIPTOR REGISTER (PDR)
1514

87654
3 210

PAGE LENGTH

FIELD(PLF)
WRITTEN INTO

EXPANSION DIRECTION

0=UP

1=DOWN

ACCESS CONTROL FIELD

00 = ABORT ANY ACCESS
01 = ALLOW READ ONLY
10 = ABORT ANY ACCESS

11 = ALLOW READ/WRITE

STATUS REGISTER 0 (SRO0) 777572
15141312

9876543

ABORT

NON-RESIDENT
ABORT PAGE
LENGTH ERROR
ABORT

READ ONLY

MAINTENANCE MODE
MODE

00 = KERNEL
11 = USER
PAGE NUMBER

ENABLE MANAGEMENT

STATUS REGISTER 2 (SR2) 777576
15

VIRTUAL ADDRESS
38

1 TK-1390

MEMORY MANAGEMENT - continued
-11/34/34APhysical
Bank

|
)

]

Vace-0

(4K

3
4

(16K)
(20K)

1
2

STRcEe

008000- 07776
e

OGOOOOi@J776
100000-117776

Constant

0000

0200
0400

0600
1000

(24K)
(28K)
(32K)

120000-137776
140000-157776
160000-177776

1200
1400
1600

(36K)
(40K)
(44K)
(48K)
(52K)
(56K)
(60K)
(64K)
(68K)
(72K)
(76K)
(80K)

200000-217776
220000-237776
240000-257776
260000-277776
300000-317776
320000-337776
340000-357776
360000-377776
400000-417776
420000-437776
440000-457776

2000
2200
2400
2600
3000
3200
3400
3600
4000
4200
4400

(84K)

460000-477776
500000-517776

4600
5000

(88K)
(92K)

520000-537776

5200

540000-557776

5400

(96K)

560000-577776

30
31
32
33
34
35

(100K)
(104K)
(108K)
(112K)
(116K)
(120K)
(124K)
(128K)

600000-617776
620000-637776
640000-657776
660000-677776
700000-717776
720000-737776
740000-757776
760000-777776

5600
6000
6200
6400
6600
7000

5
6
7
10
11
12
13
14
15
16
17
20
21
22
23
24
25

(8K)
(12K)

Relocation
Physical Address

36
37

7200

7400
7600

SYSTIMEe

1313373
:‘"‘“f% C ; f
af i\‘iifi £
-

(

CUHRENTEMETR%E

-10-1/2 Inch BoxBA11-K
H754 |

H744

H745

25A

EXPANSION

s}e—

25A

CPU—

SPACE

(UP TO 13 SLOTS) : ( 9 SLOTS)

10-1/2 INCH BOX FOR PDP-11/34A
CORE

REG. 1~ H754

3BU

REG.

—4 H785

H7441 | H7441 | H745

/BRI
|

32A

—

32A

EXPANSION

SPACE

(UP TO 13 SLOTS)

|
| o

CPU

| (9SLOTS)
|

|
TK-1388

NOTE

Any time H7441's are in the system, you must use power
distribution board 54-10864-Y A-1.
40

gLvg-1yumNg1NsnL0+|a16N10—-|g1N6n+09eGL+|9—6L-||g—6+MoH

sIOL8v4g0-U1PBnjIoRyISuPmUCNIg9BgWICUI1NUHnC30dsuneNjrdi1oneoqsedwin1fn‘ounieanS1—bHy43ucOddWV1N2r4A3—:NV01uonoegZ§0 ~TIWG-—

310N

DvL===-NdIyanpYydeLHuig/IYNpgL-iiLeslSOn/e,vYWLmoYdgoyU1XdYNMu8OnHuMmgdMoNo-ndVi3N-wdqniGLaAuol9viLiydlgssiAimpg|PuloenN1NodIdnquD0o-sIGaNqVA|-I1eN#dnI9NuI8e00OlyV‘1E"-(VE1N0IN-0NWL-V¥1HNEIL3NA0-N)3V)dX1N3INo 1NINNo00 =Qo1 L1 O

Signal

AA1

BUS INIT L

AA2

POWER (+5 V)

AB1

BUS INTR L
TEST POINT
BUS DOO L
GROUND

AB2
AC1
AC2
AD1

BUS D02 L
BUS DO1 L

AD2
AE1
AE2

BUS DO3 L

AF1
AF2

BUS DO6 L
BUS DO5 L

BUS D04 L

AH1

BUS D08 L

AH2

BUS DO7 L

AJ1

BUS D10 L

AJ2

BUS D09 L

AK1

BUS D12 L
BUS D11 L
BUS D14 L
BUS D13 L
BUS PA L
BUS D15 L
P1
BUSPB L

AK2
AL1
AL2
AM1
AM2
AN1
AN2
AP1
AP2
AR1
AR2

AS2
AT1
AT2

BUS BBSY L
BAT BACKUP +15 V
BUS SACK L
BAT BACKUP -15 V
BUS NPR L
GROUND
BUSBR 7L

AU1

+20 V

AS1

AU2

BUSBRGL

AV1

+20 V

AV2

+20 V

MENT
- contin
S
ued

Signal

BA1

CACHEHIT L

BA2

POWER (+5 V)

BB1

SPARE

BB2

TEST POINT

BC1

BUSBR5 L

BC2

GROUND

BD1

BAT BACKUP +5 V

BD2

BR4 L

BE1

INT SSYN

BE2

PAR

BF1

BUS ACLO L

BF2

BUS DCLO L

BH1

BH?2

DET

BUS A01 L

BUS A0O L

BJ1

BUS AO3 L

BJ2

BUS AO2 L

BK1

BUS A05 L

BK2

BUS A04 L

BL1

BUS AO7 L

BL2

BUS A06 L

BM1

BUS A09 L

BM2

BUS A0S L

BN1

BUS A11L

BN2

BUS A10 L

BP1

BUS A13 L

BP2

BUS A12 L

BR1

BUS A15 L

BR2

BUS A14 L

BS1

BUS A17 L

BS2

BUS A16 L

BT1

GROUND

BT2

BUSC1 L

BU1

BUS SSYN L

BU2

BUS CO 1

BV1

BUS MSYN L

BV2

-5V

PDP-11/04/34/34A

Current
Required

Typical Systein Component

at +5 Vdc

KD11-EA (M8266 and M8265)

115
A

KD11-E (M7266 arnd M7265)

106
A

KD11-D (M7263)

KY11-LB {M7859)

3 A

DL11-W (M7856)

2 A

FP11-A(M8267)

7 A

KK11-A (M8268)

4 A

MM11-C/CP (G651)

MM11-D/DP (G652)

4 A

MM11-YP (G657)

MS11-E-J (M7847)

2 A

MS11-L (M7891)

1.5A

Parity Contrctier (M7850)

i A

No-Sack Timeout (M8264)

Terminators (M9312)

15A

(M9301)

2 A

(M33502)

1.3A

“Intentionally left blank, for users own use.