Digital PDFs

EK-0TU58-TM-1

May 1979

78 pages

Original

3.0MB

Document:	TU58 DECtape II Technical Manual
Order Number:	EK-0TU58-TM
Revision:	1
Pages:	78
Original Filename:

OCR Text

~D~DllmD

TUS8
. DECtape II
TECHNICAL
MANUAL

EK-OTU58-TM-OOI

TU58 DECtape II
Technical Manual

digital equipment corporation • maynard, massachusetts

1st Edition, September, 1979

Copyright © 1979 by Digital Equipment Corporation
The material in this manual is for informational purposes and
is subject to change without notice.
Digital Equipment Corporation assumes no responsibility for
any errors which may appear in this manual.

Printed in U.S.A.

This document was set on DIGITAL's DECset-8000 computerized typesetting system.

The following are trademarks of Digital Equipment Corporation,
Maynard, Massachusetts:
DIGITAL
DEC
PDP
DECUS
UNIBUS
DECtape
DECtape II

DECsystem-10
DECSYSTEM-20
OIBOL
EDUSYSTEM
VAX
VMS

MASSBUS
OMNIBUS
OS/8
RSTS
RSX
lAS

CONTENTS
Page
CHAPTER 1

INTRODUCTION

1.1
1.2
1.3
1.3.1
1.3.2
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.5
1.6

SCOPE ................................................................................................................ 1-1
GENERAL DESCRIPTION .................................................................... '" ........ 1-1
BLOCK DIAGRAM ........................................................................................... 1-3
Drive Control ............................................................................................... 1-5
Processor ...................................................................................................... 1-5
SPECIFICATIONS ............................................................................................. 1-5
Performance ................................................................................................. 1-5
Electrical ...................................................................................................... 1-6
Mechanical. .................................................................................................. 1-6
Environmental ............................................................................................. 1-8
CONFIGURATIONS ......................................................................................... 1-8
HARDWARE DOCUMENTATION ORDERING INFORMATION .............. 1-9

CHAPTER 2

OPERATION

2.1
2,1.1
2.1.2
2.1.3
2.2
2.2.1
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.4
2.4.1
2.4.2
2.4.3
2.5
2.5.1
2.5.2
2.5.2.1
2.5.2.2
2.5.2.3

TU58-CA RACKMOUNT CONTROLS AND INDICATORS .......................... 2-1
Front Panel .................................................................................................. 2-1
Run Indicator ............................................................................................... 2-1
Application and Removal of Power .............................................................. 2-1
TU58 COMPONENTS CONTROLS AND INDICATORS ................................ 2-2
Application and Removal of Power .............................................................. 2-2
CARTRIDGE ..................................................................................................... 2-2
Cartridge Loading ........................................................................................ 2-2
Cartridge Unloading .................................................................................... 2-3
Keeping Track of Cartridges ......................................................................... 2-3
Write Protect Tab ......................................................................................... 2-3
Cartridge Storage and Care .......................................................................... 2-3
MAINTENANCE ............................................................................................... 2-4
Head and Puck Cleaning ............................... :.............................................. 2-4
Operator Trouble Isolation ........................................................................... 2-4
Cartridge Wear ............................................................................................. 2-6
CARTRIDGE REPAIR ...................................................................................... 2-6
Metal-Base Cartridge Tape Rethreading Procedure ...................................... 2-6
Plastic-Base Cartridge Tape Rethreading Procedure ..................................... 2-8
Preparation for Threading .................................................................... 2-8
Threading the Cartridge ...................................................................... :2-8
Closing the Cartridge .......................................................................... 2-10

CHAPTER 3

PROGRAMMING

3.1
3.1.1
3.1.2
3.2
3.2.1
3.2.2
3.2.3

GENERAL PRINCIPLES .................................................................................. 3-1
Block Number, Byte Count, and Drive Number ........................................... 3-1
Special Handler Functions ............................................................................ 3-1
RADIAL SERIAL PROTOCOL (RSP) ............................................................... 3-1
Message Packets ........................................................................................... 3-1
Flag Byte Op Codes ...................................................................................... 3-2
Break and Initialization ................................................................................ 3-2

11l

CONTENTS (Coot)

Page
3.3
3.3.1
3.3.1.1
3.3.1.2
3.3.2
3.3.3
3.4

COMMAND SET ............................................................................................... 3-3
Command Packets ........................................................................................ 3-3
Maintenance Mode .............................................................................. 3-4
Special Address Mode .......................................................................... 3-5
Data Packets ................................................................................................ 3-5
End Packets .................................................................................................. 3-5
THE INSTRUCTION SET ................................................................................. 3-7

CHAPTER 4

INST ALLATION

4.1
4.1.1
4.1.2
4.1.3
4.1.4
4.2
4.3
4.3.1
4.3.2
4.4
4.4.1
4.4.2

INSTALLATION OF RACK VERSION ........................................................... .4- 1
Mounting in a Rack .....................................................
4-1
Power Selection for the Rack Version .......................................................... .4-3
Removing Module From Chassis ................................................................. .4-3
Reinstalling the Module ............................................................................... 4-5
DRIVE AND MODULE INSTALLATION ...................................................... .4-5
INTERFACE STANDARDS SELECTION AND SETUP ................................ .4-5
Selecting Interface Standards ....................................................................... .4-9
Connecting Standard Jumpers ..................................................................... .4-9
OPERATIONAL CHECKOUT ....................................................................... .4-11
Checkout of Interface ................................................................................. 4- 11
Checkout of RSP and Command Function ................................................ .4-12

CHAPTER 5

OPTIONS

5.1
5.1.1
5.2

RUN INDICATOR ............................................................................................. 5-1
Installation ................................................................................................... 5-1
BOOT SWiTCH .................................................................................................. 5-1

CHAPTER 6

TECHNICAL DESCRIPTION

6.1
6.1.1
6.1.2
6.1.3
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6

BLOCK DIAGRAM ........................................................................................... 6-1
Data Flow, Tape to Interface ........................................................................ 6-1
Data Flow, Interface to Tape ........................................................................ 6- 1
Tape Motion Control ................................................................................... 6-5
VELOCITY CONTROL ..................................................................................... 6-5
Velocity Sensing ........................................................................................... 6-5
Velocity Servo .............................................................................................. 6-5
Velocity Change ........................................................................................... 6-5
Drive Selection and Direction Change .......................................................... 6-5
Microprocessor Velocity Control .................................................................. 6-8
Run Timeout ................................................................................................ 6-9
Motor Overcurrent Drive Limit. ................................................................... 6-9
Transient Suppression .................................................................................. 6-9
HEAD SELECTION ........................................................................................... 6-9
WRITE CIRCUIT AND INTERLOCK .............................................................. 6-9
ERASE CIRCUIT ............................................................................................. 6-10

6.2.7
6,2,8
6.3
6.4
6.5

ro • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •

CONTENTS (Coot)

Page
6.6
6.6.1
6.6.2
6.7
6.8
6.9
6.10
6.10.1
6.10.2
6.11
6.11.1
6.11.2
6.11.3
6.11.4
6. i i.5
6.12
6.12.1
6.12.2
6.13
6.13.1
6.13.1.1
6.13.1.2
6.13.1.3
6.13.2

DATA ENCODING AND DETECTION ......................................................... 6-10
Encoding .................................................................................................... 6-10
Detection .......................... :......................................................................... 6-10
READ AMPLIFIER AND A UTOMA TIC GAIN CONTROL ......................... 6-11
CHARGE PUMP .............................................................................................. 6-12
MARK FINDER ............................................................................................... 6-12
INTERFACES .................................................................................................. 6-13
Serial Interface ........................................................................................... 6-13
Parallel Interface ........................................................................................ 6-13
MICROPROCESSOR AND MEMORy ........................................................... 6-13
Memory and Bus Operation ........................................................................ 6-14
Trap and Restarts ....................................................................................... 6-14
SID, SOD, and Data Encoding ................................................................... 6-14
Clock .......................................................................................................... 6-14
Reset .......................................................................................................... 6-14
8155 I/O PORTS,_ REGISTERS, AND TIMER ................................................. 6-15
I/O Ports .................................................................................................... 6-15
Registers and Timer .................................................................................... 6-15
FIRMW ARE ..................................................................................................... 6-15
Initialization and Radial Serial Protocol ..................................................... 6-15
Flag Byte, Byte Count, and Checksum ................................................ 6- 15
Op Code and Specifications ................................................................ 6-17
Data Packets ...................................................................................... 6-17
Command Operations ................................................................................ 6-17

CHAPTER 7

MAINTENANCE

7.1
7.2
7.3
7.4
7.4.1
7.4.2
7.5

INTRODUCTION ...................................... ~ ....................................................... 7-1
TROUBLE ISOLATION CHART ...................................................................... 7-1
REPAIRABLE DRIVE PROBLEMS .................................................................. 7-3
REMOVAL AND REPLACEMENT OF DRIVE PARTS .................................. 7-3
Tachometer Encoder Wheel and Pickup Housing ......................................... 7-3
Microswitches .............................................................................................. 7-4
POWER SUPPLY REMOVAL AND REPLACEMENT .................................... 7-4

APPENDIX A

TU58/PDP-ll TOGGLE IN BOOT

APPENDIX B

FIELD REPLACEABLE UNIT SPARES LIST

FIGURES
Figure No.
1-1
1-2
1-3

Title

Page

Tape Cartridge Partially Inserted into Drive ......................................................... 1-2
An Exchange in Radial Serial Protocol .................................................................. 1-3
TU 58 Block Diagram ........................................................................................... 1-4

FIGURES (Cont)

Figure No.
1-4
1-5
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
3-1
3-2
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
5-1
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
7-1

Title

Page

Single Record on Tape ......................................................................................... 1-7
Block Locations on Tape ...................................................................................... 1-7
TU58-CA Rackmount Front Panel ...................................................................... 2-1
Loading a Cartridge ............................................................................................. 2-2
Write Protect Tab ................................................................................................. 2-3
View Into Tape Drive Cartridge Slot .................................................................... 2-4
Cartridge Baseplate Screw Locations .................................................................... 2-6
Threading the Metal-Base Cartridge ..................................................................... 2-7
Head Gate and Spring ........................................................................................... 2-8
Stretch the Belt with the Floating Roller ............................................................... 2-9
Threading the Plastic-Base Cartridge .................................................................... 2-9
Read Command Packet Exchange ........................................................................ 3-8
Write Command Packet Exchange ...................................................................... 3-10
Bezel and Clip ...................................................................................................... 4-1
Rack Mounting the TU58-CA .............................................................................. 4-2
TU 58-CA Rear Panel ........................................................................................... 4-3
Module Removed from Chassis ........................................................................... .4-4
Drive Outline Drawings ....................................................................................... 4-6
Module Outline Drawing ..................................................................................... 4-7
Data Rate and Cable Length for RS-423 .............................................................. .4-9
Interface Selection Jumper Pin Locations .......................................................... .4-10
Factory Wiring ................................................................................................... 4-11
Installation of Run Indicator ................................................................................ 5-2
TU 58 Block Diagram ........................................................................................... 6-2
Data Flow, Tape To Interface .............................................................................. 6-3
Data Flow, Interface To Tape .............................................................................. 6-4
Tape Motion Control ........................................................................................... 6-6
Motor Bridge ....................................................................................................... 6-7
Velocity Change Waveforms ................................................................................ 6-8
Run Timer Simplifieo Schematic .......................................................................... 6-9
Data Encoding and Decoding ............................................................................. 6-1 0
Read Amplifier and Automatic Gain Control ..................................................... 6-11
Simplified Charge Pump ..................................................................................... 6-12
Host-TU58 Power-up Interchange ...................................................................... 6-16
Position Flowchart ............................................................................................. 6-18
Power Connector Location ................................................................................... 7-1

TABLES
Table No.
2-1
3-1
3-2
3-3
3-4
4-1

Title

Page

Operator Trouble Isolation .................................................................................. 2-4
Command Packet Structure ........................... , ...................................................... 3-3
Instruction Set ...................................................................................................... 3-4
Data Packets ........................................................................................................ 3-5
End Packet ........................................................................................................... 3-6
TU58 Module Connections .................................................................................. 4-8
VI

CHAPTER 1
INTRODUCTION

1.1 SCOPE
The TU58 DECtape II is a low-cost, mass-storage device that may be used in a wide variety of applications. This manual provides the information a user needs to install, interface, and command the
operation of the tape system. (For information about the operation of the TU58 under DEC operating
systems, refer to the individual system manuals.)

Chaptei 1 piovides a general description of the TU58 and a list of specifications including electrical
and mechanical requirements. The configurations section describes the different variations of the
TU58 that are available.
Chapter 2, the system operator~s reference section, contains important information for day-to-day
operation and routine maintenance.
Chapter 3 is the programmer's guide. It contains functional descriptions of the TU58 command set,
illustrates command sequences, explains the details of the Radial Serial Protocol, and lists the system
instruction codes and byte sequences.
Chapter 4 gives illustrated instructions for jumper selection; mechanical, electrical, and interface installation; and operational checkout of the tape system.
Chapter 5 has details about the optional features available in the TU58.
Chapter 6 contains a technical description of the TU58 using block diagrams and schematic references
to illustrate functions.
Chapter 7 is a troubleshooting and removal and repair section, oriented to field replaceable units
(FRUs).
The appendices include a list of spare parts, and a toggle-in bootstrap program for PDP-II systems.
Schematics for both parallel and serial versions of the TU 58 may be found in the Field Maintenance
Print Set. See Paragraph 1.6 for ordering information.
1.2 GENERAL DESCRIPTION
The TU58 is a random-access, fixed-length-block, mass-storage tape system. It uses preformatted tape
cartridges which store 262 kilobytes of data in 512-byte blocks. There are 256 blocks on each of two
tracks. They may be accessed by a program in a fashion similar to data stored on disks or DECtape,
using a new, high-level instruction set. A file-oriented structure is easily implemented in an operating
system by setting aside several blocks on the tape to store a directory.

1-1

DRIVE PUCK

HEAD

SWINGOUT
GATE

WRITE PROJECT
TAB

DRIVE
ROLLER

TAPE

MA-2380

TAPE
CARTRIDGE

Figure 1-1

ELASTOMER
BELT

Tape Cartridge Partially Inserted into Drive
(Top View)

The TU58 is compact and mechanically simple. The tape cartridges are DIGIT AL-preformatted miniature reel-to-reel packages containing 42.7 m (140 ft) of 3.81 mm (0.150 in) wide tape. The tape is
driven by a single puck which engages a roller which moves an elastomer drive belt in the cartridge.
This belt loops around both tape spools and provides uniform tension and spill-free winding without
mechanical linkages (Figure 1-1). The simple single-point drive mechanism allows high reliability for
the entire system.
The control and drive circuitry of the TU58 is located on a single circuit board. The controlJer uses a
microprocessor (JLP) to reduce the tape handling and communications management load on the host
system.
The motor and tape head control, driver, and switching circuits to manage two tape drives are on the
printed circuit board with the JLP. The controller supports one or two drives, but only one drive can
operate at a time. The JLP controls all of the activities of the TU58. Head and motor selection, speed
and direction changes, etc., are managed by outputs from I/0 ports on a peripheral IC. The mechanical actions of the drives themselves are supervised by the t!p to improve the system's performance.
i-2

HOST

COMMAND
PACKET

TU58

I
I

I
I
I
II
I I

CONTINUE

DATA
PACKET

I•

CONTINUE

END
MESSAGE
PACKET
MA-2384

Figure 1-2

An Exchange in Radial Serial Protocol

Operational amplifiers, comparators, and logic circuits perform amplification, signal switching and
conditioning, proportional control, and logic steering functions in the controller. The tape is protected
by motor current limiting and an anti-runaway timer.
Because of the JLP intelligence, requests from the host for data retrieval or storage need only contain
simple specifications about the transfer. The controller positions the tape and performs the transfer
without supervision from the host.
The host and controller communicate in a format called Radial Serial Protocol (RSP). The RSP uses
two kinds of byte sequences called message packets. Both command and data packets have protocol
information placed in specific locations in the byte sequence. This format is easily generated by the
TU58, making host-peripheral interaction possible at a high level with low cost.
Figure 1-2 illustrates a typical RSP exchange between a host computer and the TU58. Refer to Chapter
3 for a full discussion of RSP implementation.
The serial host interface operates on full-duplex, asynchronous 4-wire lines at jumper-selectable rates
from 150 to 38.4 kilobaud. The send and receive rates may be independently set with jumpers to
operate in accordance with Electronic Industries Association (EIA) Standards RS-422 or RS-423.
When set to RS-423, the TU58 is also compatible with devices complying with RS-232-C.

1.3

BLOCK DIAGRAM

Figure 1-3 illustrates the structure of the TU58 system. The data path is along the top of the diagram,
passing to the host through the processor at the right. The drive control is at the lower left, also closely
associated with the processor through the I/0 ports. The ports, memory, and universal asynchronous
receiver-transmitter (UART) are tied to the processor by an 8-bit-wide data/address bus.

1-3

TO HOST

MA-2378

Figure 1-3

TU 58 Block Diagram

1-4

1.3.1 Drive Control
The cartridge drive motors are powered by servo-regulated speed and direction circuits. These are
controlled by the processor which .monitors with tachometers and with signals from the tape. The
heads are selected by processor-controlled switches and either feed the automatic-gain-controlled
(AGC) read amplifier and decoder circuits or are driven by write currents encoded by the processor.
1.3.2 Processor
The processor consists of an 8085 processor supported by firmware in a 2-kilobyte read-only memory
(ROM) and by scratchpad and data buffer memory in a 256-byte random access memory (RAM). The
processor communicates with the drive control circuitry through a bidirectional I/0 port. The UART
exchanges data between the TU58 processor bus and the host computer via the serial line drivers and
receIvers.
1.4 SPECIFICATIONS
1.4.1

Performance

Capacity per cartridge

262,144 bytes, formatted in 512 blocks of
512 bytes each

Data transfer rate
Read/write on tape
Data buffer to interface
Cartridge life

41.7 ~s/data bit, 24 kbytes/s
150 to 38.4 kbaud, jumper selected
5000 typical end-to-end-and back tape
passes

Data reliability
Soft data error rate

1 in 10 7 bits read (before self-correction)

Hard error rate

1 in 109 bits read (unrecoverable within 8
automatic retries)

Hard error rate with write-verify
and system correction

2 in 1011 bits read/written

Error checking

Checksum with rotation

A verage access time

9.3 seconds

Maxim urn access time

28 seconds

Read/write tape speed

76 cm/s (30 in/s)

Search tape speed

152 cm/s (60 in/s)

Bit density

315 bits/cm (800 bits/in)

Flux reversal density

945 fr /cm (2400 fr lin)

Recording method

Ratio encoding

Medium

DECtape II cartridge with 42.7 m (140
ft) of 3.81 mm (0.150 in) tape
Size: 6.1 X 8.1 X 1.3 cm (2.4 X 3.2 X 0.5
in)
Order TU 58- K

1-5

Track format (Figures 1-4 and
1-5)

Two tracks, each containing 1024 individually numbered, firmware-interleaved
"records." Firmware manipulates 4 records at each operation to form 512-byte
blocks.

Drive

Single motor, head integrally cast into
molded chassis

Drives per controller

1 or 2. Only one may operate at a time.

1.4.2

Electrical

Power consumption
Module and 1 or 2 drives

11 W, typical, drive running
+5 V ±5% at 0.75 A, maximum
+ 12 V + 10% -5% at 1.2 A, peak
0.6 A average running
0.1 A idle
These voltages need not stabilize sim ultaneously upon power-on.

Rackmount
Serial interface standards

1.4.3

90-128, 180-256 Vac, 47-63 Hz, 35 W
maximum
In accordance with RS-422 or RS-423;
compatible with RS-232-C

Mechanical

Drive

8.1 H X 8.3 D X 10.6 W cm (3.2 X 3.3 X
4.1 in) with 19 cm (7.5 in) cable 0.23 Kg
(0.5Ib)

Board (Module)

13.2 H X 26.5 D X 3.5 W cm (5.19 X
10.44 X 1.4 in) 0.24 Kg (0.53 Ib)

Rackmount cabinet

13.2 H X 38.1 D X 48.3 W cm (5.19 X
15.0 X 19.0 in) 9 Kg (20 lbs)

Power connector to module

AMP 87159-6 with 87027-3 contacts
(DEC part nos. 12-12202-09, 12-1220300)

Power connector to rackmount

European IEC standard

Interface connector to module

AMP 87133-5 with 87124-1 locking clip
contacts and 87179-1 index pin (DEC
part nos. 12-]4268-02, 12-14267-00, 1215418-00)

i-6

315 b/cm
800 b/in

78.7
200 b/cm
b/in ....4 1 - - - - - - - - - - - - - - - -

HEADER
SYNC.

RECORD
NUMBER

COMPL
OF RCD.
NUMBER

DATA SYNC.

TRK1

000 ... 01

N + 1024

00000000 .... 01

TRKO

000 ... 01

-N

00000000 ... 01

INTER
RECORD
MARK

DATAS PACE
128 BYT'ES

CHECK
SUM

END
SPACE
ALLZEROS

TU58 ARRANGES FOUR
RECORDS AS ONE BLOCK

MA·2371

Figure] -4

-.l

Single Record on Tape

128

384

129

385

130

386

131

200 8

600 8

201 8

601 8

2'02 8

602 8

203 8

256

257

258

400 8

401 8

402 8

~
I

~~54

l 126
176 8

510

255

511

776 8

377 8

7778

382

127

383

576 8

177 8

577 8

t'"

BOT/EOT.BEGINNING/END OF TAPE

MA·3813

Figure 1-5

Block Locations on Tape

1.4.4 Environmental
The TU58 meets the following environmental specifications. When the TU58-AB or -BB (Paragraph
1.5) is integrated in a host device such as a terminal, convection provides adequate cooling if the
interior temperature is below 50° C (122° F) dry bulb, 26° C (79° F) wet bulb.
Maximum dissipation
TU58-CA
TU58-AB, TU58-BB

120 Btu/hour
34 Btu/hour

Temperature
TU 58-CA operating

15° C (59° F) to 32° C (90° F) ambient

TU 58-CA nonoperating

-34° C (-30° F) to 60° C (140° F)

Medium operating temperature

0° C (32° F) to 50° C (122° F)

Maximum temperature difference
between system ambient and TU58
module

18° C (32.4° F)

Relative Humidity, noncondensing
TU58 operating
Maximum wet bulb
Minimum dew point
Relative humidity

26° C (79° F)
2° C (36° F)
20% to 80%

TU 58 nonoperating

5% to 98%

Medium nonoperating

10% to 80%
CAUTION
If a cartridge has been exposed to either
the maximum or minimum temperature
extreme, the tape should be rewound one
complete cycle befOJ"e using (Paragraph
2.3.5). This is done to bring the tape to the
proper tension.

1.5 CONFIGURATIONS
The TU58 is available in the following configurations with accompanying designations.
Components

TU58=AB

Serial interface controller module, surface mounting, with one drive.

TU58-BB

Serial interface controller module, surface mounting, with two
drives.

Subsystems
TU58-CA

Rackmount, two drives, serial interface controller module, power
supply 110/220 V switch-selectable, detachable line cord and fuses
for 110 V, two cartridges.
.

1-8

Additional Supplies
BC20Y-25 interface cable TU58 to DL-II and DLV-II
BC20Z-25 interface cable TU58 to DLV-IIJ
TU58-K preformatted tape cartridges. Available singly or in packs of five.
TUC-Ol Tape Drive Cleaning Kit.
NOTE
Order interface cable separately.

1.6 HARDWARE DOCUMENTATION ORDERING INFORMATION
The following TU58 DECtape II Tape Subsystem hardware manuals can be purchased from
DIGITAL's Accessory and Supplies Group.
Part No.

Titie

EK -OTU 58- UG-OO 1
T"'ITT

n~T T~O

....,.,~

1"'\,,"

c,l\...-U 1 U ;)~-r\J-w 1

EK-OTU58-TM-OOl
EK-OTU58-IP-OOI
MP00747

TU58 DECtape 11 User's Guide (paper)
TU58 DECtape Ii Pocket Service Guide (card)
TU5S DECtape II Technical Manual (microfiche or paper)
TU58 DECtape II Illustrated Parts Breakdown (paper)
Field Maintenance Print Set

ORDERING
Purchase orders for supplies and accessories should be forwarded to:
Digital Equipment Corporation
Accessories and Supplies Group
Cotton Road
Nashua, New Hampshire 03060
Contact your local sales office or call DIG IT AL Direct Catalog Sales toll-free 800-258-1710 from 8:30
a.m. to 5:00 p.m. eastern standard time (U .S. customers only). New Hampshire customers should dial
(603)-884-6660. Terms and conditions include net 30 days and F.O.B. DIGITAL plant. Freight
charges will be prepaid by DIGITAL and added to the invoice. Minimum order is $35.00. Minimum
does not apply when full payment is submitted with an order. Checks and money orders should be
made out to Digital Equipment Corporation.

1-9

CHAPTER 2
OPERATION

2.1

TU58-CA RACKMOUNT CONTROLS AND INDICATORS

2.1.1 Front Panel
The front panel (Figure 2-1) has two slots for the tape cartridges and two tape motion indicator lights
for the drives. In addition, the decorative bezel has a small compartment that can be uSed to store Up to
six cartridges in their boxes.

DRIVE 0

DRIVE 1

AREA

Figure 2-1

MA-2381

TU58-CA Rackmount Front Panel

2.1.2 Run Indicator
Each tape drive has an LED that lights to indicate tape motion. Since data loss can occur if a cartridge
is removed while the tape is being written, the cartridge should not be removed if the light is on.
2.1.3 Application and Removal of Power
The TU58-CA does not have a power switch. If an outlet is available on a system power controller, the
TU58 may be plugged into the controller. Otherwise, it does not need to be turned off. Its idling power
consumption is less than 20 W.

2-1

Figure 2-2

Loading a Cartridge

When power is applied, the TUS8 initializes itself, performs its internal diagnostic tests, and then asks
the host for an acknowledgement before it settles down to wait for instructions. Refer to Paragraph
3.2.3 for a description of the required exchange.
If power is removed while a tape is being written, data may be: lost. There are no other restrictions on
power removal.

2.2 TU58 COMPONENTS CONTROLS AND INDICATORS
Refer to the options section (Chapter 5) for installation and operation of OEM features.
2.2.1 Application and Removal of Power
The TU58 may be supplied with power from a host system. It is ready for operation within 1 second of
voltage stabilization. It does not need to be turned off when not in use; its idling power consumption is
less than 5 W.
When power is applied, the TU 58 initializes itself, performs its internal diagnostic tests, and then asks
the host for an acknowldgement before it settles down to wait for instructions. Refer to Paragraph
3.2.3 for a description of the required exchange.
If power is removed while a tape is being written, data may be lost. There are no other restrictions on
power removal.

2.3 CARTRIDGE

2.3.1 Cartridge Loading
The TU58 drive is designed to make correct loading easy. To load the cartridge, hold it label-up, line it
up with the grooves in the chassis, and slide it in with a firm push. Figure 2-2 illustrates the fit of the
cartridge into the drive chassis grooves.

2-2

WRITE PROTECT TAB IN
PROTECT POSITION

I
MOVE TO RIGHT TO RECORD

•
MOVE TO LEFT TO PROTECT
4
MA-2359

Figure 2-3

Write Protect Tab

2.3.2 Cartridge Unloading
Unloading the cartridge is as simple as loading. Just pull it straight out. It is best to wait for the tape to
stop, as indicated by the run light, before removing the cartridge. The mechanism cannot be damaged
by removing the cartridge while the tape is moving, but if a write is in progress, data may be lost. An
error message will be sent to the host if a command is interrupted by removal of a cartridge.

2.3.3 Keeping Track of Cartridges
If the TU58 is used in a non-file-structured system, the cartridge does not have an identifying number
or label recorded on the tape. If a cartridge is changed, the TU58 will not know that a different
cartridge was loaded; the operator must keep track of the contents of various cartridges.
2.3.4 Write Protect Tab
Each tape cartridge has a movable tab which, when properly positioned, protects data on the tape
from unintended write operations. When this Write Protect tab (Figure 2-3) is in the inner position
(toward the drive roller), it locks out the write circuitry.

When the Write Protect tab is in the outer position, it closes a switch in the chassis and allows the
controller to write when it is commanded to. The operator should be sure that system or program tapes
are backed up with copies before loading them into the TU58 with their Write Protect tabs set to
record.
The Write Protect tab can be completely removed for long-term write protection. On the metal-base
cartridge, lift the protect tab with a fingernail under the protruding end. Replace it by dropping it into
its slot and pressing on it until it snaps. On the plastic-base cartridge, pry up the tab from its back edge
partway and then lift from the front. To replace it, drop it into its slot and press forward and down.
2.3.5 Cartridge Storage and Care
Store cartridges in their cases, away from dust and heat or direct sunlight. Do not touch the tape; there
is no safe way to clean the tape and permanent errors may result. Keep tools and other ferrous or

2-3

magnetic objects away. If a tape is suspected of having been exposed to environmental extremes as
listed in the specifications and if the software operating system permits, wind it all the way through
with a "Newtape" (Paragraph 3.1.2) or equivalent command or by requesting positionings to blocks at
each end of the tape before attempting to store data on the cartridge.

2.4

MAINTENANCE

2.4.1 Head and Puck Cleaning
After 250 hours of tape running time or semi-annually, clean the head and motor puck with a longhandled cotton applicator moistened with DEC cleaning fluid (from cleaning kit TUC-Ol), 95 percent
isopropyl alcohol, fluorocarbon TF, 113 or equivaleat (Figure 2-4). Push the puck around with the
applicator to clean its entire surface. Regular cleaning minimizes tape and head wear and prevents tape
damage and data errors caused by contamination. This is the only regular maintenance required by the
TU58.

0
0

12
DRIVE PUCK

MICROSWITCHES

:I CJ III
\

TAPE HEAD
MA-2374

Figure 2-4

View Into Tape Drive Cartridge Slot

2.4.2 Operator Trouble Isolation
Table 2-1 lists potential problems and possible corrective actions and comments. (Some items are not
applicable to components.)

Table 2-1

Operator Trouble Isolation

Symptom

Action/ Comments

TU58 does not respond to host.

-1.

Ensure that the TU58-CA is plugged into a
live ac socket (or proper dc source for components).

2. Check that the voltage selection switch is
properly set.
3. Ensure that the fuse and power cord are intact and properly inserted.
4. Check that the baud rates and interface
standards are the same for both the TU58
and the host interface board (Paragraph
4.3).

2-4

Table 2-1
Symptom

Operator Trouble Isolation (Cont)
Action/ Comments
5. If possible, observe the self-test indicator
light on the controller module. [Remove the
bezel on the rackmount version (Paragraph
4.1.1)]. When power is applied, the light
should shine for half a second, go out for
anotlier half second, and then relight. This
means the controller has passed its automatic self-test and is ready for operation. If
the light remains off, there is some problem
within the module or in the interface.
Check that the interface cable is intact and
properly inserted. If the serial interface is
suspected and the standards are correct, try
a new interface cable. An open wire in the
line from the host prevents the light from
coming on. Other causes require servicing.

TU58 does not write
(reads okay).

1. Check that the Write Permit tab is correctly
on the cartridge (Figure 2-3).
2. The trouble may be in a drive. Try writing
on the other drive. Any problem except the
Write Permit tab setting requires service.

Read errors (Some
host operating systems
may provide this or a
similar message.)

TU58 sends motorstopped error messages.

1. Clean the head. Dirt and tape oxide buildup
can cause errors (Paragraph 2.4.3).
2. The tape may contaip errors that were written onto it. If a tape is in poor condition or if
data is not verified at write-time, errors may
become a permanent part of the recording.
A new cartridge with format problems will
produce the same error message. Try another cartridge.

This indicates that a malfunction has occurred in
the data recovery section and the runaway timer
has stopped the motor. The TU 58 should not be
commanded to move tape more than twice under these conditions without checking the cartridge. Make sure that the tape is not getting
near the end where it might come free of the hub.

2-5

oDo @)

(±)

MA-2361

Figure 2-5

Cartridge Baseplate Screw Locations

2.4.3 Cartridge Wear
Cartridge tape is expected to last for 5000 end-to-end-and-back passes. If a cartridge is at the end of its
life, a read operation may require several retries to get the data in the presence of soft errors. A soft
error is a temporary data loss which is usually caused by a speck of dirt or oxide on the tape or head
surface. This speck lifts the tape away from the head and causes signal loss and consequent read errors.
A few extra passes of the tape past the head may knock the speck away and allow error-free reading. If
it happens often, the tape is probably old and shedding oxide and should be copied and discarded as
soon as possible.
2.5 CARTRIDGE REPAIR
Under unusual circumstances of controller failure or cartridge mishandling, the tape might come free
of the hub. The tape is not fastened to the hub but is held in place by the elastomer belt and by the
tape's wrap around itself. The procedures for looping the tape back onto the hub help the user prevent
the loss of important data. They are not a substitute for the customary precautions of proper handling
and backup copying. Two procedures are given here. One is for the metal-base cartridge and the other
is for the plastic-base cartridge,.
These are moderately difficult procedures requiring the use of small tools. Minimum tools are a no. 1
Phillips head screwdriver and a small probe (a straightened paper clip can be used). Tweezers are
helpful.
NOTE
Keep magnetized tools away from the bulk of the
tape and do not touch the tape surface except at the
ends because fingerprints cause errors. (If staples or
paper clips stick to a tool, it is magnetized.)
2.5.1

Metal-Base Cartridge Tape Rethreading Procedure
1. Open the cartridge by removing the four baseplate Phillips head screws (Figure 2-5) and set
it upright on the work surface with the cover still on.
2.

Lift the cover off.
2-6

MA-2362

Figure 2-6

Threading the Metal-Base Cartridge

NOTE
To remove the head gate, swing it out to clear the
tape before lifting it up. Its replacement is optional.
3. Thread the end of the tape around the tape guides (Figure 2-6).
4.

Moisten the end of the tape with water to get it to stick to the hub.

5. With a small amount of slack at the free end, insert the end between the hub and belt and
operate the drive roller with a finger to take up the tape. As soon as the tape is grabbed, keep
some back tension on the tape. This win keep it feeding straight into the hub.
6. Continue to wind. Watch for the loose end as it comes around. Ifit separates from the hub,
tuck it under the next turn of tape with the probe. (Back up if the end is too long.)
7. Continue to wind a few more turns with the drive roller while applying tension to the tape.
8. Hold the take up hub and drive roller fixed, and rotate the supply reel to take up the slack.
9. Continue winding the tape about 20 turns before reassembling.
10. To reassemble the cartridge, reinstall the gate (if desired) by aligning the long and short ends
of the spring with the long and short ends of the gate, as in Figure 2-7.
11. Drop the spring into the well in the gate. Holding the spring down with a thumbnail or
probe, rotate the long end of the spring around to the slot that is at a right angle to the long
dimension of the gate. Push the end of the spring into the slot; it should stay there by itself.
12. Hold the gate halfway out so that the gate and the spring end do not touch the tape. Slowly
press the gate down onto its pin on the cartridge baseplate. Reach in with the probe and
press the spring down. It will clear its holding slot and snap into position, closing the gate.
13. Carefully lower the cartridge cover into place and reinstall the screws.

2-7

Figure 2-7

Head Gate and Spring

2.5.2 Plastic-Base Cartridge Tape Rethreading Procedure
Open the plastic-base cartridge case by removing the four baseplate Phillips head screws (Figure 2-5)
and carefully remove the top.

2.5.2.1 Preparation for Threading - The four rollers and tape hubs in the plastic-base cartridge are
held in their operating plane by the top and bottom of the case together. When the top is off, the
various parts tend to creep out of position, and the elastomer belt can get folded under the hubs.
1.

To organize the parts for threading, remove and discard the head gate and spring. Take the
empty tape hub from the case and set it aside.

Remove the floating roller (Figure 2-8).

Rearrange the elastomer belt around the drive roller and the full hub.

Reinstall the floating roller and use it to stretch the belt tight.

Put the empty tape hub on its pin.

Using the top to hold the floating roller, belt, and loaded hub down, use a straightened
paper clip or pencil to guide the elastomer belt around the hub. The hub should seat against
the base with the belt around it:

2.5.2.2
1.

Threading the Cartridge
Pull several centimeters (a few inches) of tape off the supply hub and through the tape guides
(Figure 2-9).

2-8

FLOATING ROLLER

•

/
MA-2355

Figure 2-8

Stretch the Belt with the Floating Roller

MA-2364

Figure 2-9

Threading the Plastic-Base Cartridge

2-9

NOTE
Hold all parts down when moving them. Otherwise,
the hubs will creep up the pins and cause the belt to
slip. Then the procedure must be restarted at Paragraph 2.5.2.1.
2.

Moisten the end of the tape with water to get it to stick to the hub.

With a small amount of slack at the free end, insert the end between the hub and belt, and
operate the floating roller to take up the tape.

As soon as the tape is grabbed, keep some back tension on the tape. This keeps the tape
feeding straight into the hub.

Continue to wind. Watch for the loose end as it comes around. If it separates from the hub,
tuck it under the next turn of tape with the paper clip. (Back up if the end is too long.)

Continue to wind a few more turns with the floating roller while applying tension to the
tape.

Now hold the takeup hub, drive, and floating rollers fixed and rotate the supply hub to take
up the slack.

2.5.2.3 Closing the Cartridge - Place the top back on the cartridge. Do not reinstall the head gate.
The mirror window may need to be pressed in slightly to clear the bottom. Reinstall the four baseplate
screws.
N ow use a finger to operate the drive roller and wind the tape about 20 turns onto the takeup hub
before inserting the cartridge into a drive.
NOTE
The only reason for performing this exercise is to
copy the data from the injured tape as soon as possible. Discard the cartridge after copying.

2-10

CHAPTER 3
PROGRAMMING

3.1 GENERAL PRINCIPLES
The TU58 is controlled by a high-level command set that unburdens the host computer from devicerelated operations such as tape positioning and read retries. The TU58 firmware contains subroutines
that are activated by brief strings of command bytes. The command strings contain the numerical code
for the operation to be performed and the location and size of data files that are to be transferred,
when applicable. They also contain various housekeeping characters that are part of the Radial Serial
Protocol (RSP) under which the byte sequences are defined. The byte sequences are called message
packets and are designed to be suitable for transmission by asynchronous interfaces.
3.1.1 Block Number, Byte Count, and Drive Number
The TU58 uses the block number and byte count to write or retrieve data. If all of the desired data is
contained within a single 512-byte block, the byte count will be 512 or less. When the host asks for a
particular block and a 512-or-Iess byte count, the TU58 will position the specified drive (unit) at that
block and transfer the number of bytes specified. If the host asks for a block and also a byte count
greater than that of the 512-byte boundary, the TU58 will read as many sequential blocks as are
needed to fulfill the byte count. The same process applies to the write function. This means that the
host software or an on-tape file directory need only store the number of the first block in a file and the
file's byte count to read or write all the data without having to know the additional block numbers.
3.1.2 Special Handler Functions
Some device-related functions are not dealt with directly in the RSP or in the TU58 firmware.

3.2

A short routine (perhaps entitled "Newtape") should be included in a TU58 handler to
provide a complete wind-rewind for new or environmentally stressed tape cartridges. This
procedure brings the tape pack to proper operating tension levels.

A TU58 handler should check the success code (byte 3 of the RSP end message) for the
presence of soft errors. This enables action to be taken before hard errors (permanent data
losses) occur. For example, if the number of retries on a particular cartridge reaches some
value, a message like "Tape Maintenance Required" could be presented to the operator.
This would suggest that prompt copying of the tape and cleaning of the head is in order.

RADIAL SERIAL PROTOCOL (RSP)

3.2.1 Message Packets
All communication between the TU58 and the host is divided into message packets, which are groups
of bytes arranged in fixed order. Position within the packet determines the meaning of each byte. There
are three kinds of message packets: command, data, and end messages. The end message is a special
case of the command packet. In addition, there are three single-byte protocol management messages:
INIT, Continue, and XOFF.

3-1

Each packet begins with a flag byte, which announces its contents. The next byte in a message packet is
the byte count. This is the number of message characters in the packet, excluding the flag, byte count,
and checksum. Up to 128 message bytes may be in each packet. Larger blocks of data are sent with
multiple packets. The last two bytes of the message packet are a 16-bit checksum. The checksum is
formed by summing successive byte pairs taken as 16-bit words and using an end-around carry from
bit 15 to bit O. The flag and byte count are included in the checksum.
3.2.2 Flag Byte Op Codes
Bits 7-5 of the op code are reserved.

OIs
028
048
108
208
23 8

00001
00010
00100
01000
10000
10011

Data

Data
Control (command)
IN IT
Bootstrap
Continue
XOFF

This flag informs the receiver that data rather than commands are arriving. The receiver
loads the incoming bytes into a buffer area in memory. It does not look for an op code to
execute.

Command The command flag informs the TU58 that a command packet follows. An instruction
code will be in this packet. The flag is particularly important when the TU58 encounters
an error condition. In this case, it sends an end packet before data transfer is complete.
The host knows that the end packet has been sent because the packet received has a
command flag instead of a data flag.
INIT

This op code is sent from the host to the TU58 to cause it to execute its power-up sequence. The TU58 returns Continue after completion. It is sent from the TU58 to the host
to indicate that the power-up sequence has occurred. When the TU58 makes a protocol
error or receives an invalid command, it reinitializes and sends INIT continuously to the
host. When the host recognizes INIT, it sends Break to the TU 58 to restore the protocol.

Bootstrap

A flagbyte saying Bootstrap (octal 10), followed by a byte containing a drive number,
causes the TU 58 to read block 0 of the selected drive. It returns the 512 bytes without
radial serial packaging. This simplifies bootstrap operations. Bootstrap may be sent by
the host instead of a second INIT as part of the initialization process described below.

Continue

After a message is sent from host to the TU58; the host must wait until the TU58 sends
Continue before any more messages can be sent. This permits the TU58 to control the
flow of data.

XOFF

Ordinarily, the TU58 does not have to wait between messages to the host. However, if the
host is unable to receive all of a message from the peripheral at once, it may send XOFF.
The TU 58 stops transmitting immediately and waits until the host sends Continue to
complete the transfer when it is ready. (Two characters may be sent by the UART to the
host after the TU58 receives XOFF.)

3.2.3 Break and Initialization
Break is a unique logic entity that can be interpreted by the TU58 and the host regardless of the state of
the protocol. Break is transmitted when the serial line, which normally switches between two logic
states called mark and space, is kept in the "space" condition for more than one character time. This
causes the TU58's UART to set its framing error bit. The TU58 will interpret the framing error as
break.
3-2

Break has two applications in the TU58: one is routinely used, and the other is for special conditions.
When the TU58 is powered up, it performs its internal checkout and initialization and then transmits
INITs continuously to the host to inform the host that it is present. The host acknowledges the TU58
by sending break for a minimum of one character time, and then sending two INITs. The TU58
responds with Continue and enters an idle state in which it will wait for further instructions.
If communications break down, due to any transient problem, the host may restore order by sending
break and INIT as outlined above. Whatever faulty operations were underway will be cancelled, and
the TU58 will reinitialize itself, return Continue, and wait for instructions.

With DEC serial interfaces, the initialize sequence may be sent by the following sequence of operations. Set the break bit in the transmit control status register, then send two null characters. When the
transmit ready flag is set again, remove the break bit. This will time Break to be one character time
long. The second character will be discarded by the TU58 controller. Next, send two INIT characters.
The first will be discarded by the TU58. The TU58 will respond to the second INIT by sending
Continue. When Continue has been received, the initialize sequence is complete and any command
packet may follow.
3.3 COMMAND SET
The command sel for the TU58 provides the capabilities required for the performance of randomaccess operations. To allow for future development, certain op codes in the command set have been
reserved; these commands have unpredictable results and should not be used. Op codes not listed in
the command set are illegal and result in the return of an end packet with the "bad op code" success
code.
A data transfer operation uses three or more message packets. The first packet is the command packet
from host to the TU58. Next, the data is transferred in 128-byte packets in either direction (as required
by read or write). After all data is transferred, the TU58 sends an end packet. If the TU58 encounters a
failure before all data has been transferred, it sends the end packet as soon as the failure occurs.

3.3.! Command Packets
The command packet format is shown in Table 3-1. Bytes 0, 1, 12, and 13 are the message delivery
bytes. Their definitions are as follows.
Table 3-1

Command Packet Structure

Byte

Byte Contents

Flag = 0000 0010 (028)
Message Byte Count = 0000 1010 (128)

----------------------2
OpCode
3

Mo~fi~
UnitNumb~

5
Switches
6
Sequence Number - Low
7
Sequence Number - High
8
Byte Count - Low
9
Byte Count - High
10
Block Number - Low
11
Block Number - High
1 2 - - - - - - Checks~~Lo;_--------13

Checksum - High

3-3

Flag

This byte is set to 000000 10 to indicate that the packet is a Command
packet.

Message Byte Count

Number of bytes in the packet excluding the four message delivery
bytes. This is decimal 10 for all command packets.

12, 13 Checksum

The 16-bit checksum of bytes 0 through 11. The checksum is formed
by treating each pair of bytes as a word and summing words with end
around carry.

The remaining bytes are defined as follows.
2

Op Code

Operation being commanded. Refer to Table 3-2 and Paragraph 3.4
for definitions.

Modifier

Permits variations of commands.

Unit Number

Selects drive 0 or 1.

Switches

Selects maintenance mode.

6, 7

Sequence Number

Always zero for TU58.

8, 9

Byte Count

N umber of bytes to be transferred by a read or write command. Ignored by other commands.

10, 11 Block Number

The block number to be used by commands requiring tape positioning.
Table 3-2

Instruction Set

Op Code
Decimal

Op Code
Octal

0
1
2
3

1
2
3
4
5
6

NOP
IN IT
Read
Write
(Reserved)
Position
(Reserved)
Diagnose
Get Status
Set Status
(Reserved)
(Reserved)

-4
5
6

8
9
10
11

Instruction

11
12
13

3.3.1.1 Maintenance Mode - Setting bit 4 of the switches byte (byte 5) to 1 in a read command inhibits
ietries on data errors. Instead, the incoiiect data is delivered to the host followed by an end packet.
The success code in the end packet indicates a hard data error. Since data is transmitted in 128- byte
packets, a multiple packet read progresses normally until a checksum mismatch occurs. Then the bad
data packet is transmitted, followed by the end packet, and the operation terminates.

3 -4

3.3.1.2 Special Address Mode - Setting the most significant bit of the modifier byte to 1 selects special
address mode. In this mode all tape positioning operations are addressed by 128-byte blocks (0-2047)
instead of 512-byte blocks (0-511). Zero-fill in a write operation only fills out to a 128-byte boundary
in this mode.
3.3.2 Data Packets
The data packet is shown in Table 3-3. The flag byte is set to 00000001. The number of data bytes may
be between 1 and 128 bytes. For data transfers larger than 128 bytes, the transaction is broken up and
sent 128 bytes at a time. The host is assumed to have enough buffer capacity to accept the entire
transaction, whereas the TU58 only has 128 bytes of buffer space. For write commands, the host must
wait between message packets for the TU58 to send the continue flag (00010000) before sending the
next packet. Since the host has enough buffer space, the TU58 does not wait for a continue flag
between message packets when it sends back read data.
Table 3-3

Byte

o
1

.~---

2
3

Data Packets

Byte Co!!te!!ts
Fhl a = {)()()() 000 1

I B;'t~ Co~;~t~ =~M ~

------First Data Byte
Data

M+ 1

Data
Last Data Byte

~+2
~+ 3

Checksum L
Checksum H

.. _--- - - - .... ---

3.3.3 End Packets
The end packet is sent to the host by the TU58 after completion or termination of an operation or on
an error. The end packet is shown in Table 3-4. The definition of bytes 0, 1, 12, and 13 are the same as
for the command packet. The remaining bytes are defined as follows.
Op Code - 0100 0000 for end packet

Byte 2
Byte 3

Octal
0
1
377
376
370
367
365
357
340
337
320
311

Success Code
- 0 = Normal Success
- 1 = Success but with Retries
- 1 = Failed Self-Test
-2 = Partial Operation (End of ~edium)
-8 = Bad Unit Number
-9 = No Cartridge
-11 = Write Protected
-17 = Data Check Error
-32 = Seek Error (Block Not Found)
-33 = ~ otor Stopped
-48 = Bad Op Code
-55 = Bad Block Number (i.e. > 511)

3 -5

Byte 4

Unit Number 0 or 1 for Drive Number

Byte 5

Always 0

Bytes 6, 7

Sequence Number - Always 0 as in command packet

Bytes 8, 9

Actual Byte Count - Number of bytes handled in transaction. In a good
operation, this will be the same as the data byte count in the command
packet.

Bytes 10, 11

Summary Status
Byte 10
Bit 0

17
Reserved

Byte 11
BitO

1
2
3
4

Logic Error
Motion Error
Transfer Error
Special Condition (Errors)

5
6

Table 3-4
Byte

End Packet

Byte Contents

Flag = 0000 0010
Byte Count = 0000 1010

2
3
4
5
6
7
8
9
10
11

Op Code = 0100 0000
Success Code
Unit
Not Used
Sequence No. L
Sequence No. H
Actual Byte Count L
Actual Byte Count H
Summary Status L
Summary Status H

12
13

I Checksum H

------ -----------

----- ---------Checksum L

3-6

3.4 THE INSTRUCTION SET
The instructions and their op codes are shown in Table 3-2. The following is a brief description and
usage example of each.
OPCODEO
NOP
This instruction causes the TU58 to return an end packet. There are no modifiers to NOP. The NOP
packet is shown below.

BYTE
0
1
2
3
4
5
6
7
8
9
10
11
12
13

0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000

0010
1010
0000
0000

OOOX
0000
0000
0000
0000
0000
0000
0000

OOIX
1010

FLAG
MESSAGE BYTE CNT
OPCODE
MODIFIER
UNIT NUMBER (IGNORED)
SWITCHES (NOT USED)
SEQ NO.
l~Vl U;)CU
SEQ NO.
NO DATA
BYTECOUNTL
INVOLVED
BYTECOUNTH
BLOCKNO.L
NO TAPE
POSITION
BLOCKNO.H
CHECKSUML
CHECKSUMH
..... Tr"'\..~ T

TnT""'~

The TU58 returns the following end packet.
0
1
2
3
4
5

0000
0000
0100
0000
0000

0010
1010
0000
0000

()()()()

0000
0000
0000
0000
0000

0000
0000
0000
0000
0000
0000

XXXX
OOOX
XXXX

XXXX
XXXX
XXXX

7
8
9
10
11
12
13

OOOX

FLAG
MESSAGE BYTE CNT
OPCODE
SUCCESS CODE
UNIT (IGNORED)
NOT USED
SEQ.L
NOT USED
SEQ.H
ACTUAL BYTE CNT L
ACTUAL BYTE CNT H
SUMMAR Y STATUS L
SUMMAR Y STATUS H
CHECKSUML
CHECKSUMH

3-7

NO DATA
INVOLVED

OP CODE 1
INIT
This instruction causes the TU58 controller to reset itself to a ready state. No tape positioning results
from this operation. The command packet is the same as for NOP except for the op code and the
resultant change to the low order checksum byte. The TU58 sends the same end packet as for NOP
after reinitializing itself. There are no modifiers to INIT.

o P CO D E 2

Read, and Read with Increased Threshold
This instruction causes the TU58 to position the tape in the drive selected by Unit No. to the block
designated by the block number bytes. It reads data starting at the designated block and continues
reading until the byte count (command bytes 8 and 9) is satisfied. After data has been sent, the TU58
sends an end packet. Byte 3 indicates success, success with retries, or failure of the operation. In the
event of failure, the end packet is sent at the time of failure without filling up the data count. The end
packet will be recognized by the host by the flag byte. The host will see a command flag (0000 0010)
instead of a data flag (0000 0001).

There is one modifier to the read command. A modifier of 0000 0001 causes the TU 58 to read the tape
with an increased threshold in the data recovery circuit. This makes the tape drop bits if any weak
spots are present. Thus, if the TU58 can read error-free in this mode, the data is healthy. The read
transaction between TU58 and host is shown in Figure 3-l.

HOST

TU5S

COMMAND
PACKET
(READ 510 BYTES)

I
II
44-----·~I~-1-2-~-~-~-~-E-S--

II.
I

DATA

128 BYTES

DA------TA

4 - - - - 1 .r - - -

128 BYTES

44----I~I~--12-~-A-BT-Y~-E-S~

END

MA-2376

Figure 3-1

Read Command Packet Exchange

3-8

OP CODE 3
Write, and Write and Read Verify
This op code causes the TU 58 to position the tape in the selected drive to the block specified by the
number in bytes 10, 11 of the command packet and write data from the first data packet into that
block. It writes data from subsequent data packets into one or more blocks until the byte count called
out in bytes 8, 9 of the command packet has been satisfied.
The controller automatically zero-fills any remaining bytes in an 512-byte tape block.
There is one modifier permitted with the write command. A modifier of 0000 0001 causes the TU58 to
write all of the data and then back up and read the data just written with increased threshold and test
the checksum of each record. If all of the checksums are correct, the TU58 sends an end packet with
the success code set to a (or 1 if retries were necessary to read the data). Failure to read correct data
results in a success code of -6 (llli 1010) to indicate a hard read error.
The write operation has to cope with the fact that the TU58 only has 128 bytes of buffer space. It is
necessary for the host to send a data packet and wait for the TU58 to write it before sending the next
data packet. This is accomplished using the continue flag. The continue flag is a single byte response of
0001 0000 from TU58 to host. The write operation is shown for both write and write/verify operations
in Figure 3-2.

OPCODE4

(Reserved)

OP CODE 5
Position
This command causes the TU58 to position tape on the selected drive to the block designated by bytes
10, 11. After reaching the selected block, it sends an end packet. No modifiers are used.
OPCODE6

(Reserved)

OP CODE 7
Diagnose
This command causes the TU58 to run its internal diagnostic program which tests the processor,
ROM, and RAM. Upon completion, TU58 sends an end packet with appropriate success code (0 =
Pass, -1 = Fail).
OP CODE8
Get Status
This command is treated as an NOP. The TU58 returns an end packet.
OP CODE 9
Set Status
This command is treated as an NOP because TU58 status cannot be set from the host. The TU58
returns an end packet.
OPCODEIO

(Reserved)

OPCODEll

(Reserved)

3-9

TU58

HOST
COMMAND
PACKET
WRITE
620
BYTES

...
DATA
128 BYTES

CONTINUE

TAPE POSITIONS
AND WRITES DATA

...
DATA
128 BYTES

CONTINUE

TAPE POSITIONS
AND WRITES DATA

...
DATA
128 BYTES

CONTINUE

TAPE POSITIONS
AND WRITES DATA

...
DATA
128 BYTES

CONTINUE

TAPE POSITIONS
AND WR ITES DATA
4

CONTINUE

DATA
108 BYTES
TAPE POSITIONS AND WRITES
DATA. TU58 ZERO-FILLS REMAINING 404 BYTES OF BLOCK. IF WRITE!
VERIFY, TAPE REWINDS AND READS
BLOCKS JUST WRITTEN AND TESTS
CHECKSUMS.

MA·2377

Figure 3-2

Write Command Packet Exchange

3-10

CHAPTER 4
INSTALLATION

4.1

INSTALLATION OF RACK VERSION

4.1.1 Mounting in a Rack
The TU58-CA rackmount unit mounts in 13.2 cm (5.2 in) of standard 48.3 cm (19 in) width rack. It
should be located so that the 2 m (6 ft) power cord can reach a power controller outlet box such as the
DEC 861 or any power outlet.
To get to the mounting holes, remove the bezel (Figure 4-1) by gripping it at the top and bottom with
both hands. Rotate it out from the bottom and lift it away. (If the unit is installed in a recessed rack,
the bezel may be removed by gripping it with both hands on the left edge with fingers or thumbs inside
the storage well. Pull sharply out and swing the bezel away.
WARNING
Metal bezels are heavy!

MA-2382

Figure 4-1

Bezel and Clip

If the rack requires them, install four speednuts at the holes spaced according to Figure 4-2. The TU58
is light enough for one person to install. Put the two bottom screws in first to avoid bending the
mounting ears.

4-1

FRONT VIEW

-T-

2.22
(7/8)

TOP OF BEZEL

1.59

WIDE

(5/8)

NARROW

6.04

2.86

(23/8)

(11/8)

@
WIDE

1.59

WIDE

(5/8)
---""---t---I

4.76
(17/8)

L_
1+-_ _ _ _ _ _ _ _ 46.5 - - - - - - - - + 1
(18.3)

0.95
(0.375)

FRONT OF BOX (BEZEL REMOVED)

48.3

1+---------(19.0)-----------+l

13.2
(5.19)

FRONT

L!----_~
~1--------34.3
,..

3.81
/+--(1.5)

(13.5) - - - - - - - + t

44.5
1+--------(17.5)-------~·

·SUBJECT TO CHANGE

Figure 4-2

'----""0 T

~--------------------------------~~
I
48.3
14---------(19.0)-------~·

Rack Mounting the TU58-CA

4-2

4.1.2 Power Selection for the Rack Version
A line cord for 110 V and two fuses are supplied with the TU58-CA. Line cords for other voltages and
standards may be purchased separately. The chassis power receptacle meets European IEC standards.
A switch on the back of the rackmount cabinet selects 110 or 220 V (Figure 4-3).

m:n:.

110/220 V SWITCH

INTERFACE
CABLE
CONNECTOR

~I (Dn D) I~ LINE CORD RECEPTACLE
MA-2367

Figure 4-3
1.

TU 58-CA Rear Panel

Set the switch to the correct vaiue using a smaB screwdriver.
CAUTION
If the unit is plugged into a 220 V circuit while set for
110 V, it may be severely damaged.

Install a fuse in the fuse post.
NOTE
A 3/8 A slow-blow fuse is required for 220 V, a 3/4
A slow-blow fuse fOi 110 V.

Insert the appropriate power cord into the receptacle. Do not plug it into an outlet until the
installation is complete.

4.1.3 Removing Module From Chassis
The drive and module mounting cage must be pulled forward for the module to clear the bottom of the
rack cabinet (Figure 4-4).
1.

Unplug the power, drive, and interface connectors.
CAUTION
Be careful around the thin tachometer disk. It is easily bent (and its edge is sharp). If the disk gets bent
without creasing, it might be straightened with pliers.
Alignment is not critical, but it is better if the disk
does not rub against the optical sensor block. It it
cannot be aligned, or if it is creased, it must be replaced.

Lift one of the spring-metal catches at the bottom left or right edges of the cage and pull that
side of the cage forward just enough to clear the catch.

4-3

MA-·2366

Figure 4-4

Module Remove d from Chassis

Release the other side in the same way.

Slowly pull the cage forward about 5 cm (2 in).

Unlatch the module handle locks and pull the module out. The loose cage may be tilted to
provide clearance.

4.1.4
1.

Reinstalling the Module
Slide the module into the guides in the cage, lifting the drive cables out of the way. (This may
be done with the cage removed from the rack.) Do not latch the module into place yet.

, 2.

Plug the drive cables into the module headers, left drive to left header and right to right. The
plugs are keyed and install with the cables attached to them from the rear of the cabinet.

Set the cage on the edge of the cabinet and reach behind to the power supply cable. Thread
the cable into the cage over the module. The three keying fingers are on the left as the plug
goes onto the power header on the module.

Push the module firmly into the cage and latch it into place.

The interface cable enters the rackmount cabinet through a connector on the back panel.
Draw the flat interface cable forward under the module and cage and arrange it so that the
connector can fit into the header without twisting the cable. The red stripe is on the left and
the cable goes into its connector from below.

Dress the cable so that it is not crimped under the cage edges and line the four cage ears with
the punched tabs in the cabinet bottom plate. Push the cage back into the tabs until the
spring catches click.

4.2 DRIVE AND MODULE INSTALLATION (DOES NOT APPLY TO RACKMOUNT)
Figures 4-5 and 4-6 provide the mounting dimensions for the circuit board (module) and drive mechanism. The drive has a 19 cm (7.5 in) cable which plugs into the module header with the wires coming
out of the plug toward the center of the module. The plug is keyed to ensure proper orientation. The
cartridge extends 1.60 cm (0.62 in) from the front of the drive. If the drive is recessed in a panel,
clearance must be provided around the opening for fingers to grip the cartridge. Ideally, the cartridge
slot in a front panel will be somewhat larger than minimum, to allow easy insertion. The opening
should be at least the dimensions of the cartridge, 1.3 cm (0.5 in) X 8.1 cm (3.2 in), located not more
than 0.53 cm (0.17 in) above the bottom mounting surface (line A in Figure 4-5).
The module should be mounted on a flat surface with 3 mm (4-40) hardware and 1 cm (3/8 in)
standoffs. Both the module and the drive may be mounted at any angle. For mounting to a surface
above the drives, the 1.80 cm (0.71 in) clearance is required; hole spacing is given in the outline
drawings. For mounting to a surface below the drives, an 8.18 cm (3.22 in) X 8.89 cm (3.50 in) chassis
cutout is required, with the same mounting hole spacing.
CAUTION
The mounting surface for the drives must be Oat
within 0.64 em (0.025 in).
4.3 INTERFACE STANDARDS SELECTION AND SETUP
The TU58 is shipped with factory-installed jumpers for a transmission rate of 38.4 kilobaud and the
RS-423 unbalanced line interface (Figure 4-9). A variety of standards and rates may be selected by
changing the jumpers on the controller module. Table 4-1 provides a list of all the pillS on the board
and their functions, including the wire-wrap (WW) pins, interface, and power connectors.

4-5

10.46

~---(4.12)---~

5.23

(2.06)

68
9.
(3.812)

8.1 8
(3.22)

5.71 5 (.1 9 )TV P h-.......L.-~:-A..::s:::::z:.,-"""':l.J
(2.250)

~
t

1.60

L...-._ _- r -_ _ _. l - - - . . . L . . - -

1.65
(.65)

(0.62)

DEC TU58-K CARTRIDGE

A
8.255
(3.25)

(.71 )
1.80

.56

l3.50-J

(1.38) DIA

8.89

~--(3.50)

MEASUREMENTS ARE IN
CENTIMETERS EXCEPT
VALUES IN PARENTHESES
ARE IN INCHES.
MA-2369

Figure 4-5

Drive Outline Drawings
4-6

2476
(9.75)

"""""-

1.27

--1

14.73
(5.80)

l.-

('5~1

.30
(.12)

'~rT

.64

(.25)

---..

AMP HEADER #87633-6 AMP #87272-8
MATE: AMP #87159-6
DEC PT #12-13506-04
WITH 87027 CONTACTS MATE: AMP #87133-5

HEAT SINK:
/
3.0 (1.2) ABOVE
0.5(0.2) BE~OW /

...I

19)

II I I

13.18
(5 .•19)

10+ 12 POWER
3 GND CONNECTOR
5 +5
DRIVE 0

r(.48

12.122
(4.81)

DRIVE 1

,,.......=..:.~I:..::..:::~----r-I-...,

_ _ _ _ _ 14.61 _ _ _ _ _ _...
(5.75)
17.68

14---------{5.95)----------..
(.50)

14-_ _ _ _ _ _ _ _ _ 24.61 _ _ _ _ _ _ _ _ _

.48
(.19)
~--

.58

~~1 j-.74 (.23)

(9.69)

(.29)

26.52
14---------------(10.44)------------..
MEASUREMENTS ARE IN
CENTIMETERS EXCEPT VALUES IN
PARENTHESES ARE IN INCHES
MEASUREMENTS ARE±.013 (.005) CENTER TO
CENTER
MA-2370

Figure 4-6

Module Outline Drawing

4-7

Table 4-1

TU58 Module Connections

Wire-Wrap
Pins
WWl
150 Baud
WW2
300 Baud
WW3
600 Baud
WW4
1200 Baud
WW5
2400 Baud
WW6
4800 Baud
WW7
9600 Baud
WW8
19200 Baud
38400 Baud
WW9
WWI0
UART Receive Clock
WWll
U AR T Transmit Clock
WW12
Auxiliary A (to interface connector pin L)
WW13
Auxiliary B (to interface connector pin A)
WW14
WW15
WW16

Factory Test Point
GrOUnd}
Boot
Connect together for auto-boot on power-up.

WW17
WW18
WW19
WW20
WW21
WW22
WW23}
WW24

RS-423 Driver
RS-423 Common (Ground)
Transmit Line +
Transmit Line RS-422 Driver +
RS-422 Driver Receiver Series Resistor
(Jump for RS-422)

Serial Interface Connector
J2-10
J2-9
J2-8
J2-7
J2-6

Auxiliary B
Ground
Receive Line +
Receive Line Key (no connection)

J2-5
J2-4
J2-3
J2-2
J2-1

Ground
Transmit Line Transmit Line +
Ground
Auxiliary A

J3,4-9
J3,4-10
J3,4-11
J3,4-12
J3,4-13
J3,4-14
J3,4-15
J3A-16

LED
Head Shield Ground
Erase Return
Erase 1
Erase 0
Head Return
Head 0
Head 1

Power Input Connector
Jl-l
+12 V
JI-3
Ground
JI-5
+5 V
JI-6
Ground
Drive Cable
J3,4-1
Cart L
No Connection
J3,4-2
J3,4-3
Permit L
J3,4-4
Signal Ground
J3,4-5
Motor +
J3,4-6
Motor J3,4-7
+ 12 V
J3A-8
Tachometer
4-8

1200

4K
FT

300
M

1K
FT

150
M

500
FT

~~v~
0
~0,,~~

~ (('1-:

~«'()

CABLE
LENGTH
30

M
15

3
M

1\«'1-:

~Q~

100
FT

'10.

50
FT

10
FT

300

I I 2KI

600 1 K

I II

10K 20K 40K

DATA RATE IN BAUDS
RS-423

Figure 4-7

MA·2368

Data Rate and Cable Length for RS-423

4.3.1 Selecting Interface Standards
The serial interface operates on full-duplex, asynchronous 4-wire lines at rates from 150 baud to 38.4
kilobaud. The transmit and receive rates may be independently set. Each 8-bit byte is transmitted with
one start bit, one stop bit, and no parity. The line driver and receiver may be set to operate in accordance with EIA RS-422 balanced or RS-423 unbalanced signal standards. When set to RS-423, the
TU58 is compatible with devices complying with RS-232-C.
The TU58 is shipped prewired for operation at 38.4 kilobaud transmit and receive on RS-423. The
maximum wire length that may be used at that data rate in an electrically quiet environment like an
office is approximately 27 m (90 ft). The wire used with any installation should be no less than 24
AWG diameter.
Longer wire runs may be made if data rates are reduced. RS-422 is considerably more noise-immune
than RS-423 and can be used over at least 1200 m (4000 ft) at any TU58 data rate. Figure 4-7, derived
from the EIA standards, illustrates the variations in distance needed by RS-423 for different data rates.
For more information, consult the standards for RS-422 and RS-423 published by the Electronic
Industries Association.
4.3.2 Connecting Standard Jumpers
The jumper pins are standard 0.635 mm (0.025 in) wire-wrap posts which may be connected using 30
A WG wire and a hand tool. Other techniques that may be used include slip-on connectors such as
DEC H821 Grip Clips, 915 patchcords, 917 daisy-chain, or soldering.
The baud rates may be set independently for transmission and reception, or both can operate at the
same speed. Simply connect the pin with the desired baud value to either the XMIT or ReV pins or
both. Figure 4-8 illustrates the pin locations, and Figure 4-9 shows the factory-wired configuration.

4-9

LED

WW
TP +14
GNO+

028

~ ~ BOOaf.W

M
M

232117-19
423 18-20
422
21-19
22-20
23-24

WW
24

150+ WW
300+ 1
600+
1200+
2400+
4800+
9600+
19.2K+
38.4K+
RCV+CLK
XMIT+CLK
AUXA+
AUXB+ WW
13

~
M
N

++++++++
~

a: a: a: a: a:

00
Figure 4-8

Interface Selection Jumper Pin Locations

4-10

It)

a: a:

WW
17

It)
to N
'lit M
,.... ,....
,....
,....
,....

r-.

'lit
N

o
o
o
o

o
o

~o
o

oooo~
IIIIHM

I I I I I II
I

1-=1

II I

I I

n
I I

L-J

MA-2383

38.4 kbaud Rev + TRANS RS-423

Figure 4-9

Factory Wiring

The interface standards may be selected by connecting sets of pins together. The connections are listed
in abbreviated form in Figure 4-8. The group of pins 17 through 24 are the interface pins. The module
is shipped prewired for RS-423 with pin 17 connected to pin i9, and pin i8 connecied to pin 20. No
other pins in the group are connected.
For RS-422, pin 21 should be tied to pin 19, pin 22 to pin 20, and pin 23 to pin 24. No other pins in the
group are connected.

4.4 OPERATIONAL CHECKOUT
A confidence check of the operation of the newly installed TU58 may be performed through the
console or keyboard console emulator of a host system without the use of an operating system device
handler. The light on the TU58 module should be on, indicating a functional processor.
4.4.1 Checkout of Interface
To address the serial interface device registers with the console (consult the system manuals for address
and codes), perform the following steps.

1.
2.
3.
4.
5.

Set the transmit control status register to send Break to the TU58.
Remove the Break condition.
Transmit INIT: 04 (octal) to the TU58.
Transmit a second 04.
Examine the receive data buffer to find Continue: 20 (octal).

4-11

4.4.2

Checkout of RSP and Command Function

Insert a tape cartridge into drive 0 (left side) (The TU58 should have sent Continue (20 8)
already, as in Paragraph 4.4.l).

Transmit the following string of octal numbers to the TU58. (Consult the programming
chapter for an explanation of this format.)
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11
Byte 12
Byte 13
Byte 14

2
12
2
0
0
0
0
0
0
200
200
0
204
212

The TU 58 should wind to the beginning of the tape and read about half of the tape.

4-12

CHAPTER 5
OPTIONS

Options may be added to the TU58 to enhance its product performance. These additions are described
in this chapter.
5.1 RUN INDICATOR
Each tape drive may be modified to have an LED which lights to indicate tape motion. Since data loss
can occur if a cartridge is removed while the tape is being written, the cartridge should not be touched
if the light is on.
5.1.1 Installation
The LED (which may be any device capable of handling 30 rnA with a forward voltage less than 1.8 V)
is wired in series with the tachometer source LED. Splice the run LED into the wire from pin 7 of the
drive connector. (Count from the end with the missing pin. That pin is number 2.) The anode should be
on the module side of the wire (symbol arrow pointing away from pin 7). See Figure 5-1. The LED is
available from DEC as part number 11-10324, and wires with slip-on connectors are available to join
the LED to the tach (cable number 70-16526) and to extend the module connector end to the LED at
the front of the drive (cable number 70-16525).
5.2 BOOT SWITCH
Some applications use the TUS8 as a program loader. The intelligence of the TUS8 enables it to
perform a seek and read operation without processor commands. Pins are available on the controller
module which, when connected by the Boot switch, initiate the following actions.
I.

On power-up, the TU58 checks for the presence of the closed switch. It then delays 1 second
and begins the boot procedure.

When the TU58 is in the idle state, it monitors the Boot switch. Any switch contact openclose sequence causes a I-second delay (to allow for contact settling or to allow the host
processor to enter the halt mode), and then the TU58 begins the boot procedure.

The boot procedure positions the tape in drive 0 to block 0, sends Break to the host, and transfers
ASCII characters from the tape to the host in groups of seven. Each group is separated from the
adjacent groups by 15 character times (based on 9600 baud). The TU58 exits the boot mode following
the transfer of the terminating character ASCII G (1478) and enters the idle state. Because of the
timing requirement, only rates of 9600, 19.2, and 38.4 kilobaud may be used with boot.
Boot is intended for use with the LSI-II. The boot tape contents are formatted to appear to the LSI-II
as output from a console (keyboard) operating under the ODT keyboard interpreter. This means that
the TU58 must be located at the standard console address in the LSI-II bus. A keyboard cannot be
connected at the same time. This arrangement is useful in an unattended control system, where the
TU58 can automatically load and start or reload and restart an unsupervised process controller or
similar application. The Boot switch allows a reboot without powering down to cycle the automatic
sequence.
5-1

TO PIN 7

J3,J4
PIN 7
+12V

ADDED
LED

,-----,
I

PIN 8 - - - - - - - -.....
PIN 9 - - - - - - - - - - -.......
MA-2385

Figure 5-1 . Installation of Run Indicator

A utility program running under RT-ll will be available from DEC which will take a user program
that was developed under R T -11 and generate a boot tape containing that program, suitable for automatic loading.

NOTE
Boot mode does not work in any DEC operating system environment.
The boot pin on the module (WW 16) may be connected to ground (WW 15) through a normally closed
momentary action switch (Paragraph 4.4.2). Wires may be wire-wrapped, DEC Grip-Clipped, or soldered to the pins. Placement of the switch and lead dress are not critical if adequate clearance is
provided around moving parts of the drive and the heat sink and power resistors on the module.

5-2

CHAPTER 6
TECHNICAL DESCRIPTION

This chapter is designed to enable the reader to understand the TU58 drive and controller operating
principles. In some sections of the text, a simplified schematic or block diagram of a circuit illustrates a
concept. References to these figures are made in the text. Other parts of the text are intended to
highlight circuits in the Engineering Print Set, included at the end of this manual.
£ 1
U.I

DT or-v nT ... £""0 ... ,..,...
DLV,"-,ft. UIftUftftl..I

Figure 6-1 shows the signa! and control paths between the various elements of the TU58 and between
the TU58 and its internal microprocessor. This diagram illustrates the control the microprocessor has
over activities in the TU58.
6.1.1 Data Flow, Tape to Interface
Refer to Figure 6-2. The tape track is selected by signals from the I/O ports. Recorded data passes
through the selection circuits to the read amplifier. There the signal amplitude is adjusted to a standard
level by the automatic gain control (AGe) action of the circuit. The Gain Reduce signal allows detection of weak recordings. The slope changes of the sinusoidal signal are sensed by the peak detector that
produces a squarewave with a duty cycle similar to that of the original encoded data. The duty cycle is
decoded to data bits by an integrater in the bit detector that delivers the bits to the microprocessor
serial data input (SID) with a strobe signal from the peak detector.
The microprocessor deserializes the read data and stores it in the data buffer area of memory. After a
128 byte record has been stored, a checksum calculated from the read data is compared with the
checksum read from the tape. If they do not match, retries are attempted. Failure is indicated to the
host in an end packet. Success results in the transfer of the data, one byte at a time, to the interface. If
the unit has a parallel interface, the data is transferred eight bits at a time upon receipt of a strobe from
the host. If the unit has a serial interface, the data is loaded into a U ART and transmitted through line
drivers with one start bit and one stop bit. A charge pump supplies negative voltage for the bipolar
EIA line drivers since the power supply only produces positive voltages.
6.1.2 Data Flow, Interface to Tape
Data enters the interface and is latched (parallel) or deserialized and stored in a register (serial) (Figure
6-3). The microprocessor receives a ready signal from the interface and transfers the data to a buffer
area in memory. The data then reenters the microprocessor, is serialized, ratio-encoded, and sent to the
write circuit through the serial data output (SOD). When the write circuit interlock is released by the
cartridge-activated write permit switches on the drives, write current is delivered to the correct head
gap by selection circuits under microprocessor control. The erase circuit control logic is part of this
control loop.

6-1

1/0 PORTS
REGISTERS
TIMER

TIMER OUT
SEL 0
GAIN REDUCE

5
PORT C

TEST POINT 2

TEST POINT 1

2 -

DIAGNOSTIC LED

8155
E3

PORTB

BOOT

30 IPS

ERASE ENABLE

SELECT

READ
DATA

GAIN REDUCE

SELECT TRACK 0

SELECT DRIVE B

REVERSE

WRITE ENABLE

Iii
0
«
w

RUN

:::>

w
:!:

cc
a:

TRACK 0

DRIVE

TEST POINT 3

GAP
0

HEAD GAP
SELECTION
E35
(E33PAR)

WRITE CIRCUIT
& INTERLOCK
E6, 20*, 36, *E34
(l2, 3, 17
PAR

1
GAP
1

MARK

co
:::>

SELECT DR IVE B

REVERSE

01 RECTION CHANGE
E6, 8-10, 13

WRITE PERMIT
RUN
TIME
OUT
E20, 29

RUN TEST POINT

0\
I
N

:::>

WRITE ENABLE

RUN

BOOT SWITCH

ERASE
ENABLE

-l
W
Vl

.;.;..;:,.:....:;..;,,;,c:..;"-----tl>! DRIVE SELECTION (A, B) &

CARTRIDGE
WRITE PERMIT
SWITCHES

DRIVE

ERASE
CIRCUIT,
E6, 13, 26, 27
04

READ STROBE

05-16
OVER
CURRENT
DRIVE LIMIT
E15

TRANSIENT SUPRESSION

VELOCITY TEST POINT+-------.
PORT A

TACH
{
SIGNALS
FROM
DRIVES

A CARTRIDGE
B CARTRIDGE--

VELOCITY
CONTROL
E14, 15,21

30 IPS

BUS

CLOCK

VELOCITY
CLOCK
VELOCITY
CHANGE
E7, 12,19

TRAP H

READ STROBE

INTERFACE

CLOCK
.r-_W_R_IT_E_D_A_T_A______________________________
......- - - r - -.....

.._ _

L.----B-U-S----------------------------------~ r:.~~~~ ~_AT_~_~_~_~_~_~ ~

Figure 6-1 TU 58 Block Diagram

E 16, 17, 23, 24,
25,31,3.2 ____

I/O PORTS
REGISTERS
TIMER

PORTC

TIMER OUT

r--~;::::::::::::::::::::::::::::::::::------~--------~~~
SELO

TEST POINT 2

TEST POINT 1

PEAK

DIAGNOSTIC LED

8155
E3

TEST POINT 3

800T

I-

::>
0
Ct:

w
:;

0"1
I

w
eo

!ii
0

& INTERLOCK
E6, 20", 36, *E34
02,3,17
PAR

DRIVE
1

<I:

GAP

Ct:

CARTRIDGE
WRITE PERMIT
SWITCHES
.

ERASE
ENABLE

<I:

WRITE DATA
WRITE ENABLE

Z
::>
Ct:

SELECT DRIVE B

WRITE PERMIT

r;~I~~EJ

~~20':29
RUN

.. RUN TEST

ERASE
CIRCUIT
E6, 13, 26, 27
04

...J

REVERSE

Ct:

TRACK 0

r,WWRRT-ITnE:C~IRUC~U~IT~~~W~R~IT~E~-----_----------------~~~
HEAD GAP
SELECTION
r::=I-----1 E35
GAP (E33 PAR)

READ
DATA

E4,21 ,22,29,30

'-------

DRIVE
0

~=:I----l

PORT B

~;~ECTOlt1 ~:;rTECTOR

SELECT

POINT~

{=DE

eo
Z

::>
Ct:

DRIVE SELECTION (A, B) &
DIRECTION CHANGE
E6, 8-10, 13
05-16

OVER
CURRENT
DRIVE LIMIT
E15

TRANSIENT SUPRESSION

VELOCITY TEST POINT_

PORT A

~~CNHALS
FROM
DRIVES

30 IPS

CLOCK

LOCITY
SENSIf\IG
E15

VELOCITY
CONTROL
E14, 15,21

VELOCITY
CLOCK
VELOCITY
CHANGE
E7, 12, 19

r-----------. HOST
PARALLEL
INTERFACE
E 16, 17, 23, 24,
25, 31, 32

JlP

MA-2735

Figure 6-2 Data Flow, Tape To Interface

TIMER OUT
SEL 0
r,AIN REDUCE

READ STROBE
I

PORT C

TEST POINT 2

TEST POINT 1

SELECT

READ
DATA

TRACK 0

DIAGNOSTIC LED

8155
E3

TEST POINT 3

BOOT

DRIVE
0

PORT B-

I-

:::>

HEAD GAP
SELECTION
r:;='----I E35
GAP (E33 PAR)

0::

t:i

<J::

0::

DRIVE
GAP
1

RITE
WRITE CIRCUIT
WRITE DATA
& INTERLOCK
E6, 20*, 36, *E34 ....jiIiioRiioIT_EIioiii
Eiii
N.A.Bii
L..
E
02,3,17
PAR

CARTRIDGE
WRITE PERMIT
SWITCHES

WRITE PERMIT

RUN

RUN
TIME
OUT
E20, 29

RUN TEST POINT

<J::

Z
:::>

:::>

0::

SELECT DRIVE B
REVERSE

ERASE
ENABLE

....J

~=I---I

ERASE
CIRCUIT
E6, 13, 26, 27
04

0::

DRIVE SELECTION (A, B) &
DIRECTION CHANGE
E6, 8-10,13
05-16

OVER
CURRENT
DRIVE LIMIT
E15

TRANSIENT SUPRESSION

VELOCITY TEST POINT_--~
VELOCITY
CONTROL
E14, 15,21

PORT A-

30 IPS

CLOCK

VELOCITY
CLOCK
VELOCITY
CHANGE
E7, 12, 19

FROM
HOST
8085
PARALLEL
INTERFACE
E16, 17,23,24,
25, 31, 32

!1 P

MA-2736

Figure 6-3 Data Flow, Interface To Tape

6.1.3 Tape Motion Control
Refer to Figure 6-4. Tape is protected from unspooling under fault conditions by a run timeout circuit.
Regular RUN pulses from the microprocessor keep the run timeout disengaged. Microprocessor signals control the direction and drive selection gates to channel power to the correct drive transistors.
No operations can occur unless the cartridge-in-place switch on the desired drive is engaged. The
amplitude of applied motor current is regulated by a velocity control servo that senses the pulse rate
from a tachometer mounted on each drive. Speeds are selected by a microprocessor-controlled velocity
.change circuit that controls the clock to the velocity sensing circuit. A motor over-current drive limiter
keeps the maximum current to a safe value, even under stall conditions. A mark finder circuit locates
specially encoded signal bursts on the tape to allow positioning of the tape at high speed. The microprocessor counts these interrecord marks as they pass by.
6.2

VELOCITY CONTROL

6.2.1 Velocity Sensing
Each motor has a LED lamp focussed on a phototransistor through a slotted disk on the motor shaft.
(Only the activated drive delivers a tachometer signal.) This optical tachometer output is amplified and
shaped
by a1 ___
comparator
to
produce a pulse rate proportional
to the shaft speed
of the motor. The
L __
L"____ LL _
_ _ L: __ 1 L __ L ____ L __ __ :_L _
__ 10 L:L _L:L"L ___ :_L __
'T"L _ _ 1 __ 1- L" __ LL _ _ L:L"L
L"L" ___ ..J

___

UUIH;n;u PUISCS 11Ulll tUC UPU\';;(t1 t(t\,;;HUHICtCI gu llilU (tIl

IO-Uil SHUt ICgISlt;I.

lIlt; \,;;IU\,;;l\. lUI

tIlt; SHUt

register is selected to give a quarter-period delay to the pulses at the desired shaft speed. The delayed
and un delayed pulses are then exclusive-ORed to yield a pulse width modulated representation of the
actual velocity. Modulation occurs because the shift-register delay, a fixed amount of time, is a different fraction of a period for different tachometer frequencies. Therefore, the amount of overlap varies
between delayed and un delayed waves. The overlap is extracted by the exclusive-OR gate, averaged to
a dc level by a capacitor, and buffered by an operational amplifier (op amp).
6.2.2 Velocity Servo
The quarter-period overlap at the desired shaft speed produces a 50 percent duty cycle output into the
averaging capacitor. This puts the desired speed in the middle of a linear dc level versus speed curve at
the op amp input. For an underspeed condition, the motor is accelerated to the correct speed, while for
an overspeed, power is reduced and the motor coasts down.
6.2.3 Velocity Change
The velocity clock signal that drives the shift register is generated by a programmable divider from the
microprocessor clock. A flip-flop and a gate (controlled by the 30 IPS signal from the microprocessor)
produce pulses divided by 2 or 4. They receive their inputs from a fixed divider that also supplies the
charge pump and U ART. The resulting velocity control frequencies are 1/8 microprocessor clock for
60 in/s and 1/16 microprocessor clock for 30 in/so The output goes to the shift register in the sensing
circuit.
6.2.4 Drive Selection and Direction Change
Only two microprocessor signals are required to control drive selection and direction. When the signals are not asserted, drive A is selected in the forward direction. When RUN L, common to both
drives, is asserted, SEL DRV B L signal gating directs the run signal to a pair of gate/drivers associated with the power switch section of each drive bridge. REVERSE H signal gating selects the
gate/driver for the appropriate direction and also selects the paths for the velocity servo output to get
to the correct motor control transistors. The simplified circuit in Figure 6-5 shows the current path for
the forward direction.

6-5

TIMER OUT
SEL 0
5

PORTC

TEST POINT 2

TEST POINT 1

SELECT

READ
DATA

TRACK 0

DIAGNOSTIC LED

8155
E3

TEST POINT 3

BOOT

DRIVE
0

30 IPS

~=I---.-I

SELECT TRACK 0

PORT B-

SELECT DRIVE B
REVERSE

I-

::>

a::

::2:

i=
RUN
MARK
BOOT SWITCH

UJ
ID

GAP

a::
en

a::

HEAD GAP
SELECTION
E35
(E33 PAR)

WRITE CIRCUIT
& INTERLOCK
E6, 20', 36, *E34
02,3,17
PAR

DRIVE
1
GAP

WRITE
WRITE DATA
WRITE ENABLE
SELECT DRIVE B
REVERSE

.......liiIioiiiioo._ _. .~ DRIVE SELECTION (A, B) &

I-

ERASE
ENABLE

...J

ERASE ENABl.E
GAIN REDUCE

ERASE
CIRCUIT
E6, 13, 26, 27
04

CARTRIDGE
WRITE PERMIT
SWITCHES

DIRECTION CHANGE
E6, 8·10, 13

WRITE PERMIT

RUN

RUN
TIME
OUT
E20, 29

RUN TEST POINT

05·16
OVER
CURRENT
DRIVE LIMIT
E15

TRANSI ENT SUPRESSION

VELOCITY TEST POIN'f.~I--. .

0\
I
0\

PORT A-

VELOCITY
CONTROL
E14, 15,21

A CARTRIDGE

30 IPS

CLOCK

VELOCITY
CLOCK
VELOCITY
CHANGE
E7, 12, 19

TRAP H
READ STROBE

READ DATA
PARALLEL
INTERFACE
E16, 17,23,24,
25,31,32

WRITE DATA
CLOCK
~_~.

\S-____________________________________________________B_U_S______________________________________________

Figure 6-4 Tape Motion Control

FOWARD/
REVERSE
GATING

>--

+12V

1\
---'

I.
~

FORWARD
POWER
SWITCH

REVERSE
POWER
SWITCH

f4-

I
L__ ~
+

~--l

II
!I
:I

FORWARD
SPEED
CONTROL

REVERSE
SPEED
CONTROL

I
14-~

TACH
SIGNAL
FORWARD/
REVERSE
GATING

MA-2669

Figure 6-5 Motor Bridge
6.2.5 Microprocessor Velocity Control
Since the power supply for the motor is unipolar the motor polarity must be changed to reverse
direction. The microprocessor switches the polarity of the motor in the drive bridge at appropriate
times to stop or reverse the tape motion with full power. Once power to the motor has been reversed,
the microprocessor monitors velocity by comparing the pulse rate from the velocity test point with an
internal timing reference set by firmware. When the shaft pulse interval is longer than the reference

6-7

60--l'~--~

VELOCITY

T---+

+
MOTOR
CURRENT

SPEED CHANGE

VELOCITY TEST POINT
INTERVAL EXCEEDS
~P REFERENCE TIME;
POWER IS TURNED OFF.

SEEK

60-+-----.
READ

30
VELOCITY I---------I~---_t_--

-30

-60~

REVERSE

+
MOTOR
CURRENT

...

DIRECTION
AND VELOCITY CHANGES

STOP
MA-2670

Figure 6-6.Velocity Change Waveforms
time, the microprocessor turns off the motor or changes the velocity setting. If direction change is in
progress, deceleration power is first applied at the 60 in/s value until the tape is stopped. Then the tape
is started forward at the 30 in/s value. The test point signal is ignored after power reduction and the
servo is relied on to correct any velocity overshoot that occurs. The graphs in Figure 6-6 illustrate the
drive levels at various stages during velocity changes.

6-8

+12

+5
.1 B

(RUN H)

RUN L

LJL

5M6

TO RUN TEST POINT
>--+--AND DRIVE CONTROLS

MA-2674

Figure 6-7 Run Timer Simplified Schematic
6.2.6 Run Timeout
The motor control circuit employs a 400 ms timeout circuit to prevent the tape from unspooling in the
cartridge because of a hardware failure. The microprocessor pulses the RUN L signal high every time
it sees an interrecord mark. If the RUN L signal is not pulsed for 400 ms, the timeout circuit stops the
tape.
Figure 6-7 is a simplified schematic of the run timer. When the RUN signal arrives at inverter E20
containing the transistor, point A steps up to + 12 Y from ground. The charge at point B then wants to
redistribute to accommodate the new equilibrium value. The high resistance in the B side of the circuit
prevents an immediate current flow and so there is a potential present at B. Since charge has flowed
into A, current wants to flow out at B; therefore the potential at B has the same polarity as A. This
positive signal switches the comparator to run the motor. The charge at B slowly drains through the
5.6 megohm resistor, lowering the potential at the comparator. If a resetting pulse does not occur,
point B descends to ground and the comparator switches off. The reset pulse grounds point A through
the transistor in inverter E20 and grounds point B through diode D8. The bandwidth of the comparator is narrow so the reset pulse does not get through to the motor. The rising part of the reset pulse
arrives quickly. This step is the same as the step at the beginning of this description.
6.2.7 Motor Overcurrent Drive Limit
A comparator senses the motor current through a 0.2 ohm resistor. While the current is less than 0.75
A, the comparator output is high, reverse-biasing D9, and has no effect. If the current exceeds 0.75 A,
the comparator output goes low, forward-biasing D9 and pulling the noninverting input of the servo
amplifier low. This causes the servo amplifier to reduce motor drive as if the velocity was too high.
6.2.8 Transient Suppression
Inductive spikes and surges from the motor are dumped through the diodes into the power supply. The
capacitor suppresses high frequency noises caused by the motor commutators.
6.3 HEAD SELECTION
The read/write heads are selected by signals from the microprocessor. The microprocessor generates a
SEL DRY B signal to choose the head. The gap for track 0 or track 1 is chosen by SEL 0 H from the
microprocessor. The selected head gap is connected to the read and write circuitry through a dual 4 to
1 multiplexing analog switch IC. The IC's dual circuits are paralleled to minimize series resistance in
the low impedance write driver circuit. The common taps of both heads are connected together, so
only one lead per gap needs to be switched.
6.4 WRITE CIRCUIT AND INTERLOCK
The write drivers are two transistors (Q2, Q3) arranged as a constant current source and sink operating
at 7.5 rnA. They use tristate buffers as data-gated switches and return paths. Writing is gate-interlocked by the mechanical interlock on the cartridge in the drive being selected. Also, the micro-

6-9

processor tests the mechanical switch for the Write Permit signal before turning on write current.
Attempting to write while the cartridge is write-protected results in an error report to the host. The
microprocessor Write Enable signal turns the write current on and off at the proper times. In the
absence of write enabling, the tristate outputs become open-circuited and source and sink transistors
Q2 and Q3 are biased off.
6.5 ERASE CIRCUIT
Erase gaps are selected by the same pair of signals that select read/write gaps. They are also enabled by
ERASE ENA L. A 26 rnA current source supplies the erase gaps in common. Current through the
desired gap is passed to ground through a peripheral driver (high current capacity) gate which is part
of a decoder for the control signals. A diode across each erase head winding clamps the inductive
voltage spike when the erase current is turned off.
6.6

DATA ENCODING AND DETECTION

6.6.1 Encoding
Data is recorded on tape using the ratio encoding method. Each data bit is given a cell with room for
three flux reversals. After an initial positive transition, only one of the remaining reversal positions is
used. If the rev~rsal occurs in the first available position, the bit is a zero. If it occurs in the second
position, the bit is a one. These position shifts correspond to duty cycles or ratios of 1/3 and 2/3
(Figure 6-8a). To compensate for waveform distortion in the recording process, the actual write encoding rati9 is 1/4 to 3/4.

RECORD
HEAD
CURRENT

a
I

11
I

1111
I
I

1
I

+V~I

1,6.

RECOVERY
OV
-V

I
I

'\J

b
MA-2675

Figure 6-8 Data Encoding and Decoding
6.6.2 Detection
The beginning of a bit cell is defined by a positive peak at the read amplifier. The second flux reversal is
defined by the next negative peak. The peaks are detected by a comparator.
The read amplifier output is fed to one input of the comparator. The same signal is phase-shifted and
fed to the other input. The output is high for a positive slope input and low for a negative slope input.
A small amount of hysteresis is added to prevent oscillation at the zero slope point.
The output of the comparator has a duty cycle similar to that of the original encoded signal. The data
are recovered using an integrater as shown in Figure 6-8b. The integrater is discharged by an analog
switch on the positive edge of the data waveform. The integrater is sampled by a flip-flop on the next
rising edge. If the integrater is positive at sample time, the recorded bit was one. If the integrater is
negative at sample time, the bit was a zero.
Decoded data is delivered to the serial data input (SID) on the 8085 microprocessor, while a strobe
signal corresponding to the moment of integrater sampling triggers an interrupt to get the microprocessor to store the data hit in a register.
6-10

+
MAX CURRENT=
MAX GAIN
MIN RDIODE

AGC
BIAS DIVIDER

GAIN REDUCE L

HEAD

>-~--~--------~-----'OUT

MA-3814

Figure 6-9 Read Amplifier and Automatic Gain Control
6.7 READ AMPLIFIER AND AUTOMATIC GAIN CONTROL
An op amp amplifies the signals coming from the selected head. Automatic gain control (AGC) maintains a constant output to following stages in the presence of large variations in output from the tape
because of worn tape or recording variations (Figure 6-9).
To produce the AGC signal, a capacitor couples some of the op amp's output to a diode which rectifies
the signal. The dc output from the diode, representing the read signal amplitude, controls the current
through a transistor. Increasing the read signal biases off the transistor, decreasing the current. Other
inputs to the transistor are: (l) a resistive divider that sets the steady-state value of bias and therefore
current; and (2) the GAIN REDUCE L signal from the microprocessor. GAIN REDUCE controls an
open-collector inverter that normally shorts a bias resistor to ground. GAIN REDUCE L cuts off the
inverter so that the bias shifts to reduce the current through the transistor. The transistor's current is
the AGC signal. If the gate switches on, shorting the resistor, the bias shifts to reduce the steady-state
current through the transistor.
The op amp gain is set by a negative feedback loop composed of two resistors and a coupling capacitor, a diode, and a resistor to ground. This diode is forward-biased by the AGC current. When a small
signal is applied to a forward-biased diode, the diode acts as if it is a resistor. The value of the diode's
resistance is determined by the AGC current applied to it. In this circuit, the resistance of the diode
forms a divider with feedback resistor 2. If the op amp output signal increases, the AGC transistor's
bias and thus current decreases, the resistance of the diode increases, the feedback to the op amp
increases, and thus the gain decreases to lower the output signal to the desired set point. GAIN
REDUCE changes the bias on the AGC transistor to change the set point. It ensures that the data is
free of dropouts.
6-11

+12 VOLTS

1- }
~

~ }12V

l..+
12V-

T-

+12

\
I-+-If--"-~~--r-~ -

VO L TS

b.
MA-2671

Figure 6-10 Simplified Charge Pump
6.8 CHARGE PUMP
The principle behind the operation of the charge pump is that of charge storage in a capacitor. This is
illustrated by the simplified example in Figure 6-10a. Assume that a capacitor is connected between a
positive charge source, e.g., + 12 V and ground. Electrons will accumulate at the grounded end. If the
capacitor is disconnected from the source and ground, it still has 12 V across it, because the electron
charge accumulated may not move. If the original positive end is connected to ground, the 12 V
extends its polarity below ground because now there is an excess of electrons relative to ground. This
negative potential is available to do work at a rate subject to the charge capacity of the storage element
(capacitor).
In the actual circuit (Figure 6-10b), one end of the capacitor is switched alternately from + 12 V to
ground through a totem pole pair of transistors in E32. The other end is switched by diodes either to
ground <?r to a filter and the load. The transistors of E32 are driven by a 500 KHz clock from a divider
in the CPU system.
6.9 MARK FINDER
A specially encoded signal is recorded on the DECtape II as part of the formatting operation. The
signal is recorded at one quarter of the normal bit density and is located at the beginning and end of
the tape (BOT and EOT) and also between each of the formatted records. The signal is called a mark
and indicates the location of the beginning of each record header. This allows the microprocessor to
count the passage of records past the head at winding speed, and alerts the microprocessor when the
tape enters the BOT or EOT regions. Header marks and BOT -EOT marks are distinguished by different bit patterns. BOT is all zeros, EOT is all ones, and the header mark alternates ones and zeros. The
mark is detected by a circuit that detects the lower bit density of the mark compared with normal data.
The microprocessor sets up the timer in the 8155 (Paragraph 6.12) to provide a clock to the mark
finder. The clock is chosen to allow the MARK H output to be set while the pulse rate coming in
through the read strobe input is lower than that of the timer. MARK H appears at an input port that is
examined by the mark-detecting routine in the microprocessor.

6-12

At the same time the mark is being detected because of its density, the data in it is being decoded by the
data separator and delivered to the serial input on the microprocessor where its function is determined
to be that of header, BOT or EOT mark. The microprocessor can detect BOT and EOT by the bit
patterns alone.

6.10 INTERFACES
6.10.1

Serial Interface

Data moves within the TU58 microprocessor on an 8-bit parallel bus. Data is transferred between the
TU58 and the host computer through a full duplex asynchronous serial interface that uses one signal
loop (conductor pair) for each direction. The univer.sal asynchronous receiver/transmitter (UART)
performs the parallel to serial and serial to parallel conversions that make the economy of wire possible. The UART, a single IC, contains circuitry allowing wired programming of its conversion format,
plus microprocessor bus protocol management, and the capability to detect conversion and timing
errors.
The rate at which the bits of each data byte are sent or accepted is determined by the rate of the clock
driving the transmit and receive shift register serializer /deseria!izers. This particular U/~·.. RT allows
different clock rates for each function, although they are usually the same. The clock is derived from
the microprocessor clock and is divided down by a series of gates in a divider IC. Each stage output
from the divider is available at a pin on the module and can be tied to the RCV or TRANS pins, the
U AR T clock inputs, to set those rates.
The UART inputs and outputs are all at TTL levels, and the serial signals need an interface to the long
wires connecting the TU58 to the host. Two line driver ICs and one line receiver are available for
connection to the lines. Different jumper configurations on the module allow the interface to operate
in accordance with RS-422, a unipolar differential TTL signal standard, or according to RS-423, which
references a ± 3 V bipolar signal to ground. RS-423 is more commonly used because it can operate (at
appropriate baud rates) with devices using the older, slower RS-232-C. RS-422 is more noise-immune
and can be used over very iong distances at high baud rates.
The paralle1.side of the UART is connected to the 8-bit data/address bus. Loading and unloading the
U ART transmit and receive registers is performed by a set of signals from the 8085 that are timed to
allow only data to be moved from or to the time-multiplexed bus. These signals are read and write
control signals, plus a signal that selects between I/O (input/output) and memory, and one address bit.
The I/O signal, in conjunction with the A3 address bit, allows the UART to be written or read as ifit
were a memory location. The address bit distinguishes the UART's I/O address from the 3-bit addresses of the 8155 ports and registers (Paragraph 6.12).

6.10.2

Parallel Interface

The parallel version of the TU58 is identical to the serial version except for the interface section. The
UART, baud rate divider, and line driver ICs are replaced by a pair of 8-bit tristate latches that buffer
and isolate incoming and outgoing signals from the 8085 data bus. This arrangement is intended for
short distances between the TU58 and the host.

6.11

MICROPROCESSOR AND MEMORY

All TU58 activities are supervised or directly controlled by an 8085 microprocessor. The microprocessor operates with firmware stored in a 2K x 8 read only memory (ROM). Scratchpad memory
for the microprocessor computations, and a 128-byte buffer for data coming from the host are located
in a 256 x 8 random access memory (RAM). The RAM IC also contains other functions described in
Paragraph 6.12.

6-13

6.11.1

Memory and Bus Operation

The microprocessor uses a partially multiplexed bus for the transmission of data and addresses. Sixteen address bits are used. The lower eight bits share the bus with the 8-bit data in the system. To
maintain proper addressing of the memories while data is being transferred, the lower eight address
bits must be latched into the memory address inputs. The ROM utilizes a separate latching IC to hold
the address, and the RAM has an appropriate latch built in. Both latches are loaded when a signal
from the 8085 called Address Latch Enable (ALE) appears briefly while an address is present on the
bus. Once the memory is addressed, the bus is cleared of address information, and if the 8085 is
reading, a read signal (RD L) is sent and a data byte is presented to the bus from the accessed location.
If the 8085 is writing into memory, a write signal (WR L) is sent to the RAM and the data on the bus is
stored in the accessed location.

6.11.2

Trap and Restarts

Two kinds of messages activate the performance of firmware routines in the microprocessor. One
group of instructions is delivered through the data bus and is formulated according to the radial serial
protocol. These instructions will be discussed later. The other messages are hardware signals that are
connected directly to pins on the microprocessor IC. There are four of these signals generated by
specific conditions in the TU58. They cause interrupts in the microprocessor, with program jumps to
locations pointed to by vectors inherent in the microprocessor hardware.
The highest priority interrupt is made by the TRAP H signal; this comes from the framing error (FE)
signal at the U ART. The framing error is set when the host sends Break, and the trap interrupt is
forced into action regardless of the state of the microprocessor. The trap interrupt service routine
performs the initialization required for restoration and synchronization of the interface protocol.
The other three interrupt inputs on the microprocessor are called restarts (RST). (The numbers associated with the input names are related to the vecto"red addresses.) Each input is triggered by a particular
event in the TU58. RST 5.5 is set when the UART transmit buffer is empty and ready for a new
character to .send. R$T 6.5 informs the microprocessor that a character has been received from the
host and should be read out of the receive buffer. RST 7.5 is synchronized with the tape head data
decoding circuitry and causes the microprocessor to read in a single bit of data into its seriai data input
(SID, Paragraph 6.11.3). The restart interrupts can be individually disabled by a firmware instruction.
This is done, for example, to cause the microprocessor to ignore serial data from the tape while it is
counting marks in fast wind.

6.11.3

SID, SOD, and Data Encoding

Data moves on and off the tape in bit-serial form. The 8085 has ports and special instructions to
transfer bits in and out of a microprocessor register that rotates the bits as a shift register. This rotation
performs serialization or deserialization of data under control for firmware that is timed by the read
strobe for serial input, or by timing loops for serial output. Data recorded on the tape is encoded by its
high to low time ratio, so the serial data output (SOD) is set high or low for appropriate periods by the
firmware loops. The SOD is high for one third of each bit time if the bit is a zero, and for two thirds of
each bit time for a one (Paragraph 6.6).

6.11.4

Clock

The 8085 contains all the circuitry required to operate a clock oscillator with an external crystal. The
crystal frequency was chosen, within the constraint of proper microprocessor operation, to give an
output that could be evenly divided down to the values required by the UART to generate its standard
baud rates. The clock output of the 8085, which is used by the velocity servo, timer, and charge pump
as well as the UART, is one-half the crystal oscillator frequency.

6.11.5

Reset

Reset is a hardware function in the 8085 that sets the program counter to zero. It is implemented in the
TUS8 by a circuit derived from the two power supply voltages on the module. If either supply fails to
6-14

come up, the microprocessor is held in the reset state. If the supplies settle normally, the capacitor at
the reset input charges up a few moments later and the microprocessor is released to perform its
power-up routine starting at location 0 in memory.
6.12 8155 I/O PORTS, REGISTERS, AND TIMER
The 8155 is a multipurpose IC used in the TU58 to simplify the circuit and conserve board space. Its
function as a 256-byte RAM is discussed in Paragraph 6.11.1.
6.12.1 I/O Ports
The I/0 ports provide most of the communication paths between the microprocessor and the TU58
hardware. Port A provides the inputs for the various status signals from the mechanism, such as
cartridge present and write permit. Port B delivers control signals to the system, such as velocity and
direction commands. Port C controls the self-test indicator lamp and causes the interface to the host to
transmit Break as a part of the boot sequence (Paragraph 5.2).
Port C also carries three signals useful for module testing. Test Point 1 (pin 1) pulses high when the
header of a sought record is successfully read (confirmed by the record number complement). Test
Point 2 (pin 2) pulses high each time the header of any record is unsuccessfully read. Test Point 3 (pin
38) pulses high after a record of data is read but fails the checksum test.
6.12.2 Registers and Timer
The 8155 registers control the operation of the I/0 ports and timer. The registers are addressed as I/0
locations like the ports. The control/status register defines the ports as inputs or outputs and sets the
timer start and stop characteristics. The timer registers define the cycle characteristics and load the
value required to generate the desired pulse interval with the system clock at the timer's clock input. A
14-bit counter, parallel-loaded by the registers, provides the timer function.

6.13 FIRMWARE
The TU58 operates under control of a microprocessor whose instructions are stored in a ROM. These
instructions, called firmware, define the functions and capabilities of the TU58 as an integral part of
the mechanism. This section describes a few of the basic firmware sequences that are part of normal
TU58 operation. No extensive coverage is attempted because firmware problems cannot be repaired in
any direct way. The self-test checks for proper contents in the ROM and halts the process'or if a fault is
detected. The self-test checks other things as well but does not isolate the problem to a particular
component. Field repair is the replacement of the module.
6.13.1 Initialization and Radial Serial Protocol
Initialization occurs at power-up, on errors, and on receipt of the Init command from the host. Figure
6-11 shows the interchange that occurs at this time. IDLE is a firmware routine that waits for incoming
characters and delegates other routines to handle the data according to its contents.
The radial serial protocol (RSP), described in Chapter 3, is the system that defines the meaning of each
character byte as it comes from or is sent to the host.
6.13.1.1 Flag Byte, Byte Count, and Checksum - The first character in a message packet is the flag
byte that tells the microprocessor whether to store the incoming bytes in sequential, labeled command
byte locations, or in the general purpose, 128-byte data buffer. The second byte, the byte count, is
stored and decremented with the arrival of each successive character. Another location stores an accumulating 16-bit checksum of the bytes. When the byte count is decremented to zero, there are two
bytes still to arrive from the message packet. These are the packet's checksum and are compared with
the newly calculated value; a match assures that an accurate transmission occurred.
6-15

HOST

TU58

POWER-ON RESET (OR ERROR)
INITIALIZE
__________ SEND INITS CONTINUOUSLY
~
UNTIL BREAK IS RECEIVED
RECOGNIZE INIT - - - - - .
SEND BREAK
RECEIVE BREAK
WAIT FOR INIT

SEND INIT ----. RECEIVE FIRST CHARACTER
AND DISCARD
SEND INIT-

.. RECEIVE SECOND CHARACTER
REINITIALIZE
SEND CONTINUE AND
LOOP IN IDLE

RECEIVE CONTINUE
/
SEND MESSAGE PACKET ~
FLAG BYTE
RECEIVE FLAG BYTE
TEST FOR COMMAND OR DATA.
IF COMMAND, STORE MESSAGE
BYTES IN LABELED LOCATIONS.
IF DATA, STORE MESSAGE BYTES
IN DATA BUFFER.

PERFORM INSTRUCTIONS. IF
DATA IS COMING FROM HOST,
SEND CONTINUE AS REQUIRED.

Figure 6-11 Host-TU58 Power-up Interchange

6-16

MA-2673

6.13.1.2 OP. Code and Sp~cifications - I~ an RSP command packet, the third byte to arrive is the op
code. (opera~Ion ~ode). ThIs number desIgnates the function to be performed. The following bytes:
modIfier, umt (dnve) number, byte count, and block number make up a complete specification of the
sequence of operations to follow. The sequence number and certain op codes in the RSP are not used
by the TU58. The byte count is stored and decremented to allow,the TU58 to keep track of the number
of bytes transferred to or from the tape during the operation.

6.13.1.3 Data Packets -If the flag byte of the message packet indicates that the contents are data, the
bytes are stored in the data buffer. The byte count then indicates the last data byte before the check':'
sum. The last two bytes are compared with a newly calculated checksum to confirm proper data
transmission. (The same checking process occurs when data is read off the tape and temporarily stored
in the data buffer. In that case the byte count is fixed at 128, the length of a tape record.)

6.13.2 Command Operations
The read and write commands activate the tape transport and utilize all of the TUS8's systems. The
position command is the basis for all tape motion and uses the read circuitry. Position is flowcharted in
Figure 6-12. If the tape has already been involved in positioning operations, the current position
calculates the distance to the desired block and the tape winds past the appropriate number of marks
to the new location. If the tape is newly inserted, it is assumed to be at the desired location. The tape is
backed up two records and the record number is read. If the position is not correct, the distance to the
correct location is calculated from the current position. If the location is at one end of the tape or the
other, the EOT or BOT marks will be detected while the tape is moving and the tape will be reversed
and slowed to read the current position.
The read command positions the tape at the first record of the requested block and then transfers data
to the buffer. After each 128-byte record, the checksum is checked. If there is a discrepancy, the tape is
backed up and re-read up to eight times, until the checksums match. If there is no match, a hard data
error is reported to the host and the operation is cancelled. Otherwise, reads continue on successive
(interleaved) records, with record numbers checked as they go by, until the byte count is met.
The write command positions the tape at the first record of the requested block and transfers data to
the interleaved records until the byte count is met. If the byte count does not fill a block, the block is
zero-filled.
Diagnose, a routine automatically performed at power-up, may be run at anytime. It is a confidence
check of the microprocessor system. It turns the indicator light off and checks the firmware ROM by
calculating a checksum for all data in the ROM and comparing it with a stored value. The RAM is
checked by having each location written in and read out with a test pattern. If the tests are passed, the
light is turned back on.
The hardware reset that occurs at power-up turns the indicator light off directly at the I/O port, so if
the light is on, the microprocessor is most likely operating successfully and performing its programmed
functions.

6-17

POSITION

SET CURRENT
POSITION
EQUAL TO SEARCH
POSITION

YES

x = CURRENT POSSEARCH pas + 2
WIND REVERSE X
RECORDS AT 60 IPS
YES
CHECK MARKS FOR
EDT/BOT WHILE
WINDING

x = SEARCH POSCURRENT pas - 2
NO

WIND FORWARD X
RECORDS AT 60 IPS

CHECK MARKS FOR
EDT/BOT WHILE
WINDING

MOVE FORWARD
AT 30 IPS