Digital PDFs
Documents
Guest
Register
Log In
EK-0KL20-IN-1
August 1978
191 pages
Original
7.5MB
view
download
OCR Version
6.6MB
view
download
Document:
KL10-Based DECSYSTEM-20 Installation Manual
Order Number:
EK-0KL20-IN
Revision:
1
Pages:
191
Original Filename:
OCR Text
KL10-Based DECSYSTEM-20 Installation Manual digital equipment corporation ® marlboro, massachusetts EK-OKL20-IN-001 KL10-Based DECSYSTEM-20 Installation Manual digital equipment corporation ® marlboro, massachusetts 1st Edition, August 1978 The drawings and specifications herein are the property of Digital Equipment Corporation and shall not be reproduced or copied or used in whole or in part as the basis for the manufacture or sale of equipment described herein without written permission. Copyright © 1978 by Digital Equipment Corporation The material in this manual is for informational purposes and is subject to change without notice. Digital Equipment Corporation assumes no re- sponsibility for any errors which may appear in this manual. Printed in U.S.A. This document was set on DIGITAL’s DECset-8000 computerized typesetting system. The following are trademarks of Digital Equipment Corporation, Maynard, Massachusetts: DIGITAL DEC PDP DECUS UNIBUS DECsystem-10 DECSYSTEM-20 DIBOL EDUSYSTEM VAX VMS MASSBUS OMNIBUS 0S/8 RSTS RSX IAS CONTENTS Page CHAPTER 1 INTRODUCTION CHAPTER 2 DECSYSTEM-20 INSTALLATION PLAN 2.1 INTRODUCGTION .....ocoei et tiiii eee et e e iniii e iiee 2-1 et 2-1 2.2 PERSONNEL ...ttt 2.3 SCHEDULING .......ccooooiiiiiit i eee e e 2-1 PREREQUISITES AND ASSUMPTIONS ....ouiiitiiee oo 2-1 2.4 2.5 SYSTEM INSTALLATION AND CHECKOUT ..ot 2-2 2.6 SYSTEM SPARES ...t e e tt 2-3 CHAPTER 3 UNPACKING AND INSPECTION 3.1 SHIPPING AREA PROCEDURES. ........cooiiiiiit oo 3-1 SEALED CONTAINERS .....o e oti e iiitie 3-1 3.2 3.3 PACKING LIST ..ot 3-1 SHIPPING DAMAGES . ......oioiitiie et 3-1 3.4 3.5 OPENING SHIPPING CONTAINERS.......ccoeeeiotieeoe oo 3-1 3.6 3.7 . 3.8 EXTERNAL DAMAGE INSPECTION ....c.coooviiii oot 3-1 INVENTORY ..o e 3-6 3.9 3.9.1 3.9.2 3.10 3.11 Short Shipment Procedure............ oo oo ovuiiie oo ieeeeee 3-7 Non-Short-Shipment Missing It€mS...........c.ooovveeieveioeeoeeeeees oo 3-10 COMPLETION ..ottt 3-10 RETURNING DAMAGED EQUIPMENT ....oovoiiimooeeoeee oo 3-11 CHAPTER 4 UNIT PLACEMENT 4.1 EQUIPMENT MOVEMENT .......ooo e iiiii eeeeeeeeeeeeeeee iiiie e 4.2 4.3 4.4 4.5 CHAPTER § 4-1 KL10-C (2040) CABINET HANDLING ....c.ooooviioioieooe oo 4-2 DESKIDDING ASSOCIATED EQUIPMENT ....ooooiiioieoeeeeoe e 4-3 REQUIRED TOOLS.......ooi e e eiiiii e iteo 4-3 FINAL CHECKS ..ottt 4-4 UNIT INTERCONNECTION EQUIPMENT POSITIONING .....ocovi oo e iiiiiiiie 5-1 BOLTING FRAMES L...ooioiiii e e 5-1 KL10-C (2040) CABINET INSTALLATION AND INTERCONNECTION .....5-1 iii CONTENTS (Cont) 5.3.1 53.2 53.3 534 535 53.6 5.3.7 54 5.5 5.6 e, Cabinet 2 — Cabinet 3 ASSEmMDbIY ....cocvruemiiiriiimiiiin . niiiin Cabinet 2 - Cabinet 1 Assembly......c.ccovviimmiii Memory 2 (Option) Cabling Interconnections...........ccoevevniiininiieenns Cabinet 3 to Cabinet 2 and Cabinet 1 Cabling Connections...........ceeeevieeeens Cabinet 1 — Cabinet 2 (Front End - I/O Cabling Interconnections) ............. enn s eeaseeeaeseaaarat eeeeeeiserenr i eaeearaaraebrera Leveling Feet........ eereeeeeeerer Final KL10-C (2040) Central Processor Assembly........c..cccccvvvnninnines se ii e enes sesseeiiiii i SYSTEM GROUNDING....coiiiiiiiiirirr et erereeae e s niinriiiiiinnnnn ......c..coiiiii WIRES GROUND G CHECKIN CUSTOMER VOLTAGE CHECKS .......oooiiiiiiineinns e - 5.14 COMPONENT CHECKS ...te ere et iiini e renissse itiiiei FASTENER CHECKS ....ooiiii e siis st sessnnsas rnii sesssnsseasrissss irii ettt oot iiteerir CABLING CHECGKS..... snnnns e s g enepenressea tt s ot .. CHECKS SHORT CIRCUIT es s ese iiti siteir BACKPLANE CHECKS. ...t iiiiiiiiie . sensaeesrtsaninsnsesessaes neeeetiree VISUAL INSPECTION ....iiiiiriririirrenrciiies sssanans st reres se e e s e s sanassssssanne i ss et iieree SYSTEM CABLES ... oitiiiiieeic s e an e s s srnais e sestesit tt CABLE INSTALLATION .oittt CHAPTER 6 SYSTEM INTEGRATION 5.7 5.8 59 5.10 5.11 5.12 5.13 6.1 6.2 6.3 6.4 6.5 6.6 6.7 N sbesesssesssasssssssssssssrssssseses 6-1 essetesss st sssessse TIO et eeseeeeetessestsses UGC ....coooivievee INTROD iini 6-1 s i iiiii RP04/06 DISK DRIVES .......coi e aeeeeens 6-2 eerrer e,rrrer oiiii .....co DRIVES. CTAPE TU45 MAGNETI r 6-2 snns retiiic enssssasssssanansese iiiieri tereinsessastnnaases et e iiiitti ...ootu LP20 LINE PRINTER 6-2 e e er e e r v e r nnannsssssaenans s s tt sitn s e rertnicn CARD READER ...t 6-2 sn sees sssnnsssssssse LA36 CONSOLE DEVICE.......tiiiiiiiiiiciiierererieenirieniisesniniiess 6.9 sttesnoterensas ss 6-3 GROUNDING ...iiiitttiiiisietrtereeeeeeeresssetestsssesereassnissarsssnssssesansns ssssnssesaseses 6-3 iretses s serssasannsssaaasse nriseer ness s rererrr DIN20 SUBSY STEM ..ot ttiiiie CHAPTER 7 POWER CHECKOUT 6.8 7.1 7.1.1 7.1.2 7.1.3 7.14 7.1.5 7.1.6 7.2 7.2.1 7.2.2 7.2.3 PREPOWER CHECKOUT PROCEDURES.......c.coiiiii 7-1 11/40 CPU — Front End ....c.ooiiiniiiiii i 7-4 Peripheral DI AWETS. .eenevreerereereesssessneensesssssesssessssesersessssessssessseesensensossosesnsns 1=k ssasnnsstasatnsnees7-5 sttt s rerteesas s eerrene etttierirria 863 POWET CONITOL. cueuuiiiiiiiiiii ee e 7-5 861 POWET CONTOL....cvvvvrreiieerrirreeeseserreeeeeesrenriessseesssarensenns v ei 7-5 i, H761 Regulated Power SUPPLY ...cooovivviiiiiiiiii nn -5 .........ccocvvvevnene Regulators Voltage Associated and Supplies Power H7420 SYSTEMS CHECKOUT ......ccociieierenrerirnienensimiesinsessssessssssassoses RS7-5 e bes7-5 iineer errat e s st ar s sssessesessss reiireri ettt Print Set Definitions ....uvvvveueerer 7-6n evvecveeiiiiinnen PDP-11/40 and Peripheral Drawer Power Harness ..........c.cccoe e7-6 ee ein e Power Checkout Procedures.....ccoveivuieereieniiiiriiiiieriincr iv CONTENTS (Cont) Page CHAPTER 8 SYSTEM CHECKOUT 8.1 INTRODUCGTION ..ottt et e e e eee e e e e et ee s e e ee e v e e e nan et e aes 8-1 8.2 TEST EQUIPMENT ..o 8.3 TEST SOFTWARE ... et e ee e e e e s 8-3 e 8-3 8.3.1 PDP-11 11/40 Front-End Diagnostics ........cccceeveivmiriiireininiiiiieeee e eiie 8-3 8.3.2 Diagnostic SUppOrt Programs..........ceeeeiieiiiiiiiiciiii e e e 8-4 833 KL10 Processor Hardware Diagnostics ~ ModelB..............cccooo v, 8-5 8.3.4 Processor Functional Diagnostics.........cccevviiiiiiiiiiinniiiiiiiiiiiien e ceresiiee 0 00,825 8.3.5 MEMOTY DIAZNOSLICS 1vvvviviiie ittt et et e etesetee st etee e 8.3.6 TMO2/TU45 Magtape DiagnosticS........cuuuuiviiiiiriinieriiiiiiiieeeeeeee e e e e 10,820 et e e eee e 8-6 8.3.7 RH20 Controller DiagnostiCs .....cccuvviiiiuiiiiiitiiieitiieieee e eee e e 8-6 8.3.8 RP04/RP0O6/(Massbus) Disk Diagnostics.........c.eeveereeiiiiiiiiieineieieieieiee e 8-6 8.3.9 Disk Subsystem Reliability .........ocoviiiiiiiiiiiiii 8.3.10 System EXerciser TestS.....couiiiiiiiiiir it e e e 8-6 e 8-6 8.4 DOCUMENTATION ..ottt 8.5 STANDARD CONSOLE SWITCHES......coiiiiii e e e 8-7 8.6 DIAGNOSTIC SOFTWARE REFERENCE ........oooiiiiiii e 8-7 8.7 DIAGNOSTICINPUT MEDIA ... e e e ae e e 8-7 8.8 PHASE A -11/40 FRONT END AND OPTIONS VERIFICATION..................8-8 et ee e ee e en e 8-6 8.8.1 Load Medium: RXO01 Floppy Disk ............... et 8.8.2 Applicable DIiagnostiCS.......cuuuiueiieiiiiiieiierrie e e e et e 8-8 8.8.3 CD20 CheCKOUL. ..ot 8.8.3.1 8.8.3.2 8.8.4 ee ettt ieeeetteteee e re e et e rrrae s 8-8 e Indicator Test.....ccooeevvvievveeieeriennineeen,e et e ve e e e ae e e e 8-8 ———r e e re et areeae et eas 8-8 Alpha and Binary Deck Tests ........ccoeovvviiviiiiiiiiiiiieeee e 2. 858 DC20 Verification .......cccoeeieeiiiiiiiieeeiiiiencniiicin e e een. e er e e e e e re e 8-9 8.8.4.1 Equipment ReqUITed .......coooeiiiiiiieieeicce e 8.8.4.2 DZDHK Modem Control ChecK......c..coiiiiiiiiiiiiiiiiiiiiiiicii e, 8-9 8.8.4.3 8.9 e e et e DZDHM /DZDHN Checkout......c...uuiiiiiiiiiiiiiiiic e 8-9 e 8-9 PHASE B - PDP-11-BASED KL10 AND KL10-BASED KL10 DIAGNOSTIC VERIFICATION ...ttt 8-9 8.9.1 DESKEW ChECK ......ueeeviieieiriitreenieiteiee ettt e —————— 8-9 8.9.2 Load Medium — RP KLAD PacKk........cccccciiiiiiiiiiiiiiiiieeicene 8-9 8.9.3 DTE/CPU Checkout......c.uuuciiiiiiiiiiiiiiiiiieniniieneeceeniiintieeeeeeevesseas 8-10 8.10 PHASE C- MEMORY DIAGNOSTIC VERIFICATION ......cccooeeeviviiineiniinnnn, 8-10 8.10.1 | F318 CoTe 1R Teda Uo ) o WO 8.10.2 DGMMA AT s e e e e e e e e 8-10 PSP 8-10 8.10.3 DDMMD/DDMMG Memory EXerciser ........covcuviiiiieiiniiiiiiiiieenes s, 8-11 8.10.4 1D DALY 1% § 2 2 ) B UlU] OO 8-11 8.10.5 8.11 8.12 MB20 Option DiagnostiCs .....ccuvveriiiriiiiniiiiriiiineriiiiiieeeriiieeeesevrriineeseernieeens 8-11 PHASE D - RH20 CHANNEL DIAGNOSTIC VERIFICATION.................... 8-11 PHASE E - RP DISK DIAGNOSTIC VERIFICATION .....ccccceevvvivviviiriineenne, 8-11 8.12.1 FOIMATEINIE .ceviniiiiiiiriii 8.12.2 Error Rates......c.cocovveeenn.... ¥tt et e r et e et eteta e ettt e ettt e et e e bt e e sbba s eseeanesearansens 8-11 e nentaaarnananenanearntnrarnaaans 8-11 CONTENTS (Cont) Page 8.12.3 Head Alignment Verification (DFRPH or DFRPK) ... 8-12 8.12.4 PTIME (DDRPI) .o e e e ee e ere e e e 8-12 8.12.5 DA ZNOSTICS. .oiviiiiiiin it i 8.13 e et eree e e re e ee e er et s eet e e e atre e s e s e a e tenan ee e es 8-12 PHASE F - TU45 MAGNETIC TAPE SYSTEM DIAGNOSTIC VERIFICATION. ...ttt e et e a et s s e e et s ve e e aee e e s 8-12 8.13.1 D 8.13.2 DETUK Lo e e e e et r e e e e e ere e aeannssasas seee oo 8-12 8.13.3 DI TUE 8.13.4 |2 8 (o) £ T TP PR 8-13 8.13.5 AQJUSEIMENT. ..ottt et e e ee e eeee e e s ennn e eenenensSUTPRROORRPRPR 8-13 8.13.6 TUE . .o et er e e e e e e ee st e e e e e s s e e ceee st saaeae s 8-12 e st e s e e eenne e ea ee 8-12 DFTUE Compatibility Test......cccouiiiiiiiiiiirii e e e e 8-13 8.14 DN2X COMMUNICATIONS SUBSYSTEM ... 8-13 8.15 PHASE G - SYSTEM EXERCISER DESXA ....ccoiiiiie e e 8-14 8.16 PHASE H - KLAD-20 MONITOR CHECK ......cccoiiiiiiineirie e e 8-14 8.16.1 Introduction ........ocoivieiiin 8.16.2 KLDCP Disk Boot Check ............ PP 8-14 ee e e e 8-14 8.16.3 KLAD Monitor Disk Boot Check .......cocoviiiiiiiiiiiiiiiiniii e e 8-14 8.16.4 General RUIES.........oviiiiiiiiii 8.16.5 e KLAD-20 BaCKUD couiiiiiiiceii e ere e e e 8-14 e e et e e e e e e e 8-14 8.17 DECX/11 PROCEDURE/MAP LISTINGS ... 8-15 8.18 MA20- MB20 DESKEW PROCEDURE............cooiiiiiiiiiiiiiiiii e e 8-15 8.19 RH20 DESKEW PROCEDURE ... e e s 8-16 CHAPTER 9 HARDWARE ACCEPTANCE PROCEDURES 9.1 PURPOSE . ..o 9.2 GENERAL INFORMATION .ottt 9.3 REQUIREMENTS L it er e re st e et s aean e e s9-1 94 TEST VERIFICATION ..ottt s e s et esenrin e s veenee b s anae e en e s 9-1 9.5 COMPLETION . ... CHAPTER 10 SYSTEM ADD-ON AND ADJUSTMENT PROCEDURES 10.1 et e e ae s et ss e e aeabbse s s tae e sesebbnaraaen e s 9-1 st eeers e ee e es e rir e 9-1 s e ee e st e eeverit s eesabbb e e aran s e eeeae e esens 9-2 MA20/MB20 ADD-ON MEMORY INSTALLATION, CHECKOUT, AND ACCEPTANCE PROCEDURE ... 10-1 10.1.1 INErOAUCHION ..ee 10.1.2 MA20/MB20 Add-On Parts List.........cccooiiiiiiiiiiiniiiiiie e 10-1 e e e e et ere e et et seanee e rearee o 10-1 10.1.2.1 Various MA20 System COmMPONENtS ........cceeueiiiiriiiieiiiieiiiirereriinseeea 10-1 10.1.2.2 MB20 System COmMPONENTS....c.uuiiiiiiniirieitieeeiiinceeieerriiiereeiteeesrienaeses 10-4 10.1.3 Applicable Documentation, Diagnostics, and Required Tools ....................10-4 10.1.4 MA20/MB20 Preinstallation (Skidded) Checkout .......cccoouvvuieieriniiiiiiniinnnnn 10-6 10.1.5 Mounting ProCedUres ......ocuvuiiiiiiiiiiie i e 10-7 10.1.6 10.2 10.2.1 Checkout and Acceptance Procedure .........cccovvivvviiiiiiie i e 10-13 KL10-PV UPGRADE PROCEDURE FOR KLIO-C......covvvviiiiiiiiieiiin 10-15 PV Upgrade ReSOUICES .....oveviiiiiiiiiiiii e et e st ae e eeaae e s 10-24 vi CONTENTS (Cont) Page 10.2.1.1 10.2.1.2 10.2.2 10.2.2.1 102.2.2 10.2.3 10.3 On-Site or Locally Supplied Resources........ccccoeeviiiiiiiiiinveninnereienennnn, 10-24 Resources To Be Supplied (Shipped) .....c.ovieeviiiiiniiiiiiieeeeee 10-24 Diagnostic Test Programs .......cccceeiiiiiiiiiiiiiinin e 10-24 Model A CPU SyStem .....cciiiiiiniiieieiieiie et et e e s 10-24 Model B CPU System .....ceiiiiiiiiiiie et e e 10-25 PDP-10 KL10 Instruction Timing Test (DFKFB)........ccccooovvvvviiiviiinnnne. 10-26 CACHE UPGRADE PROCEDURE.......cccooiiiii e 10-28 10.3.1 INtrOdUCLION .. oottt e e e ee et eeeee e 10-28 10.3.2 Test Equipment REQUITEd ....coevviiviiiiiiiii 10.3.3 Upgrade Procedure ..o e s 10-28 1034 Power Tab Identification NOLES .........ccoeiviiiiiiiiiiiiii e 10-29 e e 10-28 CHAPTER 11 REPORTING PROCEDURES 11.1 INTRODUCGTION ..o et ee e e e e e e 11-1 11.2 LARS REPORT FORM ..ot et eee e 11-1 11.3 DECSYSTEM-20 INSTALLATION REPORT ... 11-3 11.4 DAILY LOG ... et e e e e e e e e e e e e e e 11-4 11.5 LCG INSTALLATION WARRANTY ACTIVITY SUMMARY FORMS ......11-4 APPENDIX A INSTALLATION PLANNING SHEET APPENDIX B SAMPLE DIAGNOSTICS B.1 11/40 FRONT END DIAGNOSTICS ....cortiiiiiiiee B.2 FLOPPY BOOT OF KLDCP......cccoiiiiiiiieiiciis ettt B-16 e, B-3 B.3 BB. CMD ... B.4 DGMMA ..o B.5 DIAGNOSTIC BOOT ..ottt ettt B.6 DDMME ... e e e B-24 B.7 DDMMD ..ottt e e e e e B-25 e e et e e et e B-16 et B-22 st ae e sra e B-23 B.8 DERHD ... e e et e s B-26 B.9 DEFRPK ...t B.10 DDRPI (FORMAT BEFORE ACCEPT).ccciiiiiiiiiii ettt e ae e B-27 e, B-28 B.11 B.12 DFSXA ............................................................................................................. B-46 B.13 KLDCPBOOT VIA SW REG.....ccooiiii s B-49 B.14 MONITOR LOAD SAMPLE ...t st B-50 APPENDIX C HARDWARE ACCEPTANCE TESTS APPENDIX D DECSYSTEM-20 INSTALLATION REPORT FIGURES Figure No. 3-1 Title Unpacking and Inspection FIOWChart.........ccoooooviiiiiiiiiiiiiiieieii vii Page e 3-2 FIGURES (Cont) Figure No. 3-2 3-3 4-1 4-2 5-1 5-2 5-3 5-4 5-5 5-6 5-7 5-8 5-9 7-1 7-2 7-3 8-1 8-2 8-3 10-1 10-2 Title Page Installation Short Shipment Procedures — Overview..........cccovvvviviiiiiiiiniinniinnnnnen, 3-8 Detailed Short Shipment Flowchart ..., 3-9 Unit Placement FIOWCRATt.......c.ouiiiiiiiiiiiiei et e s 4-1 Unit Movement.........c.cceuesPP4-2 Unit Interconnection Flowchart...........oooiiriiiiiiii i 5-2 1/0 Processor Cabinet (Rear View) - Cover and U.L. Shields Showing Power Cable, Massbus, and Ground Cables ........cccceveimiiiiiiiiiiiiiniiiin e, 5-5 CPU Cabinet (Rear View) - Support Shield and U.L. Shields .........cccccceeiiiininnnnin. 5-6 1/0 Processor Cabinet (Front View) - Cover and U.L. Shields ..........c.occcoiie 00547 Arm Stabilizer Detail ... .oovvveiiiiiiieiie e 5-7 Leveling Foot Detail ..............coooviiiiinn . e 5-8 Exterior Assembly and Leveling Detail........cccccoevvvererinncriciinniiciniinnie 0. 3-8 Central Processor KL10-C Connections ........cc.eevvevivniniinnrinnnnnen. ere e eene e 5-9 Signal Interconnections (KL10-C) ......ccoooiiiiiiiiin e 5-10 System Checkout FIOWCRhATt..........uviiiiiiiiiiiii i, 7-1 Sense Voltage Potentiometer LOCAtIONS ......cuvvveiereseircnnenmneriieniiiiieeeenninsnnnear e e e 19 Voltage Sense LEDs ............cc...... rveeees@ ereethereraeeeeearees i etieeeeean s ran e e aennt s e an 7-10 Diagnostic Checkout Flowchart ..., 8-1 MA20/MB20 Timing Diagram.......cccccccoiiniiiiiiiiiii 8-15 RH20 Deskew Timing Diagram...............e et et ettt e e ar e rr e ear et aeeee e seae s eean on e 8-17 MA20 Module UtilZation ......coveiiiiiiiiiinneiie et 10-3 MB20 Module UtiliZation .........cooiiiiiiiiiiiii e et et e e s e 10-5 10-3 1/0 Processor Cabinet (Rear View — Doors Removed).........ocoveveinivmcniinincne 10-8 10-4 CPU Cabinet (InNer DOOT) ...cuiiiiiiiiiiiiii e e e e e 10-9 DC Power Supplies and Regulators (I/O Processor Cabinet) ........ccccccouvnnnnininns 10-10 Connector J2 and J3, Pin Identification............c.cccccoeevniinnnennne.e 10-12 Ground Strap Installation.........cceevviiiiiiiiiiiici i 10-14 10-5 10-6 10-7 10-8 Memory Controller Jumper Installation .........c..coooeeiiinin.v 10-9 KLIO-PV ASSEmMDIY .. oottt et e e e e 10-18 Handling of CPU Assembly......ccoooviiiiiiiiiii 10-19 Support Bracket BoltS.......ouveeviiiiiiiiiiiiiiiiiii 10-20 KL10-PV CPU dc Wiring (Pin Side VIieW)......covvvvuininniiirircerinci i 10-23 Sample LARS Report FOrm.....c.cccoiiviiiiiinniiiii i e 11-2 LCG Installation Warranty Costs Summary Form (Sample Only) ...................... 11-5 10-10 10-11 10-12 11-1 11-2 e et er— e e e 10-14 TABLES Title Page Related Documents.................... e rerteeeteeeeut o eh— e te e teeetnraa e eann e ne s reneeannn e e aa 1-2 Parts Required to Assemble CPU Cabinets.........cccoeevviiiiviiiiiiiniiiiniiiiniiiinnnnn 5-11 Equipment for Diagnostic Checkout ...........cocvviiiiiiiii 3-4 MA20/MB20 Add-On Parts List ......c.oooviviiiniiiiiii e 10-2 DDMMD: Right-Hand Switch Settings.......covvviviiiiiniiieenineine e 10-16 viii CHAPTER 1 INTRODUCTION The installation procedures contained in this manual provide for system checkout and acceptance of the DECSYSTEM-20. Adherence to these procedures ensures that both the system and the configuration conform to design specifications. Where applicable, flow diagrams complement specific procedures. Table 1-1 is a list of related documents. Personnel involvement, scheduling, customer data, prerequisites and assumptions, a day-to-day installation plan, and spare parts checkout are contained in Chapter 2. Unpacking and inspection procedures, Chapter 3, are intended to ensure that the proper system is received at the customer site, and all equipment is in good physical condition. Chapter 4 contains unit placement information dealing with the transportation of equipment from loading dock to site location, and the procedures for deskidding. Unit interconnection procedures in Chapter 5 provide installation and interconnection information for the DECSYSTEM-20. Included are system positioning and grounding, cable identification, and sequence of installation and routing. These procedures are designed to eliminate fculures due to improper ac wiring, shorted power cables, etc. : The system integration procedure described in Chapter 6 is designed to ensure that all component parts of the DECSYSTEM-20 are connected properly. Chapter 7 contains power checkout procedures required to verify that the power system is functioning properly. Total system operation is checked via the standard diagnostic checkout procedures described in Chapter 8. Appendix B contains sample diagnostic printouts. Standard field service hardware acceptance procedures are contained in Chapter 9 and Appendix C. Chapter 10 describes system add-on and adjustment procedures, including those for cabling, cache upgrade, model B upgrade, and MB20 installation. Reporting procedures such as LARS forms, installation reports, and daily logs are explained in Chapter 11. 1-1 Table 1-1 Related Documents Document No. Title EK-10/20-HR*+ EK-DEC20-SPt Hardware Reference Manual DECSYSTEM-20 Physical Description TU45/TMO03 Maintenance Manual DECSYSTEM-20 Bus System Interface Description CD20 Maintenance Manual DECSYSTEM-20 Data Channel Interface Description DECSYSTEM-20 System Description DECSYSTEM-20 Site Preparation Guide EK-DIA20-UD* DIA20 Unit Description EK-0DN2X-TM* EK-DTE20-UD*t DN2X-DNHXX Technical Manual DTE20 Unit Description EK-EBOX-UD*} EBox Unit Description EK-20XX-PD* EK-45/03-MM* EK-BUS-ID*+ EK-CD11-TM* EK-DATA-ID* EK-DEC20-SD* EK-FE-ID* EK-KL10-HB*t EK-KL10-TD* EK-KL10C-BD* EK-KL10C-IP* DECSYSTEM-20 Front End Channel Interface Description KL10 Maintenance Handbook Introduction to KL10-Based System Technical Description KL10-C Field Maintenance Print Set Supplement KL10-C Tllustrated Parts Breakdown EK-KLINI-UG*¥ KLINIK User’s Guide EK-LP20-MM* LP20 Maintenance Manual EK-MA020-UD* MA20 Unit Description EK-M B020-UD*+ MB20 Unit Description EK-MBOX-UD*+ EK-METER-UD* EBox Unit Description Meter Board Unit Description EK-PWR20-SD* DECSYSTEM-20 Power System Description EK-RH20-UD*+ RH20 Unit Description EK-TU45A-MM* TU45A /TM02 Maintenance Manual DECSYSTEM-20 Layout Kit EK-DEC20-LK * Available on microfiche. For information concerning Microfiche Libraries, contact: Digital Equipment Corporation Micropublishing Group PK3-2/T12 Maynard, Massachusetts 01754 tAvailable in hard copy. Hard copy reference documents may be ordered from: Digital Equipment Corporation 444 Whitney Street Northboro, Massachusetts 01532 Attention: Printing and Circulation Services (NR2/M15) Customer Service Section 1-2 CHAPTER?2 DECSYSTEM-20 INSTALLATION PLAN 2.1 INTRODUCTION A critical factor in the predelivery phase is to develop an installation plan agreeable to all parties concerned. This chapter outlines personnel involvement, scheduling, customer data, prerequisites and assumptions, and a day-by-day hardware installation plan. An example of an installation planning sheet is shown in Appendix A. OB W 2.2 PERSONNEL The DIGITAL personnel involved in the complete installation and acceptance plan are listed below and should be consulted before the customer receives the plan. Account sales representative Software representative Field service account supervisor/manager Field service account representative Field service district support representative Field service regional support (support engineer or installation specialist) 2.3 SCHEDULING The appropriate time to generate the final installation plan is approximately 30 days prior to delivery. This is close enough to installation time that people/resource commitments can be made with little chance of circumstances changing. 2.4 PREREQUISITES AND ASSUMPTIONS [. Environment: Stable and Clean a. Power: 120/208/240/380 V +6%, -13%; 50/60 Hz £1 Hz b. Temperature: 18° to 24° C (65° to 75° F) Rate of change 2° F/hr ¢. Humidity: 40 to 60 percent. Rate of change 2 percent/hr 2. System layout determined 3. Preinstallation site survey completed 4. System cables ordercci 5. KLINIK modem installed (NORAM) 6. Installation team (2 hardware installers) 7. Work period (8 hours per day) 2-1 Ao O System Contents Disk drive (1) Tape drive (1) Line printer (1) Card reader (1) Add three (3) hours to total installation period per each additional unit. SYSTEM INSTALLATION AND CHECKOUT Day 1: Preliminary a. b. Unpacking Inventory c. Quality control inspection of interior and exterior o o Day 2: Cabinet assembly Cabinet positioning Cabinets bolted together Preliminary power checks Cable installation Day 3. Power checkout a. b. Prepower checks Power-on checks (adjustments if necessary) oo T Day 4: PDP-11 front end checkout PDP-11 CPU and memaory diagnostics PDP-11 communication diagnostic Hard copy diagnostics KLINIK link SY2040 system exerciser (12 hours or overnight) Day 5: Unit checkout S 1. Memory deskew check ' KL10 CPU and memory diagnostics RH20 deskew RH20 channel loopback diagnostics DFKDA (12 hours or overnight) Day 6: Disk and tape drive checkout foow 2.5 Run appropriate diagnostics Alignment checks Reliability checks (one each hour) DFSXA (12 hours or overnight) 7. DayT: a. b. 8. Day 8: Reliability checks a. b. c. 2.6 Monitor from KLAD-20 pack Acceptance script System reliability via SYSERR Software installation Initiate acceptance SYSTEM SPARES For systems which are geographically remote or isolated from repair/replacement facilities, a spare parts checkout program should be considered prior to hardware acceptance. A quick go/no go, deadon-arrival check extends installation time approximately one day. Following checkout, it is advisable to remove all spare modules from the system and to restore the originals prior to hardware acceptance. When a spare parts checkout program is to be performed, care should be taken to tag all modules to be tested or removed. The sequence of insertion should be planned prior to starting the test. An appropriate time to cycle spares is after all diagnostic checkout procedures have been completed; i.e., following day 7 of the day-by-day installation plan (Paragraph 2.5). A suitable sequence of diagnostics should be run after each module/module batch insertion. The particular sequence will depend on which part of the system the spares are being checked in. 2-3 CHAPTER 3 UNPACKING AND INSPECTION 3.1 SHIPPING AREA PROCEDURES (Refer to Figure 3-1.) Because of dock or shipping area procedures and/or ease of performing inventory, the shipment may be moved from the customer’s shipping area to the computer area. If so, follow the procedures in Paragraphs 4.1 and 4.2 at this time. 3.2 SEALED CONTAINERS Ensure that all boxes are sealed and that system cabinets and free-standing peripherals are in unopened shipping containers. If anything is opened, call it to the attention of the customer and document it on the installation report or field service report. 3.3 PACKING LIST Check the shipment against the packing list to ensure that the correct number of packages has been received. If an incorrect number of packages has been delivered notify the customer and the branch service manager or the branch supervisor. The customer should check with the carrier to locate the missing package(s) and have the missing package(s) delivered to the site. The branch service manager or branch supervisor may have to check with the traffic and shipping departments to locate missing packages if the carrier does not have them. 3.4 SHIPPING DAMAGES Check all boxes for external damages. Inspect for dents, protrusions, holes, smashed corners and pins, etc. If any boxes are damaged, notify the customer and document it on the installation report or field service report. 3.5 OPENING SHIPPING CONTAINERS 3.6 EXTERNAL DAMAGE INSPECTION Open each box, one at a time (starting with the READ ME FIRST box) and locate its packing slip. Inventory each box against the packing slip and note any missing items on the installation report or field service report. While performing inventory, inspect each item for damage. Note damaged items on the installation report or field service report and inform the customer immediately. If the damage is extensive, call the branch service manager immediately and report the damages. Check the system cabinets and free-standing peripherals for external damage to the shipping skid, covers, etc. Inspect the shipping containers for signs of stress or abusive handling. Remove the polyethylene covers and inspect external surfaces for scratches, holes, broken switches, broken panels, dented end panels, broken stabilizer feet, and any other damage or sign of abusive handling during shipment. 3.7 INTERNAL DAMAGE INSPECTION Inspect each cabinet and free-standing peripheral for internal damage as follows. 1. Remove the tape or plastic shipping pins from the rear access door(s) of the cabinet(s). Open the rear door(s) of the cabinet(s) and ensure that each option is secure in the cabinet. Inspect the cabinet for cable damage (ac and dc cables), loose mounting rails, loose fans or blower motors, loose nuts and bolts, screws, loose module clips and module retaining bars, broken switches, lights, breakers, connectors on the power controllers and power supplies, broken cable connectors, console switches, etc. 3-1 UNPACKING AND INSPECTION FLOW STEP INITIAL START ALL PRE-SHIPMENT 3 REQUIREMENTS ARE COMPLETED : NOTIFY CUSTOMER HE MAY ELECT TO MONITOR INVENTORY AND INSTALLATION ' 3.1 DEFINE BEST AREA FOR INVENTORY ACTIVITY INVENTORY DO STEPS 3.1 IN CUSTOMER 3.1 3.1 & 3.2 BEFORE SHIPPING AREA CONTINUING YES FIELD ENGINEER ENSURES THAT ALL BOXES AND.SYSTEM CABINETS ARE SEALED IN THEIR ORIGINAL SHIPPING CONTAINERS CALL DISCREPANCIES 3.2 TO THE ATTENTION ALL PACKAGES OF THE CUSTOMER. SEALED DOCUMENT ANY DIS- 3.2 CREPANCIES IN THE LOG BOOK. 3.3 CHECK THE SHIP- MENT AGAINST THE PACKAGING LIST INITIATE A TRACER 3.3 BY NOTIFYING THE CORRECT NUMBER OF PACKAGES CUSTOMER AND THE 3.3 BRANCH SUPERVIS| OR OR MANAGER. | ENTER NOTATION YES IN LOG BOOK. l 10-2906 Figure 3-1 Unpacking and Inspection Flowchart (Sheet 1 of 4) 3-2 UNPACKING AND INSPECTION FLOW (Cont.) STEP CHECK BOXES INITIAL 3.4 FOR EXTERNAL DAMAGE CALL DISCREPANCIES 3.4 TO THE ATTENTION ANY YES 3.4 OF THE CUSTOMER. DAMAGES DOCUMENT ANY DISCREPANCIES IN THE LOG BOOK. ] NO 1 35 INVENTORY CONTENTS OF EACH BOX AND CHECK CONTENTS OF EACH BOX FOR DAMAGE 35 DOCUMENT ANY MISSING ITEM (S) ON THE SITE INANY MISSING STALLATION RE- ITEMS PORT OR FIELD SERVICE REPORT AND IN THE LOG NO BOOK. DOCUMENT ANY ! 3.5 DAMAGED ITEMS IN LOG AND NOTIFY DA?/&EED CUSTOMER IF DAM- VES 3.5 AGE IS SEVERE.CON- I TEMS TACT BRANCH MAN- AGER IMMEDIATELY BEFORE CONTIN- NO UING THE INSTALLATION. 3.6 CHECK SYSTEM CABINETS AND FREESTANDING PERIPHERALS FOR EXTERNAL DAMAGE DOCUMENT ANY DAM- 3.6 AGED ITEMS IN LOG AND NOTIFY CUSANY DAMAGE YES TOMER IF DAMAGE IS 3.6 SEVERE. CONTACT BRANCH MANAGER IMMEDIATELY BENO FORE CONTINUING THE INSTALLATION. 2 102907 Figure 3-1 Unpacking and Inspection Flowchart (Sheet 2 of 4) 3-3 UNPACKING AND INSPECTION FLOW (Cont) STEP INITIAL 3.7 CHECK SYSTEM CABINETS FOR INTERNAL DAMAGE 37 DOCUMENT ANY DAMAGE IN LOG AND NOTIFY THE CUSTOMER IF ANY | DAMAGE DAMAGE IS SEVERE. NOTIFY THE BRANCH MANAGER IMMEDJIATELY BEFORE CONTINUING 3.7 3.8 LOCATE KEYSHEET OR TRANSFER SHEET STOP INSTALLATION YES KEYSHEET OR UNTIL KEYSHEET OR TRANSFER SHEET TRANSFER SHEET IS MISSING LOCATED. CONTACT 3.8 3.8 MANAGE R 3.8 INVENTORY SYSTEM CABINETS AND OPTIONS. ENSURE THE ECO LEVELS ARE RECORDED AS EACH ITEM IS LOCATED ; 3.8 CHECK MISSING ITEMS AGAINST WAIVERS OR AN APPROVED PARTIAL. 10-2908 Figure 3-1 Unpacking and Inspection Flowchart (Sheet 3 of 4) UNPACKING AND INSPECTION FLOW (Cont) STEP DOCUMENT ANY 38 3.8 MISSING ITEMS ON ANY MISSING INITIAL THE INSTALLATION ITEMS REPORT OR FIELD SERVICE REPORT. COMPLETION OF 3.9 UNPACKING AND INSPECTION 3.9 CONTACT BRANCH YES MANAGER AND IN- 3.9 ITIATE A TRACER OR SHORT SHIP ORDER. NC BEFORE CONTIN- 39 UING INSPECTION, TOMER AND BRANCH ITEMS MANAGER SO THEY / 3.10 CONTACT THE CUSDAMAGED FS Rep/Cust. CAN INITIATE iN- SURANCE CLAIM. 3.1 RETURN DAMAGED EQUIPMENT YES FOLLOW INSTRUC- SUMMARY TIONS FOR RESHIPMENT OF DAMAGED EQUIPMENT NO PROCEED TO FIGURE 4-1, UNIT EXIT PLACEMENT FLOWCHART. 10-2909 Figure 3-1 Unpacking and Inspection Flowchart (Sheet 4 of 4) 3-5 2. Remove the shipping retainer bolts of each expander chassis, or peripheral on slides, and inspect the internals of each box and peripheral for damage such as bent pins, and loose or broken modules, switches, lights, or backplanes, etc. 3. Document any damage and call it to the attention of the customer. If the damage is extensive, report the damage to the branch service manager immediately. DIGITAL is not responsible for shipping damage on systems that are FOB from the manufacturing facility. If reshipping equipment back to DIGITALis required, follow the instructions in Paragraphs 3.10 and 3.11. 3.8 INVENTORY Inventory each system cabinet and free-standing peripheral to ensure that it contains the items identi- fied on the keysheet or transfer sheet. Also, check the ECO REV level and serial numbers against the keysheet or ECO status sheets. Document any missing items, wrong serial-numbered item, or incorrect revision level item on the installation report or field service report. Ensure that the missing item is not covered by a waiver or an approved partial ship. Also, update the keysheet if ECO status does not appear on it. NOTE If the keysheet is missing, stop the installation and call the branch service manager to locate the keysheet or transfer sheet. Documentationis providedin the customer envelope to allow the customer and the field service person to answer the following inventory questions. 1. Have all the cartons and boxes been received? Using the shipper’s waybill, the number of containers should be counted to ensure that none were lost in shipment. If any are missing, the shipper should institute a trace or insurance claim at the customer’s request. 2. Are all of the options which the customer ordered present? Using the Actual Cost Jobs Closes or Transfers sheet, the system configuration should be inventoried for correct content and quantities of options. This form indicates what was ordered from the manufacturing group. 3. Are all the accessories which should accompany the options and system present? Using the accessory shipping llsts ~count and check as received every item containedin the boxes. NOTE Check the customer’s envelope for waiver forms which indicate that items have been backordered and will be shipped separately. Do not order waivered or partialed items as short shipped. If all items and parts have been received, inform the customer and continue with the installation following the installation and acceptance procedures (Paragraph 3.10). 3-6 3.9 MISSING PARTS PROCEDURES This paragraph defines an order short shipment, and the procedures for processing a short shipment P1 request through Field Service Logistics. It also outlines the procedures to follow when a missing item other than a short shipment is encountered, with the responsibilities identified for each organization. An overview of a short shipment is presented in Figure 3-2 and a detailed flowchart in Figure 3-3. A short shipment is an item or items identified on the shipping document as required to ship with the order, but which inventory shows to be missing from the shipment. Paragraph 3.9.1 describes the procedures to follow in case of short shipment. If a required item is missing and is not listed on one of the shipping documents as having been shipped or as required to ship, proceed to Paragraph 3.9.2. NOTE If the customer is performing the installation and finds material missing, then the customer should directly contact an account salesperson with the list of missing parts. 3.9.1 Short Shipment Procedure If an item is listed on one of the shipping documents as required to ship but it cannot be found when the installation inventory is performed, it is short shipped. Contact the branch logistics administrator and provide the following information. DEC No. Product Line System Type System Serial No. Customer Name : : : Part No. Part Description ! ' Quantity The branch logistics administrator will then assign an SBA number to the request and TWX it to the regional logistics center with the following additional information. The branch office contact name and location The SBA No. Branch DECNET code NOTE When the materials requested are low cost and readily available in the branch or regional stockroom, they should be used and the short ship P1 request should be filled in at that point. The materials used should then be charged to the installation activity and product line. The intent is to ensure that the customer will be serviced efficiently. Ihe regional iogistics center should check stock upon receipt of the short ship Pl request as noted above. If parts cannot be released due to cost or availability, retransmit the TWX to the Woburn PI group immediately. 3-7 EQUIPMENT INSTALLATION AT CUSTOMER SITE EVERYTHING ARE ARRIVED AS ANY ITEMS NO CONTINUE WITH INSTALLATION MISSING ORDERED ARE ITEMS FIELD SERVICE SPECIFIED AND MANUFAC- ON SHIP LISTS TURING BUT CAN'T BE FIELD THE ITEM MANUFACTURING ERROR MANUFACTURING RESPONSIBLE FOUND WOuULD SERVICE SALES AND RODUCT LINE FIELD SERVICE INSTALLATION RESPONSIBLE DOES THE OR DIFFERENT ITEMS THE CUSTOMER IS DISSATISFIED Figure 3-2 Installation Short Shipment Procedures — Qverview YES > ORDER INFORM THE RIQC ——— OR PRODUCT SUPPORT OF YOUR NEED SALES ACCOUNT PRODUCT RESPONSIBLE MFG SHIPS PARTS SHIP ot PROBLEM SALESPERSON YES L » SHORT FIELD SERVICE NEED AID F/S CUSTOMER EXPECT MORE F/S PLACE CONTACT LINE THE SALESPERSON AND PRODUCT LINE REPRESENTATIVE WILL SATISFY THE CUSTOMER FIELD SERVICE PERSON'’S ARRIVAL ON SITE VALID REQUEST TWX REJEC- INSTALLATION TION TO INVENTORY BRANCH TWX STATUS TO BRANCH BRANCH SERVICE IS MANAGER REVIEW MISSING PROBLEM ITEM SHORT SHIPPED SALES SHORT SHIP NO P/L, OR CUSTOMER P1 REQUEST PROBLEM REGION SHORT SHIP P1TO ACCOUNT SALES- WOBURN P1 PERSON CONTACT GROUP P/L REP WOBURN F/$ SHORT SHIP P/L REP COORDINATOR TWX MANUFACT CHECK AND NOTIFY SALESPERSON MANUFACTURING SHORT SHIP ' COORDINATOR ADDITIONAL YES INFORMATION .REQUIRED, “TWX BRANCH MR-1349 Figure 3-3 Detailed Short Shipment Flowchart 3-9 The Woburn P1 group will log the short ship request, and TWX directly to the responsible manufacturing short ship coordinator as listed by manufacturing within two hours of receipt. Each manufacturing group in each plant has a designated short ship coordinator in its facility who will receive the short ship request from Woburn and will verify the request. The responsibilities of the field service short ship coordinator, from this point, will be to monitor and log the status ofthe request as received from manufacturing until the SBA has been closed. If the manufacturing short ship coordinator needs additional information, TWX questions should be sent directly to the requesting branch, with a copy going to the field service coordinator in Woburn for logging. A response from the branch should go directly to the individual requesting the information in manufacturing within 24 hours. When the branch responds, the request will resume processing. The manufacturing short ship coordinator will check the request against the manufacturing records. If it is determined that the request is not valid a TWX will be sent to the branch rejecting the order with the reason why it is being rejected. A copy of the TWX will also be sent to the logistics coordinator who will then close the SBA. Appeals (wWhen deemed necessary by the branch service manager) should go directly to the person sending the rejection TWX if there was miscommunication, or to the account salesperson for product line or customer resolution. If the request is valid, the manufacturing short ship coordinator will TWX the Pl request status directly to the branch with a copy to the logistics coordinator, giving parts availability and an estimated time of arrival. If the parts will not be readily available within two days, the manufacturing coordinator will make the appropriate contact with the product line to authorize other priority acquisition procedures. In any case, status of the short ship P1 request should be sent by the manufacturing coordinator directly to the branch contact within 24 hours of the time manufacturing received the request. 3.9.2 Non-Short-Shipment Missing Items The installing field person should provide the branch service manager or branch supervisor with the details of the problem encountered. It should be made clear that this is not a short shipment but that it prevents continuation or completion of the installation or customer acceptance. Having collected the complete information, the branch service manager should work with the customer’s account salesperson to determine whether the item requested is a service aid or customerrequired. A service aid is an item or tool that field service could use to improve the installation or checkout process. If the missing item is a service aid, information should be documented and sent to the proper support supervisor or the regional installation quality coordinator. If the item is required by the customer, the account salesperson for the customer will gather all the relevant details and contact the appropriate product line representative. The product line representative will check the details and respond within 24 hours directly to the salesperson with the findings, the action to be taken and the time it will require. It is the salesperson’s responsibility to notify the service manager and the customer of the information received. The product line representative will arrange directly with manufacturing for all materials to be scheduled and shipped if it is determined to be the obligation of DIGITAL or in the best interest of the customer. 3.10 COMPLETION This completes the unpacking and inspection phase. Documentation of the entire system should be intact at this time. Notify the branch service manager or branch supervisor of any discrepancies noted during this phase. If no discrepancies exist, the customer should initial the last entry in Figure 3-1 signifying agreement with the inventory and inspection. Then continue to Chapter 4. 3-10 If discrepancies such as damage do exist, the branch supervisor may want the customer to initiate an insurance claim. For missing items, the branch service manager or branch supervisor should initiate a short ship request (Paragraph 3.9.1). All other problems should be discussed with the branch service manager or branch supervisor. Customer claims on damaged equipment may be difficult to obtain if the equipment in question has been removed from the skid. Therefore, if any damage exists, the damaged equipment should not be deskidded or moved until authorized by the branch service manager. The customer is responsible for payment of the replacement or repair of damaged equipment. This arrangement will be discussed between the customer and the branch service manager. If damaged equipment is to be returned to Digital Equipment Corporation, the procedures in Paragraph 3.11 should be followed. 3.11 RETURNING DAMAGED EQUIPMENT Any piece of equipment to be shipped to Digital Equipment Corporation, as a return authorization from the field, must be transported on a proper skid or in the container in which it was shipped. If the equipment has been removed from a skid and the skid is not available, a replacement must be ordered from the Maynard traffic department or Stockroom 17. Skids may also be manufactured in the locality of the customer site. All part numbers, specifications, and associated hardware are documented in print set D-PS-1210568-0-0. Part of the customer’s upgrade contract is that the customer is liable for all rigging and transportation charges; therefore, the customer can be billed for the skids and associated hardware. A sample of various devices is listed below, along with the respective skid part numbers. Options Skid Part No. RP04 /06 LA36 LP20-A,B 12-10568-2 9405651 12-10568-5 When a return authorization has been validated by DIGITAL and a skid has been procured, the procedure for loading a piece of equipment for reshipment to DIGITAL is as follows. 1. Remove the end panels and front and rear outer doors. 2. Raise the leveler feet. 3. Carefully place the equipment on skids. 4. Tighten the shipping bolts and lower the leveler feet. Also, lower any stabilizer feet levelers 5. Check to be sure that all shipping brackets for sliding chassis are in place and all module 6. Replace all end panels and doors, securing the doors with door holders. 7. Crate the cabinet appropriately; i.e., use a polyethylene bag, corrugated wraparound, etc. (if applicable). hold-down bars are secured. CHAPTER 4 UNIT PLACEMENT 4.1 EQUIPMENT MOVEMENT (See Figure 4-1.) Move all boxes to the computer area. If inventory is complete and Figure 3-1 is initialed by the DIGITAL representative and the customer, properly store the documentation (e.g., prints, manuals, diagnostics, write-ups, etc.) in the storage facility — preferably a cabinet with shelves. (A storage cabinet is usually supplied by the local field service branch.) This facilitates a smoother and more organized installation and eliminates searching for prints, manuals, or diagnostics in the various boxes. _ (' START ) STEP INITIAL 4.1 MOVE ALL BOXES TO THE COMPUTER AREA AND STORE DOCUMENTATION 4.1 COMPLETE MOVING NO IS AtL EQUIPMENT AT EQUIPMENT TO 4, 2 SITE THE SITE 4.2 YES 4.3 REMOVE ASSOCIATED EQUIPMENT FROM ) SHIPPING SKIDS »” 4.3 LAST PIECE OF ASSOCIATED EQUIPMENT REMOVED FROM SHIPPING NO SKID < EXIT ) PROCEED TO FIGURE 5-1, UNIT INTERCONNECTION FLOWCHART 10-2910 Figure 4-1 Unit Placement Flowchart 4-1 4.2 KLI10-C (2040) CABINET HANDLING (Figure 4-2) Obtain the site layout sheet from the customer. Also, obtain the configuration sheet; some part lists include it in the shipping documentation. Move the system cabinets to the computer area. " BAR APPLIED FORCE / HORIZONTAL A. CUSHION ( IF NEEDED) «~" 10LB. OR LESS \ INCLINEC PLANE ROL"A"LIFT ‘ RUG B. | i | ! ' : | 5 : ] § Movement on Rough Surface CRATED LIFT HERE —_— { e ' CABINET 49.0" » | INSERT FORKS V(4" WIDE) | | ALL THE WAY ' c.6 THRU 60 3/8" ! | ' | ;.:g T (12) PLANE Movement on Smooth Inclined Plane FORK STRAP 7 l ] f 17— | ——"x" DIM. —— 21" OPENING C. 10-2465 Fork-Lifting of Cabinet Figure 4-2 D. Dimensions of Crated Cabinet Unit Movement The following procedures should be followed for handling the double-width Hi Boy cabinets. 1. At least two workers are required to handle each cabinet. 2. When cabinets are to be pushed over steps (steel ramps over steps), riggers may be hired. 3. Cabinets are to be handled one at a time. 4. While loading or unloading cabinets on a ramp, a ‘“‘come-along” (a type of block and tackle) should be used to prevent loss of control over cabinet. 5. A *“J”barora ‘““come-along” should be used in these situations: when moving cabinets on a smooth inclined plane having a pitch greater than 1 inch per foot (such as in corridors, hallways, etc.); or where a cabinet is at rest on an incline plane of less than 1.4 inch per foot but an applied horizontal force of less than 10 Ib could move or slide the cabinet in either direction. See Figure 4-2A. 4-2 When moving such cabinets over any kind of carpet or rough floor, a “roller lift” is recommended to prevent damage to flooring or equipment. See Figure 4-2B. If the cabinet is to be pulled over steps, or gaps or crevices greater than 1/4 inch between buildings, partitions, etc., a flat steel plate or ramp should be used. 8. Fork-lifting the cabinet can be accomplished if forks are inserted as shown in Figure 4-2C. 4.3 DESKIDDING ASSOCIATED EQUIPMENT Carefully deskid all equipment associated with the DECSYSTEM-20. 44 REQUIRED TOOLS The tools required to deskid and install a DECSYSTEM-20 computer system are listed below. 1. Basic Tool Kit (7606864) DEC Part No. Description 29-13456 29-13457 29-13460 29-13462 29-13463 29-12573 29-13466 29-13467 29-13468 29-13470 29-13471 29-13472 29-13474 29-10779 29-13515 29-13451 29-10780 29-13461 29-12574 29-13459 29-12559 29-12575 29-12567 Nut driver set Adjustable wrench Diagonal cutting pliers (9SSELH-EREM) Miniature needle nose (UTICAB5317) Pliers, 6-1/2 inch Ratchet offset screwdriver Utility knife (Xacto no. 51ST) Wire strippers 4 inch X 5/16 inch screwdriver No. 0 Phillips screwdriver Trimpot screwdriver No. 2 Phillips screwdriver 6 inch round smooth cut file 6 inch half-round smooth cut file Thickness gauge set Solder pullit Penlight Needle-nose pliers Phillips stubby screwdriver Allen wrench set Tweezers, no. 151392 Valve spout oiler no. 990034 Service case Additional Tools Required DEC Part No. Description 29-12529 29-12577 29-13452 Screw holder Miniature combination wrench set Soldering iron Soldering iron tip Burnishing blade Unwrapping tool - 24 gauge Unwrapping tool - 30 gauge Handwrap tool - 24 gauge 29-19333 29-13512 29-13513 29-18387 29-13450 4-3 29-18301 29-10246 29-13455 Handwrap tool - 30 gauge IC clips (2) Large adjustable wrench Hammer Crimping tool for Faston connectors Tightening tool for Faston connectors 1/4 inch drive ratchet and socket set and level 4.5 FINAL CHECKS . When the equipment is situated in the site location, perform the following procedures in the order listed. 1. Check the pins on the backplane, making sure none of the pins is bent or smashed. 2. Check all Faston type connectors, making sure they are all tight. Check all modules and cables, making sure they are properly seated and in their correct slots. Beginning with the topmost circuit breaker on the main power box, check to ensure that each power cable is correctly labeled, both on the cable and at the box. Use a digital voltmeter (DVM) to ensure that all power phases are correct. Ensure that all circuit breakers within the main power box are in the OFF position. 4-4 CHAPTER S5 UNIT INTERCONNECTION 5.1 | EQUIPMENT POSITIONING (Figure 5-1) Starting with the KL10-C (2040) central processor and extending outward, position all the associated ' DECSYSTEM-20 equipment according to the accepted floor layout plan. 5.2 BOLTING FRAMES 5.3 KL10-C (2040) CABINET INSTALLATION AND INTERCONNECTION Bolt all frames together (where applicable) and/or install end panels. Paragraphs 5.3.1 through 5.3.5 list the procedures for interconnecting the KL10-C cabinets.See Figures 5-2 through 5-9. The cabinets are identified as follows. Cabinet 1 - Front end Cabinet 2 - 1/0 Cabinet 3 - CPU WARNING Before beginning this set of instructions, ensure that the main power line cord is unplugged from the wall receptacle and no peripheral equipment is connected to the machine. Table 5-1 lists the parts needed to assemble the three processor cabinets. These parts should be kept in a container and no parts should be discarded unless noted. Cabinet 2 — Cabinet 3 Assembly (Figures 5-2 - 5-4) 5.3.1 1. Place rear arm stabilizer on all cabinets (Figure 5-5). 2. Place leveling feet under all cabinets and secure with screws (Figure 5-6). Remove doors and air inlets, top covers, filler strips, and ground straps for ease of bolting . cabinets together. : Place level on top rail of cabinet. Level base of cabinet on x-y axis by adjusting leveling feet (Figure 5-7). Bring CPU cabinet in contact with I/O right side as viewed from the front. Raise CPU cabinet until lower bolting plate holes are in line with I/O cabinets by raising leveling feet (left front and rear as viewed front). Bolt down the two lower bolting plates with lower plates of CPU cabinets. Bolt middle and upper bolting plates. 5-1 STEP C snim ) POSITION THE CAB- INITIAL 5.1 INETS IN THE COMPUTER AREA ACCORDING TO THE ACCEPTED FLOOR LAYOUT 5.1 PLAN. BOLT ASSOCIATED 5.2 EQUIPMENT CABINETS TOGETHER AND INSTALL END PANELS. 5.2 BOLT KL10-C 5.3.1 CABINET 2 TO CABINET 3 5.3.1 5.3.2 BOLT KL10-C CABINET 2 TO CABINET 1 5.3.2 INTERCONNECT MEMORY #2 (OPTIONAL) 5.3.3 5.3.4 INTERCONNECT CABINET 3TO CABINET 2 AND CABINET 1 5.3.4 5.3.5 INTERCONNECT CABINET 1 TO CABINET 2 5.3.5 10-2912 Figure 5-1 Unit Interconnection Flowchart (Sheet 1 of 3) STEP INITIAL 5.3.6 LOWER LEVELING FEET SO ASSOCI- ATED EQUIPMENT CABINETS ARE LEVEL. 5.3.6 y CONNECT THE SYS- 5.4 TEM TO THE EARTH GROUND PROVIDED 54 BY THE CUSTOMER. ' CHECK THAT ALL 5.5 GROUND WIRES BETWEEN CABINETS 5.5 ARE SECURE. ‘ CHECK CUSTOMERS 5.6 AC POWER FOR CORRECT VOLTAGE 5.6 AND PHASING. : CHECK ALL POWER 5.7 SUPPLIES AND CONTROLLERS FOR 5.7 DAMAGE. ‘ 5.8 CHECK CRIMPS IN MATE-N-LOC CON- NECTORS, FAST-ON 5.8 TABS, LUGS, ETC. ‘ CHECK ALL CABLES AND HARNESSES. 5.9 5.9 10-2913 Figure 5-1 Unit Interconnection Flowchart (Sheet 2 of 3) STEP CHECK FOR SHORTS INITIAL 5.10 BETWEEN THE VOLTAGE TERMINALS AND 5.10 GROUND. : VISUALLY INSPECT 5.11 EACH LOGIC BACK- PLANE FOR BENT AND CRUSHED OR BROKEN WIRES, MATERIALS LODGED BETWEEN PINS OR ANY OTHER ABNORMALITY. 5.11 : 5.12 VISUALLY INSPECT BETWEEN LOGIC CARDS FOR LODGED FOREIGN MATERIAL. 5.12 : ENSURE ALL MOD- 5.12 ULES ARE IN THEIR CORRECT SLOTS, ENSURE NONE IS 5.12 UPSIDE DOWN. ‘ PROCEED WITH THE 5.13 INSTALLATION OF ALL THE SYSTEM CABLES. 5.13 =D 10-2914 Figure 5-1 Unit Interconnection Flowchart (Sheet 3 of 3) 5-4 SUPPORT SHIELD U.L. SHIELD .COVER SHIELD 8146-3 Figure 5-2 1I/O Processor Cabinet (Rear View) - Cover and U.L. Shields Showing Power Cable, Massbus, and Ground Cables 5-3 SUPPORT SHIELD uU.L. SHIELD NOTE: Support shields are installed with screws and U, L. shield rests on top of them. 8146-2 Figure 5-3 CPU Cabinet (Rear_ View) Support Shield and U.L. Shields U.L SHIELD 10-2628 Figure 5-4 1/O Processor Cabinet (Front View) Cover and U.L. Shields BOLTING PLATE (6) ON EACH SIDE OF CABINET _ WELD [ j/ . b ARM STABILIZER ~ Eg,, 6—32 SCREW LOCKING BOLTS (2) NS (20 5/ 10~ 2417 Figure 5-5 Arm Stabilizer Detail 5-7 NUT 000 atacaad {u i |_—WELD NUT /_LEVELING / FOOT 77///////”//HNHN//HNX/// LEVELING FOOT BEFORE RAISING CABINET Figure 5-6 ALLOWABLE BOW NOT MORE THAN 1/16" FROM VERTICAL BOTH SIDES 10~2418 Leveling Foot Detail TOP COVER TOP FILLER STRIP SECOND MEMORY REAR EQUIPMENT MOUNTING DOOR H761 SERIES PASS ASSEMBLY 1 Lo 3 N RSN AT T AW A K i RN s \\\\\\\\\ R 3. FRONT ARM STABILIZER LEVELING FOOT VERTICAL / REAR ARM STABILIZER FILLER STRIP NOTE: Use level along X and Y axis on cabinet Y ¢ toprail for X,Y alignment, Figlfljé”"S-7 i Exterior Assembly and Leveling Detail - 5-8 iy 10-2419 FRONT END I/0 CPU [ P14 CPU COOLING ASSEMBLY MATE-N-LOK RN P8 J8 g J O Q MATE -N-LOK (FAULT HARNESS) Q R -2 s ¢ H7420 Vs ! H761 1 SERIES PASS ASSEMBLY MEMORY # 2 : (OPTIONAL) - : | N | | C . E b D A :SN AN : —] MATE2 PIN -N-LOK N|S SN 3 o Jfle ; ! | 11 O aon 4 O ' p 7 / 1 »TO 11740 ] / -~ F — P S H7420 / H7420 / P 7 O Y,4 y 74 / 7/ ii POWER.H760SUPPLY 7/ / TO J28 // / Zfi— / 10 y29 863 POWER T0 J30 0 J32 L CONTROL TO J25 AC CORDS TR T D dfi‘ 43 P7]48 o (OPTIONAL) N P1 jn > _ P O O ““H7420's S FROM I/0 CABINET N P l = CAPACITOR ASSEMBLY R : 1 . \EXHAUST FANS 1 ; ' i = : | 1 / J1 : ! [ MEMORY #1 g H7420 ] e T I/0 0 : // | SWITCH PANEL il (I/0 HARNESS) / cPU | J14 /. ASSEMBLY —{1 O = H7420 I/0 COOLING JI:T fi’ N T J29 P2 Py TO WALL OUTLET A PULL THRU I/0 CABINET | FAULT HARNESS DURING INSTALLATION J28 J26 J24 ¢ ¢ O © J30 J32 J2r J25 o o O o " FROM I/O CABINET (LOCATED TOWARD HINGE SIDE ® BOTTOM CORNER) REAR VIEW © © 10-2265 Figure 5-8 Central Processor KL10-C Connecfions 5-9 E-CBUS-1-BCliA-2-0 /E-C BUS -2-BC20C-1C-0 f -~ SBUS -2-BC20C-3C —>\ ~ LA3l 4 r p— o —— T ~ ) ) 17 3 2 11740 Al S B L.I . f"l lE._J D CPU || r ) pad | o B c -7 D !B Mmd ot £ | |PERIPHERALS DRAWER | (ABO1) (CD20) F | — ) | "‘%%N“"/J '—18 (DD11-B)| ABO4 q L E | ¢ | SBUS-2-BC20C- 3C — A - E I_._J | ?~ C . A -~ ) J X uniBus-1-8CitA-17-0 UNIBUS -1-BCI1A~13-0 HC MEMORY # 1 D DTE20 UBUS 2 7\6 5 4 DTE20 7u3u51 TS 1/0 PROCESSOR J DTE 20 K L ////7' UBUS 3 FRONT END PROCESSOR rd \_ TO DD11B DTE20 4 UBUS ABO4 \—__ TO CD20 ABO1 10-2477 [—— of [AV] R " 00 o CPU CAB nterconnections (KL 10-C) 5-10 Table 5-1 Parts Required to Assemble CPU Cabinets No. Needed Part No. Description 4 70-11838 Filler bar assembly 2 74-14403 Top filler strip 1 70-12196 Shield weldment 3 74-15268 Support shield (Figures 5-2 - 5-4) 5 74-15394 U.L. shield (Figures 5-2 - 5-4) 1 74-15476 Cover shield (Figures 5-2 - 5-4) 2 Bolting package For Hi Boy cabinets (6) 9006241-9 2 | 2 6 No. 1/4 external-tooth lock washer No. 1/4-20 Kep nuts Hardware package For filler strips (20) 9006071-3 (20) 9007651 No. 10-32 +£0.38 Phillips truss screw No. 10 external-tooth lock washer Hardware package For U.L. shields (4) 9006563 (6) 9006055-1 No. 8-32 Kep nuts No. 1/4-20 +£0.38 Phillips pan head screw (6) 9009025 (6) 9006724 0.281 ID +0.873 OD flat washer No. 1/4 external-tooth lock washer Hardware package Ground straps (1) 9008887 (2) 9006565 (2) 9006071-3 (4) 9007651 10 inch ground strap No. 10-32 Kep nuts No. 10-32 £0.62 Phillips truss head No. 10 external-tooth lock washer Hardware Package Leveling feet (12) 9007600 Leveling feet Weld nuts Kep nuts Screws (12) 9008878 (24) 9008185 (24) 9006024-1 5.3.2 No. 1/4-20 £0.5 hex head screw (6) 9006724 (6) 9008203 Cabinet 2 - Cabinet 1 Assembly 1. Repeat step 3 in Paragraph 5.3.1. 2. Place shield weldment in bottom of cabinet 2. Slide main power cable from cabinet 1 through U.L. shield weldment on cabinet 2 (see Figure 5-2); at the same time wheel cabinet 1 close to cabinet 2. Repeat steps 8, 9, 10, and 11 in Paragraph 5.3.1 for front-end cabinet (cabinet 1). Memory 2 (Option) Cabling Interconnections (Figure 5-8) 5.3.3 l. Connect memory 2 harness to H7420 power supplies (2) on cabinet 3 rear door (Mate-N. Lok). Tie wrap harness. Connect pins 3 (white) and 7 (red) to Mate-N-Lok on both H7420 power supplies. Connect memory 2 ac (H7420) cords on cabinet 2 from 863 power control to front-end cabinet (J24 and J26). Tie wrap cords. Cabinet 3 to Cabinet 2 and Cabinet 1 Cabling Connections (Figure 5-8) 5.34 Connect number 2 gauge cap wires at capacitor bank to their corresponding labels (5, 6, 7, 8, 9, 10, and 11). Torque to 132 in-1b. Replace strain relief support plate (two screws only); cable routing bracket, and Dakota clamp cover at cabinet 2 - 3 interface. Replace Lexan cover (cap box). Remove U.L. Lexan shield of H761 on rear door of cabinet 3. Attach Mate-N-Loks at H761 connections labeled P1 to J1 and P7 to J8, respectively. Connect color-coded wires J4, J5, J6 to correspondingly color-coded terminals of H761 (Figure 5-8). Tie wrap wires to cable harness. Replace U.L. Lexan shield on H761. Connect CPU blower ac plug (4-pin Mate-N-Lok at blower). 10. Connect BC20 and BC11 cables from CPU to memory 1, memory 2 (if present), and I/0O. 11. Connect Mate-N-Lok P14 to J14. 12. Connect Mate-N-Lok P8 to J8. 13. Connect exhaust fans to 2-pin Mate-N-Lok located in bottom of CPU cabinet. 14. Connect ac cords for memory 1 H7420 power supplies. Cabinet 1 — Cabinet 2 (Front End - I/O Cabling Interconnections) 5.3.5 1. Roll maintenance panel wires (R and B) and (W and B) from cabinet 2. 2. Connect maintenance panel wires (R and B) and (W and B) to DTE (J1 4-pin Mate-N-Lok). 3. Tie wrap wires to cabinet 2. 5-12 Roll H760 5-conductor extension cord at 863 power control (J1). Connect to 863-J 1. | Roll all H7420 power cords from cabinet 2 to 863 cabinet 1. Connect all H7420 power cords to their respective 863 jacks (for phase balance) (Figure 5-8). Tie wrap cords to cabinet 1 frame. Unroll Unibus from cabinet 1 to cabinet 2. 10. Connect Unibus to respective DTE connectors as labeled (Figure 5-9). 11. Roll fault harness from cabinet 2 to cabinet 1. 12. Connect fault harness at cabinet 1, 863 power control Mate-N-Loks labeled P1 to J6 and P2 to JS. 13. Tie wrap harness onto cabinet 1. 5.3.6 Leveling Feet Lower the leveling feet (see Figure 5-6). Ensure that all leveling feet are planted firmly on the floor and that the equipment is all kept level. Raise the I/O cabinet with the leveling feet until rubber grommets begin to bow out slightly (Figure 5-6). 3.3.7 Final KL10-C (2040) Central Processor Assembly 1. Replace cover shield of cabinet 2 with four 8-32 nuts (Figures 5-2 - 5-4). 2. Replace filler strips (6) for all three cabinets. At this point, since all three cabinets are bolted together, there is no need to have the arm stabilizer extended. If traffic around the machine requires the removal of the arm stabilizer, unbolt rear arm stabilizers and slide them in. Arm stabilizers should never be discarded; they should remain on the site in the event there is a future need to break the machine apart. Install U.L. shields and bracket in CPU cabinet (Figure 5-3). Install U.L. shields and bracket in front end cabinet (Figure 5-3). Remove PDP-11-type shipping brackets from front end cabinet. Replace doors, air inlets, top covers, filler strips, and ground straps. 5.4 SYSTEM GROUNDING Refer to the system grounding scheme as laid out by the installation planner and connect the grounding accordingly. | NOTE , Planning of this ground should have been discussed with the customer during site preparation planning. 5-13 5.5 CHECKING GROUND WIRES 5.6 CUSTOMER VOLTAGE CHECKS Check all ground wires that are connecting the system frames. Ensure that the ground lugs are making firm contact with the metal on the system cabinet frames (e.g., no paint between wire lugs and frames). All ground connections should have lock washers behind the ground strap lugs. | Check the customer’s ac power for proper voltage, proper phasing, correctly wired power receptacles, and to ensure that ac ground is connected to all ground pins in all power receptacles for this computer system. Use a DVM. Reference the DECSYSTEM-20 Site Preparation Guide individual option data sheets for ac requirements. WARNING It is very important that safety ground be obtained throughout the system to minimize the possibility of injury to personnel or damage to the equipment. 5.7 COMPONENT CHECKS 5.8 FASTENER CHECKS 5.9 CABLING CHECKS Check each power supply and controller for damage, loose components, loose screws, or extra hardware that may be laying on or lodged into a component board. Check the fans for the supplies to ensure that cables and harnesses are clear of the fan blades and that the fans turn freely. Check all the crimps that are in all Mate-N-Lok connectors, Faston tabs, lugs, etc., for solid con‘nections. This can be accomplished by pulling on the wires. If a lug pulls out, reconnect it to its plug and/or jack. Also, ensure that all connectors are seated properly. Check all the cables and harnesses for crushed wires, cut wires, wires smashed together, etc. (especially under logic cabinet door hinges). If any exist, repair or replace the wire(s) or harness. 5.10 SHORT CIRCUIT CHECKS Using a multimeter, check for short circuits between the voltage terminals and ground on all the power supplies. NOTE Usually resistance reading is low, approximately S ohms, depending on the load. 5.11 BACKPLANE CHECKS Visually inspect each logic backplane for bent pins, crushed or broken wires, foreign material lodged between pins, or any other abnormality. 5.12 VISUAL INSPECTION Visually inspect between every module for any hardware (nuts, screws, washers, etc.) that may be lodged between them. Inspect the entire system including the free-standing peripheral devices. Ensure that all modules are in their correct slots and none are upside-down. 5-14 5.13 SYSTEM CABLES (Also refer to Chapter 7) Refer to the detailed cabling diagram prepared before system delivery, and install the system cables in the order indicated, observing manufacturing cable tags (refer to Chapter 7). NOTE All cables should be run from point to point, keeping the following requirements in mind. 1. All cables (including ground cables) run under the flooring except RP04/06 cables, which run above floor between drives. Refer to the RP04/06 maintenance manual for further information. 2. All cables should be labeled on both ends, stating the device type and the slot numbers where they come from and go to. 3. Signal cables should not run parallel with power cables, but should cross them at a 90 degree angle. 4. Cables should not be drawn tight around cabinet corners or floor posts. 5.14 CABLE INSTALLATION Proceed as follows. 1. Install the power cables to all devices. CAUTION Check to ensure that all circuit breakers in the main power box and internal to each device are in the OFF position. Also, ensure that all devices are in LOCAL until the system is fully checked out. 2. Connect all device cables (and terminators, if applicable). 3. Connect all the DIGITAL power control bus cables. 4. Recheck all power and system cabling and grounding before continuing. 5. Recheck to ensure that all shipping restraints have been removed. 5-15 CHAPTER 6 SYSTEM INTEGRATION 6.1 INTRODUCTION | At this point all internal cabling within the processor should be completed. The remainder of the installation consists of all peripheral devices and their associated interface and power cables. All device interface cables will be routed into the CPU via a hole cut in a tile of the false floor, beneath the 1/0O cabinet. An exception is the modem cables which are routed through a hole in the false floor beneath the front end cabinet. NOTE All holes should be sealed following final cable placement. 6.2 RP04/06 DISK DRIVES 1. Refer to the ISS Service Manual and RP04 Disk Drive Installation Manual (EK-RP04-IN- 001) for RP04 installation procedure, and to the Memorex 677-01/51 Technical Manual for RPO06 drive installation procedure. 2. One 3-phase power source may supply up to two drives. If a third or fourth drive is to be 3. The first drive (drive 0) is always dual-ported. The port switch on the control panel of the drive should be in the A /B position (except while running diagnostics). Additional drives are selected port A. 4. The Massbus cable from channel 0 should always be connected to port A; however, it can be connected to channel 1 during initial checkout. 5. usedin the system, a separate supply source w111 be required. Ensure correct voltage settings in the drive. The BC06S Massbus cable from the front end RH11 should be connected to port B. The plug connection at the front endis located below the 11/40 and to the right of the 863 power controller (as viewed from the front). 6. A Massbus terminator should be connected to the OUT slot for port B. If the system has one drive only, a Massbus terminator must be connected to the OUT slot of Port A. For additional drives continue the Massbus cabling and terminate port A of the last drive in the system. Check that W2 has been removed from the terminator (Enable MASSFAIL). 7. Check the drive number selection switches on the M7775 module in each DCL for correct setting (RP04). Set for 0 in RP06. 8. Remove red carriageway hold-down clip (RP04). 9. Remove the shipping hardware (RP06). 6.3 TU45 MAGNETIC TAPE DRIVES Refer to Pertec service manual for drive installation procedure. Connect BC06S Massbus cable between channel 1 and the Massbus connector in the master TU45 drive (if more than one drive is on the system). This is the drive containing the TMO02/3 controller. Connect Massbus terminator to the out slot of the Massbus connector. Check for W2 as in step 6 (Paragraph 6.2). in the last drive on Ensure that the six resistor terminator chips on the M8921 are installed the system. Also check that other drives do not have the terminators installed. With more than one drive the slave bus is connected between the MTAs in each TU4S. -These connections are as follows. MTA 1st TU45 J6 J8 J10 MTA 2nd TU45 to to to SB1 SB2 SB3 These cables have been twisted between output and input; i.e., rough side of the cable outermost from the Js and smooth side outermost into the SBs. 5. 6.4 Connect single-phase power to each drive. Ensure drives are set for correct input voltage. LP20 LINE PRINTER 1. 2. Refer to Data Products Service Manual for unit installation. Connect interface cable from the line printer to the LP20 plate assembly connector located to the left of the 863 power controller (viewed from front). Connect single-phase power. Ensure printer is set for correct voltage. Remove the hammer bank shipping clip (located to the left of the bank) if it is on the LP05. 6.5 CARD READER Refer to the appropriate documentation service manual for installation procedure. Remove the two red painted shipping screws from the base of the reader (M200). Connect interface cable from card reader to slot B02 of the CD20 controller in the periph- eral expander box. . 4. 6.6 Connect single-phase power. Ensure reader is set for correct input voltage. LA36 CONSOLE DEVICE 1. Connect interface cable to 4-pin connector plug located to the right of the 863 power con- trol. 2. Connect power lead to a single-phase power receptacle. 6-2 6.7 DC20 COMMUNICATIONS NOTE These cables can be connected after the diagnostic checkout for the DC20. 6.8 1. Connect the BCO5D or BCO3M cables to the H317B patch panel and dress the cables as per KL10C vol. I CPU assembly sheets 4, 11, and 12. 2. In many countries, fused barrier boxes are necessary for modem protection. Cables with this type of protection are normally obtained through CSS. GROUNDING Supplied with each system are several no. 4 gauge black ground cables. These cables are connected from earth lugs on the frames of peripheral devices back to the CPU frame. In general they should run parallel to the interface cables. The short (2.5 ft) no. 4 cables are used to connect adjacent devices such as multiple disk drives or multiple magnetic tape drives. 6.9 DN20 SUBSYSTEM This is a complex subsystem and requires a separate section to cover its complete installation process. Refer to Chapter 2 of the DN2X Communications Subsystem Technical Manual (EK-ODN2X-TM001) for system integration. CHAPTER 7 POWER CHECKOUT 7.1 PREPOWER CHECKOUT PROCEDURES (Figure 7-1) Perform the prepower-up procedures described in the following paragraphs. ‘WARNING The H760 power supply produces lethal current. Extreme caution should be observed whenever working with or near the power supply. NOTE Some emergency power systems are connected to fire alarm systems. If this is true, be sure the proper customer authorities are notified that power is being applied for the first time. < START ’ PERFORM THE PRE- STEP INITIAL 7. POWER-UP CHECK- __7l__- OUT PROCEDURES. \ BEGIN PERFORM- 7.23 ING THE POWER- 7.2.3 UP PROCEDURES. \ 7.2.3 CHECK THE LOGIC POWER WIRING. 7.2.3 (2) %‘ Figure 7-1 10-2917 System Checkout Flowchart (Sheet 1 of 4) 7-1 STEP PLACE SITES MAIN INITIAL 7.2.3 POWER FEED DISCONNECT SWITCH TO THE ON POSI- TION, 7.2.3 (8) TURN POWER FEED SMOKE OR OTHER OBVIOUS PROBLEM YES 1 7.2.3 TURN SYSTEM 7.2.3 DISCONNECT SWITCH OFF IMMEDIATELY, TROUBLESHOOT 7.2.3(8) AND REPAIR. POWER SUPPLIES AND CONTROLLERS 7.2.3 (9) ON. SWITCH OFF OVERRIDE SWITCH S1 7.2.3 (10) {ON 863) PLACE THE IS SYSTEM LOCK SYSTEM 7.2.3 OFF SWITCH IN LOCK OFF SWITCH DOWN THE DOWN POSITION. 7.2.3 (11) TROUBLESHOOT PROBLEM AND REPAIR TROUBLESHOOT 7.2.3(12) 7.2.3 PROBLEM AND REPAIR. 7.2.3(13) MEASURE CPU BACK-] 723 PLANE - 5.2V REGU- LATOR OUTPUTS. 7.2.3 (14) 10-2918 Figure 7-1 System Checkout Flowchart (Sheet 2 of 4) STEP MEASURE CPU BACK- 7.2.3 PLANE - 2V OUT- 7.2.3 (15) PUTS. A INITIAL 7.2.3 CHECK G8010 AND G8011 LEDS. MEASURE CPU BACK- 7.2.3 (16) 723 PLANE +5V REGULA- 7.23(17) TOR OUTPUTS. MEASURE /O BACKPLANE 5V, +5V AND 7.2.3 -15V REGULATOR 7.2.3(18) OUTPUTS. 7.2.3 MEASURE MEMORY #1 AND MEMORY #2 (OPTIONAL} BACK- PLANE +5V, -20V, -6V REGULATOR OUTPUTS 7.2.3(19) 10-2920 Figure 7-1 System Checkout Flowchart (Sheet 3 of 4) STEP MEASURE THE +5V, INITIAL 7.2.3 5V, -15V AND +20V 11/40 BACK PLANE POWER TABS. 7.2.3 (20) 7.2.3 MEASURE +5V, -15V, +15V PERIPHERAL DRAWER BACKPLANE POWER TABS. 7.2.3 (21) 1 CHECK ALL AIR AND DOOR SENSORS FOR CORRECT OPERATION. ( EXIT ) 7.2.3 (23) PROCEED TO FIGURE 8-1, DIAGNOSTIC CHECKOUT FLOWCHART 10-2921 Figure 7-1 7.1.1 System Checkout Flowchart (Sheet 4 of 4) 11/40 CPU - Front End 1. Pull out and fully extend the 11/40 CPU. 2. Check all connections from the H7420 power supply and voltage regulators to the 11/40 power distribution panel. Check to ensure that all harnesses are secured and that all connections are properly made. Refer to the 2040 Console Processor Power Harness Distribution Print Set No. 7011448-0-0 (sheet 6 of 12). Check to ensure that all modules are seated properly. Ensure that the power distribution is correct (refer to the 2040 Console Processor Harness Distribution Print Set). 7.1.2 Peripheral Drawers 1. Pull and fully extend the peripherals drawer. 2. Check all connections from the H7420 power supply and H744 voltage regulators to the peripherals drawer. 7-4 3. - Check to ensure that all harnesses are secured and that all connections are properly made. (Refer to Arithmetic Processor, D-UA-KL10-C-0, sheet 7 of 12.) 4. Check to ensure that all modules are seated properly. 5. Ensure that the power distribution is correct. (Refer to Arithmetic Processor, D-UA-KL10- 7.1.3 C-0, sheet 7 of 12.) 863 Power Control 1. Check thé connections of all the J plugs located on the front of the 863 power control. 2. Check the connections of the J2 and J3 plugs located on the rear of the 863 power control. 3. Place the 863 power control LOCAL-REMOTE switch to the LOCAL position. 4. Check to ensure that the OVERRIDE switch is in the OFF (down) position. 7.1.4 861 Power Control 1. Place the 861 power control LOCAL-REMOTE switch to the LOCAL position. 2. Ensure the J3 connection is secure. 7.1.5 H761 Regulated Power Supply 1. Remove screen assembly from H761. 2. Check all Faston tabs andr terminal connections in power supply. 3. Ensure proper seating of G8010, G8011, G8013, and G8014. 4. Do not replace screen assembly until voltage checks and adjustments have been completed. 5. Ensure that the J1 and J8 plug connections are secure. 6. Verify that all harnesses and connections are secure and properly made. Refer to the KL10-C print set. 7.1.6 H7420 Power Supplies and Associated Voltage Regulators 1. The H7420 power supplies and associated voltage regulators are located in the CPU and I/O cabinet. 2. 7.2 Verify that all harnesses and connections are secure and properly made. SYSTEMS CHECKOUT The systems checkout procedures flowchart is shown in Figure 7-1. 7.2.1 Print Set Definitions The KL10 print set, entitled 2040 Console Processor (7011418-0-0 and D-UA-KL10C-0) contains the following information for each front-end option. 1. The optlon name, number, and wire list revision (if applicable; e.g., KD11A, 11/40 processor, wire list Rev. F). 7-5 2. Each option backplane revision, etch, and number (e.g., 5410904 etched backplane Etch Rev. C, CS Rev. C, 11/40 CPU). 3. Every module of each option, listed individually with information pertaining to: a. The lowest acceptable revision (CS and etch) b. The status and use of each jumper (in or out) c. Any necessary cable information, e.g., cable type and connection locations d. Information }'elative to any other configurable component (e.g., crystal frequency, speed group, and potentiometer setting for DL11). . 7.2.2 PDP-11/40 and Peripheral Drawer Power Harness The power harness cablmg internal to the PDP-11/40 (BA 11-F) and peripherals drawer (BA11-F)is normally connected prior to shipment andis, therefore, not reconfigured at the site. However, if either harness becomes disconnected or has to be replaced, refer to Chapter 6 of the PDP-11/40 system manual for complete instructions, and refer to print set no. 7011418-0-0. 7.2.3 Power Checkout Procedures (Figure 7'-1) Begin the systems checkout procedure by performing the various power-up procedures on the computer system sections in the following order. 1. Switch Panel a. b. Ensure that the SYSTEM ON switch is in the OFF position. Ensure that the SYSTEM OFF LOCK switch is in the down position; this will allow the system to follow the normal POWER ON/OFF switch. NOTE , In order to reset the SYSTEM OFF LOCK switch, insert nonconductive pin upward through the cutout on the bottom of switch panel. Gently press upward on the lock with pin, while pressing lower half of this switch until it is in the down (OFF) position. c. 2. Place the override switch S1 (on front of 863) OFF (down). Logic Power Wiring a. Check all the power wiring connections to the memories (memory 2 optional), CPU, and I/0 backplanes to ensure that no errors have been made in placement of the wiring harness, e.g., power connected to ground tabs, sense lines on incorrect pins, etc. Refer to the KL10-C-0 and MA20 (D-IC-MA20-PW) ac/dc wiring prints while checking these wiring connections. b. Using the X1 ohms scale on a VOM, check for short circuits between the listed power tabs and grounds on the following backplanes. Refer to the 2040 Console Processor (7011418 and KL10-C-0) prints for these connections. (1) CPU +5V,-2V:A,B,C,D -5V,-2V:A-K 7-6 c. +5V:A,B,C,D,E,F, H,J,K (2) I/0 3) Memory 1 +5V:A,E,F, L -5V:B,C, D, H,J,K (4) Memory 2 +5V:AE,F, L -5V:B,C, D, H,J,K -5V:A-K +15V:A-K -15V:A-K Using the X1 ohms scale on a VOM check for short circuits between the listed power - tabs and ground. (1) KD11-A +5V,+15V,and-15V 2) MF11-UP, MM11-UP +5V,-5V,and +20V 3) RHI11-AB +5V,+15V,and-15V 4) DDI11-B +5V,+15V,and-15V (5) CDl11 +5V,+15V,and-15V (6) DHI11 no. 1 +5Vand-15V @ D1l no.2 +5Vand-15V (8) LP20 no. 1 SV ©) LP20 no. 2 +5V Ensure that the main power feed disconnect switch is OFF. are OFF. Check again that all console power switches Check the module placement with the MU list. Ensure that the main power check is complete. Connect the 2040 main power cable to its power source. Place the site’s main power feed disconnect switch in the ON position. - NOTE This, essentially, is a “smoke test.” If problems occur at this time, turn power OFF immediately and proceed to troubleshoot the problem. Check to ensure that the circuit breakers on the power supplies and power controls listed below are all ON. a.” H7420 power supply 1 b. 863-D power control 7-7 c. 861-D power control d. H760 power supply e. H761 power supply f. H7420 power supply 2 g. H7420 power supply 3 h. H7420 power supply 4 i. H7420 power supply 5 j. H7420 power supply 6 (optional) k. H7420 power supply 7 (optional) 1. H7420 power supply - peripherals drawer m. M7420 power supply - 11/40 CPU 10. Set override switch (S1) on 863 to OFF. 11. After checking to be sure that the SYSTEM LOCK OFF switch is still in the down position, place the 2040 SYSTEM ON switch, located on the switch panel, to the ON position. 12, If FAULT light illuminates, troubleshoot problem and repair. 13. Check to ensure that all fans are operating. 14. Connect a DVM between the -5.2 A sense output (sense tab ST17) 6n the CPU backplane and the corresponding ground (sense tab ST16). Adjust the -5.2 V potentiometer (R 14) on the G8013 module (Figure 7-2) so that the sense voltage read is -5.2 V. Then, using the DVM, measure the other sense outputs (-5.2B, C, D, E, F, H, J, and K) and check that the sense voltage is -5.2 V, The relative measuring points are listed below. 15. Sense Output Sense Tab Ground -5.2B -5.2C -5.2D -5.2E -5.2F -5.2H -5.2] -5.2K ST19 ST1 ST2 ST13 ST17 ST5 ST3 ST10 ST18 PT15-U PT17-U PT27-L STé6 ST4 ST4 ST11 | Connect a DVM between the -2 A sense output (sense tab ST15) on the CPU backplane and the corresponding ground (sense tab ST16). Adjust the -2.0 V potentiometer (R21) on the G8013 module (Figure 7-2) so that the sense voltage read is as close to 2.0 V as possible. 7-8 R21,-2V o] B -2v 68013 G8010 | 68010 | BLANK | GOB811 I _ gost! CONTROL G8013 LOW VOLTAGE SENSE | 68014 N A | S R14,-5.2V 68010 IS I O I N O TN O N -5.2v+ l 10-2052 Figure 7-2 Sense Voltage Potentiometer Locations Then, using the DVM measure the other sense outputs and check that the sense voltages are -2.0 V. The relative measuring points are listed below. Sense Output Sense Téb Ground -2B ST14 PT15-L -2D ST8 ST9 22C 16. 17. ST12 STI11 Figure 7-3 shows the G8010 and G8011 modules and their relative positions in the regulator circuitry. Three LEDs are on each module. LEDs that are labeled (Figure 7-2) should be on; those not labeled should be off. Each letter relates to a sense voltage that was checked earlier. Ensure that all LEDs that should be on are illuminated. Using a DVM, measure the +5 V regulator outputs at CPU backplane power tabs PT16-L and PT6-U. All voltages should read +5 V. Adjust the regulators as necessary. Refer to drawing D-UA-KL10-C-0, I/O DC Wiring, to identify the relative +5 V regulators. 7-9 — -5.2V 1 M ONA B 68010 \C 68010 \H Y 68010 1 K BLANK [ -2.0v | A P N\C A G801 X I 68013 | G8014 | | B G8O11 | | ] 1 J 10-2053 Figure 7-3 18. Voltage Sense LEDs I/O Backplane Power Wiring a. Using a DVM, measure the following regulator outputs at 1/O backplane power tabs. Voltages should read +5 V and -5 V. Adjust the appropriate regulators as necessary. Refer to drawing D-UA-KL10-C-0, I/O DC Wiring, to identify regulators. (1) +5V: PT9-U, PT11-U, PT13-U, PT15-U, PT17-U, PT19-U, PT21-U, PT23-U (2) -5V:PT25-U, PT25-L, and DTE If DIA/DMA-20 option is installed, make the following measurements. Adjust appropriate regulators if necessary. 19. (1) +5 V: PT1-U, PT7-U, PTI-L, and PT7-L (2) -5 V: PT6-U and PT6-L (3) -15V: PT3-U Memory Backplane Power Wiring a. Using a DVM, measure the following regulator outputs at memory 1 backplane upper and lower power tabs. Adjust appropriate regulators as required. Refer to drawing D-IC-MA20-0-0-PW, MA20 AC/DC Power Wiring, to identify +5 V, -20 V, and -5 V regulators. (1) (2) +5 V upper: PTOA, PT13A, PTOB, and PT13B +5 V lower: PT2A, PT15A, PT2B, and PT15B -20 V upper: PTSA, PT8A, PT11A, PT5B, PT8B, and PT11B -20 V lower: PT5A, PT8A, PT11A, PT5B, PT8B, and PT11B 7-10 (3) -5 V upper: PT4B, PT10A, and PT7A If memory 2 option is installed, use a DVM to measure regulator outputs at backplane upper and lower power tabs. Adjust appropriate regulators as required. 20. (1) +5 V upper: PTOA, PT13A, PTOB, and PT13B +5 V lower: PT2A, PT15A, PT2B, and PT15B (2) -20 V upper: PT5A, PT8A, PT11A, PT5B, PT8B, and PT11B _20 V lower: PT5A, PT8A, PT11A, PT5B, PT8B, and PT11B (3) -5V upper: PT4B, PT10A, and PT7A Using a DVM, measure all the voltages on the PDP-11/40 backplane power tabs. Voltages should be as follows: +5 V, =15V, and +20 V. Adjust the appropriate regulators as necessary. Refer to 2040 Console Processor drawing (20114-8, sheet 6 of 12) for the various power tab definitions and for the regulator locations. 21. Using a DVM, measure all the voltages on the peripheral drawer backplane power tabs. Voltages should be as follows: +5 V, +15 V, -15 V. Adjust the appropriate regulators as necessary. Refer to the Arithmetic Processor drawing D-UA-KL10-C-0, sheet 7 of 33 for the various power tab definitions and for the regulator locations. 22. Remove power from the system and replace screen on H761. 23. Trip Circuitry Test a. Using a DVM, measure the voltage on the H770 in the I/O cabinet H7420 no. 3 (bottom one). Adjust for +15 Vdc. Place S1 up (override ON). Place a finger over one of the airflow sensors under the CPU bay. The fault light on the front panel should come ON, and the AIRFLOW CPU LED should light on the 863 power controller. Insert a scope probe on the corresponding yellow wire on plug P2 (on 863) and place a finger on the air sensors one at a time under the CPU. The HI level on scope should go to ground almost immediately as the airflow is blocked. Do this for all CPU sensors. Repeat the last process for all the memory and I /O airflow sensors. NOTE These sensors will take approximately 30 seconds to 1 minute to cause a trip, whereas the CPU sensor trips almost immediately. Check that the module bay door microswitches for the CPU, memory, and 1/O all cause fault indications. Now check to see if a fault will shut the machine down. First clear all faults, place S1 down (override off) then cause each of the above faults and the machine should power down. The W813 in the 863 controller is at fault if the machine fails to power down. 7-11 CHAPTER 8 SYSTEM CHECKOUT 8.1 INTRODUCTION This section provides the installation engineer with a diagnostic sequence that must be successfully completed before the TOPS-20 monitor can be loaded and run. Any problems or errors that occur should be corrected and any associated diagnostics rerun before continuing with the sequential checkout. The diagnostic run sequence is flowcharted in Figure 8-1. Samples of the diagnostics are shown in Appendix B. If an option which is listed is not included in the system, skip the associated diagnostic process for that option and proceed to the next step. For NORAM the completion of this section constitutes running standard test procedures and beginning the 90-day warranty period. ‘ ’ START TEST EQUIPMENT AVAILABLE GET TEST NO EQUIPMENT STOP INITIAL 8.2 E— R YES o —_— RUN ALL FRONT END —_— DIAGNOSTICS ANY FAILURES YES | —_ FIX PROBLEM AND RETEST NO 8.9 =2 RUN B.CMD YES —_ FIX PROBLEM AND RETEST NO MR-1352 Figure 8-1 Diagnostic Checkout Flowchart (Sheet 1 of 3) 8-1 N STEP INITIAL RUN MEMORY DIAGNOSTICS ANY FAILURES FiX PROBLEM OR AND RETEST ADJ'S NO 8.1 RUN CHANNEL DIAGNOSTICS ANY FAILURES FIX PROBLEM OR AND RETEST ADJS NO RUN RP 8.12 DISK DIAGNOSTICS ANY FAILURES FIX PROBLEM OR AND RETEST ADJ’S MR-1353 Figure 8-1 Diagnostic Checkout Flowchart (Sheet 2 of 3) 8-2 STEP INITIAL 8.13 RUN MAGTAPE DIAGNOSTICS ANY FAILURES FIX PROBLEM AND RETEST CHECKOUT OPTIONAL —————— . DN2X SUBSYSTEM 8.14 RUN SYSTEM EXERCISER DFSXA YES FIX PROBLEM 8.15 AND RETEST NO Jo— BOOT KLAD MONITOR AND RUN ACCEPT ANY -8.16 YES FAILURES FIX PROBLEM AND RETEST NO CHECKOUT COMPLETE GO TO CHAPTER O MR-1354 Figure 8-1 8.2 Diagnostic Checkout Flowchart (Sheet 3 of 3) TEST EQUIPMENT Table 8-1 shows the test equipment/media or cqulvalent required for the standard diagnostic checkout procedure. 8.3 8.3.1 TEST SOFTWARE PDP-11 11/40 Front-End Diagnostics RXDP UPD3 COPY DBQEA DZQMC DZBMD DZCDB BIN BIN BIN BIC BIC BIN BIN Floppy Loader Device Utility Program Copy Program 11/40 CPU Memory Parity BM873 ROM - CD11/CD20 Card Reader 8-3 Description e = Qty. Oscilloscope, Tektronix 475 11 e e s e e RP04 DDU or RP06 PERCH tester H315 test connector (DC20) = B Microfiche library TU4S5 Pertec off-line tester RP CE pack (RP04/05/06) N H8611 set test connectors (DC20) Diagnostic floppys s Master skew tape 14 % Scratch magtapes 15 % KLAD-20 pack 13 Scratch disks B 12 Digital voltmeter C.O0.M. microfiche reader e 10 Multimeter e OO0 IO\ B W - 1] - e Table 8-1 Equipment for Diagnostic Checkout Scratch floppys 16 *Dependent on number of drives on system. DZDLC DZKWA DZRXB DZRXA DZDHM DZDHN DZDHK DXLPB DZRJA DZRJB DZRJC DZRJD DZRIG DZRJH DZRJI DZRIJJ SY 2040 DZQUX XQLKGO XQLKAO DZKAQ 8.3.2 BIC BIC BIC BIC BIC BIN BIC BIN BIC BIN BIN BIC BIC BIC BIC BIC BIN BIN LIB LIB BIN DL11/E KW11-L . RX11 Floppy Diagnostic RX11 Floppy Reliability DH11 Diagnostic DH 11 Reliability DM11-BB Modem DECsystem-10 LP20 Diagnostic RH11/RP04/5/6 Mechanical and Read/Write RH11/RP04/5/6 Formatter RH11/RP04/5/6 Head Alignment Verification RH11/RP04/5/6 Performance Exercise RH11/RP04/5/6 Diskless Controller RH11/RP0D4/5/6 Diskless Controller RH11/RP04/5/6 Functional Controller RH11/RP04/5/6 Functional Controller 2040 Front End Exerciser Configurator/Linker Monitor Library Module Library PDP-11 Power Fail Test Diagnostic Support Programs KLDCP KLDCPU CDUMP KLDCP KLRXBT XTECO UB BB BIN All All HLP BIN BIN RAM CMD KL10 Diagnostic Console KL10 Console Utility KL10 Console Core Dump Utility Help File KLDCP Floppy Boot Text Editor KL10 Microcode - Model B KL10 Diagnostic Run File - Model B 8-4 BBT CONFG KLLD MEMCON TRACON SUBRTN KLDDT KLDDT DIAMON MAGMON KLCPU KLPROC KLUSR CM WRMEM DGQDE DGQEA DGQDF DGQDG CONFGI CONFGR LOMARC HIMARC LOMARS HIMARS LOMART HIMART MGNOFF 8.3.3 KL10 Boot Ten Run File - Model B Memory Configuration Run File KL10 “SUBRTN” and “KLDDT” Load Console Extension and Memory Configuration Trace Routine PDP-10 Subroutine Program PDP-10 DDT PDP-10 Help File PDP-10 Diagnostic Monitor PDP-10 Magtape Monitor Functional Command Run File “DIAMON” Functional Run File “DIAMON” User Functional Run File Clear Memory Cache Memory Test DLDP - DL11-E Monitor DN2X Bootstrap Loader Program DN2X Front End Loader Ultility DN2X Secondary Front End Monitor Internal Memory Confg - 1 Way Interleave CCL File to Relocate Internal Memories CCL File to Set Low Current Margins CCL File to Set High Current Margins CCL File to Set Low Strobe Margins CCL File to Set High Strobe Margins CCL File to Set Low Threshold Margins CCL File to Set High Threshold Margins CCL File to Clear Margins KL10 Processor Hardware Diagnostics - Model B DHDIAG EBOXB DHKAA DHKAB DIAGB DHKBA DHKBB DHKBC DHKBD DHKCA DHMCA DHMCB DHQFA SWITCH DIACON TRACON DGDTE DGKBE DGMMA 8.3.4 CMD CCL CCL All HLP A10 Al0 HLP A10 A10 CMD CMD CMD CCL CCL All BIN All All CCL CCL CCL CCL CCL CCL CCL CC C CMD RAM All Diagnostic Command Run File EBox Diagnostic Microcode All EBox Part 1 EBox Part 2 RAM All All All All All All All All HLP HLP HLP All All All Memory Control and Memory Paging Logic MBox Channel Loopback Meter Board MBox Cache Option Part 1 . MBox Cache Option Part 2 TRACON Model B Switch Help File Diagnostic Execute Help File TRACON Help File DTE20 10/11 Interface MBox Channel Loopback Memory Reliability MBox Diagnostic Microcode MBox Basic Processor Functional Diagnostics DFKAA DFKAB A10 Al10 Basic Instructions No. 1 Basic Instructions No. 2 8-5 DGKAC DGKAD Al0 A10 DFKBA DGKBB DGKCA DFKDA DFKEA DFKEB DFKFB DFDTE A10 Basic Instruction Reliability A10 A10 Al0 A10 Al0 Al0 A10 Basic Instruction Reliability Advanced Instructions CPU /PI/Memory Reliability Paging Hardware MUUO and User Mode Instruction Timing DTE20 10/11 Interface 8.3.5 Basic Instructions No. 3 Basic Instructions No. 4 Memory Diagnostics DDMMC DDMMD DDMMF A10 Al0 A10 A10 Fast AC Diagnostic Memory BLT/Memory Exerciser Floating Ones/Zeros DDMMG Al10 4096K Memory DDMME 8.3.6 TMO02/TU45 Magtape Diagnostics DFTUE Al0 DFTUF DDTUH Al10 Basic Functions Multidrive Exerciser Al0 Reliability 8.3.7 RH20 Controller Diagnostics DFRHB 8.3.8 Al0 RH20 Device-Less RP04/RP06/(Massbus) Disk Diagnostics DFRPH A10 RH20/RP04 Basic Device DFRPK A10 RH20/RP06 Basic Device 8.3.9 Disk Subsystem Reliability DDRPI Al0 RP04/5/6 Reliability DDRPB SAV User Mode Disk Performance 8.3.10 System Exerciser Tests DFSXA A10 KL 10 Channel/DTE20 Interaction 8.4 DOCUMENTATION The following is a list of print sets and manuals needed if the option is on the system. These are shipped in hard copy form with the system. Refer to the ship list for part numbers. 1. Front End: 11/40 print set (includes KW11-L and DL11) A-AD-7011418-0-0 RHI11-AB MF11-UP/MM11-UP BM783-YD, YF, YH, YG RXI11 RXO01 8-6 LP20 CDl11 DN20 DC20 CPU and Channels: KL10-E print set Vol. 1 and Vol. 2 MB20 print set RH20 print set RP04 print set RPO6 print set TU45 print set TMO02 print set Process sheet RP04-C-0-0 MR0002-TP 8.5 10. Line Printer vender manuals 11. Card Reader vender manuals 12. RP04 vender manuals 13. RPO06 vender manuals 14. TU45 vender manuals STANDARD CONSOLE SWITCHES Nelio RN BT B~ V) Switch 10 Reset (0) Set (1) Allow cache use Allow paging and traps Print full error message Print only first error No function Proceed to next test No function Inhibit cache Inhibit paging and traps Inhibit comment portion Print all errors Halt on test error Scope loop on test error Ring TTY bell on error 8.6 DIAGNOSTIC SOFTWARE REFERENCE Index MD-10-DDXXA is contained on microfiche and can be locatedin the microfiche diagnostic listing. It lists all currently available diagnostics and their latest revision. 8.7 DIAGNOSTIC INPUT MEDIA For the initial checkout of the 11/40 front end the input media will be from an RXO01 floppy disk. Once a certain degree of system integrity has been reached, the diagnostic input media can revert to the KLAD pack. | WARNING Until complete system integrity is guaranteed the RP disk should be write-locked and KLDCP booted from the RXO01 floppy disk. - 87 PHASE A - 11/40 FRONT END AND OPTIONS VERIFICATION 8.8 8.8.1 Load Medium: RX01 Floppy Disk 8.8.2 Applicable Diagnostics Either KLDCP or RXDP console diagnostic monitor can be used when loading front-end diagnostics. Diagnostic Estimated Problem-Free Run Time (Minutes) KDI11-A MFI11-UP BM873-YF KWIIL RZ01/RX11 DBQEA DZQMC DZBMD DZKWA DZRXA 30 30 10 10 15 DC20 DZDHM 30 DZDHN DZDHK DZDLC 30 30 Option - DLIIE LP20 CD20 RH11/RP* DZRXB DZLPL 3 DZRIJG DZRJH DZRIJI DZRIJ ¢ DZRJB 15 10 30 30 . 120 DZRJA DZRID SYSTEMT 8.8.3 SY2040 Overnight (D20 Checkout 8.8.3.1 Indicator Test — Check all function light indicators by using the lamp test switch on the back of the reader. 8.8.3.2 Alpha and Binary Deck Tests - Run the followmg tests (no errors allowed). All MAINDEC tests must be the latest revision. ' 1. Load MAINDEC-11-DZCDE. 2. Load address 200 into the 11/40. 3. Load alpha deck into input hopper. 4. Set all 11/40 switches to zero and press start switch. 5. Run alpha deck through the card reader 10 times. 6. Load address 200 into 11/40. 7. Load binary deck into the input hopper. *Disk pack is 22-sector format. 1Disk pack is 20-sector format. 8-8 8. Set console switch 4, press start. 9. Run binary deck through card reader 10 times. 10. In multiswitch mode check the DZCDB listing for proper switch settings. 8.8.4 8.8.4.1 a. Load two alpha decks into the hopper. Set console switch 5 and check for program halting between decks. b. Run 10 passes in image mode using both alpha and binary decks. c. Run 10 passes in packing mode using both alpha and binary decks. DC20 Verification Equipment Required 1 MAINDEC-11-DZDHM, DZDHN, DZDHK (all at latest rev1s1on) 1 DC20 installedin a KLlO front end 4 H315 test connectors 2 H8611 test connectors 8.8.4.2 DZDHK Modem Control Check 1. Install the H8611 test connectors into J16, J18, J19, and J21 on the H317B patch panel. 2. Load and run diagnostic DZDHZ test group 0 for one pass. 3. If there are more than 16 lines on the system, move the H8611 connector to the next H317B patch panels and repeat the diagnostic test. 4. Once all DM11 modem controls have been checked, ensure that all cables are replaced. 8.8.4.3 DZDHM/DZDHN Checkout 1. Connect one H315 test connector into one line of each 8-line group at the H317B patch panel. 2. Load and run‘the DZDHM/DZDHN diagnostics to check out the functionality of data paths. 3. The other seven lines in each 8-line group may be checked out when the KLAD monitor is up and running. By this time the communications cables should be connected to customer terminals thus allowing LOGIN/LOGOUT facility. 8.9 PHASE B - PDP-11-BASED KL10 AND KL10-BASED KL10 DIAGNOSTIC VERIFICATION 8.9.1 Deskew Check Both RH20 and MB20 Deskew should be checked before proceeding. See Paragraphs 8.18 and 8.19. 8.9.2 Load Medium- RP KLAD Pack Providing the front end has run successfully, the diagnostics for phase B can be loaded from the KLAD pack. However, KLDCP should be loaded from RXO01 floppy disk and the RP disk should be write-locked. 8-9 DTE/CPU Checkout 8.9.3 The 11-based 10 diagnostics may be run in a chained format by using the ) DHDIAG command, and the 10-based 10 diagnostics may be run using the J KLCPU command. DHDIAG and KLCPU can themselves be chained by using the B command. The previous sequence of diagnostics should run error-free at clock source zero (CS0) and clock source one (CS1). Clock source 1 is the fast clock. The B command file takes approximately 30 minutes to run. The last diagnostic in the command file is DFKDA which after 1 pass will enter extended run mode and signify an end pass every 100 passes. The following sequence of diagnostics is the same as the chained command file format. All diagnostics should run error-free at CS1, CRO before continuing. DFKDA can be left running as a reliability test for the back end processor and memory. Option Diagnostiic DTE20 EBox Part 1 EBox Part 2 MBox Test 1 Memory Control MBox Cache Cache RAM Banger Meter Board Channel Control Channel Loopback Basic Instruction 1 Basic Instruction 2 Basic Instruction 3 Basic Instruction 4 Advance Instruction Basic Reliability Paging Monitor And User UUOs DTE20 DHDTE.Al11 DHKAA.A1l DHKAB.A11 DHKBA.A1l DHKBB.AI1 DHMCA.A11 DHMCB.A11 DHKCA A1l DHKBD.Al1l DHKBE.A11 DFKAA.A10 DFKAB.A10 DFKAC.A10 DFKAD.A10 DFKCA.A10 DFKBA.A10 DFKEA.A10 DFKEB.A10 DFDTE.A10 Instruction Timing DFKFB.A10 Functional Reliability DFKDA.A10 Overnight Run Note this is not part of the B. CMD. PHASE C - MEMORY DIAGNOSTIC VERIFICATION 8.10 8.10.1 Introduction The MB20 memory can initially be checked using the 11-based 10 diagnostic DGMMA.. This diagnostic checks basic memory reliability and also has a switch (/MARGINS:X) to enable current, strobe, and threshold margins to be tested. Further memory testing can then be made by using 10-based 10 diagnostics DDMMD, DDMME, DDMMG. 8.10.2 DGMMA.A1l (Set 11SW1 = 1) 1. Run DGMMA at CRO, CSO with no RH switches set for a basic reliability check. 2. Run DGMMA at CRO, CSO with RH switches set for ALL MARGINS (see sample diagnostic for setting). Run time is approximately 30 minutes for 256K. 8-10 8.10.3 DDMMD/DDMMG Memory Exerciser 1. 2. 3. These are A10 files. The BT command should be loaded first. DDMMD is for systems with less than 256K. DDMMBG is for systems with more than 256K. 8.10.4 DDMME BLT Test ' | This is an A 10 file to check the functionality and speed of memory using the BLT instruction. 8.10.5 MB20 Option Diagnostics Option Diagnostics Run Time (Minutes) MB20 DGMMA DDMMD DDMME DDMMG 30 5 8.11 30 PHASE D - RH20 CHANNEL DIAGNOSTIC VERIFICATION This diagnostic is an A10 file and requires that the BT command file be run before being loaded. 1. Run diagnostic at CR0O, CSO. 2. Set SW1 = 1 for multiple RH20 operator-select. Option Diagnostic Run Time (Minutes) RH20 DFRHB 20 8.12 PHASE E - RP DISK DIAGNOSTIC VERIFICATION 8.12.1 Formatting The scratch disk packs should be formatted and verified in 20-sector formats before use. 8.12.2 Error Rates 1. If a disk pack‘has five or more hard bad spots it should not be used. No bad spots are 2. The allowable error rates for RP04/RPO06 are as follows. allowed on surfaces 0 and 1 of cylinder 0. Thirty soft bad spots are allowed. ‘Irrecoverable - 1 error in 1012 bits read Recoverable - 1 error in 109 bits read Seek — 1 error in 106 bits operations 3. Zl Disk pack - attributable errors (bad spots) are any errors (DCK, ECH, OPI, DTE, etc.) which occur on the same cylinder and head (track) more than once, even though they may not occur every time. A record of the pack lpcation of every error should be kept so that pack errors can be identified since they may dccur on a certain area as little as one time in ten or less. If bad spots are seen on the same surface in nifany areas then this may be caused by a weak head. 8-11 Head Alignment Verification (DFRPH or DFRPK) 8.12.3 (Refer to the appropriate alignment procedures in respective technical manuals.) 1. This should be run for eéch disk drive. 2. The DDU (RP04) or PERCH (RP06) should be connected and the CE mounted for 20 3. If a head is outside 480 microinches from dead center then adjustment will be necessary. 4. The final results should be retained for future reference when head drift checks are made at | minutes prior to running the alignment check. preventive maintenance time. 8.12.4 PTIME (DDRPI) 8.12.5 Diagnostics , When running PTIME the average seek time should be within 27.6 to 28.6 ms. Adjustment is necessary if the above is out of specification. Refer to the appropriate adjustment procedure in technical manual. Option Diagnostic Run Time (Minutes) RP Disk DFRPH (RP04) 20 RP Disk Head Alignment DFRPH (RP04) DFRPK (RP06) RP Disk 5 per drive after CE pack DFRPK (RP06) warmup period (20 min). DDRPI 60 per drive Retain final results. Run: FORMAT PTIME ACCEPT RONLY for all drives NOTE For compatibility, run RONLY on all drives and then rotate packs and run RONLY until all packs have cycled through all drives. 8.13 PHASE F - TU45 MAGNETIC TAPE SYSTEM DIAGNOSTIC VERIFICATION The acceptance script ACCEPT should be run on‘all drives present. ACCEPT will run one pass of Bl, B2, R1, and R8. If multiple drives are on the system, then a drive compatibility check should be made. 8.13.1 DFTUE 8.13.2 DFTUK 8.13.3 DFTUF Tests Bl and B2 will test the basic functionality of the drive. | ACCEPT will run'R1 (1600 bits/in) and R8 (800 bits/in) reliability. This is a multiple drive exercise and all drives should be run concurrently for one pass. 8-12 Option TU4 8.13.4 1. 2. 3. Diagnostic Run Time (Minutes) DFTUE (BASIC) 5 per drive DFTUK (RELIABILITY) DFTUF 40 1 pass Errors - No errors are allowed on test Bl. Only write errors due to tape defects are allowed on test B2. Only write errors due to tape defects are allowed on reliability tests. 8.13.5 Adjustment ' If any drive is exhibiting unacceptable errors or is not read/write compatible with other drives, adjustment will be necessary. The TU45 off-line tester should be used together with the associated set-up and adjustment procedure. This allows the drive to be fixed while diagnostic checkout continues. 8.13.6 DFTUE Compatibility Test | This is to be used with multiple drive systems. With DFTUK in core, run IW test, set PDP-10 right half switches to 400010. Type the following responses to the console questions. Density -CR Close Skew Window -CR Data COMPARE Mask - CR SYSERR Recording -N Fast Mode Y or N -Y Verify Tapes -N One write error per pass of tape allowed not due to tape defects. Next, run IR test until all tapes have been rotated and read on each drive. No read errors allowed. Read errors indicate a drive with skew problems. Run IW test. This time answer console questions as follows. Density - 800 Close Skew Window Data Compare Mask SYSERR Recording Fast Mode Y or N Verify Tapes -CR - CR -N -Y -N One write error per pass not due to tape defects is allowed. Next, run IR test until all tapes have been rotated and read on each drive. No read errors allowed. A read error would indicate drive skew problems. 8.14 DN2X COMMUNICATIONS SUBSYSTEM _ The DN2X Communications Subsystem Technical Manual (EK-0DN2X-TM-001) contains a detailed installation and checkout procedure (Chapter 2). The integration of this subsystem with the DECSYSTEM-20 should be made after the standard diagnostic checkout for the basic system has been completed. | 8-13 PHASE G - SYSTEM EXERCISER DFSXA 8.15 | : This system exerciser will interactively check all channels, KL memory, channel devices, and the front end. The channels may be exercised in loopback mode or device read/write mode. An overnight run is desirable prior to booting the KLAD monitor or building a TOPS-20 monitor pack. PHASE H - KLAD-20 MONITOR CHECK 8.16 8.16.1 Introduction 8.16.2 KLDCP Disk Boot Check A copy of KLAD-20.MEM has been shipped with the system. It is important to read this document before continuing. If all preceding diagnostics have run correctly, then the monitor check can begin. However, if any intermittent problems exist, they must be corrected before proceeding. 1. Write-enable the KLAD pack. 2. The procedure to boot KLDCP from the disk using the SW REG is well documented in 3. If KLDCP prompts with CMD:>> then the front end (FE) boots area on the disk is intact. 4. Write-protect the KLAD pack. 5. Core memory should be cleared before continuing. See KLAD-20.MEM Section B to use DN — 8.16.3 S BhWN— 8.16.4 KLAD-20.MEM Section B (Usage of KLAD-20). ’ MZ command to clear memory. KLAD Monitor Disk Boot Check KLAD pack is write-permit Read KLAD-20.MEM Section B2 General Rules Zero KL memory Master reset the CPU (MR) Halt front end Clear front end SW REG Write-permit the RP KLAD pack Press ENABLE and DISK switches simultaneously. Once the TOPS-20 monitor is loaded and response is made to the Date, Time, Why Reload, and Checkd questions, the 72-hour final acceptance and test (FA&T) acceptance package can be set up and run for a final check of system integrity. - NOTE Read Section B2 and Appendix G of KLAD20.MEM. If the LOG files and SYSERR show no unacceptable errors then Chapter 9 of this manual (Hardware Acceptance) may be entered. For NORAM the completion of Chapter 8 constitutes the start of the 90_ day warranty. 8.16.5 KLAD-20 Backup It is important to back up the KLAD monitor on magnetic tape; it might be needed. 8-14 8.17 DECX/11 PROCEDURE/MAP LISTINGS SY 2040 1. Map KWDAO - Timing analysis KWAFO0 - Systems clock RXABO - Floppy RPBEO - RP04 - RH11 DLBAO - DL11-E DTAAO - DTE20 CPCAO - 11/40 CPU BMEAO - BM873 ROMs DMBGO - DM11-BB DHAIO - DH11 - DC20 BKAAO - Worst case memory BKBAO - Monitor check sum CDAEOQO - CD11 - CD20 LPFAOQ - LP20 line printer Switch settings 12 — End of pass print 13 - Inhibit error printout 14 - Inhibit dropping modules after 20 errors 15 - Drop modules on first error (Refer to listings for further explanation.) 8.18 MA20 - MB20 DESKEW PROCEDURE Figure 8-2 is a timing diagram for the MA20/MB20. A CHANGE COMING L I MBOX CLK C H CLKA H | 1 PIN: 2] 43 4D33P1 CH2 ' CLKB H CH2: EXT SYNC 4E22F2 \I_\ CH2 ADJUST: CLKA - 5D26A1 — BEF1 (TOP POTENTIOMETER) CLKA — 5D29A1 — 5EF54 (TOP POTENTIOMETER) CH2: PIN: ADJUST: CLKB — 5D26K1 — 5EF1 (BOTTOM POTENTIOMETER) CLKB — 5D29K1 — 5EF54 (BOTTOM POTENTIOMETER) MR-1350 Figure 8-2 MA20/MB20 Timing Diagram A Tektronix 7000, 475, or equivalent oscilloscope should be used. The scope time base should be 20 ns for initial deskewing, and 2 ns for final deskewing (sweep magnifier X10). 8-15 Final deskewing adjustments will be done at the horizontal centerline. Use equal length probes with grounds. Adjust scope vertical sensitivity to 0.5 Vem for CH1 and CH2. Adjust CH1 vertical position to 1.3 V above centerline. Adjust CH2 vertical position to 1.5 V below centerline. Read the time base between CH1 and CH2 where the signal edges cross the center graticule line. Proceed as follows. a. b. c. Load microcode Set CRO, CSO, FX1 Sync negative External sync on 4E22F2 “A CHANGE COMING L” Channel 1 on 4D33P1 “MTR MBOX CLK C H” Channel 2 on: 5D26A1 - CLKA HA - Adjust top potentiometer on 1-EF 5D29A1 - CLKA H - Adjust top potentiometer on 54-EF. Align CH2 with CHI1 at the centerline where they cross. 10. Magnify the two signals (10X) and adjust the potentiometer so that CH2 crosses CHI1 at 11. centerline. (Do this for both CLKAs.) Channel 2 on: 12. 5D26K1 - CLKB H - Adjust bottom potentiometer 1-EF 5D29K1 - CLKB H - Adjust bottom potentiometer 54-EF. Align CH2 with the third “MBOX CLK” on CHI1 where they cross at the centerline. Magnify the scope (10X) and adjust the potentiometer so that CH2 crosses CH1 at centerline. 13. (Do this for both CLKBs.) 8.19 RH20 DESKEW PROCEDURE The following information and equipment are necessary for the deskew procedure (see Figure 8-3). 1. Use a Tektronix 475 or a 4-trace oscilloscope. 2. Use equal length probes with grounds. All RH20 clocks are deskewed to the MBOX CLK H that produces CHTO H in the channel. Recheck skew whenever the CBus cable or M8556 board is replaced. The potentiometers to be adjusted are located on the M8559 board. The top potentiometer is for RH20 no. 0; the second potentiometer is for RH20 no. 1, etc. | EXT SYNC CHTO H I 4D33P1 . CH1 MBOX CLK H CH2 DP4 CLKH NOOTARWN-=O RH20 NO 4B9K1 2AXXD2 - PINNO 2A36D2 2A33D2 2A30D2 2A27D2 2A24D2 2A21D2 2A18D2 2A15D2 MR-1351 Figure 8-3 RH20 Deskew Timing Diagram Perform the following adjustments. 1. Set CSO - CRO, FXI. 2. Sync positive External sync on 4B9K1 - CHTO H -~ (CHC1) Channel 1 on 4D33P1 - MBOX CLK H - (MTR2) Channel 2 on 2AXXD2 - DP4 CLK H - (DP4) Align 50 percent point of AXX02 (CH2) with the 50 percent point of the MBOX CLK (CH1) that occurs approximately 10 ns before the CHTO clock. Refer to timing diagram. 8-17 . CHAPTER 9 HARDWARE ACCEPTANCE PROCEDURES 9.1 PURPOSE This procedure is intended to provide for the standard field service hardware acceptance of the DECSYSTEM-20. 9.2 GENERAL INFORMATION _ The DECSYSTEM-20 and its peripherals being installed have previously undergone stringent acceptance procedures during manufacture of the system. These procedures included numerous quality and performance tests on individual components and assemblies. In addition to these checks the system has successfully undergone a 72-hour final acceptance test during which the standard monitor, software and user mode diagnostics were run. The system has also undergone a complete diagnostic checkout during its installation phase. The series of tests listed in this chapter are intended as a default hardware acceptance procedure if no other procedure has been requested by the customer. The intent of this procedure is to ensure that the integrity of the system has not been compromised during shipping or installation. 9.3 REQUIREMENTS 1. The system (or option) should be fully installed in accordance with the DECSYSTEM-20 installation procedures described in this manual. All cables, covers, and doors should be on. All preliminary power and ground checks should have been completed. 2. An authorized customer representative should be present to observe and sign each hardware acceptance sheet. 9.4 TEST VERIFICATION The hardware acceptance test verification sheets in Appendix C contain lists of the standard tests to be run for the system and the applicable options. A separate test sheet exists for each subsystem/device available on the DECSYSTEM-20. Only the sheets applicable to the particular system configuration should be used. The tests should be run in the following sequence, with reference to appropriate sheets for procedures. Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6a Sheet 6b Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Front end 11-based isolation 10-based functional Memory RH20 R P04 disk system RPO6 disk system Tape system - Line printer DC20 Card reader Communications Systems exerciser 9-1 9.5 COMPLETION Upon the successful completion of these standard test procedures, the system will be considered to have met the field service criteria for installation and acceptance of the hardware. A copy of the field service summary sheet should be sent to Field Service Product Support MR1-1/S35 upon completion of installation. 9-2 CHAPTER 10 SYSTEM ADD-ON AND ADJUSTMENT PROCEDURES 10.1 MA20/MB20 ADD-ON MEMORY INSTALLATION CHECKOUT, AND ACCEPTANCE PROCEDURE 10.1.1 Introduction MA20 /M B20 add-on installations should be very s1mp1e to perform if care is taken to follow each step outlinedin these procedures. However, there are points that require consideration before entering a customer site. 1. All DECSYSTEM-20s being shipped today have mounting holes (for the H7420 power supplies) set in the CPU back door upright (refer to Paragraph 10.1.5, step 10). However, some of the first DECSYSTEM-20s delivered did not have the mounting holes, and others had them but they were not properly spaced. If a machine has this problem, contact Product Support in Marlboro and they will P1 the necessary equipment to correct the problem. 2. A preinstallation (skidded) checkout procedure is part of this document. The purpose of skidded checkout is to determine if there is any reason why the delivered memory unit should not be mounted in the customer’s system. At this point, look for “catastrophic” problems, not logic or stack problems. 10.1.2 MA20/MB20 Add-On Parts List The MA20/MB20 add-on parts are listed in Table 10-1. Before beginning the installation, read through the entire procedure and become familiar with all diagrams and required parts. Ensure that all required parts have been included. 10.1.2.1 Various MA20 System Components — The various MA20 system components are as follows (module utilization is shown in Figure 10-1). The numbers preceding component parts are quantity designations. MA20-M (16K X 19-bit core memory section) 1 - G114 sense inhibit module 1 - G235 X-Y driver module 1 - H217-B stack module MA20-E (2 storage modules, 32K X 37-bit expansion core memory) 4- MA20-M | MA20-A (Controller pair plus two storage modules) 1 - MA20-E 2 - M8561 control module 2 - M8562 timing module 10-1 Table 10-1 MA20/MB20 Add-On Parts List Quantity 50 Hz 60 Hz Part Number Description Item 1 2 1 1 1 2 1 1 Note 1 Note 2 Note 2 Note 3 MA20/MB20 memory assembly H7420 power supply No. 2 memory harness Duct assembly 1 2 3 4 18 28 30 75 15 10 ft 18 28 30 75 15 10 ft 9007786 9006074-3 9007651 9007032 9008264 Nut, Tinnerman Screws, Phl. truss hd. 10-32 X 62 Washer, ext. tooth no. 10 Cable tie Mount, cable tie, adh. back 1 1 4 4 9107430-29 1209351-03 1209378-00 Wire, no. 18 AWG str. tw-pr. (red/white) HSG connector 3-pin Pin contact 5 6 7 8 9 10 3 4 3 4 9008887 9006565 Ground strap Nut, Kep 10-32 13 14 - 2 9107673-09 Power cord extension 15 2 - 7011432-03 Power cord extension 16 2 2 BC20C-5C SBus cable 17 6 ft 2 ft 6 ft 2ft 9008274 9007241-9 Foam tape 1/8 in spiral wrap 18 19 11 12 NOTES MA20/MB20 memory assembly GC/GD less items 7, 8, 24, 27, 28 from A-PL-MB20-0-0. MA20 PC or PD (items 7 and 8 from A-PL-MB20-0-0). Item 24 from A-PL-MB20-0-0. Items S through 16 are items 27 and 28 from A-PL-MB20-0-00. 10-2 MCO + SMO -3 (CPU CABINET) MC14+SMO-3 (CPU CABINET) MC2+SMO-3 (I/0 CABINET) MC3+SMO-3 (I/0 CABINET) 2|3]als]e]7]8]9]10]11]12]13]14]15]16]17]18]19]|20|21]|22] 23|24] 25| 26]27]28|29] 30] 31|32 33| 34|35/ 36|37 38| 39]40| 41| 42| 43]|44]| 45| 46] 47|48 49]50] 51|52/ 53] 54 688GPg8Gg--Ee2--e2O2222191911o2222HHHH v_|_|||_!_ oY-©STo®oS|BMrn0o_.%ddPH _8T-2I2H a| i%W".H-lD_0n | ) 1 2 4 P19 _ SB% (~@—] 8G-eL2192H I|| M0©fl%.m. L2 TIMING MODULE ! xS _ceZo 1|9 2|3als5|el7|8]9l10]11]12]13]14]15]16]17]18]19]|20]2i|22]|23]24|25]|26!27|28]|29|30]31]|32[33]|34]|35|36|37|38(39[40]41|42| NOTES: 1. Viewed from wire side 2. MU same for CPU and I/0 cabinets TIMING MODULE Gezo ~NL32IS7IHI1NA/3S5ONW3 |G€29 _ / L]OmN Fqoewa = << = |@] o g2d 2 = \ v [ CONNECTION < m - _ MS005 TERMINATOR IF NO CABLE M ©N |_ Gg}2o a m 43|44| 45| 46|47|48|49|50|51]52|53|54 10 -2126 Figure 10-1 MA20 Module Utilization 10-3 2 - M9005 SBus terminator module 2 - H742 power supply 4 — H744 power supply (+5 V) 6 — H754 power supply (+20V) 2 - BC20C SBus cable 1 — 7009894 fan assembly 1 — 7009465 logic assembly MA20-G (Controller pair plus four storage modules) 1 - MA20-A 1-MA20-E MA20-H (Controller pair plus eight storage modules) 1 - MA20-A 3-MA20-E 10.1.2.2 MB20 System Components — The various MB20 system components are as follows (module utilization is shown in Figure 10-2). MB20-M (32K X 19-bit core memory section) 1 - G116 sense inhibit module 1 - G236 X-Y driver module 1 - H224-B stack module MB20-E (two storage modules, 64K X 37-bit expansion core memory) 4 - MB20-M MB20-G (controller pair plus two storage modules) 1 - MB20-E 2 - M8568 control module 2 - M8565 timing module 2 - M9005 SBus terminator module 2 - H7420 power supply 4 - H744 power supply (+5 V) 6 - H754 power supply (+20 V) 2 - BC20C SBus cable 1-1213011 blower assembly 1 -7012773 logic assembly 1. Applicable Documentation, Diagnostics, and Required Tools Documentation Ao o 10.1.3 MA?20 Field Maintenance Print Set, MP00010 MB20 Field Maintenance Print Set MA20 Internal Memory Unit Description, EK-MA020-UD-001 MB20 Internal Memory Unit Description, EK-MB020-UD-001 10-4 MCO + SMO -3 (CPU CABINET) MC1+SMO-3 (CPU CABINET) MC2+SMO-3 (I/0 CABINET) MC3+SMO-3 (I/0 CABINET) (@~] N [ TIMING MODULE [ | 91I9 e} a s8-E[v2aH |s30Y29LG17nO9u8204gSv6wes80DWs6¥W \2] a S <<O 9419 _ 9419 _| CONNECTION | M9S005 TERMINATOR IF NO CABLE [00] =5== cxo=2S2¥z 18] &-0 g aP 99g414-€11t2992HLLXIOIGVSI1IHSHNNI3I/7/3N3IASSONNWI3SS{“|3377NNAAOOWWNMNI1ISS--Qwoeu.ZRnwmar ||| AQoVRHMPNW 979888898¢14---9¢¢9€1vbv2G2G292229889IWHHH 27LATTI0-OHSXY¥IL1H2¥INNN3IOOI/DDAZI333YA7Q7S1NN7N33AASIOONW+]_|_I_[_|W3AIONWAOW27OVNYVIWQWS7/12A “©1o@o-isS@nSnd=tlMga -9991¢€v29299H )||[_ =75©©-YSoe |-g99bg92¢a4--¢-£-o€2€vvtt2gH9922229s228iHHH-HYT]LYW9AANMLA0--OOI-XXVGVX6I1LWY¥YHSS|3¥3NI3AII3AA0I/7IINH3NNNA2AASAA0NOO3833WWI1ISNNN37A|A__g |g [|!g IiA38OOO79WWWvNDQOW,SNaS|o© 022= >0849AANMAN0YYLI11¥G¥0SSQQQ6W378v)sS-| ==P2©oPs~| wos.nnBtFk0g=Nf3slm2SaaOE8N_s.8u~| 2|3]|a|5]e]7|8]910]11][i12]13]14]15]16]17]18]19]20]|21]|22]|23]|24]25]|26]27|28|29]30]31]|32]|33|34|35]|36|37|38|39]|40] 41|42]| 43]44]|45]46|47|48]49]50] 51|52] 53] 54 _9¢29 91_9 213|al|s5|e|7]|8[9]10]11]12][13[14]15]16|17]18[19]|20]|21[22]|23]|24|25]|26]|27|28129]|30]31]|32[33]|34]|35|36]37]|38]39|40[41|42]43|44]|a5|46|47]|48]|49]50](51]52]|53]|54 NOTES: 1. Viewed from wire side 2. MU same for CPU and I/0Q cabinets Figure 10-2 MB20 Module Utilization 10-5 10-2653 Diagnostics g0 A0 O 2. DDMMG.A10 (for.greater than 256K) U.RAM CONFIG.CMD Required Tools = 5e w0 0 TP 3. KLDCP CONEX DGKBB.A11 DDMMD.A10 DGMMA A1l Phillips head screwdriver Wire strippers Diagonal pliers Crimping tool Flat blade screwdriver Adjustable wrench Trimpot adjusting tool DVM Oscilloscope 4. Required Manpower: 2 field service people (1 of them trained in DECSYSTEM-20) 5. Time Required a. b. 8 hours to install and check out Overnight reliability run (approximately 12 hours) 10.1.4 MA20/MB20 Preinstallation (Skidded) Checkout The item numbers in parentheses in the following paragraphs refer to tools listed in Table 10-1. To save time and trouble in the case of catastrophic problems (shipping damage, etc.), the MA20/MB20 memory units have been packaged in such a way as to allow initial checkout of the unit while still skidded. Typically, the package as received will have the number 2 memory harness attached to the MA20/MB20 memory assembly and the H7420 power supplies. For skidded checkout, where the skidded unit will be positioned will be determined by individual site conditions and by SBus cable length restrictions. SBus cables are provided in 5-ft lengths. The most convenient location is behind the CPU cabinet (with CPU cabinet door open), but if there is insufficient space here, an alternative will have to be found. The only cable connections which will be made at this time are the SBus cables and the two H7420 power supply ac cords (item 15 or 16). The vane switch assembly or blower duct is not assembled at this time. Check to make sure fan ac voltage is connected. The memory unit will not be powered up more than fifteen minutes for this initial checkout period and should not be in danger of overheating. Care should be taken to prevent overheating. (For cable connections, refer to Figures 5-8 and 5-9.) After the necessary cabling has been completed, perform the operations in Paragraph 10.1.6, steps 1-7 and 9-10. If there are no major problems after this initial testing, power down the machine and continue with the add-on installation. (Major problems are, for example, cracked backplanes. Logic problems, i.e., controllers or stacks, are not major problems and should not halt the installation.) 10-6 10.1.5 1. Mounting Procedures Disconnect the dc harness from the regulators (H744, H754) on the H7420, and the ac harness (7010805-0-0) from the H7420 transformer housing. Remove the two heads for the internal H7420 fans from plug no. 2, pins 7 and 3 on both power supplies. ' _ The MA20/MB20 memory assembly is to be installed on the mounting door of the I/O cabinet from the outside with the door closed. Refer to Figure 10-3. With the mounting door of the I/O cab closed, install six Tinnerman nuts (item 5) on both the left and right uprights, with nut portion on far side, using holes no. 29, 38,52, 61, 63, and 69, counting from the bottom of the door. Refer to Figure 10-3. CAUTION Do not attempt the next step with fewer than two people. Install the MA20/MB20 memory assembly on the door using the four lowest Tinnerman nuts (on each upright) with eight screws and external-tooth lock washers (items 6 and 7). Refer to Figure 10-3. CAUTION Note that the harness attached to memory assembly is allowed to hang free during step 4. Install foam tape (item 18) along the perimeter of the blower assembly opening which butts up against the duct assembly. Install duct assembly on door using two upper Tinnerman nuts with four screws and external-tooth lock washers. Refer to Figure 10-3. Coil up the harness and insert it under the wire assembly where shown so that it may be routed to adjoining cabinet (Figure 10-3). Move to CPU cabinet and open mounting door to fully open position (Figure 10-4). NOTE The power supplies are installed on the mounting door of the CPU cabinet from the inside with the door open. Refer to Figure 10-5. To the left upright only, install six Tinnerman nuts with nut portion on far side, in holes 2, §, 8, 19, 22, and 25. Reference KL10E Vol. 1, Sheet 18 of 34 (Arithmetic Processor). Remove regulators from power supplies. 10. Assemble one H7420 power supply to upper three Tinnerman nuts with three screws and three external-tooth lock washers. To the right (far side) of power supply, assemble with four screws and four external-tooth lock washers into inserts on upright. 11. 'Repeat for second H7420 with lower Tinnerman nuts. 12. Replace regulators (H744, H754) into H7420 power supplies with P1, P2, P6, and P7 going to H744 and P3, P4, PS5, P8, P9, and P10 to H754 regulators. Use one thumb screw for each regulator from underneath supply and two screws and washers in the top of each regulator. Refer to Figure 10-5. 10-7 DUCT ASSY (-4-) C] @re}—HOLE 69 / y, (4) SCREW (-6-) (2 EACH SIDE) _|o1 @ «@— HOLE 63 (4) EXT TOOTH L'WASHER (-7-) (2 EACH SIDE) : o (o) [ @ 4}—HOLE 61 MA/MB20 MEMORY: ASSY (-1-} // C) @« —HOLE 52 (12) T'NUTS(-5-) (6 EACH SIDE) __..b & HOLE 38 (8) SCREW (-6) (4 EACH SIDE) (8) EXT TOOTH L'WASHER (-7-) (4 EACH SIDE) C] @, <«#{— HOLE 29 of lo] HARNESS (REF.) [oc oo [o © o “— HOLE 20 Jj— 10-2929 Figure 10-3 I/O Processor Cabinet (Rear View - Doors Removed) 10-8 H761 SERIES PASS ASSEMBLY CAPACITOR ASSEMBLY CPU CABINET REAR DOOR 7852-1 Figure 10-4 CPU Cabinet (Inner Door) 10-9 1 | h P1 b P2 b P3 Pa| -\ ¢ p5 C ¢ 1Y © 000 + |b P6 H744 P7 P38 P9 ( NI I D H744 | H744 | H754 | H754 | H754 P10 H744 | H754 | H754 | H754 10-2922 Figure 10-5 DC Power Supplies and Regu.lators (1/0O Processor Cabinet) (Sheet 1 of 2) 10-10 | LI SCREW (-6-) le}———— EXT TOOTH L'WASHER ~ ® {2) H7420 POWER SUPPLY (-2-) \\ ®]o] (-7-) (FARSIDE) \l ¢ o 4 q — T'NUTS (-5-) SCREW (-6-) | EXT TOOTH L'WASHER d ® ( (-7-) {6 PLACES) 10-2923 Figure 10-5 DC Power Supplies and Regulators (I/O Processor Cabinet) (Sheet 2 of 2) 10-11 Route the harness from the memory assembly in the I/O cabinet to the H7420 power supplies using adhesive backed mounts and cable ties (items 8 and 9) as necessary. Install the Mate-N-Lok connectors to the power supplies as shown in Figure 10-5 and install the red and white leads from the internal H7420 fans in hole 7 for the red lead, and hole 3 for the white lead in P2. P2 mates with J2 and P3 mates with J3 (Figure 10-6). 2 AN 1 ] O OO0 OoQ E /OOO ONORE) ONON®) ONONG®, O J3 N 1 13 ; 10-2926 Figure 10--6 Connector J2 and J3, Pin Identification Strip end of red and white twisted pair wire (item 10) at 3/16 inch and crimp on two contact pins (item 12). Plug these into the J2 Mate-N-Lok on the lower H7420 (white lead into P2 pin 5 and red lead into P2 pin 6, Figure 10-6). Route these leads along cabinet channel to the memory blower assembly. When correct length is established, cut, strip, and terminate lead ends as described above. Then get the 3-pin connector housing (item 11), and insert the white lead into hole 1 and the red lead into hole 2. Then attach this connector housing to the Mate-N-Lok on the blower. Use spiral wrap where necessary to prevent cut-throughs. 10-12 15. Located inside the I/O cabinet mounting door are two Mate-N-Loks bundled with the fault indicator harness. Untie this section and route the P5 Mate-N-Lok to the memory assembly vane switch assembly and plug into existing Mate-N-Lok. 16. Route the J3 Mate-N-Lok to the memory assembly door switch and connect to existing Mate-N-Lok. Tie wrap wires to the vane switch bracket where necessary to support cable. 17. Route the two power cords from the H7420 power supplies into the CPU cabinet and toward the front end cabinet. Attach these power cords to the power cord extensions for the specific system as follows. 60 Hz - power cord extensions no. 9107673-09 (item 15) 50 Hz - power cord extensions no. 7011432-03 (item 16) Continue run to front end and plug the power cord extension from the upper H7420 power supply into the 863 power controller at J24, and the power cord extension from the lower H 7420 power supply into the 863 and J26. Refer to Figure 5-8. Use cable ties and cable tie mounts to make neat runs of all wires and cords which have been installed. 18. This step is the installation of the SBus cables. First remove the doors from the CPU and MA20/MB20 logic assemblies. Install the two SBus cable assemblies (item 17) as follows (refer to Figure 5-9). Slot 1, row A, B of memory to slot 2, row A, B of CPU Slot 1, row C, D of memory to slot 2, row C, D of CPU Replace the logic assembly doors NOTE ‘Replacing these doors is easier if the plastic strip along the side of the door is removed first. This strip is to be replaced after the door is refitted. 19. Note that on the inner end of each H7420 power supply there is a ground stud. Place an external-tooth lock washer on each ground stud. Then place an end from each ground strap (item 13) on each ground stud and assemble with two kep nuts (item 14). Route both ground straps to convenient holes on the cabinet upright and assemble as shown in Figure 10-7. Attach ground strap to fan housing. 10.1.6 Checkout and Acceptance Procedure Check for shorts between the voltage terminals and ground on the MA20/MB20 backpanel. Visually inspect the backpanel for bent or crushed pins, broken wires, materials lodged between pins, or any other abnormality. Visually inspect between logic cards for lodged foreign material. Ensure all modules are in their correct slot and are installed properly. Ensure that all connections are secure. Using the chart in Figure 10-8, check to ensure that the appropriate backplane jumpers are installed to select the add-on memory controller as C2 and C3. 10-13 flfl EXT TOOTH L'WASH (-7-) / UNDERGROUND STRAP KEP NUT (-14-) /— SCREW (-6-) \— GROUND STRAP (REF.) UPRIGHT (REF.) —— 10-2927 Figure 10-7 Ground Strap Installation HARDWIRED CONTROLLER SELECTION PIN EF2 PIN EE1 co GND GND ci GND —_ c2 —_— GND c3 — — M8561/M8568 FIRST CONTROLLER: 5LOT 26 (CO, C2) SECOND CONTROLLER: SLOT 29 (C1,C3) * SEE MUL CHART 10-2928 Figure 10-8 Memory Controller Jumper Installation 10-14 Apply power and check for obvious problems (e.g., smoke). Check to ensure that all fans are operating. Using a DVM, check and adjust all voltages (+5, =20, -5) at the backplane tabs. Refer to the MA20 print set drawing MA20 AC/DC Power Wiring, D-IC-M A20-0-0-PW, to relate each power tab to its associated regulator. Note that sheet 1 of this drawing applies to the add-on memory, sheet 2 applies to the first MA20. Check to ensure that blocking ait flow over each vane switch or opening the logic assembly door will power down the machine (check LEDs on 863 also). Check H770 regulator which - supplies +15 V to vane switches. Check the MA20/MB20 deskew using the proceduré described in the MA20/MB20 Memory Print Set or Paragraph 8.18 of this manual. 10. Run DGKBB.A11 as a basic check at CR0, CS0. 11. Run MARGIN.CMD at CRO, CSO all switches set to 0. MARGIN will run all margins on internal memory. The Instruction/Set-Up sheet (D-BS-MA20-0-INS) in the MA20 print may be helpful in isolating failures. 12. 10.2 At CRO, CS0, console switch 6 set to a 1 (up: reliability mode). All memory must run DDMMD overnight (12 hours) with no failures. (See Table 10-2.) KL10-PV UPGRADE PROCEDURE FOR KL10-C Obtain all resources listed in Paragraph 10.2.1. Obtain permission to remove all customer software media and then remove them. (Disks, floppies, magnetic tapes and DECtapes) Refer to Paragraph 10.2.2 to run the required diagnostic at this time (Model A CPU system diagnostic). a. Turn the power off at the system console. b. Turn off the main 3-phase circuit breaker CB1 in the 863 power supply. c. Turn off the wall circuit breaker to the system. a. Remove the top cover to the CPU assembly cabinet. Label and disconnect the ground strap. b. Remove the side panel of the cabinet. Label and disconnect the ground strap at the bottom of the panel. - c. Remove the doors. Label and disconnect the ground straps. d. Remove the front trim bar and blower filter. Label and disconnect the ground strap. e. Remove the air intake shroud. f. Remove the UL screens at the bottom of the cabinet. 10-15 Table 10-2 DDMMD: Right-Hand Switch Settings Switch Number Mnemonic 18 SWCON Functional Description ' 19 EXTDIN Use switches for test control - testing parameters input from RH switches rather than from TTY. ‘ Extended input format — used to specify and run on selected MA bit in fast rate addressing. If in switches mode also allows user to type in selection of specific data patterns for the data patterns test and for the WCP test. 20 WCPIT2 WCP interleave - sets up WCP for interleaved modules. 21 WCPSW3 Module type selection (WCP test) 22 WCPSW2 0 = run all module types 23 WCPSW1 1 = MAIOQ 2 = MB1064 X 64 3 = MBI0 128 X 128 4 = MDI0 5 = MEI0 6 = alt. Is and Os 7 = 1s and Os checkerboard 24 TSTSW3 Test Selection | 25 TSTSW2 0 = data patterns, address, WCP, float I/O 26 TSTSWI1 1 = data patterns 2 = address 3 =WCP 4 = float 1s/0s 5 = heating 6 = address and WCP 7 = all tests 27 INHMSK Inhibit error checking on mask. Do not report errors in bits masked by 1s in location mask (4037). 28 INHCMP Inhibit data complement (R/C/W) when executing fast rate addressing. Do a read restore instead. 29 INHBLT Inhibit block transfer cycles. 30 INHFR Inhibit fast rate addressing. 31 INHRR Inhibit read restore cycles. WCP - RCW cycles. 32 NOPARP Inhibit parity error typeout. 33 NOERPT Inhibit data error typeout. 34 LOCKPG USER - lock program in core. 35 PNTTLS Print totals at compleetion of all selected tests. 10-16 a. Remove the card cage doors on the CPU assembly cabinet. b. Remove the diffuser screen. c. Unplug the ac power to the blower above the CPU assembly. d. Remove the blower straight out from the rear. a. Unplug the vane switch connector P4. b. Cut the tie wraps holding the blue/black twin pair for the door switch. c. Remove the vane switch assembly. a. Carefully remove and label the end of each cable in CPU assembly slots 1,2 and/or 3. b. Place_ covers on these cables and place them out of the way (back to I/O bay). Reinstall the card cage rear doors. 10. Discohnect the dc harness using a small plier, grabbing each Faston at the crimp. Make sure each Faston is labeled. 11. 12. a. Cut the four tie wraps holding the dc harness on top of the CPU assembly. b. Unscrew the cable clamps holding the dc harness .on the bottom. Place the supplied 2 X 4s under the CPU assembly as illustrated in Figure 10-9. NOTE The next steps are very important. Read steps 13 through 19 before proceeding. 13. 14. Remove screw no. 2L from the left of the CPU assembly, freeing up the clamp; replace and tighten the screw. (Refer to Figure 10-9.) a. With someone in back of CPU assembly (supporting unit), remove screw no. 1L and no. 1R. 15. b. Remove the bottom screws no. 3R, no. 4R, no. 3L and no. 4L. a. Remove the remaining tie wraps that prevent placing the harness out of the way. b. Place the complete harness out of the way (on top of the I/O cabinet). NOTE In handling the 150 Ib CPU assembly, use the outer perimeter to hold it, not the card cage. (See Figure 10-10.) Use three people. 16. With one person in back of CPU assembly at all times, remove screws no. 2R and no. 2L (the box rests on the 2 X 4s). 10-17 — + |___——HOLE No. 88 (@ O| +B i.—-——-ume No. 84 I l SCR No.1L~_Hl '!E SCR No. 1R for Q) ol I &1 DR ——- B TOP SCR No. 2L B3 SCR No. 2R SCR No. 3L =] —® SCR No. 3R : [ 1ol SCR No. 4L—’"]f§ w b B\ o] 80TTOM TTT fal [o] ] ol /O\ \ 2 % 4's USED IN 20 UPGRADE / )| SCR No. 4R 10-2930 Figure 10-9 KLI10-PV Assembly 10-18 ONLY HERELE HAND E HERE ONLY HANDL * —» BACKPLANE * BY D NEVER HANDLE AREAS DESIGNATE 10-2931 Figure 10-10 Handling-of CPU Assembly 10-19 17. While the CPU assembly is resting on the 2 X 4s and is being held by someone in front and rear, have a third person remove the bracket that is bolted to the frame (as illustrated in Figure 10-11) using a socket wrench (7/16). \f@ — — SUPPORT BRACKETS \\i@/ | — —— REMOVE THESE BOLTS @ \ \ \/ CABINET FRAME SEE NOTES 1& 2 FRONT L~ RIGHT SIDE NOTES: 1. On cabinets where brackets are bolted remove as shown. 2. On cabinets where brackets are pop riveted do not remove. 10-2932 Figure 10-11 18. Support Bracket Bolts Carefully guide the CPU assembly out from the front of the cabinet and place it on the floor. (Make sure that the left side - slot 1 - exits first.) 19. Remove the KL10-PV from the shipping assembly. 10-20 Place the 2 X 4s on the memory blower assembly. 20. Insert the new KL10-PV assembly on the 2 X 4s by placing the right end in first (slot 54). Make sure that someone is in back of the assembly. Install the support brackets to the frame. 21. Line up the KL10-PV assembly with the sulpp'ort brackets. Install the second screws from the top on the left and right of the KL10-PV assembly (see Figure 10-9, screws 2L and 2R). d. 22. Install the bottom screws on the right and left (see Figure 10-9, screws 4R and 4L). Reconnect all the Faston connectors for the dc harness to their proper tabs. Refer to notes taken in step 10. 23. 24. a. Replace the harness clamps removed in step 11b. b. Install the tie wraps removed in step 11a. Replace the wraps removed in step 15a. Install the cable clamps for screws no. 1 and no. 3 on the right and left of the KL10-PV assembly. Tighten these screws. Secure the cable clamps for screws no. 2 and no. 4 on the right and left of the KL10-PV assembly. Tighten these screws. Now the 2 X 4s are free to be removed. 25. Reinstall the vane switch assembly. (See step 7.) Replace the blue/black twin pair for the door switch and tie wrap TAC plug. Plug the vane switch connector P4. 26. Reinstall the blower assembly. (See step 6.) Plué the ac power to the blower above the CPU assembly. Reinstall the diffuser screen. Reinstall the UL screens. 27. Remove the card cage doors on the KL10-PV assembly. Remove the necessary modules to reinstall the removed cables in step 8 properly. Replace the removed modules after reinstalling the cables. Double-check the modules in all slots against the module utilization print for proper slots. Make sure all modules are seated. 10-21 28. 29. a. Replace the air intake shroud. b. Replace the trim bar. c. Replace the blower filter and connect the ground strap. d. Replace the side panel and connect the ground strap. e. Check for miscellaneous items or tools on top of the cabinet; then replace the top cover and connect the ground strap. a. Inspect the KL10-PV assembly backplane for bent pins or loose items such as washers, etc. 30. 31. b. Inspect the memory backplane similarly. c. . Double-check the Faston connectors of the dc harness for physical 1ntegr1ty and proper connection (i.e., 5 V wire to 5 V tab, etc.). d. Reinstall the front doors and connect the ground straps. a. Turn on the wall circuit breaker for the system. b. Turn on the 3-phase main circuit breaker CB1 of the 863 power supply. c. Resolve faults if indicated by console indicators. d. Turn the power on at the system console. a. Check all tabs on KL10-PV backplane with an oscilloscope for the proper levels (i.e., -2, GND, -5.2 ripple). b. Check all dc power in the entire system at this point with digital voltmeter (Figure 10-12). dc (TTL) voltage tolerance (measured at module power pins) +5.0 -5.0 -15.0 +20.0 dc (ECL) voltage tolerance (measured at sense tabs on CPU backplane) -5.2 -2.0 c. Perform the deskew procedure adjustment in accordance with procedures given in the RH20 and MA20/MB20 print sets or Paragraphs 8.18 and 8.19 in this manual. 32. Run diagnostics according to Paragraph 10.2.2, and resolve all problems. 33. Bring up monitor in accordance with procedures given in the software installation manual. 34. Pack old KL10-C for shipment along with other related materials. 35. Clean up site. 10-22 PTY-L O - PT3-U —> o GND g;;_ll:la_%o l:}g‘fla__'%o PT7-l > © -5.2 GND PT13-L ] PT13-0 —> o GND g}}g-HD—_'% o -5.2 PT8-L — = 2- 5.2 PTI5-U —> a ' LTl ' © l Eg.“_‘ffl/vv\ et Lo eyto | s PT16-L — UNLSED 2474 0 GND YIYYYyy 00 000 OO B2 / cre | | | | PIIsU—T% o | PT17-U — P15 PT24-L — o GND PT24-li 0 © 5.2 PT26-U PT%%_L,IH_;’ ° PT25-0 —> o PT28-L — pTag_U_%o -5. 52 GND PTZ?—U——%O 6ND [ GND [ = ) Je-15 £-1 ocoooo (| o000 o] ° 00 GREEN 6 783-C PU UPPER DC (7669419 H732 | [T CPu LOHER OC (7010855) VD RO B OCRBINET L 7 2T e s eT s eO e 0 e sA e 0 I e N 22 L. 5 ! ! 26 g7T g6 %w o& ¥©w o& Ww o& gVv o& X ! P e 2|8 w z||23 ! qIE: CPU #2 g18 Wi Z\z3 ] S ! 8 S |1 ST GND : STy GND -5.oF . ] ] st <17 SENSE oo :l [] ST8 sto -5.2K SENSE € 8 SEE NOTE #3 . & z v aU m g 4 @ m 6N v | o~z 5 LD U & L+ Z O S VRS S o 4.5 S S D o ¢ o E | [ S S 7?7 T TP I - - - & coN& ez ¢ & e e o a N o 2 a @ o 2 g @ 5.2J SENSE o SENSE & sense w0 CPU #73 SENsE - - - - - - m ¥ o & -& e [$] & 4 o &5 o5 . [= ®@ v % W e w5 o 9 5 v 9 w ® o Z S S - & ) S G o by Y S o o & v 9 o z U @« o z S g | 0 J ¥ i 0 S [ S S & l NOTES: i. "PT#:U""REPRESENTS UPPER “"POWER TABS" ON CPU BACKPLANE AND S G G - - el & 2& 2&8 VY2&E 2@ 28 & ow ETCH FROM "ST#" TABS TO REMOTE SENSE PIN. "-L" NUMBERS REPRESENT TABS ON BOTTOR OF BACKPLANE. -5.2a - ST17 TO F8B2 2. PURPOSES. ST REPRESENTS “SENSE TABS" FOR REMOTE SENSING CONNECTIONS ARE TIDE FROM J2 ANO 3 &F R e -5.20 - ST2_T0 @271 H761 TO “ST#" TABS. FROM "ST#" TABS ETCH COMPLETES & 1 8 7T 1 w O -+ 0 o Z T & . o Z B8 w0 00 T T 71 7T T 1 5 R N w o z o o 5 1 o Z 5 s GND ] 1 smo -2C sense ) sTie st ¥ W e LT LTI LT T 177 && 8& O& && La 8a 8& ¥a 8& R& =a Wa -5°2E - -5:2K - 2112 10 Fa3se J2-2 10 -5.2A -SENSE J2ENSE -- J5-5 10 ST12 2T16 +SENSE - J2-3 TO 5T18 P - J2- 5.2C \SENSE ~SENSE -- J2-5 J2-8 T0 T0 PTIS-U ST2 2 T A -5.26 ;SENSE - JEnle 1013 T2ENSE - J5-12 TO ST7 —5.2F +SENSE - Je-11 10 ST6 5.5 -SENSE - J3-2 10 T3 TI-CT bSENSE - J3-1 TO ST -s.aG2ENeE - By R e “SENSE - J3-8 T0 STIS —2R |SENSE - J3-7 TO STI6 _og ~SENSE - J3-18 TO STi4 —2c +SENSE - J3-9_T0 PT15-L 2T13 TO F33B2 -2-8H - 513 5.2J 573 10 TQ awoul A43UI TUISTED PAIR FROM H761 (J2 & J3) TO “ST#" TABS _5.pp —SENSE - J2-4 10 ST19 9. -8 -2C -- 3T1% ST12 10 10 F2181 F3881 3. Y4 -eb - ST8 TO F48BI "CT" REPRESENTS "CONTROL TABS", SIGNALS FROM 863 POLER CONTROL AND TERMINATE AT CT2 AND CT:4 RESPECTIVELY ETCH FROM “CT* TABS TO PINS -5.2F -~ 21‘7 10 A4eul HIRE AND ETCH RS BELOW: ~5.2H ;;u:uggé - jg:}; }g g;z U toy oy 77 z[=] elle= PATH TO PROPER REMOTE SENSING PIN ON BACK-LANE. SENSE HARNESS (7089427 > ' ! 7T 7 ] BACK DOOR ORANGE ms,BLACK O . SEE NOTE #3 28 | e 7 TM F O O KN O O ® - w gy & o o & & ELRDD & 6 o MR 6 & oM& P2 REE 9 o9 z olls= Q zF CPU CABINET Wze1 T-~ 87 w o- ¢o oo Ma 2& 81 B8 2 ¥0o o0 8 & 0o o& &w &o g7 b ©w o GND N SEE puTAIL A w N17T 7 3 ® 09 - -5.20 5 | ! ?T TP i SO0 e N e T o s A e s s 1 s O s O s B e 7 co.e8 SENSE o HINGE ! IR -e M-a e-a o -w0 o a o CPU #1 ST16 &5V 8 T- [ GND [ | J2 [ ] r& 30 739 o ST1? W C uQ wQ 2 O croeaR stis B4 . GND alaqagq00aq0q0q00a P LRV BT LPL TB73 J2-13 et [ 2 ~~— I: © 00060000 -5.2 PT27-L 4 cte 2 0w L Pue waRn sT19 YYYY&yyy GND gT o pT23-LF— 1 -5.2 [ 2 O Y &T 2b ¥e 92 o2 ¥ 9 © * 5 w & TPIFT DT2 TP 343,04 Vgt L0260l L8P nRe W AT o PT18-L —% 3 F 2& | ct3 ] Yo 3 s A s B g B o Ys 0 e s 0 s B s O | TB1 %v5 0P 9 3 & e Y POLER WARN - CT4 TO ARYJ! 18. CROBAR . - CT2 TO AB6L2,BEEST ,CB2S! ,CR3S1,AND FB1U2 DRAMING NOT TO SCALE 11. VEIKED FROM PIN SIDE "PT" TABS 5-U,5-L.6-U AND 6-L ARE CONNECTED TO H7420#2 IN 1/0 CABINET FOR +5 POWER. - TO PT11-U - AND PTS-L i TO PT11-L _ R PT9-U i7. JUMPER Rinioce His s PT2@-U TO PT32-U AND PT2@-L TO PT32-L 8." ALL WIRES TO BE #18 AWG EXCEPT FOR THE FOLLOWING EXCEPTIONS: A. WIRES FROM 1,0 CABINET H7428i #2 TQ +5V TeBS PTS5-U,PTS-L,PT6-U AND PT6-L ARE TO BE 1% AWG TWISTED PAIR. B. ALL REMOTE SENSE LINES TO BE 18 AWG TWISTED PAIR. COLOR CODE AS FOLLOWS: BLACK = GND KL10-RA 1QBQBQGBB RED = +5 GREEN = -2.0 CPU DC WIRIN BLLE = -5.2 J3-1 Ti2 +SENSE - J3-11 T0 ST11 _ap “SENSE - J3-14 T0ST8 +SENSE - J3-13 TO 579 10-2€32 Figure 10-12 KL10-PV CPU dc Wiring (Pin Side View) 10-23 10.2.1 10.2.1.1 PV Upgrade Resources On-Site or Locally Supplied Resources Time Required 1. 2. 3. Eight hours for upgrade 72 hours for reliability test “X” hours for customer acceptance Personnel Requirements 1. 2. Three field service people (one of these familiar with “B” diagnostics and hardware) Software specialist (required after hardware installation is complete) ANl o e Test Equipment Required Microfiche reader DEC tool kit Socket set or two 7/16 open wrenches Resources To Be Supplied (Shipped) New prints New microfiche (for uncode, wire lists, test writeups) Floppy disks for diagnostics Miscellaneous Ao o o= 10.2.1.2 Digital voltmeter accuracy +£0.05% or better on dc voltages Oscilloscope (Tektronix type 465, 475, 7000 series, or equivalent accuracy) 3 probes of equal length and ground clips Spare tie wraps (part no. 9007032) Faston connectors (part no. 9007920, 9007969, 9007970) Two pieces of wood 2 in X 4 in X 18 in Spare bolts for support brackets (1/4 - 20 X 5/8) part no. 9006242-09 10.2.2 Diagnostic Test Programs 10.2.2.1 Model A CPU System CPU Tests 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. DGKAA - EBox Test No. 1 DGKAB - EBox Test No. 2 DGKBA - MBox Test No. 1 DGKBB - Memory Control Test DGKBC - Paging Logic Test DGMCA - Cache Option Test DGMCB - RAM Banger Test DGKBD - Channel Logic Test DGKBE - Channel Loopback Test DGKCA - Meter Board Test DFKBB - Cache Reliability DFKAA - Basic Instruction Test No. 1 10-24 13. 14. 15. 16. 17. 18. 19. 20. DFKAB - Basic Instruction Test No. 2 DFKAC - Basic Instruction Test No. 3 DFKBA - Basic Instruction Reliability DFKCA - Advanced Instructions DFKDA - CPU/PI/Memory Reliability DFKEA - Paging Hardware DFKEB - MUUO and User Mode Test DFKAD - Basic Instruction Test No. 4 DTE20 Tests 1. 2. DGDTE - Basic DTE Test DFDTE - DTE Reliability Test bl NS DMA20/MA20/MB20 Tests DDMMD - Memory Exerciser DDMME - BLT Test DDMMF - Floating Ones and Zeros Test DDMMG - Memory Exerciser (over 256K) DGMMA - Memories Exerciser LP20 Test 1. DZLPL - LP20 Logic and Printer Test RH20 Tests 1. 2. DFRHB - Tests RH20s — does not use any Massbus devices , DFSXA - System 20 exerciser — tests RH20s with or without Massbus devices TU45/TMO02 Tests 1. 2. 3. DFRHB - RH20 Fault Isolator DFTUE/K - TU45 Device Test DFTUF - TU45 Multidevice Test RP04/RP06 1. 2. 3. 10.2.2.2 DFRPH - RP04 Device Test DFRPK - RP06 Device Test DDRPI - RP04/RP06 Reliability Test Model B CPU System - ok - CPU Tests DHKAA - EBox Test No. 1 DHKAB - EBox Test No. 2 DHKBA - MBox Test No. 1 DHKBB - Memory Control Test DHKBC - Paging Logic Test DHMCA - Cache Option Test DHMCB - RAM Banger Test 10-25 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. DHKBD - Channel Logic Test DGKBE - Channel Loopback Test DHKCA - Meter Board Test DFKBB - Cache Reliability DFKAA - Basic Instruction Test No. 1 DFKAB - Basic Instruction Test No. 2 DFKAC - Basic Instruction Test No. 3DFKBA - Basic Instruction Reliability DFKCA - Advanced Instructions DFKDA - CPU/PI/Memory Reliability DFKEA - Paging Hardware DFKEB - MUUO and User Mode.Test 4 DFKAD - Basic Instruction Test No. DTE20 Tests 1. 2. DGDTE - Basic DTE Test DFDTE - DTE Reliability Test dibaibodi S DMA20/MA20/MB20 Tests DDMMD - Memory Exerciser DDMME - BLT Test : DDMMF - Floating Ones and Zeros Test DDMMG - Memory Exerciser (over 256K) _ DGMMA - Memory Exerciser LP20 Test 1. DZLPL - LP20 Logic and Printer Set RH20 Tests 1. 2. DFRHB - Does not use any Massbus devices DFSXA - System 20 exerciser — tests RH20s with or without Massbus devices TU45/TMO02 Tests 1. 2. 3. DFRHB - RH20 Fault Isolator DFTUE/K - TU45 Device Test DFTUF - TU45 Multidevice Test RP04/RP06 1. 2. 3. 10.2.3 DFRPH - RP04 Device Test _ DFRPK - RP06 Device Test DDRPI - RP04/RP06 Reliability Test PDP-10 KL10 Instruction Timing Test (DFKFB) VERSION 0.1, SV=O.11, CPU#G0, MCV =126, MCO=0, HO=30, 60 HZ SWITCHES = 000000 000000 10-26 CLK SOURCE = NORMAL, CLK RATE + FULL, AC BLK 0, CACHE: 0 1 2 1 - BASIC CLOCK IS 40 NS. | 2 - INDEXING TAKES 40 NS. 3 - INDIRECT TAKES 280 NS. 4 - INDEXING AND INDIRECT TAKES 320 NS. 5- MOVEI TAKES 320 NS, 6- MOVE FROM AC TAKES440NS. 7- MOVE FROM MEMORY TAKES 480 NS. 8 - HRR FROM MEMORY TAKES 520 NS. 9 - STEOM 0 TAKES 560 NS. 10 - JRST TAKES 360 NS. 11-JSR TAKES 680 NS. 12 - PUSHJ TAKES 840 NS. 13- ADD FROM MEMORY TAKES 520 NS. 14 - MUL (9 ADD/SUB - 18 SHIFTS) TAKES 2.52 4. 15 - DIV TAKES 5.58 4S. 16 - FIX A FLOATING POINT ONE TAKES 1.04 4S. 17 - FLTR AN INTERGER ONE TAKES 1.84 4S. 18 - FAD (1 RIGHT SHIFT) TAKES 1.88 4S. 19 - FAD (8 SHIFT RIGHT - 3 LEFT) TAKES 2.16 4S. 20 - FMP (7 ADD/SUB - 14 SHIFTS) TAKES 2.80 uS. 21 -FDV TAKES 5.72 uS. | 22 - DMOVE FROM MEMORY TAKES 880 NS. 23 - DFAD (1 RIGHT SHIFT) TAKES 2.44 uS. 24 - DFAD (8 SHIFT RIGHT - 1 LEFT) TAKES 2.44 4S. 25- DFMP (7 ADD/SUB - 32 SHIFTS) TAKES 4.92 4iS. 26 - DFDV TAKES 10.32 uS. 27 - CONO PI TAKES 1.92 4S. 28 - CONI PI TAKES 3.36 uS. 29 - DATAO APR TAKES 1.56 4S. 30 - DATAI APR TAKES 1.76 uS. 31 - MOVE TO MEMORY TAKES 680 NS. 32 - LOGICAL SHIFT (35 PLACES LEFT) TAKES 640 N'S, 33 - LOGICAL SHIFT (35 PLACES RIGHT) TAKES 760 N. 34 - LOGICAL SHIFT COMBINED (71 PLACES LEFT) TAKES 1.12 4S. 35 - LOGICAL SHIFT COMBINED (71 PLACES RIGHT) TAKES 1.16 4S. 36 - INCREMENT BYTE POINTER TAKES 1.00 4S. 10-27 37 -INCREMENT AND LOAD BYTE TAKES 1.44 uS. 38 -INCREMENT AND DEPOSIT BYTE TAKES 1.80 uS. 39 -JFCL TAKES 880 NS. 40 - CAI TAKES 480 NS. 41 - JUMP TAKES 480 NS. 42 - CAM TAKES 600 NS. 4 43 - EQV AC TO ACTAKES 480 NS. 44 - EQV MEMORY TO AC TAKES 520 NS. 45 - SETOB TAKES 680 NS. 46 - AOS TO MEMORY TAKES 840 NS. 47 - EXCHANGE AN AC WITH AN AC TAKES 640 NS. 48 - EXCHANGE AN AC WITH MEMORY TAKES 840 NS. 49 - EXECUTE TAKES 640 NS. 50 - BLT MEMORY TO MEMORY TAKES 1.92 uS. 51 - BLT AC TO MEMORY TAKES 1.88 uS. 52 - DATAI TAKES 10.00 uS. 53 - DATAO TAKES 10.00 uS. TEST COMPLETED CACHE UPGRADE PROCEDURE 10.3 10.3.1 Introduction The following are the procedural steps in upgrading a noncache DECSYSTEM-20 to a cached DECSYSTEM-20. It is necessary to follow these steps in order. 10.3.2 1. 2. 3. 10.3.3 1. Test Equipment Required Digital voltmeter with accuracy +0.05 percent, or better, on dc voltage scales. Oscilloscope (Tektronix type 465, 475 series, or equivalent accuracy). Three probes of equal length with ground clips. Upgrade Procedure Run all system diagnostics at CRO, CS0 (25 MHz) and CRO, CS1 (28 MHz). Refer to Paragraph 10.2.2. If any failures occur in this step, problems must be resolved before contin- uing the upgrade procedure. 2. Power the system down and remove the following modules. Refer to module utilization (CPU). M8549YH M8549Y H M8549YH M8549YH M8549YE M8549YF Slot 17 Slot 19 Slot 24 Slot 25 Slot 27 Slot 28 10-28 Install the following modules in place of those removed. M8521 M8521 Slot 17 Slot 19 MS8521 M38521 M38514 MB8515 Slot 24 Slot 25 Slot 27 Slot 28 Reference documentation for steps 2 and 3: KL10-C/Vol. 2 Print KL10-0-CPU Module Utilization (CPU). Add CPU backpanel wire from pin 4E43A1 to pin 4D44E1 (cache available). Power the system up and check all the dc power in the entire system at this point with digital voltmeter. dc (TTL) voltage tolerance (measured at power module pins) +5.0 -5.0 -15.0 +20.0 dc (ECL) voltage tolerance (measured at sense tabs on CPU backplane) -5.2 0 Check timing following the MA20/MB20/RH2O adjustment procedure contained in the respective print sets. If any timing is not within £ 1.0 ns of 50 percent points on the waveforms, readjust to within + 1.0 ns before continuing with upgrade procedure. Rerun all CPU, memory and system diagnostics at CR0, CS0 (25 MH) and CRO, CS1 (28 MHz) as listed in Paragraph 10.2.3. Run DDFKFB (instruction timing test) at CR0, CS0 (25 MHz) and compare the output with the accompanying data in Paragraph 10.2.4. 10.3.4 1. Power Tab Identification Notes “PT#-U” represents upper “power tabs” on CPU backplane and “-L” numbers represent tabs on bottom of backplane. “ST#"’ represents ‘“sense tabs’’ for remote sensing purposes. Connections are made from J2 and J3 of H761 to “ST#”’ tabs, from “ST#”’ tabs etch complete path to proper remote sensing pin on backplane. Twisted-pair from H761 (J2 and J3) to “ST#" tabs -5.2A -SENSE - J2-2to ST17 +SENSE - J2-1to ST16 -5.2B ~SENSE -J2-4t0 ST19 +SENSE - J2-3t0 ST18 10-29 -5.2C -SENSE -J2-6 to ST1 -5.2D —SENSE -J2-8 to ST2 +SENSE - J2-7 to PT17-U -5.2E -SENSE -J2-10to ST13 +SENSE -J2-9 to PT17-L -5.2F -SENSE -J2-12to ST7 -5.2H ~SENSE - J2-14 to ST5 -5.2] -SENSE -J3-2to ST3 +SENSE -J3-1to ST4 -5.2K -SENSE -J3-4t0 ST10 -2A -SENSE -J3-8 to ST15 -2B -SENSE - J3-10t0 ST14 +SENSE - J3-9 to PT15-L -2C -SENSE -J3-12 to ST12 -2D ~-SENSE - J3-14 10 ST8 +SENSE - J3-13to ST9 +SENSE - J2-5to PT15-U : +SENSE - J2-11 to ST6 +SENSE - J2-13 to ST4 +SENSE -J3-3 to ST11 +SENSE - J3-7to ST16 +SENSE -J3-11to ST11 Etch from “ST#’ tabs to remote sense pin. -5.2A -ST17 to F8B2 -5.2B-ST19to F14B2 -5.2C-ST1to A21U1 -5.2D -ST2to A27U1 -5.2E - ST13 to F33B2 -5.2F - ST7to A40U1 -5.2H - ST5t0o A45U1 -5.2J-ST3to A49U1 -5.2K - ST10 to F53B2 -2A - ST15 to F9BI -2B-ST14 to F21Bl1 -2C-ST12to F38Bl -2D - ST8 to F48B1 “PT” tabs 5-U, 5-L, 6-U and 6-L. are connected to H7420 no. 2 in I/O cabinet for +5 power. Jumper PT9-U to PT11-U A D PT9-L to PT11-L. Jumper PT10-U to PT12-U and PT10 to PT12-L. Jumper PT19-U to PT21-U and PT19-L to PT21-L. 10-30 Jumper PT20-U to PT22-U and PT20-L to PT220-L. All wires to be no. 10 AWG except for the following. a. Wires from I/O cabinet H7420 no. 2 to -FS V tabs PT5-U, PT5-L, PT6-U and PT6-L b. All remote sense lines to be 18 AWG twisted-pair. are to be 14 AWG twisted-pair. Color Code as follows. Black = GND Red = +5 Green = 2.0 Blue = 5.2 “CT” represents “Control Tabs.” Signals power warn and crobar are generated from 863 power control and terminate at CT2 and CT4, respectively. Etch from “CT” tabs to pins. Power Warn - CT4 to A04J1 Crobar - CT2 to A06U2, B06S1, C0201, C0301, and FO1U2 10-31 CHAPTER 11 REPORTING PROCEDURES 11.1 INTRODUCTION The job of installation is not done until the paperwork is complete. The reports generated form an important part of the customer history file, and the feedback to regional and corporate quality control is essential to maintaining a check on the quality of installation and pinpointing problem areas when they arise. 11.2 LARS REPORT FORM An important tool in the reporting process is the LARS form. This is the primary method of reporting and cannot be substituted by any other form. However, in some instances another installation feedback form may be necessary. Accuracy is essential when writing LARS forms which are used to gather data for statistics. There- fore, the installer should be familiar with the LARS manual (EK-LARS-FS-00X). This manual has a section specifically on installation and howto apply the various codes not usually used during normal PM or on fault-finding calls. Several examples are included for clarification. Figure 11-1is a sample LARS form used on a typical DECSYSTEM-20 installation. To create a valid LARS data base for statistical analysis the following rules should be applied when filling in blanks. 1. Assigned Person - The assigned person should use all necessary installation codes and complete the material and comment section. An unassigned person who is plainly assisting on the same device should duplicate the assigned person’s coding except for the MATERIALS USED section- which should be left blank. “Assisting” should be written in the COMMENTS section. However, an unassigned person working on a separate device is responsibile for reporting this activity. Product Line - There are four LCG product lines and the appropriate designation should be used for a particular system. ‘ Ao op 2. 3. PL66 - Commercial System Group PL67 - Education Systems Group PL73 - Federal Systems Group (Government/Scientific) PL74 - Engineering Systems Group System Type 2040 - KL-based DECSYSTEM-20 without cache 2050 - KL-based DECSYSTEM-20 with cache At this time, there are no other valid entries for system type. 4. System Serial Number - Ensure that the system serial number entered is identical to the CPU serial number. 5. DEC Number - This should always be quoted for installations and can be located on the system keysheet or from the account manager/salesperson. 11-1 (SrL)-LLLY-21- -€S0L0-NI 3 T7 XA9 -i—¥|ELM:HIH.Izfi.?.:.Ww3mITQ3IANY-gNI] LE-695-18 "ON WHOJ O0HvVN T 6 49161 T | Ty el Al T T J djdwesSYv1YHodoyw10, _33vds"d3sn '1."0Od3Nad EI0]vd - $ A 2In31q [-1 iiea T\ Ly R 'OV T . "INI 3HDIaGvAeNa A= — a - swiog ssausng 1 ! - ) ® 1no-z-2 HINNVIN SIHL Ni SH3LOVHVHD LNIdd 11-2 6. Activity Codes NORAM - The new system installation code N should be used from the start of installation until completion of all DIGITAL standard diagnostics (i.e., completion of Chapter 8 of this manual). All activity for the next 90 days, including the hardware and software acceptance periods, shall be booked under code W. Other Areas - If a day 1 contract after acceptance exists then the new system installation code (N) should be used from delivery of the system until customer acceptance. Add-Ons - An add-on should be booked to code W from the start of installation until customer acceptance. 7. DEC Option - Errors are frequently made in the coding of KL10 mainframes and options, and of electro-mechanical peripherals. Correct coding is as follows. KL10 Mainframes and Options Service activities on all KL-based mainframes should be coded. This may be confusing since each mainframe also contains some ‘‘internal’”’ options. The following ‘“‘internal” options should be coded as separate options. MA20/MB20 and any future internal memory RH20 DIA20 DTE20 DMA20 LP20 CD20 DC20 There is no KL20. Electro-Mechanical Optlons Use the complete option designation contalned on the DEC serial number tag For example, LP10-FA instead of LP10, CR10-DA instead of CR10. Ensure that the MODULE/FAIL AREA/FCO field is filled out for every entry. Include module or subassembly part numbers; “PM” if that is what was done; indicate what adjustment was made; ‘‘not found” if that is what happened. There are sixteen spares in this entry. 8. Type of Call - Installation code I should be used for all hardware installation. 9. MODULE/FAIL AREA/FCO - This area should contain pertinent data or comments to complement the action code and installation code. If additional comment is necessary then the COMMENTS section of the LARS form may be used. However, the primary information area should be the MODULE/FAIL AREA/FCO portion. 11.3 DECSYSTEM-20 INSTALLATION REPORT The quality assurance group within LCG Corporate Support will selectively include this form with some system shipments. Its purpose is to gain complete installation profiles on one summary sheet and to receive written feedback on the appended device sheets. If such a form is received it should be completed and returned, in the preaddressed envelope provided, to LCG Corporate Quality Assurance. The report is ‘preceded by some instructions on how to fill out the sections which are not self-explanatory. 11.4 DAILY LOG To assist in the detailed completion of the above forms, a daily installation activity log should be maintained by the installation supervisor/engineer. If several people are involved in the installation, their daily activity should be noted by the responsible installation engineer to ensure that all work is logged. 11.5 LCG INSTALLATION WARRANTY ACTIVITY SUMMARY FORMS The following descriptions outline the details to be completed in each section of the installation warranty activity form. Refer to Figure 11-2 which is a sample of this form. 1. Section 1 a. Customer - This is the customer name, which is used to reference the system, b. System Serial No. - The serial number of the CPU of the system, for example, MRO02105. c. Branch - The branch responsible for the system. d. Cost Center — This is the cost center of the branch responsible for the system, for example, 7A3. e. MLP of System - This is the Maynard list price in dollars of the system being installed. In the case of an add-on the MLP of the add-on should be put in this space. f. Product Line (top right-hand corner) - This is the LCG product line which has shipped the system. The four product lines are as follows. Commercial Systems Group - Product Line 66 Education Systems Group - Product Line 67 Federal Systems Group - Product Line 73 (Government/Scientific) Engineering Systems Group - Product Line 74 2. 3. Section 2 a. Delivery of System - The day, month, and year of the actual physical delivery of the equipment to the site whether the site was ready or not. The DEC standard for writing dates is: 15 Oct 76. b. Hardware Acceptance - The day, month, and year of the date the system passed the DEC specified hardware acceptance, i.e., before handing over for software installation or before any other customer, or government hardware/software acceptance tests. c. Date of Contract — The first day on which the system or add-on equipment is to be covered by DEC field service maintenance contract. Section 3 a. Names of Engineers, Badge No., and Cost Center - This information is required on all the engineers who have ever been concerned with the new system or add-on equipment either in pre-sales visits to the customer, time spent with salespersons, site planning, installation, etc., up to the date the system or add-on was delivered. 11-4 Hfl@flnau SYSTEM 2 DAY DELIVERY OF SYSTEM 3 BRANCH SERIAL No. MONTH YEAR Cost Badge Centre No. NAMES OF ENGINEERS . oOFsTEM CENTRE DAY HARDWARE ACCEPTANCE MLP COST — CUSTOMER PRODUCT LINE:- L.C.G. INSTALLATION WARRANTY COSTS SUMMARY YEAR MONTH . Pre-Sales Hours I Hours i DATE OF CONTRACT Software Hours DAY MONTH Total Unusual Hours Hours TOTALS GIVE REASONS FOR UNUSUAL HOURS LIST OPTIONS DELIVERED WITH SERIAL Nos. 5 MISSING COSMETICS MISSING OPTIONS MISSING C.S.5. OPTIONS MISSING COMMS OPTIONS PHYSICAL CONDITION OF SYSTEM Brief Summary SITE SPARES BRANCH AVAILABILITY A) PHYSICAL CONDITION OF SITE B) ELECTRICAL C) ENVIRONMENTAL OPTION 9 COMPONENT OR LOCATION PART No. INSTALLATION FAULTS Figure 11-2 YEAR LCG Installation Warranty Costs Summary Form (Sample Only) b. Pre-Sales Hours — Any time spent concerned with the delivery of the installation of the new equipment before the actual delivery of that equipment. c. Installation Hours - Time spent by the engineers from the date of delivery until the date of hardware acceptance. d. Software Installation Hours - Time spent on site by the engineers during the installation of software, i.e., from the date of hardware acceptance until the system is taken over by the customer. This means to the date of contract or until the date of beginning a customer or government prolonged acceptance test with the system being used normally by the customer. e. Unusual Installation Hours - This is the period after the completion of software installation during which there may be a customer or government acceptance period, or a reluctance on the part of the customer to sign the field service contract for some reason. When any figures are entered in the Unusual Installation Hours column, a brief note on the reasons why it was necessary to record for unusual hours should be entered; for example, “System subject to CCA acceptance trial.” Section 4 List Options Delivered with Serial Nos. - This section provides a record of the equipment on site; it also serves as a check on the LCG equipment data base. Section 5 List any missing items under the appropriate headings. Missing cosmetic items holding up the acceptance of the system are to be noted in this section. Section 6 Physical Condition of System - A very brief note on the physical condition of the system paying particular attention to darmage rather than the expected good condition; for example, CPU door bent in transit, or door paint scratched. In the event that there was no damage, state ‘““No damage.” Section 7 a. Spares - A brief statement, as appropriate, describing the availability of spares at the time of installation. b. Site - A rough estimate of the percentage of site spares that were available on the day of installation of the system. Note any major omissions, for example, ‘“80% site spares only available, LP20 and CR20 spares completely missing.” Note that there is a site kit for the DECSYSTEM-20 which consists mainly of fans and filters, etc. c. Branch - Particularly in the case of DECSYSTEM-20, the branch kit is the major source of spares. Later versions of DECsystem-10 will have branch-based rather than site-based spares. In this case make a short statement of the spares available at branch, for example, ““only 90% KL10E modules available, no CD20 spares arrived,” etc. 11-6 Section 8 Condition of Site - A brief statement outlining the readiness of the three major site parame ters; i.e., physical condition and electrical and environmental status. Section 9 Installation Faults - Complete this section under the four columns and add extra sheets if necessary. Components or modules which were ‘“‘dead-on-arrival” should be marked with DOA. This information provides valuable feedback for production and quality control. APPENDIX A INSTALLATION PLANNING SHEET INSTALLATION PLANNING SHEET Customer: Salesperson: Installation Supervisor: Installation Team: Team Leader: Working Hrs/Day: Customer Contact: Site Phone: Softw_are Specialist: Customer Acceptance Criteria: (standard) (special) Equipment Being Installed: Person Responsible to Unload System and Place in Computer Room: A-3 APPENDIX B SAMPLE DIAGNOSTICS B-1 B.1 11/40 FRONT END DIAGNOSTICS B.1.1 RXDP DZAUI-C 20 - -7é& RESTART ADIRS 152254 ROOTED TO VIS ARORT UNITHEH:S THE RXDF - AXD RXLLZ7RXO1D MONITOR 28K CTRL 70 O FOLLOWING HELF MESSAGE TYPE L TYFE FoGi T0 SET CONSOLE FILL COUNY DGR FOR DIRECTORY ON CONMSOLEs (IR DAFCCR: FOR SHORT DIRECTORY O CONSOLE OALCCR FOR DITRECTORY OM LLIME DALAFC0R: FOR SHORT DIRECTORY ROCOFYSCR> TO RUN FoFTLENMAME=CR> L FULENAME<CR> TO TO SOOR> THE T START CORY FROGRAM ADDRCCR:OTO STaRT THE FTLENAMESOR: TO RUM A O FITLENAME/ZQUCCR: TO XXDF USER FROGRAM RUN ANY OTHER FROGRAM. LOALD A PROGRAM ONLY S G REFER TO JUST PROGRAM CHATINy RUN MANUAL A CHAIN RXDF JHIN DOOOOZ UPDE JRIN QOOO03 COFY JRIN DOO004 XTECO BIN QOOGCOE YFTCRO,RBIN QOO00&4 ZOMCCO.RBIC QO0007 D010 ZIM.CAO, BRI ZRKWAED . BIC GOOGLYL ZTCRCO.BIC GOO0L2 QOOOLE BRAEAROG.BIC ZEMDHO . RIC OQOO0L4 DFAAAME L BIN LOADHEDs AT IN SFECIFIC QUICK MD-1L0-0Z0Xa « LAF QOO00L OR FRINTER, OR ON LINE FRINTER, & B-3 FOR ADDRESS VERIFY MODE . aADDEITIONAL HELF. B.1.2 11/40 CPU B ROAEARQ NEAEA-E KOLL-A DIAGNOSTIC FOFLLZ40 INTERNAL OFTIONS VERSTON 001 FOUNID fiNll“L B.1.3 EHSBNT = Q00001 ERFRONT = 000000 FASONT ERRONT = 000002 SET SW12=1 = 000000 11/40 Memory NOTES DISARLE MEMORY MANAGEMENT ROZAMCEO MATNIEC-1 1 -D2aMGC~C MEMORY Mok 3 FIROM Q00000 TO MEMORY MAF:2 FARITY CORE FROM FARITY REGISTER AT 172100 Q00000 TO VG7777 FROGRAM FROGRAM END B.1.4 VEZPTY RELOCATED RELOCATED Fass 4 TO TO CONTROLS 120000 000000 1 KWI11 e ZRWAEQ ML 3L - DERWA-E LINE END Fass 4 1 END FAass @ oy noted reloact FREQUENCY v CLOCK TEST B.1.5 BMS873 R ZBMOHO EC 1 L~1ZBMIH MATND OEVICE VERSTON BM8#3-Yh Koo RoeCoDolFolivk ONLY. MATNDEC-LL-DZRMOH DEVICE VERSTON BM73-YH FROGRAM END B.1.6 NO. FASS (1s2y394) 1 BMBY3E-YH RXO01 R ZRXAEQ C-1 1 -XZRXA~E MAINDE RXCS = 177170 RXDRE = 177172 INT VECTOR = 264 CAUTION - IF YOU DESIRE TO TEST UNIT 0 REFLACE LOAX MEDIUM WITH & SCRATCH DISKETTE THEN FRESS DRIVEC(S)Y I CONTINUE UNIT O F= O T= Q0 = 0 B.1.7 DC20 Data Line Control o FOZTIHNEG MATNIEC1 L-DZOHN-F TYFE NO. OF SOR ADORESS DHLL ADDRESSES DAaTa RELTABILITY (OCTALY BETWEEN TEST VECTORS (10 OR 20) 20 TYFE FOR FIRST DHLL 160020 TYFE VECTOR ADDRESS FOR FIRST DHLL 330 TYFE DHLL DEVICE SELECTION LINE SELECTION FARAMETER 1 TYFE PARAMETER D000 TESTING DHLL 400 TESTING LINE G D #00 O LINE STATISTICE? RTOTAL XTOTAL PA000I END FASS 1824 & La24 DATERR FARERR FRMERR OVRERE Y. 0 Q 0 1 TESTING DHLIL #00 TESTING LINE #01 NOTE This test is for one DH11 only. B-6 B.1.8 DC20 Modem Control o P ZTHARIL e e MODEM CONTROL DEAGMOST L DT -0 | VECTOR ADDRESS-A20 CONTROL REGISTER ADDRESS-770500 LINE SELECT FARAMETER -000001 TEST-00 16 LINE SCANNER TEST NOTES TEST SELECTION FOR L LINE ONLY CONSOLE BEEP = END FOaSH RELOMSD B.1.9 RXDF Line Printer NOTES SWO=0 LF20 ONLY SWO=1 LF20 AND MAINDEC-10-DXLFR FRINTER REV. C IF LFO% OR LFO7 SET TO 6 LINES FER LE20 #1 I8 AvallaklE LP20 #2 1S avall.aBLE TO SELECT AN LP20 TYPE INCH 1<CR> OR 2<CR> OR <CR> 1 TESTING LF20 #1 FOR THE NEXT QUESTIONS: N LOWER CABES LFL4 FRINTERS Y LFOZ UHAIN FRINTERS END FABS & 1 N ANSWER "Y" OR "N"... B.1.10 Disk (DRJGAO) RZRJIGAO REFO4/5/6 NISKLESS CONTROLLER TEST - FART I - NZRJG-A REVIGTION Al ITF A UF FORT LOOKING SEQUENCE SELECT Al.l OCL7S ORLOCKED AT THIS T8 RHAS SERIAL DRIVE DRIVE STROBING ~ DRIVES BE ASBSUMED SWITCHED OFF FRESENT RBE VERIFIED = BY ko K sk OPERATOR I i sk ok sk ok sk koK kol k ok sk sk kokok NUMRER 1 003004 TYPE = 024020 IS5 AN RFO4 DRIVE TOTAL END DRIVE NO. FOR PORT THEN 3k ke ok ekl sk ol ok sk ookl sk sk koK ok kokok okl Kok MUST 1 TESTING REQUIRED CORRECT FLOF R e e ok st b ok Kok ol e ek sl ot b IF - NOT UNDER TEST MUST ON THE OTHER PORT 0k B Kk e ok b sk K 2L-MAR-76 TICL 7S UNDER TEST MUST RE LOCKED ON CHANGES ARE REQUIRED ON FORT SWITCH CYCLE THE DATE: CONNECTED ERRORS FASS LOOKING ON & AT "STAND THIS FASE BY" LAMF SHOULY ON UNIT NO. BE LIT S 1 RHAS — DRIVES ASSUMED FRESENT K 2K K 3k b 2 e ok 2k ek ok ek Kk Ok bk sk koK skok ok NOTED RHL1 CONNECTED T0 UDRIVE 1 IN THIS SAMPLE ON DRIVE Q NO B.1.11 Disk (ZRJHAO) FZRHBO = LZRJIH-A REFQA/ G/ DTSRLESS CONTROLLER TEST ~ FART I AL, TF TOL7S CHANGES SEQUENCE ALL 21-MAR-76 DATES REVISTON UNDER ARE T8 TCL S TEST REQUIRED NOT MUST REQUIRED UNDER ON FOR TEST BE LOCKED ON CORRECT FORT PORT SWITCHy A CYCLE UF STROBING THE FORT SELECT FLOF MUST BE SWITCHED OFF AR R oo ok ok R ek ek otk b ok skl ke stk skookokoiokolok skekoiok TFOTHIS I8 NOT DONEy ERRORS WILL RESULT ON IMED TESTS (T2L & TAé) 340 3 oK of sl sbe e o okl s ot sde sl sl sk skl ok skolok solkokolok deokokok LOOKING AT RHAS - PRESENT DRIVES 1 TESTING DHRIVE NUMBER SERTAL NO., = 003004 DRIVE TYPE = 024020 DRIVE TS TOTAL ERRORS END FAsS AN 4 NOTES RMLL 1 RFO4 ON THIS FASS ON UNIT NO. 1w DRIVE 1IN THIS SAMPLE 1 CONNECTED TO B-9. Q B.1.12 Disk (ZRJJAO) FZRJIA0 REFO4/75/76 FUNCTIONAL REVISTON 21-MAR-746 AL DCL7S UNDER CONTROLLER TEST MUST BE TEST» LOCKED FART ON II CORRECT - DZRJI-A FORY TF CHANGES aRE REQUIRED ON FORT SWITCHy & CYCLE UP SEQUENCE 19 REQUIRED FOR STROBING THE FORT SELECT FLOF ALL DCLZS NOT Or LOCKED ON UNDER THE TEST OTHER MUST BE SWITCHED OFF O LODKING AT RHAS - DRIVES FRESENT 1 . TESTING DRIVE SERIAL NO. DRIVE TYPE = = NUMBER 024020 DRIVE TS AN DRIVE TS OFFLINE HIT START 1 003004 RFO4 ON -~ DRIVE MOL I8 TO GET LOW IT ON LINE FROGRAM WILL HANG TESTING MOL TILL MOL I8 HIGH GOOn - MOL TS HIGHy FROGRAM WILL RBE EXECUTED TOTAL END ERRORS FALS NOTES RH11L ON THIS PASS ON UNIT NO. 1 THIS 1o 1 CONNECTED TO DRIVE B-10 IN SAMPLE Q0 B.1.13 R Disk (ZRIBAI) ZRJEA MATNDEC 11 -DZR B4 REFOA/5/76 FORMATTER FROGHRAM LUNTIT 8TaTuS 0 NOT 1 2 ONLINE RFO4 NOT FRESENT PRESENT 3 NOT FRESENT 4 5 NOT NOT FRESENT FRESENT é NOT FRESENT 7 NOT FRESE FROGRAM FORMAT MO0E & <C VERIFY OR F)2 OFERATE TN 22 SECTOR OFERATION WILL RBE IN DRIVES 1 ENTER ADDRESS STaRT (Q) 22 SECTOR N3 (lé RITY MODE Q7 410 TRK SELECT MODE LIME T&e CYL BTART TRK NI CYL END F 18 DATA o/ 7 7 FATTERN ZERODS (1) ONE‘S (20 WORST WORST Cask CABES STARTING FORMAT ON DRIVE 1 DaTa ERROR DURING WRITE IR ITVE ERE PG CYLINDER GOOO0L 004436 121 RECST REFCH2 144252 040301 REFWE A R CHECK TRACK HECTOR RL 130700 100000 RFAS R QOL740 Laz72441 Q32512 011006 OQQGO02 RSN R OF RFCA Q00171 QO304 110000 000171 DATA ERROR DURING WRITE DRIVE ERRK FC CYLINDER Q00001 004434 137 CHECK TRACK 15 SECTOR 13 RFCSL RFCHE REDS T RFER1 RFERS RFER3 RFECL 144252 040301 150700 100000 000000 000000 Q05435 REWE RFRA R 173633 RFSN 043076 RFOF 007414 RECA 003004 DATA 110000 ERROR ERE QOO001L 0044364 K 000211 DURING DRIVE PG Ly RFECY 002000 RFAS RFLA REF Lk RFMR RN 000002 RECE 0001460 1465455 000400 024020 000211 WRITE CHECK CYLINDER TRACK SECTOR 372 1% 4 CH L RIFGHE RIS RFERI RFERZ RFER3 RFECL RIFEC2 144255 040301 150700 100420 000000 000000 001742 003000 REWE RFEBA R RE A% RFL.A RELR RIFMR REDT 171315 036242 007412 000002 002340 0045464 000400 024020 RFEN RFOF RFCA RFECE Q03004 110000 000564 000544 FORMAT COMPFLETEy LA TOTAL ERRORS DETECTED? NRIVES B-12 3 - B.1.14 Disk (ZRJAA1) R ZRJAAL MATINDEC-L1 ~DZR A4 RFO4/5746 MECHANTCAL UNIT STATUS: 0 NOT 1 & ONL.ENE. RFO4 NOT FRESENT 3 NOT FRESENT 4 9 NOT NOT FRESENT FRESENT b 7 NOT NOT FRESENT FRESENT & READ-WRITE FRESENT ORIVECS)Y TO RE TESTED KWLL-F CLOCKy TIMING TESTS TESTING NUMRER NO DRIVE END OF FAass END OF TEST TESTING TEST 1 ON DRIVE SERIAL DRIVE 1 SERITAL WILL ERRORS NUMEER NOT RE FERFORMED 0604 DETECTED=000000 0604 B.1.15 SY2040 R 5Y2040 DEC/7X1LL. DXQAR-K STANDARD MONITOR BUFFER ROTATION ENARLED. RANGE?! WRITE SYSTEM SLZ2E: NO KT FARITY TO 074000 28I ENARLED EXERCISE LOAD MEDIUM YOU MUST CLEAR LOC » MAF KWOAG AT 027406 STAT KWAFO AT 030574 STAT 041000 140000 RXARO RFEBEO DLBAC AT AT AT 032270 0346260 046034 STaT STAT STAT 140000 1350000 140000 DTAaA0 AT 062N44 STAT 040020 CPCAG LFFA0 AT AT 05854630 05734646 STAT 5TAT 040020 140000 BMEAO AT 062016 HTAT 040020 DMEGO AT 064040 HTAT 140000 DHATO AT 065112 BTAT 140000 BRAAO AT 070764 STAT 040020 BREAOQ AT 071236 HTAT 040020 LRAEQ AT Q71572 STAT 140000 « DS NOTE This is a sample. Select all modules available for the particular configuration. e BEL KWDAO e BEL KWAFO « SEL DLEAO s G BMEAQO » BEL. DIMBGO «SEL DHATO e Bl BRKAAG + SEL BRREAO 40 1577764 KWao AT Q27406 STaT 041000 KWak 0 RXARO AT Q30574 a1 QIRLZ0 140000 100000 110000 FFREO AT O34H2460 8TaT STAT STaT DB A0 aT Q4L0354 STaT 140000 BTHAO M1 aT 4T OEH2546 QEFHEI0 H5TAT STAT QOO0Z0 QQOQ20 LEFFA&Q AT M7 364 5TaT 1LGOG00 Bk A fay STaT 40020 DMRBGEO AT POE2HLE 0464040 STaT 140000 DHATO AT QHE1L2 STHT LA4G000 BKAAO BREBAOG T T Q70764 Q71236 STAT S5TaT Q40020 LAk AT Q71572 BTAT LOOQOO Q40020 o RUN LAl ["of RUN SUMMARY AT RUNTIME-Q0Q03 RWIDAO AT QR740G6 GTAT Q&HLO00 KWAFO DRSO AT Ay D3QEH74 Q46034 STAT STAHT 140000 140000 gy e T 00001, ERFONT QOG0 . QOO33, QOO2Y., ERRONT ERROENT Q0000 . 00000, OMBEGO AT Q&HAD40 STaT 1AGOG0 T 00022, ERRONT QO000. HAT0 BIKAAO AT 065112 DIV 64 STeT STAT 140000 040020 QOOZ4, ©QO00%, FRRONT ERRENT Q0000 . QO000. 0713236 STAT QA4G020 T ERRONT QQ000, Rfiffifi SYSTEM ° AT #f ERRORS? £ F W ER F & ” (’)o 0Q00G4, 0 B.2 FLOPPY BOOT OF KLDCP FILOFEY BOOT OF KLDCP DECHEYSTEM DIAGNOSTIC CONSOLE VERSION 0.16 SWR = Q00000 # DTE O CMIne e RFO - B.3 BB.CMD T DIAGNOSTIC NECHSYSTEM W = CONSOLE 0.16 VERSTON # DTE Q00207 O CMle SRRELCMDy KLIOR PFROCESSOR DIAGNOSTIC RBOOT: SPROCESSOR &-aFR-77 HARIWARE SOTER20 INTERFACE FoDGEOTE 611 1 L OTE20 DGITE THE FOLLOWING LTE 40 TESTED DTEZQ FNTERING EXTTING ENTERING 10711 IS INTERFAGE(S) 1.10 EXIST ANDRESS 1744354 FRIVELEGED INTERRUFT INTERRUPT NFR VER. DIAGNOSTIC TEST TEST FABS TEST FASS PFass 1 PO= 1 CINT 1) PFC= 014042 1 025336 THE FROGRAM IS5 ATTEMPTING AN NFR TO A NON-EXTSTANT ADDRESS. IF THE BUS TIMEOUT LOGIC TIMEQUT aND ITSH ASSOCTATED ONE~-SHOT FATL THE PROCESSOR WILL REGRETARLY HaNG. THERE 16§ NO GOOD Way TO LOOF. GOOD LUCGK!! B-16 EXIT FROM NFR TESTING FASS 1 TESTING [ AN DTAGNOSTIC BUSSES ENDD FaSs 1e FEROX FART 1 FoOHRAAALL S Klo-10 MODEL BCHYU VERSTON?S EROX DIAGNOSTIC, PART 1 (XIHKAA) 0.l STARTING INITIALIZATION STARTING CLOCK TESTS TESTS STARTING STARTING STARTING LDRaM TESTS CONTROL. LOGIC STARTING STARTING MICROCOIE STARTING FM END 1o FASE TESTS TESTS SUBROUTINE EXTENDED RaM STACK TESTING TEST P EROX PART 2 FoIHKAR. AL L SED 1 KL.-10 EBOX MOOEL B CRU ERBOX VERSTONS 0.l DIAGNOSTIC DIAGNOSTICy MICRO-CODE 18 PART 2 (DHKAR) LOADING STARTING STARTING [AaTa FATH UMa TESTS STARTING STARTING CONTROL LOGIC TESTS 1O-BIT ARITHMETIC TESTS HSTARTING ) TESTS END FALE Lo SMEQOX BASITO FooOHERA.ALL SE0 1 MATNIED-LO0-THKEA RBASTEC MEBOX DIAGNOSTIC CONSOLE SWITCHES FROCESS0OR SERIAL = VER 0.2 Q00000 LO8Y . ENDT PASS 1 sMEM CONTROL. FooOHKEER.ALL SET 1 MATNDEC-10 DHIKEL MEMORY SYSTEM DIAGNOSTIC SWITOHES = QOOO00 UGOLE VEF¢S TON 1%5&6y CLOCK VER 1.1 RATE Oy JARIYHEY PROCESSOR T #1087, MEMORY REFORTEIS CONTROLLER ADDRESS TYFE Q 1 ME20 ME20 Fokokdok MEM CONTROLLER O KAk MEM CONTROLLER 1 LOGICAL MEMORY STORAGE 76 H 4 3210 0 0 0 0 O 0 1L 1 0 0 1L 1 1 1 1 1 CONFIGURATIONZ CONTROLLER AITRESS H1LALE RAO RAL ROE2Z RAZ CONTYFE INT QO0000 29&6.K 00 01 00 0l MRZIO 4 01 Q00000 38B40.K NONEXTSTENT MEMORY END sFPAGING : 1. Fass LOGIC FOOHRBC.ALL SED1 FAGING HARDWARE DHREC. sVER 0.1 END FASH 1. sCACHE OFTION F DIAGNOSTIC DHMCA. AL ] SED 0=~ 0HMGA MA TNIEC1 CACHE DIAGNOSTIC VER SWITCOHES = 000000 1.1 FROC @ 31087, END FASE 1. P DHMCR. AL SED U MALINDEC-10 CACHE DHMCR RaM BANGER DIAGNOSTIC SWITCHESIOO0000 UCODE VERSION END 194y CACHEs VER 1.1 JARIYBLY CLOCK RATE Oy PROCESSOR 1. FASE s CHANNELS P OHRKED.ALL SED 1 ‘ MATNDEC-10-TIHKEI KL-10 CHANNEL CONTROL DIAGNOSTIC CONSOLE SWITCHES = SERIAL # FROCESSOR END FASS VER 0.2 000000 1087, 1. FOGKEE ALl SED ] MATNDEC-1LO-DGEKEE CHANNEL LOOPERACK DIAGNOSTIC VER 1.10 ID 41087, CONSOLE SWITCHES = 000000 FROCESSOR SERIAL # 1087, SLOW-MODE DAaTH LOOFBRACK 0O.K. STARTING CHANNEL STARTING CHANNEL BASTE DATA ADDRESHING TEST FARITY ADDRESSING TEST ADDRESSING STARTING CHANNEL STARTING BUFFER CHANNEL RBUFFER O.K. BUFFER FARITY INTERACTION INTERACTION TEST TEST O.K. S5LOW-MODE REVERSE 0O.K. STARTING FagT-MODE LOOFRACK END Fass 1., yMETER BOARD FOHRCA.ALL 2159 (N MALINDEC-10 METER DHKOA (ME853E) DIAGNOSBTIC VER Q.1 JARRZYESY SWITCHES 000000 LUCODE VERSTON END Fass 1. FRPROCESSOR FooUER . RaM T 156y CACHEy CLOCK RATE Oy FROCESS0R T 41087, FUNCTIONALS CONFG.CCL MEMORY CONFIGURATOR VER 0.1 LOGICAL MEMORY ANNRESS S1ZE CONTROLLER REO KA1 RQA2 RAZ Q00000 2E6. K Q0 01 F8B40.K NONEXISTENT 000000 CONFIGURATION? 01 00 CONTYPE 01 MRB2O INT 4 MEMORY S MZ Oyl DFRAA.ALO STH 102 o END END PASS FASS L. 101. FoSUBRTN.ALO RLIOOT . A10 FNFRKAB.ALO 870 102 FIF-10 KLLO RBASIC INSTRUCTION DIAGNOSTIC LDFKARD SHIFT/ROTATE VERSTON Q.ly SV=0.13y CPUE=1L087y MOV=157s B-19 MCOO=1y HO=34y &60HZ END END FASS FASE 000000 000000 = NORMALs CLK RATE i SWITCHES = CLK SOURCE FUl.L.y 66 BLK O » CACHE? O 1 HO=34y 60HZ CACHE: O HO=34y 4OHZ 2 3 1. 101, FoOFRAC.ALO STh 102 FOF-10 KL10O BASIC MULTIFLY & DIVIDE SWITCHES = 000000 END 1. VERSTON 0.1y INSTRUCTION DIAGNOSTIC LDFRKACI MOV=157y MCO=1l» SV=0,13y 000000 DLK SOURCE = NORMALy FASS CFPUE=L087y CLK RATE = FULLy AC BLK 0 » 1 2 3 ENGO FASE 101, F* DFKATT.AL0 ST 102 FOF-10 KL10 BASIC INSTRUCTION DIAGNOSTIC COFKAD BYTE/RLTZJFFO/MIGC VERSTON 0.1y SWITCHES = SVU=0,13y 000000 CPUE=1087y MOV=1%57y MCO=1ly 000000 CLK SOURCE = NOKMAL» CLK RATE = FULLy AC RLK O » CACHE: O 1 & 3 END FASS 1. END FAast 101, o OFRKCA.ALQ 5TD 102 FfiPwlO KL1O ADVANCED INSTRUCTION DIAGNOSTIC #1 (OFRKCA)Y UERGSTION O«ly SWITCHES = 8U=0,13y 000000 CPUE=L087y MOV=157» 000000 CLE SOURCE = NORMALy FENIU FASS 1. CLK RATE = FULLe MCO=1ly AC BLK O ' » HO=34y &0OHZ CACHES O 1 2 3 END FASS 101, FOOFREAALO ST0 1 FOP-10 KL10 BASIC INSTRUCTION RELIARILITY TEST 1 (DFKEA) VERSION 0.1y SVU=0,13y SWITCHES = CLEK SDOURCE 000000 NORMAL» CLK MEMORY FROM MOV=157y MCO=ly HO=34y &0HZ CACHE? O 000000 = MaP = T0 QOOOOO00 CPUE=L0B7y QOV77777 RATE = FULLy SLZE/R 29b B-20 AC BLK 0 » 1 2 3 TESTING 32K END Fass 1. FoOFREA.ALO ST 1 bflPwlO RL1O FAGENG HARDWARE DIAGNOSTIC (DFKEA) VERSTON Q.1 SWITCHES = CLK SOURCE SU=0,13y 000000 = CPUE=LO08B7y 000000 NORMAL» CLK MCV=187y MCO=1ly HO=34y &OHZ HO=34, HOHZ CACHES: O : RATE = FULLs AC EBLK 0 END FABS 1., FODFRER.ALQ STl bfiP“lO KLLIO MONITOR UUO DIAGNOSTIC (DFKER) VERSTON O+ly SWITCHES = CLK SOURCE SU=0.13y 000000 = CPUE=L1087y MOV=137y Q00000 NORMALy CLK _ RATE = FULLy ENDY FASS 1. FOOFDTE.ALO ST MCO=1ly AC BLK 0 » 1 2 3 ' 4 hEEfiYSTHMlO KL1O DTEZ20 FUNCTIONAL DIAGNOSTIC (DFDTED VERSTION 0.10y SWITCHES CLK = SOURCE MEMORY MAF SVU=0,13y 000000 = CPUE=1087y MOU=157y MCO=1y HO=34 &A0HZ 000000 NORMAL s CLK RATE = FULLy AL BLK O » CACHE: 0 1 2 3 = FROM T QAOOOOO0 QQP2?7777 HIZE/K TESTING DTE20 END FASS 1. FoODFRDA . ALO # AT O ST bflfiwlO KL1IGO ARITHMETIC/ZRANDOMZ INTERRUFT/MEMORY RELITARILITY TEST (DFKDA) VERSTON 0,2y SWITCHES = CLK SOURCE MEMORY MaR FROM OOQO00Q0 END FASS 8V=0,.13y 000000 = CPUE=1087y MOV=157y HO=34, &HOHZ CACHE: O 000000 NORMALy CLK RATE = FULLy = T0 QOFZ7777 MCD=1ly HLIESN Al L. B-21 AC BLK O » 1 2 3 B.4 DGMMA Fe P DIGMMA nGMMa.ALL Fe BEI VER 2.2 1O-=-NOY-77 DEACON X/ H FROGRAM SWITCHES ARES FFREEZE $CX s MY WHERE SFREEZE §NONE /MARGING 2 X TO CLEAR ©C WHERE X T8 NONE X I8 CONTROLLER & Y IS INTERNAL MODULE OR © & M FREEZE DEFINED AS FOLLOWS:S (DEFAULT) ALl CURRENT Hsl (OR H OR LD STROBE Hel. (OR H OR LD THRESHOLD Hel. (OR W OR LD /PATTERNZX TO USE & FATTERN APATTERNINONE TO USE DEFAULT JRUGEX TO SET EXTERNAL MEMORY RUS MODEs WHERE X I8 (DEFAULTY 0 (OFF)y 1y 2 0OR 4 WHERE X I8 ME10MF10sMG10 OR MHL10 TO TEST 146K SEGMENTS OF EXTERNAL MEMORYy WHERE A 186 THE STARTING ADDRESS & N IS THE NUMRER SFECIFIC TEST FATTERNS NORMAL STYFESX ZOEGMENT IOA N ZGEGMENT : NONLE OF 16K TO CLEAR SEGMENT TESTING EFFECT UNTIL CLEAREL. SWITCHES REMAIN IN A HSTRING ENDING SWITCH THE FROGRAM TO BE SEGMENTS WITH AN ALTMODE ZMARGING fall.d KL-10 RELIABILITY TEST 00000 SERIAL # 1087, . 32 CORE MEMORY SWITCHES FROCESS0OR L FROGRAM SWITCHESD MATNDEC10-0GMMA CONSOLE KL1O-PY MEMORY REFORTED S CONTROLLER ADDRESS INTERNAL END:FASE G WILL STARTEID. TYFE VER STORAGE 6 H 4 3210 Q MEZ2O 0 0 0 0 1L 1 1 1 ME20 0 0 0 O 1 1 1 MEMORY 1. MARGING: 2.2 Al cMoz A B-22 CAUSE B.5S DIAGNOSTIC BOOT e BT | JERT.CMIy KL1OE DIAGNOSTIC BOOT, 20-8EF-76 FUR.RAM I CONFG.GOL MEMDRY CONFIGURATOR LOGTCAL MEMORY VER 0.1 - CONFIGURATION?Z CONTROLLER ANDRESS Lk RAOG RAL RA2Z REIZ CONTYFE INT 4 ME20 0l 00 01 296.K 00 0Q000G0 01 000000 3840.K NONEXISTENT MEMORY G ML Oyl FSUBRRTN.ALO FoRLDOT.AL0 ST fiEESY$TEM DEAGNOBTIC SURROUTINE'S VERSTON Os1ly SWITCHES = SV=0,13y 000010 000000 GLK SOURCE = NORMALy MEMORY FROM MaF = T0 OOO0QO00 QO777777 END 1. FASS CPUE=1087y CLK RATE = FULLy HITZE/K 296 5 NI CMIe PL MOV=137y 4 B-23 MCO=1y AL BLK O » HO=34y CACHED S0HZ 0 1 & 3 B.6 DDMME = P DDMME DOMME . A10 =y VER 0.1 16~JUN-75 ST FHP”lO BLT/ZMEMORY EXERCISER TEST (DDMME) VERSTON O.1y SWITCHES = CLIN SOURCE MEMORY MAF HV=0,13y 000010 = MLCV=157y CLKN RATE = FULLe = T0 QOP727777 END 1. MCO=ly HO=34y SHOHZ CACHE?! O 000000 NORMALy FROM QOQOOO0Q0 FAaSs CHUE=1087y BLZE/K pawlo SF N B-24 AC BLK O » 1 2 3 B.7 DDMMD we FDIMMD ‘ e e BUW SRS BT | P10 MEMORY VERSTON 0.2y SWITOHES 03~MAR-77 VER 0.2 NOMMELALO = MAF = TESTING MOVU=187y DOLK RATE = FULLy AC BLK O Y OR * <CR> N -~ SEECTFY NUMEER OF MOOULES, TEST SELECTION DATH FATTERNS -~ ALTRESSy Y WCF =~ 1 TO OR 4y N Y 32sall. MODULE -~ -~ 1 TOD 7y TYFEy Y OR N <CRs = Y OR N (CRY O=ALL - 0 (O TO 17) AlL =~ (CRY OF EACH (CR=DEFAULT) ¢ - Y FLOATING ONES/7ZERDS. Y OR N <CR> - Y CORE HEATINGy Y OR N <QRH>- N SELECTION COMPLETED END FASSE I8 IT OKy Y OR N <CRZ - Y 1 B-25 60HZ » CACHE: O 1 2 3 O=ALL SAME OR 1 TO 16 - 0 MODULE TYFE SEECIFY SIZE IN Ky ALL ALL HO=34y N IN Ky GRECTFY MEMORY SIZE TO BE TESTED MODULE SIZEy MODULE TYFEs MCO=1y G1ZE/K D54 T FROM 0000000 QO777IIY SEGMENT CPUE=L1087y 000523 000010 OLK SOURCE = NORMALYy MEMORY COIMMID DIAGNOSTIC SV=0,.13y B.8 DFRHD = oF TIFRHE DFRHE.ALO VER Fe 0,12 16-JAN-78 ST Fo MI-1O-IFRHE-T RH20 LOGIC TEST VERSION 0,12y §V=0.1%y CPUE=1087s SWITCHES = CLK SOURCE MEMORY FROM 000010 000000 = NORMALy CLK Mak = T0 Q0000000 RATE DAL FORTED 4 HOKOK ek ko LIST THE FUllLs AC MCO=1ls BLK 0.y MO=34s CACHES: 60HZ O 1 2 3 HIGHER? Y OR HSTZE/K QO7727777 AT A 8OO KOk sk K ok ok ok b sl sk ok ok sk 3k ok ok ode ok AlLo = MCU=L157y DRIVES ek ok ke ek sk FROGRAM RBE LOCKED ON THE RH20 FORT! ok ok ke ke ko ok ko sk ke sk sk ok sk ok ok ok ok ok ok ok sk koK ok ok sk ok ok koK ok SWITCHES? THE FOLLOWING RH2078 (540 ) -~ 1 (544 ) ok ok ok K Kok koK 3k sk sk ok ok e ok ok dk 6 ok koK ok sk s skokok MUST ARE Y OR N <OR> ~ N NETECTEDS O Is THIS TYPE CFU RH207SG A MODEL TO RBE "R" TESTED OR MOXEL "a" SEFARATED REV RY LEVEL COMMAS» 10 <CR3> OR AT END el TYFE DRIVE NUMEBER OF NONEXISTANT DRIVE ON 7 END FASS 1. G GCMbe - B-26 ALL CONTROLLERS TESTED N <CR> - DFRPK B.9 FOFRPK BT e 31-JAN-7?7 VER 0.2 OFRFK.AL0 fifllewHFRPK REGH-RHIO BRASIC DRIVE DIAGNOSTIC MOV=1S7y MOO=1ly HO=34y 60HZ VERSTON 0.2y 8Y=0.13y CFUE=1087y 000000 000000 = SWITCHES CLK RATE = FULLy CLE SOURCE = NORMALY MEMORY FROM MAF TD) OOOOODO0 = AC BLK O » CACHE: O 1 2 3 GTZE/K OOTTTTT 256 Aok ok sk okokok CATION - IT HAVE THIS DIAG. WILL - MOUNT SCRATCH PACKIS)Y WRITES THE FACK. TO RBE IF AN BEFORE RUNMNING. L1I-FMT SCRATCH FACK I8 USEIDy REFORMATED AFTER RUNNING THIS OIAl. ok ok o Aok dolok HEAD ALTGNMENT aND DUAL FORT TESTS DO NOT WRITE THE FACK LIST FGM SWITCH Al.l. DRIVES THE FOLLOWING OFTIONS % RBEING TESTED Y OR SHOULD N <CR> - BE LOCKED WITH DEVICE SELECT PLUG INSTALLED UNLESS INSTRUCTED OTHERWISE .+ .. 5 LR TVES H40 G444 0 SELECT RHYE RHS AND BE TESTED TO RPO&S ARE = | "AY FASS - OR ARE LEGALD "A") 1. THE FOLLOWING DEVICES HAVE RBREEN TESTED -0 RH-%544 ORIVE END FORT 544 SELECT DRIVES (0-2 DN RH-544 = 0 END ON FROFPER DETECTED (540544 vy 550y 554,560y 56425702574 OR S RH N PAass DRIVE TYFE= DUAL FORTED RFO& DRIVE SER. NO=0Q2050. 1. NOTE For an RP04 use DFRPH. B-27 B.10 DDRPI (FORMAT BEFORE ACCEPT) GMD: e 8THM Fo TORFL - RH10/RHZ20 VERSTON 0.0y SWITCHES = CLK SOURCE ~ SV=0.13y 000010 = RFO4/705/06 CPUE=1087y RELIARILITY TEST MCO=1y HO=34y 60MHZ CACHES: O 000000 NORMALy CLK RATE FROM Q0000QO0 T0 QOZZ27777 SIZE/K 256 LIST PGM OPTIONST THE - MCV=157y SWITCH = Y FULLy OR N AL <CR> BLK - O v 1 2 3 N RHZO MABSEUS CONFIGURATION MEC -~ DR - STATUS OF UNIT FOUND 544 - 10 - RFO& XIKIRKKokkk 10 DRIVE SER. FORMATTED NO.=020%. (ONLINED)s BY DRIVE SER. WRT ENABLED, DUAL NO.=0000., AR KKK DRIVES’S WHAT <TYFE:> AVATLARLE DRIVECS) TO TEST FORMAT RE = 1063 TESTED (00 N - TO 77 ALLy H=MELF) 7 #10 WHAT FORMAT A THE. FACK OF WHIGCH CYLINDER la BIT VERIFY * - FACK? Y OR <CR> SFECIFICATION 5 MAY 000 MODE AFTER BE (L1 ALLOWS "HARD" SURFACE Y 00 A& TOTAL OF ERRORS,. CAN NOT 20 ERRORS. .. ‘ HAVE ANY FORMATI? Y OR N <CR> -~ N FORMATTINGT Y OR N =QOR> - Y "HARD" ERRORS! FROGCESS ENTIRE FROGRAM RUN TIME = 0:Qi34 FORMATTING STARTED FROGRAM RUN TIME = 019313 OFERATION COMPLETETD FROGRAM RUN TIME = 019317 VERTFICATION FACK FOR ALL SELECTED B-28 DRIVES ? Y OR N STARTED <0R»> - Y FORT KoK= DIONE FROGRAM RUN LHRAG 200001 CONT-%443 TEST NAME: DRIVE #10 INTERRUFT TIME = FGM 0311313 EXCEF CHN-ER CNR *FORMAT" AT PC 8W = TRANSFER SIZE = 000000 MBCENE ATTN ATN-EN DONE FIA=4 ADDRESS 33163 DISK START ALDDRESS 181 CYLINDER #2461 (WHICH EQUALS LOGICAL RBLOCK $#47440.) AN 000010 50508 OR SURFACE #11 BRUFFER START SECTOR %00 ADDRESS = 112000 2600.(10) FEM INTERRUFT FC WAS ~ 44274 DRIVE EXCEFTION ERROR RHFTCR RHSTCR DRCK DRSR DRERL 5448F DRIVE=Q S544F DRIVE=Q 4408 DRAES 4401 DRAES 4408 DRAES NRERS NRER3 G441 G443 1404600 150600 ON DRIVE 544 -~ 046> 4+ RBLOCK CNT=20. FNCTN+GO=73 (READD) + BLOCK CNT=20. FNCTN+GO=73 (REAID TRA DVA FNCTN{30-34)=RIHED GO-BIT=0 TRaA PAREBRIT ERR MOL FGM DFR DRY VW TRA FARBIT DORK ECH 200000 200000 DRIA Va0 DRAES DRDCY 54408 DRAES TRA FARBIT DESIRED CYLINDER=R261 LDRCEY DROFST DRECFS DRECEFT CHAN-1 94403 DRAES TRA 4401 DRAES 544-08 DRAES 54408 DRAES LOGOUT DATA TRA TRA TRA L.OG Q04 TCW: Q0% BWL: LOGOUT 00& LAST UFDATED COW S TRA 200000 SURFACE=11 SECTOR=10 FARBIT CURRENT CYLINDER=261 BONCHEG OFFSET=0. ECC POSITION=2814. ECC FATTERN=1341 103074 SEUSEN CCW: NWCSE 440340 LNG-WC 1134620 CLFPF CHANL L.OG +W 1O3LOZ 103103 003636 0013212 AR Q0112000 Q01156346 MIGC. OFNIATA OFDATA LSTXFR B-29 POINTS HWE=1038, TO: 103103 AllR=113620 ECC FAULT: FOSITION DOK =1y COUNT ECI =0y INCORRECT FOS FOR =NON-0Q0 ECH =1 & ECH COUNT = MUST RBE GREATER THAN 4439,1 COMMAND ERROR RECOVERY @ ADDR 77452 18 READ HEADERS & DATA ISSUED TO DRIVE #10 FATTERN IS5 "ANY" STARTING @ NISK BLK #467440, (CYL=261y SUR=11y TRANSFER STZE RECOVERY WAS oKk FROGRAM TEST BECT=0) 5050 AT FGM UN-SUCCESSFUL TIONE RUN CONI-5441 LRAS S = PL FOR #33745 THIS INTERRUPT TIME EXCEF = OFERATION FGM SW = 000010 DRIVE 544 - Q4 000000 0313:%6 CHN-ER CNR MECENE ATTN ATN-EN DONE FIA=4 200001 NaME: DRIVE #10 DISK START "FORMATY AT ADDRESS 182 FC ALNDRESS CYLINDER 33163 #4546 SURFACE (WHICH EQUALS LOGICAL RLOCK #114840.) RBUFFER AND TRANSFER S1ZE = 5050(8) 0OR 2600.010) FOM ON INTERRUFT DRIVE FC EXCEFTION WAL - ERROR #04 START SECTOR ON DRIVE G44 ~ Q6 854438 DRIVE=Q 4+ RLOCK CNT=20. FNOCTN+GO=73 (REAID $443 DRIVE=(Q 4+ BLOCK CNT=20. FNCTN+GO=73 (REAIDD 54403 DRAES TRA VA FNCTNCI0-34)=ROH+ED GO-BLIT=0 54408 DRAES TRA FARRBRIT ERR MOL FGM DFR DRY VY 94408 DRAES TRA DOCK baA4T 140600 200000 G441 1504600 200000 54408 DRAES TRA SURFACE=4 SECTOR=12 4403 NRAES TRA DESTRED CYLINDER=4%56 LDRCEY DROFST DRECFS DRECEFT 4403 544-01 54401 54401 CHAN-1 LOGOUT = 44106 RHPTCR RHSTCR DRCR DRGSR NRERT DRERY DRERS NRIIA DRDCY NRAES DRAES DRAES TRAES #00 ARDRESS TRA TRA TRA TRA CURRENT CYLINDER=4356 SGNCHG OFFSET=0. PAREBIT ECC FOSITION=1&690, PAREBIT ECC PATTERN=2400 DdTA L.OG 004 DO TCW: SWLT 200000 103074 LOGOUT SRUSEN Q06 LAST UPDATED CCWS NWCSZ LNG-WE 424240 114424 B-30 CLF FOINTS FWE=600., TO: 103105 ADR=114424 112000 COW S CHAN-1 L.OG +WCE 103104 Q003636 Q0112000 OFIaTA 103105 Q01212 Q0115636 OFDATA COMMAND BEAD TR ERROR HEADERSZ RECOVERY & DATa MIGE. @ ADDR TSSUED TO FATTERN T8 "ANY" STARTING @ (LYL=486y SUR=4y SECT=0) TRANSFER STZE = $050 AT FGM FROGRAM RUN DRIVE S544 RECOVERED wene sevn pree Ko *a e FROGRAM TEST 4888 2000 Gra Tave DONE RUN CONIT-35443 THRAaSH S TIME - 0«63 FROM & sees = LSTXFR 77424 14 DRIVE 410 DISK PFC BLK #114840., $33745 031533 CYLE READ 456 SURFE HEADERS & 04 SECTE 00 DATA ON RETRY LOG 4#1. BLKSE 114840, sune INTERRUFT TIME EXCERF = FOM SW o= 000010 000000 03203133 UHN-ER CNR MBCENE ATTN ATN-EN DONE FIf=4 #11 SECTOR #00 START ADDRESS = 200001 NAMES LHREVE 10 DESK START "FORMAT® AT ADDRESS T8 FLC ADDRESS CYLINDER 33163 #1442 SURFACE (WHICH EQUALS LOGICAL BLOUK #304940.) RUFFER AN TRANGFER STZE = GOH08) OR 2600, 010) FOEM O OINTERRUFT FC WAS ~ 44135 B-31 112000 ORIVE EXCEFTION ERROR RHFTCR G445 DRIVE=Q0 ON 4+ DRIVE BLOCK 544 -~ Q06> ONT=20. FNCTN4GO=73 (REALD + BLOCK ONT=20. (READ) RHSTOR S44% DRIVE=Q OREGR 544--03% DRAES TRA DVA DREK Sa44-03 DRAES TRA FARRIT DRERL DRERS G44-03 DRAES THRA DCK G443 140600 200000 DRERS3 G443 TRIA LIRDCY DRCEY G443 54408 G440 DRAES DRAES DRAES TRA TRA TRA SURFACE=1L SECTOR=1S FARBIT DESIRED CYLINDER=1 442 FARRBIT CURRENT CYLINDER=14432 DROFST 54402 DRAES TRA SGNCHG DRECFS URECFT 54403 8544~-0: DRAES DRAES TRA TRe 150600 CHAN-1 LOC Q04 LOGOUT TCWes 200000 O0% 00 GWL LAST LOGOUT UFDATED COW S FNOTNAGO=73 FNOTNCIO-34y=RIOHAD ERR MOL PGM DFR GO~RBIT=0 DRY VY 200000 OFFSET=0. ECC FOSTITION=314. FAREBIT ECC FATTERN=Z400 DATA 103074 SRUSEN NWCSZ LNG-WE COW: 404040 115434 CLF FOINTS FWE=130. TO: 103075 ADR=115434 CHANL L.OC WG AT MI&E. ------------------------------------------------------- 103107 QOOO0O0 QOLO3074 SUMP W1 103074 1307 QOALIE GOLEL2 00112000 QO1 136358 OFDOATA OFDATA COMMAND READ ERROR HEADERS FATTERN T8 DATA "ANY" (LYL=1442y TRANSFER RECOVERY & = ADIR STARTING SUR=11y STZE @ THSUED DRIVE 544 FROGRAM WHAT - 85050 RUN TEST 0262 FROM 7 & TIME @ 18 LDRIVE #10 DISK AT FGM FC CYLE 1442 READ HEADERS = 77440 BLK #304940. HECT=0) PRUHRAM RUN TIME = 0321341 RECOVERED TO LSTXFR 021358 #3374%5 SURFH & L1 DATA SECTH ON OFERATION - B-32 0O RETRY LOG 1. COMPLETED BLKHE 304940, I ML wo DIRFL ~ RHIO/ARHZAO -~ RFO4/05/70646 —~ RKELIABILITY TEST VERSTON 0.8y SVU=0.13y CFUE=LOB7y MOV=157y MCO=1y HO=34y SWITCHES CLIK = 000010 SOURCE = MAF = MEMORY RH20 MALHEUS = FULLy AC BLK O v CACHE: ~ DR -~ STATUS 44 -~ 10 - RFO&6 10 DRIVE SER. FORMATTED OR Y N <CR> - NO.=Q02035. (ONLINE)Yy RBY DRIVE DRIVEC(S) avall.abBlk TO BE = TESTED SER. WRT ENARLED, NO.=0205. 10<6% (00 #10 WHaT TO , 77y All.y H=HELF)Y 7 ' TEST FROGRAM T RUN - ACCERT TIME = 030318 STARTING FROGRAM RUN TIME = 010118 ¥ TRaACE % @ SERTL ¥ TRACE X @ SEKTZ RECALZSEER -~ SEEK TRACE X% @& SERT3 - 1L TRACE X @ SEKT4 -~ INCREMENTAL ¥ TRACE X @ SEKTS - RANDOM X TRAGCE X @ SERKTS - SERVO ¥ TRACE X @ SERTZ - CYLINDER TIME = CYL 03173146 MAXTYL. 0007128, ¥ RUN FASS SEKTST ¥ FROGRAM 1 2 3 N KK HKOK DRIVES S STYRE: WHAT O CONFIGURATION OF UNIT FOUND MBC dokdolkokkaskokk OFTIONST SWITCH FGM RATE g ey 00777777 THE : CLK STZE/K TO FROM 0000000 LIST 000000 NORMAL .y &0HZ SEERS SEEKS SEEKS NOISE DIFFERENCE RONLY B-33 TEST #1. HkX DUAL FORT Ko e - FROGRAM DONE RUN CONT-G443 DRAS S = EXCER FGM SW = 000010 000000 019116 CHN-ER CNR MBCENEB ATTN ATN-EN DONE FIA=4 200001 TEST NAMES ORIVE ENTERRUPT TIME "ACCEFT" RUNNING *RONLY® AT FC ANDRESS 31206 #10 ODISK BTART aDURESS 187 CYLINDER #2610 (WHICH EQUALS LOGICAL RLOCK #67420.) ANIE TRANSFER STZE = POEM INTERRUFT FC WAS DRIVE EXCEFTION RHFTCR RHSTOCR G448 U443 DRCKR GA4-Q¢ S44-08 ada4-05 [RSK DIRERL 1200008) ~ OR SURFACE #10 SECTOR RBUFFER START AIDRESS S120.(10) 44106 ERROR ON DRIVE 544 DRIVE=Q DRIVE=Q 4+ 4+ RBLOCK RBLOCK ONT=40, ONT=40, - DRAES TRA PARBRIT DVA DRAES NRAES TRA TRO FARRBIT FARRBIT ERR DCK O FNCTN+GO=21 FNCTN+GO=71 (READ) (REAX) FNOTN(ZO-34)=READ GO-BIT=0 MOL FGM DPFR DRY VY ECH NRERS 9441 140600 200000 DRER:S aq4i 1504600 200000 DRDA CROCY 4403 94403 DRAES DRAES TRA TRA SURFACE=11 SECTOR=10 PARBIT DESTIRED CYLINDER=261 DRCCY OROFST G403 G44-03 DRAES DRAES TRA TRA FARBIT SBENCHG DRECFS S44-03 DRAES TRA ECC FOSITITION=4, O44-0% DRAES LOGOUT DATA TRA ECC PATTERN=1341 NRECFT CHAN-L #00 = 104000 CURRENT CYLINDER=261 OFFSET=0. L.OG 204 TCWS SWLd 1 200000 Q0% QO LAST & URLOATED “ LOGOUT 103074 SRUSEN CCW: NWCSZ 414000 LNG-WC 112600 COW’ S CHAN-1 L.OC +W0 103104 Q03600 Q0104000 OFDATA 103105 103108 Q034600 002400 001074600 00113400 OFDATA OFDATA AR CLF +WC=384, MIGE, B-34 FOINTS LSTXFR TO$ 103106 ADR=112600 ECE FAULTE FOSITION COMMAND READ DCK ERROR TSSUED FATTERN I8 (CYL=dély TRANSFER ECY =0y INCORRECT RECOVERY TO ORIVE @ "ANY" STARTING SECT=0) SIZE = 12000 RECOVERY RUN TIME = POS FOR OF =NON-O ECH AllR #10 SUR=10y ATTEMFTING FROGRAM =1y COUNT =1 «Eb oens BeBR SPS 48SE SIS BEM GAEE 77420 =l MUST BE GREATER THAN 4639.11 14 @ DIGK RBLK #&67420, AT PGM FC #31215 & 40, SECTOR TRANSFER 0310336 A& READ ON RETRY #21. 400. MICRO -~ INCHES RY INDIVIDUAL SECTORS SECTH 07 LOG RLKE 67447, SW 000000 (USED HEADRER COMFARE TINHIRBLIT) BPRE BO46 004 DSV SUSH EEED FERE Seee Ko p - DONE INTERRURT FROGRAM RUN TIME CONT-544% EXCEF DRAS : ECH : DRIVE S44 - 026 CYLE 261 SURFE 1L RECOVERED FROM OFF-SETTING AT & COUNT FGEM = 0211331 CHN-ER CNR o= MBCENE ATTN "RONLY" AT 000010 ATN-EN DONE F1A=4 200001 TEST NAMES DRIVE #10 "ACCEPT" RUNNING DISK START ANDRESS 188 CYLINDER #4564 CWHICH EQUALS LOGICAL BLOCK #114840.) AN TRANSFER FGM INTERRUPT SIZE = FC WAS 1200008 -~ OR FC ADDRESS 31206 SURFACE #04 SECTOR #00 RBUFFER START ADDRESS = H120.(10) 104000 470054 DRIVE EXCEFTION ERROR ON DRIVE 544 - Q&% RHFTCR S443% DRIVE=Q 4 BLOCK CNT=40. FNOTNYGO=71 (REATD RHSTCR S44: DRIVE=Q 4+ RLOCK CNT=40, FNCTN+GO=71 (REAID DR G Ha4-03 DRAES TRA PARRBIT DVA FNCTNO30-34)=READ GO-RBIT=0 LRSR 4401 DRAES TRA PARBIT ERR MOL FGM DFR ODRY UV DRERL 54403 DRAES TRA DOK DR ERG S44% 140600 200000 DHRE RS G443 150600 200000 DRI Ga44-03 DRAES TRA SURFACE=4 SECTOR=1Z ODRDCY 94408 DRAES TRA DESTRED CYLINDER=4056 DRCCY 54401 DRAES TRA CURRENT CYLINDER=4356 DROFST 544-08 DRAES TRA SONCHG OFFSET=0. NRECFS 544081 DRAES TRA PARBIT ECC B-35 POSITION=1690. OREGCPT CHAN-1 G544-03F DRAES LOGOUT DATA TRA FARBIT ECC FATTERN=2400 .G Q04 TCWE Q05 SWi: 200000 LOGOUT 004 LAST UFDATED COW S CHAN-1 1.00 +WE 103074 SRUSEN CCWE NWCSZ 424000 ATIR LNG-WE 103104 003600 00104000 OFDATA 0034600 Q02400 Q0107600 00113400 OFDATA OFDATA COMMAND ERROR ISSUET FATTERN T8 {CYL=406y TRANSFER ECEC ECEC DRIVE @ ADDR "ANY" STARTING SECT=0) STZE = 12000 RECOVERY CORRECTION AT FGM PC #3121% A 40. SECTOR OF RECOVERY ECC 333333 333333 FROGRAM RUN NDRIVE 544 RECOVERED ECC CORRECTION I FROGRAM DONE RUN CONI-S443 DR&S S = INDIVIDUAL FIELD 456 SURFE 04 ON RETRY #1. SECTH 11 LOG BLKE USET. .. INTERRUPT TIME EXCEF = FGM SW = 000010 000000 0:17:27 CHN-ER CNR MBCENEB ATTN "RONLY" AT ATN-EN DONE FIo=4 200001 NAMES "ACCEFT" SECTORS 0113311 CYLE READ WAS RBY T Kok TEST TIME - 026 FROM A& DATA TRANSFER FATTERN=202400 H73333 IN #114840. 44 DATH ENTIRELY 1% BLK 10627 3561333 CORRECTION 77440 DISK BUFFER ADDRESS DATA BEFORE ECC ECC 103105 ANR=1046400 LLSTXFR @ FOSTTION=169%, AFTER TO! #10 BUR=4y ATTEMFTING # RECOVERY TO FOINTS tWC=640. MIGEC. 103105 1031046 REALD CLF 106400 RUNNING B-36 FC AIDRESS 31206 114849, LDRIVE #10 CYLINDER #1442 SURFACE %10 SECTOR #00 DISK START ADDRESS 183 BLOCK #304920.) BUFFER START ADDRESS = 104000 {(WHICH EQuUAaLS LOGICAL G5120.010) OR 12000(8) = S1ZE AN TRANSFER FGM INTERRUFT FC WAS — 463143 DRIVE EXCEFTION ERROR ON DRIVE 544 — 0+6> RHFTCR $544% DRIVE=0 + BLOCK CONT=40. FNCTN+GO=71 (REAID RHETOR %441 DRIVE=0 4 BLOCK CNT=40. FNCTN+GO=71 (REAID DRECR Y4401 DRAES TRA PARRBIT DVA FNCTN(30-34)=READ GO-RBIT=0 DRSK H544-0% DRAES TRA PARRIT ERR MOL FGM DFR DRY W LRERL DRERZ NRERS DRIA DROCY DRCCY DROFST DRECFS DRECFT CHAN-1 S44-0% DRAES TRA DOK H44: 140600 200000 G441 150600 200000 G440 54403 54401 %44-01 544-01 $44-01 LOGOUT DRAES DRAES DRAES DRAES DRAES DRAES TRA TRA TRA TRA TRA TRA SURFACE=L1 SECTOR=1é PARRIT DESIRED CYLINDER=1442 FPARBIT CURRENT CYLINDER=144. SGNCHG OFFSET=0. ECC FOSITION=314. FARBIT ECC FATTERN=Z2400 DATA L.OG 004 Q0% Q06 CCW’ S .OC 103101 103102 103103 TCW: 200000 103074 SWid LOGOUT SRUSEN NWCSZ LNG-WC CLF FOINTS LAST UPDATED CCW: 630000 114400 +WC=768., CHAN~1 WG 003600 003600 002400 AR 00104000 00107600 00113400 TO! 103104 ADR=114400 MISC, OFDATA OFDATA OFOATA LETXFR COMMAND ERROR RECOVERY @ ADDR 77444 18 REALN ISSUED TO DRIVE #10 FATTERN IS "ANY" STARTING @ DISK BLK #304920, (CYL=1442y SUR=10s GHELCT=0) TRANSFER SIZE = 12000 AT FGM FC #31215 ATTEMFTING RECOVERY QF A 40, SECTOR TRANSFER RY #4 ECC CORRECTION RECOVERY &4 ECC FATTERN=202400 ECC FOSITION=314. 114210 ADDRESS BUFFER DATA BEFORE ECC SUSS55 055753 S33E555 HOE753 DATA AFTER ECC IN DATA FIELD ENTIRELY CORRECTION B-37 INDIVIDUAL SECTORS FROGRAM DRIVE RUN G44 - RECOVERED FROM A CORRECTION EPIE EIES PHED S00E GISE SEED SIRE B6FS 0:118:49 READ WaAS S50 SRR 1442 HSURFE 11 ON RETRY #1. SECTH USEX. .. Ae0R H 005 H GPTR H BUES = CYLE i SPON 12 I Suss - ECC TIME 026> FROGRAM RUN TIME = Q3195 RCTEST FROGRAM RUN TIME = 0320344 FRTEST FROGRAM RKUN TIME = 023223 NEXTST FROGRAM RUN TIME = 0123:44 INTTST FROGRAM RUN TIME = 0i25:152 STEST X TRACE X @ STSTO - FLT ONES k TRACE X @ STHTL -~ FLT ZERQS fe-F-f SUMMARY FROGRAM RUN SYSTEM TOTALS RITS XFRED DATA TIME = (10) BITS: READ WRT = ERROR TOTALS 13022 7,733 BITS SEERS g = X 10(9) = = 4,623 F.,109 X X 10(9) 10(9) 31250, - SOFT READ = 3, MARIDD READ = 0. SOFT WRT = 0. HAaRI WRT = 0. SOFT FOS = O, HARD FOS = 0, NATA COMFARE SYSTEM ERRORS = 0, B-38 15 LLOG BLK¥ 3049353, MEBC DETECTED ERRORS DATH BUS FARITY ERRORS = Qs = 0® NRIVE KAk ERRORS ERRORS = RESFONSE DRIVE MEC GHANNEL ERRORS = Q. sses Sues 3oa v seok sers wean sear ¢aes Site sene yeps e o "R $Ss #5 ert 4UEF 4556 yRES HAVE SHES 05D TGS SE0E STE SHUE SEs ENAN SBDD UBES 40FS @ TRACGE ¥ BEAD TE eo 09 et HTHTR2 eoe eavs suer w 4s0 eron sern 2645 Seis ESSD Sese SIS SUEE NS ODSD sure ALT - aure HeaE Bhaw ferv 606¢ VEED EDEE SueV 00E DERS BITES Ao K K DONE INTERRURT FROGRAM RKUN TIME s L34l EXCER CHN~ER CNR CONT~-5443 RUNMING "BCCERT® NAME DRTVE 10 DTSR START ADDRERai5 . 4 N res sage sess esae seve eone e o435 200 sbe Sres eres Sere DATA FGM SW o= MREBOENR ATTN "STESTY AT INTERRUPT FLQ YELEUNDER RS B0 CK (WHICH EQUALS LOGICAL AN THRANSFER GLZE = (M o SIC 000010 ATN-EN 000000 DONE FIf=4 200001 DRAS S TEST Qe EXCEFTION G443 NRER DHRERT Qg3 SOy DRERS S443 DRE RS DROA 443 150600 200000 WR R L O URAE o TRA ¢ DRICY S4a8-03 & TRA NRAES NRCCY OROFST Saf-Q3 S 4-~0Q3 LR Ak o DRAES TR DAL TRA 43 % G440 LOGOUT ADDRESS #00 = 1352000 1152, (100 BLOCK ONT=%, FNCTN+HGO=71 C(READD BLOCK ONT=11. FNCTNFGO=ZL (READ)D TRA FARBLIT DVA FNCTNC30~34)=READ GO-BIT=0 TRA FARBIT ERR MOL PGM DFR DRY UV + + TRA LGN 200000 1404600 G440 3 START ERROKR DRIVE =0 DRIVE=Q DRECHT CHAN-1 F1L1 0 SECTOR SURFACE BUFFER 31562 no e ORITVE DRECGCFS ADDRESS ! .'5'3 400 RHFTOR RHETOR DRGK T B R O#57180.) OR - Was #226 FC THA TRA HECTOR=10 FARBIT DESTRED CYLINDER=2264 FARBIT CURRENT CYLINDER=226 BONCHGE OFFSET=0. FCC POSITION=148, ECC PATTERN=Z000 DaTo L.OG TCW: Glg LAST Q04 Q0% D0& 200000 103074 LOGOUT SRUSEN NWCSZ LNG-WE UFDATEDR CCW:e 04000 154000 COWTMS CHAN-1 LOG W anas -------- sev ses ssae 103105 Q02200 CLEF ------------------- QOLH20 00 OFDATA B-39 FOINTS +WE=128, LOSTXFR TO: 103106 ANR=154000 COMMAND ERROR RECOUERY @ ADOR READ LTSSUED TO DRIVE #10 FATTERN I8 "al.lTRY STARTING (CYL=228y TRANSFER SUR=11Ly SIZE ATTEMFTING = RECOVERED FROM 4000 SESP SEPR EE 2Ere PISS Koo Sues S2PB ADID SIS S5N om0 FROGRAM TEST ESS Ness SEeE AT OF FGM & 9, = 13630 CYLE 226 & BLK #57180. READ ON FL #31662 SECTOR GURFH RETRY TRANSFER L1 SECTHE RY INDIVIDUAL OY LOG BLKE SECTORS 57187, #1. B0 DONE RUN CONI-G443 DRAS S 2200 TIME 0<6> DISK 18 SECT=Q0) RECOVERY PFROGRAM RUN DRIVE 544 - @ 77452 INTERRUFT TIME = EXCEF FGM SW o= 000010 000000 1822333 CHN-ER CNR MBCENE ATTN "STEST" AT ATN-EN DONE FIA=4 200001 NAMES URIVE #10 NISK START (WHICH "ACCERT" ADDRESS EQUALS RUNNING T8 LOGICAL ANIT TRANSFER SIZE = FGEM INTERRUFT FC WAS DRIVE EXCEFTION RHFTCGR RHSTCR S44F 3448 CYLINDER RBLOCK 2600(8) —~ #1442 #304949.) OR FC ADDRESH 31562 SURFACE #11 SECTOR #11 BUFFER START ADDRESS = 44300 ERROR ON DRIVE 544 DRIVE=0 DRIVE=0 4 4 BLOCK BLOCK CNT=11. CONT=20. - 0«6 FNCTNAGO=Z71 FNCTN+GO=61 (READ) (WRITE)D JRECR G443 TRAES TRA FARRBIT DVUA FNOTNC(IO-34)=READ DRSK DRERT 94405 G44-08 DRAES DIRAES TRA TRA FARRBIT DCK ERR MOL FGM DR DRY DRERS 4431 140600 200000 ad4: 150600 200000 LHRIA LRDEGY B344-01 WAL= DIRAES TIRAES TRA TRA SURFACE=11 SECTOR=16 FARBRIT DESIRED CYLINDER=1442 ORCCY 54408 DRAES TRA FAREBIT CURRENT CYLINDER=1442 DROFST DRECFS 54403 S44-00 DRAES DRAES TRA TRA SGNCHG OFFSET=0., ELC POSITION=304, 544--03 DRAES LOGOUT DATA TRA PARRIT LOG ECC GO-RIT=0 VY ORERS DRECFT CHAN-1 125000 1408.(10) PATTERN=2400 ‘ Q04 Q0% I CW ¢ U1 s 200000 103074 LOGOUT SRUSEN Q0é LAGT I UFOATED CCW: NWCEZ 430000 LNG-WE 126200 B-40 CLP POINTS HWE=768, TO: 103106 AlR=1246200 LW S CHAN1, lfl[ +WE AUH se oner sury avessess seee eses eavs 10%10 Mlqu.' eee ese aoor sove sver OFOATA OOleOOO Q02600 LSTXFR COMMAND ERROR RECOVERY @ ANDR 77426 18 READ TSSUED TO DRIVE 410 @ DISK BLK #304949, FATTERN lé "HLTE® STARTING (CYL=1442y GUR=LLy SECT=11) TRANSFER ‘Hil = 2600 AT FEM PG #31604 OF RECOVERY ATTEMRFTING A Ll SECTOR TRANSFER BY SECTORS INDIVITUAL Fd ECC CORRECTION RECOVERY 4 ECC PATTERN=20Z400 ECC FOSTTION=304, BUFFER ADDRESS 1246010 DATA BEFORE ECC S25452 GR2501E NATH AFTER GORRECTION ECC SX5252 ENTIRELY IN FROGRAM RUN TIME ORIVES44 -~ 0<é6x RECOVERED FROM A ECC CORREGT L[]P4 09 Srep SISE PRED PFIS ERED BEED Ess S804 EONS S04D = Leaas Wit CYL4 1442 GURFE 1L READ ON RETRY 1. bdfi§£$ 20Er Srda PR PRI DaTa FLIELD 13 LOG BLKE 000010 000000 304905, USEII. o o E2es ¥ TRACE ¥ @ 8TETI X TRACE % @ STSTIR -~ RANDOM ~ DATA BINARY Ao N0 TIONE INTERRUFT L1488 FROGRAM RUN TIME EXCEF CHN-ER ONR CONL-S448 LRG3 SECTH COUNT DATA FEM MBCENRE SW ATTN o= ATN-EN DONE FPlA=4 200001 TEST NAMES NDERIVE $#10 "HCCERT" RUNNING CSTEST® AT PO ADDRESS 31562 SECTOR 4 CYLINDER #4568 SURFAC E #04 DISK START AUDRESS I9: FE ADDRESS T RBUF ROSTAR (WHICH EQUALS LOGIOAL RLOCK #114840.) = SO008Y OR 2860, 0100 SIZE AND TRANSFER FaM INTERRUFT FC WAS - GRA3VG B-41 = 154000 NRIVE EXCEFTION RHFTCR RHSTCR 5443 G440 DRCR G440 DNRAES TRA PARRIT DVA FNCTN(30-34)=READ DREGK 2440 DRAES TRA FPARRBIT ERR MOL DRER a44-03 DRAES TRA DCK THRE G2 G443 140600 200000 wd43 1EH04600 200000 DRERS ERROR ON DRIVE 544 LORIVE=O DRIVE=Q 4+ + RLOCK RLOCK CONT=20. CNT=20. 046> FNCTN4GO=71 FNOTN+HGO=61 PGM IRT1A LRDGY ORECEY w4405 4403 a44--03 DRAES DRAES DRAES DROFST 54400 DRAES TRA SGEGNCHG OFFSET=0, ORECFS G44-00 DRAES TRA PARRIT ECC 544-03 DIRAES LOGOUT DATA TRA ELC DRECFT CHAN-1 L.OGC 004 Q0% S ICWE SWil: Q04 LAST TRA TRA TRA — COWS CHAN1 L.OC +W 103103 103104 Q03600 Q01200 CCW: NWESZ ADDR TS "COUNTY STARTING (CYL=406y SUR=4y GECT=0) @ TRANSFER FC F4 ECC ECC RECOVERY CORRECTION UaTe LaTa & 20, RECOVERY 727450 185 DISK BLK #114840. 431714 SECTOR TRANSFER 3656616 7356732 B&ETRZ7 &73%5467 3656616 735673 L6723V = CYLE srer sens LEAE BSe S0tE GSE0 @sEn €203 EAEE pas 2438 SITA Gpee ases anse sbs. VESE w sese 500t spee vibs FENS SENS GENE GEEP PEN tH veds INDIVIDUAL SECTORS 156257 IN TIME RBY FATTERN=2000 6735467 0<46 103104 ADR=156400 b ECC ENTIRELY TO! LSTXFR BEFORE ECE AaFTER ECC RECOVERED FROM ECC CORRECTION 2ees tWC=4640. 186256 FROGRAM RUN NDRIVE %544 — asse . FOINTS ADDRESS CORRECTION euss FOGM FOSTITION=1683. BUFFER wese AT OF CLF 156400 OFDATA OFOATA FATTERN ATTEMFTING LNG-WE MIGE, 00154000 Q01574600 5000 POSITION=1683. PATTERN=2000 ATIR = GO~RIT=0 VY SURFACE=4 SECTOR=12 CYLINDER=454 CURRENT CYLINDER=4%6 424000 COMMAND ERROR RECOVERY @ READ ISGUED TO DRIVE #10 SIZE DRY DNESIRED 200000 103074 LOGOUT SERUSEN UFDATED DPR (REALD (WRITE) DATA FIELD 114923128 456 SURFE & READ ON RETRY WAS USET. .. HOE BENE BINT S50) AIBE o3ep asse aevn bus sier NI SUES s HeSu B4R SISR SeBe TREE 4 scae snse v SPRS H SDID BI04 ehBe > 04 4#1. SONI 5. SECTH 11 LOG RBLKE 114849, ' Ffe SUMMARY DATA #-d-f PROGRAM RUN TIME = 230%1 SYSTEM TATALS (10D BITS XFRELN = 1.615 SEERS = RECALS ERROR BITSG READ BITS WRT X 10¢10) = = 8.832 7.318 = 100, TOTALS = = SYSTEM READ READI SOFT HARD WRT WRT = = 0., Q. SOFT HARD FOS FO& = = Q. O. DATA COMFARE ERRORS MEC DETECTED ERRORS 6. 0, = 0. nata BUS FARITY ERRORS DRIVE RAE ERRORS = Q. = MRBE DRIVE RESFONSE ERRORS CHANNEL ERRORS = 0, ve sene erae sans 10(9) 10(9) 31250, SOFT HARD ases X X o GF B-43 0, = 0. B.11 DFTUE HTM e DFTUE VERSION 0.4y HV=0,13y SWITCHES = CLK SOURCE 000000 000000 = NORMAL» CLK MEMORY = MAFP FROM TO Q00QQ0Q00 QOZ77777 TEST OR RH¥ RATE CPUE=R2E7y = FULLy AC MOV=107y BLI O » MCO=1ly CACHES TMOZ O DEV TUAL WILL ANY TARFES WHAT TEST (HCR> ACCERFTANCE TEST BASTC FART NOW TESTING ENIT FASS BAsSTIC NOW TEST ALL ON-~LINE DRIVES ON FIRST 3540 O MOUNTEXD FOR WRITE-ENARLED HELFYS MAY RE HRITTEN A 1 TMOZ/TUAL O/0 soksokskciolsokacklok foksor kol k ok 1. TEST FART TESTING NOTE: CORE= #7483 NOTE: TEST 2 TMOZ2/7TUAS ASSUME ECO 070 XICKICKKAOKAO K AR IOk NOK M8921-00008 HAS REEN INSTALLEL. NOTE The following tests will become DFTUK. L&OORPT RELIARILITY TMO2/7TU4E 070 FINTGSHED TAFPE SOORFY 2 256 (CR DEVICE #O 1 SIZE/K CONFIGURATIONS RHZ204% O HO=34y TEST HN= FASE RELIAEBILITY 0576 L3000k TEST FINISHED TAFE FASS 1 koK GURRENT TEST= 2675 CURRENT FALS = 3.5 B-44 STATILTICS? ONM. RH) 3 &SOHL TMO2/TU4S 00 IN 14600BFT RECORDSX MODE HE RS X LGS/Z7NERS NROOF WRITE? RI FWII? 4385, 43664, e Q. Qe 0. O Q. B70G4862 . 8700462, RI REVE 4366, 0. 0. Q. 8700462, NO DEAD TRKS TMOZ/TUAS HERSX WHEX ‘ O/0 IN NRZIL MODE RECORDSX HERGX HERS X RBE/NERS NR WRITE? 2253, s O+ Q. A604207 RIV FW: 22446, Q. Qo Q. AHOI7AEG . RO REVE 2246,- Qs Qs Q. AL027 35 . WATTING FOR abll. DRIVES TO FINISH REWINIOING... B-45 O OF WDSX B.12 FOIFSXA NFSXAa.A10 0.4 04~ JAN-78 GTH hECSYfiTEH KL1O CHANNEL/DTEZO INTERACTION TEST (DFSXA) VERSION 0.4y SV=0,13y CFU#=1087y SWITCHES = 000010 000000 CLK SOURCE = NORMALy CLK RATE MEMORY MAF FROM 00000000 FI MCV=157s = FULLy MCO=1y AC RLK O » HO=34y &60HZ CACHE: O 1 i e VER 3 e DFSXA = T 00777777 SIZE/R 256 (1-7)7% LEVEL DATH MABKCQ-7777277777777)7 SYSTEM CONFIGURATIONS COETOyx CLEFOy FOMe F AR THE AVATLARLE COMMANDG ARE: A= L.~ Bt BT Lt AUTO BOOT BOOT BOOT kG~ R ME~ EXAaM SPFECTIFIED REGISTER(S) GO START TESTING SELECTED DEVICES TYFE THE HELF FILE FRINT MROX STATUS Mo o R FRINT NAMES OF LEGAL REGISTERS FRINT S8YSTEM CONFIGURATION FRINT CURRENTLY SELECTED FARAMETERS REMOVE THE SPECIFIED DEVICECS) FROM e SELECT T~ FRINT PROGRAM RUNTIME (ELAFSE ZERQ TEST SELECTION TARLE & SELECT & GO LOAD FRONT END LOAD & HALT FRONT TEST FRONT ENI FRINT ENTER CFPU DDT THE END STATUS FOLLOWING B-46 TEST SELECTION DEVICE(S) TIME SINCE FPROGRAM STARTEID KA LOADING TEST "DFSXaAX" INTO SUMMARY-RUNTIME? FE# 3 014129 (SW13 =1) D B WORDG WRITTENS 1351868, READS 4224, WORDSG CHN ERRORS? WRITTENS WORDS READZ 0. 0. DATA WRITE ERRORS ERRORS: 0. WRITE REAL RETRIES: ERRORS?: G, 0. DATA WRITE ERRORSE ERRORS?S 0. O, WRITTENS WORDS READ: ERRORST 1351868, 4224, WORDS GHN RETRIES: ERRORS: 0. KA 2 WORDS CGHN ERRORS: RN R4 Qe WRITE READ 99072, 33024, WRITE READ RETRIES: ERRORS: O. 0. DATA WRITE ERRORSE ERRORS? 0. 0. w13 WORDS WRITTENS WORDS READZ CHN ERRORS? TEST 990732, 33024, O, SUMMARY-RUNTIME: WRITE READ RETRIES? ERRORS: 0. 0. DATA WRITE ERRORS: ERRORS? 0. 0314157 KA VB WORDG WRITTEND WORDS READ: CHN ERRORSE 135148, 9856, WRITTENS WORDSG READ: ERRORSS WRITE ERRORS? ERRORS: 0. O, R DWORDSG CHN WRITE RETRIES: O, READ ERRORSE: 0. DATH 135168, 2856, WRITE REAL RETRIES: ERRORS: 0, 0. DATA WRITE ERRORS: ERRORS: O, 0. LLLOE WORDS WRITTENS WORDM READ: LDHN ERRORSE 99072, 37152, WRITE READN RETRIES: ERRORS? 0. 0. DATH WRITE ERRORSS ERRORSS 0O, O, SLLE WORNSG WRITTEND WORDS READZ CHN ERRORS: 99072, X7152. WRITE REAL RETRIES: ERRORS? O. B-47 0. 0O, DATAH WRITE ERRORSS ERRORS? 0. SUMMARY-RUNTIMES TEST w003 WORDES WRITTENS? 135168, WORDS REA: 135488, CHN ERRORSE 035824 WRITE ERRORS? WRITE RETRIESS O. READ ERRORSE 0. DATH ERRORS: O, O 8 I R WORDS WRITTENS 13%168. WORDS READ: 135488, CHN ERRORS: 010> O, CHN ERRORSE SOLET O, ERRORSE O, WRITE ERRORSS WRITE RETRIESS O, READ ERRORSE 0. DATA ERRORE: 0. WORDSG WRITTENS 99074, WORDG READD 41280, WRITE ERRORSS WRITE RETRIES: Q. READ ERRORS: 0. DATA ERRORSD 0. WORDE WRITTENS 99072, WORDS READS 41280, WRITE ERRORS: WRITE RETRIES: 0. READ ERRORSS 0. DATA ERRORSZ 0. CHN w016 2x (SW7=1) QRO w2l END FASSE GMIne Eaa 1. 3 B-48 B.13 KLDCP BOOT VIA SW REG REX~Z20F YR12-12 11850 LSYO: REDIRECTED TO FOREO: MOUNTELD RLT e UERSTION KLT e ENTER 19-NEC-77 DROLI VROGA-07 DIALOG RUNNING ENOyYESEXITyRBQODTIT KL T =EXET ke e - LFARGERT FAREMER ESE - EROX STOPPED RO BOOEDROOT DECSYSTEM DIAGNOSTIC 0.16 CONSOLE SWR = CGMIe O VERSTON Q00207 LTE 4 ) B-49 - EXAMINE B.14 MONITOR LOAD SAMPLE REX-20F C8YO: CORO: KLI KLT KLTI VB12-12 11:50 RENIRECTED MOUNTEID]D TO == == == 19-DEC-77 RO VERSION VR0&6-07 RUNNIMNG MICROCODE VERSTON 202 L0OADED ALL CACHES ENARLED LOGICAL MEMORY ANDRESS SIZE CONFIGURATIONI CONTROLLER RA1 RA2 KQ3 00000000 192K 00 01 KL.I ~— BOOTSTRAF LOADED 00 AND 0Ol ME20 STARTETD CFS RQO CONTYFE INT i MOUNTEIDD TOSETSFI: COULD NOT SET MTA O SERT Sustem restartingy wait...ol & 350 TOGETSFOG COULD COULD POSETSFIG ENTER CURRENT SET MTH 1 SET MTa 2 DATE YOU 18 HAVE THIS WHY RELOADT TEST RUN CHEGKIN? N RUNNING NOT NOT ENTERED CORRECT AND TIME:? MONDAYy (YNNI Y SERIAL SERIAL 26 JUNE 26-~JUNE-1978 # 398 418 # 78 1640 4140FMy SAMFLE DIMF SYSJOR 3072 STARTED SYSIINFO AT 26—-JUN-78 XX OFERATOR 1640 RUN RUN SYSIMATLER RUN 5YS5:QUASAR JOB OO /L06G OFERATOR ENA “ESET LOGINS ANY TESEND ¥ WARNINGy KLAD-Z20 SYSTEM IN FTYCON GET OFERATION ' SYSTEMIFTYCON.ATO / 5. : 50 5. SJ 8.0 S0 0 ¢ 0 03 0 8YS RLOG OGN 1234 KLAD VI3 (KLADZO-K~3.0-A)y TOFS-20 MONITOR 3C1371) OFERATOR OFERATOR JOR 1 ON TTYL06 26~JUN-78 16140347 YOU UNDERSTAND HUMAN NATURE AND SYMFATHIZE WITH ITS WEAKNESS. END OF LOGIN.CMID.] B-50 LFrom OFERATORE S840 03 BENA S840 03 $UESET a0 03 $UESEND SJ 0 03 EFTYLON WARNING: LOGINS K 032 FTYCON: 032 o X0 + FTYCONZ STLENCE FTYCON.L.OG. 1 GET KLAD-Z20 SYSTEM IN OPERATION SYSTEMIFTYCON.ATO SJ Q32 FTYCON: B-START &. B H 03 FTYCON: FTYCONE L-S8TART 8.0 03 AOkkK L.COY 8.0 03 START - FLFTO=LFTO 16341849 kkkx FLEFTO=LFTO 54 02 ALFTHOL 80 S 01 01 LETSFLACLPTLVE 54 03 START S0 02 4. : S50 03 HKAOKK OPERATIONI] DEVICE RC1) FLEFTO TS LOADING 146341351 OFF-LINE VFU “NORMALY IN FLFTO dokkk ] Q3 FTYCON: L— WHAT 8 ¢ sLFTLILI-START FLPTI=LFTI sCDR2G-START FCORO$=CIROS i FTYCONZ: FTYCONS Q3 LCO) 4 AlLL OFERATOR LFTSPL. TI 5J 03 BCL) b OFERATOR EATCON TT 50 03 P2 K OFERATOR OFLEAS RN g B0 03 03 AGL 3D 0d4) é 2 F-5 OFERATOR EXEC EXE TI TI 54 03 FTYCON: ssokx IF S 03 FTYCONZ siolk SUBRMIT 8J 03 FTYCON: sdxk¥x ANOTHER JOB LOGGED-IN S 03 FTYCONZ: #xokdk WARNING % % A0 0t FTYCONZ: X000k FERMANENT KLAD V3 S5YS BNd 1234 YOU WISH TO THE RBATCH ¥ ENARLE IF DAMAGE FILE REV WILL (KLADZO-~K-3.0-A)y @ B-51 MO O OO £y IN : s j SYSTEM ANY WARNINGy G4 -\ KLAD-20 THE "RACK-UF RLGTQTh <OPERATOR>BKURF, AS 3711 <OFERATOR: ECO RESULT TOPE-20 IS TO NOT Rk XX INSTALLEDs THE Monitor 6Ok K dk Xk 3(1371) APPENDIX C HARDWARE ACCEPTANCE TESTS C-1 DIGITAL EQUIPMENT CORPORATION Sheet 1 HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: Front End Serial No: Run Test | Time Method of Test/ No (Min) | To Demonstrate Diagnostic Pass 1.1 10 11/40 CPU DBQEA 1.2 5 BM873-Y* DZBMD Run Test 1 *Designates current revision 1.3 5 DLI11-E DZDLC Use H315 test connector 1.4 5 KWI11-L DZKWA 1.5 15 MF11UP DZQMC 1.6 15 RX01/RX11 DZRXA (D = PASS COUNT) 1.7 30 F/E System SY2040 (See Note) SY2040 = DECXI11 Modify KWDAO and Notes Check KWAFO for 50 Hz. Set SW12 for pass count. Signoff Date DIGITAL Representative Customer Signature C-3 Sheet 2 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: KL10 CPU serial No: Run Test | Time Method of Test/ No (Min) | To Demonstrate Diagnostic Notes 2.1 5 DFKFB Load J BT. CMD first. Compare results with sample Instruction times , Pass Check set. 2.2 15 DTE from F/E DHDTE 22-2.11 and 3.1 - 3.10 may 23 EBox Part 1 DHKAA be run automatically by using the B command string. 24 EBox Part 2 DHKAB 2.5 MBox DHKBA 2.6 Memory Control DHKBB 2.7 MBox cache DHMCA Note 1 See Note 1 Will say ““both option bit 19” cache if cache option is not , | and “‘cache bit.” Indicate no 2.8 Cache RAM banger DHMCB 2.9 Meter board DHKCA 2.10 Channel control DHKBD 2.11 Channel loop-back DHKBE Signoff installed. Test will abort. Date DIGITAL Representative Customer Signature C-4 Sheet 3 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: Serial No: System: Device: KL10 CPU Run Test | Time (Min) | To Demonstrate No 3.1 15 3.2 3.3 34 3.5 *_Serial No: Method of Test/ Diagnostic Basic DFKAA Basic DFKAB Basic DFKAC instructions Notes Pass Check 3.1 -3.10 may be run automatically by using the KLCPU command string. instructions instructions Basic DFKAD instructions Advance DFKCA - instruction set 3.6 Basic DFKBA instruction reliability Paging DFKEA Monitor UUOs DFKEB 39 DTE from B/E DFDTE 3.10 Processor DFKDA 3.7 3.8 and user UUOs function reliability Date Signoff DIGITAL Representative Customer Signature C-5 Sheet 4 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: Memory Serial No: Run Test | Time Method of Test/ No (Min) | To Demonstrate Diagnostic Notes 4.1 40 DDMMD Run BT command string to load microcode, subroutine, Memory 1. Data pattern Pass Check etc. 2. Memory address 3. Worstcase pattern 4. Floating 1s and Os 4.2 5 43 20 Memory functions DDMME Memory DGMMA margins Signoff DIGITAL Representative Customer Signature Date Sheet 5 DIGITAL EQUIPMENT CO RPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: _RH20 Serial No: Run Test | Time No 5.1 (Min) | To Demeonstrate 5 RH20 functions for all channels available Signoff DIGITAL Representative Customer Signature Method of Test/ Diagnostic Notes DFRHB Switch 1 up for operator select. Pass Check Date Sheet 6a DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: RP04 Serial No: Run Test | Time No (Min) |To Demonstrate Method of Test/ Notes 6.1 5 Disk format DDRPI 6.2 60 Disk DDRPI Pass Check Test name: FORMAT Demonstrate for 1 drive only unless packs are unformatted. 20-sector format Run ACCEPT script on all functions drives for 1 pass. Allowable errors as per pack format spec. 6.3 30 Drive DDRPI Run RONLY and rotate compatability 6.4 10 Access times packs through all drives. DDRPI Test name: PTIME Average 28 ms Trk to trk 4 ms Max seek 50 ms 6.5 60 Dual port DZRJA Mech. read /write test. Pack facility must be 22-sector format. Signoff Date DIGITAL Representative Customer Signature C-8 Sheet 6b DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: RP06 Serial No: Run Test | Time No (Min) | To Demonstrate Method of Test/ Diagnostic Notes 6.1 5 Disk format DDRPI Test name: FORMAT 6.2 60 Disk functions DDRPI Test name: ACCEPT Pass Check Demonstrate for 1 drive only unless packs are unformatted. 20-sector format Run ACCEPT script on all drives for 1 pass. Allowable errors as per pack format spec. 6.3 30 Drive compatability DDRPI Run RONLY and rotate packs through all drives. 6.4 10 Access times DDRPI Test name: PTIME 6.5 60 Dual port DZRJA facility Average 28 ms Trk to trk 7 ms Max seek 54 ms Mech. read /write test. Pack must be 22-sector format. Signoff Date DIGITAL Representative Customer Signature C-9 Sheet 7 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: TU45 Serial No: Run Test | Time Method of Test/ No (Min) | To Demonstrate Diagnostic Notes 7.1 60 Basic functions DFTUK Run ACCEPT script on all drives. 7.2 60 Reliability DFTUF 7.3 5 Rewind Pass Stop watch Nominal rewind time check 1155 Signoff Check Date DIGITAL Representative Customer Signature C-10 Sheet 8 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: LP20-AB Run Serial No: Test | Time No (Min) | To Demonstrate Method of Test/ Diagnostic Notes 8.1 15 Function test DZLPB Set SW0 =1 8.2 5 Switches, Manual lights and Pass Check Check all error functions for correct operation. indicators 8.3 5 Print Visual quality Date Signoff DIGITAL Representative Customer Signature C-11 Sheet 9 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: DC20 Serial No: Run Test No | Time (Min) [ To Demonstrate 9.1 75 Diagnostic Method of Test/ Diagnostic DZDHM functions 9.2 30 Reliability Notes Pass Check - Use H315 test plugs. Prints end pass. DZDHN Set SW7 for quick pass. Prints end pass. 9.3 15 Modem tests DZDHK Use H8611 test connectors. End pass = ring bell Signoff DIGITAL Representative Customer Signature Date Sheet 10 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: Serial No: System: Serial No: CD20 Device: Run Test | Time (Min) | To Demonstrate No Method of Test/ Diagnostic Notes 10.1 | 15 DZCDB Two card decks required as Logic tests Data tests Pass Check follows: 1. Binary deck MAINDEC -89-D1B2-C 2. Alphanumeric deck " MAINDEC -89-D1B1-C. Date . Signoff - DIGITAL Representative Customer Signature C-13 Sheet 11 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: System: Serial No: Device: DN20 Run Serial No: Test | Time No (Min) |To Demonstrate _ Method of Test/ Diagnostic 11.1 5 11/34 CPU FKAAB 11.2 2 11/34 TRAPS FKABB 11.3 5 11/34 EIS FKACA 11.4 2 DL11-W ZDLDA 11.5 2 DZ11 ZDZAD Asynch 8-line test 1.6 | 4 |DUPII ZDPBB Transmitter test 11.7 4 DUPI11 ZDPCB Receiver test 11.8 4 DUPI11 ZDPDB Data/function test 11.9 4 DUPI11 ZDPEA Confidence test 11.10} 2 DTE20 DGDTE 2nd F/E DTE test 11.11} 3 11/34 Mem. FKTHA Notes Pass Check management 11.12 ] 15 Memory DZQMC 11.13] System DECX11 15 Signoff Date DIGITAL Representative Customer Signature C-14 Sheet 12 DIGITAL EQUIPMENT CORPORATION HARDWARE ACCEPTANCE TESTS Customer: Serial No: System: Serial No: System (Start-up) Device: Run Test | Time (Min) |To Demonstrate No 12.1 5 Power switching Method of Test/ Diagnostic Notes Pass Check Note 1 No failure indication Manual Note 2 1.ON (Note 1) To be done using system or 2.OFF (Note 2) main room power emergency OFF. No failure indication on restart. 12.2 5 Cold restart To be performed after overnight switch-off. May be Manual combined with 12.1. No fault indication. 12.3 |30 System DFSXA exerciser 12.4 | See note Microprogram |and monitor load Disk Boot Boot KLAD moniter. Configure command file. Submit FA&T ACCEPT. Run 72 hours. Date Signoff DIGITAL Representative Customer Signature C-15 APPENDIX D DECSYSTEM-20 INSTALLATION REPORT Accurate, detailed, and timely installation data is necessary to improve the DECSYSTEM-20. With this information it will be possible to detect reoccuring problems. Once a problem is identified it will be corrected. This process will result in future systems that are easier and faster to install. The installation report on the following page is the vehicle for providing the needed information. It should be completed and returned within five days after the hardware acceptance date. The form should be returned to: Field Service Product Support MRI1-1/835 Attention: Installation Department. The quality of the future DECSYSTEM-20 depends on the quality of the installation report completed today. DECSYSTEM-20 INSTALLATION REPORT Customer Name: System Serial No: Field Service Branch: Hardware Installation Period: From _______ To Software Installation Period: From To Hardware Acceptance Date: Contract Type: Hours/Day Days/Week Missing Documentation: Missing Diagnostics: Missing Hardware: General Condition of System Upon Arrival: D-3 PROBLEMS DURING INSTALLATION Device Comments D-4 Reader’s Comments KL10-Based DECSYSTEM-20 INSTALLATION MANUAL ’ EK-OKL20-IN-001 Your comments and suggestions will help us in our continuous effort to improve the quality and usefulness of our publications. What is your general reaction to this-manual? In your judgment is it complete, accurate, well organized, well written, etc.? Is it easy to use? What features are most useful? What faults or errors have you found in the manual? Does this manual satisfy the need you think it was intended to satisfy? Why? Does it satisfy your needs? O Please send me the current copy of the Technical Documentation Catalog, which contains information on the remainder of DIGITAL’s technical documentation. Name Street Title City _ Company State/Country Zip Department Additional copies of this document are available from: | Digital Equipment Corporation ‘444 Whitney Street Northboro, Ma 01532 Attention: Order No. Communications Services (NR2/M15) Customer Services Section EK-0KL20-IN-001 FIRST CLASS PERMIT NO. 33 MAYNARD, MASS. BUSINESS REPLY MAIL NO POSTAGE STAMP NECESSARY IF MAILED IN THE UNITED STATES Postage will be paid by: Digital Equipment Corporation Technical Documentation Department 200 Forest Street (MR1-2/T17) Marlboro, Massachusetts 01752
Home
Privacy and Data
Site structure and layout ©2025 Majenko Technologies