Digital PDFs

XX-6ADB3-45

December 1965

12 pages

Original

0.3MB

Document:	maindec-802-d
Order Number:	XX-6ADB3-45
Revision:
Pages:	12
Original Filename:	https://svn.so-much-stuff.com/svn/trunk/pdp8/src/dec/maindec-802/maindec-802-d.pdf

OCR Text

•

;

.-!`

"'1.

:9Po3 +C>npoJc|

ZO8 0epu!bw

:eluDN +OnpoJd

+se|. pJDoqJeloeHD XJoluew

:pe+DeJ3 e+Da

996[ 'L Jequne+dos

:Jeu!D]u!Dw

.dnQJ`o o!]sou6o!a

NOIIVJljllNJal
('`..,..

\
t'

Maindec 802

Page2
1.

ABSTRACT

u
+

Maindec 802 tests memory for core failure on half-selected lines under the worst possible
conditions for reading and writing.

It is used primarily for testing the operation of memory ar marginal

voltages.
2.

REQUIREMENTS

2.1

Storage

There are two versions of Maindec 802.

The Low End program occupies registers 0003-0111

octal and tests memory from 0112-F7# octal .
170®

The High End program occupies registers 7450-7555 octal and tests memory from 0000-7447
octal .
Both programs rec|uire the RIM Loader to be in registers 7756-7776 octal .

2.2

Equipmen_I

Standard PDP-8
USAGE
Loading

Turn off the Teletype reader.
Set the SWITCH REGISTER to 7756.
Press LOAD ADDRESS; then START.

Place the desired RIM program tape in I-he reader and turn on the reader.

When the program has been loaded, stop the computer, turn off the reader, and remove the

Switch Settings

Starting Addresses

0001
7450
3.3

Low End checkerboard
High End checkerboclrd

Program Control Set.tin

One of the four possible patterns that can be written in memory is obtainable by each of
the following SR settings:

•6u!+se+ elunseJ o+ ]nN||NOD SseJd

.(3V)D el|+ PJ00et]

VL]

'Jl'Dll

+xeu el|+ LPDeJ o+ ]r|N|j.No3 S§eJd

.(3V)D eH+ PJOoet]

eJnpgooJd AJe^oDeti

joi]]

s]ojl] lions luoJj

!
. dots JOJJe
sno!^eid 6u!snDo Heo ]o sselppD su!D+UOD DV

Je^Ooet]

9'8

L79£

VL a

.ioj|e u! i|eo]`os+ue+uoos^D|ds!P3V

7Z00

9gr£L

•00'00 JO` ZZZZ u!D+UOO +ou seop iieo Ajoure\^/

joji] jo} e'shD3.

(VW)3

JO'JJ]

LZOO

•+se]. pu] u6!H el|+ Jo] puo3es el]+ `+set pu] Moi eii+ Joj s! |sJ!] el|| /do+s iioDe Jo]

uo^!6 eJb.§e§§ejppb 9Mj.

.iojje iiobe jo] jnoo.a §do+s ]o j!bd 6u!Moiioj eii.I.

.bsje^ eo!^ Io 'o b §9iuooeq

I D j! SJnooo JOJJe UVJ .oooo Jo fzzz Je`l|+!.e, eq pinoHs iieo /Jouieun ue^!6 D }o s]ueiuoo eiii

e Dsr\ u! sjoii]

9'C

• ltlv|S SseJd
•00L0 eq ||!M S!l]+ `S,8-dad +Sou Jo]

.uJe++od +oejjo3 eii+

u!D+qo o+ c.c HdDJ6oJod u! ue^!6 S6u!++es Jnoi el|+ jo euo a+ t|]|.S|O]t] HD||MS all+ +es

7'C
•pesn eq pinoHs ooLo jo 6u!++es el|+ '\s,8-dad +soon Jo]
(.sa!Jounew

80WW Pup 98[ `g8L ed{|
]o] peso s! 6u!++es s!ii|.)

(. Z. 9 udDJ6DJod 9es
•sJe!|ddns Jeii|o iuoJ] si!un

9Jo3 |D!oeds Jo} elD aseii|.)

(.+!un aJoo 8-dad pJDpuo+s
ai+ Jo] pasn s! 6u!I+es s!l||)

c e6Dd
ZO8 0epu!DW

Maindec 802
Page 4
The errors detected by the Checkerboard Test are not usually traceable to modules which
the operator can easily replace. The t'est is of pr:mary value to the field service engineer in checking
out the performance of the memory and its associated circuit.s under marginal voltage conditions.

None-

theless, the checkerboards are useful for cursory checks during normal maintenance testing ,
I

RESTRICTIONS

4.I

The Low End Test reciuires the presence of the RIM Loader i'n upper memory, but destroys

the Loader during the course of the test.
Low End Test has been run .

The operator must remember to irestore the RIM Loader after the

There are no restrictions on the use of the High End Test.
DESCRIPTION

Discussion

In a standard core plane, a given core is selected when the combined currents of the x-and
y-selection lines produce a magneto motive force which exceeds the threshold for reversing the flux direct.ion of the core. This occurs cit the int.ersect.ion of the activated selection lines. However, all other
cores\which are threaded onto the activated lines will be slightly disturbed. Under marginal voltage conditions, such half-selected cores might also reverse polarity if their states are properly established by the

pattern which the Checkerboard Test writes into memory.

become 0.

When a selected core is in th.e I state, the read current wi`ll cause it lo reverse polarity and
When the core is i'n the 0 state, the write current will cause it to become I. Thus, the possin

biliry of a reading error is greatest when all the halfHselected cores are i\n the 1 state; a writing error is

most probable when all the half-selected cores are in the 0 srdte.
If a half-selected core changes polarity, the error will be detected when the memory register
containing that core is rested by the program. For a reading error, the contents of that core will appear
as a 0 in a field of 1 's, and vice verso for a writing error.
Every Checkerboard Test pattern consists of alternating pairs of memory cells, one pair containing 7777's the other containing OOOO's. Since memory manufacturers wire their core stacks in different

ways, the same pattern of alternations cannot be used for every type of core, and stil`l allow a .'worst case"
condition, that is, one in which all half-selected cards undergo the greatest possible.disturbance which
can occur when resting memory. The following pattern is used for the Ferroxcube memories with which
most PDP-8's are provided .

X-axIS

0011

(MAo-5)

T100

1100

0011

y-axis (MA6-11)

•§ec>!j+bun uie++bd 6u!

-Mo||o] eii+ Aq peu!]ep eJD s6u!++es Je]s!69i ip+!Ms eeJl|+ J9li|o 81|| Aq pe]DJ@ue6 SuJe|+Od eu|

Jo+DJaueo uJallod
•sie+s!6el 8ooL Aie^e sesle^eJ uJe++Dd eii|

Z`9

.AJouneun l|6noJii+ uo os puv

ZOLO

90L0
SOLO

POLO
SOLO

ZOL0
LOL0

00L0

Ll!fyfJ

9ufyfJ

s|ue|uoJ

SseJPPV

!snii+ 'jies+I esJe^eJ ii!M uJe++bd ei|t §Je+§!6eJ 84z Je]jb +,bl|+ ee§ gM 'X!J+Du uJ9++bd el|+ luoJ]

s+ue+UOD

SseJPPV
:sMoiio} sb sjDeddD Xjolueur u! uJe++bd ei]j.

•s!xD-A all+ uo uo!+!sod euo ssoJ3D pub 's!xD-X all+ uo dn MOJ pJ!l|+ all+ 6u!PDaJ
/C| Peu!LUJe+ep S! S!H+ !Z£4Z JO S, L eJD Logo ||eo (Jouneur ]o slue+UOD ei|+ 'es!M9¥!|

.o eJb oooo sseippb

+D ||eD /Jouaun eJ!+u@ 9u+ ]o S+ug+uoo au+ +all+ suDeun ii3!iiM `o D su!D+uo3 uo!+!sod s!Li|

s+ueseJdeJ JeuJoo +]e| JeMo| all+ 'snu|

.oooo uo!+D3o|

.s.8ooL e^!+noesuoo +ueseJdeJ s!xo-^ a`H+ uo suo!+!sod

•ZZ-00 LIJOJ] XJOu9u u! SuO!|D30| 9^!+n3esuo3 +ugseJdeJ S!xo-X all+ uo suo!|!soc|
'

•(e^oqD uMoiis so pe+eJdJe+u! eq p|noiis s!xo-^ pub -x)

:sMo||oj so pa+eJdJel

-u! s! {oJJo e^oqo el|+ `(9-°vw) s+!q JepJo-ii6!u eii+ /q seu!i s!xD-x all+ pub `( I L-9vW) Je+s!6eJ sseJppo

/Jouneur 91|+ ]o s+!q x!s JepJo-Mo| all+ Xq peuo!+!`Puo3 aJD S9u!| uo!+3e|as S!XO-A all+ e3u!S

9 66Dd
ZO8 09Pu!DW

0000

X-axis

Maindec 802
Page 6

Pattern Matrix

SR Setting

1100
1100
0011

0011

Y-clxis

0001

X-axis

1001
1001

0110
0110

Y-axis
0021

X-axis

0110

1001
1001

0110

Y-axis
0101

X-axis

1001
0110

0110
1

Y-axis
METHODS
Discussion

The program writes the pattern into the area of memory to be t.ested.

It then tests each

word as follows:

The contents of the word are checked for incorrect bits.
The content.s are complemenfed, deposited in the same' register, and retested for incorrect
bi ts ,

The original contents are returned to the register, and the next one is checked.
After all of memory is tested, the program then writ.es the complement of the pattern and

proceeds to check as before. In this way, every core is tested for errors that might occur when it is
read and when information is written into it,

9NIxOEHO

NEHM

uaHOM/

INEiiiEidh'03EH aNv NH]Iivd EHois/

VS I Voa
Hoe dwr
|NS
VW0

loo

GNU

Ivd awl
XU0a

V2S ¥0

UNS 01/

INII X SIESEt]d ENIl A/

lou awl
|ON

awl
0

¢©?/

SsEHaQv lvNld Hod lsEi/
©8'/
€?©£

NHEJIvd EHI INEWEldw00/

LL®\

?©„

©'/

979L

£©'©

L©''

£0'?
VS Voa

a,nw 0UI
Ivd ;Voa

anw avl
lsvI

6xls

WOO lvoQ

OVI

TWO

110

isEI aNE Moi;
a8vo8H]X3]Ho g-dad

e?©E} olaNlvw;
PuJ Mol

u!is!| iuoJ 6i

Wvtlootld
4 e6Dd
ZO8 0epu!DW

Maindec 802
Page 8

/77

/CHECK

PATTE,RN

/EF3ROF}

C'OF2E

/coMPLEmENT

/IN

THE

WORD

CORE

/TEST

C0i`1PLEMENT

WORD

/EF3ROFi
WED

STD-i
/ERROR:

/AC

CONTAINS

/REGISTER

©©76

%877

CONTAINS

INCOFiRECT

ADDRESS

WORD

ERROR

JMP Cc2
/CONSTANTS

81©2
81©5
©104

/VARIABLES

ssEHGav lvNld t]oH LSHi/
trf a..J' /

NHEllvd HHl lNHhlEld[tloo/
©T/

•

<Ols

9 fr £ 8

110

TWO

Voa

MOO

a) L V L

ty € £ 1

ZS£0

als

`XIS

'L7L

99trL

L9t7L

E; S 6 €

lp£'

8€£1

lou GV|
VZS

V|O

ZSI

WOO

SVI

0VI

fl S 9 i
€€£'

ZLZ£

^VOG

'€9'
fl 7 9 i

GVI

|ON

CNV

-JOG

£€£'

b'00 awl

Voa

|Vd Voa

lsEi GNI HDIH/

clHvO8HExOEHO

£S£Z
Sg££
i, € 9 £
t7fl94

££££
'Z'L

€97L
7974

€ 9 tl L
Z9rL
I 9t,L
f:, S t7L

LftlL
9€F4
€C-tlL
P g trL

£€7L
a; € 7L
I € tyL

r] € tyl

8-clad

pug l]6!H
€.Z@g

££®8
RE mlE

`£8©8

¢, 7 ® 8

€®'©
Z©'®

'''@

LL¢a
tr 1 ® ©

'4®©
£01@

£®'®

9£8@

8fgg
€98@

478C
fi di " ill

6 e6Dd
ZOO 3epu!Dw

Maindec 802
Page 10

7472
7475
7474
7475
7476
7477

©bB®

75b¢

©©©0

7 5 'b i

7595

784®
742%
5314

75@4

3755

75b2

1551

TAB

NOT

/lg-Y

1550
3 6 0 k)

TAD

HOT

LINE

LINE T0

PRESETS
SNA

DCAX

SZA

1654

8552
X,

75'd5
75B6

/STORE

PATTERN

/WORD

WHEN

AND

THE

COMPLEMENT

CHECKING

rl5bl

/77
7512

75 i ,5
7514
7515

/CHECK

PATTEF}N

/ERF}OR

7516
7517

7520
7521

7522
7525
7524
7525
7526
7527

/COMPLEMENT

7535

7556
7537
754%
7541

7542
7545
7544

THE

WORD

/IN CORE

755%
7531

7532
7533
7534

CORE

/TEST

COMPLEMENT

WORD

/ERR0Fi
TAD

WRD

CLL
JMP
TAD
HLT

STD-I
I SA
/ERROR:AC CONTAINS
/INFORMATION IN ERROR

CLA

TAD

HLT
CLA

/AC CONTAINS ADDRESS
/REGISTER IN ERROR

CLA

JMP

SEl8Vluv^/

flrmil
gong

` I,loo

, I vcl

90flf]

®6vs

af'qfl

`GHM'

`i~..

a t'A,I,.

XIS`

C1|S
0JL`

gls`

loll
VE;`

10)'
JVc'

|ON
10+
V'F

II
loo
MOS

73C

£03
Z33
)(00
|OC:

9€€1
€CCL

fr€€L
£€€L

LL€L

f!@Frl

q€€L

f'.ty9L

Z€€L
tc.Gl

Z01fl
O'Fr,

f'q'Cq
4Lr,a

9P€L
€t,€L

L I e6Dd

ZO8 99Pu!13W

Maindec 802
Page 1.2

DIAGRAM

8.I

Flow chart

'u
-_

REFERENCES (Not Applicable)