Digital PDFs

DEC-8L-HR2A-D

April 1970

41 pages

Original

2.7MB

Document:	8Lschem Feb70
Order Number:	DEC-8L-HR2A-D
Revision:	000
Pages:	41
Original Filename:	https://svn.so-much-stuff.com/svn/trunk/pdp8/src/dec/dec-8l-hr2/dec-8l-hr2a-d.pdf

OCR Text

Equipment Corporation
Maynard, Massachusetts
Digital

Maintenance

Manual

PDP-8/
Volume

DEC-8/L-HR2A-D

PDP-8/L

MAINTENANCE MANUAL
Volume

DIGITAL EQUIPMENT

CORPORATION n MAYNARD

MASSACHUSETTS

1st

O
.£-iiu

PrinHng April 1969

D-t^i.!
fD^.A
iiiiiiii^ \i\cv / u/c\^c;iiiud
I

10/.0
I

/v//

Srd Printing February 1970

The material

in this

tion purposes and

manual is for informasubject to change with-

out notice.

The following are trademarks of Digital Equipment
Corporation, Maynard, Massachusetts:

DEC

PDP

FLIP CHIP

FOCAL
COMPUTER LAB

DIGITAL

ENGINEERING DRAWINGS
ENGINEERING DRAWINGS

CIRCUIT SYMBOLS

Engineering drawings, necessary for understanding the

DEC engineering block schematic diagrams indicate

logic circuits and performance of maintenance on the
equipment, are contained in this voiume. Oniy those
drawings that are essential, and not available in the
referenced documents, are included. If any discrepancies are found between the drawings in this volume

signal flow, logic functions, circuit type and physical

Individual circuits are shown in block or semiblock

form, using standard symbols similar to those that

appear in other DEC publications.

LOCATION DESIGNATIONS

DRAWING NUMBERS

General

Digital Equipment Corporation (DEC) engineering

To make signal tracing easier, DEC uses a numbering

drawing numbers are composed of an alphanumeric
number containing five discrete parts. Each discrete

system on drawings that gives the location,. in the

part contains specific information as shown in the

following example.

equipment, of all signals named on the drawing. In
the main frame, module receptacle connectors are
identified with capital letters that designate horizontal

rows of modules within the mounting frame from top to

D-BS-99XX-1-5

bottom (A is the first row, B is the second row, etc .)
Module receptacles are numbered from left to right

Rev

Page

Timing, Manual Functions and Run

Instruction Reg. and

C
C

Refi - Tnniit Crintrril nnri *^L-in

Interrupt and Break Control

Title

Flow DiQ'^ram 'z sneers'

location, wiring, and other pertinent information.

and those supplied with the equipment, it should be
assumeo tnot tne arOWings suooiieo wirn tne eouioment
are correct

Drawing Number

D-BS-8L-0-2
D-BS-8L-0-3
D-BS-8L-0-4
D-BS-8L-0-5
D-BS-8L-0-6
D-BS-8L-0-7
D-BS-8L-0-8
D-BS-8L-0-9
D-BS-8L-0-10
D-BS-8L-0-1
D-BS-8L-0-12
D-BS-8L-0-13
D-BS-8L-0-14
D-BS-8L-0-15
D-BS-8L-0-16
D-BS-8L-0-17

D-MU-8L-0-18

Major States

Reg. Output Gate Control
Shift and Carry

Gate Control

Major Registers
Major Register Gating (4 sheets)

l/O Converters

Teletype Receiver

Teletype Transmitter

Memory Control
Sense Amps and Inhibit Drivers

X-Axis Selection
Y-Axis Selection
Misc Connections MC8/L
Module Utilization (2 sheets)
Power Supply 718

20
21
B

23
25

Sense Amplifier

Memory Selector

Inhibit Driver

26
26
26
27
27
27
27
28
29
30
30
30
30

fying the type of drawing (block schematic (BS) ); a

omitted) are assigned to the terminal connectors from

group of numbers and letters specifying the type number
of the equipment (99XX or a 99XX module); a single-

top to bottom

C-CS-G610-0-I

A-Diode Board

C-CS-G6n-0-l

B-Diode Board

digit number specifying the manufacturing series of

Double-Sided Modules

Resistor Board

viewed from the wiring side (right to left from the
module side). Capital letters (G, I, O and Q are

Reading from left to right:

the equipment

a one-letter code specify-

or first engineering change); and the

last single-digit number specifying

the number of the

On double-sided modules or connectors, the sides are

drawing within a particular series (5 or the fifth in

designated by a suffix number (1 for the left side and

the series)

2 for the right side)

The drawings are divided into

subunits, by dashed lines, that indicate different
rL _

ma uruwiriQ L</p*^ (;uue:> um:
-I

moouies.

insioe tne oasneu lines appear two sets or

numbers (together) that tell the type and location of
BS

block schematic or

logic diagram

drawing index

the module; for example, MllS F32 shows an Ml 13

list

module located in row F (6th from the top), slot 32
(32nd from left side, wiring side)
All signals have a
number associated with them that tells the pin number
and module side number; for example, M2 is pin M,
side 2 (right) of a double-sided module. Hence, a
.

cable diagram

CL cable list

FD
KS

flow diagram

key sheet

Ml 13 F32 M2 is found on pin M, side 2,
of module Ml 13 located in row F, slot 32.
signal with

circuit schematic

ML master drawing
list

Double-Height Modules

MU module utilization

timing diagram

On modules or connectors that are double-height
PW power wiring
RS

replacement
schematic

WD wiring diagram
WL wiring list

(occupy two places in a block of connectors, one
above the other), the module location and pin numbers
identification is similar to the double-sided module

identification, except that there are two letters assoc-

iated with the module location and pin numbers.

For

example, a signal with M710 HJ28 HE2 is found on an
M710 module located in rows H and J, slot 28, and
the signal is on pin E, side 2 on the connector in row H

B-CS-G624-0-1
B-CS-G785-0-1
C-CS-G826-0-1
D-CS-G921-0-1
B-CS-M002-0-1

B-CS-Min-O-l
B-CS-M 113-0-1
B-CS-MllS-O-l

B-CS-Mn7-0-l
B-CS-Mn9-0-l
B-CS-M 160-0-1
B-CS-M2 16-0-1

9
10

D-CS-718-0-1
B-CS-G020-0-1
B-CS-G221-0-1
B-CS-G228-0-1

ing the drawing size (D size); a two-letter code speci-

Power Connector
Regulator Control

PDP-8/L Control Panel
15 Loads
Inverter

NAND Gates
8 3-Input NAND Gates
6 4-Input NAND Gates
3 8-Input NAND Gates

C
C
C

Gate Module

Six Flip-Flops

33
33
34
34
34
34
35
35
36
36
37
37
37
37

10 2-Input

D-CS-M220-0-1
B-CS-M3 10-0-1
B-CS-M360-0-1
B-CS-M452-0-1

Major Registers
Delay Line
Variable Delay
Variable Clock

B<S-M516-0-l

Positive Bus Receiver

B-CS-M617-0-1
C-CS-M623-0-1
B-CS-M660-0-1
C-CS-M700-0-1
C-CS-M706-0-1
C-CS-M707-0-1
B-CS-M901-0-1
B-CS-M903-0-1
B-CS-M906-0-1
B-CS-W076-0-1

6 4-Input NOR Buffers

A
B

Bus Driver
Positive Level Driver

Manual Timing Generator

Teletype Receiver

Teletype Transmitter

Flexprint Cable Connector
Connector (Flexprinter)
Cable Terminator
Teletype Connector

EXECUTE

DEFER

FETCH

CUR ADD

BREAK

T
IMA+I—^PC
1

-STROBE,

AUT O INDEX

UAUTO

MEM+l-^MB

IN DEX

AND TAD

ISZ

__£

MEM +1

MEM-»MB

[yiEM-»M8

DCA

JMS

SKI P (0)^ SKIP (I)

JZTZl
PC

ME!M+I = CARRY

3./ :mB03(0)

PROCESSOR
lOT

MB04C0>MB06(0}

MB06(I)«AC=0
+
MB05(0«AC0 =
+

AC —AC

MB04C0)»MB06 CO

MB07(|)» L=

aT— AC

lOP

M805C0) • MB07(0)

MBIO

IMB07

MB05_(0)»
L

IN DEX

MEM-*PC

MEM + I-^PC

TAD

and'^

—

MAO—

PC 0-41

PC 0-4

AC "MB

—AC

AC-HMEM

—AC

0-»AC

—

MA+

MBIOCl)

(I)

RUN

lOP 2

MB04 C0>MB09C0)

—AC
I

MB05(0

MB04{0;»MB09(i;

—LMB07C0)
•

AC + SR

MB09(l)

TOP 4

MB04Cl>MB09tO;

H
MB08C0)»MB09

MB05{|)_» MBO7C0
L -t-

MEM+I-»MB

CARRY
WCOVFLO

—SKIP

5kTP

^ AUTO

MB 04(0)JMB0 4CO

MBII(I)

MB0 8 (I)

AUT O INDEX

0—AC

—

MEM-»MB

INC REMENT

ISZ

MEM 5-11

MB04Ci) • MB06C0)

MEM. + I=

MEM

—SKIP

MB04 (I) •MB06(l)
AC
AC + AT

DATAtrOUT

MB03( 0HmB0 3CI)^ND DCA
TAD JMS

MB03{I)

SKJP

T5 IN CA INDATA IN
CREM ENT V CP.EM ENT
i
MEM 4
|DATA-*-MB
MEM *MB —»MB
I

—MB
i-

MEM-fl»M8|

MB04U)»MB09(l)
SR

CO)

—AC

NO SHIFT
MBIO (0)i MBIOCO
,

MB08 CI)

MB08 (,!)
RIGHT ROT

RIGHT ROT 2

MB09

MB09 u;
LEFT ROT

(I)

LEFT ROT 2

ZZ3
MBIKU
4-

-AC

X
MEM

da ta

DONE

DATA ADD

BRK

^brk

red
brk
4
^—^progra1m

MEM5-tl

reo
,

SKIP CO) ^SK

JMS

C YCLEJ 3 CY CLE

-^B

MB 04C0)^ MB0 4CI)

l->WC| h

—

n^=^

pr J.

!~l

—MA

fBRK

DATA ADD

^ —MA I

MaO— 4
1

PCD

0-*MA

R EQ

DATA 4 PR 06 RAM

MA 0—4

MA 0-4

MBO3C0

M BO 3 CO)

±D 3^
I—£

aUTO

INDEX

DATA

DATA ADD

AUTO

i PROGRAM

MEM+I
MEM
—
MA —MA

»6Rk REQ

REQ

BRK

RE Q

BRK REQ

SKIP CO)A SKI P(

PC -l-l

O-^MA

—MA

MA -(-I

—MA

—MEM
fcMA

MEM +1

DATA

—MA

S=^

DATA ADD

'-*^l

I
I

I—

I—WC

3CYCJ

I—

D-FD-8L-0-21

Flow Diagram (Sheet 1)

\—*E
I

3 CYC^

h^WC

—•MA

CYCf
1
1

BRK RE Q

PC-(-

-IMS

—IR

PROGRAM SKIPCOi SKIP (I)

—

.IMS

irI

t
|

l->E

D-FD-8L-0-21

Flow Diagram (Sheet 2)

D-BS-8L-0-2

Timing, Manual Functions and Run

D-BS-8L-0-3

Instruction Reg.

and Major States

D-BS-8L-0-4

Reg. Output Gate Control

T M617
DOUBLE

DOUBLE

RIGHT
ROTATE

LEFT
ROTATE

M6i7

A 09

306

LEFT

SHIFT

AND
ENABLE

02, E 2

h
Ml
Al

R2,S2l

T2,U2

K2^2

1PI,R|

AI,BI

iUi'^'v"'

ENABLE

Ei,.iiiHl,Ji,K

r^
I

MBI0 (I)

MBP8 (0-

MB!Zi9 Cl)'

IV1BI0 (!)

MB08 (0-

MBI0 (0)

MB09 Cl)

MBI0(0)

MB;28C0)

l_L^MBj2(9Cp}

EXECUTE CO

.Q£J JT

-4

TS3 (0

Ml 13

B13

CARRY
INSERT

4
Ml 15
All

iS2

Ml 19

B!4
!

I
'

MA0K

CJZ')

MA0I

(0)

MAS2f2

(0)

—
—
—

MA03 (0)
MA04 (0) -tiiMA05 (0) ll
MA06 (0) -!-^
MA^7 (0) -tl2.

AU^

MEM ALT 2

—R2—WORD COUNT

MI60
AI2

6(r^

—

IHI

TSIC.>J^'|''

OPi

M
i-MBnCi:
IJI

+ 3V(9)

TS3(1) JMS

MII5
4rt|l4

J2|K2

-MA^ISCO

Nil

FETCH(I)

ap (I)

EXECUTECO

DEFER(l)

MEM
ENABLE ^-4

KEY
EX + DP

MFTS2 CD

i
hsz

PC ENABLE
-10 PC ENABLE

D-BS-8L-0-5

Shift and Carry Gate Control

TS2Ci;
1— CA

-B

EXECUTE(I)

-TS 2{ll
(INT SKIP ENABLE

?||

+3V (9)

INCREMENT

|S2

MEMORY
INCREMENT

D-BS-8L-0-6

Reg. Input Control and Skip

-+3V (17;
(

TJ^^DATA

D-BS-8L-0-7

Interrupt and Break Control

*LI

) mjSl,

BREAK OPTION

B36

G92I
AB0I

M220

M2E0

AB07

AB0S

r
^

• AL2

M220

AB05

AB04

AB03

AB02

AVil

BBi

AV2 AV

BBI

G92l('

BV2)

BD2

AKl

AV2

AC00

M220

CD0I

AV2 AVI

BAI

BBI

AC05

AC0I

BAI

BBI

AV2 AVI

BAI

AC09

AC0e

AC06

fCHi

f CFl

ACIS2

kU\ J_,

=13

G92I
Cpgl
(_»CDI

ft92l

AB0I

AU 2

• AR2

AN2

(JAK2
AS2

ASI

AT 2

:AU2 AT

ASI

AS2

BS2 )

BR2

• BL2

AU 2

ASI

AT 2

AU2 AT2

AS2

ASI

AU2 AT2

AS2

ASI

MB00

h-HIdJ

_AOpER_ll-

RIGHT SHIFTDOUBLE RIGHT ROTATE
NO SHIFT
'left shift

MB02

[dJ

MB05

[ dJ

[dJ

MB07

MB06

MB05

—m

]

MB08

MB09

—

'•

leJ

MB II

MBI<2

iir

MB LOAD

DOUBLE LEFT ROTATE
ADDER L
AR2

AP2

API

AR2

ANI

API

AP2

PC0I

AR2 API

AP2 ANI

AN!

PC06

PC04

PC03

AR2

API

AP2 ANI

PC09

PC0e

r
.

ANI

PC07

PQQib

AN2

AP2

[oj

AN2

-]_DJ

[dJ

llT-

DZ^CI

BI2

LOAD

CARRV OUT

CARRY OUT

MA LOAD

G92I

AB0I

CQ0I
f aS2

MI60
AMI

A 10

AM2

ALi

'BT2 )

AL2

ALI

AL2

'II
AMI

AM2

'ami

am 2

J
Ul

LINK(

•

—

REG BUS 00

L1NK(0)

MA06

MA03

MACP

REG BUS

<2 1

REG BUS 02

REG BUS 03

REG BUS 04

r^g gUS 05

'
'

ENABLE

-- +

D-BS-8L-0-8

Major Registers

REG BUS 06

MA0"

REG BUS 07

AMI

AM2

MA03

MAiZig

RES BUS 06

reg BUS09

ALI

ALZ

MAI0

REG BUS

D-BS-8L-0-9

Major Register Gating (Sheet V

D-BS-8L-0-9

Major Register Gating (Sheet 2)

M220
AB04
REG BUS

M220
AB03
REG BUS 0S

n rWhTi h

n rWrVi

AND ENABLE
RIGHT SHIFT

DOUBLE RIGHT ROTATE
NO SHIFT
LEFT SHIFT
DOUBLE LEFT

ADDER

ROTATE

05
06

ADDER
ADDER 07
ADDER 08
ADDER 09

DATA ENABLE
l/O ENABLE

MA ENABLE 6-1
PC ENABLE
MEM ENABLE 5-1
DATA ADD ENABLE
I

E^.1ABLE

D-BS-8L-0-9

Mafor Register Gating (Sheet 3)

rWfV^

AND ENABLE
SHIFT
RIGHT
NO SHIFT
LEFT SHIFT
DOUBLE LEFT
ADDER 08
ADDER 09

RIGHT

DOUBLE

ADDER
ADDER

CARRY

OUT

AC ENABLE

SR ENABLE
DATA ENABLE
1/0

ENABLE

MA ENABLE
PC ENABLE

5-11

MEM ENABLE 5-1
DATA ADD ENABL.E
I

ENABLE

D-BS-8L-0-9

Major Reaister Gatina (Sheet 4)

D-BS-8L-0-10

I/O Converters

TT
CK2

TT2

CR2

CS2

+ 3V

TTI

CMI

CLI

T TI

CP2

CT2

—

TTI 4

TTI SKIP

—

TTI 6

DH2

TTI

KEYBOARD
FLAG

KEYBOARD SELECT
TTI CLOCK

+ 3V

TTI SHIFT

I0P2

(.6)

- ojl]

MB03 (0) -^^
MB04 (0)
MB05 (0) ^fi
MB06 (0)*^^
MB07 (1)^
MB0e (I) ^^

—

CM2

+ 3V
START ENABLE
-IN

ACTIVE CO

SCALE

-CLOCK

—

CL2

INITIALIZE
2 CO

KEYBOARD

*—

+ 3V

SELECT

CDI

(l6)

DM2

SfrLTY2_iE2)

TTI SHIFT
SPIKE OETECTOR (I)

MEMORY

^V-

SUPPLY

PRESET
DS2

DN2

0U2
I

STOP

2 (0)

LAST
UNIT

TTI SHIFT
TTI 7(0)

jci
[dJ

CLOCK

CLOCK
SCALE

SCALE

CLOCK
SCALE

•^

STOP

TTI CNir
CLOCK

STOP

— 10 SPIKE
TECTCP
!

ACTIVE

-Tc^^

L
r

;

p—-.

TTI SMI FT

-Jcj

f-"

ACTIVE (0)

LAST UNIT(0)—o/

START

TTI

ENABLE

D-BS-8L-0-11

SHIFT

LAST UNIT

(I)-

Teletype Receiver

D-BS-8L-0-12

Teletype Transmitter

D-BS-8L-0-13

Memory Control

D-BS-8L-0-14

Sense Amps and Inhibit Drivers

y^-^ G6I!
f-,,4

CDE2 *

notes;
]N CD22
REPLACED WITH

l*G6ll
IS

G6I2

MP8L

INSTALLED

MA0I

(I)

MA02 (I)

MA0I (0

MA02 CO

6610
CD2(2

MA05 (.1)

~~5

~"f

D-BS-8L-0-15

X-Axis Selection

/wri

Cfi

'£*

I±J

*G6II IN CD22
IS

REPLACED WITH A

G6I2 IF

CR2

^ j^j

CNE

CL2

CK2

—H^

^H_3
—
1

P2I iCH2i

-K1—

20 f

-i

.CF2:
I

MA07(O

Ih2
I

£>1

»-&t

JL2I

CE2

1m21

*-t^

MA08 (I)

J2I

I^fO
V2
B

MA06 (0)-^
MEM ENABLE-

iCC2

|K2l

mJ V_y

tPCZ

(

R/W RETURN

—r!

02 S

105 ?

:04 '^
*-

-I

4002

tPFZ

fDE2

xM2~ L2i

M'
r^

DH2

M m Wt m
|DK2

1002

—

fDM2

»DL2

^~2~

iS2~ k2i~I

i£2 ""Nli

fvl

MEM ENA9LEMA0 9C0)-

NEG
CLAMP

-r^
,00 ^

rM source

MPSL

INSTALLED

CS2

^DN2

Jj*

fDP2

W; 0.V

uAac,
(I)
MA09 (i^^^

»DR2

i^J" Jli

|DT2

|DS2

TDV2 ) cn?2 »

tDU2

^
fYl

fTt

r-\

~4£1~

iS"

51l

1^2

MA
-^

10 CO

G22
D23

—|h2

NE3

CLAMP

u)—*

D-BS-8L-0-16

Y-Axis Selection

S22
D24
_J

BMA 00

BMA

BMA 02

BMA 03

BMA 04

BMA 06

BMA 05

BMA 07

BMA 09

PJI

MA00 (0)

MA0I {0)

MA02 (0)

MA03 (0)

MA 04 (0)

MA05 (0)

MA06 10)

MA07 (01

BF ENABLE

KEY CLEAR

LOAD SF

KEY

KEY DF

DF ENABLE

"b¥/

SP CYC NEXT

TB'

D-BS-8L-0-17

Misc. Connections

MC8A

MA08 [9)

E SET---F

SET

4^P2

TS2

MA09 (0)

MAI0 (0)

KEY LOAD
• H2

MAI

(0)

)

M2m

M22S

M2Z0

M228

M2Z0

REG
BUS

PDP-8L

RIGHT
1

MEM
MEM
ENABLE ENABLE
.0-4
5-11

MEM
ENABLE

MA ,B5

CARRY
INSERT

SHIFT

SiTTFT

PC
LOAD

PARITY
ERROR

MB ^9

MB .07

(1)

MA ;B4

MB 05

ADDER

;02

MB .03

MB 01

(1)

(I)

(1)

ENABLE

(;0)

MB :03

MB .05

MB .87

:09

MB .B6

Ifl.

00)

MB .04

MB .^J
00)

EVEN

Mi
PARITY
EVEN

PRESET

FETCH

LOAD

(1)

AND
ENABLE

B
AC

:07

INSERT

CARRY
OUT

M2S_

CARRY
OUT

SKIP

GS24

G826
X

SUPPLY

CARRY
OUT

CARRY
OUT
02

CARRY
OUT

RIGHT
SHIFT

CARRY
OUT

SUPPLY|

DRI,.

INT

ENABLE

DELAY

MEM
ENABLE

ENABLE

5-n

ENABLE
-5=40.

Mie2

Ml 62

INHIB

HEM
SUPPLY

STOP
DELAY

ROR
RUN

AND

DETECTOR

PO*ER

TnT

SUPPLY
REGULATOR

INHI_
ORIVEF

MEM_.

^MEM ^

"SUPPIT

PB 4
TO
PB 7

A&B
ENABLE

INT

Jim

Mill

INPUT
BUS

;04

;05

li0

INPUT
BUS

iTo

BUl

NHIE

INHIB

DRIVER DRIVER DRIVER

(S)'

DRI..

TO
_ ._
DATA

BMA

TO'
BMA

BMA

PUR

PKR
LO*O0)

r flS -|- 11

P*R
L0«(1)

SYNC
PUN

_L DATA-bMA

109

DATA

"ADD

DATA

TO_JMA

RDR
P«(R

sttp

CYCLE

tJATA

TO-

DATA

r™-

M303
I

CA
INCRE

MaB3

CABLE

.07

CABLE

MEM :0B
Tp""

TO
BMA

MEM

107

PARITY

11
3

DATA
ADD'

CABLE
nut

lU,

DRI.

CLEAR

:09' ;T0

1,0

CLOCK

BUS

BMA
'

DATA

INHIB

INHII

SKIP

ACTIVE

RDR
ENABLE

INHIB
DRI. 9

MEMORY
INCRE
HENT

SHIFT

POUIER

56
M7.a3

ENABLE

next'

CYCLE
MS03

"suppir

DRI..

MEM' 11

MEM
START

oDii'

STROBE

EMA

ENABL E
|sp

CYC
NEXT

pmJ

JMP

BTPJ

JMS

KE?
CLEAR

KET

LOAD

LINE
LO*

ADD
ACC (1)
I

keTTf

MEM
SUPPLY

PARITY
ODD

PARITY iENSE
,
-ODD -p ^6

SENSE

MEM
0?

ENABLE

DATA

PB 3

KbTUKN

INHIE

DRI.

DATA
ADD 1.0
DAT*
ADD 11

DATA

INPUT

DATA
ADD

DRI.. ,6

INPUT
BUS

~T0

l;./0

BUS

INHIB
DRI,.

ODD"

CONTROL

ClEAR
PAUSE

PB B

BUS 9

MB
PARITY

SENSE

MEM

SENSE

M516

PUN
INHIB
INHIB
DRIVER DR VER DRIVER

SENSE

"ENABLE

BUS

X R/*

335

i;0

ROR

INHL

M51fi

M71;B

M7:a5

CLR
REG

PO*ER

SENSE

S020

MP
SKIP

INT

G785

MEM
SUPPLY

B/*
SOURCE

CONTROU

CLEAR

ROR
STROBE

REGULATOR
NEG
CLAMP
INHIB
DRL. P

DRIVER DRIVER

LOAD

DOUBLE
LEFT
ROTATE

!NT

INHIB

MFU
95

THERMISTER

PARITY
ODD

CARRY
ENABLE INSERT

INT

INHIB

DRI..

INHIB

MEM

CARRY
INSERT

SYNC

DRI..

DRIVER

PAUSE

INHIB

TO
INHIE

HEM

MI19

CARRY
OUT ;0

LEFT
SHIFT

(I)

R'W

_MEH_j

TO
INHIB
3RIVER

INHIL

DRIVER

EVEN

SENSE
^3

Mill

DOUBLE
RIGHT
ROTATE

EXECUTI

RETURN
MEM _

;05

,04

INHIB
]RIVER
S

AC ;0l

;05

CARRY
OUT

G624
Y B/»

iNHie

CARRY
OUT

SENSE "

:03

ADDER

CARRY

SENSE

CARRY

AC .00

:B4

SENSE
"

SENSE

P ARIT Y

5-11
AC

1.0

;05

ENABLE
INSERT

MA
ENABLE
AC

SEf-SE

.03

INSERT

MANUAL
MB .00

DATA
ADD
ENABLE

mbTT

M617

ENABLE

P ARIT Y

ERROR

AND

PC :04

MEM

SENSE

MEM
PARITY
ODD

mEm

MA \S

22
i025

MEM
MEM
PARITY PARITY
ODD
ODD

f AR TY
PC iB6

1;fl

SHIFT

;0-4

18
G020

MEM

CONTROL
PANEL

17
S0Z8

PARITY
ODD

ROTATE

PC ;01

:05

M1S2

-SKIP.

MEM
ALT

PC 07

M115

DOUBLE

LEFT

MA
PNABLP
5-11

ENABLE ENABLE
;0-4

H163
D OUBL E

REG
BUS

.05

12
MS 17

BA (B)f

|<EY

INTTI

ALIZE

PDP-81

OPTIONS

^= DATA BREAK

®= MEMORY PARITY

3.*=
4.

5.®=

D-MU-8L-0-18

POKER FAIL

A= HIGH SPEED READER AND OR PUNCH
REPLACED BY G612 IF MEMORY PARITY
OPTION iS INSTALLED

Module Utilization (Sheet 1)

~mr

"¥TT7~

G6I1

111
I

KEY SS

MFTS

M REF

MEM

KEY

CONTROL
PANEL

MEM
08

ENABIE

R/*

J3-4

MEM

DATA

I/O

l,/0

START

STOP

INT

ENABLE

5-11

ENB

"MEM
11

LOAD

INITI-

MEM

JMP

0"ONE

+ JMS

ILLEGAL

REF

KEY

ly'O

ICLOCK

_E_
SET

KEY

GATE

STROBE CLEAR

START

KEY
KEY

OVER-

li/0

DLY

"BUS

FLO*

STROBE

CONT

ENABLE

CYC

SET

DONE
DIY

STROBE

mmr"

MFTS

IIORD

__3_

ADD

KEY

,05

BUS

OVER-

INITIALIZE

COUNT

DONE

;B3

DATA
ADD

CURRENT

DATA
ADD
ENABLE

AIBRESS

Tnrnr

CYCLE

SET

:B6

SPCYC

DATA "
'ADD

BONE

ADD

"TT"

Tiro"

JifiZL

MB ai

TTl

MB .BB

00)

ENABLE
3

ACTIVE

CLOCK

OVERBREAK

LOAD
INT

SYNC.

FIMW.

INITIA-

RPR

LIZb

;87

CYC

BRK RO

INC

DATA

»C

(:0)

BB(1)

OVFLO

ADD
ACCEPT
(.0)

MEMORY

FEED

INCRE

SWITCH

PRHTR

MBB0

MBiE4

MBBB( 1

(1)

MBBl

MB05

INITIAL

"HOT

WW
.06 CB)

(1)

(,B)

MB:02

MB35
(1)

MB .08

MB;B2

J^NPUT_
BUS p3

TTT
rrr

STOP
OUT
2

MB06
.04

(1)

(I)

INPUT

CLEAR

OUT

SHIFT

STOP

TELETYPE

BUS
TO
NPUT
BUS .07

innor

_jus m :B3(;B)

.83 (fl)

MBB7

fl£_ai
MB .07

(1)

INPUT

INFUT
BUS .Bf

MB ,86

AC ,09

TO
AC 11

MfH
,

TO
lliPDT

BUS11
JT O

07(1)
MB

SIUP

.08(0)

RQST

INT

OUT

AC CLR

CLOCK

STOP
1.5

SCALE

MAGNET
DRIVER

CLOCK
SCALE

RO ST

(.0)

RUN(.C

.05(1)

BREAK

BB(.3)

-ms6

MB
84 (,0)

ADD 108
TO

RPR
TELE

"issr

MTk

P*R

LIZE

(1)

Dip

BA(B)
BA(1)

ENABLE

STOP

D-MU-8L-0-18

Module Utilization ^Sheet 2)

SET

+
F

TO
8

FEED

SKIP

ADD

MEM
DONE

PUN
FEED
TO
SmiTCH
RO
Sync
H OLE
PDfT

TTO

INITIA

RETURN RETURN

FIELD

DLY

+5V CLM HOLE

_R/*

BEGIN

MsfiS

TTO

ML.
»PSKIP

_TTO

(I)

_R,*

CLOCK

OUT

MEM

—

33
im2

i7o

IS&iaJii
(1)
ic

MeSD

STROBE

SET

SKIP

PROTECT

DATA
ADD

MEM

SPECIAL

MEM

ADD

KEY

TOAD

ENAB

FLOW

MEM

G221

INHIBIT

INPUT

ACCEPTEd FLO*

I/O

MEM

CYCLE

OVER-

PAUSE

G2 ;i

SPECIA L

MEM

_u
E1CTP

R??l

G221

Jill
MFTP

KEY

RETURN

cTear

ALIZE

DONE
R/*

ENABLE

SKIP

Mill

MEM

INT

ALIZE

START

SOURCE
"

ENABLE

INITI-

MEM

SR
ENABLE

-DP

PDP-9L

DLY

IDLE

KEY LA

KEY
EX

CYCLE

BREAK

OP 1
TO
OP 4

fS3C0)
TS1(.0)

INITIALIZE

FANS

JUNCTION TERM BUSHING RE"D~ 30-07231
JUNCTION TERM BUSHING WHITF 90-07235

MEMORY
^
~\.

1C*^t

SUPPLY

AC OUTPUT

POWER CONNECTOR
POWER RECEPTICLE>FEMALE.,DBL~
DWER RECEP'^'ICLE MALE
IKEY SWITCH
-£BOSA
T?A\'SFOPMEP KAP'T
2 CAFAciTpR^ BATHTUB,2 X IMFpaXW^C
CAPACITOR 2 2 OOOVFD SOVOC"
CAPACITOR SvOOOMFO 25V0C
CAPACITOR 80 GOOMFD iSVOC
2 IPM 2 RECTIFIER
i

DESCRIPTION

D-CS-718-0-1

Power Supply 718

TAE

^llNtV

TRANSISTOR 2N4396
1^-05870
CAP BRACKET
RESISTOR 1/1, 2W 5 ^
jTRANSISTOR 2N5790
CAP, BRACKET SPRAGUE CMC ZT
FUSEHQlDER BUSS
FUSE 4A SB 3AG
go -072:
FUSE 6A 3AG
F USE ISA SB SAG
LiO:^^:
5V REGULATOR
^4-Ce047

NEGATIVE

'FT

^S-V?2?§

Q?,4
C^--^

UNLESS OTHERWISE INDICATED:
TRANSISTORS ARE DEC2904
DIODES ARE D672
RESISTORS ARE I/4W, 5%
RESISTORS ARE 1,500
CAPACITORS ARE 330 MMFD
E3 IS DEC7400N
E2 a El ARE DEC7440N
PIN 7 ON EACH IC = 6ND
PIN 14 ON EACH IC = -I-5V

UNLESS OTHERWISE INDICATED;

RESISTORS ARE I/4W, 9%
MF RESISTORS ARE l/8W,l%
CAPACITORS ARE .01, MFD
DIODES ARE D662
El, E3 ARE MCIS40
E2 IS DEC7400N
PIN 7 ON EACH IC = 6ND
PIN 14 ON EACH IC' + SV

PARTS LIST

A-PL-GZ2I-0-I

PARTS LIST IS A-PL-G020-0-C

B-CS-G020-0-1

B-CS-G221-0-1

Sense Amplifier

Memory Selector

C3 >R2
.01:^.01 :^.0I >330

„„

GND

...,,

«.D^.MW

,750

UNLESS OTHERWISE INDICATED:
TRANSISTORS ARE DECI008
RESISTORS ARE I/4W, 5%
TRANSFORMERS ARE T2037
IC'S ARE OEC7440N
PIN 7 ON EACH IC = 6ND
PIN 14 ON EACH IC = +5V

QIRHP
V2

B-CS-G228-0-1

Inhibit Driver

2052

—Pi

T3b

I
xso

T Od

xsi

-I—•

—Hi

—!— —W-f
•

—W—•—(-"

I *

»!

f—W

!-»

»-

X26

» t

^
!

»i

»l »

jL.,

kjj.

Tl ^

!»

""W

— —W"

•

»f-

! t

I— —W-,1
i

j. I>

'>—

w—i—

N
!

! ^

! * !

[

fc^i

-W

W 4
N t

XI4

! ± N *

» !*

•

*!-•

•—*-

-W~^

»^

»l ?

Ni-ESS OTHERii'lSE lnDICaTED:

W *

N-

N '

N -

*
i

! ± !"

W "

! * ! f
-W

"
l

X44

! "

W ^

W t

! i. w i

U
! 4

W
t

i j. It

! A !

! ^

X33

X4I

i < t

! _i ! t

^ !

->H

r-->f

X32

X4e

—

i»t-t

—m-f

•

i
I

i
!

i^-+--hU

C-CS-G6 10-0-1

C-CS-G6n-0-l

A- Diode Board

PANEL POWER O-

i
AK

1 !

i i !y
f

XIO

H^r--*-

DIODES ARE 0E72
USE 0671 AS SUBSTITUTE

»!*

jKLSSS OTHKRWlSt IMDiSATED:
OiOOES ARE D6?2
USE D67I AS SUBSTITUTE
Ri IS A jJOrl THERMISTOR

! f

X20

X22

•

Y22

— —W—

V27

YIO

XI2
i

»^

»o

^j—

W f

Y !B

Y47

T
T to

XII

?
»l

9
XIO

?
—^1

X20

>\i

Y24
»

i
!

Y36

X28

XI9

-W

! t

XZ7

Y33
I

Y44
-

Y50

B- Diode Board

-O AN2, AP2,AR2, AS2

PANEL LOCK
RIB

W W
D2

-OAU2 LINE LOW
T

——

-OAB2 UNREG. -I5V

-OBM2

-T

RI5

AA2

AF2

AH2

AKZ

AM2

-VW

AE2

BC2

RI4

mTTTl

AC2

<RI6

BF2

AD2

BD2

BE2

BH2

•R4

> R5

>R6

>R7

>R8

> R9

>RIO

>RII

MEMORY SUPPLY -

>RI2 >RI3

20 MFD

-OBB2 REG.- 15V

50V

HF-f

-OAV2

-•
I

O BJ2
O BK2

RI9,R20
RI8

Q2
Ql

L_l^l
'"!

02
20 MFD, 50V

CIO

AiD6

CI
.01

MFD

IK
I/4W 5% CC
100
I/4W 10% CC
TRANSISTOR DEC 2
TRANSISTOR 0EC6534B

RES.
RES.

RES.

470

I/4W 10% CC

1300317

R2
RI4-RI7
D4, D5

RES.
RES.

180

I/4W

10% CC

130 13 24

560
1/4 A
DIODE IN4744

10% CC

Dl- D3, 06-09

DIODE D664

C3-C9

CAP.
CAP.

Power Connector

I/4W

1300432

1300340
105648

20MFD 50V -10475% ELECT

.OIMFD lOOV
PARTS LIST

PARTS

Resistor Board

B-CS-G785-0-1

1300231
1505650
1503409-01

R4-RI3,RI

REFERENCE DESIGNATION

5% CC

1300365

R3,R2I

CI,C2,CI0

S-CS-G624-0-1

SLICE

1,000 MMFD

UNLESS OTHERWISE INDICATED:
CAPACITORS ARE 680 MMFD
RESISTORS ARE lOW, i%, LOW INDUCTANCE

MEMORY SUPPLY +

BL2 MEMORY SUPPLY RETURN

— — — 9— —t— —•—
f

0BP2

AL2

AJ2

-•

OBN2

BR2_y

EA2

|rI7

20% DISC

DESCRIPTION
LIST

I00II4

100 2839
100 1610

A-PL-G785-0-0

PART NO.

npn^---^

Rze
2,000
BOURNS
TRIMPOT

KC)

013 -

DEC 3568

7,500

THe

R40

R44

R4Z<

-TO + TEMP. COEFF. THERMISTOR 330a
±10% 2S*c CARBORUNDUM A0905P-8 OR EQUIV.

UNLESS OTHERWISE INDICATED;
TRANSISTORS ARE DEC3009B-S
RESISTORS ARE I/4W, 5%
CAPACITORS ARE .01 MFD
El a E3 ARE DEC7400N
E2 IS 0EC74 40N
PIN 7 ON EACH IC = GND
PIN 14 ON EACH IC = +5V

C-CS-G826-0-1

Regulator Control

D-CS-G921-0-1

PDP-8A Control Panel

)I6

?n\7

?RI8

?Ri9

?R20

?R2I

? R22

< R23

>R24

?R25

?R26

?R27

? R28

>R29

>R30

eR3

^R4

?R5

?R6

?R7

?RB

<R9

?RIO

>RII

<RI2

?RI3

?RI4

>RI5

^i^CI

NOTES-.
PIN 7
PIN 14

RI6-R30

RES.

Rl - RI5

RES.

PARTS

I00I6I0
A-PL-M002-0-0

CAP.

REFERENCE DESIGNATION

PART NO.

LIST

B-CS-Mlu-O-l

15 Loads

+ 5V

NOT USED -I5V

GND

INTEGRATED CKT. DEC7400N
750 I/4W 5% CC

RES.

CI-C4

DESCRIPTION

C2,TI

IC = GND
IC = f5V

EI-E4
Rl -RS

3.3K

REFERENCE DESIGNATION

ON EACH

1301428
1300439

I/4W 5% CC
CAP. .01 MFD lOOV 20% DISC
PARTS LIST

B-CS-M002-0-1

I/4W 10%

I.8K

ON EACH

.OIMFD lOOV

20% DISC

1905575
1301401
I00I6I0
A-PL-MII 1-0-0

PARTS LIST
DESCRIPTION
PARTS LIST

PART NO.

Inverter

+ 5V
NOT USED -ISV

C2, Tl

SND-

B2
C2, Tl

f^
— + 5V

^R4

.RZ

~ir\i

-HZ

El
Fl

3
4

-Jl

K2
LZ

:t;c2

GND

^
-Nl

4
5

notes:

pin 7 on each ic'qnd
PIN 14 ON EACH IC "t-5V

PIN 7 ON EACH IC : SND
PIN 14 ON EACH IC =+5V
El

THRU E3

AND R3
R2 AND R4
Ci AND 02
Rl

REFERENCE DESIGNATION

INTEGRATED CKT. DEC7400N
RES 760 I/4W 5% CC
RES. 330 I/4W 10% CC
CAP. .OIMFD lOOV
20% DISC
PARTS LIST

DESCRIPTION

1905575
I30I40I

1300293

I0OI6IO
A-PL-MII3-0-0
PART NO.

THRU E3
THRU C3

REFERENCE DESIGNATION

HfiHIS

PARTS LIST

B-CS-Ml 13-0-1

10 2-Inpuf

NAND Gates

INTEGRATED CKT. DEC74I0N
CAP. .OIMFD
lOOV
20% DISC
PARTS LIST
DESCRIPTION

B-CS-Ml 15-0-1
30

8 3-Inpui-

NAND Gates

L^SI

1905576
I00I6I0
A-PL-MII5-0-0

PART NO,

^
12
10

3
5

"
4
2

4
3

4
3
2

4
El

2
1

> R4

< R3

notes:
pin 7 on each ic = 6n0
PIN 14 ON EACH IC = f-SV

notes;
pin 7 on each ic = gnd
PIN 14 ON EACH IC = f 5V

THRU E3
h'
!ri
a R3

iR2 a R4
!

INTEGRATED CKT. DEC7420N

1905577

RES. 750 I/4W 5% CC
RES. 330 I/4W 10% 00

1300293

I00I6I0
A-PL-M 117-0PART NO.

THRU C3

CAP. .01 MFD

REFERENCE DES GNATION

PARTS LIST
DESCRIPTION
PARTS LIST

lOOV

20% DISC

I30I40I

THRU E3

THRU 03

INTEGRATED CKT. DEC7430N
RES. 330 I/4W 10% CC
RES. 750 l/'4W 5% CC
CAP .OIMFD lOOV 20% DISC

REFERENCE DESIGNATION

PARTS LIST
DESCRIPTION

R2 a R4
a R3

PARTS

A 4-Tnniit NANH Cr^U

B-CS-Ml 17-0-1

— C2,TI 8ND

B-CS-M119-0-1

3 8-Input

1905578
1300293
I30I40I
I00I6I0

A-PL-MII9-O-0

PART NO,

1ST

NAND Gates

-t-5V

NOT USED -I5V

GND

+ 5V

-±rCZ -±-C3
-ircz
-i-

-J-CI

T T

AA A A° fs
E

R2
2

u,
'
Rl

C2
II

£2
12

—

•—

C2,TI GND

NOTES
PIN 7 ON EACH IC = 6ND
PIN 14 ON EACH IC = +5V

E3
El

E2a E4
R2
Rl

THRU C4
REFERENCE DESIGNATION

B-CS-M160-0-1

INTEGRATED CKT. DEC7450N
INTEGRATED CKT. DEC7453N
INTEGRATED CKT. DEC7460N
RES. 4.7K I/4W 10% CC
RES. 6.8K I/4W 10% CC
CAP. .OIMFD 100 V
20% DISC
PARTS LIST
DESCRIPTION
PARTS LIST

NOTES;
PIN 7 ON EACH IC = SND
PIN 14 ON EACH IC = +5V

1905580
1905582
1905581
1300448
130046 3
I00I6I0
A-PL-MI60-0-0
PART NO.

THRU E3
THRU C3

REFERENCE DESIGNATION

Gate Module

B-CS-M216-0-1

Six Flip-Flops

INTEGRATED CKT. DEC7474N
CAP, .01 MFD
PARTS LIST

lOOV

20% DISC

DESCRIPTION
PARTS LIST

1905547
!00!6 10

A-PL-M2I6-0 -0

PART NO.

AVZ

AVI

-AC2, ATI.BCZ, BTI

ALi

—

!»

E3, E5, ;6 AfiE 0EC7460N
El ,E2 ,EI2, EI5,EI4, EJ3,EI7,EI8 ARE DECT4S3N
EI3 IS 3EC74e2N
PIN 7 ON EACH IC EXCEPT E!3 - GND
PIN II ON EI3 :6N0
PIN 14 ON EACH IC EXCEPT EI3 =
PIN 4 ON EI3 =+5V

RESISTORS ARE I/4W;I0%
CAPACITORS ARE 6.8 UFO, 35V,
€7 a Ell ARE DEC7440N

AC ENABLE
AC ENABLE

MQ ENABLE
SR ENABLE
SC ENABLE
DATA ENABLE
10

ENABLE

MA ENABLE
PC ENABLE

MEM ENABLE
DATA AODDESS ENABLE

PARTS LIST A-PL-M220-0-0

D-CS-M220-0-1

Maior Registers

AL2

"^Tr~f-tL
I I I
:=;c8
^cs tl
^ce iL
:i;c7
c9 >7so i;ci ;i;c2 ;i:c3 ~C4
^ tl
^ tl
,-p^-C

•-T^^^

-T^**"

'T^

UNLESS OTHERWISE INDICATED:
TRANSISTORS ARE DEC3009B
RESISTORS ARE I/4W, 5%
CAPACITORS ARE .01 MFD
E2IS DEC7400N
El IS DEC7440N
PIN 7 ON EACH IC = GND
PIN 14 ON EACH IC=-t-5V
DIODES ARE D664
DLDI

K2 L2 M2 N2 P2

R2 S2 T2

DECI6-05530

L^ciuy

i-iiis

RIO

eRIZ

^04
VD3

W 06

DLDI
,

\f 05
I

OLDI

E2
El

notes:

pin 7 on each ic=gnd
pin 14 on each ic : -hsv

02,03,04
RI0,RI2
R9,RII

R7
R4, R5,R6
Rl, R2,R3,R8
DI-D7
C2,C3,C4

DELAY LINE 500
INTEGRATED CKT. DEC7400N
INTEGRATED CKT. DEC7440N
TRANSISTOR DEC6534B
TRANSISTOR DEC3009B-S

B-CS-M360-0-1

Variable Delay

1503409-01

1503100

1300271
I30I40I

1300316

I.5K

CAP.

MFD I00V20%DISC
330MMF lOOV 5% D.M.

I/4W
I/4W
I/4W

3K
220
750
470 I/4W 57.
DIODE D664
.01

PARTS

1602167
1905575
1905579

5% CC
5% CC
5% CC
I/4W 5% CC

RES.
RES.
RES.
RES.
RES.

CAP.

REFERENCE DESIGNATION

<RII

LIST

DESCRIPTION
PARTS LIST

1300391

1300432

1001 14

I00I6I0

1000023
A-PL-M360-0-0
PART NO.

-)-5V

-A 2

NOT USED -I5V

-B2

GND

Ml
Nl
PI

L2
M2
N2

S^TNi

•SI

5 iy

-C2,TI

''n
12?
'Or

R2
82
T2
U2

+ 5V

notes:
pin 7 on each ic=gnd

PIN 14 ON EACH IC =f 5V

USE THE ETCH BOARD OF THE MII7

+3V
Rl

+3V

UNLESS OTHERWISE INDICATED:
RESISTORS ARE I/4W, 5%
CAPACITORS ARE .01 MFD
C5 IS 3SV, 10%, TANT.
DIODES ARE 0662
El IS DEC7440N
E2 IS DEC7474N
E3 IS DEC7400N
PIN 7
EACH IC • OND
PIN 14 ON EACNIC <+9V

R3 IS A »275P

GND

B-CS-M452-0-1

Variable Clock

B-CS-M617-0-1

6 4-Input NOR Buffers

NOTES;
PIN 7 ON
PIN 14 ON

EACH IC = GND
EACH IC = +5V

EI-E3
RI9
R3,R6,R9,Rl2,RI5,Rie

R2,R5,R8,RM,RI4,RI7
RI,R4,R7,RI0,RI3,RI6

DI3-DI6
Dl - DI2
CI -

REFERENCE DESIGNATION

B-CS-M516-0-1

INTEGRATED CKT. DEC7420N
RES. 330 I/4W 5% CC
RES. I.5K I/4W 5% CC
RES. 750
RES. 220

I/4W
I/4W

5% CC
5% CC

DIODE D662
DIODE D664
.01 MFD lOOV 20% DISC

CAP.

PARTS LIST
DESCRIPTION
PARTS LIST

1905677
1300295

1300391
130 1401

1300271
II00II3
II00II4
10016 10
A-PL-M5I6-0-0

t°-

PART NO.
N0TES1
PIN 7 ON EACH
PIN 14 ON EACH

IC =
IC =

GND
+5V

Positive Bus Receiver

(9O9004
1503100

'INTEGRATED CKT DB074O2N

TRANSISTOR DEC3009B
390 i/4w 5% cc
DIODE 0664
:CAP.
e.eWFD 35 V 20% S.TANT

Ires.

CI - C3

iCAP.
j

REFERENCE DESIGNATION

.OIMFD lOOV 20% DISC

PARTS

LIST

DESCRIPTION
PARTS LIST

C-CS-M623-0-1

Bus Driver

1000067
100(610

IA-PL-M623-0-C
1

PART NO.

MFTS 2

AC, BC

GND

UNLESS OTHERWISE INDICATED:
TRANSISTORS ARE DEC3009B
CAPACITORS ARE .01 MFD
RESISTORS ARE I/4W, 5%
El IS DEC7474N
E2, E3, E4, E5,E6,E7,E8 ARE DEC74D0N
r,N 7 ON EAOn iC = 3ND
PiN 14 ON EACH iC = +5V

notes:
PIN 7 ON EACH IC = GND
PIN i4 ON EACH IC = +5v

B-CS-M660-0-1

PARTS LIST A-PL-M700-0-0

Positive Level Driver

C-CS-M700-0-1

Manual Timing Generator

AA2, BAZ -l-SV
)EC6534D

READER ENABLE

^-„

,,D3
3LZ

r05
D664 .-r»CZ5

"0664
ACZ,
BCZ,

ATI

BTI

EI4
4
READER RUN >I

READ BUFFER
ALZ

{ADZ -

SKP. STROBE

AEI AFI AHl -

13 I

1/0 SKP.

AHZAJI -

BCZ,
IA5

BTI

SKR STROBE

CLEAR FLAG
CLEAR FLAG Z

EZ
FLAG

*—
ACTIVE (0)

E14
SPIKE

n
3 BIT

OUTPUT
ANZ
'

DETECTOR

EZ
BIT

-d

OUTPUT
CONNECT TO

EI6

ACTIVE

WAIT INPUT
OF M707 FOR
HALF DUPLEX

r~]!

MODE
Sd'.'i.!

stop

AC«Z.O

^'"'-

R8
470

'^H>G

-T

WV-]
E3

48V

BITZ

>fJ

R7
,220
£. BIT 3 OUTPUT

BRZ

BVZ

eTt

FROM PRESET

STOP z

t-c
c

EI6

C IN LAST UNIT y

APZ

V^:

pni

BIT 3

TTio
13)

|D-

\1'BIT4

||0

BIT 4

d
AM Z

-H

p-Hi

BITS

AJZ

"siiT
s s .';_j

-d

BIT 6

j>Hi

BIT7

DHi

6 BIT 7 OUTPUT

ARZ

d
CLOCK 8 BAUD

i BIT 8 OUTPUT
AKZ

UrDZ

*-DI

BIT 8

0-t

0664-*- D664

NLESS OTHERWISt INDICATEC
CAPACITORS ARE .01 MFD
RESISTORS ARE I/4W; 5%DIODES ARE D662
PIN 7 ON EACH IC = GND
PIN 14 ON EACH IC = + 5V
El IS DEC7430N

UNLESS OTHERWISE INDICATED:
CAPACITORS ARE .01 MFD
HESISTOHS AHE 1/4 w, 6%
DIODES ARE 0662
PIN 7 ON EACH 10 = GND
PIN 14 ON EACH IC = +5V
El a E9 ARE DEC 7430

E8, E9, Ell EI9 a EZO ARE DEC7400N
ElZ a EI3 ARE DEC74I0N
EI5 IS DEC7440N

E7,

EiO

0EC7460N

E2,E6, E8,E!I, EI4,ei5, £16 8 EI7 AHE DEC7474N
E7 ,EI? • EH ARE 06C7400N
E3, E4, E5
EI3 IS DEC74I0N
,

EZ, E3,E4, E5, E6,EI4,EI6,
E17 a EI8 ARE DEC7474N

EIO IS

r_r<z..KA
CS-M706-0-1

DEC7440N

C-CS-M707-0-1

Teletype Receiver

Teletype Transmitter

QQ0<?0QC?Q99999990Q00Q9<?9999999Q90QQQ9

[-2

M2 N2

GND

O-

1R2 1R3 1R4

)> FLEXPRINT

6
1

666666666666666

^ V

~v~

Y
FLEXPRINT
CABLE »2

FLEXPRINT
CABLE «l

RES. 10 I/4W 10% CC
PARTS LIST
OESCRIPTION
PARTS LIST

RI-R4
REFERENCE DESIGNATION

B-CS-M901-0-1

1300170
A-PL-M90I-0-0

PART NO.

PARTS LIST IS A-PL-M903-0-0

B-CS-M903-0-1

Flexprint Cable Connector

Connector (Flexprinter)

TYPICAL PIN ASSIGNMENTS
PIN

SX,8L

DCOS

+IOV

t5V

+ 5V

-ISV

f5V

GND

LOGIC INPUT

READER ENABLE READER ENABLE READER ENABU

LOGIC OUTPUT

GND

—
LOGIC INPUT

LOGIC INPUT

LOGIC OUTPUT

-ISV

-30V OPTIONAL -30V OPTIONAL -30V OPTIONAL

-OAI.CI, FI,KI,NI,RI,TI
C2,F2,J2,L2,N2,R2,U2

TRANSISTOR 0EC6534D
Rl - R19

D37-D40
0I-D36
CI,C2

REFERENCE DESIGNATION

220 1/4W 5% CC
RES.
DIODE D662
DIODE 0664
CAP. .01 MFD lOOV 20% DISC
PARTS LIST
DESCRIPTION
PARTS LIST

RES. I.5K I/4W g% CC
RES. I.SK l/ZW 10% CC
RES. lOK I/4W 10% CC

1300271
II00II3
II00II4
I00I6I0

RES. 750 I/2W 5%
RES. 750 2W 5%

A-PL-M906-0-0
FftRT

NO.

RES.

IW
10%
120 1/2 W

CC
CC
CC

9% CC

DIODE D67I
CAP. .OIMFD lOOV 20% DISC
CAP. IMFD 150V 10% FOIL
PARTS LIST

DESCRiPTIOM

B-CS-M906-0-1

PARTS LIST

Cable Terminator

B-CS-W076-0-1

Teletype Connector

A-PL-W076-0-0

Equipment Corporation
Maynard, Massachusetts
Digital

printed

U.S.A.