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DEC-00-16AA-D

December 1967

17 pages

Original

0.7MB

Document:	AD08-A Analog-Digital Converter
Order Number:	DEC-00-16AA-D
Revision:
Pages:	17
Original Filename:	https://svn.so-much-stuff.com/svn/trunk/pdp8/src/dec/dec-00-i6a/dec-00-i6aa-d.pdf

OCR Text

DEC-OO-IéAA-D

ANALOG—DIGITAL
CONVERTER

‘

AD08-AE

INSTRUCTION MANUAL

DIGITAL EQUIPMENT CORPORATION

MAYNARD. MASSACHUSETTS

CONTENTS

Introduction

Physical Description
Dimensions
Interface
Power Requirements

General

Specifications

—-I

Power Requirements and Environmental Considerations
Pertinent Documents

Operation
Method

Converter Instructions

Skip on A/D Flag (ADSF)
Convert Anaiog Voltage to Digital Value (ADCV)
Read A/D Converter Buffer (ADRB)
I

Theory of Operation
Block Diagram Analysis
Block Schematic Analysis

Options
AHO3 Amplifier Option

AH02 Sample and Hold Option
Maintenance

Calibration

Drawings
ILLUSTRATIONS

AD08-A Block Diagram
TABLES

Theoretical Switching Point Voltages

moomm-p-h'pwwmw

CONTE NTS (continued)

ENGINEERING DRAWINGS
D-BS—ADO8—A-l

l0 Bit A-D Converter

D-BS-ADO8-A—2

Sample and Hold Option

D-IC—ADO8—A—5

I/O Connectors

D—BS-AHO3-0-l

Standard Amplifier Configurations

D-MU—AD08—A—3

Module Utilization

.17

INTRODUCTION
This manual contains information relating to the operation, installation, and maintenance of
the Type AD08-A Analog-to-Digital Converter (ADC).

The AD08-A A/D Converter is an I/O device used

computer for high-speed analog-to-digital conversions.

primarily with

PDP-8

PDP-8/S

The AD08-A is capable of converting analog

signals from 0V to lOV in amplitude to a lO—bit digital word.

The AD08-A uses the successive-approxi-

mation technique for data conversion with an accuracy of 0.1% d: 1/2 least significant bit

(LSB) for

quantizing error.

Physical Description
The ADO8-A A/D Converter is packaged with its own digital and analog power supply in
one

DEC 1943 Mounting Panel.

The power supplies are mounted in place of two connector blocks at

the extreme right of the mounting panel.

Dimensions:

Height

5-1/4 in.

Width

T9 in.

Depth

6-1/2 in.

(standard rack mount)
(not including I/O Cables)

Interface
Bus.

The AD08—A includes six 6-foot cables for connection to the PDP-8 or the PDP-8/S I/O

The interface is complete for this option,

Power Requirements

including IOT's and diagnostic software.

DC Power for both the digital

logic and the analog logic is supplied with the

ADO8—A.

General

Specifications
0V to +lOV full scale

Analog‘input voltage (standard)
with amplifier (option)
with sample and hold (option)

:tTOV max. full scale

Input impedance (standard)

1000 ohms

with amplifier. (option)
‘

with sample and hold (option)

Digital output

® PDP is the

ilOV max. full scale

2l0,000 ohms (inverting)
2100 M-ohms (non-inverting)

210, 000 ohms
Parallel Binary
i

—3V

registered trademark of the programmed data processors manufactured by the Digital
Equipment Corporation of Maynard, Massachusetts.

2's Complement

Number notation

0000

+5V

4000

+10V

7774

Word Length

10 bits fixed

Accuracy

0.1% of full scale i 1/2 LSB

Aperture time (standard)
with sample and hold (option)

Same as conversion time

150 ns

Acquisition time
with sample and hold (option)

12 ps

Conversion rate

lOO KHZ

Conversion time

10 ps

Resolution

part in 1024 (TO mV)

Power Requirements and Environmental Considerations

Warm—up time

5 min.

Temperature Coefficient

0.5 mV/OC

Operating Temperature

0 to 50°C

Input power

115V
60Hz

50W

DEC Part No.

Power supply

12-03185,

output voltage l5/l5
Diode board

5404220

Pertinent Documents
Source material,

complementing the information in this manual, is found in the Digital

Logic Handbook, C-l05. This contains complete information on the functions and specifications of
the various modules and accessories comprising the ADO8—A system.

OPERATION
Method
The AD08-A A/D Converter operates on the principle of successive approximation.
To start conversion, the appropriate IOT command is given.

the value of the analog signal is at mid-scale and sets a l

The converter assumes that

in-the appropriate register.

The equivalent

analog signal is then generated by the converter, and a comparator compares the two analog values.
If the analog
to

input is greater than the value in the guess register, the output of the comparator goes

—3V and the appropriate bit remains in the 1 state.

This process is repeated for ten bits, with each bit weighing exactly 1/2 of the preceding
bit.

When conversion is completed, the buffer register in the converter contains the digital repre-

sentation, in binary, of the analog input voltage.
The completion of conversion sets the end-of—conversion flag, which is sampled by initiation
of a second IOT command.

Once the computer determines conversion is complete, the accumulator (AC)
value read into the computer by another IOT command .'

must be cleared, and the digital

valueis then transferred into bits 0—9 of the AC.

The digital

Provision is made for using the Type A400 Sample-and-Hold

Amplifier (AH02 optiOn), pre-

ceding the ADC input, to reduce the effective aperture to less than T50 ns. The A400 may also be
used to scale the signal

input to accept i lOV, d: 5V, or 0 to -lOV. The A200 Amplifier (AH03 option)

'may be substituted for the A400 to accomplish the same signal scaling, without reducing the effective
I

aperture.

‘

The AH02 and AH03 options may also be used in combination to

impedance and small aperture.
in the converter

obtain both high-input

Power for the amplifier and/or sample-and-hold options is contained

Converter Instruct ions
The AD08-A operates under direct control of the central processor.

The following IOT

instructions provide the necessary control:

Skip on A/D Flag (ADSF)
6531

Octal code

Event time,
'

Indicators

IOT, FETCH, EXECUTE, END

Execution time

38 ps

Operation

The converter flag is sensed, and, if it contains a binary 1

(indicating that

the conversion is complete), the contents of the program counter (PC) are
incremented by

Symbol

1r A-D flag

i, so that the next instructio~n is skipped.

T, then PC + T

Convert Analog Voltage to Digital Value (ADCV)

Octal code

6532

Event time

Indicators

IOT, FETCH, EXECUTE, END

Execution time

38 ps

>PC

Convert Analog Voltage to Digital Value (continued)
The converter flag is cleared; the analog input voltage is converted to a

Operation

digital value, and the A/D converter flag is set to l. The preset switch
position determines the number of binary bitsIn the digital--value word

and the accUracy of the word.

Symbol

A/D flag at start of conversion, then

>-A/D flag when conversion is done.

Read A/D Converter Buffer. (ADRB)
Octal code

6534

‘

Event time

Indicators

IOT, FETCH, EXECUTE, END

Execution time

38 ps

Operation

The converter number contained in the converter buffer (ADCB) is trans-

ferred into the AC as a normalized word, shifted into the most significant

bits (MSB); unused bits of the AC are cleared, and the A/D converter
is cleared.

ADCB

Symbol

flag

> AC

> A/D converter flag

THEORY OF OPERATION
Block Diagram Analysis
The method of successive approximation is a technique where the digital output is obtained
one

bit at a time.
With the initiation of an A-D convert pulse, the control

(See figure 1 .)

logic sets the MSB of the digital

Each bit of the register is transformed to a

binary-weighted current by the D-to-A converter, with the MSB transformed to a one-half scale current, the next bit to one-quarter scale, etc.
The D-to-A converter output, ‘which is the sum of all

these currents is compared against the

input current by the comparator. If the D—to-A output istoo large, the control logic resets the associated
bit of the ADC register to O, and sets the next successive bit.

If the D—to-A output is too small,

associated bit of the ADC register is kept, and the next successive bit is set.
exactly equals the input, the associated bit may or

because their

Therefore, the resolution of the converter is l LSB.

If the

D—to-A output
may not be kept. If it is kept, all successive

lower order bits are reiected, because they unbalance the comparator input.
then all lower order bits are retained,

the}

sum

If the bitIs

rejected,

is less than the rejected bit by exactly 1 LSB.

ANALOG
INPUT
VOLTAGE

COMPARATOR

D To A

CONVERTER

REFERENCE

fiC'V-HIO‘

DIGITAL
OUTPUT

mM‘IDO
'

CONTROL
LOGIC

A/D
CONVERT

Figure l

ADC DIGITAL REGISTER

AD08-A Block Diagram

Block Schematic Analysis
The Type AD08—A A/D Converter is shown on drawing BS—AD08-A—l

element of the AD08—A is the A801

The maior functional

A/D Converter Module.

A typical sequence of operation starts when an ADCV pulse is applied to the W60l-A8D.
This pulse causes the A801
to a

l0-bit digital word.

A/D Converter Module to convert the analog-input voltage on pin 312V
This digital word is applied to the output gates Rl23's' through level shifters

At the end of conversion, the A801 generates an A/D DONE pulse at pin Bl2M.

W5l2's.

This pulse

The A/D DONE

is applied to the R202 A/D DONE flip—flop, after being level shifted and inverted.

level, in turn, is applied to the RI ll—BBL, to generate an interrupt level. A/D DONE is also applied
to

B8E, and ANDed with the ADSF pulse to give a skip pulse.

OPTIONS

AH03 Amplifier Option

The normal
can

input impedance to the A/D Converter is l000 ohms.

Higher input impedance

be achieved using the AH03 Amplifier Option.

The AH03 option consists of an A200 Operational Amplifier, mounted on an A990 Amplifier
Board with potentiometers for gain trim and balance

module to allow for non-standard input voltages.

provided

Feedback and input resistors are mounted on the

input impedance of greater than 10K ohms is also

(See A200 Specifications below).

Open loop gain

2 x

l06

Rated output

Frequency response
.

Voltage

'ilIV

Current

20 mA

Unity gain, small signal
voltage

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Overload recovery

l0 MHi

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P

200 Ms

Input voltage offset (adjustable to 0)

Input impedance

Average vs temperature 20 pV/ oC
Average vs sUpply voltage 15 pV/%
10 pV/day
Average vs time
Input current offset

6 megohm

500 megohm

Input voltage

i2 nA

0.4 nA/OC
Average vs temperature
vs
Average supply voltage 0 l 5 nA/°/o

Between inputs

Common mode

‘

Maximum

it 5V

Maximum common mode

HOV

Common mode rejection

20,000
il5V

Power voltage

Current at rated load

35 mA

AH02 Sample and Hold Option
The AH02 Sample and Hold Option consists of an A400 Sample and Hold Module, with
necessary components, to allow for non-standard input voltages and an R202 Control

Flip-Flop.

The
7

AH02 option has an input impedance of greater than l0K ohms.

Track time to 0.025%

(See A400 specifications below.)

(full-scale step)

<12 us

<150 ns

Aperture time

Droop (hold inaccuracy)

<lV/sec
i .000

Gain»

(adjustable to 0.025%)

Input impedance

l0K ohm i0.l% (AT)

Full—scale‘input

ilOV

Output current

10 mA

voltage
impedance
Temperature coefficent
in sample
in hold

Power requirements

0 to —10V
<1 .0 ohm

20 uV/OC offset
0.l0V/sec/°C

il5V/50 mA

MAINTENANCE
Calibration
The AD08-A requires two analog calibration adjustments.
balance out any offset in the system and to adjust full scale voltage.

These adjustments are used to

The following program and procedure may be used to calibrate the converter for a 10V

(less 1 LSB) full-scale system:
START

20/7200

CLA

21 /6532

ADCV

22/6531

ADSF

23/5022

JMP—l

24/6534

‘ADRB

25/21 00

ISZ

26/5025

JMP“

27/5020

JMP START

(100)

When a PDP-8 is used in place of a PDP-8/S, additional ISZ loops are necessary to slow
down the P.R.F.

Using the above program applies a noise-free analog voltage of +0.0049V to pin B12V.

Adjust the 10—K offset potentiometer on the A801 A/D Module, location AB 12, until the AC indicators
switch between 0000 and 0004.

Change the analog voltage to +9.9854V.

Adiust the 500 ohm reference

potentiometer on the A801 A/D Module, location AB 12, until the AC indicators switch between 7770
and 7774 .'

The offset adiustment must be rechecked.

(See Table 1.)

Table 1

Theoretical

Switching Point

Switching Point Voltages

”\l/eslrfiézo'

3:11:19;

Error

Volts

From

0000

0004

0010

+0.0147

0010

0014

+0.0245

0770

0774

+1 .2353

0774

1000

+1 .2451

1000

1004

+1 .2549

1 770

1 774

+2.4853

1 774

2000

+2.4951

2000

2004

+2.5049

2770

2774

+3 7353

2774

3000

+3 7451

3000

3004

+3 7549

3770

3774

+4.9853

3774

4000

+4 9951

4000

4004

4010

+5.0147

0049

Table 1
Theoretical Switching Point Voltages (continued)

Switching Point

”$51222“

35:62;
Volts

From

Volts

4770

4774

+6 .2353

4774

5000

+6 245T

5000

5004

+6 2549

5770

5774

6000

6004

+ 7. 5049

6770

6774

+8 7353

6774

7000

+8 7451

7000

7004

+8 7549

7760

7764

7770

7774

Error
‘

48 53
495T

96 58
9756

98 54

DRAWINGS
The engineering drawings in the following list are included in this manual as an aid to

understanding and maintaining the AD08-A system. Where this book differs from the drawings supplied
with the machine, the latter can be presumed correct.
10 bit A/D Converter

D—BS—ADO8—A-l

Sample and Hold Option

D—BS-A D08-A-2

I/O Connectors

D-IC -AD08—A—5

Standard Amplifier Configurations

D—BS-AH03-O-l

Module Utilization

D- MU-AD08—A-3

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D-MU-AD08-A-3
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