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EK-DEBNX-IN-001

August 1987

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Document:	DEBNA/DEBNK Installation Guide
Order Number:	EK-DEBNX-IN
Revision:	001
Pages:	86
Original Filename:

OCR Text

EK-DEBNX-IN-OO 1

DEBNA/DEBNK Installation Guide
Order Number: EK-DEBNX-IN-OO 1

digital equipment corporation maynard, massachusetts

DEBNA/DEBNK Installation Guide
Order Number: EK-DEBNX-IN-001

digital equipment corporation maynard, massachusetts

First Printing, August 1987

The information in this manual is subject to change without notice and should
not be construed as a commitment by Digital Equipment Corporation. Digital
Equipment Corporation assumes no responsibility for any errors that may appear
in this manual.
Digitai Equipment Corporation makes no representation that the interconnection
of its products in the manner described herein will not infringe on existing or
future patent rights, nor do the descriptions contained herein imply the granting
of license to make, use, or sell equipment constructed in accordance with this
description.
Software described in this document is furnished under a license and may be
used or copied only in accordance with the terms of such license.
Copyright © 1987 by Digital Equipment Corporation

The following are trademarks of Digital Equipment Corporation:
DEBNA
DEBNK
DEC
DEC net
DECUS

PDP
ULTRIX
UNIBUS
VAX
VAXBI

VAXcluster
VAXELN
VMS

FCC NOTICE: The equipment described in this manual generates, uses, and may
emit radio frequency energy. The DEBNA module has been type tested and found
to comply with the limits for a Class A computing device pursuant to Subpart J
of Part 15 of FCC Rules, which are designed to provide reasonable protection
against such radio frequency interference when operated in a commercial
environment. Operation of this equipment in a residential area may cause
interference, in which case the user at his own expense may be required to
take measures to correct the interference.

Contents
PREFACE

CHAPTER 1

INTRODUCTION

1·1

1.1

BASIC FUNCTIONS
1.1.1
Ethernet/802.3 Controller
1.1.2
Tape Controller

1-1
1-3
1-3

1.2

PHYSICAL DESCRIPTION

1-5

INSTALLATION

2·1

2.1

INSTALLATION

2-1

2.2

INSTALLATION VERIFICATION PROCEDURE

2-3

2.3

INTERNAL ETHERNET CABLE

2-4

2.4

BOOT-ENABLE JUMPER

2-6

2.5

INTERNAL TK50 CABLE FOR THE DEBNK MODULE

2-7

2.6

REMOVAL

2-9

CHAPTER 2

iii

Contents

POWER-UP SELF-TEST

3-1

3.1

BIIC POWER-UP SELF-TEST

3-1

3.2

HOW TO RUN SELF-TEST

3-1

3.3

REPORTING SELF-TEST RESULTS
3.3.1
Self-Test Results on VAXBI Bus
3.3.2
Self-Test Results in LEOs
Self-Test Results in VAXBI Registers
3.3.3

3-2
3-3
3-3
3-4

3.4

INTERPRETING TEST RESULTS

3-5

3.5

TESTED COMPONENTS

3-6

3.6

UNTESTED COMPONENTS AND FUNCTIONS

3-7

DIAGNOSTICS AND TROUBLESHOOTING

4-1

4.1

ROM-BASED DIAGNOSTICS
4.1.1
DO-DEBNx Self-Test
4.1.2
D1-Network Interconnect Diagnostic
4.1.3
02-Tape Drive Diagnostic

4-2
4-2
4-4
4-6

4.2

HOW TO RUN ROM DIAGNOSTICS FROM THE CONSOLE

4-8

4.3

ROM DIAGNOSTIC CONSOLE COMMANDS
4.3.1
Execute Commands (DO, D1, D2)
4.3.2
Deposit and Examine Commands
4.3.3
Quit

4-10
4-11
4-14
4-15

4.4

TEST STATUS AND ERROR REPORTING
4.4.1
Error Reports
4.4.2
Status Reports
4.4.3
Trace Headers and Messages
4.4.4
Diagnostic Completion Messages

4-16
4-16
4-22
4-23
4-24

CHAPTER 3

CHAPTER 4

Contents

Summary Reports

4-26

SOFTWARE DIAGNOSTICS
EVDYC Program
4.5.1
4.5.2
EVMDD Program
EVDYD Program
4.5.3
4.5.4
EVDWC Program
EVMDA Program
4.5.5

4-27
4-28
4-28
4-29
4-30
4-30

APPENDIX A

ENVIRONMENTAL REQUIREMENTS

A-1

APPENDIX B

REGISTERS

B-1

B.1

DEVICE REGISTER (DTVPE)

B-2

B.2

RECEIVE CONSOLE OAT A (RXCD) REGISTER

B-3

B.3

BI VAX PORT REGISTERS
B.3.1
Self-Test Results in Port Error Register
B.3.2 Self-Test Results in Port Data Register
B.3.3 Port Control Register
B.3.4 Port Status Register

B-5
B-5
B-6
B-7
B-7

B.4

POWER-UP DIAGNOSTIC REGISTER (PUDR)

B-10

BOOTSTRAPPING WITH DEBNX

C-1

C.1

REMOTE SYSTEM SENDS DEBNX A COMMAND TO BOOT

C-1

C.2

LOCAL USER REQUESTS A BOOT FROM THE NETWORK

C-2

4.4.5
4.5

APPENDIX C

Contents

APPENDIX D
0.1

ETHERNET ADDRESS

0-1

HOW TO READ THE HARDWARE ETHERNET ADDRESS

D-l

FIGURES
DEBNA in a VAXBI System

1-2

1-1

DEBNx Block Diagram

1-4

2-1

Cabling at the DEBNx VAXBI Connector

2-3

2-2

Ethernet Boot·Enable Jumper

2·7

3-1

Self-Test LED Locations

3-3

4-1

Sample Error Report

4·17

4-2

Sample Status Report

4·22

4-3

Sample Trace Header and Message

4·24

4-4

Sample Diagnostic Completion Message

4-25

4-5

Sample Summary Report

4-26

B-1

Device Register

B-2

Receive Console Data (RXCD) Register

B-3

B-3
B-4

BI VAX PORT Registers

B-6

Port Control Register

B·7

B-5

Port Status Register

B·8

B-6

Power·Up Diagnostic Register (PUDR)-Ethernet Bits

B·l0

B-7

Power-Up Diagnostic Register (PUDR)-TK50 Bits

B-ll

TABLES
1-1

Cabinet Kits for DEBNx Options

1-5

2-1

Ethernet Cable Connector Pinouts

2·5

2-2

Tape Drive Cable Connector Pinouts

2·8

3-1

State of DEBNx During and After Self-Test

3-5

4-1

DO-DEBNx Self-Test

4·3

4-2

Dl-Network Interconnect Tests

4·4

4-3
4-4

02-Tape Drive Tests

4·7

Console Mode Control Characters

4-10

4-5

Execute Command Switches

4·12

4-6

Error Report Fields

4·17

4-7

Error Report Field Definitions

4-18

Contents

4-8

Error Codes

4-20

4-9

Status Report Fields

4-23

4-10

Status Report Field Definitions

4-23

4-11

Diagnostic Completion Fields

4-25

4-12

Diagnostic Completion Message Field Descriptions

4-25

4-13

Summary Report Fields

4-26

4-14

Summary Report Field Definitions

4-27

4-15

Down-Line Loaded Diagnostic Programs

4-27

B-1

VAXBI Registers as Used in the DEBNx Module

B-1

B-2

Receive Console Data (RXCD) Register Bit Definitions

B-4

B-3

Self-Test Error Codes in PE Register

B-6

B-4

PUDR Bit Definitions

B-12

0-1

Node Number Multiple for Ethernet Address Computation

0-2

vii

Preface

Purpose of This Manual
This manual describes how to install the DEBNA and DEBNK modules.
Both modules, referred to as DEBNx, provide an interface between
the VAXBI bus and an Ethernet local area network. One form of this
module-the DEBNK-also serves as an interface to the TK50 streaming
tape drive.
This manual also describes diagnostics for these modules and gives advice
for troubleshooting.

Intended Audience
This manual is for DIGITAL and customer personnel who install or
replace the DEBNx module or option in the field.

Structure of This Document
This manual has four chapters and four appendixes, which are described
below:
Chapter 1 briefly describes the DEBNx module: its functions and what
you should have received.
Chapter 2 describes installation of the module.
Chapter 3 describes the module's self-test and how to interpret the results.
Chapter 4 describes the diagnostics that are available to test the
functioning of the DEBNx module and how to run them. In addition
to the ROM-based diagnostics, there are also software diagnostics for the
DEBNx. The chapter also gives troubleshooting hints.
Appendix A give~ environmental requirements for the DEBNx module.
Appendix B gives register information.
Appendix C describes booting with the DEBNx module.
Appendix D explains how to read the hardware Ethernet address.

Preface

Associated Documents
The DEBNx is one of a family of processors, memories, and adapters
that use the 32-bit VAXBI bus. The VAXBI Options Handbook (EB-27271-46)
provides a technical summary of all VAXBI modules.
Other related documentation includes:

DEBNAIDEBNK Technical Manual, EK-DEBNX-TM
Ethernet Installation Guide, EK-ETHER-IN
TKSO-D, TKSO-R Tape Drive Subsystem Owner's Manual, EK-LEP05-0M

Conventions Used in This Document
•

All addresses are in hexadecimal (hex). All bit patterns are in binary
notation. All other numbers are decimal unless otherwise indicated.

•

Ranges are inclusive. For example, the range 0-4 includes the integers
0, 1, 2, 3, 4.

•

Bits are enclosed in angle brackets (for example, < 12> ).

•

Bit ranges are indicated by two bits in descending order separated by
a colon; for example, < 12:1 >. Bit ranges are inclusive.

•

K = kilo (1024); M = mega (1024**2); G = giga (1024**3).

•

The term asserted" indicates that a signal line is in the true state.
The term deasserted" indicates that a signal line is in the false state.
Assertion" is the transition from the false to the true state.
"Deassertion" is the transition from the true to the false state.
Ii

Introduction

The term "DEBNx" is used to describe a family of intelligent I/O
controllers for the VAXBI bus:
•

DEBNA is an interface to an Ethernet local area network; it is
compatible with the IEEE 802.3 Ethernet specification. DEBNA is
the standard Ethernet interface for VAX 8xxx systems.

•

DEBNK, in addition to an Ethernet controller identical to the DEBNA,
has an onboard controller for a TK50 streaming tape drive. DEBNK is
an option for OEM applications.

Both modules are designated TI034. 1 The modules can be distinguished
by their VAXBI device type (BIle register bb + 0), which is 410F for
DEBNA and 410E for DEBNK. This manual uses the term "DEBNx" to
refer to either or both. Specific TK50 information, such as microcode
functions or diagnostics, of course pertains only to the DEBNK. Please see
the VAX Systems and Options Catalog for specifications of which operating
systems support the DEBNA and DEBNK options.

1.1

BASIC FUNCTIONS
The DEBNA supports one Ethernet port, which provides the physical and
data link communication layers of the Ethernet protocol, as defined by the
IEEE 802.3 Ethernet specification. The DEBNK supports one TK50 tape
drive, which uses 1/2-inch cartridge tape.
With its own onboard Micro VAX processor, the DEBNx can control
operations independently of the host processor. The details of Ethernet
and tape transactions, including error correction and data transfer over the
VAXBI bus, are thus transparent to the host processor (see Figure 1-1).

1 An earlier version of DEBNA was DEB NT, designated T1032.

1-1

Figure 1-1

DEBNA in a VAXBI System

I~··r
H40B1!1

DEBNA

H05T

VAXBI BUS

•

The Ethernet controller in the DEBNx lets the host processor communicate
with other processors in an Ethernet local area network. The controller
implements the complete Ethernet protocol and complies with the IEEE
802.3 Ethernet specification. In addition, the controller provides error
detection and correction at the network management level.

1-2

· Introduction

The DEBNx has extensive on-board diagnostics. On power-up or reset
the DEBNx tests itself and makes its status (pass or fail) available over the
VAXBI bus. A set of LEDs on the printed circuit board also indicates the
test results. In addition, a user may invoke other on-board diagnostics
from the system console to test the DEBNx's logic and functionality more
extensively.
The DEBNK's tape controller supervises tape operations (such as read,
write, position, and rewind) and buffers data to and from the tape drive.
The supported tape drive is the TK50, a 5.25-inch unit that drives a 0.5inch cartridge tape at 75 inches per second. The tape controller also
performs CRC error checking and ECC error checking and correction.
Figure 1-2 is a block diagram of the DEBNx module.

1.1.1

Ethernet/802.3 Controller
The Ethernet controller consists of the following chip set:
•

A local area network controller for Ethernet (LANCE chip)

•

A serial interface adapter (SIA chip)

The LANCE chip implements the data link layer of the Ethernet interface.
The SIA chip implements the physical layer of the Ethernet protocol.

1.1.2

Tape Controller
The tape controller consists of the following components:
•

An 80186 microprocessor

•

A multi-protocol serial controller (MPSC) chip

•

80186 memory and patch hardware

The 80186 is a 16-bit microprocessor that runs the tape controller's
firmware.
The MPSC chip interfaces the 80186 processor to the tape drive. The
MPSC performs parallel-to-serial and serial-to-parallel conversion, eRC
generation, and CRC checking.

1-3

Introduction

Figure 1-2

DEBNx Block Diagram

r-------------------------------------------------------------------i
I

!
I
!

-------------------,

!
I
I
!
I
!

-----------------------------

1-4

.. -- _._- -- -_ .._ .• - ... _. - ....... _.. -_ ... __ ._. ___________ . ______ .______ . __ .J
!

ETl£RNET

Introduction

1.2

PHYSICAL DESCRIPTION
The DEBNA and DEBNK options both consist of a single board. The
DEBNK has two cables-one to the tape drive and one to the Ethernet
transceiver. The cables connect to the module on the VAXBI backplane.
One cable is a 9-conductor, shielded cable with a male connector, and the
other is a 26-conductor, flat-ribbon cable with a female connector.
Table 1-11ists DEBNx cabinet kits, which must be ordered separately.
Three status-indicator lights on the module give a visual indication of
whether the DEBNx module passes self-test. The green LED is for the
TK50 tape drive.
Immediately after power-up or reset, the status-indicator lights are off. If
the tape drive passes self-test, ,the controller's firmware lights the green
Tape OK light. If all the executed tests pass (including the tape drive test),
the firmware lights the yellow DEBNx OK lights.

Table 1-1

Cabinet Kits for DEBNx Options

System/Enclosure

Kit Number

Contents

VAX 8500, 8530, 8550,
8700,8800

CK-OEBNA-LJ

5' internal Ethernet cable (17-01601-03)
Ethernet I/O connector panel (70-22904-03)
- includes 17-01601-03
Ethernet boot-enable jumper (17-01149-01)
Ethernet loopback connector (12-22196-02)

VAX 8200, 8250, 8300,
8350

CK-OEBNA-LM

8' internal Ethernet cable (17-01601-02)
Ethernet 110 connector panel (70-18799-00)
Ethernet boot-enable jumper (as above)
Ethernet loopback connector (as above)

CK-OEBNK-LM

CK-DEBNA-LM, plus 8' internal TK50 cable
and TK50 110 connector panel (17-01550-01)

CK-OEBNA-LN

15' internal Ethernet cable (17-01601-04)
Ethernet 110 connector panel (70-18799-00)
Ethernet boot-enable jumper (as above)
Ethernet loopback connector (as above)

Expansion cabinet (H9652EC/ED) for VAX 8500,
8530, 8550, 8700, 8800

1-5

Installation

This chapter explains how to install the DEBNA and DEBNK options into
a VAXBI computer system.
For complete instructions for installing a tape drive or Ethernet transceiver
connected to a DEBNx, see the installation guides for the device and host
computer system.
WARNINGS
POWER OFF-Shut off system power and disconnect the main
system power cord before performing any procedure in this
chapter.
STABILIZE THE CHASSIS-Make sure to extend the stabilizer
leg(s) whenever you open the chassis.
WEAR ESD WRIST STRAP-You must wear an antistatic wrist
strap that is connected to the processor cabinet whenever you
work inside the chassis.
USE CONDUCTIVE CONTAINERS-Whenever you remove a
circuit board from a VAXBI card cage, place it in a conductive
container.

2.1

INSTALLATION
The following steps describe the installation process:
1

Power down the host computer system by:

Turning the POWER switch to the OFF position and

Setting the system circuit breaker in the rear to OFF.

Make sure you are wearing the ESD wrist strap that is attached to the
system's chassis.

Open the chassis.

If necessary, install a transition header on the VAXBI backplane

opposite the slot for the DEBNx. (The VAXBI transition header is
part number 12-22246-01.) Use only the torque screwdriver (PIN
29-17381-00). Torque both screws to 5 +/- 1 inch-pounds.

2-1

Installation

Make sure there is a node ID plug in place. Note the number on the
node ID plug; this number is now the installed module's VAXBI node
ID.

Run the internal Ethernet cable from backplane segment E2 to the
Ethernet I/O connector panel. See Figure 2-1 and Section 2.3.

If this is the first VAXBI Ethernet adapter in the system (for example,

if you are replacing a DELUA connected through a DWBUA), skip the
rest of this step and go to step 8.
When adding a second or third DEBNx, connect the pigtail connector
from the internal Ethernet cable to a + 15V two-prong connector from
the power supply. Skip the next step and go to step 9.
NOTE
All the pigtail connectors from the power supply may already
be used. (Some systems have one or two.) In this case, the
external Ethernet cable from the 1/0 connector panel must not
be connected directly to an H4000 transceiver. The cable may
be connected either to a OECOM broadband transceiver or to
a DELNI, which has its own power and which in turn may be
connected to an H4000.
8

Connect the pigtail connector from the internal Ethernet cable to a
+ 15V two-prong connector from the power supply.
NOTE
On a VAX '8200/8300 Model 821BA ONLY, you must first
install the + 15V connector to the power supply. The
connector's part number is 17-00684-02.

1£ you wish the host to respond to MOP Boot messages over the
Ethernet (trigger boot), install the boot-enable jumper on backplane
segment E1. See Figure 2-1 and Section 2.4.

10 For a DEBNK, run the internal TK50 cable from backplane segment
D2 to the TK50 110 connector panel. See Figure 2-1 and Section 2.5.
11 Locate the card cage slot opposite the DEBNx transition header.

12 Lift the locking lever to open the slot.
13 Slide the DEBNx module into the card cage slot until it stops: this is a
zero insertion force card cage.

2-2

Installation

14 Close the locking lever.
15 Verify installation as described in the following section.

Figure 2-1

Cabling at the DEBNx VAXBI Connector

D2
]

-->

I[ 1 I

Boot-enable < - jumper

2.2

To
TK50 I/O connector panel

-->

To Ethernet I/O connector panel

INSTALLATION VERIFICATION PROCEDURE
Follow these steps to verify that the DEBNx is properly installed:
1

Turn the system power on and verify that the DEBNx passes selftest. (See Chaper 3.) If self-test fails, check to see that the module
is properly seated in the card cage. If the module continues to fail
self-test, swap in a different DEBNx module if available. You can also
try installing the module in a different slot.

After the module passes self-test, boot the operating system.

Configure the network database and start DECnet traffic on the
Ethernet.

2-3

Installation

2.3

If the system is unable to communicate over the Ethernet, verify
that the network software is installed and configured properly.
Check the hardware by running loopback tests with the ROM-based
D1 diagnostics. You can run these diagnostics either fro:m a VAX
8250/8350 system console or through the level 3 diagnostic EVDYC
under the VAX Diagnostic Supervisor. See Chapter 4 for details.

For the DEBNK, copy a file to a tape and read it back. If the drive
does not function properly, check the hardware by running the ROMbased D2 diagnostics. You can run these diagnostics either from
a VAX 8250/8350 system console or through the level 3 diagnostic
EVMDD under the VAX Diagnostic Supervisor.

INTERNAL ETHERNET CABLE
The internal Ethernet cable connects the VAXBI backplane to the I/O
connector panel (see Table 1-1 for part numbers). The external cable is
ordered separately; it runs from the outside of the connector panel to an
Ethernet transceiver, such as an H4000 baseband transceiver, DECOM
broadband transceiver, or DELNI local network interconnect.
On the backplane, the internal cable plugs into segment E2 opposite the
DEBNx slot. (Viewed with the node ID plugs at the top, E2 is the right
side of the segment farthest from the node ID plugs. See Figure 2-1.) The
+ 15V pigtail connector supplies power to the H4000 transceiver; however,
you should plug it in (if possible) regardless of the type of transceiver.
Table 2-1 lists pinouts of the internal Ethernet cable connector at the
VAXBI cage.

2-4

Installation

Table 2-1

Ethernet Cable Connector Pinouts

Signal

E01-E04

UNCONNECTED

E05-E09

LOGIC GROUND

E10
E11

ETHERNET COLLISION L
ETHERNET COLLISION H

E12
E13

ETHERNET RECEIVE L
ETHERNET RECEIVE H

Differential receive signals from the
Ethernet bus.

E14
E15

ETHERNET TRANSMIT L
ETHERNET TRANSMIT H

0
0

Differential transmit signals to the
Ethernet bus.

E16
E46

ETHERNET BOOT ENABLE

Type

Description

Differential collision detect signals from
the Ethernet bus.

Enables remote rebooting over the
Ethernet bus. The signal is asserted if
there is a jumper connection between
pins E16 and E46 in the DEBNx section
of the VAXBI backplane. The signal is
sent to the Status Register.

2-5

Installation

2.4

BOOT-ENABLE JUMPER
Install the boot-enable jumper if you want the system to accept an Ethernet
trigger boot-a MOP Boot message sent by another node in the network.
(Without the jumper, DEBNx will ignore Boot messages.)
The jumper is not required for you to boot the system over the Ethernet
using a console command like:

»>B ETAO
The jumper (PIN 17-01149-01) is a 3D-pin connector that is installed on
segment E1 of the VAXBI backplane, opposite the DEBNx slot. (Viewed
with the node ID plugs at the top, E1 is the left side of the segment
farthest from the node ID plugs.) The jumper connects pins E16 and E46,
as shown in Figure 2-2.

2-6

Installation

Figure 2-2

Ethernet Boot·Enable Jumper

[ node ID plugs]

E1 Connector
46

o
o
o
o
o
o

0
0

0
0
0

o
o

o
60

2.5

c-o

0
0

INTERNAL TK50 CABLE FOR THE DEBNK MODULE
The internal TK50 cable connects the VAXBI backplane to the 110
connector panel. The external cable is included with the TK50 desktop or
rackmount unit (ordered separately).
On the backplane, the cable plugs into segment 02 opposite the OEBNK's
slot (02 is the right side of the middle 110 segment; see Figure 2-1). Table
2-3 lists the pinouts of the TK50 cable connector at the VAXBI cage.

2-7

Installation

Table 2-2

Tape Drive Cable· Connector Pinouts

Signal

001
031
002
032
003

DRIVE PRESENT
UNCONNECTED

Type

033
004

GROUND
GROUND

003

DRIVE STATUS H

Differential serial drive status data signal
(high).

005
035
006
036
007
037
008
038
009

DRIVE READ DATA L
DRIVE READ DATA H

Differential read data signal.

DRIVE READ CLOCK H

Differential READ CLOCK signal (high).

Description

DRIVE WRITE CLOCK H
DRIVE WRITE CLOCK L

Differential WRITE CLOCK signals.

DRIVE STATUS L

Differential serial drive status data signal
(low).

GROUND
GROUND
DRIVE READ CLOCK L
DRIVE ERASE ENABLE L
DRIVE ERASE ENABLE H
DRIVE WRITE
GATE ENABLE L

Differential READ CLOCK signal (low).

0
0

Differential signals from the Erase Enable
Register.

Differential signal (low) from the Drive Write
Gate Enable Register.

039
010
040

GROUND
GROUND
DRIVE WRITE
GATE ENABLE H

Differential signal (high) from the Drive Write
Gate Enable Register.

011
041
012
042
013
043

DRIVE DR COMMAND H
DRIVE DR COMMAND L

0
0

Differential serial drive command signals.

DRIVE WRITE DATA L

Differential write data signal (low).

Differential write data signal (high).

GROUND
GROUND
DRIVE WRITE DATA H

2-8

Installation

2.6

REMOVAL
To replace a DEBNx option, follow these steps:
1

Power down the host computer system by:
a

Turning the POWER switch to the OFF position and

Setting the system circuit breaker to OFF.

Make sure you are wearing an ESD wrist strap that is attached to the
system's chassis.

Open the chassis.

On the module-installation side of the open chassis:

Locate the desired card cage slot.

Lift the locking lever to open the slot.

Slide the circuit board out of the card cage slot.

Put the board into a conductive container.

Close the locking lever.

On the cabling side of the open chassis:
a

Locate the same card cage slot.

If another DEBNx module will be installed, leave the cables and

jumpers in place.

2-9

Power-Up Self-Test

The DEBNx's power-up self-test consists of ROM-based diagnostic
routines that run automatically on power-up or reset. The power-up
self-test verifies that the hardware at the node is operational and, for a
DEBNK, that a tape drive is present.
Since the routines are contained in ROM, their execution requires
no operating system. The self-tests are thus stand-alone programs
indepe~dent of any software environment.

3.1

BIIC POWER-UP SELF-TEST
On power-up or reset, the BIlC performs its own self-test.
•

If the BIlC passes its internal self-test, it sets the Broke, Initialization,

and Self-Test Status (STS) bits in its VAXBI Control and Status
Register (VAXBICSR). The set STS bit indicates that the BIlC has
passed its internal self-test.
•

If the BIlC fails its internal self-test, it disables its VAXBI bus drivers.

This action prevents the DEBNx from writing corrupted data to the
VAXBI bus and denies other nodes access to the DEBNx's registers.
(The STS bit in the VAXBICSR remains clear, indicating to the DEBNx
that the BIlC failed its self-test.)

3.2

HOW TO RUN SELF-TEST
There are various ways to run self-test for the DEBNx:
1

On system power-up-When the user powers up the host system, the
DEBNx automatically runs power-up self-test. Front panel controls
vary among host systems; see the owner's manual for the specific
system.

On processor reset-When the user presses the reset or restart button
on the host system's front panel, the host processor runs a system
self-test, which causes each VAXBI node to run its own self-test.

From the console-A user can invoke the DEBNx's DO tests from the
system console of a VAX 8250/8350. (These are the same tests that
run during power-up or reset self-test.)

3-1

Power-Up Self-Test

In the following example, the user uses VAX console commands to
contact the DEBNx, which is node 5:

<CTRL/P>
»> Z 6

T/R
RBD6> DO
--tests run---results appear--

RBD5> QUIT
<CTRL/P>
»>

3.3

REPORTING SELF-TEST RESULTS
Test results (pass or fail) are indicated in three ways:
•

The status of the node as a whole is made available over the VAXBI
bus.

•

LEDs-There are three status-indicator lights on the module:
-

2 DEBNx OK LEDs (yellow)

- 1 Tape OK LED (green; means tape is present)
The location of the LEDs is shown in Figure 3-1.
•

Registers
The VAXBICSR and the Port Status Register provide summary
information on the state of the DEBNx during and after self-test.
If a self-test error occurs, the Port Error Register contains an

error code, and the Port Data Register contains a copy of the
Power-Up Diagnostic Register (PUDR), which provides additional
information.

The TK50 tape drive executes its own power-up self-test from ROM inside
the drive. If a tape is properly loaded in the drive, the drive's servo
motors are exercised by the test, and the tape is rewound to the Beginning
of Tape (BOT) mark after the test finishes. The drive does not read or
write the tape during the test. The outcome of the test is indicated by
a red LED on the drive. If the drive fails the test, the red LED flashes
rapidly.

3-2

Power-Up Self-Test

Figure 3-1

Self-Test LED Locations

B
1

VAXBI
CORNER

<CJ 1
a::::J 2

C
0
N
N
E
C
T

0
R

E
0
G
E

3.3.1

Self-Test Results on VAXBI Bus
On power-up, the BIle sets the Broke bit in the YAXBICSR, and the
DEBNx asserts BI BAD. If the node as a whole passes power-up self-test,
the DEBNx clears the Broke bit and deasserts BI BAD. If the node does
not pass power-up self-test, the Broke bit remains set and BI BAD remains
asserted.

3.3.2

Self-Test Results in LEOs
The yellow LEDs (DEBNx OK LEDs) show the status of the module after
the node self-test. The green LED (Tape OK LED) on the DEBNK module
shows the presence of the TK50 cable and drive.
At power-up or reset, all the LEDs are off. If the DEBNx passes all
the executed tests, the DEBNx's firmware lights the DEBNx OK LEDs;
otherwise, these LEDs remain off. If the DEBNK firmware determines
that a tape drive is present (not necessarily powered on, but at least
cabled), it lights the Tape OK LED.

3-3

Power-Up Self-Test

3.3.3

Self-Test Results in VAXBI Registers
•

VAXBICSR and PS -The VAXBICSR and the Port Status (PS) Register
provide a comprehensive picture of the DEBNx's functional level
during and after self-test. The following bits in these two registers
indicate increasing levels of functionality.
The Self-Test Status (STS) bit in the VAXBICSR indicates whether
the BIIC passed its self-test.
The Adapter Can Communicate (ACC) bit in the PS Register
indicates whether the DEBNx is minimally functional. (1 = yes;
o = no). Minimum functionality is defined as follows: the host
and DEBNx are able to access the DEBNx's port registers; the
ports are able to enter the MAINTENANCE state; the port must
be able to execute the supported BI VAX Port (BVP) maintenance
instructions.
The Broke bit in the VAXBICSR indicates whether the DEBNx's
node as a whole is functional (1 - pass; 0 - fail).

•

PUDR -The Power-Up Diagnostic Register (PUDR) shows the results
of the power-up self-test in detail, including Ethernet results and, on
the DEBNK, tape results. There are three copies of the (PUDR).

•

PS -The Self-Test Done bit in the PS Register indicates whether
the self-test completed execution (1 = test completed; 0 = test in
progress).

•

PE and PD - If self-test passes, both the Port Error (PE) and Port Data
(PD) registers contain zero. If self-test fails, the PD contains the PUDR
and the PE contains an error code (see Table 3-1).
NOTE
The host should not examine the PE and PD registers until the
Self-Test Done (STD) bit in the PS is set by the DEBNx.

Table 3-1 indicates how the VAXBICSR and the PS Register can be used
to determine the state of the DEBNx during and after self-test. The table
also indicates when the PE and PD registers should be read for additional
error information.

3-4

Power-Up Self-Test

Table 3-1

State of DEBNx During and After Self-Test

VAXBICSR
STS

PS Register

Broke

ACC

State of DEBNx

The BIIG passed its self-test;
self-test is still in progress.

None

The OEBNx failed self-test and is
not minimally functional.

PO Register contains
the PUOR. PE Register
contains FFOO 0003.

The OEBNx is minimally functional;
self-test is still in progress.

PO Register contains
a running count during
self-test.

The OEBNx is· minimally functional,
but a noncritical component failed
self-test.

PO Register contains
the PUOR. PE Register
contains FFOO 0004.

The OEBNx node is fully functional;
self-test has passed.

PO and PE registers
contain zero.

3.4

Additional
Information

STD

INTERPRETING TEST RESULTS
For the VAXBI node as a whole to pass self-test, all the executed subtests
must pass. The node may thus be usable to a large degree even though,
as a whole, it did not pass self-test. For example, if the Ethernet controller
in the DEBNK does not pass power-up self-test, BI BAD remains asserted
and the Broke bit remains set. However, the DEBNK could possibly be
used for tape transactions.
After most self-test failures, system software can examine the VAXBICSR,
PS, PE, and PD registers to determine which components are usable.
Based on this information, the system can decide that the node is still
usable for certain tasks. If the BIlC chip fails its self-test, however, it
disables its VAXBI drivers. This puts the entire node offline. In this case,
the BVP registers are inaccessible.
If the PD Register indicates that all the components have failed, the
problem is probably the BIlC, MicroVAX, or MicroVAX ROM. If one of

these components fails, the self-test routine stops, and the MicroVAX
enters a wait state.

3-5

Power-Up Self· Test

If the DEBNK's PD Register indicates that the tape drive failed power-up

self-test, the problem may be one of the following:
•

The tape drive is, in fact, malfunctioning.

•

The tape drive cable is defective or is not connected properly.

In any case, the user should look at the tape drive's LED to determine
whether the drive passed its own self-test. If the LED is flashing rapidly,
the drive failed the test.
If the DEBNK's PD Register indicates that the tape controller chips failed

self-test, the problem could be any of the following:
•

The MicroVAX's testing of communication with the 80186 failed.

•

The 80186's testing of communication with the MicroVAX failed.

•

Any of the tested components in the tape controller failed.

Finally, self-test could fail because of a systemwide fault. For example,
a faulty power supply or missing VAXBI bus terminators could be the
problem. Make sure that system power is OK and check for other
possible systemwide faults.

3.5

TESTED COMPONENTS
Self-test tests the following components on the DEBNx module:
•

MicroVAX

•

MicroVAX ROM

•

MicroVAX RAM

•

MicroVAX patch hardware

•

BIle and BCI3 chips

•

LANCE chip

•

MicroVAX -80186 communication

On the DEBNK, the self-test also tests the tape controller chips, including:
•

80186 microprocessor

•

Multi-protocol serial controller (MPSC)

•

80186 gap-detection hardware

•

80186 patch registers

3-6

Power-Up Self-Test

3.6

•

80186 patch PAL

•

80186 buffer and patch RAM

•

80186 ROM

•

80186 tape control registers

UNTESTED COMPONENTS AND FUNCTIONS
The following components and functions are not tested:
MicroVAX:
•

A complete instruction set (only a small subset of the instruction set is
tested)

Ethernet controller functions:
•

More (multiple retries of packet transmission)

•

One (one retry of a packet transmission)

•

Babble error

•

Time domain reflectometry

., Late collision
•

Loss of carrier

•

Memory error

In the BCI3/BIIC logic:
•

BIIC nodespace locking

•

BIIC nodespace Write Sense bits

•

BCI3 datamove operations with quadwords and octawords

•

BCI3 N onlocal Memory Reference (NLMR) line

In the DEBNK's tape controller:
•

A complete 80186 instruction set (only a small subset of the instruction
set is tested)

•

Module transceivers out to the drivers

3-7

Diagnostics and Troubleshooting

This chapter describes diagnostics that test the DEBNx module. Some
are ROM-based diagnostics, which are resident on the module; others are
software diagnostics, which are loaded and run under the VAX Diagnostic
Supervisor (VDS). Customers must purchase software diagnostics under a
separate license.
The ROM-based diagnostics (RBDs) fall into three categories:
•

DO - DEBNx Self-Test

•

Dl - NI (Network Interconnect) Tests

•

D2 - Tape Drive Tests

The DO diagnostic verifies the functionality of the DEBNx module. The
Dl diagnostic verifies the Ethernet link from the Ethernet controller to the
Ethernet transceiver. The D2 diagnostic verifies the integrity of the tape
drive and media (only for the DEBNK module).
NOTE
The ROM-based diagnostics are not supported by the TI032,
module type O.
On a VAX 8250/8350, all the ROM-based diagnostics can be invoked
from the operator's console. On all VAX 8xxx systems, the Dl and D2
diagnostics can be invoked through the VAX Diagnostic Supervisor (VDS)
using the level 3 interface programs and the standard VDS operating
procedures.
Section 4.4 provides detailed information on the status and error reports
generated by the diagnostics.
Section 4.5 lists the software diagnostics for the TI032 and TI034
modules, which can be run under VDS.

4-1

Diagnostics and Troubleshooting

4.1

ROM-BASED DIAGNOSTICS
The tests in each category are described in detail in the following sections.
Individual tests, or test groups, can be invoked with commands from
the operator's console or, for the D1 or D2 tests, executed through
the VAX Diagnostic Supervisor (VDS) (see Section 4.5). If a test-fault
occurs, deductive reasoning, along with a comprehensive understanding
of the test routine, is required to determine which hardware element is
malfunctioning.

4.1.1

DO-DEBNx Self-Test
The DEBNx self-test, which is functionally equivalent to the DEBNx's
power-up self-test, performs a basic confidence check of the module.
Table 4-1 describes the tests iri the DEBNx self-test diagnostic. Unless
otherwise specified in the table, the test execution parameters and method
of fault reporting can be selected with the appropriate run-time switches.
If a test number is not specified with the DO execute command, all tests
are executed by default.
When any DO test is selected, an internal self-check of the BIle chip is
first executed to verify the VAXBI bus communications logic. After a
250-millisecond delay, which allows the BIlC chip to complete its internal
self-check, the Self-Test Status (STS) bit in the VAXBI Control and Status
Register is checked. If the BIlC chip passed its self-check, the STS bit is
set. If the BIlC failed the self-check, the STS bit- is clear and the VAXBI
bus registers are disabled. When this is the case, further communication
with the DEBNx module is inhibited.

4-2

Diagnostics and Troubleshooting

Table 4-1

DO-DEBNx Self-Test

Diagnostic/Test

Name

Description

DOlT 1

ROM CRC

Calculates a longword CRC character for each
ROM section. Compares calculated CAC to
corresponding stored CAC.

DO/T2

RAM

First verifies byte mask logic. Then verifies nonstack area of RAM. Finally, moves stack into verified
AAM and verifies untested stack area. (Also verifies
data and address lines as a result of RAM tests.)

DO/T3

Patch

Disables patch function and toggles each patch
register bit. Enables patch function and executes
single patch operation.

DO/T4

MicroVAX Critical
Path

Checks critical timing and principal microinstructions.

DO/T5

IRQ Lines

Steps through all IPLs (interrupt priority levels) to
verify that no IAQ line is stuck asserted.

DOIT6

Interval Timer

Verifies interval timer operation.

DO/T7

BI Corner

Performs seven subtests to verify BIIC and BCI3
chips. Exits to next test if test fails.

DO/T8

NI LANCE Chip

Verifies LANCE chip and CAC logic in the Ethernet
controller. (SIA chip is not tested.)

DO/T9*

ROM CRC

Calculates a longword CRC character for each
ROM section. Compares calculated CAC to
corresponding stored CRC.

DOlT 10

RAM

First verifies byte mask logic. Then verifies nonstack area of RAM. Finally, moves stack into verified
RAM and verifies untested stack area. (Also verifies
data and address lines as a result of RAM tests.)

DO/T11

Patch

Disables patch function and toggles each patch
register bit. Enables patch function and executes
single patch operation.

DO/T12

CPUlTimer

Verifies basic functionality of both the 80186 CPU
and the programmable timers.

DOIT13

Miscellaneous
Registers

Enables and disables the Write Drive Gate, Drive
Erase, and Patch Enable Registers.

DO/T14

Gap Detect

Verifies gap detection logic in tape controller.

DOIT15

MPSC

Verifies multi-protocol serial controller (MPSC) chip.

*Tests 9-16 are 80186 tests.

4-3

Diagnostics and Troubleshooting

Table 4-1 (Cont.)

DO-DEBNx Self-Test

Diagnostic/Test

Name

Description

DO/T16

CPU
Communications

Verifies communication and interrupt operations
between the 80186 and MicroVAX CPUs.

DO/T17

Drive Present

Checks that drive present bit is set in Tape Status
Register.

4.1 .2

D1-Network Interconnect Diagnostic
The Network Interconnect (NI) diagnostic consists of the two test routines
described in Table 4-2. These tests verify that the Ethernet controller,
cable, link, and transceiver are operational. If a test number is not
specified when this diagnostic is selected, test 2 is executed by default.
Tests 1 and 2 should not be invoked at the same time because their
run-time environments are different.

Table 4-2

D1-Network Interconnect Tests

Diagnostic/Test

Name

Description

D11T1

External Loopback (with
connector)

Transmits data out through the SIA
chip and verifies that the same data
is received back through the loopback
connector.

D11T2

External Loopback (on
live Ethernet)
.

Transmits data out through the SIA
chip and verifies that the same data is
received back from the Ethernet bus.

Typically, test 2 is run first to verify the entire Ethernet system. This test
verifies that the Etli.ernet link from the Ethernet controller (LANCE/SIA
subsystem), through the transceiver cable, to the transceiver is functioning
properly. If this test passes, further Ethernet testing is not required.
NOTE
For test 2 to execute properly, the DEBNx module must be
connected to an operational Ethernet bus, a DELNI in loopback
mode, or an H4080 transceiver. The test may fail if there is
excessive traffic on the bus.
4-4

Diagnostics and Troubleshooting

Test 2 is automatically retried if any of the following errors is detected:

•
•

Loss of carrier

•

eRe error

•
•
•
•

Framing error

•

Buffer error

Retry error

Babble error
Missed packet error
Overflow error

Test 2 fails if any of the following occurs:

•

32 retries

•

Transmission error

•

Descriptor ring error

•

eRe error

•

Memory error

•

Underflow error

If test 2 fails, test 1 can be run to isolate the faulty field-replaceable unit
(FRU). Follow these steps:

Disconnect the external Ethernet transceiver cable (BNE3) at the
transceiver end.

Install a loopback connector on the cable.

Run test 1 and observe one of the following:

•

If test 1 passes, the transceiver is bad. Replace the transceiver,
reconnect the cable to the new transceiver and run test 2 to verify
proper operation. No further action is required.

•

If test 1 fails, one of the following is bad: transceiver cable,
internal Ethernet cable, backplane, or DEBNx module. Go to the
next step.

Disconnect the external transceiver cable at the I/O connector panel
and install a loopback connector in its place.

4-5

Rerun test 1 and observe one of the following:
•

If test 1 passes, the transceiver cable is bad. Replace the cable and

run test 2 to verify proper operation. No further action is required.
•

If test 1 fail$, one of the following is bad: internal Ethernet cable,

backplane, or DEBNx module. Replace the internal Ethernet
cable. Go to the next step.
6

Rerun test 1 and observe one of the following:
•

If test 1 passes, the removed cable is bad. Run test 2 to verify

proper operation. No further action is required.
•

If test 1 fails, either the DEBNx module or the backplane is bad. If
the module passes self-test, it is probably good, but replace it and

go to the next step.
7

Rerun test 1 and observe one of the following:
•

If test 1 passes, the removed DEBNx module is bad. Run test 2 to
verify proper operation. No further action is required.

•

If test 1 fails, the backplane is bad. Install the DEBNx module in

a different slot. Run test 2 to verify proper operation. Consider
replacing the card cage.

4.1 .3

02-Tape Drive Diagnostic
The tape drive diagnostic consists of the tests described in Table 4-3.
Tests 1-6 detect hard (nonintermittent) errors. Tests 7-9 detect hard or
soft media errors. This diagnostic should be run when: the DEBNx tests
fail to isolate a malfunction, the tape errors are intermittent, or the media
integrity is questionable. Since some of the tape tests destroy user data,
a confirm (lC) run-time switch is required to execute these tests. Use a
scratch or blank tape for the destructive tests.
If no test numbers are specified, the diagnostic runs tests 1-6.

4-6

Diagnostics and Troubleshooting

Table 4-3

02-Tape Drive Tests

Diagnostic/Test

Name

Description

D2/T1

Initialization

Verifies that drive can be initialized to a
valid state by resetting the drive and then
checking the drive status, hardware revision,
and software revision levels.

D21T2

Online and Calibration

Rewinds tape to BOT and verifies that drive
read/write heads can be calibrated.

D21T3

Tape Motion

Verifies that drive can move tape rapidly
forward and backward.

D21T4

Write (destructive) 1

Verifies that drive can write tape by first
rewinding to BOT and then writing a
test pattern on track O. Test fails with
Initialization error if tape cartridge is writeprotected or drive is powered down.

D2/T5

Read

(Pre-written tape required.) Verifies that
drive can read tape by rewinding to BOT
and then reading track O. Test fails if
read error occurs or tape does not contain
fixed:-Iength records.

D2/T6

Write/Read
(destructive) 1

Verifies that drive can write, reposition, and
then read tape. Read data is compared
byte-for-byte to write data.

D2/T7

Thrashing Write
(destructive) 1

Verifies drive functionality by writing
individual test pattern records to tracks
o and 1. After each record is written, tape
is stopped and repositioned before another
record is written. Requires approximately
15 minutes to complete.

D2/T8

Thrashing Read

(Pre-written tape required.) Verifies drive
functionality by reading individ- ual records
to LEOT (logical end of tape) from tracks 0
and 1. After each record, tape is stopped
and repositioned before another record is
read. Requires approximately 25 minutes to
complete.

1 The command for these tests requires the /C (confirm) switch.

4-7

Diagnostics and Troubleshooting

Table 4-3 (Cont.)

02-Tape Drive Tests

Diagnostic/Test

Name

Description

D2/T9

Thrashing Write/Read
(destructive) 1

Verifies drive functionality by writing and
reading Individual test pattern records
from tracks 0 and 1. After each record,
tape is stopped and repositioned before
another record Is written or read. Requires
approximately 40 minutes to complete test
if no parameter is given. A test of the entire
tape (parameter of 1) takes about 8 hours.

1The command for these tests requires the /e (confirm) switch.

4.2

HOW TO RUN ROM DIAGNOSTICS FROM THE CONSOLE
The ROM-based diagnostics are stand-alone programs that can be
controlled and executed from the operator's console of a VAX 8250 or
8350. The Dl and D2 tests, along with the other diagnostics listed in
Section 4.5, can also be executed through the VAX Diagnostic Supervisor
(VDS).
To run the RBDs from the operator's VAXBI console, do the following:
1

Enter console mode by typing the following characters at the system
prompt:
»>Z n

r/R
RBDn>
where n is the node ID of the node under test (O-F hex)
2

Select the desired diagnostic test(s) by entering the appropriate
Execute command along with the applicable run-time switches.

Terminate the diagnostics by entering the QUIT command or one of
the control characters described below.

4-8

Diagnostics and Troubleshooting

Four control characters affect the operation of the ROM-based diagnostics.
Generally, these characters are used to abort test routines, reset the
DEBNx, or exit from the console mode as described in Table 4-4. To
enter a control character, press and hold down the ICTRLI key and then
simultaneously press the desired character key once.
@.TRL/g and ICTRL/YI abort test execution and return program control to

the command-entry level prompt (RBDn> ). If either character is entered
when a test is not executing, the character is echoed on the screen and the
command-entry prompt is reissued.

ICTRL/U I functions only at the command~entry level to abort the current
command line and reissue the command -entry prompt. This character
should be used when a mistake is made while typing a command.
ICTRL/zl serves two functions. If a test routine is executing when this

character is entered, the routiIte is aborted and program control is
returned to the command-entry level. If a test is not executing when
this character is entered, the DEBNx is reset thereby executing a power-up
self-test.
LQI~:!::ifJ terminates the console mode and returns program control to
the system-level prompt regardless of the test execution status. If a test

routine is executing when this character is entered, the routine continues;
however, progranl control returns to the system level.

4-9

Diagnostics and Troubleshooting

Table 4-4

Console Mode Control Characters

Character

When an ABO Is Executing

When the Parser Is Executing

ICTRL/cl

Aborts test routine, rewinds to BOT,
executes cleanup code, and returns
to parser and reissues the RBOn>
prompt.
Ignored.

Echoes ....e", reissues RBDn> prompt.

ICTRL/ul
ICTRLN\

Aborts test routine, and returns to the
diagnostic prompt. Does not execute
cleanup code.

ICTRL/zl

Aborts test routine, executes cleanup
code, and returns to command-entry
level.

Echoes ....U", aborts current command
line, and reissues RBDn> prompt.
Echoes ....e", reissues RBDn> prompt.

Resets the DEBNx and executes
power-up self-test; same as QUIT
command.

Terminates console mode and returns
to system-level prompt (> > > )
to put adapter in a known
state.

4.3

ROM DIAGNOSTIC CONSOLE COMMANDS
The ROM diagnostic console commands are as follows:
•

DO, 01, D2-the Execute commands

•

Deposit

•

Examine

•

Quit

Each command is gescribed in detail in the following sections. Examples
are also included. In all cases, when an illegal or invalid command is
entered, the keyboard alarm sounds, a question mark is displayed, and
the command-entry prompt is redisplayed as shown.
RBDn>Invalid Command
?

RBDn>

4-10

Diagnostics and Troubleshooting

4.3.1

Execute Commands (00,01,02)
The Execute commands invoke a designated test, or group of tests, within
a specified diagnostic. The command format is:
Dn[/Swl/Sw2/ .. ;Sw9 pc]

On
Diagnostic number (n = 0, 1, or 2)

Sw
Switch (see Table 4-5)

pc
Parameter code. The only parameter is 1, which is supported only
by test 9 of D2. A pc of 1 means test the entire tape; no parameter
means test 2 tracks of the tape.
NOTE
The IC (confirm) switch is required for all data-destructive tests.
If this switch is not included when data-destructive commands are
entered, the just-entered command line is echoed on the screen.
When this occurs, type IC to execute the command or just press
IRETURNI to abort the command.

4-11

Diagnostics and Troubleshooting

Table 4-5

Execute Command Switches

Switch

Name

Default

Description

IBE

Bell on Error

No bell

Sounds keyboard alarm each time an error is
detected.

Confirm

No data
destroyed

Confirms data-destructive test.

IDS

Disable Status

Status reports

Disables status reports.

IHE

Halton Error

Continue on
error

Diagnostic halts on test that detects first error
and returns to command-entry prompt.

liE

Inhibit Errors

Error reports

Disables error reports.

liS

Inhibit Summary

Disables summary reports.

ILE

Loop on Error

Summary
reports
Continue on
error

IP=n

Pass Count

One pass

Specifies total number of diagnostic passes.
(One pass equals one iteration of all selected
tests.) A pass count of 0 selects an infinite
number of passes. Type ICTRLlcl or ICTRLIYI
to terminate and return to command-entry
prompt.

IQV

Quick Verify

Normal test

Executes Quick Verify version of specified test,
when applicable; otherwise, is ignored.

IT=n[:m]

Test Number[s]

Unique
to each
diagnostic

Specifies test or group of tests to be
executed. If group is specified, tests are
executed in ascending numerical order.

ITR

Enable Trace

No trace

Enables trace reports.

Diagnostic loops on test that detects first
error, even if error is intermittent. Type
[crJIDC] or [CTALN] to terminate and return to
command-entry prompt (RBOn> displayed).

EXAMPLES OF SELF-TEST EXECUTE COMMAND (DO)

Executes one pass of all tests.
~

DO/P=O/T=4:6/BE

Executes tests 4 through 6 in loop-forever mode with bell-on-error active
and trace reports disabled by default. Summary, status, and error reports
enabled by default.
4-12

Diagnostics and Troubleshooting

DO/P=1/TR/HE

Executes one pass of all tests, by default, in halt-on-error mode with trace
reports enabled. Summary, status, and error reports enabled by default.
~

DO/T=8/LE/BE

Executes one pass, by default, of test 8 in loop-on-error mode with bellon-error active and trace reports disabled by default. Summary, status,
and error reports enabled by default. (If test 8 fails initially, diagnostic
loops forever, even though test may subsequently pass. To stop, use
ICTRL/C/.

EXAMPLES OF NI EXERCISER EXECUTE COMMAND (01)

Executes one pass of Dl test 2 (which is default test executed).

Dl/T=l/P=O

Executes test 1 for infinite passes. To stop, use ICTRLlcl.

EXAMPLES OF TK50 TAPE EXERCISER EXECUTE COMMAND (02)

D2/TR/T=9/C 1

Runs long version of test 9 of tape exerciser with trace enabled for one
pass. The Ie (confirm) switch is required for data-destructive tests.

D2/T=1:9/C/P=2/DS

Runs all tape exerciser tests for two passes. Test 9 runs in short mode
since no parameter was given. Status reports are disabled.

4-13

Diagnostics and Troubleshooting

4.3.2

Deposit and Examine Commands
The Deposit and Examine commands are generally used with each other
to deposit data into VAXBI registers and memory locations Qr to read the
contents of VAXBI registers and memory locations. Both commands can
be used in the following fonnats:

D* = Deposit into current location
D+

= Deposit into next location

E* = Examine current
location
E+

= Examine next location

D- = Deposit into previous location

E- = Examine previous
location

DIL = Deposit longword

ElL = Examine longword

DIW = Deposit word

EIW = Examine word

DIS = Deposit byte

E/B = Examine byte

EXAMPLES OF EXAMINE AND DEPOSIT COMMANDS

RBD5>E/L lFFDOOOO
lFFDOOOO OD25410D

Examine 1FFDOOOO; it contains OD2541 OD.
~

RBD5>D* 0
RBD5>D+ 0
RBD5>D+ 0
RBD5>D+ 0

Deposit 00000000 into 1FFDOOOO, 1FFD0004, 1FFD0008, and 1FFDOOOC.
g]

RBD5>E*
lFFDOOOO 00000000

Examine 1FFDOOOO; it contains 00000000.
~

RBD5>D/W* A5A5

Deposit word A5A5 into 1FFDOOOO.

4-14

Diagnostics and Troubleshooting

RBD6>E/L
lFFD0004 0000A6A6

Examine longword at lFFD0004; it contains OOOOA5A5.

RBD6>E+
lFFD0008 00000000

Examine longword at lFFD0008; it contains 00000000.
f.j

RBDn>D/B* A6A6
1

Try to use a "byte " command to deposit an illegal byte value into the
current location.

RBDn>D/B* A6

Deposit byte AS into lFFD0008.
~

RBDn>E/W*

Examine word at lFFD0008; it contains OOOOOOAS.
NOTE
When the *, +, or - delimiter is used without a length designator,
the previous designator is used. Hence, the E* in step 3,
examines a longword because the previous D* command
designated a longword operation.

4.3.3

Quit
The QUIT command sets the Node Reset bit in the VAXBI Control and
Status Register, thereby initializing the DEBNx and thus executing a
power-up self-test. ICTAL/Zj has the same function. The command format
is:
QU[IT]

4-15

Diagnostics and Troubleshooting

4.4

TEST STATUS AND ERROR REPORTING
ROM-based diagnostics have five types of status and error reports:
1

Error reports

Status reports

Trace headers and messages

Diagnostic ,completion messages

Summary reports

The following sections describe each report in detail.

4.4.1

Error Reports
Three types of errors are reported:
•

System fatal errors

•

Device hard errors

•

Device soft errors

A system fatal error is an error that prevents the diagnostic from running
to completion. Such errors include unexpected machine checks during
diagnostic initialization, powerfail interrupts, and certain exceptions. A
system fatal error causes the diagnostic to abort.
A device hard error is an error that prevents the tested device from being
able to perform the current operation under test. A device hard error
is thus an unrecoverable error. After reporting a device hard error, the
diagnostic performs the action specified in the invoking command: halt
on error, loop on error, or continue on error (default).
A device soft error is an intermittent hardware error that probably will go
away if the test is repeated. A device soft error is thus a recoverable error.
After reporting a device soft error, the diagnostic performs the action
specified in the invoking command: halt on error, loop on error, continue
on error (default).
Error reports for D1 and D2 tests have three lines; error reports for DO
tests have three lines plus the contents of the PUDR.
Figure 4-1 shows a sample error report. Table 4-6 lists the fields in each
line in Figure 4-1. Table 4-7 defines the fields. Table 4-8 defines the error
codes for line 3, field 1.

4-16

Diagnostics and Troubleshooting

Figure 4-1

Sample Error Report

F
SE
69

4
410F 000000002
NI
00
T02
A6A6A6A6 00A6A6A6 000000000 00000010 1FF81020

Line 1:

F = fail
4 = VAXBI node number
410F = DEBNA module
00000002 = pass count (hex)

Line 2:

SE = soft device error
NI = network interconnect (Ethernet link)
00 = unit number
T02 = test number

Line 3:

69 = error code (see Table 4~8)
A6A6A6A6 = expected data
00A6A6A6 = received data
00000000 = SCB offset (not applicable)
00000010 = RAM location of received data
(expressed as hex offset)
1FF81020 = ROM PC value at which error was
detected

Table 4-6

Error Report Fields

Line

Field 1

Field 2

Field 3

Field 4

Status

Node No.

Device
Type

Passes

2
3

Err Type

ASCII L

Unit No.

Test

Err Code

Expected

Received

SGB

Field 5

Field 6

Address

4-17

Diagnostics and Troubleshooting

Table 4-7

Error Report Field Definitions
Mnemonic

Name

Description

Status

The report. type. For error reports, P = passed,
F = failed.

Node Number

The node under test. The value may range from
O-F (hex).

Device Type

The type of module under test. 410F (hex) =
DEBNA; 410E (hex) = DEBNK

Pass Count

The execution pass at which, the error was
detected (hex.)

Error Type

The error type:

LINE 1

NODE NO.

PASS

LINE 2
ERR TYPE

FE = system fatal error
HE = hard device error
SE = soft device error
ASCII L

ASCII Logic

An ASCII code that indicates the failing logic:
ROM = ROM
UVAX = MicroVAX
RAM = RAM
BCI = BCI3
80186 = 80186 processor
NI = Ethernet interface
TKCTL = tape controller
TK = TK50 tape drive

UNIT

Unit

Number The unit under test (always 0).

TEST

Test, Number

The test that detected the error. A value of zero
indicates that the initialization code for the test
failed.

4-18

Diagnostics and Troubleshooting

Table 4-7 (Cont.)

Error Report Field Definitions

Mnemonic

Name

Description

ERR CODE

Error Code

The nature of the detected error. See Table 4-8
for a list of error codes.

EXPCT

Expected
Data

The expected data for certain types of data
comparison errors.

RCVD

Received
Data

The Incorrect data that was received for a data
comparison.

SCB

System
Control Block
Offset

The system control block offset through which
an interrupt was expected or received.

ADD

Address

The memory location or register address at
which a data comparison error or register
operation error was detected.

Program
Counter

The PC (program counter) value in ROM at
which the error was detected.

LINE 3

4-19

Diagnostics and Troubleshooting

Table 4-8

Error Codes
Error Code

Description

ERRORS FROM 01 TESTS

No packet transmitted.

The packet transmitted has an incorrect destination or source
address.

No packet received.
The packet received has an incorrect destination or source
address.

No LANCE interrupt was received after the LANCE was started.

The STOP bit was not set, or it was not the only bit set in
LANCE CSRO when the LANCE was stopped.

Initialization of the LANCE was not successful.

The low byte of LANCE CSAO was not as expected after packet
transmission.

The MISS bit was set in LANCE CSRO indicating a missed
packet.

The BABL bit was set in LANCE CSRO indicating a transmitter
timeout.

32 soft errors have occurred, and another soft error condition
has arisen.

The UFLO bit was set in LANCE transmit descriptor 3 indicating
a truncated transmitted packet.

67
68

32 retries have occurred, and another retry condition has arisen.

The CERR bit is set in LANCE CSRO indicating loss of
heartbeat.

8 retries due to LANCE bugs have already occurred, and
another retry condition has arisen.

4-20

The MERR bit is set in LANCE CSRO indicating a memory error.

Diagnostics and Troubleshooting

Table 4-8 (Cont.)

Error Codes

Error Code

Description

ERRORS FROM 02 TESTS

Command was aborted.

Controller error was detected.

72
73
74

Read/write data error detected.

Unit is offline.

76
77
78
79

Position lost err.or.

Drive error was detected.
Invalid command detected.

Record data truncation error.
Serious exception detected.
Hardware write-protect error.

Illegal interrupt from 80186.

Interrupt message from 80186 bad.

82
83
84

Tape not loaded into drive.

Controller initialization error.

No cartridge detected in drive.
Unexpected interrupt exception.

MicroVAX-80186 communication error.

87
88
89
90

Controller timeout error.

Unexpected TapeM encountered.

No command echo received within required time.

Drive motion test error: drive unable to perform the motion test,
which consists of several drive motion commands.

Data overrun error detected.
LEOT encountered unexpectedly.
BOT encountered unexpectedly.

4-21

Diagnostics and Troubleshooting

Table 4-8 (Cont.)

4.4.2

Error Codes

Error Code

Description

Tape load error: drive unable to successfully unload and reload
a tape.

Unsolicited byte from drive: drive sent an illegal, unsolicited
byte. Certain bytes are allowed at any time.

Test timed out while waiting for a response from the drive.

80186 did not request a new buffer.

Status Reports
Status reports are printed during long-running tests to indicate that the
diagnostic is still running and to show the status of the diagnostic. A
status report consists of two lines (see Figure 4-2). Table 4-9 lists the fields
in each line. Table 4-10 defines the fields.

Figure 4-2

Sample Status Report

F
TK60

410E 00000200
00
TOg

Line 1:

S = status report
F = node F (hex)
410E = DEBNK module
00000200 = pass 200

Line 2:

XX = undefined field
TK60 = tape drive
00 ... unit number
T09 ... test 9

4-22

Diagnostics and Troubleshooting

Table 4-9 Status Report Fields
Line

Field 1

Field 2

Field 4

1
2

Status
Err Type

Node No.

Device Type

ASCII L

Unit No.

Passes
Test

Table 4-10 Status Report Field Definitions
Mnemonic

Name

Description

Status
Node Number

Report type. S = status report.
Node under test. The value may range from O-F
(hex).

Device Type

The type of module under test. 410E (hex) =
DEBNK module

Pass Count

Number of passes completed so far (hex).

Undefined field.
An ASCII code that indicates the logic currently
being tested:

Line 1
NODE NO.

PASS

Line 2
ASCII L

ASCII Logic

UNIT
TEST

Unit Number

TK50 = TK50 tape drive

4.4.3

Test Number

The unit under test. Always O.
The currently executing test.

Trace Headers and Messages
A trace header is printed at the start of diagnostic execution. If trace mode
is enabled (with the ITR switch), a trace header is printed at the start of
diagnostic execution, and a trace message is printed at the start of each
test's execution.
A trace header is an ASCII mnemonic that indicates what logic is currently
being tested along with the revision level of the code.

4-23

Diagnostics and Troubleshooting

A trace message consists of a "T" followed by the number of the currently
executing test. For example, "T02" indicates that test 2 is currently
executing. A trace message is printed for each pass of the test.
Figure 4-3 shows. a sample trace header and message.

Figure 4-3

Sample Trace Header and .Message

TOl

TK_50
1.00
TOl - T04

4.4.4

T02

T03

T04

TOl

T02

T03

T04

the diagnostic being executed
the diagnostic reV1S10n
tests 1-4, run for two passes each

Diagnostic Completion Messages
A diagnostic completion message (see Figure 4-4) is printed immediately
after a diagnostic completes execution and before a summary error report.
A diagnostic completion message consists of one line with the fields
shown in Table 4-11. Figure 4-5 illustrates a sample diagnostic completion
message. The fields are defined in Table 4-12.

4-24

Diagnostics and Troubleshooting

Figure 4-4

Sample Diagnostic Completion Message

410F 00000020

P = pass
6 = node 6

410F = DEBNA module
00000020 = 20 passes (hex)

Table 4-11

Table 4-12

Diagnostic Completion Fields
Field 1

Field 2

Field 3

Field 4

Status

Node No.

Device Type

Pass Count

Diagnostic Completion Message Field Descriptions
Mnemonic

NODE NO.

PASS

Name

Heading

Status

Indicates whether the diagnostic passed or
failed. P = pass. F = fail.

Node Number

The node under test. The value may range from
O-F (hex).

Device Type

The type of module under test.
410E = DEBNK
410F = DEBNA

Pass

The number of passes executed (hex).

4-25

Diagnostics and Troubleshooting

4.4.5

Summary Reports
If not disabled (with the lIS switch), a summary report (see Figure 4-5) is
printed directly below the diagnostic completion message. A summary
report is printed for each pass of the diagnostic. In addition, the user may
invoke a summary report by entering the Summary command.

A summary report consists of one line with seven fields. Table 4-13 shows
the summary report fields, and Table 4-14 defines the fields.

Figure 4-5

Sample Summary Report

;00000000 00000100 OOOOOOAO 0000100F 00010000 00010000 00002400

00000000 = unit 0 (bit mask)
00000100 = 256 hard errors (hex)
OOOOOOAO = 160 soft errors (hex)
0000100F = 4,111 retries (hex)
00010000 = 65,536 reads (hex)
00010000 = 65,536 writes (hex)
00002400 = 9,216 seeks (hex)

Table 4-13

Summary Report Fields

Field 1

Field 2

Field 3

Field 4

Field 5

Field 6

Field 7

UUT MASK

HARD·ERR

SOFT ERR

RETRIES

READS

WRITES

SEEKS

4-26

Diagnostics and Troubleshooting

Table 4-14

Summary Report Field Definitions
Mnemonic

Name

Heading

UUT MASK

Unit Under
Test Mask

An 8-blt mask that Indicates which units were
tested. The bits represent units 7-0, proceeding
from left to right. In the DEBNx, there Is only
one Ethernet unit (unit 0) and one tape control
unit (unit 0).

HARD ERR

Hard Errors

The total number of hard errors detected (hex).

SOFT ERR

Soft Errors

The total number of soft errors detected (hex).

RETRIES

Retries

The total number of retries attempted (hex).

READS

Reads

The total number of read operations performed

WRITES

Writes

The total number of write operations performed
(hex).

SEEKS

Seeks

The total number of track seeks performed
(hex). Defined only for certain tape diagnostics.

~hex).

4.5

SOFTWARE DIAGNOSTICS
Table 4-15 lists the diagnostics that support the DEBNx module. The
EVDYC and EVMDD diagnostics can be used to interface with the D1 and
D2 ROM-based diagnostics using standard operating procedures under
the VAX Diagnostic Supervisor (VDS).

Table 4-15

Down-Line Loaded Diagnostic Programs
Program

Diagnostic Level

EVDYC

Provides user interface to 01 RBDs.

EVMDD

Provides user interface to 02 RBDs.

EVDYD

Tests the functioning of the NI port.

EVDWC

Tests the installation of the host
Ethernet node and all other nodes on
the local Ethernet that support MOP
protocol.

EVMDA

Tests the TK50 tape drive.

Description

The level 3 diagnostics in Table 4-15, EVDYC and EVMDD (the 01 and
D2 tests) are run as follows:
4-27

Diagnostics and Troubleshooting

Boot the VAX Diagnostic Supervisor.

Enter the following commands at the DS> prompt:

DS> ATTACH DEBNK HUB ETA n
DS> ATTACH LANCE ETA ETAO
DS> SELECT ETAO
DS> RUN EVDYC

n is the node under test

The level 2R diagnostics are run as follows:

4.5.1

Boot VMS.

Run the VAX Diagnostic Supervisor.

At the DS> prompt enter the commands as shown in the example
above.

EVDYC Program
The EVDYC program provides a way for VDS users to run the DEBNx's
D1 ROM-based diagnostic tests. D1 is the Network Interconnect
diagnostic .

4.5.2

EVMDD Program
The EVMDD program provides a way for VDS users to run the DEBNK's
D2 ROM-based diagnostic tests. D2 is the tape drive diagnostic.
The EVMDD program divides the D2 tests into the following five sections:
•

DEFAULT-Tests 1 through 6. These tests destroy tape data.

•

ALL-All the D2 tests.

•

NONDESTRUCT -Tests 1 through 3, which check the tape drive's
ability to move the tape and calibrate itself.

•

DATA-Tests 4-6, which write the tape, read the tape, and then
compare tape writes and reads. These tests destroy tape data.

•

THRASHING-Tests 7-9, which perform thrashing writes, thrashing
reads, and thrashing write/reads. These tests destroy tape data.

The user can specify the sections above with the /SECTION qualifier.
4-28

Diagnostics and Troubleshooting

4.5.3

EVDYD Program
The EVDYD program makes sure that the DEBNx's NI port performs all
the functions that the VAX/VMS Ethernet port driver, ETDR~VER, may
request. Customers for ETDRIVER include DEC net.
EVDYD has seven tests:
1

Transmit CRC test

Receive CRC test

Promiscuous Address test

Enable All Multicast test

Station test

No Receive Buffer Available test

Stress test

Test 7 uses either internal or externalloopback facilities:
•

Internalloopback-If you do nothing, test 7 will use the LANCE chip's
internal loopback.

•

External loopback-You must
1

Install a loop back connector on the I/O connector panel or on the
Ethernet transceiver cable.

Select external loopback by setting the VAX Diagnostic Supervisor
event flag 3:

os> SET EVENT FLAG 3
3

Answer "yes" to the prompt
Connector in place?

4-29

4.5.4

EVDWC Program
The EVDWC program tests the installation of the host Etheret node and
checks the connectivity of all other nodes on the local Etherl1et.
The functions of the EVDWC program are as follows:
•

Monitors DECnet ID messages on the Ethernet

•

Builds a node table for the local Ethernet

•

Conducts loopback testing, monitors network traffic, and permits
users to view contents of network packets

•

Provides online help for users

There are limits on this program's use of the available channels on the NI
section of the DEBNx.

4.5.5

EVMDA Program
The EVMDA program tests the TK50 tape drive; it exercises the drive,
makes sure it can read and write data, checks the read and written data
for validity, and keeps statistics.

4-30

Environmental Requirements

Operating
Environment

Temperature

5 degrees C to 50 degrees C (41 degrees F to 122 degrees
F)

Humidity

10% to 95% with maximum wet bulb of 32 degrees C (89.6
degrees F) and minimum dew point of 2 degrees C (36
degrees F) noncondensing

Altitude

To 2.4 km (8,000 ft)

Storage
Environment

Temperature

-40 degrees C to 66 degrees C (-40 degrees F to 151
degrees F)

Humidity

To 95 0/0 noncondensing

Altitude

To 9.1 km (30,000 ft)

A-1

Registers

The DEBNx VAXBI registers are divided into two groups-BIIC and BCI3
registers. The BIIC registers include the standard VAXBI registers (see the
VAXBI Options Handbook) and the tape port registers. The BCI3 registers
include the Receive Console Data (RXCD) Register and the NI (Network
Interconnect) registers.
Table B-1 gives a brief description of how some of these registers are used
in the DEBNx module. Each register is then described in detail.

Table 8-1

VAXBI Registers as Used in the DEBNx Module

Use

DTYPE

Identifies device as DEBNA or DEBNK and gives module type.

GPR 0 (BeI3)

RXeD Register.

GPRs 1-4 (BeI3)

BI VAX Port Registers (NI).

GPRs 0-3 (Bile)

BI VAX Port Registers (tape).

SADR, EADR

Always set to zero.

RxeD

Invokes ROM-based diagnostics and reports results.

PUDR

Gives the results of self-test.

B-1

Registers

DEVICE REGISTER (DTVPE)

B.1

The Device Register contains information that identifies the option (see
Figure B-1).

Figure 8-1

Device Register

24 23

bb+ol~___M_oD_u_L_E_Ty_p_E__~I

16 15

___R_E_~_s,_oN LE_~_L ~I___________D_E~_~
__

Bits <31:24> give the module type:
•

0 or 1 = T1032 board

•

2 = T1034 board

Bits < 23:16 > give the revision level:
•

Hexadecimal number 0-FF

Bits < 15:0> give the device type:
•

410F for the DEBNA

•

410E for the DEBNK

8-2

__T_W_E__________~I

Registers

B.2

RECEIVE CONSOLE DATA (RXCD) REGISTER
A user at the system console can write the Receive Console Data (RXCD)
Register (Figure B-2) to invoke the DEBNx's self-test or complementary
diagnostics. The RXCD Register is also used to send test results back to
the console. The DEBNx's firmware does not support any other functions
for the RXCD Register.
The RXCD can be defined in two ways, depending on whether the host
implements an RXCD. If the host has an RXCD, the RXCD Register in the
DEBNx has only one set of fields. If the host does not have an RXCD,
the RXCD Register in the DEBNx has two identical sets of fields. The
higher-order set is used as the host's RXCD. Table B-2 defines the RXCD
bits.

Figure 8-2

Receive Console Data (RXCD) Register

o
bb + 200

BUSY 2
CHARACTER 2

BUSY 1
NODE ID 1
CHARACTER 1

OPTIONAL
<31:16>

REQUIRED
<15:0>
MlO-OSO-85

8-3

Registers

Table B-2

Receive Console Data (RXCD) Register Bit Definitions

Bit

Mnemonic

Name

Type

Description

Busy 2

RIW

When set, indicates that the CHAR2
field contains a character that has not
yet been read by the host. The host
clears the bit after reading the CHAR2
field. The DEBNx cannot write the
CHAR2 field until the bit is clear.

30:28

RESERVED and
zeros

These bits are RESERVED and are
always read as zeros.

27:24

Node 10 2

RIW

Written by the DEBNx to indicate that
data in the CHAR2 field is from the
DEBNx.

Character 2

RIW

Contains the console command
character being sent from the DEBNx
to the host.

Busy 1

RIW

When set, indicates that the CHAR 1
field contains a character that has not
yet been read by the DEBNx. The
RXCD Register clears this bit after
reading the CHAR 1 field. The sending
node cannot write another character
to the CHAR 1 field until the bit is
cleared.

14:12

RESERVED and
zeros

These bits are RESERVED and are
always read as zeros.

11 :8

Node 10 1

Written by the sending node.
Indicates the node that has sent
the data in the CHAR1 field.

Character 1

Written by the sending node with
a console command character or a
console message character.

23:16

7:0

CHAR2

CHAR1

8-4

Registers

B.3

BI VAX PORT REGISTERS
The BIlC general purpose registers are used as port registers for the
tape port in the DEBNK, and BCI3 GPRs 1-4 are used as port registers
for the NI (Ethernet) port in the DEBNA and DEBNK. The use of the
port registers is specified by the BI VAX Port (BVP) architecture, which
defines the interface between the BVP port drivers resident in the host
and the BVP ports resident in the DEBNx. The tape port driver and tape
port in the DEBNK transfer data between the host and the DEBNK's
tape controller. The NI port driver and NI port physically transfer data
between the host and the DEBNx'$ NI port. Since both sets of port
registers are identical, the following description pertains to both sets.
The port registers, collectively called the Port Register Block (PRB), include
the following (Figure B-3):
•

Port Control (PC) Register

•

Port Status (PS) Register

•

Port Error (PE) Register

•

Port Data (PD) Register

In general, the port driver writes the PC register with commands for
the port, and the port writes the PS, PE, and PD registers with status
information for the port driver. In addition, the DEBNx uses the PE and
PD registers to report self-test results to the host.

B.3.1

Self-Test Results in Port Error Register
Immediately after power-up self-test, the Port Error Register contains zero
if self-test passed. If self-test failed, PE contains an error code from Table
B-3.

8-5

Registers

Figure B-3

BI VAX PORT Registers

VAXBI
ADDRESS

TAPE PORT REGISTERS

NODE PRIVATE
SPACE ADDRESS

31
bb + FO

PORT CONTROL REGISTER

2008 OOFO

bb + F4

PORT STATUS REGISTER

2008 00F4

bb + F8

PORT ERROR REGISTER

2008 00F8

bb + FC

PORT DATA REGISTER

2008 OOFC

NI PORT REGISTERS

31
bb

+ 204

PORT CONTROL REGISTER

2008 0204

+ 208

PORT STATUS REGISTER

2008 0208

+ 20C

PORT ERROR REGISTER

2008 020C

+ 210

PORT DATA REGISTER

2008 0210

Table B-3

Self-Test Error Codes in PE Register

Code

Description

FFOO 0003

The DEBNx has not attained minimum functionality. A test from test 1 through
test 7 has failed.

FFOO 0004

The DEBNx has attained minimum functionality but a noncritical component
has failed; for example, the LANCE/NI test failed.

B.3.2

Self-Test Results in Port Data Register
Immediately after power-up self-test, the PD register contains zero if
self-test passed. If self-test failed, PD contains the PUDR.
B-6

Registers

8.3.3

Port Control Register
Figure B-4 gives the format of the Port Control Register.

8.3.4

Port Status Register
Figure B-5 gives the format of the Port Status Register.

Figure 8-4

Port Control Register

8 7 6

DATA

INSTRUCTION

Where: Own 0 ... Owned by host
1 - Owned by port

BU-2766

If the ETYPE field in the Port Status Register contains Fatal BI Error, NonFatal BI Error, or Transient BI Error, then the Port Error Register contains
the contents of the Bus Error Register (BER) at the time of the error,
and the Port Data Register contains the physical address of the failing
transaction.
If the ETYPE field contains any other values (Adapter Exception X02, Data
Structure Error X05, or Port Logical Error X06), then the Port Error Register
contains an error code as follows:
B-7

Registers

Figure 8-5

Port Status Register

33222222

1 1

10987654

9 8

6 5

ORSAXEF
WPTCSRO
NSDCTLE
P
0

RSVD

OWN
RPSQ
STD
ACC
XSTP
ERL
FOE
PST

ETYPE

RSO
SUME

PST

8 7 6 5
ETYPE

R S
S U
OM
E

RSVD

o = Owned by host
1 = Owned by port
1 = Response to port status query
1 = Self-test done
1 = Adapter can communicate
1 = Extended self-test passed
1 = Error lost
1 = Free queue exhausted
Port state:
001 = Undefined
010 = Initialized
100 = Enabled
110 = Stopped
111 = Maint
= Error type:
01 = Transient 81 error
02 = Adapter exception
03 = Nonfatal 81 error
04 = Fatal 81 error
05 = Data structure error
06 = Port logical error
07 = Adapter hardware error
1 = Response queued to host
1 = Summary error: error type field is valid

BU-2788

8-8

Registers

Error

Meaning

01
02

Adapter Hardware failure
Adapter Bugcheck
Port Data register contains bugcheck code.
These will be the same as the controller error
codes listed under the controller error log
packet.
Failed minimal functionality self-test
Failed BI specified self-test
Failed extended self-test
Invalid PQB
PD register contains physical address of
bad entry.
Queue interlock retry timeout
PD contains address of error
Illegal queue offset
PD contains address of error
, Illegal port instruction
PD contains snapshot of PC
Port instruction illegal in current port state
PD contains PS at time of the error
Adapter timeout on clearing of PS ownership bit
Adapter timeout due to host inactivity
Free queue exhausted
PD may contain index of exhausted free queue
Failed to enter MAINT state
Failed to enter INITIALIZED state
Failed to enter ENABLED state
Buffer key mismatch
PD contains buffer name used
Data transfer larger than size of buffer
Buffer access check error
,Virtual address translation failed
PD contains the failed address
BDT index out of range
PD contains address of the buffer name
Power failure
Host interrupt timeout
PD contains the PIV contents
Queue entry size violation
PD contains queue entry address
Address invalid for maintenance instruction
PD contains the invalid addr~ss

03
04
06

08
09
OA
OB
OC
OD
OE
OF
10
11
12
13
14
16
16
17
18
19
1A
1B

8-9

Registers

8.4

POWER-UP DIAGNOSTIC REGISTER (PUDR)
The Power-Up Diagnostic Register (PUDR) displays the results of the
DEBNx's self-test, which runs automatically on power-up or reset. After
the entire self-test finishes, the operating system can read the register to
determine which components on the DEBNx module passed self-test.
The PUDR operates as follows:
•

The PUDR is initialized to all zeros on power-up or reset.

•

When a subtest in the self-test routine passes, its corresponding bit in
the PUDR sets.

•

If a subtest fails, its corresponding bit remains cleared.

The PUDR of a DEBNx that passes self-test has the following value:
•

The DEBNA-7FFBOFDF (no tape drive is present)

•

The DEBNK-7FFCIFDF (the tape bits are set)

Figures B-6 and B-7 show bit maps of the register, and Table B-4 provides
bit definitions.

Figure B-6

Power-Up Diagnostic Register (PUDR)-Ethernet Bits

31 3029 28 27 26 25 24 23 22 21 20 19 18

bb + 2141 0

IIIIIIIIIIIIIIII
~ ~50 PRE~NT
0

B-10

16 15

NE~ORK

TK50 BITS

INTERCONNECT
INTR REQUEST LINES
TIMER
BIIC AND BCI3
.... icroVAX
ROM4
ROM3
ROM2
ROM1
RAM
PATCH
TAPE CONTROLLER

Registers

Figure B-7

Power-Up Diagnostic Register (PUDR)-TK50 Bits

16 15 14 13 12 11 10 9

2141

ETHERNET BITS

1 0

IIIIIIIIIIIIIIIII
PRESENT~

MICROVAX INTR
BUS HOLD
1132
MPSC
. GAP DETECT-MISCELLANEOUS
UNEXPECTED INTR
80186
PATCH
RAM
ROM2
ROM1

8-11

Registers

Table B-4
Bit

PUDR Bit Definitions
Mnemonic

Name

Description

Tape Controller

Sets when the TK50 and associated logic
are good.

Bit must be zero.

MBZ

TAP CTRL

PATCH

RAM

Random Access Memory

Sets when the DEBNx's on-board RAM
passes self-test.

27
26
25
24

ROM1
ROM2
ROM3
ROM4

ROM chips 1-4

Each bit sets when the corresponding
MicroVAX ROM checksum is good.

UVAX

MicroVAX

Sets when the MicroVAX passes self-test.

BIIC and BCI3

Sets when the BIIC and BCI3 chips pass
self-test.

Sets when the patch logic is good.

TMR

Timer

Sets when the interval timer is good.

20
19

IRQ
NI

INTR Request Lines
Network Interconnect

Sets when no IRQ line is stuck asserted.
Sets when the Ethernet controller,
including the LANCE chip, is good.

TK50 PR

TK50 Present

Sets when a TK50 tape drive is present.

17:13

MBZ

Bits must be zero.

PRES

Present

Sets when a TK50 tape drive is present.

UVINT

MicroVAX INTR

Sets when the MicroVAX-to-80186 interrupt
logic is good.

BUSHD

Bus Hold

Sets when there are no bus hold errors.

10
9
8
7
6

1132

Sets when the 1132 transceivers are good.

MPSC

MPSC chip

Sets when the MPSC logic is good.

GAP

Gap Detect

Sets when the gap-detect logic is good.

MISC

Miscellaneous

Sets when miscellaneous registers are
good.

UNEXP

Unexpected INTR

Sets if an unexpected INTR is trapped.

80186

80186 Processor

Sets when the 80186 is good.

PATCH

Sets when the patch logic is good.

RAM

Sets when 80186 RAM is good.

ROM2

Sets when 80186 ROM2 is good.

ROM1

Sets when 80186 ROM1 is good.

8-12

Bootstrapping with DEBNx

Most host systems in which the DEBNx resides can bootstrap their
operating systems either locally (from disk) or remotely (from an Ethernet
network).
Host systems can boot voluntarily (from a command that a user types at
the system console) or involuntarily (from a command to boot that arrives
via the network).
Whether voluntarily or involuntarily, the host system boots from a
specified device. The device is usually specified by the user in a console
command, and the booting hardware/software then reads this parameter.
The DEBNx plays a role in the booting whenever (a) a command to boot
arrives over the network, or (b) the specified device from which to boot is
the network.
The sections in this appendix describe these two bootstrap roles:

C.1

A remote system sends the DEBNx a command to boot-that the
DEBNx's host system should reboot itself.

A local user on the DEBNx's host system commands the host system
to boot itself, and this reboot takes place via the DEBNx over the
network.

REMOTE SYSTEM SENDS DEBNx A COMMAND TO BOOT
This operation happens typically on networks where all systems are
restarted and booted from a central system.
A MOP Boot message arrives at the DEBNx from the network:
1

If the boot-enable jumper is NOT in place, the DEBNx will pass the
MOP Boot message to the port driver, if the MOP protocol type has
been enabled.

If the boot jumper IS in place, the DEBNx asserts BI RESET, assuming
the driver has enabled reset. The power-up default condition is to
allow the DEBNx to assert BI RESET.

C-1

Bootstrapping with DEBNx

C.2

LOCAL USER REQUESTS A BOOT FROM THE NETWORK
A user on the DEBNx's host system can request a boot by using the
system console and typing the console B (boot) command at. the system
prompt (> > ».
The B command has the following syntax:
B [/R5:<nnnn>] [<ddxy>]

where:
B

is the boot command.

IA5:

specifies GPR 5 (A5).

nnnn

are four hexadecimal digits that the B command can pass to the
bootstrap program via A5.

ddxy

specifies the device from which to bootstrap.
dd

is the code for the device type.

is the DEBNx's VAXBI node 10.

is the unit number of the Ethernet adapter (always zero).

The syntax varies slightly from system to system depending on the type of
processor that controls the system's console.
Example (on a VAX 8250):
»> B ET50

C-2

Ethernet Address

The LANCE station address PROM contains the DEBNx controller's
unique Ethernet address plus a fixed test pattern. The PROM provides 32
bytes of space for the address. When the PROM is accessed, it outputs 8
bits, which are stored as the low-order byte of a data word in MicroVAX
buffer RAM.
On power-up or reset, firmware running on the MicroVAX writes the
Ethernet address from the PROM into the Physical Address Register in the
LANCE/processor memory interface. The Ethernet address is also copied
into the DEBNx nodespace and can be examined from the system console.
Before an operating system is booted, the hardware Ethernet address is
the default DECnet address. The Ethernet address is used when a system
is downline loaded.

D.1

HOW TO READ THE HARDWARE ETHERNET ADDRESS
If VMS is not running, use the console Examine command to read the

Ethernet address. The address is stored in the six bytes:
bb + 218
bb + 219
bb + 21A
bb + 21B
bb + 21C
bb + 210

The base address (bb) is computed (in hex) as follows:
2000 0000 + (2000) * (OEBNx VAXBI node number)

For example, if the DEBNx is at VAXBI node B, then 2000 * B is 16000 in
hex (see Table D-1). The base address bb is 2000 0000 + 1 6000, or 2001
6000. You can find the hardware address by examining bytes 2001 6218
through 2001 621D.

D-1

If VMS is running, use the NCP SHOW LINE CHARACTERISTICS
command, which displays the Ethernet address as Hardware Address.
For example, the display from SHO LINE ETA-O CHAR might include a
.
line like the following:
Hardware Address 08-00-28-00-10-5E

In DEBNx nodespace 08 is the byte in bb + 218, and so on.

Table 0-1

Node Number Multiple for Ethernet Address Computation
VAXBI Node
Number (hex)

2000 • VAXBI Node Number

0000

2000

4000

3
4

6000
8000

AOOO

COOO

EOOO

10000

12000

14000

16000

18000

1AOOO

1COOO

1 EOOO

0-2

Index

80186, in tape controller. 1-3
802.3 specification • 1-1

Console (cont'd.)
RXCD Register· B-3
Control characters for console commands •
4-9

ACC bit, in Port Status Register· 3-4
ACC bit, in PS register. 3-4
Altitude • A-1

DO-Self-test • 4-2
D1-Ethernet diagnostic • 4-4
02-Tape diagnostic • 4-6
DEBNx
block diagram· 1-3
Deposit command. 4-14
Destructive tests • 4-6
IC switch and • 4-9, 4-11
Device Register· B-2
Device Type. B-2
Device type. 1-1
Diagnostics • 4-1 to 4-30
console commands • 4-10
Deposit • 4-14
Examine • 4-14
Execute • 4-11
Quit. 4-15
control characters • 4-9
DO. 4-2
01 • 4-4
02· 4-6
destructive tests • 4-6
errors from RBDs. 4-16
loopback tests for Ethernet. 4-4
reports
Completion Message • 4-24
Error. 4-16
Status • 4-22
Summary. 4-26
Trace· 4-23
ROM-based • 3-1 , 4-1 to 4-27
how to run using console • 4-8
self-test • 3-1
Software • 4-27 to 4-30

B
BI BAD. 3-3
BIIC
GPRs· 8-5
self-test • 3-1
BI VAX Port Registers • B-5
See also Port Control Register, Port
Status Register, Port Error Register,
Port Data Register
BOOT command • C-2
Boot-enable jumper. 1-5, 2-6
Boot message, MOP • 2-6, C-1
Bootstrapping from Ethernet. C-1
Broke bit, in VAXBICSR • 3-1,3-4
BVP
See BI VAX Port

c
Cabinet kits. 1-5
Cables. 1-5
Ethernet • 2-4
Installation • 2-3
pigtail connector. 2-2, 2-4
TK50· 2-7
Card cage, VAXBI • 2-3
Completion Message • 4-24
Confirm switch, destructive tests and. 4-11
Console

Index-1

Index

Diagnostics
Software (cont'd.)
EVDWC. 4-30
EVDYC. 4-28
EVDYD. 4-29
EVMDA· 4-30
EVMDD· 4-28
troubleshooting • 4-5

E
Environmental requirements • A-1
Error codes
in PO register. B-6
in PE register. B-5, B-7
Error codes, ROM-based diagnostics • 4-19
Error Report • 4-16
Errors
fatal, hard, soft. 4-16
in diagnostics Summary Report • 4-26
ROM-based diagnostics • 4-16
Ethernet
station address • 0-1
transceiver • 2-4
Ethernet controller
basic functions • 1-3
LANCE chip· 1-3
SIA chip. 1-3
EVDWC·4-30
EVDYC. 4-28
EVDYD· 4-29
EVMDA. 4-30
EVMDD. 4-28
Examine command. 4-14

Hardware (cont'd.)
installation • 2-1
removal • 2-9
Humidity. A-1

IEEE 802.3. 1-1
Indicators
LEOs· 1-5
Initialization bit, in VAXBICSR • 3-1
Installation • 2-1 to 2-8
Precautions • 2-1
Verification • 2-3

J
Jumper, Boot-enable • 1-5, 2-6

L
LANCE
station address PROM • 0-1
LANCE chip. 1-3
LEOs· 1-5, 3-2, 3-3
Loopback connector· 1-5
Loopback tests, diagnostics and • 4-4

M
Module Type. B-2
MOP Boot message • 2-6, C-1
MPSC. 1-3
Multi-Protocol Serial Controller
See MPSC

Fatal errors • 4-16

H4000 transceiver. 2-2, 2-4
Hard errors • 4-16
Hardware

Index-2

See Port Control Register
PO
See Port Data Register
PE

Index

PE (cont'd.)
See Port Error Register
Pigtail connector. 2-2, 2-4
Pinouts
Ethernet cable • 2-4
TK50 cable • 2-8
Port Control (PC) Register· B-5, B-7
Port Data (PO) Register· 3-2, 3-4, B-5
self-test and • 3-4
Port Error (PE) Register· 3-2, 3-4, B-5
self-test and • 3-4
Port Status (PS) Register· 3-2, 3-4, B-5, B-7
self-test and • 3-4
Power-Up Diagnostic Register
See PUDR
Power-Up Diagnostic Register (PUDR) • 3-2,
B-10
PS
See Port Status Register
PUDR· 3-2, B-10

Q
Quit command • 4-15

R
RBDs
See ROM-based diagnostics
Registers
BI VAX Port· B-5
Device. B-2
Port Control (PC)· B-5, B-7
Port Data (PO) • 3-2, B-5, 8-6
Port Error (PE) • 3-2, B-5, 8-7
Port Status (PS) • 3-2, 3-4, 8-5, 8-7
Power-Up Diagnostic Register (PUDR) •
3-2,8-10
PUDR· 3-2
RXeD. 8-3, 8-4
VAX81· 8-1
VAX81CSR • 3-2
Removal • 2-9
ROM-based diagnostics • 3-1 , 4-1 to 4-27

RXCD Register. 8-3

s
Self-test. 3-1 to 3-7
811C. 3-1
error codes • 8-5, 8-6
how to run • 3-1
LEOs. 3-2
results • 3-2 to 3-6
in LEOs· 3-3
interpreting • 3-5
in VAX81 registers • 3-4
on VAX81· 3-3
running DO • 3-2
tested components • 3-6
untested components and functions • 3-7
SIA chip. 1-3
Soft errors • 4-16
Software diagnostics • 4-27 to 4-30
Station address • 0-1
Status Report. 4-22
STD bit, in Port Status Register. 3-4
STS bit, in VAX8ICSR. 3-1,3-4
Summary Report· 4-26
Switches for console commands • 4-11

T
Tape controller
basic functions. 1-3
80186 chip in • 1-3
Introduction • 1-3
MPSC chip in • 1-3
Temperature • A-1
TK50 tape drive • 1-1
Trace mode, in diagnostics. 4-12, 4-23
Trace Report. 4-23
Transition header. 2-1
Troubleshooting, Ethernet diagnostics and •
4-5

Index-3

Index

v
VAXBI
card cage. 2-3
error reporting • 3-3
results of self-test • 3-3
VAXBICSR. 3-2
Broke bit. 3-1, 3-3, 3-4
Initialization bit. 3-1
self-test and .3-4
STS bit. 3-1, 3-4
VAXBI Registers. B-1
Verification, installation • 2-3

Index-4