Digital PDFs

EY-2217E-SG-1

November 1985

388 pages

Original

10MB

Document:	Guide to VAX-11/780 System Troubleshooting
Order Number:	EY-2217E-SG
Revision:	1
Pages:	388
Original Filename:

OCR Text

EY-2217E-SG-0001

Guide to VAX-11/780
System Troubleshooting

FOR INTERNAL USE ONLY

First Printing, November 1985

Copyright © 1985 by Digital Equipment Corporation.
All Rights Reserved
The material in this document is for informational purposes only
and is subject to change without notice; it should not be
construed as a commitment by Digital Equipment Corporation.
Digital Equipment Corporation assumes no responsibility for any
errors that may appear in this document.
Some portions of this manual are copied from other manuals,
microfiche, etc.
The reason for this is to provide as much
information as possible in a single, easily cariied manual.
UNIX is a trademark of AT&T.
The following are trademarks of Digital Equipment Corporation:

mnmnama
DEC
DECmate
DECOS
DECwriter
DIBOL
LSI

MASSBUS
PDP
P/OS
Professional
Rainbow
RSTS
RSX

RT
UNIBUS
VAX
VAXstation

VMS
VT
Work Processor

Contents
Page
Pref ace

.......................................................

Section Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

xiii

Troubleshooting Approach •••••••••••••••••••••..•••••••••••••••
Research and Define the Problem .••.•••••••••••••••••••
Venture a Testable Guess ••.••.•••.•••••.•.••••••.•••••
Set-up a Test Case • • • . • • . • • • • • • • • • • • • • • . • • . • • • • • • • • • • •
Predict the Results •••.•••••••.•.•..•••..•••••••.•••••
Conduct the Test Case •••.•••••••••••.•••••••••.•••••••
Evaluate the Definitio~ ••••••.••••••.••.••••••••••••••
Research and Refine the Definition ••••••••••••••.•••••
Return Non-Failing Units •.•••.•.•••••.••..••••••••••••
Replace Failing Units •••••••••.•••••••••••.•••••..••••
Repeat Until Problem is Solved ..•.••.••••••..••.••••••

xv
xvi
xvi
xvii
xviii
xviii
xix
xix
xx
xx
xx

System Log Books • • • • • • • • • • • . • . • • • • • • • . . • • • • • • • • • • • • • • . • • • • • • • •

xxi

Sources of Information • • • . • • • • • • • • . • • • • • • • • • • • • • • . • • • • • • • . • • • •

xxiii

Maintaining Control ••••••••.•.••••••••.•••••••.•.•••.••.•••.••

xxv

Section I.

VAX-11/780 Troubleshooting Outline ••••••••••••••••••••

1-1

VAX-11/780 Troubleshooting Basics

1-2

VAX-11/780 System Troubleshooting Tools •.•.•••••...••••••.••••

1-5

VMS Operating System Crashes or Bugchecks .•.••••.•...•••••.•••

1-6

Machine Checks . • • • • • • • • • . • • • . • . • • • • • • . • • • • • • . • • . • • • • . •
VAX-11/780 Machine Check Error Logout •••..••.•
VMS Fatal Bugcheck/Machine Check Example ••••••
ESSAA Machine Check Example •••••...•••••••••••
Breakdown of VMS Machine Check Printout ••.•.•.
Getting Started on Machine Checks •••••.•.••...
Machine Check Logout Informatio~ ..••.••.••••••
Summary Parameter Description .••••••••••••••••
Bit Breakdown of Stack entries ••••.••..•...•••
Machine Check Logout Breakdown Flowchart ••••••

1-9
1-10
1-13
1-14
1-15
1-16
1-17
1-17
1-18
1-22

Cache Parity Errors ••••..••••.••.••••..•.•••••
Problem Areas if Cache "DATA Par Err" ••••.•
Problem Areas if Cache "TAG Par Err" •.•••••
Disabling CACHE by Backplane Jumpers ••••.••
ID Register #lE ••••.•..•••••....•.....•••••

1-34
1-35
1-36
1-36
1-37

lll

Translation Buffer Parity Errors •••••••.•••...
Problem Areas if TB "TAG Par Err" ••••••••••
Problem Areas if TB "DATA Par Err" •••••••••
ID Reg i st er # 12 •••••.••.••••••..•...•••••••
IO Register #13 •••••.••••.••••...•••••.••.•

1-38
1-38
1-39
1-41
1-43

Control Store Parity Errors •.••••••••.••••••••
ID Register #0C •••••.•••••••••••••••••.••••
ID Reg i st er # 2 0 . . •••••..•••••••••••••••••••
Voltages to Micro-code Boards •..•.••••••...
M8235 LED Description ••.•••••.••..••••.•.••
CS Bus Groups and CS Bit Breakdown •.••••..•
Chart Showing "Bus CS" Bits to Boards ••••••
Chart Showing "Bus CS" Groups to Boards ••••
Using the Microcode Sync Point ..•••••••••••
Control Store Bit Backplane Pin Layout •••.•

1-45
1-47
1-48
1-49
1-49
1-50
1-51
1-52
1-53

CPU Read Timeouts/Error Confirmation .••••••••••
ID Register #19 •••..••••••••••.••••.•••••.•
ID Register #lA •••••••••••••••.•.••..••••••
Breaking Down Physical Byte Addresses ••.•••
Memory Array Physical Byte Addresses .••••..
NEXUS Physical Byte Addresses •••••••.•••.••
UNIBUS Physical Byte Addresses ••.•..•••••••
RH780 External Reg. Phy. Byte Addresses ••..
RH780 Internal Reg. Phy. Byte Addresses ••••
Physical Byte Address Breakdown Procedure ••
I/O Address Ranges •.•.••..•.••.•.••.•......
Physical Memory Array Address Range •••.••.•
DW780 Register Offsets ••.••..•.••...••••...
RH780 Internal Register Offsets ••.••.•.••••
RH780 MASSBUS (EXTERNAL) Register Offsets ••
Memory Array Address Bit Breakdown ••••••.••
"Timeout Address" ID Reg. Bit Breakdown ••••
Physical "BYTE" Address Space Charts ••••..•
Physical "LONGWORD" Address Space Charts .••
MS780-C/A Longword Address Charts ••.••.••••
MA780-A Longword Address Charts •••.•••••.•.
MS780-E Longword Address Charts .•.•••.•••••
Internally Interleaved •.•.•.•••.••••••
No Internal Interleaving ••.•.•••.••...
Externally Interleaved •••.•.....•.••••
Converting UNIBUS to Longword Addresses •••.
Converting Longword to UNIBUS Addresses .•••
Converting Physical Byte to UNIBUS Addr ••••
Converting UNIBUS to Physical Byte Adar ••••
DW780 UNIBUS Longword Address Chart ••..••••
DW780 UNIBUS Physical Byte Address Chart .••

1-55

Read Data Substitute Faults and Aborts •.••.••.
MS780A/C Memory RDS Error Indications .••..•
MS780E Memory RDS Error Indications ••.•...•
MA780 Memory RDS Error Indications •.•.••.••

1-54
1-57

1-60
1-60
1-60

1-60
1-61

1-61
1-6-1
1-62

1-64
1-64
1-65

1-66
1-67

1-68
1-68

1-69
1-77
1-81
1-82
1-83
1-83

1-84
1-85
l-86
1-87

1-88
1-89
1-90
1-91

1-92
1-93
1-93

1-93

Micro-code Not Supposed to Get Here Faults ••••
ID Register # 2 0 ............................. .
Micro-PC Wirelist and Slot Chart •••••••••••

1-94
1-95
1-95

CPU Double Error Halts ••••••••••••••••••••••••••••••.•••.•••••
Double Error Halt Error Information •••••••••.•••••••••
CPU Detected Error VALIDITY CHECKS .•••••••••••••••••••
CPU DBLE-ERR HALT Flowchart •••••••••••••••••••••••••••
VAX-11/780 "ID" Register ERROR Information •••••.••••••
Example of DOUBLE ERROR HALT and Hardware Dump ••••••••

1-97
1-99
1-100
1-101
1-105
1-107

Interrupt Stack Not Valid Halts

1-109

Kernel Stack Not Valid Aborts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-113

Other Types of Crashes

1-115

VMS Operating System Hangs •••••••••••••••••••••.••••••••••••••

1-119

Operating System Functional Problems ••••••••••••••••••••••••••

1-123

Operating System Backup or Rebuild Problems .••...••••••.••••••

1-127

Boot i n g Prob 1 ems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , , .,
Power-Up Booting Outline ••••••••••••••••.•••••••••••••
Troubleshooting Booting Problems •.•••••••.••••••••••••
Overview of LSI-11 Subsystem Bootstrapping .•••••••••••
Overview of VAX CPU Bootstrapping •••••••••.•••••••••••

1-131
1-132
1-134
1-136
1-137

Front-End Subsystem Problems ••••••••••••••••••••••••••••••••••
LSI Subsystem Traps •••••••.••••••••••••••••••••••••.••
TRAP Vector Assignments •••.•••••••••••••••••••••••••••
LSI/PDP-11 Trap Catcher Setup Procedure •••••••••••••••
Power Fa i 1 Traps •••..•••••.••••••.•••••.•••••••••••••.
Gathering an LSI Software DUMP ••••••••••••••••••••••••
Analyzing LSI Software Dumps •••••••••..•••••••.•••••••
LSI-Traps Software Dump Analysis Flow c•···············
VAX Front-end Subsystem Q-Bus Address Assignments ••.••
CIB Q-Bus registers Bit Breakdown .••••••••••••••••••••
PDP-11 Instruction Set •.••.••••••••.•.•••••••••.•.••••
PDP-11 Processor Status Word Breakdown ••••••••••••••••
PDP-11 Addressing Mode Description •••.••••.••.••••••••

1-139
1-140
1-141
1-142
1-142
1-143
1-144
1-145
1-146
1-147
1-148
1-149
1-149

Unexplained Reboots and Power Restarts ••.•••••••••••••••••••••
Symptoms of Spurious Reboots and Power Restarts ••••••.
Isolating Problem Area •.••.•.••.••••••••••••••.•••••••
BPOK/BDCOK Connections on KA780 Backplane •••••••••••••
AC/DCLO H7100 Supply Connections to KA780 Backplane •••
Voltage pins on the KA780 Backplane •••••••••••••.•••••
Q-Bus Connectors on KA780 Backplane and Wirelist ••••••

1-151
1-152
1-154
1-155
1-155
1-158
1-159

Problems on Certain Device(s)

1-161

~von' t

1-165

•••••••

Power-Up . • • • . • • • • . • • • . . • • . . . . . • • • • • • • . • • • . • • • • • • • • • • • • • •
v

Something's Burning ••••.•.•..•....•..•.....•.•...•..••.••....•

1-167

Problems Building VMS . . . . . . • . . . . • . . . . . • . . . • . • . . . • . . . . . . . . . . . . .

1-169

Non-Duplicatable, Intermittent and What To Do Now Problems ..•.

1-171

Vibration Testing

1-175

Operating Temperature Change Testing ..•.•..•..•..•.•..........
Heat Testing . . . . . • . • . . . . . . . . . . . . . • . • . . • . . . . . . . . . . . . . . .
Testing By Cooling . . . . . . . . . . . • . . . . • • . . . . . . . . . . . . . . . . . .

1-177
1-178
1-179

Margin Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . • . . • . . . . • . . . . . .
C1 o c k Ma r g i n s • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
Voltage Margins . . . • . . . . . • . . . . . . . • . . • • . . . . . . . . . . . . . . . . .

1-181
1-182
1-182

DW 7 8 0 Errors • . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . .• . . . . . • . . . . . . . . . . .
SBI Parity Fault . . • . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . .
SBI Write Sequence Fault .•.•...•......••.•••...••...•.
SBI Unexoected Read Data Fault . . . . • . . . . . . • . . . . . . . . . . • .
SBI Inte~lock Sequence Fault ...............•.....•••..
SB! Multiple Transmitter Fault ...•.....•........••....
Adapter Power Down .•.•.•..•••....•.•.••......•....•••.
Adapter Power Up . . . . . . . . . . . . . . . • . . . • . . . . . . . . . . . . . . . . . .
UNIBUS Power Down .•...........•..•••.......•.•........
UNIBUS Power Up .•...•............•.....•...•...•....•.
Read Data Substitute . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . .
Corrected Read Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Command Transmit Error . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . .
Command Transmit Timeout . . . . . . . . . . . . . • . . . . . . . . . . . . . . . •
Data Path Parity Error . . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . .
Invalid Map Register . . . • . • . . . . . . . . . . . . . . . . . . . • . . . • . . . .
Map Register Parity Fail ........•.•......•.....•.....•
Lost Error Bit • . . • . . . . . . . . • . . • . . . . . . . . . . . . . . . . . • . . . . . .
UNIBUS Select Timeout ...........•.•••.•..•..........•.
UNIBUS SSYN Timeout ..•....•..•..•........•.....•......
Buffer Transfer Error ............•.•....•.......•.•..•
S.B.I. Faults . . . . . . . . . . • . . . • . • . . . . . . . . . . . . . . . . • . . . . • . . . . . . . . . .
Parity Fault Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Write Sequence Fault Description .••..••....•..•....•..
Unexpected Read Data Fault Description . . . . . . . . . . . . . . . .
Interlock Sequence Fault Description •.....•......•....
Multiple Transmitter Fault •........•..•..•..•..•....•.
Troubleshooting S.B.I. FAULTS •••.........•.......•...•
S.B.I. SILO Interpretation ....••.•...........•..•.....
CONFIGURATION/STATUS Register Interpretation .........•

1-183
1-184
1-184
1-184
1-184
1-184
1-185
1-185
1-185
1-185
1-185
1-185
1-185
1-186
1-186
1-186
1-186
1-186
1-187
1-187
1-187
1-187
1-189
1-190
1-190
1-190
1-190
1-191
1-191
1-193
1-195

Troubleshooting Using the SYSTEM CONTROL BLOCK (SCB) ...•....••
HALTED AT xxxxxxxx . • . . . . . . . . . . . . . . . . • . • . . . . . . . . . . • . . . .
Building and Using a VAX Trap Catcher . . . . . . . . . . . . . . . . .
VMB V4.02 Trap Catcher Generation .•....•.•.........•..
?ILL I/E VEC Errors . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . • . • • •
System Control Block Vector Assignments Chart .••...•..

1-197
1-198
1-199
1-199
1-200
1-201

Read Data Timeout

• . • . • . • • • . . . . . • • . . . . . • • . . . • • • " .. ••••-=;

Section II.

VMS Information

2-1

VMS SYSGEN Error Control Parameters
BUGCHECKFATAL
BUG REBOOT
DUMPBUG

2-2
2-2
2-2
2-2

VMS CRASH HANDLING •••••••••••••••••••••••••••••.••..
Non-Fatal Bugchecks •••••••.•••••••.•••••••••
Fatal Bugchecks in Supervisor and User Mode~
Fatal Bugchecks in Kernel and Executive Modes

2-3
2-3
2-3
2-4

Assigning Addresses and Vectors to UNIBUS Devices •...•••.•••••

2-5

UNIBUS Device Floating Address Table

2-6

UNIBUS Device Floating Vector Table

2-6

SYSGEN Commands ••••••••
LOAD command
CONNECT command
RELOAD command
SHOW/ADAPTER
SHOW/CONFIGURATION
SHOW/DEVICE •••••.•
AUTOCONFIGURE ALL
CONFIGURE command
CONNECT CONSOLE
CREATE command
DISABLE CHECKS
ENABLE CHECKS
EXIT ••••••.•••
INSTALL command
SET/OUTPUT command
SET/STARTUP command
SHARE MPMn command
SHOW parameter command
SET parameter command
SHOW/UNIBUS
USE command
WRITE command

2-7
2-7
2-7
2-8
2-8
2-8
2-8
2-8
2-9
2-9
2-9
2-9
2-10
2-10
2-10
2-10
2-10
2-10
2-10
2-11
2-11
2-11
2-11

Using SYSGEN to determine UNIBUS device Addr/Vec Assignments

2-12

LOCAL CONSOLE Boot Co~mand Files
DB0BOO.CMD
RESTART.CMD
DSC or BACKUP Boot Command File
RESTAR.ILV
RMEM. . ....•.

2-13
2-13
2-14
2-14
2-14
2-14

Vll

Section III.

Special Command Files/Programs •.•••••..•.••..••••.••

3-1

Hardware Dump File Maintenance/Generation •...••••••.•...•.••••

3-2

Version 3.x VMS Dump File Generation

3-3

Version 4.x VMS Dump File Generation

3-5

DUMP. Command File

3-7

HANG. Command File

3-8

SAVEDUMP.COM Command File •••••••.••••••••••••••••.••••••••••.•

3-9

SPEAR BATCH Command File • • . . • • • • • • • • • • . • • . • • • • . . • • . • • • . . • . • • • • 3-11
Spear Batch Control •••......•••.••..••.•••.••.....•••.• 3-12
SDA.COM • • . • • • . . • . • . . • • • . • • • • • • . . . • • . • • . . . . • . • • • . • . • . . • . . . . • . • •

3-13

F P 7 8 0 Co n t r o 1 P r o g r a.m s

••••••••••••••••••••••••••••••••••••••••
FPAOFF.MAR ••••.•••.•••.•...••..••••••••.•••..•..•..•••
FPAON. MAR ••••.•.•••.••..••......••••.•.•••••••..••••.•

3-17
3-18
3-19

VAX-11/780 Basics ..•.••••..•.•.•••.•..•••...•.•.•••.•

4-1

VAX Virtual and Physical Address Space ........•.•..•........•.

4-2

VAX-11/780 General Registers Assignments ......•.•..•.........•

4-3

Subroutine Usage and Operation •••...•...••........•••........•

4-4

Procedure Usage and Operation ....•..•..•.••.•.•.•...•••.•..•..
Entry Mask • • • • • • • • . . • • . . • . • . • . . . • • • • . . . • • • . . . • . . . . . . • •
Argument List • . . • . . . . • • . . . . . . . . • • • • . • • • • . . . . . • . . . . . • . .

4-5
4- 6
4-6

"CALLG" Procedure Call Operation

4-7

"CALLS" Procedure Call Operation

4-7

"RET" Procedure Return Operation

4-9

Procedure Call

(CALLS/CALLG) Notes •.••••..••......••..•.•.••.•

4-10

Return from Procedure (RET) Notes ••••.••..••..•...•.••••..•..•

4-10

Procedure Call Stack Layout •••..•••••.......••.•••.•••...•..••

4-11

VAX-11/780 Native Addressing Modes ....••••..•.•..•...•........
Indexing Mode •.....••...........•..•...•.••.........•.
PC Mode Addressing ••..........•....•...•..•...•.•...•.

4-12
4-14
4-16

Section IV.

Vlll

Section

Buses Used on VAX-11/780 Systems •.•••••••..•••••••••••

5-1

Synchronous Backplane Interconnect •••••.••••••••••••...••..•••
S.B.I. Pin Layout •••...•••••••••••••••••••.•••••••••••
SBI/CPU Time State Equivalents •••••••.••••••••••••••.•
SBI T0 Clock Time • • . • • . • . . . • • • • . . • • • • • • • • • • • • • • • • • • • • •
SBI Tl Clock Time • . • • • . • . • • • • • • • • • • • • • • • • • • • • • • . • • • • • •
SBI ·r2 Clock Time •••...•.•••••••.•.••••••••.•.•••.•.••
SBI T3 Clock Time • • • • • • • • . • • • . • . • . • • • • . • • • • • • • • • • • • • • •

5-3
5-4
5-5
5-5
5-5
5-5
5-5

S.B.I. Write Transfer Example to Show S.B.I. Timing •.•••••••••

5-6

VAX-11/780 Internal Data Bus ••••••••••••••••••••••••••••••••••
Chart Showing Modules Fed by the ID Bus Bits •••••..•••
ID Bus Parity Bits Chart Showing Who Uses Them •.•.••••
ID Bus KA780 Backplane Pin List ••••••••••••.••••••••••

5-7
5-8
5-9
5-9

Section VI.

UNIX Error Reporting .••.••••..•••••••.••.•••••.••••••• 6-1

This section will be added to a future release of this manual.
Section VII. Miscellaneous Information ••••.•..•.•••.••.•••••••••••

7-1

Using EVSBA.EXE, the Diagnostic Autosizer .•••••.••••.•••••••••
EVSBA Autosizer Default Mode Operation ••••.••••.••••••
Autosizer Manual or Self-test Mode Operation ••••.•••••
Autosizer Commands for Manual or Self-test Mode •••••••
Re ad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Size
List

At ta ch ........................................... ..

7-2
7-3
7-3
7-4
7-4
7-4
7-4
7-4
7-4
7-4
7-4
7-4

Standard Performance Error Analysis Reporting •••.••••.••••••••
How to Initiate SPEAR •.•.••••....•••.•••.••.•••.••••••
Summary of Questions asked by SPEAR ••.•.••.••..••••••.

7-5
7-8
7-9

Examining UNIBUS Registers ••••••••...•••••.•••.•••••••••••••••

7-10

LPll Diagnostic Check Under VMS ••••••••••.••..•.•••••••.••••••

7-10

To Restore LPll Queue

7-10

Defining and Starting Print Queues (LPll)

7-11

Defining and Starting Terminal Queues

7-11

"Unexpected UNIBUS Adapter Interrupt"

7-11

He 1 p . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wr it e •••••••••••••••••••••••••••••••••••••••••
Change .••••••...••••.••••.•••.••••••••••••••••
Ex it . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interleaving Memories

7-12

Booting with CACHE Disabled

7-12

H7100 Power Regulator LEDs

7-13

M8232, Clock Board, Jumpers

7-14

LSI-11 Controls and Indicators

7-15

VAX-11/780 Controls and Indicators

7-16

MS780/MA780 Error Correction Logic

7-17

EVKAA. EXE •••••••••••••••••••••••••••••••••••••••••••••••••••••

7-17

SECTION VI I I.

NEXUS Register Bit Definitions

8-1

DW780 Registers .•.••••••••.•..••••••••••••••••••••••••••••••••
Configuration Register
Control Register •••.••
St at us Reg i st er • • • • • • ••
Diagnostic Control Register
Failed MAP Entry Register
Failed UNIBUS Address Register ••••••
Buffer Selection Verification Registers 0-3
BR Receive Vector Registers 4-7
Data Path Register 00-15
MAP Registers 000-495
RH780 Registers

8-3
8-7
8-11
8-17
8-21
8-23
8-25
8-27
8-31
8-35
8-39
8-39
8-43
8-45
8-51
8-53
8-55
8-59
8-61

Configuration/Status Register
Control Register •••••..•.
Status Register •.••••...
Virtual Address Register
Byte Count Register
..•.•••
Diagnostic Register
Selected MAP Register
Command/Address Register

8-63

MS780-E Registers
Configuration
Configuration
Configuration
Configuration

8-3

........
.......

......

8-63
8-67
8-71
8-73

P R E F A C E

This Trouble-shooting Manual was written as an aid to D.E.C. Field
Service Engineers for VAX-11/780 System problems.
This outline is not intended to tell you what module to replace,
but instead, is meant to lead you in the right direction. It is
assumed that you are familiar with at least the following:
1.

2.
3.

VAX-11/780 Processor
a. Understand CONSOL.SYS command language.
b. Know Physical and Electrical Configurations.
c. Know HEX.
d. Can examine/deposit Memory,I/O Regs.,and ID Regs.
VMS Booting
a. Know how to boot.
b. Have a basic understanding how boot is done.
Basic use of VMS such as:
a. Able to login.
b. Able to run "SYE" or "SPEAR".
c. Able to use an editor.
Know how to run all VAX-11/780 Diagnostics.

Often times referen\.e is made to "DUMP., HANG., & SDA.COM" command
files within this outline. These files are files that I ha~e written
to do specific functions. You can use the files I have written or you
can create similiar files yourself. I have also written s.everal VMS
DCL command files that are meant to aid D.E.C. Field Service in doing
certain time-consuming functions.
The "DUMP. and HANG." command files are CONSOL.SYS command files that
should be generated by D.E.C. Field Service and placed on the "LOCAL
CONSOLE Floppy". The purpose of these two command files are as
follows:
DUMP.
Is a command file that dumps all the Hardware Register contents to
the Console Terminale This coro.mand file is executed as an indirect
command file from CONSOL.SYS. The purpose of this command file is to
provide D.E.C. Field Service with additional trouble-shooting
information concerning crashes that bring the software down and
control is passed back to the CONSOL.SYS program.
HANG.
Is a command file that dumps all the Hardware Register contents, a few
PC's during single step mode (to determine Hung loop), and then

I I.

initiates the "CRASH." Local Console Floppy command file so that a
Software Dump will be taken. The purpose of this command file is to
provide D.E.C. Field Service with additional trouble-shooting
information concerning system software hangs.
SDA.COM
The "SDA.COM" file is a VMS DCL command file that creates an output
file that contains basic information taken from a specified Software
Dump file. This file should be used, by you, when you are gathering
information about a Software Dump to take back to your Support
Group.
SAVEDUMP.COM
It is very inportant for the Customer to save the Software Dump file,
"SYS$SYSTEM:SYSDUMP.DMP", every time the system is rebooted due to an
Operating System crash. The easiest way to assure thai this happens
on every crash is to put the appropriate commands, to do the save, in
the "SYS$SYSROOT:[SYSMGR]SYSTARTUP.COM" command file. I have generated
a command file that the Customer can execute from the SYSTARTUP command
file that will save the SYSDUMP.DMP file in the area that the Customer
specifies. This command file, SAVEDUMP.COM, will name the saved file
with a name that specifies the date and time of the reboot, after the
crash. By using. SAVEDUMP.COM, it is much easier to match Software
Dumps to the appropriate crash.
This GUIDE references two handbooks extensively. These handbooks
should always accompany you when you are working on a VAX-11/780
System. These handbooks are:
VAX Maintenance Handbook, VAX Systems
VAX Maintenance Handbook, VAX-11/780

#EK-VAXVl-HB-???
#EK-VAXV2-HB-???

Any suggestions as to how to improve this manual will be appreciated.
Roy D. Fulton
D.E.C. Field Service

Xll

SECTION Description
*******************

SECTION I of this manual is the actual "VAX-11/780 Trouble-Shooting"
Outline. This section should be used as a guideline as to how to
attack VAX-11/780 System problems.

SECTION II of this manual contains information about the VMS Operating
System, the Command files used to boot VMS, SYSGEN commands, Unibus
autoconf iguration requirements, etc.

SECTION III of this manual contains information concerning special
command files and special programs.

SECTION IV of this manual contains information on VAX Architecture
that may be needed as a reference while trouble-shooting.

SECTION V of this manual contains information about the different
buses used on the VAX-11/780 systems.

SECTION VI of this manual contains information about the UNIX
Operating System errors.

SECTION VII of this manual contains miscellaneous tidbits of
information.
SECTION VIII of this manual contains the defintions of the bits
in the NEXUS registers. The definitions for the CPU's registers
are contained in the VAX Maintenance Handbook for the VAX-11/780.
This section was copied from various VAX-11/780 Nexus Hardware
manuals and microfiche.

Xlll

T R 0 U B L E - S H 0 0 T I N G

A P P R 0 A C H

**************************************************

Trouble-Shooting Approach
*************************
The following pages are an Outline as to some of the things that you
should do for certain types of VAX-11/780 problems. It is assumed
that you will use a sound trouble-shooting approach to fixing the
problem. The following Trouble-Shooting Method is a proven
approach that can be tailored to every situation.
The correct steps to take in trouble-shooting are:
1.

RESEARCH and DEFINE the PROBLEM.
The problem should be diagnosed to a certain type of
problem that happens under certain types of conditions.
This must be done so that you will be able to recognize the
problem on the next failure even though it may not exhibit
exactly the same symptoms on the next failure.
The Definition of the Problem does not necessarily identify
the failing unit or subsystem, but simply describes the problem
symptoms.
Do not proceed to the next step until this is accomplished.
Enter all error symptoms in the Log book.

VENTURE a Testable EDUCATED GUESS as to the PROBLEM AREA.
From the information examined in step #1, make an educated
guess as to where within the VAX-11/780 SYSTEM the problem
lies. In other words, what subsystem or unit do you believe
the failure to be in based on past experience, training, and
the failure data information examined.
If you are not able to make an educated guess at this time,
it may be necessary to either wait for another failure in order
to obtain more information, and/or you may need to ask your
sources for aid in diagnosis.

xu1

If unable to do this step, be sure that error information
catching facilities are in place, wait for another failure,
and then go back to step #1. The error catching facilities
you· may want to implement for the VAX-11/780 SYSTEM may be
as fallows:
a.

Set the SYSGEN parameter "BUGREBOOT" to a
"0", so that a Hardware Register Dump may be
taken at failure time.

Set the SYSGEN parameter "DUMPBUG" to a "l", so
that the Software Dump will be taken.

Set the SYSGEN parameter "BUGCHECKFATAL" to a
"l", so that NON-FATAL Bugchecks will be
treated as Fatal Bugchecks. You probably don't
want to do this without also setting "BUGREBOOT"
to a "0 n.

Education of customer as to how to dump the
Hardware Registers.

Making sure that the Customer's SYSTARTUP.COM file
saves the Software Dumps or at least make sure that
the Customer has Software Dump Saving procedures in
place.

An Error Log report should be taken, and available
on Hardcopy, of the time prior to and at time of
the failure(s).

Be sure you enter into the Log Book what your evaluation is and
anything else you may have done.
3.

SET-UP an TEST CASE in order to isolate the PROBLEM.
Using your knowledge of the system, past experience, and your
Support resources (if you need them), make a decision as to
what area of Hardware or Software should be replaced or
swapped first. This replacement or swapping should be done
in a educated manner.
DO NOT swap or replace parts within the believed problem
area in a haphazard manner. You should be able to pick out
the most suspectable area.

xvn

Once you have decided what_parts to replace or swap, MARK in
a CLEAR easily defined METHOD each part that will be used
in the test case in such a way that you and your counterparts
will readily be able to determine the following:
a.

The ORIGINAL SOURCE of EACH UNIT involved in the
test case swap or replacement.

The DATE and TIME of the SWAP or REPLACEMENT of
EACH UNIT involved in the test case.

This may be accomplished by either tagging the appropriate
units or by marking each unit with a different marking and
then entering the appropriate information in the SYSTEM's
LOG Book by referencing these markings. This is VERY
IMPORTANT.

PREDICT the RESULTS of the TEST CASE.
Make an educated prediction as to what the results of the
test case will be. In other words, if you swapped a couple
of units within the SYSTEM or DEVICE, what type of failure
do you suspect will happen if the expected failing unit does
indeed fail again.
It is very important that this information be recorded in the
SYSTEM's LOG Book, so that you and your counterparts will know
what to suspect upon the next failure.

CONDUCT the TEST CASE.
Perform the appropriate changes in order to conduct the
test case as planned. Be sure to log everything in the
SYSTEM'S LOG Book.

xvm

EVALUATE the DEFINITION of the PROBLEM upon the NEXT FAILURE.
Now that you have more informatron to work with, does this
failure still fit under the first definition of the problem?
If it doesn't, then proceed according to the following:
a.

Is there more than one problem? If there is more
than one problem, each should be researched,
defined, tested, etc., separately.
Be sure to label all failure information so that
you will know what information goes with what
failure.

Has another problem been introduced as a result of
units used in the test case? One of the units
that you inserted into the SYSTEM may have gone
bad. If so, then you will have to evaluate
whether to insert another new unit and wait for
another failure or should you just replace the
original and conduct another test case.

If it does fit under the same definition, continue to step #7.

RESEARCH and REFINE the DEFINITION of the PROBLEM.
After each failure, it may be necessary to redefine the problem
or to refine.the definition of the problem due to the contents
of the problem's dumps. Refine the problems definition at this
point based on past experience, knowledge of the failing unit,
input from your Support resources, and the added problem
failure information taken at the last failure.
In other words, you may be able to give a better definition to
the problem, at this point in time, that will make it easier to
determine where the problem lies and easier to determine when
it is fixed. Be sure to enter this information in the SYSTEM's
LOG Book.
Be sure to enter into the Log Book exactly how each failure
occurs and exhibits itself.

XlX

RETURN NON-FAILING UNITS to their ORIGINAL POSITIONS.
It is very important to return the non-failing units, moved
as a result of the test case, to their original positions
as soon as the test case is completed.
This should be recorded in the SYSTEM's LOG Book in order to
prevent confusion in the future.
This step is probably the most often ignored step even though
it is one of the most important steps.

REPLACE FAILING UNITS with SPARES.
Replace the failing units with spares. Since step #8 was done,
the new unit (a spare) should be going into the ORIGINAL
position of the failing unit.
This information should be recorded in the SYSTEM LOG Book, and
an entry should be made on the appropriate DEVICE's LOG Sheet.

10.

REPEAT UNTIL the PROBLEM is SOLVED.
Repeat steps 2 thru 9 until the problem is solved.
When the Problem is declared solved should be a predetermined
period of time after the last failure. This time must be
mutually agreeable between D.E.C. Field Service and the
Customer. The determination of how long the system must run,
without the defined problem happening, should be primarily
based upon two things. They are:
a.

The T.B.F. (time-between-failures).

The minimum run time that the customer would
feel comfortable with.

The elapsed time period before the problem is declared solved
should be no less than twice the longest time between failures,
and should be equal to or greater that the customer required
time.

S Y S T E M

L 0 G

B 0 0 K S

*********************************

XXl

Log Book maintenance is a very important part of SYSTEM troubleshooting. The keeping of a Log book is not just the Site
Representative's duty but is the duty of every person that goes
onsite to fix any problem. Every time you are onsite, anywhere,
you should not consider the call complete until the System's LOG
book has been filled out giving a detailed description of everything
that has expired during your visit.
When properly used, a System Log Book will:
1.

Stop UNNEEDED CONFUSION about the status of
the SYSTEM, what was replaced when, what is
expected to happen, what to do next if a certain
event happens, if a certain event doesn't reoccur, etc.

Provide SYSTEM History information.

Provide DEVICE History information.

Provide updated SYSTEM Configuration information.

Provide an Intermittent Problem Action Plan.

Provide SYSTEM and DEVICE PM Status.

Provide SYSTEM and DEVICE diagnostic Run sheets.

Provide a means of passing information from one
D.E.C. Field Service Engineer to another.

Provide a means of obtaining SYSTEM uptime information.

10. Provide specific SITE Dependent information such as
where the Diagnostics are kept, where the Prints are kept,
what test to run, special security considerations, specific
site dependent information, etc.
Every little tidbit of information about a problem should be entered
into the Log Book. These tidbits may seem unimportant to you now, but
may become valuable bits of information later on.
It is your duty to help maintain an accurate log book for each
system that you work on, every time you are on site.

xx ii

S 0 U R C E S

I N F 0 R MA T i 0 N

*******************************************

XXlll

At times you may need some help in Problem Diagnosis, Repair, ECO
information, Diagnostic information, and etc. A list of resources that
you can use is listed below:
1.

Your fellow workers in your Branch.
This is an important resource. If you know someone
in your group that probably knows the answer to your
question(s), don't be afraid to ask for their help.
Working together in this way also helps to build morale
within a group.

Your Remote Support and local Support Groups.

The Remote Diagnosis Center, (RDC),in Colorado.
RDC can :

Run Diagnostics.
Examine VMS Dumps.
Answer ECO problems.
Look up information in the Library.
Answer functional questions.
Run/Monitor extended testing.

Be aware that the RDC now has a library of all
kinds of information. When you call RDC, they
will ask you your SYSTEM TYPE, at this point
ask for the LIBRARY.
4.

If vou know ANYONE in D.E.C. that orobablv knows the answer
to your question, feel free to cali and ask. We, all D.E.C.
employees, owe our jobs to our Customers. Therefore, there
is no reason why anyone in D.E.C. should refuse to answer a
question for you if they know the answer.

XXIV

MA I N T A I N I N G

C 0 N T R 0 L

***************************************

xxv

This is probably the most misunderstood and abused concept of
trouble-shooting basics, but it is of the utmost importance that
the Field Service Engineer MAINTAINS CONTROL of the SITUATION at
ALL times. This manual will not do you any good if you do not
have the control needed to perform the steps specified. In order
to fix Customer Problems quickly and efficiently, you must:
1.
2.
3.
4.
5.

Be able to MAINTAIN CONTROL at all times.
Have good CUSTOMER RELATION SKILLS.
Have a sound TROUBLE-SHOOTING APPROACH.
Have the ABILITY TO BE SYMPATHATIC towards the
CUSTOMER'S BUSINESS NEEDS.
Have KNOWLEDGE of the hardware and software.

What is meant by Maintaining Control as related to trouble-shooting?
Maintaining Control simply means that you, a D.E.C. Field Service
Engineer that is attempting to fix a Customer's problem, must at all
times approach the problem with you in command of the situation. This
simply means that you make the decisions as to what to do, when to do
it, and how to do it, while carefully considering the Customer's
business· needs (all your decisions must remain within the Problem
Manager's guidelines). You must maintain control while also making
sure that your decisions will impact the Customer's business as little
as possible.
Loosing control, more often than not, causes longer overall downtime
for the Customer and also causes you to start to loose confidence in
your ability to do your job properly. Your job is to fix the
Customer's problem(s) as soon as possible while affecting his/her
business as little as possible. If you do not Maintain Control of the
situation, you obviously cannot perform your job properly.
If at any time you feel that you are starting to loose control,
immediately contact your management and get them involved. DO NOT
allow yourself to loose complete control before contacting your
management. Everyone needs help occassionally. Don't let your
pride prevent you from doing what is best for the Customer and D.E.C ..
The amount your decisions impact the Customer's business needs must
always be considered carefully. Sometimes it makes more sense to take
the System for an extended period of time, in order to reduce the
total overall time spent repairing the Customer's problem.

XXVl

Maintaining Control does not mean that you make your decisions without
the Customer's input. One of the first steps you should always do when
trouble-shooting a problem, is to gather as much information about the
problem as possible. The first source of information about the problem
comes from the Customer. The Customer may even have an idea about
what is causing the problem. You should listen to everything that the
Customer has to say. This does not mean that you base your
trouble-shooting totally on the information received from the Customer.
Research the problem thoroughly before jumping in and replacing things.
You must also use input from the Customer when you are weighing what
you want to do·with how it will affect the Customer's business.

It is of the utmost importance not to abuse your control. Abuse of
control can only result in a poor D.E.C./Customer relationship. You
must maintain good D.E.C./Customer relations and supply the Customer
with the best service possible within the guidelines of the Customer's
Contract.

SUMMARY
Your goal is to fix the Customer's problem, in the shortest length of
time, while maintaining complete control of the situation, and while
constantly evaluating your decisions with respect to the Customer's
needs, concerns, and Contract Coverage.
Keep in mind the following:
1.

Maintain Control of the situation.

Always weigh your decisions with respect to the
following:
a.
b.
c.

Customer's Business needs and concerns.
D.E.C.'s Contract Obligations to the Customer.
Is this the quickest approach to fixing the
problem?

Maintain good D.E.C./Customer relations.

Always be CONSIDERATE, TRUTHFUL, and FAIR.

XXVll

SECTION

VAX-11I780 Trouble-Shooting Outline

VAX-11/780 Trouble-Shooting Basics
This outline is designed to aid you in isolating problems to either the
Memory, the VAX-11/780 CPU, the VAX-11/780 Front-end Subsystem, a VAX-11/780
Nexus, a Peripheral Device or to Software. Peripheral Devices will only be
covered in general while the VAX CPU, the MEMORY, and the NEXUSes will be
covered more thoroughly.

An UNDEFINED PROBLEM exists. The problem is undefined until "YOU" make
an educated guess as to where the problem probably lies.

GATHER all INFORMATION, from the Customer, that is available about the
problem and its symptoms. At this point in time, you are not
evaluating the problem but are merely gathering information that you
can evaluate later. Keep an open mind, don't let any tidbit of
information pass you by. Many problems could have been solved sooner
if the Field Engineer had remembered seemingly insignificant tidbits
of information that may appear unrelated to the problem. Be sure to
record as much Symptom information as possible in the "LOG Book".
a.

How is the problem exhibited?
1.

This is found by talking to the Customer. Be
sure to record this information in the "LOG Book".

Is the problem intermittent or a solid problem?

Can the problem be recreated at will?

What is the MTBF (mean time between failures)?

Does the problem seem to be related to only one or
only a group of functions or programs?

If it is a program that causes the problem, is this
a customer program or a D.E.C. supported program?

Is there anything common about the problem in either
software or hardware?

Did any System Environmental changes take place
previous to or at time of the problem?

Does the problem appear to be, or could the problem
be, media related?

1-2

What is the customer's evaluation of the problem?
1.

Is there a hard copy printout showing the problem symptom?
If the Operating System crashed or hung, what you want is
the Console Terminal output at the time of the failure.
1.

If a "Hard Copy Printout" is available, ask the
customer for it.

Was a "Hardware Register Dump" taken at failure time?
1.

Does the customer believe the problem to be in
a certain area of the hardware or software? Be
sure to record this information in the "LOG Book".

If the software crashed or hung, the customer should
have taken a "Hardware Register Dump" (by using the
"DUMP. or HANG." command file on the "LOCAL CONSOLE"
floppy) immediately at time of failure. Ask for this
dump.

Was a "Software Dump" taken and saved?
1.

If the software crashed a software dump should have
occurred automatically as a result of _the Operating
System executing its crash routine (if SYSGEN parameter
DUMPBUG=l). The dump should have been saved by the
Customer when the system was rebooted. Ask the Customer
for the "DDCU:[DIRECTORY]FILENAME.EXT" of the "SAVED
SOFTWARE DUMP".

3. Get an ERROR LOG REPORT if possible at time of and prior to failure.
If the problem is of the type that allows the Operating System to
run, or is a problem that intermittently crashes the Operating System,
attempt to get an "ERROR LOG" report by running either "SPEAR" or
"SYE". Have the output go to a file, and then print that file.
If you are running SPEAR, use the "SPEAR Analyze" function to analyze
the errors prior to the crash. It may be necessary to do a full
retrieve of all information. In some cases it may not be possible to
do Error Log reporting at this time. In those cases, it is wise to run
Error Log reporting as soon as the system is functional enough to do
so. Operating System Error Logging is a great aid to trouble-shooting,
use it whenever possible. The VAX Error logging utility is very good.

1-3

IDENTIFY the TYPE of PROBLEM if possible. Now that you have gathered
as much information as you can about the problem, find a desk or table
somewhere where you can sit down and attempt to "Isolate the Problem".
The first step in problem isolation, is to determine the "Type of
Problem".
VAX-11/780 Problems can be broken down into several basic types:
1.

Operating System Crashes or Bugchecks.
(This includes "Machine Checks" & "CPU DBLE-ERR HLT's")

Operating System Hangs.

Operating System Functional Problems.

Operating System Backup Problems.

Booting Problems.

Front-end Subsystem goes back to ODT, Hangs, Halts.

Unexplained Reboots or Power Restarts.

Problems on a Certain Device or Devices.

System or Peripheral Device won't Power-Up.

10.

Something's Burning.

11.

Problems Building the VMS Operating System.

12.

Error Bits set in a NEXUS (DW780, RH780, etc.)

13.

S.B.I. FAULTS

Determine which of the above types the problem fits under and then
go to the outline for that problem type. Every problem should
fit under one of these problem types.

1-4

VAX-11I780 System Trouble-Shooting tools:
Visual and Sensual Indications
a. LSI-11 Front panel indicators - DCON, RUN
b. VAX-11/780 Control panel indicators - ATTN, RUN, POWER
c. H7100 status indicators
Power Normal, Regulator Failure, Overtemp,
Overcurrent, & Power Inverter Failure
d. Smoke, fire, heat, burning smell
Registers
a.

b.
c.
d.

The CPU ID <00:3E> registers
E/ID/L/N:3E 0
The Control/Status registers in each nexus
E/L/P/N:x 200xx000 - for each nexus
The Control/Status registers in each UNIBUS device
E/L/P/N:x 20lxxxxx - for each UNIBUS device
The Control/Status registers in each MASSBUS device
E/L/P/N:x 200xx400 - for each MASSBUS drive

Console Terminal Messages
a. LSI-11 ODT error messages
xxxxxx
<- PC at time of LSI macro program halt
@
<- LSI ODT prompt
b. Error messages from CONSOL.SYS
? xxxxxxxxxxxxxxxx
>>>

Error messages from the OPERATING SYSTEM (VMS/UNIX)
<- From VMS. Is followed by
FATAL BUGCHECK
a General register dump, Stack
dump and a description of error.
Error messages from other programs

User Terminal Messages
a. Error messages from the OPERATING SYSTEM .(VMS/UNIX)
b. Error messages from other programs
Error Log Information
a. "ERRLOG.SYS" for the VMS operating system
in SYS$ERRORLOG:ERRLOG.SYS
b. "/messages" file for the UNIX operating system
System Manager I User Input
a. System Manager/User definition of the problem
b. System Manager/User feelings of problem area
c. Any customer known or initiated changes to system
System History
a. Past failure/repair history of the system
b. ECO status of the system
c. System configuration changes
d. Software changes
e. PM history
f. Enviromental Changes

1-5

VMS Operating System Crashes or Bugchecks

Due to the nature of these types of problems and the Software decisions
that are made, the System may not be down when you arrive onsite. For this
reason, these flows will not specify when to run diagnostics. If the
Operating System is operative when you arrive onsite, it is probably best
to gather the listed information about the crash and attempt to at least
make a preliminary diagnosis before taking the system to run diagnostics.
This preliminary diagnosis should point you to an area or subsystem on
which to start running diagnostics.
In order to trouble-shoot these types of problems, it is necessary to gather
as much information about the crash as possible. The amount of information
that you will be able to gather will depend upon how the system is set up.
Procedures to gather the following types of information should have been
setup previous to the crash:
1. Doing a HARDWARE REGISTER DUMP.
2. SYSGEN parameter DUMPBUG set to a 1 so as to get a SOFTWARE dump.
3. Saving of SOFTWARE dumps on reboots.
4. Saving of Errlog (EVENT file) information.
5. Saving of the Console Terminal output (on hardcopy).
6. Accurate LOG BOOK information concerning all activity on the system.
"It is IMPOSSIBLE to gather TOO MUCH information about a problem."
In order to gather the Hardware Register Dumps, certain modifications to the
LOCAL/REMOTE CONSOLE FLOPPY should be made. A "DUMP." and "HANG." command
file should be created that is tailored to the associated system (see the
procedures in Chapter 3 of this manual). It is possible to get all the
Hardware Register information needed by using these two command files, but
the customer must run the system with SYSGEN parameter BUGREBOOT = 0 and
the AUTO-RESTART switch OFF. Then when the system crashes, you or the
customer must take the dump by initiating either the "DUMP." or "HANG."
CONSOL.SYS command file prior to rebooting of the system. This method
is usually not desirable from the customer's standpoint of trying to have
the system up as much as possible. A better method is to add the commands
in the "DUMP." command file to the front of the "DEFBOO.CMD" & "RESTAR.CMD"
command files on the LOCAL/REMOTE CONSOLE Floppy. This will allow the
customer to run with AUTO-RESTART set ON and the SYSGEN parameter BUGREBOOT
set to a 1, and the Hardware Register dump will automatically be taken prio~
to the system rebooting.
On these crashes, the Hardware Register Dump may not reflect the
same ID register contents as were present at the actual time of the error
due to VMS not halting immediately (several things are done prior to VMS
halting, one of which is the writing of the Software Dump). The Hardware
Register Dump may show some Device· or Nexus errors though. It is always
better to have extra information rather than not enough, so take the
HARDWARE REGISTER DUMP whenever possible.
The ERRLOG.SYS file should be examined, whenever possible, to see if the
Operating System was able to log any error information that may be causing
the crashes. The VAX VMS "System Event File (ERRLOG.SYS)" is a very useful
trouble-shooting tool that is very often overlooked. Many times the
Fatal Bugchecks are caused by something that is logged in ERRLOG.SYS just
prior to the crash.

1-6

There are many different types of "FATAL and/or NON-FATAL BUGCHECKS".
BUGCHECKS can either be caused by Hardware errors or Software detected
error conditions. The SOFTWARE detected errors "may notn be caused by
any hardware failures.
Whether a BUGCHECK is declared "FATAL or NON-FATAL" depends upon what
"MODE" the processors is in when the error occured. B"asical.ly, a
"Non-Fatal Bugcheck" is a Bugcheck that has occured while the processor
is in either the "USER" or "SUPERVISOR" mode. A "Fatal Bugcheck" is one
that has occured while the processor is in either the "EXEC" or "KERNEL"
mode. Chapter 2, of this manual, describes Fatal and Non-Fatal Bugcheck
action.
The easiest of the Bugchecks to trouble-shoot is the MACHINE CHECKS. This
is due to a specific logout procedure that the VAX-11/780 CPU microcode
goes through to insure that you have the needed error information stored
on the stack. Fatal Machine Check Bugchecks will print out the stack
information on the console terminal. This is usually all the information
that you need to trouble-shoot this type of bugcheck. Non-Fatal Machine
Check Bugchecks will cause VMS to store the stack information in the
system event file (ERRLOG.SYS). All of the other types of BUGCHECKS require
a software knowledge to affectively trouble-shoot them since these errors
usually are not the result of some hardware detected error but due to
softwares detection of a problem. Therefore, you.would probably have to
know what the system software was attempting to do in order to effectively
trouble-shoot them.

1-7

* FATAL BUGCHECK, VERSION-V3.l MACHINECHK, Machine check while in kernel mode *

MACHINE

MACHINE
MACHINE

CHECKs

CHECKs
CHECKs

MACHINE

CHECKs

MACHINE

CHECKs

MACHINE
MACHINE

CHECKs
CHECKs

?? MACHINE CHECK EXCEPTION THROUGH VECTOR: 04(X)

1-9

VAX-11/780 MACHINE CHECK Error Logout
A Machine Check Exception indicates that the processor detected an
INTERNAL ERROR in itself, an SBI TIMEOUT, or an SBI ERROR CONFIRMATION is
received when the processor was attempted an SBI transfer. Software
decides, on the basis of the logout information presented, whether to abort
the current process or simply to continue.
The following steps show the basics of what happens when the VAX-11/780
CPU detects an error.
1.

The VAX-11/780 CPU detects an error.
The types of errors that can cause a Machine Check are:
a.
b.
c.
d.
e.
f.

g.
2.

Control Store Parity Error
Cache Parity Error
Translation Buffer Parity Error
Read Data Substitute Error
SBI Read Timeout
SBI Error Confirmation received
VAX CPU Micro-code goes to unused Micro-code location
'

The VAX-11/780 Micro-code branches to a "Error Snapshot" micro-code
routine that performs the saving of the "Machine Check Logout"
information onto a specified Stack.
MicroPC Error entry points for PCS (version 1.0) microcode
uPC
uPC
uPC
uPC
uPC
uPC

OlOF
0107
0108
OlOC
OlOD
OEEO

Control Store Parity Error
Translation Buffer Parity Error
Cache Parity Error
Read Data Substitute
S.B.I. Read Timeout or Error Confirmation
Microseqencer Error

The VAX-11/780 Micro-code saves certain CPU registers in TO thru
T9 (ID #30 thru 39) for temporary storage. These registers, along
with the PSL, PC and a byte count, make up the "Machine Check
Logout" information. The Registers that are saved are:
a.
b.
c.
d.
e.
f.
g.
h.
i.
j.

The CPU Error Status Register (CES = ID #OC)
The Trapped UPC Register (USTACK = ID #20)
The VA/VIBA (from the VA/VAMX multiplexers)
The D-Register (DQ = ID #08)
The TB Error Register #0 (TB ERR #0 = ID #12)
The TB Error Register #1 (TB ERR #1 = ID #13)
The Timeout Address Register (TIME.ADR = ID #lA)
The Cache Parity Error Register (PARITY = ID #lE)
The SBI Error Register (SBI.ERR = ID #19)
The D.SV Register (D.SV = ID #2E)

1-10

This data is first stored in TO thru T9, in the following order,
on execution. of the micro-words at the specified PCS (version 1.0)
micro-addresses:
UPC

ID No.

Saved in

OEFl

CPU Error Status
Trapped Micro-PC
VA/VI BA
D Register
TB Error Register 0
TB Error Register l
Timeout Address
Cache Parity Register
S.B.I. Error Register
Summary Parameter

Tl T2 T3 T4 TS T6 T7 TS T9 TO -

OEF~

OEF4
OEF5
OEF8
OEFB
OEFC
OFOl
OF03
OF06

12
13

lA
lE
19

ID#31
ID#32
ID#33
ID#34
ID#35
ID#36
ID#37
ID#38
ID#39
ID#30

Then this MACHINE CHECK logout information is stored onto the
stack, along with the PC and PSL.

This two step procedure is used in order to preserve 1st error
information in the case of another error occuring while the
micro-code is attempting to logout the 1st error's information
onto the stack.
PCS (Version l;O) micro-code entry points

uPC OEE9

"Error Snapshot micro-routine" that stores certain
registers in the TO-T9 temporary registers.

uPC OFlO

"Error Snapshot micro-routine" that stores the
Temporary registers (T0:9) onto the stack along with
the PC, PSL, and a Byte Count longword equal to a
hex 00000028.

The VAX-11/780 Micro-code gets the SCBB data to be used to find
the physical address of the "MACHINE CHECK VECTOR". The SCBB
is a register (ID #3B) that contains the starting address of the
System Control Block (SCB).
The System Control Block is the physical page in memory that
contains the Exception and Interrupt Vectors.

1-11

Bits <1:0> of the data in "SCBB+4" are checked, by the Micro-code,
to determine what Stack to use for the Machine Check Logout
information storage, or to see if the CPU should halt.
The Kernel Stack or the Interrupt Stack can be used as the storage
place for the Machine Check Logout information.

The VAX-11/780 Micro-code saves the Machine Check Logout
information onto the Stack specified by "SCBB+4" bits <1:0>, or
will halt if these bits are both l's (<1:0>=3). If the VAX CPU
halts, control will pass back to the CONSOL.SYS program.
The Machine Check Logout information consists of the Saved Register
contents that were saved in Temporary Storage registers ID #30-39,
the PC and PSL at the time of the error, and a byte count that
specifies the total number of bytes dumped on the stack (which
is "always" a hexadecimal 28 or decimal 40).

The VAX-11/780 Micro-code causes the Instruction Set Processor to
jump to the routine whose Longword address is in-"SCBB+4" if
"SCBB+4 Bits <1:0>" is not equal to 3. If "SCBB+4 Bits <1:0>=3"
then the VAX Instruction Set Processor is halted.

If "SCBB+4 Bits <1:0>" are not equal to 3, the VAX-11/780
Instruction Set Processor runs VAX Macro instructions to perform
the specified trap routine.
What is done in this routine depends totally on the running
Macro-code program. When a Machine Check occurs while running the
VMS Operating System, the Macro Routine that is run now will
determine whether the Machine Check is FATAL or NON-FATAL and
will act accordingly. When a Machine Check occurs while running
the Diagnostic Supervisor, the Macro Routine that is run now will
normally print out the STACK contents and then go back to the
"OS>" prompt and await operator input. Other software may simply
halt when the Machine Check occurs. Still other software may not
properly set up a "SYSTEM CONTROL BLOCK" and all sorts of strange
things may happen.

NOTE:

If another Machine Check condition occurs while the microcode
is performing the functions in steps 2 thru 6, the VAX
microcode flags a "Double Error Halt" and turns control over
to the LSI Subsystem's CONSOL.SYS program.

1-12

VMS Fatal Bugcheck printout example caused by a Machine Check

*** FATAL BUGCHECK, VERSION-V3.l MACHINECHK, Machine check while in kernel mode
CURRENT PROCESS = STARTUP
REGISTER DUMP
RO = 00000206
Rl = 00000028
0000792E
R2
R3 = 00000000
R4 = 0000792E
RS = 0000021E
R6 = 80027600
R7 = 00002768
R8 = 80137300
R9 = OOOOC768
RlO= 000015F8
Rll= 80137300
AP = 7FFB4888
FP = 7FFEADA8
SP = 80154FC4
PC = 800CF411
PSL= 041F0008
KERNEL/INTERRUPT STACK
00000028
80154FCC
00000000
80154FDO
00010084
80154FD4
00000224
80154FD8
80027Al8
80154FDC
03FB5E6C
80154FEO
00007E81
80154FE4
80154FE8
00000040
28005106
80154FEC
00004000
80154FFO
80154FF4
00009402
00002C4D
80154FF8
OODFOOOO
80154FFC
HALT INST EXECUTED
HALTED AT 800039ED
(BOOTING)
CPU HALTED
INIT SEQ DONE
HALT INST EXECUTED
HALTED AT 200034F9
G OOOOOOOE 00000200
LOAD DONE, 00004200 BYTES LOADED
VAX/VMS Version V3.l ll-AUG-1982 16:21

1-13

Example of a Machine Check while running ESSAA

DS> RUN EVRAA
•. Program: VAX DISK AND TU58 RELIABILITY TESTS *EVRAA*, revision 12.0,
6 tests, at 07:19:26.94.
Testing: _DRBl
?? MACHINE CHECK EXCEPTION THROUGH VECTOR: 04(X)
CP READ TIMEOUT/SB! ERROR CONFIRMATION FAULT

MACHINE CHECK LOGOUT:
COUNT:
SUMMARY PARAMETER:
CPU ERROR STATUS:

00000028(X)
OOOOOOOO(X)
00010084(X)

TRAPPED MICRO PC:
VA/VI BA:
D REGISTER:
TBERO:

00000248(X)
60014008(X)
0504A056(X)
00007EOO(X)

TBERl:
TIME.ADDR:

00000040(X}
28005002(X)

PARITY:
SBI. ERR:

00004000(X)
00009402(X)

PC at error:
PSL at error:
User return PC:
OS>

00051649(X)
OOlFOOOO(X)
0001A40D(X)

i-14

;NESTED ERROR, ALU C31

'
;LAST
REFERENCE = ADS,MCTE,MCT2
MCTl,MCTO,IBWCHK
;FORCE TB PARITY ERROR=NO ERROR
FORCED
;LAST TB WRP
;MODE=KERNEL,PROT CHECK, SBI AD
DR=20014008(X)
;CP ERROR
;RDS INT EN,CP TO, CP TO STO,
NOT BUSY
;CUR=KERNEL,PRV=KERNEL,IPL=lF

Breakdown of a VMS Machine Check printout example.

*** FATAL BUGCHECK, VERSION-V3.l MACHINECHK, Machine check while in kernel mode
CURRENT PROCESS
REGISTER DUMP
RO = 00000206
Rl
00000028
R2 = 0000792E
R3 = 00000000
R4 = 0000792E
RS = 0000021E
80027600
R6
R7 = 00002768
RS = 80137300
R9 = OOOOC768
RlO= 000015F8
Rll= 80137300
AP = 7FFB4888
FP = 7FFEADA8
SP = 80154FC4
PC = 800CF4ll
PSL= 041F0008

I
Specifies type of BUGCHECK. This
breakdown defines the meaning of this
printout when the BUGHECK type is a
"Machine Check".

STARTUP

<-I
I

This register dump isn't of much use to us if
the BUGCHECK is a "Machine Check". Is useful
for other types of BUGCHECKs.

KERNEL/INTERRUPT STACK
00000028
80154FCC
80154FDO
00000000
00010084
80154FD4
00000224
80154FD8
80154FDC
80027Al8
03FB5E6C
80154FEO
80154FE4
00007E81
80154FE8
00000040
80154FEC
28005106
00004000
80154FFO
80154FF4
00009402
00002C4D
80154FF8
OODFOOOO
80154FFC

The following definitions apply only
when BUGCHECK is a MACHINE CHECK.
<----- Byte Count
<----- Summary Parameter
<----- CPU Error Status (ID#OC)
<----- Trapped micro-PC (ID#20)
<----- VA/VI BA
<----- D Register (ID#08)
<----- TB Err. Reg. #0 (ID#l2)
<----- TB Err. Reg. #1 (ID#l3)
<----- Timeout Address (ID#lA)
<----- Cache Parity (ID#lE)
<----- SBI Erre Reg. (ID#l9)
<----- PC (General Reg. #F)
<----- PSL (ID#OF)

HALT INST EXECUTED
HALTED AT 800039ED
(BOOTING) <--------------- SYSGEN "BUGREBOOT = l", , so rebooting
CPU HALTED
via "DEFBOO.CMD" command file.
INIT SEQ DONE
HALT INST EXECUTED
HALTED AT 200034F9 <------ ISP Rom Macro program finished. "SP"
now contains SA+200 of good 64K chunk.
G OOOOOOOE 00000200
LOAD DONE, 00004200 BYTES LOADED <----- VMB.EXE loaded into VAX mem.
VAX/VMS Version V3.l ll-AUG-1982 16:21

1-15

<----- VMS is loaded and started.

Getting Started on MACHINE CHECKs
The contents of the "STACK" are used to trouble-shoot "Machine Checks".
The Stack Contents are printed out on the "Console Terminal", by the
VMS Operating System, immediately after a "FATAL" Machine Check.
"Fatal Machine Checks" are basically those Machine Checks that happened
when the VMS Operating System was in "Kernel" or "Exec" mode. Machine
Checks that happened during "User" or "Supervisor" mode are normally
considered "Non-Fatal" and will result in the Machine Check Logout
information (the contents of the STACK and the General Registers) being
saved in the System Event file ("SYS$ERRORLOG:ERRLOG.SYS") versus being
printed out on the "Console Terminal".
If the Machine Check occurred while running a program that does not
output the "Logout" information to the "Console Terminal" or
"SYSTEM EVENT File", then you will have to dump the Stack yourself.
To do this, first examine (using CONSOL.SYS) ID #12 and check to see
if Bit 00 is set. Then use the appropriate command to examine the
STACK.
ID #12 - Bit <00> = 0

; Memory Management not enabled.

>>> E/L/H SP
>>> E/L/H/P/N:30 @
ID #12 - Bit <00> = 1

; Memory Management is Enabled.

>>> E/L/H SP
>>> E/L/H/V/N:30 @
Now, use the following steps to determine what caused the "Machine
Check":
1.

Find the "LONGWORD" on the Stack that contains a "00000028".
If you cannot find this longword, then the Stack doesn't
contain the "Machine Check Logout" information. You will,
therefore, have to make sure the appropriate error catching
facilities are in place, and then must wait for the next
"Machine Check" to occur.

The "LONGWORD" following the "00000028", is the "Summary
Parameter" word. Using "byte O" of this longword, check
the SUMMARY PARAMETER DESCRIPTION, on the next page, to
determine what type of error occurred.

Now that you know what type of error occurred, go to the
appropriate section of this Trouble-Shooting Guide to
find out how to use the Stack "Machine Check Logout"
information to further isolate the problem.

1-16

Normally the Exception Vector bits <1:0> define the following:
O - Service the EXCEPTION on the KERNEL STACK unless running on
the INTERRUPT STACK.
1 - Service the EXCEPTION on the INTERRUPT STACK.
2 - Service the EXCEPTION in WCS, Pass Bits <15:02> to Micro PC.
3 - Halt
The Machine Check Exception Vector is found at "SCBB+4". The "System
Control Block Base" is a Physical address and can be found by examining
"ID Register #3B" or "Internal Register #11".

MACHINE CHECK LOGOUT Information Description:
Description

Memory Loe.

ID Loe.

Notes

(SP+4)
(SP+8)
(SP+l2)
(SP+l6)
(SP+20)
(SP+24)
(SP+28)
(SP+32)
(SP+36)
(SP+40)
(SP+44)
(SP+48)

None
TO ( 3 0)
Tl (31)
T2 ( 3 2)
T3 (33)
T4 (34)
TS ( 3 5)
T6 (36)
T7 (37)
T8 (38)
T9 (39)
None
None

Must be a 28 (hex) .
See below.
See ID #OC.
See ID #20.
Virtual address.
See ID #08.
See ID #12.
See ID #13.
See ID #lA.
See ID #lE.
See ID #19.
General Reg. #F.
See ID #OF.

--------------------------------------------------------------------(SP)

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.

Byte Count
Summary Parameter
CPU Error Status
Trapped UPC
VA/VI BA
D Register
TB ERROR 0
TB ERROR 1
Timeout Address
Parity
SBI Error
PC
PSL

SUMMARY PARAMETER Description
Page

Code

1-55

00
02
03
05
OA

1=38

1-34
1-92

1-38
1-92
1-55
1-34
1-55
1-45
1-38
1-34
1-92

1-94
Ij __
I

OD
OF
FO
Fl
F2
F3
F5
F6

(use Byte #0, only!)

Description
CP Read Timeout or Error Confirmation Fault
CP Translation Buffer Parity Error Fault.
CP Cache Parity Error Fault.
CP Read Data Substitute Fault.
IB Translation Buffer Parity Error Fault.
IB Read Data Substitute Fault.
IB Read Timeout or Error Confirmation Fault.
IB Cache Parity Error Fault.
CP Read Timeout or Error Confirmation Abort.
Control Store Parity Error Abort.
CP Translation Buffer Parity Error Abort.
CP Cache Parity Error Abort.
CP Read Data Substitute Abort.
Microcode "not suppose to get here" Abort.

Goto to this page to find out how to trouble-shoot associated error.

1-17

BIT BREAKDOWN OF STACK ENTRIES - Showing error information
ID #OC

- CES

3 3 2 2

2 2 2 2

1 1 1 1

1 1 0 0

0 0 0 0

1 0 9 8

7 6 5 4

3 2 1 0

9 8 7 6

5 4 3 2

1 0 9 8

7 6 5 4

3 2 1 0

1 1 0 0

0 0 0 0

Control Store Parity Error Summary - I I I I
CS Parity Error in Group #2 ----------1 I I
CS Parity Error in Group #1 ------------1 I
CS Parity Error in Group #0. --------------1

.. MICRO STACK

ID #20
3 3 2 2

2 2 2 2

1 1 1 1

1 0 9 8

7 6 5 4

3 2 1 0

9 8 7 6

5 4 3 2

1 0 9 8 7 6 5 4 3 2 1 0
I<-- Micro PC bits <12:0> -->I

- output of VAMX

VA/VIBA
3 3 2 2

2 2 2 2

1 0 9 8

7 6 5 4

2 2 2 2

1 1 1 1

1 1 0 0

0 0 0 0

3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
I<---------------- Virtual Address bits <31:00> --------------------->I
From VA register if "CP" reference.
From VISA register if "IB" reference.

ID #08
3 3 2 2

- D Register
2 2 2 2

2 2 2 2

1 1 1 1

1 1 0 0

0 0 0 0

1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
Data
11
Data
II
Data
II
Data
I
I<-- Byte #3 ---> 11 <-- Byte #2 ---> 11 <-- Byte #1 ---> 11 <-- Byte #0 --->I

ID #12
3 3 2 2
1 0 9 8

- TBERO
2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

Force Replace Both Grps-1
I I I I
I I
I I I
Force Replace Group # 1 ----1 I I I
I I
I I I
Force Replace Group #0 ------1 I I
I I
I I I
Force TB miss Group #1 --------1 I
I I
I I I
Force TB miss Group #0 ----------1
I I
I I I
TB Hit Group #1 --------------------------------------1 I
I I I
TB Hit Group #0 ----------------------------------------1
I I I
Force TB Parity Error (code determines specific group/byte) --->I
I
MEMORY MANAGEMENT ENABLE --------------------------------------------1

1-18

ID #}3
3 3 2 2
0 9 8

- TBERl
2 2 2 2
7 6 5 4

2 2 2 2
3 2 l 0
A

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
l 0 9 8

PE Group 1 Data Byte 2 -I
I I I I I
PE Group 1 Data Byte 1 ----1 I I I I
PE Group 1 Data Byte 0 -'-----1 I I I
PE Group 0 Data Byte 2 --------1 I I
PE Group 0 Data Byte 1 ----------1
I
PE Group 0 Data Byte 0 -------------1

ID #lA
3 3 2 2
o9 a

1 0 9 8

I I I
I I I
I I I
I I I

7 6 5 4

0 0 0, 0
3 2 J. "u

I I I 1-- CP TB Parity Error
I I I- PE Group 0 Addr Byte 0
I 1--- PE Group 0 Addr Byte 1

1----- PE Group 0 Addr Byte 2

1-------- PE Group 1 Addr Byte 0
I 1---------- PE Group 1 Addr Byte 1
1------------ PE Group 1 Addr Byte 2
I I

- TIMEOUT ADDRESS
2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
1 6 s 4 3 2 i o 9 a 1 6 5 4 3 2 i o 9 a 1 6 5 4 3 2 i o
I<------------------------ PA <29:02> ----------------------->!

- CACHE PARITY

ID #lE
3 3 2 2

0 0 0 0

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

Cache Parity error was detected ----1 I I I I I I I I I
0 = IB reference, 1 = CP reference ---1 I I
I I
I I
I I
Parity OK in Data Group 1 Byte 0 -------1 I I I
I I
Parity OK in Data Group 1 Byte 1 ---------1
I I
I I
Parity OK in Data Group 1 Byte 2 ------------1 I I
I I
Pari tv OK in Data Group 1 Byte 3 --------------! !
! !
Parity OK in Data Group 0 Byte 0 ----------------1
__________________ I, I I
Parity OK in Data Group 0 Byte 1
I I
Parity OK in Data Group 0 Byte 2 --~------------------! I
Parity OK in Data Group 0 Byte 3 -----------------------!

I I
I
I
I
I
I
!
I
I
I
I
I

0 0 0 0
3 2 1 0
A

I
I
I
I
I
I
!
I
I
I
I
I
Parity OK in Address Group 0 Byte 0 ----------------------!
I
Parity OK in Address Group 0 Byte 1 ------------------------!
I I
Parity OK in Address Group 0 Byte 2 ---------------------------! I I
Parity OK in Address Group 1 Byte 0 -----------------------------! I
Parity OK in Address Group 1 Byte l -------------------------------!
Parity OK in Address Group 1 Byte 2 ---------------------------------!

1-19

ID #19

- SBl.ERR

3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4
A

RDS received for a CP requested cycle --1 I
SBI Timeout on a CP requested cycle ------1

I I

I
I
I
I
I
I
I
I
I
I

0 0 0 0
3 2 1 0

I
I
I
I
I
I
I
I
I
I
I
I
I

I
I
SBI Err CNF
received
for an IB
request

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

I I
I I I I I I
I I I I
I I I I
I I
I I I I I I
I I I I
Decimal ovrflo --1 I I T
I I
I I I I I I
Float Underflow ---1 I
I I
I I I I I
I
Integer Overflow ----1
I I
I I I
I
1--- Interrupt Priority Level
I I
I I I
1--- Previous MODE
I I
I I 1------ Current MODE
I I
I 1----- Interrupt Stack selected
I I
1----- First Part Done
I 1--- Trace Pending
1--- Compatibility Mode

I I I I
Nz v c

I I

----------<-- see chart
0
0 - No device response
0
1 - Device Busy Timeout
1
0 - Waiting for READ DATA timeout
1
1 - Impossible code

--=r

SBI Error Confirmation on CP requested cycle ------1
RDS received for an IB requested cycle ---------------1
SBI Timeout on an IB requested cycle ------------------5
4
<-- see chart ---------=!
0
0 - No device response
0
1 - Device Busy Timeout
1
0 - Waiting for READ DATA timeout
1
1 - Impossible code

- General Register #f -

3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

Program Counter
1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

!<---------------Program execution address pointer ------------------>I

ID #Of
3 3 2 2
1 0 9 8
A

- PSL 2 2 2 2
7 6 5 4

Processor Status Longword

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6
A

1-20

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

PA ElJS

1
TB

[PG

TAG

CACHE

SBI Control

~
·~ PG

DATA

TAG

PG ....
,,.

[ 0/0 Register

1.
~

ti) llli

PC • Parity Dlecked

_ _ _ __.. PG =Parity fienerated

~
~

Instruction Buffer
WCS/OCS

mm;

......
......

,,.

PC ~

ID llIS

DATA PATHS

911 m;

DATA

CIB

.....

cs m;
PCS

lt'CS/OCS RAN

PCS RON

Machine Check Logout breakdown flowchart

"START HERE"

1----------------------------------------------1
I
Find 00000028 on Kernel/Interrupt Stack
I
1----------------------------------------------1
I
1-------------------------------------------------------------1
I
I

•

Extract "Byte O" from the LONGWORD following the 00000028. l
This byte is the SUMMARY PARAMETER code.
I

1-------------------------------------------------------------1
I
I

1-------------------------------------------------------------1
!Go to the appropriate flow for the associated parameter codesl
l------l------l------l---~--1------1------1------1------------1

I 00 I OD I 02 I 03 I 05 I Fl I F6 I all others I
I FO I
I F2 I OF I oc I
I
I
I
I
I
I OA I F3 I F5 I
I
I
I
l------l------1------1------1------l------l------l------------I

I
goto
"CP READ ERR"
-

I
I
I

I
goto
"TB ERR"

I
I
goto
"IB READ ERR"

I
I
I

I
goto
"RDS ERR"
-

I
I
goto
"CACHE ERR"

I
I
I
goto
I "MICRO SEQ ERR"

I
-I
goto
"CS PAR ERR"

I
I
I
I
I

I
I
I
I

l<-----------------------------1

1-----------------------------------------------------------------------1
I
I
I
I
I
I
I

If none of the above codes are what is contained in BYTE 0 of
the LONGWORD following the BYTE COUNT (00000028), then the summary
parameter byte is invalid. The problem could be in any of the
following areas of the VAX CPU logic:
DATA PATHs, CONTROL STORE, MICRO SEQUENCER, or INTERRUPT
CONTROL LOGIC.

I
I
I
I
I
I
I

1-----------------------------------------------------------------------1

Error Type
Flowchart
Additional Info.
********************************************************************
"CP READ ERR" --------- 1.023 ---------------------- 1.056
"IB-READ-ERR" --------- 1.025 ---------------------- 1.056
"TB-ERR" ------------- 1.028 ---------------------- 1.038
"CACHE ERR" ----------- 1.030 ---------------------- 1.034
"RDS E~R" ------------ 1.031 ---------------------- 1.092
"CS ~AR ERR" ---------- 1.032 ---------------------- 1.046
"MICRO_SEQ_ERR" ------- 1.033 ---------------------- 1.094

1-22

"CP READ ERR"

!--------------------------------------------------------!
I

Extract the "SBI ERROR" register from the STACK DUMP. I

entry #1).

I It is the 11th logout entry (counting the 00000028 as I
I

1--------------------------------------------------------1
I

1---------------------1 no
l<------1 Bit <12> or <08> =l 1------->I
I
1---------------------1
I
yes

I
I

goto
"E"

1-------------------------------1

yes 1-------------1
<------1 Bit <08>=1 I
1-------------1

I no
I
I
I
Binary value of Bits <11:10> =

I
I
I
I
I

I
I
I

Goto "A"

I Summary Parameter code and
I
I Error Bits do not agree.
I
I
I
I Problem in INTERRUPT CONTROL I
I LOGIC, CS or CS BUS, or the
I
I MICROSEQUENCER or MicroPC bus, I

1-------------------------------1
11

Goto "B"

!----------------------------------------->!
I
I
----------------------------------------------------------1
I No Device Response received when attempting to access I
I the address contained in the "TIMEOUT ADDRESS" register. I
I Problem is probably in the address logic of the device I
I being accessed.
I

1---------------------------------------------------------1
I

1---------------------------------------------------------1

I Goto TIMEOUT ADDRESS flows to determine what device was I
I being accessed.
I

!---------------------------------------------------------!

I
I
I
I
I
I
I
I
I
I
I
I

1---------------------------------------------------------1<---I
I Device Busy Timeout occurred. Device being accessed is I
I contained in the "TIMEOUT ADDRESS" register. The device!
I recognized that it was being accessed, but was "busy"
I
I doing a previous command. The CPU timed out since 512 I
1. cycles went by and the device was still "busy".
I
I Problem could be almost anywhere in the accessed device I
I or on the buses it is interfacing to.
I

!---------------------------------------------------------!
I
!---------------------------------------------------------!

I Goto TIMEOUT ADDRESS flows to determine what device was I
I being accessed.
I

1---------------------------------------------------------1
1-23

"B"

"A"

I
I
I
I

!----------------------------->!

1------------------------------------------------->I

I
I

1---------------------------------------------------------1
I
1---------------------------------------------------------1

I Goto TIMEOUT ADDRESS flows to determine what device was I
I being accessed.
I

l---------------------------------------------------------1

I
I
I

I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I

1---------------------------------------------------------1<-----------1
I IMPOSSIBLE CODE. This code should never occur.
I
I Problem is most likely in the CPU's SBI control logic,
I or in the DATA PATHS (may have picked a bit when moving
I register first to T9 and then to the STACK).

I
i
I
I
I

1---------------------------------------------------------1

1-24

"IB READ ERR"
I
1--------------------------------------------------------1
I Extract the "SB! ERROR" register from the STACK DUMP. I
I It is the 11th logout entry (counting the 00000028 as I
I entry #1).
I

!--------------------------------------------------------!

goto
"E"

I
yes 1---------------------1 no
l<------1 Bit <06> or <03> =l 1------->I
I
1---------------------1
I
I
I
I
!-------------------------------!
yes 1-------------1
I Summary Parameter code and
I
<------1 Bit <03>=1 I
I Error Bits do not agree.
I

1-------------1

I no
I
I
I
Binary value of Bits <05:04> =
00

I
I
I
I
I

I Problem in INTERRUPT CONTROL

I LOGIC, CS or CS BUS, or the
I
I MICROSEQUENCER or MicroPC bus. I

!-------------------------------!
11

I
Goto "C"
Goto "D"
I
I
1----------------------------------------->I
I
I
----------------------------------------------------------!
I No Device Response received when attempting to access I
I
I the address contained in the "TIMEOUT ADDRESS" register.I
I
I Problem is probably in the address logic of the device I
I
I which contains the address being accessed.
I
I
I
!--------------~------------------------------------------!
I
I
1---------------------------------------------------------1
I
I Goto TIMEOUT ADDRESS flows to determine what device was I
I
I being accessed.
I
I
!---------------------------------------------------------1
I
I
I
1---------------------------------------------------------1<---I
I Device Busy Timeout occurred. Device being accessed is I
I contained in the "TIMEOUT ADDRESS" register. The device!
I recognized that it was being accessed, but was "busy"
I
I doing a previous command. The CPU timed out since 512 I
I cycles went by and the device was still "busy".
I
I Problem could be almost anywhere in the accessed device I
or on the arrays or array buses it is interfacing to.
I
1---------------------------------------------------------1
I
!---------------------------------------------------------!
I Goto TIMEOUT ADDRESS flows to determine what device and I
I the location-within the device that was being accessed. I
1---------------------------------------------------------1

1-25

"D"

"C"

I
I
I
I

!----------------------------->!

!------------------------------------------------->!

I
I

1---------------------------------------------------------1<-------I
I Waiting for Read Data Timeout occured. The device being!
I accessed (whose address is contained in the TIMEOUT
I
I ADDRESS register) acknowledged the CPU's C/A cycle, but I
I didn't send back the expected READ DATA within 512 SBI I
I cycles.
I
I
I
!Problem could be almost anywhere in the controlling NEXUS!
Ito the unit actually being addressed.
I
!---------------------------------------------------------!
I
!---------------------------------------------------------!
I Goto TIMEOUT ADDRESS flows to determine what device and I
I the location-within the device that was being accessed. I

!---------------------------------------------------------!

I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I

1---------------------------------------------------------1<-----------I
I IMPOSSIBLE CODE. This code should never occur.
I
I Problem is most likely in the CPU's SBI control logic,
I or in the DATA PATHS (may have picked a bit when moving
I register first to T9 and then to the STACK).

I
I
I
I
I

!---------------------------------------------------------!

l-26

"TIMEOUT ADDRESS"

------>I
I
I

1---------------------------------------------------------------1
I

Extract the "TIMEOUT ADDRESS" register from the STACK DUMP.

It is the 9th logout entry (counting the 00000028 as #1).

1---------------------------------------------------------------1
-~Lt
:
--------------------'-~--------------------------------------!

Extract Bits <27:00> from this register. Bits <27:00> of I
the TIMEOUT ADDRESS register correspond to bits <29:02> of I
the PHYSICAL BYTE ADDRESS of the device/location being
I
accessed.
I
I
Convert the TIMEOUT ADDRESS Bits <27:00> to a 30-bit VAX I
PHYSICAL BYTE addresi by first converting to binary, then I
adding to binary zeros to the least significant end, and I
then converting back to HEX. The resultant is the 30-bit I
VAX Physical Byte Address of the device/location that the I
VAX CPU was attempting to access at the time of the error. I

-----------------------------------------------------------!
I
I

-----------------------------------------------------------!

I
I
I
I
I
If you got here from an IB_READ_ERROR, the address must bel
either a Physical MEMORY Address, or the address of one of I
the locations in the ISP ROM (should only occur during a I
boot). If it is an I/0 address, the problem has to do
I
with CPU addressing or address translation.
I

Now you know what type of error occured and who the CPU
was attempting to access at the time of the error.
With this. information, you should be able to zero in on
the failing area of the system.

----------------------------------~------------------------!

"E"

1------------------------------------------------------------1

I An ERROR Confirmation was returned by the addressed device. I
I This means that the function specified by the CPU in the
I
I C/A cycle. was either illegal or not implemented by this
I
I NEXUS device.
I
I

! The problem could be a CPU problem, a Software problem, or
I a NEXUS problem.
I
I The TIMEOUT ADDRESS register should indicate which NEXUS
I was being accessed.
I

1------------------------------------------------------------1
I
<-------------------------------1
1-27

"TB ERR"
I
1--------------------------------------------------------1
I Extract "TB ERROR Register #0" from the STACK DUMP.
I
I It is the 7th logout entry (counting the 00000028 as
I
I entry #1).
I
1--------------------------------------------------------1
I
1--------------------------------1 no
I Is Bits <04:01> equal to 0?
1--------> goto
1--------------------------------1
FORCED TB PAR ERR
I yes
yes 1---------------------1 no 1---------------------------1
<-----1 Is Bit <00> = 1 ? 1---->IMemory Management is OFF ? I
1---------------------1
1---------------------------1
I
1------------------------------------------------1
I Should never have gotten a Parity Error since I
I memory management wasn't turned on, therefore I
I the Translation Buffer wasn't used.
I
1------------------------------------------------1
I
1------------------------------------------------1
I
Problem is in the error detection logic.
I
1-------------------------~----------------------I

1-----------------------------------------------------1
I Extract "TB ERROR Register #1" from the STACK DUMP. I
I It is the 8th logout entry (counting the 00000028 asl
! entry #1).
I
l---~-------------------------------------------------1

I
1------------------------------------------1 no
I
I Are any of Bits <20:09> equal to a 1 ? 1------------->I
1------------------------------------------1
I
1------------------------------1
I Any of Bits <14:09> = 1 ??? I
1------------------------------1
l<-------------1 yes
I no
I
1-------------------------------1
1-------------------------------1
I
I "TAG Parity Error" flagged.
I
I "PTE Parity Error" flagged.
I
I
I Problem is most likely on the I
I Problem is most likely on the I
I
I M8220 board. Could also be onl
I M8222 board. Could also be onl
I
I M8222, M8226, M8219, M8223,
I
I the M8237, M8218, M8219, M8223, I
I
I M8224, M8226, M8230, M8233/8'sl
I M8224, M8226, M8227, M8228,
I
I
I M8234, M8286, M8236, or KA780 I
IM8230, M8231, M8233/8's, M8234, I
I
I backplane or power.
I
IM8235, M8286, M8287, M8236, or I
I
1-------------------------------1
I the KA780 backplane or power. I
I
I
1-------------------------------1
I
1---------------------------------1
I
!Check for other TB Parity Errors 1---> 1------------------------------1
I
1---------------------------------1
I Any of Bits <20:15> = 1 ??? 1-->I
!------------------------------! yes
I no
I
then exit
1-28

"FORCED- TB- PAR- ERR"
I
I
I

1----------------------------------------------------------------1
I
I
I
I

None of these bits should ever be set in normal operation.
These may be set by diagnostics, but should have been cleared
prior to booting of the operating system or the Diagnostic
Supervisor.

I
I
I
I

!----------------------------------------------------------------!
I
I
I
I

1------------------------------------------------------------------1
I
I
I

Either the software that you are running is setting these bits I
so as to cause a "Translation Buffer Parity Error" or the M8222 I
board is probably bad.
I

1---------------------------------------------------------------~--1

1-29

"CACHE ERR"

I
I

1---------------------------------------------------------------1
I Extract the "CACHE PARITY Register" from the STACK DUMP.
I This is the 10th logout entry (counting the 00000028 as #1).

I
I

!---------------------------------------------------------------!
I
I

1----------------------------------------------------------1

I Is any of Bits <13:00> = 0 ??? These bits are a "O" to I
I indicate a parity error in the associated group and byte.I
1----------------------------------------------------------1
I yes
I no
I
I
I
!-------------------------------------------!
I
I False detection of a cache parity error.
I
I
I Problem is probably in the error detection!
I
I logic or microsequence logic.·
I
I
!-------------------------------------------!
I
I
!--------------------------------! yes
I Is any of Bits <13:06> = O ??? 1-------------->I
I ----------~--------------------!
I
I no
I
I

I
I
I
I

I
I
I
I
I
I

1-----------------------------------------------~-I

I "Cache DATA Parity Error" flagged.
! The M8221 is most likely bad.
Could also be
I the M8218, M8219, M8223, M8225, KA780 backplane
I or KA 7 8 0 power.

I
!
I

!-------------------------------------------------!
I
I
I
I
I
I

I<--------I
I

!--------------------------------------!

I "Cache TAG Parity Error" flagged.
I
! The M8220 is most likely bad. Could I
I also be the M8218, KA780 backplane,
I
I or KA780 power.
I
--------------------------------------

!---------------------

I Check to see if any
I other Cache errors.
1--------------------I
1---------------------1
I Any of Bits <05:00> I
I equal to a "O" ???

1---------------------1
I

I yes

'<------!

I no

then exit

1-30

"RDS ERR"

1--------------------------------------------------------------------1
I Multiple bits were detected bad by the accessed SBI NEXUS wheri it
I attempted to get the data that the CPU requested.
I

I
I
I

I Indicates that a problem exists in the referenced SBI NEXUS.
I This NEXUS will be an SBI MEMORY CONTROLLER.

I
I

I This type of error easiest to trouble-shoot by using the contents I
I of the memory control registers in order to find the failing array. I

1--------------------------------------------------------------------1
I
I

1----------------------------------------------------------------------1

I Find the contents of all the SBI Memory Nexus registers either by
I
I examining error log files, or by using CONSOL.SYS commands to examine!
I these registers. The CONSOL.SYS method can only be used if the CPU I
I was halted before the software was able to clear the memory control I
I registers.
I

1----------------------------------------------------------------------1
I
I

1----------------------------------------------------------------------1

I The memory controller who detected the error should have error bits
I set that indicate that a multiple bit error was detected and the
I array in error should be latched.
I Look in:
I
"Memory Register C" for MS780A's and MS780C's
I
"Memory Register C & D" for MS780E's and MS780F's
I
"Array Error Register" for MA780' s

I
I

I
I
I
I

1----------------------------------------------------------------------1
I
I

1----------------------------------------------------------------------1
I Problem is typically an array problem, but could also be the SBI
I Memory control board(s), memory power, memory backplane, M8218, or
I M8219.

!----------------------------------------------------------------------!

1-31

"CS PAR ERR"
I
1-------------------------------------------------------------1
I Extract the "CPU ERROR STATUS Register" from the STACK DUMP I
I It is the 3rd logout entry (counting the 00000028 as #1).
I
1-------------------------------------------------------------1
I
1---------------------1 no
1-------------------------------1
I Is Bit <15> = 1 ??? 1-------->I Is any of Bits <14:12> =l ??? I
1---------------------1
1-------------------------------1
I yes
I yes
I no

I
I
I
I
I

1------------------------------1

I CS Summary bit probably bad. I
!Check M8231. Still a possible I
!Control Store Parity Error.
I
1------------------------------1
I

1------------------------------------------------------------1

I Bits <14:12> indicates the specific group (2,1, or 0) that I
I that the Parity error was detected in. Log this information!
I for future use in case problem is not fixed immediately.
I
1------------------------------------------------------------1
I

I
I
I
I
I
I
I

1------------------------------------------------------------1
I Extract the "TRAPPED Micro-PC Register" from the STACK DUMPI
I It is the 4th logout entry (counting the 00000028 as #1).

1------------------------------------------------------------1
I
1--------------------1 no
1----------------------------------1

!Trapped UPC> FFF ? 1----->IProblem occured while accessing a I
1--------------------1
!PCS microword. The M8234 should bel
I yes
I replaced as a 1st try.
I
I
1----------------------------------1
I
I
!--------------------------------------------------------!
I
I Problem occured while accessing a micro-word in WCS.
I
I
I Bits <11:10> of the UPC indicate the WCS slot in error.I
I
I The appropriate M8233/M8238 should be replaced 1st try.I
I
1--------------------------------------------------------1 I
I
I
1---------------------------------------------------------------1
I If 1st try fails; try those module that receive or transmit onl
I the Control Store Bus for the micro-bits associated with the I
I failing group. Charts indicating which boards are in question!
I for each group can be found in chapter 1 under the section forl
I Control Store Parity Errors.
I

I
I
I
I
I
I
I
I
I
I
I
I
I
I
1---------------------------------------------------------------1 I
I
l<------------------------------------------1

!---------------------------------------------------------------------!

I False detection of a Control Store Parity Error. Problem is in the I
I error detection circuitry and is probably one of the following:
I
I
M8230, M8231, M8222, M8235, KA780 Backplane, or power.
I

!---------------------------------------------------------------------!

1-32

"MICRO_SEQ_ERR"

I
I
I

1------------------------------------------------------~-------I

I Extract the "TRAPPED Micro-PC Register" from the STACK DUMP. I
I It is the 4th logout entry (counting the 00000028 as #1).
I

1--------------------------------------------------------------1
I
I
I

1---------------------------------------------------------------1

I This address can be verified in the micro-fiche to verify thatl
I it is indeed an unused micro-word.
However, this problem is I
I a micro-sequencer/micro-PC problem no matter how you look at I
I it.
I
1------------------------------------------~--------------------I

I
I
I

1----------------------------------------------------------------1

I This problem is most likely the M8235 board. Could also be
I
I the M8224, the M8234, an M8233 or M8238, or the KA780 backplane!
I or KA780 power.
I

1----------------------------------------------------------------1

1-33

1.)

*****

Cache Parity errors

*****

The "Parity" register is normally all that is needed to trouble
shoot this type of Machine Check.
Cache Parity is checked when the data is read from cache.
The SBI control checks parity of SBI data as it is sent to
the Cache from Memory. Cache Tag Parity is generated on the
"CAM" board on a cache write and checked on the "CAM" board
on a read from cache. Cache Data Parity is checked on the
"COM" board.
Bit #15 of ID Register #lE, equal to a 1, indicates
that a Cache Parity error occur~ed.
If Bit #14 of ID #lE is set, the read reference was from
the CP (micro-code). This bit is not really an error
flag but simply states who made the reference that caused
the Cache Parity Error. If Bit #15 is not set, this bit
is of no real importance.
If Bit #14 of ID #lE is cleared, the read reference was
from the IB (Instruction Buffer). Not an error flag bit.
Bits <13:06>, of ID #lE, define the Group and Byte of Bad
DATA that the parity error was detected upon. Beware, the
bad Group and Byte are indicated by a 0 in the appropriate
bit location. These bits = l indicate parity was good.
Bits <05:00>, of ID #lE, define what Group and Byte has a
bad address tag. Beware, the bad Group and Byte are
indicated by a 0 in the appropriate bit location. These
bits = 1 indicate parity was good.
ID Register #lE is stored in "(SP)+36" by the machine check
logout. It is stored in ID Register #38 on a Double Error
Halt's first error.
The Cache Data Matrix is on the "COM" (M8221) board.
Cache Address Martix is on the "CAM" (M8220) board.

The

If ID Register #lE contains a parity error indication for
the instruction buffer, the register is automatically
cleared when the instruction buffer is flushed.

1-34

Problem areas if Cache "DATA Parity Error" :
1.

cache Data Matrix - M8221 - "COM" - Slot 5
Parity is checked as it is being read from the matrix.
Parity that is written into the matrix comes directly
from the MD bus (not checked or generated by the cache
control logic on the way into the matrix).

SBI Control/Interface boards:
a.

If problem is in "BYTE #1 or #0"
SBI Interface Low bits - M8218 - "SBL" - Slot 2

If problem is in "BYTE #3 or #2"
SBI Interface High bits - M8219 - "SBH" - Slot 3

The SBI Control boards do not check the parity on the received
MD Bus data but do generate parity for the data that is
written from the SBI to the MD bus. The M8218 uses the output
from the parity checkers to generate "SBLP GO or Gl Par Err".
3.

Instruction Buffer - M8223 - "IDP" - Slot 7
Receives "Bus MD <31:00>" but NOT "Bus MD Byte <3:0> Parn.
Therefore, the Instruction Buffer does not check parity on
the data used from the MD Bus.

Data Aligner - M8225 - "DBP" - Slot 9
Transmits "Bus MD <31:00> + Bus MD Byte <3:0> Par".
Receives "Bus MD <31:00>" but NOT "Bus MD Byte <3:0> Par",
therefore, parity is not checked on "Bus MD <31:00> prior
to use by the data path boards.

KA780 backplane

KA780 backplane power

1-35

Problem areas if Cache "TAG Parity Error"
1.

Cache Data Matrix - M8220 - "CAM" - Slot 4
Parity is generated on the "Bus PA <29:12> bits" prior to
being written into the Tag Matrix. Parity is checked as
it is being read from the Tag Matrix, prior to use.

SBI Interface Low - M8218 - "SBl" - Slot 2
This board uses the output from the parity checkers to
create a "SBLP GO Par Err" or "SBLP Gl Par Err" signal.

KA780 backplane

KA780 backplane power

Disabling CACHE by KA780 backplane jumpers.
If you cannot obtain the correct cache boards in order to fix a cache
parity error problem, you may still be able to get the system up by
installing the following jumpers:
D04Pl to a ground pin
D04P2 to a ground pin
This will cause a cache miss on all references.
will run much slower than normal.

Therefore, the system

This should only be done in case of an emergency. You must let the
customer know that cache is disable, since it may cause problems due
to program timing problems.

1-36

ID Register #lE
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2

1 1 1 1

1 1 0 0

3 2 1 0

9 8 7 6

5 4 3 2

1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

Bits <31:16>

************
Not used, should be all zeros.

Bits <15:14>

************
15

0
1
1

1
0
1

Bits <13:06>

************

Data Parity OK for specified Group and Byte if
the associated bit is set.

Parity OK for CDM Group 1 Byte 0
Parity OK for CDM Group 1 Byte 1
Parity OK for CDM Group 1 Byte 2
Parity OK for CDM Group 1 Byte 3
Parity OK for CDM Group 0 Byte 0
Parity OK for CDM Group 0 Byte 1
Parity OK for CDM Group 0 Byte 2
Parity OK for CDM Group 0 Byte 3

13
12
11
10
09
08
07
06

Bits <05:00>

************
05
04
03
02
01
00

No Error
IB read reference caused the'error
CP read reference caused the error

Address Parity OK for each Group and Byte if
the associated bit is set.

Parity OK for CAM Group 0 Byte 0
Parity OK for CAM Group 0 Byte 1
Parity OK for CAM Group 0 Byte 2
Parity OK for CAM Group 1 Byte 0
Parity OK for CAM Group 1 Byte 1
Parity OK for CAM Group 1 Byte 2

1-37

2. ) * * * * *

Translation Buffer Parity errors

*****

The TB ERR Registers, #0 and #1, are all that are needed to
trouble-shoot Translation Buffer Parity error Machine Checks.
TB Data Parity is written as it was on the ID bus. TB Data
Parity is checked on the "TBM" (M8222) board as it is read.
TB Tag Parity is generated on the "CAM" board and is checked
on the "CAM" board on a read from the translation buffer.
The TB Tag= "VAMX<30:15>" or "ID bus <31:26>".
The TB Data= "ID bus <20:00>".
Bits <20:09> of ID Register #13 define what
the GROUP and whether it was a DATA Byte or ADDRESS
Byte that caused the Translation Buffer Parity error.
The Translation Buffer ADDRESS matrix is on the "CAM"
(M8220) board.
The Translation Buffer DATA matrix is on the "TBM"
(M8222) board.

Problem areas if Translation Buffer "TAG Parity Error":
1.

Cache Address/TB Address Matrix - M8220 - "CAM" - Slot 4
Parity is generated on "VAMX bits <30:15>", and is written
into TAG Matrix, on this board. Parity is checked, on this
board, as the TAG is being read.
The "Modify, Protect <3:0>, and Valid" bits are written from
the ID bus. The associated parity bit for these bits also
comes from the ID bus (it is NOT generated or checked on
th i s board ) .

Translation Buffer Matrix - M8222 - "TBM" - Slot 6
The output of the parity checkers goes to this board (used
to set appropriate bits in "TB Register 0").
The "VAMX bits" feed this module along with the "CAM'' board
(MS 2 2 0) •

1-38

Data Path bits <31:16> - M8226 - "DEP" - Slot 10
The "VAMX bits" are created on this board and the "Bus ID
bits <31:26>, that are used to write the "Modify, Protect <3:0>,
and Valid" bits, are used on this board.

Any board that sends or receives the "Bus ID bi ts <31:26>".
following boards have receivers/drivers for these bits:
SBI Interface/Control High Cache Address Matrix -----Instruction Data Path
Instruction Decode -------Data Path bits <31:16>
Condition Codes/Exceptions Optional wcs
Writable Control Store
Prom Control Store -------Fraction Multiplier High
Console Interface Board

--------------

KA780 backplane

KA780 backplane power

M8219
- "SBH" - "CAM" M8220
M8223
- "IDP" M8224
- "IRC" M8226
- "DEP" M8230
- "CEH" M8233/8 - "OCS" M8233/8 - "WCS" - "PCS" M8234
- "FMH" M8286
- "CIB" M8236

The

Slot 3
Slot 4
Slot 7
Slot 8
Slot 10
Slot 14
Slot 18
Slot 20
Slot 22
Slot 25
Slot 29

Problem areas if Translation Buffer "DATA Parity Error":
1.

Translation Buffer Matrix - M8222 - "TBM" - Slot 6
Parity is not generated, on this board, for the data to
be written into the DATA Matrix from the ID Bus. The
parity bits that are written are the ID Bus Parity bits
as received from the bus.
Parity is checked as the data is read from the DATA matrix.

Any board on the ID bus that transmits or receives "Bus ID
bits <20:00>". The following boards do this:
Terminator and Silo
- M8237
- "TRS" - Slot 1
SBI Interface Low Bits - M8218
- "SBL" - Slot 2
SBI Interface High Bits - M8219
- "SBH" - Slot 3
Translation Buffer
- M8222
- "TBM" - Slot 6
Instruction Data Path
- M8223
"!DP" - Slot 7
Instruction Decode
M8224
"!RC"
Slot 8

1-39

- "DEP" - Slot 10
Data Path bits <31:16> - M8226
- "DDP" - Slot 11
Data Path bits <15:08> - M8227
Data Path bits <07:00> - M8228
- "DCP" - Slot 12
- "CEH" - Slot 14
Cond. Codes/Exceptions - M8230
- "ICL" - Slot 15
- M8231
Interrupt Control
- M8233/8 - "OCS" - Slot 18
Optional WCS
Writable Control Store - M8233/8 - "WCS" - Slot 20
- "PCS" - Slot 22
PROM Control Store
- M8234
Microsequence Control
- M8235
- "USC" - Slot 23
- "FMH" - Slot 25
Fraction Multiplier Hi - M8286
- "FML" - Slot 26
Fraction Multiplier Low - M8287
Console Interface Board - M8236
- "CIB" - Slot 29
3.

KA780 backplane

KA780 backplane power

1-40

ID #12

Translation Buffer Register #0

3 3 2 2

2 2 2 2

1 1 1 1

1 0 9 8

7 6 5 4

3 2 1 0

9 8 7 6

Bits <20:18>
************

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

Force Replace

Directs TB writes to defined groups.
20 - Write Both
19 - Force Replace Group 1
18 - Force Replace Group 0
Bits <17:16>
************

Force Miss

Force TB miss on the defined group.
17 - Group 1
16 - Group 0

Bits <15:08>
************

Last Reference

Data on last non-nop memory reference.
15 _, __ _ Status of micro-FS bit
14 ---- Status of micro-ADS bit
13: l 0 - Status of micro-MCT field
1 means IB WCHK existed on an IB reference
09
08 ---- 1 means reference delayed one cycle by IB auto-reload

Bits <07:06>
************

TB Hit

Indicates which group was a TB hit.
07 - Group 1
06 - Group 0

1-41

Force TB Parity Error

Bits <04:01>
************

Allows bad parity to be generated in the encoded Group and Byte.
Code of 0 - No errors
Code of 1 - No errors
Code of 2 - Group 0 Data Byte 0
Code of 3 - Group 0 Data Byte 1
Code of 4 - Group 0 Data Byte 2
Code of 5 - Group 1 Data Byte 0
Code of 6 - Group 1 Data Byte 1
Code of 7 - Group 1 Data Byte 2
Code of 8 - Group 0 Address Byte 0
Code of 9 - Group 0 Address Byte 1
Code of A - Group 0 Address Byte 2
Code of B - Group 1 Address Byte 0
Code of c - Group 1 Address Byte 1
Code of D - Group 1 Address Byte 2
Code of E - No errors
Code of F - No errors

Bit <00>
********

MME

If a 1, enables Memory Management.

1-42

ID #13

Translation Buffer Register

#l
0 0 0 0
7 6 5 4

3 3 2 2

2 2 2 2

1 1 1 1

1 1 0 0

1 0 9· 8

7 6 5 4

3 2 1 0

9 8 7 6

5 4 3 2

1 0 9 8

0 0 0 0
3 2 1 0

TB Parity Error Status

Bits <20:09>
************

Translation Buffer Error Status. When set indicates a parity error
in the associated Group and Byte.
20 - Group 1 Data_Byte 2

Parity error

19 - Group 1 Data_Byte 1
18 - Group 1 Data_Byte 0

Parity error
Parity error
Parity error
Parity error

17 - Group 0 Data_Byte 2
16 - Group 0 Data_Byte 1
15 14 13 12 -

Group 0 Data_Byte 0 Parity error
Group 1 Address_Byte 2 Parity error
Group 1 Address_Byte 1 Parity error
Group 1 Address_Byte 0 Parity error

11 - Group 0 Address_Byte 2 Parity error
10 - Group 0 Address_Byte 1 Parity error
09 - Group 0 Address_Byte 0 Parity error

Bit <08>
********

CP TB Parity Error

Indicates a TB micro-trap has been requested.

Bit <06>
********

Last TB Write Pulse

Indicates which TB group was last written.
written into.
0 = Group 0
1
Group 1

1-43

Unpredictable if both were

Bit <04>

Bad IPA

********
Contents of IPA are not meaningful if this bit is set.

Bits <03:00>

IPA information

************
Status of the last load from the IPA.
3 = 1 for TB miss on load.
2
1 for TB parity error.
1
1 for Protection violation or miss.
0
1 for automatic hardware initiated load.

1-44

3. ) * * * * Control Store Parity errors (PCS, WCS, or OCS)

****

Two registers are used to trouble-shoot this type of Machine
Check. They are as follows:
CPU Error Status (CES)

for Group the error occurred in.

Trapped UPC

for the micro-address of the error.

Bit <15> of the CES register must be a l if a Control Store
parity error occurred. If CES Bit <15>=0, then the problem
could be either the microcode board (M8234, M8238, or M8233)
whose address appears in the "Trapped UPC", or one of the
following boards:
M8231

Contains the register ("CES") that holds the
"CS Par Err Summary" bit and the "CS Par Err
Group <2:0>" bits.

M8222

Receives the "CS Parity Error" signals to use
to stop TB operations.

M8230

Creates the signals needed to trap the microcode
for a CS Parity Error.

M8235

Controls the micro-addressing.

Bit <12> of the "TRAPPED UPC" identifies where the Control
Store Parity Error was generated from (WCS or PCS).
If Bit <12> is a 0, then the problem occurred as a
result of a PCS (M8234) access.
If Bit <12> is a 1, then the problem occurred as a result
of a WCS (M8233 or M8238) access. If an Optional WCS
board is installed, further breakdown of the "TRAPPED UPC"
address will reveal which WCS board is at fault.
The following statements will define the board at fault providing
the lowest addressed WCS/OCS board is in slot 20 (addressing is
controlled by VAX-11/780 backplane jumpers):
If there is an M8233 (lK board) in Slot 20 and:
Bit <12>=1, Bit <10>=0
then wcs in Slot 20 had the error.
Bit <12>=1, Bit <10>=1
then Optional WCS (slot 18) had
the error.
If there is an M8238 (2K board) in Slot 20 and:
Bit <12>=1, Bit <11>=0
then WCS in Slot 20 had the error.
Bit <12>=1, Bit <11>=1
then Optional WCS (slot 18) had
the error.

1-45

The "Parity Error" checking logic is located on the
PCS (M8234) logic board. The 96 bit micro-word is broken
into three 32 bit sections, each with an associated parity
bit, and parity is checked on each section individually.
Parity should be EVEN (an even number of ones in each 32
bit section counting the associated parity bit).
Use the bit configuration layout for ID register #20
for the "TRAPPED UPC" bit definitions.
The "TRAPPED UPC" is stored in "(SP)+l2" on a MACHINE
CHECK logout. The "TRAPPED UPC" remains in ID #32 for
the first error of a DOUBLE ERROR HALT.
The "CPU Error Status Register" bits <14:12> define the
failing 32 bit section of the 96 bit Micro-code word.
Bits <31:00> = Group 0
Bits <63:32> = Group 1
Bits <95:64> = Group 2

( CES Bi t 12 = 1)
( CES Bi t 13=1 )
(CES Bit 14=1)

- Pin A22Al
- Pin A22Sl
- Pin A22U2

If an OPTIONAL WCS board is installed in the System, Jumpers
"W23 & W24" must be installed on the M8232, "CLK", board. If
the jumpers are out, attempted access of the Optional WCS
board will result in Control Store Parity Errors in all
groups (the micro-word sent to "CS" bus is all ones). The
same symptom will occur, when accessing any Micro-code
board, if the clock lines are bad.
Be aware that the WCS data can only be written by the LSI
Subsystem. WCS data cannot be read by the LSI Subsystem.

Problem areas:
PCS, WCS, or OPTIONAL WCS.
Incorrect setup of KA780 backplane jumpers for WCS and PCS.
No jumpers, for OPTIONAL WCS, on M8232.
Any Board on the "CS" bus.
M8232 Clock Board.
CPU Backplane.
CPU Power or Backplane Power Pin to Module connections.

1-46

ID #OC
3 3 2 2

2 2 2 2

1 0 9 8

7 6 5 4

Bit <16>

CPU Error Status Register

2 2 2 2
3 2 1 0

1 1 1 1

9 8 7 6

5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

Nested Error

********
Used by Memory Management.

Bit <15>

Control Store Parity Error Summary

********
Set if any of Bits <14:12> are set.

Bits <14:12>

Control Store Parity Error bits

************
When set, indicates a parity error was detected in the associated
group.
14 - Group 2 Parity Error
13 - Group 1 Parity Error
12 - Group 0 Parity Error

Bit <11>

E ALU N

********

Bit <10>

E ALU Z

********

Bit <09>

ALU N

********

Bit <08>

ALU Z

********

1-47

Bit <07>
********

ALU C31

Bits <06:04>
************

Arithmetic Trap Code

The octal code in these bits defines the type of arithmetic trap.
7
Decimal divide by o.
6 = Decimal overflow.
5 = Float underflow.
4 = Float divide by 0.
3 = Float overflow.
2 = Integer divide by o.
1 = Integer overflow.
0 = No trap pending.

Bit <03>
********

Performance Monitor Enable

Loaded or read by the microcode.

Bits <02:01>
************

AST Level

Used to deliver AST SIR during RET.

ID #20
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

Micro Stack Register

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

Reading this register pops the top address from the micro stack.
Writing this register pushes an address onto the micro stack.
Bits <15:00>
************

Control Store Address <15:00>

<15:00> = micro Address <15:00>

1-48

Voltages to the Micro-code Boards

The Microcode boards use +5 volts and -5 volts.
may be checked at the following places:

These voltages

+5 volts should be on pins "A2" and "Vl" of rows
"A" thru "F" of each slot that contains a Microcode board.
-5 volts should be on pins "BL2" and "EKl" of each
slot that contains a Microcode board.
Ground is on pins "C2" and "Hl" of rows "A" thru "F"
of each slot that contains a Microcode board.

M8235 LED description

The M8235, Micro Sequencer board, contains 14 LED's that reflect the
following:
1.)
2.)

"Dl - Dl3"
"Micro PC 00 - 12"
"Dl4" ="STALL"

respectively.

LED "Dl" is the bottom most LED while LED "Dl4" is the uppermost.

1-49

CS Bus Groups .and CS Bit Breakdown
Besides going to all the Microcode boards the "Bus CS" bits
also go to the following boards:
Group 0

<12:00>
<19:13>
<22:20>
<24:23>
<25>
<26>
<31>

M8235 M8227 M8230 M8227 M8228 M8230 M8230 -

USC OOP CEH OOP OCP CEH CEH -

Slot 23
Slot 11
Slot 14
Slot 11
Slot 12
Slot 14
Slot 14

Group 1

<34:32>
<41: 35>
<45:42>

M8228 M8229 M8231 M8222 M8222 M8229 M8229 M8289 M8231 M8228 M8231 -

OCP OAP ICL TBM TBM OAP OAP FCT ICL OCP ICL -

Slot 12
Slot 13
Slot 15
Slot 6
Slot 6
Slot 13
Slot 13
Slot 28
Slot 15
Slot 12
Slot 15

M8235 M8229 M8289 M8235 M8231 M8235 M8229 M8229 M8230 M8229 M8225 M8223 -

USC OAP FCT USC ICL USC OAP OAP CEH OAP OBP IOP -

Slot 23
Slot 13
Slot 28
Slot 23
Slot 15
Slot 23
Slot 13
Slot 13
Slot 14
Slot 13
Slot 9
Slot 7

<47:46>
<54:48>
<57:55>
<58>
<63>
Group 2

<65:64>
<69:66>
<71: 70>
<74:72>
<76:75>
<77>
<79:78>
<87:80>
<91:88>
<95:92>

Note:

Remember that "Bus CS <95:00>" also go to slots 18,20 and 22.

1-50

Chart showing "Bus CS" bits to each Board by Board
M8222

"TBM"

<45:42> <47:46> -

Group 1
Group 1

"DBP"

slot 9

<91:88> -

Group 2

M8225

M8228

"DCP"

<25>
<34:32> <58>

"CEH"

M8230

<22:20> <26>
<31>
<79:78> -

"USC"

M8235

<12:00> <65:64> <74:72> <76:75> -

M8223

Slot 6

M8227

Slot 12

M8229

Group O
Group 1
Group 1

Slot 14

M8231

Group 0
Group 0
Group 0
Group 2

M8289

Groups 0,1,2

M8233/M8238
<95:00> -

Slot 18

Groups 0,1,2
"WCS"

"DDP"

"OAP"

"ICL"

"FCT"
<57:55> <71:70> -

Group 0
Group 2
Group 2
Group 2

<95:00> -

Group 2

<45:42> <58>
<63>
<74:72> -

Slot 23

"OCS"

<95:92> -

<41:35> <54:48> <57:55> <69:66> <77>
<79:78> <87:80> -

Slot 22

M8233/M8238

Slot 7

<19:13> <24:23> -

"PCS"

M8234

"IDP"

Slot 20

Groups 0,1,2

1-51

Slot 11
Group 0
Group 0
Slot 13
Group 1
Group 1
Group 1
Group 2
Group 2
Group 2
Group 2
Slot 15
Group 1
Group 1
Group 1
Group 2
Slot 28
Group 1
Group 2

Chart showing "Bus CS" Groups to each Board

Board

Group 0

Group 1

M8222

x
x

M8223
M8225
M8227

M8228

x
x

M8229
M8230

x
x

M8231
M8233
M8234
M8235
M8238

Group 2

x
x
x
x

M8289

1-52

x
x
x
x
x
x

Using the Microcode Sync Point for scoping of the CS Bus
The VAX-11/780 CPU has a "Microcode Sync Pain~" that can be
set up to provide a scope trigger whenever the Microcode
reaches a specified address. To use this feature, proceed
as follows:
1.

Determine what Micro PC you want the Sync to trigger at.

Deposit, uiing the CONSOL.SYS program, the address
into ID register #21.

Place your scopes SYNC on pin "A23V2" of the CPU
backplane.

Start the failing Macro program.

You can now scope the "CS" bus to determine what
bit(s) are bad.

The VAX-11/780 CPU also has logic that can stop the CPU when
the microcode reaches a specified Micro PC. This feature
may be used as follows:
l.

Determine what Micro PC you want the CPU to halt at.

Deposit, using the CONSOL.SYS program, the desired
address into ID register #21.

Set, using the CONSOL.SYS program, the Stop or
Micro Match bit with the "SET SOMM" command.

Start the appropriate failing macro program. The
VAX-11/780 CPU will halt when it reaches the
Micro PC specified in ID register #21. You can
then scope the logic in the static state.

Be sure to execute the "CLEAR SOMM" command before
returning the system to the customer.

1-53

The Control Store Bit Backplane pin layout follows for the slots that
contain WCS and PCS boards (18, 20, and 22).
Group 0
Bus CS 00 - ABl
Bus CS 01 - AB2
Bus CS 02 - ACl
Bus CS 03 - ADl
Bus cs 04 - AD2
Bus CS 05 - AEl
Bus CS 06 - AE2
Bus CS 07 - AFl
Bus CS 08 - AJ2
Bus CS 09 - AKl
Bus CS 10 - AK2

(VAX CPU Slot 18. 20. or 22.)
Bus cs 22 - BM2
Bus cs 11 - ALl
Bus cs 23 - AV2
Bus cs 12 - AL2
Bus cs 24 - BDl
Bus cs 13 - AM2
Bus cs 14 - ARl
Bus cs 25 - BD2
Bus cs 26 - BNl
Bus cs 15 - AR2
Bus cs 16 - BAl
Bus cs 27 - BPl
Bus cs 17 - BBl
Bus cs 28 - BP2
Bus cs 18 - BB2
Bus cs 29 - BRl
Bus cs 30 - BR2
Bus cs 19 - BCl
Bus cs 20 - BLl
Bus CS 31 - BSl
Bus cs 21 - BMl
Bus CS UPAR 0 - FL2

Group 1
Bus cs 32 - BEl
Bus CS 33 - BE2
Bus CS 34 - BFl
Bus CS 35 - BS2
Bus CS 36 - BT2
Bus CS 37 - BUl
Bus CS 38 - BU2
Bus CS 39 - BV2
Bus CS 40 - CCl
Bus CS 41 - CDl
Bus CS 42 - CP2

(VAX CPU Slot 18.20. or 22.)
Bus cs 43 - CSl
Bus cs 54 Bus cs 44 - CS2
Bus cs 55 Bus cs 45 - CT2
Bus cs 56 Bus cs 46 - cu1
Bus cs 57 Bus cs 47 - CU2
Bus cs 58 Bus cs 48 - CD2
Bus cs 59 Bus cs 49 - CNl
Bus cs 60 Bus cs 50 - CPl
Bus cs 61 Bus cs 51 - DP2
Bus cs 62 Bus cs 52 - DT2
Bus CS 63 Bus cs 53 - DUl
Bus CS UPAR 1 -

DU2
DD2
DF2
DH2
DJl
DJ2
DMl
DNl
DPl
DS2
FMl

Group 2
Bus CS 64 Bus CS 65 Bus CS 66 Bus CS 67 Bus CS 68 Bus CS 69 Bus CS 70 Bus CS 71 Bus CS 72 Bus CS 73 Bus cs 74 -

(VAX CPU Slot 18.20. or 22.)
Bus cs 75 - ENl
Bus cs 86 Bus cs 76 - EPl
Bus cs 87 Bus cs 77 - EBl
Bus cs 88 Bus cs 78 - FAl
Bus cs 89 Bus cs 79 - FBl
Bus cs 90 Bus cs 80 - FCl
Bus cs 91 Bus cs 81 - FLl
Bus cs 92 Bus cs 82 - FSl
Bus cs 93 Bus cs 83 - FS2
Bus cs 94 Bus cs 84 - FT2
Bus CS 95 Bus cs 85 - FUl
Bus CS UPAR 2 -

FU2
FV2
FPl
FP2
FRl
FR2
FJl
FJ2
FKl
FK2
FM2

EH2
EJl
EP2
ES2
ET2
EUl
DCl
DDl
EJ2
EK2
EMl

1-54

4. ) * * * * *

CPU READ Timeouts or Error Confirmation Aborts

*****

during Instruction Buffer ("IB") or Micro-code ("CP") accesses.
Two registers are needed to correctly trouble-shoot this type
of Machine Check. They are as follows:
TIMEOUT Address

to determine what device or location was
being referenced when error occurred.

SBI Error Reg.

to determine what type of error occurred.

The VAX-11/780 Processor initiates accesses to SBI NEXUS
from two separate sources. The VAX microcode can initiate
"read or write" accesses to any address and does so to
obtain operands (these operands may be used to calculate
source/destination addresses or may be the operand that
will be operated on. ). The Instruction Buffer is the other
source from which the CPU can initiate an SBI data transfer.
The IB, however, can only do read accesses and these accesses
are used to fetch instruction stream data.
This type of error occurs whenever one of the following types of
conditions has occurred:
1.

An attempt was made to access a non-existent NEXUS
address or a NEXUS did not respond when accessed. This
will result in the VAX CPU receiving a "NO DEVICE RESPONSE"
confirmation on the second cycle following the "Command
Address" or "Write Data" cycle. A "NO DEVICE RESPONSE"
confirmation is when the SBI CNF<l:O> lines are deasserted.
The CPU will wait a cycle and then retry the cycle that
got the NO DEVICE RESPONSE confirmation. If 512 cycles
elapse, from the initial C/A cycle, before an ACKNOWLEDGE
confirmation is received the CPU will timeout and a
Machine Check Exception will occur.

The CPU detected a "Device Busy" response from a NEXUS
and 512 SBI cycles later, still receives a "Device Busy"
response on attempted accesses. Whenever the VAX CPU
detects a "Device Busy" response, it will wait a cycle,
and then will arbitrate for the bus in an attempt to
retry the same transfer. This continues until the CPU
receives an "Acknowledge" confirmation response or until
512 SBI cycles have occurred from the first transfer
attempt (in this case, the CPU will timeout and a Machine
Check exception will occur).

The CPU receives an "Error" confirmation to a "Command
Address" transfer. This usually means that the CPU has
requested a function that the NEXUS cannot perform.

1-55

The "TIMEOUT ADDRESS", ID Register #lA, latches the SBI
PHYSICAL Longword Address whenever an SBI CP Timeout occurs.
When using this ID register, be aware that ID #lA bits <27:00>
are bits <29:02> of the PHYSICAL BYTE ADDRESS. The SBI
address is a LONGWORD address. To convert to a BYTE Physical
address, simply insert two BINARY ZERO's to the right of the
least significant digit (first convert the LONGWORD S.B.I. address
from HEX format to BINARY format, then add two zeros to the right,
least significant digits, and then convert the result back to
HEX format).
The "TIMEOUT ADDRESS", ID #lA, does not latch the physical
SBI address for IB data timeouts, but ID #lA "may" still be valid.
The "TIMEOUT ADDRESS", ID Register #lA, is stored in
"(SP)+32" on a MACHINE CHECK logout. It is stored in
ID register #37 on the first error of a Double Error Halt.
Bits <27:00> of ID Register #lA, are Bits <29:02> of the
SBI Physical Byte Address. The SBI uses Longword Addresses.
Bits <31:30> contain the "MODE" of the reference and Bit 29
flags whether or not a hardware protection check was done.
Instruction Buff er accesses should always be "reads" in order
to obtain instruction stream data. Therefore, they should always
be to a memory location or ISP ROM location.
ID register #19 identifies the type of error that occurred. If
Bit 12=1 a CP timeout occurred and Bits <11:10> identify the type
of timeout. If Bit 06=1 an !B timeout occurred and Bits <5:4>
identify the type of timeout that occurred. If Bit 08=1 the error
was due to an Error Confirmation as a result of a CP reference.
If Bit 03=1 the error was due to an Error Confirmation as a result
of an IB reference.
ID register #19 also contains some other bits that may be of
interest. Bit 13 flags the fact that a multiple bit error occurred
in memory and that the data received by the VAX CPU is bad.
Bit 7 flags the fact that a multiple bit error occurred in memory
while fetching data for the Instruction Buffer (IB).
Bit 2 flags a Multiple CP error, (another error occurred before the
first error was cleared).

Problem areas:
CPU SBI interface.
CPU Memory/CACHE control.
Memory.
Any Nexus.
Power.
SBI cables.

1-56

ID #19
3 3 2 2
1 0 9 8

- SBI Error Register

2 2 2 2

1 1 1 1

7 6 5 4

3 2 1 0

9 8 7 6

5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

RDS Interrupt Enable

Bit <15>
********

Enable interrupts for Read Data Substitute (Bad Data) errors.
Bit <14>
********

CRD

Received corrected read data (CRD) from memory.
Bit <13>
********

RDS

Received read data substitute (RDS) from memory.
Bits <12:10>
************
If 12 = 1,
cycle.
12

l
1
1
l

0
0

1
1

Bit <08>
********

l
0
1

CP Timeout Status
indicates a timeout occurred as a result of a CP requested

"No Device Response" timeout.
"Device Busy" ti~eout.
"Waiting for Read Data" timeout.
Impossible code.

CP SBI Error Confirmation

Set when the CP requested cycle received an error confirmation to
a command address transfer.

Bit <07>
********

IB RDS

Read data substitute {RDS) data was received from memory on an
IB data· request.

1-57

Bits <06:04>
************

IB Timeout Status

If bit <06>=1, a timeout occurred on an IB requested cycle.
06

1
1
1
1

0
0
1
1

0
1
0
1

Bit <03>
********

"No Device Response" timeout.
"Device Busy" timeout.
"Waiting for Read Data" timeout.
Impossible code.

IB SBI Error Confirmation

Set when an IB requested cycle receives an error confirmation.

Bit <02>
********

Multiple CP Error

Set with pending CP timeout or CP SBI error confirmation not
serviced.

Bit <01>
********

SBI Not Busy

1-58

ID #IA
3 3 2 2

2 2 2 2
7 6 5 4

1 0 9 8

2 2 2 2
3 2 1 0

- Timeout Address Register
l 1 1 l
9 8 7 6

1 l l 1
5 4 3 2

1 l 0 0
1 0 9 8

0 0 0 0
7 6 5 4

Latches the SBI PHYSICAL LONGWORD Address on an SBI Timeout.
latch for IB data timeouts.

Bits <31:30>

0 0 0 0
3 2 1 0

Will not

Mode

************
31

0
0

1
1

Kernel mode
Executive mode
Supervisor mode
User mode

0
1

Bit <29>

Protection Check

********
Equal to a zero for references not subject to a hardware protection
check.

Bits <27:00>

SBI Physical Longword Address

************
Contains the latched Physical Address bits <29:02> of the SBI Physical
address.
<27:00>

PA<29:02>

1-59

Note:

A written step by step procedure on how to break down Physical
VAX BYTE addresses follows these bit breakdown charts.

Breaking down PHYSICAL BYTE ADDRESSES
NEXUS Register Offset if
If <29>=1 & <20>=1 -->I
I
I
<29>=1 & <20>=0.
MBZ if <29>=1 & <20>=01
I
I
Adapter #
I
I
I<- MBZ if <29>=1 ->I
I
I
I
I
1 1 0 0
0 0 0 0
2 2
2 2 2 2
2 2 2 2
1 1 1 1
1 1 1 1
0 0 0 0
7 6 5 4
1 0 9 8
9 8
7 6 5 4
3 2 1 0
9 8 7 6
5 4 3 2
3 2 1 0
"l<------->I
I
I
I
I
I
TR Levt:!l
I
I
I
I
I
"
I
1-------- If <29>=1 & <20>=0
0 = MEMORY Array Addr. I
I
I
1 = I/0 Address
l<-------MBZ if <29>=1 & <20>=0
I
I
If <29>=1 & <20>=1 this is a UNIBUS ADAPTER Address.
If <29>=1 & <20>=0 this is a NEXUS Register Address.

MEMORY ARRAY Physical Byte Addresses
OOOOOOOO:lFFFFFFF
I<------------ 64KB Array # --->I
I<------ 256KB Array # ---->I
I<-- 1 MB Array # --->I
I
I
2 2
2 2 2 2
2 2 2 2
1 1 1 1
1 1 1 1
1 1 0 0
0 0 0 0
0 0 0 0
9 8
7 6 5 4
3 2 1 0
9 8 7 6
5 4 3 2
1 0 9 8
7 6 5 4
3 2 1 0
"I<------------------------- Memory Array address ---------------------->!
I
0

NEXUS Physical Byte Addresses
20002000:2001FFFF
2 2

2 2 2 2
6 5 4

9 8

" "
I I
1 0

/'\..

I I I I
0 0 0 0

2 2 2 2

1 1 1 1

3 2 1 0
" "

9 8 7 6

I I I I
0 0 0 0

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

" ""I
I
I
I I I I <---1 --->I<---- Register Offset ------->!
0 0 0
I
1-- Hex representation of NEXUS TR Level
\

1-60

UNIBUS Physical Byte Addresses
20100000:201FFFFF
2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

I I

I I I I

1 0

0 0 0 0

I I I I
0 0 0 1

2 2
9 8

1 1 1 1
1 1 1 1
1 1 0 0
0 0 0 0
0 0 0 0
9 8 7 6
5 4 3 2
1 0 9 8
7 6 5 4
3 2 1 0
I
I<-- 18 Bit UNIBUS Address in HEX format -->I
l<->I
I
UNIBUS ADAPTER number

A maximum of 4 DW780 controllers, and therefore a maximum of 4 UNIBUSes,
are supported on the VAX-11/780 system. Jumpers on the DW780 backplanes
select the "UNIBUS Adapter #" for the associated UNIBUS.

RH780 External Register Physical Byte Addresses

2 2 2 2
7 6 5 4

3 2 1 0

RH780
l<-TR # ->I
I
I
1 1 1 1
1 1 1 1
5 4 3 2
9 8 7 6

200xx400:200xx7FC
xx = RH780 TR Level
2 2
9 8

I I

1 0

I I I I
0 0 0 0

2 2 2 2
A

I I I I
0 0 0 0

I I I
0 0 0

I
0

Drive number
I

r---r

1 1 0 0
1 0 9 8
A

I I
0 1

0 0 0 0
0 0 0 0
7 6 5 4
3 2 1 0
l<---1--->I
I
Register number

Offsets (in bits <12:0>) from 400 thru 7FC are External Drive registers.

RH780 Internal Register Physical Byte Addresses
200xx000:200xx3FC
and
200xx800:200xxFCO

xx
RH780
i<-TR # ->i

I
2 2
9 8

2 2 2 2
7 6 5 4
"' "'

I I
1 0

I I I I
0 0 0 0

2 2 2 2
3 2 1 0
A

= RH780 TR Level

1 1 1 1

1 1 0 0
0 0 0 0
0 0 0 0
5 4 3 2
1 0 9 8
7 6 5 4
3 2 1 0
!<----------------------------->!
I Register Byte offset. Bits
I
I
<12:10> must not = 001~
I

9 8 7 6

I I I I
0 0 0 0

I I I
0 0 0

Offsets of 000 thru 3FC are internal registers, except MAP registers.
Offsets of 800 thru FCO are internal MAP registers.

1-61

Physical Byte Address breakdown procedure:
The 30 bit VAX Physical address spaces is broken into two equal parts.
The upper 512 Megabytes of address space is called I/0 space and is
used to address NEXUS, UNIBUS, and MASSBUS registers. The lower 512
Megabytes is used to address Physical Memory Arrays. The address space
is broken down as follows:
lFFFFFFF
3FFFFFFF

00000000
20000000

Physical Memory array addresses
Physical I/0 register & I/0 memory space.

The first step in breaking down a PHYSICAL BYTE ADDRESS is to determine
if the address is an I/0 or MEMORY ARRAY address. This is done by
checking the state of PA bit <29>.
PA<29>
1 indicates that the address is an I/O address.
PA<2"9> = 0 indicates that the address is a MEMORY ARRAY address.

PA bit <29>

= 0

- Physical Memory Array address

The address is a Memory ARRAY address if PA<29>=0. The system
configuration must be known in order to determine what array is being
addressed. Further on in this section are several pages of charts and
procedure that can be used to determine what addresses correspond to what
physical array.

PA bit <29>

= 1

- Physical I/O address

Use the following procedure to breakdown a Physical I/0 address.
1.

"PA Bit <29>" must be a 1 to indicate that the address is a
VAX I/0 address.
If "PA Bit <29> = O" the address is a Physical
MEMORY address, and the remainder of this procedure cannot be
used.

If PA Bit <29>=1 then PA Bits <28:21> must be zeros.
address is illegal.

Check "PA Bit <20>" and proceed as indicated:

1-62

If not, the

PA bit <20>

= 1

If "PA Bit <20> = l", the I/0 address is in a "UNIBUS ADAPTER'S"
address region, and the following procedure can be used to find out
what UNIBUS ADAPTER and UNIBUS DEVICE is being addressed:
a. "PA bits <19:18>" indicate the "UNIBUS ADAPTER number".
b. "PA bits <17:00>" contain the 18-bit UNIBUS DEVICE address.

NOTE: "UNIBUS ADAPTER" does not ref er to which DW780 but indicates which
"UNIBUS" is being referenced. In other words, the UNIBUS ADAPTER
number is not an indication of how the "TR Level" jumpers are set
for a DW780, but indicate how DW780 backplane jumpers "Wl & W2"
are configured for the controlling DW780

PA bit <20>

= 0

If "PA bit <20> = O", the I/0 address is a NEXUS Registers or MASSBUS
Drive register address.
In both cases, "PA<l6:13>" will contain
the "TR Level" of the NEXUS being addressed. The system
configuration must be known in order to determine if the address
is a NEXUS Register or MASSBUS Drive register address.
If PA Bit <29>=1 & PA Bit <20>=0, then PA Bit <17> and PA Bits <19:18>
must be zero. If they do not, the address is illegal.
If "PA bits <16:13>" indicate an RH780 address, use the following
procedure to determine if the address is for an RH780 NEXUS
register or for an associated MASSBUS Drive register:
a.

If "PA bits <12:10> do not = l", then "PA<l2:00>" contain
the offset address for an RH780 (Internal) register.

If "PA bit <12:10> = l", then "PA bits <9:7>" indicate the
MASSBUS Drive addressed, and "PA bits <6:2>" indicate the
register (EXTERNAL MASSBUS register) addressed.

1-63

1/0 ADDRESS Ranges
NEXUS
TR level

"LONGWORD" range

"BYTE" range

---------------~----------------------------------------------

0 (see note)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Note:

20001FFF
20003FFF
20005FFF
20007FFF
20009FFF
2000BFFF
2000DFFF
2000FFFF
20011FFF
20013FFF
20015FFF
20017FFF
20019FFF
2001BFFF
2001DFFF
2001FFFF

"TR#O address space" is not assigned to any NEXUS.
unused address space.

This is

DW780
Adapter

NEXUS
CODE

28
29
2A
2B

2
3

NOTE:

80007FF
8000FFF
80017FF
8001FFF
80027FF
8002FFF
80037FF
8003FFF
80047FF
8004FFF
80057FF
8005FFF
80067FF
8006FFF
80077FF
8007FFF

8000000
8000800
8001000
8001800
8002000
8002800
8003000
8003800
8004000
8004800
8005000
8005800
8006000
8006800
8007000
8007800

20000000
20002000
20004000
20006000
20008000
2000AOOO
2000COOO
2000EOOO
20010000
20012000
20014000
20016000
20018000
2001AOOO
2001COOO
2001EOOO

"Longword" Address ranges
for UNIBUS devices
8040000
8050000
8060000
8070000

804FFFF
805FFFF
806FFFF
807FFFF

"BYTE" Address ranges
for UNIBUS devices
20100000
20140000
20180000
201COOOO

2013FFFF
2017FFFF
201BFFFF
201FFFFF

Adapter numbers are assigned by DW780 backplane jumpers and do
not have to correspond to any TR level scheme.
The ADAPTER #
simply indicates a particular UNIBUS.

Unused "LONGWORD" Address

Unused

"BYTE" Address Ranges

20000000 - 20001FFF
20020000 - 200FFFFF
20200000 - 3FFFFFFF

8000000 - 80007FF
8008000 - 803FFFF
8080000 - FFFFFFF

Physical Memory Array Address range
"Byte" Address range

"Longword" Address range

00000000 - lFFFFFFF

0000000 - 7FFFFFF
1-64

DW780 Register offsets
Reg.
Name

Longword
Byte
offset offset

Reg.
Name

Longword
Byte
off set off set

CNF GR
UBACR
UBASR
OCR
FMER
FU BAR
FMER
FU BAR
BRSVRO
BRSVRl
BRSVR2
BRSVR3
BRRVR4
BRRVR5
BRRVR6
BRRVR7
DPRO
DPRl
DPR2
DPR3
DPR4
DPRS
DPR6
DPR7
DPR8
DPR9
DPRlO
DPRll
DPR12
DPR13
DPR14
DPR15
resvd

000
004
008

MR13
MR14
MR15
MR16
MR17
MR18
MR19
MR20
MR22
MR23
MR24
MR25
MR26
MR27
MR28
MR29
MR30
MR31
MR32
MR33
MR34
MR35
MR36
MR37

830
834
838
83C
840
844
848
84C
850
854
858
85c
860
864
868
86C
870
874
878
87C
880
884
888

-----------------------

----------------------

resvd
MRO
MRl
MR3
MR4
MRS
MR6
MR7
MRS
MR9
MRlO
MRll
MR12

ooc
010
014
018
OlC
020
024
028
02C
030
034
038
03C
040
044
048
04C
050
054
058
05C
060
064

06B

06C
070
074
078
07C
080
7EC
800
804

BOB
BOC
810
814
818
81C
820
824
828
82C

000
001
002
003
004
005
006
007
008
009
OOA
OOB

ooc

OOD
OOE
OOF
010
Oll
012
013
014
015
016
017
018
019
OlA
OlB
OlC
010
OlE
OlF
020

MR480
MR481
MR482
MR4B3
MR484
MR485
MR486
MR4B7
MR488
MR489
MR490
MR491
MR492
MR493
MR494
MR495
resvd

lFF
200
201
202
203
204
205
206
207
208
209
20A
208

resvd

1-65

BBC

20C
200
20E
20F
210
211
212
213
214
215
216
217
218
219
21A
21B
21C
210
21E
21F
220
221
222
223

F80
F84
F88
F8C
F90
F94
.F98
F9C
FAO
FA4
FAB
FAC
FBO
FB4
FBB
FBC
FCO

3EO
3El
3E2
3E3
3E4
3E5
3E6
3E7
3E8
3E9
3EA
3EB
3EC
3ED
3EE
3EF
3FO

FFC

3FF

RH780 Internal Register offsets
Longword
Byte
offset offset

Reg.
Name

Byte
Longword
off set offset

CNF GR
000
000
004·
001
MBACR
MBASR
oos
002
003
MBAVAR ooc
004
MB AB CR 010
MBADR
014
005
MBASMR 018
006
007
MBACAR OlC
resvd
(and MASSBUS Registers)
resvd
200
MRO
800
201
804
MRl
202
SOB
MRl
BOC
203
MR2
204
810
MR3

MR65
MR66
MR67
MR6S
MR69
MR70
MR71
MR72
MR73
MR74
MR75
MR76
MR77
MR78
MR79
MRSO
MR81
MR82
MR83
MR84
MR85

SFC
900
904
90S
90C
910
914
918
91C
920
924
92S
92C
930
934
938
93C
940
944
948
94C

23F
240
241
242
243
244
245
246
247
248
249
24A
24B
24C
240
24E
24F
250
251
252
253

MR467
MR468
MR469
MR470
MR471
MR472
MR473
MR474
MR475
MR476
MR477
MR478
MR479
MR480

F4C
F50
F54
F58
FSC
F60
F64
F6S
F6C
F70
F74
F7S
F7C
FSO

303
3D4
3D5
3D6
3D7
3D8
3D9
30A
30B
30C
300
30E
3DF
3EO

MR491
MR492
MR493
MR494
MR495

FBO
FB4
FB8
FBC
FCO

3EC
3EO
3EE
3EF
3FO

Reg.
Name

----------------------

MR37
MR38
MR39
MR40
MR41
MR42
MR43
MR44
MR45
MR46
MR47
MR48
MR49
MRSO
MRSl
MR52
MR53
MR54
MR55
MR56
MR57
MR58
MR59
MR60
MR61
MR62
MR63
MR64

SSC
890
S94
S98
89C
SAO
8A4
SAS
SAC
8BO
8B4
8B8
SBC
SCO
SC4

aca
ace

8DO
804
808
SOC
SEO
8E4
8E8
SEC
8FO
8F4
8F8

223
224
225
226
227
228
229
22A
22B
22C
22D
22E
22F
230
231
232
233
234
235
236
237
238
239
23A
23B
23C
230
23E

-----------------------

If PA<lO>=l then the register is a "MASSBUS" (external) register.
The "MASSBUS Register Offsets" are on the next page.

1-66

RH780 MASSBUS (EXTERNAL) Register offsets
Reg.
No.
0
1
2
3
4
5
6
7
8
9
A
B

D
E
F
10
11

12
13
14
15
16
17
18
19
lA
18
lC
lD
lE
lF
Reg.#
0
1
2
3
4

5
6
7

8
9
A

D
E
F

#0
0
4
8

c
10
14
18
lC
20
24
28
2C
30
34
38
3C
40
44
48
4C
50
54
58
5C
60
64
68
6C
70
74
78
7C

"Offsets for MASSBUS register of Drives 0 thru 7"
I #4
I #5
I #6
I #3
I
I #1 I #2
200
280
300
100
180
80
204
284
184
304
84
104
208
288
308
188
108
88
20C
28C
30C
100
18C
SC
190
210
290
310
100
90
214
294
100
194
314
94
218
298
100
198
318
98
19C
21C
29C
100
31C
9C
2AO
lAO
220
AO
100
320
1A4
224
2A4
A4
100
324
100
1A8
228
2A8
328
A8
lAC
22C
2AC
AC
100
32C
2BO
100
lBO
230
330
BO
284
1B4
234
84
100
334
100
1B8
238
288
88
338
2BC
lBC
23C
BC
100
33C
2CO
co
100
lCO
240
340
100
1C4
244
2C4
344
C4
ca
100
1C8
248
2C8
348
lCC
24C
2CC
cc
100
34C
DO
2DO
100
lDO
250
350
2D4
1D4
254
D4
100
354
D8
100
1D8
258
2D8
358
2DC
DC
100
lDC
25C
35C
EO
100
lEO
260
2EO
360
2E4
E4
1E4
264
100
364
E8
100
1E8
268
2E8
368
EC
lEC
2EC
100
26C
36C
FO
100
lFO
270
2FO
370
274
F4
100
1F4
2F4
374
1F8
F8
100
278
2F8
378
FC
100
lFC
27C
2FC
37C

RPOx
CSl

RMOx
RMCSl

RMDS

ERl
MR
AS
DA
DT
LA
SN
OFF
DCA
CCA
ER2
ER3
ECCPOS
ECCPAT

RMERl
RMMRl
RMAS
RMDA
RMDT
RMLA
RMSN
RMOF
RMOC
RONR
RMMR2
RMER2
RMECl
RMEC2

TE16
CSl
DS
ER
MR
AS
FC
DT

SN
TC

1-67

#7
380
384
388
38C
390
394
398
39C
3AO
3A4
3A8
3AC
3BO
3B4
3B8
3BC
3CO
3C4
3C8
3CC
3DO
3D4
3D8
3DC
3EO
3E4
3E8
3EC
3FO
3F4
3F8
3FC

Memory Array Address Bit breakdown
Operand
Length
Boundaries

Array
Boundaries
PA Bit

2 2 2 2
7 6 5 4

2 2
9 8

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0
A

Longword _ I I I
Word I I
Byte _ I

1 Mb I
I
I
256 Kb. I
1 = I/0 space
64 - Kb
0 = Phy. Mem. space
<28:16> = 64KB array number
<28:18> = 256KB array number
<28:20> = lMegaByte array number

Physical Address bits 0 & 1 are not used on the SBI. All addresses to
Nexus devices are Longword addresses, (only Physical Address bits
<29:02> are used on the SBI).
The "SBI MASK" field is used to specify which byte(s) are to be
referenced within a Longword.
There is a total of 1 GigaByte of Physical address space.
is broken up into two equal sections.

This space

5i2 Megabyte of Physical MEMORY Address Space,
512 Megabyte of Physical I/0 Address Space

"Timeout Address" ID register bit breakdown
Bit ->3 3 2 2
1 0 9 8
A

2 2 2 2
7 6 5 4

1 1 1 1
9 8 7 6

1 1 1 1

5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

I
I
I<---------- Physical Address Bits <29:02> ------------------>!

I I I
I I I
I I I

2 2 2 2
3 2 1 0

(ID #IA)

Protection Check specifier value

Mode

1-68

Physical "BYTE" Address Space. - 64KB boundries
000.00 Megabyte
00000000 00010000 00020000 00030000 000.25 Megabyte
00040000 00050000 00060000 00070000 000.50 Megabyte
00080000 00090000 OOOAOOOO 00080000 000.75 Megabyte
ooocoooo 00000000 OOOEOOOO OOOFOOOO 001. 00 Megabyte
00100000 00110000 00120000 00130000 001. 25 Megabyte
00140000 00150000 00160000 00170000 001.50 Megabyte
00180000 00190000 OOlAOOOO OOlBOOOO 001. 75 Megabyte
OOlCOOOO 00100000 OOlEOOOO -

OOOOFFFF
OOOlFFFF
0002FFFF
0003FFFF
0004FFFF
0005FFFF
0006FFFF
0007FFFF
0008FFFF
0009FFFF
OOOAFFFF
0008FFFF
OOOCFFFF
OOOOFFFF
OOOEFFFF
OOOFFFFF
OOlOFFFF
OOllFFFF
0012FFFF
0013FFFF
0014FFFF
0015FFFF
0016FFFF
0017FFFF
0018FFFF
0019FFFF
OQlAFFFF
OOlBFFFF

OOlCFFFF
OOlOFFFF
OOlEFFFF
OOlFOOOO - OOlFFFFF
002.00 Megabyte
00200000 - 0020FFFF
00210000 - 0021FFFF
00220000 - 0022FFFF
00230000 - 0023FFFF
002.25 Megabyte
00240000 - 0024FFFF
00250000 - 0025FFFF
00260000 - 0026FFFF
00270000 - 0027FFFF
002.50 Megabyte
00280000 - 0028FFFF
00290000 - 0029FFFF
002A0000 - 002AFFFF
00280000 - 002BFFFF

005.50 Megabyte
002.75 Megabyte
002C0000 - 002CFFFF
00580000 - 0058FFFF
00200000 - 0020FFFF
00590000 - 0059FFFF
002EOOOO - 002EFFFF
005A0000 - 005AFFFF
002FOOOO - 002FFFFF
00580000 - 0058FFFF
005.75 Megabyte
003.00 Megabyte
005COOOO - 005CFFFF
00300000 - 0030FFFF
00500000 - 0050FFFF
00310000 - 0031FFFF
005EOOOO - 005EFFFF
00320000 - 0032FFFF
005FOOOO - 005FFFFF
00330000 - 0033FFFF
006.00 Megabyte
003.25 Megabyte
00600000 - 0060FFFF
00340000 - 0034FFFF
00610000 - 0061FFFF
00350000 - 0035FFFF
00620000 - 0062FFFF
00360000 - 0036FFFF
00370000 - 0037FFFF
00630000 - 0063FFFF
006.25 Megabyte
003.50 Megabyte
00380000 - 0038FFFF
00640000 - 0064FFFF
00650000 - 0065FFFF
00390000 - 0039FFFF
00660000 - 0066FFFF
003A0000 - 003AFFFF
00670000 - 0067FFFF
00380000 - 0038FFFF
006.50 Megabyte
003.75 Megabyte
00680000 - 0068FFFF
003COOOO - 003CFFFF
00690000 - 0069FFFF
00300000 - 0030FFFF
006AOOOO - 006AFFFF
003EOOOO - 003EFFFF
00680000 - 0068FFFF
003FOOOO - 003FFFFF
006.75 Megabyte
004.00 Megabyte
006C0000 - 006CFFFF
00400000 - 0040FFFF
00600000 - 0060FFFF
00410000 - 0041FFFF
006EOOOO - 006EFFFF
00420000 - 0042FFFF
006FOOOO - 006FFFFF
00430000 - 0043FFFF
007.00 Megabyte
004.25 Megabyte
00700000 - 0070FFFF
00440000 - 0044FFFF
00710000 - 0071FFFF
00450000 - 0045FFFF
00720000 - 0072FFFF
00460000 - 0046FFFF
00730000 - 0073FFFF
00470000 - 0047FFFF
007.25 Megabyte
004.50 Megabyte
00740000 - 0074FFFF
00480000 - 0048FFFF
00750000 - 0075FFFF
00490000 - 0049FFFF
00760000 - 0076FFFF
004AOOOO - 004AFFFF
00770000 - 0077FFFF
004BOOOO - 004BFFFF
007.50 Megabyte
004.75 Megabyte
00780000 - 0078FFFF
004COOOO - 004CFFFF
00790000 - 0079FFFF
00400000 - 0040FFFF
007AOOOO - 007AFFFF
004EOOOO - 004EFFFF
007BOOOO - 0078FFFF
004FOOOO - 004FFFFF
007.75 Megabyte
005.00 Megabyte
007COOOO - 007CFFFF
00500000 - 0050FFFF
00700000 - 007DFFFF
00510000 - 0051FFFF
007EOOOO - 007EFFFF
00520000 - 0052FFFF
007FOOOO - 007FFFFF
00530000 - 0053FFFF
008.00 Megabyte
005.25 Megabyte
00800000 - 0080FFFF
00540000 - 0054FFFF
00810000 - 0081FFFF
00550000 - 0055FFFF
00820000 - 0082FFFF
00560000 - 0056FEFF
00830000 - 0083FFFF
00570000 - 0057FFFF

1-69

Physical "BYTE" Address Space - 64KB boundries
013. 75 Megabyte
011. 00 Megabyte
008.25 Megabyte
00800000 - 0080FFFF
OOOCOOOO - OOOCFFFF
00840000 - 0084FFFF
00810000 - 0081FFFF
00000000 - OOOOFFFF
00850000 - 0085FFFF
00820000 - 0082FFFF
OOOEOOOO - OOOEFFFF
00860000 - 0086FFFF
OOOFOOOO - OOOFFFFF
00830000 - 0083FFFF
00870000 - 0087FFFF
014.00 Megabyte
Oll. 25 Megabyte
008.50Megabyte
OOEOOOOO - OOEOFFFF
00840000 - 0084FFFF
00880000 - 0088FFFF
OOElOOOO - OOElFFFF
00850000 - 0085FFFF
00890000 - 0089FFFF
OOE20000 - OOE2FFFF
00860000 - 0086FFFF
008A0000 - 008AFFFF
OOE30000 - OOE3FFFF
00870000 - 0087FFFF
00880000 - 0088FFFF
014.25 Megabyte
Oll.50 Megabyte
008.75 Megabyte
OOE40000 - OOE4FFFF
00880000 - OOB8FFFF
000coooo - 008CFFFF
OOE50000 - OOE5FFFF
00890000 - 0089FFFF
00800000 - 0080FFFF
OOE60000 - OOE6FFFF
OOBAOOOO - OOBAFFFF
008EOOOO - 008EFFFF
OOE70000 - OOE7FFFF
OOBBOOOO - OOB8FFFF
008FOOOO - 008FFFFF
014.50 Megabyte
0 ll. 7 5 Megabyte
009.00 Megabyte
OOBCOOOO - 008CFFFF
OOE80000 - OOE8FFFF
00900000 - 0090FFFF
OOBOOOOO - OOBOFFFF
OOE90000 - OOE9FFFF
00910000 - 0091FFFF
OOEAOOOO - OOEAFFFF
008EOOOO - OOBEFFFF
00920000 - 0092FFFF
OOEBOOOO - OOEBFFFF
008FOOOO - OOBFFFFF
0093000.0 - 0093FFFF
014. 75 Megabyte
012.00 Megabyte
009.25 Megabyte
OOECOOOO - OOECFFFF
OOCOOOOO - OOCOFFFF
00940000 - 0094FFFF
OOEOOOOO - OOEOFFFF
OOClOOOO - OOClFFFF
00950000 - 0095FFFF
OOEEOOOO - OOEEFFFF
OOC20000 - OOC2FFFF
00960000 - 0096FFFF
OOEFOOOO - OOEFFFFF
OOC30000 - OOC3FFFF
00970000 - 0097FFFF
015.00 Megabyte
012.25 Megabyte
009.50 Megabyte
OOFOOOOO - OOFOFFFF
OOC40000 - OOC4FFFF
00980000 - 0098FFFF
OOFlOOOO - OOFlFFFF
OOC50000 - OOC5FFFF
00990000 - 0099FFFF
OOF20000 - OOF2FFFF
OOC60000 - OOC6FFFF
009A0000 - 009AFFFF
OOC70000 - OOC7FFFF
OOF30000 - OOF3FFFF
00980000 - 009BFFFF
015.25 Megabyte
012.50 Megabyte
889. 75 Megabyte
OOF40000 - OOF4FFFF
OOC80000 - OOC8FFFF
009COOOO - 009CFFFF
OOF50000 - OOF5FFFF
OOC90000 - OOC9FFFF
00900000 - 0090FFFF
OOF60000 - OOF6FFFF
OOCAOOOO - OOCAFFFF
009EOOOO - 009EFFFF
OOCBOOOO - OOCBFFFF
OOF70000 - OOF7FFFF
009FOOOO - 009FFFFF
015.50 Megabyte
012.75 Megabyte
010. 00 Megabyte
OOF80000 - OOF8FFFF
OOCCOOOO - OOCCFFFF
OOAOOOOO - OOAOFFFF
OOF90000 - OOF9FFFF
OOCOOOOO - OOCOFFFF
OOAlOOOO - OOAlFFFF
OOFAOOOO - OOFAFFFF
OOCEOOOO - OOCEFFFF
OOA20000 - 00A2FFFF
OOFBOOOO - OOF8FFFF
OOCFOOOO - OOCFFFFF
OOA30000 - 00A3FFFF
015.75 Megabyte
013.00 Megabyte
010.25 Megabyte
OOFCOOOO - OOFCFFFF
00000000 - OOOOFFFF
OOA40000 - 00A4FFFF
OOFOOOOO - OOFOFFFF
00010000 - OOOlFFFF
OOA50000 - OOA5FFFF
OOFEOOOO - OOFEFFFF
00020000 - 0002FFFF
OOA60000 - 00A6FFFF
OOFFOOOO - OOFFFFFF
00030000 - 0003FFFF
OOA70000 - OOA7FFFF
016.00 Megabyte
013.25 Megabyte
010.50 Megabyte
01000000 - OlOOFFFF
00040000 - 0004FFFF
OOA80000 - 00A8FFFF
01010000 - 0101FFFF
00050000 - 0005FFFF
OOA90000 - 00A9FFFF
01020000 - 0102FFFF
00060000 - 0006FFFF
OOAAOOOO - OOAAFFFF
01030000 - 0103FFFF
00070000 - 0007FFFF
OOA80000 - OOABFFFF
016.25 Megabyte
013.50 Megabyte
010.75 Megabyte
01040000 - 0 04FFFF
00080000 - 0008FFFF
OOACOOOO - OOACFFFF
01050000 - 0 05FFFF
00090000 - 0009FFFF
OOAOOOOO - OOAOFFFF
01060000 - 0 06FFFF
OOOAOOOO - OODAFFFF
OOAEOOOO - OOAEFFFF
01070000 - 0 07FFFF
00080000 - OOD8FFFF
OOAFOOOO - OOAFFFFF

1-70

Physical "BYTE" Address Space - 256KB boundries
016.0 Megabyte
01000000 01040000 01080000 OlOCOOOO 017.0 Megabyte
01100000 01140000 01180000 OllCOOOO 018.0 Megabyte
01200000 01240000 01280000 012COOOO 019.0 Megabyte
01300000 01340000 01380000 013COOOO 020.0 Megabyte
01400000 01440000 01480000 014COOOO 021. 0 Megabyte
01500000 01540000 01580000 015COOOO 022.0 Megabyte
01600000 01640000 01680000 016COOOO 023.0 Megabyte
01700000 01740000 01780000 017COOOO 024.0 Megabyte
01800000 01840000 01880000 018COOOO 025.0 Megabyte
01900000 01940000 01980000 019COOOO -

036.0 Megabyte
026.0 Megabyte
02400000 OlAOOOOO - 01A3FFFF
02440000 01A40000 - 01A7FFFF
02480000 01A80000 - OlABFFFF
024COOOO OlACOOOO - OlAFFFFF
037.0 Megabyte
027.0 Megabyte
02500000 OlBOOOOO - 01B3FFFF
0113FFFF
02540000 01B40000 - 01B7FFFF
0117FFFF
02580000 01B80000 - OlBBFFFF
OllBFFFF
025COOOO OlBCOOOO - OlBFFFFF
OllFFFFF
038.0 Megabyte
028.0 Megabyte
02600000 OlCOOOOO - 01C3FFFF
0123FFFF
02640000 01C40000 - 01C7FFFF
0127FFFF
02680000 01C80000 - OlCBFFFF
012BFFFF
026COOOO OlCCOOOO - OlCFFFFF
012FFFFF
039.0 Megabyte
029.0 Megabyte
02700000 01000000 - 0103FFFF
0133FFFF
02740000 01040000 - 0107FFFF
0137FFFF
02780000 01080000 - OlOBFFFF
013BFFFF
027COOOO OlOCOOOO - OlOFFFFF
013FFFFF
040.0 Megatyte
030.0 Megabyte
02800000 OlEOOOOO - 01E3FFFF
0143FFFF
02840000 01E40000 - 01E7FFFF
0147FFFF
02880000 01E80000 - OlEBFFFF
014BFFFF
028COOOO OlECOOOO - OlEFFFFF
014FFFFF
041. 0 Megabyte
031. 0 Megabyte
02900000 OlFOOOOO - 01F3FFFF
0153FFFF
02940000 01F40000 - 01F3FFFF
0157FFFF
02980000 01F80000 - OlFBFFFF
015BFFFF
029COOOO OlFCOOOO - OlFFFFFF·
015FFFFF
042.0 Megabyte
032.0 Megabyte
02A00000 02000000 - 0203FFFF
0163FFFF
02A40000 02040000 - 0207FFFF
0167FFFF
02A80000 02080000 - 020BFFFF
016BFFFF
02AC0000 020COOOO - 020FFFFF
016FFFFF
043.0 Megabyte
033.0 Megabyte
02BOOOOO 02100000 - 0213FFFF
0173FFFF
02840000 02140000 - 0217FFFF
0177FFFF
02880000 02180000 - 021BFFFF
017BFFFF
02BCOOOO 021COOOO - 021FFFFF
017FFFFF
044.0 Megabyte
034.0 Megabyte
02COOOOO 02200000 - 0223FFFF
0183FFFF
02C40000 02240000 - 0227FFFF
0187FFFF
02C80000 02280000 - 022BFFFF
018BFFFF
02CCOOOO 022COOOO - 022FFFFF
018FFFFF
045.0 Megabyte
035.0 Megabyte
02000000 02300000 - 0233FFFF
0193FFFF
02040000 0197FFFF
02340000 - 0237FFFF
02080000 02380000 - 023BFFFF
019BFFFF
020COOOO 023COOOO - 023FFFFF
019FFFFF

0103FFFF
0107FFFF
OlOBFFFF
OlOFFFFF

1-71

0243FFFF
0247FFFF
024BFFFF
024FFFFF
0253FFFF
0257FFFF
025BFFFF
025FFFFF
0263FFFF
0267FFFF
026BFFFF
026FFFFF
0273FFFF
0277FFFF
027BFFFF
027FOOOO
0283FFFF
0287FFFF
028BFFFF
028FFFFF
0293FFFF
0297FFFF
029BFFFF
029FFFFF
02A3FFFF
02A7FFFF
02ABFFFF
02AFFFFF
02B3FFFF
02B7FFFF
02BBFFFF
02BFFFFF
02C3FFFF
02C7FFF'F
02CBFFFF
02CFFFFF
0203FFFF
0207FFFF
020BFFFF
020FFFFF

Physical "BYTE" Address Space - 256KB boundries
046.0 Megabyte
02EOOOOO 02E40000 02E80000 02ECOOOO 047.0 Megabyte
02FOOOOO 02F40000 02F80000 02FCOOOO 048.0 Megabyte
03000000 03040000 03080000 030COOOO 049.0 Megabyte
03100000 03140000 03180000 031COOOO 050.0 Megabyte
03200000 03240000 03280000 032COOOO 051. O Megabyte
03300000 03340000 03380000 033COOOO 052.0 Megabyte
03400000 03440000 03480000 034COOOO -

02E3FFFF
02E7FFFF
02EBFFFF
02EFFFFF
02F3FFFF
02F7FFFF
02F8FFFF
02FFFFFF
0303FFFF
0307FFFF
0308FFFF
030FFFFF
0313FFFF
0317FFFF
031BFFFF
031FFFFF
0323FFFF
0327FFFF
032BFFFF
032FFFFF
0333FFFF
0337FFFF
033BFFFF
033FFFFF

059.0 Megabyte
053.0 Megabyte
03500000 - 0353FFFF
03800000 - 03B3FFFF
03540000 - 0357FFFF
03840000 - 03B7FFFF
03580000 - 035BFFFF
03880000 - 0388FFFF
035COOOO - 035FFFFF
03BCOOOO - 03BFFFFF
060.0 Megabyte
054.0 Megabyte
03600000 - 0363FFFF
03COOOOO - 03C3FFFF
03640000 - 0367FFFF
03C40000 - 03C7FFFF
03680000 - 0368FFFF
03C80000 - 03C8FFFF
036COOOO - 036FFFFF
03CCOOOO - 03CFFFFF
061. 0 Megabyte
055.0 Megabyte
03700000 - 0373FFFF
03000000 - 0303FFFF
03740000 - 0377FFFF
03040000 - 0307FFFF
03780000 - 0378FFFF
03080000 - 0308FFFF
037COOOO - 037FFFFF
030COOOO - 030FFFFF
056.0 Megabyte
062.0 Megabyte
03800000 - 0383FFFF
03EOOOOO - 03E3FFFF
03840000 - 0387FFFF
03E40000 - 03E7FFFF
03880000 - 0388FFFF
03E80000 - 03EBFFFF
038COOOO - 038FFFFF
03ECOOOO - 03EFFFFF
057.0 Megabyte
063.0 Megabyte
03FOOOOO - 03F3FFFF
03900000 - 0393FFFF
03940000 - 0397FFFF
03F40000 - 03F7FFFF
03980000 - 039BFFFF
03F80000 - 03F8FFFF
039COOOO - 039FFFFF
03FCOOOO - 03FFFFFF
058.0 Megabyte
064.0 Megabyte
03A00000 - 03A3FFFF
04000000 - 0403FFFF
03A40000 - 03A7FFFF
04040000 - 0407FFFF
03A80000 - 03ABFFFF
04080000 - 0408FFFF
03ACOOOO - 03AFFFFF
040COOOO - 040FFFFF

0343FFFF
0347FFFF
034BFFFF
034FFFFF

1-72

Physical "BYTE" Address Space - lMB boundries
000 Megabyte
00000000 00100000 00200000 00300000 00400000 005 Megabyte
00500000 00600000 00700000 00800000 00900000 010 Megabyte
OOAOOOOO OOBOOOOO oocooooo OODOOOOO OOEOOOOO 015 Megabyte
OOFOOOOO
01000000 01100000 01200000 01300000 020 Megabyte
01400000 01500000 01600000 01700000 01800000 025 Megabyte
01900000 OlAOOOOO OlBOOOOO OlCOOOOO 01000000 030 Megabyte
OlEOOOOO OlFOOOOO 02000000 02100000 02200000 035 Megabyte
02300000 02400000 02500000 02600000 02700000 040 Megabyte
02800000 02900000 02AOOOOO
02BOOOOO 02COOOOO -

OOOFFFFF
OOlFFFFF
002FFFFF
003FFFFF
004FFFFF
005FFFFF
006FFFFF
007FFFFF
008FFFFF
009FFFFF
OOAFFFFF
OOBFFFFF
OOCFFFFF
OODFFFFF
OOEFFFFF
OOFFFFFF
OlOFFFFF
OllFFFFF
012FFFFF
013FFFFF
014FFFFF
015FFFFF
016FFFFF
017FFFFF
018FFFFF
019FFFFF
OiAFFFFF
OlBFFFFF
OlCFFFFF
OlDFFFFF
OlEFFFFF
OlFFFFFF
020FFFFF
021FFFFF
022FFFFF
023FFFFF
024FFFFF
025FFFFF
026FFFFF
027FFFFF
028FFFFF
029FFFFF
02AFFFFF
02BFFFFF
02CFFFFF

045 Megabyte
02000000 02EOOOOO 02FOOOOO 03000000 03100000 050 Megabyte
03200000 03300000 03400000 03500000 03600000 055 Megabyte
03700000 03800000 03900000 03AOOOOO 03800000 060 Megabyte
03COOOOO
03DOOOOO 03EOOOOO 03FOOOOO 04000000 065 Megabyte
04100000 04200000 04300000 04400000 04500000 070 Megabyte
04600000 04700000 04800000 04900000 04A00000 075 Megabyte
04800000 04COOOOO 04000000 04EOOOOO 04FOOOOO 080 Megabyte
05000000 05100000 05200000 05300000 05400000 085 Megabyte
05500000 05600000 05700000
05800000 05900000 -

1-73

090 Megabyte
05AOOOOO 05BOOOOO 05COOOOO 05DOOOOO 05EOOOOO 095 Megabyte
032FFFFF
05FOOOOO 033FFFFF
06000000 034FFFFF
06100000 035FFFFF
06200000 036FFFFF
06300000 100 Megabyte
037FFFFF
06400000 038FFFFF
06500000 039FFFFF
06600000 03AFFFFF
06700000 03BFFFFF
06800000 105 Megabyte
03CFFFFF
06900000
06AOOOOO 03DFFFFF
06BOOOOO 03EFFFFF
06COOOOO 03FFFFFF
040FFFFF
06DOOOOO llO Megabyte
06EOOOOO 041FFFFF
06FOOOOO 042FFFFF
07000000 043FFFFF
044FFFFF
07100000 045FFFFF
07200000 115 Megabyte
046FFFFF
07300000 047FFFFF
07400000 048FFFFF
07500000 07600000 049FFFFF
04AFFFFF
07700000 120 Megabyte
04BFFFFF
07800000 04CFFFFF
07900000 07AOOOOO 04DFFFFF
07BOOOOO 04EFFFFF
07COOOOO 04FFFFFF
12·5 Megabyte
07DOOOOO 050FFFFF
051FFFFF
07EOOOOO 052FFFFF
07FOOOOO 053FFFFF
08000000 054FFFFF
08100000 130 Megabyte
055FFFFF
08200000 056FFFFF
08300000 057FFFFF
08400000
058FFFFF
08500000 059FFFFF
08600000 02DFFFFF
02EFFFFF
02FFFFFF
030FFFFF
031FFFFF

05AFFFFF
05BFFFFF
05CFFFFF
05DFFFFF
05EFFFFF
05FFFFFF
060FFFFF
061FFFFF
062FFFFF
063FFFFF
064FFFFF
065FFFFF
066FFFFF
067FFFFF
068FFFFF
069FFFFF
06AFFFFF
06BFFFFF
06CFFFFF
06DFFFFF
06EFFFFF
06FFFFFF
070FFFFF
071FFFFF
072FFFFF
073FFFFF
074FFFFF
075FFFFF
076FFFFF
077FFFFF
078FFFFF
079FFFFF
07AFFFFF
07BFFFFF
07CFFFFF
07DFFFFF
07EFFFFF
07FFFFFF
080FFFFF
081FFFFF
082FFFFF
083FFFFF
084FFFFF
085FFFFF
086FFFFF

Physical "BYTE" Address Space - lMB boundries
135 Megabyte
08700000 08800000 08900000 08AOOOOO 08800000 140 Megabyte
08COOOOO 08000000 08EOOOOO 08FOOOOO 09000000 145 Megabyte
09100000 09200000 09300000 09400000 09500000 150 Megabyte
09600000 09700000 09800000 09900000 09AOOOOO 155 Megabyte
09800000 09COOOOO 09000000 09EOOOOO 09FOOOOO 160 Megabyte
OAOOOOOO OAlOOOOO 0A200000 0A300000 OA400000 165 Megabyte
0A500000 OA600000 0A700000 OA800000 0A900000 170 Megabyte
OAAOOOOO OABOOOOO OACOOOOO OAOOOOOO OAEOOOOO 175 Megabyte
OAFOOOOO 08000000 OBlOOOOO 08200000 08300000 -

087FFFFF
088FFFFF
089FFFFF
08AFFFFF
08BFFFFF
08CFFFFF
080FFFFF
08EFFFFF
08FFFFFF
090FFFFF
091FFFFF
092FFFFF
093FFFFF
094FFFFF
095FFFFF
096FFFFF
097FFFFF
098FFFFF
099FFFFF
09AFFFFF
098FFFFF
09CFFFFF
090FFFFF
09EFFFFF
09FFFFFF
OAOFFFFF
OAlFFFFF
0A2FFFFF
0A3FFFFF
0A4FFFFF
OASFFFFF
0A6FFFFF
OA7FFFFF
OA8FFFFF
OA9FFFFF
OAAFFFFF
OA8FFFFF
OACFFFFF
OADFFFFF
OAEFFFFF
OAFFFFFF
OBOFFFFF
OBlFFFFF
OB2FFFFF
OB3FFFFF

180 Megabyte
084.00000 08500000 08600000 08700000 08800000 185 Megabyte
08900000 08A00000 08800000 08COOOOO 08000000 190 Megabyte
08EOOOOO 08FOOOOO ocoooooo OClOOOOO OC200000 195 Megabyte
OC300000 OC400000 ocsooooo OC600000 OC700000 200 Megabyte
oc8ooooo OC900000 OCAOOOOO OCBOOOOO occooooo 205 Megabyte
OCOOOOOO OCEOOOOO OCFOOOOO 00000000 00100000 210 Megabyte
00200000 00300000 00400000 ODSOOOOO 00600000 215 Megabyte
00700000 OD800000 00900000 OOAOOOOO 00800000 220 Megabyte
OOCOOOOO OODOOOOO OOEOOOOO ODFOOOOO OEOOOOOO -

1-74

225 Megabyte
OElOOOOO OE200000 OE300000 OE400000 OE500000 230 Megabyte
089FFFFF
OE600000 OE700000 08AFFFFF
088FFFFF
OE800000 OE900000 08CFFFFF
OEAOOOOO 080FFFFF
235 Megabyte
OEBOOOOO 08EFFFFF
08FFFFFF
OECOOOOO OCOFFFFF
OEOOOOOO OEEOOOOO OClFFFFF
OEFOOOOO 0C2FFFFF
240 Megabyte
OFOOOOOO OC3FFFFF
OFlOOOOO OC4FFFFF
OF200000 OC5FFFFF
OC6FFFFF
OF300000 OF400000 OC7FFFFF
245 Megabyte
OF500000 OC8FFFFF
OC9FFFFF
OF600000 OF700000 OCAFFFFF
OF800000 OC8FFFFF
OCCFFFFF
OF900000 250 Megabyte
OCOFFFFF
OFAOOOOO OF800000 OCEFFFFF
OFCOOOOO OCFFFFFF
OFDOOOOO OOOFFFFF
OFEOOOOO OOlFFFFF
255 Megabyte
OFFOOOOO OD2FFFFF
10000000 003FFFFF
10100000 004FFFFF
10200000 005FFFFF
10300000 OD6FFFFF
260 Megabyte
OD7FFFFF
10400000 OD8FFF'FF
10500000 10600000 009FFFFF
10700000 ODAFFFFF
OD8FFFFF
10800000 265 Megabyte
ODCFFFFF
10900000 lOAOOOOO ODDFFFFF
ODEFFFFF
10800000 lOCOOOOO ODFFFFFF
OEOFFFFF
10000000 084FFFFF
085FFFFF
086FFFFF
087FFFFF
088FFFFF

OElFFFFF
OE2FFFFF
OE3FFFFF
OE4FFFFF
OE5FFFFF
OE6FFFFF
OE7FFFFF
OE8FFFFF
OE9FFFFF
OEAFFFFF
OE8FFFFF
OECFFFFF
OEOFFFFF
OEEFFFFF
OEFFFFFF
OFOFFFFF
OFlFFFFF
OF2FFFFF
OF3FFFFF
OF4FFFFF
OF5FFFFF
OF6FFFFF
OF7FFFFF
OF8FFFFF
OF9FFFFF
OFAFFFFF
OF8FFFFF
OFCFFFFF
OFOFFFFF
OFEFFFFF
OFFFFFFF
lOOFFFFF
101FFFFF
102FFFFF
103FFFFF
104FFFFF
105FFFFF
106FFFFF
107FFFFF
108FFFFF
109FFFFF
lOAFFFFF
lOBFFFFF
lOCFFFFF
lODFFFFF

Physical "BYTE" Address Space - 1MB boundries
270 Megabyte
lOEOOOOO lOFOOOOO 11000000 11100000 11200000 275 Megabyte
11300000 11400000 11500000 11600000 11700000 280 Megabyte
11800000 11900000 llAOOOOO 11800000 llCOOOOO 285 Megabyte
llDOOOOO llEOOOOO llFOOOOO 12000000 12100000 290 Megabyte
12200000
12300000 12400000 12500000 12600000 295 Megabyte
12700000 12800000 12900000 12A00000 12800000 300 Megabyte
12COOOOO 12DOOOOO 12EOOOOO 12FOOOOO 13000000 305 Megabyte
13100000 13200000 13300000 13400000 13500000 310 Megabyte
13600000 13700000 13800000 13900000 13A00000 -

360 Megabyte
315 Megabyte
16800000 - 168FFFFF
13800000 - 138FFFFF
13COOOOO - 13CFFFFF
16900000 - 169FFFFF
16AOOOOO - 16AFFFFF
13DOOOOO - 13DFFFFF
13EOOOOO - 13EFFFFF
16800000 - 168FFFFF
16COOOOO - 16CFFFFF
13FOOOOO - 13FFFFFF
320 Megabyte
365 Megabyte
16DOOOOO - 16DFFFFF
14000000 - 140FFFFF
113FFFFF
16EOOOOO - 16EFFFFF
14100000 - 141FFFFF
114FFFFF
16FOOOOO - 16FFFFFF
14200000 - 142FFFFF
115FFFFF
17000000 - 170FFFFF
14300000 - 143FFFFF
116FFFFF
17100000 - 171FFFFF
14400000 - 144FFFFF
117FFFFF
325 Megabyte
370 Megabyte
17200000 - 172FFFFF
118FFFFF
14500000 - 145FFFFF
119FFFFF
14600000 - 146FFFFF
17300000 - 173FFFFF
14700000 - 147FFFFF
17400000 - 174FFFFF
llAFFFFF
14800000 - 148FFFFF
17500000 - 175FFFFF
llBFFFFF
17600000 - 176FFFFF
llCFFFFF
14900000 - 149FFFFF
375 Megabyte
330 Megabyte
17700000 - 177FFFFF
14AOOOOO - 14AFFFFF
llDFFFFF
17800000 - 178FFFFF
llEFFFFF
14800000 - 14BFFFFF
14COOOOO - 14CFFFFF
17900000 - 179FFFFF
llFFFFFF
17A00000 - 17AFFFFF
120FFFFF
14000000 - 140FFFFF
14EOOOOO - 14EFFFFF
17800000 - 178FFFFF
121FFFFF
335 Megabyte
380 Megabyte
l 7COOcrcro-- -- 17CFFFFF
14F0-0-000 -- 14FFFF"FF 122FFFFF
15000000 - 150FFFFF
17000000 - 17DFFFFF
123FFFFF
17EOOOOO - 17EFFFFF
124FFFFF
15100000 - 151FFFFF
17FOOOOO - 17FFFFFF
15200000 - 152FFFFF
125FFFFF
15300000 - 153FFFFF
18000000 - 180FFFFF
126FFFFF
340 Megabyte
385 Megabyte
18100000 - 181FFFFF
127FFFFF
15400000 - 154FFFFF
18200000 - 182FFFFF
128FFFFF
15500000 - 155FFFFF
129FFFFF
15600000 - 156FFFFF
18300000 - 183FFFFF
18400000 - 184FFFFF
12AFFFFF
15700000 - 157FFFFF
18500000 - 185FFFFF
128FFFFF
15800000 - 158FFFFF
390 Megabyte
345 Megabyte
18600000 - 186FFFFF
12CFFFFF
15900000 - 159FFFFF
18700000 - 187FFFFF
15AOOOOO - 15AFFFFF
12DFFFFF
18800000 - 188FFFFF
12EFFFFF
15800000 - 158FFFFF
15COOOOO - 150FFFFF
18900000 - 189FFFFF
12FFFFFF
18A00000 - 18AFFFFF
15DOOOOO - 15DFFFFF
130FFFFF
350 Megabyte
395 Megabyte
18800000 - 188FFFFF
15EOOOOO - 15EFFFFF
131FFFFF
18COOOOO - 18CFFFFF
15FOOOOO - 15FFFFFF
132FFFFF
18000000 - 18DFFFFF
16000000 - 160FFFFF
133FFFFF
18EOOOOO - 18EFFFFF
134FFFFF
16100000 - 161FFFFF
18FOOOOO - 18FFFFFF
135FFFFF
16200000 - 162FFFFF
355 Megabyte
400 Megabyte
19000000 - 190FFFFF
16300000 - 163FFFFF
136FFFFF
19100000 - 191FFFFF
137FFFFF
16400000 - 164FFFF\F
19200000 - 192FFFFF
138FFFFF
16500000 - 165FFFFF
19300000 - 193FFFFF
139FFFFF
16600000 - 166FFFFF
16700000 - 167FFFFF
19400000 - 194FFFFF
13AFFFFF
lOEFFFFF
lOFFFFFF
llOFFFFF
lllFFFFF
112FFFFF

1-75

··--···-·· ···---

Physical "BYTE" Address Space - lMB boundries
405 Megabyte
19500000 19600000 19700000 19800000 19900000 410 Megabyte
19AOOOOO 19800000 19COOOOO 19DOOOOO 19EOOOOO 415 Megabyte
19FOOOOO lAOOOOOO lAlOOOOO 1A200000 1A300000 420 Megabyte
1A400000 1A500000 1A600000 1A700000 1A800000 425 Megabyte
1A900000 lAAOOOOO lABOOOOO lACOOOOO lAOOOOOO 430 Megabyte
lAEOOOOO lAFOOOOO 18000000 18100000 18200000 435 Megabyte
1B300000 18400000 18500000 18600000 1B700000 440 Megabyte
1B800000 18900000 lBAOOOOO lBBOOOOO lBCOOOOO 445 Megabyte
lBDOOOOO lBEOOOOO lBFOOOOO lCOOOOOO lClOOOOO -

195FFFFF
196FFFFF
197FFFFF
198FFFFF
199FFFFF
19AFFFFF
198FFFFF
19CFFFFF
19DFFFFF
19EFFFFF
19FFFFFF
lAOFFFFF
lAlFFFFF
1A2FFFFF
1A3FFFFF
J:A4FFFFF
1A5FFFFF
1A6FFFFF
lA7fFFFF
1A8FFFFF
1A9FFFFF
lAAFFFFF
lABFFFFF
lACFFFFF
lADFFFFF
lAEFFFFF
lAFFFFFF
180FFFFF
lBlFFFFF
1B2FFFFF
183FFFFF
1B4FFFFF
1B5FFFFF
1B6FFFFF
1B7FFFFF
1B8FFFFF
1B9FFFFF
lBAFFFFF
lBBFFFFF
lBCFFFFF
lBOFFFFF
lBEFFFFF
lBFFFFFF
lCOFFFFF
lClFFFFF

450 Megabyte
1C200000 1C300000 1C400000 1C500000 1C600000 455 Megabyte
1C700000 1C800000 1C900000 lCAOOOOO 1C800000 460 Megabyte
lCCOOOOO lCDOOOOO lCEOOOOO lCFOOOOO 10000000 465 Megabyte
10100000 10200000 1D300000 10400000 1D500000 470 Megabyte
1D600000 10700000 10800000 10900000 lOAOOOOO 475 Megabyte
lDBOOOOO lOCOOOOO 10000000 lOEOOOOO lOFOOOOO 480 Megabyte
lEOOOOOO lElOOOOO 1E200000 lEJOOOOO 1E400000 485 Megabyte
1E500000 1E600000 1E700000 1E800000 1E900000 490 Megabyte
lEAOOOOO 1E800000 lECOOOOO lEOOOOOO lEEOOOOO -

1-76

495 Megabyte
lEFOOOOO - lEFFFFFF
lFOOOOOO - lFOFFFFF
lFlOOOOO - lFlFFFFF
1F200000 - 1F2FFFFF
1F300000 - 1F3FFFFF
500 Megabyte
1C7FFFFF
1F400000 - 1F4FFFFF
1F500000 . .;. 1F5FFFFF
1C8FFFFF
1F600000 - 1F6FFFFF
1C9FFFFF
1F700000 - 1F7FFFFF
lCAFFFFF
1C8FFFFF
1F800000 - 1F8FFFFF
505 Megabyte
1F900000 - 1F9FFFFF
lCCFFFFF
lCDFFFFF
lFAOOOOO - lFAFFFFF
lCEFFFFF
1F800000 - 1F8FFFFF
lCFFFFFF
lFCOOOOO - lFCFFFFF
lOOFFFFF
lFDOOOOO - lFOFFFFF
510 Megabyte
lFEOOOOO - lFEFFFFF
lDlFFFFF
lFFOOOOO - lFFFFFFF
1D2FFFFF
1D3FFFFF
l04FFFFF
l05FFFFF
1C2FFFFF
1C3FFFFF
1C4FFFFF
1C5FFFFF
1C6FFFFF

1D6FFFFF
l07FFFFF
108FFFFF
1D9FFFFF
lOAFFFFF
1D8FFFFF
lOCFFFFF
lDOFFFFF
lOEFFFFF
lOFFFFFF
lEOFFFFF
lElFFFFF
1E2FFFFF
1E3FFFFF
1E4FFFFF
1E5FFFFF
1E6FFFFF
1E7FFFFF
1E8FFFFF
1E9FFFFF
lEAFFFFF
lEBFFFFF
lECFFFFF
lEOFFFFF
lEEFFFFF

Physical "Longword" Address Space 1 MB boundries
000 Megabyte
0000000 - 003FFFF
0040000 - 007FFFF
0080000 - OOBFFFF
oocoooo - OOFFFFF
004 Megabyte
0100000 - 013FFFF
0140000 - 017FFFF
0180000 - OlBFFFF
OlCOOOO - ~lFFFFF
008 Megabyte
0200000 - 023FFFF
0240000 - 027FFFF
0280000 - 02BFFFF
02COOOO - 02FFFFF
012 Megabyte
0300000 - 033FFFF
0340000 - 037FFFF
0380000 - 03BFFFF
03COOOO - 03FFFFF
016 Megabyte
0400000 - 043FFFF
0440000 - 047FFFF
0480000 - 04BFFFF
04COOOO - 04FFFFF
020 Megabyte
0500000 - 053FFFF
0540000 - 057FFFF
0580000 - 05BFFFF
05COOOO - 05FFFFF
024 Megabyte
0600000 - 063FFFF
0640000 - 067FFFF
0680000 - 0.6BFFFF
06COOOO - 06FFFFF
028 Megabyte
0700000 - 073FFFF
0740000 - 077FFFF
0780000 - 07BFFFF
07COOOO - 07FFFFF
032 Megabyte
0800000 - 083FFFF
0840000 - 087FFFF
0880000 - 08BFFFF
08COOOO - 08FFFFF
036 Megabyte
0900000 - 093FFFF
0940000 - 097FFFF
0980000 - 09BFFFF
09COOOO - 09FFFFF
040 Megabyte
OAOOOOO
0A3FFFF
OACOOOO - 0A7FFFF
OA80000 - OABFFFF
OACOOOO - OAFFFFF

044 Megabyte
OBOOOOO OB40000 OB80000 OBCOOOO 048 Megabyte
ocooooo OC40000 OC80000 -

occoooo

153FFFF
157FFFF
15BFFFF
15FFFFF

*** BEWARE ***
These are LONGWORD address
ranges,(not byte ranges).
(PA<29:02>) I (ID#lA<27:00>)

OC3FFFF
OC7FFFF
OCBFFFF
- OCFFFFF

052 Megabyte
ODOOOOO 0040000 0080000 ODCOOOO 056 Megabyte
OEOOOOO OE40000 OE80000 OECOOOO 060 Megabyte
OFOOOOO OF40000 OF80000 OFCOOOO 064 Megabyte
1000000 1040000 1080000 lOCOOOO 068 Megabyte
1100000 1140000 1180000 llCOOOO 072 Megabyte
1200000 1240000 1280000 12COOOO 076 Megabyte
1300000 1340000 1380000 13COOOO 080 Megabyte
1400000 1440000 1480000 14COOOO 084 Megabyte
1500000
1540000 1580000 15COOOO 1-77

143FFFF
147FFFF
14BFFFF
14FFFFF

088 Megabyte
1600000 1640000 1680000 16COOOO 092 Megabyte
1700000 1740000 1780000 17COOOO 096 Megabyte
1800000 1840000 1880000 18COOOO 100 Megabyte
1900000 1940000 1980000 19COOOO 104 Megabyte
lAOOOOO 1A40000 1A80000 lACOOOO 108 Megabyte
lBOOOOO 1840000 1880000 lBCOOOO 112 Megabyte
lCOOOOO 1C40000 1C80000 lCCOOOO 116 Megabyte
1000000 1040000 1080000 lDCOOOO 120 Megabyte
lEOOOOO 1E40000 1E80000 lECOOOO 124 Megabyte
lFOOOOO 1F40000 1F80000 lFCOOOO -

OB3FFFF
OB7FFFF
OBBFFFF
OBFFFFF

OD3FFFF
OD7FFFF
ODBFFFF
ODFFFFF
OE3FFFF
OE7FFFF
OEBFFFF
OEFFFFF
OF3FFFF
0F7FFFF
OFBFFFF
OFFFFFF
103FFFF
107FFFF
lOBFFFF
lOFFFFF
113FFFF
117FFFF
llBFFFF
llFFFFF
123FFFF
127FFFF
12BFFFF
12FFFFF
133FFFF
137FFFF
13BFFFF
13FFFFF

163FFFF
167FFFF
16BFFFF
16FFFFF
173FFFF
177FFFF
17BFFFF
17FFFFF
183FFFF
187FFFF
18BFFFF
18FFFFF
193FFFF
197FFFF
19BFFFF
19FFFFF
1A3FFFF
1A7FFFF
lABFFFF
lAFFFFF
1B3FFFF
1B7FFFF
lBBFFFF
lBFFFFF
1C3FFFF
1C7FFFF
lCBFFFF
lCFFFFF
1D3FFFF
1D7FFFF
lDBFFFF
lDFFFFF
1E3FFFF
1E7FFFF
lEBFFFF
lEFFFFF
1F3FFFF
1F7FFFF
lFBFFFF
lFFFFFF

Physical "Longword" Address Space 1 MB boundries
128 Megabyte
2000000 2040000 2080000 20COOOO 132 Megabyte
2100000 2140000 2180000 21COOOO 136 Megabyte
2200000 2240000 2280000 22COOOO 140 Megabyte
2300000 2340000 2380000 23COOOO 144 Megabyte
2400000 2440000 2480000 24COOOO 148 Megabyte
2500000 2540000 2580000 25COOOO 152 Megabyte
2600000 2640000 2680000 26COOOO 156 Megabyte
2700000 2740000 2780000 27COOOO 160 Megabyte
2800000 2840000 2880000 28COOOO 164 Megabyte
2900000 2940000 2980000 29COOOO 168 Megabyte
2AOOOOO 2AC0000 2A80000 2AC0000 -

203FFFF
207FFFF
20BFFFF
20FFFFF
213FFFF
217FFFF
21BFFFF
21FFFFF
223FFFF
227FFFF
228FFFF
22FFFFF
233FFFF
237FFFF
238FFFF
23FFFFF
243FFFF
247FFFF
248FFFF
24FFFFF
253FFFF
257FFFF
258FFFF
25FFFFF
263FFFF
267FFFF
26BFFFF
26FFFFF
273FFFF
277FFFF
27BFFFF
27FFFFF
283FFFF
287FFFF
28BFFFF
28FFFFF
293FFFF
297FFFF
29BFFFF
29FFFFF
2A3FFFF
2A7FFFF
2ABFFFF
2AFFFFF

172 Megabyte
2800000 2840000 2880000 2BCOOOO 176 Megabyte
2COOOOO 2C40000 2C80000 2CCOOOO 180 Megabyte
2000000 2040000 2080000 2DCOOOO 184 Megabyte
2EOOOOO 2E40000 2E80000 2ECOOOO 188 Megabyte
2FOOOOO 2F40000 2F80000 2FCOOOO 192 Megabyte
3000000 3040000 3080000 30COOOO 196 Megabyte
3100000 3140000 3180000 31COOOO 200 Megabyte
3200000 3240000 3280000 32COOOO 204 Megabyte
3300000 3340000 3380000 33COOOO 208 Megabyte
3400000 3440000 3480000 34COOOO 212 Megabyte
3500000 3540000 3580000 35COOOO -

1-78

343FFFF
347FFFF
348FFFF
34FFFFF

216 Megabyte
3600000 3640000 3680000 36COOOO 220 Megabyte
3700000 3740000 3780000 37COOOO 224 Megabyte
3800000 3840000 3880000 38COOOO 228 Megabyte
3900'000 3940000 3980000 39COOOO 232 Megabyte
3A00000 3A40000 3A80000 3AC0000 236 Megabyte
3800000 3840000 3880000 38COOOO 240 Megabyte
3COOOOO 3C40000 3C80000 3CCOOOO 244 Megabyte
3000000 3040000 3080000 3DCOOOO 248 Megabyte
3EOOOOO 3E40000 3E80000 3ECOOOO 252 Megabyte
3FOOOOO 3F40000 3F80000 3FCOOOO -

353FFFF
357FFFF
35BFFFF
35FFFFF

*** BEWARE ***
These are LONGWORD address
ranges,(not byte ranges).
(PA<29:02>) I (ID#lA<27:00>)

2B3FFFF
2B7FFFF
2BBFFFF
2BFFFFF
2C3FFFF
2C7FFFF
2CBFFFF
2CFFFFF
2D3FFFF
2D7FFFF
2D8FFFF
2DFFFFF
2E3FFFF
2E7FFFF
2E8FFFF
2EFFFFF
2F3FFFF
2F7FFFF
2F8FFFF
2FFFFFF
303FFFF
307FFFF
30BFFFF
30FFFFF
313FFFF
317FFFF
31BFFFF
31FFFFF
323FFFF
327FFFF
32BFFFF
32FFFFF
333FFFF
337FFFF
33BFFFF
33FFFFF

363FFFF
367FFFF
36BFFFF
36FFFFF
373FFFF
377FFFF
37BFFFF
37FFFFF
383FFFF
387FFFF
388FFFF
38FFFFF
393FFFF
397FFFF
398FFFF
39FFFFF
3A3FFFF
3A7FFFF
3A8FFFF
3AFFFFF
383FFFF
387FFFF
3BBFFFF
3BFFFFF
3C3FFFF
3C7FFFF
3CBFFFF
3CFFFFF
3D3FFFF
3D7FFFF
3DBFFFF
3DFFFFF
3E3FFFF
3E7FFFF
3EBFFFF
3EFFFFF
3F3FFFF
3F7FFFF
3FBFFFF
3FFFFFF

Physical "Longword" Address Space 1. MB boundries
256 Megabyte
4000000 4040000 4080000 40COOOO 260 Megabyte
4100000 4140000 4180000 41C0000 264 Megabyte
4200000 4240000 4280000 42COOOO 268 Megabyte
4300000 4340000 4380000 43COOOO 272 Megabyte
4400000 4440000 4480000 44COOOO 276 Megabyte
4500000 4540000 4580000 45COOOO 280 Megabyte
4600000 4640000 4680000 46C0000 284 Megabyte
4700000 4740000 4780000 47COOOO 288 Megabyte
4800000 4840000 4880000 48COOOO 292 Megabyte
4900000 4940000 4980000 49COOOO 296 Megabyte
4A00000 4ACOOOO 4A80000 4ACOOOO -

403FFFF
407FFFF
408FFFF
40FFFFF
413FFFF
417FFFF
41BFFFF
41FFFFF
423FFFF
427FFFF
42BFFFF
42FFFFF
433FFFF
437FFFF
438FFFF
43FFFFF
443FFFF
447FFFF
44BFFFF
44FFFFF
453FFFF
457FFFF
458FFFF
45FFFFF
463FFFF
467FFFF
46BFFFF
46FFFFF
473FFFF
477FFFF
478FFFF
47FFFFF
483FFFF
487FFFF
48BFFFF
48FFFFF
493FFFF
497FFFF
498FFFF
49FFFFF
4A3FFFF
4A7FFFF
4ABFFFF
4AFFFFF

300 Megabyte
4800000 4840000 4880000 48C0000 304 Megabyte
4COOOOO 4C40000 4C80000 4CCOOOO 308 Megabyte
4000000 4040000 4080000 40COOOO 312 Megabyte
4EOOOOO 4E40000 4E80000 4ECOOOO 316 Megabyte
4FOOOOO 4F40000 4F80000 4FCOOOO 320 Megabyte
5000000 5040000 5080000 50COOOO 324 Megabyte
5100000 5140000 5180000 51COOOO 328 Megabyte
5200000 5240000 5280000 52COOOO 332 Megabyte
5300000 5340000 5380000 53COOOO 336 Megabyte
5400000 5440000 5480000 54COOOO 340 Megabyte
5500000 5540000 5580000 55COOOO -

1-79

543FFFF
547FFFF
54BFFFF
54FFFFF

344 Megabyte
5600000 5640000 5680000 56COOOO 348 Megabyte
5700000 5740000 5780000 57COOOO 352 Megabyte
5800000 5840000 5880000 58COOOO 356 Megabyte
5900000 5940000 5980000 59COOOO 360 Megabyte
5AOOOOO 5A40000 5A80000 5AC0000 364 Megabyte
5800000 5840000 5880000 5BCOOOO 368 Megabyte
5COOOOO 5C40000 5C80000 5CCOOOO 372 Megabyte
5000000 5040000 5080000 50COOOO 376 Megabyte
5EOOOOO 5E40000 5E80000 5ECOOOO 380 Megabyte
5FOOOOO 5F40000 5F80000 SFCOOOO -

553FFFF
557FFFF
55BFFFF
55FFFFF

*** BEWARE ***
These are LONGWORD address
ranges,(not byte ranges).
(PA<29:02>) I (I0#1A<27:00>)

483FFFF
487FFFF
488FFFF
48FFFFF
4C3FFFF
4C7FFFF
4C8FFFF
4CFFFFF
403FFFF
407FFFF
408FFFF
4DFFFFF
4E3FFFF
4E7FFFF
4EBFFFF
4EFFFFF
4F3FFFF
4F7FFFF
4FBFFFF
4FFFFFF
53FFFFF
57FFFFF
58FFFFF
5FFFFFF
513FFFF
517FFFF
SlBFFFF
51FFFFF
523FFFF
527FFFF
52BFFFF
52FFFFF
533FFFF
537FFFF
538FFFF
53FFFFF

563FFFF
567FFFF
56BFFFF
56FFFFF
573FFFF
57FFFFF
578FFFF
57FFFFF
583FFFF
587FFFF
588FFFF
58FFFFF
593FFFF
597FFFF
598FFFF
59FFFFF
5A3FFFF
5A7FFFF
5ABFFFF
5AFFFFF
5B3FFFF
587FFFF
58BFFFF
5BFFFFF
5C3FFFF
5C7FFFF
5CBFFFF
5CFFFFF
503FFFF
507FFFF
50BFFFF
SOFFFFF
SE3FFFF
5E7FFFF
5E8FFFF
5EFFFFF
5F3FFFF
5F7FFFF
5FBFFFF
5FFFFFF

Physical "Longword" Address Space 1 MB bou ndries
384 Megabyte·
6000000 6040000 6080000 60COOOO 388 Megabyte
6100000 6140000 6180000 61COOOO 392 Megabyte
6200000 6240000 6280000 62COOOO 396 Megabyte
6300000 6340000 6380000 63COOOO 400 Megabyte
6400000 6440000 6480000 64COOOO 404 Megabyte
6500000 6540000 6580000 65COOOO 408 Megabyte
6600000 6640000 6680000 66COOOO 412 Megabyte
6700000 6740000 6780000 67COOOO 416 Megabyte
6800000 6840000 6880000 68COOOO 420 Megabyte
6900000 6940000 6980000 69COOOO 424 Megabyte
6A00000 6AC0000 6A80000 6AC0000 -

603FFFF
607FFFF
60BFFFF
60FFFFF
613FFFF
617FFFF
61BFFFF
61FFFFF
623FFFF
627FFFF
62BFFFF
62FFFFF
633FFFF
637FFFF
63BFFFF
63FFFFF
643FFFF
647FFFF
64BFFFF
64FFFFF
653FFFF
657FFFF
65BFFFF
65FFFFF
663FFFF
667FFFF
66BFFFF
66FFFFF
673FFFF
677FFFF
67BFFFF
67FFFFF
683F·FFF
687FFFF
68BFFFF
68FFFFF
693FFFF
697FFFF
69BFFFF
69FFFFF
6A3FFFF
6A7FFFF
6ABFFFF
6AFFFFF

428 Megabyte
6800000 - 6B3FFFF
6840000 - 6B7FFFF
6880000 - 6BBFFFF
6BCOOOO - 6BFFFFF
432 Megabyte
6C00000 - 6C3FFFF
6C40000 - 6C7FFFF
6C80000 - 6CBFFFF
6CCOOOO - 6CFFFFF
436 Megabyte
6000000 - 603FFFF
6040000 - 607FFFF
6080000 - 60BFFFF
60COOOO - 60FFFFF
440 Megabyte
6EOOOOO - 6E3FFFF
6E40000 - 6E7FFFF
6E80000 - 6EBFFFF
6ECOOOO- 6EFFFFF
444 Megabyte
6FOOOOO - 6F3FFFF
6F40000 - 6F7FFFF
6F80000 - 6FBFFFF
6FCOOOO - 6FFFFFF
448 Megabyte
7000000 - 703FFFF
7040000 - 707FFFF
7080000 - 70BFFFF
70COOOO - 70FFFFF
452 Megabyte
7100000 - 713FFFF
7140000 - 717FFFF
7180000 - 71BFFFF
71COOOO - 71FFFFF
456 Megabyte
7200000 - 723FFFF
7240000 - 727FFFF
7280000 - 72BFFFF
72COOOO - 72FFFFF
460 Megabyte
7300000 - 733.FFFF
7340000 - 737FFFF
7380000 - 73BFFFF
73COOOO - 73FFFFF
464 Megabyte
7400000 - 743FFFF
7440000 - 747FFFF
7480000 - 74BFFFF
74COOOO - 74FFFFF
468 Megabyte
7500000 - 753FFFF
7540000 - 757FFFF
7580000 - 75BFFFF
75COOOO - 75FFFFF

1-80

472 Megabyte
7600000 7640000 7680000 76COOOO 476 Megabyte
7700000 7740000 7780000 77COOOO 480 Megabyt
7800000 7840000 7880000 78COOOO 484 Megabyte
7900000 7940000 7980000 79COOOO 488 Megabyte
7A00000 7A40000 7A80000 7ACOOOO 492 Megabyte
7800000 7840000 7880000 7BCOOOO 496 Megabyte
7C00000 7C40000 7C80000 7CC0000 500 Megabyte
7000000 7040000 7080000 70COOOO 504 Megabyte
7EOOOOO 7E40000 7E80000 7ECOOOO 508 Megabyte
7FOOOOO 7F40000 7F80000 7FCOOOO -

763FFFF
767FFFF
76BFFFF
76FFFFF
773FFFF
777FFFF
77BFFFF
77FFFFF
783FFFF
787FFFF
78BFFFF
78FFFFF
793FFFF
797FFFF
79BFFFF
79FFFFF
7A3FFFF
7A7FFFF
7ABFFFF
7AFFFFF
7B3FFFF
7B7FFFF
7BBFFFF
7BFFFFF
7C3FFFF
7C7FFFF
7CBFFFF
7CFFFFF
7D3FFFF
707FFFF
7DBFFFF
70FFFFF
7E3FFFF
7E7FFFF
7EBFFFF
7EFFFFF
7F3FFFF
7F7FFFF
7FBFFFF
7FFFFFF

*** BEWARE ***
These are LONGWORD address
ranges,(not byte ranges).
(PA<29:02>) I (ID#lA<27:00>)

The following charts show the TIMEOUT ADDRESS (ID #lA) range for the
VAX NEXUS devices. The address ranges actually show the Longword Address
ranges for each device. The address shown in "ID #lA" bits <27:00> are
equal to the Physical address bits PA<29:02>, which is actually a Longword
address. The charts showing memory array address ranges assume that the
memories are not interleaved.

MS780C "0-4 Megabyte" /MS780A "0-1 Megabyte" ("LONGWORD" ranges)
Array

Slot

0
1
2
3
4
5
6
7
8
9
A
B

17
16
15
14
13
12
11
10
9
8
7
6

4
3
2

c
E

MS780C
M8210 Arrays

MS780A
M8211 Arrays

0000000 - OOOFFFF
0010000 - OOlFFFF
0020000 - 002FFFF
0030000 .;,,. 003FFFF
0040000 - 004FFFF
0050000 - 005FFFF
0060000 - 006FFFF
0070000 - 007FFFF
0080000 - 008FFFF
0090000 - 009FFFF
OOAOOOO - OOAFFFF
0080000 - OOBFFFF
oocoooo - OOCFFFF
0000000 - OOOFFFF
OOEOOOO
OOEFFFF
OOFOOOO - OOFFFFF

0000000 - 0003FFF
0004000 - 0007FFF
0008000 - OOOBFFF
ooocooo - OOOFFFF
0010000 - 0013FFF
0014000 - 0017FFF
0018000 - OOlBFFF
OOlCOOO - OOlFFFF
0020000 - 0023FFF
0024000 - 0027FFF
0028000 - 002BFFF
002COOO - 002FFFF
0030000 - 0033FFF
0034000 - 0037FFF
0038000
003BFFF
003COOO - 003FFFF

MS780C "4-8 Megabyte" /MS780A "1-2 Megabyte" ("LONGWORD" ranges)
Array

Slot

0
1
2
3
4
5
6
7
8
9
A
B

17
16
15
14
13
12
11
10

MS780C
M8210 Arrays

MS780A
M8211 Arrays

---------------------------------------------------------------------------

0
E
F

8
7
6
5
4
3
2

0100000
0110000
0120000
0130000
0140000
0150000
0160000
0170000
0180000
0190000
OlAOOOO
0180000
OlCOOOO
0100000
OlEOOOO
OlFOOOO

1-81

OlOFFFF
OllFFFF
012FFFF
013FFFF
014FFFF
015FFFF
016FFFF
017FFFF
018FFFF
019FFFF
OlAFFFF
OlBFFFF
OlCFFFF
OlOFFFF
OlEFFFF
OlFFFFF

0040000
0044000
0048000
004COOO
0050000
0054000
0058000

ooscooo

0060000
0064000
0068000
006COOO
0070000
0074000
0078000
007COOO

0043FFF
0047FFF
004BFFF
004FFFF
0053FFF
0057FFF
005BFFF
OOSFFFF
0063FFF
0067FFF
006BFFF
006FFFF
0073FFF
0077FFF
007BFFF
007FFFF

MA780A Array "Longword" Address Ranges

Array

Slot

0
1
2
3
4
5
6

7
6

5
4
3
2
1

Array

S1ot

0
1

8
7
6

2
3

5
6
7

MA780A
M8210 Arrays
O to 2 Megabyte
0000000 0010000 0020000 0030000 0040000 0050000 0060000 0070000 -

OOOFFFF
OOlFFFF
002FFFF
003FFFF
004FFFF
OOSFFFF
006FFFF
007FFFF

MA780A
M8210 Arrays
4 to 6 Megabyte
0100000
0110000
0120000
0130000
0140000
0150000
0160000
0170000

1-82

- OlOFFFF
- OllFFFF
- 012FFFF
- 013FFFF
- 014FFFF
- '015FFFF
- 016FFFF
- 017FFFF

MA780A
M8210 Arrays
2 to 4 Megabyte
0080000
0090000
OOAOOOO
OOBOOOO

oocoooo 0000000 OOEOOOO OOFOOOO -

008FFFF
009FFFF
OOAFFFF
OOBFFFF
OOCFFFF
OOOFFFF
OOEFFFF
OOFFFFF

MA780A
M8210 Arrays
6 to 8 Megabyte
0180000
0190000
OlAOOOO
OlBOOOO
OlCOOOO
0100000
OlEOOOO
OlFOOOO

018FFFF
019FFFF
OlAFFFF
OlBFFFF
OlCFFFF
OlOFFFF
OlEFFFF
OlFFFFF

MS780-E Array "Longword" Address Ranges

Internally Interleaved
A total of 16 Megabytes per MS780-E are possible when ·internally
interleaving.
In order to internal interleave the MS780-E, the following
configuration guidelines must be followed:
. Memory Controllers (M8375's) must be installed in slots 10 & 12 .
. Each controller must have the same amount of memory arrays, of the
same type and capacity, in their respective array slots .
. There cannot be any gaps between the arrays on each controller.
In
other words, the Lower Controller expands from slot 9 towards slot 2
while the Upper Controller expands from slot 13 towards slot 20.
When the MS780-E is configured with two controllers,
internally interleaved as follows:

the memory is

. The "Lower Controller's Arrays" contain the "EVEN Physical QUADWORD"
addresses, (Physical Address bit 3=0) .
. The "Upper Controller's Arrays" contain the "ODD Physical QUADWORD"
addresses, (Physical Address bit 3=1).

Array
LO

Ll
Ul
L2
U2
L3
U3
L4
U4
L5
U5
L6
U6
L7
U7

Slot

MS780-E
M8373 Arrays
0 to 16 Megabyte

0000000

007FFFF

13
8
14

0080000

OOFFFFF

0100000

017FFFF

0180000

OlFFFFF

0200000

027FFFF

15
6
16
5
17
4
18
3
19
2
20

0280000 - 02FFFFF
0300000

037FFFF

0380000

03FFFFF

L = Lower Controller's Array

u = Upper Controller's Array
PA3 = Physical Address bit 3

1-83

MS780-E
M8373 Arrays
16 to 32 Megabyte
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)

0400000

047FFFF

0480000

04FFFFF

0500000 - 057FFFF
0580000

05FFFFF

0600000 - 067FFFF
0680000 - 06FFFFF
0700000 - 077FFFF
0780000 - 07FFFFF

MS780-E Array "Longword" Address Ranges (cont'd)

No Internal Interleaving
The MS780-E may be operated in NO INTERNAL INTERLEAVING mode but the total
amount of memory per MS780-E is reduced to-a total of 8 Megabytes. This
mode of operation is accomplished whenever the following configuration
guidelines are followed:
There is only one Memory Controller (M8375) installed in the
MS780-E backplane. This controller can be installed in either
slot 10 or 12 (slot 10 is preferred).
If the memory controller is installed in slot 10, the memory array
modules must be installed in slots 9 through 2 only. No memory
arrays are to be installed in slots 13 through 20.
If the memory controller is installed in slot 12, the memory array
modules must be installed in slots 13 through 20 only. No memory
arrays are to be installed in slots 9 through 2.
The memory arrays must be installed with no gaps between arrays and
no gap between the memory controller and the first array.

Array

Slot

MS780-E
M8373 Arrays
0 to 8 Megabyte

0
1
2
3
4

9 or 13
8 or 14
7 or 15
6 or 16
5 or 17
4 or 18
3 or 19
2 or 20

0000000 - 003FFFF
0040000 - 007FFFF
0080000 - OOBFFFF
oocoooo - OOFFFFF
0100000 - 013FFFF
0140000 - 017FFFF
0180000 - OlBFFFF
OlCOOOO - OlFFFFF

MS780-E
M8373 Arrays
8 to 16 Megabyte

0200000
0240000
0280000
02COOOO
0300000
0340000
0380000
03COOOO

---------------------------------------------------------------------------

6
7

- 023FFFF
- 027FFFF
- 02BFFFF
- 02FFFFF
- 033FFFF
- 037FFFF
- 03BFFFF
- 03FFFFF

In the above chart, the slot of the array depends upon which memory
controller is installed. Slots 2 through 9 are used if the Memory
Controller is in slot 10, and slots 13 through 20 are used if the
Memory Controller is in slot 12.

1-84

MS780-E Array "Longword" Address Ranges

(cont'd)

Externally Interleaved
A total of 16 Megabytes are possible when externally interleaving two
MS780-E controllers.
In order to externally interleave 2 MS780-E memory
backplanes, the following configuration guidelines must be followed:
. Both memory backplanes must be configured to operate in the
non internal interleaved mode .
. Both memory subsystems must have the same amount of memory arrays, of
the same type and capacity, and in corresponding slot locations .
. Both memory subsystems must have the same assigned starting address .
. The memory subsystems must have adjacent "TR Levels" assigned to
them .
. "Bit <O>" of both memory subsystems' "CNFG A register" must be
set prior to memory usage.
When two MS780-E's are configured for EXTERNAL interleaving, the following
rules are used to determine what address are located in what memory .
. The Memory Subsystem assigned the "Lower TR Level" contains the "EVEN
Quadword" addresses .
. The Memory Subsystem assigned the "Higher TR Level" contains the "ODD
Quadword" addresses.

Array

Slot

MS780-E
M8373 Arrays
0 to 16 Megabyte

9/13

0000000 - 007FFFF

uo
Ll
Ul
L2
U2
L3
U3
L4
U4
L5
U5
L6
U6
L7
U7

9/13
8/14
8/14
7/15
7 /15
6/16
6/16
5/17

0080000 - OOFFFFF
0100000

017FFFF

0180000 - OlFFFFF
0200000

027FFFF

5/17

4/18
4/18
3/19
3/19

0280000 - 02FFFFF

2/20
2/20

0380000 - 03FFFFF

0300000 - 037FFFF

(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=1)
(PA3=0)
(PA3=l)
(PA3=0)
(.?A3=:)

Memory Subsystem with the Lower assighed "TR :=...evel".
Memory Subsystem with t:.he Higher assigned "TR =-.evel".
PA3 = Physical Address bit 3
L

1-85

Converting a

Take the UNIBUS address and drop off the 2 least significant
"binary" bits (Unibus address bits <1:0> are not used).

"UNIBUS_Byte (Octal Format) Address" to a
"VAX (Hex Format) Longword" address

17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
use these binary bits for conversion
I not I
used

Change the Unibus address bits <17:02> to a Hexadecimal number
by breaking the "binary" representation of these address bits
into 4-bit sections. Do not use address bits <1:0>.

I 17 16 15 14 I 13 12 11 10 I 09 08 07 06 I 05 04 03 02 I

Using the hexadecimal number converted in steps 1 and 2, add it
to one of the following DW780 Adapter Base addresses (which one
you use depends on which DW780 the UNIBUS device resides).

DW780
Adapter

DW780 Unibus Space
Longword Base Address
8040000
8050000
8060000
8070000

0
1

2
3

The resulting hexadecimal number (should be 7 hexadecimal digits
in length) is the SBI Longword address that is used to access
the UNIBUS address just converted for that particular Adapter's
UNIBUS. This is the address that will be stored in the
"TIMEOUT ADDRESS" {ID #lA) register on a CP Timeout. If you
want to find out what the Physical Byte address is, simply convert
the Longword address by adding two binary zeros as the least
significant bits and then reconvert back to hexadecimal.

1-86

Converting a "VAX LONGWORD (Hex Format)" address to a
"UNIBUS BYTE (Octal Format)" address
1.

First of all, you must make sure that you have an SB! address
that is assigned to a DW780 Adapters' Unibus space. Check to see
that the address falls in one of the following ranges:
Adapter #0 SBI UNIBUS Address Space
Adapter #1 SBI UNIBUS-Address-Space
Adapter #2 SBI UNIBUS-Address-Space
Adapter #3 SBI UNIBUS=Address=Space

8040000
8050000
8060000
8070000

thru 804FFFF
thru 805FFFF
thru 806FFFF
thru 807FFFF

If the address to be converted falls in one of these ranges, then
you do have a VAX Physical Longword Unibus address.
Drop off the 3 most significant digits (804, 805, 806, or 807),
and use the remaining four digits to find the equivalent UNIBUS
18-bit octal address.

!<----------------

SBI "Longword_Hex" Address -------------------->!
I
2 2 2 2
2 2 2 2
1 1 1 1
1 1 1 1
1 1 0 0
0 0 0 0
0 0 0 0
7 6 5 4
3 2 1 0
7 6 5 4
9 8 7 6
5 4 3 2
1 0 9 8
3 2 1 0
I
I
I
I<----- Adapter Base ------->!<- UNIBUS 18-bit HEX LONGWORD Addr. ->I

Change these four HEX digits (the digits labeled "UNIBUS 18-bit
HEX LONGWORD Address" in the diagram above) to their BINARY
representation. You should now have 16 binary digits written down.

Add two binary zeros to the least significant end (far right end)
of this BINARY number. This will change the "UNIBUS LONGWORD address"
to a "UNIBUS BYTE address". You should now have 18 binary bits
written down with the last two digits on the right being zeros.

Convert the result back to octal by breaking up into three digit
sections= You should end up with six octal digits. This is the
"UNIBUS BYTE address" in octal representation.

1-87

Converting "VAX PHYSICAL BYTE (Hex Format)" address to
"UNIBUS (Octal Format)" address
1.

First of all, you must make sure that you have a Physical Byte address
that is assigned to one of the DW780 Adapters' UNIBUS space. Check to
see that the address falls in one of the following ranges:
Adapter #0 UNIBUS Byte Address space
Adapter #1 UNIBUS-Byte-Address space
Adapter #2 UNIBUS-Byte-Address space
Adapter #3 UNIBUS=Byte=Address space

20100000
20140000
20180000
201COOOO

thru 2013FFFF
thru 2017FFFF
thru 201BFFFF
thru 201FFFFF

If the address to be converted falls in one of these ranges, then you
do have a VAX (hex) Physical Byte UNIBUS address.
Extract the 18 least significant digits from this address. These 18
bits represent the HEX representation of the UNIBUS address.

!<---------------I

3 3 2 2

2 2 2 2

1 0 9 8

7 6 5 4

VAX Physical Byte UNIBUS Address

---------------->!

2 2 2 2
3 2 1 0

0 0 0 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

7 6 5 4

I
0 0 0 0
3 2 1 0

!<----- Adapter Base --------->!<-- UNIBUS 18-Bit HEX BYTE Address --->I
3.

Change these 5 HEX digits (the digits labeled "UNIBUT 18-Bit HE~ BYTE
Address" in the diagram above) to their BINARY representation. 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0

Now, break this BINARY representation up into 3 bit sections so as
to convert to OCTAL representation.
1 1 1 *
7 6 5 *

1 1 l *
4 3 2 *

1 1 0 *
1 0 9 *

0 0 0 *
8 7 6 *

0 0 0 *
5 4 3 *

Read this broken up Binary representation in OCTAL.
the UNIBUS BYTE address in OCTAL representation.

1-88

0 0 0
2 l 0
The result is

Converting a "UNIBUS Octai_BYTE" Address to a
"VAX Hex PHYSICAL BYTE" Address
-

Take the OCTAL UNIBUS BYTE Address and change it to its BINARY
representation~
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0

Now change this BINARY representation, of the UNIBUS BYTE Address, to
its HEX representation by breaking up the Binary rep~esentation into
4 digit sections (you must start with the least significant digit <00>
and work towards the most significant digit <17>).

*
*

1 1
7 6

*
*

1 1 0 0
1 0 9 8

*
*

0 0 0 0
7 6 5 4

*
*

0 0 0 0
3 2 1 0

Add the appropriate DW780 UNIBUS Adapter Base Address onto the resultant
HEX number converted in the preceeding step. -The following chart shows
the Adapter_Base_Addresses for the 4 possible DW780 adapters.
Adapter #0
Adapter #2

1 1 1 1
5 4 3 2

20100000
20180000

Adapter #1
Adapter #3

20140000
201COOOO

The resultant HEX number is the HEX representation of the VAX PHYSICAL
BYTE UNIBUS Address.
20lx0000
+

yyyyy
20lzzzzz

<--- UNIBUS Space Base nf desired DW780 Adapter

<--- Hex representation of UNIBUS address
<--- HEX representation of the UNIBUS Address
converted to a VAX PHYSICAL BYTE-UNIBUS Address.

1-89

Equivalent DW780 Adapter "Longword" address
#2
#3
#1

UNIBUS device
Address

760010
760020
760030
760040
760050
760060
760070
760100
760110
760120
760130
760140
760150
760160
760170
760200
760210
760220
760230
760240
760250
760260
760270
760300
760310
760320
760330
760340
760350
760360
760370
760400
760410
760420
760430
760440
760450

804F802
804F804
804F806
804F808
804F80A
804F80C
804F80E
804F810
804F812
804F814
804F816
804F818
804F81A
804F81C
804F81E
804F820
804F822
804F824
804F826
804F828
804F82A
804F82C
804F82E
804F830
804F832
804F834
804F836
804F838
804F83A
804F83C
804F83E
804F840
804F842
804F844
804F846
804F848
804F84A

805F802
805F804
805F806
805F808
805F80A
805F80C
805F80E
805F810
805F812
805F814
805F816
805F818
805F81A
805F81C
805F81E
805F820
805F822
805F824
805F826
805F828
805F82A
805F82C
805F82E
805F830
805F832
805F834
805F836
805F838
805F83A
805F83C
805F83E
805F840
805F842
805F844
805F846
805F848
805F84A

806F802
806F804
806F806
806F808
806F80A
806F80C
806F80E
806F810
806F812
806F814
806F816
806F818
806F81A
806F81C
806F81E
806F820
806F822
806F824
806F826
806F828
806F82A
806F82C
806F82E
806F830
806F832
806F834
806F836
806F838
806F83A
806F83C
806F83E
806F840
806F842
806F844
806F846
806F848
806F84A

807F802
807F804
807F806
807F808
807F80A
807F80C
807F80E
807F810
807F812
807F814
807F816
807F818
807F81A
807F81C
807F81E
807F820
807F822
807F824
807F826
807F828
807F82A
807F82C
807F82E
807F830
807F832
807F834
807F836
807F838
807F83A
807F83C
807F83E
807F840
807F842
807F844
807F846
807F848
807F84A

764004
764014
764024

804FA01
804FA03
804FA05

805FA01
805FA03
805FA05

806FA01
806FA03
806FA05

807FA01
807FA03
807FA05

770460

804FC4C

805FC4C

806FC4C

807FC4C

772410

804FD42

805FD42

806FD42

807FD42

774400

804FE40

805FE40

806FE40

807FE40

777160

804FF9C

805FF9C

806FF9C

807FF9C

777440

804FFC8

805FFC8

806FFC8

807FFC8

777514

804FFD3

805FFD3

806FFD3

807FFD3

---------------------------------------------------------------------------

1-90

Equivalent DW780 Adapter "BYTE" address
#2
#1

UNIBUS device
Address

2013E008
2013E010
2013E018
2013E020
2013E028
2013E030
2013E038
2013E040
2013E048
2013E050
2013E058
2013E060
2013E068
2013E070
2013E078
2013E080
2013E088
2013E090
2013E098
2013EOAO
2013EOA8
2013EOBO
2013EOB8
2013EOCO
2013EOC8
2013EODO
2013EOD8
2013EOEO
2013EOE8
2013EOFO
20.13EOF8
2013El00
2013El08
2013Ell0
2013Ell8
2013El20
2013El28

2017E008
2017E010
2017E018
2017E020
2017E028
2017E030
2017E038
2017E040
2017E048
2017E050
2017E058
2017E060
2017E068
2017E070
2017E078
2017E080
2017E088
2017E090
2017E098
2017EOAO
2017EOA8
2017EOBO
2017EOB8
2017EOCO
2017EOC8
2017EODO
2017EOD8
2017EOEO
2017EOE8
2017EOFO
2017EOF8
2017El00
2017El08
2017Ell0
2017Ell8
2017El20
2017El28

201BE008
201BE010
201BE018
201BE020
201BE028
201BE030
201BE038
201BE040
201BE048
201BE050
201BE058
201BE060
201BE068
201BE070
201BE078
201BE080
201BE088
201BE090
201BE098
201BEOAO
201BEOA8
201BEOBO
201BEOB8
201BEOCO
201BEOC8
201BEODO
201BEOD8
201BEOEO
201BEOE8
201BEOFO
201BEOF8
201BE100
201BE108
201BE110
201BE118
201BE120
201BE128

201FE008
201FE010
201FE018
201FE020
201FE028
201FE030
201FE038
201FE040
201FE048
201FE050
201FE058
201FE060
201FE068
201FE070
201FE078
201FE080
201FE088
201FE090
201FE098
201FEOAO
201FEOA8
201FEOBO
201FEOB8
201FEOCO
201FEOC8
201FEODO
201FEOD8
201FEOEO
201FEOE8
201FEOFO
201FEOF8
201FE100
201FE108
201FE110
201FE118
201FE120
201FE128

764004
764014
764024

2013E804
2013E80C
2013E814

2017E804
2017E80C
2017E814

201BE804
201BE80C
201BE814

201FE804
201FE80C
201FE814

770460

2013Fl30

2017Fl30

201BF130

201FF130

772410

2013F508

2017F508

201BF508

201FF508

774400

2013F900

2017F900

201BF900

201FF900

777160

2013FE70

2017FE70

201BFE70

201FFE70

777440

2013FF20

2017FF20

201BFF20

201FFF20

777514

2013FF4C

2017FF4C

201BFF4C

201FFF4C

---------------------------------------------------------------------------

1-91

5. )

*****

Read Data Substitute (RDS) Faults and Aborts

*****

The Machine Check Logout information is not very good for this
type of Machine Check. The associated Memory's status registers
are more helpful for this type of problem.
MS780A and MS780C memories have error correction logic that can
supposedly correct one bad bit per 72 bit array word. For read
accesses that result in one bad bit being detected, the memories' error
correction logic will correct the bad bit and will flag the data that
is returned as "Corrected Read Data". If there are a multiple even
number of bad bits detected ouring the 72 bit array read access, the
data returned will be flagged as "Read Data Substitute". This
indicates that the data has not been corrected and the quadword
returned "may" be bad (the bits bad may have been in the ECC code so,
therefore, the actual data returned may be good). BEWARE that
MS780A & C memories cannot correctly detect and signal a multiple odd
number of bad bi ts read from the ·72 bit array. If this condition
happens, the memory will send back the data and report it as
"Corrected Read Data". It is, therefore, a good idea to swap out any
arrays that are giving single bit errors for those types of problems
that are intermittent and cannot seem to be fixed by other means.
This type of Machine Check means that a Double Bit Error has been
detected, by memory, when the CPU was accessing a memory location.
Bit #13 of ID Register #19 should be set for this type of error to
havt occured.
"(SP)+l6" contains a Virtual Address within the quadword location
at fault. If the system has not been rebooted or disturbed, you
may be able to use this "Virtual Address" in the following console
command to find the Physical BYTE Address causing the error.
>>>

E/L/V xxxxxxxx

; where xxxxxxxx = contents of "(SP)+l6".

The CONSOL.SYS program should respond with the following type
of output:
p yyyyyyyy zzzzzzzz
Where "yyyyyyyy" is the Physical Address at fault. If you get
a "Mic-err", the necessary PTE to make the Virtual to Physica
translation isn't available from memory or the TB.
If this command was successful, you can use this Physical
Address to determine what array is at fault. This address is
a "Physical BYTE Address".
If you were not able to find the failing array by the procedure
above, your only other choice is to use the "SYSTEM EVENT File" to
see if any memory errors have been recorded.
Remember that the first array is array #0 not array #1.

1-92

MS780A & MS780C

memories:
If bit <28> = 1, in "Memory Register C", then Bits <27:24> should
reflect the array that had the error.

Memory Register "C"
Bit <28>
Bits <27:24>

Error Log Request
Array Select

MS780E memories:
If bit <28> = 1, in "Memory Register C" or "Memory Register D", then
bit <27> will indicate the controller and bits <26:24> will indicate
the array within that controller that had the error.
Memory Registers "C & D"
-----------------------Bit <28>
Bit <27>
Bits <26:24>
Bits <23:22>
Bits <21:11>
Bits <19:11>
Bit <10>
Bit <09>

("C" - Lower Controller)
("D" - Upper Controller)

Error Log Request
Controller Select
Array Select
Array Bank Select
RAM page address for 256K RAMs
RAM page address for 64K RAMs
Multiple bit error
Single bit error detected and corrected

MA780 memories:

If bit <28> ~ 1, in the "Array Error Register", then bits <27:24>, of
the same register, will indicate the Array in error.
Array Error Register

Bit <28>
Bit <08>
Bits <22:09>
Bit <23>
Bits <27:24>

Error Log Request
1 = Upper Word, 0 = Lower Word
Chip address presented to the memory chip
1 = Upper Bank, 0 = Lower Bank
Array card with the error

Problem areas:
A Memory Array or the MEMORY Control.
Memory or CPU Backplane.
Memory or CPU Power.
SBI/CPU interface.
SBI cables.

1-93

6. )

*****

VAX Micro-Code NOT SUPPOSE TO GET HERE

*****

The "Trapped UPC" is about the only data saved, in the Machine Check
Logout information, that may help you trouble-shoot this type of
problem.
This type of Machine Check exception occurs whenever the microcode
finds itself accessing a microcode location that it should never
make it to. The unused microwords contain jumps that will direct
the Micro-PC to ~he micro routine that flags this error.
The Micro-stack register, ID #20, should contain the Control Store
Address that the microcode wasn't suppose to get to. The microcode
stores this register in ID #32 for a Double Error Halt and on the
stack at "(SP)+12" on a Machine Check exception. Verify that the
address is unused via the micro-fiche MICROCODE listing.

Problem areas:
Micro-code address logic (M8235).
Any board on the "micro PC" bus.
PCS ( M8 2 34 ) •
WCS (M8233 or M8238 in slot 20).
OPTIONAL wcs (M8233 or M8238 in slot 18).
IR Decode Logic.
WCSxxx.PAT on the LOCAL CONSOLE Floppy (or whatever
floppy the WCS was loaded from).
WCS load path
(Floppy-> LSI-> CIB ->ID Bus-> WCS).
Clock Board (M8232).
CPU Power.

1-94

ID #20
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

Micro Stack Register
1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0

3 2 1 0

Reading this register pops the top address from the micro stack.
Writing this register pushes an address onto the micro stack.

Bits <15:00>
************

Control Store Address <15:00>

<15:00> = micro Address <15:00>

Micro PC Wirelist and Slot chart
Slot 18
Slot 20 Slot 22
Slot 23
Slot 08
Signal
! Pin !Opt. WCS
WCS
PCS
M8235
M8224
*************!*****!*********!********!*********!********* *********!
Bus uPC 00
! EAl !
X
!
X
X
X
X
!
-------------!-----!---------!--------!---------!--------- ---------!
Bus UPC 01
! ER2 !
x
x
x
x
x
-------------!-----!---------!--------!---------!--------- ---------!
Bus uPC 02
! ESl !
X
X
X
!
X
X
-------------!-----!---------!-------- ---------!---------!---------!
x
x
Bus uPC 03
! EU2 !
x
x
x

-------------!-----!---------!-------- ---------!---------!---------

Bus UPC 04
I EV2
!
x
x
x
!
x !
x
------------- -----!---------!-------- ---------!---------!--------Bus uPC 05
FB2 !
X
!
X
X
X
!
X
------------- -----!---------!-------- ---------!---------!--------Bus uPC 06
x
x
FDl !
x
x
x
------------- -----!---------!--------

---------!--------- ---------

Bus UPC 07
FD2 !
x ! x
x
x
x
------------- -----!---------!-------- ---------!--------- --------Bus uPC 08
! FEl !
X
!
X
X
X
no
-------------!-----!---------!-------- ---------!--------- -----~--Bus uPC 09
! FE2 !
x
x
x
x
no
-------------!-----!---------!-------- ---------!--------- ---------!
Bus uPC 10
! FFl !
X
!
X
X
x
no

-------------!-----!---------!-------- ---------!---------!---------!

Bus uPC 11
! FF2 !
X
X
!
X
!
X
!
no
-------------!-----!---------!--------!---------!---------!---------!
Bus uPC 12
! FH2 !
X
!
X
X
X
no
-------------!-----!---------!--------!---------!---------!---------!
"WCS" and Opt. WCS" boards are either M823~'s (2K) or M8233's (lK).

1-95

c p u

DOUBLE

CPU

DOUBLE

c p u

DOUBLE

CPU

DOUBLE

c p u

DOUBLE

CPU

DOUBLE

c p u

DOUBLE

ERROR
ERROR

ERROR

$
?CPU DBLE-ERR HLT
HALTED AT 8007E2A8
>>>

1-97

HALTS
HALTS

HALTS

If the Problem is a "CPU Double Error Halt", "?CPU DBLE-ERR HLT" was
printed on the console terminal, diagnosis is similiar to the
"Machine Check" trouble-shooting. The difference is in where the
information is stored by the VAX-11/780 CPU microcode. A "Double
Error Halt" is simply a trap upon a trap.
On a "Double Error Halt" the logout information is stored in 2 places.
The information for the first trap, "Machine Check", is stored in
ID Bus registers 30 thru 39, and the information for the second
trap, "Machine Check", is stored in the associated ERROR/STATUS
Registers and the Memory NEXUS registers.
It is, therefore, very important to take a dump of all the Processor
ID Bus Registers and all the Memory NEXUS registers at the time of the
crash, before any other commands are given. This can be done with the
following CONSOL.SYS commands:
>>>
>>>

E/L/H/ID/N:l7 0
R E/L/H/ID 18

;allow CONSOL.SYS to do at least 15 examines, then type "AC".

Ac
>>>
>>>

E/L/H/ID/N:25 19
E/L/H/P/N:x 200yy000

x = depends on memory type
; yy = depends on Mem TR level

Repeat the last command, changing "x" and "yy" as needed
in order to gather all the Memory NEXUS registers.
>>>

; yy = depends on TR level

E/L/H/P 200yy000

Repeat the last command, changing "yy" as needed, in order
to obtain the contents of all NEXUS Configuration Registers.
An easier method to dump the needed information would be to use a
"DUMP." CONSOL.SYS command file, built as outlined in Chapter 3 of
this manual.
Unlike "MACHINE CHECKS", "Double Error Halts" bring the VAX completely
down to a HALT. Control passes back to the VAX-11/780 CONSOL.SYS
program. Therefore, the System Event file, ERRLOG.SYS, will not
contain information at the time of the crash. ERRLOG.SYS may,
however, contain some pertinent information about something that
happ~ned just prior to the crash, (such as a Double Bit Error in
Memory). If you have not isolated the problem by examining the
Hardware Registers, it may be worth your time to try to bring the VMS
Operating System back up and examine the Error log file.
The information for the first error of a DOUBLE ERROR HALT will be
found in the Temporary Registers, ID Registers #30 thru #39 (see note).
The information for the second error of a DOUBLE ERROR HALT will be
found in the associated error/status registers. Therefore, it is
very important to examine all the Hardware Registers in order to
trouble-shoot Double Error Halts. The Hardware Register Dump must be

1-98

taken immediately before anything else is done, in order to assure
that the Register Contents are valid for the time of the error.
Note:
*****

If the second error was a "Control Store Parity Error" or a "Microsequencing Error", the information in "TO-T9" MAY NOT BE VALID for the
first error. The safest thing to due is to check ID #OC, see if
bit <15>=1, and IF IT IS DO NOT USE "T0-T9" (which are ID #30-39).
If the second error was a "Micro-sequencing Erro~", there will not be
any other error bits set. In either case, if the SECOND error is
found to be either a "Control Store Parity Error" or "Micro-sequencing
Error", the information in TO thru T9 may not be valid.

Use the MACHINE CHECK outline tb trouble-shoot the first error. The
only difference is that the LOGOUT information is found in "ID 30"
thru "ID 39" instead of on the stack. These ID registers must be
dumped by you, or the customer, prior to anything else being done.
Examine the rest of the ID registers and all the Memory NEXUS hardware
registers in order to determine what the second error was. It is best
to determine what the second error was prior to checking the first
error since the information for the first error may not be valid, due
to the second error occuring before the "TO-T9" logout was completed.
i.e. "Control Store Parity Error" or "Micro-Sequencing Error".
If Bits <19>, <17>, & <16> of ID #lB are equal to a 1, then an S.B.I.
FAULT has occured. Use ID #lB, the S.B.I. Silo dump, and the Configuration
registers in the NEXUS devices, to determine the cause of the FAULT.

DOUBLE ERROR HALT Information
Description
Summary Parameter
CPU Error Status
Trapped UPC
VA/VIBA
D Register
TB Error 0
TB Error 1
Timeout Address
Parity
SBI Error
Fault Status

1st Error
ID Location

2nd Error
ID Location

TO
Tl
T2
T3
T4
T5
T6
T7
TS
T9
none

30
31
32
33
34
35
36
37
38
39
none

none

20
none
08
12
13

lA
lE
19
lB

If the second error is caused by a RDS error, then the associated
memory registers wi 11 reflect the array in error.

BEWARE:

The 1st error information MAY NOT BE VALID 1f ID ::oc
Bit< 15 > = 1, or if a micro-sequencer problem has occured.

1-99

Due to the possibility of the processor detecting a non-existent error
condition, it is a good idea to constantly make certain validity checks
of the error information that you have gathered.
In the case of "Double Error Halts", some of the error information may
not be correctly stored away due to a second error occuring while the
first error is being stored. Therefore, you should always make a
validity check of the information stored in ID #30:39 (the 1st error).
It is a good idea to always make validity checks on the errors.

CPU Detected Error VALIDITY CHECKS:
Control Store Parity Error --

"CPU Error Status Register", ID #OC,
must have Bit <15>=1.

CP/IB Read Timeouts

--------

"SBI Error Register", ID #19, must have
either Bit <12>=1 or Bit <06>=1.

CP/IB Error Confirmations ---

"SBI Error Register", ID #19, must have
either Bit <08>=1 or Bit <03>=1

CP/IB RDS Faults ------------

"SBI Error Register", ID #19, must have
Bit<l3>=1 or Bit <07>=1.

TB Parity Errors ------------

"Translation Buffer Register #1",
ID #13, must have at least one of
Bits <20:09>=1.

Cache Parity Errors ---------

"Cache Parity Register", ID #lE, must
have Bit <15>=1.

S.B.I. Fault ----------------

"SBI Fault Status Register", ID #lB,
must have Bit <19>=1, and Bit <17>=1.
Also, at least one of the NEXUS should
have at least one of Bits <31:27>
set(=l) in their associated
Configuration Status Registers. The
VAX-11/780 is also a NEXUS and its
equivalent register is ID #lB.

1-100

CPU Double Error Halt Flowchart
1------------------------------------------------1
I
?CPU DBLE-ERR HLT
I
I
>>>
I
I The above printout occured on the console.
I
1------------------------------------------------1
I
1------------------------------------------------1
I Examine all the ID registers, the SB! SILO, alll
I the registers within the MEMORIES, and the
I
I CONFIGURATION/STATUS register in each NEXUS.
I
I This can be done by using a previously built
I
I "DUMP." CONSOL.SYS command file (as outlined inl
I Chapter 3) or by using the commands outlined inl
I the beginning of the DOUBLE ERROR HALT section.I
1------------------------------------------------1
I
1-------------------------------------------------1
I Using the contents of ID OC, 13, 19, lB, and lE I
I determine what the 2nd error was, by checking
I
I the following bits:
I
1-------------------------------------------------1
l
I
1-------------------------1
I
I
I --1
I --1
I --1
1--1
I --1
I
I El I
I E2 I
I E3 I
I E4 I
I ES I
I
I --1
I --1
I --1
I --1
I --1
I
I
I
I
I
I
1-----------------------------------------------------------------1
I ID #OC I ID #13
I ID #19 I ID #19
I ID #lB I ID #lE I none
I
I
I
I
I
I
I of
I
I
I <12> or I
I
I
I these
I
I any of I <06> or I <13> or I <19> and I
1-->I
I <15> =l I <20:09> I <08> or I <07> =l I <17> =l I <15> =l I
I
I
I
=l
I <03> =l I
I
I
I
I
l----------l----------l----------1----------1----------1----------I
I
I yes
l yes
i yes
i yes
I yes
I yes
I
I
I
I
I
I
I
I
goto
goto
goto
goto
goto
goto
I
"CSPE"
"TBPE"
"SBIERR"
"RDS"
"SBIFLT"
"CAPE"
I
I

!<---------------------------------------!
I
!---------------------------------------------------------------------!
I No errors bits are set.
I problem in the KA780.

This usually indicates a "MICRO-SEQUENCER" I
I
I
Use the appropriate section in the Machine Check error portion of
I
I this manual to trouble-shoot this type error. Then return to this I
I flow at "FIRST ERROR ANALYSIS".
I

l---------------=-----=-----------------------------------------------1

1-101

1------------1
I

"CSPE"

l--~---------1

l----------~----------------------------------------------------------1

I ID #OC bit <15>=1 indicates that a "CONTROL STORE PARITY ERROR" was
I detected in the KA780.
I
I Use the appropriate section in the Machine Check error portion of
I this manual to trouble-shoot this type error (page 1.046). Then
I return to this flow at "El" to see what other errors occured.
I However CSPE's should be fixed first.

I
I
I
I
I
I
I

1---------------------------------------------------------------------1
1-----------1
I "TBPE"
I
1-----------1
I
1---------------------------------------------------------------------1
I ID #13 bits <20:09> are used to indicate "TRANSLATION BUFFER PARITY
I ERRORS" detected in ~he KA780.
I
I Use the appropriate section in the Machine Check error portion of
I this manual to trouble-shoot this type error (page 1.038). Then
I return to this flow at "E2".

I
I
I
I
I
I

1---------------------------------------------------------------------1
1--------------1
I
"SBIERR"
I
1--------------1
I
1---------------------------------------------------------------------1
I ID #19 bits <12> and <06> are used to indicate SBI timeouts as a
I result of a KA780 microcode or IB requests, respectively.
I
I ID #19 bits <08> and <03> are used to indicate SBI Error CNF's as a
I result of a KA780 microcode or IB requests, respectively.
I
I Use the appropriate section in the Machine Check error portion of
I this manual to trouble-shoot this type error (page 1.056). Then
I return to this flow at "E3".

I
I
I
I
I
I
I
I
I

1---------------------------------------------------------------------1

1-102

1------------1
I
"RDS~
I
1------------1
I
1---------------------------------------------------------------------1
I ID #19 bits <13> and <07> are used to indicate that "RDS" data has
I been received as a result of a KA780 microcode or IB request,
I respectively. A "READ DATA SUBSTITUTE" error has occured.
I

I Use the appropriate section in the Machine Check error portion of
I this manual to trouble-shoot this type error (page 1.092). Then
I return to this flow at "E4".

I
I
I
I

I
I
I

1---------------------------------------------------------------------1
l---~--------1

"SBIFLT"

1------------1
I
1---------------------------------------------------------------------1
I ID #lB bits <19> and <17>=1 indicate that an "SBI FAULT" condition
I was detected by the KA780 or one of the SBI NEXUS.
I
I Use the "SBI FAULT" trouble-shooting section of this manual to
I isolate this problem (page 1.212). Then return to this flowchart
I at "ES".

I
I
I
t
I
I

1---------------------------------------------------------------------1

1------------1
I

"CAPE"

1------------1
I

1---------------------------------------------------------------------i

I ID #lE bit <15>=1 indicates that a "CACHE PARITY ERROR" was
I detected in the KA780.
I
I Use the appropriate section in the Machine Check error portion of
I this manual to trouble-shoot this type error (page 1.034).
Then
I return to this flow at "FIRST ERROR ANALYSIS".

I
I
I
I
I
I

l------------------------------=-----=--------------------------------1

1-103

1---------------------------1
I "FIRST ERROR ANALYSIS"
I
l--------=-----=------------1
I
I

!----------------------------------------------------------------!

I Information about the first error is stored in the "TEMPORARY" I
I registers (ID #30:39).
I
I

I HOWEVER, this information may not be valid if the 2nd error wasl
I due to a CONTROL STORE PARITY ERROR or a MICROSEQUENCER ERROR. I
I If either of these errors occured, the information MAY still bel
I good. Use the "VALIDITY CHECKS" to make sure.
I

1----------------------------------------------------------------1
I
I

------------------------------------------------------------------!
The information stored in ID #30:39 is basically a MACHINE CHECK
LOGOUT. You can use the MACHINE CHECK trouble-shooting section
of this manual to determine what caused this error. The only
difference is where the information is stored. The LOGOUT info
is found in the TEMPORARIES instead of on the stack. They are
assigned as follows:
ID #30 - Summary Parameter Code
ID #31 - CPU Error Status (saved ID #OC)
ID #32 - Trapped UPC (saved ID #20)
ID #33 - VA/VIBA (saved output of the VAMX)
ID #34 - D Register (saved ID #08)
ID #35 - TB Error 0 (saved ID #12)
ID #36 - TB Error l (saved ID #13)
ID #37 - Timeout Address (saved ID #lA)
ID #38 - Cache Parity (saved ID #lE)
ID #39 - SBI Error (saved ID #19)

I
I
I
I

I
I
I
I
I
I
I
I

------------------------------------------------------------------!
I
I

------------------------------------------------------------------!

Using the temporaries instead of the contents of the STACK FRAME, I
go to the appropriate section of the MACHINE CHECK section,
I
based on the SUMMARY PARAMETER CODE found in ID #30's byte 0, to I
determine the cause of this error.
I
I
By determining what caused both errors, you now have two pieces I
of information to work with in order to fix the system.
I
I
The two errors may help you zero in on one unit being at fault.
I
However, often times Double Error Halts are two separate errors, I
so you have to fix each one individually.
I

------------------------------------------------------------------!

1-104

VAX-11/780 "ID" Register ERROR information
ID #OC - CES
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

Control Store Parity Error Summary -I I I I
CS Parity Error in Group #2 ----------1 I I
CS Parity Error in Group #1 ------------! I
CS Parity Error in Group #0 --------------1

ID #13 - TBERl
3 3 2 2
1 0 9 8

PE Group
PE Group
PE Group
PE Group
PE Group
PE Group

1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
"'
"' "" "" "' "" "" "' "" "" "" "" ""
1 Data Byte 2 -I
I I I I I I I I I I I 1-- CP TB Parity Error
1 Data Byte 1 ----1 I I I
I I I I I I I- PE Group 0 Addr Byte 0
1 Data Byte 0 ------1 I I
I I I I
I 1--- PE Group 0 Addr Byte 1
0 Data Byte 2 --------1 I
I I I I 1----- PE Group 0 Addr Byte 2
0 Data Byte 1 ----------1
I I I !--------PE Gro.up l Addr _Byte 0
0 Data Byte 0 -------------1 I 1---------- PE Group 1 Addr Byte 1
1------------ PE Group 1 Addr Byte 2
2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

ID #19 - SBJ,ERR
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

RDS received for a CP requested cycle --1 I I I
SBI Timeout on a CP requested cycle ------1
I I
ii iO
<-- see chart --1 I
----------<-- see chart ----1
0
0 - No device response
0
1 - Device Busy Timeout
1
0 - Waiting for READ DATA timeout
1
1 - Impossible code

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

I I I I

I
I
SBI Err CNF
received
for an IB
request

I I I I
I

I
I
I
I

I
I

SBI Error Confirmation on CP requested cycle ------1
I I
RDS received for an IB requested cycle ---------------1
I
SBI Timeout on an IB requested cycle -------------------1 I
5
4
<-- see chart ---------1 I
----------<-- see chart -----------1
0
0 - No device response
0
1 - Device Busy Timeout
1
0
Waiting for READ DATA timeout
1
1 - Impossible code

1-105

ID #18 - FAULT
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

1 1 0 0
1 0 9 8

0 0 0 0
7 6 5 4

0 0 0 0
3 2 1 0

I I
1---- Indicates SBI SILO is locked
I 1--- indicates that CPU was transmitting at FAULT
I
1----- A Multiple Transmitter fault was detected by the CPU
I 1---------- An Unexpected Read Data fault was detected by the CPU
1-------------- An SBI Parity Error was detected by the CPU

ID #lE - CACHE PARITY
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2
A

1 1 0 0
1 0 9 8
"' "'

0 0 0 0
7 6 5 4
"' "'
A

Cache Parity error was detected ----1 I I I I I I I I I I
0 = IB reference, 1 = CP reference ---1 I I
I I I I I I I
I, I I I I I I I I
________
Parity OK in Data Group 1 Byte 0
I I I I I I I I
Parity OK in Data Group 1 Byte 1 ----------1
_____________ ,I I I I I I I
Parity OK in Data Group 1 Byte 2 _______________ ,I I I I I I
Parity OK in Data Group 1 Byte 3
I I I I I
Parity OK in Data Group 0 Byte 0 -----------------1 I I I I
Parity OK in Data Group 0 Byte 1 -------------------1
I I I
Parity r.u
in Data Group 0 Byte "" ----------------------, I I
Vl'Parity OK in Data Group 0 Byte '3 ------------------------! I
I

Parity OK
Parity OK
Parity OK
Parity OK
Parity OK
Parity OK

0 0 0 0
3 2 1 0

I I
I I
I I
I I
I I
I I
I I
I I
I I

in Address Group 0 Byte 0 -----------------------1
in Address Group 0 Byte 1 -------------------------1
I I
in Address Group 0 Byte 2 ------------------------~---! I
in Address Group 1 Byte 0 ------------------------------! I
in Address Group 1 Byte 1 --------------------------------! I
in Address Group 1 Byte 2 ----------------------------------!

ID #lA - TIMEOUT ADDRESS
3 3 2 2
1 0 9 8

2 2 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1 1 1 1
9 8 7 6

1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
PA <29:02> ----------------------->!

1 1 1 1
9 8 7 6

1 1 1 1
5 4 3 2

I<------------------------

ID #20 - MICRO STACK
3 3 2 2
1 0 9 8

22 2 2
7 6 5 4

2 2 2 2
3 2 1 0

1-106

1 1 0 0 0 0 0 0 0 0 0 0
1 0 9 8 7 6 5 4 3 2 1 0
I<-- Micro PC bits <12:0> -->I

Example of a Double Error Halt and a hardware dump
?CPU D8LE-ERR HLT
HALTED AT 8007E2A8
>>>E/L/H/ID/N:3F 0
ID 00000000
ID 00000001
ID 00000002
ID 00000003
ID 00000004
ID 00000005
ID 00000006
ID 00000007
ID 00000008
ID 00000009
ID OOOOOOOA
ID 00000008
ID oooooooc
ID OOOOOOOD
ID OOOOOOOE
041FOOOO
ID 00000010
ID 00000011
ID 00000012
ID 00000013
ID 0.0000tH4
ID 00000015
ID 00000016
ID 00000017
ID 00000018
ID 00000019
ID OOOOOOlA
ID 00000018
ID OOOOOOlC
ID OOOOOOlD
ID OOOOOOlE
ID OOOOOOlF
ID 00000020
ID 00000021
ID 00000022
ID 00000023
ID 00000024
ID 00000025
ID 00000026
ID 00000027
ID 00000028
ID 00000029
ID 0000002A
ID 00000028
ID 0000002C
ID 0000002D
ID 0000002E
ID 0000002F

(1st Error)
CP RDS Fault ->
8F590908
Summary Code
5CFA8525
00000000
013A0260
00000040
00000000
00000040
00000000
00000000
00000000 CP RDS bit set ->
000080Cl
FFFFEA96
00000184
03630054
OOlAOOOO

ID 00000030 00000005
ID 00000031 00000002
ID 00000032 00001116
ID 00000033 00000040
ID 00000034 7FFD7130
ID 00000035 00007C81
ID 00000036 00000000
ID 00000037 00001FA3
ID 00000038 00004000
ID 00000039 0000A002
ID 0000003A 00021074
ID 00000038 0007CEOO
ID 0000003C 00000000
ID 0000003D 003FFDE9
ID 0000003E 00000800
ID 0000003F 00080000
>>> E/L/P/N:2 20002000
p
20002000 00002El0
p
20002004 F0001400
p
20002008 38080200

00007C41
00000000
00007C41
00000000
00000000
"
>>>
00000000
I
Array #11.
00000000
had an error
00000000
00000000
OOOOA082 <-- CP RDS bit set (2nd Error)
0001F8AA
02040000
00000000
0021COOO
00004000
1st and 2nd error indicate that
FFFFOOOO
"Read Data Substitute" data was
OOOOOFCF
received, by the CPU, on a CP
00000000
request. The registers within
00000000
the memory at TR#1 indicate
00000030
that Array #11. was the array
80007000
at fault.
7FODFOOO
0007EOOO
33333333
7FFEAD1C
7FFE8D04
7FFED4FC
OOOOC6CO
800C3COO
00000880
00000000
00000880

1-107

INTERRUPT STACK NOT VALID Halts

INTERRUPT STACK NOT VALID Halts
INTERRUPT STACK NOT VALID Halts

INTERRUPT STACK NOT VALID Halts

$
? INT-STK INVLD
HALTED AT 8007E2A8
>>>

1-109

"INTERRUPT STACK NOT VALID halts" are exceptions that indicate that
the interrupt stack was not valid or that a memory error occurred
while the processor was pushing information onto the stack during
the initiation of an exception or interrupt. In other words, an
"Interrupt Stack Not Valid" means that, while pushing information
onto the STACK a reference was made to a Virtual Address not currently
mapped to Physical Memory or that a Fatal Error occurred while
referencing the STACK. No further interrupt requests are acknowledged
on this processor.
This problem is detected by VAX CPU microcode, which tells the "LSI
Front-end Subsystem", which will halt the VAX CPU and print out the
"?INT-STK INV" message. For this reason, the VAX software will not
have been able to take a Software Dump as the system crashes.
In
order to get a Software dump, the "AUTO RESTART" switch must be "on",
or, the "RESTAR.CMD" indirect command file can be used to restart the
operating system. The RESTAR.CMD file will attempt to reboot the
system but will fail, therefore allowing a software dump to be taken.
In either case, the "RESTAR.CMD" command file should have been
previously modified to cause a dump (such as done by the "DUMP."
indirect command file) to be taken prior to rebooting.
This type of problem can be caused by any number of things but listed
below are the most common reasons:
a.

Memory Errors
1.
2.
3.

Double Bit Errors (Uncorrectable errors)
Hardware problems causing NXM (Non-existent Memory)
errors.
SBI interface in VAX-11/780 CPU or Memory has
problems.

Some device interrupting excessively.

Memory Management or System Disk problems.

The contents of "SP" and "Internal Register #4" should
be equal.
If they are not, the problem is probably the
M8229 or M8225.

The following information should be used to trouble-shoot the
"Interrupt Stack Not Valid" problem:
a.

A "Hardware Register Bump" should be used to see if
any hardware errors have occured.

The contents of the Stack should be dumped for further
examination. This should be available from the "Hardware
Register Dump", if it is set up as the "DUMP." example
in this manual. Look for repeated Machine Check Logouts
or Exceptions on the Stack. This could indicate the hidden
reason for the "INT STK INV".

1-110

If the VMS Operation System is operative, an Error Log
report should be taken at least of the time immediately
prior to and at the time of the failure. Does it show
any errors logged?

A Software Dump should have been taken. This dump can
be analyzed by either RDC, Remote Support, D.E.C. Software
Support, your District Support Group, or yourself. It may be
necessary to examine several dumps in order to see what
is commonly happening or what device is commonly being
accessed.

This type of problem can be caused by Non-D.E.C. Supported Device
drivers. Find out from the Customer if any new drivers have been
installed recently or if some new foreign equipment has recently
been added to the system. If one or more of these have recently
been added to the system, see if the problem occurs when these
devices are no longer used.
If the Problem is of intermittent nature, it is may be faster to
trouble-shoot this type of problem from a software approach. The
Software Dumps may not point a finger directly at a unit or subsystem,
but will at least let you know what was happening at the time of the
crash. This information along with any Hardware registe~ dumps that
are available, may point you to a unit or subsystem.
The following should be done in order to enable gathering of the
information that is needed to trouble-shoot intermittent type
INTERRUPT STACK not VALID's:
1.

Make sure that the SYSGEN Parameter "DUMPBUG" is
set (=l)! This will cause a Software Dump to be taken,
(on the way back up for "?INT-STK INV's").

Have the Customer take a Hardware Register Dump when the
System Crashes. After the Hardware Dump is taken, the
Customer can then reboot the Operating System. This step
will be automatically taken care of if the "RESTAR.CMD"
file has been modified to include the "DUMP." commands.

Have the Customer save the Software Dump when the System
is rebooted after a crash. This can either be saved on
MAGTAPE or the "SYS$SYSTEM:SYSDUMP.DMP" can be "Copied"
to another file.

An ERROR LOG report should be taken for the time just
prior to and at the time of the crash.

Have the Customer save the Hardware Dump Output, the
Software Dump, the Console Terminal Output at the
time of the crash, and the ERROR LOG report for you
to examine.

1-111

KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts
KERNEL STACK NOT VALID Aborts

1-113

"KERNEL STACK NOT VALID ABORTS" are exceptions that indicate that
the Kernel Stack was not valid while the processor was pushing
information onto the stack during the initiation of an exception
or interrupt. Usually this is a indication of stack overflow or
another executive software error. The attempted exception is
transformed into an abort that uses the interrupt stack. No
information other than the PSL and PC is pushed onto the Interrupt
Stack. Software may abort the process without aborting the
Operating System; however, because of the lost information, the
process cannot be continued.
If the Kernel Stack is not valid
during the execution of an instruction, the processor initiates
a normal Memory Management fault, and if the exception vector <1:0>
for Kernel Stack not Valid is 0 or 3, the behavior of the processor
is undefined.
If the problem is of an intermittent nature, certain
things should be done in order to enable gathering of the information
needed to aid problem diagnosis.
If the problem is solid, you should
be able to gather most of the following information without the aid of
the customer.
In either case, the following steps should be taken:

NOTE:

Make sure that the SYSGEN Parameter "BUGREBOOT"
is cleared (=0). This will cause the Operating System
to halt after a FATAL Bugcheck.

Make sure that the SYSGEN Parameter "DUMPBUG" is
set (=l). This will cause a Software Dump to be taken
as the Operating System is coming down.

Have the Customer take a Hardware Register Dump when the
System Crashes.
After the Hardware Dump is taken, the
Customer can then reboot the Operating System.

Have the Customer save the Software Dump when the System
is rebooted after a crash. This can either be saved on
MAGTAPE or "SYS$SYSTEM:SYSDUMP.DMP" can be "Copied" to
another file.

An ERROR LOG report should be taken for the time just
prior to and at the time of the crash.

Have the Customer save the Hardware Dump Output, the
Software Dump, the Console Terminal Output at the
time of the crash, and the ERROR LOG report for you
to examine.

Steps #1 and #3 may be eliminated if the "DEFBOO.CMD" command
file has been modified so that it will dump all the Hardware
Registers. The "REMOTE LOCAL CONSOLE" floppy should be used in
case you should deceide to use the "Remote Diagnostic Center"
as a tool for problem diagnosis.
The "DEFBOO.CMD" and
"RESTAR.CMD" command files should be modified, on this floppy,
so as to take a hardware register dump upon reboot.
The "DUMP."
and "HANG." files should also be installed on this floppy.

1-114

OTHER

TYPES

OTHER

TYPES of CRASHES

OTHER

TYPES

OTHER

TYPES of CRASHES

OTHER

TYPES

OTHER

TYPES of CRASHES

OTHER

TYPES

OTHER

TYPES of CRASHES

OTHER

TYPES

OTHER

TYPES of CRASHES

1-115

CRASHES

There are many other types of Crashes that can occur. The basic
trouble-shooting meth_od for them should be as follows:

Obtain an Error log report of the Systems Events that happened
prior to and at the time of the crash. This report will many
times show the error.

Examine the Console Terminal printout at the time of the crash.

Examine the Hardware Register Dump, if taken. If it wasn't taken,
try to recreate the problem and make sure the Hardware Register
Dump is taken.

If a Software Dump was taken, examine it to determine what was
happening at the time of the failure. If you do not know how to
analyze a Software Dump, get either D.E.C. Software or Remote
Support to analyze it for you.

After making a preliminary analysis of the problem from the above
information, run all diagnostics on the device, and associated
controllers, that you feel may be at fault. If none of these fail,
run diagnostics on everything that may be remotely related to the
problem. It doesn't hurt to spend the time to run all diagnostics
for that particular system configuration.

Using both a SCOPE and a DVM, check the VOLTAGES and the POWER
MONITORING signals (ACLO & DCLO, etc.) for both the correct level
and for the amount of NOISE riding on the voltage levels.
Correct any that are out of specification.
Power and Power Monitoring Signal problems cause many strange
problems that can lead you around in circles for quite awhile.
Never overlook these. Always check them no matter what type of
problem you have.

Margining, heating, cooling, and vibrating may be used to recreate
and isolate some problems.

1-116

Many times problems are intermittent and diagnosis is not
possible on the first crash. If this is the case, try to obtain
as many of the following things as are possible and take them to
your District Support Group so that they may aid you in diagnosing
the problem:
1.

Console Terminal output just prior to and at the time
of the crash.

Hardware Register Dump printout.

Error Log report. If you are using "SYE", get a "STANDARD"
printout. If you are using "SPEAR", get the "FULL"
"RETREIVE" printout and also the "ANALYZE" output.

Get an "SDA" output from the examination of the Software
Dump that contains at least the following:
a.
b.
c.
d.
e.
f.
g.

SHOW CRASH
SHOW PROCESS/ALL
SHOW STACK/ALL
SHOW DEVICE
SHOW PFN DATA/ALL
SHOW SUMMARY
EXAMINE/PO

Get a copy of the Software Dump on Magtape at 1600 B.P.I.
if possible.

If a copying machine is available, copy your LOG Book entry
that tells the problem symptoms that you gathered.

If the problem is not a solid problem and if the SYSGEN parameters
are set up so that the Operating System reboots, ask the customer
to change them so that the system does not reboot automatically and
educate the customer on the procedure for taking a hardware registe
dump.
The "REMOTE LOCAL CONSOLE" floppy should be used in case you should
deceide to use the "Remote Diagnostic Center" as a tool for problem
diagnosis. The "DEFBOO.CMD" and "RESTAR.CMD" command files should
be modified, on this floppy, to take a hardware register dump upon
reboot. The "DUMP." and "HANG." command files should also be
installed on this floppy.

1-117

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

VMS

OPERATING

SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM

1-119

Hangs

Hangs
Hangs

Hangs

Hangs are perhaps the hardest problems to diagnose. A HANG
due to:

can occur

Software is stuck in a loop waiting for a certain event
event, or interrupt, to happen.

Hardware has failed in such a way that an asynchrounous
event didn't occur so that normal execution can proceed.

Diagnostic Hangs can also be trouble-shot in much the same way as
for an Operating System Hangs, except that Software Dumps cannot be
taken when running diagnostics in stand-alone mode.

Proceed to trouble-shoot a Hang as follows:
1.

If you are trouble-shooting an Operating System Hang, determine
if the whole system is hung. Record your findings in the Log.
a.

Does the Console Terminal respond?

Does any other terminal respond?

Are any of the Peripherals doing anything?
1.
2.
3.
4.

Are the disks seeking occassionally?
Are the tapes moving?
Is the printer printing?
Etc.

Take a Hardware Register Dump by typing a ""P" on the Console
terminal and then examining the registers by using the "HANG."
command file. Console Terminal commands to do this would be:
"P
>>> @HANG

If typing a ""P" does not put you back into "CONSOL" mode,
check the following:
a.

Is the KEY Switch on the VAX-11/780 Front panel
in one of the "DISABLE" positions? If so, turn
the KEY to "LOCAL". and retry the ""P".

Check the "DC ON" LED and the "RUN" LED on the
Console Subsystem LSI-11 Front Panel. If they
are not lit, your problem is in the Console
Subsystem or is a Power/ACLO/DCLO problem. If
both LED's are lit, proceed to next check.

1-120

If neither of the above are the problem, then
the problem is either the Console Terminal or
the LSI-11/DLVll subsystem. Be sure that the
console terminal is not in "LOCAL" or out of
paper.

If you are unable to get a response when typing "AP",
trouble-shoot this problem.
3 ..

After the Hardware Register Dump has been taken, the "HANG."
command file will single step the VAX several times (so that
it may be determined where the software is hung), and then
it will crash the software as done by the "CRASH." command file.
This will insure that a Software Dump is taken.
If the SYSGEN parameter "BUGREBOOT" is set (=l), the system
will reboot automatically. You will then have to bring the
system back down in order to run diagnostics.
The single stepping portion of the "HANG." output may indicate
a reason for the hang. Check for one of the following:
a.

A PC = 80002EBO (Version 3.x of VMS) indicates that the DW780
is getting a UNIBUS vector of "000000".

A PC = 80007B06 (a NULL job address in Version 3.x of VMS)
indicates that a Software resource is exhausted.

A PC= 80016400 (Version 3.x of VMS), with an IPL of 14-17 or
8-B, usually means the software is executing a driver.

An IPL of "lF" indicates a SYSTEM DISK ERROR or MEMORY
Power problem.

A PC without bit 31 or 30 set usually indicates a process
that is compute bound and running at a high priority.

A Loop that goes through about 10 addresses close together,
then jumps to a new range of address for about 10
instructions, then back to the first range.
This
condition usually indicates a terminal, DZll, DMF32, etc.,
type of problem.

Using a DVM, check all System Voltage levels and the levels
of all ACLO and DCLO signals. Are any out of spec.?

Using a Scope, check all voltages, ACLO signals, and DCLO
signals for excessive noise.
Be sure to use a good Ground on
your scope lead.

1-121

Run at least the following diagnostics:
a.
b.
c.
d.
e.
f.

VAX-11/780 micro diagnostics (#1, #2, and
#3 if applicable)
EVKAA (if the "DS>" prompt appears when this
program is started, deposit zero into
physical location "FEOO" and restart)
EVKAB,C,D,E
ESCAA
ESCBA
Disk, Tape, and Unibus peripheral Reliability
dignostics.

If you get a diagnosic failure, trouble-shoot that problem.
After the diagnostics all run O.K., continue on to the next
step. It is important not to assume the HANG problem to be
fixed at this time. You may have fixed another problem other
than the one you were initially trouble-shooting.
7.

If you are trouble-shooting an Operating System Hang, attempt
to reboot the system at this point and, if you are successful,
take an Error Log report of the time prior to and at the time
of the Hang.

Attempt to diagnose the problem. Use whatever D.E.C. resources
you need to analyze the information that you have gathered.
If you have found a problem before you got to this step, you
may have fixed the Hang problem. Do not assume this yet. Keep
all the information that you have gathered so far with the
SYSTEM LOG Book, just in case the HANG problem reoccurs.
The Software Dump can be analyzed by RDC, Remote Support,
Software Support, or District/Regional Support.
On the Hardware Dump examination, look for such things as:
1.
2.
3.
4.
5.

Attentions on Massbus Devices.
Adapter Power "UP" or "DOWN" status.
Interrupt enables having been cleared, which
may indicate power glitches or problems with the
power monitoring logic.
Who was interrupting at the time the Hardware
Register Dump was taken?
Any error bits set?

If the problem is not a solid problem and if the SYSGEN parameters
are set up so that the Operating System does reboot, ask the customer
to change them so that the system does not reboot automatically and
educate the customer on the procedure for taking a hardware register
dump.

1-122

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

Functional Problems
Functional Problems
Functional Problems
Functional Problems
functional Problems
Functional Problems
Functional Problems
Functional Problems
Functional Problems
Functional Problems

1-123

"Operating System Functional problemsn are those problems that do
not crash the Operating System but either do not complete properly
or do the wrong thing even though they appear to be working properly.
In order to diagnose the problem, you will first need to know a few
things about the problem. Such as:
1.

Is the problem a result of running D.E.C. supported
software or Customer software? This will indicate
to you how far you need to persue the problem.
We are not responsible for fixing Customer Software
or even defining where in the Customer's software
the problem lies. We, D.E.C., are only responsible
in verifying that the D.E.C. hardware and D.E.C.
Supported Software are not at fault.

Can the problem be recreated at will. It will.probably
be necessary to recreate the problem in order to
trouble-shoot it.

If the problem cannot be recreated at will, what is
the Time Between Failures.

You will need to know at what time the last failure
occured. If the customer doesn't know, then the
problem will have to be recreated so that you will
know at what time to look for errors in the error log
file.

These problems may or may not be caused by Hardware. In order to
determine if the problem is Hardware related, check the following:
1.

Take an Error log report that covers the time
immediately prior to, at time of, and immediately
after the "Failing Function" was attempted. Does
the report show any errors or strange events?

If the "Failing Function" uses a particular device,
run the appropriate diagnostics on that device.

If the "Failing Function" uses a particular device,
check the Voltages and AC/DCLO signals (if appropriate)
on that device.

1-124

Check with Remote/District/Regional Support to see if this
is a known or common problem. There might be a Hardware
or Software fix for this problem. D.E.C. RDC is also
a good place to check to see if the problem is similiar
to any known or common problems.

If the problem is not found to be a hardware problem, (after doing the above
checks), it may be necessary to get the help of D.E.C. Software in order
to find out how to diagnose the problem.

Note:

If all else fails to fix your problem, the VAX-11/780 Data Paths may
be at fa ult.
The VAX-11/780 Data Paths, as with most processors, do not check
parity within themselves as the data moves around within the data path
elements. This is not done since "parity checkers" are extremely
slow when compared to the speed needed within the data paths.
Parity is checked on the "MD Bus" data coming into the Data Paths
by the Cache logic. The Data Paths generates parity for the data
that it is sending out of the "D Register". Data going into and
out of the other Data Path buses, the ID Bus and the VA Bus, does
not have parity checking or generation done by the Data Paths.

1-125

OPERATING

SYSTEM

OPERA TING

SYSTEM

OPERATING

SYSTEM

OPERA TING

SYSTEM

OPERATING

SYSTEM

OPERA TING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERATING

SYSTEM

OPERA TING

SYSTEM