Digital PDFs

EK-D5283-SG-002

November 1983

177 pages

Original

6.0MB

Document:	Digital VAX 11/750 Magic Book
Order Number:	EK-D5283-SG
Revision:	002
Pages:	177
Original Filename:

OCR Text

EY-05283-SG-002

DIGITAL

VAX 11/750
MAGIC BOOK

Rev. 8 -JAN-1-1983

1
V A X

1 1 I 7 5 0 MA G I C B 0 0 K
FOR INTERNAL USE ONLY

---------------------------------------------------------------THIS TEXT WAS CREATED IN AN ATTEMPT TO CENTRALIZE
THE ESSENTIAL INFORMATION REQUIRED TO MAINTAIN THE 11/750
AT A BRANCH LEVEL. CONTAINED IN THIS TEXT IS INFORMATION
CONCERNING BOARD LOCATIONS, GATE ARRAYS LOCATED ON EACH
BOARD, BASIC FUNCTIONS OF THE CHIPS, PART NUMBERS, AND MISC.
OTHER INFORMATION YOU MIGHT FIND USEFUL WHEN INSTALLING OR
MAINTAINING THE VAX 11/750 SYSTEMS.
__
THE INTENT OF THIS GUIDE IS NOT TO BECOME A STEP
BY STEP TROUBLESHOOTING TOOL, ONLY TO MAKE SOME USEFUL
INFORMATION AVAILABLE IN A SINGLE PACKAGE.
INDEX OF MAIN TOPICS
CONTENTS:

PAGE t

MAINTENANCE PHILOSOPHY
2
SIMPLIFIED BLOCK DIAGRAM
3
MICROCODE BIT FIELD CHART
4
MAJOR BUS.DEFINITIONS
5
BACKPLANE PIN COUNTS
6
7
POWER SYSTEM BLOCK DIAGRAM
PHYSICAL ADDRESS ORGANIZATION
8
9
VMS SHUTDOWN PROCEEDURE
FF'A L0001
10
FLOATING POINT ACCELERATOR
ItPM L0002
19
DATA PATHS MODULE
MIC L0003
37
MEMORY INTERCONNECT MODULE
UBI L0004
49
UNIBUS INTERCONNECT MODULE
SUB L0010
57
SECOND UNIBUS ADAPTER MODULE
CCS/WCS L0005
69
CPU/WRITEABLE CONTROL STORE
/,j
RI1M/MTM L0006
REMOTE DIAGNOSTIC MODULE
OPTION SLOTS
RH750 MASSBUS ADAPTER MODULE
MBA L0007
CPU MEMORY CONTROLLER MODULE
CMC L0011/L0016 85
.91
UNIBUS EXCERCISOR/TERMINATOR
UET M9313
95
DIAGNOSTIC TRANSFER/NAMES/AUTOSIZER/ATTACHES
BASIC CONSOLE AND COPY COMMANDS
107
WRITEBOOT UTILITY
108
REVCON REVISION CONTROL DOCUMENT
130
BACKPLANE CABLES AND JUMPERS
., ·:r;
... w.:SYE ERROR LOGGER
135
SDA SYSTEM DUMP ANALYZER
:L37
BOOTSTRAP PROCESS DESCRIPTION
142
INSTRUCTION DECODE PROCESS
1:s2
MACHINE AND BUGCHECKS
171
UNIBUS ADDRESS TRANSLATION WORKSHEET
J. 72
EDT EDITOR KEYPAD DIAGRAMS

SLOT 1
SLOT 2
SLOT 3
SLOT 4
SLOT 7!'8?9
SLOT 5
SLOT uL
SLOT 7,8,'?
SLOT 7' 8,, ~i1
SLOT 10

....

__ ,

.....

r-. 11:... t -

t-i

LIVIL

i-- .... ~

lflFT

CAI.Pt

i--

.__

~K!

.,__i

tT1 H

v~:
I

I~
II

WICTClllJ . _ _ _]

r--.

U
Cll

I
I

ADD
CCI

CACHI

IYTI

••

---1>-

IAC

CCC

tl.11

MHZ

~DCU

~QDC:U

llD

l
MHZ

...

~·cu
~llC:U

lllADDATA
WllRIDATA

lI ....a.-_ _i - . .

I
l-.

MIG

'\..._ "\
17 7
4..

IH=
I

I ~::...
I
I
I ~

--~UVI---=~~·--_._~~·~
. 1-I

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----

ti--

ADDlllllJDATA
IY1EllAll

fUHC.COOEI
ITA1UI

..,...

ADDlllll I DATA ....

..
r-------co-.c.....t.-u--.a,~-

UCll

11tYN.tm1.11YN

(

fUNC. --

ADDllll~DATA ......

...

LATCHll
____
......
Cl

MA•

...

I
DPMrt ~~
- - - -_.:. '-----~------n------ ~--....----------------------~-----UBI
l
I
1
l
I

elm

ITAlUI

Hrf

COOll

---------...--1_....,.

l-nwt._.

--,...

lllc1:4>
11Qc1:4>

llff

BLOCK DIAGRAM

VAX 11/750
(GATE ARRAY LEVEL)

I
_...

2
11/750

v~x

~AI~TE~ANCE

PHIL~~0Ph{

---~----------------------------~
THE CUSTUMER IS RFQUIRED TO PPnVIDE ~ vote~ ~qAoE TELEP~OHE
LIME A~D CO~NECTOR FOR one (DIGITAL DIAG~OSTIC c~~T~R)
CO~MU~IC~TION.
CTrltS ~EQUIR~M~NT IS INCLU~~D ~Itri PC~l~ A~D
E~VIROU~E~?AL REOUI~E~ENTS lN ThE VAX 11/750 SITE P~EPA~AT!O~
GUIDE. P/N EK•CORP-SP-003 ) CP~V. IS SUBJECT TO CHANGE)
ThE ROM OPTION WI~L BE IhSTALLED IN TH£ B'CKPLA~E OF ALL VAX
11/750 SYSTEMS DIGITAL INSlALLS, TO PROVE THE VALUE ~f ~O TO
TH£ CUSTO~ER DURI~G TH€ •AR~ANTY PERICO. I~ ~ILL SE LEFT I~
Tf4e BACKPLANE FOR ALL CUSTOf.tERS et1ITH THE STA'.Jl)Dtffo R-0

MAINTEHA1CE CO~TRACT.

oASlC FLOil:

THE CUSTO~ER CALLS THE DOC

"TO~L

FREE NUMBER"

~HE~

THE~l

A PROBLEM.
(~OTE:

NU~SERS

ARE SUBJECT TO CHANGE)

1•800•525-6570

FOR DOC CON~ECTI~N

1-303-599-4000

FOR

1-303-593•7890

u.s.F.S.

E~GINEER

ASSISTANCE

LidRAP.~

u.E.C. EM?LOYEES ONLY

~AIL

THE DOC

THE DOC IDENTIFIES

THE SPA~CH OFFICE SEKD THE RIGkT ghG!~EER
PARTS TO FIX THE PROBLEM.

FOR CPU PROBLEMS:

STOP CX/DDC
PERFOR~S

tOLL FREE)

c~ar

COLORADO SPRINGS,

CO~ORAOO

REMOTE SUBSYSTE~ ISOLATION.
TH~

FAILING OPTION TO

T~E

~RAriCH

~ITH

OFFICE.

Thl klGh!

THE E~JGI~EER TAKES THE CPlJ SPARES ANO .f<D·'4 TlltJL Tfj THE. SITE.
THE E:NG!i~EE~ RUrIS THE TU58 MICFCDIAG~OSTIC C~SS~TTE

lAH.S.

FOR CUSTOMERS ~IT~ NO~-RO CO~TRACTS, T~E ~~~I~E~R I~STALLS
THE RDM TOOL IhTO T~E v~x 111750 SACKPLANE, ~~D REMOVES IT
~HEN riE/Sh~ CO~PLgTES THE ~OPK.

ON CPU LOGIC ~ODULES, F~ULTS AFF ISOLAlED TO A SP~Clf!C
M0 nlJ LE ,\ .-. 0 s I ,.. uLT A I NF.: au s Ly Tr) p. s TR I NG u to"' c li I ~ s ( A ~ E p Ac: F. Gf
T~O

GATE

THE

E~GI~~E~

qE?LACI~G

A~~AYS).

!~E

ca~PoNg~T LEVEL
INOICATEJ GATE APRAYS.

PEHF~R~S

R€PLACE~E~i

CCLRJ dV

TriE F'IX S·i'JtJLiJ THS:·J 8F.: 'lf::PIFH:r .~IT~ THC: 00C CF. '11C.? 1 u /l~SIST
!~'€'~ .-1TH 6UILL.>l:~G ~ C~SE ~IS run Ur F'AI!..!JiH.:s F'1H THfi. 1 l /750.
1' H t .S l S g, Pl) RT AN ! ! ! !

~ ~ c:: 7 c L ~ n d Es c-. aT r:: rJ R R~ c T 1 nf r i~ J LT n r• c P =J L JG r c .·.1 o c u LE 6 ,
ALL 0 T;; t:: r< Ci? IT '">4-T L ;; H~: S , T f-' ;:· :: ;,. I L l t'• (; .-.i u C u Lr~ ·) ~ A~ 5 r. :'1 t t 1 l ~
rt~PLACE:J.

~ '" D

UBI
8

TU58
INTERFACE
6

ADDRESS
LOGIC
DATA
ROUTING
AND
ALIGNMENT

CONSOLE

INTERFACE

TRANSL
BUFFER

MEMORY

ARRAY

CONTROL

CACHE

INTERRUPTS

INTERNAL MEM BUS

UNIBUS
INTERFACE

WRITABLE
CONTROL

FLOATING
POINT

STORE

ACCEL

MASSBUS
ADAPT.
SBUS

2 T.

UNIBUS

r:-- --- ----

_ _J
VT 100

RM03

LP04

VAX-11/758 Simplified System Block Diagram

lllCA02 If ( t21
ll•Jan-lt
Co•et Miera Vord Ch•rl

I CMl062.MCR 1130,1341
I OEflN .MIC 1130,1341
12449
12449
12450

.toe • Co••• Micro ~ord ~hart•

12459

12460
12481

12462

12463
12464
12465

12468
12461
12468

12469
U410

12411
U4U
U4U
12414
12471
12418
12417
12418

U419

12400
12481
12402

·.

t ... ------~-~------~---------~~-----~-----~----------------------...·

1245t
12452
12453
12454

12455
12456
12451
12458

CLOKI ••v ••••• Clock rat• • llOna

911 H'all

I
I
II
I

I
•--~-----·---~-----•

lOttLll

llllL

...... --~----~----•----~---------,--------------------------------------------~-+-----------•-•·--+-----r--------~----~-+

•-+-1---+--!.-----1---·---------·-----------·------------!-~----·-----------·---·-~---------1~1-!.!...........:.________ t

l:l:!u
l"l•I I
1

••sc

·1SP11I
I

•11c

I
I

101 .

AU>CJL

I I?I
IUI

111c

1=1 c

11c11L

1111

.~!!!---1---------1---1---------1-----------1----~---------~--·-·-----------·-~-·-----------!~.---.-----------!---------·
11717 111 ' 1 ' 'I' ••• I • I ••• I I I I ••••• I • I I I • 414 • 4 • 4 414 413 a a I a 11111 313 I I I I 211 a I 2 ·1

•I•'

•1•11 ••• 4 3.1 I .
I I 413. I 0 I,,, •• 4 a I I 0. I 1 •. I 4 a a I 0. I ' I I 413 I. 0 •• ' I 114 3 I I 0
f-+-+..--•~-----f~t-...--------1-+-----•---+-- ....---·--·----·---·-----.i-----·---·-~-------·-·---·-----------·-~-------·

kl : I : I ..,, I loo•I
1:1 ~ i i----·~::::·j~:i
·-·----·~-·
I I . !~-----·---·
ID031

ALU

·~~---~-·

·~--·

1240J
12484

1240!1
12488

·--~---~---~-----------~-----------------~·
I
2
.
I

12481
12408

·1··:::-mr1·----------::---~----·1

U4B9
12490
12491

l•I

12492
12493
12494

·--~----·-·-·---------------------------·

1~;-~1~1;1;_;_~~;_;~_;_;_;_;~.!.!l

12495
12498

:. ! .

\.' f

=··' ..

•.

I ··

·~i·--:::::·--i

IOJllK

+-----------·

cause

.-1AdUR HU.3 :JFF"t "ITILli!S

--------------------·
THE ·~'1AJOR CjMpm1E'JTS CJF THE i?ROCFSSOR AR!": I H~RCLlt11NECTE;T1

VIA TwC 32 8IT "LOW TRUE" SUSSES
THE ~RITE 805 (~~US).

CAL~E~

T~~

~~MORY

dUS

(~BUS)

A~D

~SUS:

THE

BUS 15 PRIMARILY USED ~HE~ S~URCI~G PktGRAM
OPER~~o UATA FRO~ ~£~0~Y. TiiROUGn THE MIC
~OUULE AND TO THE DPH FOR PRUCESSI~G.
tt ~AY ALEC BE
UTILIZED ~H£~ TH~ OPTIONAL FLOATING ?~t~T ACCELi~ATO~
~E~ORY

INSTrtUCTIO~

RE~lUIRES
~BUS

·rttE

OPERArJO DATA FROI"\ THE !'lllC MOO'JL~ OR kEMC~Y.

IS 'lORMALLY SOl'RCED FRUl.f THE

~HC

~OCULI:.

bUT

IT CAN ALSO BE LOAOED BY 'fHC: i4TE:olP ~€<.asrERS_-o,·: 'I f.E

DPM ~ODULE. CONTROL OF THE ~eus IS ACC~MPLIShlD
MICROCODE FIELDS AND CANN8T EE DIRECTLY ACCESS~O
THE CONSOLE TERMI~AL.

~aus:

THE WRITE BUS IS THE eASIC INr£RCO~~€CTI~N SEt~ElN
FOUR OF THE ~AJOR CPU ~ODULES CDP~, ~IC, UBI, FPA).
THE WR!TE BUS ACTIVITY IS CONTRULLEO VtA ~ICPOCOl~
FIELDS ANO CAN BE UTILIZED BY MOST Cl~P.O~E~IS INT~RNA~
TO THE CPU KERNAL. T.. E WBUS LIKE ·rHCO: "taus CANt-.O'I ..sE
~IRECTLY ACCESSED ~y THE CONSO~E TER~[~At.

C~l:

THE CPU ~~~ORY I~TERCO~NECT BUS IS ?~~ ~AJ~P CE~T~AL
BUS.
IT ts A TRI-STATE 8US CSO~E SIG~ALS AHE LCW TRUE
AND ~THERS ARE HI TNUEl

~HICH

PROVID~S

T~g

H!Gh SPEED

OF DATA BET~EE~ CPU, ME~ORY, A~D DEVICE
ADAPTERS CI.E. RH750, 0~1so, rP7SO,OR7SO,CI750 Ere.).

TR•~SFER

NOTE: INDIVIDUAL ~ODULES AND GATE-ARPAYS ~AY HAV~ thlE~ Qw~
IhTER~AL BUS STRUCTURES MUT THEY ~ILL d~ DEALT wllH
AS ~E E~COU~TER THgM I~ THIS T~XT.

BACKPLANE, REARVIEW

•1

2•

•3

4•

•5

6•

•7
•9

8•
10.

• 11
• 13

12•
14•

194

•A1

H2•

F2•

HEX

EXTENDED HEX
SLOTS

• F1
• H1

• 01

T
2

• E1

A2•
82•
C2•
02•
E2•

• 81
•C1

PINS

UNIBUS
SLOTS

SLOTS

8 9 10 1

·35 PINS
G,1,0,Q,W,X,Y.Z
NOT USED

5 6

A
A

ROW- B

c
F

\_
•Al
• 81

A2 •
82.

• C1

C2 •

• 01

02.

• E1

E2 •

• F1
• H1

F2 •
H2 •

' 36 PINS
G,1,0,Q,W,X,Y,Z, NOT USED

PUW~H

SUPPLY PAP1

~UM~~HS

UI, tJ P I\ RT # ' 8

.. -... ·---------

------------= 11!1 VUL'f

CIJUTF<OLLERS: 7015929-00

7 o1 s·n 9 - o 1

= 2 3 n v' HJ,.

SUPPLu·s:
I

OPERATOR
CONTROL
PANEL'

'
STATUS
SIGNAL

f,5-JOP

POWER
fiA ·r·rEn y i)l\Cf<IW:
SUPPLY
BATTERY
REMOTE
BACKUP
ENABLE
REMOTE POWERUP
DISCONNECT
------ANO TEMrEMTURE SENSE
OVERTEMPERATURESENSE

VO~T

!f71•M·C
rdlOl•1>

(1t5Vf\C)

-~J

:..... BIAS VOLTAGES
POWE A
CONTROLLER

:~~W

i-_UATUS SIGNALS

~AC ~~· 11~A~c

SENSE

~ BIAS VOLTAGES

+2.5V POWER
surPL y
ASSEMBLY

.-_ST A TJLS SlG_NALS

.. sv rowER
SUPPLY
ASSEMBLY

______,•__.1_1--1--1--1--1--.J---~---___.l
~-:;:
f--;.'T'-'

BATTERY BACKUP ENABLE
BATTERY BACKUP
DISCONNECJ

1
AIR
BLOWER1 FLOW
MOTOR SENSOR•

07112

____________

: 2.5

= s.o vn~T

&-15P C2JUVAf)

_..._.__________
AC FACILITY POWER
. 115/230VAC, ur

70161~7·01

70t6156•0t

l -

BATTERY
27 tO
BACKUP
~
UNIT
(OPTIONAi:!

r-T-O_Y_ _

leATTERYj
..

•

DC -5VB +12VB
t LO t1.2A t10A
AC
+2.6 -t5VB
LO
85A 10A

•ASSEMBLIES RELATED TO H1104
POWER SYSTEM AS CONFIGURED
FOR OPERATION WITH THE VAX-11/750

1-17104 Power System Block Diagram

1
+5V
6mA

•

+15V
2A

•

-t5V

-15V .

136A

3.5A

8
....,______________________________________
"""'
2!6K8
1 ARRAY BOARD ""°' ~7,~f

aoooao
Q3FFFF

CMOODO

512K8

07FFFF

080000

7181C8

CJBFFFF

oaxJOO

1024 KB

FFFFF

1CIOOCID

128DICI

t3FFFF
1~

1538 ICI

17FFFF

180000

18121C8

11FFFF

1c:moo

204IK8
MAXIMUM FULLY POPULATED ARRAYS

...

1FFFFF

t---~---------~

.. ..

--~

----END OF EXISTENT MEMORY

FOODOO
F10CXID

F20CXID

MEMORY CONFIGURATION REG. A

F20QIM

MEMORY CONFIGURATION REG. 8

F20008

MEMORY CONFIGURATION REG. C

F20t00
F21QOO

MASSIUS ADAPTOR 0 INT. REGISTERS

F2MOO

MASSBUS ADAPTOR 0 EXT. REGISTERS

F28800

MASSBUS ADAPTOR 0 MAP REGISTERS

F2AGOO

MASSIUS ADAPTOR 1 INT. REGISTERS

F2MOO

MASSBUS ADAPTOR 1 EXT. REGISTERS

F2AIDO

MASSBUS ADAPTOR 1 MAP REGISTERS

F2COQO

MASSIUS ADAPTOR 2 INT. REGISTERS

F2CAOO

MASSIUS ADAPTOR 2 EXT. REGISTERS

F2CIOO

US ADAPTOR 2 MAP REGISTERS

F30CIOO

F3DCIO'-C

UNllUS DATA PATH CONTROLl&STATUS

F30800

UNIBUS MAP REGISTERS

F32000

2NO UNIBUS DATA PATH CONT. STA

F32800

2ND UNIBUS MAP REGISTERS

'-f-) ~) C..

2ND UNIBUS MEMORY SPACE

FBOOOO

128KW

FCCCCC
UNIBUS MEMORY
SPACE 128KW

VAX-11/750 Physical Memory Organization

9
VMS-SHUTDOWN PROCEDURE
TO BRING THE VAX/VMS OPERATING SYSTEM DOWNY ONE MUST
HAVE THE PROPER PRIVILEGES. THESE CAN BE HAD BY LOGGING INTO THE
SYSTEM MANAGERS ACCOUNT. THE NORMAL FIELD SERVICE ACCOUNT MAY
NOT HAVE THE PRIVILEGES TO BRING THE SYSTEM DOWN.
SO LOGOUT FROM THE ACCOUNT YOU ARE IN, IF YOUR IN, AND LOG INTO
THE SYSTEM MANAGERS ACCOUNT AS SHOWN BELOW <UNDERLINED>.

<OF COURSE IN THE FIELD YOU PROBABLY WILL NOT HAVE THE PASSWORD)
USERNAME!SYSTEM
PASSWORD:MANAGER
NOTE THE PASSWORD IS NOT DISPLAYED.
AFTER YOU HAVE THE

•$ 1

PROMPT, THEN TYPE THE UNDERLINED RESPONSES.

Welcome to VAX/VMS Version VX.X
$

@SYS$SYSTEM!SHUTDOWN

@CSYSEXEJSHUTDOWN

S~stem shutdown command Procedure+
23-MAR-1980 09!35!23
How many minutes until shutdown?: 10 (or whatever)

Reason?: PM <or <CR> if no

messa~e

is desired)

Do You want to sPin down the disks?: YES (or <CR> if not>
Expected uptime?

<<CR> if not known>:

Enable automatic reboot?:

YOU HAVE NOW STARTED THE SHUTDOWN PROCEDURE. YOU HAVE GIVEN IT
TEN MINUTES TO DO THIS, ALSO GIVEN THE REASON AS SYSTEM PM, AND
TOLD IT THAT YOU WANTED TO SPIN DOWN THE USER PACKS <NOT THE
SYSTEM PACK>. THE SYSTEM WILL SEND OUT A WARNING AT PREDETERMINED
TIMES. IT WILL STOP ALL QUEUES, LOG EVERYONE OUT AND FINALLY
COME UP WITH THE FOLLOWING MESSAGE!
SYSTEM SHUTDOWN COMPLETE - USE CONSOLE TO HALT SYSTEM
NOW YOU CAN TYPE A CONTROL up• TO GET BACK TO
CONSOLE COMMAND LANGUAGE MODE WITH THE PROMPT

"~~~

LOCO 1 FPA

1'F750

Tne Floating Point Accelerator Cf~A) An optional hich-speed processor extention
to the .vax-11/750 CPU. ff-750.
A. Purpose:
l. To increase the speed at ~hich the
vax-111150 can execute certa!n

floating point instructlons.
a. S1ngle-prec1s1on float!nq

b. oouble-prec1s1on floating
c. Extended

~odulus

ClMOO)

2. To enhance the execut1on of integer
multiply instruct1cns ·
3. It will not accelerate execution ot

grand CG) or huqe CH) tloat1ng
instructions.
·
B. Characteristics:
1. Extended-hex Module

2. 28 gate arrays
3. 64-bit fraction data path
4. Mo internal diagnostics

s. 80-bit micro-word
o. Operates independently ot the CPU
a. Uses CPU data cacne tor data fetch
c. Uses the CPU Instruction oufter for
instruction fetch
c. While FPA is executing, the CPU can;

1) Calculate

rrernory

addresses

2) Fetch data

3) Precare to

trcns~it

cata

4) Store FPA results

can operate on numbers from .29 X 10

s. Can operate on si9ned 1ntegers from 2

1~7

x 10
-1.

c. Interfacing to the CPU.
1. M•Bus

2., w•Bus
J. Miscellaneous

a. control stote address lines
~.

fro~

ccs.

Exceptions/Interrupts to UBI.

c. Clock s1gnals from the DPM.
d. Others, to and from all of the above.

6lJARD COr!FIGUR'4Tl0"-IS

-------------------~ICROFICHE

TtfE

GIV€

eo~~D

Lrs·ru;G:> FOR ECKAS.EXE ANO t:CKAC. C.H:

LAYOUTS AND LOCATICNS Of EACij (;,\TE ARFAY.

-----------------------·----------------------------CTOP)
I
1--1
I
i
I

THE

FPA

~OOULE

•LOOOt

I
I

------------------------------------FQA
f·Ex
FEX
FCC
---------- ---------- ---------- ----------

I
I
I
I
I

O> LED CFPA

'
I

I
I
I
I
I
I
I

E~ARLED>

---------------------------r·FA
FiiJ
FFA
---------- ---------- -----------------------·------------FFA
FCS
FtiJ
------------------- ------------------------------------F..fR
'CLA
fCS
_____ .. ____ --------~---------- ---------------------------·
F'iR
FFA
FC:S
---------- ---------- ------------------------------------FIO
FI".l
E'FA
---------- ---------- ---------_____
--·------------------------a:-rn,. ____
FFA
FIO
---------- ---------- ---------------------------CLA
FFA
.. - -----~------------- ---------------------·--·---------to.. FA
fI;J
f'lO
----------- ----------- -------·--

·--·--

1-1--

[.. !i)

----------------------------------~-~--~---~---~-----

1--

~---,

: CPU

I F?A

;
I

I
I
I

I
I

O?:r1ANOS

. , _ _ I-

ivta~s

I
I
I
I
I

DATA
?ATHS

OPERANOS/RESUL TS

!..OGIC

wsus
FPA CONDfTf ON CODES

INTERFACE CONTROL
.

CS FPA

e
;

CONTROL
LOGIC

CONTROL
SISNALS

INTERFACE CONTROL

CS WCTRL

OPCODES
XBUF

CONTROL SIGNALS
TIMING SIGNALS

--t__ J
FPA 1/0 CPU SIGNAL INTEarACE

STATUS
SIGNALS

I
I

rP750 INSTALLATION PROC€DURE

-·-------------------------*** CAUTION •**
THE L0001 ~ODULE, AS ALL 11/750 MODULES,
CONTAINS ELECTROSTATIC DISCHARGE SENSTIVE DEVICES CESOS).
THE USE OF THE V£LOSTAT KIT IS ESSENTIAL
ro PREVENT DA~AGE WHICH MAY ~OT
9ECO~E IM~EOIATELY APPARENT.
CVELOSTAT KIT NUMBER A2-~0299•10)

1) Run system shutdown or the equivalent C•SYSSSYSTEM:SHUTOOWN)
2) Verify that the hardware revision level is Rev 3 or higher,
and microcode revision level is equal to or greater that 94
decimal Cstep 4).

3) The FP750 will only worK correctly in 11/750 systems tnat
contains MINIMUM CPU Microcode revision 94. To verify revision-level
of the 11/750 system examine the System IDENTIFICATION Register
CSID).
4)

Place the keyswitch to the LOCAL position, HALT system
c•p) and type the following:
>>>EII 3E

Cprintout)

I 0000003E

02005EXX
A

, _____ ***

Ucode Rev 94
CHEX 5£)
XX
XX
XX
~JIE:

=
=
=

Hardware Rev

03 L0011 controller/old bac~plane
30 L0011 controller/old backplane/SID switch
38 L0016 controller/new backplane/SID switch

VAX7SO•R•003 rCO CREV 94 Micro code) is a orerequisite before
the installation of a FP750 oPtion. This FCO consists of reworK
to the L0004 UBI ~odule and replacement of the LOOOS CCS module,
this will brinq botn modules cccs and UBI) to REV "H".

This

rco can oe oroered using

F.0-01120-01

nu~ber.

16
*** OJ ~OT !~STALL THE L0001 MODULE wITHOUT PROPER MICROCODE LEVEL ***
5) Place tne front~anel Action on Power Switch to the
position, and re~ove po~er from the system.

~ALT

Unpac~ the VeloStat tool from its container, ooen oackaqe,
and attach the 15' pot ground cord to the VeloStat sna~ fastener,
which attached to the wrist strap. Attach the end with tne alligator
clip to a reliable electrical qround on tne 11/750 system.

7) Install tne L0001 FPA module in slot 11 of the CMI backplane.
If the RO~ or D~ L0006 module is not already resident in the
CPU, install it in slot #6, ~ove the console and TUSA cables
from the lefe side to the right side of slot 16 on the processor
backplane Clooki~; at the back of the orocesserl.
8) Reacply Primary power by turning the keyswitcn to local
position, on the console panel. Tne syste~ will come up in
t~e HALT state, ~1th the console pro~pt
>>>.
9) Test the FPA's ON/OFF Cenaole/disable) capability by us1nq the
followinQ console commands:

>>> O/I 28
>>> E/I 29
C~rint

out)

00000028

00000000

Depositing 0 to IPR# 28 disables FPA (GREEN LED will not be lit)

>>> D/I 28
>>> E/I 28

8000

Cprint out)

00000028

00000001

oeoos1tin; 9000 to I?Rt 28 enables FPA CGREEN LED will be lit)

FP750 uses tne Accelerator Status/Control register IPR #28
The followinq diagram describes the bit position of the
Accelerator Control/Status Pegister tACCS)
31

16 15

24 23

8 7

I -----------------~--·-------~-----~------------~--------------~-X 0 0 O X 0 O 0 o 0 0 0 O 0 0 O X 0 O o 0 0 0 O 0 0 O o a· 0 0 X I

-·-------·--------------------~--·--~---------------------------~rror

+----------------+
•

··-·

ooerand •
I
€~able Accelerator ---------------------·
-I
~=celerator Type --------·--------------------------------------~-·
FPA Enable
(WO)
Sit <15>
~eserve~

Bit <7:0> - Accelerator Type

o = No accelerator Cor disabled FPA)
1

= Enabled FPA
= reserved

2•255

Note:

~~ostic

ACCS <15> always reads as o. In order to determine if an
111750 nas an rPA you must first write a 1 to ACCS <15>
then read ACCS <O>. If it reads o there is no FPA present,
if it reads back as an 1 tnere is an FPA and it 1s now
Enabled.

Acceptance

""""""""~"""""""""

Tne VAX Arcnitectural and Floating Point Instruction
Exercisers are used to verify tne 1nteqr1tv of tne FP750 option.
These instruction exercisers will run under the Diagnostic Suoerv1sor
stand-alone or on•line, but to properly test the FP7SO they should
be run stand-alone. Cin on•line mode, tney cannot disable and
enable the FP750). The enhanced DP~ micro diagnostic is used to
verity the loQic wnich interfaces the rP750 from the OPM ~odule
of the 11/750 processor.

Version V07.2 or greater of the ECKAe DPM ~icro d1aqnost1c will
verify so~e of the CPU•FPA interface logic. v~r1f 1cation of this
interface lo;ic, ~hich is resident in the OPM module of the CPU
and is not activated until the FPA 1s e~abled, is tested under
test 02-oc of this diagnostic. These test are listed below:
02
03

04
OS
06

07
08

09
DA
O~

The F?A Enable/Disable Function
FP4 Stall/Wait Test
~BUS/WBUS Interface Test
f?A Reserved Operand Trap Test
FPA Tra~ Logic Test
Condition Code T~st Cl of 4)
Condition Code rest C2 of 4)
Condition Code Test C3 of 4)
Condition Code Test (4 of 4)
FPA Cocy fo Condition Codes
FPA Cocy of the fU 91t

18
10) Boot Diagnostic Suoervisor CECSAA) and attach the processor.
>>> B/10
[device]
OS> ATT KA750 C~I KAO NO NO YES 0 1

CAccelator

type)

'••• C l=FPA .O:No FPA)

OS> SEL~ct ALL
OS> SET !Race

11) Run EVKAB

The ARCHITECTUR~L instruction exerciser will run first with
tne FP750 disaoled·CGreen LEO on the L0001 ~odule will not be lit).
whe~ this first pass has completed successfully, another pass with
the FP750 enable~ will be performed.
12) Run EVKAC

The FLOATING POI~T instruction exerciser like EVKA~, will
also run with tne FP750 disabled on the first pass. Again after
when successful c~mpletion, the FP7SO is enabled and tested.
If a failure occurs when runninq either EVKAB or EVKAC, run ECKAB
COPM micro dia~~osticl to verify the inteqritv of the interface
. looic on the DPM module. If the failure is not detected wnen runninq
ECKAB, re?lace tne L0001 module and rerun EVKAB,EVKAC, and ECKAB.

13) Run
Run

EC~AB

DP~

micro diaQnostic to verify the interface lo;1c
(go to console modeCnalt any macro
program activity))
(go to

RD~

(get ROM

ROM>

console control model

Prom~t11nstall

TU58 tape)

(start test)

14> Error Free Passes of EVKAB,EVKAC and ECKAS indicate verification
is complete C~ia;nostic runtime is about 45 minutes).
15) If RD~ is to be removed, power down system, remove L0006 module,
replace Console and TUSB cables to their original positions.
16) Dis-connect the VelaStat tool and reoacK it in the
17) Power

18)

~ootstrap

system.
customer's operating software.

~it

container~

L0002 DPM

20
SLOT 2).

THE DATA

PAT~S

~J0~L~

COP~)

tL0002

IT HOUSES THE G~NE~AL ?URPOSE RFGISTERS (~?~',), lHtfRt~~
PRIVILEGED REGISTERS (!PR'S), ~TEM? ~~O RT~~p 1ICROCGD~~
PEGlSTERS, ARITH~ET1C LOGlC UNIT (ALU), ROfAra? LOGIC,
Q A~D D REGISTERS, P A~O S LATCH~S, SYST~~ CLQCKS,
~IC~OSEQUg~CER, IR DECODE RO~S.
THE DP~ IS cn~NECTED TO TH~ w BUS AhD ~ ~~s.
CTHE MICRQS€~UEttCER IS CONNECTED ro T~E ccs ~F COURSE)
NOT£:

THERE IS NO PARITY C~ECKING AT ALL OH THE 0°~ ~OCULE
OTHER THA~ CONTR~L STORE ~lCROCODE PARITY ~HICH-~S-~AtChED
ON THE

rue, UdI, DP'-1, AND ccs ~UOIJ[.,F.:S A.rn CfiEC~ED ON lhE. r,p~.

THE ~ICRODIAGNOSTIC ECKAB.FXE TAPE •1
GATEARRAYS:

~ILL

--------------------------------------= CbMPLETE RAiGE OF Bl!S CO~TA!NED I~ EACH CHI?
= NOT APPLICABLE IN
CHIP
T~IS

<> : SI•OIRECTIONAL
o

= INVE:RT~D

CP~.

ALP,ALK,CCC,CLA,!RD,~SY,PriS,5AC,SP~,SRK,S~M,TOK

GAl'E•ARRAY "'AGIC dOOK PICTURE SYMBCLOGY
X:X
N

TeST T~E

C~AJOR

~US)

21
---~--~-~---------------------~-----------~--~--~--~~1-CTOP)
!HE

OP~i

;.100ULE

?I~S>>>>

#L.0002

------------------MSQ
PHB
---------- ---------------------------CCC
SAC
---------- ------------------------------------IRD
SPA
---------- -----------------------·------------TOK
ALK
CLA
----------- ---------- ------------------- -----------

-----------

1--

SRK

ALP1

Al.PS

---------- ------------------- ---------ALP6
---------- ---------------------------ALP3
ALP7
---------- ---------------------------ALPq
ALP4
---------- ------------------------------------- ---------SP?-t3
SRM2
---------- -----~---- ---------- -----------

1-1--

~T~P2

s~.-..1

1--

----------------------------------~-------------------

-- -- - - ·--· - -.,._

22
DATA PATH

·- I

.._________________________________.._____.

...
Data Path Block Diagram

--r

23
ALP:

~RIT~~ETIC

LOGIC

PRJCESS~PC~L~)

CO~TAI~S LOGIC TO PtRFO~~ 1094 ~~IT~~ETIC ~·!1 LOGICAL
FU~CTIONS. ALSO CONTAINS A "SECG~O ~EV~~" 3HIFTER fOR L~E
WITH THE SiJPE:R ROTATOR ~UL'!IPLt;X~tot. CS€C: !;~K -~·lD SR~ Cf-'IPS)

3 CHIPS:

CHIP

ALP t

rr SLICE

PAHT NUMBER

AIJP 2

<3•')>
<7-4>

19-146S2

ALP 3

<11-~>

ALP 4

ALP 7

<15-12>
<19-16>
<23-20> __
<27-24>·

ALP 8

<31·2~>

ALP 5
ALP 6

8EST DIAGtlOSTlCS:

GATE

f40DlJL£: OPM
BUS DEF!NIIIO~S:

OP~

MICRO'S

A~RAY:

ECkAB.~XE

ALP Ct THROUGH d)

SB = S3US (SUPER ROTATOR 8US INTERNAL 10 ~?~ ONLY)
USED TO TqANSFER INTERNAL RUTATJR O'TA &ET~El~
FIRST AND StCOND L~V~L ~HIFTEriS.
.
RB
RRUS CROTA?OR aus lNT~R~AL TU OP~ ~NLY)
USED TO TRANSFER DATA raa~ SCRAtCri ~AD REGISIERS
(EXCLUDING MT€MPS) rn ALU.
'48
r4 Bus ( ~ r-: ~GR y au s • s EE MAJ() R 8 fJ s 0 g r'l:H TI a~- s f AG c: )
wB = ~BUS (WRITE BUS. SEE ~AJOR BJS D~FI1ITIO~S fAGEl

TERM DEFINIT!CNS: 'MUXZ

8US

~ULTIPL~X£R

EQUAL

ro ZE~O

N,~,EXT-DATA,gxr_DATA,EX1-D~TA

ALP

SBC2,6,10,14,18,22,26,30)--1--····--·---o-4S-EXT-OATA,~XT-0At\,~XT-DAI~

Q C0,3,7,11,15,19,23,27) __ 2_0
sa c1,s,9,13,11,21,2s,29>--l-QD CLK--4~o
GEN~~ATE CARRY CG X:Xl--5-o

o-47-SHF 1
--4&-ss cc,10,14,1q,22,20,3o,34)
--45-SB (3,7,11,\5,13,23,27,31)

o-44-SriF 0

A~UC(0,3,7,11,1s,19,23,27)--6-o
v c~,7,N,15,N,N,N,31)--7--

--43-SS

--42-SB

CS,9,13,17,~t,25,29,33)
(4,s,12,1~.20,24,2~.32)

A CJ,1,11,1s,19,23,211 __ a_o

--41-S~

cu,4,~,12,16,20,24,2a>

PRLPAGAfE CA~RY CP X:Xl--9-o

o-40-Q (3,7,11,15,19,23,27,31)
o-39-~a

wec3,1,11,1s,19,23,21,l1l-lO<>
~a (1,S,9,13,17,21,25,29)-11<>

Cl,1,11,1s,19,23,i1,31>

--38-GROUND

VG~-12--

o-37-RB C2,6,10,t4,1~,22,26,3t)
0-36-Ra c1,s.~.1J,17,21,2~,2~)
1--35-GiWUND

VCC-13-w8(2,6,10,14,19,22,26,30)-14<>
NB (0,4,8,12,16,20,24,28l-15<>
A C0,3,7,11,1s,19,23,27l-16-o
~LPCTL 2 COPC2J-17-ALK o~ 4 CCPC41-13-ALK OP 5 COPCSl-19--1
ALPCTL 3 CCPCJ)-20--t
~Muxz aco,0,1,1,2,2,3,3)_21 __ ,
A~K OP 6 COPC6l-22--1
ALK OP 0 CGPCOl-23--1
ALK OP 1 COPCll-24--1

lo-34-DP

?HAS~

lo-33-~b

C0,4,d,12,16,2v,24,2~)

lo-32-~8
lo-31-~R
lo-30-~~

(2,6,10,14,13,22,26,3Ul

10_2~_:•0

c1.~.~,1J,11,21,2s,29J

(J,1,11,1s,1~,23,27,31)
C0,4,~,l~,t?,20,24,28)
1--2q-ALPCTL 9 (lPC~)

1--27-A~?C?L
1--26-AL?CT~

()

g CJ~~~l
1o-25-+3i~~~.+3JiJ~.xcq:15)~N.
X(8:1Sl~·t,fJ.5!Zi:!:1,D.SlZE1,CSilF:l,

----------

iJSlZEl
T tJ Is s F) ~

r :J ~·J A RC· 5

~pr~::: Rs

7 (JaC7)

.Jr:

~ '.) A k D

24
~LK.:

AtUTh~E'UC

cn~T~ar.

LOGIC

COi~TROLS

THE "LP FUNCT1ur;s BY JF.:C·JDI•JG ·HCP.OCOr.t:
L:JP 1JTS AND (;~N€w1' 'rING Thi C01~TROL S IG1·~ ~T.1S.

BEST
~OOULE:

TER~

DI~G~OSTICS:

DP~

ECKAS.EXE

~ICRO'S

GATE: ARRAY: AL;(

DPM

DEFINITIONS: CSIO)

= S~IFT IN/CUT
At,K

Q CSIO) 1--1-o----------o-48-Q (SIO)

ALU SIO 0--2-o
ALU SLO 31--3-o
ALPCT~ 0--4--

AtPCTL 1--5-A~PCT~ 6--6-ROT 3--1-ROT 4--S-ROT 2--9-DOURLE !NABLE-10-?SLC-11-VGA-12-VCC-13-ALK OP 6-14-·ROT 0.15-ALK OP 5.16--

--43.AL?C?L i
--42-ALK OP 0
--41-C 31
--40.ALPCTL 4
--39-oCD
--38-GROUND
--37-ALPCTL 5
--36-ALPCTL 2
--35.GKCUjD
--34.ALPCTL 3
o-33.LONG LirERAL

aaT 1.11__

QD CLK-18-o
ROT 5-19-ALPCTL 7-20-CAR~Y OUT CCOUTl-21-o
ALPCT~ 9-22-ALK OP 4-23-ALK OP 1-24--

<>47-w8 31
<>4&-WS 30
0-45-Q CSIO) 15
o-44-Q (S!O) 31

--32-SPw 1

--31-D SIZE 0
--30-SPw 0

--29-SPWB f::'IA'3LF.: CSYTE)
f--28-SPWL E1ABLE CLU~~~Okl)
1--27-SPW~

E~AoL€

(WO~D)

1--20-D SIZE t

lo-25-CBYTEl

XC~:15)E~

·--------TriIS SIDE TOWARDS

FI~GERS

ON SUARO

25
CCC:

CONO!ll~N

CODi CHIP

CCl~ T .\ I :JS P .SL CP .S w)

~ I TS

CO~?ROLS T~E SETTI~G a~ ALL CONDITION CODES Fa~ VAX
~ATIVE ANO CO~P~TAAILITY ~ODE INST~ucrra~s AI ThE

OF T~E MICROCODE.
IN CONJUNCTION WITH

REQti~ST

~ORKS

PARl

NU~dER:

~ICRO'S

~CKAB.EXE

MICRO'S ECKAC.EXE

~IC

TERM

ALU.

19•14684

8€5T DIAGNOSTICS: OPM
MODULE:

T~E

'iATE AHRAY: CCC

OP~

OEFINITIO~S:

CCBR :

CO~DITION

CODE oRANCri

CCC
D SIZE 0--1--••••••••••o-49-FPA
o

D SiiE 1--2--

WMUX Z 80 CBYTEl--3-IR 6--4-IR 4--5-IR 1--6-IR 5--1-IR 3--8-IR 2--9-IR 1-10-IR 0-11--

1--46-ALUV 31
1--45-ALUV 7
1--44-ALUV 15
--43-wMUX Z 81
0-42-ALUC 31
0-41-ALUC 10
o-40-ALUC 07
<>39-~~ 31
--38-GROUND
--37-~MUX
<>36-w~ 7

VGA-12--

vCC-13-FPA Z-14-o
ARITHMgTIC

PR~S~NT

1<>47.WB 15

FPA V-16-~
PSLC-17-CCBR 0-la__
PROC I1IT-lq_o
BUfF B CLK-20-NO 0-21<>

wB 3-22<>
WB 1-23<>
"48 i-24<>·1

--33-CCBR 1
<>32-WB o
--31-WMUX Z d2
<>30-W8 4
1--29-CC CTRL 3
1--28-CC crRL 1
1--27-CC CTRL 2
1--26-CC CTR~ 0

()

1--25-D CT..1K JO:N

---------SIO~

C1YTE)

--35-GROUNO
<>34-~B 5

?RAP~15-o

T~IS

C~Y!E)

tO~ARDS

FI~GEPS

ON 5JARD

C~YTE)

26
CLA:

CAHkY LOOK
-~T

LOOL<S

~hEAD

GC:'l~R\TE

C? A:JD G SIGrJALS)TO

,\i,,? CHIPS

PROPAGATE CARRIES, AS

~~LL

O~AL11G

~ITi

THE MOS1' SIGtHFICA'.'IT 'H't'S OF EACH uATA

CHIP ~lTH DET~RMIN~TIO~ Of
CHARACTERISTICS.
~cc

PO~IIIVE

T~€

AlHJ/CR

STAIE Cf

·r·t?r: 'r'.) Alu tf.E
1R ~~GATIVE

BEST OIAG~OSTICS: OPM 1ICRO'S ECKA6.EXE

MODULE:

bAT€

DP~

TERM DEFINITIONS:

AR~AY:

C~A

~CD
BI~ARY CODED DEClMA~
ALUC = ALU CARRY ~ITS

CLA
G C12:15l--1-o•••••••••·--48-QO CLL<

--47-LONG ~Ir
--46-+JV NO~

NOcl BCD--2--1 o
ALUC 23 CC6l--3-ol
P C12:15l--4-ol
G (04:071--5-ol
ALUC 0 ·cco) --6-ol
N--1--1

o-45-LITREG CLK
o-44-G (31:29)
0-43-P (23:20)
o-42-SCO FR~, ~~K
0-41-P (19:16)
0-40-ALUC 07 CC?.)
o-39-P (31:29)

~--8--1

ALUC 31

N--9--1
-10-ol

o-38-GP.•JlJ~u

G (03:00)-11-0I

VGA-12-o
VCC-13-o
G (31:28)-14-o
ALUC 31
-15-o
G (23:20)-16-o
G C15:12l-17-o
p (11:06)-18-0
G C27:24l-19-o
~LUC 27 CC7)-20-o
G Cll:Odl-21-o
G (27:24l-22-o
ALUC 19 CCSl-23-o
G (19:16)-24-o

o-31-ALUC 15 CC4l
0-36-G (11:08)
0-35-GROU~O

o-34-G (19:161
o-33-P Cul:OO)
o-32-P C27:24)
0-31-~ (07:04)
o-30-P (07:04)
o-29-G (03:00)
o-28-G C23:20)
o-27-CAR~Y

·--------t~I5

SID~

TO~ARCS

FRO~

o-2b-ALUC 03 CCl)
o-25-ALUC 11 CC3)
Fl~G~RS

~O~~D

ALK

27
IHD:

I~STRUCTION

REGISTE~

oecan~

R£CEIV~S I~STRUCTIO~ STREA~
HF. L p

CrlIP
OATA FRU~ Tri€ gxECUT!Ci4 BUF~EPS,

s [') € c 0 DE THE a? c 0 D Ji; A,.. c 1 st a? c: RA ·m s p ~cu~ I c: R ,

A j,; c ~ 5 ls Ts

TH£ IRDl D~C~DE RO~S I~ GE~EF~Tl~G THE ?~00s~ ~ICPOCODl ADDRESS
EAC'i I~'iSTRUCTTiJN A~n ADDPESS!i'J~ :-\OU~. Of) COIJES ARE LATCHED
IN IRQ UNTIL m:Jl·r I~Dl TI,..E.

FOR

<••CSADC9:3l·-------------·--·-IRDt
<••CSADC10:0)•••IROX

RO~

PART

~u~aER:

DPi'A

C:-4 DP ) CH I f S
D~COD£

~us--

<--< XA 0
<·-< Xb 1

19-14696

GATE

~ICRC'S

.i\RR~Y:

~CKAB.EX£

lRI:'

I~D

XBUF 00--1--------------48-CIRO ft()1t4) t R 00
XdUF 04--2--1 0

1<>47-XBUF 1 l

XStJF Jl--l--1

I <>46-XStJl'.. O'J

XBUF 10--4<>1
CIRO ROMJIR 01--5--·
CIRO RQM)IR 01
06--b-__ , __
CIRO RQM)l~

1--'* 5-~•CTRL 2

1--44-DISP 1.srze 1
1--43-XBU~ 01
1--42-XSUF Oo
1--41-IFD R1'IU~ 2
1--40-IRD iHW~~ 1

XBU1'"' 02--8--

CIRO ROM)IR 05~-9-CIRO RO~)IR 02-10--

1--39_( uw

XdUF 09-11<>
VGA-12-VCC-13--

, __ 34_1~0 AC'l'L

•)

1<>33-XaUF 14
1--32.SUF :.. CL!(
1--31-If<D ~OJ C-rL 1

LOAU OSI-< A-18-o

XBUF tS-19<>

1--30-IRD ClJ~ll'~iJL
lo-29-CSAD 03
I0-2~-CSA') 00

X3Ui'... 12-20<>

DISP !SIZE 0_21 __
XSUF 13-22<>
LOAD IR-23-0
X~UF' 07-24--

~']·-() [~

1--38-GROU:'4D
1--37-IRD R~i U'1 0
1--36-IRD ~.'4U:.1 .l
1--3 5-GR r)U '.i D

CIRO RQitC)IR 04-14-(REGISTER ~fJDE)DST R~OOE-15-:CUMPATABILITY ~ODE)PSL CM-16-XBUF 05-17--

()

er.

·nc MOCULE

BEST OIA~NOSTICS: OPM
.'100ULE:

f":XECUTION
dUFFE.HS

---------------IR
---------------IRO CHIP
OSR

<•CSAOCl:Ol-·I

RO~

1--2 7 _Rr~GI ST::~
lo-26-CSAD 01
lo-25.CSAD 02

·---------

TH IS SI DE: T ') v. A 10 S F J:Vi C:? S

~ '1

d 0 I\~ D

~OD~

28
~ECiUE;vCES

ADDRESS,

PAPT

·r;;£

:HCiW~Q[,~,

N~~BER:

DPa.t

uU,.; 6 d I TS ·ll!'"" Cll.'.JTRGL S'lL.t'(F
"Exr rlELu LA1C•ffs.

1Y•14b95

ags·r DI .~1;.rns·ncs:
~ODULE:

FORi~S

ro THE MIC~Li ST.\CK A.rn

CO·-.~.JECTED

:HCHC, s ECK AB. £XE

OP~

GATF: ARRAY:

MS<.~

~wt SQ

LlT 1--1-----------·--48-DISABLE ~I ~EXT
LOAD 'JSR A--2-o

1--47-BlJF 8 CLK
f o-~6-DO SERVIC~

BUT CTRL CODE A--3--

I o-45-l-1SEQ I~Jt·r
1--44-tWF \t CLK

t:sUT 2--4dUT ll--5-

('~F;GATI01\I

SUT 1--6-LIT. o__ 7 -FPA 111AIT--S-O

1--43-STK 5

USTK AODR 3--9--

lo-40-~ICRO

USTK ACOR 1-10--

lc-39-ENABLE

USTK ADDR 2-11-VGA-12-1CC-13--

lo-37-USiK OUTP~T gNAbLg

I 0-4 2-0 s I ti cFR ll ~.f 0 s
I 0-41-ZERO HI !•fF.:X·r

I~ h )

AD~RESS l~nIBil
I~D ~o~ H

1--38-GRCU~O

1--36-JSR

1--35-GROUND
lo-31-CSAD 5 (AOC)
1--33-NXT 5
, __ 32_1~.xr 4
lo-31-CSAO 4 (~uC)
1--30-STK l
1--29-ST~ 4

USTK AODR 0-14-I~D

CTR 1-15--1
IRD CTR 2-16--1
STK 0-17-1
STK 1-18--t
NXT 1-19--f,
.CSAO o·cADCl-20-ol
CSAD 1 CADCl-21-ol

STK 2-22--1
NXT 2-23--1
"IXT 0~24--1
THIS SIDe

Ra~

1--2~-NXT

lo-27-CS\O 3 CAOC)

()

1--2&-ENABLE
lo-25-CSAO 2

----------FINGERS

TO~ARDS

~ICRJ

(AOC)

dn4RO

VECTCP

UCLO)

IHER€

AH~

FIVE

~AYS

SEQijE~CI~G

1). s?qAIGHT THRQllGH NEXT FIELD
2). 9RA:·.;Ci-f I,~·:; OrJ BUT C(l"IDITI01~5
3).

PERiO~~I~G

~ICRO

VECTOR

T~~

~ICRJC~JE:

AOCR~SSt~~ C~J
l~~ HA~D)lfA~.~

~CD!FIC~lIDNS)

n?E~ATlQ~S

4): JUMPS TO A·10 PeTUR:45 FRQ;-1 t-'i ICRO suaRou·n "~S

5). INSTRUCTtOIJ DECODE

_______________

~SQ

-----------------1-----~--------~----------·-·--~----\
TO ccs
:SAD CS :o l
. uw NEXT FIELD -------------> FIELD
MODULE.
I
•
---------------1-1-1·--------------/
-------------1
I
I I
---.
. -----+I
___
,
10
I
I
lo••+
"tICRO ve.cTCR CODES
l<•USTl<••> <•'
c
I
R
I
I
---.
-----------------a a ___
11 , >o--·-+
1 x <-- SAC CfiIP
. -----+
~EXT

~ICROSEQ INlT••>
_______________
_______________ ,
:lUT FIELD

I
T
v5

c
T

JSR Slt-·-··•••>I

a
R

---.
___ ,
lo------+
---. lo--------+
---·
12

·-·ZFRn HI

+---------------+

~EXT••>

)ACF rJ TRAPS

I
2

x <-- SA·C ~NO

~ICl<O

~S"l

UlR CHIPS
TRAPS

x <-- u1·R A~D

ltvT CHIPS
INT~RUPTS

CHIP

30
PHd:

~R~CtICA~LY

~ALf

BUTS

?SL BITS <CM,TP,FPD>, STEP COUNT~~. St\IUS ~LAGS,
ANO A~OUT ~~Lf THE LOGIC TG PERFOP.~ (3UT)~?A~C~ An M!CFC•
TEST ~lCHO-ORO~RS.

CO~TAI~S

PART NUMd£R: 19-14703

r-~OOULE:

G4TE ARRAY: PHB

DPM

TER,., DEFINITIONS:

PH~

GOOD SAM

= GOOD SAr-tAiUTA1i;

~us

PHB
0 CLK EN1'6Lai: H-1-o----------o-4b-CSAO 1
CSAD 0--2-0 0
--47-~ISC crL 0
WS 00--3<>
o-4&-LO~O I~
o-45-dUF M Ct.i<

~--4-PSL FPt)--5-~~B 03--6<>

INTERU?T--7CSAO l--B-o
CSAO 2--9-o
DO SERVICE-10-o
wa Ol-11<>
VGA-12-VCC-13wa 02-14<>
DISABL~ CSAD-15-SUT 0-16-BUT 1-17-LONG LI!ERAL-18-o
SUT 4,.19-dU't' 5-20--

su·r 2-21--

suT l-22-.-10 05-23<>
CSAD 5-24-C ___

--44-PH~ GtlllO
<>43-~& u4

SA~

--42-PrlS G010
--41-PH6 GOJ~
<>40-1.8 27

SA~
SA~

2
0

<>39-"S 31
--3 8-GROU1~J
--37-PSL TP
<>36-WB 30

--3 S-G ~ iJ U;rn

--34-PSL C~ CCJ~PATASILIT~
o-lJ-CSAO 04
--32-IRO LOAO ~~~~
--31-IRD AJOR CTL 0
o-30-LOAO OSR ~
--29-IRO AUOR CTL 0
--2S-:usc CTL 3
--27-ft!ISC err. 1
--25-tUSC CTL 4
._. _____
_--2 5-1--' I SC C'l'L 2
()

THIS SIDE TOWARDS FINGEkS CN BOARD

~ODE)

SERVICE ARBITRATION AND CLOCKS

CONTAINS THE IRD COUNTER <WHICH IS USED PRIMARILY TO TRACK THE
NUMBER OF BYTES OF !STREAM DATA THAT HAS BEEN EXECUTED),
SERVICE ARBITRATION REFERS TO THE PRIORITIZING OF TRAPS AND
MICROTRAPS, AND FINALLY THE SAC CHIP CREATES ALL SYSTEM
CLOCKS. <BASE,B,QD,M,PHASE> FROM THE OSCILLATOR INPUT <B27-B28
ON BACKPLANE), SAC ALSO HAS CONNECTIONS TO THE RDM MODULE TO
HANDLE CLOCKING CONTROL AND DISABLES THE CCS BOARD FROM DRIVING
THE MICRO ADDRESSES DURING MICRO DIAGNOSTIC EXECUTION.
THE SAC CHIP ALSO MONITORS THE FIRST CS PARITY ERROR <DETECTED
BY THE ACV CHIP ON THE MIC MODULE), LOOKING FOR ANOTHER ONE
BEFORE THE FIRST IS DONE WITH IT'S MICRO-TRAP <IN WHICH CASE
IT WILL IMMEDIATELY HALT THE CLOCK.
BASE CLOCK = 160 NS 6.25 MHZ
B CLOCK
= 160 NS 6.25 MHZ
M CLOCK

RUNS CONSTANTLY
BASIC SYNCHRONIZED CLOCK
USED THROUGHOUT THE CPU AND CMI.
= 320 NS CAN BE EXTENDED WITH THE CLKX BIT OF
MICROCODE TO 480 NS THIS CLOCK IS THE MAIN
MICROSEQUENCER CLOCK USED TO STROBE MICROCODE FROM

ccs.

PHASE CLOCK= SPLITS THE M CLOCK INTO TWO HALFS. PHASE IS HIGH
DURING THE FIRST 160 NS DURING WHICH TIME ALL
READS OCCUR, THE PHASE IS LOW DURING THE SECOND
160 NS WHEN ALL WRITES OCCUR.
THE PHASE CLOCK
IS ALSO EXTENDED WITH THE CLKX BIT.
QD CLOCK
= FOLLOWS M CLOCK, IT IS USED TO CLOCK THE
Q (QUOTIENT> AND D <DIVIDEND> REGISTERS INTERNAL
TO THE ALU SECTION OF THE DPM MODULE.
PART

NUM~ER:

19-14691

BEST DIAGNOSTICS: ALL MICRO'S

DPM MICRO'S

GATE ARRAY: SAC

MODULE: DPM

SAC

1_0----------__ 49_CLKX <CLOCK EXTEND)

CONSOLE HALT __
CPU DSC IN<18.75 MHZ>--2-- o
N__ J_o
F'Hr~SE __ 4 __
MEM ST1~LL __ 5 __
SETC __ 6 __
f:~~SE CLDCK __ 7 -;RO ADDR INHIBIT<FROM RDM) __ 9 __
CS PARITY ERROR __ 9 __
·SL CM <COMPATABILITY MODE>-10 __
- HALTCSTOPS B CLK>_ll_o.

: __ 47_FP TRAP L
:o_46_ARITHMETIC TRAP
:o_45_FPA STALL
: o_44_Fh~ Wi:U T

: __ 43_TIMER SERVICE
:o_-42_CSAD l

:o_41_CSAit 0
: o_40_cs,~D :2

:o_39_INTERUPT PENDING
: __ 38_oi:::QUND

:o_37_F'SL TP H

v'GfL 12--:

vcc_13 __ :

: (J_3~·LLDAD DSE
: ___ 35_GF:OUND

MI CF:O TF:,-:;f' _ l 4_o:

: o_34_DO SEF: 1--J I CE
: __ 33_ENABLE MICRO VECTOR
: __ 32_DOUBLE ENABLE

IFUI CTF: 1_15 __ :

BUT 0_16 __ ;
BUT 2_17 __ :
E~UT

1_18 __ :

:c_JO_LATCH MTCRO TRAP

BUT CTRL CODE A_19 __ :
:8UF h C::LJ·<_2•J __ :
IPD CTF~ 0_~2:t ___ :

•. )

32
SPA:

SCRATCH

ADDRESSING CH[P

?A~

S?A CUNTROLS THE ADD~ESSI~G OF T~f 64
ANO IT CO~THOLS TH€ REGISTER e~CKUP STACK

RlGISTERS
UP UP tC ~
G?R ~EG15?€~5), ca~TA!15 LOGIC TO KEEP ?R4CK OF T~E AU1tI~CREME~rI~G/D~CRE~E~TI~G GF THE GPR'S, n€VELOPS IT'S c~~

T~E

STATUS BITS AND ENABLE SIGNALS fOR THE

PART

NU~6ER:

BEST

DIA~NOSTICS:

~ODULF.:
TER~

c~~CKS

V~~IOUS

~~GISTE~~.

19•14690

DP~

DPM

~SPA

RNUM

~ICRO'S

ECKAb.EXE

ARRAY: SPA

GAT~

OEYINITIONS:

sc~~rCHPAO

= ~TEMP SCRATCHPAD ADO~~ss

= RTE~P SCRATCHPAO AOOR€SS
=
aus
REGIST~R

NU~2ER

(FRO~

RNU~

REGISTE~)

SPA
RNU~

1--1--------------48-lRO R•N'4 3
D SIZE 0--2--1 o
--47-IRO ~~U~ 2

lRD

IRO LOAD

R~UM

CLOAO

~SRC 2--~--·
Ms~c 1--9--1

<>4o-~a 02
<>•5-#8 03
--44-IRD "~U~ 1
<>43-~B 00
<>42-ifR 01
--41-SPA sro CST~T!JS)
--40-S~A sr1 c~r~·rus>

.;~SRC

--39-D SIZE 1

REGIST~Rl--3--1

D CLK ENASLE--4--1
~SRC J--5--1
&UF M CLK--6-of

?H.\Sl::--7--t
0-10-·

~SRC

--38-GHOU~D
--37-I~STR F€TCH

RSPA 1-14-

--35-G?.OU:~!:'

4-11-VGA-12-VCC-13--

--36-RCS GPR

--34-~SKC 1
o-33-LI!REG E~~d~E
--32-RSRC 3
--31-DSr k~JJE CDESI. IS ~EG. VQOE)
--30-RSRC 4
--29-RS~C 5
--28-LIT 0
--27-RSRC ~
C-26-RCS I?R C€1~6~E)(RSRC/=I~R)
o-25-RCS TMP CE~~9~ElCkS~C/=!~P)

MSPA i-15-2-16--

~S?~

MCS TEMP

RSPA 2-11-CENABLE)(MSRC/=T~P)-la_o

RSPA 0-19-~SPA 0-20-RSPA 3-21-~SPA l-22-RSRC 2-23-SP~M-24-o

~--------THIS Sl0€ IOWAROS

cg~AdLE)(NS~C/:GPR)

FI~GE~S

ON BOARD

33
REG!ST~RS

0€FI~IIION

______________

FALL I~TO T~O CATEGGRIES RTE~PS '10
OF TH~S€ CATEGURIES IS AS f~LLO~S:

~IE~PS.

THE

, +------------+

1----------> ~ 8~5
11 eus
______________
, +------------+
+------------+
R
1----------> Raus
CIPR'S)
Tt:~PS

CG?~'S)

CRTE~P)

+------------+
M TEMP'S = M BUS T~MPORARY REGIStERS USED BY THE
TEMPORARY STORAr.E OF OATA.
(CAN QN~Y BE ACCESS£n BY ~ICPOCOOE OR

~ICROCODE

FG~

~lC~O-~CNITOR)

R TEMP'S : CONSIST'S OF ALL REGISTERS THAT FEED TH~

SUS;

R ~us

TE~PORARY R~GISTERS C~ICROC1D€ OR ~ICROMC~ITUR)

GPR'S
IPR'S

16 G£NE~AL PURPOSE R£GISr~RS
INT~~NAL PRIVILEGED REG1ST€RS
POI~T

FOR OATA

DEStI~gJ

FOR

NOTE: RTEMP A~D ~?E~P 0•7 ~RE DUAL PORTEO TUG~TH~R.
EX. ~RITING RTEMP 5 ALSQ '~ITES ~TE~? S
HEADS SfILL OULY AFFECT ONE OF T~E~

CT~~~ORARY

~~~SCR'S

~OLDING

SRK:

SUPE~

ROTArJ~

C~~T~OLS

FI~LO

s Ai·rn p
~OTE:

cn~tROL

ROTATOR

SlJP~R

~~!CHES

~ULTIP~f

XER

A~D

TELLS THE

LCUKS AT kLT

~PEMAft1iS.

lw CO.
(StZE ANC POSITION) ARE CD·H~I'iEO 1r; nus

~ICROCOO~

CHIPS

S~M

~HAT

C~IP.

THE SRK CHIP CnNT~QLS THE SR~ CHIP FU~CTIO~S VIA A co~PLEX
ARRAY OF SIG~ALS CALLED PRI (PPI~ARY), aec (S~C1NCARY), A~D
S~F

CSHIF?l.

THESE SIGNALS

CAN 8E QUl?E CONFUSING
DIAGNOSTtcs.
PART

NUM~ER:

OP~

GATE

DP~

A~t

MALFUNCTIO~S

ARg 8EST

OIAG~~s~o

THES~

USI~G

SIG~ALS

THE

~lCFO

19•14688

SEST DIAGNOSTICS:

,,,10DULE:

~NO

ECKA3.~XE

1ICRO'S

~RHAY:

SRK

ROT

l--1-----------·--4~-ROT

ROT 0--2--

--46-RCT 1

ROT 5--3-l--4-o

CS~CONOARY-FU~C?IONJSEC

0-45-CSECON04RY-FU~CTION)SEC 4
o-44-CSECONDA~Y-FUHCTIO~)SEC 5
~-43-CSECQNDA~Y-FU~CTIO~)~fC 2
o-42-CSECOND~~Y-FU~CTIU~)StC 0
0-41-CSECONO~RY-~U~CTIC~)SEC 1
0-40-QD C~K
o-39-SHF 2CTO SRM 1ST LE~EL SHIFT)
--3~-GROU~D
--37-SRK STl (St~TUS)

DSIZE 0--5-OSIZE 1--5-CPRlMARY-FUNCTIONlPRI 0--1-o
~~uxz ~YrE 1--8--

SHF l(TO ALP 2NO

~~UXZ
L~VEL

ROT 4--9-9YTE 0-10--

SHirTl-11-o
VGA-12-VCC-13--

--3o-SRK STO C5TA?US)

#MUXZ dYTE 3-14-~~uxz dYTE 2-15-·~,a 05-16<>
wr3 02.17<>
~S
~3

--35-GROUNO
0-34-SrlF 4(TJ SR~ tST L~VlL SHIFT)
0-3.3-SHF 3 C'r·J StliA tsr LEVEL SrIIrT)
0-32-SHF ocr.J ~r.,p 2r.c LEVEL SHIFT)

<>31-SB
<>30-SS
<>29-SB
<>28-SB
<>27-se
<>26-Sa

07-1~<>

03-19<>
WB 00-20<>
w~ 0&-21<>
~a 04-22<>
53 06-23<>
56 05-24<>

o-47-CrRVIARY-F"UNC?ION)PRI 1

()

<>25-~~

04
02
03
01
oo
07
01

---------THIS SID€ TOWARDS

FI~G~RS

~OARD

35
SR~:

SUPER

ROTAT~~

4 C!"flPS

~ULTI?~EXER

PE:~f'QP.1 !

THE 64

;:"lJNCIICJ:-~s

!J~.:OER

SRi<

CO~TROL.

THES~ CHI?S CONTAI~ ~ "FIRST LEV~~" ~HlFTE~ ~HICH
CAPA~LE OF TAKI~G A 64 dIT INPUT FROM ANt CJ~9t~ATIQ~
OF THE R ~us, M AUS, OR SHOR! LITERA~ Fl€LO OF ~IC~CCO~l,
A~D SHIFTijG A~Y ~ULTIPLE OF FO~R SITS C1I3~LEl.
TH~ 35 ~IT
A~O

FHJ~ THE SHIFTER IS PLACED ON
SUP~R
~LS)
SE~T TO T~E ALU SECTION OF THE OP~ M~OULE 4HEPE IF CESIREO
C~N ~E ~J~ATEO FRO~ 0 Tu 3 ~ORE SITS I~SIO~ A SECONL LF.VEL

S~IfTER CCO~PLETE
T~E OUTPUT OF THIS

4ITH BIT BUCKET)
SEC~ND

PART

BITS

SR,_, 3

0,4,8,12,16,20,24,20,32
1,5,9,13,17,21,25.29,33
2,6,10,14,18,22,26,30,34

SR~

3,1,11,1s,19,23,21,31

DP~

MICRO'S ECKAB.EXE

GATE ARRAY:

SR~

TnRO~GH

SRM
SrtF 2--1-o••••••••••o-48-SEC 5
SriF 4--2-ol o
o-47-+3V NO~,~~ 09,~B
SHF l--3-o
0-46-MS 31 L
RSRC s,sEC o,SEC o,sgc U--4-~
0-45-RB 28,29,J~,31
~SP.C 1,2,l,4--5-o-~4-RB 20,21,22,23

SEC 4--o-o
SEC 3--1-o
PRI 1--9-o

o-43-R~

1,ISTR~,RSRC 0--9-~OA,GR~O,GR~D,GRNO
-10-o
N0~,+3V NO~,GRNO,GRND-11-0

0-40-RB

0~,09,10,11

o-39-RB 00,01,02,03
--38-GRQU~O

0-37-RS 04,05,06,07
--36-DP PrlAS€

VGA-12-VCC-13-PR! 0-14-0
S3 12,13,14,15-15<>
se e,9,10,11 -16<>
s~c 1-17-o

--35-GROU~C
to-34-~S 2a,29,3J,3t
lo-31-~e 24,25,26,27
lo-32-~6 1&,11,19,19
lo-31-~6 08,09,10,11

S€C 2-19-o
SEC 0-19-o
se 0,1,2,3
-20<>
s~ 4,5,6,7
-21<>
s~ 16,17,18,19-22<>
S~ 20,21,22,23-21<>
SB 24,25,20,27-24<>

1&,17,1~,19

o-42.R8 24,25,26,27
o-41-RR 12,13,14,15

CC O,CC

+3V

32 bITS.

19•14687

BEST OIAGNOSTICS:

+3V

ALP CHIP'S.

T~e
J~C~_AG~I~

SRM 1

~U~BER:

J)p~

INTERN~L

LEVEL SHIFTtR IS

CHIP
SR 4 2

~OOULE:

aus cs

THE

OUTPUT

1o-30-:4 d 12,1.J,ti,ts
lo-2?-~R 04,o5,06,o7
lo-28-~~ 20,21,22,23
•o-27-~~
lo-26-S~

()

lo-25-53

----------

00,01,12,~3
32,31,31,~
2~,29,30,31

10,~E

36
TUK:

TI 4E:D

OP~~~·nct;

P~OGRA~~Ad~g

·rt)

GENE:RAT~

CO~TROL

I~TE?VAL

BESr OI~G~OSTICS: OPM
MODULE:

CLGCK, 1 ~ICRO

S~Cl~O

CLJC~,

ABLE

I··•Tt::RUPTS r\r PRUGHAMl"1Af:4LE FvTF.:Rv,\LS.

~ICRO'S

ECKAB.€XE

GATE ARRAY: TOI<

DP~-1

TnK
GROUND--1-o-····------<>48-W6 12
#8 19--2<> 0
<>47-WB 15
<>4o-~8 14
--45-TO~ OSC

wa 23--3<>
24--4<>

TIMER SER/ICE (TRAP TO REFILLl--5-~a 31--6<>
~a 18--7<>
wa 20--8<>
~o 17--9<>
PROC INIT-10-o
TIM~R

--44-~
<>43-~B

13
<>42--B 11
<>41-~B 10
<>40-wa oe
<>39-•S 09
--38-GROUNO

I~TENUPT-11-0

VGA-12--

--37-N

<>36-~S 07
--35-GROUNO
<>34-~8 06

VCC-13-~a 22-14<>
~~ 21-15<>
~9 1b-16<>
SUF a CLK-17-o
M-18-N-19-~ CLK E~ASLE-20--

<>33-wS US
<>32-~B
<>31-~B

--JO-N

<>29-~d 01
<>28-Wo 03
<>27-~B 00

wCTRt 3-21-~CTRL
~CTRL
~cTqL

4-22-4-23-5-24--

04
02

--2b-WCT~L 2
--25-wCTRL 0

()

---------THIS SIDE TOWARDS

FI~G~PS

BOARD

~HZ

FROM CCS)

L0003 MIC

~IC

THE

~E~ORr I~TERCOUNECT MOD~LE IS !k£ SEC1~0 ~AJOR PARl CF
CPU, IT HOUti~S T~E DATA ~OUTING AND ALIG~~ENT LCGIC,
ADDRESS LOGIC, TRA~SLATION eUFF~H, DATA c~c~~, ~X~CUlICh
BUFFERS, SEVERAL PC REGISTERS, VA CVIPTUAL AOD~F.SS) A~L
MA (ME~C~l ADOP~SS) RFGI~TEPS, C~I L~TC~, PA CPH~SICAL ADD~ESS)
MUX, MDR'S (~~~ORY DATA REGISTEP) AND ~OR (~RITE DATA ~~GISTER)
TH~

ALL AuDRESSES ANO DATA PASS IHP.OUGn ?HIS MODULE, IT P~CVIDES
THE I~TERFACE TO ANO FROM THE DfM M~OULE A~O C~I cUS, lt
ALSO OETECTS UNIBUS ADD~€SS£S A~O SIGN~LS T~E UBI MODULE
~IfH A SIGNAL C~LLED •ue R€Q H" PIN <C45>.
PARITY, C~ECKI~G ~~O GENERATING LOGIC FOR BOTH CAChE
AND TR~NSLATION SUFFERS AR£ LOCATED ON THE SOARD.

DAI~

THE MIC IS

co~~gcTED

THE

BUS,

~B~S,

A1D

C~!.

THE MICPOOJAGNOSTICS ECKAC.EX~ TAPE #2, €CKAB.£Xl TAP~ #1 AND
ECKAL.EXE TS A~D CACHE DIAGNUSTICS WILL T~St Ti~ MIC ~CCULE.
G~T!ARRAYS:

ACV~AOO,AOK,CA~,C~K,ADR,PRK,UTR

-·----·--~-~-----------------------------~-~----------1--1
(TOP)

THE

~IC

~ODULE

•LOOOJ

Pt NS>>>>

1-1--

---------- __ .. ______ _
CAK

C~K/C~LI

---------- ---------------------------ADJ\
UTR
------------------------------------?RJ(
_______ .. ACV
__
---------- ----------1--1
1-------------------MUR'i
AOD1
____ .. ___ ....
----~----- ---------- ------------,.--------------AD02
________ .__
---------- ---·--------------- ------------------M0t<5
AOD3
-------~------------ -------------------------------------,_.CR7
1'00.J
---------- ---------- ---------~
1-~D~t

~DR~

""DP~

'1DR2

·~okJ

----------------------------·-------------~---·-----

.....
............
--·-......

............._
..........

1::-...

·-·
-·-

Il ________ _

------r-

I:::.=.

1:-::"eitalCt

I
I
I
I
I
.,I .._

I
I

··1=~:=.g----.-1
I
I
I
I
I
I

IUIO

,--

--~~~-~~~~

___
-!lfl!--..,. .·. ·1·1=
......I

.I__

--1

(!] I

I
I

L--~---------------------------------------------j

V L\T v\~ ., , .JG
)20'" \..

'"" \)y,
f''

MIC Block Diagram

41
ACY:

ACC~SS

VIOLATION

C~IP

CAUSES CS PARITY ~~ROR ~ICRG TRAPS, FPA ~ES!RVE~ OPE~At&S,
UNALLIGN€0 OATA, PAGE ~~UNDRY VIOLAIICNS, A'~D ACCESS CC~TROL
VIOLATIONS fkOM TH~ TB. THE ~CV wORKS wl?H THE UTk C~l~ TO
HANDLE MLCRO-rHAPS. CO~TAINS THE MEMORY ~~~AGE~EN! E~Acf~E
LATCH. CIF ~E~. ~GMiT. IS OFF, THE ACV ~ILL ~O~IlOR CS fARITY
A~O FPA RESERVED OP€R~NOS O~LY).
PART

~U~dER:

BEST

OIAG~OSTICS:

19-14699

MtCRo·s ECKAC.EXE
~ICRo•s ECKAS.EXE
TB + CACHE
ECKAL.EXE
~IC

OP~

MODULE: MIC

GA?E

ARR~Y:

ACV

4CV

CS dUS 4--1--------------46-D SIZE 0
M CLK g~A3LE--2--1 o
0-47-B CLK
--46-PROC I~tr
--45-PAGE ~OUN~A~i
<>44-~8 25
<>43-wB 27

'B 24--3<>1
PIE ACCESS CODES--·-> 4C 0--4--1
I
AC 3--5--1
I
AC 1--6--1

---> AC 2--'--'

<>42-w~

MICRO TRAP--8-ot
ACCE~S

LATCHED aus l-11--

--38-GROU~D

--37-LATCHED aus 1

V~A-12--

VCC-13--

--3c-LATC~EO

~ITl-14-P~OdE-15--

1--35-GROUNO
1--34-kAD 00
1--33-LATCHED
1--32-~AD 01

PTE CH!CK OR
~ICRO VECTOR 0-16-~ICRO VECTOR 1-11-~~CODED MICRO TRAP 1-18-o
ENCODED ~ICRO T~AP 0-19-o

ENCODED
CS

--41-PHASE 1
--40-FORCi ~' 09
--39-LA?CHED ~CTRL 0

CONTROL VIOLA?I0~--9-LATCHED dUS 0-10--

TS VALID CV

1--31-LATC~ED

wCT~L

~C!RL

()

1--28-LATC~ED ~CTRL 2
1--27-LATCHEO ~CTRL 4
1--26-D SIZE 1
lo-25-FP R~S~Rvgo uPERA~D

---------T~IS

~C!~L

; __ 30_0 CL~ EN~eLi
1--29-MAO 02

G~OUND-20-~!CRO T~A~ 2-21-o
PR~P~TC~-22-o
PARITY E~R~R-23--

LATCHED BUS 2-24--

VIULAIIC~

SIDE TOWAQOS

FI~G~RS

50ARJ

~DO:

ADDRESS CctIPS
COJTA!~S

t~~ PC'S A~O ~- CIRCUII, E~4~L~ ~Ji€S AhO
LOAD PATHS, ?LUS A AND ~ sou~c~ ~ux S~LECT CO~T?OL~.
fHE ~DD CrlIPS CO~T4IN AN I~TFRNAL AODEH CAP~d~E ~F
SU~PI~G TrlE PC OR v~ er 1, 2, 4, OR fRO~ TH~ ~ aus.

4 CHIPS

CHIP

9!T. SLICE

A.DD 1
ADD 2

<7•0>
<15-8>
<23•16>
<31-24>

ADD 3
ADO 4
PART NUM9ER: 19•14683

BEST
~OOULE:

DIAG~OSTICS:

~IC

GATE

~uc

~ICRC'S

AR~AY:

ECKAC.EXE

AOC Cl

THROUG~

ADD

PAGe

E~AaLE VA SAVE--1-o------------48-MAO
BOUHO,P~GE BOU1D,N,N--2--I
1--47-MAD

8SRC SELECT S0--3--1

1--46-ICO,ICO,ICC,N
1--45-MAO 07,15,23,31
1--44-MAC 04,12,20,28

~--4--1

wa 06,14,22,30--5--1
~8 05,13,21,29--6--1
-s 07,15,23,31--1--1
AS~C

(CARR!

S~LECT

1o-43-E~A8LE
io-42-ENAdL~

so __ a__ ,

GE~ERATE)CG1,CG1,CG1,N __

'--41-MA

g __ ,

SE~ECT

PROGAG~TElCP,CP,CP,N-14--

wa 04,12,20,28-15--

ASRC SEL~CT 52~16-~9 00,08 1 16,24-17-~a 03,11 1 19,27-18--

"a o2 , 1 o , 1 s , 2 5-1 9-ASRC SEL~CT Sl-20-#8 01,09,17,25-21-(ACI)+JV,CX,CY,CZ-22-o

()

MODE

1--26-G~~O,FORCg MA 09,GR~L,GR~D
1--25-XB PC 00,,,N,N

----·----SIDE

~~c~,CC~?

S€LECT so
1--38-GROUND
lo-37-8 CLK
lo-36-E~ABLE ?C SACK~P
1--35-GHQUjQ
1--34-LATCH ~A
1--33-~AD 03,11,tq,27
1--32-N
1--ll-~AO 00,03,16,24
t -- 3 o_x s Pc o1 , -~ , :" , ~
lo-29-CICI)+3V,IC0,1CO,ICC
1--29-~AD 02,10,19,26
'--27-MAO 01,uQ,17,25

VGA-12-VCC-13--

?~IS

'--39-~A

BSRC SF.L~CT 51-11--

~-23-tlD)GRN0,+3V,+3~,+lV-24--

VA
PC

·--40-GRNO,GR~o,cn~?

CG2 I C~2, :i I N-10--1

(CARRY

06,14,22,JO
05,13,21,29

TOWA~DS

FI~~E~S

80A~D

At10RESS Cu:'tTR•lL Cl-IIP
CONTAI~S

IP~

A~D

TH~

MO~

CriIPS.

(~FMSC~'S) fG~ T3, ~~~O~Y
FLIP FLOP. ThE ~DK ~UN~S 'IT~ fhE
AOK DETECTS TB ~ITS AND ~tss~s.

COMPO~~NTS

RA~JQ~
TH~

NOTE: TO DISA&Lg HALF OF IHE TB ON A LIVE

~A~AGE~E~t,

PR~,

ADC ANO

SYSTEM:

v~s

1). REMOVE ALL USERS FRO~ THg SYSTEM TEMPOHARILY
2). TYPE •p ON TrlE CONSOLE TER~INAL
3). TYPE: >>>O/I 24 D CFOR GROUP 0) OR

D/I 24 A (FOR GkCUP 1)

4). TYPE: >>>C
PA~T

NU~BER:

8€ST

OlAG~OSTICS:

t.tQOUL€: tt1IC

19•14700
~IC

~CKAC.EX~

MICRO'S

GATE ARR.llY: AUK
40'<

A..,UX ~·: ..ie:cr ~H--1------------o-4t1-B CLK

051--2--1

wa 26--3<>1

•--47-AMuX sgL~CT so

·--46-DST PMOOg

WS 25---4<>1
~d
~ij

iB GROUP

1--45-MMUX Sft.:L€CT Sl
lo-44-~RITE

24--5<>1
27--6<>1

CHIT>--1--1

TB HIT 0--9--1
·rs GROUP 1 1'R CHIT>--9--1

1--41-RtUT

~CTRL
~\CTRT,
~CT~L

1--39-~

2-14--

CLK

g~~aL~

--35-GRCU1D

--34-T6 PARITY

S.-16-0-17--

LATC~ED
L~TCHED WCTHL 3-19-~s~c SEL 51-19-LATC~ED ~CrRL 1-20-LATCHED ~CTRL 4-21-CLK SEL~CT S0-22-CLK SE~€CT 51-23-P~ASE 1-24--

Ot~~

1--38-GROUND
--31-D CL~ gN~SLE
--3o-CS Bus ~

9SRC SEL 50-15-LATCHED

~CCU~EC

I0-40-STArHs V,\(.,ID

TB HIT 1-10--1
e:~ABL~ VA-11-o.
VGA-12-VCC-13-LATCHED

V€CtOR

lo-43-SNAPSHOT C~I
1--•2-PSL Cl CC1~P4TA~!Ll1~

E~ABLE

--33-LATCHEO Bi.JS 3
--32-LATCHED JUS 0
0-31-PTE CHECK
--30-L~TCHED dUS 1

o-29-INVALIO ?q~FETCh
--28-CO~PArAqI~ITY ~OCE
--27-LATCH~O aus 2
0-25-TB OUT?~T ENAALE
()

--25-DEUS sgLECT SO

---------THIS SIDE TOwAROS

FI~G~PS

BOARD

~OCE)

CACH~

CAl\:

COTf~OL

CO~t~OLS

£~~

CnIP
ENA~LI~~

~~D

IRANSfEH OF CATA Ta AMO
'HI VALIDATIO'-l•
~~tE:

01SA8~€

RE-gNA~L~

CACHE

TY?~:

CACHF.

DISAF~liG

FRG~

TH~

C~CHE,

MOH Cnl?S,

t~E

A~O

CAChE

>>>DI! 25 1

T~P~:

>>>DI! 25 0

11. RE~OVE ALL USF.RS FRO~ THE SYSTE~ TEMPORARIL~
2). TlPE ·~ON TR~ CONSO~E T~RMINAL
l). TYPE: >>>Oil 25 1 COFF) UR D/I 25 ~ CO~)
4). TYPE: >>>C

19-147J1

P~~T

NU~dER:

8EST

DIAG~OSTICS:

~IC

~ICRO'S

ECKAC.EXE
ECKAL.£XE

T3 + CACHE

MODULE:

~IC

CAK
~AO

OO--l--------------4q_ceus ROT s~

1--4 7-LA '!C~E!) .;CTRL 0

'iB 21--2<> I o

a CLK--3-ol

--45-LATC~~D
--44-LATC~ED

26--4<>1
GR,D--5--t

CAC~E

~~ 2~--6<>
I~IT--7-0
~8 24--8<>

~us 4
--40-LA?CHEJ qus 3
--39-LATCHE~ ~C1RL 3
--38-GROUNO
--37-LAICHEO #CTRL 1
--36-LATCH€D ~CTRL 5

VGA~12-VCC-13-CACnE DATA PAR!TY ERROR-14-o
CACME !AG PARITY ERROR-15--

--35-GR~UNO

--34-0 CLK ~NA~LE
--33-0ST P~OO~
--32-D SIZE 0

GR~D-15-~-11-0 ~R-18--

CACnE GROUP
!~ABLE BYTE 0-19-o

·--31-D SIZe 1
lo-30-S!ATUS V'~ID

CACHE VALID 0-20-ENABLE BY~E 3-21-o
()

lo-29-I~~ALIO ?R~FEICH
1--28-~ CLK E~ABL€
lo-27-l/O ADO~ESS
1--2~-U~US R1T Sl
'--25-M~D 01

---------rH!S SIDE

815 1

--41-LATC~ED

C~I-11-o

gNAeLE 3YTE 1-22-0
g~A~LE dYTE 2-23-o
~~ux s~~ECT Sl-21--

--43-LATChED 3US ~
--42-LA?CHEO aus 2

CACHE HIT __ q__
N-10-S~APSHOT

~CT~L
~CTRL

--46-LATCHEO

!JWA~OS

FI~G~~s

~OA~O

C\1K/Cr'1L:
.m:H rm~s

STALLS
~UTE:

,\ •Jl) c:o,.. l'?OLS s tG~A LS "lL A~ D FRO"'\

1H~

AIC~CCODE

CEPTAl~

rrt~

c ... I

C8~DlrIUNS.

THIS IS raE U~LY CHIP TYAT CG~!~OLS THE CP~'S ACC~SS re
THE C~I SJS. OPERATIO~ OF TH~ CM~/C~L C~I° CA~ B~ \~"lf IlD
BY DOING cn~saLE MOOE DEPCSITS AND EXA~I~ES GF ~AI~ ~~~CRY
~ITH CACHE OISAB~ED AND AGAI~ f P~M kO~ MOOE •3tCh ~OES ~OT
USE ?HE C~K/CML CHtP.
P~RT

NUM9cR: lS-14697

BES1 Ot~G~OSTICS:
1~0DULE:

'1IC

~IC

~ICRO'S

ECKAC.EXE

GATE lRRAY: C;'4K

C\CK
AOOR~SS

8 CLK--1-o------------48-D CLK g~~8L~
REGISTEP E~ASLE--2-o o
<>47-CAI DATA 2~
C~I DATA 27--3<>
o-46-INVALIO pqEFETCH
LATCHED BUS l--4-o-45-CORR DATA INTEk~PI
LATt~EO aus 1__ 5__
o-44-~RITE VEC!OR DCCUR~ED
LA?CHED dUS 2--6---43-STATUS 0
N--1-0-42-C~I STATUS 00
CMI OAtA 31--9<>
0-41-GRA~T ST~LL
CS 3US 4--9-0-40-C~I STAT·JS 01
~ CLK g~A8LE-10-0-39-SI,TUS V~L!D
CMI DATA 29-11<>
--l8-G~OUN0
VGA-12-<>37-CMI DATA 25
VCC-13---36-STATUS t
LATCHED SUS 0-14---35-GROU~O
CMI OA!A 29-15<>
--34-INHidIT C~I
CMI DATA 30-16<>
o-ll-CACHE I~tE~UPT
~AD 01.17---32-CACHE ~IT
~AO

--31-~A!f
--30-PHAS~ 1
--29-U~ I~TER~PT

00-18--

CMI CPU PRiuRITY-19-o
OST RMODE-20-DSlZE 0-21-OSIZE 1-22-~MUX

0-27-EiASL~

SEL 51-23--

CMI HOLD-24-0

C~I

0-26-:'"1ICR:J SE!'.lrJgr-JCt:R !!'.I l
0-25-SNA?S~OT

()

---------THIS SIDE

GRANT

0-28-CMI DBSZ

TOWA~OS

FI~GFRS

ON anARO

c~r

C~N?AllS THE €XECUTIO~ JUFF~~6,
D'tA REGISf!R, ~YYSICAL ~JD~~ss

RJ ~J'! Ii-· G DAT A I i'I A"!

8 CtH?S

CHIP
~'OP.

~OR

DEFI~ITION:

PART

0 ijUS

NU~BE~;

A~ L

c fJ S •

3,11,19,27
4,12,20,2s
5,13,21,29
6,14,22,30
7,15,2J,31

5
7

= DATA BUS (AN

I~TERNAL

BUS

I~SIDE

THE

~L~

ChIPS)

19-14681

8€ST DIAGNOS?ICS: MIC
MODULE: MIC

~ li :i

2,10,1~,26

MOR 8

dUS

·•

~E~GRY

LOGIC fCF

1,9,17,25

tlOR &
!i'O~

~~GIS?Eh,

ca~rR~L

BIIS
l',8,lo,24

l
2
3

'."tOR 4
~OR

4N0

0 U'r , TO A.., C f k .J ~ T !1 E C 'H ,

1
)

~wt DR

ft~ItEDAT~

~J~

~ICRO'S

GATE ARRAY:

~C~AC.EXE

~DR

THROUG~

.111DR

CLK SELECT 51--1--------------4~-~~us gNA5LE
CLK SEL~CT 50--2--1 o
o-47-MAUS 24,25,25,27,2~,~9,30,31
9 C~K--3-nl
o-46-M&US 16,17,18,19,20,21,22,23
ADDRESS REGISTER €NAS~E--4-ol
--45-MAD 2~ 1 25,26,27,2&,29,30,31
ENABLE C~I--5-ol
0-44-ABUS oa,o~,10,11,12,13,14,15

xa. PC 00--6--

--43-MMUX SELECT Sl

XB PC 01--1-XB SEL€CT--8--

0-42-MBUS oo,01,02,03,04,CS,06,07

--41-LATCHED ~s~c 2
--40-~AD

XoUF 00,01,02,03,04,os,06,07--9-S~APS~OT

--39-MAD 16,17,18,19,20 1 21,22,23
--38-GHOUND
--37-~AD oo,a1,02,03,04,0S,0&,07

VCC-13--

--l6-+3V, ALL at~ERS

XBUF 08,09,10,11,12,13,14,15~11-VGA-12--

--35-GROU~O
--34-D~US SEL€CT

D8US ROT 50-14-OSUS ROT Sl-15-CMI 24,25,26,27,2S,29,30,31-16<>
C~I 16,17,18,19,20,21,22,23-17<>
C~I 08,09,10,11,12,13,14,15-18<>
CMI oo,01,02,03,04,os,06,07_19<>
ws OO,Jl,i.>2,03,04,0S,06,07-20-h~ oa,09,10,11,12.13,14,15-21-~s 16,17,16,19,20,21.22,23-22-~a

08,0~,10,t1,12,13,14,15

C~I-10-o

--33-D8US SELECT SO

1--32-PAD 16,17,18,19,20,21,22,23
1--31-PAD ~8,09,10,11,12,13,14,15
1--30-N,N,PAO 02,0l,u4,0S,Ot,07
1--29-Af"fJX SF.:L~CT Sl

SELECT so
'--27-CACHE oo,01,02,03,04,GS,06,07

1--23-~~~x

24,~~,2b,27,2~,29,30,11-23--

CACrlE 24,25,26,27,28,29,JO,ll-24--

GROUN~Ef:

1--2b-CACh~ 06,19,10,11,12,13,14,l~

()

1--25-CACH~

---·------

1~,17,1~,19,20,21,22,23

47
usr.:n !!'~

Ci)r"Jwi~CTI 1J'l

.~C[,

11IT'i THt.

Af~1)

~JR

C~If:>S

IC ~·G!·1IlC·H

OF Tilt: C:X~CuTION ~UFft:RS. AHE.:r! EX~CLlt!O'.·J f·.HJFn.~s At-<f
E~?TY, o~ A ~~~ aoO~ESS IS PL4CED IN T~E PC, THE: ~~K CH1P
FORCES PR~F~?~HI~~ iF A NE~ INSTRJCi!O~ ~~a~ ~g~L~Y LSliG TH~

us~c.;~

ADDRESS

l"' ·rHE ?C

C-~"=~

.\DDRESS IN

PREFETCHING IS INDE:PENDANT OF IHg

PC)

UK l?Ct-4

CE:X. SlJF. E.i•-PTYl.

A~D WILL HlfFE~
CYCLE H~ Ff<CGPESS.
THg PRK 'ILL STALL THE ~ CLOCK ~HEN dOTH x~-s ~RE l~PT~ A"D
THE CPU ~?TEMPTS AH IROt. CTHtS CAN ~ccuq A~£~ A DEVICE IS
TYING UP THE C~I WirH rRANSFERS A~O THE PRK HAS TO ~AIT FOP
COMPLETIO~ BEFORE IT CA~ PREFETCH CCPU ~~s A pofCRiiY ~f 0)).
THE PRK ~ILL ALSO ~AVE T~ STALL N~ENEV~K THg PC GEt~ A ~E~
AOO~ESS SUCH AS A aRA~CHI~G INS1~UCTION 1R A ~€~ PRGG~A~.
?HIS ALL0~5 TI~E TO PERF0RM ThE FIRST PH~FErCH FRO~ THE ~E~
PC PRIOR TO T~E START OF ~ORMAL EXECUTID~.

WHE1~EVEP

A.~

~ICRUCO~!

X3 IS E:1-4PTY AND TtiEs;..E IS NIJ 3JS

PREFETCHES ARE LONG~O~DS

O~LYl

PART NUMBER: 19-14698

BEST

OilG~OSTICS:

~IC

~ICRO'S

GATE ARRAY:

ECKAC.~XE

P~t<

~~K

LATCHED MSRC 1--1--------------40-LATCrlED
SNAPSHOr CMI--2-0I 0
1--47-LATCHgo
.a CLK--3-0.

PHASE 1--4-~~ux SELECT 51--5-ENABLE ACV STALLCSTOPS ~ C~Kl--6-~ICRO

sgauENCER

I~IT--7-0
STALL~-8-o

LATCH MA--9-o

PREF€TCH-10-o
ENABLE VA SAVe_11_0
vG~-12--

VCC-13-MICRO !RAP-14-o
M CLK

E~ASLE-15--

1--46-~1A

~SRC
~~RC

2
3

sr:LgcT 51

1--45-LATC~Ea

~SP.C O
•--44-LATCHED MSQC 4
1--43-MA SEL~CT SJ

•--42-IRDl
I0-41-IaIZE 0
lo-40-MIC LO~J
lo-l~-ISIZE

O~R

1--38-GttOUNu
1--37-X& PC no
1--36-DSr R~OD~
1--35-GMOU~D

1--34-LATCHED

~JS

D CLK gNABLE-lc-•--3J-LATCH~n 6US l
L~TCHED BUS 3-17-1--32-P~~ c~ cc~~PATA~lLll!
STATUS VA~ro_1q_o
1--31-LATC]E~ aus 2
LATCHED ~CTRL 1-lq__
1--30-XB PC Jt
xa 1 I~ USE-20-0
1--29-LATC~E1 ~U3 4
XB 0 I~ USE-21-0
1--2~-LATC~EJ ~cr~L 0
LATCHED ~CT~L 3-22-1--27-LAIC~g~ 1CTRL 2
XS sgLECT-23-1--2a-L~TC~£ry ~CT~~ ~
E~A~Lg PC-24-o _im _______
()
_1--25-L~ICH~D ~CT~L 4

~CD~)·

48
lriE

THAT c~~ CA'T~g 4 M!CRC·1~AP.
ADDRESSES, ANO DiCO~ES T~E nl~H~~T
P~IORltY TRAP COiDITIOA.
TH~ UT~ ~ECEIV~S ~~CODED ~lC~C TRAP
I~PUTS FR~~ iARIOU3 HA~D~ARE C0~PQ~ESTS ~~J D£COCES IHF~ I~TO
THI~R A??ROPRt~TE ~ICRo-vgcTUR ADORESS€S ro sr ?LACED c~ T~E
CONT~QL ~TaRe ADOR~SS LI~~s ~HE~ PERFJH~liG A ~tc~o IRAf.
~ONltORS

GENERATES

JAC~I~~

BEST DIAGNOSTICS: MIC
~ODUL~:

co~DITIC~S

~ICRu-vscroK

~ICRO'S

ECKAC.£XE

GATE APRAY: UTR

~IC

UTR

ENCODED
~~CODED

~ICRO
~ICRO

THAP 1--1-o----------o-48-AOOR€SS q~GISTER ENAbLE
TRAP 2--2-o o
1--47-ACCESS C~~TROL V!CLA1IO~

MICRO TRAP--3-o
MICRO VECTOR 3--4-PTE CHECK OR PROBE--5-MICRO V~CTOR 1--5-MlCRO VETC~R 0--1-~ICRO VECTOR 2--B-GE~ERATE DEST INHIBlT--9-o
DU SE~VICE-10-0

1--46-TB DATA ?4RITY ERP.O"
1--45-LATCHEO SUS 3
--4~-M BIT
--43-TB PARITY €1ASLE

--42-TS kII 1 --41-TB ~IT 0
--40-TB TAG 1 PARI'r~
o-39-~RITE ~u~ ERRJP

~SRC.XR-11--

--lB-G~OUND
T~G O ?A~trY
--3~-LATCHEO 'CTRL 1

VGA-12-~~CODED

~ICRO
~CTRL

--37-TB

VCC-13-TRAP 0-14-0

--35-CROUND
--34-LATCH~D

~CTRL

t--33-LATCHEO

tCT~L

HHLXXX-15-o

SE~ECT-16--

XB 0 IM USE-17-o
PROCESSOR I~IT-18-o

•--32-D CLK €nAdL£
1<>31-~B 24

RTUT DI~H-19-STATUS

1<>30-~B
1<>29-~8

0~20--

STA!US 1-21-StATUS VALID-22-o
XB 1 IN uSE-23-0
S CLK-24-o

25
26

1<>28-•a 27
1--21-PHASg 1
()

lo-26-PREFETC~
1--25-l~HidII C~I

----~----?HIS SIO! TOWARDS

Fl~GERS

BOA~~

EfiRO~
INTE~UPT

E~RGF

L0004 UBI

lJBI

TiiE TJMieus IHl'::RFACE ~.trJOULt: Is M•JCH Lil\E AA1y u~HBus
Ao AP ·t E~ JI r H THE Ex c e: P r 1 a~ cf ~A ·11 i-J G ~ o u x-r r •1NA L LW G1 c

ON I? TO HANDLE co~~U~ICATICNS ~OR ThE ru-s~ A~O CG~SCLE
A~n ALSO ~A~O~I~G ALL t~TEfiUPTS ~IT~I~ rig CPU, ALL U~ItU5
AND MASsaus DEVICES I~T~RUPT VIA !HE UBI. T~E UBI CUNl~I~S
POWER FAI~ LOGIC, THE r.o.Y. C~GCK A~D CHARGING ClRCUil, THE
U~I~US DATA LATCH, 3 BUFFE~ED ~ATA PATHS, 1 DIRECT ~ATA PATH,
aYIE SNA?PING LOGIC, ADDRESS oUFF~RS ANO ~A?S.
THE U9I IS

THE

~p~

CONNECT~D

TO THE

MICRO-CIAG~~STIC
A~O

T~ST

ADAPTEH SECTION.

THE SECO~O UNIBUS
ECCSA.E:XE
GATEAR~AYS:

ECKAS.~X~

LEVEL 3 DIAG~OSTIC

SECl'IO~S
1~£

T~E

w eus, C~I, ANO QilBUS.

U?tIO~

csua

CON,!NT,UC,,UDP

WILL TEST T~E co~~UNICA1IONS
ECCS~.~XE

~COULE)

~ILL

T~PE

ALSO BE

~ILL

TES1~D

-------------------------------------------~--------- t-c·.roP >
TH~ ua1 MuDUL£ #L0004

---------fJCN
------------------UCPl
-------------------

·-·--

UDP2

------------------UOP4
------------------UOP3

---------INT

------------------CON1
ICTU•58)
------------------CON2
ICCCNSOLE)
----------

i
I
1--1
1--1

I
I

I•
I

I
I

I
I
I
I
1--1

---------------------------------------------------~

)(CVR

(Uop-C4l

1
I
I

I
I
I

XCVR

- ---- -,I

--------

UNBUF

BYTE SWAP

A1,AO

-------,

DATA LATCH

<A17:A2>
ADDRESS

BYTE ROT.

ALIGN

BUFFER

BDPMUX

1881TS

SRCE.SEL.
MUX

ADDRESS
COMPARE
2

I
I
I

RCAR

- - - - - BUFI

' ''

CMI
MUX

UCN
I
FLAGS/CMt
FUN/MASK
I
<17:9>
I
ADDRESS

I
I
I
I
I
I

---'' - - ---- - ------'
UNIBUS Interface Block Diagram

><CVR

I
CMIMUX

· Cl,CO

MAP
612 x 19

CJ:-.:

CJNSOLt. CHIP

c QI~ c ~ I? s c I) "Iv E q ·r s fi; R I AL uA'!' :\ f Pc tj !'\ ? :; g r u- 5 ij GR 1 it c.
TERMt~AL TJ p~~ALLEL CAT~ FOR THE ~ ~us, OR

TH F.

CO~SOLE

P~RALLt:L

TO SEiHAL Ir ;:(QIJTING n. rHE OPP'JSITto: OIRECl'ICN.

PART

~U~3ER:

~~ST

DIAG,OSTICS:

19•14695
DP~

~OOULE:

lJSI

GATE

~~CRO

~RR\Y:

co~

~CTRL

CQN

(LEVEL 3)

~CC8A.EX~

cruse A~D CO~SOL€)

crusa,ccNS~LEl

OQ~E SY~C C!~T€~NAL CLOCk

0,+3Y--1--·----·····--48-TU/CON

MICRO SEQUENCER INIT--2-ol o
~CTRL

1--47-C~DO

•o-44-TU/CON T READY SYNC
lo-43-CLCO CI~?ERiAL CLOCK SIGUALS)
lo-42-M CLK
1--41-TU~8 I~T L,S€~IAL LI~~ I~T L

N,HALT OET BR S1NC--6--1
TU/CON OO~E SY~C H--1-ol
+3V,iROHT PA~EL LOCKED--8--f

r uI cc N s ER I AL I ~Ip uT--9--1

I <>4 o_ .. a 2 5

SIG~ALSl-1~--1

1<>39-~d

VGA-12--1

1--38-GROUND
lo-37-D CLK gNA~LE

VCC-13--

1--36-~CTRL

ru1CON T READY SYNC-11--1

16-15<>
~-16-0

GRND-17--

1--32-#CT~~

TU/CON BAUD RATE CLOCK-13-~S 19-19<>
~a 17-20<>
~8 18-21<>

I0-31-M CLK
1<>30-~B 22

1--29-BREAK

21~22<>

lo-27-SET

20-23<>
23-24<>

lo-26-~

1
Ct~,~

()

BREAK,CO~

T~wARDS

HALT

1--25-EIA TU/CON SERIAL CUlFUT

---------l'HIS SIDE

SIG~ALS)

1~-28-~P~O,I~ST~ F~TtCh

1--35-GrtOtJ~IO
•o-34-CLCI CISTeR~AL CLCCK
1--33-GRNO,H~LT DET SYNC

GRrtO,riD INTERUPT I:·HHBIT-14-~8

SIGNALS)

1--46-wCTRL 4
lo-45-+lV

5--l--1

WCTRL 2--4--1
GRNO,WCTRL 0--5--1

CL01 CINTEHNAL CLOCK

ECKAB.EXE

~ICRC'S

OW750

FINGi!:RS

Qtl

EWA~D

i .• r:
TH~

IriTE~J?T

30TH

r.~ASS3US

P€RFOPMS
VALUES

8€ST

c~IP

I~TE~UPT

~~ARLes

r~~

WANDLI~G

iRRITRATIO~,

~lCR~-vgcTOR

DIAG~O~TICS:

D?M

ALL I,TERUPI

GATE ARRAY:

ISSUES

~us

GRA~TS,

AND

~~oL~ST;
l~L>,

l~SF~TS

LI~~s.

~ICRC'S

0~750

MODULE: UBI

THE

M1D U:'ZI8US, CC}'·lAI;·,S ?SL tHTS <22•26 and

ECKAB.EX~

MACRO iCCSA.EXE (LEVEL 3)
I~T

1;n

WRITE SUS
SPf I

~RROR

INTERUPT--1-o----------o-48-TI~E~ I1T€~UPT
+JV--2-o o
o-47-INTER~?T PE~DING

(S~i'c pQ;e/ER FAIL I:n. l-.-3-0
CORRECTED DATA INTERUPT--4-o
WCTRL 4--5--

--45-UB l:lTERIJPT GRANT
--45-S~R4

CSY1C~~OiOUS

eR)

--44-riPSGti

*CTRL 5--6-PHASE 1--1--

CHIG~EST PkIO~ltY
--43-HPBG4 CHI~H€Si PRIO~ITY
--42-SBRS C~Y1CH~O~OUS 8R)

BG)
8G)

MB 22(:PSL 221--8<>
23(:PSL 231--9<>
PROCESSOR I~IT-10-o
~CTRL 2-11-YGA-12--

--41-riP~GS

(ij!~H€ST PRIOHilY
CSY~C~RO~OUS BN)
--39-SB~6 CSY~CHRO~OUS 8R)
--39-GROU~u
--37-SY~CHR R!SET qG

BG)

--40-SBR7

~CC-13--

o-36-B CLK
--35-G~Ou~n
1--34-~ CLK ~~A~t~
1<>33-wd 16 CIP~)

WCTRL 1-14-~CTRL

3-15-~I

WB 25C=PSL 251-1~<>1
~B 24(:PSL 24)-17<>1
~a 26C:PSL 26)-19<>1
~CTHL 0-19--1
"41C~O

1<>32-~B 17 CI?~)
1<>31-WB 19 CIPL)

lo-30-SERIAL ~I1E I~IERUPICCO~SOLE)
1--29-D C[Jf<: ~=!"A~[,€
1<>29-NB 19 CI?L)

v1o:cTOft o'-20--1

~tCKO VECTJR 2-21--1
~ICRO VEC!OR 1-22--1
~ICRa TRAP-23-ot
*IC~O V~CTOP BRA~CH-24--1

()

1<>27-~o 2u (IP~)
1--26-PTE Crl~CK 1~ ?ROSE
lo-25-DO SE~VIC€

----------THIS SIDE ?OWARDS

FI~GEhS

BOARD

UC:·•:

tJ.'Jl ~us DA'r A p ~Th C:JNTRJL CH I~
THi:: fjC:"4 c:tr? COt.rRrJC.,S THE UCiP C:HP fUs\IC'f[ 11-4.3, ~U2LiS LbI
AqcITR'11!tJN F·JR THE c~~I, ISSUTO.:S ~.rn ."1Q;HT1~~ iJ'JidUS cor.lROl.,

rig

SIGNALS

A~O C~t STlTUS LI~~s fCR us~ 8Y
U8t ~IC~OCOCE.
U~l IS RO~ C:l\'l'ROLLED Ai!D !t-'C: oc.~ CH!? PL.1'.Cl::S 'Ihti. f~CPER
MIC~a-Aon~ESS ON T~£ URI ~ICRO-ADDk~SS LI~~s ~Fr~R C~Ct~l~G

TiiE

TO BE oc;E.

~HAT

~UNCtLON

~EEDS

PART

~U~BER:

19•14693

aesT OIAGNOSTICS: Ow750
:-tOOULE: UBI

~ACMO

F.CCSA.EXE

CL~VEL

GA'fE ARRAY: IJCl''
:JC:'-1

31--1--------------4~-Pb
~SY~--2-~
1--~7-TI~E COLl~r crt~EOU1)
UBl UNI~US AODR~SS 11--l-lo-4&-CMI D~dZ CD~TA bUS e~SY)
UBI U~IdUS ADDR~SS 08--4-10-45-C~I S~'IU3 00
~DU~~ss
UNIBUS
lo-4~-C~I

UBI BUFF CHI

(ADDU>--5--

sr,rus 01

ADDRESS
CMI CAODCl--6-ENABLE ARB ~E~U~ST--7-Cl--8-~~BITHATIOU

1.-43-SSYN
1--~2-~MI~US I1IT
1--41-U~I SUFF C~I 00
1--40-U~I
C~I 29
1--39-U&I ~U~F C~I 30
1--38-~ROU~D
lo-37-UCR Al(~ICRO CDMTROL
1--l~-I~TERUPT
t--35-GROU~O
·--34-USI aur~ C~I 25
1--33-~UT 0
1--32-U~I~uS AOC~ESS lJ

au,r

0~--9-0

UCR A2CMICRO CONTROL RO~l-10-0
UBI 1ATCH-11<>
VGA-12-VCC-13-U~I 8UFF CM! 28-14-C0-15--f
UCR A3CMICRO CONTROL ROM)-16-0I
A0-11--1

lo-31-8 CLK

Al-18--1

aur 1-19--1

1--30-lh11IHUS

.\01~~55

lo-29-M~P CO~TR~L

BUT 2:20 __ ,
UCR AO(~ICRO CONTROL ROMl-21-ot
~BI BUFF CMI 27-22--1
SC 1-23--1
URl BUF c:H 26-2 4--1

POM)

OUT ENAeLE
1--28-~dI LA?CH OATA ?ArH SEL 1
1--27-UbI LATCH ~lTA PA?n S~L 0
C)

1--26-SC 0
1--2 5-Lt6 I t.A TC~ !Jf f SE. t

JU@:

. t..' ;:).
U. 'I. ! b

-. \ ·r• ''I'

·~;

f.l
. :' , .....
I !. .:!
:-,

,.. •~
'..

I !"'-

Ctj :'-i PL F: l E: u ~. I ~ l' S 0 A: M PATHS ( 1 .; ~ J T Al ··ff D 1 '
3

oUrFl:.~~i)

PROVIn~s

A';D 1

ut~F:CT,

A ?ArH FOR ALL

fii1'r~

SiriA~~l·~G

ADLRESS~S

c ~ I A~w tJ :Haus •
4 CHIPS

ANO

r '.i ~ 3 ~ C ~I PS ,
A:~!)

JAT~

·Jn·s:::T LOGIC.
3i!~E~~

TH~

C'iI~

B.ITS

UOP 1

o,1,s,9,16,17,24,25
2,3,10,11,1a,t9,26,27
4,s,12,11,20,21,2s,29

UDP 2
IJOP 3
UDP 4

b,7,14,15,22,23L3Q~31

PART NUMBER: 19•14692

BEST DIAGNOSTICS: Ow750

~AC~O

ECCBA.~X€

GATE ARRAY: UDP Cl

:.. OOULE: UBI

CLEl~L

THROU~H

UDP (1 THROUGH 4)
UNIBUS OArA Q9,11,13,15--1<>----------<>4d-U8I au~p C~I oe,10,12,14
uiH B,, s DAT A 0 ~ , 10 , 12 , 14--2 <> I 0
<>4 7 _u 8 I au Ii' F c~"'I 0 9 , 11 , 13 , 15.
UHidUS DATA oo,02,o~,06--3<>1
<>46-C~I DAT~ oq,11,13,15
U~Id~S OATA 01,03,05,07--4<>1
<>45-C~l DATA og,t0,12,14
N,AODC,AOuC,ADOCCAODRESS=CHI)--5--1
<>44-C~I OATA Ot,J3,CS,07
GRN0,+3V,GRND,~RNry CIDl--6--1
<>43-Uat SUFF C~I 01,03,05,07
3 CLK--7-ol
A1--8--1
A0--9-30FC 1CBUFF O~TA· PATH)-10-~DPC O(dUFF DATA P~T~l-11-VGA-12-VCC-13-UBI oaBZ-14-0
UBI ?REV DdBZ~lS-U~I~US ~D~~ESS 03,10,12,14-16<>
UNIBUS ADDRESS 16,0Q,OS,07-17<>
U~IBUS ADDRESS 15,17,04,06-18<>
S~ 1 (SLAVE CONTROLl-19-U~IBUS ADDRESS 02,09,11,13-20<>
SC 0 (SLAVE CONTROLl-21-P~TC 0 (PnRT CO~TRO~l-22-PRIC 1 CPORT

dUFF

~~TA

<>j2-UBI
<>31-U3I

~1~~

C~I

AU~F

C~I

01,02,04,06
00,02,04,06
--40-BDPC 2 (?ORT CCNtROL)
<>39-C~l OAT\ 16,19,20,22
--3d-GROUND
<>37-CMI DATA \7,t~,21,23
<>36-UeI ~UF~ c~I 16,18,20,22
--35-GROUMO
<>34-CAI O~T~ 25,27,29,31
<>lJ-C~I DA?A 24,2~,2~,30
c~r

17·,19,21 1 23

25,27,2S,31
<>30-UBI ~il~F C~I 24,26,2b,30
--29-LATCrl 04r~ PATH SELEC! 1
--28-ADDC,A!)i)lJ,A.)OU,AOOU

--27-LA?CH OArA ?ATh SELlCl 0

ueI

~ATCH-23<>
CO~TROLl-24--

<>42-C~I
<>41-U~I

----------

--26-LATC~ OFF~Er
--25-P~TC 2 (O~RT

CO~IRCL)

· L0010 SUB

58
l--

<TOF')

THE SUB MODULE tL0010
SECOND UNIBUS ADAPTER

UitP2

PINS>>>>

:--

UCN

UDF'4

..•
UDF'3

UDF'1

:--~

:--

----------------------------------------------------

:--

59
C1ION 1

INSPE:Cl _.,. .......
..........
PA~TS

The basic D~750 option ccr.sist of the to1lowing hardware
parts. Check tnat none are missing or damaged before ycu
proceae.
QUANTIIY

CESCtHPT IU~

--------

-----------

1
1

L0010 Second

U~~BUSCS~~)

~OdUle

Riccon cable assembly
consistinQ ot:
Cll 40-conductor ecoo
ribbon cacles, tie ~rap~ed
and formeo.
M~014 rransition module
M9302 UNlcus terminator

there snould ce an expansion cox, and possicly an exParsicn
cabinet.Tne expansion box ana, or cabinet are ·not part cf
the DW750 option,out sncula nave teen orderea separately.
I~StALL

2.1

CHECK

2.1.1

! f vMS

~Q~IPMENI

HA~OwAKE

LEVEL

A~D

POw~R

S~SIE~

CC~N

is running bring it do~n in an orderly fasnon b~
either naving the custo~er cring it down, or ~ith his
permission typing the following command.
EX:

2.1.2

~EVISlu~

s ~sysssyste~:shutdown

--------------------

Examine the CPU hardware revisicn level to assure con1patatilitY
between the option and the CPu. It the CPU is riot at tne
correct revision level, de not ~recede ~1th this cption

installation until tne CFu is updated and checked out.
the tollo#ing example s~c~s ycu how to cneck the CP~ rev.
EX:

------

>>> E/I 3C.
I

u~v0G03E

(tor systems •itn

le~

0200~~30
arra~s)

0~Vvu03E

02005~46

( t or s y s t e r.: s w i t n 1 rn e q a r ray s )
2.1.J

Power the systerr. Ott

usir~

l?a.;;e 1

tne i<.ey switcn.

60
2.2
2.2.1

Install excansion box or catinet cer dPProPriate installation
documentdtion included ~itn tne option.
Expansicn caoinet snoula te installed to tne ri~nt of t~e
CPU cabinet per the follc~iny examples.
EXA~PLE

+---------------+
·~----+

f
I
l
l
I

·-----------------------+---------------1
VAX•ll/750
+-----------------------+---------------+

+-----+

---------------1-~-------------

----------------1

---------------1

+-----------------------+---------------·---------------+
H9o42 Cabinet
1511 Cabinet
C 2nd Util8US )

EXAMPLE 2:

+------------~----------+---------------+---------------+
VAX•ll/750

+-------------------~---+---------------+---------------+

1---------------+---------------+
l•••••••••·-----T---------------~

~-----------~----~------+-~-------------+~--~---~~------+
n9c<i..i Caciret
H~o4S C~u Caoinet
hojo4~ Cacinet
(

Page 2

lSt

~~If.L~

)

2r:o

~:·lcl.3

)

61
~Cf- //7b1,

2 • .3

S~T

i.3.1

Unfold the

2.3.2

At teen tne 15' ground core to tne VEL.OSlA'I sriap tastener
on tne a.at, ana the alligator clip of the grouna cor~ tc a
good ground on the VAX-111750.

2.3.3

Attach tne wrist strap tc eitner wrist and tne
alligator clip to a conver.ient portion of tne mat.

2.4

UNPACK tH~ LOOlO MODULE

2.4.1

Place the

Uf ViLUSTAI

~IT

~~~OSTAf

~0010

mat tc full size (24x24J.

~oaule

~tile

still in tne cox en tne

VELOS'IA'l mat.

2.4.2

Remove tne ~odule from tte cox and protective
covering and lay it tlat en the ~ELOSTAl ~at. in1s ~ill
brinq tne module to the same potential ~s the Cf U ~nd
eliminate static discnarge oamage.

2.5

INSlALL

2.s.1

~itn the ~rist strap still attacned to your wrist install
the L0010 module in a C~I o~t1on slot. the tirst C~I
option slot is recomenaed (VkX-ll/75u slot nurocer 7) tc
alleviate cabling procleKs.

2.s.2

~emove

D~750

CPtiO~

grant jumpers

bacKplane slot

fro~

~nere

LOOlO is

1nsta11ea. No jumpers neec to we aaaed for tne ~~750 o~tion
because it has tixed aodresses, ana a tixed CMl Aroi~ration
LeVel Of J.
NClE

----

Rh750s START ~Ilh CM! A~dlTMA!lGN L~V~L ClJ,
lf YOJ ttAV~ ON~ C~ MG~t IN YU~R ~YSl~~ ~~~
MUST MOVE THEM DC~N ONE C'I A~~I1~A!IC~ LEVEL.
EX:

•ITnou·r Cft7:,o l~S'IALLt.D

RH75040

ADLiRESS ~28000

RH7~01l

ADDtU.SS f 2AvUO
ADORE.SS

INSIALLt:O
C~l
r 2bOoo

ADDR~SS

f 2Ati\Jv

WlIH
Rri75010
i;n7~vf l

2.s.3

0~75C

~M J.

AHS L.C.'-t.L 2
Ako Li.\C.L. l

Connect tne tnree ribcon cacles tc cacKPlane slots d dnc L

as in tne
:l.5.4

CM! Ako ut: VEL 3
Cit1 I AkS 1.1t: \f t.L 2

M~SSbUS

oction.

Route the cac!e assemo1y up tne cacKP!ane to tr.e cacle
racK, and tnen to the le~t. ~~xt route it cet~een
tne vAX•ll/7~u C?u cabinet, and the expansion cabinet,
tnen across the oottom ct tne ex~ansion c~c1net and u~ the bacK
to tne ~A cox. ~ee aiagrarr.

ruanage~ent

Page

62
C~dL~

tU68GN CAE:Lt.
ASSt::Ac&-~

~~~AGEMi~1

RACK

I
I

+-------------+-+--1-------------1------+
x xx•xxx
*
xx -----x---------+
x
x

X
x

XLA

xCC

x [I:

1-------x-•--x ----------------+-----x
x

·-----·

SA box

1-------x----- x
xxxxxx x

+-------------+-+-----------------------+
i:.XrANSlUN
cabinet
J!.5.5

. 2.5.6

CPU cabinet

C tack vie-¥ l

Install tne M9014 on tne end ot the cacle, ano install
it in tne ~~I~~s IN slot ct tne expdnsion DJll bacKp1ane •
Install the
U~IBUS

U~l&US

options that are goin9 on tne secono

per their installation manuals.

2.5.7

Install tne ~9302 UNI&US 1erm1natcr module in slot Ab ct
the last 0011· backplane.

2.5.8

Insta!! the u~IBU~ Exerciser l~~ll module ( M78~~ ) trc~
your Field service Spares Kit into an SPC slot in
tne expansion 0011 backplane. Remove the hP~ juroper •ire
CCAl to C61) in tne oack~lane slot wnere the us~ is located.

---NOTE

UbE
ANC

~DCR£SS MUSI BE SET
V~CIOri SlI f OR 510

fCR

770~00

Sw!ICHf:.::

ACDFC:.S.S Ct: 125)

vC:C'.1.lJi~

U••

(,.1\

Cl\

ui~

.:)4

~f'f

SS
S6
S7

er-~

Ct1
lJ 19- r·

ur·F

Ci\
Cl\

lt.

i:fb)

63
2.7

CH~CK

HiMOtE

S~~~E

CABLE

Cbeck tnat remote sense cable is connected
CPU to tne expansion catir.et.
2. l:j

PO~ER

2.«S.1

turn on ail breaKers.

2.8.2

Turn on Key

Sl::CTION 3

trc~

tne

SXS'It.M QN

nARCwA~E

s~itch.

CH.J:.CKOUT

----------------3.1

EXAMINt TriE

~UFF~k

DATA P'IH

kEGl~TER5

tnere are tnree ouffer data patn
follo~ing addresses.

S£CO~C

re~isters,

UNla~s

ana tney are

at tne

CSRl

f 32004

CSt<2
CSk3

F3200C

f" 3200~

t:X:

>>> E/P F32004

----------

the register format of eacn ot tt.e registers is as
+-~+--+-~+--------------~---------~~-------~-+--+
net usec
i3llj012Yl2o
'' l Iv u I

tol!c~s.

+--+--+--+-----------------------------------+--+
CP~~l Purge "eQ~est
----------~
+------ CUCEl
Unccrrecta~le ~rror
+--------- (NX~) Hon Existent ~e~ory
+------------ (~RK) Errcr FlaG CCH ot oit~ ig & Jul

64
'Ibey tall into the adaresses oet4een F.3~b0u ai10
and the registers nave a for~at as tollo~s.

r·~.tFfC.:

+--+-----------+--+------+--+--+------+----------------·
1221211
1311 not used 1251
11 ..
·--·-----------+--+------+--+--+------+----------------+
I
Paqe
+-----+
concatenateo with
001

Fraae·~umcer

cits<a:2> Of tre LN!SUS
to tor~ the 2~ tit ~~l
,~d ir~ss.

·--

CATA PA Tri NUr.tBEk
0 0 Direct Cata

Patn

0 1 Bufferf!o Cata Fatr. 1
1 0 autterea Cata ?ath
1 1 Buttered Cata Path 3
~

+-------

bXIE CrFSET
Usea ~hen addressinQ odd byte
boundarieso

+---------- If
VALID Bit
set, treat cycle as a
~ot

~a~.

3.3

EXAMINE THE IPEC REGIStERS

3.3.1

these registers are similar in fur.ction to tne UEI reqisters
Of tne Ual module. They are pnysicallY located on tne tvOlu
~odule, out accessed via tne second UNieu~. Theretore if you
can examine tnese registers you nave proven you can access
the Second UNieus, and it is not nung.
~EGISl'ERS

Cf-'! ADDRESS

Address reqister
Data register
Control register 1
Control register 2

l' Bf 4o 0

IFEC

EX:

f Bf 4o2
FBF4c4

772140
772142
77214 ..

r·sF4co

77'1.l.:t6

...... ------- .. --

>>> £/1t/P FBE'460

----

1.cu:

'.ai ri t: iJ

EX At-'i I ~Jl NG Ck Dt.: t' CS l .:. T . 1.~ ·i, · (_ ~ C:.
US I!: ~CF C LE i\ C: •.. h fl·~ r· f.. f

~ C: \J IS TE H ~ ,
kATh~k

£>..:

t;/n

1riA~

LO~G

fijf4bC
cac:e o

~CRD

~c~~~1.

65
3.3.2

The

is a

follo~ing

ADCNESS REGISTER

cescri~tion

t~e

!~EC

registers:

FElf 460

+---------~------------~-------~---------------------+
115
001

+---------------~--------------------------~---------+
tnis register contains sixteen ot the address_cits
used during an ~PR transfer initiated by control ~
register 1. tne upper twc bits, 16 and 17, are
contained in control register 1.
DAlA REGISTER

FBf462

+------------------------------~--~--------~---------+
115
001
+----------------------------------------~-----------+
This register has a duel funtion. For an ~PR cycle it
contains the data either sent or received cy the ~PR.
For a e~ cycle it contains the vector cassed ~itn the
interru~t.

CONTROL REGISTER 1 FBf 464
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
115114113112111110109108107l0bl05104IU3102I01IOOI
~--+--+--+--+--+--+--+--+--+--+--+--+--+--~--+--+

c c

I
T

t
0
0

l
E

E
R
7

8
R
6

f
E

T
0

p
E

A
1
b

F-

r•

i:.

NPR - Setting this bit causes tne device to ao an NFR
cycle with tne data contained in tne. address and data
registers. If the bit fails to clear ,it indicates tnat
tne device ~as unable to tecome cus master. This o1t is
also cleared ~Y INIT.

co, Cl
be done

'Ihese bits detertrine what type ot t:ransfer Nill
·.-1nen l\ Pt< is set. lney are as ~ollo~s.

0
1
l

0A1' I
CAI IP

\,,

CATO

CA 1 i.:~

66
A17, A16 - T~ese o1ts are the upper t~o cits of tne
address register. IN!T dces net clear these cits.
PB - Setting this bit simulates a· memory ~artty error
setting the BLiS Pti signal on the UUI&~S ~nen the data
register is read. This ~it is cleared bV !~lT.

TO - this bit indicates tt:at a UNIBUS transfer timed out and
SSYN ~as not returned. lt is reclocKed every ~ra~sfer, and
cleared by IN!T. RF.AO CNL~.
PE - this bit indicates tr.at BU~ PH on tne UNIBUS occured
during a DATI. rt is reclccked every DAT! cycle, and also
cleared bY IN!!. READ CNL~.
BR7•BR4 - These tour bits cause tt.e device to assert their
respective BR reQuests, and attemct to interrupt at tnat
level. they may be set 1~ any combination to verity thE
arbitration logic. Once these cits are set tne lFEC ~111
attempt to interrupt until either the bit is cleared or the
interru~t has taken place. Tnese bits are not cleared cy the
interru~t taKinq Place, ar.d must be exPlicitallY clearec
by either ~riting a zero to tne appropriate bit position, or
by lNil before thev can ce set aqaln to initiate another
interrupt.
ACIE •· tnis Dit 1• ACLO Interru~t tnable. when set, it -111
cause an interrupt to vector 1e4 on tne leading edQe of a
UNIBUS ACLO Signal C~ower Qoing do~n) and aQain approxi~atelv
100 ms atter the trailing edqe ot ACLu (power comina u~).
Cleared bY

I~IT.

ACLGl - Tnis bit is set cy a po~er fail conaition, and
causes an interruct it ACle is set.
REAC GNLY
INIDONE - This bit indicates an interrupt has taken place
~as caused bV one of the SP bits being set. The bit is
cleared bY writinQ a Cll to it or by lhII.

that
!~It

IPEC

- lnis cit will initialize the internal loQic ot the
~hen set. The out~ut is undefined wnen read.

CO~IROL

R~GISTER

2 FBF46c

+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
11s114tlJ11~1111101091cdtC11obl~5I04IOJ1Gito11ou1

+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
A
s B ~ b v v v v v v v ~ v
E
l
R r
~
R 8 7 6 5 ~ 3 2 1 c
~
c
x
T 1 L 7 b 5 4
M D c
G G 2
D

E
~AGl

67
- tnese bits specify tne vector to oe usea cy an
initiated oy Ccntrol keQister 2.
Tnese bits are ~OT c1eare~ ty Iwr1.
v~-vo

interru~t

BR7-~R4

- These cits cause tne device to interrupt in
manner as the 6~ bits in Control rieqister 1.
Cleared by !NIT.
t~e

sa~e

ACL02 - ThiS cit wnen set will cause ACLO on tne UNidUS
to te asserted tor approximately 1.s ms. The bit -is
self clearing. this bit 1s ~OT affected bV lHlt.~
I~TDO~~ - This cit works tne same as the I~tOONE cit
in Control Register 1, tut for interrupts initiatea by
by the B~ bits in Control Register 2. This bit iS
cleared bY writing a one to it or by lNit.
EXt~oo - this bit is reservea tor future use, snould be
zero wnen read. READ O~LY.

3.4

EXAMINE A UNIBUS

EXERCIS~~

NEGISTEfi

Exa~ine location FBFooo, tnis ~ill aive vou location 770000
on tne second UNIBUS. For a description of what the bits in
the Uc~ registers do, consult tne UBE users ~anua1.

Sy examining a UBE reqister you are checking that you can .

get
3.5

ou~

to tne BA. box.

BOCl UF THE ClAGNOSTIC
Minimu~

revi~ion

SUFE~VISC~

STA~OAL0h£

~COE

of the Ciagnostic Supervisor that can te

oe used is (6.4).
~X:

8/10
~nere

3.6

AT!ACH

1ri~

xxxx

CXXXX) is tte boot device.

Ow750

lhis can be done in two ~ays, eitner bY running the Autcsizer
progra~ ~VSBA or by doin~ a manual attach.
EX:l
~S>

~U~

E~SBA

--------~

DS> SELECl ALL
---~---~~-

?AGE 9

68
EX:2
OS> ATTACfi Ow75u

C~l

Owl

-------------------OS> ----------------------------SELECt Cwt
OS> ---------SELEC1 UBO
---------OS> ATTACH USE [w1 Ueu 770vOO 510

l.7

RUN THE

UBI/0~750

OIAGNCSlIC

A minimum.of two passes cf this diaqnostic shoulo be run.
the proqram is called ECCEA, ana snoula oe REV 1.3 or
nigher.
EX:

OS>

~UN

ECCBA

--------03.8

RUN

AfPFOfRIAl~

D!AG~OSllCS

FOR DEVICES u~ THE SECOhD

U~lBOS

Run ~natever other appro~riate ciaqnostics are necessary
to verify tne peripherals that were aaded to tne Uw750'S
U~IBUS. These diagnostics can be determineo cy referring
to the· installati~n manuals for tne aaded devics, look1~q
tne~ u~ in iV~DX, or by using the Diagnostic Supervisor
help file as follows.
EX:

DS> HELP ClV XXXX

-------------

where CXXXX) is tte device you
REMOVE

1H~

UNIBUS

~XENCISER

~ant

Know about.

~OCULE

3.9.1

Remcve the UBE module.

3.9.2

Replace the NPG jumper wire on the backplane lwire
Pins CAl to CBl in slot ~~ere M7655 is installeo).

3.9.3

Replace tne Grant card ~ack in it's original slot
(slot c of an SPC slot).

3.10

BRING Uf

~MS

fro~

AhO RUN UETF

For information on settir:g up ar.d runnino
VAX/VMS uETP user's Guide CAA-te43A-TE)

Paoe 10

UET~

refer tc tr.e

LOCOS CCS/WCS

70
ccs

SLf)'t' 5) •

TME CP~

C1~TROL

STJHF cn~T~I~S

THE stsr:.; •.1 Co!< BY Su BITS),

l~i

MICROCOD~

A U·EXI" AJ0Rt:;S5

~J~S fuH
L~rcf., Ai>lC

Y.ISC. 8 ~:JK Si4:LECT A·m PARITY Gi:;NE:RATOH LJGIC CHI NEXT
fIELD

c~~LO.

THE ccs 80ARD IS TH~ ~OTHEF BOAFD FD~ Tri~ ~cs (~klIEAdLE
CONTROL STQri~) CPTIO~. THE ~cs 15 PHESS€0 ,~ IHE Pl~S ON
THE 20ARO A~D IF IT MUST BE RE~OVED, us~ A GRA~I CAFD AS
A PR~ SAR TO PREVE~T IT FROM C~ACKI\G. TH€~g IS A JU~~fR
ON SOME ccs BOARUS TO ?IE BIT 13 Of TriE "Ngxr" FIELD Of THE
~ICRCCODC:

Li1w, IT "1UST SE REMOVED TO ENA9Le:

!4CS--Us~-.

IS NO DIAG~QSTIC TO TEST THg CCS RQ~ CO~!E~lS, th~ eEST
TC DETERMINE THE CO~DITION OF TH~ CCS IS ?~ DC A PhkITY
C9ECK UNDER RD~ ~00£ CRDM>PAF D) IF YOU GE? A P~RITY SlCP AT
CSAO 17FD, It IS UK. C'S FAR AS ~~ CAN TELL) K€EP IN ~IND
THAT ~IFF~REHT REVS. OF CCS bOAROS ~ILL CAUS~ FAILURES
U~DER THE ~RO~G REV. OF OIAGNOSTICS. THE qgi. OF ?HE CCS
CAN BE DETERMINED er EXA~INING TriE IPR 3E dtTS 9•15 CSit)
THE NUMa€R ~ILL SE lN H£X AND MUST 9~ c~~v~~T~O TO OECI~~L TO
BE ABLE TO I~TERPRE? T~E REV. L~VEL CEXA~: 3~
REV 62)
TriE DPM ~IC~ODIAG~OSTICS DO SOM~ ~INOR I~T!~~ITY TESTS CN
THE CCS IF YOU WANT TO RUN THEH, RUN ECKA~.EXE DP~ ~ICFG'S.

THER~

~AY

THE CCS 'UCR'1CODg FIELDS

40DULES

TH~QUGH

CON~IECT

BACKPLANE

T1)

THE.·>?·.. ,

"\IC, AND ui::I

~IRI~G.

THE ~cs IF INSTALLED IS CONNECTE~ TO THE c~I.
THE WCS CAN dE TESTED ~SING TH~ ~EVEL l ~!\GNOSTIC ECKAl.EXE.
THg ~ODU~E ALSO CONTAI~~ Two US~IL~ATORS a~~ 19.75 MHZ FOk THE
SAC CHIP TO CRFATE SYST!~ CLOCKS, A~O ON~ 1 ~~z FOR 1~l TOK
CHIP'S COfJNTEf<,.
THE CCS

~ODULE

HAS

G~TE

ARRAYS.

'li~ITF.'4dL!-..

CLLiTROL sroRi:: Kui:-:)

-------------------~--------~
KU750 ~RtTEA~L~ co~rROL STORE OPTION IS DESIGhED Tl
THE LOADitG OF O?TIONAL ~ICROCnDE TO iA~OLE fLCATING
GRAND ANO ~UGE I~STRUCTIONS NDT NOR~ALLY SUP?OR~ED ef lH~
BASIC CPU MICROCODE. TH~ ~cs WILL ALSO \LL1~ TH£ LOAUI~G
OF CUSTO~~R ~RITTEN ?OUTIN~S IM MICRocoug P~OV!D~O IHAl THE
CODE IS WRITTEN IN THE PkOPFR FO~~AT AND C4RE IS TAKEN 10
CALCULATE CORRECT MICRO•FIELD USAGE A~D PAqITY.
r~E

ALLO~

TH€ WCS IS LOAuED VIA THE C~I BUS FRO~ A~ORESSES &EGIN~ING
FROM Fooooa. EACH ~ICRO ~ORD "ILL REQUIR~ rnuR-~RflES
ACROSS TH~ CMI TO ASSE~BLE ALL 80 BITS. IF 1HE CODE IS
DIGITAL'S FLOATING POI~T OPTIONAL PACKAGE TrlE~ A LGAO~F
ROUTINE ~ILL RE PROVIDED OH A CASSETT€ ?'?! A~D l~ST~UC~IO~S
WILL 8£ GIVEN ~XPL4INiiG HO~ TO ~AKE T~E L~AOING PkOCESS A
PART or THE STARTUP COH~AND PROCEEDU~E.
INSTALLATION: THE WCS IS A SMALL PC BOARU ~ITH RA~ ~HIPS ON IT
AND HAS NO ~gTAL FRAMEwCRK OR HA~1L€5. IT IS !~STALLED
"PIGGYBACt<" ON THE CONTPOL STORt:: CCCS C,t)OOS) -1~CWLE BY
FIRST R€MOVING THE PUSH O~ JU~PER CIP INSTALLED) fqOM
Tri~ PINS PROTRU~ING FNO~ THE ccs auARD.
THIS JUMPER
~AS INSERTED BY MANUFACTU~ING TO TI€ SIT 13 CF THF
COHTROl, STOP.E 11 :-IEXT" FIELD TO GHOUiO Tr!JS PREVl:.t TING
ACCESS OF ~ICRO ADCRESSES IN THE ~cs R~NGE (2000 •)
F~O~ BEING ACC~SS~O ~ITHOUT WCS t~S~ALL~O.
NEXT RE~OVE CIF INSTALLED) THE PLASrIC PIN ~UA~ts FRCM
?HE PIN PORTS OM THE CCS. TH~SE GU~RDS SlRVE~ IO
PROTECT THE PI~S AUD ALSO ASSUH€ TH~Y ARE STRAIGHT.
THE wcs MEST 8€ c A R E F u L L y P~Essgc OCwN AGAINST
T~E CCS ~~D SECURED SY T~G ~YLON SCRg~s PFOVIDfC I~ THE
KIT. FINALLY RE-INSTALL T~E CCS ~OO~LE I~ TH~ CPU.
""0 n: :

rru s TE xT Is INTEND En T 0 a c: i4 RE ~H .II') t: R a F Th E b As I c

I~STALLATIO~ PROCEEOU~E A~D SriOULD ~QT aE SUBSTITUTED
FOR THE KU750 INSTALLATION GLlIDE I~ ,~y wA~ •••

TESTihG AND DIAGNOSIS: THE hCS CAN ~E TESTE) 3Y R~NNI~G THE
~EVEL 3 ~ACRO DIAGNOSTIC ECKAX.EX~
T~IS l~St ShOULD

BE RUn IN THE ~AHUAL ~GD~ CDS>~ ~CK~X/S€C:~ANDAL)
A~O THE ~cs FOR~ATTING T~ST ~ILL GIJE A "LAS! ArDR~SS"
~f wCS.
THIS ADDRESS ShOULO B~ ~E~E~d~RED A~D LSED
IN The ATTACH COMMAND iOR THE ~A750 c~~IF THE: DI'4GHOSTIC F,~I!.,S ~r-,o TH€ C;:>IJ IS :(NCJ.i;.~ 10 BF. IN
Goon CO~DITION, THF~ t~E ~cs M~ST 8E REPLACED.
TECH TIP:

:, KEt~ REP LACI 'IG THE i#CS fJSE A G72 7 0 ~I BUS GR Ai. 'T CA PO

AS A PRY BAR TO EVENLY DISTRl~UT~ TiE PR~SSURE LF
RE~~VAL.
IF A SCRl~ryRIVER IS USED, r~g~~ IS ~ VEPY
GQQD C~ANCE THAT YOU ~ILL CHAC~ t~~ ?C ~O~RD.

wCS CJrHli'oa IJF.:0:
~JOT!!::

T'·it;

~..

{S H'1T

~Qii-,G

1'.'U c,g

..:i1.'0C&(~1)

[ ~

Y•JUH

F l~L(. S?ARES

s 0 (J F. T 0 TH JO.: p R 0 J € c TL l) i, n ~·~ i) ~ ~-- ~ ..JU F' r; ~ "!J·f 1 s Gp TI u!'' ,
THl::REF'ORE I'l' IS l1EFT JP re YtlUt< I'F1IVI11UAL on· rtES TrJ
KEEP A SPARE ON HAND If ynu SU?PQRT T~E OPT!~~.
t( IT

US~R

ACCESS: rOR A USER TO ACCESS A.USER ~RirTe~ ~ICHGCCOE
ROUTIN~ IN THE ~cs, HE/SHE ~UST FIMSr a€ SU~E l~4T
THE REQUIRED MICP.OCODE IS LOADED.
IN TfiE MACR•J PROGRAM THi'·r IS ATTE:'1?TI:~,:; ACCESS V-CS
HE/SHE MUST USE A "XfC" NATIVE ~ODE I~STRUCtIO~.
THE XFC (EXTENDED FUNCTIO~ C~LL) I~STRUCTICW wllL
SEND us TO SCB8+14 AND THE LO~EP rJ~ BITS or THt
VECTOR ADOR~SS 4T THAT LOCATION ~UST 3€ ~QUAL 10 2.
IF THIS IS THE CASE WE ~ILL TRAP TO ~cs LOCATIC~ 2001
4·10 HQPEFiJLLY PICK UP THE FIRST !'lfIC~iJtlORO OF CUf(
RQU~INg.
ro RETURN TO ccs AfTEH EXECUTIO~ OF tH!
MICRORCijTI~E w~ SIMPLY ijAVE TO HAV! \ CCS AODRlSS
I~ THE "NEXT" FIELD OF OUR FlNAL ~ICRQ~nkO IN ftCS.
OB'./I'llJSLY

so~e:

CARE ;.fiJST BC: GI Vt::\I li'J

rrf~

SELECIION

OF A RETUR:'J ADDRESS AND THE 1.JSER fl\4 ANY CASF.: SHCUl-D
RESEARCH THE SU~JECT THUROUG~LY A~~ REr£R TU f h£
~OTE:

ASSOCIATED DOCUMENTATION BEFORE AT?~~PrLNG AN
ADVENTURE OF THIS HAGN•TUDE.
CUSTO~ER ~RITTF.~ ~ICROCODE IS Nor SvP90RTED ~y

~.E.C.

· L0006 RDM/MTM

74
TH~

H~~OT~

·TH~

~Arn n:r-: ~.~CE

SLOT 6).

DI~G~CSTIC

41J~L~

JCCi.i _.,.J,}U LE

iLJ006

c~.s.)

• L•)O u.; ·o ( cus T.)

A DI~G~OSIIC
OR REPAI ~€!') 1H' CUSTO~ER
T!ME! O.E.~. CUSTu~ERS CA~ ?URCHASE A SPECI~L ~ODULe CALLED
TH€ MT~ AOOULE W~ICH ~LLO~S RU~hIHG ~ICR~·Ot4G~JSTICS b~f DOES
~CT ALLOW CONNECTION TO THE. DOC Cl::•~T!::RS.
T~E

RE~QT~

·root.

DIAG~OSTIC

~QOUL~

IT IS rJEVF.:R CUSTOMEF<

cqo11

c .ft 0

CUN~ID~~~O

o~rJC:L)

THE

RD~ ALLO~S RUN~ING THE ~IC~COIAGNOS!ICS, A~O ~E~CTE
OlAGNCSIS FRO~ THE ODC C~NTER~. ~HEN TH~ RaM IS lNSlALLEC,
THE TU-SR ~~"° CONSOLE SJ:G~AL CASLS:S a~ ·rHE a"cK-PLA~.,E MUST t'E:
MOVED TO THE RlGijT SID~ CVIF.WEO FROM THE R~~q) OF-THE FINS
I~ SLOT 6.
T~IS ALLOWS THE CONSOLE TO ?~~< Ot~ECTLY !L THE
RO~ BOARD, AND T~E TU•53 TO LOAD ~ICRO•OIAb~OSTIC PROGFAMS
OIR~CTLY INTO THE ~AM O~ THE RO~ SOARD OR ~EVEL 4 ~ACRC•
DIAGNOSTICS THROUGH TH£ ROM ln10 ~AI~ ~EAOPY.

wHEN IN CONSOLE I/O ~OD~, C>>>) A •p T~E~ •u ~ILL ENTER
MODE CROM>). ~HEN A MICRODIAGNOSfIC TAPE IS LOADED,
THE FIRST PROGRA~ rn LOAO- IS ECKAA.EXE a~R ~ICR~ MONITG~.
ONCE LOAOED, THE ~ICMO~ HANDLES TH~ OIAGNosrrc €X£CUT10N
ANO HAS QUITE A FE~ OF IT'S ow~ UNIQUg co~~A•os.
THE DIAGnOSTIC ~I~I RgF~RENCE GUIDE LISTS T~g COM~ANCS
U~O~R MIC~ON (~IC>).
THE ~ICAC~ C~N SE L04D€D 3~ ITS~Lf
U~DER RD~ ~0DE BY T~E COMMAND ~O~>TE/C ccq>
RD~

~OTE:

REV. 4.XX A~O UP H~VE ECKAF.£XE
INTERNAL ~IA~NOSTIC 4T ?Hg €~C OF tACH .

~ICrtO-DIAGNOSTICS

THE ROM'S
TA PE.
CO~MAND

Q~N

·ro Ru~ THI:: RDt.! D [A t';NOS'r IC ynu
UHDER

~IC~ON,

C~IC>JI

rn s r uSE A ~.~,;

<CH>)

*** THIS OIAG~OSTIC ~UST BE RU~ I~ A KNn~1 ~JOC CP~! ***
THE RO~ kODULE CONNECTS DIRECTLY TO TH~ C~t TO ~LLO~
TROUBLESriOOTING ANY MODULE LOCAT£D a~ THE C~I ~us.
THE RJ~ HAS TrlE HIGHEST CM! P~IO~ITY 0, '~y NEXUS
IT IS ALSO CONNECTED TO THE ~ BUS.

***

TH~

RD~

MODULE nAS NO GATE ARRAYS.

•**

75
CONTROL KEY FUNCTIONS, RDM
Control D
Control P
Control U
Control O
Control R
Control C
Control S
Control Q

Enter RDM console mode
Enter console mode
Abort current command line
Inhibit printing of text
Retype current command line
Cancel current function (repeat console c~mmand)
Disable CPU output to active terminal
Continue output to terminal after Control S

'------------------------------CM--,-------------------------------.)
V'

WBUS

CONSOLE I-

CON
'--CHIP

CONSOLE

TU58

UART

r-~

,._.

t--

UART

i---

,.._

A
REG

REG

(2)

(1)

(2)

REG

I-"'

INTERNAL BUS

i--

UART

[?H

8085
MICRO
PROCESSOR

!--

.......

RAM

I
MOOUM ,.._..

REMOTE

~LINE

1 1
PHONE

UART

1--CS B~ ADDRESS

tt-

........i

oecooe

riAGN'OSiiCc5N-rR0L ~TORE ----l

I .II

""'-p___,.~II
r_

t--

l 1------..,

MATCH

TRACE

REG

STORAGE

ooc'

d II

ocs

I
PROM

I
I
I

L-----~~-n~CONTROL
L__ J

STORE DATA

Remote Diagnostic Block Diagram

t---

76
OP'IIJ~S

SLOTS #7,>;,9)

GPTtOi" SLOTS

T~ESE SLJTS
CPU OPTIOriS

3E ~SEJ TO

CA~

I~S?ALL

A~Y

T~E

CUPRENI

~VAILA~LE. CEXCLJOI~G Tri~ F~~ ~~ICij ~UST dE
INSTALL E !.> IN SL 0 T # 1 )
TH!!: ff10 ST C0 '-' t<4 0 N 0? IT -i IN TH g SC:
SLOTS IS THE ~ASSJS ADAPTER (M~A) OPTtaN. ~~~~ A~ G?llGN
IS INSrALLEu THE GRA~T JUMPER~ o~ TriE 3ACK?LAJ~ ~UST -EE

·r

RE~OVED FOH THAT SLOT A~D T~F. APPROPRIAT€ ~RBIT~~TION
JUMPERS ~UST BE SET UP IN ACCOkOANCE ~ITH THE OPTIC~
INSTALLATION GUIDE. OPTIONS AVAILABL~ I~CLUDE 1hE
~ASBUS ADAPTER (~SA), ,\~.fO A SECOi10 urusus ADAP·re::_e csua>,
TriE SECOU~ UNISUS DJES ~OT HA~~ "CON" CHIPS OR ~~ "lNT• CHIP
~~ IT, THUS IT IS R€FEMP.ED TO AS A "SU~" cs~ca~o UNIBUS)
ADAPTER. TrlE PURPnSE OF TPIS SECO~O U~I3US IS TO ALLO~
CO~NECTIO~ or ~ORE UNI3JS DEVICES.
PLEAS~ NOTE: TijAT THE SYSTEM CA~~OT ~E BCOTfD FROM ANY 0€VICES
0'8 THe SECOND UrlI"iJS.

L0007 MBA

78
THE RH750 MASSBUS ADAPTER IS A GENERAL PURPOSE INTERFACE BETWEEN
THE CHI AND THE HIGH SPEED MASSBUS DRIVES. IT INTERFACES THE
32 BIT CHI DATA PATH TD THE 16 BIT DATA PATH OF THE MASSBUS.
GATE ARRAYS!
MDP! MASSBUS DATA PATH CS CHIPS>
RESPONSIBLE FOR ROUTING DATA AND ADDRESS INFORMATION
TO AND FROM THE CMI AND HASSBUS. EACH CHI~_HANDLES 4
BITS EACH• f4t-S.O IE'.c...t.. w f4.l"'C.M ~~A '/ 6CA. "'~e~ '-t>CJ/'-'EN rt.'CZ.
HDC! MASSBUS DATA PATH CONTROL CHIP Cl>
CONTROLS AND MAINTAINS STATUS ON MAP PARITY AND VALIDITY.
IT DETECTS THE BEGINNING AND END OF A DATA TRANSFER' AND
MAINTAINS THE STATUS ON THE SUCCESS OF EACH TRANSFER.
MCI! HASSBUS CMI INTERFACE CONTROL <1>
HANDLES ARBITRATION, COMMAND/ADDRESS CONTROL, STATUS
GENERATION AND CHECKING INTERUPTS.
MRC! MASSBUS REGISTER CONTROL Cl>
DETECTS THE INITIATION OF DATA TRANSFERS AND PRODUCES
THE DATA TRANSFER FUNCTION CODES. IT ALSb PRODUCES
THE CONTROL SIGNALS FOR THE MASSBUS CONTROL BUS.
MSC! HASSBUS SILO CONTROL CHIP <1>
CONTAINS THE REGISTERS NEEDED TO ADDRESS THE 32 BYTES
OF SILO RAM, AND THE LOGIC USED TO DETECT SILO EMPTY
AND SILO FULL. IT CONTROLS THE GENERATION AND CHECKING
OF SILO AND MASSBUS DATA BUS PARITY. THE CHI DATA MASK
IS GENERATED HERE AS IS THE CONTROL FIELD FOR CONTROLLING
THE FLOW OF DATA IN THE MDP CHIPS.
THE BLISSES:
CONTROL BUS!

THE MASSBUS CONTROL BUS IS AN ASYNCHRONOUS BUS
LINKING THE DRIVE CONTROL/STATUS REGISTERS WITH
THE CPU. THE CONTROL BUS IS INDEPENDANT OF THE
DATA BUS, ALLOWING NON DATA TRANSFER OPERATIONS
TO BE INITIATED WHILE A DATA TRANSFER IS IN
PROGRESS. THERE ARE 31 SIGNAL LINES.

DATA BUS!

THE MASSBUS DATA BUS IS_A HIGH SPEED
SYNCHRONOUS BUS USE FOR TRANSFERRING BLOCKS
OF DATA. THE MBA MUST BUFFER THE DATA AND
GENERATE MEMORY ADDRESSES+ THERE ARE 23
SIGNAL LINES.

INTERNAL BUS:

INTERFACES ALL THE INTERNAL SIGNALS THAT
CONTf::OL THE ADAF'TEFL THEF:E ,4f::E 32 .3IGNAL LP!E:::: . .

----·- -----... ----..------'- -----... ----- ----- -------------

1--

Cl'uP)

T~E

~BA

~ODULE

#L0007

---------:vtSC
--~---------------- ---------MOP3
MDP2
---------- ---------------·-----------MDP4
---------- -----------·------- ------------------MOPS
'4RC
-----------------------·------------------------------1;.\0P6
t.tCI
---------- ---------------------------MOC
---------~1DP1

~DPS

1-1--

~DP7

i-1--

1--

-----------------------------------------------~-----

CMI

MCI
CMI
INTERFACE

MRC
REGISTER

MSG
SILO

CONTROL

8 MOP

(8EAI

DATA
PATH

MAP
4EA
261X4
RAMS

2
2
13

MOC
OATAIUS
CONTROL

I'
00
0

INCOMING MAP ADDRESSES

OATAIUS

CONTROL BUS

. RH-750

Bloc.k D1~10.l"V\

81
~3A'S

-------~-----~---~----~-----·---~--1. SI~il TRA.JSFS~
MUST SE SET UP FOR PR~P€R:
2.

~~A

NU~a~~

(~BAO,MdA1

C~l

~ATE

lOE~~IFlCATICN

~342)

ARBITHA?I~~

(1,2 OR

LEVEL

lo HEfOkE ANY ~RA I~STALLATIOU, FIRST PEMOVE A~L a~ JU~?E~S +kCM thE
CESlREO SLOI. (PREFERABLY SLOT 9 IF .THIS IS THE FIRST MiAl
2. SILO TRA~SFER RATE INVOLVES A SINGLE JUMPER BET~~EN ?INS 43 AND 45
OF THE DESIRED SLOT. TijIS JUMPER MuST 6E I~ST~~L€~ I~ ALL SLOTS
CONTAINI~G ~BA'S. _SECTION A OF TH€ D~SIREO SLOT.

------------------------------

lo MdA IDENTIFICATION JUMP~RS ARt REQUIRED TO INFJR~ THE CPU ~HlCH
i4BA IS IN WHICH SLOT. TH£ JU~PrRS ARE INSTALLED AS FOLLC~s:

82
4------------------------~-----~--------------~~-----i·io~O AS R l:.L..ATi:;U TO UEiJICE Cu DE Obr\X:
Jt.JrtPl:.:R Pl ·45 Sl l'tJ 53 A:rn 52
:.\dAl

~SA2

C~l
Tri~
~USI

Norg:

51 TO SJ

Oi~LY

TO SeLt::c·r MbAl

TO OEVICE COi)E OBCX:

AS RELA'i'C:U

? L:lS S2 TO

A~dITRATIOA J~~P~RS

fOR ?HE MBA.

tlA •)

Pl!~S

JU~?F.:t<

~-4

ro l: EVICE CODE OE3X:

AS Rt::LA-rt:J
JUt·iP~R

·.re 5~ ·ro St:L1!:C r

~£EP

O~LY

ro ESTABLISH A CA! P~IO~ITY L~V~L

AHE

MI~D

TU Sf:uECT Mt3A2

?rlAT

TH~

!NTE~U~I

UNibUS bR5/6G5 LINES TO

11/750 Trig

?Ht: CPU,

!HUS

~dA•s
SOM~

ro ~HAT LEVEL ro ASSI~N TO 'HI~rl S~OT.

bE GIV~N

USE

lrlGUG~T

THE Hl~HeR THE SLOr NU~BER, th~ HlGH~~ T~E C~l
ARd LEVEL. (TriIS IS ONLY A GOOD RULl Jf THU~~, ~OT A HE~U!~~~ENt.)

~ASlCALLY

ALSO SOkE '!!10UGHr SHOULIJ EE GIVEN TO ACCESS Of CAdLr.:S (),,. 1'ttc.
dACKPLANE #HE~ INS fALL!NG OT'iER OPTIONS.

THEk£

ldREE C~I ARSITRATIUh LEVELS ASSIGNED TO

AR~

·rni::Y AR!:: A-S FO~~aw~:

CrH ARB LEVEL 3:
ol

CMI ARd
5~

•

l,,EVEL

•
•

.,3 ..
C.·: l.

~ r< ~~

~1
63
o5

a::.
2:

INSTALL JUMPEk 62

ro b4

SECT Il)i"I A

lNSrALL JUMP~RS
SECTION A

ro ~2 ~.JD 63 ra 64

I 1 ST·\uL

,JIJ•i!?C:~.5

ro o2,

~C.:CT t:Ji~

'J 2

• '

0 <1:

a
aa
.
•;;:: "i-~:..

~dA's

l :

~-J
') 2
,4

Ill

·rq 63 .J.\ ... U b4 TO 60

83
IF

UT~~R

r~u

MOR~

CrH

ro ~~ I~SfALLEU 1~ r~E JPI1J~ SL~rs,

OE/IC~S

AR~

C~I

L~V~LS

AR~

A~8

LEV1£L S:

55
57 •

JUMP~k

FUIUR~
~~

us~.

ro 57

SECTION A

• !:>8
L~VE~

IJSTALL

JUMP~~

SECTI;JN A

!~STALL

FOk

ANO c~r ARd

Ki3EPV~u

•

o•)

57 TO

rH~~~

~~~

84
~A J'\,·1~ LC:-)

1Jl" Ht: C •J .1 .•1 ~ :i. 0 ~ :J

~ASS~US

AlJA P'!t:ti

JUM?C::~

~ J ·; f

t .:; U ~ AI I u ,~ S

·---------~-------------s::cr
.Hw A df D~SIRED SLJI

--~---------------~-----• :1C.::-. L i'4 S r ri Lai,, l ,11 G Ai'

uPl'Iu:~,

ALL 6G JU·'4PERS MUST di: kE..1lu l~O fR'J·4 'IhAT Si,;OT!
SILO TR.\NSFEH
RA'!E Ji.Pt PERS

::a

•

• 44

• 4&

47 •

• 4d

47 •

• 4b

49 •

• so

49 •

•

0
a
a
•

5J •

•

57 •

bl
o~

Sla

• 4b

47 •

• 4&

•

,.f~Al

a0
•

•

• 54

55 •

•

55 •

• 5&

57 •

• 58

So •

59 •

• oO

ol •

•

6U
62

59 •

C"I
Ac< ri 1

61 •
b3 ..

•

• 52

• 44

53 •

:, 9 •
01

•.(dA2

b2 CMI

AFb 2

·I t>4

. • 66

as •

M8A0

•

!) t;

C~l
Ak~

• 00

S<.o• 8

sc..or ~

F '1.. C wCJO

F' -Z...t4- OCJCJ

Fz ctrooo

~Loi

L0011/16 CMC

86
F !RS1'

~u'EE

rHAT THJ:: SOARD

!·'U~,oE..F-

HJ THIS $LOT IS LOOl 1

OR L001o ,JOT 10.

?HE

CP~

CO~TROLL€R MCOULE CONTAl~S I?'S O~N
TO CONTROL M~,ORY R£F~EShES, DAT~ BUFFERING,
TIMI~G CCAS ANO RAS).
TH~ BOARO CO~TAIMS ER~OR
~€~URY

~ICROCOOE
SEL~CT

A~D CUHR£CTI~G LOGIC, STATUS REGISTERS,
CONFIGURATION ST\TUS LOGIC, AND lh~ BOOT~TRAP RO~S.

CHECKING

STATUS REGISTERS: CSRO F20000 CEkPOP LATCHI~G ~F.GISTE~)
CSR1 F20004 CDlAG~CSTIC R€GI~~ERj
CSR2 F2000a (MEMORY MAP ~~GISTE~)
BOOTSTRAP Rm.;s:

RIJ,- SOCKET A

F20400

qoM SOCKET B
R0"4 SOCKET C

F20500

F20b00

ROM SOCKET D F20700
ffQT~:

~HEN

THE RO~S IN THIEri S1C(E?S, THE LO~
LOCATION WILL CU~TAI1 rqE Asc11·
DEVICE TYPE M~EAJ~IC FO~ THAT ~CM.

EXA~IN!NG

WO~D OF THE FIRST
EQUIVAL~HT OF THE

EXAMPLE: >>>g/L/P F20400

P OOP2u400
THE

c~c

= OD

XX XX 44 44

IS CCNNECT£D TO THE CMI

TH£

A~O

CODAO)

~€~ORY

~us.

THE LEVEL 3 DIAGNOSTIC ECKAM.EXE TAPE #5 ~ILL TESI THE
~EMORY AND CONT~OLLER.
PLEASE wOT~ THAT T~E DI~GNCSTIC
WILL TEST Q~LY ARRAYS 1•7, TO Tgsr ARRAY o, YOU MuST
EIT~£R S~A? POSITIO~S ~ITH ANOTHE~ SOARD OR RU~ TriE
~IC MICRODIAG~OSTIC CECKAC.EXE T~PE •2l.
THE c~c HAS TWO
~0011:

L 0 0 16 :

AV~ILABLE

VERSIC~S:

SUP?ORTS MB728 256 KB AKH4Y5 JNLY (MAX.
5 Hp p 0 RT s n0 Th ;4 B 7 2 8 A ~m '4 8 1 5 •) . -i:) I) uLe: s

(MR750

M~'S)

ts A 1 ~EGAdY!E ARR~Y ~IVING ~s ~ ~AX.

OF 8 ~d'S)
IF 60Th TYPES A~E ~lJCED, 'f'"'E H728'S ~uSl ~~
INS ·r AM.~D DI;(ECTLY AfTE:R r·i:: 1 :-tf:G EGA~~~.
N 0 TE :

TH € L 0 0 1 6 C ~ C M01111 LE RF ·~ l 1 I ~ ES A RS 1 • i: J ACK PL M.1 ~. .-. rl I Cd
~~: A8LES
CA~

THE tJSE .Ji:- BIT 24 Of
DETER~INED

>>>E/I
I

rrtt: c H

EXA~IPI~G

T~i

.~i)D~~~s.

svs·r~~

IhE HE v.

r.r. ~E~lRTER

~000003£

02 00 XX X8
P

3 LJO t C -~ T !: S A REV C

(S~i

T~~

R~1~J~

~ Al K i? LA ~i ~

10CUM~M1)

87
---------------------~-------------------------~----( 'tUf,)
1-THE

c~c

~ODULE

•LOOlt CH

~LOOlb

__ .. ______ _

--------------------~-------~ -~-------HDL3
---------- ---------- ------------------- --------~----------- ---------~OL4

1~C2

1-1--

MAP/;-.tAO I

-91---··--C> RED

~ED

CME~ORY

CONFIGU~ATION

£RHO~)

1--

101
I t

I I
IC I
I I

--- --I I
I 81
I I

·--

I I
I ~I

soo·r Ru MS

1--

---------~-------------~--~----~--------~--~---------

._,A?/~.AD:

~~~ORY

~AP

AOO~ESS

PRUCES3L? CHlP

= LOO 11

CHI? ~ERFORMS Th~ D~COOI~~ JF AuOR~SS 81IS IO
ARRA!S, D€TECT NX~'S, SIZE ~g~QP! ~ARAY
BOARD POP~LATICNS, AND DETEH1I~~ STA~TI~~ ~ODR~SS GFFSlT.
THE MAP/MAD CHIP ISSIJES NX~ STATUS ON Trl~ C~I, A~O LlGh1S THE

TH~

Y.AP/~AO

ENAB~E ~EMOR1

~ED

LED lF IT DETfCTS

ILLEGAL CONFIG~RA?ION JF ~~hO~Y.

PART NUMBER: 19•14706

BEST DIAG~~STICS: MIC ~ICRO'S ECKAC.EXg
MS750 MACRC ECKAM.EXg
rtOOULE: Ct-!C

C~EVEL

GATE ARRAY: r4AP
MAP

DATA 19--1------------o-4a_c~cK ST~ 19
C:H DA?A 17--2--1 0
0-'6 7-C~lCK STA 23
C~I

o-46-C."!CK s·rA 21

CMl DArA 18--3--1
CMI O'TA 20_4 __ ,
C:1'CF LATC~ lAR--5-0I
Cli1CU illtE~ORY PRESENT-6-ol
22 __ , __ ,
CMI DATA
C":I D.\TA 21--8--1
Ct-ii DATA 23--9--1
I,lTE:FH11AL BUS "1E~ORY PRESE~?T 1-10-ol
F'NGP3 1-11-ol
VGA-12VCC-13-irnEirnAL au.s f'E~ORY PRESE~JT 0-14-o
INTEkl'.AL

F-'IGP3 0-15-o
SlJS ADDRESS 'tiE" S~L2-16-o

I~TgRNAL

BUS

I;-.'fEN;'o,AL
UJ'tERNAL

aus ADDRESS ME~i SELl)-19-o

ADDRESS

~E~

aUS ADDRESS ~E:·t
t!US ADDRESS

o-43-C~CK

0-42-l t~TgH.~ At. 3US '4t..i-'Ot<Y Fr<ESEt.T 1
o-41-1-"'~GPJ 7
o-t;O-Cr~CK STA 19
o-39-I ~JTER!UL eus \ti:.:~C~Y PR ESE' NT 2

--38-GROUi"'O
0-37-l NTEKrlAt. ~U5 A4~:lOl<l f- '°'·ES F: N 'l' 4
0-36-l NTt.;R;~ ~(, (;IJS ¥.t:i1.CR Y PRE.SENT 3

1--35-GROU'fO
I o-34-Fl~GPJ 2

S£L1:.11_0
SEL3-1S-o

to-33-I~l'ER~AL

~us

liE..,Lf<Y FRE:SENT 5

lo-32-FMGP3 5
f O-l1-FNGP3 6
I o-30-Ul"!ER;'J ~L

BUS

~Ej4{0iU'.

ld-20--

I 0_2q_F'ifGP3 4

N-21~-

1--28-N

SELS-22-o
I ~JTERNAL. SUS ADDRESS MEM 5€L4-23-o
l. N 'fEiH,; AL SUS ADDRESS ME:4 SEL6-24-o
INTF.;~NAL

20
17
51'A 22

0-45-ClACK STA
o-44-C?-'CK STA

I o-27-Fi~GP3 3

~E"4

()

1--26-CriCF M~R

~A l'C :i

lo-25-INT~RN~L

B'JS

---------TtUS SIDE

~RESE~T

TOW~~DS

Fii·4·~~RS

01~

30ARO

ADL'RESS

c:r.r SEL7

~E~ORY

T~E MOL
;'~ 0 D{j LE '

DATA

LOU~

Cijl?S

C~IPS

FUlCfIO~ LIKE THE ~OR CHIPS Oi TM! ~IC
-~LL 0 A1' A A ;W A 0 u RE .s.; € s 'r :') l "rn F rt QM

1' !Of e: y p As s

t hf:.

INTERNAL ~iMORl dUSfS. THEY P~uvr~e VA~lOUS Sl~TUS
REGISTE~S CCSR'Sl, 4NO A PATH FU~ THE dOJTST~AP ROMS TG ~E~0RY.

C~I

A~O

4 CHIPS

CHIP

tHT

1
A.tOL 2

<7•'1>
<15-8>
<23•16>
<31-24>

;-.10[,

i'10L 3

MDL 4
PART

NU~~ER:

19•14707

BEST OlAG~OSTICS:
~ODULE:

CMC

SL.IC~

~IC ~ICRG'S
~5750 ~ACHJ

GATE ARRAY:

~CKAC.EXE
ECKA~.EX~

~DL

CL~1EL

THROUG~

~DL Cl THROUGH 4)
CMI DATA 06,14,22,30--1<>-··--·------48-LATCH IAR

C~I

DATA oo,os,16,24-~2<>

lo-47-lNlt F

1<>46-C~I
1<~45-C~l
1<>44-C~I

N,A08,A16,N--3-LATCn KEG 2 ~DL 0,1,2,3--4--

MDL OUTPUT CONTROL 2--5-o
LATCH AUX MA~--6--

•<>42-C~I

A03,A11,A19,CSR 1•7-7--a-~OL OUTPUT CO~TROL 1--9-o
N,AOQ,A17,CS~ 1•25-10-A02,A10,A·1a,cs~ 1•26-11-VGA-12-CIDE~T)~15-0
CIOE~Tl-16-0

A04,A12,A20,CSR 1•28-17-A06.A14,A22,~-19--

A" 7 , A1 s , A2 3 , cs R o- 31-1 9-~05,A13,A21,N-20--

LATCH R~G 1 ~OL 0 1 1,2,3-21-~,MOLl ERR nIT.~OL2 ERR HIT,~-22-RCV DATA 0-23-INTERNAL dUS 0&04,12,20,28 RD-24-0

07,15,23,31

E::~A13L€
OAT~ 05,13,21,29

1<>41-C~I OATA 03,11,19,27
1--40-LATCH ~O~
1<>39-C~I OATA 04.11,20,26
--38-GROUNC
o-37-CSR ~R C?

VCC-13-VGA,~GA,GRNO,GRND
VGA,G~~D,VGA,G~ND

~1,09,17,25

OAT~

1--4l-Cr1I OR

~--1--

N,MDLl ADO HIT,MOL2 ADD HIT,N-14--

DATA 02,10,18,26

04TA

--36-0r<

g;aaL~

0, 1,2, 3

--35-GROUNO

<> o-34-INTERNAL ~us 0007,15,23,31 RD
0806,14,22,30 RD
OBuS,13,21,29 RD
<> 0-31-I~r~~NAL dUS D~OO,OS,18,24 PO
<> o- l O-I iH E rt -~ A\ L a iJ s o & o 1 , c 9 , 1 1 , 2 s Ro
<> 0-~9-I~T~H·•AL ~us Ob03,11,19,27 RC
--28-ROM DATA 3
<> o-27-I~TEH~AL ~US 0~02 RD
--26-RO~ o~r~ 2
<> Cl
--25-RO~ O\TA l

0-33-I~TER~AL

~us

<> Q-32-INTE~~~L

~us

---~------

:tfl::C :

~E~'JRY

ER~J~

CGHRJ::CTICFJ CHl?.:i

Di!:!ECT A•·ZO Ct1RRF.CT ALL SINGLE AI r 1~E~OR1 E~RtJ~S
us I ·~ G T~ c: ·o (•I F' I ,:; D rt A~ ;~ r:··~ G cu :J t. AN u s y'w P. '.) '-1 ~ 8 1 rs ,
Ai.JC Df::TF..:T lJ'1UBLE 91 T E~ROP.S

CU '~CORP. t:CTA 3L E) •

CHIP
MEC 1

2 CJ.f IPS

clT SLICES
<15-0>
<31•16>

'-'EC 2

PlRT ~UMB€R: 19•14705
BEST

DIAG~OSTICS:

~IC MICRO'S ~CKAC.EXE
MS750 MACRO ECKA~.gxg

CLE1~L

MODULE: CMC
MEC LATCH DATA

I~--1--•••••••<>·o-48-INTER~AL-dU5-D810,26
0
<>lo-47-l~TeRNAL-9U5-0BOb,24

OUTPUT BYTEO LOW~ORD,HIGH#ORD--2--1

MEC LATCH OUTPUT--3-ol
lNTERNAL-BUS-DBOS,21 RD--4-ol<>
I~T!R~AL-BUS-0801,17 RD--5-ol<>
.1NTt:RNAL-BUS-CB07, 23 RD--6-o I<>

<>lo-46-INTERNAL-BUS-0815,31 kD
lo-45-~EC LATCH ourPUT
<>1o-44-INTE~N~L-9US-DS12,28

~--1--1

<>lo-42-l~TER1AL-8US-Db13,29 FD
1--41-0UTPUT
1 LO•D,hl~O
<>lo-40-Itt?ER~AL-SUS-D~OS,25 ~c
<>1o-l9-Iur€k~'L-~US-OB1t,27 ~D

srre

RD--8-ol<>
RD--9-of <>
lNTERHAL-BUS-DB00,16 RD-10-ol<>
INTERNAL-BUS-0304,20 RD-11-of <>
'/GA-12--f
VCC-13-lNTERNAL-BUS-0806,22 R0-14-o <>
~,SI~GLE ERROR-15-0

--38-GROUNO
0-3 7-CORriF.CT DISART.E
<>

o-3~-INTeH~AL-dUS-Cb02

RC,f SYND02

--35-GROUNO

~,ERKOR-16-o

P SY~O~OME t,INTL SUS cs r Ro:11_0
P SYNDRO~E01,INTL aus cao1 RD-18-o
~ SY~DkOME04,INTL BUS C9~4 RD-19-o
P SYNORO~E16,INTL Bus C816 kD-20-0
P SY~ORONEOl,!NTL ~us C~02 RD-21-0
P 5y,,0Ro.v.c;32,1NTL BUS C~32 RD-22-o

--34-V~A,HI~JRO aurPUT
--33-LO~wORO Gg~,G~ND

o-32-INXERN~L-dUS_cao1

RJ;,P SY:'4001

<>
<>
<>
<>
<>
<>

VGA,GR~D-23-0

LATCH CB REGISTER,VGA-24-o

<>I o-43-INTe:J:H! AL-1'15-0814, 30 RD

INT~RNAL-8US-DS03,19
l~TER~AL-BUS-0802,18

LO~'ORO

()

o-31-I~TERNA~_gus_ceoa

RD,F SYND09

o-30-lNTER~AL-3US-C816
0-29-lNTER~~L-~Us_ca r

~O,~

0-~8-I~?!R~~L-dUS-C804
o-27-INTER~~L-3J~-CS32

~O,P

--26-LOw~ORO OUTPtlr c~
o-25-P SY~OH04~08,I~TL

BlJS,GRND

---------THIS SIDE TOWARDS

SYNDRO~E.

FI~GERS

aOARJ

SYND16
RC,r SYt\iO T
P o, P

SYN004

s Y.'J n 3 2

bUS CBOR RD

_. M9313 UET

------------------- sc~g
NP~

READ ( IHTI) USING

UET p ~!JG HA 'i 5 - - - - - - - - - - - - - - - - - - - - - - - - - -

~AP

v • FlO? 1, PF'

>>>D/I 37 1
>>>O/W/P F30004 1
>>>D/L/P ~30600 80200009
>>>D/P/L 1000 12345678

....

i·

li~IT

PURGE BOP 1

~bb

~ :

SF.T l!? MAP O,
CAT.a

VALLO,
~00?.E:SS

>>>D/~/P

FFf 460 0

S&-:·1' U? UNIB!JS

>>>v/~/P

FFF464 1

SFT

TEST THE

R~SULTS:

~?~

lVOO

?Ff..).:;. a-

"GO" qzT

>>>E/rt FFF462
Should qet:567a
INCR£~E1T UET ADDRESS REGISTER:
>>>O/w/P FFF460 2
>>>D/w/P FFF464 1

TEST THE SECO~D RESULT:
>>>f•:/W FFr-'462
Should qet:1234

---~------------------------------~------~-~-~--~--~-------~-~-----OTHEN DATA PATHS A~D ~AP FIELDS CA~ B~ U~ED BY SJ~STITJTI~G tHl D~!A
At

IH~

"***" FOR TH~ FOLLO~I~G: BOP2 : 80400008
SDP3 :

8060001)8

DIRECT DP : 80UOOQ08
~-----~--~-------------~------~~---~-~----------~--~~~-~~----------~PR

CDATC or OATOB)

~HITE

A). LOAD A~ORESS REGIST~R F~F460
Bl. LOAD DATA ~EGISTER
~FF462
Cl. LOAD CONTROL REGISTER FFF464 ~ITH T~E FOLLOdlNG:
CR<O>=l
CR<2,1>=DATU or OA1G~ (See Cnart)
CR<4,3>=A17,A1~
(Aidress bits 17 and lb)
~PR

READ (OATI or DATIP)
~). LGAO ADDRESS
8). LOAD CONTROL

R€GIST~R

REGIST~R

fFF460
FFF4b4 WITrl THE

CR<O>=t
CR<2,1>=DATI or OATlP
C~ < 1 , 3 >=A 1 7 , A t o

·r

R E G! s r E ~

A) • L 0 Id)

i) A ~

Bl. LCAC

co~TMOL

t'.:1

::v

1
1

1
•!
1

ii ATI
= :JATI?
=
= J4T'J
= D14T'.;E

" IT~

kE~IST~R

cs~~

FOLLO~ING:

Chart)

C1\ ;j ci r ~ cs s

o i t s 1 7 c: n c t 6 )

's cT ~ j R AJ !) R ~ s ~i

~11~

TH~

c ~ < 11 - ~ .> =i:; i; r_, E: ·" F_ L.

fOLL~~I~~=

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-------------------

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DIAGN·OSTICS

96
OIA~~OSTICS

ANO L~~ELS

r~E SPFC!FIC L~VELS OF
EVNCX O~ ~ICROilCHE.

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DIAG~OSTICS

C~1

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DlAGnOSTIC LEVELS
---~------~~-~--LEVEL 1) RUNS 0NLI~€ ONLY, wITHOUT D!AG.
(UETP, ~RRLOG, SDA ETC.)

LEVEL 2)

SUP€R~ISOR.

RU~S ONLI~E

OR OFFLIMl, UNDER DIAG. SU~E~jISCR.
CuISK FORMATTERS OR DEVICE RELIAotLITY ~TC.)

LEVEL 2R) RUNS

ONLt~€ ONLY, WITH DIAG, SUOE~1I~OR.
CR£STRICT€0 oug TO R~QUIR~D JEVtCE DRIVER

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(MAJORITY Of OIAGNOST!CS FOR R€?ACR LEVEL)
LEVEL 4) RUNS OFFLINE.O~LY, WITHOUT DIAG. SUPERVISOR.
(STANDALONE A~D BOOTAJL~ DIAGN~STtCS)
LEVEL 5)

~ICRO•DIAG~OSTICS

v~s)

OIAG~tnSTICS

9 7 LF.VEL

------------TAPF.: AA)

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EVSBA.EXE
3
HE[,? FILE
EVSaA.HLP
COMF"IG.COM or U&IATT.CO~ CCJ~FIGURAIIG~
FIL.ES F'JR THg 11/750 DIAG~JSTICS)

TAPE #6)

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EVREO.!:XE

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PA~T

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VAX•11 RK611 OIAG.

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LISTED AAOVE APE ONLY r4QSE A~IC~ APPEi~
THESE ARE lHE ~AI~ JIAG10SIICS iCR

GUID~S,

SYSTS~

"PACKAGES".

?e:R!?;iC:KAL DEVIC~S Af'.40
F 0 ·Hr. 1 .-. C. ii 'Ju X A IC~ rJ F' ICY~ •

PUX

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~IJGN~STICS

e: nI?ME~I Cl-\~' eE

-----------~---~-----~----------~-----~------~~-~-~~--~---

DI~G.

COPYING DIAGNOSTIC MEDIA

COPYING THE DIAGNOSTIC MEDIA TO THE SYSTEM DEVICE. THE PROCEDURE
IS EXPLAINED FOR THE 3 POSSIBLE DIAGNOSTIC MEDIA.
NOTE: VERSION 3.X VMS TAKES UP CONSIDERABLY MORE DISK SPACE THAN
PREVIOUS VERSIONS. THERE WILL NOT BE ROOM FOR ALL OF THE
VAX SYSTEM DIAGNOSTICS ON THE PACK. IT IS RECCOMMENDED THAT
YOU BE SELECTIVE OF THE DIAGNOSTICS NEEDED OR PUT ALL DIAGNOSTICS
ON A SEPARATE PACK OR MAGTAPE.
1. TUSS DIAGNOSTIC DISTRIBUTION CRK07 PACKAGE

SYSTEM~

A. IF THE DIAGNOSTIC UPDATE DR DIAGNOSTIC KIT HAS TO
ENTERED INTO THE SYSTEM FROM TU58 CARTRIDGES, THE .
FLX UTILITY MAY BE USED TO ACCOMPLISH THE TRANSFER.
B. PERFORM THE FOLLOWING COMMANDS ONCE THE NEW VMS
SYSTEM HAS BEEN INSTALLED AND BOOTED. LOG INTO THE
SYSTEM MANAGER'S ACCOUNT TO PERFORM THIS PROCEDURE.
C.

$ RUN SYS$SYSTEM!SYSGEN
SYSGEN>CONNECT CONSOLE
SYSGEN>EXIT
$MOUNT CS1!/FOR
$ SET DEF SYS$MAINTENANCE
$ MCR FLX
FLX>IRS=CSl!*·*/RT
FLX>
D. ALL ~HE DIAGNOSTICS AND FILES ON THIS TAPE HAVE BEEN
TRANSFERRED TO THE CSYSMAINTJ DIRECTORY AT THIS POINT.

E. INSERT THE NEXT TAPE AND REPEAT THE FLX> COMMAND
TO COPY THE NEXT TAPE.
FLX> /RS=CS1:*•*/RT
FLX>
F. REPEAT THIS PROCESS UNTIL ALL TAPES HAVE BEEN TRANSFERRED
TO THE CSYSMAINTJ AREA.
G. A CONTROL Y WILL EXIT FROM THE FILEX UTILTY.
FLX>"'Y

100
2. RK07 VAXPAX DIAGNOSTIC DISTRIBUTION <DUAL RK07 PACKAGE.SYSTEMS>
A. MOUNT THE VAXPAX DISK CARTRIDGE IN DRIVE 1.
B. MOUNT THE NEWLY CREATED VMS SYSTEM IN DRIVE O.
C. BOOT THE NEW VMS SYSTEM FROM DRIVE 0 AND LOG INTO
THE SYSTEM MANAGERS ACCOUNT. PERFORM THE FOLLOWING
COMMANDS TO TRANSFER THE VAXPAX DIAGNOSTICS TO THE
SYSTEM DEVICE.
$ MOUNT DMAl: VAXPAX
$ SET DEF SYS$MAINTENANCE
$ COPY DMAl:CSYSMAINTJ*•*;*
$ DIR/FULL DIAGBOOT.EXE,ECSAA.EXE1CONFIG.COM

D. MAKE CERTAIN THAT DIAGBOOT.EXE1 ECSAA.EXE AND CONFIG.COM

ARE CONTIGUOUS DISK FILES. IF THEY ARE NOT COPY THEM
TO THEMSELVES USING THE /CONTIG SWITCH, THEN PURGE
THE OLD VERSIONS OUT OF THE DIRECTORY.
$
$

COPY/CONTIG DIAGBOOT.EXE1ECSAA.EXE,CONFIG.COM
PURGE DIAGBOOT.EXE1ECSAA.EXE,CONFIG.COM

E. THIS COMPLETES THE DIAGNOSTIC TRANSFER TO THE SYSTEM
DEVICE. YOU MAY WISH TO DELETE ANY OF THE DIAGNOSTICS
WHICH RELATE TO THE 11/780 AND 11/730.
· $
$

DELETE ES*•*;*
DELETE EN*•*;*

3. MAGTAPE VAXPAX DIAGNOSTIC DISTRIBUTION <RM03/TS11 OR RM80
PACKAGE SYSTEMS>
A. THIS PROCEDURE WILL TRANSFER THE DIAGNOSTIC MEDIA
FROM THE TS11 MAGTAPE TO THE SYSTEM DEVICE DRAO:.
B. BOOT THE NEWLY CREATED VMS SYSTEM AND LOG INTO THE

SYSTEM MANAGERS ACCOUNT. PERFORM THE FOLLOWING
COMMANDS TO TRANSFER THE MAGTAPE DISTRIBUTION TO THE
CSYSMAINTJ AREA OF THE NEWLY CREATED DISK+
$ MOUNT MSAO: VAXPAX
$ SET DEF SYS$MAINTENANCE
S COPY MSAO:*·*;*

C. THIS WILL TRANSFER ALL THE DIAGNOSTICS ON THE MAGTAPE
TO THE CSYSMAINTJ AREA OF THE NEW DISK.
D. MAKE CERTAIN THAT DIAGBOOT.EXE, ECSAA+EXE AND CONFIG.COM
ARE CONTIGUOUS DISK FILES. IF THEY ARE NOT COPY THEM
TO THEMSELVES USING THE /CONTIG SWITC~, THEN PURGE
THE OLD VERSIONS OUT OF THE DIRECTORY.
S COPY/CONTIG

S PURGE

DIAGBOOT+EXE,ECSAA.EXE~CONFIG.COM

DIAGBOOT~EXE,ECSAA.EXE,CONFIG.COM

E. THIS COMPLETES THE DIAGNOSTIC
DE'..) I CE ~

YD U i·1 i:~ '/ WI SH TD DEL!::: TE

WHICH RELATE TO THE 11/780

A~D

ro THE SYSf[M
d "'( Ci F THE": U r i~; f3 i··.1 C' ~::. ·:· ·;: ::~: ·;:;;
11/730A

TRANSF~P
(·1

101

?1tle: Autosizer
Autaor:
Proeessor Apclicability:·vAx Family
Kave all your VAX 11/780 and 11/750 systems CONFIGURED for ybu_us1ng
£VSBA.EXE released in tne Diagnostic Update rele~se 3. This proqram,
avs1lable after November 1981, will pass conf1;urat1on information
on to the Diagnostic Supervisor. It builds a series of ATTACij commands
base~ on tne hardware it found during its s1z1nq process which is
passed on to tne Supervisor and may be written to tne console load media
for later use. You wilL nolon;er need to build a eonfigurat1on com~and
f11el It •111 be built for youl
P£RTINANT INFORMATION
1.

The program is a level 3 standalone proqra~ that runs under
tne D1aqnost1c su~ervisor.

It requires 256K8 Memory, a Console Terminal and Load Device
in working order.

1•

?he progra~ operates in three modes: Default, Manual, and Selftest.
To select any of these modes type after the OS> prompt:
RUN £VSBA.EXE
RU~ £VSBA.EXE/SECTION:MANUAL
RUN EVSBA.EXE/SECTION:SELFTEST

for Default
for Manual
for Selftest

3.1 Default: In the default mode tne proqram sizes tne system passing
tne configuration information on to the D1agnost1e Supervisor. After
tne execution of the proqra~ this information may be seen by the
operator by typing SHOW DEVICE after the DS> Prompt.
ALWAYS VERIFY this information when ~sinq this mode since the ~roQram
makes educated guesses reguardin9 so~e necessary information. In
particular UNIBUS devices wnicn use f loatinQ addresses for tneir
- Control Status Registers and vectors may be conf 1gured incorrectly
for a particular system. csee EVSBA.DOC for further information)
3.2 Manual: The ~anual option may be executed by typing the fOllow1ng
command after tne DS> prompt: RUN EVSBA.EXE/SECTIO~:MA~UAL
This causes tne ~rogram to Qive the followinq ~rompt: COMMAND?
Legal resoonses to tnis prompt are: ATTACH, CHANGE, EXIT, H~LP,
LIST, READ, SIZE, and wRITE. Explanations of these comman~s
may be read by accessing the program's help file. COS> H EVSBA HELP)
note: You must use an ATTAC~ command to pass tne conf1;urat1on
1nfor~at1on on to the Supervisor after SIZE1nq tne syste~
in tnis ~ode.
Co~~ands

READ and •RITE aceess only the console

~edia.

102
3.3 Selftest: The Selftest option may be executed by tycin~ the followinQ
command atter the OS> prompt: RU~ EVSBA.EX~/SECTIO~:SELFTEST
As in the ~anual mode the COM~AND? p~o~pt ts q1ven. Any manual mode
command is valid. The primary difference between tnese two modes
is that when usinq the SIZE command in tne Selftest mode all t~e
configuration information is shown to the operator on tne console.
4.

rnere is a •QUICK" execution of tne program available ln-all modes.
A .response of SET FLAG QUICK to tne OS> ~rompt prior to ru~n1n; the
program •111 cause it to ignore the presence of terminals connec~e~
to a DZ11. ror systems with a large number of terminals tnis can save
a considerable amount of time and the program will proceed very Quickly.

rne autos1zer can be run from either tne co~sole suosystem or from
tne system diagnostic media. This fact can be useful in situations
wnere mass storage devices are inoperao1e.

recommended sequence of· operation 1s:
1. Boot the Diagnostic Supervisor.

2. OS> SET QUICK

1f auick execution is desired •

. 3. DS> RUN EVSBA/SEC:SELFTEST

4. COMMAND? SIZE

Csizes systent)

s. COMMAND? CHAN~E Conly if configuration information needs cnangel
6.

CO~MAND?

WRITE

C•rites conf1guat1on information to console media)

7. COMMAND? ATTACH (passes conf1guat1on information to Supervisor)
8 •. COM~ANO? EXIT

Cexit from EVSSA back to tne Supervisor)

9. OS> SHOW DEVICE Cto see results of

autos1z~r>

10. OS> C~EAR QUICK (clears the QUICK FLAG)

11. DS> SELECT or DESELECT devices for running desired diagnostic
12.• OS> RUN desired diagnostic

13. To copy CONFIG.COM file created by orogram to [SYSMAINT]

Cassum1ng that you logged into FIELD SERVICE) use tne
FILEX utility atter Booting VMS as follows:
mC. Sy SGFl.-J
S MOU~T/FOR CS1:
Sys ;o t/J> C..ut>JrJ ,-._1 ·~
S MCR FLX
FLX>=CSl:CONFIG.COM/RT
FLX>"Y
S DISMOUNT CSl:

Cb.t.J..So~F

VAX

At.t.acntts

uur-r,.,,..

LINK

---~----

DL11

DWn
DWn
DWn
DWn

DKC11

DWn

DHPU

DWn
DWn
DI.In
DWn
DWn
Sil

AA11K

A011K
C~11

DMR11

DR11B

DR11K
DR11W
DR78Q

DWn
DWn
C"I

DUP11
D'J11
U.f"$J:-

DW7SO
DW780
DW7BO

SBI
SBI

DWn
CMI
SBI
DWn
DWn
TT a
TT a
TT a
TT a
LP a
LP a

DZ11
KA7~0

KA780
KMC11
KW11K

LA34
LA36
LA38

LA120
LA180
LPOS
LPo6·

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LP a
LP a
DWn
SII
RHn
C"I
Sil
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LP2S
LPA11K

MA780
HIE
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"S780
PCL11
RH7SO
RH780
RH780

CM?

SBI
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DMa
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RK06

RK07
· RK611
RL01
RL02

DLa

DL•
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RHn
RHn
RHn
RHn
RHn
RHn
RHn
DY a
DWn
KTa

RLU

RM03
RM05
R"SO
RP04

RPOS
RP06
RP07
RX02
RX211
TElO

. RHn
- -TH03
T"iS~- ------.RHn

TSU

TU4S

..-=ruse "'"'b"~
TU77

TU78
UBE
VTSO
YTS2
UTSS
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DWn
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DWn
Mh

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TT a
TT a
TT a

GENERIC

103

--------

rARAHETERS

?1an
??an
CR a

CSR
CSR

BR
BR

!?a

Xttan
!?a
!?a

CSR
CSR
CSR
CSR
CSR
CSR
TR

X.J•

CSR
CSR

VCT
VCT

,,.
XFn
xv.

DUn
DWn
DUn
TTa

KAn
KAn
X"•n
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TT an
TT an
TT an
TT an
LP an
LP an
LP an
LP a
LP an
I.Pan
LAan
HAn
Hin
HSn
MSn
11·.

RHn
RHn
RHn
DMan
D"•n
Dtta
DLan

-------

VCT
VCT
VCT
VCT
VCT
UCT
VCT
VCT
VCT
VCT

CSR
CSR

X"•
XDan

TYPICAL

----------

BR
BR
BR
BR
BR
BR

BR
BR

770460
770400
777160

230

760050

>C>CX

772410
767770

xxx

3SO

5
6

)()()(

124

775000

BR
3 4 JU UJA>
TR BR
4 4 <•2 UBA>
CSR VCT BR EIA/20ttll 760100 XX>C s EIA
G H TOY WCS ACC
NO NO YES 0 0
·; H wcs ACC
No No o O
CSR UCT BR
CSR VCT JR
710404 XX>C 6

CSR

UCT

CSR YCT BR
TR BR MPM PORT
DRIVE t
BR
TR
CSR YCT JR
BR
TR BR
TR BR

777514

200

770460

l:SO

76-i200

1i'O

5
8 s <RHO>
9 5 <RH1>

CSR

UCT

7774~0

210

CSR

UCT

774400

100

DY a

CSR

UCT

777170

264

MTa

DRIV~

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!>La

DR an
DR an
DR an

DB an
Dian
DB an
DR an
DY an
MT an
KFa
MS an
MT an
DD an
KT an
"Fan
UBan
TT an
TT an
TT an
TT an

CSR

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772520

224

CSR

VCT

776500

>C>CX

)(

CSR

IJCT

Not.tt: The t~~ieal eoluan is onlv a ~ar~ial list
because of the •reat. aaount ot ~os5ibilities
in confisura~ians - these are b~ no aeans anv
sort of standard.
a = Al~h• Character
n • Nuaeric Character

104
SO~E

3ASIC CONSOLE

CJA~A~OS

-~-~---------------~~--~~~-

UNDEP CONSOLE

I/~

>>>

~OOE

>>>E/X/Y (ADDRESS IN

£.XAMINE

rl~X)

P:PHYSICU,.,

9:RYTE

<CR>

w=~llRO

L=LONGtiORD

V:VIRTtJAL
I=IPR CSP~CIFY
G:GPR CSP€CIFY

0£POSIT

>>>D/X/Y (ADDRESS IN HEX) (DATA

UHTIALIZE

>>>I

START

>>>S <ADDRESS>

CONtINlJt:

>>>C

SOOT

>>>8/CFLAGl/(QU~LIFIE~)
SO~E

FLAGS:/1
110

~OM

~ODE

FROM

gNTER

RO~

~ooe

FHO, VMp

CONS~LE

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:OIAG.SUPEkVISO~

/100 :SOLICIT FILE

·ENIER

REGlSIE~
REGIStF.~

~ODE

~A~€

: >>>•p
>>>•o

= S~SYSSSYStE~:SHUTOOW~ or s~tSYSEXE]ShUTOOw~

105
SO~E

COPY C04~ANDS

---~----~---~-----

COPY FROM DISK

FIL~~

(O!FA~LT

DHIV€) IO

ru-s~

-~----~-~-----~-------~-------~---------~---s RUN SYSssisrE~:SYSGEN
NOTE: FlLEX oags NOT USl ANY
SYSGEN>C~N~ECT CONSOLE
CC~TRJLLER COOES, CNLY CCU.
SYSGEN>EXIT
S ~OUNT CSl:/FORElGi
$ SET D£FAUuT CSYSMAINTl
S ~CR i"'LX
FLX>CSl:/RT/ZE

ZERO OUT EXISTI~G DIRECTORY CN

TAP~

(OPTlnt'AL)

FtX>CSl:/RT/LI
LIST Dlk~C?OR1 COPTIO~AL)
FLX>CSt:/RT/XX = Cdevicelfilena~e.ext/RS <CR>
{TO}

(FRO=O

xx = 1.- : I~AGE MODE CEXE,ULB,SML,SYS,JLb,TSK)
DE :
:
FA :
co :

0£LErg THt SPF.CIFIED FIL~
FQPMATTEO Bt~ARY C08J,ST3,qt~,L0i)
iORM4TTEO ASCII CALL OtH~R EXTENSlC~S)
CONTIGUOUS FIL~ TO DISK CFILgs CO~MlNG
FROM DISK TC T4P~ ARE A~~AYS CONTIGUGUS)
RS : RS•11 FOH~AT (SiSTE~)
RT : ~T-11 FOR~AT CTAPE)

Ft.X>"Y

s
TO COPY FROM ruse TO DISK

CR~07)

--------------~----------------S RUN SYSSSYSTF.~:SYSGEN
SYSGEN>CONNECT CONSOLE
SYSGEN>EXIT
S MOUNT CS1:/FORE!G~
S S~T DErAULt CSYS~AINT]
S MCR FLX
FLX>D~O:/RS/CO=CS1:filena~e.ext/~T

{TO)

(FROM}

F"LX> "Y

TO RE3UILD

V~B.EX~

----------------~s A~ E As .~ d tJ v r-: ca P i ? Po c:: r: nuRc: ~ ur
S SET D€F
~C!E:

~H~\

usr~G

COOu ) "'-A 't
:~A~Es

~!LEX

~€

i-•'3ti;:Ai)

.1~·

Lu GI C -~ r.,
~IT~~~

[SY3F.X~]

'l A ·\ C: S •
S~T

Y1UR

U~O~R

VE~SICN

3.) VMS, !i~ Q~VIC~ ~~z~c~ res
v C: ~SI 0 z., 3 • X L I ~ES L CJ G l t;. L

q EC 'JG NI Z C: D SI .~Ci=
0€'11C~

:.j\·n:s.

1n~faUTJ:1ATEY.d

SC • • • T 0 AV·JI r:. U i" r ~ 10 i., \
0~F~ULT

!HE •>t:S!F!.\i'I'1'·J S=>EC.

T~E

c~~R~C!

IJ i J I C r-:

r-tL~x

LCF~~

~-OT

:: ~ R'1 F. S i' C u :· Us T

J[U~CfJRr

~IFST

~r~

~~rr

s s E: r a ~ F' s Ys s ~ Ar ·n;.. n :,c £
S ~C f LX
FLX> csi:/~T=F1Li~A~E.~XT/RS
OR... BE SURE TO USE T;f£ FULL FI L£SPEC AS
f~X>

~:::~>UIREC

BY \I c RS!uN 3

CS1:/~T=OPO:CSYSO.SYSMAI~r]FI~~~A~E.EX1/RS

106
\J
·-

ti';(.·"'
"(

~
t..;.., • C"
l:.- v
, ., ~
~-

107
TO WRITE A BOOTBLOCK ON TAPE OR DISK
$

MCR WRITEBOOT

Tar~et S~stem Devic~ <and bootfile if not VMB.EXE> ••• : DDCU!filename.ext
Enter VBN to Boot File (default is 1> ••• : -1 or 2
Enter Load Address (default is 200)
••• : 10000 or 200 or COOO

DDCU = DEVICE NAME, CONTROLLER ~N~·UNIT t
<CSA1!,DMAO:, ETC.>
LEVEL 4 DIAGNOSTICS AND MONITORS ARE THE ONLY BOOTABLE PROGRAMS
THE VAX 11/750 HAS FOUR BOOTABLE PROGRAMS AT THIS TIME •••
PROGRAM NAME

VBN

ECKAL.EXE
ECSAA.EXE
BOOT58.EXE

-----------EVKAA.EXE

LOAD ADDRESS
200
200
10000

cooo

DESCRIPTION
HARDCORE
TB AND CACHE
DIAGNOSTIC SUPERVISOR
BOOT58 MONITOR

NOTE! TO REBUILD A BOOTBLOCK ON THE SYSTEM DISK, SIMPLY SPECIFY THE
DISK'S NAME CDDCU:> AND STRIKE 3 <CR>'S
NOTE! WHEN USING WRITEBOOT UNDER VERSION 3.X VMS, THE DEVICE MNEMONICS
<DDCU> MAY NOT BE RECOGNIZED SINCE VERSION 3~X LIKES LOGICAL
NAMES INSTEAD OF DEVICE NAMES. so~·· TD AVOID UNKNOWN DEVICE
ERRORS YOU MUST BE SURE TO USE THE CORRECT LOGICAL NAME OR USE
THE LONG DIALOGUE FOR THE DEVICE AND DIRECTORY SPECS.
EXAMPLE!

DRAO:CSYSO.SYSMAINTJFILENAME.EXT

108

REV CON

109
~----~--------------~-------------------~---~-SLOT 4 SECTION d

---------------REVISION 0
.Hd·rIAL JUMPERS

~-----------~---~LR~ w~AP JU~PERS
. 44•4&
51•53

39 •

• 40

41 •

• 42

43 •

45 •

a44

47 •

or~

JUMPERS

50•:>2
!)J-55

S~·t>6

4o•48

A~E

GROUNU PINS

------------PIN
SIT
56
SS

52-54
PUSH

~4,51,52

0
1
2
3
4
5

48
4b

:i
7

4~-~1

57 •

• 58

.59 •

• 60

• 62

•

INSTALLED
IPt< .H. - 00
ALL
=
att
hl)
JUMPER
0
54•56
CrLOAIS
IPR
=
.Rr::rnve:
1
= 01
IPH .:, c: = 02
53-55 (f'LuAIS dlf 1 HI)
REV. 2 = RC:1..\UV t:
RE• I •'i ST A\ LL vUP·1Pi::R 54•56
BIT 0)
I Pk .3 e. = 03
rlArh>14ARE REV'. 3 = REi-tOVE JUkPER 54•5o AND 53•SS
(ft.OATS :H"rS 0 AND l)

ri~ttu..,ARE

REV. 0

JU~-4P~RS

nAriOwARE HEV.

JUM?€~

~A~OICARE

(r;~JUNl)S

~ND

::re.

PUSH

JU~PER

PART

NU~0ER

~!te:

110

B/114?4

U~:!stes,:

. ~·

CSSE
Vw01•1/C:OS
11/750 REVISION CONTROL DOCU~ENT
•o••••••••••••••••••••••••••••••

=========================================================
ICHANGtS IN
UPDATE:
- I
T~IS

f ••••••••••••••••••••••

I
I

• Added eompat1b111ty chart C1.1)
• Adde~ Ker,al ID Register and SID Switch Info Cl.O)
• Revised an~ updated 11750 Kernal Rev ~1story (4.0)
• Rev B and Rev C backplane eomcat1b111ty 1nfo
• Adde~ ~S750•CA me~ory option info C5.2)
• Uodated 1~fo on all options CS.O>

I
I

I
I
I

========================s===========~====================

TABLE OF C:ONTt~TS

----------------1.0

PaQe

I~TRODUC:TION•••••••••••••••••••••••••••••••••

1.1. 11/750 Compatibility Chart

2.0

REVISION CRITERIA•••••••••••••••••••••••••••• 3

30 0

11/750 KERNAL
REVISION CONTROL••••••••••••••• 3
,.

3.1

Kernal ID Re;1ster H/W Rev Level
Input Device (SID Switch Pac~)
1.1.1
1.1.2

3.2
3.3
4.0

SID Reqister Probl~m
~1eroco~e Revision

11/750 KERNAL REVISION HISTORY••••••••••••••• 8

4.1
4.2
4.l
4.4
4,5
4e6

s.a

Electrical Requirements
Installation Procedures

KA750 ~odule Revision Charts
KA750•00 Revision Sununary CL~)
KA750•01 Rev1s1on Summary CVAX7SO•M•0001)
KA750•02 Revision Sufl'rrary CV~X7SO•R•0002)
K.A7S0.,03 Revision . sumr:iery (VAX?SO~R-0_003) .
K1750•38 Rev ls ion Suinmary
..

OPTION -REVISION CO~TROL •••••••••••••••••••••• 15
S.1
5. 2

~S7SO•AA

S.3

RH750

·45 750•CA

S.4

frP7Sn

S.S

KU750

5.6

Oj.1750

5.7

OR7SO

111
INfRODUCTION
~

This document is intended to define the revision nistory of the VAX
11/750 system fe>r purooses of 1dent1fy1r.~ the com~at1ole d1agnost1·c:s,
firmware, and operatin; system software·. (All references to the 11750
aoply to the 11751 as well, unless otherwise noted.>
This document •111 be u~~ated on a quarterly basis and released to
•1crof1che in t~e VAX Library Update and the Speed Bulletin.

The fcllow1n; v~x LIBRARY CARDS •111 be reQu1red as re-fer-ence to the
rev1s1o~ control Dlan. This document •111 state the source of
information necessary for understanding firmware, dia;nost1c, and
system software comoat1b111ty.
INITIAL STARTING DOCUMENTATION
DESCRIPTION

DOCU~ENT

---------------------------------------------------------------------ZZ•EVNDX•W.O
VAX D1a;nostic Index
ZZ•ECCA8•1.0

VAX 111750 Control Store
~1erocode Listing

ZZ•ECOAD•1.0

VAX 11/750 Boot Rom Listing

C:MTOSO
?USB

RK07
RL02
1.1

----------------------·---------------···-----------------------------

11/750 CO~PATIBILITY CHART

--------------------·----?ne
chart
foll~w1n~

sum~arizes

the compatible hardware, software,

t1erocode and d1a;nost1c revision levels for each kernal revision.
ror information concerning the module revisions for eaeh o~t1on revision,
see Section

s.o.

11750 K!:RNAL REV WITH SID I . 00

130/38 I

4X ·I

-·-·····------------------------------------------------------------------11750 KtRNAL REV w/OUT SIDI
00
01
02
03
····--·-------------------------------------------------------------------!Vii J;>t ions:
00
-----------02
01
Kl750
03

- ···-·----~---------------------------------------------------------------..- -- ..
- . -I .
MS750•AA
WS7SO•CA

I
I.
I
I
I

Rtl750

FP7SO
KU7SO
DR4SO

04i7SO

I
. I
I
I
I

01
I
-01 .. I

•.

••

I
I
I
·-1
I .

I
I

----------------------------------------------------------·----------------IV • 7 IV • 7 IV • 7 IV • 7 I
- ·ox: • .....c.. v '" , "'X
l--------------------------------------------·----------·----------------I 2.x
f 2.x
I 2.x 12.X,3 I
I
I
I
--------------------·--------------------------·-----------------------·
I 050
I 052
I 062
I 094
-----------------------------------------------------·---·-----------·
*
Evaluations Cd1striouted 1n tne Soeed BulletJ
i'V"""

•~

~~LEASE:

=~@:< v~x C1a~nost!e
for ~uQs t~at exist 1~

a ~articular diaonostie release.

112
2.~

REVISIO~

CRITERIA

~rcnitectural

or fu~ct1ona1 ehan;es in t~e system must eause a c~ano~

of the kernal revision level. This includes chan;es to ~he ~ardware
that Chanqes performance or O~erat1on Of the system t~at is detectable
to t~e d1a;nost1es and operating system software. Mod1f1cat1ons to
cables, power subsystems, ventilation equipment, or mechanical des1;n
should not cause 1 chan;e to tfte ~ernal rev1s1on level~ tfte VAX 11/750
rev1s1on history for a particular subsystem or·option •11~ be ~esi;•

nated as follows •••

OPTION•XXN

where, OPTION is the f1ve letter neumonie c1.e. KA750), xx is a fun•
tional ehan;e deser1pt1on code c1.e 01), an~ N 1s a non•funetional
chan;e to the option. Non-functional chan;es to an option include
relayout of modules to e11~inate rework w1res or e~an;es to document•
etion that do not affect operation of the system. Chan;es to purchase
part numbers at tne module level snould not cause the ~ar~ware revision
to be ra1~~~ e1th~r. Functional e~anges to any of t~e mo~ules in tne
~ernal subsystem C1.e. KA750 CPU and MS750) incr~ments eac~ module
rev1s1on, as well as the ~ernal revision. A brady marker 1nd1eatinq
the ~odule revision shoul~ be wrapped around tne tn1rd tac down from
tne top of tne mo~ule ~andle. Manufactur1n; •111 be instructed to
attacn the brady markers as soon as possible.
A switch pae~ and PUll up r~sistcr assembly ftas been desi;ne~ and will
installed in all Rev ~c" backplanes shipped from manufaetur1n;. The
switch pack •111 De set by manutaetur1n; before it 1s shipped. An
en;ineerin; spec ~as been written wn1cn eonta1ns instructions as to
now the sw1tc~ pack should be set. This docu~ent •111 be
under £CO control, so that wnen there 1s an ECO that enan;es t~e switch
pack settin; c1.e. a e~an;e to t~e kernal revision), t~e document -111
be tC~d and t~e "ew switch peek sett1nqs added. (See Sect1on 3.1 tor
~ore deta1led information on the s~1tch pae~l.

v~x

11/750 KERNAL REVISION LEVEL

The VAX 11/750 processor has a system 1dent1f1cat1on reQ1ster CSID)
re;ister s1m1liar to the VAX 11/780 croeessor; however, there are
two bas1e differences between t~e VAX 11/750 and VAX 11/780 proeessor
SIO_reQisters. These are •••
• VAX 11/750 SIC does NOT eonta1n the system serial number
• VAX 111750 SID DOES contain a field descr1b1nq current
control store ~icroeede revision. This is
because VAX .11/150 does no~_have-tne FPLA to
intercept £CO'd ~icroeo~e loca~1ons •.
?~e fi;ure 2•1 illustrates the for~at ~f tne VAX 11/750 ·syste~
1dent1f1eat1on re~ister CSID). Tnis req1ster 1s eee~ss1cle to maero
co~e and the console terminal tnrouqh IPR address AX3E. £xam1nat1o~ of

the reqister s~o-s ~ oytes, 3 of ~nien are functional. Tne h1;~ ~yte
is the processor ty~e code byte used by tne d1aqnost1es and ooerating
syste~ to deeide ~hieh tyc@ of proe~ssor t~e sott•are is operating on.
~nown typ! eo~es ~re listed below.

113
?YPE CODE BYTE
00000000
00000001
00000010
00000011

PROCESSOR
undefined
VAX 111790
VAX 11/750
VAX 111730

Byte 2 of the SID re;ister is always.zero. Byte 1 of tne SID register
1s the microcode revision of the control store. This number 1s ;ener•
ated by the eicroproQrammer 1n the REV750.~IC file of tne microcode
11st1n; ECDAB. There is a MICRC2 assem~ler directive called
.sET/~ICROREV=version at tne to~ of t~e paqe which is_~pg..raded for eacn
major assembly of the the microcode. In tne MFPR m1cro1n$truct1on flows
this equate~ value 1s substituted into tne short literal field of the
m1cro1nstruct1on and becomes the m1eroco~e revision tnat appears in
byte 1 oE tne SID register. The number follow1n; ~ICRDREV is DECI~AL.
You must convert t~e hex byte to decimal after exa~1n1n9 the SID re9•
1ster. Byte o of tne SID register is the nardware revision of tne
kernal. rne nard•are revision is pro;ra~mable on tne CPU backplane.
There 1s a 74LS244 tri•state driver on tne UBI module that interfaces
to t~e CPU ~BUS. Tne NFPR m1ero1nstruct1on ~lows read this by~e wnen
referencing the SID reqister. At ~imited Release CLR> this byte snould
be oo. Tnat means all the bits are arounded on t~e CPU backplane. (See
Section
• Electrical Requirements of Kernal Revision Level Input
Device.> Eacn nardware chanqe that changes tne functionality of tn~
hardware •111 INCREMENT the hardware revision by one. The numcer in
byte O of tne SID req1ster is a BINARY revision level ;ro;ra~med on
the SID input device.
SID REGISTER

IPR ADDRESS •x3£

FOR~~T

+-----------~----+---------------+---------------·--------------·+I
00000010

00000000

00110010

00000000

·----------------·----·----------·----------·-·-···--------------+
MUST BE 0
MICROCODE .REV
HARDWARE REV
TYPE COD£ = 2
~~~

~Jrt:

••••
3.1

Tnis example snows tne type code as 2 CVAX 11/750), M1eroeode rev•
1s1on is 32 nex or SO decimal, and the hardware revision level is
equal to zero zero.

Kernal Identification Reqister Hardware Revision Level
Deser1Pt1on

In~ut

The Hardware revision level of the kernal that is visible in
byte o of the SID re;ister is generate~ by a 16 pin DIP
.switebpae( consist1no of-~ s1nqle•oole sin;le•throw switenes
that ;roun~ ~r open SIO bits <7s0> t~ pro~uce a ~!nary nu~ber
c~rres~on~1~; to the ~~rnal rev!s1on·1eve1~ taen ·b1t of eyte
O of tne SIC is pulled uc to +SV through a resistor eontai~e~
in a 14 oin CI? ~u1l•u? Tesistor eacKage.

oev1ee

114
Th~ Kernal Rev Level Inout device 1s manufacture~ us1n; a
. 1.6• X 2.&• standard size f1n;erless b~ar~ that has an e~;e
mounted 40 p1n AMP connector to cress on the backolane of the
system on slot 4. Tnere are 2 ICs on this device, tney are the
DIP sw1tch•paeK assembly and·DIP pull•up resistor pac~aqe.
This SID switch, part number < -???????
> is manufactured
•it!\ shelf 1te:ns listed· below.

Kernel Hardware Rev1s1on Level Input Device Parts List
Qty.

Descr1Pt1on

1
1

40 p1n edqe connector
DIP roc~er•sw1tcn 8 sw
DIP 4.7K terminator
PC board 1.6R X 2.&•
Hous1nq backplane conn

1
1
1

l.1.1

DEC PN
12•11620•00
12•11164•04
13•00005•00
50•15141•00
12•16821•00

Electrical Re~u1rements of the Kernal Revisio9' t,evel Input Device

The ternal revision level 1nput ~eviee requires +sv and ;round to
ocerate prooerly. The input si;nals SYS ID <7:0> H must also be
interfaced to the input device. !he electrical connection is made
· via the 40 P1n A~P connector that is creased on the bae~plane.
?he follow1"o list describes si;nal locations on the backolane
and AMP connector.
A si;nal with a dash •·" implies a no connect
to the 1npu~_device.
s1;na1

A~P

11/750 Bactcplane
40oexx

•

------ID-

G~O

SYS

EE
H~

KJC
M"4

51
53
_55

52
54
56

E
M
K
M
p

cc:

ID 5 K
3· H -_

SYS ID l H

20
22
24

19
21
23
25
27
29
31
33
35
37
39
4,
43
45

. uu

28
30
32
34
36
38

B
0
F

J
L
N

R
T

44
46
48

-sa

Power e~nsu~pti~n with all switc:nes close~ is
42 milliwatts.

AMP Pin

DD
FF
LL
NN

RR
~"TT

v.v

Signal

•

•
•

----•

•

SYS IO 7 H
SYS IO 6 H
SYS ID 4 H

-sys ID 2 H
-sys ID tJ H
+SV

acprox1~ately

equal

115
.1.2

Kernal Revision Level Input Device Installation Procedure
1. Remove primary power
position.

fro~

tne system by turn1nq CB1 to OFF

2. Open rear door of the VlX 11750 and remove the backplane
cover plate by. loosenin; 4 serews •nd 11tt1n; off.
l. Install the Backplane Connector Hous1nq C12•16821) on slot 4
of the CPU bac~~lane so tnat the blind holes at-•aeb end of
the connector cover pins 840017, 840018 on top, an~ 840059
and 840060 ~n the bottom.

4. Set trse binary revision level on the switch to desired number
Csee table two pa;e l> according to the following example •••
Exa,.cle ls for:
SYS ID
SWITCH

<7>
SS
ON

<6>
S7
ON

Hardware revision level 20 Hex
<S>
S6

<4>
SS

<1>
S2

Of'F

<3>

<2>

<'O>

NOTE: Early SID switch modules have the switch pack reversed.
•••• Use etene~ bit position on board for reference. Disregard
switch positions marked on switcn pack.
When tha switch is ON, ;round is connected to the input of
the 74LS244 on the L0004 CUBll module producino a •on data
bit in byte O of tne SID re~ister. If the sw1teh 1s OFF the
current oatn is removed end the inputs to the 74LS244 are
pulled up to ~SY eaus1n; a •1• to be generated 1n tne tnat
bit position.

s. Install tne Kernal Rev Level Input Device in the bacKplane
connector nous1ng wit~ eomoonent side CS1de 1) facing the
r1;nt si~e of the VAX 11750 CPU caD1net Cwnen viewed from
tne rear).

6. Secure oac<~lane cover elate and rear ~oor of tne VAX 11/750
and set tne PO•ER ON ACTION switch to HALT. Turn CB1 to tne
o~ pos1t1ori.
7. Verify t~e nard~are revision level by examining tne SID reg•
ister 1~ console mode by ty~ing ••• Cat t~e console)
>>>£/I lE<CR>
-I 0000003£

0200lE20

This nam~le shows a ·Ker~al t!'lat has c~T062 mi~roeode and
.a tiar~ware rev1s1~1"\ of ·20 •. -(See Tables 1 and· 2 .on next paqel.

116
The follow1nq diaqram show what tne switch oac~ actually looks
liceJ tne section containin9 the bits tnat ~ust be set 1s
depicted 1~ a larqer scale at tne r1ont.
REG BIT POSITIO~

+-·--------------+
SYS ID

+•I
I •A

I -c
I •E
I
I
I
I
I
I
I
I

76543210

·---·····+
1123456781

-- +·-------+.
-- +--------+
-- ·--------·
-uu +·-------·+
1111111111

5415142
5015141A

I DIGITAL I

6 ··5

<• ETCHED ON BOARD

0
f' I 1

·----------------------···
2 3 4 S 6 7 8 I<• SWITCH NUMBER
r l••••••••••••••••••••••••I
STAMPED ON
II II II II II II II II II
II II II 11 II II II II II
II II 11 II II II II 11 II

-5 wI_T CH • Pl K

·------------------------+
OFF : 1

IRES PAK
~·----···--+

+•II SIDE 1
·----------------+
TABLE 1
Ident1f 1er Field

TABLE 2
Hardware Revision Identifier

xxxxyyyy
--------------------------

·-···--------------------·-·
nnnnrrrr
00000000 = Kernal Rev 00 I
00010000 10 I
- Kernel Rev
00100000
Rev 20

M1croeo~e

CM TOSO
-• -== CMT062

00110000
30
00110010
32
00111110 • 3£
01011110 s SE

3.2

SI~

C'4TOS2

C!-tT09.4

• JCernal
I
00110000 • Kernel Rev 30 . I
00111000
Kernal Rev 38 I

Tne ~urrent des1;n of tne SID re;ist~r hardware revision byte o, nas
an 8 bit 74LS244 tri•state driver cnip interfaced to tne cae~plane. Tne
enip inputs are not inverted 1n tne driver and are not pulled u~ eitner.
so tne resultant data w1tn SID register byte O not proqrammed 1s FF.
s1nee tne inputs just wi1oats" at ti~es tne output may not always be rr
Tnis is a problem wnen runninq the DIAGNOSTIC SUPERVISOR. Tne super•
visor "for;ets" w~ere it came from and tne progra~ data must be enter•
ed manually to ;et tne supervisor to "reme~ber" wntre it came from.
This is time consuming, esoecially if tne field engineer ~ust power the
•acn1ne up and down to replace modules. Tne result is tne MTTR 1s ex•
tended ·to reoair tne aach1ne. The .re91ster must be •ired HI or LO, but
•1r1n9 the t'>it1 HI. is anotner pr.oclem. Tne CPU power sup~ly :nust be
conneete~ to tne en1p 1ncuts ~1r~ctly. If the 74LS244 fails by s~crtin;
t~e input pin to ;ro~nd, ho~efully the cni? will burn o~e~, but if not,
otner damag@ could result. There snould be a pulled up +sv t~rou~n a
1K resistor to S!v~ral u~used bae~~la~e pins. T~e SID re;1ster swite~
pae~ and ~ull·u~ asse~oly attae~es across slots 3 a~d 4 S!Ction B of
tne bae~?lane. 3aeK plane ~ins will ~rotrude tnrou;~ t~e PC board an~
o1ns ~se~ -111 htve a fe~ale socket t~at is easily ;raspe~ ~it~ a
seope t>r~oe.

3. J

• ·

117

.Microcode Revision History

A co~orenens1ve revision n1story of VAX 11/750 microcode 1s contained
· in the microcode 11st1n; in the VAX LIBRARY fiche set. Revision w of
the VAX LIBRARY contains the microcode 11st1n; for control store ver•
s1on CMTOSO. Since there have been numerous ehan;es to the microcode
since version C~TOSO, 1t is su;;ested that you read the.microcode rev•
1s1on history contained in the REV750.~1C file of the microcode list•
in;. Chan;es to the VAX 111750 microcode AFTER CMT062 will be described
briefly in tnis ~ocument and •hat the symotoms and corrective actions
were.
4.0

11/750 KERNlL REVISION HISTORY

------------------------------

Listed below 1s tne revision history of the 11750 kernal,· 1ndicat1ng
the compatible •odule revisions for each hardware revision.
•odule revisions are separate~ by commas.

Equivalent

This history nas been separated into two charts:
Cnart 1 • 111750 ~ith a Rev "~" backplane
SID Sw1tcn S~ttin;
xxxxxxx0•7

Cnart 2 • 11/150 with a Rev •en backplane
SID Switch Sett1n; s xxxxxxxe•F
KA750 Module Revision Charts
11750 KERNAL REV WITH SID I

-------

CHART 1
00

·-·-----------------------·-----------·-----------------------·------11750 KERNAL REV w/OUT SIDI 00
01
02
03
·1
======================================================================
SLOT
---·---------------------·-------------·-----------------------------I C
I C,D
I B
L0002
2
I C:
-------·-·-----------------·-----------------------------------------B
C,D
c
I c,o
L0003
3
·--·-----------------------------------------------------------------r
H,J
H.J
4
I E
L0004
---·-----------------------------------------------------------------s
£
H
I D
LOO OS
F
---------------------------------------------------------------------D
0
D
0
10
L0011
---------------------------------------------------------------------•,A
•,A
•,A
10
L0016
---------------------------------------------------------------------I C
.I C
I C
I C
11•18
M972ta
r
----------------------------------------------------------·----------A
A,B
28 "A•B _
A,B
fl'9313
---------------------------------------------------------------------1 P"
r
TUSB
--------------------------------------------------·------------------s
e
B
C:JN
TU59
---------------------------------------------------------------------c
c
c
I C
---------------------------------------------------------------------A
--------------·---------·--------------------------------------------* = LR Release
.

M~DULE

118

-------

CHART 2
11750 KERNAL REV

~ITH

SID

---------·---------------------------------------·-------------------11750 KERNlL REV W/OUT SIDI 00.
03
02
. 01
======================================================================
MODULE
St.OT
---------------------------------------------------------~-----------c,o
L0002
8
c:
2
c:

---------------------------------··-------------·---------------···--L0003
c:,o
C,D
3.
I C
,
---------------------------------------------------------------------H,J
t.0004
4
E
-----------------------------·---------------------------------------LOO OS
E
H
5
D
r
--------------------------------------··-----------------------------N/A
D
L0011
D
10
D
--------~------------------------------------·-·---------------------E.0016
10
•,A
•,A
---------------------------------------------------------------------M8728
c
c:
c
c

-----------------------------------------------------------------·-·-N/A
N/A
NIA
NIA
M87SO
---------------------------------------------------------------------A,B
l
.I A
M~313

-·-------------------------------------------------------------------B
8
B
TU58
B
-------·----------····-----------------------·-----------------------c
c
c
CONT
c
co~

PA~EL

BACKPLANE

The L0011 or t~e L0016 controllers are valid for hardware revision
00,01 C10) and 02 C20): nowever, the~e revisions •111 not suoport tne
~S7SO•CA me~orv ootion.
The minimum aeeeotable revision for 1ne1usion
of the ~S7SO•CA 1s hardware Rev 48. see ~S750•CA option cnart (Section
s.2) for require~ents.
4.2

RtVISlO~

KA750•00

SUM~ARY

------------------------•

This 1s tne initial 1ntro~uet1on cf revision control on tne
11750 and represents the ~1nimum module revision levels at FCS :Oetooer 199 o.
--

~omoati~li Re~is1on Lev~lsi

version at FCS

•

Microcod~

•

VlX/V~S

•

01~;nost1cs

- c~roso.

version at FCS • 2.0 •

=~rrent
t~e VAX
•--~-

01a~nost1e Release is v.
Pefer to EV~D~ an~
01aqnostie Evaluations tor eaeh 01agnost1: re•

,_,..,..

c ........ ..:

c .. 1,0~•~.-'

,,..,.

.-""~!'"l~••lo\~,4~u

'""~"·H••i.,.,..c:_

·119
• ·

Qu1e~

>>>£/I 3£

Cheek •

0000003£

02003200

>>>

SID Re;ister Switcn Paek Sett1n; • Set bits o to 7 to the
O~ position (See.~elowl
7
0
F

<••

REG BIT POSITION
ETCHED ON BOARD

+------------------------+
I 1 2 J 4 5 6 7 8 I<•• SwITCH NUMBER STAMPED

F l••••••••••••••••••••••••I

SWITCH PACK

1101101101101101101101101 I
I INI INI INI INI INI INI INI INI I

4.3

+------------------------+

KA750•0l/Kl750•10 R£VISION SU~MARY

---------------------------------* This .represents
FCC • be;an ShippinQ from
VAX7S0·~·0001

manufaetur1n; 12/,/80.

F1eld

1mpl~mentat1on

beoen 3/81.

This rco combines a microcode chanQe and a hardware cnanqe
to tne ~0003, L0004, and LOOOS Modules. Tne CPU backplane is
also mod1f1e~. The followinq ECOs are incorporated •••
L0003•TW001
L0004•TW003
LOOOS•TW002
70•16486•TW001

This FCC was 1mp~emented to 1nn1b1t the possible interruption
of an instruction that ref erenees the Unibus address spaee
performing a DATIP. If tne 1nstruet1on is faulted because of
a TB miss and external interrupts are pendin;, the Unibus is
hunq until the OATOB 1s done after t~e microcode co~pletes the
translatio~. The fOllow1n; 1nstruet1on would cause this pas•
s1ble eonf l1et:
AD0~3

112, physical translation to '1•xrrrr20

Part of tn1s rec also conneets so~e si;nals from the CPU
to the YPA (slot 1 to slot 2) for FPA 1nterfae1n~ and also
tne drawing set of the FPA is modified for si;nal nam~ eont1n•
utty.
•

Comcatible Revision Levels:

•

"M1croco1e - C!i'T052 ·

•

VAX/V~S

Version 2.2 •

b~¢kwar~s

eom~at1ble ~~

2.0

1.20
•

D1a;nost1c:s
Current EVNDX release is w. The follow1n; d1a~nos%1c
compatibility problems have been identified:

£CKAX - Test fails MACHINE CHECK TEST i·with optional
· ~cs module installed. D1a~nost1c Bu;.
EYKAS • Interm1ttant failures on the CVTPL and other
1nstruet1ons. Absence of post•process CLKX
bit?
-ECKAC • 4.0 or hi;her w111 fail test 7C if this
is m1ss1n;.
ECKA~ • 1.2 fails w1tn 8 array boards present.

rec

Refer to £VNDX and the v•x Dia;nost1c Evaluations for each
D1aq~ost1e release (see Speed Bulletins> for
1nco~~at1b111t1es.

Quick Cheek •
A.

>>>Ell lE
I

0000003£

02003401

(W/OUt SID)

0000003£

02003410

(with SID)

)))

>>>

a. Inspect ~0003 module and look for a 7427 in chi~

position £1. Also inspect the backplane assembly ~
look for a wire from 1ooe1o·to 200810 CMEM STALL~

•

SID Re;1ster Switch Paek Settin; • Set bits o to 3 and

5 to 7 to the ON position:
set bit 4 to orr position

<••

REG BIT POSITION
ETCHED ON BOARO

+----------·-----------·-+

0F I 1 2 3 4 5 6 1 8 I<•• . SwITCH NUMS~R STAMPED
F l••••••••••••••••••••••••I
ON SWITCH PACK
11011011:>11011011011011011
I INI nu INI IFI l!U INI INI ltJI I

11 11 11

llFll

11 II II fl

+------------------------+

COFF' : 1)

121
KA7S0•02/KA750•20 REVISION SUMMARr

---------------------------------*

This represents VAX750·~·0002 FCC.
Field 1~ple~entat1on beQan 6/81,

•

Th1s rec corrects a lar;e collection of problems 1n the micro•
code and hardware. The fo11ow1n9 £Cos are incorporate~. There
·1s the poss1b111ty of Unexepected System service Exceptions
caused by tne CON ;ate array t~at 1& fixed •1th -the~ECD to
L0004 •odule.

~f~.

began sh1pp1nQ 3/30/81.

LOOOS·T~003
L0004•?~004

Some systems in tne field may ~ave L0004 ECO without the LOOOS
ECO wnen the FCO is implemented,
•

Compatible Revision Levels:

•

Microcode • CMT062 Creplaces CMT052). Refer to REV7SO.~IC
file for a list of all fixes to tne m1e:oeode.

•

VAX/V~S

•

D1a;nost1cs

Version 2,2 • backwards compatible to 2.0

Current £VNDX Release is Y. The follow1n; problems
exist in the upqrade to C~T062 as far as d1aonost1cs

are concerned:

>£CKAL 2.0 Fails at PC s~oorrF1?
K1eroeode ehan~e makes 1t impossible to
foree a TB M1ss in bot~ ;roups of the TB,
D1a;nost1e attempted to read and write the
TBOR wh1cn now causes a reserved o~erand
fault.
£CKAX 1.2 to 3.2
rails at TEST 1. The d1a;nost1e expects
a reserved ocerand fault wnen aeeessin;
IPR •xJr and it does not occur. Tnis is
because of the addition of the .IPR •xJE
wh1eh 1s called TBCHK. It allows the pro•
qra~mer to ~robe the TB at a VA a~d then
branch on the state of the PSL VBir in•
d1cat1n9 a TB ~it, D1a;nost1e ou;.
~CKAX

1.2 ~o 3.2
Fails at T£ST 7 with ~ptional KU750 mod•
ule. 01aqnost1c forces a machine e~ee~ in
·a wcs loeatio~ •1th b8d p~r1ty. Dia;nos•
tic bu9.

ECKA~

1.2
D1a;nost1c do~s not ~or~ prooerly ~ne~
tnere are 8 ar~ay boarjs 1~stalled, Dees
not re~ort eorre~taole errors :~rrectly.

-122
Refer to EVNOX and tne VAX D1aqnost1c Evaluations for
eaeh Diaanostic rele~se Csee Spee~ Bulletins> for
1~eo•pat1o111t1es.

•

Q9ick Check• >>>Ell lE·
I

·0000003E'

02003£02 CW/out sr11tenl

0000003E

02003£20 (W1tn Switch)

>>>
>>>

SID Sw1te~ Sett1nq •
Set SID register switch bit 0 to 4, 6 and 7 to ON position
Set SID reo1ster sw1ten bit 5 to OFF position. (See below)

<••

+------------------------+
2 3 4 S 6 7 8

0F I ~

I<•~

F l••••••••••••••••••••••••I
I 101101 IOI IOI IOI IOI IOI IOI I
I fNI INI IFI l~t lt:l INI INI INI I
II

II llFll II II II II II

REG BIT POSITION
ETCH£D ON BOARD
SWITCH NUMBER STAMPED
CN SWITCH PACK

corr = 1>

·------------------------·
4.S

·Kl750•03/KA750•30 REVISION SUHMARY

---------------------------------•

This reoresents VAX7SO•R•0003 FCC. ~f;. began sh1op1n9 2/22/821
field 1~ple~entat1on be;an January 1982.

•

Tn1s

re~

15 based on ECO LOOOS•TWOOS

L0004•TW004

and eorrec:ts 1 nterf aee ~rob 1 ems. wi tn the float in9 po 1T'\t
aeeelerator FP750 w~1en beqan sh1?P1~Q Jan•19A2.

Also, the layered software product DB~S must have tnis rec
in order to operate correctly. This product •111 report
to ooerator if the system dQes not nave this ECO installed.
•

Compatible Revision levels:

•
•

~1crocode

- V lX/V"15

•

C~T094 re~laees
REViSO.~IC file
the !!t1c~ocode.

CMT052 or CMT062. Refer to
for a list of all fixes to

- Current version 1s 2.4 and is
ee~patible to 2.0.

oaeK~ards

1.23
D1a;nost1c:s

•

Current EVNDX release is 3.o. Refer to EVNDX and ~he
VAX Diagnostic Evaluatio~s for eacn Diagnostic
release Csee Speed Bulletins> for 1neompat1b111t1es.
•

Quiek Check •
Examine

t~e

SID register in console mode.

>>>E/I lE
I OOOOOOlE

02005£03

>>>

02005£30

I 0000003£

inspect tne LOOOS module for an IC in loeat1on E27 with the
part ~umber q32r1.
•

SID·Switen Setting
Set switeb bit positions o to 3, 6 and 7 to the ON position
Set sw1tc:n bit positions 4 and s to tne orr position

2. 1

+··-··-··-·--------------+

REG BIT POSITION
ETCHED ON BOARD

<••

0F I 1 2 3 4 S 6 7 8 I<••
F l••••••••••••••••••••••••I

SWITCH NUMBER STAMPED
ON SWITCH PACK

11011011011011011011011011

I INI INI IP-I IP'I INI INI l~f INI I
I I I I I I r I I F" I I I I I I I I I I

+·-----------------------+

cerr= 1)

124

Kl750•38 REVISION su~~ARY

-------------------------

This represents VAX EC~ 7016486•TW002, which brin;s tne
backplane rev to c. Manufacturino ~e;an sh1po1nq 6/1182.
This ECO ~oes not increa~e the hardware revision on t~e
tcernal.

•

ECO was done to expand t~e backplane address1n; capaD111t1es
to support tne optional 1 meoebyte •emery ~rray system.

•

SYS ID Switen has been installed by manufacturin; on all Rev C
backplanes, Tn1s switch identifies both the kernal rev and
the backplane-addressing capaDil1t1es.
Rev C bac~plane • last two hex di;its will be reversed
wnen the SID switch 11 1nstalle~. Last
d1;1t ls use~ to indicate tne backplane rev.
C1.e. 8
C bac~planeJ 0
B backplane~

Set ·sw1tcn bit positions o to 2, 6 and 7 to· the ON position.
Set switch oit positions 3 to S to tne OFF position.
7

REG BIT POSITION
<•• ETCHED ON BOARD

+------------------------+
2 .3 4 5 6 7 8 t <•• . SWITCH NUMBER STAMPED

0F I 1

F l•••••••••••••••••··~··••I
I IOI 101101 IOI IDI 1011011011
11~1 INI IFI IFI IFI INUHI INI I
II II llf'I lf'l IFll 11 II II

DH SWITCH PACK
COFF= 1)

·------------------------+
S.~

OPTION REVISIO, CONTROL

-----------------------

Tne o~tlon interf~ees and ada~tors will nave a separate revision
history fro~ the CPU. Tne KA750 CPU Kernal subsystem will
include tne follow1n; 1nteoral subsystt~s.

·--------------------------------------------------------------10•16486
CPU Backplane
CPU
KA750
•
Ase~cly

L0002
L0003
L0004
LOO OS
TUS8•XA

54.,13489
M9313 .

L0011

M8728
11\5750·=~

rt:odule
~IC Module
UBI "4odule
CCS Module
Tape Drive Unit
TUSB Tape Controller Unit
UET. Unibus Terminator/
Exerciser
C:t.4C "1odule
256KB ~rray board
DP'I.

t.0016
M8750

Controll~r

M8728

256KS array

1~3

arrav boar~
boar~

----------------------------------------------------------------

1.25
DFTI':lN

RH750

~BA

L0007

Module

------------------------------------------·------------Add on
board
KU7SO•YG
-------------------------------------------------------LOOl)1
FPA
FP750
-------------------------------------------------------DW750
L0010
2nd Unibus Module
-------------------------------------------------------DR7SO
L0014
Interprocessor I/F Module
-------------------------------------------------·--·----------54138~5-C

dauq~ter

~odule

The internal options of tne 11750, •1th the exception of the
MS750•AA and MS750•CA, •ill be trae~ed at the unit revision level
only. This •eans that a functional cnenge to t~e RH7SO, OW7SO,
FP7SO and KU750 •111 not increment the kernal revision level.
Each option revision summary •111 indicate any hardware, operat1no
system, d1a;nost1c and microcode constraints. The opt1o~ w111 bt

considered compatible with the kernal hardware, v~s and m1cro~ode
revisions used during the develop~ent of tne option. Earlier
compatible revisions will be noted only if they nave been tested
and proven to wor~.
Pertinent d1a;nost1cs to be run for each option (and tne requir~d
revision, if any> •111 also be noted.
OPTION REVISIO~ DESCRIPTION

MS750•AA

--------------------------------------·
MS7SO•AA Revision

I .
----------------------------------------------------·------------.oDULE
SL:IT ·
----------------------------------------------------------------L0011
10
I D
I O
--------------------------------------------·-·-----------------I NIA
L0016
10
I A
----------------·-------------------·--·------------------------"18728
I C
I C
' 11·1~
----------------------------------------------------------------BACKPLANE
I B
I C
----------------------------------------------------------------1.

70•16~86

~S750AA•OO

REVISION

su~~ARY

--------------------------•

Creation oate is October 1980.

•

This ·1s the· initial _1ntroduc:t1on of revision control on the

MS7S~·AA

res.

•

and

rt~r~sents

the min!mu~ ~odule revision levels at

Note tnat o"lY L0011 me~ory controllers sh1ooed at FCS.
~ote
that the L0016 controller, whieh will support botn the ~8728 and
the ne~ ~8275~ me~ory arrays e~d ~jll be availaole in 01FY83,

can

als~

use~

in a ~ev 00

~acn1r.e.

126
•

Shortly after res, VAX750•H•0001 was ~one Which increased tne
Rev of tne baCKPlane fro~ l to B. Only 27 machines were sh1poed
•1th "A" bac~Planes.

MS750AA•01 REVISION SUMMARY

--------------------------•

•
•

Creation date July 82.

New revision of t~e backplane 1s introduced to 1ncrea~e the

address1n; capabilities,

The L0016 1s not valid for Revision 01 • that co~b1nat1on CL0016
and Rev C bactolanel is a new option desi;nation • ~S7SO•CA CSee

belo•>.

5,2

•

Tne M87SO me~ory array will not function in an MS750~AA option
confi;urat1on.

•

D1aqnost1es • ECKAC and ECKA~ •. Run !CKAC f1rst; run ECKAM in
QUICK VERIFY mode.

MS7SO•CA

OPTION REVISION DESCRIPTION

---------------------------------------

,MS7SO•CA Revision

----------------------------------------------------------------MODULE
I A
----------------------------------------·-----------------------L0016
10
----------------------------------------------------------------M8728
I 11•18
I C
···---------------------------------------------------·----------I A
I 11•18
.I
---------------------------------------------------------------BlCKPLAN£ 70•164!6 I C
----------------------------------------------------------------S~OT

~9750

MS7SOCA•OO

R~VISION

SUM~ARY

-------------···------------•

Creation date • projected Auqust 1982.

•

This is t~e 1n1tial introduction of rev1s1on control for t~e
MS7SO•CA and represents t~e minimum revision levels required
for FCS af t~is o~tion • July 1982.

·•

Not~

•

Any

that the L001J cannot b~ used 1n thi.s
~1xture

~87~0

arr3ys

eo~troll!r,

o~t1on •.

and ~8750 arrays ~111 function: nc~ever,
oeeup-y the slots adjacent to t~@ L0016
starting w1tn slot 11.

~8729

~ust

127
This option requires

•

Minimum 11750 ~ernal rev to

Diagnostics - ECKAC Cm1n. rev. 6.2) - EVNDX 7.0
ECKAM Cm1n. rev. 2.4)
•
Run ECKAC first: run

5.3

v 3.o or ~i;her.

RH7SO

v~s

ECKA~

su~port

this oPt1on is 48.
CJ~ly

1982)

in QUICK.VERIFY mode.

OPTION REVISION DESCRIPTION

··---------·-----------------------·-------·-··--------------------------·-·-·-------·-·-----------00
04
RK750 Revision
02
03
OS
01
-------------------------------------------------------·--------MODULE
SLOT
··------------~------------------------------------------·------L0007
I 7,8 or 9 I A
I A1,B I

------·------------·--------------------------------------------RH750•00

REVISION

su~~ARY

-------------------------•

Creation date is FCS • April 1981.

•

T~is

•

Diaqnost1es •

recresents the 1n1t1al introduction of revision control
for t~e-RH750 and represents the minimum revision level for
t~e ~0007 ~odule at res.

RH750•01

ECC~A

and EVRAA.

REVISION SUMMARY

-------------------------•

ereatio" ~ate is October, 1981.

•

Represents RH750·~-0001 FCO, w~ieh consisted of ECO L0007•TW002
to fix tne ?roblem of data lates on ~ultiole MASSSUS systems.
Replace 23•909A9 at location £12 •it~ 23•969A9.

•

rco done on "C" etcn ~odules only. Eteh Rev1s1on "0", Module
Rev •e" is a relayeut ot tne L0007 module and 1s equivalent to
Etch Rev "C", Module Rev "A1".

•

Dia;~osties

- tCCAA and EVRAA.

128
S.4

FP750

OPTION REVISION DESCRIPTION

----·------------·----------------------------------------------00
FP7SO Revision
01
03
04
OS I .
02
----------------··----------------------------·-·---------------St.OT
---------------·--------~--------------·-L0001
B
I C
1

----- --- -------- --------

---------··------·--------·-----------·------------------··-----FP750•00

REVISION SUMMARY

--------------------------•

Creation ~ate is FCS • December 1981. T~1s represents the
minimum module revision level required at res.

•

11750 kernal rev ~ust be at Rev 3 CRev 94 mtc:roc:ode reauired).

•

Dia;nosties • ECKAB c1111n. rev. 7. 2)
ESCAA Cm1n. rev. 6.4>
EVICAB C"'1n. rev. 2.5)
EVKAC Cmin. rev. 4.0>

• EVNOX 4.0 (Jan 1982)

•
•
•

"..
"

FP7S0•01
REVISI~N SU~MARY
G••••e•••••••••••••••••••••

s.s

•

Creation date is Marc~ 1981.

•

Represents rP7SO•R•0001 rco cons1st1nq of ECO L0001•TW002, which
fixes the problem of the FPA not powering up "enable~" due to
incomplete 1n1t1al1zat1on of e1rcu1try.

•

D1ac;nost1c:s • E:CKAB
ES CAA
EVKAB
EVKAC

KU750

(m1n. rev. 7.2)
Cnt1n. rev. 6.4)
Ctnln. rev. 2.5)
Cmin. rev. 4.0)

- £VNOX 4.0 (Jan 1982)
"

"
"

OPTIOh REVISION DESCRIPTION

·-----------------------------·------------------------------------------------------------------01
03
05
02
04
KU750 Revision
----------------------------------------------------------------SLOT
MODULE
------------·-------------------------------·-----·-------------t
.. I .
-S41386S•C•
I
f
0(\

attae~es

-: Ito LOOOS

I-

. -I

•••••••••••••••••••••••••••••e••~•••••••••••••••-••••••••••••••-•
:.

129
t<t750•00

REVISION SUMP-.ARY

·--------------------------

s.s

•

Creation date is FCS • Maren 82.

•

Tn!s represents the minimum module revision level required
at rc:s.

Requires KU780•YG microcode rev at 2.0 or hi;ner.

•

Dlaqnostlc • ECKAX • 11750 Cluster Exerciser • EVNDX 7~0 (July 82l
(minimum rev 3.4)

Dw750

OPTION REVISIO~ DESCRIPTION

---------------------------------·
----------------------------------------------------------------DW750 Revision·
I_ 04
00
01
02
03
OS • I
--------~------------------------------·---------·--------------MODULE
SLOT

----------------------------------------------------------------L0010
?
----------------------------------------------------------------DW750•00

REVISION SUMMARY

··------------------------

5.7

•

FCS seheduled for September 1982.

•

11750 kernal rev must be 30/38 or hi;her.

•

Requires Version 3.0 or ni;her.

•

Diagnostics • ECSAA • min. rev 6.4 • EVNDX Release 4.0 (Jan 82)
ECCSA • min. rev 1.3·

DR7SO

OPTION REVISION DESCRIPTION

----------------------------------------------------------------00
02
04
01
DR7SO Revision
OS
----------------------------------------------------------------SLOT
A40DULE
---------------------------------------------------------------·?
t.0014
----------------------------------------------------------------'

FCS schedule~ ~or September 1982.

•

11750 ~ernal

•

Requ1r!s vus Version 3.0 •

Dia;nost1es

r~v

must be 40/48 or

-Evnrt:; -- rev
- rev

EVDF'O
EVDF'E

EVOFF

rev 1.0

•

1. 0

£C:OF"B

rev 1.0

ECS~I.

~in

hi;~er~

EVN DX

Rev 1.0
rev 1.0
rev ! • 0

EC!)F'A

•

E.7

P~lease

1.0 CJuly 62)

130
POWER REF

.'2

+1S

-ts ..SB

J2-

J1-

J3-

-J1

OPTION SLOT BUS GRANTS
TO SELECT

ltEMOYE JUWER

IG~

AOOX 17
MIOX.
73

IGS
IGI
IG7
X-SLOT7.l.I

AOQX

AOOX 77

c::::=====================:EI
~

~·$ ~ £ ·~
c=========================::!l
2

•

TIST POINTS
ROM ti
ROM Z3
ltDM Z3
DN 17
ON 17
DN 17

MATCH PUl.SE
SA CLOCK
SAST/P
MCl.OCK
IASECLOCIC
ICLOCIC
MEMSTALL

MIC Ot
ON 17

PHASE 1

OXll&t
CDOl73
COOl75
ll002QI

AG0273
IODZOI
llDCl210
AGCl5IO

HARDWARE REY LIYil.

ISYSIDI

"N •

SIT

IODotll
IGCM ~

2
3

IOOt5'

llDC~
IOO&SO
IOO&&t

CONSOLE BAUD RATE

CONIA
RATE

300

eoo

0
0

1:1

1200
2&00
3llOO

,, ,

0
0
0
1

•

,
0
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19200
38.tOO

,
,, -

0
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0

, I ,

! C0064~ I ~ I Ctl06'9 ! C006$l

PIN•

JUMPER
TOGND

COOM3

OPTION SLOTS

CCIOl5&4

I.CL

J3-

C006S1

CD0852

J3Ti1.cc·.. iii
't..!..l.!1
UJ TOY
J'.:s,.

VAX-11/750 Backplane Decal

'31

--·;--.

~~~ l.:~f"
~

in~-

....,,

131
----------------~-SEC!ION A Qf

O£Sl~EU

SLOT

---·--------------------~
---------~~-------------eu~
eHU::.~4

GRANT J•H-iPC:RS SLIOTS 7, 9, 9 OF THt: £X!E,·-Ot:O ;ir::X St:CT lCitt

Ai>t OPTlON IS

ttHEr.. l1~Sl'ALLliW A:S

~QT

J:;,SfALLED. IN A SLOT,

cp·rto . ~,

AL~

JUMPE~S

:4'UST_ bE

ALL BG JU~PERS ~UST dE REMO'lt:D F~O~ lhAl' SLU'I !
SL1JT 8

------

lN~'!ALLEO!

-------

SL\Jl 7

------

SLO'.l'

bS •

• bb

65 •

•

I·

·I oa

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132

ERROR LOGGER·

133
TH~

-~----~-----------------·--~ERPOR LUGGER ca~SI5TS Of ~ASlCAL~Y

1). A SET OF EXECJTIVE ~OUTINES THAT
AN~ RECOHOS RELEVENT INFOR~ATION

O~TECT
t~TO

!~RE~

EHH~qs

~4HlS:

A~J

EVENTS

ERROH LJG

~UFFER

Ii't f'1E.'10RY.

2). A PROCESS CALLED EPRFMT.EXE THAT PEPIOOICALLY ~~PTigs THE
BUFFERS, TRANSFOR\tS THE OESCRIP'IIot;s or TrtE ~RR'1RS IfliIO A
STANDARD FCP~AT A~O ST~RES THE FOR,ATTED INFOR~ATI~~ I~ A
FILt:

nr~

DISK.

3). A PROCESS CALLEO SYE.EXE THAT GENERATES READABLE RgPQRIS
FRG~ THE INFUR~ATION FORMATTED BY ~RRF~T.EX€.

THE EXECUTIVE

~OUTI~ES

AND ERRFMT.EXE HUN

USt:R lt1TERVENTION TU FILL THE BUFFEPS

ca~Tl~UQijSLY

~ITH

o~-r 1\

RAii

~iTHOUT

'JN e:VEk1

DETECTED gRROR A~D EVENT. ~H€, A BUFFER dECOMES FULL OR A
PREDETERMINED TIME riAS EXPittF.D, THE BUFF~k IS EM?TI~D TO A FILE
ON DISK. Ir A SUDDEN BU~ST OF EHROF.S OCCUR FASTER T~A~ THEY CA~
8~ FOR~ATTED A~D STORED, THEY ~ILL BE ASSIG&EO A SEJUE~CE NUMdtR
ANO NO OTHER OATA CONCERNING T~E EVENT OR £RROR ~ILL B~ LO~GED.
THE f!LE
IN THE

[SYSE~Rl

~HICH CONTAINS THE ERHOR INFO~~'TIO~ IS CO~£AlhED
DIRECTORY ANO IS CALLED ~Rk~OG.SiS. ~ril~ RU~~l~G
Vt;RSiiJi~

SYt..EXE THE FILF. SHOULD BE REN.\MED 'IO Pf(EVEN?
ACCUMULATI~G.

A~Y NE~ ERRO~S ENCOU~TEFED

.hJM~~RS

fr<O:·•

ERR~~T.~XE ~ILL CAUS~.

A N~w ERRLOG.SYS TO BE CREATED.

______
______ _
TP
RUN .. SY~.EXE
S SET DEFAULT SYSSOISK:CSYSERP]
S RE~AME ERRLOG.SYS

ERRLUG.O~D/~EW-VERS!Oi

S DIR
S RU~ SYSSSYSTEN:SYE
T~E

PROGRA~

s i·'C SYE

ij!LL ASK SEVERAL
(SPECIFY THE

OUTPUT FILE?

~UESllO~S:

~XACT

FIL~

Ex~mple:

lRP.LOG.ULD;~J

Default:

EHR.LUG.OLD

(THIS 'rl!l.L FE
Examol~:

TH~

Er.JU

~t::5iJ!...r

CJ~P!LiD)

n~..

SVr~)

~YFILE.~Eh

Default: SYSSCUTPUT
LP ~IL~ SE~U CUtPUT T~

~~!~TiR

134

CS C: Vf.: P. AL !1 P 'l I C ; •S i\ ~ e:

0 PT I 0 NS ?

Oetault:
Options:

riCLL•UP

~ 'J :.

r:.. \ d T., r.; : )

RtLL-UP
~

Ru~L-JP

SF<. IE~-

CR~PTIC

STAc~DA~D

A ~UICK SUMMARY OF ER~O~S FOR ~AC~ FAtLt~G PEVlC~
~ITij NC DETAILS ABUUT !HE I~OIVIDJAL ~RHCHS.
THE TOTAL WILL EQUAL T~E SU~ U~ ~A~D~A~! AND

SOFTwARE EP.~ORS.
cor:TAH1S A BPI~F DESCRIPTION ABOUT

BRIEF

Ef'C~Ot<

TYPE OF ERROR
JlEVICt: ON CUMPorJE::n .mICli CAUSED IT
A SEQUE~CE NUMBER
A TI~E 1d1E~ THE E~fHJR ·~AS C..OGGi::C

A).
IhCLUOiflG:

-Jo:~c~

J:i).

C).
0).
C~~PTIC

DEVICE AND CPU ERRORS O~LY. THE ~UT?UT WILL
CONTAIN THE CONTENTS OF ASSOCIAIEO q~GISTf~S
WIT~ EVERY ERROR SUT hO EXPLANATION.

STANDARD

EVERY ERROR HAS Ar-_

~NTRY

AND A

C1J~?LETE

OF REGISTERS AHO A DESCRIPTION OF

BREAKOOw~I

THE REGISTEHS

~~AT

AAE.
DEVICE NA~E?

CINDI~IOUAL

DEVICE OR <C~> FOR ALL)
CPU AUD CMI
CONFIGUriATION CHA1GES
MFMORY AND ALERT

CP
CO
ME .

SYSTE~

DEVICES: SY

lhfa,Ok1dTI0:-1 J\:-JD

D~AX

RK•s

DBAX

RP's etc.
DISK
ALL TA?ES

BU~CH~lKS

~LL

M
l'iT
~F
UtiKNOW~

UNK~Owfl

DEVICE ERR~RS

YOU CAN ALSO USE A "·" TO DELETF CE~TAIN
ExamJHe:

-o

EV~RYT~ING BUT DISKS
E:VERYTH ING BuT l"OUNTS ANO

•/CO~rIG

AFTEP DATE?

COESIPED FIRSI DATE OF

8€FORC: DATE?

CD~SI~£0

XX-YYY•19ZZ

LAST

D~!E

D~V!CES

a).[ s:_.OIJ'.i TS

E~T~Y)

OF 8hrRY)

XX:XX:XX.XX

DAY ~ONTH Y~AR
DELTA TI~~ IF O~SIRED
11•SEP•1981 03:22:00.00
HRS MIN SEC 10otns

Ex:mple:

DID NC'r SPECIFY Ad nUTPIJT fILF. uf-1 D£V!CS, Tdi SYF
PJS,.RUC'I YOU TO ALIGN THE PAPER Ar:D S!R!KE Rs·r;J~.J.

l f YOL;
~Il.JL

IF YOi.J SPF-'CIFTF.D ~N
SUCCESSFUL

! f PE

f~E

CG~ti?LET

JuT?UT

0:.JTPUT rlLE GR D~'Jlct., ?PU S·i'liJLQ
At Th.CS 'f l!'>iE '{()ij r:oiJu:)

.rm 1 r.l':SS~GE,

FIL~.

PrWGRA~

c~~EI JF!.
.:l~I··1T

135

SDA

136
system Dume Analyzer CSLA) Proc ue:rent
1

-------------------------------------Tn1s text is

to demonstrate how to oroc•1re a 5DA reocrt after
inte~ded to demonstrate the interoretation

int~n1ed

a system crash. It is "ot
of the SDA.

the crash dump tile !s contained within the
located on the syste~ disk.

~o~ normally
ts~~EXEl directory

the advent of $ promot, obtain a list of fil~s c~ntainea
the directory C&YsgXEl The file tnat must be there is:

~1thin

*********************************•*****************•********•***
**

**
*
'
*********************************************•******************
oa NuT RENAME

T~IS

FIL~

Once you have ascertained tnat the file is present, then type:
S MCP SOA

The standard response to tnat should be:
Enter name ot

th~

dUmD

The response to tnat

file>

stat~ment

is:

CSYSEXElSYSDU~P.D~P

Tne response to typ!nq CSYSEXElSYSD~~P.r~p <CR>, is a orief
description ot tne dump ~nd then a SDA promot:
SOA>

After the SDA>

pro~pt,

type in the

SDA> SET OliTPl.iT SDAOU ·1P. xxx
SDA> SHOW SU~MAP.Y
SOA> SHON CRASH
1

follo~in9:

(let xxx be your 1n1 tinlS)

SDA> SHu_.; STACK
~~A> SHON PkOCESS
SDA> EXAMINE/PO

SCA> EXIT

The EXIT snould have returned tne you racK to DC~.
Uctdin a directory. This directory should contain a file
3DADU~?.xxx Cxxx snould oe your initials for file tyoe)
~i o t1 all you r. ave to do i s ob ta 1 n a n ~ r ,, copy of t n e 1 u !fl p •

s P~I~T S~ADU~P.xxx
io~

also can looK at this
s TYPE

SD~JUM?.xxx

fil~

your

t~r~inal:

137

Bootstrap Process

138

BOOTSTRAP PROCESS

The following lists the steps required to obtain a running system on a
VAX-11/750 processor:
1.

Power up occurs.

The VAX-ll/750 microcode detects power on and follows the
power on strate9y selected by the POWER-ON-ACTION switch
located on the processor control panel.

If a restart cannot be done, either an
automatic
bootstrao from the default bootstrap device or a halt
will be done.

If the machine halts,
control. This program:
(l} Issues the
terminal .

console

the

microcode

prompt

(>>>)

program
at

the

gains
console

(2) Accepts interactive commands to bootstrap the system
by means of the default bootstrap device or a
user-specified bootstrap device
3.

The microcod~ program looks up and executes the bootstrap
device read-only memory (ROM) •
This ROM is 256 bytes and
contains a main routine (at the entry) and a subroutine. The
main routine reads block 0 from the bootstrap device and
jumps to the boot block entry. The main routine and the boot
block routine use the ROM subroutine to read arbitrary blocks
from the bootstrap device into memory.

The boot block contains the logical block address, size, ana
entry offset of the program to be executed in the bootstrap
process. This program can be either (1) stand-alone BOOT58,
when the bootstrap device is the TU58 console drive, or (2)
VMB.EXE, when the bootstrap device· is the system disk.

If the bootstrap operat~on is performed from the console
TOSS tape cassette using stand-alone BOOTSS, the user
types BOOT58 commands to set up register input values and
to load and start VMB.EXE.

If the bootstrap operation is performed directly from the
system disk using VMS.EXE, the microcode program cerives
the register input values.

VMS.EXE is the primary bootstrap program, which contains
CPU-indeoendent code and CPU-dependent routines. It also
contains· a set of primitive non-interr~pt-driven drivers for

BOOTSTRAP PROCESS

189

all possible system devices and a primitive ~ile system for
locating and reading Files-11 Structure Level 1 and Structure
Level 2 files.
VMB.EXE performs the following steps:
a.

Saves the register values and some values calculated from
the register values in the restart parameter block (RPB}.

Reads the system identification register to determine the
processor type and to select the table of appropriate
processor-dependent data and subroutines.

Determines the amount and pattern of memory.
A paqe
frame
number
(PFN) bitmap is constructed.
Unless
inhibited by a boot flag, memory is tested for gross,
uncorrectable parity errors. VMS.EXE contructs, in the
RPB, a table indexed by nexus number of all memory
controller and I/O adapter types.

Based on register values, one of the following occurs:
Cl) A boot block at the desiqnated logical block number
(LBN) will be read into memory and given control.
(2) A file named [SYSEXE]SYSBOOT.EXE will be

read

into

read

memory and given control.
(3) A file named

[SYSMAINT]DIAGBOOT.EXE
into memory and given control.

will

(4) A file specified by the user in response to a prompt

will be read into memory and given control.
6.

SYSBOOT is the standard secondary bootstrap program.
It
performs
initialization
suitable
for
the
unmapped
environment. S!SBOOT performs the following steps:
a.

Reads current parameter settings from SYS.EXE.

Looks up the bootstrap
information about it.

If register values so indicate, prompts the user to
modify current system parameter settings. The user can
change the start-up command procedure name and modify
system parameters using SET or a previously created
parameter file.
New parameters become the "current"
parameters on the next bootstrap operation.

Sets up SPT, SYSPHO, SCB, and PFN data structures.

Reads the resident executive into high physical memory.

Locates and transfers to INIT code.

device

driver

file

The svs~em initialization orocess consists of
INIT,.SYSINIT, STARTUP.COM: and SYSTARTOP.COM.
a.

INIT is part of SYS.EXE.

and

four

stores

stages:

It performs the following:

(1) Enables mapping and sets the PC to system space.

(2) Prints the .system announcement message

BOOTSTRAP PROCESS

140

(3) If requested by means o: the coot flag, stops at the
XDELTA breakpoint.
(4) Initializes the system for paging.
(5) Deallocates available physical pages (PFN bitmap set

.up by VMB) to the free page list.
(6) Initializes the system

page

table

for

paged

and

nonpaged pools.
(7) Initializes I/O adapters using the list of present
adapters
generated
by VY~.EXE.
Initializatio~
consists of mapping adapter register space (only the
number of pages actually used are mapped) and
calling adapter-specific routines to allocate and
set up data structures and to initialize the adapter
hardware. In addition, for UNIBUS adapters, the SK
byte I/O page of the UNIBUS is mapped.
Data structures allocated are:
MASSBUS -- adapter control block
channel request block
interrupt descriptor block
UNIBUS

adapter control block

(8) Performs additional process initialization tas~s.
(9) Transfers the primitive VMB.EXE system device driver

into nonpaged pool; and saves the driver entry and
boot device control/status register (CSR) as virtual
addresses (rath~r than physical acdresses) in the

RPS.

(10) Loads the CPU-dependent code image
pool and links it into the system.

into

nonpaged

(ll).Loads the terminal handler into non-paged pool, and
connects the interrupt vectors. Loads the driver
image for the system device into nonpaged pool,
connects its interrupt vector, and derives the name
of the system disk. The rule for the system disk
device name is as follows:
device name

Examine the primitive driver,
the device name is stored.

controller

The controller designator is "A," "B,"
or "C" for the fi~s~, second, or third
occurrence of this kind of adapter.
For example, if the adapter of the
system device is the second MASSBUS,
the controller is B.
(Note that for a
generally configured system, it is
possible
to use the AUTOCONFIGURE
command procedure
to
derive
the
controller
name
incompatibly with·
INIT.,. Consequently,
some care
is.
required
when configuring multiple
controllers of possible system disks
across multiple buses.)

unit

Passed .from
R3.

VMS.EXE

input,

where

BOOTSTRAP PROCESS

141

(12) Adds the prologues of the resident drivers
example, MB, NL) to the prologue list.

(for

{13) Performs initialization of resident drivers.

(14) Moves completion code of INIT into the pool and
executes it. The completion code deallocates space
occupied by INIT (and optionally XDELTA) to the free
pa9e list.
The completion code then jumps to the
scheduler, which ultimately results in SYSINIT being
swapped in and started.
b.

SYSINIT performs the following:
(l) If necessary or requested, prompts for the
day.

time

(2) Writes back system parameters to SYS.EXE.
(3) Creates some logical names.

(4) Sets up swappinq and paging files.
(5) Installs the VAX-11 RMS image and
file as pageable system sections.

system

message

(6} Mounts the system disk (ACP process created).
(7) Creates the job controller, OPCOM, and

~RRFMT.

(8) Creates the STARTUP process.

STARTUP reads input from the start-up command
-hich causes it to:

procedure,

(l) Create logical names.

(2) Run SYS$S!STEM:SYSGEN to configure the I/O system.
(3) Install known images.
(4) Invoke [SYSMGR]SYSTARTUP.COM.
( 5)

Log out.

SYSTARTUP.COM is an empty command procedure distributed
by DIGITAL. The system manager can edit SYSTARTUP.COM to
perfnrm site-specific start-up functions.

SYSGEN is run by STARTUP or at any other time.

SYSGEN:

Provides for dynamic loading of and connecting
to.
drivers.
(The operator, null, and mailbox drivers are
permanently part of the executive image.)

Provides for the creation of new parameter
have an encoded format) •

Creates paging, swapping, and system dump files.

files

{which

142

Iris.truction Decode

143
•

THIS IS AN ATTEMPT TO DEMONSTRATE THE FLOW OF A MACRO
INSTRUCTION THROUGH THE 11/750 DATA PATHS.
INITIAL INPUT ARGUMENTS
>>>DIL/P 100 005261DO

HOVL <R1>•R2
HALT

>>>DIG 1 1000

SET UP ADDRESS OF 1000 IN R1

>>>DIL/P 1000 12345678

SOME DATA IN 1000

>>>S 100
AND WERE OFF ••• THE START COMMAND IS DECODED BY THE
CONSOLE MICROCODE IN CCS AND WILL FIRST INITIALIZE THE MACHINE.
WE KNOW THAT THE CPU WILL PERFORM AN XB FLUSH WHENEVER WE WRITE
TO THE PC• AND SINCE WE SPECIFIED A NEW PC INSIDE THE START COMMAND,
AN EXECUTION BUFFER FLUSH TAKES PLACE. AN XB FLUSH REMEMBER DOES
NOT WRITE ALL 2ERO'S TO THE XB'S! THAT WOULD BE SENSELESS.
ANY TIME THAT WE WRITE THE PC• THE PRK CHIP WILL PERFORM
A DOUBLE PREFETCH OPERATION BY TAKING THE VALUE SPECIFIED IN THE PC
AND PERFORMING A BUS READ FROM MEMORY. SINCE THIS FIRST PREFETCH
HAS ONLY FILLED XBO• ANOTHER PREFETCH WILL OCCUR USING THE PC+4
AND THE I-STREAM DATA RETURNED WILL BE PUT IN XB1. NOW THAT WE
HAVE THE XB'S FULL OF DATA• THE PRK WILL START MONITORING THE
PC BITS 1!0 AND THE •xB SELECT• LINES FROH THE HDR CHIPS• AND THE BUT
FIELD OF THE MICROCODE LOOKING FOR HIS TWO CONDITIONS TO BE MET.
1 >. IS THERE AN EMPTY XB? DETERHINEI1 BY THE PC BITS <1: O> = 3
2>• IS THERE A BUS CYCLE IN PROGRESS? MONITOR BUS FIELD
KEEP IN HIND THAT THE PRK IS WORKING TOTALY TRANSPARENT TO THE
MICROCODE AND WILL INITIATE A PREFETCH WHENEVER IT'S CONDITIONS
ARE HET OR THE PC GETS REPLACED BY THE USER OR THE USERS PROGRAM.
EXAMPLE: 2t!! BRB 2t
THIS BRANCH INSTRUCTION WOULD REPLACE THE
PC WITH THE PC PLUS THE BRANCH OFFSET.
FINALLY AFTER THE FIRST XB WAS FILLED, THE MICROCODE ROUTINE
FOR THE START COMMAND WILL DO AN IRDl AND THE WHOLE MESS BEGINS •••

144

I THINK A BLOCK DIAGRAM WOULD BE NICE RIGHT ABOUT NOW •••
BLOCK NUHBER 1

MIC

DPH

MEMORY

·---------------,
,--------------------, /------':·--------------------,
PC 100 : PC+4 104 1---\:
,--------·
CSPAJ<--:
RNUH :
W BUS •-------------------C
100=005261DO
'------1
VA
H
1000=12345679
--------' 1------- -------------------- I -- : ,

,______
BUS _

IRDX

·----

_______________ ,

\---1:, -

•

: OSR :

_____

:••••••:ROH
,
,:

CPRKJ------>CCHKJ---'
L--> PC<l:O>

·-----·

••

f1DR

:
:
: IRDl:
•••>••••••:, ROH ,:
: •••
:

_____

: :

103 102 101 100
•---------, : XB DECODE BUS --------------------••• : IRD: OSR:<---------------- 00 : ~2 : 61 : DO XBO
:: '---~-----'
CHSQJ I
-------------------::
IRD
CSACJ :
'
XX : XX : XX : XX XBl

::
••
•

:: ::'----~-----------:---'
:
•• ••
: :
CCS
H.CLK

: :

: :·
'->

• ••

-------------------101 106 105 104

·----------'<---'

: '---> c

'-----> S >>>S 1001
A
D

__________ ,
LETS BEGIN ••• AFTER THE START COHMAND INITIALIZES THE MACHINE
AND WRITES THE PC• THE MICROCODED BUT FIELD GETS AN IRD1.
PC
100

PC+4
••

1. IRDl OCCURS

104

ON AN IRD1 WE KNOW THAT TWO BYTES OF I-STREAM DATA WILL BE SOURCED
FROM ONE OF THE XB'S OVER THE DECODE BUS TO THE IRD GATE ARRAY.
SOURCING THIS DATA• MOVES AN OPCODE AND THE FIRST OPERAND SPECIFIER
INTO THE IRD CHIP, AND THE OPCODE IS ALSO SENT TO THE IRDl ROM FOR
DECODING. SINCE TWO BYTES WERE SOURCED, WE BUMP THE PC BY 2.
PC

PC+4

102

106

REFER TO BLOCK NUMBER 2

145
~CROWORD

NUMBER 1

AT THIS TIME THE IRD1 ROH WILL LOOK AT THE OPCODE AND WHEN IT DECODES
IT AS A HOVL INSTRUCTION, IT WILL OUTPUT BITS 3 THROUGH 9 OF THE BASE
CONTROL STORE ADDRESS WHICH WHICH WILL TAKE US TO THE PROPER HICROCODE
ROUTINE. ALSO AT THIS POINT THE IRD CHIP WILL EVALUATE THE 1st OPERAND
SPECIFIER AND OUTPUT THE CONTROL STORE ADDRESS BITS 0 THROUGH 3 GIVING
US A TOTAL CSAD FOR OUR HOVL INSTRUCTION IN REGISTER DEFFERRED MODE.
THE IRD CHIP WILL OUTPUT THE ENCODED VALUE FOR GPR 1- -INTO THE RNUH
REGISTER.<OSR DECODE>
THE HDR WHICH CONTAINS GARBAGE WILL BE BACKED UP IN THE Q REGISTER.

*** SEE BLOCK NUMBER 2 ***
BLOCK NUHBER 2
DPH

HIC

MEMORY

--------------------·
, ________ , 1/------\:·---------------~---·
PC 102 : PC+4 106 /---\ ----------------,
CSPAl<--: 1 RNUH : : W BUS :-------------------C
100=00526100
--------' l\------1: VA --->1000
H
1000=12345678 :
'------>CGPR
: H BUS
HDR
\---/ _______________ ,
, ..IRDX

1l->:/-------•-------------------- I
,,________ --------------------

___ _
: OSR :
•••••• ,: _____
ROH ,:
•
•
••
••
•
••
••
••
:
:

,-----,
IRD1:
.. • •• •••>••••••:,: __ROH
... __ ,:
•
I
I

CPRKJ------>CCHKJ---'
L--> PC<l:O>
I
I

p
I

•

••
,---------, : XB DECODE BUS
: ••• : DO : 61

103

102 V101

100

:<---------------- -------------------00 : 52 : XX : XX XBO

: :: '---------'

: : : :

IRD

CHSQJ :
CSACJ :

:'----------------:---'

: :
•• •• ••

•• •• ••
••
••
•• •• ••

ccs

----------,

: : '-> <0:3>
•• '---> <3:9>
"-----> N/A

HOVL <>

H CLK
~<--'

--------------------

: XX : XX : XX

107

106 -10s

PC+4

104

XB1

WHEN THE SPA GATE ARRAY SEE'S THE NUHBER IN RNUH, IT WILL 14~
SELECT THE CONTENTS OF R1 AND SEND IT OUT ONTO THE R Bus,
THROUGH THE B LEG BYPASS OF THE ALU AND OUT ON THE W BUS.
THE HICROWORD WILL SET UP THE VA REGISTER TO RECIEVE THE
W BUS <WHICH IS CARRYING OUR ADDRESS OF 1000>.
MICROWORD NUHBER 2
----------~-~------

THE SECOND MICROWORD WILL CAUSE A BUS READ CYCLE TO OCCUR FROH
HAIN MEMORY INTO THE HDR.

*** SEE BLOCK NUHBER 3 ***
BLOCK NUHBER 3
DPH

MIC

HE MORY

,--------------·-------------------- /------\:.~-------------------·
PC 102 : PC+4 106 1---\:
·--------·
CSPAJ<--: ________
C
100=005261DO
RNUH ,:
W BUS '-------------~-----\------/ VA
H
:
1000=12345678
1000 ------->
I
:

1-------------------------H BUS
HDR 12345678 <--- \---/:
'-----------~--\------- ---------------------

IRDX

·---: OSR :
• • • • • •: ROH :

•••

: ~-----'

•

•I

,-----·

CPRKJ------>CCHKJ---'
L--> PC<l:O>

•

: IRD1:
•
•
• •••••••>••••••:, __ROH
.... ,:
• •
•• ••
•• •• : ,---------, : XB DECODE BUS
0

•

: : ••• : DO : 61
:

••
•
••
••

••

•

•
••
••

'---------'

.. IRD

CHSQJ

•

: : : ·----------,
: : '->:
<--'
: '--->: C READ
'----->-: S FROH

HAIN
MEMORY

103

, _________ _

102 V101

100

--------------------

:<---------------- 00

CSACJ :
:'----------~-----:---'
•
••
ccs
H CLK
••

: : : :

: S2·: XX: XX

XBO

: XX : XX : XX

XB1

101

106 -10s
PC+4

104

147
NOW THAT WE HAVE OUR DATA IN THE HDRr WE NEED SOHEPLACE TO PUT IT.
NO HORE CAN BE DONE WITH THE 1st OPERAND, SO THE MICROCODE ROUTINE
WILL DO AN IRDX TO BRING IN THE 2nd OPERAND.
AN IRDX WILL SOURCE ONE BYTE FROH THE XB INTO THE IRD CHIP AND ALSO
BUHP THE PC BY 1.

PC+4

103

107

IRDX

"ICRDWORD NUMBER 3
WHEN THE OPERAND HITS THE IRD CHIP IT WILL BE DECODED TO FIND
. OUT IF REGISTER MODE IS USED AND WHICH REGISTER TO GIVE RNUH IF NEEDED.
THE IRD CHIP WILL SEND THE OPCODE TO THE IRDX ROHS TO SUPPLY AN ADDRESS
THE IRDX <OSR> ROH WANTS TO KNOW TWO THINGS:
1. WHAT OP CODE IS IT?
THE ROH.

FOR A PARTIAL ADDRESS INTO

2>. WHAT HODE ARE WE IN? REGISTER HODE
DETERHINED BY THE UPPER 4 BITS OF
THE OPERAND SPECIFIER FROH THE IRD CHIP.
AT THIS TIME THE IRDX ROH WILL OUTPUT AN ADDRESS THAT WILL
PLACE US IN THE MICROCODE TO HANDLE THE NEEDED OPERAND SPECIFIER.
TriE ENCODED VALUE ~OR GPR 2 IS SENT TO THE RNUH REGISTER AND
LIKE BEFOREr THE SPA SELECTS THAT REGISTER BUT THIS TIME WE
WILL BE WRITING INTO IT.
THE CONTENTS OF THE HDR WILL BE SENT ACROSS THE H Bus,
THROUGH THE ALP CHIPS AND ONTO THE WBUS TO BE WRITTEN INTO THE
SELECTED GPR AND THE HICRO ROUTINE WILL END UP WITH ANOTHER IRDl
FOR THE NEXT INSTRUCTION.

*** SEE BLOCK NUMBER 4 ***

148
BLOCK HUMBER 4

HIC

DPH

MEMORY

,---------------,
,--------------------,
·---------------------,--------, :/------\: PC 103 : PC+4 107 /---\:

C
100=005261DO
"
:
1000=12345679
:
·•
••
I
:
:/~---:-------------------- \---11
'----->CGPR 2J<--- H BUS -- HDR <----12345678

CSPAJ<--: 2 RNUH : : W BUS
I

REG.

-~-'---------------'
\---~---·-------------------CPRKJ------>CCHKJ---'
L--> PC<1:0>

•---

MODE

: DSR :

____

•••••
• ,: ROH ,:
:

••

: ·

:--------------------

·-----,
: IRDl
I

PC
: ••• •••>••••••:, _____
ROH ,:
•• ••
103 V102 101 100
•• ••
•• ••
,---------, : XB DECODE BUS
•• •• ::
,: DO : 52 ,:<---------~------ 00 : XX : XX I XX XBO
•••
CHSQJ :
•e• ••e •
____________________ ,

________

•

IRD

CSACJ :

:'----------------:---'

: :• •
• •
•• ••
•• •• ••
ccs
:: :: :'->IN/A
••
••

H CLK

·-----------·'<;...'

: XX : XX : XX 1XBl

107 -106

105

104

PC+4

, _ _._>IN/A

·--->: <10:0>

WRITE HDR
: TO GPR 2
,I __________
_
IRDl

HAVING JUST FINISHED THE HOVL INSTRUCTION, THE MICROCODE ROUTINE
LEFT US WITH ANOTHER IRDl. AS BEFORE AN IRDl WILL SOURCE TWO HORE
BYTES OF I-STREAH DATA OVER THE XB DECODE Bus, INTO THE IRD CHIP
AND ALSO UP TO THE IRD1 ROH. AS BEFORE THE PC WILL BE BUMPED BY 2.
PC

: PC+4

105 : 109

*** SEE BLOCK NUMBER 5 ***

149
BLOCK NUMBER 5

HIC

DPH

----------------~----, 1------\

________
RNUM :
CSPAJ<--:·--------,

W BUS
\------/

HEH ORY

--------------------,
PC
: PC+4
1---,:·--------------~
C

1------f1 BUS
HDR

IRDX

·---- ROH OS INH ,_______ --------------------

: OSR :
•••••
• ,: _______
ROM ,:
:

: 100=005261DO
: 1000=12345678

\--1: -

'---------------

CPRKJ------>CCHKJ---'
L--> PC<l:O>

·-----,

••
••
: IRD1:
••
•• • •• •••>••••••:, ______
PC+4
ROH ,:
•• ••
•• ••
:oo
103 102 101 v100
•• ••
, _____ _... __ • : XB DECODE BUS -------------------:: :: ::
••• ,: _________
00 : XX ,
00 : XX : XX : XX XBO
CHSQJ :
:
• • ••'
CSACJ :
IRD
'-: XX : XX : XX : XX XBl

:<----------------

.: .: .:'----------------:---'
•• ••
•• ••
••
•

••
••
••
•

.--------------------'-------------------107 106 105 -104

.
.
,----..------ :
~ : '->
·<-'
CCS

CLK

; '---> c

'-----> s

A
D

NOTICE WHAT HAPPENED TO THE PC AND PC+4 ••• THE PC HAS BEEN BUMPED
TO 105 WHICH TELLS THE PRK CHIP THAT WE HAVE USED ALL THE DATA IN
XBO. A PREFETCH CYCLE WILL OCCUR USING THE PC+4 AS OUR ADDRESS TO
FETCH DATA FROM MAIN MEMORY. IF WE SEND THE ADDRESS OF 109 OVER THE
CHI WE WILL GET BACK THE LONGWORD ADDRESS CONTAINING 109. THIS IS
DUE TO THE FACT THAT THE CMI IGNORES BITS 0 AND 1 OF THE ADDRESS
THUS GIVING US A LONGWORD ADDRESS OF 108 WHICH IS EXACTLY WHAT WE
WANT.
SEE BLOCK NUMBER 6

***

150
BLOCK NUMBER 6

·---------------~----· /------\

PC 105
,--------,
_________
BUS /
RNUM ,: ,W
_______
VA
/------HDR
H BUS

CSPAJ<--:

·----

: DSR :

_____

· :• • • • • • ,: ROH ,:

••

ROH O.S INH

,---------------,
l PC+4 109 /---':

,_________ -----------------------

,-----·
: IRD11

: ••• ••• >.~ •••• : ROH

: 100=005261DO
: 1000=12345678 :

'~--------------'

PC+4

:oo
•• ••
•• ••
: XB DECODE BUS
•• •• •.•• •-------,
: 00 : xx :
••
•• •• : : '~--------, CHSQJ :
•• •• ••
IRD
CSACl
:
••
'
•• ••
:'-----------------1---'
•• •• ••
••
•• •• ••
ccs
H CLK
•• •• ••
•• •• ••
• •• ''->
<-'

C
H
I

CPRKJ------>CCHKJ---'
L--> PC<l:O>

_____ 1

•• ••

HE MORY

HIC

DPH

10B

lOA

109 v108

<----------------- xx : xx : xx : xx :xBo
--------------------:
XX : XX : XX : XX 1XB1

-----------,

-----~-------------'
107 106 105 -104
PC

'---> c

'-----> s

A
D

EXECUTION OF THE NEW INSTRUCTION TAKES PLACE SIHUTANIOUSLY WITH
THE PREFETCHr BUT NOTICE WHAT INSTRUCTION WE ARE USING •••
IT IS A HALT INSTRUCTION. WE KNOW THAT A HALT INSTRUCTION HAS
NO OPERANDS ONLY AN OPCODE• THEREFORE SOMETHING MUST BE DONE TO
PREVENT THE IRD CHIP FROH EVALUATING THE SECOND BYTE AS A 1st OPERAND
SPECIFIER. WHAT HAPPENS IS WHEN THE IRD1 ROHS DECODE THE HALT
OPCODEr <OR ANY ONE BYTE INSTRUCTION> A SIGNAL NAMED •ROM OS INHIBIT'
IS OUTPUTED FROM THE ROM ITSELF AND SENT TO THE MSQ AND SAC CHIPS WHERE
IT DISABLES ANOTHER SIGNAL CALLED •LCD OSR A• WHICH WILL PREVENT THE
UPDATING OF THE OSR COUNTER. THE SAME SIGNAL TELLS THE SAC CHIP TO
TELL THE PHB CHIP NOT TO GENERATE THE SIGNAL •IRD LCD RNUM• WHICH WILL
PREVENT THE SPA CHIP FROH LOOKING AT RNUHr AND FINNALY THE 'LCD OSR A•
SIGNAL TELLS THE IRD CHIP NOT TO DECODE THE DATA ON THE OSR SECTION
OF XB DECODE AS IT IS NOT REALLY AN OPERAND.
THE HALT MICROCODE FLOW WILL NOW TEST THE CURRENT MODE TO SEE IF WE
ARE IN KERNAL MODE AS YOU MUST BE TO HALT THE CPU.
ASSUMING THAT WE ARE IN KERNAL MODE, THE MICROCODE ROUTINE WILL ..•
1>$
2>.
3>.
4>.

SET UP A HALT CODE OF 06 IN A TEMPORARY REGISiER
ADD 1 TO THE CURRENT PC GIVING US PC=106 AND PC+4=10A
VARIOUS OTHER TASKS REQUIRED TO SHUTDOWN THE CPU
AND FINALLY SEND THE PC TO THE PRINT ROUTINE

151
THE MICROCODE PRINT ROUTINE WILL ALWAYS SUBTRACT 2 FROM ANY GIVEN
PC BEFORE ACTUALLY SENDING IT TO THE CONSOLE.
PC= 106
- 2

00000104 06

>>>

104

THIS LEAVES US AT A PC OF 104 WHICH IS ONE BYTE AHEAD OF THE ACTUAL
OPCODE OF THE HALT INSTRUCTION •
. THE REASON FOR THIS IS BECAUSE NOW WE CAN SIMPLY TYPE •••

>>> c
AND CONTINUE ON WITH THE NEXT OPCODE FOLLOWING THE HALT INSTRUCTION.
ONE FINAL NOTE:

DURING EXECUTION OF MACRO INSTRUCTIONS, IF ANY GIVEN
INSTRUCTION BLOWS UP AFTER BEING DECODED ON AN IRDl1
THE PC WOULD HAVE ALREADY BEEN UPDATED BY 2 •••
SO THE PRINT ROUTINE CALLED IF WE WERE TO HALT THE
CPU, WOULD SUBTRACT 2 FROM THE PC GIVING US THE
CORRECT OPCODE ADDRESS OF THE FAILING INSTRUCTION.
THIS ALSO CLARIFIES WHY WE HAVE TO ADD 2 TO A
MICRO-VERIFY ERROR HALT TO GET THE CORRECT FAILURE
CODE. THE MICRO-VERIFY ROUTINE IS RESIDENT IN ~cs
ROH AND IS NOT A HAC~O PROGRAM AT ALL! THUS IT DOES
NOT UPDATE THE PC IN ANY WAY, BUT IT STILL USES THE
SAHE PRINT ROUTINE FOR THE ERROR DISPLAY.

THINK YOU'VE GOT THAT DOWN???
OF BEWILDERED ENGINEERS!!!
GOOD LUCK.

NOW TRY TO EXPLAIN IT TO A CLASS FULL

152

M·achine and Bugchecks

153
11/750 MACHINE CHECK INTERPRETATION

TO HELP ALIVIATE ANY PROBLEMS HAVING TO DO WITH MACHINE CHECKS
IN THE 11/750 BELOW IS AN EXPLANATION OF WHY AND HOW THEY OCCUR
ALONG WITH AN EXPLANATION OF HOW TO READ THE MACHINE CHECK LOGOUT.
A MACHINE CHECK IS A UTRAP TO LOCATION 28 IN THE HICROCODE. THIS
IS CAUSED ONLY BY TWO CONDITIONS WITHIN THE LOGIC OF THE UTR CHIP.
THESE CONDITIONS ARE AS FOLLOWS;
1. TRANSLATION BUFFER PARITIY ERRORS IN DATA OR TAG
2. BUS·ERROR
THIS SOUNDS EASY BUT WHAT CAN CAUSE A BUS ERROR IS THE PROBLEM.
PLEASE LOOK AT THE FOLLOWING CHART AND READ THE EXPLANATION BELOW
IT.
·28 <MACHINE CHECK UCODE ADDRESS>
••

••
•• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• ••
••
TB PARITY ERRORS
BUS ERRORS
••
••
•• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• •• ••
••
••
••
••
UNCORECTABLE DATA
NON EXISTANT MEMORY
••••••••••••••
•• ••••••••••••
•
•••••••
••••••••••••
••
••
••
••
•
••
•
•
•
CACHE PARITY
UNCORECTABLE
.RLTO
NXM
ERROR
I•ATA
ON
ON CHI
CHI

WE WILL USE THE ABOVE CHART TO INTERPERT THE MACHINE CHECK LOGOUT
THAT IS ON PAGE 25 IN THE VAX 11/750 DIAGNOSTIC MINI REFERENCE GUIDE.
ATTACHED TO THIS SHEET IS A COPY OF THE LOGOUT AND A BREAKOUT OF
THE NEEDED REGISTERS IF YOU HAVE NO MINI REFERENCE GUIDE.
WE NEED TO CORRECT ONE AREA OF THE LOGOUT IN THE MINI REF. GUIDE
WE GO ON. AT LOCATION <SP>+28 IT SHOULD READ MACHINE CHECK
ERROR SUMMARY REGISTER AND NOT MEMORY CONTROL REGISTER.

~EFORE

154
ALL RIGHT WE ARE OFF!! !J WHAT YOU SEE IN THE LOGOUT IS WHAT IS PUSHED
ONTO THE STACK WHEN A HACHINE CHECK OCCURS WHILE NORMAL RUNNING OF
VHS •AFTER• THE VECTOR ADDRESS IS BROUGHT IN IN FROH SCBB+4 AND THE
VECTOR BITS 0 AND 1 ARE CHECKED. WE WILL ATTACK THE STACK DUMP FROM
TWO AREAS;
1. INFORMATION RELATING TO LOCATION OF FAULT <PC ETC>

2. CAUSE OF THE FAULT.

LOCATION : AT <SP>+S IS THE VIRTUAL ADDRESS REGISTER. THIS
REGISTER IS USED TO FETCH THE OPERAND DATA NEEDED
BY THE INSTRUCTION. SO IT CONTAINS THE OPERAND
ADDRESS IF THE HACHINE CHECK OCCURRED WHILE FETCHING
OPERAND DATA.
AT <SP>+C IS THE PC AT THE TIME OF THE EXCEPTION.
THIS HAY BE USED WITH <SP>+2C WHICH IS THE ADDRESS OF
THE OPCODE OF THE FAILING INSTRUCTION. EX: IF YOU
ARE PREFETCHING AND USE AN INSTRUCTION AT ADDRESS 1000
AND THAT INSTRUCTION HAS 5 OPERAND SPECIFIERS THE ADDRESS OF
THE OPCODE +2 IS STORED IN THE PC BACKUP REGISTER UNTIL
THE NEXT OPCODE IS USED.CIRDl TIME> AS YOU USE THE 5
OPERANDS IN THE INSTRUCTION THE PC <NOT PC BACKUP> IS
INCREMENTED TO KEEP TRACK OF EXECUTION BUFFER USAGE.
SO IF WE HAVE A MACHINE CHECK INVOLVED WITH EXECUTION
BUFFER DATA, WE HAVE PUSHED ONTO THE STACK THE ACTUAL
PC <SP+C> AND THE OPCODE OF THE INSTRUCTION <SP+2C>.
AT <SP>+JO WE HAVE THE STANDARD PSL.
CAUSE:

WE SHOULri FIRST LOOK AT THE S~MMARY PARAMETER CODE
AT <SP>+4. GENERALLY SPEAKING YOU WILL ONLY HAVE
NUMBERS 1,2,6 OR 7. 1•6 AND 7 ARE BASICALLY THE SAHE THING.
THESE HEAN A CONTROL STORE .PARITY ERROR OCCURRED OR SOMEHOW
THE MACHINE WAS SENT TO AN UNUSED IRD OR UNKNOWN ROM
LOCATION. THIS COULD HAPPEN FOR A FEW REASONS, OF WHICH
THE HOST LOGICAL IS THAT YOU HAVE A BAD CONTROL STORE•
BAD HICROSEQUENCER ON THE DPH OR A BAD IRD DECODE ON
THE DPM.

155
THE HOST COMMON AND HARDEST TO FIGURE OUT IS THE CODE
OF 2. THIS RELATES TO HEMORY ERROR1TB PARITY TIMEOUT ETC.
YOU LIKE THAT ETC. DO YOU. WELL LETS TAKE THE CONFUSION
OUT OF THE STATEMENT. IF YOU EVER SEE A 2 FOR A SUMMARY
PARAMETER CODE THE FIRST THING YOU SHOULD LOOK AT IS THE
MACHINE CHECK ERROR SUMMARY REGISTER;CSP>+28. YOU CAN
RELATE THIS REGISTER<MCESR> TO THE ABOVE CHART BECAUSE IT
WILL TELL YOU WHAT CAUSED YOU TO GET TO UCODE ADDRESS 28.
FIND THE BREAKOUT OF THE MCESR <PAGE 28 IN HINI REF.GUIDE>
AND YOU WILL SEE A FOUR BIT REGISTER. LET US HAKE THE
NEEDED CHANGE. THERE IS NO LONGER AN UNALIGNED UNIBUS
REFERENCE THAT CAUSES A MACHINE CHECKr SO CROSS IT OFF.
BIT 0 WILL TELL YOU IF THE MACHINE CHECK OCCURED WHILE
DOING A PREFETCH OR OPERAND FETCH.<THIS HAY HELP YOU TO
FIGURE ON USING THE VA OR PC FOR LOCATION>
IF BIT O=O THEN AN OPERAND FETCH WAS HAPPENING
IF BIT 0=1 THEN A PREFETCH OF AN INSTRUCTION CAUSED IT.
BITS 2 AND 3 WILL TELL YOU IF IT WAS A TB ERROR OR BUS ERROR
AS AN EXAMPLE WE WILL USE THE TB ERROR FIRST.
TB PARITY ERROR WHILE FETCHING AN OPERAND WOULD CAUSE
THE REGISTER TO LOOK LIKE THIS WHEN PUSHED ON THE STACK
00000004 BIT 2 SET AND 0 CLEAR.

IF A·TB ERROR OCURRED WHILE PREFETCHING IT WOULD BE
AS FOLLOWS;
00000005 BIT 2 SET AND 0 SET.

EITHER WAY IF IT IS A TB ERROR YOU SHOULr THEN LOOK
AT<SP>+1C OR THE TRANSLATION GROUP REGISTER. THIS WILL
TELL YOU WHICH GROUP (0 OR 1> AND IF IT WAS A TAG OR
DATA ERROR.
YOU MAY ALSO LOOK AT CSP>+14 WHICH IS THE SAVED MODE
REGISTER. THIS WILL TELL YOU THE PROCESSOR ACCESS MODE
AND MEMORY MANAGEMENT STATES DURING THE LAST MICROCODE
REFERENCE TO MEMORY.
FROM THIS YOU SHOULD KNOW WHAT CAUSED THE MACHINE CHECK AND
THE LOCATION.

156
LET US RETURN TO THE HCESR AND ASSUME IT LOOKED LIKE THIS;
00000008 BIT 3 SET 0 CLEAR
THIS WOULD HEAN A BUS ERROR HAPPENED DURING AN OPERAND
FETCH.

IF YOU LOOK AT THE CHART YOU WILL FIND THERE ARE TWO THINGS
THAT CAN CAUSE A BUS.ERROR. TO FIND OUT WHICH ONE IT WAS
LOOK AT <SP>+24 THE BUS ERROR REGISTER. THE BUS ERROR
REGISTER IS A FOUR BIT REGISTER IN THE MEMORY INTERCONNECT
MODULE SLOT THREE.CNOT THE MEMORY CONTROLLER> THE EXAMPLE
WE WILL USE FIRST IS UNCORECTABLE DATA CAUS£D_~HE BUS ERROR.
THE BUS ERROR REG. WOULD LOOK LIKE THIS;
00000004

THIS SAYS UNCORECTABLE DATA CAUSED THE ERROR,
THERE WERE NO LOST ERRORS<RECEIVED AN OTHER ERROR
BEFORE THE LAST ONE WAS CLEARED>
!!! !CORRECTED READ DATA DID NOT OCCUR. CORRECTED
READ DATA CAUSES AN INTERRUPT NOT A MACHINE CHECK!!!

IF YOU LOOK AT THE CHART YOU WILL FIND THAT UNCORRECTABLE
DATA CAN BE CAUSED BY TWO THINGS;
1. CACHE PARITY ERROR
2. UNCORECTABLE DATA FROH THE CHI
TO DETERMINE WHICH OF THESE CAUSED THE BUS ERROR LOOK
AT <SP>+20 WHICH IS THE CACHE ERROR REGISTER. THIS
REGISTER CONTAINS INFORMATION ON THE DATA CACHE. IT IS
A FOUR BIT REGISTER ON THE HIC MODULE THAT WILL TELL YOU
IF THE LAST REFERENCE WAS A HIT; LOST ERROR AGAIN AS BEFORE
AND IF YOU HAD A CACHE PARITY ERROR. IF THERE WAS NO CACHE
PARITY ERROR SET IN THE REGISTER THEN THE BUS ERROR WAS
CAUSED BY THE UNCORRECTABLE DATA FROM THE CHI.

167
so; CONTINUING RIGHT ON LET us ASSUHE THAT THE BUS ERROR
WAS CAUSED BY A NON EXISTANT MEMORY. AS YOU CAN SEE BY THE
CHART THAT TWO THINGS CAN CAUSE NXH. FIRST LETS LOOK AT THE
BUS ERROR REGISTER. IT EQUALS;
00000008 BIT 3 SET = NXH
THEN WE WOULD LOOK AT THE READ LOCK TIHE OUT REGISTER <RLTO>
THIS IS A ONE BIT REGISTER THAT IF BIT 0 IS SET A READ LOCK
TIME OUT CAUSED THE NXH. WHAT IS A READ LOCK T~H~ OUT? GOOD
QUESTION. IF THE CPU ATTEMPTS TO ACCESS THE CHI DURING A READ
LOCK CONDITION A TIMER IS STARTED IN THE CHK GATE ARRAY ON
THE MIC MODULE. IF THE TIMER RUNS FOR 64 USEC <USEC IS CORRECT>
THEN THE CHK CHIP GENERATES NXH TO THE UTRAP CHIP THAT WILL
CAUSE A MACHINE CHECK. IF BIT 0 IS CLEAR IN THIS REGISTER AND
THE BUS ERROR REGISTER SAYS A NXH CAUSED THE MACHINE CHECK
THEN IT WAS CAUSED BY NXH ON THE CHI.
THE ONLY THING THAT WAS PUSHED ONTO THE STACK THAT WE
HAVE NOT TALKED ABOUT IS <SP>+lO• THE MEMORY DATA REGISTER
<HDR>. THIS WILL CONTAIN THE LAST DATA FETCHED FROM CACHE
OR MAIN HEHORY.

HOPEFULLY THIS EXPANATIQN, CHART AND HANDOUT WILL
CLEAR UP SOME MISCONCEPTIONS CONCERNING THE 11/750
MACHINE CHECK.

158
GENEMAL 111750 MICROCODE FLOw FOH A MACHINE CHECK

------------------------------------------------1. MACHINE CHECK EXCEPTION CONDITION OCCURS
THE VARIOUS TYPES ARE AS rOLLOwS:
A. BUS ERROR:•-••> NXM OFF CMI FROM: •-••> CMC ~OOUL~
I (NON EXISTANT ME~OR?l I
(~EMORY COtlROL~EN)
I
I
·I
I

•••> UBI MODULE
I
(UNIBU-S 1--hTERf ACE)

I
I

•••> MBA MODuLE
(MASBUSS ADAPTER)

•••> UCE ••••••••••••••••••> UCE FROM CMC
(UNCORRECTABLE ERRO~)l
CCR OTHER DEVlC~)
I

••••> CACHE

.
PARlI~

£R~OR

•••> RI.TO
CREAD LOCK TI~E OUT)

B. T! ERHOK:•••••> TRANSLATION BUFFER TAG PARITY ERROR
I
I
•••> TRANSLATlON SUFFER DATA PARITY ERROk

THE TWO CA?£GOMI£S OF MACnihE CHECK CONDITIONS CAh
~E BROKEN UO~N l~TO TWO ~OkE GROUPS:
A. SOURCING D~TA FROM l•STRF.AM:••> MSRC XS ra ERROR
SEE NOTE

I
I ·

I
I

I
I
I

*•~•••••••~•••••••••••••••••••
SUFFER tRROR •
TRA~S~ATinN

• ENCOUNTERED ~HEN SuURClNG •
• THE BAD OATA FROM ThE
•
• ~X~CUTION BUFFER
•

***•••••••****•*•*••*********

---> MSRC xa BUS ERROR
•••••••••••••••••••••••••••••
* 8US ERROR
*
ENCOUNTE~ED

SOURCING IH~ SAD DATA*
* FROM rHE €XECU1IuN bUFFER •

•

~HEN

•••••••••••••••••••••••••••••
NOt£• wHEN A TB OR SUS ERROR OCCUNS DURING A PREFETCH, IH~ ~kkOR 15
IGNOR~"-D UNTIL -£ ATTE~PT TO SOUP.CE THE &Au DATA FHO~ InE
EXEC~TlON BUFFER.
THIS IS to PkEVENT UNNECCESSARY EikGk
HANDLING OF OATA THAT MIGHT ~or GET USED A~Y~AY.
THE DATA I~ THE XB IS ~OT ALwAYS THi Rl~HT DATA TO SE E~ECU!EO,
FOR EXAMPLE: lF THE CURRENTLY EXECUTlaG I~STRUCTIO~ IS A
BRANCHING lNSTRUCTION IT ~ILL ruOIFY TH~ PC THUS CAUSI~G A~
EXECUTION auFF~R FLUSH ~HICtt CLEARS OUT THE xa ANO flLLS IT
wITH THE DATA FROM THE ~~w PC ANO PC+4.

159
~.

ERROR DURING INSTRUCTION DECODE:•-••>BUT Xd TB ERROR
CIRDl/lRDX)
I
••••••••••••••••••••••••••••
I
• TB ERMOR ENCOUN1EREO
*
I
* DURING A~ IRDl OR I~DX *

*****************•••••••••••

•••>BUT XB BUS ERROR

••••••••••••••••••••••••••••
•
ERROR ENCOUhlER£D
•
~us

• DURING AN IRD1 OH IRDX

••••••••••••••••••••••••••••
2. MSQ, UtR AhD SAC CHlfS SET UP A MICHO VEC?OR OF 0028 A? Th£ OUTPUT
or THE MICROSEQUENCER, SE~DING us TO THE PROPER NICRO ADDRESS
A~D THE MACHINE CdECK MICRO RCUTid~ S~?S UP OUR SCBd+4 AHO
dUILDS Th£ STAC~.
3. SC&d+4 COhTAl~S OUR MACRO VECTOR

ADuR~SS

4. USE lriE LOwER TWO BITS TO SELECT A STACK:
VECTOR BITS <1> I <O>

----------0
> USE
0
0

)

1·

)

KER~AL STACK UNLESS <IS>
IS SET lN PSL
USE 1NTERUPT STACK

~IT

TRAP TO wCS ADDRESS 2001 Ir wCS
IS ~OT PRESE~T. TRAP TO 0001 l~ ccs
> HALT AT VECTOR PC POINTS TO
lNTERUPt~D OR FAULTED lNSTRUCllO~.
00000000 07

>>>
S. PUSH PSL, PC ANO 11 OTHER LONG~O~OS OF lNfONMA?lOU
o.

~OWER T•O BITS OF VECTOR GET Z~ROS ~HEN CROSSING CAI
CYCL~.
ThE A~ORESS POINTeo TO b~ Th~ VECtOM ~ILL 6£
OF THE MACRO MACHINE ChECK HANDL~R ROUT1N£.

7. lR01

or MACRO ROUTIN~ TAKES P~ACE.

STAC~.

ADOk~SS

Th£ ST~kT

160
GEN~RAL

MACHI~£

CH~CK

~ACRO

FLO~

-------------------------------A NACHlNE CHECK CAN BE HANDLED MANY DIFFERENT wAYS DEPEhDING
ON CERTAIN SYSGEN PARAMETERS AND THE CURRE~T MOD£ OF OPERATiuN
THE EXC~PTION OCCURRED.

THE FOLLOWING CHART IS DESIGNED TO Shew ONLY

THE C~ERALL SYSTEM RESPONSE TO A MACHlhE CHECK.

--~----~---------I LOG THE ERROR

-----------------I CHECK THE MODE I

-----------------••••••••••••••••••••••••••••••••••••••••••••••m••
I
I
I
US£ff OH SUPER~lSOR
Kl::RNAL
I
I
BUGCHECK THE CPU
S EXIT-S UN~ESS THi
I
VMS ~ACRO hANDLER
(FATAL)
I
DETERMlNeS THAT IT
I
CAH RECOVER iRO~ THE
I

------

-----------------EXC~PTlON.

CHON•FA?ALJ

EXECUTIVE

------·--

IS THE SYSGE* •auGChKFATAL· BIT s~~?
YES: TREAT lT ,. LIKE KERNAL MOD~
NC: LOG THE USER OFF UNLESS
THE VMS MACRO HAhD~ER
DETERMINES THAT IT CAN
RECOVER FROM T~E ~XCEPTIOh.
(NQN•FATAL)

~HE~

DO~h

161

IF tHE ~ACHI~E CHECK TUKNS INTO A BUGChECK, It WILL HAVE
?HE FOLLOwING RESU~TS:

--------------------------------------------------FATAL
NOh•FATAL SUGCHECK CODE
8UGCH£CK
1-------------------------------1
CODE
I
I BUGCHKFATAL
BUGCHKF~TAL

l'IT SET

BIT CLEAR

-------------------------------------------------------------KERN AL
I
SHUTDOWN
MODE
LOG THt; ERROR
LOG THE ERROR I
SHUTDO\IJN
THE CPU
THEN
I
1----------1
THE CPU
I EXECUTlVEI
REI
i
I

MODE

-------------------------------------------------------------IPROCESS IPROCESS I
IHAS
IDOES
I
IBUGCHECKINOT HAVEi
IPRIV.
l&UGChECKI
I
. IPRIV.
I

-------------------------------------------------------------ISUPERVISOHILOG TH£ I DO NOT
MODE
I E~HOR
ILOG THE
I ERRUR
l••••••••••I THEN
I
USER
ISEXIT.S I BUT
I
I
MOOE
I
I S~XIT.S '1

IJlSMISS THE
E~ROR THEH
REI

--------------------------------------------------------------

162
BUGCHECKS

A BUGCHECK 1s an internal 1ncons1stency •1tn1n a proc~ss or VMS,
:n as a corrupted data structure or unexpected exception, detected oy
.s. su;cnecks can be tne result of pro;ramming errors or hardware
failures. Software related Buqcnecxs can be quicKlY isolated from tne
information saved in the system dump file on a system crasn and from source
listings. Hardware related augcneeks are not so easy to isolate Decause
the bardware failure can occur lonq before VMS ~ecects it. Later on we
~111 looK at how to trouDlesnoot some of the common augcneck ~ai~ures.
BuQchecxs are not always fatal to tne system. A au;check that
occurs wn11e tne CPU 1s in e1tner user or supervisor mode •111 result in
termination of tne process tnat incurred the su;cneck, prov1d1nq tne
process 4oes not have privilege to cause a eu;cneeK. If tne Bu~enecK 1s
not fatal, v~s ~ill dismiss it and allow tne process to continue. utner~ise
~atal B~gcnecxs will not crash tne system from user or Supervisor moae.
VMS protects itself and its data structures by usin; tne Bugcheek
aechanism wn11e in Executive or Kernel mode. Non•fatal Bu~cnecKs wnien
occur in Executive or Kernel mode are dism1ssea tne same as tnose in
Superv1sor or user mode, ~nless tne SYSBOOT parameter SUGC~£CKFAtAL 1s
turned on. Non•fatal &u9checks •111 be logged to tne Error ~09. Fatal
au;cnecks will result 1n tne orderly snu~down of tne system. A small
amount of information descr101n9 tne Bugcneck is sent to tne console
ter~1na1, • d~mp file is written to tne disk and tnen a special eoce
is sent to tne CON cnip'$ console transmit data Duffer and a HALT
instruction 1s executed. tne syste~ •111 t~en De rebooted unless
~he S~SBOUT parameter.flag SUGRESOOT is cleared.
Tne crasn dump f 1le can be analyzed us1n~ tne system Du~p Analyzer
CSDA>. Tne size of tne dump file must be four blocks larqer tnan the
numoer of pnys1cal pages 1n>tne system. If the space reser:ed on tne a1sk
tor tne dump tile is too s~a11, only the pnys1ca1 pa9es tnat can fit 1n tne
f1le •ill De written. A small dump file will not contain some of tne ~ost
crucial contents of pftysical memory Ctne system page tables> wnien may 5ake
anal~s1s w1tn SDA 1mposs101e.
·

163
BUGCHECK TROUBLESHOOTING

The tools you must Jcnow now to use to a1Jalyze a crasn dump include
.ae VMS ~1crof1cne listings and tne System Dump Analyzer. This discussion
assumes you also know tne VAX instruction set and understand now to read a
MACk0•32 listin9. It 1s not necessary to understand tne internals of ~MS
to troubleshoot some of tne most common Buqcnecks tnat are caused by
nardware iailures. Bugcnecks caused by program errors are beyond tne scope
ot tnis discussion.
wnen a BugcnecK occurs, information 1s lett on tne stae~ wnicn is
useful for isolating tne area of code wn1cn caused tne BuqcnecK. rn1s
information is usually easy to identify. ~ote that tnis information is not
always available on tne stac~. Someti~es a Signal Array can be found on
tbe sta~K witnout a Vector Address array. The first item to locate is tne
Vector Aadress Array, thou~n it is not always available. Tne AP •111 be
pointing to tne vector Address Array if it 1s on the stac:K. Tnis array
will ;ive you tne address on the stack of tne s1;nal and mecnanism arrays.
rae mechanism array contains ~ne contents of RO and R1 at tne time of· the
su;check. rn1s information •111 be necessary tor analyzing tne code tnat
B"1;cnecttec.
VECTOR
AP ••••••> +••••••-••••••••••••••••••••••••+ AUORESS
00000002
ARR Al
+-------------------------------+

SIGNAL VECTOR
+--------1+----·--------------------------.
+
Mt:CHArlISM VECTOR
+-----·
I
+•••••••••••••••••••••••••••••••+
I

The values ~ontained 1n tne VECTOK ADDRESS ARRAY are:

I
I

00000002 •• the number of longwords tnat follow in
tne V&C?OR ADDR~SS ARRAY.

SIGNA" VECTOR -- a pointer to tne f 1rst long•ord
Of tne SIGNAL ARRAY.

~ECHANISM VECTOR •• a pointer to tne first lon;word
of the HECHANISM ARRAY.

~E.CnANIS\1

+•••••••••••••••••••••••••••••-•+
00000004
+••••>I

·-------------------------------+
STACK FRAME ADDRESS
+-------------------------------+

DEPTH COUNT

+-------------~----~-~----------+
RO
+----------------------------~--+
R1

+-------------------------------+

AR~A~

164
v
Tne values contained in tne MECHAHISM ARRAY are:
o

00000004 -- tne number of lon;words in tne MECHANISM
ARRAY. In a MECHANISM ARRAY, tn1s value is always tour.

FRAME •• the address of tne stack frame.

DEPTH -- the stac~ depth. CFFFFrFFD to FFFFFFFf) Look
for tn1s when tne Vector Array 1s not on tne stacx.

tne contents of RO at the time of tn~ exception.
tne contents of R1 at the time of tne exception.
SIGNAL
ARRAY

NUMBER OF LONGWORDS
+•••••••>I+-------------------------------+
+-------------------------------+
EXCEPTION CODE
+-------------------------------+ o to 254 optional ar;uments
can qo Detween tne Exceot1on
----------------------------------- code
and tne re.
-.-------------------------------,+-------------------------------+
PC
+-------------------------------+
· PSk
+-------------------------------+
UPTl~HAL

AKGU~E~TS

As an Example:
The values contained in tne SIGNAL ARRAY for an Access
Violation Exception wn1cn caused a &ugcneck are:
o

ooooooos •• tne number of longwords contained in the
SIGNAL ARRAY. For access violations tn1s numoer is
always five.

EXC&PTIOW CODE -- a code wnicn identifies
exception.

REASON MAS~ -- tne longword ~nose lowest tnree oits,
if set, indicate that the instruction caused a
Len;tn Violation Co1t 0), referenced tne process page
table Cait 1), and/or read/modify operation Cbit 2).

VIMtUA~ ADDRESS -- tne vir~ual address t~at tne system
tried to reference at the time of tne exception.

PC •• tne Proqram Counter. Tne PC contains the address
of tne instruction tnat signaled tne exception.

PSL •• tne ~rocessor status longword at tne time of
tne exception.

t~e

type cf

Signal arrays differ in len;tn, from 4 to 258 longwords,
depending on tne ~ind of exception tne system detects.
See tne VAX•11 Run Time Library Reterence ~anual tor

details.

165

The Signal Array contains more interesting information about the
tne format of tne S1;nal Array varies tor different Bugcnecks •
.ie Exception Code identifies wnat ~ind of error led to tne Bu;cnecK. lhe
fcept1on Code indicates sucn errors as Access Violation, Opcode Reserved
DEC, etc. Following tne Exception Code are optional ar;uments. tnese
.;uments •ill vary in numoer and meaning for different Bugcneeks. Next on
tne stack is the PC ot tne instruction that woul~ nave been executed next,
if an ~xcept1on nad not occurred.
\;c~ecK.

Once you have located tne Exception Code •1tn1n tne Signal Array,
enter tne to11ow1n; on a running VAX/VMS system:

s l?T<cr>
s -EXIT 'X<except1on code><cr>
for access violations tne EXCEPTION CODE is oooooooc.
~XAMPLE:

s iTT<cr>
s -£XlT 'XOC<cr>

'SYSTEM•F•ACCVlO, access v1olat1on, reason mas~=oo,
v1rtua1 address=oooooooc, PC=7FFD3A~e, PSL=00040l4
No• tnat you know wnat tne Exceot1on Coae means, you can look up
a snort explanation in tne VAX/VMS System Messages and Recovery Procedures
Manual. For instance, continuing with tne Access Violation example, you
would lOOKUP ACCVIO on paqe 2•3 and tind the following:
• ACCVIO, access violation, reason mask=xx, virtual address=location,

PC=location, PSL=xxxxxxxx
Facility:

VAX/VHS System services

Explanation~
An 1~a;e attempted to read from or •rite to a
memory location tnat is pro~ected against tne current mode.
Tnis message indicates an exception condition and 1s
follo•ed by a re;1ster and stack aurup to nel? locate tr.e
error.

User Action: Examine tne PC and virtual address displayed
1n tne message and cnee~ the pro;ram listing to verify
tnat instruction operands or procedure call arguments are
correct. •
- Tne ex~lanation given in tne VAX/VMS System ~essages and Recovery
•111 91ve you an 1dea of wnat tne software was atte~Pt1ng to do or a
deser1pt1on of tne Exception condition wn1cn led to tne su;c~eck. Tne user
Action may give you some idea ot now to proceed in exa~1n1ng tne crasn
~u~p.
Rememoer that tnis manual ~as intended tor programmers crea~ing
pro;ram errors and not tor analyzing ~ardware failures, so some of tne
£xplanat1ons and User Actions will not be approPr1ace to a nardware
ta1lure.

~anual

166
Now tnat you nave some idea wnere tne Bu;eneck error was detected
and wnat type of an error caused tne Bu;cneeK, you can attempt a bit of
·~alys1s using SDA.
The aoove stacK information may De availaole at tne
nsole or by usin; SOA and examining tne stack. ~x&ctlY now you proceed
.itn SDA will depend on your experience and tne type of problem you are
trouolesnooting.
For instance, suppose you nad an access violation caused by a
len;tn violation wnien led to a SuqchecK. The VA that tailed can be found
1n the Signal Array. Try to examine tnis address us1n9 SDA. __ It,•111
probably not be possible because tne page may not have been mapped. Tnen
cnecK the process pa;e table or system pa;e table to tind out if- the
address is mapped and •hat protection exists. If tne VA is an aooxxxxx
value, tnen you can use the system map CSYS.HAP) and locate tne VMS moaule
wnicn contains tne address. If tne address ts not mapped, 1t may indicate
tnat tne program calculated the address incorrectly or dropped/picked a bit
in tne data patns because of a nardware error. try to fi;ure out wnat tne
ad~ress snould nave been and if tne ·vA tnat was generated is off by a
s1n;le o1t. MayDe one particular register dropped a 01t. Fro~ a s1n;le
tailure you may not nave enougn information to isolate tne problem to a
small enougn area of the system to warrant swapping a module. In these
cases 1t 1s better to wait tor add1t1onal crasnes and collect more
intormation.
Anotner Possibility is tnat a device could cause an error, sucb as
constant interrupts, wnicn could cause a system eras~ or nan;. ~e
es?eciallY suspicious of tne system disk, MBA or Nassbus if all of tne
ta1lures nappen •hile. page faulting a pa9e or s-app1n; a process.
A customer written device driver, or for tnat matter a DEC device
ariver, could cause a augcneck. If tne VA or ~c •hicn causes the failure
is aooxxxxx and you cannot t1nd the module wh1cn contains tnis address in
tne SYS.MAP, tnen tne address may oe within a device driver or otner ~"s
co~ponent sucn as K~S.
to find out 1f it is w1tn1n a device driver, run
SYSGEN and SHOW /DEVICES. tne SHOW/DEVICES COftlmand will print out a list
of address ind1cat1n9 wnere eacn aev1ee driver 1s loaded, and addresses
wnere key structures w1tn1n tne I/O data base can be tound. tne snow
O£VICE command under SD~ could also be used. Just know1n9 tnat tne aadress
wnicn caused tne Bugcneck 1s associated witn a particular device driver
~111 g1ve you some idea of ~here to start.
In tne case of a suspected
customer wr1tten device driver, 1t would be wise to involve Soft•are
Support to nelp analyze the crasn and look at tr.e code of tne device ·
~r1ver.

167
SUGCHECK ANALYSIS

NUMB~R

ONE

Let's try looking at an example of one BugchecK wn1cn was torcea by
nardware error and see if we can determine where the problem lies •
•••• CDM~ENTS and SDA COMMANDS.are indicated bY •••

•***

SDA> SHOW CRASH

************•••
VAX/V"S System dump analyzer
Dump taKen on 1l•JUL•1981 16:19:26.07
SSHVEXCEPT, unexpected system service exception
time of syste~ crash: 13•JUL•1981 16:19:26.67
version of system: VAX/VMS VERSION V2.l
Reason for BUGCHECK exception: SSRVEXCEPT, Unexpected system service exception
Process currently executing: SYSTEM
Current 1mage file name: .DRAO:[SYS£XElDIRECTORY.£X&;3

•• GETTlhG A uIRECTORY

current IPL: o Cdecimall
~neral

registers:

**** THE CONTENTS Of REGlS?ERS RO,Rl,SP,PC,, PSL HAVE BEEN ••••
•••• MODIFIED SY THE aUGCHECK HAnOLER. TH£ PC IS POINTING ••••
**** TO triE BUGCHECK HANDL~R FOR SYSTEM SERVICE EXCEPTIO~. ***•
R3 - 7FFEA£u0
R2 - 7FF£C200
R1 = 8000A122
RO = 7FFEFE35
7F'FEA838
Ro
7FFEABEC
R7 = 00000000
KS
M4 = 80070EAO
= 7FFEF988 fHO 7FfEA790 R11
R9
7fFtF878
HS
7FFJ::A~10
AP
iSL

= 7FFECD84
=
- 00000000

= 7FFECD6C

= 7FF£CDoC
=

- 8000A128

Processor registers:
POttR

POLtt
?l~R

PlLi<

SBR
SLR
ISP
f(SP
ESP

.:>Sr
USP

-=
=

=
=
=

800970CJO
00000000
7F89BOOO
001FFE87
0007E400
00000700

8007F'OOO
=
= 7F'FEC06C
= 7F'fEuDBO
= 7FFC:F818
= 7FFCC9C8

PCBB

seas
ASTLV1'
·SlSR

ICCS
ICR
TOOR

- 0001A674
= 0007DAOO

= 00000004
= 00160000
800000Cl
-== FFFFEE68
73BE01CO

00008001
=
00040000
- 00000000
= 002002ou
sa1::R =
= ooousoo2
SdIIA - 20000001
SBIS
= 00000000

ACCS
SB IFS
SB I SC
Sl:SIMT

15 AW
•• ON THIS SYSTE.M, THIS STACK

•• THI.::> IS !HE

CURR~"!

E~PTY

•*

STACK

••

168
SDA> SHOw PROCESS
•

•••••••••••••••••
>cess status:

00040001

RES,PHDRE:S

address
80070EAO
Master PlD
00020016
PIO
00020016
PHO address
80096600
Stace
CUR
current pr1or1ty
4
aase pr1or1ty
4
UlC
coo1,0041
Mutex count
0
•aitin; EF cluster
0
Startin; wait time
1A180000
Event tlag wait mask
F7FFFFFF
Local EF cluster Q
C8000001
Local ~F cluster 1
00000000
Global cluster 2 pointer 00000000
GloDal cluster 3 pointer 00000000
PCS

80U7A980
JIB acsdress
oooooouu
creator PID
0
Subprocess count
00000000
Swapfile disk address
0000
Teraination mailbox
_- KESU
AST's •nablea
- N0'1£
AST's active
19
AST's remaining
12/12
Buffered l/u count/11~1t
12/12
Direct 110 count/limit
20480/204aO
BUFIO byte count/limit
20
• open files allowed left
20
Timer entries allowed left
0
Active paqe table count
40
Process wS pa;e count
55
Global ws page count

169
A> SHOw s·rACK

~············
rrent operat.1nc; stac:Jc (KERNEL):

SP =>

7FFECD4C
7FFEC050
7FFECD54
7FFECDS8
7FFECDSC
7FFECD«»O
7FFECD64
7FFECJ>68

7FFEF988
7FFEA790
7FFEA210
7FFECD84
7FFECD6C
7FFECD64
BOOOA128
00000000

7FFECD6C
7FF£CD70
7FFECD74
7FFECD7S
7FFECD7C
7FFECD80
7FFECD84
7FiECOi8
7FFECD8C
7FFECD90
7FFECD94
7FFEC098
7FFECD9C
7FFECDAO
7FFECDA4
7FFECDA8
7FFECDAC
7FFECDBO
7f'FECDS4
7FFECDSQ
7FFECDSC
7FF£CDCO
7FFECDC4
7FFECDC8
7FFECOCC
7FFECODO
7FF£CDD4
7FFECDD8
7FFt:CDDC
7FFECDEO
7F'FECDE4
7FFECDE8
7Fti.ECDEC
7FFECOFO
7FrECDF4
7FFE:CDF8

00000000
00000000
7FFEA956
MMGSl~GACT8UF+156
7FFECDCO
CTLSGL-XSTKSAS+SCO
80000014
SYSSCALL-HA~DL+004
80011265
EXESREFLECT+14t;
00000002 <--------------------~---*** ThE Vi.CTOR ARR.
7f'FECDA4 ---~~---------------~---CTLSG~-KSTKBAS+5A4
7FFECD90
CTLSGL-KSTKaAS+590.
00000004
THE ,_.ECHANlSM
7FFECDCO
CTLSGL-XSTKBAS+5CO
FFFFFFFE
00400005
7FF£COOO
CTLSA-DISPVEC
00000005 <~--------~----~-----~---tHC: SlGNAL ARR
--------~---------------00000444 (~--~--------------------trn~ F"lNO 'IHE £
00000000
80011AOO
EXESIMGS?A+SC2
800119FD
EXJ::SI~GSTA+SSF
0.,400000
80UOE39F
EXES.1..tCiACT+CAC
00000000

7F fECOfC

CT~SAG-CLIDATA+580

CTLSAG-CLIDATA
CTLSGL-KStX8AS+S84
CTLSGL-KSTKBAS+56C
CTLSGL-lS?KBAS+~64

EXESEXCPTN+OO&

<========================= •••
-------------------------

•••
•••

ooccoooo

7FFEDDC8
7FFECOE4
80007658
00000000
7FFEAt:OO
7Ffr:ASEC
00000000

CTLSGL-~SPl~I+FC8
CTLSGL-KS?~8AS+SE4

EXESCMKFuH,,+018
MMGSI~GAC?BUF+600
MHGSI~GACTSUF+uEC

ouoooooo

00000000

7FFEDDC8
7FFEDDBO
i000A130
80000096
01800000

CTLSGL-~SPINI+FCS
CTLSGL-~SPI~l+F50

ElESEXCPTN+OOE
SYSSCMKRNL+006

•,

( i

170

••••
If you nave been follow1ng tne erasn so far, you snould kno~ tnat
the Exception Code was a 444. Using tne methoas snown earlier, you should
nave been able to determine tnat tne exception code indicates a PAGRC£RR,
~ tnat 1s a PAGRDERR.
Now looking that up in tne VAX/VMS System ~essa;es ana
Recovery Procedures Manual you would find the follow1ng:
• PAGRDERR, page read error, reason •ask=xx, virtual address=location,
PC=location, PSL=xxxxxxxx
Facility:

VAX/VMS

syste• services

Explanation: The system failed to read a page from aisk 1nto
memory during a page fault operation. Tnis message 1na1cates
an exception condition and is usually followed by a display of
tne condition arguments, registers, and stacK at tne t1me of
tne exception.
user Action: cneck the status of the device and repeat tne
request. If the failure persists, notify tne system •anager.•
Now wnat do you tn1nk •ould be a good area to examine?

While 1t

1s not possi~le from tne inf~rmation above to state conc1us1ve1y that the

Bu;cnecx was caused Dy a nardware failure ln tne disk subsystem, tne
availaole evidence is po1nt1n9 1n tnat direction. This au;cnecK was 1n
fact caused by sw1tcnin9 the system disk offline/online and tnen attempting
~o perform a DIR command.
As you can see, tnis Bugcneck was ta1rly
strai;nt forward and could De isolated to the disk subsystem. lf ~n1s
~u;cnecK occurred again and tne nardware was availaDle, you could look at
cne disk suDsyste• registers. You would find the Volume Valid bit reset.
Fro3 th1s you would then De able to pursue tne MBA or Disk drive to
determine wny tne Volume Val1d bit was reset on tne system disk.

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172
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+--------+--------+--------+--------+
Fndm:t
Del L
Gold

HelF·

Find

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+--------+--------+--------+--------+
Pase
Sect
APPend : Del W
Command:

Fill

Replace:

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Bottom :

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Paste

Und C

+--------+--------+--------+--------+
Advance: Backup
Cut
Del C
+--------+--------+--------+--------~

Word

:Chn~case:

Eol

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Char

Del Eol: SPecins:

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. : Select
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Reset

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Backspace
Delete
Linefeed

CTRL/A
CTRL/[I
CTRL/E
CTRL/K
CTRL/L

CTRL/T
CTRL/U
CTF~L./W

CTRL/Z

Go to beginnin~ of line
Delete character
Delete to start of word
Compute tab level
Decrease tab level
Increase tab level
Define ke~
Form feed
AdJrJst tabs
Delete to start of line
Refresh screen
Return to line mode

173

EDT Version 2 VT52

Ke~Pad

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Gold

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Find

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Bottom :

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APPend

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Subs

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Enter
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+-----------------+--------+--------+

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Delete character
Delete to start of word
ComPute tab level

CTRL/D

Decrease

CTF:L/E

Increase tab level
Fi 11 t.e~d

Bad~.s?ace

Delete

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CTF~L/F
CTRL/~~

CTRL./L
CTRL./T
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CTF~L.l:Z

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level

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.~dJust tabs
Delete to start of line
F.\:ef re sh screen
Return to line mode

174

175.
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